Searched refs:cfg (Results 1 - 200 of 1172) sorted by relevance

123456

/linux-4.1.27/drivers/media/platform/exynos-gsc/
H A Dgsc-regs.c26 u32 cfg; gsc_wait_reset() local
29 cfg = readl(dev->regs + GSC_SW_RESET); gsc_wait_reset()
30 if (!cfg) gsc_wait_reset()
40 u32 cfg; gsc_hw_set_frm_done_irq_mask() local
42 cfg = readl(dev->regs + GSC_IRQ); gsc_hw_set_frm_done_irq_mask()
44 cfg |= GSC_IRQ_FRMDONE_MASK; gsc_hw_set_frm_done_irq_mask()
46 cfg &= ~GSC_IRQ_FRMDONE_MASK; gsc_hw_set_frm_done_irq_mask()
47 writel(cfg, dev->regs + GSC_IRQ); gsc_hw_set_frm_done_irq_mask()
52 u32 cfg; gsc_hw_set_gsc_irq_enable() local
54 cfg = readl(dev->regs + GSC_IRQ); gsc_hw_set_gsc_irq_enable()
56 cfg |= GSC_IRQ_ENABLE; gsc_hw_set_gsc_irq_enable()
58 cfg &= ~GSC_IRQ_ENABLE; gsc_hw_set_gsc_irq_enable()
59 writel(cfg, dev->regs + GSC_IRQ); gsc_hw_set_gsc_irq_enable()
65 u32 cfg = readl(dev->regs + GSC_IN_BASE_ADDR_Y_MASK); gsc_hw_set_input_buf_masking() local
68 cfg &= ~mask; gsc_hw_set_input_buf_masking()
69 cfg |= enable << shift; gsc_hw_set_input_buf_masking()
71 writel(cfg, dev->regs + GSC_IN_BASE_ADDR_Y_MASK); gsc_hw_set_input_buf_masking()
72 writel(cfg, dev->regs + GSC_IN_BASE_ADDR_CB_MASK); gsc_hw_set_input_buf_masking()
73 writel(cfg, dev->regs + GSC_IN_BASE_ADDR_CR_MASK); gsc_hw_set_input_buf_masking()
79 u32 cfg = readl(dev->regs + GSC_OUT_BASE_ADDR_Y_MASK); gsc_hw_set_output_buf_masking() local
82 cfg &= ~mask; gsc_hw_set_output_buf_masking()
83 cfg |= enable << shift; gsc_hw_set_output_buf_masking()
85 writel(cfg, dev->regs + GSC_OUT_BASE_ADDR_Y_MASK); gsc_hw_set_output_buf_masking()
86 writel(cfg, dev->regs + GSC_OUT_BASE_ADDR_CB_MASK); gsc_hw_set_output_buf_masking()
87 writel(cfg, dev->regs + GSC_OUT_BASE_ADDR_CR_MASK); gsc_hw_set_output_buf_masking()
115 u32 cfg = readl(dev->regs + GSC_IN_CON); gsc_hw_set_input_path() local
116 cfg &= ~(GSC_IN_PATH_MASK | GSC_IN_LOCAL_SEL_MASK); gsc_hw_set_input_path()
119 cfg |= GSC_IN_PATH_MEMORY; gsc_hw_set_input_path()
121 writel(cfg, dev->regs + GSC_IN_CON); gsc_hw_set_input_path()
128 u32 cfg; gsc_hw_set_in_size() local
131 cfg = GSC_SRCIMG_OFFSET_X(frame->crop.left); gsc_hw_set_in_size()
132 cfg |= GSC_SRCIMG_OFFSET_Y(frame->crop.top); gsc_hw_set_in_size()
133 writel(cfg, dev->regs + GSC_SRCIMG_OFFSET); gsc_hw_set_in_size()
136 cfg = GSC_SRCIMG_WIDTH(frame->f_width); gsc_hw_set_in_size()
137 cfg |= GSC_SRCIMG_HEIGHT(frame->f_height); gsc_hw_set_in_size()
138 writel(cfg, dev->regs + GSC_SRCIMG_SIZE); gsc_hw_set_in_size()
141 cfg = GSC_CROPPED_WIDTH(frame->crop.width); gsc_hw_set_in_size()
142 cfg |= GSC_CROPPED_HEIGHT(frame->crop.height); gsc_hw_set_in_size()
143 writel(cfg, dev->regs + GSC_CROPPED_SIZE); gsc_hw_set_in_size()
150 u32 cfg; gsc_hw_set_in_image_rgb() local
152 cfg = readl(dev->regs + GSC_IN_CON); gsc_hw_set_in_image_rgb()
154 cfg |= GSC_IN_RGB_HD_WIDE; gsc_hw_set_in_image_rgb()
156 cfg |= GSC_IN_RGB_SD_WIDE; gsc_hw_set_in_image_rgb()
159 cfg |= GSC_IN_RGB565; gsc_hw_set_in_image_rgb()
161 cfg |= GSC_IN_XRGB8888; gsc_hw_set_in_image_rgb()
163 writel(cfg, dev->regs + GSC_IN_CON); gsc_hw_set_in_image_rgb()
171 u32 cfg; gsc_hw_set_in_image_format() local
173 cfg = readl(dev->regs + GSC_IN_CON); gsc_hw_set_in_image_format()
174 cfg &= ~(GSC_IN_RGB_TYPE_MASK | GSC_IN_YUV422_1P_ORDER_MASK | gsc_hw_set_in_image_format()
177 writel(cfg, dev->regs + GSC_IN_CON); gsc_hw_set_in_image_format()
188 cfg |= GSC_IN_YUV422_1P; gsc_hw_set_in_image_format()
190 cfg |= GSC_IN_YUV422_1P_ORDER_LSB_Y; gsc_hw_set_in_image_format()
192 cfg |= GSC_IN_YUV422_1P_OEDER_LSB_C; gsc_hw_set_in_image_format()
194 cfg |= GSC_IN_CHROMA_ORDER_CBCR; gsc_hw_set_in_image_format()
196 cfg |= GSC_IN_CHROMA_ORDER_CRCB; gsc_hw_set_in_image_format()
200 cfg |= GSC_IN_YUV420_2P; gsc_hw_set_in_image_format()
202 cfg |= GSC_IN_YUV422_2P; gsc_hw_set_in_image_format()
204 cfg |= GSC_IN_CHROMA_ORDER_CBCR; gsc_hw_set_in_image_format()
206 cfg |= GSC_IN_CHROMA_ORDER_CRCB; gsc_hw_set_in_image_format()
210 cfg |= GSC_IN_YUV420_3P; gsc_hw_set_in_image_format()
212 cfg |= GSC_IN_YUV422_3P; gsc_hw_set_in_image_format()
217 cfg |= GSC_IN_TILE_C_16x8 | GSC_IN_TILE_MODE; gsc_hw_set_in_image_format()
219 writel(cfg, dev->regs + GSC_IN_CON); gsc_hw_set_in_image_format()
226 u32 cfg = readl(dev->regs + GSC_OUT_CON); gsc_hw_set_output_path() local
227 cfg &= ~GSC_OUT_PATH_MASK; gsc_hw_set_output_path()
230 cfg |= GSC_OUT_PATH_MEMORY; gsc_hw_set_output_path()
232 cfg |= GSC_OUT_PATH_LOCAL; gsc_hw_set_output_path()
234 writel(cfg, dev->regs + GSC_OUT_CON); gsc_hw_set_output_path()
241 u32 cfg; gsc_hw_set_out_size() local
245 cfg = GSC_DSTIMG_OFFSET_X(frame->crop.left); gsc_hw_set_out_size()
246 cfg |= GSC_DSTIMG_OFFSET_Y(frame->crop.top); gsc_hw_set_out_size()
247 writel(cfg, dev->regs + GSC_DSTIMG_OFFSET); gsc_hw_set_out_size()
249 cfg = GSC_DSTIMG_WIDTH(frame->f_width); gsc_hw_set_out_size()
250 cfg |= GSC_DSTIMG_HEIGHT(frame->f_height); gsc_hw_set_out_size()
251 writel(cfg, dev->regs + GSC_DSTIMG_SIZE); gsc_hw_set_out_size()
257 cfg = GSC_SCALED_WIDTH(frame->crop.height); gsc_hw_set_out_size()
258 cfg |= GSC_SCALED_HEIGHT(frame->crop.width); gsc_hw_set_out_size()
260 cfg = GSC_SCALED_WIDTH(frame->crop.width); gsc_hw_set_out_size()
261 cfg |= GSC_SCALED_HEIGHT(frame->crop.height); gsc_hw_set_out_size()
263 writel(cfg, dev->regs + GSC_SCALED_SIZE); gsc_hw_set_out_size()
270 u32 cfg; gsc_hw_set_out_image_rgb() local
272 cfg = readl(dev->regs + GSC_OUT_CON); gsc_hw_set_out_image_rgb()
274 cfg |= GSC_OUT_RGB_HD_WIDE; gsc_hw_set_out_image_rgb()
276 cfg |= GSC_OUT_RGB_SD_WIDE; gsc_hw_set_out_image_rgb()
279 cfg |= GSC_OUT_RGB565; gsc_hw_set_out_image_rgb()
281 cfg |= GSC_OUT_XRGB8888; gsc_hw_set_out_image_rgb()
283 writel(cfg, dev->regs + GSC_OUT_CON); gsc_hw_set_out_image_rgb()
291 u32 cfg; gsc_hw_set_out_image_format() local
293 cfg = readl(dev->regs + GSC_OUT_CON); gsc_hw_set_out_image_format()
294 cfg &= ~(GSC_OUT_RGB_TYPE_MASK | GSC_OUT_YUV422_1P_ORDER_MASK | gsc_hw_set_out_image_format()
297 writel(cfg, dev->regs + GSC_OUT_CON); gsc_hw_set_out_image_format()
305 cfg |= GSC_OUT_YUV444; gsc_hw_set_out_image_format()
314 cfg |= GSC_OUT_YUV422_1P; gsc_hw_set_out_image_format()
316 cfg |= GSC_OUT_YUV422_1P_ORDER_LSB_Y; gsc_hw_set_out_image_format()
318 cfg |= GSC_OUT_YUV422_1P_OEDER_LSB_C; gsc_hw_set_out_image_format()
320 cfg |= GSC_OUT_CHROMA_ORDER_CBCR; gsc_hw_set_out_image_format()
322 cfg |= GSC_OUT_CHROMA_ORDER_CRCB; gsc_hw_set_out_image_format()
326 cfg |= GSC_OUT_YUV420_2P; gsc_hw_set_out_image_format()
328 cfg |= GSC_OUT_YUV422_2P; gsc_hw_set_out_image_format()
330 cfg |= GSC_OUT_CHROMA_ORDER_CBCR; gsc_hw_set_out_image_format()
332 cfg |= GSC_OUT_CHROMA_ORDER_CRCB; gsc_hw_set_out_image_format()
335 cfg |= GSC_OUT_YUV420_3P; gsc_hw_set_out_image_format()
340 cfg |= GSC_OUT_TILE_C_16x8 | GSC_OUT_TILE_MODE; gsc_hw_set_out_image_format()
343 writel(cfg, dev->regs + GSC_OUT_CON); gsc_hw_set_out_image_format()
350 u32 cfg; gsc_hw_set_prescaler() local
352 cfg = GSC_PRESC_SHFACTOR(sc->pre_shfactor); gsc_hw_set_prescaler()
353 cfg |= GSC_PRESC_H_RATIO(sc->pre_hratio); gsc_hw_set_prescaler()
354 cfg |= GSC_PRESC_V_RATIO(sc->pre_vratio); gsc_hw_set_prescaler()
355 writel(cfg, dev->regs + GSC_PRE_SCALE_RATIO); gsc_hw_set_prescaler()
362 u32 cfg; gsc_hw_set_mainscaler() local
364 cfg = GSC_MAIN_H_RATIO_VALUE(sc->main_hratio); gsc_hw_set_mainscaler()
365 writel(cfg, dev->regs + GSC_MAIN_H_RATIO); gsc_hw_set_mainscaler()
367 cfg = GSC_MAIN_V_RATIO_VALUE(sc->main_vratio); gsc_hw_set_mainscaler()
368 writel(cfg, dev->regs + GSC_MAIN_V_RATIO); gsc_hw_set_mainscaler()
374 u32 cfg; gsc_hw_set_rotation() local
376 cfg = readl(dev->regs + GSC_IN_CON); gsc_hw_set_rotation()
377 cfg &= ~GSC_IN_ROT_MASK; gsc_hw_set_rotation()
381 cfg |= GSC_IN_ROT_270; gsc_hw_set_rotation()
384 cfg |= GSC_IN_ROT_180; gsc_hw_set_rotation()
388 cfg |= GSC_IN_ROT_90_XFLIP; gsc_hw_set_rotation()
390 cfg |= GSC_IN_ROT_90_YFLIP; gsc_hw_set_rotation()
392 cfg |= GSC_IN_ROT_90; gsc_hw_set_rotation()
396 cfg |= GSC_IN_ROT_XFLIP; gsc_hw_set_rotation()
398 cfg |= GSC_IN_ROT_YFLIP; gsc_hw_set_rotation()
401 writel(cfg, dev->regs + GSC_IN_CON); gsc_hw_set_rotation()
408 u32 cfg; gsc_hw_set_global_alpha() local
415 cfg = readl(dev->regs + GSC_OUT_CON); gsc_hw_set_global_alpha()
416 cfg &= ~GSC_OUT_GLOBAL_ALPHA_MASK; gsc_hw_set_global_alpha()
418 cfg |= GSC_OUT_GLOBAL_ALPHA(ctx->gsc_ctrls.global_alpha->val); gsc_hw_set_global_alpha()
419 writel(cfg, dev->regs + GSC_OUT_CON); gsc_hw_set_global_alpha()
425 u32 cfg; gsc_hw_set_sfr_update() local
427 cfg = readl(dev->regs + GSC_ENABLE); gsc_hw_set_sfr_update()
428 cfg |= GSC_ENABLE_SFR_UPDATE; gsc_hw_set_sfr_update()
429 writel(cfg, dev->regs + GSC_ENABLE); gsc_hw_set_sfr_update()
/linux-4.1.27/drivers/media/platform/exynos4-is/
H A Dfimc-lite-reg.c26 u32 cfg; flite_hw_reset() local
28 cfg = readl(dev->regs + FLITE_REG_CIGCTRL); flite_hw_reset()
29 cfg |= FLITE_REG_CIGCTRL_SWRST_REQ; flite_hw_reset()
30 writel(cfg, dev->regs + FLITE_REG_CIGCTRL); flite_hw_reset()
33 cfg = readl(dev->regs + FLITE_REG_CIGCTRL); flite_hw_reset()
34 if (cfg & FLITE_REG_CIGCTRL_SWRST_RDY) flite_hw_reset()
39 cfg |= FLITE_REG_CIGCTRL_SWRST; flite_hw_reset()
40 writel(cfg, dev->regs + FLITE_REG_CIGCTRL); flite_hw_reset()
45 u32 cfg = readl(dev->regs + FLITE_REG_CISTATUS); flite_hw_clear_pending_irq() local
46 cfg &= ~FLITE_REG_CISTATUS_IRQ_CAM; flite_hw_clear_pending_irq()
47 writel(cfg, dev->regs + FLITE_REG_CISTATUS); flite_hw_clear_pending_irq()
59 u32 cfg = readl(dev->regs + FLITE_REG_CISTATUS2); flite_hw_clear_last_capture_end() local
60 cfg &= ~FLITE_REG_CISTATUS2_LASTCAPEND; flite_hw_clear_last_capture_end()
61 writel(cfg, dev->regs + FLITE_REG_CISTATUS2); flite_hw_clear_last_capture_end()
66 u32 cfg, intsrc; flite_hw_set_interrupt_mask() local
80 cfg = readl(dev->regs + FLITE_REG_CIGCTRL); flite_hw_set_interrupt_mask()
81 cfg |= FLITE_REG_CIGCTRL_IRQ_DISABLE_MASK; flite_hw_set_interrupt_mask()
82 cfg &= ~intsrc; flite_hw_set_interrupt_mask()
83 writel(cfg, dev->regs + FLITE_REG_CIGCTRL); flite_hw_set_interrupt_mask()
88 u32 cfg = readl(dev->regs + FLITE_REG_CIIMGCPT); flite_hw_capture_start() local
89 cfg |= FLITE_REG_CIIMGCPT_IMGCPTEN; flite_hw_capture_start()
90 writel(cfg, dev->regs + FLITE_REG_CIIMGCPT); flite_hw_capture_start()
95 u32 cfg = readl(dev->regs + FLITE_REG_CIIMGCPT); flite_hw_capture_stop() local
96 cfg &= ~FLITE_REG_CIIMGCPT_IMGCPTEN; flite_hw_capture_stop()
97 writel(cfg, dev->regs + FLITE_REG_CIIMGCPT); flite_hw_capture_stop()
106 u32 cfg = readl(dev->regs + FLITE_REG_CIGCTRL); flite_hw_set_test_pattern() local
108 cfg |= FLITE_REG_CIGCTRL_TEST_PATTERN_COLORBAR; flite_hw_set_test_pattern()
110 cfg &= ~FLITE_REG_CIGCTRL_TEST_PATTERN_COLORBAR; flite_hw_set_test_pattern()
111 writel(cfg, dev->regs + FLITE_REG_CIGCTRL); flite_hw_set_test_pattern()
134 u32 cfg; flite_hw_set_source_format() local
147 cfg = readl(dev->regs + FLITE_REG_CIGCTRL); flite_hw_set_source_format()
148 cfg &= ~FLITE_REG_CIGCTRL_FMT_MASK; flite_hw_set_source_format()
149 cfg |= src_pixfmt_map[i][2]; flite_hw_set_source_format()
150 writel(cfg, dev->regs + FLITE_REG_CIGCTRL); flite_hw_set_source_format()
152 cfg = readl(dev->regs + FLITE_REG_CISRCSIZE); flite_hw_set_source_format()
153 cfg &= ~(FLITE_REG_CISRCSIZE_ORDER422_MASK | flite_hw_set_source_format()
155 cfg |= (f->f_width << 16) | f->f_height; flite_hw_set_source_format()
156 cfg |= src_pixfmt_map[i][1]; flite_hw_set_source_format()
157 writel(cfg, dev->regs + FLITE_REG_CISRCSIZE); flite_hw_set_source_format()
164 u32 cfg; flite_hw_set_window_offset() local
166 cfg = readl(dev->regs + FLITE_REG_CIWDOFST); flite_hw_set_window_offset()
167 cfg &= ~FLITE_REG_CIWDOFST_OFST_MASK; flite_hw_set_window_offset()
168 cfg |= (f->rect.left << 16) | f->rect.top; flite_hw_set_window_offset()
169 cfg |= FLITE_REG_CIWDOFST_WINOFSEN; flite_hw_set_window_offset()
170 writel(cfg, dev->regs + FLITE_REG_CIWDOFST); flite_hw_set_window_offset()
175 cfg = (hoff2 << 16) | voff2; flite_hw_set_window_offset()
176 writel(cfg, dev->regs + FLITE_REG_CIWDOFST2); flite_hw_set_window_offset()
182 u32 cfg = readl(dev->regs + FLITE_REG_CIGENERAL); flite_hw_set_camera_port() local
184 cfg &= ~FLITE_REG_CIGENERAL_CAM_B; flite_hw_set_camera_port()
186 cfg |= FLITE_REG_CIGENERAL_CAM_B; flite_hw_set_camera_port()
187 writel(cfg, dev->regs + FLITE_REG_CIGENERAL); flite_hw_set_camera_port()
194 u32 cfg = readl(dev->regs + FLITE_REG_CIGCTRL); flite_hw_set_camera_bus() local
198 cfg &= ~(FLITE_REG_CIGCTRL_SELCAM_MIPI | flite_hw_set_camera_bus()
204 cfg |= FLITE_REG_CIGCTRL_INVPOLPCLK; flite_hw_set_camera_bus()
207 cfg |= FLITE_REG_CIGCTRL_INVPOLVSYNC; flite_hw_set_camera_bus()
210 cfg |= FLITE_REG_CIGCTRL_INVPOLHREF; flite_hw_set_camera_bus()
212 cfg |= FLITE_REG_CIGCTRL_SELCAM_MIPI; flite_hw_set_camera_bus()
215 writel(cfg, dev->regs + FLITE_REG_CIGCTRL); flite_hw_set_camera_bus()
222 u32 cfg = readl(dev->regs + FLITE_REG_CIODMAFMT); flite_hw_set_pack12() local
224 cfg &= ~FLITE_REG_CIODMAFMT_PACK12; flite_hw_set_pack12()
227 cfg |= FLITE_REG_CIODMAFMT_PACK12; flite_hw_set_pack12()
229 writel(cfg, dev->regs + FLITE_REG_CIODMAFMT); flite_hw_set_pack12()
240 u32 cfg = readl(dev->regs + FLITE_REG_CIODMAFMT); flite_hw_set_out_order() local
246 cfg &= ~FLITE_REG_CIODMAFMT_YCBCR_ORDER_MASK; flite_hw_set_out_order()
247 writel(cfg | pixcode[i][1], dev->regs + FLITE_REG_CIODMAFMT); flite_hw_set_out_order()
252 u32 cfg; flite_hw_set_dma_window() local
255 cfg = readl(dev->regs + FLITE_REG_CIOCAN); flite_hw_set_dma_window()
256 cfg &= ~FLITE_REG_CIOCAN_MASK; flite_hw_set_dma_window()
257 cfg = (f->f_height << 16) | f->f_width; flite_hw_set_dma_window()
258 writel(cfg, dev->regs + FLITE_REG_CIOCAN); flite_hw_set_dma_window()
261 cfg = readl(dev->regs + FLITE_REG_CIOOFF); flite_hw_set_dma_window()
262 cfg &= ~FLITE_REG_CIOOFF_MASK; flite_hw_set_dma_window()
263 cfg |= (f->rect.top << 16) | f->rect.left; flite_hw_set_dma_window()
264 writel(cfg, dev->regs + FLITE_REG_CIOOFF); flite_hw_set_dma_window()
270 u32 cfg; flite_hw_set_dma_buffer() local
282 cfg = readl(dev->regs + FLITE_REG_CIFCNTSEQ); flite_hw_set_dma_buffer()
283 cfg |= BIT(index); flite_hw_set_dma_buffer()
284 writel(cfg, dev->regs + FLITE_REG_CIFCNTSEQ); flite_hw_set_dma_buffer()
289 u32 cfg; flite_hw_mask_dma_buffer() local
294 cfg = readl(dev->regs + FLITE_REG_CIFCNTSEQ); flite_hw_mask_dma_buffer()
295 cfg &= ~BIT(index); flite_hw_mask_dma_buffer()
296 writel(cfg, dev->regs + FLITE_REG_CIFCNTSEQ); flite_hw_mask_dma_buffer()
303 u32 cfg = readl(dev->regs + FLITE_REG_CIGCTRL); flite_hw_set_output_dma() local
306 cfg |= FLITE_REG_CIGCTRL_ODMA_DISABLE; flite_hw_set_output_dma()
307 writel(cfg, dev->regs + FLITE_REG_CIGCTRL); flite_hw_set_output_dma()
311 cfg &= ~FLITE_REG_CIGCTRL_ODMA_DISABLE; flite_hw_set_output_dma()
312 writel(cfg, dev->regs + FLITE_REG_CIGCTRL); flite_hw_set_output_dma()
345 u32 cfg = readl(dev->regs + registers[i].offset); flite_hw_dump_regs() local
347 registers[i].name, cfg); flite_hw_dump_regs()
H A Dfimc-reg.c24 u32 cfg; fimc_hw_reset() local
26 cfg = readl(dev->regs + FIMC_REG_CISRCFMT); fimc_hw_reset()
27 cfg |= FIMC_REG_CISRCFMT_ITU601_8BIT; fimc_hw_reset()
28 writel(cfg, dev->regs + FIMC_REG_CISRCFMT); fimc_hw_reset()
31 cfg = readl(dev->regs + FIMC_REG_CIGCTRL); fimc_hw_reset()
32 cfg |= (FIMC_REG_CIGCTRL_SWRST | FIMC_REG_CIGCTRL_IRQ_LEVEL); fimc_hw_reset()
33 writel(cfg, dev->regs + FIMC_REG_CIGCTRL); fimc_hw_reset()
36 cfg = readl(dev->regs + FIMC_REG_CIGCTRL); fimc_hw_reset()
37 cfg &= ~FIMC_REG_CIGCTRL_SWRST; fimc_hw_reset()
38 writel(cfg, dev->regs + FIMC_REG_CIGCTRL); fimc_hw_reset()
76 u32 cfg, flip; fimc_hw_set_rotation() local
79 cfg = readl(dev->regs + FIMC_REG_CITRGFMT); fimc_hw_set_rotation()
80 cfg &= ~(FIMC_REG_CITRGFMT_INROT90 | FIMC_REG_CITRGFMT_OUTROT90 | fimc_hw_set_rotation()
90 cfg |= FIMC_REG_CITRGFMT_INROT90; fimc_hw_set_rotation()
92 cfg |= FIMC_REG_CITRGFMT_OUTROT90; fimc_hw_set_rotation()
96 cfg |= fimc_hw_get_target_flip(ctx); fimc_hw_set_rotation()
97 writel(cfg, dev->regs + FIMC_REG_CITRGFMT); fimc_hw_set_rotation()
109 u32 cfg; fimc_hw_set_target_format() local
116 cfg = readl(dev->regs + FIMC_REG_CITRGFMT); fimc_hw_set_target_format()
117 cfg &= ~(FIMC_REG_CITRGFMT_FMT_MASK | FIMC_REG_CITRGFMT_HSIZE_MASK | fimc_hw_set_target_format()
122 cfg |= FIMC_REG_CITRGFMT_RGB; fimc_hw_set_target_format()
125 cfg |= FIMC_REG_CITRGFMT_YCBCR420; fimc_hw_set_target_format()
129 cfg |= FIMC_REG_CITRGFMT_YCBCR422_1P; fimc_hw_set_target_format()
131 cfg |= FIMC_REG_CITRGFMT_YCBCR422; fimc_hw_set_target_format()
138 cfg |= (frame->height << 16) | frame->width; fimc_hw_set_target_format()
140 cfg |= (frame->width << 16) | frame->height; fimc_hw_set_target_format()
142 writel(cfg, dev->regs + FIMC_REG_CITRGFMT); fimc_hw_set_target_format()
144 cfg = readl(dev->regs + FIMC_REG_CITAREA); fimc_hw_set_target_format()
145 cfg &= ~FIMC_REG_CITAREA_MASK; fimc_hw_set_target_format()
146 cfg |= (frame->width * frame->height); fimc_hw_set_target_format()
147 writel(cfg, dev->regs + FIMC_REG_CITAREA); fimc_hw_set_target_format()
154 u32 cfg; fimc_hw_set_out_dma_size() local
156 cfg = (frame->f_height << 16) | frame->f_width; fimc_hw_set_out_dma_size()
157 writel(cfg, dev->regs + FIMC_REG_ORGOSIZE); fimc_hw_set_out_dma_size()
160 cfg = readl(dev->regs + FIMC_REG_CIGCTRL); fimc_hw_set_out_dma_size()
162 cfg |= FIMC_REG_CIGCTRL_CSC_ITU601_709; fimc_hw_set_out_dma_size()
164 cfg &= ~FIMC_REG_CIGCTRL_CSC_ITU601_709; fimc_hw_set_out_dma_size()
165 writel(cfg, dev->regs + FIMC_REG_CIGCTRL); fimc_hw_set_out_dma_size()
175 u32 cfg; fimc_hw_set_out_dma() local
178 cfg = (offset->y_v << 16) | offset->y_h; fimc_hw_set_out_dma()
179 writel(cfg, dev->regs + FIMC_REG_CIOYOFF); fimc_hw_set_out_dma()
181 cfg = (offset->cb_v << 16) | offset->cb_h; fimc_hw_set_out_dma()
182 writel(cfg, dev->regs + FIMC_REG_CIOCBOFF); fimc_hw_set_out_dma()
184 cfg = (offset->cr_v << 16) | offset->cr_h; fimc_hw_set_out_dma()
185 writel(cfg, dev->regs + FIMC_REG_CIOCROFF); fimc_hw_set_out_dma()
190 cfg = readl(dev->regs + FIMC_REG_CIOCTRL); fimc_hw_set_out_dma()
192 cfg &= ~(FIMC_REG_CIOCTRL_ORDER2P_MASK | fimc_hw_set_out_dma()
198 cfg |= ctx->out_order_1p; fimc_hw_set_out_dma()
200 cfg |= ctx->out_order_2p | FIMC_REG_CIOCTRL_YCBCR_2PLANE; fimc_hw_set_out_dma()
202 cfg |= FIMC_REG_CIOCTRL_YCBCR_3PLANE; fimc_hw_set_out_dma()
205 cfg |= FIMC_REG_CIOCTRL_RGB565; fimc_hw_set_out_dma()
207 cfg |= FIMC_REG_CIOCTRL_ARGB1555; fimc_hw_set_out_dma()
209 cfg |= FIMC_REG_CIOCTRL_ARGB4444; fimc_hw_set_out_dma()
211 writel(cfg, dev->regs + FIMC_REG_CIOCTRL); fimc_hw_set_out_dma()
216 u32 cfg = readl(dev->regs + FIMC_REG_ORGISIZE); fimc_hw_en_autoload() local
218 cfg |= FIMC_REG_CIREAL_ISIZE_AUTOLOAD_EN; fimc_hw_en_autoload()
220 cfg &= ~FIMC_REG_CIREAL_ISIZE_AUTOLOAD_EN; fimc_hw_en_autoload()
221 writel(cfg, dev->regs + FIMC_REG_ORGISIZE); fimc_hw_en_autoload()
226 u32 cfg = readl(dev->regs + FIMC_REG_CIOCTRL); fimc_hw_en_lastirq() local
228 cfg |= FIMC_REG_CIOCTRL_LASTIRQ_ENABLE; fimc_hw_en_lastirq()
230 cfg &= ~FIMC_REG_CIOCTRL_LASTIRQ_ENABLE; fimc_hw_en_lastirq()
231 writel(cfg, dev->regs + FIMC_REG_CIOCTRL); fimc_hw_en_lastirq()
238 u32 cfg, shfactor; fimc_hw_set_prescaler() local
241 cfg = shfactor << 28; fimc_hw_set_prescaler()
243 cfg |= (sc->pre_hratio << 16) | sc->pre_vratio; fimc_hw_set_prescaler()
244 writel(cfg, dev->regs + FIMC_REG_CISCPRERATIO); fimc_hw_set_prescaler()
246 cfg = (sc->pre_dst_width << 16) | sc->pre_dst_height; fimc_hw_set_prescaler()
247 writel(cfg, dev->regs + FIMC_REG_CISCPREDST); fimc_hw_set_prescaler()
257 u32 cfg = readl(dev->regs + FIMC_REG_CISCCTRL); fimc_hw_set_scaler() local
259 cfg &= ~(FIMC_REG_CISCCTRL_CSCR2Y_WIDE | FIMC_REG_CISCCTRL_CSCY2R_WIDE | fimc_hw_set_scaler()
266 cfg |= (FIMC_REG_CISCCTRL_CSCR2Y_WIDE | fimc_hw_set_scaler()
270 cfg |= FIMC_REG_CISCCTRL_SCALERBYPASS; fimc_hw_set_scaler()
273 cfg |= FIMC_REG_CISCCTRL_SCALEUP_H; fimc_hw_set_scaler()
276 cfg |= FIMC_REG_CISCCTRL_SCALEUP_V; fimc_hw_set_scaler()
279 cfg |= FIMC_REG_CISCCTRL_ONE2ONE; fimc_hw_set_scaler()
284 cfg |= FIMC_REG_CISCCTRL_INRGB_FMT_RGB565; fimc_hw_set_scaler()
287 cfg |= FIMC_REG_CISCCTRL_INRGB_FMT_RGB666; fimc_hw_set_scaler()
290 cfg |= FIMC_REG_CISCCTRL_INRGB_FMT_RGB888; fimc_hw_set_scaler()
299 cfg |= FIMC_REG_CISCCTRL_OUTRGB_FMT_RGB565; fimc_hw_set_scaler()
301 cfg |= FIMC_REG_CISCCTRL_OUTRGB_FMT_RGB666; fimc_hw_set_scaler()
303 cfg |= FIMC_REG_CISCCTRL_OUTRGB_FMT_RGB888; fimc_hw_set_scaler()
305 cfg |= FIMC_REG_CISCCTRL_OUTRGB_FMT_RGB888; fimc_hw_set_scaler()
308 cfg |= FIMC_REG_CISCCTRL_INTERLACE; fimc_hw_set_scaler()
311 writel(cfg, dev->regs + FIMC_REG_CISCCTRL); fimc_hw_set_scaler()
319 u32 cfg; fimc_hw_set_mainscaler() local
326 cfg = readl(dev->regs + FIMC_REG_CISCCTRL); fimc_hw_set_mainscaler()
327 cfg &= ~(FIMC_REG_CISCCTRL_MHRATIO_MASK | fimc_hw_set_mainscaler()
331 cfg |= FIMC_REG_CISCCTRL_MHRATIO_EXT(sc->main_hratio); fimc_hw_set_mainscaler()
332 cfg |= FIMC_REG_CISCCTRL_MVRATIO_EXT(sc->main_vratio); fimc_hw_set_mainscaler()
333 writel(cfg, dev->regs + FIMC_REG_CISCCTRL); fimc_hw_set_mainscaler()
335 cfg = readl(dev->regs + FIMC_REG_CIEXTEN); fimc_hw_set_mainscaler()
337 cfg &= ~(FIMC_REG_CIEXTEN_MVRATIO_EXT_MASK | fimc_hw_set_mainscaler()
339 cfg |= FIMC_REG_CIEXTEN_MHRATIO_EXT(sc->main_hratio); fimc_hw_set_mainscaler()
340 cfg |= FIMC_REG_CIEXTEN_MVRATIO_EXT(sc->main_vratio); fimc_hw_set_mainscaler()
341 writel(cfg, dev->regs + FIMC_REG_CIEXTEN); fimc_hw_set_mainscaler()
343 cfg |= FIMC_REG_CISCCTRL_MHRATIO(sc->main_hratio); fimc_hw_set_mainscaler()
344 cfg |= FIMC_REG_CISCCTRL_MVRATIO(sc->main_vratio); fimc_hw_set_mainscaler()
345 writel(cfg, dev->regs + FIMC_REG_CISCCTRL); fimc_hw_set_mainscaler()
352 u32 cfg; fimc_hw_enable_capture() local
354 cfg = readl(dev->regs + FIMC_REG_CIIMGCPT); fimc_hw_enable_capture()
355 cfg |= FIMC_REG_CIIMGCPT_CPT_FREN_ENABLE; fimc_hw_enable_capture()
358 cfg |= FIMC_REG_CIIMGCPT_IMGCPTEN_SC; fimc_hw_enable_capture()
360 cfg &= FIMC_REG_CIIMGCPT_IMGCPTEN_SC; fimc_hw_enable_capture()
362 cfg |= FIMC_REG_CIIMGCPT_IMGCPTEN; fimc_hw_enable_capture()
363 writel(cfg, dev->regs + FIMC_REG_CIIMGCPT); fimc_hw_enable_capture()
368 u32 cfg = readl(dev->regs + FIMC_REG_CIIMGCPT); fimc_hw_disable_capture() local
369 cfg &= ~(FIMC_REG_CIIMGCPT_IMGCPTEN | fimc_hw_disable_capture()
371 writel(cfg, dev->regs + FIMC_REG_CIIMGCPT); fimc_hw_disable_capture()
378 u32 cfg = 0; fimc_hw_set_effect() local
381 cfg |= FIMC_REG_CIIMGEFF_IE_SC_AFTER | fimc_hw_set_effect()
383 cfg |= effect->type; fimc_hw_set_effect()
385 cfg |= (effect->pat_cb << 13) | effect->pat_cr; fimc_hw_set_effect()
388 writel(cfg, dev->regs + FIMC_REG_CIIMGEFF); fimc_hw_set_effect()
395 u32 cfg; fimc_hw_set_rgb_alpha() local
400 cfg = readl(dev->regs + FIMC_REG_CIOCTRL); fimc_hw_set_rgb_alpha()
401 cfg &= ~FIMC_REG_CIOCTRL_ALPHA_OUT_MASK; fimc_hw_set_rgb_alpha()
402 cfg |= (frame->alpha << 4); fimc_hw_set_rgb_alpha()
403 writel(cfg, dev->regs + FIMC_REG_CIOCTRL); fimc_hw_set_rgb_alpha()
428 u32 cfg; fimc_hw_set_in_dma() local
431 cfg = (offset->y_v << 16) | offset->y_h; fimc_hw_set_in_dma()
432 writel(cfg, dev->regs + FIMC_REG_CIIYOFF); fimc_hw_set_in_dma()
434 cfg = (offset->cb_v << 16) | offset->cb_h; fimc_hw_set_in_dma()
435 writel(cfg, dev->regs + FIMC_REG_CIICBOFF); fimc_hw_set_in_dma()
437 cfg = (offset->cr_v << 16) | offset->cr_h; fimc_hw_set_in_dma()
438 writel(cfg, dev->regs + FIMC_REG_CIICROFF); fimc_hw_set_in_dma()
447 cfg = readl(dev->regs + FIMC_REG_MSCTRL); fimc_hw_set_in_dma()
448 cfg &= ~(FIMC_REG_MSCTRL_INFORMAT_MASK fimc_hw_set_in_dma()
455 cfg |= (FIMC_REG_MSCTRL_IN_BURST_COUNT(4) fimc_hw_set_in_dma()
461 cfg |= FIMC_REG_MSCTRL_INFORMAT_RGB; fimc_hw_set_in_dma()
464 cfg |= FIMC_REG_MSCTRL_INFORMAT_YCBCR420; fimc_hw_set_in_dma()
467 cfg |= ctx->in_order_2p | FIMC_REG_MSCTRL_C_INT_IN_2PLANE; fimc_hw_set_in_dma()
469 cfg |= FIMC_REG_MSCTRL_C_INT_IN_3PLANE; fimc_hw_set_in_dma()
474 cfg |= ctx->in_order_1p fimc_hw_set_in_dma()
477 cfg |= FIMC_REG_MSCTRL_INFORMAT_YCBCR422; fimc_hw_set_in_dma()
480 cfg |= ctx->in_order_2p fimc_hw_set_in_dma()
483 cfg |= FIMC_REG_MSCTRL_C_INT_IN_3PLANE; fimc_hw_set_in_dma()
490 writel(cfg, dev->regs + FIMC_REG_MSCTRL); fimc_hw_set_in_dma()
493 cfg = readl(dev->regs + FIMC_REG_CIDMAPARAM); fimc_hw_set_in_dma()
494 cfg &= ~FIMC_REG_CIDMAPARAM_TILE_MASK; fimc_hw_set_in_dma()
497 cfg |= FIMC_REG_CIDMAPARAM_R_64X32; fimc_hw_set_in_dma()
500 cfg |= FIMC_REG_CIDMAPARAM_W_64X32; fimc_hw_set_in_dma()
502 writel(cfg, dev->regs + FIMC_REG_CIDMAPARAM); fimc_hw_set_in_dma()
510 u32 cfg = readl(dev->regs + FIMC_REG_MSCTRL); fimc_hw_set_input_path() local
511 cfg &= ~FIMC_REG_MSCTRL_INPUT_MASK; fimc_hw_set_input_path()
514 cfg |= FIMC_REG_MSCTRL_INPUT_MEMORY; fimc_hw_set_input_path()
516 cfg |= FIMC_REG_MSCTRL_INPUT_EXTCAM; fimc_hw_set_input_path()
518 writel(cfg, dev->regs + FIMC_REG_MSCTRL); fimc_hw_set_input_path()
525 u32 cfg = readl(dev->regs + FIMC_REG_CISCCTRL); fimc_hw_set_output_path() local
526 cfg &= ~FIMC_REG_CISCCTRL_LCDPATHEN_FIFO; fimc_hw_set_output_path()
528 cfg |= FIMC_REG_CISCCTRL_LCDPATHEN_FIFO; fimc_hw_set_output_path()
529 writel(cfg, dev->regs + FIMC_REG_CISCCTRL); fimc_hw_set_output_path()
534 u32 cfg = readl(dev->regs + FIMC_REG_CIREAL_ISIZE); fimc_hw_set_input_addr() local
535 cfg |= FIMC_REG_CIREAL_ISIZE_ADDR_CH_DIS; fimc_hw_set_input_addr()
536 writel(cfg, dev->regs + FIMC_REG_CIREAL_ISIZE); fimc_hw_set_input_addr()
542 cfg &= ~FIMC_REG_CIREAL_ISIZE_ADDR_CH_DIS; fimc_hw_set_input_addr()
543 writel(cfg, dev->regs + FIMC_REG_CIREAL_ISIZE); fimc_hw_set_input_addr()
562 u32 cfg = readl(fimc->regs + FIMC_REG_CIGCTRL); fimc_hw_set_camera_polarity() local
564 cfg &= ~(FIMC_REG_CIGCTRL_INVPOLPCLK | FIMC_REG_CIGCTRL_INVPOLVSYNC | fimc_hw_set_camera_polarity()
569 cfg |= FIMC_REG_CIGCTRL_INVPOLPCLK; fimc_hw_set_camera_polarity()
572 cfg |= FIMC_REG_CIGCTRL_INVPOLVSYNC; fimc_hw_set_camera_polarity()
575 cfg |= FIMC_REG_CIGCTRL_INVPOLHREF; fimc_hw_set_camera_polarity()
578 cfg |= FIMC_REG_CIGCTRL_INVPOLHSYNC; fimc_hw_set_camera_polarity()
581 cfg |= FIMC_REG_CIGCTRL_INVPOLFIELD; fimc_hw_set_camera_polarity()
583 writel(cfg, fimc->regs + FIMC_REG_CIGCTRL); fimc_hw_set_camera_polarity()
606 u32 bus_width, cfg = 0; fimc_hw_set_camera_source() local
614 cfg = pix_desc[i].cisrcfmt; fimc_hw_set_camera_source()
629 cfg |= FIMC_REG_CISRCFMT_ITU601_8BIT; fimc_hw_set_camera_source()
631 cfg |= FIMC_REG_CISRCFMT_ITU601_16BIT; fimc_hw_set_camera_source()
636 cfg |= FIMC_REG_CISRCFMT_ITU601_8BIT; fimc_hw_set_camera_source()
644 cfg |= (f->o_width << 16) | f->o_height; fimc_hw_set_camera_source()
645 writel(cfg, fimc->regs + FIMC_REG_CISRCFMT); fimc_hw_set_camera_source()
653 u32 cfg = readl(fimc->regs + FIMC_REG_CIWDOFST); fimc_hw_set_camera_offset() local
655 cfg &= ~(FIMC_REG_CIWDOFST_HOROFF_MASK | FIMC_REG_CIWDOFST_VEROFF_MASK); fimc_hw_set_camera_offset()
656 cfg |= FIMC_REG_CIWDOFST_OFF_EN | fimc_hw_set_camera_offset()
659 writel(cfg, fimc->regs + FIMC_REG_CIWDOFST); fimc_hw_set_camera_offset()
664 cfg = (hoff2 << 16) | voff2; fimc_hw_set_camera_offset()
665 writel(cfg, fimc->regs + FIMC_REG_CIWDOFST2); fimc_hw_set_camera_offset()
673 u32 cfg, tmp; fimc_hw_set_camera_type() local
675 cfg = readl(fimc->regs + FIMC_REG_CIGCTRL); fimc_hw_set_camera_type()
678 cfg &= ~(FIMC_REG_CIGCTRL_TESTPAT_MASK | FIMC_REG_CIGCTRL_SELCAM_ITU_A | fimc_hw_set_camera_type()
685 cfg |= FIMC_REG_CIGCTRL_SELCAM_MIPI; fimc_hw_set_camera_type()
688 cfg |= FIMC_REG_CIGCTRL_SELCAM_MIPI_A; fimc_hw_set_camera_type()
698 cfg |= FIMC_REG_CIGCTRL_CAM_JPEG; fimc_hw_set_camera_type()
712 cfg |= FIMC_REG_CIGCTRL_SELCAM_ITU_A; fimc_hw_set_camera_type()
715 cfg |= FIMC_REG_CIGCTRL_CAMIF_SELWB; fimc_hw_set_camera_type()
719 cfg |= FIMC_REG_CIGCTRL_CAMIF_SELWB; fimc_hw_set_camera_type()
729 writel(cfg, fimc->regs + FIMC_REG_CIGCTRL); fimc_hw_set_camera_type()
736 u32 cfg = readl(dev->regs + FIMC_REG_CIGCTRL); fimc_hw_clear_irq() local
737 cfg |= FIMC_REG_CIGCTRL_IRQ_CLR; fimc_hw_clear_irq()
738 writel(cfg, dev->regs + FIMC_REG_CIGCTRL); fimc_hw_clear_irq()
743 u32 cfg = readl(dev->regs + FIMC_REG_CISCCTRL); fimc_hw_enable_scaler() local
745 cfg |= FIMC_REG_CISCCTRL_SCALERSTART; fimc_hw_enable_scaler()
747 cfg &= ~FIMC_REG_CISCCTRL_SCALERSTART; fimc_hw_enable_scaler()
748 writel(cfg, dev->regs + FIMC_REG_CISCCTRL); fimc_hw_enable_scaler()
753 u32 cfg = readl(dev->regs + FIMC_REG_MSCTRL); fimc_hw_activate_input_dma() local
755 cfg |= FIMC_REG_MSCTRL_ENVID; fimc_hw_activate_input_dma()
757 cfg &= ~FIMC_REG_MSCTRL_ENVID; fimc_hw_activate_input_dma()
758 writel(cfg, dev->regs + FIMC_REG_MSCTRL); fimc_hw_activate_input_dma()
H A Dfimc-is-param.c62 struct chain_config *cfg = &is->config[is->config_index]; __fimc_is_hw_update_param() local
66 __hw_param_copy(&par->isp.control, &cfg->isp.control); __fimc_is_hw_update_param()
70 __hw_param_copy(&par->isp.otf_input, &cfg->isp.otf_input); __fimc_is_hw_update_param()
74 __hw_param_copy(&par->isp.dma1_input, &cfg->isp.dma1_input); __fimc_is_hw_update_param()
78 __hw_param_copy(&par->isp.dma2_input, &cfg->isp.dma2_input); __fimc_is_hw_update_param()
82 __hw_param_copy(&par->isp.aa, &cfg->isp.aa); __fimc_is_hw_update_param()
86 __hw_param_copy(&par->isp.flash, &cfg->isp.flash); __fimc_is_hw_update_param()
90 __hw_param_copy(&par->isp.awb, &cfg->isp.awb); __fimc_is_hw_update_param()
94 __hw_param_copy(&par->isp.effect, &cfg->isp.effect); __fimc_is_hw_update_param()
98 __hw_param_copy(&par->isp.iso, &cfg->isp.iso); __fimc_is_hw_update_param()
102 __hw_param_copy(&par->isp.adjust, &cfg->isp.adjust); __fimc_is_hw_update_param()
106 __hw_param_copy(&par->isp.metering, &cfg->isp.metering); __fimc_is_hw_update_param()
110 __hw_param_copy(&par->isp.afc, &cfg->isp.afc); __fimc_is_hw_update_param()
114 __hw_param_copy(&par->isp.otf_output, &cfg->isp.otf_output); __fimc_is_hw_update_param()
118 __hw_param_copy(&par->isp.dma1_output, &cfg->isp.dma1_output); __fimc_is_hw_update_param()
122 __hw_param_copy(&par->isp.dma2_output, &cfg->isp.dma2_output); __fimc_is_hw_update_param()
126 __hw_param_copy(&par->drc.control, &cfg->drc.control); __fimc_is_hw_update_param()
130 __hw_param_copy(&par->drc.otf_input, &cfg->drc.otf_input); __fimc_is_hw_update_param()
134 __hw_param_copy(&par->drc.dma_input, &cfg->drc.dma_input); __fimc_is_hw_update_param()
138 __hw_param_copy(&par->drc.otf_output, &cfg->drc.otf_output); __fimc_is_hw_update_param()
142 __hw_param_copy(&par->fd.control, &cfg->fd.control); __fimc_is_hw_update_param()
146 __hw_param_copy(&par->fd.otf_input, &cfg->fd.otf_input); __fimc_is_hw_update_param()
150 __hw_param_copy(&par->fd.dma_input, &cfg->fd.dma_input); __fimc_is_hw_update_param()
154 __hw_param_copy(&par->fd.config, &cfg->fd.config); __fimc_is_hw_update_param()
/linux-4.1.27/drivers/media/platform/s3c-camif/
H A Dcamif-regs.c21 u32 cfg; camif_hw_reset() local
23 cfg = camif_read(camif, S3C_CAMIF_REG_CISRCFMT); camif_hw_reset()
24 cfg |= CISRCFMT_ITU601_8BIT; camif_hw_reset()
25 camif_write(camif, S3C_CAMIF_REG_CISRCFMT, cfg); camif_hw_reset()
28 cfg = camif_read(camif, S3C_CAMIF_REG_CIGCTRL); camif_hw_reset()
29 cfg |= CIGCTRL_SWRST; camif_hw_reset()
31 cfg |= CIGCTRL_IRQ_LEVEL; camif_hw_reset()
32 camif_write(camif, S3C_CAMIF_REG_CIGCTRL, cfg); camif_hw_reset()
35 cfg = camif_read(camif, S3C_CAMIF_REG_CIGCTRL); camif_hw_reset()
36 cfg &= ~CIGCTRL_SWRST; camif_hw_reset()
37 camif_write(camif, S3C_CAMIF_REG_CIGCTRL, cfg); camif_hw_reset()
43 u32 cfg = camif_read(vp->camif, S3C_CAMIF_REG_CIGCTRL); camif_hw_clear_pending_irq() local
44 cfg |= CIGCTRL_IRQ_CLR(vp->id); camif_hw_clear_pending_irq()
45 camif_write(vp->camif, S3C_CAMIF_REG_CIGCTRL, cfg); camif_hw_clear_pending_irq()
54 u32 cfg = camif_read(camif, S3C_CAMIF_REG_CIGCTRL); camif_hw_set_test_pattern() local
55 cfg &= ~CIGCTRL_TESTPATTERN_MASK; camif_hw_set_test_pattern()
56 cfg |= (pattern << 27); camif_hw_set_test_pattern()
57 camif_write(camif, S3C_CAMIF_REG_CIGCTRL, cfg); camif_hw_set_test_pattern()
73 unsigned int i, cfg; camif_hw_set_effect() local
82 cfg = camif_read(camif, S3C_CAMIF_REG_CIIMGEFF(camif->vp->offset)); camif_hw_set_effect()
84 cfg &= ~CIIMGEFF_FIN_MASK; camif_hw_set_effect()
85 cfg |= colorfx[i].value; camif_hw_set_effect()
89 cfg &= ~CIIMGEFF_IE_ENABLE_MASK; camif_hw_set_effect()
91 cfg |= CIIMGEFF_IE_ENABLE_MASK; camif_hw_set_effect()
93 cfg &= ~CIIMGEFF_PAT_CBCR_MASK; camif_hw_set_effect()
94 cfg |= cr | (cb << 13); camif_hw_set_effect()
95 camif_write(camif, S3C_CAMIF_REG_CIIMGEFF(camif->vp->offset), cfg); camif_hw_set_effect()
110 u32 cfg; camif_hw_set_source_format() local
123 cfg = camif_read(camif, S3C_CAMIF_REG_CISRCFMT); camif_hw_set_source_format()
124 cfg &= ~(CISRCFMT_ORDER422_MASK | CISRCFMT_SIZE_CAM_MASK); camif_hw_set_source_format()
125 cfg |= (mf->width << 16) | mf->height; camif_hw_set_source_format()
126 cfg |= src_pixfmt_map[i][1]; camif_hw_set_source_format()
127 camif_write(camif, S3C_CAMIF_REG_CISRCFMT, cfg); camif_hw_set_source_format()
136 u32 cfg; camif_hw_set_camera_crop() local
139 cfg = camif_read(camif, S3C_CAMIF_REG_CIWDOFST); camif_hw_set_camera_crop()
140 cfg &= ~(CIWDOFST_OFST_MASK | CIWDOFST_WINOFSEN); camif_hw_set_camera_crop()
141 cfg |= (crop->left << 16) | crop->top; camif_hw_set_camera_crop()
143 cfg |= CIWDOFST_WINOFSEN; camif_hw_set_camera_crop()
144 camif_write(camif, S3C_CAMIF_REG_CIWDOFST, cfg); camif_hw_set_camera_crop()
149 cfg = (hoff2 << 16) | voff2; camif_hw_set_camera_crop()
150 camif_write(camif, S3C_CAMIF_REG_CIWDOFST2, cfg); camif_hw_set_camera_crop()
157 u32 cfg; camif_hw_clear_fifo_overflow() local
159 cfg = camif_read(camif, S3C_CAMIF_REG_CIWDOFST); camif_hw_clear_fifo_overflow()
161 cfg |= (CIWDOFST_CLROVCOFIY | CIWDOFST_CLROVCOFICB | camif_hw_clear_fifo_overflow()
164 cfg |= (/* CIWDOFST_CLROVPRFIY | */ CIWDOFST_CLROVPRFICB | camif_hw_clear_fifo_overflow()
166 camif_write(camif, S3C_CAMIF_REG_CIWDOFST, cfg); camif_hw_clear_fifo_overflow()
174 u32 cfg = camif_read(camif, S3C_CAMIF_REG_CIGCTRL); camif_hw_set_camera_bus() local
176 cfg &= ~(CIGCTRL_INVPOLPCLK | CIGCTRL_INVPOLVSYNC | camif_hw_set_camera_bus()
180 cfg |= CIGCTRL_INVPOLPCLK; camif_hw_set_camera_bus()
183 cfg |= CIGCTRL_INVPOLVSYNC; camif_hw_set_camera_bus()
190 cfg |= CIGCTRL_INVPOLHREF; /* HREF active low */ camif_hw_set_camera_bus()
194 cfg |= CIGCTRL_INVPOLFIELD; camif_hw_set_camera_bus()
195 cfg |= CIGCTRL_FIELDMODE; camif_hw_set_camera_bus()
198 pr_debug("Setting CIGCTRL to: %#x\n", cfg); camif_hw_set_camera_bus()
200 camif_write(camif, S3C_CAMIF_REG_CIGCTRL, cfg); camif_hw_set_camera_bus()
224 u32 cfg; camif_hw_set_out_dma_size() local
226 cfg = camif_read(vp->camif, S3C_CAMIF_REG_CITRGFMT(vp->id, vp->offset)); camif_hw_set_out_dma_size()
227 cfg &= ~CITRGFMT_TARGETSIZE_MASK; camif_hw_set_out_dma_size()
228 cfg |= (frame->f_width << 16) | frame->f_height; camif_hw_set_out_dma_size()
229 camif_write(vp->camif, S3C_CAMIF_REG_CITRGFMT(vp->id, vp->offset), cfg); camif_hw_set_out_dma_size()
264 u32 cfg; camif_hw_set_output_dma() local
271 cfg = S3C_CISS_OFFS_INITIAL(offset->initial); camif_hw_set_output_dma()
272 cfg |= S3C_CISS_OFFS_LINE(offset->line); camif_hw_set_output_dma()
273 camif_write(camif, S3C_CAMIF_REG_CISSY(vp->id), cfg); camif_hw_set_output_dma()
274 camif_write(camif, S3C_CAMIF_REG_CISSCB(vp->id), cfg); camif_hw_set_output_dma()
275 camif_write(camif, S3C_CAMIF_REG_CISSCR(vp->id), cfg); camif_hw_set_output_dma()
281 cfg = camif_read(camif, S3C_CAMIF_REG_CICTRL(vp->id, vp->offset)); camif_hw_set_output_dma()
282 cfg &= ~CICTRL_BURST_MASK; camif_hw_set_output_dma()
284 cfg |= CICTRL_YBURST1(ymburst) | CICTRL_YBURST2(yrburst); camif_hw_set_output_dma()
285 cfg |= CICTRL_CBURST1(ymburst / 2) | CICTRL_CBURST2(yrburst / 2); camif_hw_set_output_dma()
287 camif_write(camif, S3C_CAMIF_REG_CICTRL(vp->id, vp->offset), cfg); camif_hw_set_output_dma()
294 u32 cfg = camif_read(vp->camif, S3C_CAMIF_REG_MSCTRL(vp->id)); camif_hw_set_input_path() local
295 cfg &= ~MSCTRL_SEL_DMA_CAM; camif_hw_set_input_path()
296 camif_write(vp->camif, S3C_CAMIF_REG_MSCTRL(vp->id), cfg); camif_hw_set_input_path()
303 u32 cfg; camif_hw_set_target_format() local
308 cfg = camif_read(camif, S3C_CAMIF_REG_CITRGFMT(vp->id, vp->offset)); camif_hw_set_target_format()
309 cfg &= ~CITRGFMT_TARGETSIZE_MASK; camif_hw_set_target_format()
313 cfg |= CITRGFMT_IN422; camif_hw_set_target_format()
314 cfg &= ~CITRGFMT_OUT422; camif_hw_set_target_format()
316 cfg |= CITRGFMT_OUT422; camif_hw_set_target_format()
318 cfg &= ~CITRGFMT_OUTFORMAT_MASK; camif_hw_set_target_format()
321 cfg |= CITRGFMT_OUTFORMAT_RGB; camif_hw_set_target_format()
324 cfg |= CITRGFMT_OUTFORMAT_YCBCR420; camif_hw_set_target_format()
327 cfg |= CITRGFMT_OUTFORMAT_YCBCR422; camif_hw_set_target_format()
330 cfg |= CITRGFMT_OUTFORMAT_YCBCR422I; camif_hw_set_target_format()
337 cfg |= (frame->f_height << 16) | frame->f_width; camif_hw_set_target_format()
339 cfg |= (frame->f_width << 16) | frame->f_height; camif_hw_set_target_format()
340 camif_write(camif, S3C_CAMIF_REG_CITRGFMT(vp->id, vp->offset), cfg); camif_hw_set_target_format()
343 cfg = camif_read(camif, S3C_CAMIF_REG_CITAREA(vp->id, vp->offset)); camif_hw_set_target_format()
344 cfg &= ~CITAREA_MASK; camif_hw_set_target_format()
345 cfg |= (frame->f_width * frame->f_height); camif_hw_set_target_format()
346 camif_write(camif, S3C_CAMIF_REG_CITAREA(vp->id, vp->offset), cfg); camif_hw_set_target_format()
351 u32 cfg = camif_read(vp->camif, camif_hw_set_flip() local
354 cfg &= ~CITRGFMT_FLIP_MASK; camif_hw_set_flip()
357 cfg |= CITRGFMT_FLIP_Y_MIRROR; camif_hw_set_flip()
359 cfg |= CITRGFMT_FLIP_X_MIRROR; camif_hw_set_flip()
361 camif_write(vp->camif, S3C_CAMIF_REG_CITRGFMT(vp->id, vp->offset), cfg); camif_hw_set_flip()
368 u32 cfg, shfactor, addr; camif_hw_set_prescaler() local
373 cfg = shfactor << 28; camif_hw_set_prescaler()
375 cfg |= (sc->pre_h_ratio << 16) | sc->pre_v_ratio; camif_hw_set_prescaler()
376 camif_write(camif, addr, cfg); camif_hw_set_prescaler()
378 cfg = (sc->pre_dst_width << 16) | sc->pre_dst_height; camif_hw_set_prescaler()
379 camif_write(camif, S3C_CAMIF_REG_CISCPREDST(vp->id, vp->offset), cfg); camif_hw_set_prescaler()
387 u32 cfg; camif_s3c244x_hw_set_scaler() local
391 cfg = camif_read(camif, S3C_CAMIF_REG_CISCCTRL(vp->id, vp->offset)); camif_s3c244x_hw_set_scaler()
393 cfg &= ~(CISCCTRL_SCALEUP_MASK | CISCCTRL_SCALERBYPASS | camif_s3c244x_hw_set_scaler()
399 cfg |= CISCCTRL_SCALEUP_H; camif_s3c244x_hw_set_scaler()
401 cfg |= CIPRSCCTRL_SCALEUP_H; camif_s3c244x_hw_set_scaler()
405 cfg |= CISCCTRL_SCALEUP_V; camif_s3c244x_hw_set_scaler()
407 cfg |= CIPRSCCTRL_SCALEUP_V; camif_s3c244x_hw_set_scaler()
411 cfg |= CISCCTRL_SCALERBYPASS; camif_s3c244x_hw_set_scaler()
414 cfg |= ((scaler->main_h_ratio & 0x1ff) << 16); camif_s3c244x_hw_set_scaler()
415 cfg |= scaler->main_v_ratio & 0x1ff; camif_s3c244x_hw_set_scaler()
419 cfg |= CIPRSCCTRL_RGB_FORMAT_24BIT; camif_s3c244x_hw_set_scaler()
420 cfg |= CIPRSCCTRL_SAMPLE; camif_s3c244x_hw_set_scaler()
423 camif_write(camif, S3C_CAMIF_REG_CISCCTRL(vp->id, vp->offset), cfg); camif_s3c244x_hw_set_scaler()
434 u32 cfg; camif_s3c64xx_hw_set_scaler() local
438 cfg = camif_read(camif, S3C_CAMIF_REG_CISCCTRL(vp->id, vp->offset)); camif_s3c64xx_hw_set_scaler()
440 cfg &= ~(CISCCTRL_CSCR2Y_WIDE | CISCCTRL_CSCY2R_WIDE camif_s3c64xx_hw_set_scaler()
447 cfg |= (CISCCTRL_CSCR2Y_WIDE | CISCCTRL_CSCY2R_WIDE); camif_s3c64xx_hw_set_scaler()
450 cfg |= CISCCTRL_SCALERBYPASS; camif_s3c64xx_hw_set_scaler()
453 cfg |= CISCCTRL_SCALEUP_H; camif_s3c64xx_hw_set_scaler()
455 cfg |= CISCCTRL_SCALEUP_V; camif_s3c64xx_hw_set_scaler()
457 cfg |= CISCCTRL_ONE2ONE; camif_s3c64xx_hw_set_scaler()
462 cfg |= CISCCTRL_OUTRGB_FMT_RGB666; camif_s3c64xx_hw_set_scaler()
465 cfg |= CISCCTRL_OUTRGB_FMT_RGB888; camif_s3c64xx_hw_set_scaler()
469 cfg |= (scaler->main_h_ratio & 0x1ff) << 16; camif_s3c64xx_hw_set_scaler()
470 cfg |= scaler->main_v_ratio & 0x1ff; camif_s3c64xx_hw_set_scaler()
472 camif_write(camif, S3C_CAMIF_REG_CISCCTRL(vp->id, vp->offset), cfg); camif_s3c64xx_hw_set_scaler()
491 u32 cfg; camif_hw_enable_scaler() local
493 cfg = camif_read(vp->camif, addr); camif_hw_enable_scaler()
495 cfg |= CISCCTRL_SCALERSTART; camif_hw_enable_scaler()
497 cfg &= ~CISCCTRL_SCALERSTART; camif_hw_enable_scaler()
498 camif_write(vp->camif, addr, cfg); camif_hw_enable_scaler()
504 u32 cfg; camif_hw_set_lastirq() local
506 cfg = camif_read(vp->camif, addr); camif_hw_set_lastirq()
508 cfg |= CICTRL_LASTIRQ_ENABLE; camif_hw_set_lastirq()
510 cfg &= ~CICTRL_LASTIRQ_ENABLE; camif_hw_set_lastirq()
511 camif_write(vp->camif, addr, cfg); camif_hw_set_lastirq()
517 u32 cfg; camif_hw_enable_capture() local
519 cfg = camif_read(camif, S3C_CAMIF_REG_CIIMGCPT(vp->offset)); camif_hw_enable_capture()
523 cfg |= CIIMGCPT_CPT_FREN_ENABLE(vp->id); camif_hw_enable_capture()
526 cfg |= CIIMGCPT_IMGCPTEN_SC(vp->id); camif_hw_enable_capture()
529 cfg |= CIIMGCPT_IMGCPTEN; camif_hw_enable_capture()
531 camif_write(camif, S3C_CAMIF_REG_CIIMGCPT(vp->offset), cfg); camif_hw_enable_capture()
534 cfg, camif->stream_count); camif_hw_enable_capture()
540 u32 cfg; camif_hw_disable_capture() local
542 cfg = camif_read(camif, S3C_CAMIF_REG_CIIMGCPT(vp->offset)); camif_hw_disable_capture()
543 cfg &= ~CIIMGCPT_IMGCPTEN_SC(vp->id); camif_hw_disable_capture()
549 cfg &= ~CIIMGCPT_IMGCPTEN; camif_hw_disable_capture()
552 cfg, camif->stream_count); camif_hw_disable_capture()
554 camif_write(camif, S3C_CAMIF_REG_CIIMGCPT(vp->offset), cfg); camif_hw_disable_capture()
603 u32 cfg = readl(camif->io_base + registers[i].offset); camif_hw_dump_regs() local
604 dev_info(camif->dev, "%s:\t0x%08x\n", registers[i].name, cfg); camif_hw_dump_regs()
/linux-4.1.27/net/mac802154/
H A DMakefile3 iface.o llsec.o util.o cfg.o
/linux-4.1.27/arch/x86/pci/
H A Dmmconfig_64.c20 struct pci_mmcfg_region *cfg = pci_mmconfig_lookup(seg, bus); pci_dev_base() local
22 if (cfg && cfg->virt) pci_dev_base()
23 return cfg->virt + (PCI_MMCFG_BUS_OFFSET(bus) | (devfn << 12)); pci_dev_base()
98 static void __iomem *mcfg_ioremap(struct pci_mmcfg_region *cfg) mcfg_ioremap() argument
104 start = cfg->address + PCI_MMCFG_BUS_OFFSET(cfg->start_bus); mcfg_ioremap()
105 num_buses = cfg->end_bus - cfg->start_bus + 1; mcfg_ioremap()
109 addr -= PCI_MMCFG_BUS_OFFSET(cfg->start_bus); mcfg_ioremap()
115 struct pci_mmcfg_region *cfg; pci_mmcfg_arch_init() local
117 list_for_each_entry(cfg, &pci_mmcfg_list, list) pci_mmcfg_arch_init()
118 if (pci_mmcfg_arch_map(cfg)) { pci_mmcfg_arch_init()
130 struct pci_mmcfg_region *cfg; pci_mmcfg_arch_free() local
132 list_for_each_entry(cfg, &pci_mmcfg_list, list) pci_mmcfg_arch_free()
133 pci_mmcfg_arch_unmap(cfg); pci_mmcfg_arch_free()
136 int pci_mmcfg_arch_map(struct pci_mmcfg_region *cfg) pci_mmcfg_arch_map() argument
138 cfg->virt = mcfg_ioremap(cfg); pci_mmcfg_arch_map()
139 if (!cfg->virt) { pci_mmcfg_arch_map()
140 pr_err(PREFIX "can't map MMCONFIG at %pR\n", &cfg->res); pci_mmcfg_arch_map()
147 void pci_mmcfg_arch_unmap(struct pci_mmcfg_region *cfg) pci_mmcfg_arch_unmap() argument
149 if (cfg && cfg->virt) { pci_mmcfg_arch_unmap()
150 iounmap(cfg->virt + PCI_MMCFG_BUS_OFFSET(cfg->start_bus)); pci_mmcfg_arch_unmap()
151 cfg->virt = NULL; pci_mmcfg_arch_unmap()
H A Dmmconfig-shared.c34 static void __init pci_mmconfig_remove(struct pci_mmcfg_region *cfg) pci_mmconfig_remove() argument
36 if (cfg->res.parent) pci_mmconfig_remove()
37 release_resource(&cfg->res); pci_mmconfig_remove()
38 list_del(&cfg->list); pci_mmconfig_remove()
39 kfree(cfg); pci_mmconfig_remove()
44 struct pci_mmcfg_region *cfg, *tmp; free_all_mmcfg() local
47 list_for_each_entry_safe(cfg, tmp, &pci_mmcfg_list, list) free_all_mmcfg()
48 pci_mmconfig_remove(cfg); free_all_mmcfg()
53 struct pci_mmcfg_region *cfg; list_add_sorted() local
56 list_for_each_entry_rcu(cfg, &pci_mmcfg_list, list) { list_add_sorted()
57 if (cfg->segment > new->segment || list_add_sorted()
58 (cfg->segment == new->segment && list_add_sorted()
59 cfg->start_bus >= new->start_bus)) { list_add_sorted()
60 list_add_tail_rcu(&new->list, &cfg->list); list_add_sorted()
118 struct pci_mmcfg_region *cfg; pci_mmconfig_lookup() local
120 list_for_each_entry_rcu(cfg, &pci_mmcfg_list, list) pci_mmconfig_lookup()
121 if (cfg->segment == segment && pci_mmconfig_lookup()
122 cfg->start_bus <= bus && bus <= cfg->end_bus) pci_mmconfig_lookup()
123 return cfg; pci_mmconfig_lookup()
324 struct pci_mmcfg_region *cfg, *cfgx; pci_mmcfg_check_end_bus_number() local
327 list_for_each_entry(cfg, &pci_mmcfg_list, list) { pci_mmcfg_check_end_bus_number()
328 if (cfg->end_bus < cfg->start_bus) pci_mmcfg_check_end_bus_number()
329 cfg->end_bus = 255; pci_mmcfg_check_end_bus_number()
332 if (cfg->list.next == &pci_mmcfg_list) pci_mmcfg_check_end_bus_number()
335 cfgx = list_entry(cfg->list.next, typeof(*cfg), list); pci_mmcfg_check_end_bus_number()
336 if (cfg->end_bus >= cfgx->start_bus) pci_mmcfg_check_end_bus_number()
337 cfg->end_bus = cfgx->start_bus - 1; pci_mmcfg_check_end_bus_number()
446 struct pci_mmcfg_region *cfg, is_mmconf_reserved()
449 u64 addr = cfg->res.start; is_mmconf_reserved()
450 u64 size = resource_size(&cfg->res); is_mmconf_reserved()
466 &cfg->res, method); is_mmconf_reserved()
469 &cfg->res, method); is_mmconf_reserved()
473 cfg->end_bus = cfg->start_bus + ((size>>20) - 1); is_mmconf_reserved()
474 num_buses = cfg->end_bus - cfg->start_bus + 1; is_mmconf_reserved()
475 cfg->res.end = cfg->res.start + is_mmconf_reserved()
477 snprintf(cfg->name, PCI_MMCFG_RESOURCE_NAME_LEN, is_mmconf_reserved()
479 cfg->segment, cfg->start_bus, cfg->end_bus); is_mmconf_reserved()
485 &cfg->res, (unsigned long) cfg->address); is_mmconf_reserved()
490 cfg->segment, cfg->start_bus, cfg->end_bus, is_mmconf_reserved()
491 &cfg->res, (unsigned long) cfg->address); is_mmconf_reserved()
498 struct pci_mmcfg_region *cfg, int early) pci_mmcfg_check_reserved()
501 if (is_mmconf_reserved(is_acpi_reserved, cfg, dev, 0)) pci_mmcfg_check_reserved()
508 &cfg->res); pci_mmcfg_check_reserved()
513 &cfg->res); pci_mmcfg_check_reserved()
528 return is_mmconf_reserved(e820_all_mapped, cfg, dev, 1); pci_mmcfg_check_reserved()
535 struct pci_mmcfg_region *cfg; pci_mmcfg_reject_broken() local
537 list_for_each_entry(cfg, &pci_mmcfg_list, list) { pci_mmcfg_reject_broken()
538 if (pci_mmcfg_check_reserved(NULL, cfg, early) == 0) { pci_mmcfg_reject_broken()
547 struct acpi_mcfg_allocation *cfg) acpi_mcfg_check_entry()
551 if (cfg->address < 0xFFFFFFFF) acpi_mcfg_check_entry()
564 "is above 4GB, ignored\n", cfg->pci_segment, acpi_mcfg_check_entry()
565 cfg->start_bus_number, cfg->end_bus_number, cfg->address); acpi_mcfg_check_entry()
572 struct acpi_mcfg_allocation *cfg_table, *cfg; pci_parse_mcfg() local
596 cfg = &cfg_table[i]; pci_parse_mcfg()
597 if (acpi_mcfg_check_entry(mcfg, cfg)) { pci_parse_mcfg()
602 if (pci_mmconfig_add(cfg->pci_segment, cfg->start_bus_number, pci_parse_mcfg()
603 cfg->end_bus_number, cfg->address) == NULL) { pci_parse_mcfg()
620 struct pci_mmcfg_region *cfg; pci_mmcfg_for_each_region() local
626 list_for_each_entry(cfg, &pci_mmcfg_list, list) { pci_mmcfg_for_each_region()
627 rc = func(cfg->res.start, resource_size(&cfg->res), data); pci_mmcfg_for_each_region()
646 const struct pci_mmcfg_region *cfg; __pci_mmcfg_init() local
648 list_for_each_entry(cfg, &pci_mmcfg_list, list) { __pci_mmcfg_init()
649 if (cfg->segment) __pci_mmcfg_init()
651 pcibios_last_bus = cfg->end_bus; __pci_mmcfg_init()
696 struct pci_mmcfg_region *cfg; pci_mmcfg_late_insert_resources() local
709 list_for_each_entry(cfg, &pci_mmcfg_list, list) pci_mmcfg_late_insert_resources()
710 if (!cfg->res.parent) pci_mmcfg_late_insert_resources()
711 insert_resource(&iomem_resource, &cfg->res); pci_mmcfg_late_insert_resources()
729 struct pci_mmcfg_region *cfg; pci_mmconfig_insert() local
738 cfg = pci_mmconfig_lookup(seg, start); pci_mmconfig_insert()
739 if (cfg) { pci_mmconfig_insert()
740 if (cfg->end_bus < end) pci_mmconfig_insert()
745 cfg->segment, cfg->start_bus, cfg->end_bus); pci_mmconfig_insert()
756 cfg = pci_mmconfig_alloc(seg, start, end, addr); pci_mmconfig_insert()
757 if (cfg == NULL) { pci_mmconfig_insert()
760 } else if (!pci_mmcfg_check_reserved(dev, cfg, 0)) { pci_mmconfig_insert()
762 &cfg->res); pci_mmconfig_insert()
767 &cfg->res); pci_mmconfig_insert()
773 &cfg->res, tmp->name, tmp); pci_mmconfig_insert()
774 } else if (pci_mmcfg_arch_map(cfg)) { pci_mmconfig_insert()
776 &cfg->res); pci_mmconfig_insert()
778 list_add_sorted(cfg); pci_mmconfig_insert()
780 &cfg->res, (unsigned long)addr); pci_mmconfig_insert()
781 cfg = NULL; pci_mmconfig_insert()
786 if (cfg) { pci_mmconfig_insert()
787 if (cfg->res.parent) pci_mmconfig_insert()
788 release_resource(&cfg->res); pci_mmconfig_insert()
789 kfree(cfg); pci_mmconfig_insert()
800 struct pci_mmcfg_region *cfg; pci_mmconfig_delete() local
803 list_for_each_entry_rcu(cfg, &pci_mmcfg_list, list) pci_mmconfig_delete()
804 if (cfg->segment == seg && cfg->start_bus == start && pci_mmconfig_delete()
805 cfg->end_bus == end) { pci_mmconfig_delete()
806 list_del_rcu(&cfg->list); pci_mmconfig_delete()
808 pci_mmcfg_arch_unmap(cfg); pci_mmconfig_delete()
809 if (cfg->res.parent) pci_mmconfig_delete()
810 release_resource(&cfg->res); pci_mmconfig_delete()
812 kfree(cfg); pci_mmconfig_delete()
445 is_mmconf_reserved(check_reserved_t is_reserved, struct pci_mmcfg_region *cfg, struct device *dev, int with_e820) is_mmconf_reserved() argument
497 pci_mmcfg_check_reserved(struct device *dev, struct pci_mmcfg_region *cfg, int early) pci_mmcfg_check_reserved() argument
546 acpi_mcfg_check_entry(struct acpi_table_mcfg *mcfg, struct acpi_mcfg_allocation *cfg) acpi_mcfg_check_entry() argument
H A Dmmconfig_32.c30 struct pci_mmcfg_region *cfg = pci_mmconfig_lookup(seg, bus); get_base_addr() local
32 if (cfg) get_base_addr()
33 return cfg->address; get_base_addr()
144 int pci_mmcfg_arch_map(struct pci_mmcfg_region *cfg) pci_mmcfg_arch_map() argument
149 void pci_mmcfg_arch_unmap(struct pci_mmcfg_region *cfg) pci_mmcfg_arch_unmap() argument
H A Dnumachip.c23 struct pci_mmcfg_region *cfg = pci_mmconfig_lookup(seg, bus); pci_dev_base() local
25 if (cfg && cfg->virt) pci_dev_base()
26 return cfg->virt + (PCI_MMCFG_BUS_OFFSET(bus) | (devfn << 12)); pci_dev_base()
/linux-4.1.27/drivers/pci/
H A Dhtirq.c38 struct ht_irq_cfg *cfg = irq_get_handler_data(irq); write_ht_irq_msg() local
41 if (cfg->msg.address_lo != msg->address_lo) { write_ht_irq_msg()
42 pci_write_config_byte(cfg->dev, cfg->pos + 2, cfg->idx); write_ht_irq_msg()
43 pci_write_config_dword(cfg->dev, cfg->pos + 4, msg->address_lo); write_ht_irq_msg()
45 if (cfg->msg.address_hi != msg->address_hi) { write_ht_irq_msg()
46 pci_write_config_byte(cfg->dev, cfg->pos + 2, cfg->idx + 1); write_ht_irq_msg()
47 pci_write_config_dword(cfg->dev, cfg->pos + 4, msg->address_hi); write_ht_irq_msg()
49 if (cfg->update) write_ht_irq_msg()
50 cfg->update(cfg->dev, irq, msg); write_ht_irq_msg()
52 cfg->msg = *msg; write_ht_irq_msg()
57 struct ht_irq_cfg *cfg = irq_get_handler_data(irq); fetch_ht_irq_msg() local
58 *msg = cfg->msg; fetch_ht_irq_msg()
63 struct ht_irq_cfg *cfg = irq_data_get_irq_handler_data(data); mask_ht_irq() local
64 struct ht_irq_msg msg = cfg->msg; mask_ht_irq()
72 struct ht_irq_cfg *cfg = irq_data_get_irq_handler_data(data); unmask_ht_irq() local
73 struct ht_irq_msg msg = cfg->msg; unmask_ht_irq()
89 struct ht_irq_cfg *cfg; __ht_create_irq() local
108 cfg = kmalloc(sizeof(*cfg), GFP_KERNEL); __ht_create_irq()
109 if (!cfg) __ht_create_irq()
112 cfg->dev = dev; __ht_create_irq()
113 cfg->update = update; __ht_create_irq()
114 cfg->pos = pos; __ht_create_irq()
115 cfg->idx = 0x10 + (idx * 2); __ht_create_irq()
117 cfg->msg.address_lo = 0xffffffff; __ht_create_irq()
118 cfg->msg.address_hi = 0xffffffff; __ht_create_irq()
122 kfree(cfg); __ht_create_irq()
125 irq_set_handler_data(irq, cfg); __ht_create_irq()
161 struct ht_irq_cfg *cfg; ht_destroy_irq() local
163 cfg = irq_get_handler_data(irq); ht_destroy_irq()
168 kfree(cfg); ht_destroy_irq()
/linux-4.1.27/arch/x86/kernel/apic/
H A Dvector.c49 struct irq_cfg *cfg; alloc_irq_cfg() local
51 cfg = kzalloc_node(sizeof(*cfg), GFP_KERNEL, node); alloc_irq_cfg()
52 if (!cfg) alloc_irq_cfg()
54 if (!zalloc_cpumask_var_node(&cfg->domain, GFP_KERNEL, node)) alloc_irq_cfg()
56 if (!zalloc_cpumask_var_node(&cfg->old_domain, GFP_KERNEL, node)) alloc_irq_cfg()
59 INIT_LIST_HEAD(&cfg->irq_2_pin); alloc_irq_cfg()
61 return cfg; alloc_irq_cfg()
63 free_cpumask_var(cfg->domain); alloc_irq_cfg()
65 kfree(cfg); alloc_irq_cfg()
72 struct irq_cfg *cfg; alloc_irq_and_cfg_at() local
77 cfg = irq_cfg(at); alloc_irq_and_cfg_at()
78 if (cfg) alloc_irq_and_cfg_at()
79 return cfg; alloc_irq_and_cfg_at()
82 cfg = alloc_irq_cfg(at, node); alloc_irq_and_cfg_at()
83 if (cfg) alloc_irq_and_cfg_at()
84 irq_set_chip_data(at, cfg); alloc_irq_and_cfg_at()
87 return cfg; alloc_irq_and_cfg_at()
90 static void free_irq_cfg(unsigned int at, struct irq_cfg *cfg) free_irq_cfg() argument
92 if (!cfg) free_irq_cfg()
95 free_cpumask_var(cfg->domain); free_irq_cfg()
96 free_cpumask_var(cfg->old_domain); free_irq_cfg()
97 kfree(cfg); free_irq_cfg()
101 __assign_irq_vector(int irq, struct irq_cfg *cfg, const struct cpumask *mask) __assign_irq_vector() argument
119 if (cfg->move_in_progress) __assign_irq_vector()
127 cpumask_clear(cfg->old_domain); __assign_irq_vector()
134 if (cpumask_subset(tmp_mask, cfg->domain)) { __assign_irq_vector()
136 if (cpumask_equal(tmp_mask, cfg->domain)) __assign_irq_vector()
143 cpumask_andnot(cfg->old_domain, cfg->domain, tmp_mask); __assign_irq_vector()
144 cfg->move_in_progress = __assign_irq_vector()
145 cpumask_intersects(cfg->old_domain, cpu_online_mask); __assign_irq_vector()
146 cpumask_and(cfg->domain, cfg->domain, tmp_mask); __assign_irq_vector()
160 cpumask_or(cfg->old_domain, cfg->old_domain, tmp_mask); __assign_irq_vector()
161 cpumask_andnot(tmp_mask, mask, cfg->old_domain); __assign_irq_vector()
177 if (cfg->vector) {
178 cpumask_copy(cfg->old_domain, cfg->domain);
179 cfg->move_in_progress =
180 cpumask_intersects(cfg->old_domain, cpu_online_mask);
184 cfg->vector = vector;
185 cpumask_copy(cfg->domain, tmp_mask);
194 int assign_irq_vector(int irq, struct irq_cfg *cfg, const struct cpumask *mask) assign_irq_vector() argument
200 err = __assign_irq_vector(irq, cfg, mask); assign_irq_vector()
205 void clear_irq_vector(int irq, struct irq_cfg *cfg) clear_irq_vector() argument
211 BUG_ON(!cfg->vector); clear_irq_vector()
213 vector = cfg->vector; clear_irq_vector()
214 for_each_cpu_and(cpu, cfg->domain, cpu_online_mask) clear_irq_vector()
217 cfg->vector = 0; clear_irq_vector()
218 cpumask_clear(cfg->domain); clear_irq_vector()
220 if (likely(!cfg->move_in_progress)) { clear_irq_vector()
225 for_each_cpu_and(cpu, cfg->old_domain, cpu_online_mask) { clear_irq_vector()
234 cfg->move_in_progress = 0; clear_irq_vector()
270 struct irq_cfg *cfg; __setup_vector_irq() local
280 cfg = irq_cfg(irq); for_each_active_irq()
281 if (!cfg) for_each_active_irq()
284 if (!cpumask_test_cpu(cpu, cfg->domain)) for_each_active_irq()
286 vector = cfg->vector; for_each_active_irq()
295 cfg = irq_cfg(irq);
296 if (!cpumask_test_cpu(cpu, cfg->domain))
324 struct irq_cfg *cfg = irqd_cfg(data); apic_retrigger_irq() local
329 cpu = cpumask_first_and(cfg->domain, cpu_online_mask); apic_retrigger_irq()
330 apic->send_IPI_mask(cpumask_of(cpu), cfg->vector); apic_retrigger_irq()
351 struct irq_cfg *cfg = irqd_cfg(data); apic_set_affinity() local
361 err = assign_irq_vector(irq, cfg, mask); apic_set_affinity()
365 err = apic->cpu_mask_to_apicid_and(mask, cfg->domain, dest_id); apic_set_affinity()
367 if (assign_irq_vector(irq, cfg, data->affinity)) apic_set_affinity()
378 void send_cleanup_vector(struct irq_cfg *cfg) send_cleanup_vector() argument
385 for_each_cpu_and(i, cfg->old_domain, cpu_online_mask) send_cleanup_vector()
389 cpumask_and(cleanup_mask, cfg->old_domain, cpu_online_mask); send_cleanup_vector()
393 cfg->move_in_progress = 0; send_cleanup_vector()
409 struct irq_cfg *cfg; smp_irq_move_cleanup_interrupt() local
420 cfg = irq_cfg(irq); smp_irq_move_cleanup_interrupt()
421 if (!cfg) smp_irq_move_cleanup_interrupt()
430 if (cfg->move_in_progress) smp_irq_move_cleanup_interrupt()
433 if (vector == cfg->vector && cpumask_test_cpu(me, cfg->domain)) smp_irq_move_cleanup_interrupt()
456 static void __irq_complete_move(struct irq_cfg *cfg, unsigned vector) __irq_complete_move() argument
460 if (likely(!cfg->move_in_progress)) __irq_complete_move()
465 if (vector == cfg->vector && cpumask_test_cpu(me, cfg->domain)) __irq_complete_move()
466 send_cleanup_vector(cfg); __irq_complete_move()
469 void irq_complete_move(struct irq_cfg *cfg) irq_complete_move() argument
471 __irq_complete_move(cfg, ~get_irq_regs()->orig_ax); irq_complete_move()
476 struct irq_cfg *cfg = irq_cfg(irq); irq_force_complete_move() local
478 if (!cfg) irq_force_complete_move()
481 __irq_complete_move(cfg, cfg->vector); irq_force_complete_move()
490 struct irq_cfg *cfg; arch_setup_hwirq() local
494 cfg = alloc_irq_cfg(irq, node); arch_setup_hwirq()
495 if (!cfg) arch_setup_hwirq()
499 ret = __assign_irq_vector(irq, cfg, apic->target_cpus()); arch_setup_hwirq()
503 irq_set_chip_data(irq, cfg); arch_setup_hwirq()
505 free_irq_cfg(irq, cfg); arch_setup_hwirq()
511 struct irq_cfg *cfg = irq_cfg(irq); arch_teardown_hwirq() local
514 clear_irq_vector(irq, cfg); arch_teardown_hwirq()
515 free_irq_cfg(irq, cfg); arch_teardown_hwirq()
H A Dhtirq.c42 struct irq_cfg *cfg = irqd_cfg(data); ht_set_affinity() local
50 target_ht_irq(data->irq, dest, cfg->vector); ht_set_affinity()
66 struct irq_cfg *cfg; arch_setup_ht_irq() local
74 cfg = irq_cfg(irq); arch_setup_ht_irq()
75 err = assign_irq_vector(irq, cfg, apic->target_cpus()); arch_setup_ht_irq()
79 err = apic->cpu_mask_to_apicid_and(cfg->domain, arch_setup_ht_irq()
89 HT_IRQ_LOW_VECTOR(cfg->vector) | arch_setup_ht_irq()
H A Dmsi.c27 struct irq_cfg *cfg = irq_cfg(irq); native_compose_msi_msg() local
50 MSI_DATA_VECTOR(cfg->vector); native_compose_msi_msg()
56 struct irq_cfg *cfg; msi_compose_msg() local
63 cfg = irq_cfg(irq); msi_compose_msg()
64 err = assign_irq_vector(irq, cfg, apic->target_cpus()); msi_compose_msg()
68 err = apic->cpu_mask_to_apicid_and(cfg->domain, msi_compose_msg()
81 struct irq_cfg *cfg = irqd_cfg(data); msi_set_affinity() local
93 msg.data |= MSI_DATA_VECTOR(cfg->vector); msi_set_affinity()
183 struct irq_cfg *cfg = irqd_cfg(data); dmar_msi_set_affinity() local
195 msg.data |= MSI_DATA_VECTOR(cfg->vector); dmar_msi_set_affinity()
238 struct irq_cfg *cfg = irqd_cfg(data); hpet_msi_set_affinity() local
250 msg.data |= MSI_DATA_VECTOR(cfg->vector); hpet_msi_set_affinity()
/linux-4.1.27/drivers/block/rsxx/
H A Dconfig.c32 static void initialize_config(struct rsxx_card_cfg *cfg) initialize_config() argument
34 cfg->hdr.version = RSXX_CFG_VERSION; initialize_config()
36 cfg->data.block_size = RSXX_HW_BLK_SIZE; initialize_config()
37 cfg->data.stripe_size = RSXX_HW_BLK_SIZE; initialize_config()
38 cfg->data.vendor_id = RSXX_VENDOR_ID_IBM; initialize_config()
39 cfg->data.cache_order = (-1); initialize_config()
40 cfg->data.intr_coal.mode = RSXX_INTR_COAL_DISABLED; initialize_config()
41 cfg->data.intr_coal.count = 0; initialize_config()
42 cfg->data.intr_coal.latency = 0; initialize_config()
45 static u32 config_data_crc32(struct rsxx_card_cfg *cfg) config_data_crc32() argument
52 return ~crc32(~0, &cfg->data, sizeof(cfg->data)); config_data_crc32()
69 static void config_data_swab(struct rsxx_card_cfg *cfg) config_data_swab() argument
71 u32 *data = (u32 *) &cfg->data; config_data_swab()
74 for (i = 0; i < (sizeof(cfg->data) / 4); i++) config_data_swab()
78 static void config_data_le_to_cpu(struct rsxx_card_cfg *cfg) config_data_le_to_cpu() argument
80 u32 *data = (u32 *) &cfg->data; config_data_le_to_cpu()
83 for (i = 0; i < (sizeof(cfg->data) / 4); i++) config_data_le_to_cpu()
87 static void config_data_cpu_to_le(struct rsxx_card_cfg *cfg) config_data_cpu_to_le() argument
89 u32 *data = (u32 *) &cfg->data; config_data_cpu_to_le()
92 for (i = 0; i < (sizeof(cfg->data) / 4); i++) config_data_cpu_to_le()
100 struct rsxx_card_cfg cfg; rsxx_save_config() local
103 memcpy(&cfg, &card->config, sizeof(cfg)); rsxx_save_config()
105 if (unlikely(cfg.hdr.version != RSXX_CFG_VERSION)) { rsxx_save_config()
108 cfg.hdr.version); rsxx_save_config()
113 config_data_cpu_to_le(&cfg); rsxx_save_config()
115 cfg.hdr.crc = config_data_crc32(&cfg); rsxx_save_config()
121 config_data_swab(&cfg); rsxx_save_config()
122 config_hdr_cpu_to_be(&cfg.hdr); rsxx_save_config()
124 st = rsxx_creg_write(card, CREG_ADD_CONFIG, sizeof(cfg), &cfg, 1); rsxx_save_config()
/linux-4.1.27/sound/pci/hda/
H A Dhda_auto_parser.h46 const struct auto_pin_cfg *cfg,
49 const struct auto_pin_cfg *cfg,
90 struct auto_pin_cfg *cfg,
95 #define snd_hda_parse_pin_def_config(codec, cfg, ignore) \
96 snd_hda_parse_pin_defcfg(codec, cfg, ignore, 0)
98 static inline int auto_cfg_hp_outs(const struct auto_pin_cfg *cfg) auto_cfg_hp_outs() argument
100 return (cfg->line_out_type == AUTO_PIN_HP_OUT) ? auto_cfg_hp_outs()
101 cfg->line_outs : cfg->hp_outs; auto_cfg_hp_outs()
103 static inline const hda_nid_t *auto_cfg_hp_pins(const struct auto_pin_cfg *cfg) auto_cfg_hp_pins() argument
105 return (cfg->line_out_type == AUTO_PIN_HP_OUT) ? auto_cfg_hp_pins()
106 cfg->line_out_pins : cfg->hp_pins; auto_cfg_hp_pins()
108 static inline int auto_cfg_speaker_outs(const struct auto_pin_cfg *cfg) auto_cfg_speaker_outs() argument
110 return (cfg->line_out_type == AUTO_PIN_SPEAKER_OUT) ? auto_cfg_speaker_outs()
111 cfg->line_outs : cfg->speaker_outs; auto_cfg_speaker_outs()
113 static inline const hda_nid_t *auto_cfg_speaker_pins(const struct auto_pin_cfg *cfg) auto_cfg_speaker_pins() argument
115 return (cfg->line_out_type == AUTO_PIN_SPEAKER_OUT) ? auto_cfg_speaker_pins()
116 cfg->line_out_pins : cfg->speaker_pins; auto_cfg_speaker_pins()
H A Dhda_auto_parser.c59 /* add the found input-pin to the cfg->inputs[] table */ add_auto_cfg_input_pin()
60 static void add_auto_cfg_input_pin(struct hda_codec *codec, struct auto_pin_cfg *cfg, add_auto_cfg_input_pin() argument
63 if (cfg->num_inputs < AUTO_CFG_MAX_INS) { add_auto_cfg_input_pin()
64 cfg->inputs[cfg->num_inputs].pin = nid; add_auto_cfg_input_pin()
65 cfg->inputs[cfg->num_inputs].type = type; add_auto_cfg_input_pin()
66 cfg->inputs[cfg->num_inputs].has_boost_on_pin = add_auto_cfg_input_pin()
68 cfg->num_inputs++; add_auto_cfg_input_pin()
154 * Parse all pin widgets and store the useful pin nids to cfg
171 struct auto_pin_cfg *cfg, snd_hda_parse_pin_defcfg()
177 struct auto_out_pin line_out[ARRAY_SIZE(cfg->line_out_pins)]; snd_hda_parse_pin_defcfg()
178 struct auto_out_pin speaker_out[ARRAY_SIZE(cfg->speaker_pins)]; snd_hda_parse_pin_defcfg()
179 struct auto_out_pin hp_out[ARRAY_SIZE(cfg->hp_pins)]; snd_hda_parse_pin_defcfg()
185 memset(cfg, 0, sizeof(*cfg)); snd_hda_parse_pin_defcfg()
228 if (!cfg->mono_out_pin) for_each_hda_codec_node()
229 cfg->mono_out_pin = nid; for_each_hda_codec_node()
240 if (cfg->line_outs >= ARRAY_SIZE(cfg->line_out_pins)) { for_each_hda_codec_node()
246 line_out[cfg->line_outs].pin = nid; for_each_hda_codec_node()
247 line_out[cfg->line_outs].seq = seq; for_each_hda_codec_node()
248 cfg->line_outs++; for_each_hda_codec_node()
253 if (cfg->speaker_outs >= ARRAY_SIZE(cfg->speaker_pins)) { for_each_hda_codec_node()
259 speaker_out[cfg->speaker_outs].pin = nid; for_each_hda_codec_node()
260 speaker_out[cfg->speaker_outs].seq = (assoc << 4) | seq; for_each_hda_codec_node()
261 cfg->speaker_outs++; for_each_hda_codec_node()
266 if (cfg->hp_outs >= ARRAY_SIZE(cfg->hp_pins)) { for_each_hda_codec_node()
272 hp_out[cfg->hp_outs].pin = nid; for_each_hda_codec_node()
273 hp_out[cfg->hp_outs].seq = (assoc << 4) | seq; for_each_hda_codec_node()
274 cfg->hp_outs++; for_each_hda_codec_node()
277 add_auto_cfg_input_pin(codec, cfg, nid, AUTO_PIN_MIC); for_each_hda_codec_node()
280 add_auto_cfg_input_pin(codec, cfg, nid, AUTO_PIN_LINE_IN); for_each_hda_codec_node()
283 add_auto_cfg_input_pin(codec, cfg, nid, AUTO_PIN_CD); for_each_hda_codec_node()
286 add_auto_cfg_input_pin(codec, cfg, nid, AUTO_PIN_AUX); for_each_hda_codec_node()
290 if (cfg->dig_outs >= ARRAY_SIZE(cfg->dig_out_pins)) { for_each_hda_codec_node()
296 cfg->dig_out_pins[cfg->dig_outs] = nid; for_each_hda_codec_node()
297 cfg->dig_out_type[cfg->dig_outs] = for_each_hda_codec_node()
300 cfg->dig_outs++; for_each_hda_codec_node()
304 cfg->dig_in_pin = nid; for_each_hda_codec_node()
306 cfg->dig_in_type = HDA_PCM_TYPE_HDMI; for_each_hda_codec_node()
308 cfg->dig_in_type = HDA_PCM_TYPE_SPDIF; for_each_hda_codec_node()
317 for (i = 0; (hsmic || hpmic) && (i < cfg->num_inputs); i++)
318 if (hsmic && can_be_headset_mic(codec, &cfg->inputs[i], 0xc)) {
319 cfg->inputs[i].is_headset_mic = 1;
321 } else if (hpmic && can_be_headset_mic(codec, &cfg->inputs[i], 0xd)) {
322 cfg->inputs[i].is_headphone_mic = 1;
327 for (i = 0; (hsmic || hpmic) && (i < cfg->num_inputs); i++) {
328 if (!can_be_headset_mic(codec, &cfg->inputs[i], -1))
331 cfg->inputs[i].is_headset_mic = 1;
334 cfg->inputs[i].is_headphone_mic = 1;
349 if (!cfg->line_outs && cfg->hp_outs > 1 &&
352 while (i < cfg->hp_outs) {
359 line_out[cfg->line_outs++] = hp_out[i];
360 cfg->hp_outs--;
362 sizeof(hp_out[0]) * (cfg->hp_outs - i));
364 memset(hp_out + cfg->hp_outs, 0,
365 sizeof(hp_out[0]) * (AUTO_CFG_MAX_OUTS - cfg->hp_outs));
366 if (!cfg->hp_outs)
367 cfg->line_out_type = AUTO_PIN_HP_OUT;
372 sort_pins_by_sequence(cfg->line_out_pins, line_out, cfg->line_outs);
373 sort_pins_by_sequence(cfg->speaker_pins, speaker_out,
374 cfg->speaker_outs);
375 sort_pins_by_sequence(cfg->hp_pins, hp_out, cfg->hp_outs);
381 if (!cfg->line_outs &&
383 if (cfg->speaker_outs) {
384 cfg->line_outs = cfg->speaker_outs;
385 memcpy(cfg->line_out_pins, cfg->speaker_pins,
386 sizeof(cfg->speaker_pins));
387 cfg->speaker_outs = 0;
388 memset(cfg->speaker_pins, 0, sizeof(cfg->speaker_pins));
389 cfg->line_out_type = AUTO_PIN_SPEAKER_OUT;
390 } else if (cfg->hp_outs) {
391 cfg->line_outs = cfg->hp_outs;
392 memcpy(cfg->line_out_pins, cfg->hp_pins,
393 sizeof(cfg->hp_pins));
394 cfg->hp_outs = 0;
395 memset(cfg->hp_pins, 0, sizeof(cfg->hp_pins));
396 cfg->line_out_type = AUTO_PIN_HP_OUT;
400 reorder_outputs(cfg->line_outs, cfg->line_out_pins);
401 reorder_outputs(cfg->hp_outs, cfg->hp_pins);
402 reorder_outputs(cfg->speaker_outs, cfg->speaker_pins);
405 sort(cfg->inputs, cfg->num_inputs, sizeof(cfg->inputs[0]),
412 codec->core.chip_name, cfg->line_outs, cfg->line_out_pins[0],
413 cfg->line_out_pins[1], cfg->line_out_pins[2],
414 cfg->line_out_pins[3], cfg->line_out_pins[4],
415 cfg->line_out_type == AUTO_PIN_HP_OUT ? "hp" :
416 (cfg->line_out_type == AUTO_PIN_SPEAKER_OUT ?
419 cfg->speaker_outs, cfg->speaker_pins[0],
420 cfg->speaker_pins[1], cfg->speaker_pins[2],
421 cfg->speaker_pins[3], cfg->speaker_pins[4]);
423 cfg->hp_outs, cfg->hp_pins[0],
424 cfg->hp_pins[1], cfg->hp_pins[2],
425 cfg->hp_pins[3], cfg->hp_pins[4]);
426 codec_info(codec, " mono: mono_out=0x%x\n", cfg->mono_out_pin);
427 if (cfg->dig_outs)
429 cfg->dig_out_pins[0], cfg->dig_out_pins[1]);
431 for (i = 0; i < cfg->num_inputs; i++) {
433 hda_get_autocfg_input_label(codec, cfg, i),
434 cfg->inputs[i].pin);
436 if (cfg->dig_in_pin)
437 codec_info(codec, " dig-in=0x%x\n", cfg->dig_in_pin);
535 const struct auto_pin_cfg *cfg, check_mic_location_need()
541 defc = snd_hda_codec_get_pincfg(codec, cfg->inputs[input].pin); check_mic_location_need()
548 for (i = 0; i < cfg->num_inputs; i++) { check_mic_location_need()
549 defc = snd_hda_codec_get_pincfg(codec, cfg->inputs[i].pin); check_mic_location_need()
563 * @cfg: the parsed pin configuration
572 const struct auto_pin_cfg *cfg, hda_get_autocfg_input_label()
575 int type = cfg->inputs[input].type; hda_get_autocfg_input_label()
578 if ((input > 0 && cfg->inputs[input - 1].type == type) || hda_get_autocfg_input_label()
579 (input < cfg->num_inputs - 1 && cfg->inputs[input + 1].type == type)) hda_get_autocfg_input_label()
582 has_multiple_pins &= check_mic_location_need(codec, cfg, input); hda_get_autocfg_input_label()
583 return hda_get_input_pin_label(codec, &cfg->inputs[input], hda_get_autocfg_input_label()
584 cfg->inputs[input].pin, hda_get_autocfg_input_label()
654 const struct auto_pin_cfg *cfg, fill_audio_out_name()
667 if (cfg) { fill_audio_out_name()
669 sfx = check_output_sfx(nid, cfg->line_out_pins, cfg->line_outs, fill_audio_out_name()
672 sfx = check_output_sfx(nid, cfg->speaker_pins, cfg->speaker_outs, fill_audio_out_name()
676 int idx = get_hp_label_index(codec, nid, cfg->hp_pins, fill_audio_out_name()
677 cfg->hp_outs); fill_audio_out_name()
694 * @cfg: the parsed pin configuration
700 * output pins. When @cfg is given as non-NULL, the function tries to get
705 * the channel suffix like "Front", "Surround", etc (only when @cfg is given).
710 const struct auto_pin_cfg *cfg, snd_hda_get_pin_label()
725 return fill_audio_out_name(codec, nid, cfg, "Line Out", snd_hda_get_pin_label()
728 return fill_audio_out_name(codec, nid, cfg, "Speaker", snd_hda_get_pin_label()
731 return fill_audio_out_name(codec, nid, cfg, "Headphone", snd_hda_get_pin_label()
737 if (cfg && indexp) snd_hda_get_pin_label()
738 for (i = 0; i < cfg->dig_outs; i++) { snd_hda_get_pin_label()
739 hda_nid_t pin = cfg->dig_out_pins[i]; snd_hda_get_pin_label()
749 if (cfg) { snd_hda_get_pin_label()
750 for (i = 0; i < cfg->num_inputs; i++) { snd_hda_get_pin_label()
751 if (cfg->inputs[i].pin != nid) snd_hda_get_pin_label()
753 name = hda_get_autocfg_input_label(codec, cfg, i); snd_hda_get_pin_label()
806 * @cfg: NULL-terminated pin config table
809 const struct hda_pintbl *cfg) snd_hda_apply_pincfgs()
811 for (; cfg->nid; cfg++) snd_hda_apply_pincfgs()
812 snd_hda_codec_set_pincfg(codec, cfg->nid, cfg->val); snd_hda_apply_pincfgs()
817 const struct hda_pintbl *cfg) set_pin_targets()
819 for (; cfg->nid; cfg++) set_pin_targets()
820 snd_hda_set_pin_ctl_cache(codec, cfg->nid, cfg->val); set_pin_targets()
170 snd_hda_parse_pin_defcfg(struct hda_codec *codec, struct auto_pin_cfg *cfg, const hda_nid_t *ignore_nids, unsigned int cond_flags) snd_hda_parse_pin_defcfg() argument
534 check_mic_location_need(struct hda_codec *codec, const struct auto_pin_cfg *cfg, int input) check_mic_location_need() argument
571 hda_get_autocfg_input_label(struct hda_codec *codec, const struct auto_pin_cfg *cfg, int input) hda_get_autocfg_input_label() argument
653 fill_audio_out_name(struct hda_codec *codec, hda_nid_t nid, const struct auto_pin_cfg *cfg, const char *name, char *label, int maxlen, int *indexp) fill_audio_out_name() argument
709 snd_hda_get_pin_label(struct hda_codec *codec, hda_nid_t nid, const struct auto_pin_cfg *cfg, char *label, int maxlen, int *indexp) snd_hda_get_pin_label() argument
808 snd_hda_apply_pincfgs(struct hda_codec *codec, const struct hda_pintbl *cfg) snd_hda_apply_pincfgs() argument
816 set_pin_targets(struct hda_codec *codec, const struct hda_pintbl *cfg) set_pin_targets() argument
H A Dpatch_cmedia.c52 struct auto_pin_cfg *cfg; patch_cmi9880() local
60 cfg = &spec->gen.autocfg; patch_cmi9880()
63 err = snd_hda_parse_pin_defcfg(codec, cfg, NULL, 0); patch_cmi9880()
66 err = snd_hda_gen_parse_auto_config(codec, cfg); patch_cmi9880()
81 struct auto_pin_cfg *cfg; patch_cmi8888() local
89 cfg = &spec->gen.autocfg; patch_cmi8888()
97 err = snd_hda_parse_pin_defcfg(codec, cfg, NULL, 0); patch_cmi8888()
100 err = snd_hda_gen_parse_auto_config(codec, cfg); patch_cmi8888()
H A Dhda_generic.c1139 struct auto_pin_cfg *cfg = &spec->autocfg; get_line_out_pfx() local
1142 if (cfg->line_outs == 1 && !spec->multi_ios && get_line_out_pfx()
1143 !cfg->hp_outs && !cfg->speaker_outs) get_line_out_pfx()
1154 if (ch >= cfg->line_outs) get_line_out_pfx()
1157 switch (cfg->line_out_type) { get_line_out_pfx()
1162 if (!ch && cfg->hp_outs && get_line_out_pfx()
1165 if (cfg->line_outs == 1) get_line_out_pfx()
1167 if (cfg->line_outs == 2) get_line_out_pfx()
1174 if (!ch && cfg->speaker_outs && get_line_out_pfx()
1185 if (!ch && cfg->speaker_outs && cfg->hp_outs) { get_line_out_pfx()
1198 if (cfg->line_outs == 1 && !spec->multi_ios) get_line_out_pfx()
1310 struct auto_pin_cfg *cfg = &spec->autocfg; get_primary_out() local
1312 if (cfg->line_outs > idx) get_primary_out()
1314 idx -= cfg->line_outs; get_primary_out()
1456 struct auto_pin_cfg *cfg = &spec->autocfg; count_multiio_pins() local
1463 for (i = 0; i < cfg->num_inputs; i++) { count_multiio_pins()
1464 if (cfg->inputs[i].type != type) count_multiio_pins()
1467 cfg->inputs[i].pin)) count_multiio_pins()
1487 struct auto_pin_cfg *cfg = &spec->autocfg; fill_multi_ios() local
1503 for (i = 0; i < cfg->num_inputs; i++) { fill_multi_ios()
1504 hda_nid_t nid = cfg->inputs[i].pin; fill_multi_ios()
1507 if (cfg->inputs[i].type != type) fill_multi_ios()
1535 spec->out_paths[cfg->line_outs + spec->multi_ios] = fill_multi_ios()
1560 path = snd_hda_get_path_from_idx(codec, spec->out_paths[cfg->line_outs + i]); fill_multi_ios()
1643 struct auto_pin_cfg *cfg = &spec->autocfg; indep_hp_possible() local
1647 if (cfg->line_out_type == AUTO_PIN_HP_OUT) indep_hp_possible()
1660 for (i = 0; i < cfg->line_outs; i++) { indep_hp_possible()
1667 for (i = 0; i < cfg->speaker_outs; i++) { indep_hp_possible()
1701 struct auto_pin_cfg *cfg = &spec->autocfg; fill_and_eval_dacs() local
1705 spec->multiout.num_dacs = cfg->line_outs; fill_and_eval_dacs()
1729 mapped = map_singles(codec, cfg->line_outs, fill_and_eval_dacs()
1730 cfg->line_out_pins, fill_and_eval_dacs()
1733 mapped |= map_singles(codec, cfg->hp_outs, fill_and_eval_dacs()
1734 cfg->hp_pins, fill_and_eval_dacs()
1737 mapped |= map_singles(codec, cfg->speaker_outs, fill_and_eval_dacs()
1738 cfg->speaker_pins, fill_and_eval_dacs()
1742 fill_mio_first && cfg->line_outs == 1 && fill_and_eval_dacs()
1743 cfg->line_out_type != AUTO_PIN_SPEAKER_OUT) { fill_and_eval_dacs()
1744 err = fill_multi_ios(codec, cfg->line_out_pins[0], true); fill_and_eval_dacs()
1751 badness += try_assign_dacs(codec, cfg->line_outs, cfg->line_out_pins, fill_and_eval_dacs()
1756 cfg->line_outs == 1 && cfg->line_out_type != AUTO_PIN_SPEAKER_OUT) { fill_and_eval_dacs()
1758 err = fill_multi_ios(codec, cfg->line_out_pins[0], false); fill_and_eval_dacs()
1764 if (cfg->line_out_type != AUTO_PIN_HP_OUT) { fill_and_eval_dacs()
1765 err = try_assign_dacs(codec, cfg->hp_outs, cfg->hp_pins, fill_and_eval_dacs()
1773 if (cfg->line_out_type != AUTO_PIN_SPEAKER_OUT) { fill_and_eval_dacs()
1774 err = try_assign_dacs(codec, cfg->speaker_outs, fill_and_eval_dacs()
1775 cfg->speaker_pins, fill_and_eval_dacs()
1784 cfg->line_outs == 1 && cfg->line_out_type != AUTO_PIN_SPEAKER_OUT) { fill_and_eval_dacs()
1785 err = fill_multi_ios(codec, cfg->line_out_pins[0], false); fill_and_eval_dacs()
1794 if (cfg->line_out_type != AUTO_PIN_HP_OUT) fill_and_eval_dacs()
1797 if (cfg->line_out_type != AUTO_PIN_SPEAKER_OUT) fill_and_eval_dacs()
1803 cfg->hp_outs && cfg->line_out_type == AUTO_PIN_SPEAKER_OUT) fill_and_eval_dacs()
1804 if (count_multiio_pins(codec, cfg->hp_pins[0]) >= 2) fill_and_eval_dacs()
1809 for (i = 0; i < cfg->line_outs; i++) { fill_and_eval_dacs()
1815 sizeof(hda_nid_t) * (cfg->line_outs - i - 1)); fill_and_eval_dacs()
1816 spec->private_dac_nids[cfg->line_outs - 1] = 0; fill_and_eval_dacs()
1836 if (cfg->line_out_type != AUTO_PIN_HP_OUT) fill_and_eval_dacs()
1837 refill_shared_dacs(codec, cfg->hp_outs, fill_and_eval_dacs()
1840 if (cfg->line_out_type != AUTO_PIN_SPEAKER_OUT) fill_and_eval_dacs()
1841 refill_shared_dacs(codec, cfg->speaker_outs, fill_and_eval_dacs()
1870 struct auto_pin_cfg *cfg) debug_show_configs()
1877 cfg->line_out_pins[0], cfg->line_out_pins[1], debug_show_configs()
1878 cfg->line_out_pins[2], cfg->line_out_pins[3], debug_show_configs()
1883 lo_type[cfg->line_out_type]); debug_show_configs()
1884 for (i = 0; i < cfg->line_outs; i++) debug_show_configs()
1893 spec->out_paths[cfg->line_outs + i]); debug_show_configs()
1894 if (cfg->hp_outs) debug_show_configs()
1896 cfg->hp_pins[0], cfg->hp_pins[1], debug_show_configs()
1897 cfg->hp_pins[2], cfg->hp_pins[3], debug_show_configs()
1902 for (i = 0; i < cfg->hp_outs; i++) debug_show_configs()
1904 if (cfg->speaker_outs) debug_show_configs()
1906 cfg->speaker_pins[0], cfg->speaker_pins[1], debug_show_configs()
1907 cfg->speaker_pins[2], cfg->speaker_pins[3], debug_show_configs()
1912 for (i = 0; i < cfg->speaker_outs; i++) debug_show_configs()
1918 #define debug_show_configs(codec, cfg) /* NOP */
1943 struct auto_pin_cfg *cfg = &spec->autocfg; parse_output_paths() local
1955 *best_cfg = *cfg; parse_output_paths()
1965 cfg->line_out_type, fill_hardwired, fill_mio_first, parse_output_paths()
1967 debug_show_configs(codec, cfg); parse_output_paths()
1970 *best_cfg = *cfg; parse_output_paths()
1985 if (cfg->speaker_outs > 0 && parse_output_paths()
1986 cfg->line_out_type == AUTO_PIN_HP_OUT) { parse_output_paths()
1987 cfg->hp_outs = cfg->line_outs; parse_output_paths()
1988 memcpy(cfg->hp_pins, cfg->line_out_pins, parse_output_paths()
1989 sizeof(cfg->hp_pins)); parse_output_paths()
1990 cfg->line_outs = cfg->speaker_outs; parse_output_paths()
1991 memcpy(cfg->line_out_pins, cfg->speaker_pins, parse_output_paths()
1992 sizeof(cfg->speaker_pins)); parse_output_paths()
1993 cfg->speaker_outs = 0; parse_output_paths()
1994 memset(cfg->speaker_pins, 0, sizeof(cfg->speaker_pins)); parse_output_paths()
1995 cfg->line_out_type = AUTO_PIN_SPEAKER_OUT; parse_output_paths()
1999 if (cfg->hp_outs > 0 && parse_output_paths()
2000 cfg->line_out_type == AUTO_PIN_SPEAKER_OUT) { parse_output_paths()
2001 cfg->speaker_outs = cfg->line_outs; parse_output_paths()
2002 memcpy(cfg->speaker_pins, cfg->line_out_pins, parse_output_paths()
2003 sizeof(cfg->speaker_pins)); parse_output_paths()
2004 cfg->line_outs = cfg->hp_outs; parse_output_paths()
2005 memcpy(cfg->line_out_pins, cfg->hp_pins, parse_output_paths()
2006 sizeof(cfg->hp_pins)); parse_output_paths()
2007 cfg->hp_outs = 0; parse_output_paths()
2008 memset(cfg->hp_pins, 0, sizeof(cfg->hp_pins)); parse_output_paths()
2009 cfg->line_out_type = AUTO_PIN_HP_OUT; parse_output_paths()
2018 *cfg = *best_cfg; parse_output_paths()
2022 cfg->line_out_type, best_wired, best_mio); parse_output_paths()
2023 debug_show_configs(codec, cfg); parse_output_paths()
2025 if (cfg->line_out_pins[0]) { parse_output_paths()
2039 if (spec->prefer_hp_amp || cfg->line_out_type == AUTO_PIN_HP_OUT) parse_output_paths()
2043 set_pin_targets(codec, cfg->line_outs, cfg->line_out_pins, val); parse_output_paths()
2044 if (cfg->line_out_type != AUTO_PIN_HP_OUT) parse_output_paths()
2045 set_pin_targets(codec, cfg->hp_outs, cfg->hp_pins, PIN_HP); parse_output_paths()
2046 if (cfg->line_out_type != AUTO_PIN_SPEAKER_OUT) { parse_output_paths()
2048 set_pin_targets(codec, cfg->speaker_outs, parse_output_paths()
2049 cfg->speaker_pins, val); parse_output_paths()
2062 const struct auto_pin_cfg *cfg) create_multi_out_ctls()
2067 noutputs = cfg->line_outs; create_multi_out_ctls()
2068 if (spec->multi_ios > 0 && cfg->line_outs < 3) create_multi_out_ctls()
2466 const struct auto_pin_cfg *cfg = &spec->autocfg; loopback_mixing_put() local
2475 cfg->line_out_type); loopback_mixing_put()
2483 update_output_paths(codec, cfg->line_outs, spec->out_paths); loopback_mixing_put()
2484 if (cfg->line_out_type != AUTO_PIN_HP_OUT) loopback_mixing_put()
2485 update_output_paths(codec, cfg->hp_outs, spec->hp_paths); loopback_mixing_put()
2486 if (cfg->line_out_type != AUTO_PIN_SPEAKER_OUT) loopback_mixing_put()
2487 update_output_paths(codec, cfg->speaker_outs, loopback_mixing_put()
2571 struct auto_pin_cfg *cfg = &spec->autocfg; create_hp_mic() local
2581 if (cfg->num_inputs > 1) create_hp_mic()
2583 else if (cfg->num_inputs == 1) { create_hp_mic()
2584 defcfg = snd_hda_codec_get_pincfg(codec, cfg->inputs[0].pin); create_hp_mic()
2591 if (cfg->num_inputs >= AUTO_CFG_MAX_INS) create_hp_mic()
2595 if (cfg->line_out_type == AUTO_PIN_HP_OUT && cfg->line_outs > 0) create_hp_mic()
2596 nid = cfg->line_out_pins[0]; create_hp_mic()
2597 else if (cfg->hp_outs > 0) create_hp_mic()
2598 nid = cfg->hp_pins[0]; create_hp_mic()
2605 cfg->inputs[cfg->num_inputs].pin = nid; create_hp_mic()
2606 cfg->inputs[cfg->num_inputs].type = AUTO_PIN_MIC; create_hp_mic()
2607 cfg->inputs[cfg->num_inputs].is_headphone_mic = 1; create_hp_mic()
2608 cfg->num_inputs++; create_hp_mic()
3257 const struct auto_pin_cfg *cfg = &spec->autocfg; fill_input_pin_labels() local
3260 for (i = 0; i < cfg->num_inputs; i++) { fill_input_pin_labels()
3261 hda_nid_t pin = cfg->inputs[i].pin; fill_input_pin_labels()
3268 label = hda_get_autocfg_input_label(codec, cfg, i); fill_input_pin_labels()
3285 #define CFG_IDX_MIX 99 /* a dummy cfg->input idx for stereo mix */
3290 const struct auto_pin_cfg *cfg = &spec->autocfg; create_input_ctls() local
3304 for (i = 0; i < cfg->num_inputs; i++) { create_input_ctls()
3307 pin = cfg->inputs[i].pin; create_input_ctls()
3312 if (cfg->inputs[i].type == AUTO_PIN_MIC) create_input_ctls()
3539 struct auto_pin_cfg *cfg = &spec->autocfg; is_inv_dmic_pin() local
3545 for (i = 0; i < cfg->num_inputs; i++) { is_inv_dmic_pin()
3546 if (cfg->inputs[i].pin != nid) is_inv_dmic_pin()
3548 if (cfg->inputs[i].type != AUTO_PIN_MIC) is_inv_dmic_pin()
3830 struct auto_pin_cfg *cfg = &spec->autocfg; parse_mic_boost() local
3848 if (cfg->inputs[idx].type > AUTO_PIN_LINE_IN) parse_mic_boost()
4089 struct auto_pin_cfg *cfg = &spec->autocfg; add_all_pin_power_ctls() local
4094 add_pin_power_ctls(codec, cfg->line_outs, cfg->line_out_pins, on); add_all_pin_power_ctls()
4095 if (cfg->line_out_type != AUTO_PIN_HP_OUT) add_all_pin_power_ctls()
4096 add_pin_power_ctls(codec, cfg->hp_outs, cfg->hp_pins, on); add_all_pin_power_ctls()
4097 if (cfg->line_out_type != AUTO_PIN_SPEAKER_OUT) add_all_pin_power_ctls()
4098 add_pin_power_ctls(codec, cfg->speaker_outs, cfg->speaker_pins, on); add_all_pin_power_ctls()
4099 for (i = 0; i < cfg->num_inputs; i++) add_all_pin_power_ctls()
4100 add_pin_power_ctls(codec, 1, &cfg->inputs[i].pin, on); add_all_pin_power_ctls()
4118 struct auto_pin_cfg *cfg = &spec->autocfg; sync_all_pin_power_ctls() local
4123 sync_pin_power_ctls(codec, cfg->line_outs, cfg->line_out_pins); sync_all_pin_power_ctls()
4124 if (cfg->line_out_type != AUTO_PIN_HP_OUT) sync_all_pin_power_ctls()
4125 sync_pin_power_ctls(codec, cfg->hp_outs, cfg->hp_pins); sync_all_pin_power_ctls()
4126 if (cfg->line_out_type != AUTO_PIN_SPEAKER_OUT) sync_all_pin_power_ctls()
4127 sync_pin_power_ctls(codec, cfg->speaker_outs, cfg->speaker_pins); sync_all_pin_power_ctls()
4128 for (i = 0; i < cfg->num_inputs; i++) sync_all_pin_power_ctls()
4129 sync_pin_power_ctls(codec, 1, &cfg->inputs[i].pin); sync_all_pin_power_ctls()
4161 struct auto_pin_cfg *cfg = &spec->autocfg; add_fake_beep_paths() local
4167 err = add_fake_paths(codec, nid, cfg->line_outs, cfg->line_out_pins); add_fake_beep_paths()
4170 if (cfg->line_out_type != AUTO_PIN_HP_OUT) { add_fake_beep_paths()
4171 err = add_fake_paths(codec, nid, cfg->hp_outs, cfg->hp_pins); add_fake_beep_paths()
4175 if (cfg->line_out_type != AUTO_PIN_SPEAKER_OUT) { add_fake_beep_paths()
4176 err = add_fake_paths(codec, nid, cfg->speaker_outs, add_fake_beep_paths()
4177 cfg->speaker_pins); add_fake_beep_paths()
4576 struct auto_pin_cfg *cfg = &spec->autocfg; check_auto_mute_availability() local
4583 if (cfg->hp_pins[0]) check_auto_mute_availability()
4585 if (cfg->line_out_pins[0]) check_auto_mute_availability()
4587 if (cfg->speaker_pins[0]) check_auto_mute_availability()
4592 if (!cfg->speaker_pins[0] && check_auto_mute_availability()
4593 cfg->line_out_type == AUTO_PIN_SPEAKER_OUT) { check_auto_mute_availability()
4594 memcpy(cfg->speaker_pins, cfg->line_out_pins, check_auto_mute_availability()
4595 sizeof(cfg->speaker_pins)); check_auto_mute_availability()
4596 cfg->speaker_outs = cfg->line_outs; check_auto_mute_availability()
4599 if (!cfg->hp_pins[0] && check_auto_mute_availability()
4600 cfg->line_out_type == AUTO_PIN_HP_OUT) { check_auto_mute_availability()
4601 memcpy(cfg->hp_pins, cfg->line_out_pins, check_auto_mute_availability()
4602 sizeof(cfg->hp_pins)); check_auto_mute_availability()
4603 cfg->hp_outs = cfg->line_outs; check_auto_mute_availability()
4606 for (i = 0; i < cfg->hp_outs; i++) { check_auto_mute_availability()
4607 hda_nid_t nid = cfg->hp_pins[i]; check_auto_mute_availability()
4616 if (cfg->line_out_type == AUTO_PIN_LINE_OUT && cfg->line_outs) { check_auto_mute_availability()
4617 if (cfg->speaker_outs) check_auto_mute_availability()
4618 for (i = 0; i < cfg->line_outs; i++) { check_auto_mute_availability()
4619 hda_nid_t nid = cfg->line_out_pins[i]; check_auto_mute_availability()
4630 spec->automute_speaker_possible = cfg->speaker_outs && check_auto_mute_availability()
4683 struct auto_pin_cfg *cfg = &spec->autocfg; check_auto_mic_availability() local
4692 for (i = 0; i < cfg->num_inputs; i++) { check_auto_mic_availability()
4693 hda_nid_t nid = cfg->inputs[i].pin; check_auto_mic_availability()
4701 if (cfg->inputs[i].type != AUTO_PIN_MIC) check_auto_mic_availability()
4707 if (cfg->inputs[i].type > AUTO_PIN_LINE_IN) check_auto_mic_availability()
4710 cfg->inputs[i].type != AUTO_PIN_MIC) check_auto_mic_availability()
4811 * @cfg: Parsed pin configuration
4817 struct auto_pin_cfg *cfg) snd_hda_gen_parse_auto_config()
4827 if (cfg != &spec->autocfg) { snd_hda_gen_parse_auto_config()
4828 spec->autocfg = *cfg; snd_hda_gen_parse_auto_config()
4829 cfg = &spec->autocfg; snd_hda_gen_parse_auto_config()
4839 if (!cfg->line_outs) { snd_hda_gen_parse_auto_config()
4840 if (cfg->dig_outs || cfg->dig_in_pin) { snd_hda_gen_parse_auto_config()
4845 if (!cfg->num_inputs && !cfg->dig_in_pin) snd_hda_gen_parse_auto_config()
4850 cfg->line_out_type == AUTO_PIN_SPEAKER_OUT && snd_hda_gen_parse_auto_config()
4851 cfg->line_outs <= cfg->hp_outs) { snd_hda_gen_parse_auto_config()
4853 cfg->speaker_outs = cfg->line_outs; snd_hda_gen_parse_auto_config()
4854 memcpy(cfg->speaker_pins, cfg->line_out_pins, snd_hda_gen_parse_auto_config()
4855 sizeof(cfg->speaker_pins)); snd_hda_gen_parse_auto_config()
4856 cfg->line_outs = cfg->hp_outs; snd_hda_gen_parse_auto_config()
4857 memcpy(cfg->line_out_pins, cfg->hp_pins, sizeof(cfg->hp_pins)); snd_hda_gen_parse_auto_config()
4858 cfg->hp_outs = 0; snd_hda_gen_parse_auto_config()
4859 memset(cfg->hp_pins, 0, sizeof(cfg->hp_pins)); snd_hda_gen_parse_auto_config()
4860 cfg->line_out_type = AUTO_PIN_HP_OUT; snd_hda_gen_parse_auto_config()
4869 err = create_multi_out_ctls(codec, cfg); snd_hda_gen_parse_auto_config()
4896 if (cfg->line_out_type != AUTO_PIN_SPEAKER_OUT) snd_hda_gen_parse_auto_config()
4898 cfg->speaker_outs * 2); snd_hda_gen_parse_auto_config()
4899 if (cfg->line_out_type != AUTO_PIN_HP_OUT) snd_hda_gen_parse_auto_config()
4901 cfg->hp_outs * 2); snd_hda_gen_parse_auto_config()
4949 if (cfg->line_out_type != AUTO_PIN_SPEAKER_OUT) { snd_hda_gen_parse_auto_config()
4950 err = create_out_jack_modes(codec, cfg->line_outs, snd_hda_gen_parse_auto_config()
4951 cfg->line_out_pins); snd_hda_gen_parse_auto_config()
4955 if (cfg->line_out_type != AUTO_PIN_HP_OUT) { snd_hda_gen_parse_auto_config()
4956 err = create_out_jack_modes(codec, cfg->hp_outs, snd_hda_gen_parse_auto_config()
4957 cfg->hp_pins); snd_hda_gen_parse_auto_config()
5731 struct auto_pin_cfg *cfg = &spec->autocfg; init_analog_input() local
5734 for (i = 0; i < cfg->num_inputs; i++) { init_analog_input()
5735 hda_nid_t nid = cfg->inputs[i].pin; init_analog_input()
1869 debug_show_configs(struct hda_codec *codec, struct auto_pin_cfg *cfg) debug_show_configs() argument
2061 create_multi_out_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg) create_multi_out_ctls() argument
4816 snd_hda_gen_parse_auto_config(struct hda_codec *codec, struct auto_pin_cfg *cfg) snd_hda_gen_parse_auto_config() argument
H A Dhda_jack.c468 const struct auto_pin_cfg *cfg, add_jack_kctl()
489 snd_hda_get_pin_label(codec, nid, cfg, name, sizeof(name), &idx); add_jack_kctl()
506 * @cfg: pin config table to parse
509 const struct auto_pin_cfg *cfg) snd_hda_jack_add_kctls()
514 for (i = 0; i < cfg->num_inputs; i++) { snd_hda_jack_add_kctls()
517 if (cfg->inputs[i].is_headphone_mic) { snd_hda_jack_add_kctls()
518 if (auto_cfg_hp_outs(cfg) == 1) snd_hda_jack_add_kctls()
519 err = add_jack_kctl(codec, auto_cfg_hp_pins(cfg)[0], snd_hda_jack_add_kctls()
520 cfg, "Headphone Mic"); snd_hda_jack_add_kctls()
522 err = add_jack_kctl(codec, cfg->inputs[i].pin, snd_hda_jack_add_kctls()
523 cfg, "Headphone Mic"); snd_hda_jack_add_kctls()
525 err = add_jack_kctl(codec, cfg->inputs[i].pin, cfg, snd_hda_jack_add_kctls()
531 for (i = 0, p = cfg->line_out_pins; i < cfg->line_outs; i++, p++) { snd_hda_jack_add_kctls()
532 err = add_jack_kctl(codec, *p, cfg, NULL); snd_hda_jack_add_kctls()
536 for (i = 0, p = cfg->hp_pins; i < cfg->hp_outs; i++, p++) { snd_hda_jack_add_kctls()
537 if (*p == *cfg->line_out_pins) /* might be duplicated */ snd_hda_jack_add_kctls()
539 err = add_jack_kctl(codec, *p, cfg, NULL); snd_hda_jack_add_kctls()
543 for (i = 0, p = cfg->speaker_pins; i < cfg->speaker_outs; i++, p++) { snd_hda_jack_add_kctls()
544 if (*p == *cfg->line_out_pins) /* might be duplicated */ snd_hda_jack_add_kctls()
546 err = add_jack_kctl(codec, *p, cfg, NULL); snd_hda_jack_add_kctls()
550 for (i = 0, p = cfg->dig_out_pins; i < cfg->dig_outs; i++, p++) { snd_hda_jack_add_kctls()
551 err = add_jack_kctl(codec, *p, cfg, NULL); snd_hda_jack_add_kctls()
555 err = add_jack_kctl(codec, cfg->dig_in_pin, cfg, NULL); snd_hda_jack_add_kctls()
558 err = add_jack_kctl(codec, cfg->mono_out_pin, cfg, NULL); snd_hda_jack_add_kctls()
467 add_jack_kctl(struct hda_codec *codec, hda_nid_t nid, const struct auto_pin_cfg *cfg, const char *base_name) add_jack_kctl() argument
508 snd_hda_jack_add_kctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg) snd_hda_jack_add_kctls() argument
/linux-4.1.27/arch/arm/mach-davinci/
H A Dmux.c38 const struct mux_config *cfg; davinci_cfg_reg() local
58 cfg = &soc_info->pinmux_pins[index]; davinci_cfg_reg()
60 if (cfg->name == NULL) { davinci_cfg_reg()
66 if (cfg->mask) { davinci_cfg_reg()
70 reg_orig = __raw_readl(pinmux_base + cfg->mux_reg); davinci_cfg_reg()
72 mask = (cfg->mask << cfg->mask_offset); davinci_cfg_reg()
76 tmp2 = (cfg->mode << cfg->mask_offset); davinci_cfg_reg()
82 __raw_writel(reg, pinmux_base + cfg->mux_reg); davinci_cfg_reg()
88 pr_warn("initialized %s\n", cfg->name); davinci_cfg_reg()
93 if (cfg->debug || warn) { davinci_cfg_reg()
94 pr_warn("Setting register %s\n", cfg->name); davinci_cfg_reg()
96 cfg->mux_reg_name, cfg->mux_reg, reg_orig, reg); davinci_cfg_reg()
/linux-4.1.27/drivers/gpu/drm/exynos/
H A Dexynos_drm_gsc.c84 #define gsc_write(cfg, offset) writel(cfg, ctx->regs + (offset))
400 u32 cfg; gsc_sw_reset() local
404 cfg = (GSC_SW_RESET_SRESET); gsc_sw_reset()
405 gsc_write(cfg, GSC_SW_RESET); gsc_sw_reset()
409 cfg = gsc_read(GSC_SW_RESET); gsc_sw_reset()
410 if (!cfg) gsc_sw_reset()
415 if (cfg) { gsc_sw_reset()
421 cfg = gsc_read(GSC_IN_BASE_ADDR_Y_MASK); gsc_sw_reset()
422 cfg |= (GSC_IN_BASE_ADDR_MASK | gsc_sw_reset()
424 gsc_write(cfg, GSC_IN_BASE_ADDR_Y_MASK); gsc_sw_reset()
425 gsc_write(cfg, GSC_IN_BASE_ADDR_CB_MASK); gsc_sw_reset()
426 gsc_write(cfg, GSC_IN_BASE_ADDR_CR_MASK); gsc_sw_reset()
428 cfg = gsc_read(GSC_OUT_BASE_ADDR_Y_MASK); gsc_sw_reset()
429 cfg |= (GSC_OUT_BASE_ADDR_MASK | gsc_sw_reset()
431 gsc_write(cfg, GSC_OUT_BASE_ADDR_Y_MASK); gsc_sw_reset()
432 gsc_write(cfg, GSC_OUT_BASE_ADDR_CB_MASK); gsc_sw_reset()
433 gsc_write(cfg, GSC_OUT_BASE_ADDR_CR_MASK); gsc_sw_reset()
457 u32 cfg; gsc_handle_irq() local
462 cfg = gsc_read(GSC_IRQ); gsc_handle_irq()
463 cfg |= (GSC_IRQ_OR_MASK | GSC_IRQ_FRMDONE_MASK); gsc_handle_irq()
466 cfg |= GSC_IRQ_ENABLE; gsc_handle_irq()
468 cfg &= ~GSC_IRQ_ENABLE; gsc_handle_irq()
471 cfg &= ~GSC_IRQ_OR_MASK; gsc_handle_irq()
473 cfg |= GSC_IRQ_OR_MASK; gsc_handle_irq()
476 cfg &= ~GSC_IRQ_FRMDONE_MASK; gsc_handle_irq()
478 cfg |= GSC_IRQ_FRMDONE_MASK; gsc_handle_irq()
480 gsc_write(cfg, GSC_IRQ); gsc_handle_irq()
488 u32 cfg; gsc_src_set_fmt() local
492 cfg = gsc_read(GSC_IN_CON); gsc_src_set_fmt()
493 cfg &= ~(GSC_IN_RGB_TYPE_MASK | GSC_IN_YUV422_1P_ORDER_MASK | gsc_src_set_fmt()
500 cfg |= GSC_IN_RGB565; gsc_src_set_fmt()
503 cfg |= GSC_IN_XRGB8888; gsc_src_set_fmt()
506 cfg |= (GSC_IN_XRGB8888 | GSC_IN_RB_SWAP); gsc_src_set_fmt()
509 cfg |= (GSC_IN_YUV422_1P | gsc_src_set_fmt()
514 cfg |= (GSC_IN_YUV422_1P | gsc_src_set_fmt()
519 cfg |= (GSC_IN_YUV422_1P | gsc_src_set_fmt()
524 cfg |= (GSC_IN_YUV422_1P | gsc_src_set_fmt()
530 cfg |= (GSC_IN_CHROMA_ORDER_CRCB | gsc_src_set_fmt()
534 cfg |= GSC_IN_YUV422_3P; gsc_src_set_fmt()
538 cfg |= GSC_IN_YUV420_3P; gsc_src_set_fmt()
542 cfg |= (GSC_IN_CHROMA_ORDER_CBCR | gsc_src_set_fmt()
550 gsc_write(cfg, GSC_IN_CON); gsc_src_set_fmt()
561 u32 cfg; gsc_src_set_transf() local
565 cfg = gsc_read(GSC_IN_CON); gsc_src_set_transf()
566 cfg &= ~GSC_IN_ROT_MASK; gsc_src_set_transf()
571 cfg |= GSC_IN_ROT_XFLIP; gsc_src_set_transf()
573 cfg |= GSC_IN_ROT_YFLIP; gsc_src_set_transf()
577 cfg |= GSC_IN_ROT_90_XFLIP; gsc_src_set_transf()
579 cfg |= GSC_IN_ROT_90_YFLIP; gsc_src_set_transf()
581 cfg |= GSC_IN_ROT_90; gsc_src_set_transf()
584 cfg |= GSC_IN_ROT_180; gsc_src_set_transf()
587 cfg |= GSC_IN_ROT_270; gsc_src_set_transf()
594 gsc_write(cfg, GSC_IN_CON); gsc_src_set_transf()
596 ctx->rotation = cfg & gsc_src_set_transf()
609 u32 cfg; gsc_src_set_size() local
620 cfg = (GSC_SRCIMG_OFFSET_X(img_pos.x) | gsc_src_set_size()
622 gsc_write(cfg, GSC_SRCIMG_OFFSET); gsc_src_set_size()
625 cfg = (GSC_CROPPED_WIDTH(img_pos.w) | gsc_src_set_size()
627 gsc_write(cfg, GSC_CROPPED_SIZE); gsc_src_set_size()
632 cfg = gsc_read(GSC_SRCIMG_SIZE); gsc_src_set_size()
633 cfg &= ~(GSC_SRCIMG_HEIGHT_MASK | gsc_src_set_size()
636 cfg |= (GSC_SRCIMG_WIDTH(sz->hsize) | gsc_src_set_size()
639 gsc_write(cfg, GSC_SRCIMG_SIZE); gsc_src_set_size()
641 cfg = gsc_read(GSC_IN_CON); gsc_src_set_size()
642 cfg &= ~GSC_IN_RGB_TYPE_MASK; gsc_src_set_size()
648 cfg |= GSC_IN_RGB_HD_WIDE; gsc_src_set_size()
650 cfg |= GSC_IN_RGB_HD_NARROW; gsc_src_set_size()
653 cfg |= GSC_IN_RGB_SD_WIDE; gsc_src_set_size()
655 cfg |= GSC_IN_RGB_SD_NARROW; gsc_src_set_size()
657 gsc_write(cfg, GSC_IN_CON); gsc_src_set_size()
667 u32 cfg; gsc_src_set_buf_seq() local
673 cfg = gsc_read(GSC_IN_BASE_ADDR_Y_MASK); gsc_src_set_buf_seq()
688 cfg &= ~mask; gsc_src_set_buf_seq()
689 cfg |= masked << buf_id; gsc_src_set_buf_seq()
690 gsc_write(cfg, GSC_IN_BASE_ADDR_Y_MASK); gsc_src_set_buf_seq()
691 gsc_write(cfg, GSC_IN_BASE_ADDR_CB_MASK); gsc_src_set_buf_seq()
692 gsc_write(cfg, GSC_IN_BASE_ADDR_CR_MASK); gsc_src_set_buf_seq()
755 u32 cfg; gsc_dst_set_fmt() local
759 cfg = gsc_read(GSC_OUT_CON); gsc_dst_set_fmt()
760 cfg &= ~(GSC_OUT_RGB_TYPE_MASK | GSC_OUT_YUV422_1P_ORDER_MASK | gsc_dst_set_fmt()
767 cfg |= GSC_OUT_RGB565; gsc_dst_set_fmt()
770 cfg |= GSC_OUT_XRGB8888; gsc_dst_set_fmt()
773 cfg |= (GSC_OUT_XRGB8888 | GSC_OUT_RB_SWAP); gsc_dst_set_fmt()
776 cfg |= (GSC_OUT_YUV422_1P | gsc_dst_set_fmt()
781 cfg |= (GSC_OUT_YUV422_1P | gsc_dst_set_fmt()
786 cfg |= (GSC_OUT_YUV422_1P | gsc_dst_set_fmt()
791 cfg |= (GSC_OUT_YUV422_1P | gsc_dst_set_fmt()
797 cfg |= (GSC_OUT_CHROMA_ORDER_CRCB | GSC_OUT_YUV420_2P); gsc_dst_set_fmt()
802 cfg |= GSC_OUT_YUV420_3P; gsc_dst_set_fmt()
806 cfg |= (GSC_OUT_CHROMA_ORDER_CBCR | gsc_dst_set_fmt()
814 gsc_write(cfg, GSC_OUT_CON); gsc_dst_set_fmt()
825 u32 cfg; gsc_dst_set_transf() local
829 cfg = gsc_read(GSC_IN_CON); gsc_dst_set_transf()
830 cfg &= ~GSC_IN_ROT_MASK; gsc_dst_set_transf()
835 cfg |= GSC_IN_ROT_XFLIP; gsc_dst_set_transf()
837 cfg |= GSC_IN_ROT_YFLIP; gsc_dst_set_transf()
841 cfg |= GSC_IN_ROT_90_XFLIP; gsc_dst_set_transf()
843 cfg |= GSC_IN_ROT_90_YFLIP; gsc_dst_set_transf()
845 cfg |= GSC_IN_ROT_90; gsc_dst_set_transf()
848 cfg |= GSC_IN_ROT_180; gsc_dst_set_transf()
851 cfg |= GSC_IN_ROT_270; gsc_dst_set_transf()
858 gsc_write(cfg, GSC_IN_CON); gsc_dst_set_transf()
860 ctx->rotation = cfg & gsc_dst_set_transf()
905 u32 cfg; gsc_set_prescaler() local
946 cfg = (GSC_PRESC_SHFACTOR(sc->pre_shfactor) | gsc_set_prescaler()
949 gsc_write(cfg, GSC_PRE_SCALE_RATIO); gsc_set_prescaler()
1008 u32 cfg; gsc_set_scaler() local
1014 cfg = GSC_MAIN_H_RATIO_VALUE(sc->main_hratio); gsc_set_scaler()
1015 gsc_write(cfg, GSC_MAIN_H_RATIO); gsc_set_scaler()
1018 cfg = GSC_MAIN_V_RATIO_VALUE(sc->main_vratio); gsc_set_scaler()
1019 gsc_write(cfg, GSC_MAIN_V_RATIO); gsc_set_scaler()
1028 u32 cfg; gsc_dst_set_size() local
1039 cfg = (GSC_DSTIMG_OFFSET_X(pos->x) | gsc_dst_set_size()
1041 gsc_write(cfg, GSC_DSTIMG_OFFSET); gsc_dst_set_size()
1044 cfg = (GSC_SCALED_WIDTH(img_pos.w) | GSC_SCALED_HEIGHT(img_pos.h)); gsc_dst_set_size()
1045 gsc_write(cfg, GSC_SCALED_SIZE); gsc_dst_set_size()
1050 cfg = gsc_read(GSC_DSTIMG_SIZE); gsc_dst_set_size()
1051 cfg &= ~(GSC_DSTIMG_HEIGHT_MASK | gsc_dst_set_size()
1053 cfg |= (GSC_DSTIMG_WIDTH(sz->hsize) | gsc_dst_set_size()
1055 gsc_write(cfg, GSC_DSTIMG_SIZE); gsc_dst_set_size()
1057 cfg = gsc_read(GSC_OUT_CON); gsc_dst_set_size()
1058 cfg &= ~GSC_OUT_RGB_TYPE_MASK; gsc_dst_set_size()
1064 cfg |= GSC_OUT_RGB_HD_WIDE; gsc_dst_set_size()
1066 cfg |= GSC_OUT_RGB_HD_NARROW; gsc_dst_set_size()
1069 cfg |= GSC_OUT_RGB_SD_WIDE; gsc_dst_set_size()
1071 cfg |= GSC_OUT_RGB_SD_NARROW; gsc_dst_set_size()
1073 gsc_write(cfg, GSC_OUT_CON); gsc_dst_set_size()
1080 u32 cfg, i, buf_num = GSC_REG_SZ; gsc_dst_get_buf_seq() local
1083 cfg = gsc_read(GSC_OUT_BASE_ADDR_Y_MASK); gsc_dst_get_buf_seq()
1086 if (cfg & (mask << i)) gsc_dst_get_buf_seq()
1099 u32 cfg; gsc_dst_set_buf_seq() local
1108 cfg = gsc_read(GSC_OUT_BASE_ADDR_Y_MASK); gsc_dst_set_buf_seq()
1124 cfg &= ~mask; gsc_dst_set_buf_seq()
1125 cfg |= masked << buf_id; gsc_dst_set_buf_seq()
1126 gsc_write(cfg, GSC_OUT_BASE_ADDR_Y_MASK); gsc_dst_set_buf_seq()
1127 gsc_write(cfg, GSC_OUT_BASE_ADDR_CB_MASK); gsc_dst_set_buf_seq()
1128 gsc_write(cfg, GSC_OUT_BASE_ADDR_CR_MASK); gsc_dst_set_buf_seq()
1216 u32 cfg, curr_index, i; gsc_get_src_buf_index() local
1222 cfg = gsc_read(GSC_IN_BASE_ADDR_Y_MASK); gsc_get_src_buf_index()
1223 curr_index = GSC_IN_CURR_GET_INDEX(cfg); gsc_get_src_buf_index()
1226 if (!((cfg >> i) & 0x1)) { gsc_get_src_buf_index()
1243 DRM_DEBUG_KMS("cfg[0x%x]curr_index[%d]buf_id[%d]\n", cfg, gsc_get_src_buf_index()
1251 u32 cfg, curr_index, i; gsc_get_dst_buf_index() local
1257 cfg = gsc_read(GSC_OUT_BASE_ADDR_Y_MASK); gsc_get_dst_buf_index()
1258 curr_index = GSC_OUT_CURR_GET_INDEX(cfg); gsc_get_dst_buf_index()
1261 if (!((cfg >> i) & 0x1)) { gsc_get_dst_buf_index()
1278 DRM_DEBUG_KMS("cfg[0x%x]curr_index[%d]buf_id[%d]\n", cfg, gsc_get_dst_buf_index()
1515 u32 cfg; gsc_ippdrv_start() local
1537 cfg = gsc_read(GSC_ENABLE);
1538 cfg &= ~(GSC_ENABLE_ON_CLEAR_MASK |
1540 cfg |= GSC_ENABLE_ON_CLEAR_ONESHOT;
1541 gsc_write(cfg, GSC_ENABLE);
1544 cfg = gsc_read(GSC_IN_CON);
1545 cfg &= ~(GSC_IN_PATH_MASK | GSC_IN_LOCAL_SEL_MASK);
1546 cfg |= GSC_IN_PATH_MEMORY;
1547 gsc_write(cfg, GSC_IN_CON);
1550 cfg = gsc_read(GSC_OUT_CON);
1551 cfg |= GSC_OUT_PATH_MEMORY;
1552 gsc_write(cfg, GSC_OUT_CON);
1561 cfg = gsc_read(GSC_IN_CON);
1562 cfg &= ~(GSC_IN_PATH_MASK | GSC_IN_LOCAL_SEL_MASK);
1563 cfg |= (GSC_IN_PATH_LOCAL | GSC_IN_LOCAL_FIMD_WB);
1564 gsc_write(cfg, GSC_IN_CON);
1567 cfg = gsc_read(GSC_OUT_CON);
1568 cfg |= GSC_OUT_PATH_MEMORY;
1569 gsc_write(cfg, GSC_OUT_CON);
1573 cfg = gsc_read(GSC_IN_CON);
1574 cfg &= ~(GSC_IN_PATH_MASK | GSC_IN_LOCAL_SEL_MASK);
1575 cfg |= GSC_IN_PATH_MEMORY;
1576 gsc_write(cfg, GSC_IN_CON);
1579 cfg = gsc_read(GSC_OUT_CON);
1580 cfg |= GSC_OUT_PATH_MEMORY;
1581 gsc_write(cfg, GSC_OUT_CON);
1599 cfg = gsc_read(GSC_ENABLE);
1600 cfg |= GSC_ENABLE_ON;
1601 gsc_write(cfg, GSC_ENABLE);
1610 u32 cfg; gsc_ippdrv_stop() local
1635 cfg = gsc_read(GSC_ENABLE); gsc_ippdrv_stop()
1636 cfg &= ~GSC_ENABLE_ON; gsc_ippdrv_stop()
1637 gsc_write(cfg, GSC_ENABLE); gsc_ippdrv_stop()
H A Dexynos_drm_fimc.c198 u32 cfg; fimc_sw_reset() local
201 cfg = fimc_read(ctx, EXYNOS_CISTATUS); fimc_sw_reset()
202 if (EXYNOS_CISTATUS_GET_ENVID_STATUS(cfg)) fimc_sw_reset()
230 u32 cfg; fimc_set_type_ctrl() local
234 cfg = fimc_read(ctx, EXYNOS_CIGCTRL); fimc_set_type_ctrl()
235 cfg &= ~(EXYNOS_CIGCTRL_TESTPATTERN_MASK | fimc_set_type_ctrl()
244 cfg |= (EXYNOS_CIGCTRL_SELWRITEBACK_A | fimc_set_type_ctrl()
248 cfg |= (EXYNOS_CIGCTRL_SELWRITEBACK_B | fimc_set_type_ctrl()
253 cfg |= (EXYNOS_CIGCTRL_SELCAM_ITU_A | fimc_set_type_ctrl()
260 fimc_write(ctx, cfg, EXYNOS_CIGCTRL); fimc_set_type_ctrl()
266 u32 cfg; fimc_set_polarity() local
273 cfg = fimc_read(ctx, EXYNOS_CIGCTRL); fimc_set_polarity()
274 cfg &= ~(EXYNOS_CIGCTRL_INVPOLPCLK | EXYNOS_CIGCTRL_INVPOLVSYNC | fimc_set_polarity()
278 cfg |= EXYNOS_CIGCTRL_INVPOLPCLK; fimc_set_polarity()
280 cfg |= EXYNOS_CIGCTRL_INVPOLVSYNC; fimc_set_polarity()
282 cfg |= EXYNOS_CIGCTRL_INVPOLHREF; fimc_set_polarity()
284 cfg |= EXYNOS_CIGCTRL_INVPOLHSYNC; fimc_set_polarity()
286 fimc_write(ctx, cfg, EXYNOS_CIGCTRL); fimc_set_polarity()
291 u32 cfg; fimc_handle_jpeg() local
295 cfg = fimc_read(ctx, EXYNOS_CIGCTRL); fimc_handle_jpeg()
297 cfg |= EXYNOS_CIGCTRL_CAM_JPEG; fimc_handle_jpeg()
299 cfg &= ~EXYNOS_CIGCTRL_CAM_JPEG; fimc_handle_jpeg()
301 fimc_write(ctx, cfg, EXYNOS_CIGCTRL); fimc_handle_jpeg()
306 u32 cfg; fimc_mask_irq() local
310 cfg = fimc_read(ctx, EXYNOS_CIGCTRL); fimc_mask_irq()
312 cfg &= ~EXYNOS_CIGCTRL_IRQ_OVFEN; fimc_mask_irq()
313 cfg |= EXYNOS_CIGCTRL_IRQ_ENABLE | EXYNOS_CIGCTRL_IRQ_LEVEL; fimc_mask_irq()
315 cfg &= ~EXYNOS_CIGCTRL_IRQ_ENABLE; fimc_mask_irq()
316 fimc_write(ctx, cfg, EXYNOS_CIGCTRL); fimc_mask_irq()
350 u32 cfg; fimc_check_frame_end() local
352 cfg = fimc_read(ctx, EXYNOS_CISTATUS); fimc_check_frame_end()
354 DRM_DEBUG_KMS("cfg[0x%x]\n", cfg); fimc_check_frame_end()
356 if (!(cfg & EXYNOS_CISTATUS_FRAMEEND)) fimc_check_frame_end()
359 cfg &= ~(EXYNOS_CISTATUS_FRAMEEND); fimc_check_frame_end()
360 fimc_write(ctx, cfg, EXYNOS_CISTATUS); fimc_check_frame_end()
367 u32 cfg; fimc_get_buf_id() local
370 cfg = fimc_read(ctx, EXYNOS_CISTATUS2); fimc_get_buf_id()
371 frame_cnt = EXYNOS_CISTATUS2_GET_FRAMECOUNT_BEFORE(cfg); fimc_get_buf_id()
374 frame_cnt = EXYNOS_CISTATUS2_GET_FRAMECOUNT_PRESENT(cfg); fimc_get_buf_id()
377 EXYNOS_CISTATUS2_GET_FRAMECOUNT_PRESENT(cfg), fimc_get_buf_id()
378 EXYNOS_CISTATUS2_GET_FRAMECOUNT_BEFORE(cfg)); fimc_get_buf_id()
393 u32 cfg; fimc_handle_lastend() local
397 cfg = fimc_read(ctx, EXYNOS_CIOCTRL); fimc_handle_lastend()
399 cfg |= EXYNOS_CIOCTRL_LASTENDEN; fimc_handle_lastend()
401 cfg &= ~EXYNOS_CIOCTRL_LASTENDEN; fimc_handle_lastend()
403 fimc_write(ctx, cfg, EXYNOS_CIOCTRL); fimc_handle_lastend()
410 u32 cfg; fimc_src_set_fmt_order() local
415 cfg = fimc_read(ctx, EXYNOS_CISCCTRL); fimc_src_set_fmt_order()
416 cfg &= ~EXYNOS_CISCCTRL_INRGB_FMT_RGB_MASK; fimc_src_set_fmt_order()
420 cfg |= EXYNOS_CISCCTRL_INRGB_FMT_RGB565; fimc_src_set_fmt_order()
421 fimc_write(ctx, cfg, EXYNOS_CISCCTRL); fimc_src_set_fmt_order()
425 cfg |= EXYNOS_CISCCTRL_INRGB_FMT_RGB888; fimc_src_set_fmt_order()
426 fimc_write(ctx, cfg, EXYNOS_CISCCTRL); fimc_src_set_fmt_order()
434 cfg = fimc_read(ctx, EXYNOS_MSCTRL); fimc_src_set_fmt_order()
435 cfg &= ~(EXYNOS_MSCTRL_ORDER2P_SHIFT_MASK | fimc_src_set_fmt_order()
441 cfg |= EXYNOS_MSCTRL_ORDER422_YCBYCR; fimc_src_set_fmt_order()
444 cfg |= EXYNOS_MSCTRL_ORDER422_YCRYCB; fimc_src_set_fmt_order()
447 cfg |= EXYNOS_MSCTRL_ORDER422_CBYCRY; fimc_src_set_fmt_order()
451 cfg |= EXYNOS_MSCTRL_ORDER422_CRYCBY; fimc_src_set_fmt_order()
455 cfg |= (EXYNOS_MSCTRL_ORDER2P_LSB_CRCB | fimc_src_set_fmt_order()
461 cfg |= EXYNOS_MSCTRL_C_INT_IN_3PLANE; fimc_src_set_fmt_order()
465 cfg |= (EXYNOS_MSCTRL_ORDER2P_LSB_CBCR | fimc_src_set_fmt_order()
473 fimc_write(ctx, cfg, EXYNOS_MSCTRL); fimc_src_set_fmt_order()
482 u32 cfg; fimc_src_set_fmt() local
486 cfg = fimc_read(ctx, EXYNOS_MSCTRL); fimc_src_set_fmt()
487 cfg &= ~EXYNOS_MSCTRL_INFORMAT_RGB; fimc_src_set_fmt()
493 cfg |= EXYNOS_MSCTRL_INFORMAT_RGB; fimc_src_set_fmt()
496 cfg |= EXYNOS_MSCTRL_INFORMAT_YCBCR420; fimc_src_set_fmt()
502 cfg |= EXYNOS_MSCTRL_INFORMAT_YCBCR422_1PLANE; fimc_src_set_fmt()
507 cfg |= EXYNOS_MSCTRL_INFORMAT_YCBCR422; fimc_src_set_fmt()
513 cfg |= EXYNOS_MSCTRL_INFORMAT_YCBCR420; fimc_src_set_fmt()
520 fimc_write(ctx, cfg, EXYNOS_MSCTRL); fimc_src_set_fmt()
522 cfg = fimc_read(ctx, EXYNOS_CIDMAPARAM); fimc_src_set_fmt()
523 cfg &= ~EXYNOS_CIDMAPARAM_R_MODE_MASK; fimc_src_set_fmt()
525 cfg |= EXYNOS_CIDMAPARAM_R_MODE_LINEAR; fimc_src_set_fmt()
527 fimc_write(ctx, cfg, EXYNOS_CIDMAPARAM); fimc_src_set_fmt()
595 u32 cfg, h1, h2, v1, v2; fimc_set_window() local
611 cfg = fimc_read(ctx, EXYNOS_CIWDOFST); fimc_set_window()
612 cfg &= ~(EXYNOS_CIWDOFST_WINHOROFST_MASK | fimc_set_window()
614 cfg |= (EXYNOS_CIWDOFST_WINHOROFST(h1) | fimc_set_window()
616 cfg |= EXYNOS_CIWDOFST_WINOFSEN; fimc_set_window()
617 fimc_write(ctx, cfg, EXYNOS_CIWDOFST); fimc_set_window()
619 cfg = (EXYNOS_CIWDOFST2_WINHOROFST2(h2) | fimc_set_window()
621 fimc_write(ctx, cfg, EXYNOS_CIWDOFST2); fimc_set_window()
632 u32 cfg; fimc_src_set_size() local
638 cfg = (EXYNOS_ORGISIZE_HORIZONTAL(img_sz.hsize) | fimc_src_set_size()
641 fimc_write(ctx, cfg, EXYNOS_ORGISIZE); fimc_src_set_size()
653 cfg = fimc_read(ctx, EXYNOS_CIREAL_ISIZE); fimc_src_set_size()
654 cfg &= ~(EXYNOS_CIREAL_ISIZE_HEIGHT_MASK | fimc_src_set_size()
656 cfg |= (EXYNOS_CIREAL_ISIZE_WIDTH(img_pos.w) | fimc_src_set_size()
658 fimc_write(ctx, cfg, EXYNOS_CIREAL_ISIZE); fimc_src_set_size()
664 cfg = (EXYNOS_CISRCFMT_ITU601_8BIT | fimc_src_set_size()
667 fimc_write(ctx, cfg, EXYNOS_CISRCFMT); fimc_src_set_size()
670 cfg = (EXYNOS_CIIYOFF_HORIZONTAL(img_pos.x) | fimc_src_set_size()
672 fimc_write(ctx, cfg, EXYNOS_CIIYOFF); fimc_src_set_size()
673 cfg = (EXYNOS_CIICBOFF_HORIZONTAL(img_pos.x) | fimc_src_set_size()
675 fimc_write(ctx, cfg, EXYNOS_CIICBOFF); fimc_src_set_size()
676 cfg = (EXYNOS_CIICROFF_HORIZONTAL(img_pos.x) | fimc_src_set_size()
678 fimc_write(ctx, cfg, EXYNOS_CIICROFF); fimc_src_set_size()
750 u32 cfg; fimc_dst_set_fmt_order() local
755 cfg = fimc_read(ctx, EXYNOS_CISCCTRL); fimc_dst_set_fmt_order()
756 cfg &= ~EXYNOS_CISCCTRL_OUTRGB_FMT_RGB_MASK; fimc_dst_set_fmt_order()
760 cfg |= EXYNOS_CISCCTRL_OUTRGB_FMT_RGB565; fimc_dst_set_fmt_order()
761 fimc_write(ctx, cfg, EXYNOS_CISCCTRL); fimc_dst_set_fmt_order()
764 cfg |= EXYNOS_CISCCTRL_OUTRGB_FMT_RGB888; fimc_dst_set_fmt_order()
765 fimc_write(ctx, cfg, EXYNOS_CISCCTRL); fimc_dst_set_fmt_order()
768 cfg |= (EXYNOS_CISCCTRL_OUTRGB_FMT_RGB888 | fimc_dst_set_fmt_order()
770 fimc_write(ctx, cfg, EXYNOS_CISCCTRL); fimc_dst_set_fmt_order()
778 cfg = fimc_read(ctx, EXYNOS_CIOCTRL); fimc_dst_set_fmt_order()
779 cfg &= ~(EXYNOS_CIOCTRL_ORDER2P_MASK | fimc_dst_set_fmt_order()
785 cfg |= EXYNOS_CIOCTRL_ALPHA_OUT; fimc_dst_set_fmt_order()
788 cfg |= EXYNOS_CIOCTRL_ORDER422_YCBYCR; fimc_dst_set_fmt_order()
791 cfg |= EXYNOS_CIOCTRL_ORDER422_YCRYCB; fimc_dst_set_fmt_order()
794 cfg |= EXYNOS_CIOCTRL_ORDER422_CBYCRY; fimc_dst_set_fmt_order()
797 cfg |= EXYNOS_CIOCTRL_ORDER422_CRYCBY; fimc_dst_set_fmt_order()
801 cfg |= EXYNOS_CIOCTRL_ORDER2P_LSB_CRCB; fimc_dst_set_fmt_order()
802 cfg |= EXYNOS_CIOCTRL_YCBCR_2PLANE; fimc_dst_set_fmt_order()
807 cfg |= EXYNOS_CIOCTRL_YCBCR_3PLANE; fimc_dst_set_fmt_order()
811 cfg |= EXYNOS_CIOCTRL_ORDER2P_LSB_CBCR; fimc_dst_set_fmt_order()
812 cfg |= EXYNOS_CIOCTRL_YCBCR_2PLANE; fimc_dst_set_fmt_order()
819 fimc_write(ctx, cfg, EXYNOS_CIOCTRL); fimc_dst_set_fmt_order()
828 u32 cfg; fimc_dst_set_fmt() local
832 cfg = fimc_read(ctx, EXYNOS_CIEXTEN); fimc_dst_set_fmt()
835 cfg |= EXYNOS_CIEXTEN_YUV444_OUT; fimc_dst_set_fmt()
836 fimc_write(ctx, cfg, EXYNOS_CIEXTEN); fimc_dst_set_fmt()
838 cfg &= ~EXYNOS_CIEXTEN_YUV444_OUT; fimc_dst_set_fmt()
839 fimc_write(ctx, cfg, EXYNOS_CIEXTEN); fimc_dst_set_fmt()
841 cfg = fimc_read(ctx, EXYNOS_CITRGFMT); fimc_dst_set_fmt()
842 cfg &= ~EXYNOS_CITRGFMT_OUTFORMAT_MASK; fimc_dst_set_fmt()
848 cfg |= EXYNOS_CITRGFMT_OUTFORMAT_RGB; fimc_dst_set_fmt()
854 cfg |= EXYNOS_CITRGFMT_OUTFORMAT_YCBCR422_1PLANE; fimc_dst_set_fmt()
859 cfg |= EXYNOS_CITRGFMT_OUTFORMAT_YCBCR422; fimc_dst_set_fmt()
865 cfg |= EXYNOS_CITRGFMT_OUTFORMAT_YCBCR420; fimc_dst_set_fmt()
873 fimc_write(ctx, cfg, EXYNOS_CITRGFMT); fimc_dst_set_fmt()
876 cfg = fimc_read(ctx, EXYNOS_CIDMAPARAM); fimc_dst_set_fmt()
877 cfg &= ~EXYNOS_CIDMAPARAM_W_MODE_MASK; fimc_dst_set_fmt()
879 cfg |= EXYNOS_CIDMAPARAM_W_MODE_LINEAR; fimc_dst_set_fmt()
881 fimc_write(ctx, cfg, EXYNOS_CIDMAPARAM); fimc_dst_set_fmt()
892 u32 cfg; fimc_dst_set_transf() local
896 cfg = fimc_read(ctx, EXYNOS_CITRGFMT); fimc_dst_set_transf()
897 cfg &= ~EXYNOS_CITRGFMT_FLIP_MASK; fimc_dst_set_transf()
898 cfg &= ~EXYNOS_CITRGFMT_OUTROT90_CLOCKWISE; fimc_dst_set_transf()
903 cfg |= EXYNOS_CITRGFMT_FLIP_X_MIRROR; fimc_dst_set_transf()
905 cfg |= EXYNOS_CITRGFMT_FLIP_Y_MIRROR; fimc_dst_set_transf()
908 cfg |= EXYNOS_CITRGFMT_OUTROT90_CLOCKWISE; fimc_dst_set_transf()
910 cfg |= EXYNOS_CITRGFMT_FLIP_X_MIRROR; fimc_dst_set_transf()
912 cfg |= EXYNOS_CITRGFMT_FLIP_Y_MIRROR; fimc_dst_set_transf()
915 cfg |= (EXYNOS_CITRGFMT_FLIP_X_MIRROR | fimc_dst_set_transf()
918 cfg &= ~EXYNOS_CITRGFMT_FLIP_X_MIRROR; fimc_dst_set_transf()
920 cfg &= ~EXYNOS_CITRGFMT_FLIP_Y_MIRROR; fimc_dst_set_transf()
923 cfg |= (EXYNOS_CITRGFMT_OUTROT90_CLOCKWISE | fimc_dst_set_transf()
927 cfg &= ~EXYNOS_CITRGFMT_FLIP_X_MIRROR; fimc_dst_set_transf()
929 cfg &= ~EXYNOS_CITRGFMT_FLIP_Y_MIRROR; fimc_dst_set_transf()
936 fimc_write(ctx, cfg, EXYNOS_CITRGFMT); fimc_dst_set_transf()
937 *swap = (cfg & EXYNOS_CITRGFMT_OUTROT90_CLOCKWISE) ? 1 : 0; fimc_dst_set_transf()
946 u32 cfg, cfg_ext, shfactor; fimc_set_prescaler() local
998 cfg = (EXYNOS_CISCPRERATIO_SHFACTOR(shfactor) | fimc_set_prescaler()
1001 fimc_write(ctx, cfg, EXYNOS_CISCPRERATIO); fimc_set_prescaler()
1003 cfg = (EXYNOS_CISCPREDST_PREDSTWIDTH(pre_dst_width) | fimc_set_prescaler()
1005 fimc_write(ctx, cfg, EXYNOS_CISCPREDST); fimc_set_prescaler()
1012 u32 cfg, cfg_ext; fimc_set_scaler() local
1019 cfg = fimc_read(ctx, EXYNOS_CISCCTRL); fimc_set_scaler()
1020 cfg &= ~(EXYNOS_CISCCTRL_SCALERBYPASS | fimc_set_scaler()
1028 cfg |= (EXYNOS_CISCCTRL_CSCR2Y_WIDE | fimc_set_scaler()
1031 cfg |= EXYNOS_CISCCTRL_SCALERBYPASS; fimc_set_scaler()
1033 cfg |= EXYNOS_CISCCTRL_SCALEUP_H; fimc_set_scaler()
1035 cfg |= EXYNOS_CISCCTRL_SCALEUP_V; fimc_set_scaler()
1037 cfg |= (EXYNOS_CISCCTRL_MAINHORRATIO((sc->hratio >> 6)) | fimc_set_scaler()
1039 fimc_write(ctx, cfg, EXYNOS_CISCCTRL); fimc_set_scaler()
1055 u32 cfg; fimc_dst_set_size() local
1061 cfg = (EXYNOS_ORGOSIZE_HORIZONTAL(img_sz.hsize) | fimc_dst_set_size()
1064 fimc_write(ctx, cfg, EXYNOS_ORGOSIZE); fimc_dst_set_size()
1069 cfg = fimc_read(ctx, EXYNOS_CIGCTRL); fimc_dst_set_size()
1070 cfg &= ~EXYNOS_CIGCTRL_CSC_MASK; fimc_dst_set_size()
1073 cfg |= EXYNOS_CIGCTRL_CSC_ITU709; fimc_dst_set_size()
1075 cfg |= EXYNOS_CIGCTRL_CSC_ITU601; fimc_dst_set_size()
1077 fimc_write(ctx, cfg, EXYNOS_CIGCTRL); fimc_dst_set_size()
1087 cfg = fimc_read(ctx, EXYNOS_CITRGFMT); fimc_dst_set_size()
1088 cfg &= ~(EXYNOS_CITRGFMT_TARGETH_MASK | fimc_dst_set_size()
1090 cfg |= (EXYNOS_CITRGFMT_TARGETHSIZE(img_pos.w) | fimc_dst_set_size()
1092 fimc_write(ctx, cfg, EXYNOS_CITRGFMT); fimc_dst_set_size()
1095 cfg = EXYNOS_CITAREA_TARGET_AREA(img_pos.w * img_pos.h); fimc_dst_set_size()
1096 fimc_write(ctx, cfg, EXYNOS_CITAREA); fimc_dst_set_size()
1099 cfg = (EXYNOS_CIOYOFF_HORIZONTAL(img_pos.x) | fimc_dst_set_size()
1101 fimc_write(ctx, cfg, EXYNOS_CIOYOFF); fimc_dst_set_size()
1102 cfg = (EXYNOS_CIOCBOFF_HORIZONTAL(img_pos.x) | fimc_dst_set_size()
1104 fimc_write(ctx, cfg, EXYNOS_CIOCBOFF); fimc_dst_set_size()
1105 cfg = (EXYNOS_CIOCROFF_HORIZONTAL(img_pos.x) | fimc_dst_set_size()
1107 fimc_write(ctx, cfg, EXYNOS_CIOCROFF); fimc_dst_set_size()
1117 u32 cfg; fimc_dst_set_buf_seq() local
1123 cfg = fimc_read(ctx, EXYNOS_CIFCNTSEQ); fimc_dst_set_buf_seq()
1126 cfg |= (1 << buf_id); fimc_dst_set_buf_seq()
1128 cfg &= ~(1 << buf_id); fimc_dst_set_buf_seq()
1130 fimc_write(ctx, cfg, EXYNOS_CIFCNTSEQ); fimc_dst_set_buf_seq()
1132 buf_num = hweight32(cfg); fimc_dst_set_buf_seq()
1556 u32 cfg; fimc_ippdrv_stop() local
1563 cfg = fimc_read(ctx, EXYNOS_MSCTRL); fimc_ippdrv_stop()
1564 cfg &= ~EXYNOS_MSCTRL_INPUT_MASK; fimc_ippdrv_stop()
1565 cfg &= ~EXYNOS_MSCTRL_ENVID; fimc_ippdrv_stop()
1566 fimc_write(ctx, cfg, EXYNOS_MSCTRL); fimc_ippdrv_stop()
/linux-4.1.27/drivers/cpufreq/
H A Ds3c24xx-cpufreq-debugfs.c39 struct s3c_cpufreq_config *cfg; board_show() local
42 cfg = s3c_cpufreq_getconfig(); board_show()
43 if (!cfg) { board_show()
48 brd = cfg->board; board_show()
79 struct s3c_cpufreq_config *cfg; info_show() local
81 cfg = s3c_cpufreq_getconfig(); info_show()
82 if (!cfg) { info_show()
87 seq_printf(seq, " FCLK %ld Hz\n", cfg->freq.fclk); info_show()
89 cfg->freq.hclk, print_ns(cfg->freq.hclk_tns)); info_show()
90 seq_printf(seq, " PCLK %ld Hz\n", cfg->freq.hclk); info_show()
91 seq_printf(seq, "ARMCLK %ld Hz\n", cfg->freq.armclk); info_show()
94 show_max(seq, &cfg->max); info_show()
97 cfg->divs.h_divisor, cfg->divs.p_divisor, info_show()
98 cfg->divs.arm_divisor, cfg->divs.dvs ? "on" : "off"); info_show()
101 seq_printf(seq, "lock_pll=%u\n", cfg->lock_pll); info_show()
122 struct s3c_cpufreq_config *cfg; io_show() local
127 cfg = s3c_cpufreq_getconfig(); io_show()
128 if (!cfg) { io_show()
133 show_bank = cfg->info->debug_io_show; io_show()
145 seq_printf(seq, "hclk period is %lu.%lu ns\n", print_ns(cfg->freq.hclk_tns)); io_show()
157 show_bank(seq, cfg, iob); io_show()
H A Ds3c2410-cpufreq.c33 static void s3c2410_cpufreq_setdivs(struct s3c_cpufreq_config *cfg) s3c2410_cpufreq_setdivs() argument
37 if (cfg->divs.h_divisor == 2) s3c2410_cpufreq_setdivs()
40 if (cfg->divs.p_divisor != cfg->divs.h_divisor) s3c2410_cpufreq_setdivs()
46 static int s3c2410_cpufreq_calcdivs(struct s3c_cpufreq_config *cfg) s3c2410_cpufreq_calcdivs() argument
52 fclk = cfg->freq.fclk; s3c2410_cpufreq_calcdivs()
53 hclk_max = cfg->max.hclk; s3c2410_cpufreq_calcdivs()
55 cfg->freq.armclk = fclk; s3c2410_cpufreq_calcdivs()
60 hdiv = (fclk > cfg->max.hclk) ? 2 : 1; s3c2410_cpufreq_calcdivs()
63 if (hclk > cfg->max.hclk) { s3c2410_cpufreq_calcdivs()
68 pdiv = (hclk > cfg->max.pclk) ? 2 : 1; s3c2410_cpufreq_calcdivs()
71 if (pclk > cfg->max.pclk) { s3c2410_cpufreq_calcdivs()
79 cfg->divs.p_divisor = pdiv; s3c2410_cpufreq_calcdivs()
80 cfg->divs.h_divisor = hdiv; s3c2410_cpufreq_calcdivs()
H A Ds3c2412-cpufreq.c41 static int s3c2412_cpufreq_calcdivs(struct s3c_cpufreq_config *cfg) s3c2412_cpufreq_calcdivs() argument
47 fclk = cfg->freq.fclk; s3c2412_cpufreq_calcdivs()
48 armclk = cfg->freq.armclk; s3c2412_cpufreq_calcdivs()
49 hclk_max = cfg->max.hclk; s3c2412_cpufreq_calcdivs()
60 __func__, cfg->freq.fclk, cfg->freq.armclk, s3c2412_cpufreq_calcdivs()
61 cfg->freq.hclk, cfg->freq.pclk); s3c2412_cpufreq_calcdivs()
70 cfg->divs.arm_divisor = armdiv; s3c2412_cpufreq_calcdivs()
77 cfg->freq.hclk = hclk = armdiv_clk / hdiv; s3c2412_cpufreq_calcdivs()
80 cfg->divs.dvs = dvs = armclk < armdiv_clk; s3c2412_cpufreq_calcdivs()
83 cfg->freq.armclk = dvs ? hclk : armdiv_clk; s3c2412_cpufreq_calcdivs()
86 __func__, armclk, hclk, armdiv, hdiv, cfg->divs.dvs); s3c2412_cpufreq_calcdivs()
91 pdiv = (hclk > cfg->max.pclk) ? 2 : 1; s3c2412_cpufreq_calcdivs()
93 if ((hclk / pdiv) > cfg->max.pclk) s3c2412_cpufreq_calcdivs()
96 cfg->freq.pclk = hclk / pdiv; s3c2412_cpufreq_calcdivs()
107 cfg->divs.h_divisor = hdiv * armdiv; s3c2412_cpufreq_calcdivs()
108 cfg->divs.p_divisor = pdiv * armdiv; s3c2412_cpufreq_calcdivs()
116 static void s3c2412_cpufreq_setdivs(struct s3c_cpufreq_config *cfg) s3c2412_cpufreq_setdivs() argument
129 if (cfg->divs.arm_divisor == 2) s3c2412_cpufreq_setdivs()
132 clkdiv |= ((cfg->divs.h_divisor / cfg->divs.arm_divisor) - 1); s3c2412_cpufreq_setdivs()
134 if (cfg->divs.p_divisor != cfg->divs.h_divisor) s3c2412_cpufreq_setdivs()
140 clk_set_parent(armclk, cfg->divs.dvs ? hclk : fclk); s3c2412_cpufreq_setdivs()
143 static void s3c2412_cpufreq_setrefresh(struct s3c_cpufreq_config *cfg) s3c2412_cpufreq_setrefresh() argument
145 struct s3c_cpufreq_board *board = cfg->board; s3c2412_cpufreq_setrefresh()
149 board->refresh, cfg->freq.hclk); s3c2412_cpufreq_setrefresh()
157 refresh *= (cfg->freq.hclk / 100); s3c2412_cpufreq_setrefresh()
H A Ds3c2440-cpufreq.c49 * @cfg: The cpu frequency settings.
52 * specified in @cfg. The values are stored in @cfg for later use
55 static int s3c2440_cpufreq_calcdivs(struct s3c_cpufreq_config *cfg) s3c2440_cpufreq_calcdivs() argument
61 fclk = cfg->freq.fclk; s3c2440_cpufreq_calcdivs()
62 armclk = cfg->freq.armclk; s3c2440_cpufreq_calcdivs()
63 hclk_max = cfg->max.hclk; s3c2440_cpufreq_calcdivs()
91 pdiv = (hclk > cfg->max.pclk) ? 2 : 1; s3c2440_cpufreq_calcdivs()
93 if ((hclk / pdiv) > cfg->max.pclk) s3c2440_cpufreq_calcdivs()
112 cfg->divs.dvs = 1; s3c2440_cpufreq_calcdivs()
115 cfg->divs.dvs = 0; s3c2440_cpufreq_calcdivs()
117 cfg->freq.armclk = armclk; s3c2440_cpufreq_calcdivs()
121 cfg->divs.h_divisor = hdiv; s3c2440_cpufreq_calcdivs()
122 cfg->divs.p_divisor = pdiv; s3c2440_cpufreq_calcdivs()
135 * @cfg: The cpu frequency settings.
137 * Set the divisors from the settings in @cfg, which where generated
140 static void s3c2440_cpufreq_setdivs(struct s3c_cpufreq_config *cfg) s3c2440_cpufreq_setdivs() argument
145 cfg->divs.h_divisor, cfg->divs.p_divisor); s3c2440_cpufreq_setdivs()
153 switch (cfg->divs.h_divisor) { s3c2440_cpufreq_setdivs()
178 if (cfg->divs.p_divisor != cfg->divs.h_divisor) s3c2440_cpufreq_setdivs()
194 clk_set_parent(armclk, cfg->divs.dvs ? hclk : fclk); s3c2440_cpufreq_setdivs()
223 static int s3c2440_cpufreq_calctable(struct s3c_cpufreq_config *cfg, s3c2440_cpufreq_calctable() argument
229 WARN_ON(cfg->info == NULL); s3c2440_cpufreq_calctable()
230 WARN_ON(cfg->board == NULL); s3c2440_cpufreq_calctable()
232 ret = run_freq_for(cfg->info->max.hclk, s3c2440_cpufreq_calctable()
233 cfg->info->max.fclk, s3c2440_cpufreq_calctable()
H A Ds3c24xx-cpufreq.c63 static void s3c_cpufreq_getcur(struct s3c_cpufreq_config *cfg) s3c_cpufreq_getcur() argument
67 cfg->freq.fclk = fclk = clk_get_rate(clk_fclk); s3c_cpufreq_getcur()
68 cfg->freq.hclk = hclk = clk_get_rate(clk_hclk); s3c_cpufreq_getcur()
69 cfg->freq.pclk = pclk = clk_get_rate(clk_pclk); s3c_cpufreq_getcur()
70 cfg->freq.armclk = armclk = clk_get_rate(clk_arm); s3c_cpufreq_getcur()
72 cfg->pll.driver_data = __raw_readl(S3C2410_MPLLCON); s3c_cpufreq_getcur()
73 cfg->pll.frequency = fclk; s3c_cpufreq_getcur()
75 cfg->freq.hclk_tns = 1000000000 / (cfg->freq.hclk / 10); s3c_cpufreq_getcur()
77 cfg->divs.h_divisor = fclk / hclk; s3c_cpufreq_getcur()
78 cfg->divs.p_divisor = fclk / pclk; s3c_cpufreq_getcur()
81 static inline void s3c_cpufreq_calc(struct s3c_cpufreq_config *cfg) s3c_cpufreq_calc() argument
83 unsigned long pll = cfg->pll.frequency; s3c_cpufreq_calc()
85 cfg->freq.fclk = pll; s3c_cpufreq_calc()
86 cfg->freq.hclk = pll / cfg->divs.h_divisor; s3c_cpufreq_calc()
87 cfg->freq.pclk = pll / cfg->divs.p_divisor; s3c_cpufreq_calc()
90 cfg->freq.hclk_tns = 1000000000 / (cfg->freq.hclk / 10); s3c_cpufreq_calc()
102 struct s3c_cpufreq_config *cfg) s3c_cpufreq_show()
105 pfx, cfg->pll.frequency, cfg->freq.fclk, cfg->freq.armclk, s3c_cpufreq_show()
106 cfg->freq.hclk, cfg->divs.h_divisor, s3c_cpufreq_show()
107 cfg->freq.pclk, cfg->divs.p_divisor); s3c_cpufreq_show()
112 static void s3c_cpufreq_setio(struct s3c_cpufreq_config *cfg) s3c_cpufreq_setio() argument
114 if (cfg->info->set_iotiming) s3c_cpufreq_setio()
115 (cfg->info->set_iotiming)(cfg, &s3c24xx_iotiming); s3c_cpufreq_setio()
118 static int s3c_cpufreq_calcio(struct s3c_cpufreq_config *cfg) s3c_cpufreq_calcio() argument
120 if (cfg->info->calc_iotiming) s3c_cpufreq_calcio()
121 return (cfg->info->calc_iotiming)(cfg, &s3c24xx_iotiming); s3c_cpufreq_calcio()
126 static void s3c_cpufreq_setrefresh(struct s3c_cpufreq_config *cfg) s3c_cpufreq_setrefresh() argument
128 (cfg->info->set_refresh)(cfg); s3c_cpufreq_setrefresh()
131 static void s3c_cpufreq_setdivs(struct s3c_cpufreq_config *cfg) s3c_cpufreq_setdivs() argument
133 (cfg->info->set_divs)(cfg); s3c_cpufreq_setdivs()
136 static int s3c_cpufreq_calcdivs(struct s3c_cpufreq_config *cfg) s3c_cpufreq_calcdivs() argument
138 return (cfg->info->calc_divs)(cfg); s3c_cpufreq_calcdivs()
141 static void s3c_cpufreq_setfvco(struct s3c_cpufreq_config *cfg) s3c_cpufreq_setfvco() argument
143 cfg->mpll = _clk_mpll; s3c_cpufreq_setfvco()
144 (cfg->info->set_fvco)(cfg); s3c_cpufreq_setfvco()
101 s3c_cpufreq_show(const char *pfx, struct s3c_cpufreq_config *cfg) s3c_cpufreq_show() argument
/linux-4.1.27/arch/mips/boot/dts/include/dt-bindings/dma/
H A Dat91.h35 #define AT91_XDMAC_DT_GET_MEM_IF(cfg) (((cfg) >> AT91_XDMAC_DT_MEM_IF_OFFSET) \
42 #define AT91_XDMAC_DT_GET_PER_IF(cfg) (((cfg) >> AT91_XDMAC_DT_PER_IF_OFFSET) \
49 #define AT91_XDMAC_DT_GET_PERID(cfg) (((cfg) >> AT91_XDMAC_DT_PERID_OFFSET) \
/linux-4.1.27/arch/powerpc/boot/dts/include/dt-bindings/dma/
H A Dat91.h35 #define AT91_XDMAC_DT_GET_MEM_IF(cfg) (((cfg) >> AT91_XDMAC_DT_MEM_IF_OFFSET) \
42 #define AT91_XDMAC_DT_GET_PER_IF(cfg) (((cfg) >> AT91_XDMAC_DT_PER_IF_OFFSET) \
49 #define AT91_XDMAC_DT_GET_PERID(cfg) (((cfg) >> AT91_XDMAC_DT_PERID_OFFSET) \
/linux-4.1.27/arch/arm64/boot/dts/include/dt-bindings/dma/
H A Dat91.h35 #define AT91_XDMAC_DT_GET_MEM_IF(cfg) (((cfg) >> AT91_XDMAC_DT_MEM_IF_OFFSET) \
42 #define AT91_XDMAC_DT_GET_PER_IF(cfg) (((cfg) >> AT91_XDMAC_DT_PER_IF_OFFSET) \
49 #define AT91_XDMAC_DT_GET_PERID(cfg) (((cfg) >> AT91_XDMAC_DT_PERID_OFFSET) \
/linux-4.1.27/arch/metag/boot/dts/include/dt-bindings/dma/
H A Dat91.h35 #define AT91_XDMAC_DT_GET_MEM_IF(cfg) (((cfg) >> AT91_XDMAC_DT_MEM_IF_OFFSET) \
42 #define AT91_XDMAC_DT_GET_PER_IF(cfg) (((cfg) >> AT91_XDMAC_DT_PER_IF_OFFSET) \
49 #define AT91_XDMAC_DT_GET_PERID(cfg) (((cfg) >> AT91_XDMAC_DT_PERID_OFFSET) \
/linux-4.1.27/arch/arm/boot/dts/include/dt-bindings/dma/
H A Dat91.h35 #define AT91_XDMAC_DT_GET_MEM_IF(cfg) (((cfg) >> AT91_XDMAC_DT_MEM_IF_OFFSET) \
42 #define AT91_XDMAC_DT_GET_PER_IF(cfg) (((cfg) >> AT91_XDMAC_DT_PER_IF_OFFSET) \
49 #define AT91_XDMAC_DT_GET_PERID(cfg) (((cfg) >> AT91_XDMAC_DT_PERID_OFFSET) \
/linux-4.1.27/include/dt-bindings/dma/
H A Dat91.h35 #define AT91_XDMAC_DT_GET_MEM_IF(cfg) (((cfg) >> AT91_XDMAC_DT_MEM_IF_OFFSET) \
42 #define AT91_XDMAC_DT_GET_PER_IF(cfg) (((cfg) >> AT91_XDMAC_DT_PER_IF_OFFSET) \
49 #define AT91_XDMAC_DT_GET_PERID(cfg) (((cfg) >> AT91_XDMAC_DT_PERID_OFFSET) \
/linux-4.1.27/drivers/leds/
H A Dleds-pm8941-wled.c84 struct pm8941_wled_config cfg; member in struct:pm8941_wled
109 for (i = 0; i < wled->cfg.num_strings; ++i) { pm8941_wled_set()
148 PM8941_WLED_REG_OVP_MASK, wled->cfg.ovp); pm8941_wled_setup()
154 PM8941_WLED_REG_BOOST_MASK, wled->cfg.i_boost_limit); pm8941_wled_setup()
160 PM8941_WLED_REG_FREQ_MASK, wled->cfg.switch_freq); pm8941_wled_setup()
164 if (wled->cfg.cs_out_en) { pm8941_wled_setup()
165 u8 all = (BIT(wled->cfg.num_strings) - 1) pm8941_wled_setup()
175 for (i = 0; i < wled->cfg.num_strings; ++i) { pm8941_wled_setup()
185 if (wled->cfg.ext_gen) { pm8941_wled_setup()
197 wled->cfg.i_limit); pm8941_wled_setup()
204 wled->cfg.cabc_en ? pm8941_wled_setup()
272 static u32 pm8941_wled_values(const struct pm8941_wled_var_cfg *cfg, u32 idx) pm8941_wled_values() argument
274 if (idx >= cfg->size) pm8941_wled_values()
276 if (cfg->fn) pm8941_wled_values()
277 return cfg->fn(idx); pm8941_wled_values()
278 if (cfg->values) pm8941_wled_values()
279 return cfg->values[idx]; pm8941_wled_values()
285 struct pm8941_wled_config *cfg = &wled->cfg; pm8941_wled_configure() local
295 const struct pm8941_wled_var_cfg *cfg; pm8941_wled_configure() member in struct:__anon5353
299 &cfg->i_boost_limit, pm8941_wled_configure()
300 .cfg = &pm8941_wled_i_boost_limit_cfg, pm8941_wled_configure()
304 &cfg->i_limit, pm8941_wled_configure()
305 .cfg = &pm8941_wled_i_limit_cfg, pm8941_wled_configure()
309 &cfg->ovp, pm8941_wled_configure()
310 .cfg = &pm8941_wled_ovp_cfg, pm8941_wled_configure()
314 &cfg->switch_freq, pm8941_wled_configure()
315 .cfg = &pm8941_wled_switch_freq_cfg, pm8941_wled_configure()
319 &cfg->num_strings, pm8941_wled_configure()
320 .cfg = &pm8941_wled_num_strings_cfg, pm8941_wled_configure()
327 { "qcom,cs-out", &cfg->cs_out_en, }, pm8941_wled_configure()
328 { "qcom,ext-gen", &cfg->ext_gen, }, pm8941_wled_configure()
329 { "qcom,cabc", &cfg->cabc_en, }, pm8941_wled_configure()
346 *cfg = pm8941_wled_config_defaults; pm8941_wled_configure()
358 c = pm8941_wled_values(u32_opts[i].cfg, j); pm8941_wled_configure()
375 cfg->num_strings = cfg->num_strings + 1; pm8941_wled_configure()
H A Dleds-lp55xx-common.c43 struct lp55xx_device_config *cfg = chip->cfg; lp55xx_reset_device() local
44 u8 addr = cfg->reset.addr; lp55xx_reset_device()
45 u8 val = cfg->reset.val; lp55xx_reset_device()
53 struct lp55xx_device_config *cfg = chip->cfg; lp55xx_detect_device() local
54 u8 addr = cfg->enable.addr; lp55xx_detect_device()
55 u8 val = cfg->enable.val; lp55xx_detect_device()
68 if (val != cfg->enable.val) lp55xx_detect_device()
76 struct lp55xx_device_config *cfg = chip->cfg; lp55xx_post_init_device() local
78 if (!cfg->post_init_device) lp55xx_post_init_device()
81 return cfg->post_init_device(chip); lp55xx_post_init_device()
107 if (!chip->cfg->set_led_current) lp55xx_store_current()
111 chip->cfg->set_led_current(led, (u8)curr); lp55xx_store_current()
150 struct lp55xx_device_config *cfg = chip->cfg; lp55xx_init_led() local
154 int max_channel = cfg->max_channel; lp55xx_init_led()
211 if (chip->cfg->firmware_cb) lp55xx_firmware_loaded()
212 chip->cfg->firmware_cb(chip); lp55xx_firmware_loaded()
278 if (chip->cfg->run_engine) lp55xx_run_engine()
279 chip->cfg->run_engine(chip, start); lp55xx_run_engine()
388 struct lp55xx_device_config *cfg; lp55xx_init_device() local
395 cfg = chip->cfg; lp55xx_init_device()
397 if (!pdata || !cfg) lp55xx_init_device()
460 struct lp55xx_device_config *cfg = chip->cfg; lp55xx_register_leds() local
467 if (!cfg->brightness_work_fn) { lp55xx_register_leds()
484 INIT_WORK(&each->brightness_work, cfg->brightness_work_fn); lp55xx_register_leds()
490 if (cfg->set_led_current) lp55xx_register_leds()
491 cfg->set_led_current(each, led_current); lp55xx_register_leds()
518 struct lp55xx_device_config *cfg = chip->cfg; lp55xx_register_sysfs() local
521 if (!cfg->run_engine || !cfg->firmware_cb) lp55xx_register_sysfs()
529 return cfg->dev_attr_group ? lp55xx_register_sysfs()
530 sysfs_create_group(&dev->kobj, cfg->dev_attr_group) : 0; lp55xx_register_sysfs()
537 struct lp55xx_device_config *cfg = chip->cfg; lp55xx_unregister_sysfs() local
539 if (cfg->dev_attr_group) lp55xx_unregister_sysfs()
540 sysfs_remove_group(&dev->kobj, cfg->dev_attr_group); lp55xx_unregister_sysfs()
550 struct lp55xx_led_config *cfg; lp55xx_of_populate_pdata() local
564 cfg = devm_kzalloc(dev, sizeof(*cfg) * num_channels, GFP_KERNEL); lp55xx_of_populate_pdata()
565 if (!cfg) lp55xx_of_populate_pdata()
568 pdata->led_config = &cfg[0]; lp55xx_of_populate_pdata()
572 cfg[i].chan_nr = i; for_each_child_of_node()
574 of_property_read_string(child, "chan-name", &cfg[i].name); for_each_child_of_node()
575 of_property_read_u8(child, "led-cur", &cfg[i].led_current); for_each_child_of_node()
576 of_property_read_u8(child, "max-cur", &cfg[i].max_current); for_each_child_of_node()
577 cfg[i].default_trigger = for_each_child_of_node()
H A Dleds-lp8788.c51 struct lp8788_led_config *cfg = &default_led_config; lp8788_led_init_device() local
56 cfg->scale = pdata->scale; lp8788_led_init_device()
57 cfg->num = pdata->num; lp8788_led_init_device()
58 cfg->iout = pdata->iout_code; lp8788_led_init_device()
61 led->isink_num = cfg->num; lp8788_led_init_device()
65 mask = 1 << (cfg->num + LP8788_ISINK_SCALE_OFFSET); lp8788_led_init_device()
66 val = cfg->scale << (cfg->num + LP8788_ISINK_SCALE_OFFSET); lp8788_led_init_device()
72 addr = lp8788_iout_addr[cfg->num]; lp8788_led_init_device()
73 mask = lp8788_iout_mask[cfg->num]; lp8788_led_init_device()
74 val = cfg->iout; lp8788_led_init_device()
/linux-4.1.27/net/ipv4/
H A Dudp_tunnel.c11 int udp_sock_create4(struct net *net, struct udp_port_cfg *cfg, udp_sock_create4() argument
25 udp_addr.sin_addr = cfg->local_ip; udp_sock_create4()
26 udp_addr.sin_port = cfg->local_udp_port; udp_sock_create4()
32 if (cfg->peer_udp_port) { udp_sock_create4()
34 udp_addr.sin_addr = cfg->peer_ip; udp_sock_create4()
35 udp_addr.sin_port = cfg->peer_udp_port; udp_sock_create4()
42 sock->sk->sk_no_check_tx = !cfg->use_udp_checksums; udp_sock_create4()
58 struct udp_tunnel_sock_cfg *cfg) setup_udp_tunnel_sock()
68 rcu_assign_sk_user_data(sk, cfg->sk_user_data); setup_udp_tunnel_sock()
70 udp_sk(sk)->encap_type = cfg->encap_type; setup_udp_tunnel_sock()
71 udp_sk(sk)->encap_rcv = cfg->encap_rcv; setup_udp_tunnel_sock()
72 udp_sk(sk)->encap_destroy = cfg->encap_destroy; setup_udp_tunnel_sock()
57 setup_udp_tunnel_sock(struct net *net, struct socket *sock, struct udp_tunnel_sock_cfg *cfg) setup_udp_tunnel_sock() argument
H A Dfib_frontend.c409 struct fib_config *cfg) rtentry_to_fib_config()
414 memset(cfg, 0, sizeof(*cfg)); rtentry_to_fib_config()
415 cfg->fc_nlinfo.nl_net = net; rtentry_to_fib_config()
444 cfg->fc_dst_len = plen; rtentry_to_fib_config()
445 cfg->fc_dst = addr; rtentry_to_fib_config()
448 cfg->fc_nlflags = NLM_F_CREATE; rtentry_to_fib_config()
449 cfg->fc_protocol = RTPROT_BOOT; rtentry_to_fib_config()
453 cfg->fc_priority = rt->rt_metric - 1; rtentry_to_fib_config()
456 cfg->fc_scope = RT_SCOPE_HOST; rtentry_to_fib_config()
457 cfg->fc_type = RTN_UNREACHABLE; rtentry_to_fib_config()
461 cfg->fc_scope = RT_SCOPE_NOWHERE; rtentry_to_fib_config()
462 cfg->fc_type = RTN_UNICAST; rtentry_to_fib_config()
479 cfg->fc_oif = dev->ifindex; rtentry_to_fib_config()
491 cfg->fc_prefsrc = ifa->ifa_local; rtentry_to_fib_config()
497 cfg->fc_gw = addr; rtentry_to_fib_config()
500 cfg->fc_scope = RT_SCOPE_UNIVERSE; rtentry_to_fib_config()
506 if (rt->rt_flags & RTF_GATEWAY && !cfg->fc_gw) rtentry_to_fib_config()
509 if (cfg->fc_scope == RT_SCOPE_NOWHERE) rtentry_to_fib_config()
510 cfg->fc_scope = RT_SCOPE_LINK; rtentry_to_fib_config()
529 cfg->fc_mx = mx; rtentry_to_fib_config()
530 cfg->fc_mx_len = len; rtentry_to_fib_config()
542 struct fib_config cfg; ip_rt_ioctl() local
556 err = rtentry_to_fib_config(net, cmd, &rt, &cfg); ip_rt_ioctl()
561 tb = fib_get_table(net, cfg.fc_table); ip_rt_ioctl()
563 err = fib_table_delete(tb, &cfg); ip_rt_ioctl()
567 tb = fib_new_table(net, cfg.fc_table); ip_rt_ioctl()
569 err = fib_table_insert(tb, &cfg); ip_rt_ioctl()
575 kfree(cfg.fc_mx); ip_rt_ioctl()
597 struct nlmsghdr *nlh, struct fib_config *cfg) rtm_to_fib_config()
607 memset(cfg, 0, sizeof(*cfg)); rtm_to_fib_config()
610 cfg->fc_dst_len = rtm->rtm_dst_len; rtm_to_fib_config()
611 cfg->fc_tos = rtm->rtm_tos; rtm_to_fib_config()
612 cfg->fc_table = rtm->rtm_table; rtm_to_fib_config()
613 cfg->fc_protocol = rtm->rtm_protocol; rtm_to_fib_config()
614 cfg->fc_scope = rtm->rtm_scope; rtm_to_fib_config()
615 cfg->fc_type = rtm->rtm_type; rtm_to_fib_config()
616 cfg->fc_flags = rtm->rtm_flags; rtm_to_fib_config()
617 cfg->fc_nlflags = nlh->nlmsg_flags; rtm_to_fib_config()
619 cfg->fc_nlinfo.portid = NETLINK_CB(skb).portid; rtm_to_fib_config()
620 cfg->fc_nlinfo.nlh = nlh; rtm_to_fib_config()
621 cfg->fc_nlinfo.nl_net = net; rtm_to_fib_config()
623 if (cfg->fc_type > RTN_MAX) { rtm_to_fib_config()
631 cfg->fc_dst = nla_get_be32(attr); nlmsg_for_each_attr()
634 cfg->fc_oif = nla_get_u32(attr); nlmsg_for_each_attr()
637 cfg->fc_gw = nla_get_be32(attr); nlmsg_for_each_attr()
640 cfg->fc_priority = nla_get_u32(attr); nlmsg_for_each_attr()
643 cfg->fc_prefsrc = nla_get_be32(attr); nlmsg_for_each_attr()
646 cfg->fc_mx = nla_data(attr); nlmsg_for_each_attr()
647 cfg->fc_mx_len = nla_len(attr); nlmsg_for_each_attr()
650 cfg->fc_mp = nla_data(attr); nlmsg_for_each_attr()
651 cfg->fc_mp_len = nla_len(attr); nlmsg_for_each_attr()
654 cfg->fc_flow = nla_get_u32(attr); nlmsg_for_each_attr()
657 cfg->fc_table = nla_get_u32(attr); nlmsg_for_each_attr()
670 struct fib_config cfg; inet_rtm_delroute() local
674 err = rtm_to_fib_config(net, skb, nlh, &cfg); inet_rtm_delroute()
678 tb = fib_get_table(net, cfg.fc_table); inet_rtm_delroute()
684 err = fib_table_delete(tb, &cfg); inet_rtm_delroute()
692 struct fib_config cfg; inet_rtm_newroute() local
696 err = rtm_to_fib_config(net, skb, nlh, &cfg); inet_rtm_newroute()
700 tb = fib_new_table(net, cfg.fc_table); inet_rtm_newroute()
706 err = fib_table_insert(tb, &cfg); inet_rtm_newroute()
764 struct fib_config cfg = { fib_magic() local
785 cfg.fc_table = tb->tb_id; fib_magic()
788 cfg.fc_scope = RT_SCOPE_LINK; fib_magic()
790 cfg.fc_scope = RT_SCOPE_HOST; fib_magic()
793 fib_table_insert(tb, &cfg); fib_magic()
795 fib_table_delete(tb, &cfg); fib_magic()
1049 struct netlink_kernel_cfg cfg = { nl_fib_lookup_init() local
1053 sk = netlink_kernel_create(net, NETLINK_FIB_LOOKUP, &cfg); nl_fib_lookup_init()
408 rtentry_to_fib_config(struct net *net, int cmd, struct rtentry *rt, struct fib_config *cfg) rtentry_to_fib_config() argument
596 rtm_to_fib_config(struct net *net, struct sk_buff *skb, struct nlmsghdr *nlh, struct fib_config *cfg) rtm_to_fib_config() argument
H A Dfib_semantics.c453 int remaining, struct fib_config *cfg) fib_get_nhs()
462 (cfg->fc_flags & ~0xFF) | rtnh->rtnh_flags; change_nexthops()
488 int fib_nh_match(struct fib_config *cfg, struct fib_info *fi) fib_nh_match() argument
495 if (cfg->fc_priority && cfg->fc_priority != fi->fib_priority) fib_nh_match()
498 if (cfg->fc_oif || cfg->fc_gw) { fib_nh_match()
499 if ((!cfg->fc_oif || cfg->fc_oif == fi->fib_nh->nh_oif) && fib_nh_match()
500 (!cfg->fc_gw || cfg->fc_gw == fi->fib_nh->nh_gw)) fib_nh_match()
506 if (!cfg->fc_mp) fib_nh_match()
509 rtnh = cfg->fc_mp; fib_nh_match()
510 remaining = cfg->fc_mp_len; fib_nh_match()
585 static int fib_check_nh(struct fib_config *cfg, struct fib_info *fi, fib_check_nh() argument
592 net = cfg->fc_nlinfo.nl_net; fib_check_nh()
598 if (cfg->fc_scope >= RT_SCOPE_LINK) fib_check_nh()
616 .flowi4_scope = cfg->fc_scope + 1, fib_check_nh()
760 struct fib_info *fib_create_info(struct fib_config *cfg) fib_create_info() argument
766 struct net *net = cfg->fc_nlinfo.nl_net; fib_create_info()
768 if (cfg->fc_type > RTN_MAX) fib_create_info()
772 if (fib_props[cfg->fc_type].scope > cfg->fc_scope) fib_create_info()
776 if (cfg->fc_mp) { fib_create_info()
777 nhs = fib_count_nexthops(cfg->fc_mp, cfg->fc_mp_len); fib_create_info()
809 if (cfg->fc_mx) { fib_create_info()
817 fi->fib_protocol = cfg->fc_protocol; fib_create_info()
818 fi->fib_scope = cfg->fc_scope; fib_create_info()
819 fi->fib_flags = cfg->fc_flags; fib_create_info()
820 fi->fib_priority = cfg->fc_priority; fib_create_info()
821 fi->fib_prefsrc = cfg->fc_prefsrc; fib_create_info()
822 fi->fib_type = cfg->fc_type; fib_create_info()
832 if (cfg->fc_mx) { endfor_nexthops()
836 nla_for_each_attr(nla, cfg->fc_mx, cfg->fc_mx_len, remaining) { endfor_nexthops()
863 if (cfg->fc_mp) {
865 err = fib_get_nhs(fi, cfg->fc_mp, cfg->fc_mp_len, cfg);
868 if (cfg->fc_oif && fi->fib_nh->nh_oif != cfg->fc_oif)
870 if (cfg->fc_gw && fi->fib_nh->nh_gw != cfg->fc_gw)
873 if (cfg->fc_flow && fi->fib_nh->nh_tclassid != cfg->fc_flow)
882 nh->nh_oif = cfg->fc_oif;
883 nh->nh_gw = cfg->fc_gw;
884 nh->nh_flags = cfg->fc_flags;
886 nh->nh_tclassid = cfg->fc_flow;
895 if (fib_props[cfg->fc_type].error) {
896 if (cfg->fc_gw || cfg->fc_oif || cfg->fc_mp)
900 switch (cfg->fc_type) {
912 if (cfg->fc_scope > RT_SCOPE_HOST)
915 if (cfg->fc_scope == RT_SCOPE_HOST) {
928 err = fib_check_nh(cfg, fi, nexthop_nh); change_nexthops()
935 if (cfg->fc_type != RTN_LOCAL || !cfg->fc_dst ||
936 fi->fib_prefsrc != cfg->fc_dst)
452 fib_get_nhs(struct fib_info *fi, struct rtnexthop *rtnh, int remaining, struct fib_config *cfg) fib_get_nhs() argument
H A Dfou.c428 static int fou_encap_init(struct sock *sk, struct fou *fou, struct fou_cfg *cfg) fou_encap_init() argument
431 fou->protocol = cfg->protocol; fou_encap_init()
434 fou->udp_offloads.port = cfg->udp_config.local_udp_port; fou_encap_init()
435 fou->udp_offloads.ipproto = cfg->protocol; fou_encap_init()
440 static int gue_encap_init(struct sock *sk, struct fou *fou, struct fou_cfg *cfg) gue_encap_init() argument
445 fou->udp_offloads.port = cfg->udp_config.local_udp_port; gue_encap_init()
450 static int fou_create(struct net *net, struct fou_cfg *cfg, fou_create() argument
459 err = udp_sock_create(net, &cfg->udp_config, &sock); fou_create()
472 fou->flags = cfg->flags; fou_create()
473 fou->port = cfg->udp_config.local_udp_port; fou_create()
476 switch (cfg->type) { fou_create()
478 err = fou_encap_init(sk, fou, cfg); fou_create()
483 err = gue_encap_init(sk, fou, cfg); fou_create()
492 fou->type = cfg->type; fou_create()
504 if (cfg->udp_config.family == AF_INET) { fou_create()
527 static int fou_destroy(struct net *net, struct fou_cfg *cfg) fou_destroy() argument
530 __be16 port = cfg->udp_config.local_udp_port; fou_destroy()
565 struct fou_cfg *cfg) parse_nl_config()
567 memset(cfg, 0, sizeof(*cfg)); parse_nl_config()
569 cfg->udp_config.family = AF_INET; parse_nl_config()
577 cfg->udp_config.family = family; parse_nl_config()
583 cfg->udp_config.local_udp_port = port; parse_nl_config()
587 cfg->protocol = nla_get_u8(info->attrs[FOU_ATTR_IPPROTO]); parse_nl_config()
590 cfg->type = nla_get_u8(info->attrs[FOU_ATTR_TYPE]); parse_nl_config()
593 cfg->flags |= FOU_F_REMCSUM_NOPARTIAL; parse_nl_config()
601 struct fou_cfg cfg; fou_nl_cmd_add_port() local
604 err = parse_nl_config(info, &cfg); fou_nl_cmd_add_port()
608 return fou_create(net, &cfg, NULL); fou_nl_cmd_add_port()
614 struct fou_cfg cfg; fou_nl_cmd_rm_port() local
617 err = parse_nl_config(info, &cfg); fou_nl_cmd_rm_port()
621 return fou_destroy(net, &cfg); fou_nl_cmd_rm_port()
663 struct fou_cfg cfg; fou_nl_cmd_get_port() local
668 ret = parse_nl_config(info, &cfg); fou_nl_cmd_get_port()
671 port = cfg.udp_config.local_udp_port; fou_nl_cmd_get_port()
564 parse_nl_config(struct genl_info *info, struct fou_cfg *cfg) parse_nl_config() argument
/linux-4.1.27/drivers/regulator/
H A Dfixed-helper.c8 struct fixed_voltage_config cfg; member in struct:fixed_regulator_data
17 kfree(data->cfg.supply_name); regulator_fixed_release()
38 data->cfg.supply_name = kstrdup(name, GFP_KERNEL); regulator_register_always_on()
39 if (!data->cfg.supply_name) { regulator_register_always_on()
44 data->cfg.microvolts = uv; regulator_register_always_on()
45 data->cfg.gpio = -EINVAL; regulator_register_always_on()
46 data->cfg.enabled_at_boot = 1; regulator_register_always_on()
47 data->cfg.init_data = &data->init_data; regulator_register_always_on()
55 data->pdev.dev.platform_data = &data->cfg; regulator_register_always_on()
H A Dfixed.c114 struct regulator_config cfg = { }; reg_fixed_voltage_probe() local
164 cfg.ena_gpio = config->gpio; reg_fixed_voltage_probe()
166 cfg.ena_gpio_initialized = true; reg_fixed_voltage_probe()
168 cfg.ena_gpio_invert = !config->enable_high; reg_fixed_voltage_probe()
171 cfg.ena_gpio_flags |= GPIOF_OUT_INIT_HIGH; reg_fixed_voltage_probe()
173 cfg.ena_gpio_flags |= GPIOF_OUT_INIT_LOW; reg_fixed_voltage_probe()
176 cfg.ena_gpio_flags |= GPIOF_OUT_INIT_LOW; reg_fixed_voltage_probe()
178 cfg.ena_gpio_flags |= GPIOF_OUT_INIT_HIGH; reg_fixed_voltage_probe()
181 cfg.ena_gpio_flags |= GPIOF_OPEN_DRAIN; reg_fixed_voltage_probe()
183 cfg.dev = &pdev->dev; reg_fixed_voltage_probe()
184 cfg.init_data = config->init_data; reg_fixed_voltage_probe()
185 cfg.driver_data = drvdata; reg_fixed_voltage_probe()
186 cfg.of_node = pdev->dev.of_node; reg_fixed_voltage_probe()
189 &cfg); reg_fixed_voltage_probe()
H A Dlp8788-ldo.c523 struct regulator_config cfg = { }; lp8788_dldo_probe() local
537 cfg.ena_gpio = ldo->en_pin->gpio; lp8788_dldo_probe()
538 cfg.ena_gpio_flags = ldo->en_pin->init_state; lp8788_dldo_probe()
541 cfg.dev = pdev->dev.parent; lp8788_dldo_probe()
542 cfg.init_data = lp->pdata ? lp->pdata->dldo_data[id] : NULL; lp8788_dldo_probe()
543 cfg.driver_data = ldo; lp8788_dldo_probe()
544 cfg.regmap = lp->regmap; lp8788_dldo_probe()
546 rdev = devm_regulator_register(&pdev->dev, &lp8788_dldo_desc[id], &cfg); lp8788_dldo_probe()
572 struct regulator_config cfg = { }; lp8788_aldo_probe() local
586 cfg.ena_gpio = ldo->en_pin->gpio; lp8788_aldo_probe()
587 cfg.ena_gpio_flags = ldo->en_pin->init_state; lp8788_aldo_probe()
590 cfg.dev = pdev->dev.parent; lp8788_aldo_probe()
591 cfg.init_data = lp->pdata ? lp->pdata->aldo_data[id] : NULL; lp8788_aldo_probe()
592 cfg.driver_data = ldo; lp8788_aldo_probe()
593 cfg.regmap = lp->regmap; lp8788_aldo_probe()
595 rdev = devm_regulator_register(&pdev->dev, &lp8788_aldo_desc[id], &cfg); lp8788_aldo_probe()
H A Dpbias-regulator.c116 struct regulator_config cfg = { }; pbias_regulator_probe() local
136 cfg.regmap = syscon; pbias_regulator_probe()
137 cfg.dev = &pdev->dev; pbias_regulator_probe()
168 cfg.init_data = pbias_matches[idx].init_data; pbias_regulator_probe()
169 cfg.driver_data = &drvdata[data_idx]; pbias_regulator_probe()
170 cfg.of_node = pbias_matches[idx].of_node; pbias_regulator_probe()
173 &drvdata[data_idx].desc, &cfg); pbias_regulator_probe()
H A Dgpio-regulator.c251 struct regulator_config cfg = { }; gpio_regulator_probe() local
331 cfg.dev = &pdev->dev; gpio_regulator_probe()
332 cfg.init_data = config->init_data; gpio_regulator_probe()
333 cfg.driver_data = drvdata; gpio_regulator_probe()
334 cfg.of_node = np; gpio_regulator_probe()
337 cfg.ena_gpio = config->enable_gpio; gpio_regulator_probe()
338 cfg.ena_gpio_initialized = true; gpio_regulator_probe()
340 cfg.ena_gpio_invert = !config->enable_high; gpio_regulator_probe()
343 cfg.ena_gpio_flags |= GPIOF_OUT_INIT_HIGH; gpio_regulator_probe()
345 cfg.ena_gpio_flags |= GPIOF_OUT_INIT_LOW; gpio_regulator_probe()
348 cfg.ena_gpio_flags |= GPIOF_OUT_INIT_LOW; gpio_regulator_probe()
350 cfg.ena_gpio_flags |= GPIOF_OUT_INIT_HIGH; gpio_regulator_probe()
353 drvdata->dev = regulator_register(&drvdata->desc, &cfg); gpio_regulator_probe()
/linux-4.1.27/arch/arm/mach-s3c24xx/
H A Dcpufreq-utils.c28 * @cfg: The frequency configuration
33 void s3c2410_cpufreq_setrefresh(struct s3c_cpufreq_config *cfg) s3c2410_cpufreq_setrefresh() argument
35 struct s3c_cpufreq_board *board = cfg->board; s3c2410_cpufreq_setrefresh()
46 refresh = (cfg->freq.hclk / 100) * (board->refresh / 10); s3c2410_cpufreq_setrefresh()
60 * @cfg: The frequency configuration
62 void s3c2410_set_fvco(struct s3c_cpufreq_config *cfg) s3c2410_set_fvco() argument
64 if (!IS_ERR(cfg->mpll)) s3c2410_set_fvco()
65 clk_set_rate(cfg->mpll, cfg->pll.frequency); s3c2410_set_fvco()
H A Diotiming-s3c2412.c92 * @cfg: The current frequency configuration.
95 static int s3c2412_calc_bank(struct s3c_cpufreq_config *cfg, s3c2412_calc_bank() argument
98 unsigned int hclk = cfg->freq.hclk_tns; s3c2412_calc_bank()
114 * @cfg: The current configuration.
118 struct s3c_cpufreq_config *cfg, s3c2412_iotiming_debugfs()
136 * @cfg: The current frequency configuration.
142 int s3c2412_iotiming_calc(struct s3c_cpufreq_config *cfg, s3c2412_iotiming_calc() argument
154 ret = s3c2412_calc_bank(cfg, bt); s3c2412_iotiming_calc()
169 * @cfg: The current frequency configuration.
175 void s3c2412_iotiming_set(struct s3c_cpufreq_config *cfg, s3c2412_iotiming_set() argument
205 static void s3c2412_iotiming_getbank(struct s3c_cpufreq_config *cfg, s3c2412_iotiming_getbank() argument
209 unsigned long clk = cfg->freq.hclk_tns; /* ssmc clock??? */ s3c2412_iotiming_getbank()
232 int s3c2412_iotiming_get(struct s3c_cpufreq_config *cfg, s3c2412_iotiming_get() argument
252 s3c2412_iotiming_getbank(cfg, bt, bank); s3c2412_iotiming_get()
263 void s3c2412_cpufreq_setrefresh(struct s3c_cpufreq_config *cfg) s3c2412_cpufreq_setrefresh() argument
265 struct s3c_cpufreq_board *board = cfg->board; s3c2412_cpufreq_setrefresh()
277 refresh = (cfg->freq.hclk / 100) * (board->refresh / 10); s3c2412_cpufreq_setrefresh()
117 s3c2412_iotiming_debugfs(struct seq_file *seq, struct s3c_cpufreq_config *cfg, union s3c_iobank *iob) s3c2412_iotiming_debugfs() argument
H A Ds3c2443.c40 #include <plat/gpio-cfg.h>
41 #include <plat/gpio-cfg-helpers.h>
81 void __init s3c2443_init_uarts(struct s3c2410_uartcfg *cfg, int no) s3c2443_init_uarts() argument
83 s3c24xx_init_uartdevs("s3c2440-uart", s3c2410_uart_resources, cfg, no); s3c2443_init_uarts()
H A Dsetup-spi.c15 #include <plat/gpio-cfg.h>
H A Diotiming-s3c2410.c210 * @cfg: The configuration we need to calculate for.
214 * setting for the @cfg timing. This updates the timing information
217 static int s3c2410_calc_bank(struct s3c_cpufreq_config *cfg, s3c2410_calc_bank() argument
220 unsigned long hclk = cfg->freq.hclk_tns; s3c2410_calc_bank()
289 * @cfg: The frequency configuration
293 * in @cfg, update the cycle timing information.
295 void s3c2410_iotiming_getbank(struct s3c_cpufreq_config *cfg, s3c2410_iotiming_getbank() argument
299 unsigned long hclk = cfg->freq.hclk_tns; s3c2410_iotiming_getbank()
311 * @cfg: The current configuration.
315 struct s3c_cpufreq_config *cfg, s3c2410_iotiming_debugfs()
320 unsigned long hclk = cfg->freq.hclk_tns; s3c2410_iotiming_debugfs()
354 * @cfg: The frequency configuration
358 * frequency information in @cfg. This is then used by s3c2410_iotiming_set()
361 int s3c2410_iotiming_calc(struct s3c_cpufreq_config *cfg, s3c2410_iotiming_calc() argument
378 ret = s3c2410_calc_bank(cfg, bt); s3c2410_iotiming_calc()
396 * @cfg: The frequency configuration
403 void s3c2410_iotiming_set(struct s3c_cpufreq_config *cfg, s3c2410_iotiming_set() argument
422 * @cfg: The frequency configuration
426 * information in @cfg, and the new frequency configur
435 int s3c2410_iotiming_get(struct s3c_cpufreq_config *cfg, s3c2410_iotiming_get() argument
473 s3c2410_iotiming_getbank(cfg, bt); s3c2410_iotiming_get()
314 s3c2410_iotiming_debugfs(struct seq_file *seq, struct s3c_cpufreq_config *cfg, union s3c_iobank *iob) s3c2410_iotiming_debugfs() argument
H A Dcommon.h23 extern void s3c2410_init_uarts(struct s3c2410_uartcfg *cfg, int no);
37 extern void s3c2412_init_uarts(struct s3c2410_uartcfg *cfg, int no);
51 extern void s3c2416_init_uarts(struct s3c2410_uartcfg *cfg, int no);
66 extern void s3c244x_init_uarts(struct s3c2410_uartcfg *cfg, int no);
94 extern void s3c2443_init_uarts(struct s3c2410_uartcfg *cfg, int no);
/linux-4.1.27/drivers/media/tuners/
H A Dqm1d1c0042.c53 struct qm1d1c0042_config cfg; member in struct:qm1d1c0042_state
60 return container_of(c, struct qm1d1c0042_state, cfg); cfg_to_state()
122 __func__, state->cfg.fe->dvb->num, state->cfg.fe->id); qm1d1c0042_wakeup()
131 struct qm1d1c0042_config *cfg; qm1d1c0042_set_config() local
134 cfg = priv_cfg; qm1d1c0042_set_config()
136 if (cfg->fe) qm1d1c0042_set_config()
137 state->cfg.fe = cfg->fe; qm1d1c0042_set_config()
139 if (cfg->xtal_freq != QM1D1C0042_CFG_XTAL_DFLT) qm1d1c0042_set_config()
142 state->cfg.xtal_freq = default_cfg.xtal_freq; qm1d1c0042_set_config()
144 state->cfg.lpf = cfg->lpf; qm1d1c0042_set_config()
145 state->cfg.fast_srch = cfg->fast_srch; qm1d1c0042_set_config()
147 if (cfg->lpf_wait != QM1D1C0042_CFG_WAIT_DFLT) qm1d1c0042_set_config()
148 state->cfg.lpf_wait = cfg->lpf_wait; qm1d1c0042_set_config()
150 state->cfg.lpf_wait = default_cfg.lpf_wait; qm1d1c0042_set_config()
152 if (cfg->fast_srch_wait != QM1D1C0042_CFG_WAIT_DFLT) qm1d1c0042_set_config()
153 state->cfg.fast_srch_wait = cfg->fast_srch_wait; qm1d1c0042_set_config()
155 state->cfg.fast_srch_wait = default_cfg.fast_srch_wait; qm1d1c0042_set_config()
157 if (cfg->normal_srch_wait != QM1D1C0042_CFG_WAIT_DFLT) qm1d1c0042_set_config()
158 state->cfg.normal_srch_wait = cfg->normal_srch_wait; qm1d1c0042_set_config()
160 state->cfg.normal_srch_wait = default_cfg.normal_srch_wait; qm1d1c0042_set_config()
208 a = (freq + state->cfg.xtal_freq / 2) / state->cfg.xtal_freq; qm1d1c0042_set_params()
224 if (state->cfg.lpf) { qm1d1c0042_set_params()
234 * b = (freq / state->cfg.xtal_freq - a) << 20; qm1d1c0042_set_params()
238 b = (s32)div64_s64(((s64) freq) << 20, state->cfg.xtal_freq) qm1d1c0042_set_params()
258 if (!state->cfg.lpf) { qm1d1c0042_set_params()
266 mask = state->cfg.lpf ? 0x3f : 0x7f; qm1d1c0042_set_params()
277 if (state->cfg.lpf) qm1d1c0042_set_params()
278 msleep(state->cfg.lpf_wait); qm1d1c0042_set_params()
280 msleep(state->cfg.fast_srch_wait); qm1d1c0042_set_params()
282 msleep(state->cfg.normal_srch_wait); qm1d1c0042_set_params()
284 if (state->cfg.lpf) { qm1d1c0042_set_params()
348 msleep(state->cfg.lpf_wait); qm1d1c0042_init()
366 ret = qm1d1c0042_set_srch_mode(state, state->cfg.fast_srch); qm1d1c0042_init()
399 struct qm1d1c0042_config *cfg; qm1d1c0042_probe() local
407 cfg = client->dev.platform_data; qm1d1c0042_probe()
408 fe = cfg->fe; qm1d1c0042_probe()
410 qm1d1c0042_set_config(fe, cfg); qm1d1c0042_probe()
413 i2c_set_clientdata(client, &state->cfg); qm1d1c0042_probe()
423 state->cfg.fe->tuner_priv = NULL; qm1d1c0042_remove()
H A Dtda18212.c25 struct tda18212_config cfg; member in struct:tda18212_dev
73 if_khz = dev->cfg.if_atsc_vsb; tda18212_set_params()
77 if_khz = dev->cfg.if_atsc_qam; tda18212_set_params()
83 if_khz = dev->cfg.if_dvbt_6; tda18212_set_params()
87 if_khz = dev->cfg.if_dvbt_7; tda18212_set_params()
91 if_khz = dev->cfg.if_dvbt_8; tda18212_set_params()
102 if_khz = dev->cfg.if_dvbt2_6; tda18212_set_params()
106 if_khz = dev->cfg.if_dvbt2_7; tda18212_set_params()
110 if_khz = dev->cfg.if_dvbt2_8; tda18212_set_params()
120 if_khz = dev->cfg.if_dvbc; tda18212_set_params()
192 struct tda18212_config *cfg = client->dev.platform_data; tda18212_probe() local
193 struct dvb_frontend *fe = cfg->fe; tda18212_probe()
210 memcpy(&dev->cfg, cfg, sizeof(struct tda18212_config)); tda18212_probe()
261 struct dvb_frontend *fe = dev->cfg.fe; tda18212_remove()
H A Dmt2266.h28 extern struct dvb_frontend * mt2266_attach(struct dvb_frontend *fe, struct i2c_adapter *i2c, struct mt2266_config *cfg);
30 static inline struct dvb_frontend * mt2266_attach(struct dvb_frontend *fe, struct i2c_adapter *i2c, struct mt2266_config *cfg) mt2266_attach() argument
H A Dqt1010.h36 * @param cfg tuner hw based configuration
42 struct qt1010_config *cfg);
46 struct qt1010_config *cfg) qt1010_attach()
44 qt1010_attach(struct dvb_frontend *fe, struct i2c_adapter *i2c, struct qt1010_config *cfg) qt1010_attach() argument
H A Dtda827x.h51 * @param cfg optional callback function pointers.
57 struct tda827x_config *cfg);
62 struct tda827x_config *cfg) tda827x_attach()
59 tda827x_attach(struct dvb_frontend *fe, int addr, struct i2c_adapter *i2c, struct tda827x_config *cfg) tda827x_attach() argument
H A Dtda18271-fe.c1201 struct tda18271_config *cfg) tda18271_setup_configuration()
1205 priv->gate = (cfg) ? cfg->gate : TDA18271_GATE_AUTO; tda18271_setup_configuration()
1206 priv->role = (cfg) ? cfg->role : TDA18271_MASTER; tda18271_setup_configuration()
1207 priv->config = (cfg) ? cfg->config : 0; tda18271_setup_configuration()
1208 priv->small_i2c = (cfg) ? tda18271_setup_configuration()
1209 cfg->small_i2c : TDA18271_39_BYTE_CHUNK_INIT; tda18271_setup_configuration()
1210 priv->output_opt = (cfg) ? tda18271_setup_configuration()
1211 cfg->output_opt : TDA18271_OUTPUT_LT_XT_ON; tda18271_setup_configuration()
1216 static inline int tda18271_need_cal_on_startup(struct tda18271_config *cfg) tda18271_need_cal_on_startup() argument
1221 ((cfg) && (cfg->rf_cal_on_startup)) : tda18271_need_cal_on_startup()
1228 struct tda18271_config *cfg = (struct tda18271_config *) priv_cfg; tda18271_set_config() local
1230 tda18271_setup_configuration(fe, cfg); tda18271_set_config()
1232 if (tda18271_need_cal_on_startup(cfg)) tda18271_set_config()
1236 if ((cfg) && (cfg->std_map)) tda18271_set_config()
1237 tda18271_update_std_map(fe, cfg->std_map); tda18271_set_config()
1262 struct tda18271_config *cfg) tda18271_attach()
1279 tda18271_setup_configuration(fe, cfg); tda18271_attach()
1294 if ((cfg->delay_cal) && (!tda18271_need_cal_on_startup(cfg))) tda18271_attach()
1300 if ((tda18271_need_cal_on_startup(cfg)) && tda18271_attach()
1315 if (cfg) { tda18271_attach()
1316 if (cfg->gate != TDA18271_GATE_ANALOG) tda18271_attach()
1317 priv->gate = cfg->gate; tda18271_attach()
1318 if (cfg->role) tda18271_attach()
1319 priv->role = cfg->role; tda18271_attach()
1320 if (cfg->config) tda18271_attach()
1321 priv->config = cfg->config; tda18271_attach()
1322 if (cfg->small_i2c) tda18271_attach()
1323 priv->small_i2c = cfg->small_i2c; tda18271_attach()
1324 if (cfg->output_opt) tda18271_attach()
1325 priv->output_opt = cfg->output_opt; tda18271_attach()
1326 if (cfg->std_map) tda18271_attach()
1327 tda18271_update_std_map(fe, cfg->std_map); tda18271_attach()
1329 if (tda18271_need_cal_on_startup(cfg)) tda18271_attach()
1335 if ((cfg) && (cfg->std_map)) tda18271_attach()
1336 tda18271_update_std_map(fe, cfg->std_map); tda18271_attach()
1200 tda18271_setup_configuration(struct dvb_frontend *fe, struct tda18271_config *cfg) tda18271_setup_configuration() argument
1260 tda18271_attach(struct dvb_frontend *fe, u8 addr, struct i2c_adapter *i2c, struct tda18271_config *cfg) tda18271_attach() argument
H A Dmxl301rf.c35 struct mxl301rf_config cfg; member in struct:mxl301rf_state
41 return container_of(c, struct mxl301rf_state, cfg); cfg_to_state()
299 struct mxl301rf_config *cfg; mxl301rf_probe() local
307 cfg = client->dev.platform_data; mxl301rf_probe()
309 memcpy(&state->cfg, cfg, sizeof(state->cfg)); mxl301rf_probe()
310 fe = cfg->fe; mxl301rf_probe()
314 i2c_set_clientdata(client, &state->cfg); mxl301rf_probe()
324 state->cfg.fe->tuner_priv = NULL; mxl301rf_remove()
H A Dtda18218.c33 .addr = priv->cfg->i2c_address, tda18218_wr_regs()
47 remaining -= (priv->cfg->i2c_wr_max - 1)) { tda18218_wr_regs()
49 if (len2 > (priv->cfg->i2c_wr_max - 1)) tda18218_wr_regs()
50 len2 = (priv->cfg->i2c_wr_max - 1); tda18218_wr_regs()
79 .addr = priv->cfg->i2c_address, tda18218_rd_regs()
84 .addr = priv->cfg->i2c_address, tda18218_rd_regs()
294 struct i2c_adapter *i2c, struct tda18218_config *cfg) tda18218_attach()
313 priv->cfg = cfg; tda18218_attach()
338 if (priv->cfg->loop_through) { tda18218_attach()
293 tda18218_attach(struct dvb_frontend *fe, struct i2c_adapter *i2c, struct tda18218_config *cfg) tda18218_attach() argument
H A Dfc0012.c28 .addr = priv->cfg->i2c_address, .flags = 0, .buf = buf, .len = 2 fc0012_writereg()
43 { .addr = priv->cfg->i2c_address, .flags = 0, fc0012_readreg()
45 { .addr = priv->cfg->i2c_address, .flags = I2C_M_RD, fc0012_readreg()
97 switch (priv->cfg->xtal_freq) { fc0012_init()
107 if (priv->cfg->dual_master) fc0012_init()
110 if (priv->cfg->loop_through) fc0012_init()
151 switch (priv->cfg->xtal_freq) { fc0012_set_params()
444 struct i2c_adapter *i2c, const struct fc0012_config *cfg) fc0012_attach()
460 priv->cfg = cfg; fc0012_attach()
481 if (priv->cfg->loop_through) { fc0012_attach()
491 if (priv->cfg->clock_out) { fc0012_attach()
443 fc0012_attach(struct dvb_frontend *fe, struct i2c_adapter *i2c, const struct fc0012_config *cfg) fc0012_attach() argument
H A Dmt2131.c56 { .addr = priv->cfg->i2c_address, .flags = 0, mt2131_readreg()
58 { .addr = priv->cfg->i2c_address, .flags = I2C_M_RD, mt2131_readreg()
72 struct i2c_msg msg = { .addr = priv->cfg->i2c_address, .flags = 0, mt2131_writereg()
84 struct i2c_msg msg = { .addr = priv->cfg->i2c_address, mt2131_writeregs()
259 struct mt2131_config *cfg, u16 if1) mt2131_attach()
270 priv->cfg = cfg; mt2131_attach()
279 cfg->i2c_address); mt2131_attach()
285 cfg->i2c_address); mt2131_attach()
257 mt2131_attach(struct dvb_frontend *fe, struct i2c_adapter *i2c, struct mt2131_config *cfg, u16 if1) mt2131_attach() argument
/linux-4.1.27/net/sched/
H A Dact_bpf.c170 static int tcf_bpf_init_from_ops(struct nlattr **tb, struct tcf_bpf_cfg *cfg) tcf_bpf_init_from_ops() argument
201 cfg->bpf_ops = bpf_ops; tcf_bpf_init_from_ops()
202 cfg->bpf_num_ops = bpf_num_ops; tcf_bpf_init_from_ops()
203 cfg->filter = fp; tcf_bpf_init_from_ops()
204 cfg->is_ebpf = false; tcf_bpf_init_from_ops()
209 static int tcf_bpf_init_from_efd(struct nlattr **tb, struct tcf_bpf_cfg *cfg) tcf_bpf_init_from_efd() argument
236 cfg->bpf_fd = bpf_fd; tcf_bpf_init_from_efd()
237 cfg->bpf_name = name; tcf_bpf_init_from_efd()
238 cfg->filter = fp; tcf_bpf_init_from_efd()
239 cfg->is_ebpf = true; tcf_bpf_init_from_efd()
244 static void tcf_bpf_cfg_cleanup(const struct tcf_bpf_cfg *cfg) tcf_bpf_cfg_cleanup() argument
246 if (cfg->is_ebpf) tcf_bpf_cfg_cleanup()
247 bpf_prog_put(cfg->filter); tcf_bpf_cfg_cleanup()
249 bpf_prog_destroy(cfg->filter); tcf_bpf_cfg_cleanup()
251 kfree(cfg->bpf_ops); tcf_bpf_cfg_cleanup()
252 kfree(cfg->bpf_name); tcf_bpf_cfg_cleanup()
256 struct tcf_bpf_cfg *cfg) tcf_bpf_prog_fill_cfg()
258 cfg->is_ebpf = tcf_bpf_is_ebpf(prog); tcf_bpf_prog_fill_cfg()
259 cfg->filter = prog->filter; tcf_bpf_prog_fill_cfg()
261 cfg->bpf_ops = prog->bpf_ops; tcf_bpf_prog_fill_cfg()
262 cfg->bpf_name = prog->bpf_name; tcf_bpf_prog_fill_cfg()
270 struct tcf_bpf_cfg cfg, old; tcf_bpf_init() local
292 memset(&cfg, 0, sizeof(cfg)); tcf_bpf_init()
294 ret = is_bpf ? tcf_bpf_init_from_ops(tb, &cfg) : tcf_bpf_init()
295 tcf_bpf_init_from_efd(tb, &cfg); tcf_bpf_init()
324 prog->bpf_ops = cfg.bpf_ops; tcf_bpf_init()
325 prog->bpf_name = cfg.bpf_name; tcf_bpf_init()
327 if (cfg.bpf_num_ops) tcf_bpf_init()
328 prog->bpf_num_ops = cfg.bpf_num_ops; tcf_bpf_init()
329 if (cfg.bpf_fd) tcf_bpf_init()
330 prog->bpf_fd = cfg.bpf_fd; tcf_bpf_init()
333 prog->filter = cfg.filter; tcf_bpf_init()
345 tcf_bpf_cfg_cleanup(&cfg); tcf_bpf_init()
255 tcf_bpf_prog_fill_cfg(const struct tcf_bpf *prog, struct tcf_bpf_cfg *cfg) tcf_bpf_prog_fill_cfg() argument
/linux-4.1.27/arch/mips/oprofile/
H A Dop_model_loongson2.c52 static void loongson2_reg_setup(struct op_counter_config *cfg) loongson2_reg_setup() argument
63 if (cfg[0].enabled) { loongson2_reg_setup()
64 ctrl |= LOONGSON2_PERFCTRL_EVENT(0, cfg[0].event); loongson2_reg_setup()
65 reg.reset_counter1 = 0x80000000ULL - cfg[0].count; loongson2_reg_setup()
68 if (cfg[1].enabled) { loongson2_reg_setup()
69 ctrl |= LOONGSON2_PERFCTRL_EVENT(1, cfg[1].event); loongson2_reg_setup()
70 reg.reset_counter2 = 0x80000000ULL - cfg[1].count; loongson2_reg_setup()
73 if (cfg[0].enabled || cfg[1].enabled) { loongson2_reg_setup()
75 if (cfg[0].kernel || cfg[1].kernel) loongson2_reg_setup()
77 if (cfg[0].user || cfg[1].user) loongson2_reg_setup()
83 reg.cnt1_enabled = cfg[0].enabled; loongson2_reg_setup()
84 reg.cnt2_enabled = cfg[1].enabled; loongson2_reg_setup()
/linux-4.1.27/arch/mips/loongson/loongson-3/
H A Dhpet.c31 unsigned int cfg = smbus_read(offset); smbus_enable() local
33 cfg |= bit; smbus_enable()
34 smbus_write(offset, cfg); smbus_enable()
49 unsigned int cfg = hpet_read(HPET_CFG); hpet_start_counter() local
51 cfg |= HPET_CFG_ENABLE; hpet_start_counter()
52 hpet_write(HPET_CFG, cfg); hpet_start_counter()
57 unsigned int cfg = hpet_read(HPET_CFG); hpet_stop_counter() local
59 cfg &= ~HPET_CFG_ENABLE; hpet_stop_counter()
60 hpet_write(HPET_CFG, cfg); hpet_stop_counter()
84 int cfg = 0; hpet_set_mode() local
94 cfg = hpet_read(HPET_T0_CFG); hpet_set_mode()
95 cfg &= ~HPET_TN_LEVEL; hpet_set_mode()
96 cfg |= HPET_TN_ENABLE | HPET_TN_PERIODIC | hpet_set_mode()
98 hpet_write(HPET_T0_CFG, cfg); hpet_set_mode()
110 cfg = hpet_read(HPET_T0_CFG); hpet_set_mode()
111 cfg &= ~HPET_TN_ENABLE; hpet_set_mode()
112 hpet_write(HPET_T0_CFG, cfg); hpet_set_mode()
116 cfg = hpet_read(HPET_T0_CFG); hpet_set_mode()
121 cfg &= ~HPET_TN_PERIODIC; hpet_set_mode()
122 cfg |= HPET_TN_ENABLE | HPET_TN_32BIT; hpet_set_mode()
123 hpet_write(HPET_T0_CFG, cfg); hpet_set_mode()
/linux-4.1.27/arch/cris/arch-v32/mm/
H A Dl2cache.c15 reg_l2cache_rw_cfg cfg = {.en = regk_l2cache_yes}; l2cache_init() local
25 REG_WR(l2cache, regi_l2cache, rw_cfg, cfg); l2cache_init()
/linux-4.1.27/include/linux/
H A Deeprom_93xx46.h8 #define EE_ADDR8 0x01 /* 8 bit addr. cfg */
9 #define EE_ADDR16 0x02 /* 16 bit addr. cfg */
H A Dtransport_class.h28 #define DECLARE_TRANSPORT_CLASS(cls, nm, su, rm, cfg) \
35 .configure = cfg, \
44 #define DECLARE_ANON_TRANSPORT_CLASS(cls, mtch, cfg) \
47 .configure = cfg, \
/linux-4.1.27/drivers/media/platform/davinci/
H A Dvpbe.c65 struct vpbe_config *cfg = vpbe_dev->cfg; vpbe_current_encoder_info() local
68 return ((index == 0) ? &cfg->venc : vpbe_current_encoder_info()
69 &cfg->ext_encoders[index-1]); vpbe_current_encoder_info()
75 * @vpbe_config - ptr to vpbe cfg
80 static int vpbe_find_encoder_sd_index(struct vpbe_config *cfg, vpbe_find_encoder_sd_index() argument
83 char *encoder_name = cfg->outputs[index].subdev_name; vpbe_find_encoder_sd_index()
87 if (!strcmp(encoder_name, cfg->venc.module_name)) vpbe_find_encoder_sd_index()
90 for (i = 0; i < cfg->num_ext_encoders; i++) { vpbe_find_encoder_sd_index()
92 cfg->ext_encoders[i].module_name)) vpbe_find_encoder_sd_index()
132 struct vpbe_config *cfg = vpbe_dev->cfg; vpbe_enum_outputs() local
135 if (temp_index >= cfg->num_outputs) vpbe_enum_outputs()
138 *output = cfg->outputs[temp_index].output; vpbe_enum_outputs()
147 struct vpbe_config *cfg = vpbe_dev->cfg; vpbe_get_mode_info() local
155 for (i = 0; i < cfg->outputs[curr_output].num_modes; i++) { vpbe_get_mode_info()
156 var = cfg->outputs[curr_output].modes[i]; vpbe_get_mode_info()
181 struct vpbe_config *cfg = vpbe_dev->cfg; vpbe_get_std_info() local
186 for (i = 0; i < vpbe_dev->cfg->outputs[curr_output].num_modes; i++) { vpbe_get_std_info()
187 var = cfg->outputs[curr_output].modes[i]; vpbe_get_std_info()
201 struct vpbe_config *cfg = vpbe_dev->cfg; vpbe_get_std_info_by_name() local
206 for (i = 0; i < vpbe_dev->cfg->outputs[curr_output].num_modes; i++) { vpbe_get_std_info_by_name()
207 var = cfg->outputs[curr_output].modes[i]; vpbe_get_std_info_by_name()
228 struct vpbe_config *cfg = vpbe_dev->cfg; vpbe_set_output() local
235 if (index >= cfg->num_outputs) vpbe_set_output()
241 enc_out_index = cfg->outputs[index].output.index; vpbe_set_output()
252 cfg->outputs[index].subdev_name)) { vpbe_set_output()
254 sd_index = vpbe_find_encoder_sd_index(cfg, index); vpbe_set_output()
260 if_params = cfg->outputs[index].if_params; vpbe_set_output()
281 cfg->outputs[index].default_mode, index); vpbe_set_output()
299 struct vpbe_config *cfg = vpbe_dev->cfg; vpbe_set_default_output() local
303 for (i = 0; i < cfg->num_outputs; i++) { vpbe_set_default_output()
305 cfg->outputs[i].output.name)) { vpbe_set_default_output()
335 struct vpbe_config *cfg = vpbe_dev->cfg; vpbe_s_dv_timings() local
337 struct vpbe_output *output = &cfg->outputs[out_index]; vpbe_s_dv_timings()
342 if (!(cfg->outputs[out_index].output.capabilities & vpbe_s_dv_timings()
387 struct vpbe_config *cfg = vpbe_dev->cfg; vpbe_g_dv_timings() local
390 if (!(cfg->outputs[out_index].output.capabilities & vpbe_g_dv_timings()
412 struct vpbe_config *cfg = vpbe_dev->cfg; vpbe_enum_dv_timings() local
414 struct vpbe_output *output = &cfg->outputs[out_index]; vpbe_enum_dv_timings()
443 struct vpbe_config *cfg = vpbe_dev->cfg; vpbe_s_std() local
448 if (!(cfg->outputs[out_index].output.capabilities & vpbe_s_std()
483 struct vpbe_config *cfg = vpbe_dev->cfg; vpbe_g_std() local
486 if (!(cfg->outputs[out_index].output.capabilities & V4L2_OUT_CAP_STD)) vpbe_g_std()
508 struct vpbe_config *cfg = vpbe_dev->cfg; vpbe_set_mode() local
518 for (i = 0; i < cfg->outputs[out_index].num_modes; i++) { vpbe_set_mode()
520 cfg->outputs[out_index].modes[i].name)) { vpbe_set_mode()
521 preset_mode = &cfg->outputs[out_index].modes[i]; vpbe_set_mode()
619 if (strcmp(vpbe_dev->cfg->module_name, "dm644x-vpbe-display") != 0) { vpbe_initialize()
653 vpbe_dev->cfg->venc.module_name); vpbe_initialize()
678 num_encoders = vpbe_dev->cfg->num_ext_encoders + 1; vpbe_initialize()
689 i2c_adap = i2c_get_adapter(vpbe_dev->cfg->i2c_adapter_id); vpbe_initialize()
690 for (i = 0; i < (vpbe_dev->cfg->num_ext_encoders + 1); i++) { vpbe_initialize()
697 enc_info = &vpbe_dev->cfg->ext_encoders[i]; vpbe_initialize()
719 if ((strcmp(vpbe_dev->cfg->module_name, "dm365-vpbe-display") == 0) && vpbe_initialize()
720 vpbe_dev->cfg->amp != NULL) { vpbe_initialize()
721 amp_info = vpbe_dev->cfg->amp; vpbe_initialize()
775 if (strcmp(vpbe_dev->cfg->module_name, "dm644x-vpbe-display") != 0) { vpbe_initialize()
795 if (strcmp(vpbe_dev->cfg->module_name, "dm644x-vpbe-display") != 0) { vpbe_deinitialize()
826 struct vpbe_config *cfg; vpbe_probe() local
833 cfg = pdev->dev.platform_data; vpbe_probe()
835 if (!cfg->module_name[0] || vpbe_probe()
836 !cfg->osd.module_name[0] || vpbe_probe()
837 !cfg->venc.module_name[0]) { vpbe_probe()
849 vpbe_dev->cfg = cfg; vpbe_probe()
853 if (cfg->outputs->num_modes > 0) vpbe_probe()
854 vpbe_dev->current_timings = vpbe_dev->cfg->outputs[0].modes[0]; vpbe_probe()
H A Dvpbe_display.c385 struct osd_layer_config *cfg = &layer->layer_info.config; vpbe_set_osd_display_params() local
408 if (cfg->pixfmt == PIXFMT_NV12) { vpbe_set_osd_display_params()
431 struct osd_layer_config *cfg = &layer->layer_info.config; vpbe_disp_calculate_scale_factor() local
458 cfg->xsize = pixfmt->width; vpbe_disp_calculate_scale_factor()
459 cfg->ysize = pixfmt->height; vpbe_disp_calculate_scale_factor()
473 cfg->xsize *= h_scale; vpbe_disp_calculate_scale_factor()
474 if (cfg->xsize < expected_xsize) { vpbe_disp_calculate_scale_factor()
477 calculated_xsize = (cfg->xsize * vpbe_disp_calculate_scale_factor()
482 cfg->xsize = calculated_xsize; vpbe_disp_calculate_scale_factor()
494 cfg->xsize = expected_xsize; vpbe_disp_calculate_scale_factor()
505 cfg->ysize *= v_scale; vpbe_disp_calculate_scale_factor()
506 if (cfg->ysize < expected_ysize) { vpbe_disp_calculate_scale_factor()
508 calculated_xsize = (cfg->ysize * vpbe_disp_calculate_scale_factor()
513 cfg->ysize = calculated_xsize; vpbe_disp_calculate_scale_factor()
525 cfg->ysize = expected_ysize; vpbe_disp_calculate_scale_factor()
529 cfg->xsize, cfg->ysize); vpbe_disp_calculate_scale_factor()
536 struct osd_layer_config *cfg = &layer->layer_info.config; vpbe_disp_adj_position() local
539 cfg->xpos = min((unsigned int)left, vpbe_disp_adj_position()
540 vpbe_dev->current_timings.xres - cfg->xsize); vpbe_disp_adj_position()
541 cfg->ypos = min((unsigned int)top, vpbe_disp_adj_position()
542 vpbe_dev->current_timings.yres - cfg->ysize); vpbe_disp_adj_position()
546 cfg->xpos, cfg->ypos); vpbe_disp_adj_position()
648 strlcpy(cap->card, vpbe_dev->cfg->module_name, sizeof(cap->card)); vpbe_display_querycap()
659 struct osd_layer_config *cfg = &layer->layer_info.config; vpbe_display_s_crop() local
680 layer->layer_info.id, cfg); vpbe_display_s_crop()
688 layer->layer_info.id, cfg); vpbe_display_s_crop()
725 struct osd_layer_config *cfg = &layer->layer_info.config; vpbe_display_g_crop() local
739 layer->layer_info.id, cfg); vpbe_display_g_crop()
740 rect->top = cfg->ypos; vpbe_display_g_crop()
741 rect->left = cfg->xpos; vpbe_display_g_crop()
742 rect->width = cfg->xsize; vpbe_display_g_crop()
743 rect->height = cfg->ysize; vpbe_display_g_crop()
824 struct osd_layer_config *cfg = &layer->layer_info.config; vpbe_display_s_fmt() local
867 layer->layer_info.id, cfg); vpbe_display_s_fmt()
869 cfg->xsize = pixfmt->width; vpbe_display_s_fmt()
870 cfg->ysize = pixfmt->height; vpbe_display_s_fmt()
871 cfg->line_length = pixfmt->bytesperline; vpbe_display_s_fmt()
872 cfg->ypos = 0; vpbe_display_s_fmt()
873 cfg->xpos = 0; vpbe_display_s_fmt()
874 cfg->interlaced = vpbe_dev->current_timings.interlaced; vpbe_display_s_fmt()
877 cfg->pixfmt = PIXFMT_YCBCRI; vpbe_display_s_fmt()
882 cfg->pixfmt = PIXFMT_NV12; vpbe_display_s_fmt()
890 layer->layer_info.id, cfg); vpbe_display_s_fmt()
899 layer->layer_info.id, cfg); vpbe_display_s_fmt()
1199 struct osd_layer_config *cfg = &layer->layer_info.config; vpbe_display_release() local
1214 if (cfg->pixfmt == PIXFMT_NV12) { vpbe_display_release()
/linux-4.1.27/drivers/gpu/ipu-v3/
H A Dipu-csi.c227 static int mbus_code_to_bus_cfg(struct ipu_csi_bus_config *cfg, u32 mbus_code) mbus_code_to_bus_cfg() argument
234 cfg->data_fmt = CSI_SENS_CONF_DATA_FMT_RGB565; mbus_code_to_bus_cfg()
235 cfg->mipi_dt = MIPI_DT_RGB565; mbus_code_to_bus_cfg()
236 cfg->data_width = IPU_CSI_DATA_WIDTH_8; mbus_code_to_bus_cfg()
240 cfg->data_fmt = CSI_SENS_CONF_DATA_FMT_RGB444; mbus_code_to_bus_cfg()
241 cfg->mipi_dt = MIPI_DT_RGB444; mbus_code_to_bus_cfg()
242 cfg->data_width = IPU_CSI_DATA_WIDTH_8; mbus_code_to_bus_cfg()
246 cfg->data_fmt = CSI_SENS_CONF_DATA_FMT_RGB555; mbus_code_to_bus_cfg()
247 cfg->mipi_dt = MIPI_DT_RGB555; mbus_code_to_bus_cfg()
248 cfg->data_width = IPU_CSI_DATA_WIDTH_8; mbus_code_to_bus_cfg()
251 cfg->data_fmt = CSI_SENS_CONF_DATA_FMT_YUV422_UYVY; mbus_code_to_bus_cfg()
252 cfg->mipi_dt = MIPI_DT_YUV422; mbus_code_to_bus_cfg()
253 cfg->data_width = IPU_CSI_DATA_WIDTH_8; mbus_code_to_bus_cfg()
256 cfg->data_fmt = CSI_SENS_CONF_DATA_FMT_YUV422_YUYV; mbus_code_to_bus_cfg()
257 cfg->mipi_dt = MIPI_DT_YUV422; mbus_code_to_bus_cfg()
258 cfg->data_width = IPU_CSI_DATA_WIDTH_8; mbus_code_to_bus_cfg()
261 cfg->data_fmt = CSI_SENS_CONF_DATA_FMT_YUV422_UYVY; mbus_code_to_bus_cfg()
262 cfg->mipi_dt = MIPI_DT_YUV422; mbus_code_to_bus_cfg()
263 cfg->data_width = IPU_CSI_DATA_WIDTH_16; mbus_code_to_bus_cfg()
266 cfg->data_fmt = CSI_SENS_CONF_DATA_FMT_YUV422_YUYV; mbus_code_to_bus_cfg()
267 cfg->mipi_dt = MIPI_DT_YUV422; mbus_code_to_bus_cfg()
268 cfg->data_width = IPU_CSI_DATA_WIDTH_16; mbus_code_to_bus_cfg()
274 cfg->data_fmt = CSI_SENS_CONF_DATA_FMT_BAYER; mbus_code_to_bus_cfg()
275 cfg->mipi_dt = MIPI_DT_RAW8; mbus_code_to_bus_cfg()
276 cfg->data_width = IPU_CSI_DATA_WIDTH_8; mbus_code_to_bus_cfg()
286 cfg->data_fmt = CSI_SENS_CONF_DATA_FMT_BAYER; mbus_code_to_bus_cfg()
287 cfg->mipi_dt = MIPI_DT_RAW10; mbus_code_to_bus_cfg()
288 cfg->data_width = IPU_CSI_DATA_WIDTH_8; mbus_code_to_bus_cfg()
294 cfg->data_fmt = CSI_SENS_CONF_DATA_FMT_BAYER; mbus_code_to_bus_cfg()
295 cfg->mipi_dt = MIPI_DT_RAW10; mbus_code_to_bus_cfg()
296 cfg->data_width = IPU_CSI_DATA_WIDTH_10; mbus_code_to_bus_cfg()
302 cfg->data_fmt = CSI_SENS_CONF_DATA_FMT_BAYER; mbus_code_to_bus_cfg()
303 cfg->mipi_dt = MIPI_DT_RAW12; mbus_code_to_bus_cfg()
304 cfg->data_width = IPU_CSI_DATA_WIDTH_12; mbus_code_to_bus_cfg()
308 cfg->data_fmt = CSI_SENS_CONF_DATA_FMT_JPEG; mbus_code_to_bus_cfg()
309 cfg->mipi_dt = MIPI_DT_RAW8; mbus_code_to_bus_cfg()
310 cfg->data_width = IPU_CSI_DATA_WIDTH_8; mbus_code_to_bus_cfg()
365 struct ipu_csi_bus_config cfg; ipu_csi_init_interface() local
369 fill_csi_bus_cfg(&cfg, mbus_cfg, mbus_fmt); ipu_csi_init_interface()
372 data |= cfg.data_width << CSI_SENS_CONF_DATA_WIDTH_SHIFT | ipu_csi_init_interface()
373 cfg.data_fmt << CSI_SENS_CONF_DATA_FMT_SHIFT | ipu_csi_init_interface()
374 cfg.data_pol << CSI_SENS_CONF_DATA_POL_SHIFT | ipu_csi_init_interface()
375 cfg.vsync_pol << CSI_SENS_CONF_VSYNC_POL_SHIFT | ipu_csi_init_interface()
376 cfg.hsync_pol << CSI_SENS_CONF_HSYNC_POL_SHIFT | ipu_csi_init_interface()
377 cfg.pixclk_pol << CSI_SENS_CONF_PIX_CLK_POL_SHIFT | ipu_csi_init_interface()
378 cfg.ext_vsync << CSI_SENS_CONF_EXT_VSYNC_SHIFT | ipu_csi_init_interface()
379 cfg.clk_mode << CSI_SENS_CONF_SENS_PRTCL_SHIFT | ipu_csi_init_interface()
380 cfg.pack_tight << CSI_SENS_CONF_PACK_TIGHT_SHIFT | ipu_csi_init_interface()
381 cfg.force_eof << CSI_SENS_CONF_FORCE_EOF_SHIFT | ipu_csi_init_interface()
382 cfg.data_en_pol << CSI_SENS_CONF_DATA_EN_POL_SHIFT; ipu_csi_init_interface()
395 switch (cfg.clk_mode) { ipu_csi_init_interface()
564 struct ipu_csi_bus_config cfg; ipu_csi_set_mipi_datatype() local
571 mbus_code_to_bus_cfg(&cfg, mbus_fmt->code); ipu_csi_set_mipi_datatype()
577 temp |= (cfg.mipi_dt << (vc * 8)); ipu_csi_set_mipi_datatype()
/linux-4.1.27/drivers/iommu/
H A Dio-pgtable-arm.c231 if (data->iop.cfg.quirks & IO_PGTABLE_QUIRK_ARM_NS) arm_lpae_init_pte()
243 data->iop.cfg.tlb->flush_pgtable(ptep, sizeof(*ptep), data->iop.cookie); arm_lpae_init_pte()
259 if (size == block_size && (size & data->iop.cfg.pgsize_bitmap)) __arm_lpae_map()
274 data->iop.cfg.tlb->flush_pgtable(cptep, 1UL << data->pg_shift, __arm_lpae_map()
277 if (data->iop.cfg.quirks & IO_PGTABLE_QUIRK_ARM_NS) __arm_lpae_map()
280 data->iop.cfg.tlb->flush_pgtable(ptep, sizeof(*ptep), cookie); __arm_lpae_map()
386 const struct iommu_gather_ops *tlb = data->iop.cfg.tlb; arm_lpae_split_blk_unmap()
424 const struct iommu_gather_ops *tlb = data->iop.cfg.tlb; __arm_lpae_unmap()
477 iop->cfg.tlb->tlb_sync(iop->cookie); arm_lpae_unmap()
517 static void arm_lpae_restrict_pgsizes(struct io_pgtable_cfg *cfg) arm_lpae_restrict_pgsizes() argument
528 if (cfg->pgsize_bitmap & PAGE_SIZE) arm_lpae_restrict_pgsizes()
530 else if (cfg->pgsize_bitmap & ~PAGE_MASK) arm_lpae_restrict_pgsizes()
531 granule = 1UL << __fls(cfg->pgsize_bitmap & ~PAGE_MASK); arm_lpae_restrict_pgsizes()
532 else if (cfg->pgsize_bitmap & PAGE_MASK) arm_lpae_restrict_pgsizes()
533 granule = 1UL << __ffs(cfg->pgsize_bitmap & PAGE_MASK); arm_lpae_restrict_pgsizes()
539 cfg->pgsize_bitmap &= (SZ_4K | SZ_2M | SZ_1G); arm_lpae_restrict_pgsizes()
542 cfg->pgsize_bitmap &= (SZ_16K | SZ_32M); arm_lpae_restrict_pgsizes()
545 cfg->pgsize_bitmap &= (SZ_64K | SZ_512M); arm_lpae_restrict_pgsizes()
548 cfg->pgsize_bitmap = 0; arm_lpae_restrict_pgsizes()
553 arm_lpae_alloc_pgtable(struct io_pgtable_cfg *cfg) arm_lpae_alloc_pgtable() argument
558 arm_lpae_restrict_pgsizes(cfg); arm_lpae_alloc_pgtable()
560 if (!(cfg->pgsize_bitmap & (SZ_4K | SZ_16K | SZ_64K))) arm_lpae_alloc_pgtable()
563 if (cfg->ias > ARM_LPAE_MAX_ADDR_BITS) arm_lpae_alloc_pgtable()
566 if (cfg->oas > ARM_LPAE_MAX_ADDR_BITS) arm_lpae_alloc_pgtable()
573 data->pg_shift = __ffs(cfg->pgsize_bitmap); arm_lpae_alloc_pgtable()
576 va_bits = cfg->ias - data->pg_shift; arm_lpae_alloc_pgtable()
593 arm_64_lpae_alloc_pgtable_s1(struct io_pgtable_cfg *cfg, void *cookie) arm_64_lpae_alloc_pgtable_s1() argument
596 struct arm_lpae_io_pgtable *data = arm_lpae_alloc_pgtable(cfg); arm_64_lpae_alloc_pgtable_s1()
618 switch (cfg->oas) { arm_64_lpae_alloc_pgtable_s1()
641 reg |= (64ULL - cfg->ias) << ARM_LPAE_TCR_T0SZ_SHIFT; arm_64_lpae_alloc_pgtable_s1()
645 cfg->arm_lpae_s1_cfg.tcr = reg; arm_64_lpae_alloc_pgtable_s1()
655 cfg->arm_lpae_s1_cfg.mair[0] = reg; arm_64_lpae_alloc_pgtable_s1()
656 cfg->arm_lpae_s1_cfg.mair[1] = 0; arm_64_lpae_alloc_pgtable_s1()
663 cfg->tlb->flush_pgtable(data->pgd, data->pgd_size, cookie); arm_64_lpae_alloc_pgtable_s1()
666 cfg->arm_lpae_s1_cfg.ttbr[0] = virt_to_phys(data->pgd); arm_64_lpae_alloc_pgtable_s1()
667 cfg->arm_lpae_s1_cfg.ttbr[1] = 0; arm_64_lpae_alloc_pgtable_s1()
676 arm_64_lpae_alloc_pgtable_s2(struct io_pgtable_cfg *cfg, void *cookie) arm_64_lpae_alloc_pgtable_s2() argument
679 struct arm_lpae_io_pgtable *data = arm_lpae_alloc_pgtable(cfg); arm_64_lpae_alloc_pgtable_s2()
719 switch (cfg->oas) { arm_64_lpae_alloc_pgtable_s2()
742 reg |= (64ULL - cfg->ias) << ARM_LPAE_TCR_T0SZ_SHIFT; arm_64_lpae_alloc_pgtable_s2()
744 cfg->arm_lpae_s2_cfg.vtcr = reg; arm_64_lpae_alloc_pgtable_s2()
751 cfg->tlb->flush_pgtable(data->pgd, data->pgd_size, cookie); arm_64_lpae_alloc_pgtable_s2()
754 cfg->arm_lpae_s2_cfg.vttbr = virt_to_phys(data->pgd); arm_64_lpae_alloc_pgtable_s2()
763 arm_32_lpae_alloc_pgtable_s1(struct io_pgtable_cfg *cfg, void *cookie) arm_32_lpae_alloc_pgtable_s1() argument
767 if (cfg->ias > 32 || cfg->oas > 40) arm_32_lpae_alloc_pgtable_s1()
770 cfg->pgsize_bitmap &= (SZ_4K | SZ_2M | SZ_1G); arm_32_lpae_alloc_pgtable_s1()
771 iop = arm_64_lpae_alloc_pgtable_s1(cfg, cookie); arm_32_lpae_alloc_pgtable_s1()
773 cfg->arm_lpae_s1_cfg.tcr |= ARM_32_LPAE_TCR_EAE; arm_32_lpae_alloc_pgtable_s1()
774 cfg->arm_lpae_s1_cfg.tcr &= 0xffffffff; arm_32_lpae_alloc_pgtable_s1()
781 arm_32_lpae_alloc_pgtable_s2(struct io_pgtable_cfg *cfg, void *cookie) arm_32_lpae_alloc_pgtable_s2() argument
785 if (cfg->ias > 40 || cfg->oas > 40) arm_32_lpae_alloc_pgtable_s2()
788 cfg->pgsize_bitmap &= (SZ_4K | SZ_2M | SZ_1G); arm_32_lpae_alloc_pgtable_s2()
789 iop = arm_64_lpae_alloc_pgtable_s2(cfg, cookie); arm_32_lpae_alloc_pgtable_s2()
791 cfg->arm_lpae_s2_cfg.vtcr &= 0xffffffff; arm_32_lpae_alloc_pgtable_s2()
852 struct io_pgtable_cfg *cfg = &data->iop.cfg; arm_lpae_dump_ops() local
854 pr_err("cfg: pgsize_bitmap 0x%lx, ias %u-bit\n", arm_lpae_dump_ops()
855 cfg->pgsize_bitmap, cfg->ias); arm_lpae_dump_ops()
868 static int __init arm_lpae_run_tests(struct io_pgtable_cfg *cfg) arm_lpae_run_tests() argument
883 cfg_cookie = cfg; arm_lpae_run_tests()
884 ops = alloc_io_pgtable_ops(fmts[i], cfg, cfg); arm_lpae_run_tests()
907 j = find_first_bit(&cfg->pgsize_bitmap, BITS_PER_LONG); arm_lpae_run_tests()
927 j = find_next_bit(&cfg->pgsize_bitmap, BITS_PER_LONG, j); arm_lpae_run_tests()
931 size = 1UL << __ffs(cfg->pgsize_bitmap); arm_lpae_run_tests()
944 j = find_first_bit(&cfg->pgsize_bitmap, BITS_PER_LONG); arm_lpae_run_tests()
963 j = find_next_bit(&cfg->pgsize_bitmap, BITS_PER_LONG, j); arm_lpae_run_tests()
986 struct io_pgtable_cfg cfg = { arm_lpae_do_selftests() local
993 cfg.pgsize_bitmap = pgsize[i]; arm_lpae_do_selftests()
994 cfg.ias = ias[j]; arm_lpae_do_selftests()
997 if (arm_lpae_run_tests(&cfg)) arm_lpae_do_selftests()
H A Darm-smmu.c274 struct arm_smmu_master_cfg cfg; member in struct:arm_smmu_master
323 #define ARM_SMMU_CB_ASID(cfg) ((cfg)->cbndx)
324 #define ARM_SMMU_CB_VMID(cfg) ((cfg)->cbndx + 1)
336 struct arm_smmu_cfg cfg; member in struct:arm_smmu_domain
413 struct arm_smmu_master_cfg *cfg = NULL; find_smmu_master_cfg() local
417 cfg = iommu_group_get_iommudata(group); find_smmu_master_cfg()
421 return cfg; find_smmu_master_cfg()
476 master->cfg.num_streamids = masterspec->args_count; register_smmu_master()
478 for (i = 0; i < master->cfg.num_streamids; ++i) { register_smmu_master()
488 master->cfg.streamids[i] = streamid; register_smmu_master()
556 struct arm_smmu_cfg *cfg = &smmu_domain->cfg; arm_smmu_tlb_inv_context() local
558 bool stage1 = cfg->cbar != CBAR_TYPE_S2_TRANS; arm_smmu_tlb_inv_context()
562 base = ARM_SMMU_CB_BASE(smmu) + ARM_SMMU_CB(smmu, cfg->cbndx); arm_smmu_tlb_inv_context()
563 writel_relaxed(ARM_SMMU_CB_ASID(cfg), arm_smmu_tlb_inv_context()
567 writel_relaxed(ARM_SMMU_CB_VMID(cfg), arm_smmu_tlb_inv_context()
578 struct arm_smmu_cfg *cfg = &smmu_domain->cfg; arm_smmu_tlb_inv_range_nosync() local
580 bool stage1 = cfg->cbar != CBAR_TYPE_S2_TRANS; arm_smmu_tlb_inv_range_nosync()
584 reg = ARM_SMMU_CB_BASE(smmu) + ARM_SMMU_CB(smmu, cfg->cbndx); arm_smmu_tlb_inv_range_nosync()
589 iova |= ARM_SMMU_CB_ASID(cfg); arm_smmu_tlb_inv_range_nosync()
594 iova |= (u64)ARM_SMMU_CB_ASID(cfg) << 48; arm_smmu_tlb_inv_range_nosync()
600 reg = ARM_SMMU_CB_BASE(smmu) + ARM_SMMU_CB(smmu, cfg->cbndx); arm_smmu_tlb_inv_range_nosync()
607 writel_relaxed(ARM_SMMU_CB_VMID(cfg), reg); arm_smmu_tlb_inv_range_nosync()
648 struct arm_smmu_cfg *cfg = &smmu_domain->cfg; arm_smmu_context_fault() local
652 cb_base = ARM_SMMU_CB_BASE(smmu) + ARM_SMMU_CB(smmu, cfg->cbndx); arm_smmu_context_fault()
679 iova, fsynr, cfg->cbndx); arm_smmu_context_fault()
723 struct arm_smmu_cfg *cfg = &smmu_domain->cfg; arm_smmu_init_context_bank() local
729 stage1 = cfg->cbar != CBAR_TYPE_S2_TRANS; arm_smmu_init_context_bank()
730 cb_base = ARM_SMMU_CB_BASE(smmu) + ARM_SMMU_CB(smmu, cfg->cbndx); arm_smmu_init_context_bank()
743 writel_relaxed(reg, gr1_base + ARM_SMMU_GR1_CBA2R(cfg->cbndx)); arm_smmu_init_context_bank()
747 reg = cfg->cbar; arm_smmu_init_context_bank()
749 reg |= cfg->irptndx << CBAR_IRPTNDX_SHIFT; arm_smmu_init_context_bank()
759 reg |= ARM_SMMU_CB_VMID(cfg) << CBAR_VMID_SHIFT; arm_smmu_init_context_bank()
761 writel_relaxed(reg, gr1_base + ARM_SMMU_GR1_CBAR(cfg->cbndx)); arm_smmu_init_context_bank()
768 reg |= ARM_SMMU_CB_ASID(cfg) << TTBRn_HI_ASID_SHIFT; arm_smmu_init_context_bank()
774 reg |= ARM_SMMU_CB_ASID(cfg) << TTBRn_HI_ASID_SHIFT; arm_smmu_init_context_bank()
824 struct arm_smmu_cfg *cfg = &smmu_domain->cfg; arm_smmu_init_domain_context() local
855 cfg->cbar = CBAR_TYPE_S1_TRANS_S2_BYPASS; arm_smmu_init_domain_context()
870 cfg->cbar = CBAR_TYPE_S2_TRANS; arm_smmu_init_domain_context()
889 cfg->cbndx = ret; arm_smmu_init_domain_context()
891 cfg->irptndx = atomic_inc_return(&smmu->irptndx); arm_smmu_init_domain_context()
892 cfg->irptndx %= smmu->num_context_irqs; arm_smmu_init_domain_context()
894 cfg->irptndx = cfg->cbndx; arm_smmu_init_domain_context()
914 /* Initialise the context bank with our page table cfg */ arm_smmu_init_domain_context()
921 irq = smmu->irqs[smmu->num_global_irqs + cfg->irptndx]; arm_smmu_init_domain_context()
926 cfg->irptndx, irq); arm_smmu_init_domain_context()
927 cfg->irptndx = INVALID_IRPTNDX; arm_smmu_init_domain_context()
947 struct arm_smmu_cfg *cfg = &smmu_domain->cfg; arm_smmu_destroy_domain_context() local
958 cb_base = ARM_SMMU_CB_BASE(smmu) + ARM_SMMU_CB(smmu, cfg->cbndx); arm_smmu_destroy_domain_context()
961 if (cfg->irptndx != INVALID_IRPTNDX) { arm_smmu_destroy_domain_context()
962 irq = smmu->irqs[smmu->num_global_irqs + cfg->irptndx]; arm_smmu_destroy_domain_context()
969 __arm_smmu_free_bitmap(smmu->context_map, cfg->cbndx); arm_smmu_destroy_domain_context()
1006 struct arm_smmu_master_cfg *cfg) arm_smmu_master_configure_smrs()
1015 if (cfg->smrs) arm_smmu_master_configure_smrs()
1018 smrs = kmalloc_array(cfg->num_streamids, sizeof(*smrs), GFP_KERNEL); arm_smmu_master_configure_smrs()
1021 cfg->num_streamids); arm_smmu_master_configure_smrs()
1026 for (i = 0; i < cfg->num_streamids; ++i) { arm_smmu_master_configure_smrs()
1037 .id = cfg->streamids[i], arm_smmu_master_configure_smrs()
1042 for (i = 0; i < cfg->num_streamids; ++i) { arm_smmu_master_configure_smrs()
1048 cfg->smrs = smrs; arm_smmu_master_configure_smrs()
1059 struct arm_smmu_master_cfg *cfg) arm_smmu_master_free_smrs()
1063 struct arm_smmu_smr *smrs = cfg->smrs; arm_smmu_master_free_smrs()
1069 for (i = 0; i < cfg->num_streamids; ++i) { arm_smmu_master_free_smrs()
1076 cfg->smrs = NULL; arm_smmu_master_free_smrs()
1081 struct arm_smmu_master_cfg *cfg) arm_smmu_domain_add_master()
1088 ret = arm_smmu_master_configure_smrs(smmu, cfg); arm_smmu_domain_add_master()
1092 for (i = 0; i < cfg->num_streamids; ++i) { arm_smmu_domain_add_master()
1095 idx = cfg->smrs ? cfg->smrs[i].idx : cfg->streamids[i]; arm_smmu_domain_add_master()
1097 (smmu_domain->cfg.cbndx << S2CR_CBNDX_SHIFT); arm_smmu_domain_add_master()
1105 struct arm_smmu_master_cfg *cfg) arm_smmu_domain_remove_master()
1112 if ((smmu->features & ARM_SMMU_FEAT_STREAM_MATCH) && !cfg->smrs) arm_smmu_domain_remove_master()
1119 for (i = 0; i < cfg->num_streamids; ++i) { arm_smmu_domain_remove_master()
1120 u32 idx = cfg->smrs ? cfg->smrs[i].idx : cfg->streamids[i]; arm_smmu_domain_remove_master()
1126 arm_smmu_master_free_smrs(smmu, cfg); arm_smmu_domain_remove_master()
1134 struct arm_smmu_master_cfg *cfg; arm_smmu_attach_dev() local
1164 cfg = find_smmu_master_cfg(dev); arm_smmu_attach_dev()
1165 if (!cfg) arm_smmu_attach_dev()
1168 ret = arm_smmu_domain_add_master(smmu_domain, cfg); arm_smmu_attach_dev()
1177 struct arm_smmu_master_cfg *cfg; arm_smmu_detach_dev() local
1179 cfg = find_smmu_master_cfg(dev); arm_smmu_detach_dev()
1180 if (!cfg) arm_smmu_detach_dev()
1184 arm_smmu_domain_remove_master(smmu_domain, cfg); arm_smmu_detach_dev()
1226 struct arm_smmu_cfg *cfg = &smmu_domain->cfg; arm_smmu_iova_to_phys_hard() local
1233 cb_base = ARM_SMMU_CB_BASE(smmu) + ARM_SMMU_CB(smmu, cfg->cbndx); arm_smmu_iova_to_phys_hard()
1323 struct arm_smmu_master_cfg *cfg; arm_smmu_add_pci_device() local
1329 cfg = iommu_group_get_iommudata(group); arm_smmu_add_pci_device()
1330 if (!cfg) { arm_smmu_add_pci_device()
1331 cfg = kzalloc(sizeof(*cfg), GFP_KERNEL); arm_smmu_add_pci_device()
1332 if (!cfg) { arm_smmu_add_pci_device()
1337 iommu_group_set_iommudata(group, cfg, arm_smmu_add_pci_device()
1341 if (cfg->num_streamids >= MAX_MASTER_STREAMIDS) { arm_smmu_add_pci_device()
1351 for (i = 0; i < cfg->num_streamids; ++i) arm_smmu_add_pci_device()
1352 if (cfg->streamids[i] == sid) arm_smmu_add_pci_device()
1356 if (i == cfg->num_streamids) arm_smmu_add_pci_device()
1357 cfg->streamids[cfg->num_streamids++] = sid; arm_smmu_add_pci_device()
1383 iommu_group_set_iommudata(group, &master->cfg, NULL); arm_smmu_add_platform_device()
1005 arm_smmu_master_configure_smrs(struct arm_smmu_device *smmu, struct arm_smmu_master_cfg *cfg) arm_smmu_master_configure_smrs() argument
1058 arm_smmu_master_free_smrs(struct arm_smmu_device *smmu, struct arm_smmu_master_cfg *cfg) arm_smmu_master_free_smrs() argument
1080 arm_smmu_domain_add_master(struct arm_smmu_domain *smmu_domain, struct arm_smmu_master_cfg *cfg) arm_smmu_domain_add_master() argument
1104 arm_smmu_domain_remove_master(struct arm_smmu_domain *smmu_domain, struct arm_smmu_master_cfg *cfg) arm_smmu_domain_remove_master() argument
H A Dio-pgtable.c44 struct io_pgtable_cfg *cfg, alloc_io_pgtable_ops()
57 iop = fns->alloc(cfg, cookie); alloc_io_pgtable_ops()
63 iop->cfg = *cfg; alloc_io_pgtable_ops()
80 iop->cfg.tlb->tlb_flush_all(iop->cookie); free_io_pgtable_ops()
43 alloc_io_pgtable_ops(enum io_pgtable_fmt fmt, struct io_pgtable_cfg *cfg, void *cookie) alloc_io_pgtable_ops() argument
H A Dio-pgtable.h91 * @cfg: The page table configuration. This will be modified to represent
95 * the callback routines in cfg->tlb.
98 struct io_pgtable_cfg *cfg,
121 * @cfg: A copy of the page table configuration.
127 struct io_pgtable_cfg cfg; member in struct:io_pgtable
135 * @alloc: Allocate a set of page tables described by cfg.
139 struct io_pgtable *(*alloc)(struct io_pgtable_cfg *cfg, void *cookie);
/linux-4.1.27/drivers/media/platform/vsp1/
H A Dvsp1_rwpf.c28 struct v4l2_subdev_pad_config *cfg, vsp1_rwpf_enum_mbus_code()
45 struct v4l2_subdev_pad_config *cfg, vsp1_rwpf_enum_frame_size()
51 format = vsp1_entity_get_pad_format(&rwpf->entity, cfg, fse->pad, vsp1_rwpf_enum_frame_size()
76 vsp1_rwpf_get_crop(struct vsp1_rwpf *rwpf, struct v4l2_subdev_pad_config *cfg, u32 which) vsp1_rwpf_get_crop() argument
80 return v4l2_subdev_get_try_crop(&rwpf->entity.subdev, cfg, RWPF_PAD_SINK); vsp1_rwpf_get_crop()
88 int vsp1_rwpf_get_format(struct v4l2_subdev *subdev, struct v4l2_subdev_pad_config *cfg, vsp1_rwpf_get_format() argument
93 fmt->format = *vsp1_entity_get_pad_format(&rwpf->entity, cfg, fmt->pad, vsp1_rwpf_get_format()
99 int vsp1_rwpf_set_format(struct v4l2_subdev *subdev, struct v4l2_subdev_pad_config *cfg, vsp1_rwpf_set_format() argument
111 format = vsp1_entity_get_pad_format(&rwpf->entity, cfg, fmt->pad, vsp1_rwpf_set_format()
134 crop = vsp1_rwpf_get_crop(rwpf, cfg, fmt->which); vsp1_rwpf_set_format()
141 format = vsp1_entity_get_pad_format(&rwpf->entity, cfg, RWPF_PAD_SOURCE, vsp1_rwpf_set_format()
149 struct v4l2_subdev_pad_config *cfg, vsp1_rwpf_get_selection()
161 sel->r = *vsp1_rwpf_get_crop(rwpf, cfg, sel->which); vsp1_rwpf_get_selection()
165 format = vsp1_entity_get_pad_format(&rwpf->entity, cfg, vsp1_rwpf_get_selection()
181 struct v4l2_subdev_pad_config *cfg, vsp1_rwpf_set_selection()
198 format = vsp1_entity_get_pad_format(&rwpf->entity, cfg, RWPF_PAD_SINK, vsp1_rwpf_set_selection()
211 crop = vsp1_rwpf_get_crop(rwpf, cfg, sel->which); vsp1_rwpf_set_selection()
215 format = vsp1_entity_get_pad_format(&rwpf->entity, cfg, RWPF_PAD_SOURCE, vsp1_rwpf_set_selection()
27 vsp1_rwpf_enum_mbus_code(struct v4l2_subdev *subdev, struct v4l2_subdev_pad_config *cfg, struct v4l2_subdev_mbus_code_enum *code) vsp1_rwpf_enum_mbus_code() argument
44 vsp1_rwpf_enum_frame_size(struct v4l2_subdev *subdev, struct v4l2_subdev_pad_config *cfg, struct v4l2_subdev_frame_size_enum *fse) vsp1_rwpf_enum_frame_size() argument
148 vsp1_rwpf_get_selection(struct v4l2_subdev *subdev, struct v4l2_subdev_pad_config *cfg, struct v4l2_subdev_selection *sel) vsp1_rwpf_get_selection() argument
180 vsp1_rwpf_set_selection(struct v4l2_subdev *subdev, struct v4l2_subdev_pad_config *cfg, struct v4l2_subdev_selection *sel) vsp1_rwpf_set_selection() argument
H A Dvsp1_rwpf.h54 struct v4l2_subdev_pad_config *cfg,
57 struct v4l2_subdev_pad_config *cfg,
59 int vsp1_rwpf_get_format(struct v4l2_subdev *subdev, struct v4l2_subdev_pad_config *cfg,
61 int vsp1_rwpf_set_format(struct v4l2_subdev *subdev, struct v4l2_subdev_pad_config *cfg,
64 struct v4l2_subdev_pad_config *cfg,
67 struct v4l2_subdev_pad_config *cfg,
H A Dvsp1_bru.c186 struct v4l2_subdev_pad_config *cfg, bru_enum_mbus_code()
205 format = vsp1_entity_get_pad_format(&bru->entity, cfg, bru_enum_mbus_code()
214 struct v4l2_subdev_pad_config *cfg, bru_enum_frame_size()
233 struct v4l2_subdev_pad_config *cfg, bru_get_compose()
238 return v4l2_subdev_get_try_crop(&bru->entity.subdev, cfg, pad); bru_get_compose()
246 static int bru_get_format(struct v4l2_subdev *subdev, struct v4l2_subdev_pad_config *cfg, bru_get_format() argument
251 fmt->format = *vsp1_entity_get_pad_format(&bru->entity, cfg, fmt->pad, bru_get_format()
257 static void bru_try_format(struct vsp1_bru *bru, struct v4l2_subdev_pad_config *cfg, bru_try_format() argument
273 format = vsp1_entity_get_pad_format(&bru->entity, cfg, bru_try_format()
285 static int bru_set_format(struct v4l2_subdev *subdev, struct v4l2_subdev_pad_config *cfg, bru_set_format() argument
291 bru_try_format(bru, cfg, fmt->pad, &fmt->format, fmt->which); bru_set_format()
293 format = vsp1_entity_get_pad_format(&bru->entity, cfg, fmt->pad, bru_set_format()
301 compose = bru_get_compose(bru, cfg, fmt->pad, fmt->which); bru_set_format()
313 format = vsp1_entity_get_pad_format(&bru->entity, cfg, bru_set_format()
323 struct v4l2_subdev_pad_config *cfg, bru_get_selection()
340 sel->r = *bru_get_compose(bru, cfg, sel->pad, sel->which); bru_get_selection()
349 struct v4l2_subdev_pad_config *cfg, bru_set_selection()
365 format = vsp1_entity_get_pad_format(&bru->entity, cfg, BRU_PAD_SOURCE, bru_set_selection()
373 format = vsp1_entity_get_pad_format(&bru->entity, cfg, sel->pad, bru_set_selection()
378 compose = bru_get_compose(bru, cfg, sel->pad, sel->which); bru_set_selection()
185 bru_enum_mbus_code(struct v4l2_subdev *subdev, struct v4l2_subdev_pad_config *cfg, struct v4l2_subdev_mbus_code_enum *code) bru_enum_mbus_code() argument
213 bru_enum_frame_size(struct v4l2_subdev *subdev, struct v4l2_subdev_pad_config *cfg, struct v4l2_subdev_frame_size_enum *fse) bru_enum_frame_size() argument
232 bru_get_compose(struct vsp1_bru *bru, struct v4l2_subdev_pad_config *cfg, unsigned int pad, u32 which) bru_get_compose() argument
322 bru_get_selection(struct v4l2_subdev *subdev, struct v4l2_subdev_pad_config *cfg, struct v4l2_subdev_selection *sel) bru_get_selection() argument
348 bru_set_selection(struct v4l2_subdev *subdev, struct v4l2_subdev_pad_config *cfg, struct v4l2_subdev_selection *sel) bru_set_selection() argument
H A Dvsp1_lif.c77 struct v4l2_subdev_pad_config *cfg, lif_enum_mbus_code()
100 format = vsp1_entity_get_pad_format(&lif->entity, cfg, lif_enum_mbus_code()
109 struct v4l2_subdev_pad_config *cfg, lif_enum_frame_size()
115 format = vsp1_entity_get_pad_format(&lif->entity, cfg, LIF_PAD_SINK, lif_enum_frame_size()
136 static int lif_get_format(struct v4l2_subdev *subdev, struct v4l2_subdev_pad_config *cfg, lif_get_format() argument
141 fmt->format = *vsp1_entity_get_pad_format(&lif->entity, cfg, fmt->pad, lif_get_format()
147 static int lif_set_format(struct v4l2_subdev *subdev, struct v4l2_subdev_pad_config *cfg, lif_set_format() argument
158 format = vsp1_entity_get_pad_format(&lif->entity, cfg, fmt->pad, lif_set_format()
180 format = vsp1_entity_get_pad_format(&lif->entity, cfg, LIF_PAD_SOURCE, lif_set_format()
76 lif_enum_mbus_code(struct v4l2_subdev *subdev, struct v4l2_subdev_pad_config *cfg, struct v4l2_subdev_mbus_code_enum *code) lif_enum_mbus_code() argument
108 lif_enum_frame_size(struct v4l2_subdev *subdev, struct v4l2_subdev_pad_config *cfg, struct v4l2_subdev_frame_size_enum *fse) lif_enum_frame_size() argument
H A Dvsp1_lut.c85 struct v4l2_subdev_pad_config *cfg, lut_enum_mbus_code()
108 format = vsp1_entity_get_pad_format(&lut->entity, cfg, lut_enum_mbus_code()
117 struct v4l2_subdev_pad_config *cfg, lut_enum_frame_size()
123 format = vsp1_entity_get_pad_format(&lut->entity, cfg, lut_enum_frame_size()
147 static int lut_get_format(struct v4l2_subdev *subdev, struct v4l2_subdev_pad_config *cfg, lut_get_format() argument
152 fmt->format = *vsp1_entity_get_pad_format(&lut->entity, cfg, fmt->pad, lut_get_format()
158 static int lut_set_format(struct v4l2_subdev *subdev, struct v4l2_subdev_pad_config *cfg, lut_set_format() argument
170 format = vsp1_entity_get_pad_format(&lut->entity, cfg, fmt->pad, lut_set_format()
189 format = vsp1_entity_get_pad_format(&lut->entity, cfg, LUT_PAD_SOURCE, lut_set_format()
84 lut_enum_mbus_code(struct v4l2_subdev *subdev, struct v4l2_subdev_pad_config *cfg, struct v4l2_subdev_mbus_code_enum *code) lut_enum_mbus_code() argument
116 lut_enum_frame_size(struct v4l2_subdev *subdev, struct v4l2_subdev_pad_config *cfg, struct v4l2_subdev_frame_size_enum *fse) lut_enum_frame_size() argument
H A Dvsp1_sru.c169 struct v4l2_subdev_pad_config *cfg, sru_enum_mbus_code()
191 format = vsp1_entity_get_pad_format(&sru->entity, cfg, sru_enum_mbus_code()
200 struct v4l2_subdev_pad_config *cfg, sru_enum_frame_size()
206 format = vsp1_entity_get_pad_format(&sru->entity, cfg, sru_enum_frame_size()
233 static int sru_get_format(struct v4l2_subdev *subdev, struct v4l2_subdev_pad_config *cfg, sru_get_format() argument
238 fmt->format = *vsp1_entity_get_pad_format(&sru->entity, cfg, fmt->pad, sru_get_format()
244 static void sru_try_format(struct vsp1_sru *sru, struct v4l2_subdev_pad_config *cfg, sru_try_format() argument
265 format = vsp1_entity_get_pad_format(&sru->entity, cfg, sru_try_format()
295 static int sru_set_format(struct v4l2_subdev *subdev, struct v4l2_subdev_pad_config *cfg, sru_set_format() argument
301 sru_try_format(sru, cfg, fmt->pad, &fmt->format, fmt->which); sru_set_format()
303 format = vsp1_entity_get_pad_format(&sru->entity, cfg, fmt->pad, sru_set_format()
309 format = vsp1_entity_get_pad_format(&sru->entity, cfg, sru_set_format()
313 sru_try_format(sru, cfg, SRU_PAD_SOURCE, format, fmt->which); sru_set_format()
168 sru_enum_mbus_code(struct v4l2_subdev *subdev, struct v4l2_subdev_pad_config *cfg, struct v4l2_subdev_mbus_code_enum *code) sru_enum_mbus_code() argument
199 sru_enum_frame_size(struct v4l2_subdev *subdev, struct v4l2_subdev_pad_config *cfg, struct v4l2_subdev_frame_size_enum *fse) sru_enum_frame_size() argument
H A Dvsp1_uds.c172 struct v4l2_subdev_pad_config *cfg, uds_enum_mbus_code()
195 format = vsp1_entity_get_pad_format(&uds->entity, cfg, uds_enum_mbus_code()
204 struct v4l2_subdev_pad_config *cfg, uds_enum_frame_size()
210 format = vsp1_entity_get_pad_format(&uds->entity, cfg, uds_enum_frame_size()
231 static int uds_get_format(struct v4l2_subdev *subdev, struct v4l2_subdev_pad_config *cfg, uds_get_format() argument
236 fmt->format = *vsp1_entity_get_pad_format(&uds->entity, cfg, fmt->pad, uds_get_format()
242 static void uds_try_format(struct vsp1_uds *uds, struct v4l2_subdev_pad_config *cfg, uds_try_format() argument
263 format = vsp1_entity_get_pad_format(&uds->entity, cfg, uds_try_format()
278 static int uds_set_format(struct v4l2_subdev *subdev, struct v4l2_subdev_pad_config *cfg, uds_set_format() argument
284 uds_try_format(uds, cfg, fmt->pad, &fmt->format, fmt->which); uds_set_format()
286 format = vsp1_entity_get_pad_format(&uds->entity, cfg, fmt->pad, uds_set_format()
292 format = vsp1_entity_get_pad_format(&uds->entity, cfg, uds_set_format()
296 uds_try_format(uds, cfg, UDS_PAD_SOURCE, format, fmt->which); uds_set_format()
171 uds_enum_mbus_code(struct v4l2_subdev *subdev, struct v4l2_subdev_pad_config *cfg, struct v4l2_subdev_mbus_code_enum *code) uds_enum_mbus_code() argument
203 uds_enum_frame_size(struct v4l2_subdev *subdev, struct v4l2_subdev_pad_config *cfg, struct v4l2_subdev_frame_size_enum *fse) uds_enum_frame_size() argument
H A Dvsp1_hsit.c58 struct v4l2_subdev_pad_config *cfg, hsit_enum_mbus_code()
76 struct v4l2_subdev_pad_config *cfg, hsit_enum_frame_size()
82 format = vsp1_entity_get_pad_format(&hsit->entity, cfg, fse->pad, hsit_enum_frame_size()
107 struct v4l2_subdev_pad_config *cfg, hsit_get_format()
112 fmt->format = *vsp1_entity_get_pad_format(&hsit->entity, cfg, fmt->pad, hsit_get_format()
119 struct v4l2_subdev_pad_config *cfg, hsit_set_format()
125 format = vsp1_entity_get_pad_format(&hsit->entity, cfg, fmt->pad, hsit_set_format()
148 format = vsp1_entity_get_pad_format(&hsit->entity, cfg, HSIT_PAD_SOURCE, hsit_set_format()
57 hsit_enum_mbus_code(struct v4l2_subdev *subdev, struct v4l2_subdev_pad_config *cfg, struct v4l2_subdev_mbus_code_enum *code) hsit_enum_mbus_code() argument
75 hsit_enum_frame_size(struct v4l2_subdev *subdev, struct v4l2_subdev_pad_config *cfg, struct v4l2_subdev_frame_size_enum *fse) hsit_enum_frame_size() argument
106 hsit_get_format(struct v4l2_subdev *subdev, struct v4l2_subdev_pad_config *cfg, struct v4l2_subdev_format *fmt) hsit_get_format() argument
118 hsit_set_format(struct v4l2_subdev *subdev, struct v4l2_subdev_pad_config *cfg, struct v4l2_subdev_format *fmt) hsit_set_format() argument
H A Dvsp1_entity.c66 struct v4l2_subdev_pad_config *cfg, vsp1_entity_get_pad_format()
71 return v4l2_subdev_get_try_format(&entity->subdev, cfg, pad); vsp1_entity_get_pad_format()
82 * @cfg: V4L2 subdev pad configuration
84 * Initialize all pad formats with default values. If cfg is not NULL, try
89 struct v4l2_subdev_pad_config *cfg) vsp1_entity_init_formats()
98 format.which = cfg ? V4L2_SUBDEV_FORMAT_TRY vsp1_entity_init_formats()
101 v4l2_subdev_call(subdev, pad, set_fmt, cfg, &format); vsp1_entity_init_formats()
65 vsp1_entity_get_pad_format(struct vsp1_entity *entity, struct v4l2_subdev_pad_config *cfg, unsigned int pad, u32 which) vsp1_entity_get_pad_format() argument
88 vsp1_entity_init_formats(struct v4l2_subdev *subdev, struct v4l2_subdev_pad_config *cfg) vsp1_entity_init_formats() argument
/linux-4.1.27/drivers/net/wireless/rtlwifi/
H A Dcam.c61 rtl_write_dword(rtlpriv, rtlpriv->cfg->maps[WCAMI], rtl_cam_program_entry()
63 rtl_write_dword(rtlpriv, rtlpriv->cfg->maps[RWCAM], rtl_cam_program_entry()
68 rtlpriv->cfg->maps[WCAMI], target_content); rtl_cam_program_entry()
73 rtlpriv->cfg->maps[RWCAM], target_command); rtl_cam_program_entry()
82 rtl_write_dword(rtlpriv, rtlpriv->cfg->maps[WCAMI], rtl_cam_program_entry()
84 rtl_write_dword(rtlpriv, rtlpriv->cfg->maps[RWCAM], rtl_cam_program_entry()
101 rtl_write_dword(rtlpriv, rtlpriv->cfg->maps[WCAMI], rtl_cam_program_entry()
103 rtl_write_dword(rtlpriv, rtlpriv->cfg->maps[RWCAM], rtl_cam_program_entry()
162 rtl_write_dword(rtlpriv, rtlpriv->cfg->maps[WCAMI], 0); rtl_cam_delete_one_entry()
163 rtl_write_dword(rtlpriv, rtlpriv->cfg->maps[RWCAM], ul_command); rtl_cam_delete_one_entry()
181 rtl_write_dword(rtlpriv, rtlpriv->cfg->maps[RWCAM], ul_command); rtl_cam_reset_all_entry()
191 u32 ul_enc_algo = rtlpriv->cfg->maps[SEC_CAM_AES]; rtl_cam_mark_invalid()
195 ul_enc_algo = rtlpriv->cfg->maps[SEC_CAM_WEP40]; rtl_cam_mark_invalid()
198 ul_enc_algo = rtlpriv->cfg->maps[SEC_CAM_WEP104]; rtl_cam_mark_invalid()
201 ul_enc_algo = rtlpriv->cfg->maps[SEC_CAM_TKIP]; rtl_cam_mark_invalid()
204 ul_enc_algo = rtlpriv->cfg->maps[SEC_CAM_AES]; rtl_cam_mark_invalid()
207 ul_enc_algo = rtlpriv->cfg->maps[SEC_CAM_AES]; rtl_cam_mark_invalid()
216 rtl_write_dword(rtlpriv, rtlpriv->cfg->maps[WCAMI], ul_content); rtl_cam_mark_invalid()
217 rtl_write_dword(rtlpriv, rtlpriv->cfg->maps[RWCAM], ul_command); rtl_cam_mark_invalid()
232 u32 ul_encalgo = rtlpriv->cfg->maps[SEC_CAM_AES]; rtl_cam_empty_entry()
237 ul_encalgo = rtlpriv->cfg->maps[SEC_CAM_WEP40]; rtl_cam_empty_entry()
240 ul_encalgo = rtlpriv->cfg->maps[SEC_CAM_WEP104]; rtl_cam_empty_entry()
243 ul_encalgo = rtlpriv->cfg->maps[SEC_CAM_TKIP]; rtl_cam_empty_entry()
246 ul_encalgo = rtlpriv->cfg->maps[SEC_CAM_AES]; rtl_cam_empty_entry()
249 ul_encalgo = rtlpriv->cfg->maps[SEC_CAM_AES]; rtl_cam_empty_entry()
266 rtl_write_dword(rtlpriv, rtlpriv->cfg->maps[WCAMI], ul_content); rtl_cam_empty_entry()
267 rtl_write_dword(rtlpriv, rtlpriv->cfg->maps[RWCAM], ul_command); rtl_cam_empty_entry()
H A Defuse.c83 bytetemp = rtl_read_byte(rtlpriv, rtlpriv->cfg->maps[SYS_FUNC_EN] + 1); efuse_initialize()
85 rtl_write_byte(rtlpriv, rtlpriv->cfg->maps[SYS_FUNC_EN] + 1, temp); efuse_initialize()
87 bytetemp = rtl_read_byte(rtlpriv, rtlpriv->cfg->maps[SYS_ISO_CTRL] + 1); efuse_initialize()
89 rtl_write_byte(rtlpriv, rtlpriv->cfg->maps[SYS_ISO_CTRL] + 1, temp); efuse_initialize()
91 bytetemp = rtl_read_byte(rtlpriv, rtlpriv->cfg->maps[EFUSE_TEST] + 3); efuse_initialize()
93 rtl_write_byte(rtlpriv, rtlpriv->cfg->maps[EFUSE_TEST] + 3, temp); efuse_initialize()
97 rtl_write_byte(rtlpriv, rtlpriv->cfg->maps[EFUSE_CTRL] + 3, 0x72); efuse_initialize()
109 rtlpriv->cfg->maps[EFUSE_REAL_CONTENT_SIZE]; efuse_read_1byte()
113 rtl_write_byte(rtlpriv, rtlpriv->cfg->maps[EFUSE_CTRL] + 1, efuse_read_1byte()
116 rtlpriv->cfg->maps[EFUSE_CTRL] + 2); efuse_read_1byte()
118 rtl_write_byte(rtlpriv, rtlpriv->cfg->maps[EFUSE_CTRL] + 2, efuse_read_1byte()
122 rtlpriv->cfg->maps[EFUSE_CTRL] + 3); efuse_read_1byte()
124 rtl_write_byte(rtlpriv, rtlpriv->cfg->maps[EFUSE_CTRL] + 3, efuse_read_1byte()
128 rtlpriv->cfg->maps[EFUSE_CTRL] + 3); efuse_read_1byte()
131 rtlpriv->cfg-> efuse_read_1byte()
139 data = rtl_read_byte(rtlpriv, rtlpriv->cfg->maps[EFUSE_CTRL]); efuse_read_1byte()
154 rtlpriv->cfg->maps[EFUSE_REAL_CONTENT_SIZE]; efuse_write_1byte()
160 rtl_write_byte(rtlpriv, rtlpriv->cfg->maps[EFUSE_CTRL], value); efuse_write_1byte()
163 rtl_write_byte(rtlpriv, rtlpriv->cfg->maps[EFUSE_CTRL] + 1, efuse_write_1byte()
166 rtlpriv->cfg->maps[EFUSE_CTRL] + 2); efuse_write_1byte()
170 rtlpriv->cfg->maps[EFUSE_CTRL] + 2, temp); efuse_write_1byte()
173 rtlpriv->cfg->maps[EFUSE_CTRL] + 3); efuse_write_1byte()
176 rtlpriv->cfg->maps[EFUSE_CTRL] + 3, temp); efuse_write_1byte()
179 rtlpriv->cfg->maps[EFUSE_CTRL] + 3); efuse_write_1byte()
183 rtlpriv->cfg-> efuse_write_1byte()
202 rtl_write_byte(rtlpriv, rtlpriv->cfg->maps[EFUSE_CTRL] + 1, read_efuse_byte()
204 readbyte = rtl_read_byte(rtlpriv, rtlpriv->cfg->maps[EFUSE_CTRL] + 2); read_efuse_byte()
205 rtl_write_byte(rtlpriv, rtlpriv->cfg->maps[EFUSE_CTRL] + 2, read_efuse_byte()
208 readbyte = rtl_read_byte(rtlpriv, rtlpriv->cfg->maps[EFUSE_CTRL] + 3); read_efuse_byte()
209 rtl_write_byte(rtlpriv, rtlpriv->cfg->maps[EFUSE_CTRL] + 3, read_efuse_byte()
213 value32 = rtl_read_dword(rtlpriv, rtlpriv->cfg->maps[EFUSE_CTRL]); read_efuse_byte()
216 rtlpriv->cfg->maps[EFUSE_CTRL]); read_efuse_byte()
221 value32 = rtl_read_dword(rtlpriv, rtlpriv->cfg->maps[EFUSE_CTRL]); read_efuse_byte()
239 rtlpriv->cfg->maps[EFUSE_MAX_SECTION_MAP]; read_efuse()
241 rtlpriv->cfg->maps[EFUSE_REAL_CONTENT_SIZE]; read_efuse()
246 if ((_offset + _size_byte) > rtlpriv->cfg->maps[EFUSE_HWSET_MAX_SIZE]) { read_efuse()
254 efuse_tbl = kzalloc(rtlpriv->cfg->maps[EFUSE_HWSET_MAX_SIZE] * read_efuse()
366 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_EFUSE_BYTES, read_efuse()
368 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_EFUSE_USAGE, read_efuse()
409 (EFUSE_MAX_SIZE - rtlpriv->cfg->maps[EFUSE_OOB_PROTECT_BYTES_LEN])) efuse_shadow_update_chk()
458 rtlpriv->cfg->maps[EFUSE_HWSET_MAX_SIZE]); efuse_shadow_update()
512 rtlpriv->cfg->maps[EFUSE_HWSET_MAX_SIZE]); efuse_shadow_update()
525 0xFF, rtlpriv->cfg->maps[EFUSE_HWSET_MAX_SIZE]); rtl_efuse_shadow_map_update()
531 rtlpriv->cfg->maps[EFUSE_HWSET_MAX_SIZE]); rtl_efuse_shadow_map_update()
620 rtl_write_byte(rtlpriv, rtlpriv->cfg->maps[EFUSE_CTRL] + 1, efuse_one_byte_read()
622 rtl_write_byte(rtlpriv, rtlpriv->cfg->maps[EFUSE_CTRL] + 2, efuse_one_byte_read()
625 rtlpriv->cfg->maps[EFUSE_CTRL] + 2) & efuse_one_byte_read()
628 rtl_write_byte(rtlpriv, rtlpriv->cfg->maps[EFUSE_CTRL] + 3, 0x72); efuse_one_byte_read()
631 rtlpriv->cfg->maps[EFUSE_CTRL] + 3)) efuse_one_byte_read()
637 *data = rtl_read_byte(rtlpriv, rtlpriv->cfg->maps[EFUSE_CTRL]); efuse_one_byte_read()
656 rtlpriv->cfg->maps[EFUSE_CTRL] + 1, (u8) (addr & 0xff)); efuse_one_byte_write()
657 rtl_write_byte(rtlpriv, rtlpriv->cfg->maps[EFUSE_CTRL] + 2, efuse_one_byte_write()
659 rtlpriv->cfg->maps[EFUSE_CTRL] + efuse_one_byte_write()
662 rtl_write_byte(rtlpriv, rtlpriv->cfg->maps[EFUSE_CTRL], data); efuse_one_byte_write()
663 rtl_write_byte(rtlpriv, rtlpriv->cfg->maps[EFUSE_CTRL] + 3, 0xF2); efuse_one_byte_write()
666 rtlpriv->cfg->maps[EFUSE_CTRL] + 3)) efuse_one_byte_write()
680 read_efuse(hw, 0, rtlpriv->cfg->maps[EFUSE_HWSET_MAX_SIZE], efuse); efuse_read_all_map()
956 rtlpriv->cfg->maps[EFUSE_OOB_PROTECT_BYTES_LEN])) { efuse_pg_packet_write()
973 rtlpriv->cfg->maps[EFUSE_OOB_PROTECT_BYTES_LEN]))) { efuse_pg_packet_write()
1031 rtlpriv->cfg->maps[EFUSE_OOB_PROTECT_BYTES_LEN])) { efuse_pg_packet_write()
1135 rtlpriv->cfg->maps[EFUSE_ACCESS], 0x69); efuse_power_switch()
1139 rtlpriv->cfg->maps[SYS_ISO_CTRL]); efuse_power_switch()
1140 if (!(tmpV16 & rtlpriv->cfg->maps[EFUSE_PWC_EV12V])) { efuse_power_switch()
1141 tmpV16 |= rtlpriv->cfg->maps[EFUSE_PWC_EV12V]; efuse_power_switch()
1143 rtlpriv->cfg->maps[SYS_ISO_CTRL], efuse_power_switch()
1148 rtlpriv->cfg->maps[SYS_FUNC_EN]); efuse_power_switch()
1149 if (!(tmpV16 & rtlpriv->cfg->maps[EFUSE_FEN_ELDR])) { efuse_power_switch()
1150 tmpV16 |= rtlpriv->cfg->maps[EFUSE_FEN_ELDR]; efuse_power_switch()
1152 rtlpriv->cfg->maps[SYS_FUNC_EN], tmpV16); efuse_power_switch()
1155 tmpV16 = rtl_read_word(rtlpriv, rtlpriv->cfg->maps[SYS_CLK]); efuse_power_switch()
1156 if ((!(tmpV16 & rtlpriv->cfg->maps[EFUSE_LOADER_CLK_EN])) || efuse_power_switch()
1157 (!(tmpV16 & rtlpriv->cfg->maps[EFUSE_ANA8M]))) { efuse_power_switch()
1158 tmpV16 |= (rtlpriv->cfg->maps[EFUSE_LOADER_CLK_EN] | efuse_power_switch()
1159 rtlpriv->cfg->maps[EFUSE_ANA8M]); efuse_power_switch()
1161 rtlpriv->cfg->maps[SYS_CLK], tmpV16); efuse_power_switch()
1168 rtlpriv->cfg->maps[EFUSE_TEST] + efuse_power_switch()
1180 rtlpriv->cfg->maps[EFUSE_TEST] + 3, efuse_power_switch()
1185 rtl_write_byte(rtlpriv, rtlpriv->cfg->maps[EFUSE_CLK], efuse_power_switch()
1192 rtlpriv->cfg->maps[EFUSE_ACCESS], 0); efuse_power_switch()
1196 rtlpriv->cfg->maps[EFUSE_TEST] + efuse_power_switch()
1199 rtlpriv->cfg->maps[EFUSE_TEST] + 3, efuse_power_switch()
1204 rtl_write_byte(rtlpriv, rtlpriv->cfg->maps[EFUSE_CLK], efuse_power_switch()
H A Dcore.c109 if (rtlpriv->cfg->alt_fw_name) { rtl_fw_do_work()
111 rtlpriv->cfg->alt_fw_name, rtl_fw_do_work()
114 rtlpriv->cfg->alt_fw_name); rtl_fw_do_work()
118 pr_err("Firmware %s not available\n", rtlpriv->cfg->fw_name); rtl_fw_do_work()
184 rtlpriv->cfg->ops->get_hw_reg(hw, HAL_DEF_WOWLAN, rtl_op_stop()
262 rtlpriv->cfg->ops->update_interrupt_mask(hw, 0, rtl_op_add_interface()
263 rtlpriv->cfg->maps[RTL_IBSS_INT_MASKS]); rtl_op_add_interface()
271 rtlpriv->cfg->ops->set_bcn_reg(hw); rtl_op_add_interface()
276 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_BASIC_RATE, rtl_op_add_interface()
288 rtlpriv->cfg->ops->set_bcn_reg(hw); rtl_op_add_interface()
293 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_BASIC_RATE, rtl_op_add_interface()
301 rtlpriv->cfg->ops->set_bcn_reg(hw); rtl_op_add_interface()
306 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_BASIC_RATE, rtl_op_add_interface()
320 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_BASIC_RATE, rtl_op_add_interface()
325 rtlpriv->cfg->ops->set_network_type(hw, vif->type); rtl_op_add_interface()
327 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_ETHER_ADDR, mac->mac_addr); rtl_op_add_interface()
348 rtlpriv->cfg->ops->update_interrupt_mask(hw, 0, rtl_op_remove_interface()
349 rtlpriv->cfg->maps[RTL_IBSS_INT_MASKS]); rtl_op_remove_interface()
363 rtlpriv->cfg->ops->set_network_type(hw, mac->opmode); rtl_op_remove_interface()
536 rtlpriv->cfg->ops->add_wowlan_pattern(hw, &rtl_pattern, i); _rtl_add_wowlan_patterns()
655 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_RETRY_LIMIT, rtl_op_config()
676 if (rtlpriv->cfg->ops->chk_switch_dmdp) rtl_op_config()
677 rtlpriv->cfg->ops->chk_switch_dmdp(hw); rtl_op_config()
795 rtlpriv->cfg->ops->switch_channel(hw); rtl_op_config()
796 rtlpriv->cfg->ops->set_channel_access(hw); rtl_op_config()
797 rtlpriv->cfg->ops->set_bw_mode(hw, channel_type); rtl_op_config()
820 mac->rx_conf |= rtlpriv->cfg->maps[MAC_RCR_AM] | rtl_op_configure_filter()
821 rtlpriv->cfg->maps[MAC_RCR_AB]; rtl_op_configure_filter()
825 mac->rx_conf &= ~(rtlpriv->cfg->maps[MAC_RCR_AM] | rtl_op_configure_filter()
826 rtlpriv->cfg->maps[MAC_RCR_AB]); rtl_op_configure_filter()
835 mac->rx_conf |= rtlpriv->cfg->maps[MAC_RCR_ACRC32]; rtl_op_configure_filter()
839 mac->rx_conf &= ~rtlpriv->cfg->maps[MAC_RCR_ACRC32]; rtl_op_configure_filter()
856 rtlpriv->cfg->ops->set_chk_bssid(hw, false); rtl_op_configure_filter()
858 rtlpriv->cfg->ops->set_chk_bssid(hw, true); rtl_op_configure_filter()
866 mac->rx_conf |= rtlpriv->cfg->maps[MAC_RCR_ACF]; rtl_op_configure_filter()
871 mac->rx_conf &= ~rtlpriv->cfg->maps[MAC_RCR_ACF]; rtl_op_configure_filter()
881 mac->rx_conf |= rtlpriv->cfg->maps[MAC_RCR_AAP]; rtl_op_configure_filter()
885 mac->rx_conf &= ~rtlpriv->cfg->maps[MAC_RCR_AAP]; rtl_op_configure_filter()
894 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_RCR, rtl_op_configure_filter()
937 rtlpriv->cfg->ops->update_rate_tbl(hw, sta, 0); rtl_op_sta_add()
1009 rtlpriv->cfg->ops->set_qos(hw, aci); rtl_op_conf_tx()
1048 /*rtlpriv->cfg->ops->set_bcn_reg(hw); */ rtl_op_bss_info_changed()
1050 rtlpriv->cfg->ops->update_interrupt_mask(hw, rtl_op_bss_info_changed()
1051 rtlpriv->cfg->maps rtl_op_bss_info_changed()
1054 if (rtlpriv->cfg->ops->linked_set_reg) rtl_op_bss_info_changed()
1055 rtlpriv->cfg->ops->linked_set_reg(hw); rtl_op_bss_info_changed()
1066 rtlpriv->cfg->ops->update_interrupt_mask(hw, 0, rtl_op_bss_info_changed()
1067 rtlpriv->cfg->maps rtl_op_bss_info_changed()
1075 rtlpriv->cfg->ops->set_bcn_intv(hw); rtl_op_bss_info_changed()
1102 if (rtlpriv->cfg->ops->linked_set_reg) rtl_op_bss_info_changed()
1103 rtlpriv->cfg->ops->linked_set_reg(hw); rtl_op_bss_info_changed()
1143 rtlpriv->cfg->ops->update_rate_tbl(hw, sta, 0); rtl_op_bss_info_changed()
1147 rtlpriv->cfg->ops->set_hw_reg(hw, rtl_op_bss_info_changed()
1168 if (rtlpriv->cfg->ops->chk_switch_dmdp) rtl_op_bss_info_changed()
1169 rtlpriv->cfg->ops->chk_switch_dmdp(hw); rtl_op_bss_info_changed()
1174 rtlpriv->cfg->ops->set_network_type(hw, vif->type); rtl_op_bss_info_changed()
1178 rtlpriv->cfg->ops->set_hw_reg(hw, rtl_op_bss_info_changed()
1184 if (rtlpriv->cfg->ops->get_btc_status()) rtl_op_bss_info_changed()
1201 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_ACK_PREAMBLE, rtl_op_bss_info_changed()
1214 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_SLOT_TIME, rtl_op_bss_info_changed()
1238 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_SHORTGI_DENSITY, rtl_op_bss_info_changed()
1240 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_AMPDU_FACTOR, rtl_op_bss_info_changed()
1242 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_AMPDU_MIN_SPACE, rtl_op_bss_info_changed()
1250 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_BSSID, rtl_op_bss_info_changed()
1320 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_BASIC_RATE, rtl_op_bss_info_changed()
1334 rtlpriv->cfg->ops->get_hw_reg(hw, HW_VAR_CORRECT_TSF, (u8 *)(&tsf)); rtl_op_get_tsf()
1346 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_CORRECT_TSF, (u8 *)(&bibss)); rtl_op_set_tsf()
1354 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_DUAL_TSF_RST, (u8 *)(&tmp)); rtl_op_reset_tsf()
1426 if (rtlpriv->cfg->ops->get_btc_status()) rtl_op_sw_scan_start()
1430 if (rtlpriv->cfg->ops->chk_switch_dmdp) rtl_op_sw_scan_start()
1431 rtlpriv->cfg->ops->chk_switch_dmdp(hw); rtl_op_sw_scan_start()
1445 rtlpriv->cfg->ops->led_control(hw, LED_CTL_SITE_SURVEY); rtl_op_sw_scan_start()
1446 rtlpriv->cfg->ops->scan_operation_backup(hw, SCAN_OPT_BACKUP_BAND0); rtl_op_sw_scan_start()
1474 rtlpriv->cfg->ops->set_network_type(hw, mac->opmode); rtl_op_sw_scan_complete()
1478 rtlpriv->cfg->ops->scan_operation_backup(hw, SCAN_OPT_RESTORE); rtl_op_sw_scan_complete()
1479 if (rtlpriv->cfg->ops->get_btc_status()) rtl_op_sw_scan_complete()
1496 if (rtlpriv->cfg->mod_params->sw_crypto || rtlpriv->sec.use_sw_sec) { rtl_op_set_key()
1575 rtlpriv->cfg->ops->enable_hw_sec(hw); rtl_op_set_key()
1589 rtlpriv->cfg->ops->enable_hw_sec(hw); rtl_op_set_key()
1636 rtlpriv->cfg->ops->set_key(hw, key_idx, mac_addr, rtl_op_set_key()
1692 radio_state = rtlpriv->cfg->ops->radio_onoff_checking(hw, &valid); rtl_op_rfkill_poll()
1842 rtlpriv->cfg->ops->fill_tx_cmddesc(hw, (u8 *)pdesc, 1, 1, skb); rtl_cmd_send_packet()
1848 rtlpriv->cfg->ops->tx_polling(hw, BEACON_QUEUE); rtl_cmd_send_packet()
H A Dpci.c581 if (rtlpriv->cfg->ops->get_available_desc && _rtl_pci_tx_isr()
582 rtlpriv->cfg->ops->get_available_desc(hw, prio) <= 1) { _rtl_pci_tx_isr()
588 if (!rtlpriv->cfg->ops->is_tx_desc_closed(hw, prio, ring->idx)) _rtl_pci_tx_isr()
594 rtlpriv->cfg->ops-> _rtl_pci_tx_isr()
702 rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false, _rtl_pci_init_one_rxdesc()
706 rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false, _rtl_pci_init_one_rxdesc()
709 rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false, _rtl_pci_init_one_rxdesc()
712 rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false, _rtl_pci_init_one_rxdesc()
762 rtl_write_byte(rtlpriv, rtlpriv->cfg->maps[MAC_HSISR], _rtl_pci_hs_interrupt()
763 rtl_read_byte(rtlpriv, rtlpriv->cfg->maps[MAC_HSISR]) | _rtl_pci_hs_interrupt()
800 rtlpriv->cfg->ops->rx_desc_buff_remained_cnt(hw, _rtl_pci_rx_interrupt()
811 own = (u8)rtlpriv->cfg->ops->get_desc((u8 *)pdesc, _rtl_pci_rx_interrupt()
830 rtlpriv->cfg->ops->query_rx_desc(hw, &stats, _rtl_pci_rx_interrupt()
834 rtlpriv->cfg->ops->rx_check_dma_ok(hw, _rtl_pci_rx_interrupt()
838 len = rtlpriv->cfg->ops->get_desc((u8 *)pdesc, false, _rtl_pci_rx_interrupt()
857 if (rtlpriv->cfg->ops->rx_command_packet && _rtl_pci_rx_interrupt()
858 rtlpriv->cfg->ops->rx_command_packet(hw, stats, skb)) { _rtl_pci_rx_interrupt()
888 rtlpriv->cfg->ops->led_control(hw, LED_CTL_RX); _rtl_pci_rx_interrupt()
938 rtlpriv->cfg->ops->set_desc(hw, (u8 *)pdesc, _rtl_pci_rx_interrupt()
964 rtlpriv->cfg->ops->disable_interrupt(hw); _rtl_pci_interrupt()
967 rtlpriv->cfg->ops->interrupt_recognized(hw, &inta, &intb); _rtl_pci_interrupt()
974 if (inta & rtlpriv->cfg->maps[RTL_IMR_TBDOK]) { _rtl_pci_interrupt()
979 if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_TBDER])) { _rtl_pci_interrupt()
984 if (inta & rtlpriv->cfg->maps[RTL_IMR_BDOK]) { _rtl_pci_interrupt()
988 if (inta & rtlpriv->cfg->maps[RTL_IMR_BCNINT]) { _rtl_pci_interrupt()
995 if (unlikely(intb & rtlpriv->cfg->maps[RTL_IMR_TXFOVW])) _rtl_pci_interrupt()
998 if (inta & rtlpriv->cfg->maps[RTL_IMR_MGNTDOK]) { _rtl_pci_interrupt()
1004 if (inta & rtlpriv->cfg->maps[RTL_IMR_HIGHDOK]) { _rtl_pci_interrupt()
1010 if (inta & rtlpriv->cfg->maps[RTL_IMR_BKDOK]) { _rtl_pci_interrupt()
1018 if (inta & rtlpriv->cfg->maps[RTL_IMR_BEDOK]) { _rtl_pci_interrupt()
1026 if (inta & rtlpriv->cfg->maps[RTL_IMR_VIDOK]) { _rtl_pci_interrupt()
1034 if (inta & rtlpriv->cfg->maps[RTL_IMR_VODOK]) { _rtl_pci_interrupt()
1043 if (inta & rtlpriv->cfg->maps[RTL_IMR_COMDOK]) { _rtl_pci_interrupt()
1053 if (inta & rtlpriv->cfg->maps[RTL_IMR_ROK]) { _rtl_pci_interrupt()
1058 if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_RDU])) { _rtl_pci_interrupt()
1064 if (unlikely(intb & rtlpriv->cfg->maps[RTL_IMR_RXFOVW])) { _rtl_pci_interrupt()
1071 if (inta & rtlpriv->cfg->maps[RTL_IMR_C2HCMD]) { _rtl_pci_interrupt()
1087 if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_HSISR_IND])) { _rtl_pci_interrupt()
1098 rtlpriv->cfg->ops->enable_interrupt(hw); _rtl_pci_interrupt()
1133 rtlpriv->cfg->ops->get_desc( _rtl_pci_prepare_bcn_tasklet()
1149 rtlpriv->cfg->ops->fill_tx_desc(hw, hdr, (u8 *)pdesc, _rtl_pci_prepare_bcn_tasklet()
1157 rtlpriv->cfg->ops->set_desc(hw, (u8 *)pbuffer_desc, true, _rtl_pci_prepare_bcn_tasklet()
1160 rtlpriv->cfg->ops->set_desc(hw, (u8 *)pdesc, true, HW_DESC_OWN, _rtl_pci_prepare_bcn_tasklet()
1299 rtlpriv->cfg->ops->set_desc(hw, (u8 *)&desc[i], _rtl_pci_init_tx_ring()
1364 rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false, _rtl_pci_init_rx_ring()
1388 rtlpriv->cfg-> _rtl_pci_free_tx_ring()
1518 rtlpriv->cfg->ops->get_desc((u8 *)entry, rtl_pci_reset_trx_ring()
1524 rtlpriv->cfg->ops->set_desc(hw, rtl_pci_reset_trx_ring()
1529 rtlpriv->cfg->ops->set_desc(hw, rtl_pci_reset_trx_ring()
1533 rtlpriv->cfg->ops->set_desc(hw, rtl_pci_reset_trx_ring()
1537 rtlpriv->cfg->ops->set_desc(hw, rtl_pci_reset_trx_ring()
1543 rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false, rtl_pci_reset_trx_ring()
1570 rtlpriv->cfg->ops-> rtl_pci_reset_trx_ring()
1684 own = (u8) rtlpriv->cfg->ops->get_desc((u8 *)pdesc, rtl_pci_tx()
1699 if (rtlpriv->cfg->ops->get_available_desc && rtl_pci_tx()
1700 rtlpriv->cfg->ops->get_available_desc(hw, hw_queue) == 0) { rtl_pci_tx()
1722 rtlpriv->cfg->ops->led_control(hw, LED_CTL_TX); rtl_pci_tx()
1724 rtlpriv->cfg->ops->fill_tx_desc(hw, hdr, (u8 *)pdesc, rtl_pci_tx()
1730 rtlpriv->cfg->ops->set_desc(hw, (u8 *)pdesc, true, rtl_pci_tx()
1733 rtlpriv->cfg->ops->set_desc(hw, (u8 *)pdesc, true, rtl_pci_tx()
1749 rtlpriv->cfg->ops->tx_polling(hw, hw_queue); rtl_pci_tx()
1837 if (rtlpriv->cfg->ops->get_btc_status && rtl_pci_start()
1838 rtlpriv->cfg->ops->get_btc_status()) { rtl_pci_start()
1842 err = rtlpriv->cfg->ops->hw_init(hw); rtl_pci_start()
1849 rtlpriv->cfg->ops->enable_interrupt(hw); rtl_pci_start()
1874 if (rtlpriv->cfg->ops->get_btc_status()) rtl_pci_stop()
1884 rtlpriv->cfg->ops->disable_interrupt(hw); rtl_pci_stop()
1901 rtlpriv->cfg->ops->hw_disable(hw); rtl_pci_stop()
1905 rtlpriv->cfg->ops->led_control(hw, LED_CTL_POWER_OFF); rtl_pci_stop()
2224 /* init cfg & intf_ops */ rtl_pci_probe()
2226 rtlpriv->cfg = (struct rtl_hal_cfg *)(id->driver_data); rtl_pci_probe()
2247 pmem_start = pci_resource_start(pdev, rtlpriv->cfg->bar_id); rtl_pci_probe()
2248 pmem_len = pci_resource_len(pdev, rtlpriv->cfg->bar_id); rtl_pci_probe()
2249 pmem_flags = pci_resource_flags(pdev, rtlpriv->cfg->bar_id); rtl_pci_probe()
2254 rtlpriv->cfg->bar_id, pmem_len); rtl_pci_probe()
2283 rtlpriv->cfg->ops->read_eeprom_info(hw); rtl_pci_probe()
2285 if (rtlpriv->cfg->ops->init_sw_vars(hw)) { rtl_pci_probe()
2290 rtlpriv->cfg->ops->init_sw_leds(hw); rtl_pci_probe()
2385 rtlpriv->cfg->ops->disable_interrupt(hw); rtl_pci_disconnect()
2392 rtlpriv->cfg->ops->deinit_sw_vars(hw); rtl_pci_disconnect()
2441 rtlpriv->cfg->ops->hw_suspend(hw); rtl_pci_suspend()
2454 rtlpriv->cfg->ops->hw_resume(hw); rtl_pci_resume()
/linux-4.1.27/drivers/usb/serial/
H A Dkl5kusb105.c115 struct klsi_105_port_settings cfg; member in struct:klsi_105_private
225 priv->cfg.pktlen = 5; klsi_105_port_probe()
226 priv->cfg.baudrate = kl5kusb105a_sio_b9600; klsi_105_port_probe()
227 priv->cfg.databits = kl5kusb105a_dtb_8; klsi_105_port_probe()
228 priv->cfg.unknown1 = 0; klsi_105_port_probe()
229 priv->cfg.unknown2 = 1; klsi_105_port_probe()
259 struct klsi_105_port_settings *cfg; klsi_105_open() local
269 cfg = kmalloc(sizeof(*cfg), GFP_KERNEL); klsi_105_open()
270 if (!cfg) klsi_105_open()
273 cfg->pktlen = 5; klsi_105_open()
274 cfg->baudrate = kl5kusb105a_sio_b9600; klsi_105_open()
275 cfg->databits = kl5kusb105a_dtb_8; klsi_105_open()
276 cfg->unknown1 = 0; klsi_105_open()
277 cfg->unknown2 = 1; klsi_105_open()
278 klsi_105_chg_port_settings(port, cfg); klsi_105_open()
288 priv->cfg.pktlen = cfg->pktlen; klsi_105_open()
289 priv->cfg.baudrate = cfg->baudrate; klsi_105_open()
290 priv->cfg.databits = cfg->databits; klsi_105_open()
291 priv->cfg.unknown1 = cfg->unknown1; klsi_105_open()
292 priv->cfg.unknown2 = cfg->unknown2; klsi_105_open()
328 kfree(cfg); klsi_105_open()
407 struct klsi_105_port_settings *cfg; klsi_105_set_termios() local
411 cfg = kmalloc(sizeof(*cfg), GFP_KERNEL); klsi_105_set_termios()
412 if (!cfg) klsi_105_set_termios()
440 priv->cfg.baudrate = kl5kusb105a_sio_b1200; klsi_105_set_termios()
443 priv->cfg.baudrate = kl5kusb105a_sio_b2400; klsi_105_set_termios()
446 priv->cfg.baudrate = kl5kusb105a_sio_b4800; klsi_105_set_termios()
449 priv->cfg.baudrate = kl5kusb105a_sio_b9600; klsi_105_set_termios()
452 priv->cfg.baudrate = kl5kusb105a_sio_b19200; klsi_105_set_termios()
455 priv->cfg.baudrate = kl5kusb105a_sio_b38400; klsi_105_set_termios()
458 priv->cfg.baudrate = kl5kusb105a_sio_b57600; klsi_105_set_termios()
461 priv->cfg.baudrate = kl5kusb105a_sio_b115200; klsi_105_set_termios()
465 priv->cfg.baudrate = kl5kusb105a_sio_b9600; klsi_105_set_termios()
495 priv->cfg.databits = kl5kusb105a_dtb_7; klsi_105_set_termios()
498 priv->cfg.databits = kl5kusb105a_dtb_8; klsi_105_set_termios()
502 priv->cfg.databits = kl5kusb105a_dtb_8; klsi_105_set_termios()
551 memcpy(cfg, &priv->cfg, sizeof(*cfg)); klsi_105_set_termios()
555 klsi_105_chg_port_settings(port, cfg); klsi_105_set_termios()
557 kfree(cfg); klsi_105_set_termios()
/linux-4.1.27/drivers/pci/host/
H A Dpci-host-generic.c43 struct gen_pci_cfg_windows cfg; member in struct:gen_pci
53 resource_size_t idx = bus->number - pci->cfg.bus_range->start; gen_pci_map_cfg_bus_cam()
55 return pci->cfg.win[idx] + ((devfn << 8) | where); gen_pci_map_cfg_bus_cam()
69 resource_size_t idx = bus->number - pci->cfg.bus_range->start; gen_pci_map_cfg_bus_ecam()
71 return pci->cfg.win[idx] + ((devfn << 12) | where); gen_pci_map_cfg_bus_ecam()
131 pci->cfg.bus_range = res; gen_pci_parse_request_of_pci_ranges()
163 err = of_address_to_resource(np, 0, &pci->cfg.res); gen_pci_parse_map_cfg_windows()
170 bus_max = pci->cfg.bus_range->start + gen_pci_parse_map_cfg_windows()
171 (resource_size(&pci->cfg.res) >> pci->cfg.ops->bus_shift) - 1; gen_pci_parse_map_cfg_windows()
172 pci->cfg.bus_range->end = min_t(resource_size_t, gen_pci_parse_map_cfg_windows()
173 pci->cfg.bus_range->end, bus_max); gen_pci_parse_map_cfg_windows()
175 pci->cfg.win = devm_kcalloc(dev, resource_size(pci->cfg.bus_range), gen_pci_parse_map_cfg_windows()
176 sizeof(*pci->cfg.win), GFP_KERNEL); gen_pci_parse_map_cfg_windows()
177 if (!pci->cfg.win) gen_pci_parse_map_cfg_windows()
181 if (!devm_request_mem_region(dev, pci->cfg.res.start, gen_pci_parse_map_cfg_windows()
182 resource_size(&pci->cfg.res), gen_pci_parse_map_cfg_windows()
186 bus_range = pci->cfg.bus_range; gen_pci_parse_map_cfg_windows()
189 u32 sz = 1 << pci->cfg.ops->bus_shift; gen_pci_parse_map_cfg_windows()
191 pci->cfg.win[idx] = devm_ioremap(dev, gen_pci_parse_map_cfg_windows()
192 pci->cfg.res.start + busn * sz, gen_pci_parse_map_cfg_windows()
194 if (!pci->cfg.win[idx]) gen_pci_parse_map_cfg_windows()
243 pci->cfg.ops = of_id->data; gen_pci_probe()
244 gen_pci_ops.map_bus = pci->cfg.ops->map_bus; gen_pci_probe()
/linux-4.1.27/drivers/phy/
H A Dphy-stih41x-usb.c32 * @cfg: Static configuration value for PHY
39 u32 cfg; member in struct:stih41x_usb_cfg
47 * @cfg: SoC specific PHY register mapping
53 const struct stih41x_usb_cfg *cfg; member in struct:stih41x_usb_phy
60 .cfg = 0x38,
67 .cfg = 0x238,
75 return regmap_update_bits(phy_dev->regmap, phy_dev->cfg->syscfg, stih41x_usb_phy_init()
76 phy_dev->cfg->cfg_mask, phy_dev->cfg->cfg); stih41x_usb_phy_init()
90 ret = regmap_update_bits(phy_dev->regmap, phy_dev->cfg->syscfg, stih41x_usb_phy_power_on()
91 phy_dev->cfg->oscok, phy_dev->cfg->oscok); stih41x_usb_phy_power_on()
103 ret = regmap_update_bits(phy_dev->regmap, phy_dev->cfg->syscfg, stih41x_usb_phy_power_off()
104 phy_dev->cfg->oscok, 0); stih41x_usb_phy_power_off()
141 phy_dev->cfg = match->data; stih41x_usb_phy_probe()
H A Dphy-samsung-usb2.c29 inst->cfg->label); samsung_usb2_phy_power_on()
36 if (inst->cfg->power_on) { samsung_usb2_phy_power_on()
38 ret = inst->cfg->power_on(inst); samsung_usb2_phy_power_on()
61 inst->cfg->label); samsung_usb2_phy_power_off()
62 if (inst->cfg->power_off) { samsung_usb2_phy_power_off()
64 ret = inst->cfg->power_off(inst); samsung_usb2_phy_power_off()
89 if (WARN_ON(args->args[0] >= drv->cfg->num_phys)) samsung_usb2_phy_xlate()
133 const struct samsung_usb2_phy_config *cfg; samsung_usb2_phy_probe() local
150 cfg = match->data; samsung_usb2_phy_probe()
153 cfg->num_phys * sizeof(struct samsung_usb2_phy_instance), samsung_usb2_phy_probe()
161 drv->cfg = cfg; samsung_usb2_phy_probe()
178 if (drv->cfg->has_mode_switch) { samsung_usb2_phy_probe()
200 if (drv->cfg->rate_to_clk) { samsung_usb2_phy_probe()
201 ret = drv->cfg->rate_to_clk(drv->ref_rate, &drv->ref_reg_val); samsung_usb2_phy_probe()
206 for (i = 0; i < drv->cfg->num_phys; i++) { samsung_usb2_phy_probe()
207 char *label = drv->cfg->phys[i].label; samsung_usb2_phy_probe()
218 p->cfg = &drv->cfg->phys[i]; samsung_usb2_phy_probe()
H A Dphy-exynos4x12-usb2.c174 switch (inst->cfg->id) { exynos4x12_isol()
203 if (drv->cfg->has_refclk_sel) exynos4x12_setup_clk()
219 switch (inst->cfg->id) { exynos4x12_phy_pwr()
280 if (inst->cfg->id == EXYNOS4x12_HOST) { exynos4x12_power_on()
287 if (inst->cfg->id == EXYNOS4x12_DEVICE && drv->cfg->has_mode_switch) exynos4x12_power_on()
292 if (inst->cfg->id == EXYNOS4x12_HSIC0 || exynos4x12_power_on()
293 inst->cfg->id == EXYNOS4x12_HSIC1) { exynos4x12_power_on()
319 if (inst->cfg->id == EXYNOS4x12_DEVICE && drv->cfg->has_mode_switch) exynos4x12_power_off()
324 if (inst->cfg->id == EXYNOS4x12_HOST) exynos4x12_power_off()
327 if (inst->cfg->id == EXYNOS4x12_HSIC0 || exynos4x12_power_off()
328 inst->cfg->id == EXYNOS4x12_HSIC1) { exynos4x12_power_off()
/linux-4.1.27/drivers/video/fbdev/omap2/dss/
H A Dhdmi5_core.c291 struct hdmi_config *cfg) hdmi_core_init()
297 video_cfg->v_fc_config.timings.hsync_level = cfg->timings.hsync_level; hdmi_core_init()
298 video_cfg->v_fc_config.timings.x_res = cfg->timings.x_res; hdmi_core_init()
299 video_cfg->v_fc_config.timings.hsw = cfg->timings.hsw - 1; hdmi_core_init()
300 video_cfg->v_fc_config.timings.hbp = cfg->timings.hbp; hdmi_core_init()
301 video_cfg->v_fc_config.timings.hfp = cfg->timings.hfp; hdmi_core_init()
302 video_cfg->hblank = cfg->timings.hfp + hdmi_core_init()
303 cfg->timings.hbp + cfg->timings.hsw - 1; hdmi_core_init()
304 video_cfg->v_fc_config.timings.vsync_level = cfg->timings.vsync_level; hdmi_core_init()
305 video_cfg->v_fc_config.timings.y_res = cfg->timings.y_res; hdmi_core_init()
306 video_cfg->v_fc_config.timings.vsw = cfg->timings.vsw; hdmi_core_init()
307 video_cfg->v_fc_config.timings.vfp = cfg->timings.vfp; hdmi_core_init()
308 video_cfg->v_fc_config.timings.vbp = cfg->timings.vbp; hdmi_core_init()
310 video_cfg->vblank = cfg->timings.vsw + hdmi_core_init()
311 cfg->timings.vfp + cfg->timings.vbp; hdmi_core_init()
312 video_cfg->v_fc_config.hdmi_dvi_mode = cfg->hdmi_dvi_mode; hdmi_core_init()
313 video_cfg->v_fc_config.timings.interlace = cfg->timings.interlace; hdmi_core_init()
318 struct hdmi_core_vid_config *cfg) hdmi_core_video_config()
325 cfg->v_fc_config.timings.vsync_level == OMAPDSS_SIG_ACTIVE_HIGH; hdmi_core_video_config()
327 cfg->v_fc_config.timings.hsync_level == OMAPDSS_SIG_ACTIVE_HIGH; hdmi_core_video_config()
333 r = FLD_MOD(r, cfg->data_enable_pol, 4, 4); hdmi_core_video_config()
334 r = FLD_MOD(r, cfg->vblank_osc, 1, 1); hdmi_core_video_config()
335 r = FLD_MOD(r, cfg->v_fc_config.timings.interlace, 0, 0); hdmi_core_video_config()
340 cfg->v_fc_config.timings.x_res >> 8, 4, 0); hdmi_core_video_config()
342 cfg->v_fc_config.timings.x_res & 0xFF, 7, 0); hdmi_core_video_config()
346 cfg->v_fc_config.timings.y_res >> 8, 4, 0); hdmi_core_video_config()
348 cfg->v_fc_config.timings.y_res & 0xFF, 7, 0); hdmi_core_video_config()
351 REG_FLD_MOD(base, HDMI_CORE_FC_INHBLANK1, cfg->hblank >> 8, 4, 0); hdmi_core_video_config()
352 REG_FLD_MOD(base, HDMI_CORE_FC_INHBLANK0, cfg->hblank & 0xFF, 7, 0); hdmi_core_video_config()
355 REG_FLD_MOD(base, HDMI_CORE_FC_INVBLANK, cfg->vblank, 7, 0); hdmi_core_video_config()
359 cfg->v_fc_config.timings.hfp >> 8, 4, 0); hdmi_core_video_config()
361 cfg->v_fc_config.timings.hfp & 0xFF, 7, 0); hdmi_core_video_config()
365 cfg->v_fc_config.timings.vfp, 7, 0); hdmi_core_video_config()
369 (cfg->v_fc_config.timings.hsw >> 8), 1, 0); hdmi_core_video_config()
371 cfg->v_fc_config.timings.hsw & 0xFF, 7, 0); hdmi_core_video_config()
375 cfg->v_fc_config.timings.vsw, 5, 0); hdmi_core_video_config()
379 cfg->v_fc_config.hdmi_dvi_mode, 3, 3); hdmi_core_video_config()
601 struct hdmi_config *cfg) hdmi5_configure()
609 hdmi_core_init(&v_core_cfg, cfg); hdmi5_configure()
611 hdmi_wp_init_vid_fmt_timings(&video_format, &video_timing, cfg); hdmi5_configure()
624 cfg->infoframe.quantization_range = HDMI_QUANTIZATION_RANGE_LIMITED; hdmi5_configure()
637 if (cfg->hdmi_dvi_mode == HDMI_HDMI) hdmi5_configure()
638 hdmi_core_write_avi_infoframe(core, &cfg->infoframe); hdmi5_configure()
646 struct hdmi_core_audio_config *cfg) hdmi5_core_audio_config()
655 REG_FLD_MOD(base, HDMI_CORE_AUD_N1, cfg->n, 7, 0); hdmi5_core_audio_config()
656 REG_FLD_MOD(base, HDMI_CORE_AUD_N2, cfg->n >> 8, 7, 0); hdmi5_core_audio_config()
657 REG_FLD_MOD(base, HDMI_CORE_AUD_N3, cfg->n >> 16, 3, 0); hdmi5_core_audio_config()
664 REG_FLD_MOD(base, HDMI_CORE_AUD_CTS1, cfg->cts, 7, 0); hdmi5_core_audio_config()
665 REG_FLD_MOD(base, HDMI_CORE_AUD_CTS2, cfg->cts >> 8, 7, 0); hdmi5_core_audio_config()
666 REG_FLD_MOD(base, HDMI_CORE_AUD_CTS3, cfg->cts >> 16, 3, 0); hdmi5_core_audio_config()
669 if (cfg->layout == HDMI_AUDIO_LAYOUT_2CH) hdmi5_core_audio_config()
679 if (cfg->layout == HDMI_AUDIO_LAYOUT_2CH) hdmi5_core_audio_config()
690 if (cfg->layout == HDMI_AUDIO_LAYOUT_6CH) hdmi5_core_audio_config()
701 val = cfg->iec60958_cfg->status[5] & IEC958_AES5_CON_CGMSA; hdmi5_core_audio_config()
705 val = (cfg->iec60958_cfg->status[0] & hdmi5_core_audio_config()
711 cfg->iec60958_cfg->status[1]); hdmi5_core_audio_config()
714 val = (cfg->iec60958_cfg->status[0] & IEC958_AES0_CON_MODE) >> 6; hdmi5_core_audio_config()
718 val = cfg->iec60958_cfg->status[2] & IEC958_AES2_CON_SOURCE; hdmi5_core_audio_config()
740 cfg->iec60958_cfg->status[3]); hdmi5_core_audio_config()
744 cfg->iec60958_cfg->status[4]); hdmi5_core_audio_config()
751 if (cfg->layout == HDMI_AUDIO_LAYOUT_2CH) { hdmi5_core_audio_config()
756 } else if (cfg->layout == HDMI_AUDIO_LAYOUT_6CH) { hdmi5_core_audio_config()
290 hdmi_core_init(struct hdmi_core_vid_config *video_cfg, struct hdmi_config *cfg) hdmi_core_init() argument
317 hdmi_core_video_config(struct hdmi_core_data *core, struct hdmi_core_vid_config *cfg) hdmi_core_video_config() argument
600 hdmi5_configure(struct hdmi_core_data *core, struct hdmi_wp_data *wp, struct hdmi_config *cfg) hdmi5_configure() argument
645 hdmi5_core_audio_config(struct hdmi_core_data *core, struct hdmi_core_audio_config *cfg) hdmi5_core_audio_config() argument
H A Dhdmi4_core.c231 struct hdmi_core_video_config *cfg) hdmi_core_video_config()
246 HDMI_CORE_SYS_VID_ACEN, cfg->ip_bus_width, 7, 6); hdmi_core_video_config()
252 if (cfg->op_dither_truc > HDMI_OUTPUTTRUNCATION_12BIT) { hdmi_core_video_config()
253 r = FLD_MOD(r, cfg->op_dither_truc - 3, 7, 6); hdmi_core_video_config()
256 r = FLD_MOD(r, cfg->op_dither_truc, 7, 6); hdmi_core_video_config()
263 r = FLD_MOD(r, cfg->deep_color_pkt, 6, 6); hdmi_core_video_config()
264 r = FLD_MOD(r, cfg->pkt_mode, 5, 3); hdmi_core_video_config()
265 r = FLD_MOD(r, cfg->hdmi_dvi, 0, 0); hdmi_core_video_config()
270 HDMI_CORE_SYS_TMDS_CTRL, cfg->tclk_sel_clkmult, 6, 5); hdmi_core_video_config()
310 struct hdmi_wp_data *wp, struct hdmi_config *cfg) hdmi4_configure()
321 hdmi_wp_init_vid_fmt_timings(&video_format, &video_timing, cfg); hdmi4_configure()
342 v_core_cfg.hdmi_dvi = cfg->hdmi_dvi_mode; hdmi4_configure()
349 if (cfg->hdmi_dvi_mode == HDMI_HDMI) { hdmi4_configure()
350 hdmi_core_write_avi_infoframe(core, &cfg->infoframe); hdmi4_configure()
532 struct hdmi_core_audio_config *cfg) hdmi_core_audio_config()
540 REG_FLD_MOD(av_base, HDMI_CORE_AV_N_SVAL1, cfg->n, 7, 0); hdmi_core_audio_config()
541 REG_FLD_MOD(av_base, HDMI_CORE_AV_N_SVAL2, cfg->n >> 8, 7, 0); hdmi_core_audio_config()
542 REG_FLD_MOD(av_base, HDMI_CORE_AV_N_SVAL3, cfg->n >> 16, 7, 0); hdmi_core_audio_config()
544 if (cfg->cts_mode == HDMI_AUDIO_CTS_MODE_SW) { hdmi_core_audio_config()
545 REG_FLD_MOD(av_base, HDMI_CORE_AV_CTS_SVAL1, cfg->cts, 7, 0); hdmi_core_audio_config()
547 HDMI_CORE_AV_CTS_SVAL2, cfg->cts >> 8, 7, 0); hdmi_core_audio_config()
549 HDMI_CORE_AV_CTS_SVAL3, cfg->cts >> 16, 7, 0); hdmi_core_audio_config()
552 cfg->aud_par_busclk, 7, 0); hdmi_core_audio_config()
554 (cfg->aud_par_busclk >> 8), 7, 0); hdmi_core_audio_config()
556 (cfg->aud_par_busclk >> 16), 7, 0); hdmi_core_audio_config()
561 HDMI_CORE_AV_FREQ_SVAL, cfg->mclk_mode, 2, 0); hdmi_core_audio_config()
570 r = FLD_MOD(r, cfg->en_acr_pkt, 1, 1); hdmi_core_audio_config()
571 r = FLD_MOD(r, cfg->cts_mode, 0, 0); hdmi_core_audio_config()
575 if (cfg->use_mclk) hdmi_core_audio_config()
580 cfg->fs_override, 1, 1); hdmi_core_audio_config()
588 cfg->iec60958_cfg->status[0]); hdmi_core_audio_config()
590 cfg->iec60958_cfg->status[1]); hdmi_core_audio_config()
592 cfg->iec60958_cfg->status[2]); hdmi_core_audio_config()
595 cfg->iec60958_cfg->status[3]); hdmi_core_audio_config()
598 cfg->iec60958_cfg->status[4]); hdmi_core_audio_config()
602 r = FLD_MOD(r, cfg->i2s_cfg.sck_edge_mode, 6, 6); hdmi_core_audio_config()
603 r = FLD_MOD(r, cfg->i2s_cfg.vbit, 4, 4); hdmi_core_audio_config()
604 r = FLD_MOD(r, cfg->i2s_cfg.justification, 2, 2); hdmi_core_audio_config()
605 r = FLD_MOD(r, cfg->i2s_cfg.direction, 1, 1); hdmi_core_audio_config()
606 r = FLD_MOD(r, cfg->i2s_cfg.shift, 0, 0); hdmi_core_audio_config()
610 cfg->i2s_cfg.in_length_bits, 3, 0); hdmi_core_audio_config()
613 REG_FLD_MOD(av_base, HDMI_CORE_AV_HDMI_CTRL, cfg->layout, 2, 1); hdmi_core_audio_config()
615 r = FLD_MOD(r, cfg->i2s_cfg.active_sds, 7, 4); hdmi_core_audio_config()
616 r = FLD_MOD(r, cfg->en_dsd_audio, 3, 3); hdmi_core_audio_config()
617 r = FLD_MOD(r, cfg->en_parallel_aud_input, 2, 2); hdmi_core_audio_config()
618 r = FLD_MOD(r, cfg->en_spdif, 1, 1); hdmi_core_audio_config()
675 * TODO: Add MPEG and SPD enable and repeat cfg when EDID parsing hdmi_core_audio_infoframe_cfg()
230 hdmi_core_video_config(struct hdmi_core_data *core, struct hdmi_core_video_config *cfg) hdmi_core_video_config() argument
309 hdmi4_configure(struct hdmi_core_data *core, struct hdmi_wp_data *wp, struct hdmi_config *cfg) hdmi4_configure() argument
531 hdmi_core_audio_config(struct hdmi_core_data *core, struct hdmi_core_audio_config *cfg) hdmi_core_audio_config() argument
/linux-4.1.27/net/ipv6/
H A Dip6_udp_tunnel.c15 int udp_sock_create6(struct net *net, struct udp_port_cfg *cfg, udp_sock_create6() argument
29 memcpy(&udp6_addr.sin6_addr, &cfg->local_ip6, udp_sock_create6()
31 udp6_addr.sin6_port = cfg->local_udp_port; udp_sock_create6()
37 if (cfg->peer_udp_port) { udp_sock_create6()
39 memcpy(&udp6_addr.sin6_addr, &cfg->peer_ip6, udp_sock_create6()
41 udp6_addr.sin6_port = cfg->peer_udp_port; udp_sock_create6()
49 udp_set_no_check6_tx(sock->sk, !cfg->use_udp6_tx_checksums); udp_sock_create6()
50 udp_set_no_check6_rx(sock->sk, !cfg->use_udp6_rx_checksums); udp_sock_create6()
H A Droute.c1471 const struct fib6_config *cfg) ip6_convert_metrics()
1477 if (!cfg->fc_mx) ip6_convert_metrics()
1484 nla_for_each_attr(nla, cfg->fc_mx, cfg->fc_mx_len, remaining) { ip6_convert_metrics()
1516 int ip6_route_info_create(struct fib6_config *cfg, struct rt6_info **rt_ret) ip6_route_info_create() argument
1519 struct net *net = cfg->fc_nlinfo.nl_net; ip6_route_info_create()
1526 if (cfg->fc_dst_len > 128 || cfg->fc_src_len > 128) ip6_route_info_create()
1529 if (cfg->fc_src_len) ip6_route_info_create()
1532 if (cfg->fc_ifindex) { ip6_route_info_create()
1534 dev = dev_get_by_index(net, cfg->fc_ifindex); ip6_route_info_create()
1542 if (cfg->fc_metric == 0) ip6_route_info_create()
1543 cfg->fc_metric = IP6_RT_PRIO_USER; ip6_route_info_create()
1546 if (cfg->fc_nlinfo.nlh && ip6_route_info_create()
1547 !(cfg->fc_nlinfo.nlh->nlmsg_flags & NLM_F_CREATE)) { ip6_route_info_create()
1548 table = fib6_get_table(net, cfg->fc_table); ip6_route_info_create()
1551 table = fib6_new_table(net, cfg->fc_table); ip6_route_info_create()
1554 table = fib6_new_table(net, cfg->fc_table); ip6_route_info_create()
1560 rt = ip6_dst_alloc(net, NULL, (cfg->fc_flags & RTF_ADDRCONF) ? 0 : DST_NOCOUNT, table); ip6_route_info_create()
1567 if (cfg->fc_flags & RTF_EXPIRES) ip6_route_info_create()
1569 clock_t_to_jiffies(cfg->fc_expires)); ip6_route_info_create()
1573 if (cfg->fc_protocol == RTPROT_UNSPEC) ip6_route_info_create()
1574 cfg->fc_protocol = RTPROT_BOOT; ip6_route_info_create()
1575 rt->rt6i_protocol = cfg->fc_protocol; ip6_route_info_create()
1577 addr_type = ipv6_addr_type(&cfg->fc_dst); ip6_route_info_create()
1581 else if (cfg->fc_flags & RTF_LOCAL) ip6_route_info_create()
1588 ipv6_addr_prefix(&rt->rt6i_dst.addr, &cfg->fc_dst, cfg->fc_dst_len); ip6_route_info_create()
1589 rt->rt6i_dst.plen = cfg->fc_dst_len; ip6_route_info_create()
1596 ipv6_addr_prefix(&rt->rt6i_src.addr, &cfg->fc_src, cfg->fc_src_len); ip6_route_info_create()
1597 rt->rt6i_src.plen = cfg->fc_src_len; ip6_route_info_create()
1600 rt->rt6i_metric = cfg->fc_metric; ip6_route_info_create()
1605 if ((cfg->fc_flags & RTF_REJECT) || ip6_route_info_create()
1608 !(cfg->fc_flags & RTF_LOCAL))) { ip6_route_info_create()
1624 switch (cfg->fc_type) { ip6_route_info_create()
1637 rt->dst.error = (cfg->fc_type == RTN_THROW) ? -EAGAIN ip6_route_info_create()
1646 if (cfg->fc_flags & RTF_GATEWAY) { ip6_route_info_create()
1650 gw_addr = &cfg->fc_gateway; ip6_route_info_create()
1668 grt = rt6_lookup(net, gw_addr, NULL, cfg->fc_ifindex, 1); ip6_route_info_create()
1700 if (!ipv6_addr_any(&cfg->fc_prefsrc)) { ip6_route_info_create()
1701 if (!ipv6_chk_addr(net, &cfg->fc_prefsrc, dev, 0)) { ip6_route_info_create()
1705 rt->rt6i_prefsrc.addr = cfg->fc_prefsrc; ip6_route_info_create()
1710 rt->rt6i_flags = cfg->fc_flags; ip6_route_info_create()
1717 cfg->fc_nlinfo.nl_net = dev_net(dev); ip6_route_info_create()
1735 int ip6_route_add(struct fib6_config *cfg) ip6_route_add() argument
1741 err = ip6_route_info_create(cfg, &rt); ip6_route_add()
1745 err = ip6_convert_metrics(&mxc, cfg); ip6_route_add()
1749 err = __ip6_ins_rt(rt, &cfg->fc_nlinfo, &mxc); ip6_route_add()
1790 static int ip6_route_del(struct fib6_config *cfg) ip6_route_del() argument
1797 table = fib6_get_table(cfg->fc_nlinfo.nl_net, cfg->fc_table); ip6_route_del()
1804 &cfg->fc_dst, cfg->fc_dst_len, ip6_route_del()
1805 &cfg->fc_src, cfg->fc_src_len); ip6_route_del()
1809 if (cfg->fc_ifindex && ip6_route_del()
1811 rt->dst.dev->ifindex != cfg->fc_ifindex)) ip6_route_del()
1813 if (cfg->fc_flags & RTF_GATEWAY && ip6_route_del()
1814 !ipv6_addr_equal(&cfg->fc_gateway, &rt->rt6i_gateway)) ip6_route_del()
1816 if (cfg->fc_metric && cfg->fc_metric != rt->rt6i_metric) ip6_route_del()
1821 return __ip6_del_rt(rt, &cfg->fc_nlinfo); ip6_route_del()
2026 struct fib6_config cfg = { rt6_add_route_info() local
2038 cfg.fc_dst = *prefix; rt6_add_route_info()
2039 cfg.fc_gateway = *gwaddr; rt6_add_route_info()
2043 cfg.fc_flags |= RTF_DEFAULT; rt6_add_route_info()
2045 ip6_route_add(&cfg); rt6_add_route_info()
2077 struct fib6_config cfg = { rt6_add_dflt_router() local
2088 cfg.fc_gateway = *gwaddr; rt6_add_dflt_router()
2090 ip6_route_add(&cfg); rt6_add_dflt_router()
2121 struct fib6_config *cfg) rtmsg_to_fib6_config()
2123 memset(cfg, 0, sizeof(*cfg)); rtmsg_to_fib6_config()
2125 cfg->fc_table = RT6_TABLE_MAIN; rtmsg_to_fib6_config()
2126 cfg->fc_ifindex = rtmsg->rtmsg_ifindex; rtmsg_to_fib6_config()
2127 cfg->fc_metric = rtmsg->rtmsg_metric; rtmsg_to_fib6_config()
2128 cfg->fc_expires = rtmsg->rtmsg_info; rtmsg_to_fib6_config()
2129 cfg->fc_dst_len = rtmsg->rtmsg_dst_len; rtmsg_to_fib6_config()
2130 cfg->fc_src_len = rtmsg->rtmsg_src_len; rtmsg_to_fib6_config()
2131 cfg->fc_flags = rtmsg->rtmsg_flags; rtmsg_to_fib6_config()
2133 cfg->fc_nlinfo.nl_net = net; rtmsg_to_fib6_config()
2135 cfg->fc_dst = rtmsg->rtmsg_dst; rtmsg_to_fib6_config()
2136 cfg->fc_src = rtmsg->rtmsg_src; rtmsg_to_fib6_config()
2137 cfg->fc_gateway = rtmsg->rtmsg_gateway; rtmsg_to_fib6_config()
2142 struct fib6_config cfg; ipv6_route_ioctl() local
2156 rtmsg_to_fib6_config(net, &rtmsg, &cfg); ipv6_route_ioctl()
2161 err = ip6_route_add(&cfg); ipv6_route_ioctl()
2164 err = ip6_route_del(&cfg); ipv6_route_ioctl()
2427 struct fib6_config *cfg) rtm_to_fib6_config()
2440 memset(cfg, 0, sizeof(*cfg)); rtm_to_fib6_config()
2442 cfg->fc_table = rtm->rtm_table; rtm_to_fib6_config()
2443 cfg->fc_dst_len = rtm->rtm_dst_len; rtm_to_fib6_config()
2444 cfg->fc_src_len = rtm->rtm_src_len; rtm_to_fib6_config()
2445 cfg->fc_flags = RTF_UP; rtm_to_fib6_config()
2446 cfg->fc_protocol = rtm->rtm_protocol; rtm_to_fib6_config()
2447 cfg->fc_type = rtm->rtm_type; rtm_to_fib6_config()
2453 cfg->fc_flags |= RTF_REJECT; rtm_to_fib6_config()
2456 cfg->fc_flags |= RTF_LOCAL; rtm_to_fib6_config()
2458 cfg->fc_nlinfo.portid = NETLINK_CB(skb).portid; rtm_to_fib6_config()
2459 cfg->fc_nlinfo.nlh = nlh; rtm_to_fib6_config()
2460 cfg->fc_nlinfo.nl_net = sock_net(skb->sk); rtm_to_fib6_config()
2463 cfg->fc_gateway = nla_get_in6_addr(tb[RTA_GATEWAY]); rtm_to_fib6_config()
2464 cfg->fc_flags |= RTF_GATEWAY; rtm_to_fib6_config()
2473 nla_memcpy(&cfg->fc_dst, tb[RTA_DST], plen); rtm_to_fib6_config()
2482 nla_memcpy(&cfg->fc_src, tb[RTA_SRC], plen); rtm_to_fib6_config()
2486 cfg->fc_prefsrc = nla_get_in6_addr(tb[RTA_PREFSRC]); rtm_to_fib6_config()
2489 cfg->fc_ifindex = nla_get_u32(tb[RTA_OIF]); rtm_to_fib6_config()
2492 cfg->fc_metric = nla_get_u32(tb[RTA_PRIORITY]); rtm_to_fib6_config()
2495 cfg->fc_mx = nla_data(tb[RTA_METRICS]); rtm_to_fib6_config()
2496 cfg->fc_mx_len = nla_len(tb[RTA_METRICS]); rtm_to_fib6_config()
2500 cfg->fc_table = nla_get_u32(tb[RTA_TABLE]); rtm_to_fib6_config()
2503 cfg->fc_mp = nla_data(tb[RTA_MULTIPATH]); rtm_to_fib6_config()
2504 cfg->fc_mp_len = nla_len(tb[RTA_MULTIPATH]); rtm_to_fib6_config()
2512 cfg->fc_flags |= RTF_PREF(pref); rtm_to_fib6_config()
2571 static int ip6_route_multipath_add(struct fib6_config *cfg) ip6_route_multipath_add() argument
2582 int replace = (cfg->fc_nlinfo.nlh && ip6_route_multipath_add()
2583 (cfg->fc_nlinfo.nlh->nlmsg_flags & NLM_F_REPLACE)); ip6_route_multipath_add()
2586 remaining = cfg->fc_mp_len; ip6_route_multipath_add()
2587 rtnh = (struct rtnexthop *)cfg->fc_mp; ip6_route_multipath_add()
2593 memcpy(&r_cfg, cfg, sizeof(*cfg)); ip6_route_multipath_add()
2623 err = __ip6_ins_rt(nh->rt6_info, &cfg->fc_nlinfo, &nh->mxc); ip6_route_multipath_add()
2640 cfg->fc_nlinfo.nlh->nlmsg_flags &= ~(NLM_F_EXCL | ip6_route_multipath_add()
2668 static int ip6_route_multipath_del(struct fib6_config *cfg) ip6_route_multipath_del() argument
2676 remaining = cfg->fc_mp_len; ip6_route_multipath_del()
2677 rtnh = (struct rtnexthop *)cfg->fc_mp; ip6_route_multipath_del()
2681 memcpy(&r_cfg, cfg, sizeof(*cfg)); ip6_route_multipath_del()
2707 struct fib6_config cfg; inet6_rtm_delroute() local
2710 err = rtm_to_fib6_config(skb, nlh, &cfg); inet6_rtm_delroute()
2714 if (cfg.fc_mp) inet6_rtm_delroute()
2715 return ip6_route_multipath_del(&cfg); inet6_rtm_delroute()
2717 return ip6_route_del(&cfg); inet6_rtm_delroute()
2722 struct fib6_config cfg; inet6_rtm_newroute() local
2725 err = rtm_to_fib6_config(skb, nlh, &cfg); inet6_rtm_newroute()
2729 if (cfg.fc_mp) inet6_rtm_newroute()
2730 return ip6_route_multipath_add(&cfg); inet6_rtm_newroute()
2732 return ip6_route_add(&cfg); inet6_rtm_newroute()
1470 ip6_convert_metrics(struct mx6_config *mxc, const struct fib6_config *cfg) ip6_convert_metrics() argument
2119 rtmsg_to_fib6_config(struct net *net, struct in6_rtmsg *rtmsg, struct fib6_config *cfg) rtmsg_to_fib6_config() argument
2426 rtm_to_fib6_config(struct sk_buff *skb, struct nlmsghdr *nlh, struct fib6_config *cfg) rtm_to_fib6_config() argument
/linux-4.1.27/drivers/net/wireless/brcm80211/brcmfmac/
H A Dcfg80211.c559 struct brcmf_cfg80211_info *cfg = wiphy_to_cfg(wiphy); brcmf_ap_add_vif() local
560 struct brcmf_if *ifp = netdev_priv(cfg_to_ndev(cfg)); brcmf_ap_add_vif()
564 if (brcmf_cfg80211_vif_event_armed(cfg)) brcmf_ap_add_vif()
569 vif = brcmf_alloc_vif(cfg, NL80211_IFTYPE_AP, false); brcmf_ap_add_vif()
573 brcmf_cfg80211_arm_vif_event(cfg, vif); brcmf_ap_add_vif()
577 brcmf_cfg80211_arm_vif_event(cfg, NULL); brcmf_ap_add_vif()
582 err = brcmf_cfg80211_wait_vif_event_timeout(cfg, BRCMF_E_IF_ADD, brcmf_ap_add_vif()
584 brcmf_cfg80211_arm_vif_event(cfg, NULL); brcmf_ap_add_vif()
682 s32 brcmf_notify_escan_complete(struct brcmf_cfg80211_info *cfg, brcmf_notify_escan_complete() argument
694 scan_request = cfg->scan_request; brcmf_notify_escan_complete()
695 cfg->scan_request = NULL; brcmf_notify_escan_complete()
697 if (timer_pending(&cfg->escan_timeout)) brcmf_notify_escan_complete()
698 del_timer_sync(&cfg->escan_timeout); brcmf_notify_escan_complete()
727 if (cfg->sched_escan) { brcmf_notify_escan_complete()
729 cfg->sched_escan = false; brcmf_notify_escan_complete()
731 cfg80211_sched_scan_results(cfg_to_wiphy(cfg)); brcmf_notify_escan_complete()
737 if (!test_and_clear_bit(BRCMF_SCAN_STATUS_BUSY, &cfg->scan_status)) brcmf_notify_escan_complete()
746 struct brcmf_cfg80211_info *cfg = wiphy_priv(wiphy); brcmf_cfg80211_del_iface() local
750 if (brcmf_cfg80211_vif_event_armed(cfg)) brcmf_cfg80211_del_iface()
754 if (test_bit(BRCMF_SCAN_STATUS_BUSY, &cfg->scan_status) && brcmf_cfg80211_del_iface()
755 cfg->escan_info.ifp == netdev_priv(ndev)) brcmf_cfg80211_del_iface()
756 brcmf_notify_escan_complete(cfg, netdev_priv(ndev), brcmf_cfg80211_del_iface()
787 struct brcmf_cfg80211_info *cfg = wiphy_priv(wiphy); brcmf_cfg80211_change_iface() local
832 err = brcmf_p2p_ifchange(cfg, BRCMF_FIL_P2P_IF_GO); brcmf_cfg80211_change_iface()
858 static void brcmf_escan_prep(struct brcmf_cfg80211_info *cfg, brcmf_escan_prep() argument
891 chanspec = channel_to_chanspec(&cfg->d11inf, brcmf_escan_prep()
940 brcmf_run_escan(struct brcmf_cfg80211_info *cfg, struct brcmf_if *ifp, brcmf_run_escan() argument
964 brcmf_escan_prep(cfg, &params->params_le, request); brcmf_run_escan()
983 brcmf_do_escan(struct brcmf_cfg80211_info *cfg, struct wiphy *wiphy, brcmf_do_escan() argument
989 struct escan_info *escan = &cfg->escan_info; brcmf_do_escan()
995 passive_scan = cfg->active_scan ? 0 : 1; brcmf_do_escan()
1003 results = (struct brcmf_scan_results *)cfg->escan_info.escan_buf; brcmf_do_escan()
1008 err = escan->run(cfg, ifp, request, WL_ESCAN_ACTION_START); brcmf_do_escan()
1020 struct brcmf_cfg80211_info *cfg = wiphy_to_cfg(wiphy); brcmf_cfg80211_escan() local
1022 struct brcmf_cfg80211_scan_req *sr = &cfg->scan_req_int; brcmf_cfg80211_escan()
1031 if (test_bit(BRCMF_SCAN_STATUS_BUSY, &cfg->scan_status)) { brcmf_cfg80211_escan()
1032 brcmf_err("Scanning already: status (%lu)\n", cfg->scan_status); brcmf_cfg80211_escan()
1035 if (test_bit(BRCMF_SCAN_STATUS_ABORT, &cfg->scan_status)) { brcmf_cfg80211_escan()
1037 cfg->scan_status); brcmf_cfg80211_escan()
1040 if (test_bit(BRCMF_SCAN_STATUS_SUPPRESS, &cfg->scan_status)) { brcmf_cfg80211_escan()
1042 cfg->scan_status); brcmf_cfg80211_escan()
1051 if (vif == cfg->p2p.bss_idx[P2PAPI_BSSCFG_DEVICE].vif) brcmf_cfg80211_escan()
1052 vif = cfg->p2p.bss_idx[P2PAPI_BSSCFG_PRIMARY].vif; brcmf_cfg80211_escan()
1065 cfg->scan_request = request; brcmf_cfg80211_escan()
1066 set_bit(BRCMF_SCAN_STATUS_BUSY, &cfg->scan_status); brcmf_cfg80211_escan()
1068 cfg->escan_info.run = brcmf_run_escan; brcmf_cfg80211_escan()
1073 err = brcmf_do_escan(cfg, wiphy, vif->ifp, request); brcmf_cfg80211_escan()
1090 passive_scan = cfg->active_scan ? 0 : 1; brcmf_cfg80211_escan()
1113 mod_timer(&cfg->escan_timeout, jiffies + brcmf_cfg80211_escan()
1119 clear_bit(BRCMF_SCAN_STATUS_BUSY, &cfg->scan_status); brcmf_cfg80211_escan()
1120 cfg->scan_request = NULL; brcmf_cfg80211_escan()
1183 struct brcmf_cfg80211_info *cfg = wiphy_to_cfg(wiphy); brcmf_cfg80211_set_wiphy_params() local
1184 struct net_device *ndev = cfg_to_ndev(cfg); brcmf_cfg80211_set_wiphy_params()
1193 (cfg->conf->rts_threshold != wiphy->rts_threshold)) { brcmf_cfg80211_set_wiphy_params()
1194 cfg->conf->rts_threshold = wiphy->rts_threshold; brcmf_cfg80211_set_wiphy_params()
1195 err = brcmf_set_rts(ndev, cfg->conf->rts_threshold); brcmf_cfg80211_set_wiphy_params()
1200 (cfg->conf->frag_threshold != wiphy->frag_threshold)) { brcmf_cfg80211_set_wiphy_params()
1201 cfg->conf->frag_threshold = wiphy->frag_threshold; brcmf_cfg80211_set_wiphy_params()
1202 err = brcmf_set_frag(ndev, cfg->conf->frag_threshold); brcmf_cfg80211_set_wiphy_params()
1207 && (cfg->conf->retry_long != wiphy->retry_long)) { brcmf_cfg80211_set_wiphy_params()
1208 cfg->conf->retry_long = wiphy->retry_long; brcmf_cfg80211_set_wiphy_params()
1209 err = brcmf_set_retry(ndev, cfg->conf->retry_long, true); brcmf_cfg80211_set_wiphy_params()
1214 && (cfg->conf->retry_short != wiphy->retry_short)) { brcmf_cfg80211_set_wiphy_params()
1215 cfg->conf->retry_short = wiphy->retry_short; brcmf_cfg80211_set_wiphy_params()
1216 err = brcmf_set_retry(ndev, cfg->conf->retry_short, false); brcmf_cfg80211_set_wiphy_params()
1251 struct brcmf_cfg80211_info *cfg = wiphy_to_cfg(vif->wdev.wiphy); brcmf_link_down() local
1269 clear_bit(BRCMF_SCAN_STATUS_SUPPRESS, &cfg->scan_status); brcmf_link_down()
1278 struct brcmf_cfg80211_info *cfg = wiphy_to_cfg(wiphy); brcmf_cfg80211_join_ibss() local
1385 cfg->channel = brcmf_cfg80211_join_ibss()
1390 chanspec = chandef_to_chanspec(&cfg->d11inf, brcmf_cfg80211_join_ibss()
1399 target_channel = cfg->channel; brcmf_cfg80211_join_ibss()
1407 cfg->channel = 0; brcmf_cfg80211_join_ibss()
1409 cfg->ibss_starter = false; brcmf_cfg80211_join_ibss()
1722 struct brcmf_cfg80211_info *cfg = wiphy_to_cfg(wiphy); brcmf_cfg80211_connect() local
1745 if (ifp->vif == cfg->p2p.bss_idx[P2PAPI_BSSCFG_PRIMARY].vif) { brcmf_cfg80211_connect()
1777 cfg->channel = brcmf_cfg80211_connect()
1779 chanspec = channel_to_chanspec(&cfg->d11inf, chan); brcmf_cfg80211_connect()
1781 cfg->channel, chan->center_freq, chanspec); brcmf_cfg80211_connect()
1783 cfg->channel = 0; brcmf_cfg80211_connect()
1834 if (cfg->channel) brcmf_cfg80211_connect()
1854 if (cfg->channel) { brcmf_cfg80211_connect()
1899 if (cfg->channel) { brcmf_cfg80211_connect()
1949 struct brcmf_cfg80211_info *cfg = wiphy_to_cfg(wiphy); brcmf_cfg80211_set_tx_power() local
1950 struct net_device *ndev = cfg_to_ndev(cfg); brcmf_cfg80211_set_tx_power()
1987 cfg->conf->tx_power = dbm; brcmf_cfg80211_set_tx_power()
1998 struct brcmf_cfg80211_info *cfg = wiphy_to_cfg(wiphy); brcmf_cfg80211_get_tx_power() local
1999 struct brcmf_if *ifp = netdev_priv(cfg_to_ndev(cfg)); brcmf_cfg80211_get_tx_power()
2473 struct brcmf_cfg80211_info *cfg = wiphy_to_cfg(wiphy); brcmf_cfg80211_set_power_mgmt() local
2482 * preference in cfg struct to apply this to brcmf_cfg80211_set_power_mgmt()
2485 cfg->pwr_save = enabled; brcmf_cfg80211_set_power_mgmt()
2512 static s32 brcmf_inform_single_bss(struct brcmf_cfg80211_info *cfg, brcmf_inform_single_bss() argument
2515 struct wiphy *wiphy = cfg_to_wiphy(cfg); brcmf_inform_single_bss()
2535 cfg->d11inf.decchspec(&ch); brcmf_inform_single_bss()
2585 static s32 brcmf_inform_bss(struct brcmf_cfg80211_info *cfg) brcmf_inform_bss() argument
2592 bss_list = (struct brcmf_scan_results *)cfg->escan_info.escan_buf; brcmf_inform_bss()
2602 err = brcmf_inform_single_bss(cfg, bi); brcmf_inform_bss()
2609 static s32 wl_inform_ibss(struct brcmf_cfg80211_info *cfg, wl_inform_ibss() argument
2612 struct wiphy *wiphy = cfg_to_wiphy(cfg); wl_inform_ibss()
2647 cfg->d11inf.decchspec(&ch); wl_inform_ibss()
2690 static s32 brcmf_update_bss_info(struct brcmf_cfg80211_info *cfg, brcmf_update_bss_info() argument
2709 *(__le32 *)cfg->extra_buf = cpu_to_le32(WL_EXTRA_BUF_MAX); brcmf_update_bss_info()
2711 cfg->extra_buf, WL_EXTRA_BUF_MAX); brcmf_update_bss_info()
2717 bi = (struct brcmf_bss_info_le *)(cfg->extra_buf + 4); brcmf_update_bss_info()
2718 err = brcmf_inform_single_bss(cfg, bi); brcmf_update_bss_info()
2749 void brcmf_abort_scanning(struct brcmf_cfg80211_info *cfg) brcmf_abort_scanning() argument
2751 struct escan_info *escan = &cfg->escan_info; brcmf_abort_scanning()
2753 set_bit(BRCMF_SCAN_STATUS_ABORT, &cfg->scan_status); brcmf_abort_scanning()
2754 if (cfg->scan_request) { brcmf_abort_scanning()
2756 brcmf_notify_escan_complete(cfg, escan->ifp, true, true); brcmf_abort_scanning()
2758 clear_bit(BRCMF_SCAN_STATUS_BUSY, &cfg->scan_status); brcmf_abort_scanning()
2759 clear_bit(BRCMF_SCAN_STATUS_ABORT, &cfg->scan_status); brcmf_abort_scanning()
2764 struct brcmf_cfg80211_info *cfg = brcmf_cfg80211_escan_timeout_worker() local
2768 brcmf_inform_bss(cfg); brcmf_cfg80211_escan_timeout_worker()
2769 brcmf_notify_escan_complete(cfg, cfg->escan_info.ifp, true, true); brcmf_cfg80211_escan_timeout_worker()
2774 struct brcmf_cfg80211_info *cfg = brcmf_escan_timeout() local
2777 if (cfg->scan_request) { brcmf_escan_timeout()
2779 schedule_work(&cfg->escan_timeout_work); brcmf_escan_timeout()
2784 brcmf_compare_update_same_bss(struct brcmf_cfg80211_info *cfg, brcmf_compare_update_same_bss() argument
2791 cfg->d11inf.decchspec(&ch_bss); brcmf_compare_update_same_bss()
2793 cfg->d11inf.decchspec(&ch_bss_info_le); brcmf_compare_update_same_bss()
2826 struct brcmf_cfg80211_info *cfg = ifp->drvr->config; brcmf_cfg80211_escan_handler() local
2838 if (!test_bit(BRCMF_SCAN_STATUS_BUSY, &cfg->scan_status)) { brcmf_cfg80211_escan_handler()
2857 if (brcmf_p2p_scan_finding_common_channel(cfg, bss_info_le)) brcmf_cfg80211_escan_handler()
2860 if (!cfg->scan_request) { brcmf_cfg80211_escan_handler()
2873 if (!(cfg_to_wiphy(cfg)->interface_modes & brcmf_cfg80211_escan_handler()
2883 cfg->escan_info.escan_buf; brcmf_cfg80211_escan_handler()
2893 if (brcmf_compare_update_same_bss(cfg, bss, brcmf_cfg80211_escan_handler()
2897 memcpy(&(cfg->escan_info.escan_buf[list->buflen]), brcmf_cfg80211_escan_handler()
2903 cfg->escan_info.escan_state = WL_ESCAN_STATE_IDLE; brcmf_cfg80211_escan_handler()
2904 if (brcmf_p2p_scan_finding_common_channel(cfg, NULL)) brcmf_cfg80211_escan_handler()
2906 if (cfg->scan_request) { brcmf_cfg80211_escan_handler()
2907 brcmf_inform_bss(cfg); brcmf_cfg80211_escan_handler()
2909 brcmf_notify_escan_complete(cfg, ifp, aborted, false); brcmf_cfg80211_escan_handler()
2918 static void brcmf_init_escan(struct brcmf_cfg80211_info *cfg) brcmf_init_escan() argument
2920 brcmf_fweh_register(cfg->pub, BRCMF_E_ESCAN_RESULT, brcmf_init_escan()
2922 cfg->escan_info.escan_state = WL_ESCAN_STATE_IDLE; brcmf_init_escan()
2924 init_timer(&cfg->escan_timeout); brcmf_init_escan()
2925 cfg->escan_timeout.data = (unsigned long) cfg; brcmf_init_escan()
2926 cfg->escan_timeout.function = brcmf_escan_timeout; brcmf_init_escan()
2927 INIT_WORK(&cfg->escan_timeout_work, brcmf_init_escan()
2981 struct brcmf_cfg80211_info *cfg = wiphy_to_cfg(wiphy); brcmf_cfg80211_resume() local
2982 struct net_device *ndev = cfg_to_ndev(cfg); brcmf_cfg80211_resume()
2987 if (cfg->wowl_enabled) { brcmf_cfg80211_resume()
2990 cfg->pre_wowl_pmmode); brcmf_cfg80211_resume()
2993 cfg->wowl_enabled = false; brcmf_cfg80211_resume()
2998 static void brcmf_configure_wowl(struct brcmf_cfg80211_info *cfg, brcmf_configure_wowl() argument
3008 brcmf_fil_cmd_int_get(ifp, BRCMF_C_GET_PM, &cfg->pre_wowl_pmmode); brcmf_configure_wowl()
3028 brcmf_bus_wowl_config(cfg->pub->bus_if, true); brcmf_configure_wowl()
3029 cfg->wowl_enabled = true; brcmf_configure_wowl()
3035 struct brcmf_cfg80211_info *cfg = wiphy_to_cfg(wiphy); brcmf_cfg80211_suspend() local
3036 struct net_device *ndev = cfg_to_ndev(cfg); brcmf_cfg80211_suspend()
3049 if (test_bit(BRCMF_SCAN_STATUS_BUSY, &cfg->scan_status)) brcmf_cfg80211_suspend()
3050 brcmf_abort_scanning(cfg); brcmf_cfg80211_suspend()
3053 brcmf_bus_wowl_config(cfg->pub->bus_if, false); brcmf_cfg80211_suspend()
3054 list_for_each_entry(vif, &cfg->vif_list, list) { brcmf_cfg80211_suspend()
3073 brcmf_configure_wowl(cfg, ifp, wowl); brcmf_cfg80211_suspend()
3079 cfg->scan_status = 0; brcmf_cfg80211_suspend()
3112 struct brcmf_cfg80211_info *cfg = wiphy_to_cfg(wiphy); brcmf_cfg80211_set_pmksa() local
3114 struct pmkid_list *pmkids = &cfg->pmk_list->pmkids; brcmf_cfg80211_set_pmksa()
3141 err = brcmf_update_pmklist(ndev, cfg->pmk_list, err); brcmf_cfg80211_set_pmksa()
3151 struct brcmf_cfg80211_info *cfg = wiphy_to_cfg(wiphy); brcmf_cfg80211_del_pmksa() local
3169 pmkid_len = le32_to_cpu(cfg->pmk_list->pmkids.npmkid); brcmf_cfg80211_del_pmksa()
3172 (pmksa->bssid, &cfg->pmk_list->pmkids.pmkid[i].BSSID, brcmf_cfg80211_del_pmksa()
3178 memset(&cfg->pmk_list->pmkids.pmkid[i], 0, brcmf_cfg80211_del_pmksa()
3181 memcpy(&cfg->pmk_list->pmkids.pmkid[i].BSSID, brcmf_cfg80211_del_pmksa()
3182 &cfg->pmk_list->pmkids.pmkid[i + 1].BSSID, brcmf_cfg80211_del_pmksa()
3184 memcpy(&cfg->pmk_list->pmkids.pmkid[i].PMKID, brcmf_cfg80211_del_pmksa()
3185 &cfg->pmk_list->pmkids.pmkid[i + 1].PMKID, brcmf_cfg80211_del_pmksa()
3188 cfg->pmk_list->pmkids.npmkid = cpu_to_le32(pmkid_len - 1); brcmf_cfg80211_del_pmksa()
3192 err = brcmf_update_pmklist(ndev, cfg->pmk_list, err); brcmf_cfg80211_del_pmksa()
3202 struct brcmf_cfg80211_info *cfg = wiphy_to_cfg(wiphy); brcmf_cfg80211_flush_pmksa() local
3210 memset(cfg->pmk_list, 0, sizeof(*cfg->pmk_list)); brcmf_cfg80211_flush_pmksa()
3211 err = brcmf_update_pmklist(ndev, cfg->pmk_list, err); brcmf_cfg80211_flush_pmksa()
3230 struct brcmf_cfg80211_info *cfg = ifp->drvr->config; brcmf_notify_sched_scan_results() local
3235 struct wiphy *wiphy = cfg_to_wiphy(cfg); brcmf_notify_sched_scan_results()
3308 if (test_bit(BRCMF_SCAN_STATUS_BUSY, &cfg->scan_status)) { brcmf_notify_sched_scan_results()
3310 brcmf_abort_scanning(cfg); brcmf_notify_sched_scan_results()
3313 set_bit(BRCMF_SCAN_STATUS_BUSY, &cfg->scan_status); brcmf_notify_sched_scan_results()
3314 cfg->escan_info.run = brcmf_run_escan; brcmf_notify_sched_scan_results()
3315 err = brcmf_do_escan(cfg, wiphy, ifp, request); brcmf_notify_sched_scan_results()
3317 clear_bit(BRCMF_SCAN_STATUS_BUSY, &cfg->scan_status); brcmf_notify_sched_scan_results()
3320 cfg->sched_escan = true; brcmf_notify_sched_scan_results()
3321 cfg->scan_request = request; brcmf_notify_sched_scan_results()
3382 struct brcmf_cfg80211_info *cfg = wiphy_priv(wiphy); brcmf_cfg80211_sched_scan_start() local
3389 if (test_bit(BRCMF_SCAN_STATUS_BUSY, &cfg->scan_status)) { brcmf_cfg80211_sched_scan_start()
3390 brcmf_err("Scanning already: status (%lu)\n", cfg->scan_status); brcmf_cfg80211_sched_scan_start()
3393 if (test_bit(BRCMF_SCAN_STATUS_SUPPRESS, &cfg->scan_status)) { brcmf_cfg80211_sched_scan_start()
3395 cfg->scan_status); brcmf_cfg80211_sched_scan_start()
3472 struct brcmf_cfg80211_info *cfg = wiphy_to_cfg(wiphy); brcmf_cfg80211_sched_scan_stop() local
3476 if (cfg->sched_escan) brcmf_cfg80211_sched_scan_stop()
3477 brcmf_notify_escan_complete(cfg, netdev_priv(ndev), true, true); brcmf_cfg80211_sched_scan_stop()
3978 struct brcmf_cfg80211_info *cfg = wiphy_to_cfg(wiphy); brcmf_cfg80211_start_ap() local
4066 chanspec = chandef_to_chanspec(&cfg->d11inf, brcmf_cfg80211_start_ap()
4257 struct brcmf_cfg80211_info *cfg = wiphy_to_cfg(wiphy); brcmf_cfg80211_del_station() local
4267 if (ifp->vif == cfg->p2p.bss_idx[P2PAPI_BSSCFG_DEVICE].vif) brcmf_cfg80211_del_station()
4268 ifp = cfg->p2p.bss_idx[P2PAPI_BSSCFG_PRIMARY].vif->ifp; brcmf_cfg80211_del_station()
4335 struct brcmf_cfg80211_info *cfg = wiphy_to_cfg(wiphy); brcmf_cfg80211_mgmt_tx() local
4369 /* response to be sent, the vif is taken from cfg. */ brcmf_cfg80211_mgmt_tx()
4378 if (vif == cfg->p2p.bss_idx[P2PAPI_BSSCFG_PRIMARY].vif) brcmf_cfg80211_mgmt_tx()
4379 vif = cfg->p2p.bss_idx[P2PAPI_BSSCFG_DEVICE].vif; brcmf_cfg80211_mgmt_tx()
4418 ack = brcmf_p2p_send_action_frame(cfg, cfg_to_ndev(cfg), brcmf_cfg80211_mgmt_tx()
4439 struct brcmf_cfg80211_info *cfg = wiphy_to_cfg(wiphy); brcmf_cfg80211_cancel_remain_on_channel() local
4445 vif = cfg->p2p.bss_idx[P2PAPI_BSSCFG_DEVICE].vif; brcmf_cfg80211_cancel_remain_on_channel()
4461 struct brcmf_cfg80211_info *cfg = wiphy_to_cfg(wiphy); brcmf_cfg80211_crit_proto_start() local
4471 set_bit(BRCMF_SCAN_STATUS_SUPPRESS, &cfg->scan_status); brcmf_cfg80211_crit_proto_start()
4472 brcmf_abort_scanning(cfg); brcmf_cfg80211_crit_proto_start()
4480 struct brcmf_cfg80211_info *cfg = wiphy_to_cfg(wiphy); brcmf_cfg80211_crit_proto_stop() local
4486 clear_bit(BRCMF_SCAN_STATUS_SUPPRESS, &cfg->scan_status); brcmf_cfg80211_crit_proto_stop()
4599 struct brcmf_cfg80211_vif *brcmf_alloc_vif(struct brcmf_cfg80211_info *cfg, brcmf_alloc_vif() argument
4613 vif->wdev.wiphy = cfg->wiphy; brcmf_alloc_vif()
4623 list_for_each_entry(vif_walk, &cfg->vif_list, list) { brcmf_alloc_vif()
4632 list_add_tail(&vif->list, &cfg->vif_list); brcmf_alloc_vif()
4681 static bool brcmf_is_nonetwork(struct brcmf_cfg80211_info *cfg, brcmf_is_nonetwork() argument
4701 static void brcmf_clear_assoc_ies(struct brcmf_cfg80211_info *cfg) brcmf_clear_assoc_ies() argument
4703 struct brcmf_cfg80211_connect_info *conn_info = cfg_to_conn(cfg); brcmf_clear_assoc_ies()
4713 static s32 brcmf_get_assoc_ies(struct brcmf_cfg80211_info *cfg, brcmf_get_assoc_ies() argument
4717 struct brcmf_cfg80211_connect_info *conn_info = cfg_to_conn(cfg); brcmf_get_assoc_ies()
4722 brcmf_clear_assoc_ies(cfg); brcmf_get_assoc_ies()
4725 cfg->extra_buf, WL_ASSOC_INFO_MAX); brcmf_get_assoc_ies()
4731 (struct brcmf_cfg80211_assoc_ielen_le *)cfg->extra_buf; brcmf_get_assoc_ies()
4736 cfg->extra_buf, brcmf_get_assoc_ies()
4744 kmemdup(cfg->extra_buf, conn_info->req_ie_len, brcmf_get_assoc_ies()
4752 cfg->extra_buf, brcmf_get_assoc_ies()
4760 kmemdup(cfg->extra_buf, conn_info->resp_ie_len, brcmf_get_assoc_ies()
4773 brcmf_bss_roaming_done(struct brcmf_cfg80211_info *cfg, brcmf_bss_roaming_done() argument
4779 struct brcmf_cfg80211_connect_info *conn_info = cfg_to_conn(cfg); brcmf_bss_roaming_done()
4780 struct wiphy *wiphy = cfg_to_wiphy(cfg); brcmf_bss_roaming_done()
4791 brcmf_get_assoc_ies(cfg, ifp); brcmf_bss_roaming_done()
4793 brcmf_update_bss_info(cfg, ifp); brcmf_bss_roaming_done()
4811 cfg->d11inf.decchspec(&ch); brcmf_bss_roaming_done()
4834 brcmf_bss_connect_done(struct brcmf_cfg80211_info *cfg, brcmf_bss_connect_done() argument
4840 struct brcmf_cfg80211_connect_info *conn_info = cfg_to_conn(cfg); brcmf_bss_connect_done()
4847 brcmf_get_assoc_ies(cfg, ifp); brcmf_bss_connect_done()
4849 brcmf_update_bss_info(cfg, ifp); brcmf_bss_connect_done()
4870 brcmf_notify_connect_status_ap(struct brcmf_cfg80211_info *cfg, brcmf_notify_connect_status_ap() argument
4882 ndev != cfg_to_ndev(cfg)) { brcmf_notify_connect_status_ap()
4884 complete(&cfg->vif_disabled); brcmf_notify_connect_status_ap()
4914 struct brcmf_cfg80211_info *cfg = ifp->drvr->config; brcmf_notify_connect_status() local
4928 err = brcmf_notify_connect_status_ap(cfg, ndev, e, data); brcmf_notify_connect_status()
4932 chan = ieee80211_get_channel(cfg->wiphy, cfg->channel); brcmf_notify_connect_status()
4934 wl_inform_ibss(cfg, ndev, e->addr); brcmf_notify_connect_status()
4941 brcmf_bss_connect_done(cfg, ndev, e, true); brcmf_notify_connect_status()
4945 brcmf_bss_connect_done(cfg, ndev, e, false); brcmf_notify_connect_status()
4949 if (ndev != cfg_to_ndev(cfg)) brcmf_notify_connect_status()
4950 complete(&cfg->vif_disabled); brcmf_notify_connect_status()
4951 } else if (brcmf_is_nonetwork(cfg, e)) { brcmf_notify_connect_status()
4956 brcmf_bss_connect_done(cfg, ndev, e, false); brcmf_notify_connect_status()
4966 struct brcmf_cfg80211_info *cfg = ifp->drvr->config; brcmf_notify_roaming_status() local
4972 brcmf_bss_roaming_done(cfg, ifp->ndev, e); brcmf_notify_roaming_status()
4974 brcmf_bss_connect_done(cfg, ifp->ndev, e, true); brcmf_notify_roaming_status()
5001 struct brcmf_cfg80211_info *cfg = ifp->drvr->config; brcmf_notify_vif_event() local
5003 struct brcmf_cfg80211_vif_event *event = &cfg->vif_event; brcmf_notify_vif_event()
5017 if (!cfg->vif_event.vif) { brcmf_notify_vif_event()
5027 SET_NETDEV_DEV(ifp->ndev, wiphy_dev(cfg->wiphy)); brcmf_notify_vif_event()
5036 if (brcmf_cfg80211_vif_event_armed(cfg)) brcmf_notify_vif_event()
5061 static void brcmf_register_event_handlers(struct brcmf_cfg80211_info *cfg) brcmf_register_event_handlers() argument
5063 brcmf_fweh_register(cfg->pub, BRCMF_E_LINK, brcmf_register_event_handlers()
5065 brcmf_fweh_register(cfg->pub, BRCMF_E_DEAUTH_IND, brcmf_register_event_handlers()
5067 brcmf_fweh_register(cfg->pub, BRCMF_E_DEAUTH, brcmf_register_event_handlers()
5069 brcmf_fweh_register(cfg->pub, BRCMF_E_DISASSOC_IND, brcmf_register_event_handlers()
5071 brcmf_fweh_register(cfg->pub, BRCMF_E_ASSOC_IND, brcmf_register_event_handlers()
5073 brcmf_fweh_register(cfg->pub, BRCMF_E_REASSOC_IND, brcmf_register_event_handlers()
5075 brcmf_fweh_register(cfg->pub, BRCMF_E_ROAM, brcmf_register_event_handlers()
5077 brcmf_fweh_register(cfg->pub, BRCMF_E_MIC_ERROR, brcmf_register_event_handlers()
5079 brcmf_fweh_register(cfg->pub, BRCMF_E_SET_SSID, brcmf_register_event_handlers()
5081 brcmf_fweh_register(cfg->pub, BRCMF_E_PFN_NET_FOUND, brcmf_register_event_handlers()
5083 brcmf_fweh_register(cfg->pub, BRCMF_E_IF, brcmf_register_event_handlers()
5085 brcmf_fweh_register(cfg->pub, BRCMF_E_P2P_PROBEREQ_MSG, brcmf_register_event_handlers()
5087 brcmf_fweh_register(cfg->pub, BRCMF_E_P2P_DISC_LISTEN_COMPLETE, brcmf_register_event_handlers()
5089 brcmf_fweh_register(cfg->pub, BRCMF_E_ACTION_FRAME_RX, brcmf_register_event_handlers()
5091 brcmf_fweh_register(cfg->pub, BRCMF_E_ACTION_FRAME_COMPLETE, brcmf_register_event_handlers()
5093 brcmf_fweh_register(cfg->pub, BRCMF_E_ACTION_FRAME_OFF_CHAN_COMPLETE, brcmf_register_event_handlers()
5097 static void brcmf_deinit_priv_mem(struct brcmf_cfg80211_info *cfg) brcmf_deinit_priv_mem() argument
5099 kfree(cfg->conf); brcmf_deinit_priv_mem()
5100 cfg->conf = NULL; brcmf_deinit_priv_mem()
5101 kfree(cfg->escan_ioctl_buf); brcmf_deinit_priv_mem()
5102 cfg->escan_ioctl_buf = NULL; brcmf_deinit_priv_mem()
5103 kfree(cfg->extra_buf); brcmf_deinit_priv_mem()
5104 cfg->extra_buf = NULL; brcmf_deinit_priv_mem()
5105 kfree(cfg->pmk_list); brcmf_deinit_priv_mem()
5106 cfg->pmk_list = NULL; brcmf_deinit_priv_mem()
5109 static s32 brcmf_init_priv_mem(struct brcmf_cfg80211_info *cfg) brcmf_init_priv_mem() argument
5111 cfg->conf = kzalloc(sizeof(*cfg->conf), GFP_KERNEL); brcmf_init_priv_mem()
5112 if (!cfg->conf) brcmf_init_priv_mem()
5114 cfg->escan_ioctl_buf = kzalloc(BRCMF_DCMD_MEDLEN, GFP_KERNEL); brcmf_init_priv_mem()
5115 if (!cfg->escan_ioctl_buf) brcmf_init_priv_mem()
5117 cfg->extra_buf = kzalloc(WL_EXTRA_BUF_MAX, GFP_KERNEL); brcmf_init_priv_mem()
5118 if (!cfg->extra_buf) brcmf_init_priv_mem()
5120 cfg->pmk_list = kzalloc(sizeof(*cfg->pmk_list), GFP_KERNEL); brcmf_init_priv_mem()
5121 if (!cfg->pmk_list) brcmf_init_priv_mem()
5127 brcmf_deinit_priv_mem(cfg); brcmf_init_priv_mem()
5132 static s32 wl_init_priv(struct brcmf_cfg80211_info *cfg) wl_init_priv() argument
5136 cfg->scan_request = NULL; wl_init_priv()
5137 cfg->pwr_save = true; wl_init_priv()
5138 cfg->active_scan = true; /* we do active scan per default */ wl_init_priv()
5139 cfg->dongle_up = false; /* dongle is not up yet */ wl_init_priv()
5140 err = brcmf_init_priv_mem(cfg); wl_init_priv()
5143 brcmf_register_event_handlers(cfg); wl_init_priv()
5144 mutex_init(&cfg->usr_sync); wl_init_priv()
5145 brcmf_init_escan(cfg); wl_init_priv()
5146 brcmf_init_conf(cfg->conf); wl_init_priv()
5147 init_completion(&cfg->vif_disabled); wl_init_priv()
5151 static void wl_deinit_priv(struct brcmf_cfg80211_info *cfg) wl_deinit_priv() argument
5153 cfg->dongle_up = false; /* dongle down */ wl_deinit_priv()
5154 brcmf_abort_scanning(cfg); wl_deinit_priv()
5155 brcmf_deinit_priv_mem(cfg); wl_deinit_priv()
5260 static void brcmf_count_20mhz_channels(struct brcmf_cfg80211_info *cfg, brcmf_count_20mhz_channels() argument
5270 cfg->d11inf.decchspec(&ch); brcmf_count_20mhz_channels()
5311 static int brcmf_construct_chaninfo(struct brcmf_cfg80211_info *cfg, brcmf_construct_chaninfo() argument
5314 struct brcmf_if *ifp = netdev_priv(cfg_to_ndev(cfg)); brcmf_construct_chaninfo()
5342 brcmf_count_20mhz_channels(cfg, list, chcnt); brcmf_construct_chaninfo()
5343 wiphy = cfg_to_wiphy(cfg); brcmf_construct_chaninfo()
5382 cfg->d11inf.decchspec(&ch); brcmf_construct_chaninfo()
5426 cfg->d11inf.encchspec(&ch); brcmf_construct_chaninfo()
5455 static int brcmf_enable_bw40_2g(struct brcmf_cfg80211_info *cfg) brcmf_enable_bw40_2g() argument
5457 struct brcmf_if *ifp = netdev_priv(cfg_to_ndev(cfg)); brcmf_enable_bw40_2g()
5495 cfg->d11inf.encchspec(&ch); brcmf_enable_bw40_2g()
5508 band = cfg_to_wiphy(cfg)->bands[IEEE80211_BAND_2GHZ]; brcmf_enable_bw40_2g()
5513 cfg->d11inf.decchspec(&ch); brcmf_enable_bw40_2g()
5624 struct brcmf_cfg80211_info *cfg = wiphy_priv(wiphy); brcmf_setup_wiphybands() local
5625 struct brcmf_if *ifp = netdev_priv(cfg_to_ndev(cfg)); brcmf_setup_wiphybands()
5656 err = brcmf_construct_chaninfo(cfg, bw_cap); brcmf_setup_wiphybands()
5662 wiphy = cfg_to_wiphy(cfg); brcmf_setup_wiphybands()
5827 static s32 brcmf_config_dongle(struct brcmf_cfg80211_info *cfg) brcmf_config_dongle() argument
5835 if (cfg->dongle_up) brcmf_config_dongle()
5838 ndev = cfg_to_ndev(cfg); brcmf_config_dongle()
5848 power_mode = cfg->pwr_save ? PM_FAST : PM_OFF; brcmf_config_dongle()
5865 cfg->dongle_up = true; brcmf_config_dongle()
5881 struct brcmf_cfg80211_info *cfg = ifp->drvr->config; __brcmf_cfg80211_down() local
5897 brcmf_abort_scanning(cfg); __brcmf_cfg80211_down()
5906 struct brcmf_cfg80211_info *cfg = ifp->drvr->config; brcmf_cfg80211_up() local
5909 mutex_lock(&cfg->usr_sync); brcmf_cfg80211_up()
5911 mutex_unlock(&cfg->usr_sync); brcmf_cfg80211_up()
5919 struct brcmf_cfg80211_info *cfg = ifp->drvr->config; brcmf_cfg80211_down() local
5922 mutex_lock(&cfg->usr_sync); brcmf_cfg80211_down()
5924 mutex_unlock(&cfg->usr_sync); brcmf_cfg80211_down()
5936 bool brcmf_get_vif_state_any(struct brcmf_cfg80211_info *cfg, brcmf_get_vif_state_any() argument
5941 list_for_each_entry(vif, &cfg->vif_list, list) { brcmf_get_vif_state_any()
5959 void brcmf_cfg80211_arm_vif_event(struct brcmf_cfg80211_info *cfg, brcmf_cfg80211_arm_vif_event() argument
5962 struct brcmf_cfg80211_vif_event *event = &cfg->vif_event; brcmf_cfg80211_arm_vif_event()
5970 bool brcmf_cfg80211_vif_event_armed(struct brcmf_cfg80211_info *cfg) brcmf_cfg80211_vif_event_armed() argument
5972 struct brcmf_cfg80211_vif_event *event = &cfg->vif_event; brcmf_cfg80211_vif_event_armed()
5981 int brcmf_cfg80211_wait_vif_event_timeout(struct brcmf_cfg80211_info *cfg, brcmf_cfg80211_wait_vif_event_timeout() argument
5984 struct brcmf_cfg80211_vif_event *event = &cfg->vif_event; brcmf_cfg80211_wait_vif_event_timeout()
5993 struct brcmf_cfg80211_info *cfg = wiphy_priv(wiphy); brcmf_cfg80211_reg_notifier() local
5994 struct brcmf_if *ifp = netdev_priv(cfg_to_ndev(cfg)); brcmf_cfg80211_reg_notifier()
6031 struct brcmf_cfg80211_info *cfg; brcmf_cfg80211_attach() local
6052 cfg = wiphy_priv(wiphy); brcmf_cfg80211_attach()
6053 cfg->wiphy = wiphy; brcmf_cfg80211_attach()
6054 cfg->pub = drvr; brcmf_cfg80211_attach()
6055 init_vif_event(&cfg->vif_event); brcmf_cfg80211_attach()
6056 INIT_LIST_HEAD(&cfg->vif_list); brcmf_cfg80211_attach()
6058 vif = brcmf_alloc_vif(cfg, NL80211_IFTYPE_STATION, false); brcmf_cfg80211_attach()
6065 SET_NETDEV_DEV(ndev, wiphy_dev(cfg->wiphy)); brcmf_cfg80211_attach()
6067 err = wl_init_priv(cfg); brcmf_cfg80211_attach()
6081 cfg->d11inf.io_type = (u8)io_type; brcmf_cfg80211_attach()
6082 brcmu_d11_attach(&cfg->d11inf); brcmf_cfg80211_attach()
6111 err = brcmf_enable_bw40_2g(cfg); brcmf_cfg80211_attach()
6119 err = brcmf_p2p_attach(cfg); brcmf_cfg80211_attach()
6124 err = brcmf_btcoex_attach(cfg); brcmf_cfg80211_attach()
6127 brcmf_p2p_detach(&cfg->p2p); brcmf_cfg80211_attach()
6136 brcmf_fweh_register(cfg->pub, BRCMF_E_TDLS_PEER_EVENT, brcmf_cfg80211_attach()
6140 return cfg; brcmf_cfg80211_attach()
6143 wiphy_unregister(cfg->wiphy); brcmf_cfg80211_attach()
6145 wl_deinit_priv(cfg); brcmf_cfg80211_attach()
6152 void brcmf_cfg80211_detach(struct brcmf_cfg80211_info *cfg) brcmf_cfg80211_detach() argument
6154 if (!cfg) brcmf_cfg80211_detach()
6157 WARN_ON(!list_empty(&cfg->vif_list)); brcmf_cfg80211_detach()
6158 wiphy_unregister(cfg->wiphy); brcmf_cfg80211_detach()
6159 brcmf_btcoex_detach(cfg); brcmf_cfg80211_detach()
6160 brcmf_p2p_detach(&cfg->p2p); brcmf_cfg80211_detach()
6161 wl_deinit_priv(cfg); brcmf_cfg80211_detach()
6162 brcmf_free_wiphy(cfg->wiphy); brcmf_cfg80211_detach()
H A Dp2p.c695 if (p2p->cfg->active_scan) brcmf_p2p_escan()
714 else if (brcmf_get_vif_state_any(p2p->cfg, BRCMF_VIF_STATUS_CONNECTED)) brcmf_p2p_escan()
749 set_bit(BRCMF_SCAN_STATUS_BUSY, &p2p->cfg->scan_status); brcmf_p2p_escan()
758 * @cfg: driver private data for cfg80211 interface.
766 static s32 brcmf_p2p_run_escan(struct brcmf_cfg80211_info *cfg, brcmf_p2p_run_escan() argument
771 struct brcmf_p2p_info *p2p = &cfg->p2p; brcmf_p2p_run_escan()
822 chanspecs[i] = channel_to_chanspec(&p2p->cfg->d11inf, brcmf_p2p_run_escan()
889 struct brcmf_cfg80211_info *cfg = wiphy_to_cfg(wiphy); brcmf_p2p_scan_prep() local
890 struct brcmf_p2p_info *p2p = &cfg->p2p; brcmf_p2p_scan_prep()
912 cfg->escan_info.run = brcmf_p2p_run_escan; brcmf_p2p_scan_prep()
950 p2p->cfg->d11inf.encchspec(&ch); brcmf_p2p_discover_listen()
974 struct brcmf_cfg80211_info *cfg = wiphy_to_cfg(wiphy); brcmf_p2p_remain_on_channel() local
975 struct brcmf_p2p_info *p2p = &cfg->p2p; brcmf_p2p_remain_on_channel()
1011 struct brcmf_cfg80211_info *cfg = ifp->drvr->config; brcmf_p2p_notify_listen_complete() local
1012 struct brcmf_p2p_info *p2p = &cfg->p2p; brcmf_p2p_notify_listen_complete()
1082 p2p->cfg->d11inf.encchspec(&ch); brcmf_p2p_act_frm_search()
1088 p2p->cfg->d11inf.encchspec(&ch); brcmf_p2p_act_frm_search()
1091 p2p->cfg->d11inf.encchspec(&ch); brcmf_p2p_act_frm_search()
1094 p2p->cfg->d11inf.encchspec(&ch); brcmf_p2p_act_frm_search()
1215 * @cfg: common configuration struct.
1219 bool brcmf_p2p_scan_finding_common_channel(struct brcmf_cfg80211_info *cfg, brcmf_p2p_scan_finding_common_channel() argument
1223 struct brcmf_p2p_info *p2p = &cfg->p2p; brcmf_p2p_scan_finding_common_channel()
1253 cfg->d11inf.decchspec(&ch); brcmf_p2p_scan_finding_common_channel()
1267 * @cfg: common configuration struct.
1271 brcmf_p2p_stop_wait_next_action_frame(struct brcmf_cfg80211_info *cfg) brcmf_p2p_stop_wait_next_action_frame() argument
1273 struct brcmf_p2p_info *p2p = &cfg->p2p; brcmf_p2p_stop_wait_next_action_frame()
1274 struct brcmf_if *ifp = cfg->escan_info.ifp; brcmf_p2p_stop_wait_next_action_frame()
1284 brcmf_notify_escan_complete(cfg, ifp, true, true); brcmf_p2p_stop_wait_next_action_frame()
1289 brcmf_notify_escan_complete(cfg, ifp, true, true); brcmf_p2p_stop_wait_next_action_frame()
1304 struct brcmf_cfg80211_info *cfg = p2p->cfg; brcmf_p2p_gon_req_collision() local
1331 brcmf_p2p_stop_wait_next_action_frame(cfg); brcmf_p2p_gon_req_collision()
1354 struct brcmf_cfg80211_info *cfg = ifp->drvr->config; brcmf_p2p_notify_action_frame_rx() local
1355 struct brcmf_p2p_info *p2p = &cfg->p2p; brcmf_p2p_notify_action_frame_rx()
1370 cfg->d11inf.decchspec(&ch); brcmf_p2p_notify_action_frame_rx()
1414 brcmf_p2p_stop_wait_next_action_frame(cfg); brcmf_p2p_notify_action_frame_rx()
1456 struct brcmf_cfg80211_info *cfg = ifp->drvr->config; brcmf_p2p_notify_action_tx_complete() local
1457 struct brcmf_p2p_info *p2p = &cfg->p2p; brcmf_p2p_notify_action_tx_complete()
1476 brcmf_p2p_stop_wait_next_action_frame(cfg); brcmf_p2p_notify_action_tx_complete()
1543 * @cfg: driver private data for cfg80211 interface.
1549 static s32 brcmf_p2p_pub_af_tx(struct brcmf_cfg80211_info *cfg, brcmf_p2p_pub_af_tx() argument
1553 struct brcmf_p2p_info *p2p = &cfg->p2p; brcmf_p2p_pub_af_tx()
1642 * @cfg: driver private data for cfg80211 interface.
1646 bool brcmf_p2p_send_action_frame(struct brcmf_cfg80211_info *cfg, brcmf_p2p_send_action_frame() argument
1650 struct brcmf_p2p_info *p2p = &cfg->p2p; brcmf_p2p_send_action_frame()
1687 if (brcmf_p2p_pub_af_tx(cfg, af_params, &config_af_params)) { brcmf_p2p_send_action_frame()
1733 if (test_bit(BRCMF_SCAN_STATUS_BUSY, &cfg->scan_status)) brcmf_p2p_send_action_frame()
1734 brcmf_abort_scanning(cfg); brcmf_p2p_send_action_frame()
1768 brcmf_notify_escan_complete(cfg, ifp, true, true); brcmf_p2p_send_action_frame()
1851 struct brcmf_cfg80211_info *cfg = ifp->drvr->config; brcmf_p2p_notify_rx_mgmt_p2p_probereq() local
1852 struct brcmf_p2p_info *p2p = &cfg->p2p; brcmf_p2p_notify_rx_mgmt_p2p_probereq()
1867 cfg->d11inf.decchspec(&ch); brcmf_p2p_notify_rx_mgmt_p2p_probereq()
1913 * @cfg: driver private data for cfg80211 interface.
1915 s32 brcmf_p2p_attach(struct brcmf_cfg80211_info *cfg) brcmf_p2p_attach() argument
1925 p2p = &cfg->p2p; brcmf_p2p_attach()
1926 p2p->cfg = cfg; brcmf_p2p_attach()
1928 drvr = cfg->pub; brcmf_p2p_attach()
1936 p2p_vif = brcmf_alloc_vif(cfg, NL80211_IFTYPE_P2P_DEVICE, brcmf_p2p_attach()
1948 SET_NETDEV_DEV(p2p_ifp->ndev, wiphy_dev(cfg->wiphy)); brcmf_p2p_attach()
2044 p2p->cfg->d11inf.encchspec(&ch); brcmf_p2p_get_current_chanspec()
2054 int brcmf_p2p_ifchange(struct brcmf_cfg80211_info *cfg, brcmf_p2p_ifchange() argument
2057 struct brcmf_p2p_info *p2p = &cfg->p2p; brcmf_p2p_ifchange()
2070 brcmf_notify_escan_complete(cfg, vif->ifp, true, true); brcmf_p2p_ifchange()
2087 brcmf_cfg80211_arm_vif_event(cfg, vif); brcmf_p2p_ifchange()
2092 brcmf_cfg80211_arm_vif_event(cfg, NULL); brcmf_p2p_ifchange()
2095 err = brcmf_cfg80211_wait_vif_event_timeout(cfg, BRCMF_E_IF_CHANGE, brcmf_p2p_ifchange()
2097 brcmf_cfg80211_arm_vif_event(cfg, NULL); brcmf_p2p_ifchange()
2135 struct brcmf_cfg80211_info *cfg = wdev_to_cfg(&vif->wdev); brcmf_p2p_disable_p2p_if() local
2136 struct net_device *pri_ndev = cfg_to_ndev(cfg); brcmf_p2p_disable_p2p_if()
2145 struct brcmf_cfg80211_info *cfg = wdev_to_cfg(&vif->wdev); brcmf_p2p_release_p2p_if() local
2146 struct net_device *pri_ndev = cfg_to_ndev(cfg); brcmf_p2p_release_p2p_if()
2173 p2p_vif = brcmf_alloc_vif(p2p->cfg, NL80211_IFTYPE_P2P_DEVICE, brcmf_p2p_create_p2pdev()
2184 brcmf_cfg80211_arm_vif_event(p2p->cfg, p2p_vif); brcmf_p2p_create_p2pdev()
2190 brcmf_cfg80211_arm_vif_event(p2p->cfg, NULL); brcmf_p2p_create_p2pdev()
2195 err = brcmf_cfg80211_wait_vif_event_timeout(p2p->cfg, BRCMF_E_IF_ADD, brcmf_p2p_create_p2pdev()
2197 brcmf_cfg80211_arm_vif_event(p2p->cfg, NULL); brcmf_p2p_create_p2pdev()
2259 struct brcmf_cfg80211_info *cfg = wiphy_to_cfg(wiphy); brcmf_p2p_add_vif() local
2260 struct brcmf_if *ifp = netdev_priv(cfg_to_ndev(cfg)); brcmf_p2p_add_vif()
2265 if (brcmf_cfg80211_vif_event_armed(cfg)) brcmf_p2p_add_vif()
2278 return brcmf_p2p_create_p2pdev(&cfg->p2p, wiphy, brcmf_p2p_add_vif()
2284 vif = brcmf_alloc_vif(cfg, type, false); brcmf_p2p_add_vif()
2287 brcmf_cfg80211_arm_vif_event(cfg, vif); brcmf_p2p_add_vif()
2289 err = brcmf_p2p_request_p2p_if(&cfg->p2p, ifp, cfg->p2p.int_addr, brcmf_p2p_add_vif()
2292 brcmf_cfg80211_arm_vif_event(cfg, NULL); brcmf_p2p_add_vif()
2297 err = brcmf_cfg80211_wait_vif_event_timeout(cfg, BRCMF_E_IF_ADD, brcmf_p2p_add_vif()
2299 brcmf_cfg80211_arm_vif_event(cfg, NULL); brcmf_p2p_add_vif()
2322 cfg->p2p.bss_idx[P2PAPI_BSSCFG_CONNECTION].vif = vif; brcmf_p2p_add_vif()
2345 struct brcmf_cfg80211_info *cfg = wiphy_priv(wiphy); brcmf_p2p_del_vif() local
2346 struct brcmf_p2p_info *p2p = &cfg->p2p; brcmf_p2p_del_vif()
2377 wait_for_completion_timeout(&cfg->vif_disabled, brcmf_p2p_del_vif()
2382 brcmf_cfg80211_arm_vif_event(cfg, vif); brcmf_p2p_del_vif()
2386 err = brcmf_cfg80211_wait_vif_event_timeout(cfg, BRCMF_E_IF_DEL, brcmf_p2p_del_vif()
2393 brcmf_cfg80211_arm_vif_event(cfg, NULL); brcmf_p2p_del_vif()
2401 struct brcmf_cfg80211_info *cfg = wiphy_to_cfg(wiphy); brcmf_p2p_start_device() local
2402 struct brcmf_p2p_info *p2p = &cfg->p2p; brcmf_p2p_start_device()
2407 mutex_lock(&cfg->usr_sync); brcmf_p2p_start_device()
2411 mutex_unlock(&cfg->usr_sync); brcmf_p2p_start_device()
2417 struct brcmf_cfg80211_info *cfg = wiphy_to_cfg(wiphy); brcmf_p2p_stop_device() local
2418 struct brcmf_p2p_info *p2p = &cfg->p2p; brcmf_p2p_stop_device()
2422 mutex_lock(&cfg->usr_sync); brcmf_p2p_stop_device()
2424 brcmf_abort_scanning(cfg); brcmf_p2p_stop_device()
2426 mutex_unlock(&cfg->usr_sync); brcmf_p2p_stop_device()
H A Dbtcoex.c73 * @cfg: driver private data for cfg80211 interface
94 struct brcmf_cfg80211_info *cfg; member in struct:brcmf_btcoex_info
152 struct brcmf_if *ifp = btci->cfg->pub->iflist[0]; brcmf_btcoex_boost_wifi()
367 * @cfg: driver private cfg80211 data
371 int brcmf_btcoex_attach(struct brcmf_cfg80211_info *cfg) brcmf_btcoex_attach() argument
388 btci->cfg = cfg; brcmf_btcoex_attach()
394 cfg->btcoex = btci; brcmf_btcoex_attach()
400 * @cfg: driver private cfg80211 data
402 void brcmf_btcoex_detach(struct brcmf_cfg80211_info *cfg) brcmf_btcoex_detach() argument
406 if (!cfg->btcoex) brcmf_btcoex_detach()
409 if (cfg->btcoex->timer_on) { brcmf_btcoex_detach()
410 cfg->btcoex->timer_on = false; brcmf_btcoex_detach()
411 del_timer_sync(&cfg->btcoex->timer); brcmf_btcoex_detach()
414 cancel_work_sync(&cfg->btcoex->work); brcmf_btcoex_detach()
416 brcmf_btcoex_boost_wifi(cfg->btcoex, false); brcmf_btcoex_detach()
417 brcmf_btcoex_restore_part1(cfg->btcoex); brcmf_btcoex_detach()
419 kfree(cfg->btcoex); brcmf_btcoex_detach()
420 cfg->btcoex = NULL; brcmf_btcoex_detach()
461 * @cfg: driver private cfg80211 data
469 struct brcmf_cfg80211_info *cfg = wiphy_priv(vif->wdev.wiphy); brcmf_btcoex_set_mode() local
470 struct brcmf_btcoex_info *btci = cfg->btcoex; brcmf_btcoex_set_mode()
471 struct brcmf_if *ifp = cfg->pub->iflist[0]; brcmf_btcoex_set_mode()
H A Dbtcoex.h24 int brcmf_btcoex_attach(struct brcmf_cfg80211_info *cfg);
25 void brcmf_btcoex_detach(struct brcmf_cfg80211_info *cfg);
/linux-4.1.27/drivers/dma/
H A Dste_dma40_ll.c26 void d40_log_cfg(struct stedma40_chan_cfg *cfg, d40_log_cfg() argument
33 if (cfg->dir == DMA_MEM_TO_DEV || d40_log_cfg()
34 cfg->dir == DMA_MEM_TO_MEM) d40_log_cfg()
38 if (cfg->dir == DMA_DEV_TO_MEM || d40_log_cfg()
39 cfg->dir == DMA_MEM_TO_MEM) d40_log_cfg()
43 if (cfg->dir == DMA_DEV_TO_MEM || d40_log_cfg()
44 cfg->dir == DMA_DEV_TO_DEV) d40_log_cfg()
48 if (cfg->dir == DMA_MEM_TO_DEV || d40_log_cfg()
49 cfg->dir == DMA_DEV_TO_DEV) d40_log_cfg()
53 l3 |= cfg->dst_info.psize << D40_MEM_LCSP3_DCFG_PSIZE_POS; d40_log_cfg()
54 l3 |= d40_width_to_bits(cfg->dst_info.data_width) d40_log_cfg()
58 l1 |= cfg->src_info.psize << D40_MEM_LCSP1_SCFG_PSIZE_POS; d40_log_cfg()
59 l1 |= d40_width_to_bits(cfg->src_info.data_width) d40_log_cfg()
67 void d40_phy_cfg(struct stedma40_chan_cfg *cfg, u32 *src_cfg, u32 *dst_cfg) d40_phy_cfg() argument
72 if ((cfg->dir == DMA_DEV_TO_MEM) || d40_phy_cfg()
73 (cfg->dir == DMA_DEV_TO_DEV)) { d40_phy_cfg()
76 src |= D40_TYPE_TO_EVENT(cfg->dev_type); d40_phy_cfg()
78 if (cfg->src_info.flow_ctrl == STEDMA40_NO_FLOW_CTRL) d40_phy_cfg()
83 if ((cfg->dir == DMA_MEM_TO_DEV) || d40_phy_cfg()
84 (cfg->dir == DMA_DEV_TO_DEV)) { d40_phy_cfg()
87 dst |= D40_TYPE_TO_EVENT(cfg->dev_type); d40_phy_cfg()
89 if (cfg->dst_info.flow_ctrl == STEDMA40_NO_FLOW_CTRL) d40_phy_cfg()
102 if (cfg->src_info.psize != STEDMA40_PSIZE_PHY_1) { d40_phy_cfg()
104 src |= cfg->src_info.psize << D40_SREG_CFG_PSIZE_POS; d40_phy_cfg()
106 if (cfg->dst_info.psize != STEDMA40_PSIZE_PHY_1) { d40_phy_cfg()
108 dst |= cfg->dst_info.psize << D40_SREG_CFG_PSIZE_POS; d40_phy_cfg()
112 src |= d40_width_to_bits(cfg->src_info.data_width) d40_phy_cfg()
114 dst |= d40_width_to_bits(cfg->dst_info.data_width) d40_phy_cfg()
118 if (cfg->high_priority) { d40_phy_cfg()
123 if (cfg->src_info.big_endian) d40_phy_cfg()
125 if (cfg->dst_info.big_endian) d40_phy_cfg()
/linux-4.1.27/drivers/clk/tegra/
H A Dclk-pll.c393 struct tegra_clk_pll_freq_table *cfg, _get_table_rate()
407 cfg->input_rate = sel->input_rate; _get_table_rate()
408 cfg->output_rate = sel->output_rate; _get_table_rate()
409 cfg->m = sel->m; _get_table_rate()
410 cfg->n = sel->n; _get_table_rate()
411 cfg->p = sel->p; _get_table_rate()
412 cfg->cpcon = sel->cpcon; _get_table_rate()
417 static int _calc_rate(struct clk_hw *hw, struct tegra_clk_pll_freq_table *cfg, _calc_rate() argument
451 for (cfg->output_rate = rate; cfg->output_rate < 200 * cfreq; _calc_rate()
452 cfg->output_rate <<= 1) _calc_rate()
455 cfg->m = parent_rate / cfreq; _calc_rate()
456 cfg->n = cfg->output_rate / cfreq; _calc_rate()
457 cfg->cpcon = OUT_OF_TABLE_CPCON; _calc_rate()
459 if (cfg->m > divm_max(pll) || cfg->n > divn_max(pll) || _calc_rate()
461 || cfg->output_rate > pll->params->vco_max) { _calc_rate()
465 cfg->output_rate >>= p_div; _calc_rate()
472 cfg->p = ret; _calc_rate()
474 cfg->p = p_div; _calc_rate()
480 struct tegra_clk_pll_freq_table *cfg) _update_pll_mnp()
491 val |= cfg->p << div_nmp->override_divp_shift; _update_pll_mnp()
497 val |= (cfg->m << div_nmp->override_divm_shift) | _update_pll_mnp()
498 (cfg->n << div_nmp->override_divn_shift); _update_pll_mnp()
506 val |= (cfg->m << divm_shift(pll)) | _update_pll_mnp()
507 (cfg->n << divn_shift(pll)) | _update_pll_mnp()
508 (cfg->p << divp_shift(pll)); _update_pll_mnp()
515 struct tegra_clk_pll_freq_table *cfg) _get_pll_mnp()
525 cfg->p = (val >> div_nmp->override_divp_shift) & divp_mask(pll); _get_pll_mnp()
528 cfg->m = (val >> div_nmp->override_divm_shift) & divm_mask(pll); _get_pll_mnp()
529 cfg->n = (val >> div_nmp->override_divn_shift) & divn_mask(pll); _get_pll_mnp()
533 cfg->m = (val >> div_nmp->divm_shift) & divm_mask(pll); _get_pll_mnp()
534 cfg->n = (val >> div_nmp->divn_shift) & divn_mask(pll); _get_pll_mnp()
535 cfg->p = (val >> div_nmp->divp_shift) & divp_mask(pll); _get_pll_mnp()
540 struct tegra_clk_pll_freq_table *cfg, _update_pll_cpcon()
548 val |= cfg->cpcon << PLL_MISC_CPCON_SHIFT; _update_pll_cpcon()
552 if (cfg->n >= PLLDU_LFCON_SET_DIVN) _update_pll_cpcon()
563 static int _program_pll(struct clk_hw *hw, struct tegra_clk_pll_freq_table *cfg, _program_pll() argument
574 _update_pll_mnp(pll, cfg); _program_pll()
577 _update_pll_cpcon(pll, cfg, rate); _program_pll()
591 struct tegra_clk_pll_freq_table cfg, old_cfg; clk_pll_set_rate() local
605 if (_get_table_rate(hw, &cfg, rate, parent_rate) && clk_pll_set_rate()
606 _calc_rate(hw, &cfg, rate, parent_rate)) { clk_pll_set_rate()
617 if (old_cfg.m != cfg.m || old_cfg.n != cfg.n || old_cfg.p != cfg.p) clk_pll_set_rate()
618 ret = _program_pll(hw, &cfg, rate); clk_pll_set_rate()
630 struct tegra_clk_pll_freq_table cfg; clk_pll_round_rate() local
639 if (_get_table_rate(hw, &cfg, rate, *prate) && clk_pll_round_rate()
640 _calc_rate(hw, &cfg, rate, *prate)) clk_pll_round_rate()
643 return cfg.output_rate; clk_pll_round_rate()
650 struct tegra_clk_pll_freq_table cfg; clk_pll_recalc_rate() local
672 _get_pll_mnp(pll, &cfg); clk_pll_recalc_rate()
674 pdiv = _hw_to_p_div(hw, cfg.p); clk_pll_recalc_rate()
680 cfg.m *= pdiv; clk_pll_recalc_rate()
682 rate *= cfg.n; clk_pll_recalc_rate()
683 do_div(rate, cfg.m); clk_pll_recalc_rate()
921 struct tegra_clk_pll_freq_table *cfg, _calc_dynamic_ramp_rate()
932 cfg->m = _pll_fixed_mdiv(pll->params, parent_rate); _calc_dynamic_ramp_rate()
933 cfg->output_rate = rate * p; _calc_dynamic_ramp_rate()
934 cfg->n = cfg->output_rate * cfg->m / parent_rate; _calc_dynamic_ramp_rate()
940 cfg->p = p_div; _calc_dynamic_ramp_rate()
942 if (cfg->n > divn_max(pll) || cfg->output_rate > pll->params->vco_max) _calc_dynamic_ramp_rate()
949 struct tegra_clk_pll_freq_table *cfg, _pll_ramp_calc_pll()
955 err = _get_table_rate(hw, cfg, rate, parent_rate); _pll_ramp_calc_pll()
957 err = _calc_dynamic_ramp_rate(hw, cfg, rate, parent_rate); _pll_ramp_calc_pll()
959 if (cfg->m != _pll_fixed_mdiv(pll->params, parent_rate)) { _pll_ramp_calc_pll()
964 p_div = _p_div_to_hw(hw, cfg->p); _pll_ramp_calc_pll()
968 cfg->p = p_div; _pll_ramp_calc_pll()
971 if (cfg->p > pll->params->max_p) _pll_ramp_calc_pll()
982 struct tegra_clk_pll_freq_table cfg, old_cfg; clk_pllxc_set_rate() local
986 ret = _pll_ramp_calc_pll(hw, &cfg, rate, parent_rate); clk_pllxc_set_rate()
995 if (old_cfg.m != cfg.m || old_cfg.n != cfg.n || old_cfg.p != cfg.p) clk_pllxc_set_rate()
996 ret = _program_pll(hw, &cfg, rate); clk_pllxc_set_rate()
1007 struct tegra_clk_pll_freq_table cfg; clk_pll_ramp_round_rate() local
1011 ret = _pll_ramp_calc_pll(hw, &cfg, rate, *prate); clk_pll_ramp_round_rate()
1015 p_div = _hw_to_p_div(hw, cfg.p); clk_pll_ramp_round_rate()
1019 output_rate *= cfg.n; clk_pll_ramp_round_rate()
1020 do_div(output_rate, cfg.m * p_div); clk_pll_ramp_round_rate()
1028 struct tegra_clk_pll_freq_table cfg; clk_pllm_set_rate() local
1046 ret = _pll_ramp_calc_pll(hw, &cfg, rate, parent_rate); clk_pllm_set_rate()
1050 _update_pll_mnp(pll, &cfg); clk_pllm_set_rate()
1164 struct tegra_clk_pll_freq_table cfg, old_cfg; clk_pllc_set_rate() local
1172 ret = _pll_ramp_calc_pll(hw, &cfg, rate, parent_rate); clk_pllc_set_rate()
1178 if (cfg.m != old_cfg.m) { clk_pllc_set_rate()
1183 if (old_cfg.n == cfg.n && old_cfg.p == cfg.p) clk_pllc_set_rate()
1190 ret = _pllcx_update_dynamic_coef(pll, parent_rate, cfg.n); clk_pllc_set_rate()
1194 _update_pll_mnp(pll, &cfg); clk_pllc_set_rate()
1207 struct tegra_clk_pll_freq_table *cfg, _pllre_calc_rate()
1219 if (cfg) { _pllre_calc_rate()
1220 cfg->m = m; _pllre_calc_rate()
1221 cfg->n = n; _pllre_calc_rate()
1230 struct tegra_clk_pll_freq_table cfg, old_cfg; clk_pllre_set_rate() local
1238 _pllre_calc_rate(pll, &cfg, rate, parent_rate); clk_pllre_set_rate()
1240 cfg.p = old_cfg.p; clk_pllre_set_rate()
1242 if (cfg.m != old_cfg.m || cfg.n != old_cfg.n) { clk_pllre_set_rate()
1247 _update_pll_mnp(pll, &cfg); clk_pllre_set_rate()
1264 struct tegra_clk_pll_freq_table cfg; clk_pllre_recalc_rate() local
1268 _get_pll_mnp(pll, &cfg); clk_pllre_recalc_rate()
1270 rate *= cfg.n; clk_pllre_recalc_rate()
1271 do_div(rate, cfg.m); clk_pllre_recalc_rate()
1705 struct tegra_clk_pll_freq_table cfg; tegra_clk_register_pllc() local
1736 cfg.m = _pll_fixed_mdiv(pll_params, parent_rate); tegra_clk_register_pllc()
1737 cfg.n = cfg.m * pll_params->vco_min / parent_rate; tegra_clk_register_pllc()
1741 cfg.p = p_tohw->hw_val; tegra_clk_register_pllc()
1753 _update_pll_mnp(pll, &cfg); tegra_clk_register_pllc()
1760 _pllcx_update_dynamic_coef(pll, parent_rate, cfg.n); tegra_clk_register_pllc()
1827 struct tegra_clk_pll_freq_table cfg; tegra_clk_register_pllss() local
1857 cfg.m = _pll_fixed_mdiv(pll_params, parent_rate); tegra_clk_register_pllss()
1858 cfg.n = cfg.m * pll_params->vco_min / parent_rate; tegra_clk_register_pllss()
1867 cfg.p = pll_params->pdiv_tohw[i-1].hw_val; tegra_clk_register_pllss()
1869 _update_pll_mnp(pll, &cfg); tegra_clk_register_pllss()
392 _get_table_rate(struct clk_hw *hw, struct tegra_clk_pll_freq_table *cfg, unsigned long rate, unsigned long parent_rate) _get_table_rate() argument
479 _update_pll_mnp(struct tegra_clk_pll *pll, struct tegra_clk_pll_freq_table *cfg) _update_pll_mnp() argument
514 _get_pll_mnp(struct tegra_clk_pll *pll, struct tegra_clk_pll_freq_table *cfg) _get_pll_mnp() argument
539 _update_pll_cpcon(struct tegra_clk_pll *pll, struct tegra_clk_pll_freq_table *cfg, unsigned long rate) _update_pll_cpcon() argument
920 _calc_dynamic_ramp_rate(struct clk_hw *hw, struct tegra_clk_pll_freq_table *cfg, unsigned long rate, unsigned long parent_rate) _calc_dynamic_ramp_rate() argument
948 _pll_ramp_calc_pll(struct clk_hw *hw, struct tegra_clk_pll_freq_table *cfg, unsigned long rate, unsigned long parent_rate) _pll_ramp_calc_pll() argument
1206 _pllre_calc_rate(struct tegra_clk_pll *pll, struct tegra_clk_pll_freq_table *cfg, unsigned long rate, unsigned long parent_rate) _pllre_calc_rate() argument
/linux-4.1.27/drivers/net/wireless/ti/wlcore/
H A Dscan.c255 struct wlcore_scan_channels *cfg, wlcore_set_scan_chan_params()
263 cfg->passive[0] = wlcore_set_scan_chan_params()
268 cfg->channels_2, wlcore_set_scan_chan_params()
274 cfg->active[0] = wlcore_set_scan_chan_params()
279 cfg->channels_2, wlcore_set_scan_chan_params()
282 cfg->passive[0], wlcore_set_scan_chan_params()
286 cfg->passive[1] = wlcore_set_scan_chan_params()
291 cfg->channels_5, wlcore_set_scan_chan_params()
297 cfg->dfs = wlcore_set_scan_chan_params()
302 cfg->channels_5, wlcore_set_scan_chan_params()
305 cfg->passive[1], wlcore_set_scan_chan_params()
309 cfg->active[1] = wlcore_set_scan_chan_params()
314 cfg->channels_5, wlcore_set_scan_chan_params()
317 cfg->passive[1] + cfg->dfs, wlcore_set_scan_chan_params()
323 cfg->passive[2] = 0; wlcore_set_scan_chan_params()
324 cfg->active[2] = 0; wlcore_set_scan_chan_params()
326 cfg->passive_active = n_pactive_ch; wlcore_set_scan_chan_params()
329 cfg->active[0], cfg->passive[0]); wlcore_set_scan_chan_params()
331 cfg->active[1], cfg->passive[1]); wlcore_set_scan_chan_params()
332 wl1271_debug(DEBUG_SCAN, " DFS: %d", cfg->dfs); wlcore_set_scan_chan_params()
334 return cfg->passive[0] || cfg->active[0] || wlcore_set_scan_chan_params()
335 cfg->passive[1] || cfg->active[1] || cfg->dfs || wlcore_set_scan_chan_params()
336 cfg->passive[2] || cfg->active[2]; wlcore_set_scan_chan_params()
254 wlcore_set_scan_chan_params(struct wl1271 *wl, struct wlcore_scan_channels *cfg, struct ieee80211_channel *channels[], u32 n_channels, u32 n_ssids, int scan_type) wlcore_set_scan_chan_params() argument
/linux-4.1.27/drivers/crypto/qce/
H A Dcommon.c58 u32 cfg = 0; qce_encr_cfg() local
62 cfg |= ENCR_KEY_SZ_AES128 << ENCR_KEY_SZ_SHIFT; qce_encr_cfg()
64 cfg |= ENCR_KEY_SZ_AES256 << ENCR_KEY_SZ_SHIFT; qce_encr_cfg()
68 cfg |= ENCR_ALG_AES << ENCR_ALG_SHIFT; qce_encr_cfg()
70 cfg |= ENCR_ALG_DES << ENCR_ALG_SHIFT; qce_encr_cfg()
73 cfg |= ENCR_KEY_SZ_DES << ENCR_KEY_SZ_SHIFT; qce_encr_cfg()
76 cfg |= ENCR_KEY_SZ_3DES << ENCR_KEY_SZ_SHIFT; qce_encr_cfg()
80 cfg |= ENCR_MODE_ECB << ENCR_MODE_SHIFT; qce_encr_cfg()
83 cfg |= ENCR_MODE_CBC << ENCR_MODE_SHIFT; qce_encr_cfg()
86 cfg |= ENCR_MODE_CTR << ENCR_MODE_SHIFT; qce_encr_cfg()
89 cfg |= ENCR_MODE_XTS << ENCR_MODE_SHIFT; qce_encr_cfg()
92 cfg |= ENCR_MODE_CCM << ENCR_MODE_SHIFT; qce_encr_cfg()
93 cfg |= LAST_CCM_XFR << LAST_CCM_SHIFT; qce_encr_cfg()
99 return cfg; qce_encr_cfg()
104 u32 cfg = 0; qce_auth_cfg() local
107 cfg |= AUTH_ALG_AES << AUTH_ALG_SHIFT; qce_auth_cfg()
109 cfg |= AUTH_ALG_SHA << AUTH_ALG_SHIFT; qce_auth_cfg()
113 cfg |= AUTH_KEY_SZ_AES128 << AUTH_KEY_SIZE_SHIFT; qce_auth_cfg()
115 cfg |= AUTH_KEY_SZ_AES256 << AUTH_KEY_SIZE_SHIFT; qce_auth_cfg()
119 cfg |= AUTH_SIZE_SHA1 << AUTH_SIZE_SHIFT; qce_auth_cfg()
121 cfg |= AUTH_SIZE_SHA256 << AUTH_SIZE_SHIFT; qce_auth_cfg()
123 cfg |= AUTH_SIZE_ENUM_16_BYTES << AUTH_SIZE_SHIFT; qce_auth_cfg()
126 cfg |= AUTH_MODE_HASH << AUTH_MODE_SHIFT; qce_auth_cfg()
129 cfg |= AUTH_MODE_HMAC << AUTH_MODE_SHIFT; qce_auth_cfg()
131 cfg |= AUTH_MODE_CCM << AUTH_MODE_SHIFT; qce_auth_cfg()
133 cfg |= AUTH_MODE_CMAC << AUTH_MODE_SHIFT; qce_auth_cfg()
136 cfg |= AUTH_POS_BEFORE << AUTH_POS_SHIFT; qce_auth_cfg()
139 cfg |= QCE_MAX_NONCE_WORDS << AUTH_NONCE_NUM_WORDS_SHIFT; qce_auth_cfg()
143 cfg |= BIT(AUTH_LAST_SHIFT) | BIT(AUTH_FIRST_SHIFT); qce_auth_cfg()
145 return cfg; qce_auth_cfg()
/linux-4.1.27/arch/arm/mach-omap1/
H A Dmux.c346 static int __init_or_module omap1_cfg_reg(const struct pin_config *cfg) omap1_cfg_reg() argument
355 if (cfg->mux_reg) { omap1_cfg_reg()
359 reg_orig = omap_readl(cfg->mux_reg); omap1_cfg_reg()
362 mask = (0x7 << cfg->mask_offset); omap1_cfg_reg()
366 tmp2 = (cfg->mask << cfg->mask_offset); omap1_cfg_reg()
372 omap_writel(reg, cfg->mux_reg); omap1_cfg_reg()
378 if (cfg->pu_pd_reg && cfg->pull_val) { omap1_cfg_reg()
380 pu_pd_orig = omap_readl(cfg->pu_pd_reg); omap1_cfg_reg()
381 mask = 1 << cfg->pull_bit; omap1_cfg_reg()
383 if (cfg->pu_pd_val) { omap1_cfg_reg()
394 omap_writel(pu_pd, cfg->pu_pd_reg); omap1_cfg_reg()
400 if (cfg->pull_reg) { omap1_cfg_reg()
402 pull_orig = omap_readl(cfg->pull_reg); omap1_cfg_reg()
403 mask = 1 << cfg->pull_bit; omap1_cfg_reg()
405 if (cfg->pull_val) { omap1_cfg_reg()
417 omap_writel(pull, cfg->pull_reg); omap1_cfg_reg()
423 printk(KERN_WARNING "MUX: initialized %s\n", cfg->name); omap1_cfg_reg()
428 if (cfg->debug || warn) { omap1_cfg_reg()
429 printk("MUX: Setting register %s\n", cfg->name); omap1_cfg_reg()
431 cfg->mux_reg_name, cfg->mux_reg, reg_orig, reg); omap1_cfg_reg()
434 if (cfg->pu_pd_reg && cfg->pull_val) { omap1_cfg_reg()
436 cfg->pu_pd_name, cfg->pu_pd_reg, omap1_cfg_reg()
441 if (cfg->pull_reg) omap1_cfg_reg()
443 cfg->pull_name, cfg->pull_reg, pull_orig, pull); omap1_cfg_reg()
/linux-4.1.27/drivers/video/backlight/
H A Dvgg2432a4.c112 struct ili9320_platdata *cfg) vgg2432a4_lcd_init()
134 ili9320_write(lcd, ILI9320_DISPLAY2, cfg->display2); vgg2432a4_lcd_init()
135 ili9320_write(lcd, ILI9320_DISPLAY3, cfg->display3); vgg2432a4_lcd_init()
136 ili9320_write(lcd, ILI9320_DISPLAY4, cfg->display4); vgg2432a4_lcd_init()
138 ili9320_write(lcd, ILI9320_RGB_IF1, cfg->rgb_if1); vgg2432a4_lcd_init()
140 ili9320_write(lcd, ILI9320_RGB_IF2, cfg->rgb_if2); vgg2432a4_lcd_init()
171 ili9320_write(lcd, ILI9320_HORIZ_END, cfg->hsize - 1); vgg2432a4_lcd_init()
173 ili9320_write(lcd, ILI9320_VERT_END, cfg->vsize - 1); vgg2432a4_lcd_init()
176 ILI9320_DRIVER2_NL(((cfg->vsize - 240) / 8) + 0x1D)); vgg2432a4_lcd_init()
187 ili9320_write(lcd, ILI9320_INTERFACE2, cfg->interface2); vgg2432a4_lcd_init()
188 ili9320_write(lcd, ILI9320_INTERFACE3, cfg->interface3); vgg2432a4_lcd_init()
189 ili9320_write(lcd, ILI9320_INTERFACE4, cfg->interface4); vgg2432a4_lcd_init()
190 ili9320_write(lcd, ILI9320_INTERFACE5, cfg->interface5); vgg2432a4_lcd_init()
191 ili9320_write(lcd, ILI9320_INTERFACE6, cfg->interface6); vgg2432a4_lcd_init()
111 vgg2432a4_lcd_init(struct ili9320 *lcd, struct ili9320_platdata *cfg) vgg2432a4_lcd_init() argument
H A Dlp8788_bl.c78 struct lp8788_bl_config *cfg = &default_bl_config; lp8788_backlight_configure() local
87 cfg->bl_mode = pdata->bl_mode; lp8788_backlight_configure()
88 cfg->dim_mode = pdata->dim_mode; lp8788_backlight_configure()
89 cfg->full_scale = pdata->full_scale; lp8788_backlight_configure()
90 cfg->rise_time = pdata->rise_time; lp8788_backlight_configure()
91 cfg->fall_time = pdata->fall_time; lp8788_backlight_configure()
92 cfg->pwm_pol = pdata->pwm_pol; lp8788_backlight_configure()
96 val = (cfg->rise_time << LP8788_BL_RAMP_RISE_SHIFT) | cfg->fall_time; lp8788_backlight_configure()
102 val = (cfg->full_scale << LP8788_BL_FULLSCALE_SHIFT) | lp8788_backlight_configure()
103 (cfg->dim_mode << LP8788_BL_DIM_MODE_SHIFT); lp8788_backlight_configure()
106 switch (cfg->bl_mode) { lp8788_backlight_configure()
113 (cfg->pwm_pol << LP8788_BL_PWM_POLARITY_SHIFT); lp8788_backlight_configure()
116 dev_err(bl->lp->dev, "invalid mode: %d\n", cfg->bl_mode); lp8788_backlight_configure()
120 bl->mode = cfg->bl_mode; lp8788_backlight_configure()
H A Dili9320.c80 struct ili9320_platdata *cfg = lcd->platdata; ili9320_reset() local
82 cfg->reset(1); ili9320_reset()
85 cfg->reset(0); ili9320_reset()
88 cfg->reset(1); ili9320_reset()
201 struct ili9320_platdata *cfg = dev_get_platdata(&spi->dev); ili9320_probe_spi() local
209 if (cfg == NULL) { ili9320_probe_spi()
214 if (cfg->hsize <= 0 || cfg->vsize <= 0 || cfg->reset == NULL) { ili9320_probe_spi()
230 ili->platdata = cfg; ili9320_probe_spi()
/linux-4.1.27/drivers/isdn/hardware/mISDN/
H A DmISDNinfineon.c114 struct _iohandle cfg; member in struct:inf_hw
286 val = inb((u32)hw->cfg.start + DIVA_PCI_CTRL); diva_irq()
304 val = readb(hw->cfg.p); diva20x_irq()
311 writeb(PITA_INT0_STATUS, hw->cfg.p); /* ACK PITA INT0 */ diva20x_irq()
323 val = inb((u32)hw->cfg.start + TIGER_AUX_STATUS); tiger_irq()
341 val = inb((u32)hw->cfg.start + ELSA_IRQ_ADDR); elsa_irq()
359 val = inl((u32)hw->cfg.start + NICCY_IRQ_CTRL_REG); niccy_irq()
364 outl(val, (u32)hw->cfg.start + NICCY_IRQ_CTRL_REG); niccy_irq()
410 writel(PITA_INT0_ENABLE, hw->cfg.p); enable_hwirq()
414 outb(TIGER_IRQ_BIT, (u32)hw->cfg.start + TIGER_AUX_IRQMASK); enable_hwirq()
417 outb(QS1000_IRQ_ON, (u32)hw->cfg.start + ELSA_IRQ_ADDR); enable_hwirq()
420 outb(QS3000_IRQ_ON, (u32)hw->cfg.start + ELSA_IRQ_ADDR); enable_hwirq()
423 val = inl((u32)hw->cfg.start + NICCY_IRQ_CTRL_REG); enable_hwirq()
425 outl(val, (u32)hw->cfg.start + NICCY_IRQ_CTRL_REG); enable_hwirq()
428 w = inw((u32)hw->cfg.start + SCT_PLX_IRQ_ADDR); enable_hwirq()
430 outw(w, (u32)hw->cfg.start + SCT_PLX_IRQ_ADDR); enable_hwirq()
434 (u32)hw->cfg.start + GAZEL_INCSR); enable_hwirq()
438 (u32)hw->cfg.start + GAZEL_INCSR); enable_hwirq()
454 writel(0, hw->cfg.p); disable_hwirq()
458 outb(0, (u32)hw->cfg.start + TIGER_AUX_IRQMASK); disable_hwirq()
461 outb(QS1000_IRQ_OFF, (u32)hw->cfg.start + ELSA_IRQ_ADDR); disable_hwirq()
464 outb(QS3000_IRQ_OFF, (u32)hw->cfg.start + ELSA_IRQ_ADDR); disable_hwirq()
467 val = inl((u32)hw->cfg.start + NICCY_IRQ_CTRL_REG); disable_hwirq()
469 outl(val, (u32)hw->cfg.start + NICCY_IRQ_CTRL_REG); disable_hwirq()
472 w = inw((u32)hw->cfg.start + SCT_PLX_IRQ_ADDR); disable_hwirq()
474 outw(w, (u32)hw->cfg.start + SCT_PLX_IRQ_ADDR); disable_hwirq()
478 outb(0, (u32)hw->cfg.start + GAZEL_INCSR); disable_hwirq()
507 outb(0, (u32)hw->cfg.start + DIVA_PCI_CTRL); reset_inf()
509 outb(DIVA_RESET_BIT, (u32)hw->cfg.start + DIVA_PCI_CTRL); reset_inf()
512 outb(9, (u32)hw->cfg.start + 0x69); reset_inf()
514 (u32)hw->cfg.start + DIVA_PCI_CTRL); reset_inf()
518 hw->cfg.p + PITA_MISC_REG); reset_inf()
520 writel(PITA_PARA_MPX_MODE, hw->cfg.p + PITA_MISC_REG); reset_inf()
525 hw->cfg.p + PITA_MISC_REG); reset_inf()
528 hw->cfg.p + PITA_MISC_REG); reset_inf()
548 w = inw((u32)hw->cfg.start + SCT_PLX_RESET_ADDR); reset_inf()
550 outw(w, (u32)hw->cfg.start + SCT_PLX_RESET_ADDR); reset_inf()
552 w = inw((u32)hw->cfg.start + SCT_PLX_RESET_ADDR); reset_inf()
554 outw(w, (u32)hw->cfg.start + SCT_PLX_RESET_ADDR); reset_inf()
558 val = inl((u32)hw->cfg.start + GAZEL_CNTRL); reset_inf()
560 outl(val, (u32)hw->cfg.start + GAZEL_CNTRL); reset_inf()
563 outl(val, (u32)hw->cfg.start + GAZEL_CNTRL); reset_inf()
570 val = inl((u32)hw->cfg.start + GAZEL_CNTRL); reset_inf()
572 outl(val, (u32)hw->cfg.start + GAZEL_CNTRL); reset_inf()
575 outl(val, (u32)hw->cfg.start + GAZEL_CNTRL); reset_inf()
647 if (hw->cfg.mode) { release_io()
648 if (hw->cfg.p) { release_io()
649 release_mem_region(hw->cfg.start, hw->cfg.size); release_io()
650 iounmap(hw->cfg.p); release_io()
652 release_region(hw->cfg.start, hw->cfg.size); release_io()
653 hw->cfg.mode = AM_NONE; release_io()
671 hw->cfg.start = pci_resource_start(hw->pdev, hw->ci->cfg_bar); setup_io()
672 hw->cfg.size = pci_resource_len(hw->pdev, hw->ci->cfg_bar); setup_io()
674 if (!request_mem_region(hw->cfg.start, hw->cfg.size, setup_io()
678 if (!request_region(hw->cfg.start, hw->cfg.size, setup_io()
685 (ulong)hw->cfg.start, (ulong)hw->cfg.size); setup_io()
689 hw->cfg.p = ioremap(hw->cfg.start, hw->cfg.size); setup_io()
690 hw->cfg.mode = hw->ci->cfg_mode; setup_io()
692 pr_notice("%s: IO cfg %lx (%lu bytes) mode%d\n", setup_io()
693 hw->name, (ulong)hw->cfg.start, setup_io()
694 (ulong)hw->cfg.size, hw->ci->cfg_mode); setup_io()
729 hw->isac.mode = hw->cfg.mode; setup_io()
730 hw->isac.a.io.ale = (u32)hw->cfg.start + DIVA_ISAC_ALE; setup_io()
731 hw->isac.a.io.port = (u32)hw->cfg.start + DIVA_ISAC_PORT; setup_io()
732 hw->hscx.mode = hw->cfg.mode; setup_io()
733 hw->hscx.a.io.ale = (u32)hw->cfg.start + DIVA_HSCX_ALE; setup_io()
734 hw->hscx.a.io.port = (u32)hw->cfg.start + DIVA_HSCX_PORT; setup_io()
755 hw->isac.mode = hw->cfg.mode; setup_io()
756 hw->isac.a.io.ale = (u32)hw->cfg.start + TIGER_IPAC_ALE; setup_io()
757 hw->isac.a.io.port = (u32)hw->cfg.start + TIGER_IPAC_PORT; setup_io()
758 hw->hscx.mode = hw->cfg.mode; setup_io()
759 hw->hscx.a.io.ale = (u32)hw->cfg.start + TIGER_IPAC_ALE; setup_io()
760 hw->hscx.a.io.port = (u32)hw->cfg.start + TIGER_IPAC_PORT; setup_io()
761 outb(0xff, (ulong)hw->cfg.start); setup_io()
763 outb(0x00, (ulong)hw->cfg.start); setup_io()
765 outb(TIGER_IOMASK, (ulong)hw->cfg.start + TIGER_AUX_CTRL); setup_io()
H A Dspeedfax.c76 u32 cfg; member in struct:sfax_hw
132 val = inb(sf->cfg + TIGER_AUX_STATUS); speedfax_irq()
163 outb(SFAX_TIGER_IRQ_BIT, sf->cfg + TIGER_AUX_IRQMASK); enable_hwirq()
171 outb(0, sf->cfg + TIGER_AUX_IRQMASK); disable_hwirq()
179 outb(TIGER_EXTERN_RESET_ON, sf->cfg + TIGER_RESET_ADDR); reset_speedfax()
180 outb(SFAX_PCI_RESET_ON, sf->cfg + TIGER_AUX_DATA); reset_speedfax()
182 outb(TIGER_EXTERN_RESET_OFF, sf->cfg + TIGER_RESET_ADDR); reset_speedfax()
184 outb(sf->aux_data, sf->cfg + TIGER_AUX_DATA); reset_speedfax()
202 outb(sf->aux_data, sf->cfg + TIGER_AUX_DATA); sfax_ctrl()
209 outb(sf->aux_data, sf->cfg + TIGER_AUX_DATA); sfax_ctrl()
329 if (!request_region(sf->cfg, 256, sf->name)) { setup_speedfax()
331 sf->name, sf->cfg, sf->cfg + 255); setup_speedfax()
334 outb(0xff, sf->cfg); setup_speedfax()
335 outb(0, sf->cfg); setup_speedfax()
336 outb(0xdd, sf->cfg + TIGER_AUX_CTRL); setup_speedfax()
337 outb(0, sf->cfg + TIGER_AUX_IRQMASK); setup_speedfax()
340 sf->p_isac.ale = sf->cfg + SFAX_PCI_ADDR; setup_speedfax()
341 sf->p_isac.port = sf->cfg + SFAX_PCI_ISAC; setup_speedfax()
342 sf->p_isar.ale = sf->cfg + SFAX_PCI_ADDR; setup_speedfax()
343 sf->p_isar.port = sf->cfg + SFAX_PCI_ISAR; setup_speedfax()
364 release_region(card->cfg, 256); release_card()
440 release_region(card->cfg, 256); setup_instance()
474 card->cfg = pci_resource_start(pdev, 0); sfaxpci_probe()
/linux-4.1.27/drivers/hwmon/
H A Dab8500.c46 struct ab8500_gpadc_cfg cfg; member in struct:ab8500_temp
56 static int ab8500_voltage_to_temp(struct ab8500_gpadc_cfg *cfg, ab8500_voltage_to_temp() argument
59 int r_ntc, i = 0, tbl_sz = cfg->tbl_sz; ab8500_voltage_to_temp()
60 const struct abx500_res_to_temp *tbl = cfg->temp_tbl; ab8500_voltage_to_temp()
62 if (cfg->vcc < 0 || v_ntc >= cfg->vcc) ab8500_voltage_to_temp()
65 r_ntc = v_ntc * cfg->r_up / (cfg->vcc - v_ntc); ab8500_voltage_to_temp()
94 ret = ab8500_voltage_to_temp(&ab8500_data->cfg, voltage, temp); ab8500_read_sensor()
178 ab8500_data->cfg.vcc = THERMAL_VCC; abx500_hwmon_init()
179 ab8500_data->cfg.r_up = PULL_UP_RESISTOR; abx500_hwmon_init()
180 ab8500_data->cfg.temp_tbl = ab8500_temp_tbl_a_thermistor; abx500_hwmon_init()
181 ab8500_data->cfg.tbl_sz = ab8500_temp_tbl_a_size; abx500_hwmon_init()
H A Ds3c-hwmon.c169 struct s3c_hwmon_chcfg *cfg; s3c_hwmon_ch_show() local
172 cfg = pdata->in[sen_attr->index]; s3c_hwmon_ch_show()
178 ret *= cfg->mult; s3c_hwmon_ch_show()
179 ret = DIV_ROUND_CLOSEST(ret, cfg->div); s3c_hwmon_ch_show()
198 struct s3c_hwmon_chcfg *cfg; s3c_hwmon_label_show() local
200 cfg = pdata->in[sen_attr->index]; s3c_hwmon_label_show()
202 return snprintf(buf, PAGE_SIZE, "%s\n", cfg->name); s3c_hwmon_label_show()
208 * @cfg: The channel configuration passed from the platform data.
220 struct s3c_hwmon_chcfg *cfg, s3c_hwmon_create_attr()
243 if (cfg->name) { s3c_hwmon_create_attr()
319 struct s3c_hwmon_chcfg *cfg = pdata->in[i]; s3c_hwmon_probe() local
321 if (!cfg) s3c_hwmon_probe()
324 if (cfg->mult >= 0x10000) s3c_hwmon_probe()
329 if (cfg->div == 0) { s3c_hwmon_probe()
219 s3c_hwmon_create_attr(struct device *dev, struct s3c_hwmon_chcfg *cfg, struct s3c_hwmon_attr *attrs, int channel) s3c_hwmon_create_attr() argument
/linux-4.1.27/drivers/misc/mei/
H A Dhw-me.h41 #define MEI_PCI_DEVICE(dev, cfg) \
44 .driver_data = (kernel_ulong_t)&(cfg)
52 * @cfg: per device generation config and ops
57 const struct mei_cfg *cfg; member in struct:mei_me_hw
72 const struct mei_cfg *cfg);
/linux-4.1.27/arch/arm/plat-orion/include/plat/
H A Daddr-map.h24 int (*cpu_win_can_remap) (const struct orion_addr_map_cfg *cfg,
28 void __iomem *(*win_cfg_base) (const struct orion_addr_map_cfg *cfg,
44 void __init orion_config_wins(struct orion_addr_map_cfg *cfg,
47 void __init orion_setup_cpu_win(const struct orion_addr_map_cfg *cfg,
52 void __init orion_setup_cpu_mbus_target(const struct orion_addr_map_cfg *cfg,
/linux-4.1.27/arch/ia64/kernel/
H A Dirq_ia64.c129 struct irq_cfg *cfg = &irq_cfg[irq]; __bind_irq_vector() local
137 if ((cfg->vector == vector) && cpumask_equal(&cfg->domain, &domain)) __bind_irq_vector()
139 if (cfg->vector != IRQ_VECTOR_UNASSIGNED) __bind_irq_vector()
143 cfg->vector = vector; __bind_irq_vector()
144 cfg->domain = domain; __bind_irq_vector()
165 struct irq_cfg *cfg = &irq_cfg[irq]; __clear_irq_vector() local
168 BUG_ON(cfg->vector == IRQ_VECTOR_UNASSIGNED); __clear_irq_vector()
169 vector = cfg->vector; __clear_irq_vector()
170 domain = cfg->domain; __clear_irq_vector()
171 for_each_cpu_and(cpu, &cfg->domain, cpu_online_mask) __clear_irq_vector()
173 cfg->vector = IRQ_VECTOR_UNASSIGNED; __clear_irq_vector()
174 cfg->domain = CPU_MASK_NONE; __clear_irq_vector()
268 struct irq_cfg *cfg = &irq_cfg[irq]; __irq_prepare_move() local
272 if (cfg->move_in_progress || cfg->move_cleanup_count) __irq_prepare_move()
274 if (cfg->vector == IRQ_VECTOR_UNASSIGNED || !cpu_online(cpu)) __irq_prepare_move()
276 if (cpumask_test_cpu(cpu, &cfg->domain)) __irq_prepare_move()
282 cfg->move_in_progress = 1; __irq_prepare_move()
283 cfg->old_domain = cfg->domain; __irq_prepare_move()
284 cfg->vector = IRQ_VECTOR_UNASSIGNED; __irq_prepare_move()
285 cfg->domain = CPU_MASK_NONE; __irq_prepare_move()
303 struct irq_cfg *cfg = &irq_cfg[irq]; irq_complete_move() local
307 if (likely(!cfg->move_in_progress)) irq_complete_move()
310 if (unlikely(cpumask_test_cpu(smp_processor_id(), &cfg->old_domain))) irq_complete_move()
313 cpumask_and(&cleanup_mask, &cfg->old_domain, cpu_online_mask); irq_complete_move()
314 cfg->move_cleanup_count = cpumask_weight(&cleanup_mask); irq_complete_move()
317 cfg->move_in_progress = 0; irq_complete_move()
330 struct irq_cfg *cfg; smp_irq_move_cleanup_interrupt() local
336 cfg = irq_cfg + irq; smp_irq_move_cleanup_interrupt()
338 if (!cfg->move_cleanup_count) smp_irq_move_cleanup_interrupt()
341 if (!cpumask_test_cpu(me, &cfg->old_domain)) smp_irq_move_cleanup_interrupt()
348 cfg->move_cleanup_count--; smp_irq_move_cleanup_interrupt()
/linux-4.1.27/arch/mips/kernel/
H A Dcevt-bcm1480.c47 void __iomem *cfg, *init; sibyte_set_mode() local
49 cfg = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)); sibyte_set_mode()
54 __raw_writeq(0, cfg); sibyte_set_mode()
57 cfg); sibyte_set_mode()
63 __raw_writeq(0, cfg); sibyte_set_mode()
75 void __iomem *cfg, *init; sibyte_next_event() local
77 cfg = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)); sibyte_next_event()
80 __raw_writeq(0, cfg); sibyte_next_event()
82 __raw_writeq(M_SCD_TIMER_ENABLE, cfg); sibyte_next_event()
91 void __iomem *cfg; sibyte_counter_handler() local
100 cfg = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)); sibyte_counter_handler()
101 ____raw_writeq(tmode, cfg); sibyte_counter_handler()
H A Dcevt-sb1250.c45 void __iomem *cfg, *init; sibyte_set_mode() local
47 cfg = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)); sibyte_set_mode()
52 __raw_writeq(0, cfg); sibyte_set_mode()
55 cfg); sibyte_set_mode()
61 __raw_writeq(0, cfg); sibyte_set_mode()
73 void __iomem *cfg, *init; sibyte_next_event() local
75 cfg = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)); sibyte_next_event()
78 __raw_writeq(0, cfg); sibyte_next_event()
80 __raw_writeq(M_SCD_TIMER_ENABLE, cfg); sibyte_next_event()
89 void __iomem *cfg; sibyte_counter_handler() local
98 cfg = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)); sibyte_counter_handler()
99 ____raw_writeq(tmode, cfg); sibyte_counter_handler()
H A Dsegment.c15 static void build_segment_config(char *str, unsigned int cfg) build_segment_config() argument
23 am = (cfg & MIPS_SEGCFG_AM) >> MIPS_SEGCFG_AM_SHIFT; build_segment_config()
32 ((cfg & MIPS_SEGCFG_PA) >> MIPS_SEGCFG_PA_SHIFT)); build_segment_config()
34 ((cfg & MIPS_SEGCFG_C) >> MIPS_SEGCFG_C_SHIFT)); build_segment_config()
42 ((cfg & MIPS_SEGCFG_EU) >> MIPS_SEGCFG_EU_SHIFT)); build_segment_config()
/linux-4.1.27/drivers/net/wireless/iwlwifi/
H A Diwl-nvm-parse.c211 u16 nvm_flags, const struct iwl_cfg *cfg) iwl_get_channel_flags()
216 if (cfg->device_family == IWL_DEVICE_FAMILY_8000) iwl_get_channel_flags()
257 static int iwl_init_channel_map(struct device *dev, const struct iwl_cfg *cfg, iwl_init_channel_map() argument
270 if (cfg->device_family != IWL_DEVICE_FAMILY_8000) { iwl_init_channel_map()
325 ch_flags, cfg); iwl_init_channel_map()
350 static void iwl_init_vht_hw_capab(const struct iwl_cfg *cfg, iwl_init_vht_hw_capab() argument
357 unsigned int max_ampdu_exponent = (cfg->max_vht_ampdu_exponent ?: iwl_init_vht_hw_capab()
369 if (cfg->ht_params->ldpc) iwl_init_vht_hw_capab()
395 if (num_rx_ants == 1 || cfg->rx_with_siso_diversity) { iwl_init_vht_hw_capab()
405 static void iwl_init_sbands(struct device *dev, const struct iwl_cfg *cfg, iwl_init_sbands() argument
414 if (cfg->device_family != IWL_DEVICE_FAMILY_8000) iwl_init_sbands()
416 dev, cfg, data, iwl_init_sbands()
420 dev, cfg, data, iwl_init_sbands()
430 iwl_init_ht_hw_capab(cfg, data, &sband->ht_cap, IEEE80211_BAND_2GHZ, iwl_init_sbands()
439 iwl_init_ht_hw_capab(cfg, data, &sband->ht_cap, IEEE80211_BAND_5GHZ, iwl_init_sbands()
442 iwl_init_vht_hw_capab(cfg, data, &sband->vht_cap, iwl_init_sbands()
450 static int iwl_get_sku(const struct iwl_cfg *cfg, const __le16 *nvm_sw, iwl_get_sku() argument
453 if (cfg->device_family != IWL_DEVICE_FAMILY_8000) iwl_get_sku()
459 static int iwl_get_nvm_version(const struct iwl_cfg *cfg, const __le16 *nvm_sw) iwl_get_nvm_version() argument
461 if (cfg->device_family != IWL_DEVICE_FAMILY_8000) iwl_get_nvm_version()
468 static int iwl_get_radio_cfg(const struct iwl_cfg *cfg, const __le16 *nvm_sw, iwl_get_radio_cfg() argument
471 if (cfg->device_family != IWL_DEVICE_FAMILY_8000) iwl_get_radio_cfg()
478 static int iwl_get_n_hw_addrs(const struct iwl_cfg *cfg, const __le16 *nvm_sw) iwl_get_n_hw_addrs() argument
482 if (cfg->device_family != IWL_DEVICE_FAMILY_8000) iwl_get_n_hw_addrs()
490 static void iwl_set_radio_cfg(const struct iwl_cfg *cfg, iwl_set_radio_cfg() argument
494 if (cfg->device_family != IWL_DEVICE_FAMILY_8000) { iwl_set_radio_cfg()
511 static void iwl_set_hw_address(const struct iwl_cfg *cfg, iwl_set_hw_address() argument
527 const struct iwl_cfg *cfg, iwl_set_hw_address_family_8000()
584 iwl_parse_nvm_data(struct device *dev, const struct iwl_cfg *cfg, iwl_parse_nvm_data() argument
596 if (cfg->device_family != IWL_DEVICE_FAMILY_8000) iwl_parse_nvm_data()
609 data->nvm_version = iwl_get_nvm_version(cfg, nvm_sw); iwl_parse_nvm_data()
611 radio_cfg = iwl_get_radio_cfg(cfg, nvm_sw, phy_sku); iwl_parse_nvm_data()
612 iwl_set_radio_cfg(cfg, data, radio_cfg); iwl_parse_nvm_data()
618 sku = iwl_get_sku(cfg, nvm_sw, phy_sku); iwl_parse_nvm_data()
628 data->n_hw_addrs = iwl_get_n_hw_addrs(cfg, nvm_sw); iwl_parse_nvm_data()
630 if (cfg->device_family != IWL_DEVICE_FAMILY_8000) { iwl_parse_nvm_data()
643 if (cfg->device_family != IWL_DEVICE_FAMILY_8000) { iwl_parse_nvm_data()
644 iwl_set_hw_address(cfg, data, nvm_hw); iwl_parse_nvm_data()
646 iwl_init_sbands(dev, cfg, data, nvm_sw, iwl_parse_nvm_data()
658 iwl_set_hw_address_family_8000(dev, cfg, data, mac_override, iwl_parse_nvm_data()
661 iwl_init_sbands(dev, cfg, data, regulatory, iwl_parse_nvm_data()
674 const struct iwl_cfg *cfg) iwl_nvm_get_regdom_bw_flags()
679 if (cfg->device_family == IWL_DEVICE_FAMILY_8000) iwl_nvm_get_regdom_bw_flags()
721 iwl_parse_nvm_mcc_info(struct device *dev, const struct iwl_cfg *cfg, iwl_parse_nvm_mcc_info() argument
726 const u8 *nvm_chan = cfg->device_family == IWL_DEVICE_FAMILY_8000 ? iwl_parse_nvm_mcc_info()
735 int max_num_ch = cfg->device_family == IWL_DEVICE_FAMILY_8000 ? iwl_parse_nvm_mcc_info()
795 ch_flags, cfg); iwl_parse_nvm_mcc_info()
210 iwl_get_channel_flags(u8 ch_num, int ch_idx, bool is_5ghz, u16 nvm_flags, const struct iwl_cfg *cfg) iwl_get_channel_flags() argument
526 iwl_set_hw_address_family_8000(struct device *dev, const struct iwl_cfg *cfg, struct iwl_nvm_data *data, const __le16 *mac_override, const __le16 *nvm_hw, u32 mac_addr0, u32 mac_addr1) iwl_set_hw_address_family_8000() argument
672 iwl_nvm_get_regdom_bw_flags(const u8 *nvm_chan, int ch_idx, u16 nvm_flags, const struct iwl_cfg *cfg) iwl_nvm_get_regdom_bw_flags() argument
H A Diwl-5000.c103 .valid_tx_ant = ANT_ABC, /* .cfg overwrite */
104 .valid_rx_ant = ANT_ABC, /* .cfg overwrite */
111 .valid_tx_ant = ANT_B, /* .cfg overwrite */
112 .valid_rx_ant = ANT_AB, /* .cfg overwrite */
119 .valid_tx_ant = ANT_B, /* .cfg overwrite */
120 .valid_rx_ant = ANT_AB, /* .cfg overwrite */
126 .valid_tx_ant = ANT_B, /* .cfg overwrite */
127 .valid_rx_ant = ANT_AB, /* .cfg overwrite */
H A Diwl-eeprom-parse.c476 static void iwl_init_band_reference(const struct iwl_cfg *cfg, iwl_init_band_reference() argument
482 u32 offset = cfg->eeprom_params->regulatory_bands[eeprom_band - 1]; iwl_init_band_reference()
570 static int iwl_init_channel_map(struct device *dev, const struct iwl_cfg *cfg, iwl_init_channel_map() argument
586 iwl_init_band_reference(cfg, eeprom, eeprom_size, band, iwl_init_channel_map()
650 if (cfg->eeprom_params->enhanced_txpower) { iwl_init_channel_map()
672 if (cfg->eeprom_params->regulatory_bands[5] == iwl_init_channel_map()
674 cfg->eeprom_params->regulatory_bands[6] == iwl_init_channel_map()
682 iwl_init_band_reference(cfg, eeprom, eeprom_size, band, iwl_init_channel_map()
734 void iwl_init_ht_hw_capab(const struct iwl_cfg *cfg, iwl_init_ht_hw_capab() argument
743 if (cfg->rx_with_siso_diversity) iwl_init_ht_hw_capab()
748 if (!(data->sku_cap_11n_enable) || !cfg->ht_params) { iwl_init_ht_hw_capab()
759 if (cfg->ht_params->stbc) { iwl_init_ht_hw_capab()
766 if (cfg->ht_params->ldpc) iwl_init_ht_hw_capab()
772 ht_info->ampdu_factor = cfg->max_ht_ampdu_exponent; iwl_init_ht_hw_capab()
781 if (cfg->ht_params->ht_greenfield_support) iwl_init_ht_hw_capab()
787 if (cfg->ht_params->ht40_bands & BIT(band)) { iwl_init_ht_hw_capab()
807 static void iwl_init_sbands(struct device *dev, const struct iwl_cfg *cfg, iwl_init_sbands() argument
811 int n_channels = iwl_init_channel_map(dev, cfg, data, iwl_init_sbands()
822 iwl_init_ht_hw_capab(cfg, data, &sband->ht_cap, IEEE80211_BAND_2GHZ, iwl_init_sbands()
831 iwl_init_ht_hw_capab(cfg, data, &sband->ht_cap, IEEE80211_BAND_5GHZ, iwl_init_sbands()
842 iwl_parse_eeprom_data(struct device *dev, const struct iwl_cfg *cfg, iwl_parse_eeprom_data() argument
849 if (WARN_ON(!cfg || !cfg->eeprom_params)) iwl_parse_eeprom_data()
910 if (cfg->valid_tx_ant) iwl_parse_eeprom_data()
911 data->valid_tx_ant = cfg->valid_tx_ant; iwl_parse_eeprom_data()
912 if (cfg->valid_rx_ant) iwl_parse_eeprom_data()
913 data->valid_rx_ant = cfg->valid_rx_ant; iwl_parse_eeprom_data()
921 iwl_init_sbands(dev, cfg, data, eeprom, eeprom_size); iwl_parse_eeprom_data()
934 if (data->nvm_version >= trans->cfg->nvm_ver || iwl_nvm_check_version()
935 data->calib_version >= trans->cfg->nvm_calib_ver) { iwl_nvm_check_version()
943 data->nvm_version, trans->cfg->nvm_ver, iwl_nvm_check_version()
944 data->calib_version, trans->cfg->nvm_calib_ver); iwl_nvm_check_version()
/linux-4.1.27/arch/x86/include/asm/
H A Dx2apic.h25 unsigned long cfg = __prepare_ICR(0, vector, dest); __x2apic_send_IPI_dest() local
26 native_x2apic_icr_write(cfg, apicid); __x2apic_send_IPI_dest()
H A Dipi.h70 unsigned int cfg; __default_send_IPI_shortcut() local
80 cfg = __prepare_ICR(shortcut, vector, dest); __default_send_IPI_shortcut()
85 native_apic_mem_write(APIC_ICR, cfg); __default_send_IPI_shortcut()
95 unsigned long cfg; __default_send_IPI_dest_field() local
108 cfg = __prepare_ICR2(mask); __default_send_IPI_dest_field()
109 native_apic_mem_write(APIC_ICR2, cfg); __default_send_IPI_dest_field()
114 cfg = __prepare_ICR(0, vector, dest); __default_send_IPI_dest_field()
119 native_apic_mem_write(APIC_ICR, cfg); __default_send_IPI_dest_field()
/linux-4.1.27/include/net/
H A Dudp_tunnel.h37 int udp_sock_create4(struct net *net, struct udp_port_cfg *cfg,
41 int udp_sock_create6(struct net *net, struct udp_port_cfg *cfg,
44 static inline int udp_sock_create6(struct net *net, struct udp_port_cfg *cfg, udp_sock_create6() argument
52 struct udp_port_cfg *cfg, udp_sock_create()
55 if (cfg->family == AF_INET) udp_sock_create()
56 return udp_sock_create4(net, cfg, sockp); udp_sock_create()
58 if (cfg->family == AF_INET6) udp_sock_create()
59 return udp_sock_create6(net, cfg, sockp); udp_sock_create()
51 udp_sock_create(struct net *net, struct udp_port_cfg *cfg, struct socket **sockp) udp_sock_create() argument
/linux-4.1.27/net/netfilter/
H A Dxt_hashlimit.c101 struct hashlimit_cfg1 cfg; /* config */ member in struct:xt_hashlimit_htable
133 * Instead of returning hash % ht->cfg.size (implying a divide) hash_dst()
134 * we return the high 32 bits of the (hash * ht->cfg.size) that will hash_dst()
135 * give results between [0 and cfg.size-1] and same hash distribution, hash_dst()
138 return reciprocal_scale(hash, ht->cfg.size); hash_dst()
184 if (ht->cfg.max && ht->count >= ht->cfg.max) { dsthash_alloc_init()
186 net_err_ratelimited("max count of %u reached\n", ht->cfg.max); dsthash_alloc_init()
226 if (minfo->cfg.size) { htable_create()
227 size = minfo->cfg.size; htable_create()
244 memcpy(&hinfo->cfg, &minfo->cfg, sizeof(hinfo->cfg)); htable_create()
245 hinfo->cfg.size = size; htable_create()
246 if (hinfo->cfg.max == 0) htable_create()
247 hinfo->cfg.max = 8 * hinfo->cfg.size; htable_create()
248 else if (hinfo->cfg.max < hinfo->cfg.size) htable_create()
249 hinfo->cfg.max = hinfo->cfg.size; htable_create()
251 for (i = 0; i < hinfo->cfg.size; i++) htable_create()
278 msecs_to_jiffies(hinfo->cfg.gc_interval)); htable_create()
303 for (i = 0; i < ht->cfg.size; i++) { htable_selective_cleanup()
326 &ht->gc_work, msecs_to_jiffies(ht->cfg.gc_interval)); htable_gc()
475 if (hinfo->cfg.mode & XT_HASHLIMIT_BYTES) { rateinfo_init()
477 dh->rateinfo.cost = user2credits_byte(hinfo->cfg.avg); rateinfo_init()
478 dh->rateinfo.credit_cap = hinfo->cfg.burst; rateinfo_init()
480 dh->rateinfo.credit = user2credits(hinfo->cfg.avg * rateinfo_init()
481 hinfo->cfg.burst); rateinfo_init()
482 dh->rateinfo.cost = user2credits(hinfo->cfg.avg); rateinfo_init()
530 if (hinfo->cfg.mode & XT_HASHLIMIT_HASH_DIP) hashlimit_init_dst()
532 hinfo->cfg.dstmask); hashlimit_init_dst()
533 if (hinfo->cfg.mode & XT_HASHLIMIT_HASH_SIP) hashlimit_init_dst()
535 hinfo->cfg.srcmask); hashlimit_init_dst()
537 if (!(hinfo->cfg.mode & hashlimit_init_dst()
547 if (hinfo->cfg.mode & XT_HASHLIMIT_HASH_DIP) { hashlimit_init_dst()
550 hashlimit_ipv6_mask(dst->ip6.dst, hinfo->cfg.dstmask); hashlimit_init_dst()
552 if (hinfo->cfg.mode & XT_HASHLIMIT_HASH_SIP) { hashlimit_init_dst()
555 hashlimit_ipv6_mask(dst->ip6.src, hinfo->cfg.srcmask); hashlimit_init_dst()
558 if (!(hinfo->cfg.mode & hashlimit_init_dst()
583 if (hinfo->cfg.mode & XT_HASHLIMIT_HASH_SPT) hashlimit_init_dst()
585 if (hinfo->cfg.mode & XT_HASHLIMIT_HASH_DPT) hashlimit_init_dst()
628 dh->expires = now + msecs_to_jiffies(hinfo->cfg.expire); hashlimit_mt()
629 rateinfo_recalc(dh, now, hinfo->cfg.mode); hashlimit_mt()
631 dh->expires = jiffies + msecs_to_jiffies(hinfo->cfg.expire); hashlimit_mt()
636 dh->expires = now + msecs_to_jiffies(hinfo->cfg.expire); hashlimit_mt()
637 rateinfo_recalc(dh, now, hinfo->cfg.mode); hashlimit_mt()
640 if (info->cfg.mode & XT_HASHLIMIT_BYTES) hashlimit_mt()
650 return !(info->cfg.mode & XT_HASHLIMIT_INVERT); hashlimit_mt()
656 return info->cfg.mode & XT_HASHLIMIT_INVERT; hashlimit_mt()
669 if (info->cfg.gc_interval == 0 || info->cfg.expire == 0) hashlimit_mt_check()
674 if (info->cfg.srcmask > 32 || info->cfg.dstmask > 32) hashlimit_mt_check()
677 if (info->cfg.srcmask > 128 || info->cfg.dstmask > 128) hashlimit_mt_check()
681 if (info->cfg.mode & ~XT_HASHLIMIT_ALL) { hashlimit_mt_check()
683 info->cfg.mode); hashlimit_mt_check()
688 if (info->cfg.mode & XT_HASHLIMIT_BYTES) { hashlimit_mt_check()
689 if (user2credits_byte(info->cfg.avg) == 0) { hashlimit_mt_check()
690 pr_info("overflow, rate too high: %u\n", info->cfg.avg); hashlimit_mt_check()
693 } else if (info->cfg.burst == 0 || hashlimit_mt_check()
694 user2credits(info->cfg.avg * info->cfg.burst) < hashlimit_mt_check()
695 user2credits(info->cfg.avg)) { hashlimit_mt_check()
697 info->cfg.avg, info->cfg.burst); hashlimit_mt_check()
754 if (*pos >= htable->cfg.size)
771 if (*pos >= htable->cfg.size) { dl_seq_next()
796 rateinfo_recalc(ent, jiffies, ht->cfg.mode); dl_seq_real_show()
H A Dxt_RATEEST.c99 } cfg; xt_rateest_tg_checkentry() local
134 cfg.opt.nla_len = nla_attr_size(sizeof(cfg.est)); xt_rateest_tg_checkentry()
135 cfg.opt.nla_type = TCA_STATS_RATE_EST; xt_rateest_tg_checkentry()
136 cfg.est.interval = info->interval; xt_rateest_tg_checkentry()
137 cfg.est.ewma_log = info->ewma_log; xt_rateest_tg_checkentry()
140 &est->lock, &cfg.opt); xt_rateest_tg_checkentry()
/linux-4.1.27/sound/soc/sh/rcar/
H A Dcore.c769 struct rsnd_kctrl_cfg *cfg = kcontrol_to_cfg(kctrl); rsnd_kctrl_info() local
771 if (cfg->texts) { rsnd_kctrl_info()
773 uinfo->count = cfg->size; rsnd_kctrl_info()
774 uinfo->value.enumerated.items = cfg->max; rsnd_kctrl_info()
775 if (uinfo->value.enumerated.item >= cfg->max) rsnd_kctrl_info()
776 uinfo->value.enumerated.item = cfg->max - 1; rsnd_kctrl_info()
778 cfg->texts[uinfo->value.enumerated.item], rsnd_kctrl_info()
781 uinfo->count = cfg->size; rsnd_kctrl_info()
783 uinfo->value.integer.max = cfg->max; rsnd_kctrl_info()
784 uinfo->type = (cfg->max == 1) ? rsnd_kctrl_info()
795 struct rsnd_kctrl_cfg *cfg = kcontrol_to_cfg(kctrl); rsnd_kctrl_get() local
798 for (i = 0; i < cfg->size; i++) rsnd_kctrl_get()
799 if (cfg->texts) rsnd_kctrl_get()
800 uc->value.enumerated.item[i] = cfg->val[i]; rsnd_kctrl_get()
802 uc->value.integer.value[i] = cfg->val[i]; rsnd_kctrl_get()
811 struct rsnd_kctrl_cfg *cfg = kcontrol_to_cfg(kctrl); rsnd_kctrl_put() local
814 for (i = 0; i < cfg->size; i++) { rsnd_kctrl_put()
815 if (cfg->texts) { rsnd_kctrl_put()
816 change |= (uc->value.enumerated.item[i] != cfg->val[i]); rsnd_kctrl_put()
817 cfg->val[i] = uc->value.enumerated.item[i]; rsnd_kctrl_put()
819 change |= (uc->value.integer.value[i] != cfg->val[i]); rsnd_kctrl_put()
820 cfg->val[i] = uc->value.integer.value[i]; rsnd_kctrl_put()
825 cfg->update(mod); rsnd_kctrl_put()
833 struct rsnd_kctrl_cfg *cfg, __rsnd_kctrl_new()
844 .private_value = (unsigned long)cfg, __rsnd_kctrl_new()
858 cfg->update = update; __rsnd_kctrl_new()
859 cfg->card = card; __rsnd_kctrl_new()
860 cfg->kctrl = kctrl; __rsnd_kctrl_new()
865 void _rsnd_kctrl_remove(struct rsnd_kctrl_cfg *cfg) _rsnd_kctrl_remove() argument
867 snd_ctl_remove(cfg->card, cfg->kctrl); _rsnd_kctrl_remove()
877 _cfg->cfg.max = max; rsnd_kctrl_new_m()
878 _cfg->cfg.size = RSND_DVC_CHANNELS; rsnd_kctrl_new_m()
879 _cfg->cfg.val = _cfg->val; rsnd_kctrl_new_m()
880 return __rsnd_kctrl_new(mod, rtd, name, &_cfg->cfg, update); rsnd_kctrl_new_m()
890 _cfg->cfg.max = max; rsnd_kctrl_new_s()
891 _cfg->cfg.size = 1; rsnd_kctrl_new_s()
892 _cfg->cfg.val = &_cfg->val; rsnd_kctrl_new_s()
893 return __rsnd_kctrl_new(mod, rtd, name, &_cfg->cfg, update); rsnd_kctrl_new_s()
904 _cfg->cfg.max = max; rsnd_kctrl_new_e()
905 _cfg->cfg.size = 1; rsnd_kctrl_new_e()
906 _cfg->cfg.val = &_cfg->val; rsnd_kctrl_new_e()
907 _cfg->cfg.texts = texts; rsnd_kctrl_new_e()
908 return __rsnd_kctrl_new(mod, rtd, name, &_cfg->cfg, update); rsnd_kctrl_new_e()
830 __rsnd_kctrl_new(struct rsnd_mod *mod, struct snd_soc_pcm_runtime *rtd, const unsigned char *name, struct rsnd_kctrl_cfg *cfg, void (*update)(struct rsnd_mod *mod)) __rsnd_kctrl_new() argument
/linux-4.1.27/drivers/crypto/qat/qat_common/
H A Dadf_cfg.c137 accel_dev->cfg = dev_cfg_data; adf_cfg_dev_add()
146 "Failed to create qat cfg debugfs entry.\n"); adf_cfg_dev_add()
148 accel_dev->cfg = NULL; adf_cfg_dev_add()
159 struct adf_cfg_device_data *dev_cfg_data = accel_dev->cfg; adf_cfg_del_all()
179 struct adf_cfg_device_data *dev_cfg_data = accel_dev->cfg; adf_cfg_dev_remove()
186 accel_dev->cfg = NULL; adf_cfg_dev_remove()
238 struct adf_cfg_device_data *cfg = accel_dev->cfg; adf_cfg_sec_find() local
241 list_for_each(list, &cfg->sec_list) { adf_cfg_sec_find()
286 struct adf_cfg_device_data *cfg = accel_dev->cfg; adf_cfg_add_key_value_param() local
314 down_write(&cfg->lock); adf_cfg_add_key_value_param()
316 up_write(&cfg->lock); adf_cfg_add_key_value_param()
334 struct adf_cfg_device_data *cfg = accel_dev->cfg; adf_cfg_section_add() local
346 down_write(&cfg->lock); adf_cfg_section_add()
347 list_add_tail(&sec->list, &cfg->sec_list); adf_cfg_section_add()
348 up_write(&cfg->lock); adf_cfg_section_add()
357 struct adf_cfg_device_data *cfg = accel_dev->cfg; adf_cfg_get_param_value() local
360 down_read(&cfg->lock); adf_cfg_get_param_value()
362 up_read(&cfg->lock); adf_cfg_get_param_value()
/linux-4.1.27/drivers/media/dvb-frontends/
H A Ddib3000mc.c34 struct dib3000mc_config *cfg; member in struct:dib3000mc_state
133 u16 reg_51, reg_52 = state->cfg->agc->setup & 0xfefb; dib3000mc_setup_pwm_state()
134 if (state->cfg->pwm3_inversion) { dib3000mc_setup_pwm_state()
144 if (state->cfg->use_pwm3) dib3000mc_setup_pwm_state()
202 if ((state->cfg->output_mpeg2_in_188_bytes)) dib3000mc_set_output_mode()
295 struct dibx000_agc_config *agc = state->cfg->agc; dib3000mc_init()
305 if (state->cfg->mobile_mode) { dib3000mc_init()
331 if (state->cfg->phase_noise_mode == 0) dib3000mc_init()
348 dib3000mc_write_word(state, 36, state->cfg->max_time); dib3000mc_init()
349 dib3000mc_write_word(state, 37, (state->cfg->agc_command1 << 13) | (state->cfg->agc_command2 << 12) | (0x1d << 0)); dib3000mc_init()
350 dib3000mc_write_word(state, 38, state->cfg->pwm3_value); dib3000mc_init()
351 dib3000mc_write_word(state, 39, state->cfg->ln_adc_level); dib3000mc_init()
388 // Spurious rm cfg dib3000mc_init()
394 // Fec cfg dib3000mc_init()
425 u16 cfg[4] = { 0 },reg; dib3000mc_set_adp_cfg() local
428 cfg[0] = 0x099a; cfg[1] = 0x7fae; cfg[2] = 0x0333; cfg[3] = 0x7ff0; dib3000mc_set_adp_cfg()
431 cfg[0] = 0x023d; cfg[1] = 0x7fdf; cfg[2] = 0x00a4; cfg[3] = 0x7ff0; dib3000mc_set_adp_cfg()
434 cfg[0] = 0x0148; cfg[1] = 0x7ff0; cfg[2] = 0x00a4; cfg[3] = 0x7ff8; dib3000mc_set_adp_cfg()
438 dib3000mc_write_word(state, reg, cfg[reg - 129]); dib3000mc_set_adp_cfg()
458 //Default cfg isi offset adp dib3000mc_set_channel_cfg()
546 dib3000mc_set_impulse_noise(state, state->cfg->impulse_noise_mode, ch->transmission_mode); dib3000mc_set_channel_cfg()
814 void dib3000mc_set_config(struct dvb_frontend *fe, struct dib3000mc_config *cfg) dib3000mc_set_config() argument
817 state->cfg = cfg; dib3000mc_set_config()
821 int dib3000mc_i2c_enumeration(struct i2c_adapter *i2c, int no_of_demods, u8 default_addr, struct dib3000mc_config cfg[]) dib3000mc_i2c_enumeration() argument
836 dmcst->cfg = &cfg[k]; dib3000mc_i2c_enumeration()
858 dmcst->cfg = &cfg[k]; dib3000mc_i2c_enumeration()
874 struct dvb_frontend * dib3000mc_attach(struct i2c_adapter *i2c_adap, u8 i2c_addr, struct dib3000mc_config *cfg) dib3000mc_attach() argument
882 st->cfg = cfg; dib3000mc_attach()
H A Ddib3000mc.h47 struct dib3000mc_config *cfg);
50 struct dib3000mc_config cfg[]);
57 struct dib3000mc_config *cfg) dib3000mc_attach()
66 struct dib3000mc_config cfg[]) dib3000mc_i2c_enumeration()
56 dib3000mc_attach(struct i2c_adapter *i2c_adap, u8 i2c_addr, struct dib3000mc_config *cfg) dib3000mc_attach() argument
64 dib3000mc_i2c_enumeration(struct i2c_adapter *i2c, int no_of_demods, u8 default_addr, struct dib3000mc_config cfg[]) dib3000mc_i2c_enumeration() argument
H A Ddib0070.c57 const struct dib0070_config *cfg; member in struct:dib0070_state
97 state->msg[0].addr = state->cfg->i2c_address; dib0070_read_reg()
101 state->msg[1].addr = state->cfg->i2c_address; dib0070_read_reg()
130 state->msg[0].addr = state->cfg->i2c_address; dib0070_write_reg()
146 state->cfg->sleep(state->fe, 0); \
147 if (state->cfg->reset) { \
148 state->cfg->reset(state->fe,1); msleep(10); \
149 state->cfg->reset(state->fe,0); msleep(10); \
260 if (state->cfg->vga_filter != 0) { dib0070_ctrl_agc_filter()
261 dib0070_write_reg(state, 0x1a, state->cfg->vga_filter); dib0070_ctrl_agc_filter()
262 dprintk("vga filter register is set to %x", state->cfg->vga_filter); dib0070_ctrl_agc_filter()
349 u32 freq = fe->dtv_property_cache.frequency/1000 + (band == BAND_VHF ? state->cfg->freq_offset_khz_vhf : state->cfg->freq_offset_khz_uhf); dib0070_tune_digital()
370 if (state->cfg->flip_chip) dib0070_tune_digital()
403 REFDIV = (u8) ((state->cfg->clock_khz + 9999) / 10000); dib0070_tune_digital()
406 REFDIV = (u8) ((state->cfg->clock_khz) / 1000); dib0070_tune_digital()
409 REFDIV = (u8) (state->cfg->clock_khz / 10000); dib0070_tune_digital()
412 FREF = state->cfg->clock_khz / REFDIV; dib0070_tune_digital()
481 const struct dib0070_wbd_gain_cfg *tmp = state->cfg->wbd_gain; dib0070_tune_digital()
540 if (state->cfg->sleep) dib0070_wakeup()
541 state->cfg->sleep(fe, 0); dib0070_wakeup()
548 if (state->cfg->sleep) dib0070_sleep()
549 state->cfg->sleep(fe, 1); dib0070_sleep()
637 const struct dib0070_wbd_gain_cfg *tmp = state->cfg->wbd_gain; dib0070_wbd_offset()
688 if (state->cfg->force_crystal_mode != 0) dib0070_reset()
689 r = state->cfg->force_crystal_mode; dib0070_reset()
690 else if (state->cfg->clock_khz >= 24000) dib0070_reset()
696 r |= state->cfg->osc_buffer_state << 3; dib0070_reset()
699 dib0070_write_reg(state, 0x1f, (1 << 8) | ((state->cfg->clock_pad_drive & 0xf) << 5)); dib0070_reset()
701 if (state->cfg->invert_iq) { dib0070_reset()
709 dib0070_set_ctrl_lo5(fe, 5, 4, state->cfg->charge_pump, state->cfg->enable_third_order_filter); dib0070_reset()
750 struct dvb_frontend *dib0070_attach(struct dvb_frontend *fe, struct i2c_adapter *i2c, struct dib0070_config *cfg) dib0070_attach() argument
756 state->cfg = cfg; dib0070_attach()
/linux-4.1.27/net/l2tp/
H A Dl2tp_netlink.c175 struct l2tp_tunnel_cfg cfg = { 0, }; l2tp_nl_cmd_tunnel_create() local
201 cfg.encap = nla_get_u16(info->attrs[L2TP_ATTR_ENCAP_TYPE]); l2tp_nl_cmd_tunnel_create()
210 cfg.local_ip6 = nla_data( l2tp_nl_cmd_tunnel_create()
212 cfg.peer_ip6 = nla_data( l2tp_nl_cmd_tunnel_create()
218 cfg.local_ip.s_addr = nla_get_in_addr( l2tp_nl_cmd_tunnel_create()
220 cfg.peer_ip.s_addr = nla_get_in_addr( l2tp_nl_cmd_tunnel_create()
227 cfg.local_udp_port = nla_get_u16(info->attrs[L2TP_ATTR_UDP_SPORT]); l2tp_nl_cmd_tunnel_create()
229 cfg.peer_udp_port = nla_get_u16(info->attrs[L2TP_ATTR_UDP_DPORT]); l2tp_nl_cmd_tunnel_create()
231 cfg.use_udp_checksums = nla_get_flag(info->attrs[L2TP_ATTR_UDP_CSUM]); l2tp_nl_cmd_tunnel_create()
235 cfg.udp6_zero_tx_checksums = nla_get_flag(info->attrs[L2TP_ATTR_UDP_ZERO_CSUM6_TX]); l2tp_nl_cmd_tunnel_create()
237 cfg.udp6_zero_rx_checksums = nla_get_flag(info->attrs[L2TP_ATTR_UDP_ZERO_CSUM6_RX]); l2tp_nl_cmd_tunnel_create()
242 cfg.debug = nla_get_u32(info->attrs[L2TP_ATTR_DEBUG]); l2tp_nl_cmd_tunnel_create()
251 switch (cfg.encap) { l2tp_nl_cmd_tunnel_create()
255 peer_tunnel_id, &cfg, &tunnel); l2tp_nl_cmd_tunnel_create()
487 struct l2tp_session_cfg cfg = { 0, }; l2tp_nl_cmd_session_create() local
522 cfg.pw_type = nla_get_u16(info->attrs[L2TP_ATTR_PW_TYPE]); l2tp_nl_cmd_session_create()
523 if (cfg.pw_type >= __L2TP_PWTYPE_MAX) { l2tp_nl_cmd_session_create()
530 cfg.offset = nla_get_u16(info->attrs[L2TP_ATTR_OFFSET]); l2tp_nl_cmd_session_create()
533 cfg.data_seq = nla_get_u8(info->attrs[L2TP_ATTR_DATA_SEQ]); l2tp_nl_cmd_session_create()
535 cfg.l2specific_type = L2TP_L2SPECTYPE_DEFAULT; l2tp_nl_cmd_session_create()
537 cfg.l2specific_type = nla_get_u8(info->attrs[L2TP_ATTR_L2SPEC_TYPE]); l2tp_nl_cmd_session_create()
539 cfg.l2specific_len = 4; l2tp_nl_cmd_session_create()
541 cfg.l2specific_len = nla_get_u8(info->attrs[L2TP_ATTR_L2SPEC_LEN]); l2tp_nl_cmd_session_create()
549 cfg.cookie_len = len; l2tp_nl_cmd_session_create()
550 memcpy(&cfg.cookie[0], nla_data(info->attrs[L2TP_ATTR_COOKIE]), len); l2tp_nl_cmd_session_create()
558 cfg.peer_cookie_len = len; l2tp_nl_cmd_session_create()
559 memcpy(&cfg.peer_cookie[0], nla_data(info->attrs[L2TP_ATTR_PEER_COOKIE]), len); l2tp_nl_cmd_session_create()
562 cfg.ifname = nla_data(info->attrs[L2TP_ATTR_IFNAME]); l2tp_nl_cmd_session_create()
565 cfg.vlan_id = nla_get_u16(info->attrs[L2TP_ATTR_VLAN_ID]); l2tp_nl_cmd_session_create()
569 cfg.debug = nla_get_u32(info->attrs[L2TP_ATTR_DEBUG]); l2tp_nl_cmd_session_create()
572 cfg.recv_seq = nla_get_u8(info->attrs[L2TP_ATTR_RECV_SEQ]); l2tp_nl_cmd_session_create()
575 cfg.send_seq = nla_get_u8(info->attrs[L2TP_ATTR_SEND_SEQ]); l2tp_nl_cmd_session_create()
578 cfg.lns_mode = nla_get_u8(info->attrs[L2TP_ATTR_LNS_MODE]); l2tp_nl_cmd_session_create()
581 cfg.reorder_timeout = nla_get_msecs(info->attrs[L2TP_ATTR_RECV_TIMEOUT]); l2tp_nl_cmd_session_create()
584 cfg.mtu = nla_get_u16(info->attrs[L2TP_ATTR_MTU]); l2tp_nl_cmd_session_create()
587 cfg.mru = nla_get_u16(info->attrs[L2TP_ATTR_MRU]); l2tp_nl_cmd_session_create()
589 if ((l2tp_nl_cmd_ops[cfg.pw_type] == NULL) || l2tp_nl_cmd_session_create()
590 (l2tp_nl_cmd_ops[cfg.pw_type]->session_create == NULL)) { l2tp_nl_cmd_session_create()
596 switch (cfg.pw_type) { l2tp_nl_cmd_session_create()
617 if (l2tp_nl_cmd_ops[cfg.pw_type]->session_create) l2tp_nl_cmd_session_create()
618 ret = (*l2tp_nl_cmd_ops[cfg.pw_type]->session_create)(net, tunnel_id, l2tp_nl_cmd_session_create()
619 session_id, peer_session_id, &cfg); l2tp_nl_cmd_session_create()
/linux-4.1.27/drivers/scsi/esas2r/
H A Desas2r_vda.c210 || vi->cmd.cfg.data_length == 0) { esas2r_process_vda_ioctl()
215 if (vi->cmd.cfg.cfg_func == VDA_CFG_INIT) { esas2r_process_vda_ioctl()
220 rq->vrq->cfg.sub_func = vi->cmd.cfg.cfg_func; esas2r_process_vda_ioctl()
221 rq->vrq->cfg.length = cpu_to_le32(vi->cmd.cfg.data_length); esas2r_process_vda_ioctl()
223 if (vi->cmd.cfg.cfg_func == VDA_CFG_GET_INIT) { esas2r_process_vda_ioctl()
224 memcpy(&rq->vrq->cfg.data, esas2r_process_vda_ioctl()
225 &vi->cmd.cfg.data, esas2r_process_vda_ioctl()
226 vi->cmd.cfg.data_length); esas2r_process_vda_ioctl()
228 esas2r_nuxi_cfg_data(rq->vrq->cfg.sub_func, esas2r_process_vda_ioctl()
229 &rq->vrq->cfg.data); esas2r_process_vda_ioctl()
302 if (vi->cmd.cfg.cfg_func == VDA_CFG_GET_INIT) { esas2r_complete_vda_ioctl()
303 struct atto_ioctl_vda_cfg_cmd *cfg = &vi->cmd.cfg; esas2r_complete_vda_ioctl() local
305 char buf[sizeof(cfg->data.init.fw_release) + 1]; esas2r_complete_vda_ioctl()
307 cfg->data_length = esas2r_complete_vda_ioctl()
309 cfg->data.init.vda_version = esas2r_complete_vda_ioctl()
311 cfg->data.init.fw_build = rsp->fw_build; esas2r_complete_vda_ioctl()
317 memcpy(&cfg->data.init.fw_release, buf, esas2r_complete_vda_ioctl()
318 sizeof(cfg->data.init.fw_release)); esas2r_complete_vda_ioctl()
320 if (LOWORD(LOBYTE(cfg->data.init.fw_build)) == 'A') esas2r_complete_vda_ioctl()
321 cfg->data.init.fw_version = esas2r_complete_vda_ioctl()
322 cfg->data.init.fw_build; esas2r_complete_vda_ioctl()
324 cfg->data.init.fw_version = esas2r_complete_vda_ioctl()
325 cfg->data.init.fw_release; esas2r_complete_vda_ioctl()
327 esas2r_nuxi_cfg_data(rq->vrq->cfg.sub_func, esas2r_complete_vda_ioctl()
328 &vi->cmd.cfg.data); esas2r_complete_vda_ioctl()
488 struct atto_vda_cfg_req *vrq = &rq->vrq->cfg; esas2r_build_cfg_req()
/linux-4.1.27/drivers/media/usb/dvb-usb-v2/
H A Dmxl111sf-tuner.c39 struct mxl111sf_tuner_config *cfg; member in struct:mxl111sf_tuner_state
50 return (state->cfg->read_reg) ? mxl111sf_tuner_read_reg()
51 state->cfg->read_reg(state->mxl_state, addr, data) : mxl111sf_tuner_read_reg()
58 return (state->cfg->write_reg) ? mxl111sf_tuner_write_reg()
59 state->cfg->write_reg(state->mxl_state, addr, data) : mxl111sf_tuner_write_reg()
66 return (state->cfg->program_regs) ? mxl111sf_tuner_program_regs()
67 state->cfg->program_regs(state->mxl_state, ctrl_reg_info) : mxl111sf_tuner_program_regs()
74 return (state->cfg->top_master_ctrl) ? mxl1x1sf_tuner_top_master_ctrl()
75 state->cfg->top_master_ctrl(state->mxl_state, onoff) : mxl1x1sf_tuner_top_master_ctrl()
146 state->cfg->invert_spectrum, state->cfg->if_freq); mxl1x1sf_tuner_set_if_output_freq()
149 ctrl = state->cfg->invert_spectrum; mxl1x1sf_tuner_set_if_output_freq()
151 ctrl |= state->cfg->if_freq; mxl1x1sf_tuner_set_if_output_freq()
163 if (MXL_IF_LO == state->cfg->if_freq) { mxl1x1sf_tuner_set_if_output_freq()
166 } else if (MXL_IF_HI == state->cfg->if_freq) { mxl1x1sf_tuner_set_if_output_freq()
194 state->if_freq = state->cfg->if_freq; mxl1x1sf_tuner_set_if_output_freq()
238 if (state->cfg->ant_hunt) mxl1x1sf_tune_rf()
239 state->cfg->ant_hunt(fe); mxl1x1sf_tune_rf()
493 struct mxl111sf_tuner_config *cfg) mxl111sf_tuner_attach()
504 state->cfg = cfg; mxl111sf_tuner_attach()
491 mxl111sf_tuner_attach(struct dvb_frontend *fe, struct mxl111sf_state *mxl_state, struct mxl111sf_tuner_config *cfg) mxl111sf_tuner_attach() argument
/linux-4.1.27/drivers/mmc/host/
H A Dtmio_mmc_dma.c270 struct dma_slave_config cfg = {}; tmio_mmc_request_dma() local
289 cfg.direction = DMA_MEM_TO_DEV; tmio_mmc_request_dma()
290 cfg.dst_addr = res->start + (CTL_SD_DATA_PORT << host->bus_shift); tmio_mmc_request_dma()
291 cfg.dst_addr_width = host->dma->dma_buswidth; tmio_mmc_request_dma()
292 if (!cfg.dst_addr_width) tmio_mmc_request_dma()
293 cfg.dst_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES; tmio_mmc_request_dma()
294 cfg.src_addr = 0; tmio_mmc_request_dma()
295 ret = dmaengine_slave_config(host->chan_tx, &cfg); tmio_mmc_request_dma()
308 cfg.direction = DMA_DEV_TO_MEM; tmio_mmc_request_dma()
309 cfg.src_addr = cfg.dst_addr + host->pdata->dma_rx_offset; tmio_mmc_request_dma()
310 cfg.src_addr_width = host->dma->dma_buswidth; tmio_mmc_request_dma()
311 if (!cfg.src_addr_width) tmio_mmc_request_dma()
312 cfg.src_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES; tmio_mmc_request_dma()
313 cfg.dst_addr = 0; tmio_mmc_request_dma()
314 ret = dmaengine_slave_config(host->chan_rx, &cfg); tmio_mmc_request_dma()
H A Dbfin_sdh.c171 host->sg_cpu[i].cfg = dma_cfg; sdh_setup_data()
175 "cfg:0x%lx, x_count:0x%lx, x_modify:0x%lx\n", sdh_setup_data()
177 host->sg_cpu[i].cfg, host->sg_cpu[i].x_count, sdh_setup_data()
185 host->sg_cpu[host->dma_len - 1].cfg &= ~(DMAFLOW | NDSIZE); sdh_setup_data()
186 host->sg_cpu[host->dma_len - 1].cfg |= DI_EN; sdh_setup_data()
363 u16 cfg; sdh_set_ios() local
368 cfg = bfin_read_SDH_CFG(); sdh_set_ios()
369 cfg |= MWE; sdh_set_ios()
373 cfg &= ~PD_SDDAT3; sdh_set_ios()
375 cfg |= PUP_SDDAT3; sdh_set_ios()
377 cfg |= SD4E; sdh_set_ios()
382 cfg &= ~PD_SDDAT3; sdh_set_ios()
384 cfg |= PUP_SDDAT3; sdh_set_ios()
386 cfg &= ~SD4E; sdh_set_ios()
390 cfg &= ~PUP_SDDAT3; sdh_set_ios()
392 cfg &= ~SD4E; sdh_set_ios()
394 bfin_write_SDH_CFG(cfg); sdh_set_ios()
414 cfg |= SD_CMD_OD; sdh_set_ios()
416 cfg &= ~SD_CMD_OD; sdh_set_ios()
420 cfg |= PWR_ON; sdh_set_ios()
422 cfg &= ~PWR_ON; sdh_set_ios()
424 bfin_write_SDH_CFG(cfg); sdh_set_ios()
/linux-4.1.27/drivers/media/usb/cx231xx/
H A DMakefile2 cx231xx-y += cx231xx-avcore.o cx231xx-417.o cx231xx-pcb-cfg.o cx231xx-vbi.o
/linux-4.1.27/drivers/net/wireless/orinoco/
H A DMakefile4 orinoco-objs := main.o fw.o hw.o mic.o scan.o wext.o hermes_dld.o hermes.o cfg.o
/linux-4.1.27/arch/unicore32/kernel/
H A Dclock.c101 unsigned long cfg; member in struct:__anon2956
104 {.rate = 25175000, .cfg = 0x00002001, .div = 0x9},
105 {.rate = 31500000, .cfg = 0x00002001, .div = 0x7},
106 {.rate = 40000000, .cfg = 0x00003801, .div = 0x9},
107 {.rate = 49500000, .cfg = 0x00003801, .div = 0x7},
108 {.rate = 65000000, .cfg = 0x00002c01, .div = 0x4},
109 {.rate = 78750000, .cfg = 0x00002400, .div = 0x7},
110 {.rate = 108000000, .cfg = 0x00002c01, .div = 0x2},
111 {.rate = 106500000, .cfg = 0x00003c01, .div = 0x3},
112 {.rate = 50650000, .cfg = 0x00106400, .div = 0x9},
113 {.rate = 61500000, .cfg = 0x00106400, .div = 0xa},
114 {.rate = 85500000, .cfg = 0x00002800, .div = 0x6},
146 pll_vgacfg = vga_clk_table[i].cfg; clk_set_rate()
159 /* set pll vga cfg reg. */ clk_set_rate()
167 /* set div cfg reg. */ clk_set_rate()
203 /* set pll sys cfg reg. */ clk_set_rate()
/linux-4.1.27/drivers/staging/comedi/drivers/
H A Dserial2002.c339 struct config_t *cfg, serial2002_setup_subdevice()
349 if (cfg[j].kind == kind) serial2002_setup_subdevice()
373 if (cfg[j].kind == kind) { serial2002_setup_subdevice()
378 range[j].range.min = cfg[j].min; serial2002_setup_subdevice()
379 range[j].range.max = cfg[j].max; serial2002_setup_subdevice()
383 maxdata_list[chan] = ((long long)1 << cfg[j].bits) - 1; serial2002_setup_subdevice()
397 struct config_t *cfg; serial2002_setup_subdevs() local
403 di_cfg = kcalloc(32, sizeof(*cfg), GFP_KERNEL); serial2002_setup_subdevs()
404 do_cfg = kcalloc(32, sizeof(*cfg), GFP_KERNEL); serial2002_setup_subdevs()
405 ai_cfg = kcalloc(32, sizeof(*cfg), GFP_KERNEL); serial2002_setup_subdevs()
406 ao_cfg = kcalloc(32, sizeof(*cfg), GFP_KERNEL); serial2002_setup_subdevs()
428 cfg = di_cfg; serial2002_setup_subdevs()
431 cfg = do_cfg; serial2002_setup_subdevs()
434 cfg = ai_cfg; serial2002_setup_subdevs()
437 cfg = ao_cfg; serial2002_setup_subdevs()
440 cfg = ai_cfg; serial2002_setup_subdevs()
443 cfg = NULL; serial2002_setup_subdevs()
446 if (!cfg) serial2002_setup_subdevs()
449 cfg[channel].kind = kind; serial2002_setup_subdevs()
453 cfg[channel].bits = S2002_CFG_BITS(data.value); serial2002_setup_subdevs()
471 cfg[channel].min = range; serial2002_setup_subdevs()
473 cfg[channel].max = range; serial2002_setup_subdevs()
488 cfg = di_cfg; serial2002_setup_subdevs()
493 cfg = do_cfg; serial2002_setup_subdevs()
498 cfg = ai_cfg; serial2002_setup_subdevs()
504 cfg = ao_cfg; serial2002_setup_subdevs()
510 cfg = ai_cfg; serial2002_setup_subdevs()
517 if (serial2002_setup_subdevice(s, cfg, range, mapping, kind)) serial2002_setup_subdevs()
338 serial2002_setup_subdevice(struct comedi_subdevice *s, struct config_t *cfg, struct serial2002_range_table_t *range, unsigned char *mapping, int kind) serial2002_setup_subdevice() argument
/linux-4.1.27/drivers/staging/skein/
H A Dskein_base.c28 } cfg; /* config block */ skein_256_init() local
56 cfg.w[0] = skein_swap64(SKEIN_SCHEMA_VER); skein_256_init()
58 cfg.w[1] = skein_swap64(hash_bit_len); skein_256_init()
59 cfg.w[2] = skein_swap64(SKEIN_CFG_TREE_INFO_SEQUENTIAL); skein_256_init()
61 memset(&cfg.w[3], 0, sizeof(cfg) - 3*sizeof(cfg.w[0])); skein_256_init()
66 skein_256_process_block(ctx, cfg.b, 1, SKEIN_CFG_STR_LEN); skein_256_init()
86 } cfg; /* config block */ skein_256_init_ext() local
96 skein_assert(sizeof(cfg.b) >= sizeof(ctx->x)); skein_256_init_ext()
106 /* put result into cfg.b[] */ skein_256_init_ext()
107 skein_256_final_pad(ctx, cfg.b); skein_256_init_ext()
109 memcpy(ctx->x, cfg.b, sizeof(cfg.b)); skein_256_init_ext()
119 /* pre-pad cfg.w[] with zeroes */ skein_256_init_ext()
120 memset(&cfg.w, 0, sizeof(cfg.w)); skein_256_init_ext()
121 cfg.w[0] = skein_swap64(SKEIN_SCHEMA_VER); skein_256_init_ext()
123 cfg.w[1] = skein_swap64(hash_bit_len); skein_256_init_ext()
125 cfg.w[2] = skein_swap64(tree_info); skein_256_init_ext()
128 skein_256_process_block(ctx, cfg.b, 1, SKEIN_CFG_STR_LEN); skein_256_init_ext()
250 } cfg; /* config block */ skein_512_init() local
278 cfg.w[0] = skein_swap64(SKEIN_SCHEMA_VER); skein_512_init()
280 cfg.w[1] = skein_swap64(hash_bit_len); skein_512_init()
281 cfg.w[2] = skein_swap64(SKEIN_CFG_TREE_INFO_SEQUENTIAL); skein_512_init()
283 memset(&cfg.w[3], 0, sizeof(cfg) - 3*sizeof(cfg.w[0])); skein_512_init()
288 skein_512_process_block(ctx, cfg.b, 1, SKEIN_CFG_STR_LEN); skein_512_init()
312 } cfg; /* config block */ skein_512_init_ext() local
322 skein_assert(sizeof(cfg.b) >= sizeof(ctx->x)); skein_512_init_ext()
332 /* put result into cfg.b[] */ skein_512_init_ext()
333 skein_512_final_pad(ctx, cfg.b); skein_512_init_ext()
335 memcpy(ctx->x, cfg.b, sizeof(cfg.b)); skein_512_init_ext()
344 /* pre-pad cfg.w[] with zeroes */ skein_512_init_ext()
345 memset(&cfg.w, 0, sizeof(cfg.w)); skein_512_init_ext()
346 cfg.w[0] = skein_swap64(SKEIN_SCHEMA_VER); skein_512_init_ext()
348 cfg.w[1] = skein_swap64(hash_bit_len); skein_512_init_ext()
350 cfg.w[2] = skein_swap64(tree_info); skein_512_init_ext()
353 skein_512_process_block(ctx, cfg.b, 1, SKEIN_CFG_STR_LEN); skein_512_init_ext()
475 } cfg; /* config block */ skein_1024_init() local
500 cfg.w[0] = skein_swap64(SKEIN_SCHEMA_VER); skein_1024_init()
502 cfg.w[1] = skein_swap64(hash_bit_len); skein_1024_init()
503 cfg.w[2] = skein_swap64(SKEIN_CFG_TREE_INFO_SEQUENTIAL); skein_1024_init()
505 memset(&cfg.w[3], 0, sizeof(cfg) - 3*sizeof(cfg.w[0])); skein_1024_init()
510 skein_1024_process_block(ctx, cfg.b, 1, SKEIN_CFG_STR_LEN); skein_1024_init()
531 } cfg; /* config block */ skein_1024_init_ext() local
541 skein_assert(sizeof(cfg.b) >= sizeof(ctx->x)); skein_1024_init_ext()
551 /* put result into cfg.b[] */ skein_1024_init_ext()
552 skein_1024_final_pad(ctx, cfg.b); skein_1024_init_ext()
554 memcpy(ctx->x, cfg.b, sizeof(cfg.b)); skein_1024_init_ext()
564 /* pre-pad cfg.w[] with zeroes */ skein_1024_init_ext()
565 memset(&cfg.w, 0, sizeof(cfg.w)); skein_1024_init_ext()
566 cfg.w[0] = skein_swap64(SKEIN_SCHEMA_VER); skein_1024_init_ext()
568 cfg.w[1] = skein_swap64(hash_bit_len); skein_1024_init_ext()
570 cfg.w[2] = skein_swap64(tree_info); skein_1024_init_ext()
573 skein_1024_process_block(ctx, cfg.b, 1, SKEIN_CFG_STR_LEN); skein_1024_init_ext()
/linux-4.1.27/arch/sparc/include/asm/
H A Dsbi.h96 int cfg; get_sbi_ctl() local
99 "=r" (cfg) : get_sbi_ctl()
102 return cfg; get_sbi_ctl()
105 static inline void set_sbi_ctl(int devid, int cfgno, int cfg) set_sbi_ctl() argument
108 "r" (cfg), set_sbi_ctl()
/linux-4.1.27/arch/x86/kernel/
H A Dhpet.c247 unsigned long cfg = hpet_readl(HPET_CFG); hpet_stop_counter() local
248 cfg &= ~HPET_CFG_ENABLE; hpet_stop_counter()
249 hpet_writel(cfg, HPET_CFG); hpet_stop_counter()
260 unsigned int cfg = hpet_readl(HPET_CFG); hpet_start_counter() local
261 cfg |= HPET_CFG_ENABLE; hpet_start_counter()
262 hpet_writel(cfg, HPET_CFG); hpet_start_counter()
285 unsigned int cfg = hpet_readl(HPET_CFG); hpet_enable_legacy_int() local
287 cfg |= HPET_CFG_LEGACY; hpet_enable_legacy_int()
288 hpet_writel(cfg, HPET_CFG); hpet_enable_legacy_int()
313 unsigned int cfg, cmp, now; hpet_set_mode() local
323 cfg = hpet_readl(HPET_Tn_CFG(timer)); hpet_set_mode()
324 cfg |= HPET_TN_ENABLE | HPET_TN_PERIODIC | hpet_set_mode()
326 hpet_writel(cfg, HPET_Tn_CFG(timer)); hpet_set_mode()
342 cfg = hpet_readl(HPET_Tn_CFG(timer)); hpet_set_mode()
343 cfg &= ~HPET_TN_PERIODIC; hpet_set_mode()
344 cfg |= HPET_TN_ENABLE | HPET_TN_32BIT; hpet_set_mode()
345 hpet_writel(cfg, HPET_Tn_CFG(timer)); hpet_set_mode()
350 cfg = hpet_readl(HPET_Tn_CFG(timer)); hpet_set_mode()
351 cfg &= ~HPET_TN_ENABLE; hpet_set_mode()
352 hpet_writel(cfg, HPET_Tn_CFG(timer)); hpet_set_mode()
430 unsigned int cfg; hpet_msi_unmask() local
433 cfg = hpet_readl(HPET_Tn_CFG(hdev->num)); hpet_msi_unmask()
434 cfg |= HPET_TN_ENABLE | HPET_TN_FSB; hpet_msi_unmask()
435 hpet_writel(cfg, HPET_Tn_CFG(hdev->num)); hpet_msi_unmask()
441 unsigned int cfg; hpet_msi_mask() local
444 cfg = hpet_readl(HPET_Tn_CFG(hdev->num)); hpet_msi_mask()
445 cfg &= ~(HPET_TN_ENABLE | HPET_TN_FSB); hpet_msi_mask()
446 hpet_writel(cfg, HPET_Tn_CFG(hdev->num)); hpet_msi_mask()
598 unsigned int cfg = hpet_readl(HPET_Tn_CFG(i)); hpet_msi_capability_lookup() local
601 if (!(cfg & HPET_TN_FSB_CAP)) hpet_msi_capability_lookup()
605 if (cfg & HPET_TN_PERIODIC_CAP) hpet_msi_capability_lookup()
794 u32 hpet_period, cfg, id; hpet_enable() local
859 cfg = hpet_readl(HPET_CFG); hpet_enable()
863 *hpet_boot_cfg = cfg; hpet_enable()
866 cfg &= ~(HPET_CFG_ENABLE | HPET_CFG_LEGACY); hpet_enable()
867 hpet_writel(cfg, HPET_CFG); hpet_enable()
868 if (cfg) hpet_enable()
869 pr_warn("HPET: Unrecognized bits %#x set in global cfg\n", hpet_enable()
870 cfg); hpet_enable()
873 cfg = hpet_readl(HPET_Tn_CFG(i)); hpet_enable()
875 hpet_boot_cfg[i + 1] = cfg; hpet_enable()
876 cfg &= ~(HPET_TN_ENABLE | HPET_TN_LEVEL | HPET_TN_FSB); hpet_enable()
877 hpet_writel(cfg, HPET_Tn_CFG(i)); hpet_enable()
878 cfg &= ~(HPET_TN_PERIODIC | HPET_TN_PERIODIC_CAP hpet_enable()
881 if (cfg) hpet_enable()
882 pr_warn("HPET: Unrecognized bits %#x set in cfg#%u\n", hpet_enable()
883 cfg, i); hpet_enable()
956 unsigned int cfg = hpet_readl(HPET_CFG), id, last; hpet_disable() local
959 cfg = *hpet_boot_cfg; hpet_disable()
961 cfg &= ~HPET_CFG_LEGACY; hpet_disable()
964 cfg &= ~HPET_CFG_ENABLE; hpet_disable()
965 hpet_writel(cfg, HPET_CFG); hpet_disable()
1062 unsigned int cfg, cnt, delta; hpet_rtc_timer_init() local
1087 cfg = hpet_readl(HPET_T1_CFG); hpet_rtc_timer_init()
1088 cfg &= ~HPET_TN_PERIODIC; hpet_rtc_timer_init()
1089 cfg |= HPET_TN_ENABLE | HPET_TN_32BIT; hpet_rtc_timer_init()
1090 hpet_writel(cfg, HPET_T1_CFG); hpet_rtc_timer_init()
1100 unsigned long cfg; hpet_disable_rtc_channel() local
1101 cfg = hpet_readl(HPET_T1_CFG); hpet_disable_rtc_channel()
1102 cfg &= ~HPET_TN_ENABLE; hpet_disable_rtc_channel()
1103 hpet_writel(cfg, HPET_T1_CFG); hpet_disable_rtc_channel()
H A Dvsmp_64.c93 unsigned int cap, ctl, cfg; set_vsmp_pv_ops() local
96 cfg = read_pci_config(0, 0x1f, 0, PCI_BASE_ADDRESS_0); set_vsmp_pv_ops()
97 address = early_ioremap(cfg, 8); set_vsmp_pv_ops()
179 unsigned int cfg, topology, node_shift, maxcpus; vsmp_cap_cpus() local
190 cfg = read_pci_config(0, 0x1f, 0, PCI_BASE_ADDRESS_0); vsmp_cap_cpus()
191 address = early_ioremap(cfg + TOPOLOGY_REGISTER_OFFSET, 4); vsmp_cap_cpus()
/linux-4.1.27/arch/arm/plat-samsung/include/plat/
H A Dcpu-freq-core.h171 int (*get_iotiming)(struct s3c_cpufreq_config *cfg,
174 void (*set_iotiming)(struct s3c_cpufreq_config *cfg,
177 int (*calc_iotiming)(struct s3c_cpufreq_config *cfg,
180 int (*calc_freqtable)(struct s3c_cpufreq_config *cfg,
185 struct s3c_cpufreq_config *cfg,
188 void (*set_refresh)(struct s3c_cpufreq_config *cfg);
189 void (*set_fvco)(struct s3c_cpufreq_config *cfg);
190 void (*set_divs)(struct s3c_cpufreq_config *cfg);
191 int (*calc_divs)(struct s3c_cpufreq_config *cfg);
215 extern void s3c2410_cpufreq_setrefresh(struct s3c_cpufreq_config *cfg);
216 extern void s3c2410_set_fvco(struct s3c_cpufreq_config *cfg);
220 struct s3c_cpufreq_config *cfg,
223 extern int s3c2410_iotiming_calc(struct s3c_cpufreq_config *cfg,
226 extern int s3c2410_iotiming_get(struct s3c_cpufreq_config *cfg,
229 extern void s3c2410_iotiming_set(struct s3c_cpufreq_config *cfg,
242 struct s3c_cpufreq_config *cfg,
245 extern int s3c2412_iotiming_get(struct s3c_cpufreq_config *cfg,
248 extern int s3c2412_iotiming_calc(struct s3c_cpufreq_config *cfg,
251 extern void s3c2412_iotiming_set(struct s3c_cpufreq_config *cfg,
/linux-4.1.27/drivers/scsi/bfa/
H A Dbfa_core.c733 CQ_INCR(ci, bfa->iocfc.cfg.drvcfg.num_rspq_elems); bfa_isr_rspq()
981 struct bfa_iocfc_cfg_s *cfg = &iocfc->cfg; bfa_iocfc_send_cfg() local
984 WARN_ON(cfg->fwcfg.num_cqs > BFI_IOC_MAX_CQS); bfa_iocfc_send_cfg()
985 bfa_trc(bfa, cfg->fwcfg.num_cqs); bfa_iocfc_send_cfg()
996 cfg_info->num_cqs = cfg->fwcfg.num_cqs; bfa_iocfc_send_cfg()
998 cfg->fwcfg.num_ioim_reqs)); bfa_iocfc_send_cfg()
999 cfg_info->num_fwtio_reqs = cpu_to_be16(cfg->fwcfg.num_fwtio_reqs); bfa_iocfc_send_cfg()
1005 for (i = 0; i < cfg->fwcfg.num_cqs; i++) { bfa_iocfc_send_cfg()
1011 cpu_to_be16(cfg->drvcfg.num_reqq_elems); bfa_iocfc_send_cfg()
1018 cpu_to_be16(cfg->drvcfg.num_rspq_elems); bfa_iocfc_send_cfg()
1040 bfa_iocfc_init_mem(struct bfa_s *bfa, void *bfad, struct bfa_iocfc_cfg_s *cfg, bfa_iocfc_init_mem() argument
1047 iocfc->cfg = *cfg; bfa_iocfc_init_mem()
1093 bfa_iocfc_mem_claim(struct bfa_s *bfa, struct bfa_iocfc_cfg_s *cfg) bfa_iocfc_mem_claim() argument
1108 per_reqq_sz = BFA_ROUNDUP((cfg->drvcfg.num_reqq_elems * BFI_LMSG_SZ), bfa_iocfc_mem_claim()
1110 per_rspq_sz = BFA_ROUNDUP((cfg->drvcfg.num_rspq_elems * BFI_LMSG_SZ), bfa_iocfc_mem_claim()
1113 for (i = 0; i < cfg->fwcfg.num_cqs; i++) { bfa_iocfc_mem_claim()
1129 for (i = 0; i < cfg->fwcfg.num_cqs; i++) { bfa_iocfc_mem_claim()
1467 bfa_iocfc_meminfo(struct bfa_iocfc_cfg_s *cfg, struct bfa_meminfo_s *meminfo, bfa_iocfc_meminfo() argument
1481 per_reqq_sz = BFA_ROUNDUP((cfg->drvcfg.num_reqq_elems * BFI_LMSG_SZ), bfa_iocfc_meminfo()
1483 per_rspq_sz = BFA_ROUNDUP((cfg->drvcfg.num_rspq_elems * BFI_LMSG_SZ), bfa_iocfc_meminfo()
1486 for (q = 0; q < cfg->fwcfg.num_cqs; q++) { bfa_iocfc_meminfo()
1494 for (q = 0; q < cfg->fwcfg.num_cqs; q++) bfa_iocfc_meminfo()
1513 bfa_iocfc_attach(struct bfa_s *bfa, void *bfad, struct bfa_iocfc_cfg_s *cfg, bfa_iocfc_attach() argument
1530 bfa_iocfc_init_mem(bfa, bfad, cfg, pcidev); bfa_iocfc_attach()
1531 bfa_iocfc_mem_claim(bfa, cfg); bfa_iocfc_attach()
1618 attr->config = iocfc->cfg; bfa_iocfc_get_attr()
1729 * @param[in] cfg - pointer to bfa_ioc_cfg_t. Driver layer should indicate
1753 bfa_cfg_get_meminfo(struct bfa_iocfc_cfg_s *cfg, struct bfa_meminfo_s *meminfo, bfa_cfg_get_meminfo() argument
1766 WARN_ON((cfg == NULL) || (meminfo == NULL)); bfa_cfg_get_meminfo()
1774 bfa_iocfc_meminfo(cfg, meminfo, bfa); bfa_cfg_get_meminfo()
1777 hal_mods[i]->meminfo(cfg, meminfo, bfa); bfa_cfg_get_meminfo()
1785 bfa_flash_meminfo(cfg->drvcfg.min_cfg)); bfa_cfg_get_meminfo()
1788 bfa_phy_meminfo(cfg->drvcfg.min_cfg)); bfa_cfg_get_meminfo()
1790 bfa_fru_meminfo(cfg->drvcfg.min_cfg)); bfa_cfg_get_meminfo()
1803 * @param[in] cfg Pointer to bfa_ioc_cfg_t. Should be same structure
1820 bfa_attach(struct bfa_s *bfa, void *bfad, struct bfa_iocfc_cfg_s *cfg, bfa_attach() argument
1830 WARN_ON((cfg == NULL) || (meminfo == NULL)); bfa_attach()
1851 bfa_iocfc_attach(bfa, bfad, cfg, pcidev); bfa_attach()
1854 hal_mods[i]->attach(bfa, bfad, cfg, pcidev); bfa_attach()
1860 bfa_com_flash_attach(bfa, cfg->drvcfg.min_cfg); bfa_attach()
1862 bfa_com_phy_attach(bfa, cfg->drvcfg.min_cfg); bfa_attach()
1863 bfa_com_fru_attach(bfa, cfg->drvcfg.min_cfg); bfa_attach()
1953 * @param[in] cfg - pointer to bfa_ioc_cfg_t
1962 bfa_cfg_get_default(struct bfa_iocfc_cfg_s *cfg) bfa_cfg_get_default() argument
1964 cfg->fwcfg.num_fabrics = DEF_CFG_NUM_FABRICS; bfa_cfg_get_default()
1965 cfg->fwcfg.num_lports = DEF_CFG_NUM_LPORTS; bfa_cfg_get_default()
1966 cfg->fwcfg.num_rports = DEF_CFG_NUM_RPORTS; bfa_cfg_get_default()
1967 cfg->fwcfg.num_ioim_reqs = DEF_CFG_NUM_IOIM_REQS; bfa_cfg_get_default()
1968 cfg->fwcfg.num_tskim_reqs = DEF_CFG_NUM_TSKIM_REQS; bfa_cfg_get_default()
1969 cfg->fwcfg.num_fcxp_reqs = DEF_CFG_NUM_FCXP_REQS; bfa_cfg_get_default()
1970 cfg->fwcfg.num_uf_bufs = DEF_CFG_NUM_UF_BUFS; bfa_cfg_get_default()
1971 cfg->fwcfg.num_cqs = DEF_CFG_NUM_CQS; bfa_cfg_get_default()
1972 cfg->fwcfg.num_fwtio_reqs = 0; bfa_cfg_get_default()
1974 cfg->drvcfg.num_reqq_elems = DEF_CFG_NUM_REQQ_ELEMS; bfa_cfg_get_default()
1975 cfg->drvcfg.num_rspq_elems = DEF_CFG_NUM_RSPQ_ELEMS; bfa_cfg_get_default()
1976 cfg->drvcfg.num_sgpgs = DEF_CFG_NUM_SGPGS; bfa_cfg_get_default()
1977 cfg->drvcfg.num_sboot_tgts = DEF_CFG_NUM_SBOOT_TGTS; bfa_cfg_get_default()
1978 cfg->drvcfg.num_sboot_luns = DEF_CFG_NUM_SBOOT_LUNS; bfa_cfg_get_default()
1979 cfg->drvcfg.path_tov = BFA_FCPIM_PATHTOV_DEF; bfa_cfg_get_default()
1980 cfg->drvcfg.ioc_recover = BFA_FALSE; bfa_cfg_get_default()
1981 cfg->drvcfg.delay_comp = BFA_FALSE; bfa_cfg_get_default()
1986 bfa_cfg_get_min(struct bfa_iocfc_cfg_s *cfg) bfa_cfg_get_min() argument
1988 bfa_cfg_get_default(cfg); bfa_cfg_get_min()
1989 cfg->fwcfg.num_ioim_reqs = BFA_IOIM_MIN; bfa_cfg_get_min()
1990 cfg->fwcfg.num_tskim_reqs = BFA_TSKIM_MIN; bfa_cfg_get_min()
1991 cfg->fwcfg.num_fcxp_reqs = BFA_FCXP_MIN; bfa_cfg_get_min()
1992 cfg->fwcfg.num_uf_bufs = BFA_UF_MIN; bfa_cfg_get_min()
1993 cfg->fwcfg.num_rports = BFA_RPORT_MIN; bfa_cfg_get_min()
1994 cfg->fwcfg.num_fwtio_reqs = 0; bfa_cfg_get_min()
1996 cfg->drvcfg.num_sgpgs = BFA_SGPG_MIN; bfa_cfg_get_min()
1997 cfg->drvcfg.num_reqq_elems = BFA_REQQ_NELEMS_MIN; bfa_cfg_get_min()
1998 cfg->drvcfg.num_rspq_elems = BFA_RSPQ_NELEMS_MIN; bfa_cfg_get_min()
1999 cfg->drvcfg.min_cfg = BFA_TRUE; bfa_cfg_get_min()
/linux-4.1.27/drivers/iio/adc/
H A Dxilinx-xadc-events.c131 uint16_t cfg, old_cfg; xadc_write_event_config() local
143 ret = _xadc_read_adc_reg(xadc, XADC_REG_CONF1, &cfg); xadc_write_event_config()
147 old_cfg = cfg; xadc_write_event_config()
148 cfg |= XADC_CONF1_ALARM_MASK; xadc_write_event_config()
149 cfg &= ~((xadc->alarm_mask & 0xf0) << 4); /* bram, pint, paux, ddr */ xadc_write_event_config()
150 cfg &= ~((xadc->alarm_mask & 0x08) >> 3); /* ot */ xadc_write_event_config()
151 cfg &= ~((xadc->alarm_mask & 0x07) << 1); /* temp, vccint, vccaux */ xadc_write_event_config()
152 if (old_cfg != cfg) xadc_write_event_config()
153 ret = _xadc_write_adc_reg(xadc, XADC_REG_CONF1, cfg); xadc_write_event_config()
H A Dmen_z188_adc.c89 u32 cfg; men_z188_config_channels() local
97 cfg = readl(addr + i); men_z188_config_channels()
98 cfg &= ~Z188_ADC_GAIN; men_z188_config_channels()
99 cfg |= Z188_MODE_VOLTAGE; men_z188_config_channels()
100 writel(cfg, addr + i); men_z188_config_channels()
/linux-4.1.27/drivers/net/ethernet/qlogic/qlcnic/
H A Dqlcnic_dcb.c294 kfree(dcb->cfg); __qlcnic_dcb_free()
295 dcb->cfg = NULL; __qlcnic_dcb_free()
321 dcb->cfg = kzalloc(sizeof(struct qlcnic_dcb_cfg), GFP_ATOMIC); __qlcnic_dcb_attach()
322 if (!dcb->cfg) { __qlcnic_dcb_attach()
335 kfree(dcb->cfg); __qlcnic_dcb_attach()
336 dcb->cfg = NULL; __qlcnic_dcb_attach()
373 struct qlcnic_dcb_capability *cap = &dcb->cfg->capability; __qlcnic_dcb_get_capability()
406 struct qlcnic_dcb_cfg *cfg = dcb->cfg; qlcnic_82xx_dcb_get_hw_capability() local
415 cap = &cfg->capability; qlcnic_82xx_dcb_get_hw_capability()
544 struct qlcnic_dcb_capability *cap = &dcb->cfg->capability; qlcnic_83xx_dcb_get_hw_capability()
747 struct qlcnic_dcb_cfg *cfg = adapter->dcb->cfg; qlcnic_dcb_map_cee_params() local
748 struct qlcnic_dcb_cee *type = &cfg->type[idx]; qlcnic_dcb_map_cee_params()
758 cfg->capability.max_pfc_tc) qlcnic_dcb_map_cee_params()
762 cfg->capability.max_ets_tc) qlcnic_dcb_map_cee_params()
801 type = &adapter->dcb->cfg->type[QLC_DCB_OPER_IDX]; qlcnic_dcb_get_pg_tc_cfg_tx()
838 type = &adapter->dcb->cfg->type[QLC_DCB_OPER_IDX]; qlcnic_dcb_get_pg_bwg_cfg_tx()
864 type = &adapter->dcb->cfg->type[QLC_DCB_OPER_IDX]; qlcnic_dcb_get_pfc_cfg()
900 *cap = adapter->dcb->cfg->capability.dcb_capability; qlcnic_dcb_get_capability()
912 struct qlcnic_dcb_cfg *cfg = adapter->dcb->cfg; qlcnic_dcb_get_num_tcs() local
919 *num = cfg->capability.max_ets_tc; qlcnic_dcb_get_num_tcs()
922 *num = cfg->capability.max_pfc_tc; qlcnic_dcb_get_num_tcs()
951 return dcb->cfg->type[QLC_DCB_OPER_IDX].pfc_mode_enable; qlcnic_dcb_get_pfc_state()
957 struct qlcnic_dcb_cfg *cfg = adapter->dcb->cfg; qlcnic_dcb_get_dcbx() local
962 return cfg->capability.dcb_capability; qlcnic_dcb_get_dcbx()
973 type = &adapter->dcb->cfg->type[QLC_DCB_OPER_IDX]; qlcnic_dcb_get_feat_cfg()
1029 peer = &adapter->dcb->cfg->type[QLC_DCB_PEER_IDX]; qlcnic_dcb_peer_app_info()
1050 peer = &adapter->dcb->cfg->type[QLC_DCB_PEER_IDX]; qlcnic_dcb_peer_app_table()
1075 peer = &adapter->dcb->cfg->type[QLC_DCB_PEER_IDX]; qlcnic_dcb_cee_peer_get_pg()
1100 struct qlcnic_dcb_cfg *cfg = adapter->dcb->cfg; qlcnic_dcb_cee_peer_get_pfc() local
1110 peer = &cfg->type[QLC_DCB_PEER_IDX]; qlcnic_dcb_cee_peer_get_pfc()
1122 pfc->tcs_supported = cfg->capability.max_pfc_tc; qlcnic_dcb_cee_peer_get_pfc()
/linux-4.1.27/drivers/net/wireless/ti/wl12xx/
H A Dscan.c322 struct wl1271_cmd_sched_scan_config *cfg = NULL; wl1271_scan_sched_scan_config() local
330 cfg = kzalloc(sizeof(*cfg), GFP_KERNEL); wl1271_scan_sched_scan_config()
331 if (!cfg) wl1271_scan_sched_scan_config()
334 cfg->role_id = wlvif->role_id; wl1271_scan_sched_scan_config()
335 cfg->rssi_threshold = c->rssi_threshold; wl1271_scan_sched_scan_config()
336 cfg->snr_threshold = c->snr_threshold; wl1271_scan_sched_scan_config()
337 cfg->n_probe_reqs = c->num_probe_reqs; wl1271_scan_sched_scan_config()
339 cfg->cycles = 0; wl1271_scan_sched_scan_config()
341 cfg->report_after = 1; wl1271_scan_sched_scan_config()
343 cfg->terminate = 0; wl1271_scan_sched_scan_config()
344 cfg->tag = WL1271_SCAN_DEFAULT_TAG; wl1271_scan_sched_scan_config()
346 cfg->bss_type = SCAN_BSS_TYPE_ANY; wl1271_scan_sched_scan_config()
349 cfg->intervals[i] = cpu_to_le32(req->interval); wl1271_scan_sched_scan_config()
351 cfg->ssid_len = 0; wl1271_scan_sched_scan_config()
356 cfg->filter_type = ret; wl1271_scan_sched_scan_config()
358 wl1271_debug(DEBUG_SCAN, "filter_type = %d", cfg->filter_type); wl1271_scan_sched_scan_config()
373 wl12xx_adjust_channels(cfg, cfg_channels); wl1271_scan_sched_scan_config()
375 if (!force_passive && cfg->active[0]) { wl1271_scan_sched_scan_config()
392 if (!force_passive && cfg->active[1]) { wl1271_scan_sched_scan_config()
409 wl1271_dump(DEBUG_SCAN, "SCAN_CFG: ", cfg, sizeof(*cfg)); wl1271_scan_sched_scan_config()
411 ret = wl1271_cmd_send(wl, CMD_CONNECTION_SCAN_CFG, cfg, wl1271_scan_sched_scan_config()
412 sizeof(*cfg), 0); wl1271_scan_sched_scan_config()
419 kfree(cfg); wl1271_scan_sched_scan_config()
/linux-4.1.27/drivers/usb/gadget/
H A Dconfigfs.c362 struct config_usb_cfg *cfg = to_config_usb_cfg(item); gadget_config_attr_release() local
364 WARN_ON(!list_empty(&cfg->c.functions)); gadget_config_attr_release()
365 list_del(&cfg->c.list); gadget_config_attr_release()
366 kfree(cfg->c.label); gadget_config_attr_release()
367 kfree(cfg); gadget_config_attr_release()
374 struct config_usb_cfg *cfg = to_config_usb_cfg(usb_cfg_ci); config_usb_cfg_link() local
375 struct usb_composite_dev *cdev = cfg->c.cdev; config_usb_cfg_link()
400 list_for_each_entry(f, &cfg->func_list, list) { config_usb_cfg_link()
414 list_add_tail(&f->list, &cfg->func_list); config_usb_cfg_link()
425 struct config_usb_cfg *cfg = to_config_usb_cfg(usb_cfg_ci); config_usb_cfg_unlink() local
426 struct usb_composite_dev *cdev = cfg->c.cdev; config_usb_cfg_unlink()
445 list_for_each_entry(f, &cfg->func_list, list) { config_usb_cfg_unlink()
469 static ssize_t gadget_config_desc_MaxPower_show(struct config_usb_cfg *cfg, gadget_config_desc_MaxPower_show() argument
472 return sprintf(page, "%u\n", cfg->c.MaxPower); gadget_config_desc_MaxPower_show()
475 static ssize_t gadget_config_desc_MaxPower_store(struct config_usb_cfg *cfg, gadget_config_desc_MaxPower_store() argument
485 cfg->c.MaxPower = val; gadget_config_desc_MaxPower_store()
489 static ssize_t gadget_config_desc_bmAttributes_show(struct config_usb_cfg *cfg, gadget_config_desc_bmAttributes_show() argument
492 return sprintf(page, "0x%02x\n", cfg->c.bmAttributes); gadget_config_desc_bmAttributes_show()
495 static ssize_t gadget_config_desc_bmAttributes_store(struct config_usb_cfg *cfg, gadget_config_desc_bmAttributes_store() argument
508 cfg->c.bmAttributes = val; gadget_config_desc_bmAttributes_store()
646 struct config_usb_cfg *cfg; config_desc_make() local
673 cfg = kzalloc(sizeof(*cfg), GFP_KERNEL); config_desc_make()
674 if (!cfg) config_desc_make()
676 cfg->c.label = kstrdup(buf, GFP_KERNEL); config_desc_make()
677 if (!cfg->c.label) { config_desc_make()
681 cfg->c.bConfigurationValue = num; config_desc_make()
682 cfg->c.MaxPower = CONFIG_USB_GADGET_VBUS_DRAW; config_desc_make()
683 cfg->c.bmAttributes = USB_CONFIG_ATT_ONE; config_desc_make()
684 INIT_LIST_HEAD(&cfg->string_list); config_desc_make()
685 INIT_LIST_HEAD(&cfg->func_list); config_desc_make()
687 cfg->group.default_groups = cfg->default_groups; config_desc_make()
688 cfg->default_groups[0] = &cfg->strings_group; config_desc_make()
690 config_group_init_type_name(&cfg->group, name, config_desc_make()
692 config_group_init_type_name(&cfg->strings_group, "strings", config_desc_make()
695 ret = usb_add_config_only(&gi->cdev, &cfg->c); config_desc_make()
699 return &cfg->group; config_desc_make()
701 kfree(cfg->c.label); config_desc_make()
702 kfree(cfg); config_desc_make()
1284 struct config_usb_cfg *cfg; purge_configs_funcs() local
1286 cfg = container_of(c, struct config_usb_cfg, c); purge_configs_funcs()
1290 list_move_tail(&f->list, &cfg->func_list); purge_configs_funcs()
1334 struct config_usb_cfg *cfg; configfs_composite_bind() local
1336 cfg = container_of(c, struct config_usb_cfg, c); configfs_composite_bind()
1337 if (list_empty(&cfg->func_list)) { configfs_composite_bind()
1381 struct config_usb_cfg *cfg; configfs_composite_bind() local
1386 cfg = container_of(c, struct config_usb_cfg, c); configfs_composite_bind()
1387 if (!list_empty(&cfg->string_list)) { configfs_composite_bind()
1389 list_for_each_entry(cn, &cfg->string_list, list) { configfs_composite_bind()
1390 cfg->gstrings[i] = &cn->stringtab_dev; configfs_composite_bind()
1395 cfg->gstrings[i] = NULL; configfs_composite_bind()
1396 s = usb_gstrings_attach(&gi->cdev, cfg->gstrings, 1); configfs_composite_bind()
1404 list_for_each_entry_safe(f, tmp, &cfg->func_list, list) { configfs_composite_bind()
1408 list_add(&f->list, &cfg->func_list); configfs_composite_bind()
/linux-4.1.27/drivers/net/wireless/rtlwifi/rtl8821ae/
H A Dsw.c98 rtlpci->msi_support = rtlpriv->cfg->mod_params->msi_support; rtl8821ae_init_sw_vars()
99 rtlpci->int_clear = rtlpriv->cfg->mod_params->int_clear; rtl8821ae_init_sw_vars()
165 rtlpriv->dbg.global_debuglevel = rtlpriv->cfg->mod_params->debug; rtl8821ae_init_sw_vars()
167 rtlpriv->psc.inactiveps = rtlpriv->cfg->mod_params->inactiveps; rtl8821ae_init_sw_vars()
168 rtlpriv->psc.swctrl_lps = rtlpriv->cfg->mod_params->swctrl_lps; rtl8821ae_init_sw_vars()
169 rtlpriv->psc.fwctrl_lps = rtlpriv->cfg->mod_params->fwctrl_lps; rtl8821ae_init_sw_vars()
170 rtlpci->msi_support = rtlpriv->cfg->mod_params->msi_support; rtl8821ae_init_sw_vars()
171 rtlpci->msi_support = rtlpriv->cfg->mod_params->int_clear; rtl8821ae_init_sw_vars()
172 if (rtlpriv->cfg->mod_params->disable_watchdog) rtl8821ae_init_sw_vars()
176 rtlpci->msi_support = rtlpriv->cfg->mod_params->msi_support; rtl8821ae_init_sw_vars()
205 rtlpriv->cfg->fw_name = "rtlwifi/rtl8812aefw.bin"; rtl8821ae_init_sw_vars()
206 rtlpriv->cfg->wowlan_fw_name = "rtlwifi/rtl8812aefw_wowlan.bin"; rtl8821ae_init_sw_vars()
208 rtlpriv->cfg->fw_name = "rtlwifi/rtl8821aefw.bin"; rtl8821ae_init_sw_vars()
209 rtlpriv->cfg->wowlan_fw_name = "rtlwifi/rtl8821aefw_wowlan.bin"; rtl8821ae_init_sw_vars()
214 pr_info("Using firmware %s\n", rtlpriv->cfg->fw_name); rtl8821ae_init_sw_vars()
215 err = request_firmware_nowait(THIS_MODULE, 1, rtlpriv->cfg->fw_name, rtl8821ae_init_sw_vars()
224 pr_info("Using firmware %s\n", rtlpriv->cfg->wowlan_fw_name); rtl8821ae_init_sw_vars()
226 rtlpriv->cfg->wowlan_fw_name, rtl8821ae_init_sw_vars()
/linux-4.1.27/drivers/soc/ti/
H A Dknav_dma.c127 struct knav_dma_cfg cfg; member in struct:knav_dma_chan
137 static bool check_config(struct knav_dma_chan *chan, struct knav_dma_cfg *cfg) check_config() argument
139 if (!memcmp(&chan->cfg, cfg, sizeof(*cfg))) check_config()
146 struct knav_dma_cfg *cfg) chan_start()
152 if (cfg->u.tx.filt_pswords) chan_start()
154 if (cfg->u.tx.filt_einfo) chan_start()
161 writel_relaxed(cfg->u.tx.priority, &chan->reg_tx_sched->prio); chan_start()
166 if (cfg->u.rx.einfo_present) chan_start()
168 if (cfg->u.rx.psinfo_present) chan_start()
170 if (cfg->u.rx.err_mode == DMA_RETRY) chan_start()
172 v |= (cfg->u.rx.desc_type & DESC_TYPE_MASK) << DESC_TYPE_SHIFT; chan_start()
173 if (cfg->u.rx.psinfo_at_sop) chan_start()
175 v |= (cfg->u.rx.sop_offset & CHAN_SOP_OFF_MASK) chan_start()
177 v |= cfg->u.rx.dst_q & CHAN_QNUM_MASK; chan_start()
183 v = cfg->u.rx.fdq[0] << 16; chan_start()
184 v |= cfg->u.rx.fdq[1] & CHAN_QNUM_MASK; chan_start()
187 v = cfg->u.rx.fdq[2] << 16; chan_start()
188 v |= cfg->u.rx.fdq[3] & CHAN_QNUM_MASK; chan_start()
196 /* Keep a copy of the cfg */ chan_start()
197 memcpy(&chan->cfg, cfg, sizeof(*cfg)); chan_start()
251 memset(&chan->cfg, 0, sizeof(struct knav_dma_cfg)); chan_stop()
323 chan->cfg.u.tx.filt_einfo, dma_debug_show_channels()
324 chan->cfg.u.tx.filt_pswords, dma_debug_show_channels()
325 chan->cfg.u.tx.priority); dma_debug_show_channels()
328 chan->cfg.u.rx.einfo_present, dma_debug_show_channels()
329 chan->cfg.u.rx.psinfo_present, dma_debug_show_channels()
330 chan->cfg.u.rx.desc_type); dma_debug_show_channels()
332 chan->cfg.u.rx.dst_q, dma_debug_show_channels()
333 chan->cfg.u.rx.thresh); dma_debug_show_channels()
335 seq_printf(s, "[%d]", chan->cfg.u.rx.fdq[i]); dma_debug_show_channels()
145 chan_start(struct knav_dma_chan *chan, struct knav_dma_cfg *cfg) chan_start() argument
/linux-4.1.27/arch/cris/include/arch-v32/arch/hwregs/iop/
H A Diop_sw_cfg_defs.h89 unsigned int cfg : 2; member in struct:__anon621
97 unsigned int cfg : 2; member in struct:__anon622
105 unsigned int cfg : 2; member in struct:__anon623
113 unsigned int cfg : 2; member in struct:__anon624
121 unsigned int cfg : 2; member in struct:__anon625
129 unsigned int cfg : 2; member in struct:__anon626
137 unsigned int cfg : 2; member in struct:__anon627
145 unsigned int cfg : 2; member in struct:__anon628
153 unsigned int cfg : 2; member in struct:__anon629
161 unsigned int cfg : 2; member in struct:__anon630
169 unsigned int cfg : 2; member in struct:__anon631
177 unsigned int cfg : 2; member in struct:__anon632
185 unsigned int cfg : 2; member in struct:__anon633
193 unsigned int cfg : 2; member in struct:__anon634
201 unsigned int cfg : 2; member in struct:__anon635
209 unsigned int cfg : 2; member in struct:__anon636
217 unsigned int cfg : 2; member in struct:__anon637
225 unsigned int cfg : 2; member in struct:__anon638
233 unsigned int cfg : 2; member in struct:__anon639
241 unsigned int cfg : 2; member in struct:__anon640
249 unsigned int cfg : 2; member in struct:__anon641
257 unsigned int cfg : 2; member in struct:__anon642
265 unsigned int cfg : 2; member in struct:__anon643
273 unsigned int cfg : 2; member in struct:__anon644
281 unsigned int cfg : 2; member in struct:__anon645
289 unsigned int cfg : 2; member in struct:__anon646
297 unsigned int cfg : 2; member in struct:__anon647
305 unsigned int cfg : 2; member in struct:__anon648
313 unsigned int cfg : 2; member in struct:__anon649
321 unsigned int cfg : 2; member in struct:__anon650
329 unsigned int cfg : 2; member in struct:__anon651
337 unsigned int cfg : 2; member in struct:__anon652
345 unsigned int cfg : 2; member in struct:__anon653
353 unsigned int cfg : 2; member in struct:__anon654
/linux-4.1.27/net/mpls/
H A Daf_mpls.c330 static int mpls_route_add(struct mpls_route_config *cfg) mpls_route_add() argument
333 struct net *net = cfg->rc_nlinfo.nl_net; mpls_route_add()
340 index = cfg->rc_label; mpls_route_add()
344 (cfg->rc_nlflags & NLM_F_CREATE)) { mpls_route_add()
357 if (cfg->rc_output_labels > MAX_NEW_LABELS) mpls_route_add()
361 dev = dev_get_by_index(net, cfg->rc_ifindex); mpls_route_add()
371 if ((cfg->rc_via_table == NEIGH_LINK_TABLE) && mpls_route_add()
372 (dev->addr_len != cfg->rc_via_alen)) mpls_route_add()
377 if (cfg->rc_nlflags & NLM_F_APPEND) mpls_route_add()
383 if ((cfg->rc_nlflags & NLM_F_EXCL) && old) mpls_route_add()
387 if (!(cfg->rc_nlflags & NLM_F_REPLACE) && old) mpls_route_add()
391 if (!(cfg->rc_nlflags & NLM_F_CREATE) && !old) mpls_route_add()
395 rt = mpls_rt_alloc(cfg->rc_via_alen); mpls_route_add()
399 rt->rt_labels = cfg->rc_output_labels; mpls_route_add()
401 rt->rt_label[i] = cfg->rc_output_label[i]; mpls_route_add()
402 rt->rt_protocol = cfg->rc_protocol; mpls_route_add()
404 rt->rt_via_table = cfg->rc_via_table; mpls_route_add()
405 memcpy(rt->rt_via, cfg->rc_via, cfg->rc_via_alen); mpls_route_add()
407 mpls_route_update(net, index, NULL, rt, &cfg->rc_nlinfo); mpls_route_add()
418 static int mpls_route_del(struct mpls_route_config *cfg) mpls_route_del() argument
420 struct net *net = cfg->rc_nlinfo.nl_net; mpls_route_del()
424 index = cfg->rc_label; mpls_route_del()
434 mpls_route_update(net, index, NULL, NULL, &cfg->rc_nlinfo); mpls_route_del()
676 struct mpls_route_config *cfg) rtm_to_route_config()
689 memset(cfg, 0, sizeof(*cfg)); rtm_to_route_config()
714 cfg->rc_label = LABEL_NOT_SPECIFIED; rtm_to_route_config()
715 cfg->rc_protocol = rtm->rtm_protocol; rtm_to_route_config()
716 cfg->rc_nlflags = nlh->nlmsg_flags; rtm_to_route_config()
717 cfg->rc_nlinfo.portid = NETLINK_CB(skb).portid; rtm_to_route_config()
718 cfg->rc_nlinfo.nlh = nlh; rtm_to_route_config()
719 cfg->rc_nlinfo.nl_net = sock_net(skb->sk); rtm_to_route_config()
728 cfg->rc_ifindex = nla_get_u32(nla); rtm_to_route_config()
732 &cfg->rc_output_labels, rtm_to_route_config()
733 cfg->rc_output_label)) rtm_to_route_config()
740 &cfg->rc_label)) rtm_to_route_config()
744 if (cfg->rc_label < 16) rtm_to_route_config()
754 cfg->rc_via_alen = nla_len(nla) - rtm_to_route_config()
756 if (cfg->rc_via_alen > MAX_VIA_ALEN) rtm_to_route_config()
762 cfg->rc_via_table = NEIGH_LINK_TABLE; rtm_to_route_config()
765 cfg->rc_via_table = NEIGH_ARP_TABLE; rtm_to_route_config()
766 if (cfg->rc_via_alen != 4) rtm_to_route_config()
770 cfg->rc_via_table = NEIGH_ND_TABLE; rtm_to_route_config()
771 if (cfg->rc_via_alen != 16) rtm_to_route_config()
779 memcpy(cfg->rc_via, via->rtvia_addr, cfg->rc_via_alen); rtm_to_route_config()
795 struct mpls_route_config cfg; mpls_rtm_delroute() local
798 err = rtm_to_route_config(skb, nlh, &cfg); mpls_rtm_delroute()
802 return mpls_route_del(&cfg); mpls_rtm_delroute()
808 struct mpls_route_config cfg; mpls_rtm_newroute() local
811 err = rtm_to_route_config(skb, nlh, &cfg); mpls_rtm_newroute()
815 return mpls_route_add(&cfg); mpls_rtm_newroute()
675 rtm_to_route_config(struct sk_buff *skb, struct nlmsghdr *nlh, struct mpls_route_config *cfg) rtm_to_route_config() argument
/linux-4.1.27/arch/mips/include/asm/
H A Dmaar.h89 * @cfg: Pointer to an array of struct maar_config.
90 * @num_cfg: The number of structs in the cfg array.
93 * Configures as many MAARs as are present and specified in the cfg
94 * array with the values taken from the cfg array.
98 static inline unsigned maar_config(const struct maar_config *cfg, maar_config() argument
104 write_maar_pair(i, cfg[i].lower, cfg[i].upper, cfg[i].attrs); maar_config()
H A Dbmips.h128 u32 cfg; bmips_post_dma_flush() local
136 cfg = __raw_readl(cbr + BMIPS_RAC_CONFIG); bmips_post_dma_flush()
137 __raw_writel(cfg | 0x100, cbr + BMIPS_RAC_CONFIG); bmips_post_dma_flush()
/linux-4.1.27/sound/isa/msnd/
H A Dmsnd_pinnacle.c653 static int snd_msnd_write_cfg(int cfg, int reg, int value) snd_msnd_write_cfg() argument
655 outb(reg, cfg); snd_msnd_write_cfg()
656 outb(value, cfg + 1); snd_msnd_write_cfg()
657 if (value != inb(cfg + 1)) { snd_msnd_write_cfg()
664 static int snd_msnd_write_cfg_io0(int cfg, int num, u16 io) snd_msnd_write_cfg_io0() argument
666 if (snd_msnd_write_cfg(cfg, IREG_LOGDEVICE, num)) snd_msnd_write_cfg_io0()
668 if (snd_msnd_write_cfg(cfg, IREG_IO0_BASEHI, HIBYTE(io))) snd_msnd_write_cfg_io0()
670 if (snd_msnd_write_cfg(cfg, IREG_IO0_BASELO, LOBYTE(io))) snd_msnd_write_cfg_io0()
675 static int snd_msnd_write_cfg_io1(int cfg, int num, u16 io) snd_msnd_write_cfg_io1() argument
677 if (snd_msnd_write_cfg(cfg, IREG_LOGDEVICE, num)) snd_msnd_write_cfg_io1()
679 if (snd_msnd_write_cfg(cfg, IREG_IO1_BASEHI, HIBYTE(io))) snd_msnd_write_cfg_io1()
681 if (snd_msnd_write_cfg(cfg, IREG_IO1_BASELO, LOBYTE(io))) snd_msnd_write_cfg_io1()
686 static int snd_msnd_write_cfg_irq(int cfg, int num, u16 irq) snd_msnd_write_cfg_irq() argument
688 if (snd_msnd_write_cfg(cfg, IREG_LOGDEVICE, num)) snd_msnd_write_cfg_irq()
690 if (snd_msnd_write_cfg(cfg, IREG_IRQ_NUMBER, LOBYTE(irq))) snd_msnd_write_cfg_irq()
692 if (snd_msnd_write_cfg(cfg, IREG_IRQ_TYPE, IRQTYPE_EDGE)) snd_msnd_write_cfg_irq()
697 static int snd_msnd_write_cfg_mem(int cfg, int num, int mem) snd_msnd_write_cfg_mem() argument
703 if (snd_msnd_write_cfg(cfg, IREG_LOGDEVICE, num)) snd_msnd_write_cfg_mem()
705 if (snd_msnd_write_cfg(cfg, IREG_MEMBASEHI, HIBYTE(wmem))) snd_msnd_write_cfg_mem()
707 if (snd_msnd_write_cfg(cfg, IREG_MEMBASELO, LOBYTE(wmem))) snd_msnd_write_cfg_mem()
709 if (wmem && snd_msnd_write_cfg(cfg, IREG_MEMCONTROL, snd_msnd_write_cfg_mem()
715 static int snd_msnd_activate_logical(int cfg, int num) snd_msnd_activate_logical() argument
717 if (snd_msnd_write_cfg(cfg, IREG_LOGDEVICE, num)) snd_msnd_activate_logical()
719 if (snd_msnd_write_cfg(cfg, IREG_ACTIVATE, LD_ACTIVATE)) snd_msnd_activate_logical()
724 static int snd_msnd_write_cfg_logical(int cfg, int num, u16 io0, snd_msnd_write_cfg_logical() argument
727 if (snd_msnd_write_cfg(cfg, IREG_LOGDEVICE, num)) snd_msnd_write_cfg_logical()
729 if (snd_msnd_write_cfg_io0(cfg, num, io0)) snd_msnd_write_cfg_logical()
731 if (snd_msnd_write_cfg_io1(cfg, num, io1)) snd_msnd_write_cfg_logical()
733 if (snd_msnd_write_cfg_irq(cfg, num, irq)) snd_msnd_write_cfg_logical()
735 if (snd_msnd_write_cfg_mem(cfg, num, mem)) snd_msnd_write_cfg_logical()
737 if (snd_msnd_activate_logical(cfg, num)) snd_msnd_write_cfg_logical()
742 static int snd_msnd_pinnacle_cfg_reset(int cfg) snd_msnd_pinnacle_cfg_reset() argument
749 if (snd_msnd_write_cfg_logical(cfg, i, 0, 0, 0, 0)) snd_msnd_pinnacle_cfg_reset()
769 static long cfg[SNDRV_CARDS] = SNDRV_DEFAULT_PORT; variable
811 module_param_array(cfg, long, NULL, S_IRUGO);
879 if (cfg[i] == SNDRV_AUTO_PORT) { snd_msnd_isa_match()
881 } else if (cfg[i] != 0x250 && cfg[i] != 0x260 && cfg[i] != 0x270) { snd_msnd_isa_match()
900 || cfg[idx] == SNDRV_AUTO_PORT snd_msnd_isa_probe()
947 cfg[idx]); snd_msnd_isa_probe()
949 if (!request_region(cfg[idx], 2, "Pinnacle/Fiji Config")) { snd_msnd_isa_probe()
951 cfg[idx]); snd_msnd_isa_probe()
956 if (snd_msnd_pinnacle_cfg_reset(cfg[idx])) { snd_msnd_isa_probe()
962 err = snd_msnd_write_cfg_logical(cfg[idx], 0, snd_msnd_isa_probe()
977 err = snd_msnd_write_cfg_logical(cfg[idx], 1, snd_msnd_isa_probe()
992 err = snd_msnd_write_cfg_logical(cfg[idx], 2, snd_msnd_isa_probe()
1005 err = snd_msnd_write_cfg_logical(cfg[idx], 3, snd_msnd_isa_probe()
1012 release_region(cfg[idx], 2); snd_msnd_isa_probe()
1058 release_region(cfg[idx], 2); snd_msnd_isa_probe()
/linux-4.1.27/sound/usb/
H A Dhelper.h24 #define get_cfg_desc(cfg) (&(cfg)->desc)
/linux-4.1.27/arch/cris/include/arch-v32/mach-a3/mach/hwregs/iop/
H A Diop_sw_cfg_defs.h86 unsigned int cfg : 2; member in struct:__anon977
94 unsigned int cfg : 2; member in struct:__anon978
102 unsigned int cfg : 2; member in struct:__anon979
110 unsigned int cfg : 2; member in struct:__anon980
118 unsigned int cfg : 2; member in struct:__anon981
126 unsigned int cfg : 2; member in struct:__anon982
134 unsigned int cfg : 2; member in struct:__anon983
142 unsigned int cfg : 2; member in struct:__anon984
150 unsigned int cfg : 2; member in struct:__anon985
158 unsigned int cfg : 2; member in struct:__anon986
166 unsigned int cfg : 2; member in struct:__anon987
174 unsigned int cfg : 1; member in struct:__anon988
182 unsigned int cfg : 2; member in struct:__anon989
190 unsigned int cfg : 2; member in struct:__anon990
198 unsigned int cfg : 2; member in struct:__anon991
206 unsigned int cfg : 2; member in struct:__anon992
214 unsigned int cfg : 2; member in struct:__anon993
222 unsigned int cfg : 2; member in struct:__anon994
230 unsigned int cfg : 2; member in struct:__anon995
238 unsigned int cfg : 2; member in struct:__anon996
246 unsigned int cfg : 2; member in struct:__anon997
254 unsigned int cfg : 2; member in struct:__anon998
H A Diop_reg_space.h2 * generated by ./gen_sw.pl Wed Feb 14 09:27:48 2007 iop_sw.cfg
/linux-4.1.27/drivers/gpu/drm/nouveau/include/nvkm/engine/
H A Ddevice.h18 const char *sname, const char *cfg, const char *dbg,
/linux-4.1.27/arch/cris/include/arch-v32/mach-a3/mach/hwregs/iop/asm/
H A Diop_reg_space_asm.h2 * generated by ./gen_sw.pl Wed Feb 14 09:27:48 2007 iop_sw.cfg
/linux-4.1.27/arch/arm/mach-s3c64xx/
H A Dsetup-spi.c12 #include <plat/gpio-cfg.h>
/linux-4.1.27/net/mac80211/
H A DMakefile21 cfg.o \
/linux-4.1.27/drivers/video/fbdev/via/
H A Dvia-gpio.c86 struct viafb_gpio_cfg *cfg = container_of(chip, via_gpio_set() local
93 spin_lock_irqsave(&cfg->vdev->reg_lock, flags); via_gpio_set()
94 gpio = cfg->active_gpios[nr]; via_gpio_set()
102 spin_unlock_irqrestore(&cfg->vdev->reg_lock, flags); via_gpio_set()
118 struct viafb_gpio_cfg *cfg = container_of(chip, via_gpio_dir_input() local
124 spin_lock_irqsave(&cfg->vdev->reg_lock, flags); via_gpio_dir_input()
125 gpio = cfg->active_gpios[nr]; via_gpio_dir_input()
128 spin_unlock_irqrestore(&cfg->vdev->reg_lock, flags); via_gpio_dir_input()
134 struct viafb_gpio_cfg *cfg = container_of(chip, via_gpio_get() local
141 spin_lock_irqsave(&cfg->vdev->reg_lock, flags); via_gpio_get()
142 gpio = cfg->active_gpios[nr]; via_gpio_get()
144 spin_unlock_irqrestore(&cfg->vdev->reg_lock, flags); via_gpio_get()
/linux-4.1.27/arch/arm/mach-ixp4xx/
H A Dixp4xx_qmgr.c159 u32 cfg, addr = 0, mask[4]; /* in 16-dwords */ qmgr_request_queue() local
169 cfg = 0 << 24; qmgr_request_queue()
173 cfg = 1 << 24; qmgr_request_queue()
177 cfg = 2 << 24; qmgr_request_queue()
181 cfg = 3 << 24; qmgr_request_queue()
188 cfg |= nearly_empty_watermark << 26; qmgr_request_queue()
189 cfg |= nearly_full_watermark << 29; qmgr_request_queue()
223 __raw_writel(cfg | (addr << 14), &qmgr_regs->sram[queue]); qmgr_request_queue()
241 u32 cfg, addr, mask[4]; qmgr_release_queue() local
246 cfg = __raw_readl(&qmgr_regs->sram[queue]); qmgr_release_queue()
247 addr = (cfg >> 14) & 0xFF; qmgr_release_queue()
251 switch ((cfg >> 24) & 3) { qmgr_release_queue()
/linux-4.1.27/drivers/i2c/busses/
H A Di2c-pmcmsp.c151 static inline u32 pmcmsptwi_cfg_to_reg(const struct pmcmsptwi_cfg *cfg) pmcmsptwi_cfg_to_reg() argument
153 return ((cfg->arbf & 0xf) << 12) | pmcmsptwi_cfg_to_reg()
154 ((cfg->nak & 0xf) << 8) | pmcmsptwi_cfg_to_reg()
155 ((cfg->add10 & 0x1) << 7) | pmcmsptwi_cfg_to_reg()
156 ((cfg->mst_code & 0x7) << 4) | pmcmsptwi_cfg_to_reg()
157 ((cfg->arb & 0x1) << 1) | pmcmsptwi_cfg_to_reg()
158 (cfg->highspeed & 0x1); pmcmsptwi_cfg_to_reg()
161 static inline void pmcmsptwi_reg_to_cfg(u32 reg, struct pmcmsptwi_cfg *cfg) pmcmsptwi_reg_to_cfg() argument
163 cfg->arbf = (reg >> 12) & 0xf; pmcmsptwi_reg_to_cfg()
164 cfg->nak = (reg >> 8) & 0xf; pmcmsptwi_reg_to_cfg()
165 cfg->add10 = (reg >> 7) & 0x1; pmcmsptwi_reg_to_cfg()
166 cfg->mst_code = (reg >> 4) & 0x7; pmcmsptwi_reg_to_cfg()
167 cfg->arb = (reg >> 1) & 0x1; pmcmsptwi_reg_to_cfg()
168 cfg->highspeed = reg & 0x1; pmcmsptwi_reg_to_cfg()
174 static void pmcmsptwi_set_clock_config(const struct pmcmsptwi_clockcfg *cfg, pmcmsptwi_set_clock_config() argument
178 pmcmsptwi_writel(pmcmsptwi_clock_to_reg(&cfg->standard), pmcmsptwi_set_clock_config()
180 pmcmsptwi_writel(pmcmsptwi_clock_to_reg(&cfg->highspeed), pmcmsptwi_set_clock_config()
188 static void pmcmsptwi_get_twi_config(struct pmcmsptwi_cfg *cfg, pmcmsptwi_get_twi_config() argument
193 data->iobase + MSP_TWI_CFG_REG_OFFSET), cfg); pmcmsptwi_get_twi_config()
200 static void pmcmsptwi_set_twi_config(const struct pmcmsptwi_cfg *cfg, pmcmsptwi_set_twi_config() argument
204 pmcmsptwi_writel(pmcmsptwi_cfg_to_reg(cfg), pmcmsptwi_set_twi_config()
/linux-4.1.27/drivers/net/hamradio/
H A Dyam.c1000 if ((yi.cfg.mask & YAM_IOBASE) && netif_running(dev)) yam_ioctl()
1002 if ((yi.cfg.mask & YAM_IRQ) && netif_running(dev)) yam_ioctl()
1004 if ((yi.cfg.mask & YAM_BITRATE) && netif_running(dev)) yam_ioctl()
1006 if ((yi.cfg.mask & YAM_BAUDRATE) && netif_running(dev)) yam_ioctl()
1009 if (yi.cfg.mask & YAM_IOBASE) { yam_ioctl()
1010 yp->iobase = yi.cfg.iobase; yam_ioctl()
1011 dev->base_addr = yi.cfg.iobase; yam_ioctl()
1013 if (yi.cfg.mask & YAM_IRQ) { yam_ioctl()
1014 if (yi.cfg.irq > 15) yam_ioctl()
1016 yp->irq = yi.cfg.irq; yam_ioctl()
1017 dev->irq = yi.cfg.irq; yam_ioctl()
1019 if (yi.cfg.mask & YAM_BITRATE) { yam_ioctl()
1020 if (yi.cfg.bitrate > YAM_MAXBITRATE) yam_ioctl()
1022 yp->bitrate = yi.cfg.bitrate; yam_ioctl()
1024 if (yi.cfg.mask & YAM_BAUDRATE) { yam_ioctl()
1025 if (yi.cfg.baudrate > YAM_MAXBAUDRATE) yam_ioctl()
1027 yp->baudrate = yi.cfg.baudrate; yam_ioctl()
1029 if (yi.cfg.mask & YAM_MODE) { yam_ioctl()
1030 if (yi.cfg.mode > YAM_MAXMODE) yam_ioctl()
1032 yp->dupmode = yi.cfg.mode; yam_ioctl()
1034 if (yi.cfg.mask & YAM_HOLDDLY) { yam_ioctl()
1035 if (yi.cfg.holddly > YAM_MAXHOLDDLY) yam_ioctl()
1037 yp->holdd = yi.cfg.holddly; yam_ioctl()
1039 if (yi.cfg.mask & YAM_TXDELAY) { yam_ioctl()
1040 if (yi.cfg.txdelay > YAM_MAXTXDELAY) yam_ioctl()
1042 yp->txd = yi.cfg.txdelay; yam_ioctl()
1044 if (yi.cfg.mask & YAM_TXTAIL) { yam_ioctl()
1045 if (yi.cfg.txtail > YAM_MAXTXTAIL) yam_ioctl()
1047 yp->txtail = yi.cfg.txtail; yam_ioctl()
1049 if (yi.cfg.mask & YAM_PERSIST) { yam_ioctl()
1050 if (yi.cfg.persist > YAM_MAXPERSIST) yam_ioctl()
1052 yp->pers = yi.cfg.persist; yam_ioctl()
1054 if (yi.cfg.mask & YAM_SLOTTIME) { yam_ioctl()
1055 if (yi.cfg.slottime > YAM_MAXSLOTTIME) yam_ioctl()
1057 yp->slot = yi.cfg.slottime; yam_ioctl()
1064 yi.cfg.mask = 0xffffffff; yam_ioctl()
1065 yi.cfg.iobase = yp->iobase; yam_ioctl()
1066 yi.cfg.irq = yp->irq; yam_ioctl()
1067 yi.cfg.bitrate = yp->bitrate; yam_ioctl()
1068 yi.cfg.baudrate = yp->baudrate; yam_ioctl()
1069 yi.cfg.mode = yp->dupmode; yam_ioctl()
1070 yi.cfg.txdelay = yp->txd; yam_ioctl()
1071 yi.cfg.holddly = yp->holdd; yam_ioctl()
1072 yi.cfg.txtail = yp->txtail; yam_ioctl()
1073 yi.cfg.persist = yp->pers; yam_ioctl()
1074 yi.cfg.slottime = yp->slot; yam_ioctl()
/linux-4.1.27/drivers/net/ethernet/intel/ixgbe/
H A Dixgbe_dcb.c177 void ixgbe_dcb_unpack_pfc(struct ixgbe_dcb_config *cfg, u8 *pfc_en) ixgbe_dcb_unpack_pfc() argument
179 struct tc_configuration *tc_config = &cfg->tc_config[0]; ixgbe_dcb_unpack_pfc()
188 void ixgbe_dcb_unpack_refill(struct ixgbe_dcb_config *cfg, int direction, ixgbe_dcb_unpack_refill() argument
191 struct tc_configuration *tc_config = &cfg->tc_config[0]; ixgbe_dcb_unpack_refill()
198 void ixgbe_dcb_unpack_max(struct ixgbe_dcb_config *cfg, u16 *max) ixgbe_dcb_unpack_max() argument
200 struct tc_configuration *tc_config = &cfg->tc_config[0]; ixgbe_dcb_unpack_max()
207 void ixgbe_dcb_unpack_bwgid(struct ixgbe_dcb_config *cfg, int direction, ixgbe_dcb_unpack_bwgid() argument
210 struct tc_configuration *tc_config = &cfg->tc_config[0]; ixgbe_dcb_unpack_bwgid()
217 void ixgbe_dcb_unpack_prio(struct ixgbe_dcb_config *cfg, int direction, ixgbe_dcb_unpack_prio() argument
220 struct tc_configuration *tc_config = &cfg->tc_config[0]; ixgbe_dcb_unpack_prio()
227 u8 ixgbe_dcb_get_tc_from_up(struct ixgbe_dcb_config *cfg, int direction, u8 up) ixgbe_dcb_get_tc_from_up() argument
229 struct tc_configuration *tc_config = &cfg->tc_config[0]; ixgbe_dcb_get_tc_from_up()
231 u8 tc = cfg->num_tcs.pg_tcs; ixgbe_dcb_get_tc_from_up()
250 void ixgbe_dcb_unpack_map(struct ixgbe_dcb_config *cfg, int direction, u8 *map) ixgbe_dcb_unpack_map() argument
255 map[up] = ixgbe_dcb_get_tc_from_up(cfg, direction, up); ixgbe_dcb_unpack_map()
/linux-4.1.27/drivers/pinctrl/
H A Dpinconf-generic.c181 * @cfg: Array of parsed config options
182 * @ncfg: Number of entries in @cfg
185 * in @cfg. @cfg does not need to be empty, entries are added beggining at
186 * @ncfg. @ncfg is updated to reflect the number of entries after parsing. @cfg
191 unsigned int count, unsigned long *cfg, parse_dt_cfg()
212 cfg[*ncfg] = pinconf_to_config_packed(par->param, val); parse_dt_cfg()
229 unsigned long *cfg; pinconf_generic_parse_dt_config() local
240 cfg = kcalloc(max_cfg, sizeof(*cfg), GFP_KERNEL); pinconf_generic_parse_dt_config()
241 if (!cfg) pinconf_generic_parse_dt_config()
244 parse_dt_cfg(np, dt_params, ARRAY_SIZE(dt_params), cfg, &ncfg); pinconf_generic_parse_dt_config()
248 pctldev->desc->num_custom_params, cfg, &ncfg); pinconf_generic_parse_dt_config()
263 *configs = kmemdup(cfg, ncfg * sizeof(unsigned long), GFP_KERNEL); pinconf_generic_parse_dt_config()
272 kfree(cfg); pinconf_generic_parse_dt_config()
189 parse_dt_cfg(struct device_node *np, const struct pinconf_generic_params *params, unsigned int count, unsigned long *cfg, unsigned int *ncfg) parse_dt_cfg() argument
/linux-4.1.27/drivers/staging/media/cxd2099/
H A Dcxd2099.c42 struct cxd2099_cfg cfg; member in struct:cxd
121 status = i2c_write_reg(ci->i2c, ci->cfg.adr, 0, adr); read_block()
124 status = i2c_read(ci->i2c, ci->cfg.adr, 1, data, n); read_block()
140 status = i2c_write(ci->i2c, ci->cfg.adr, addr, 3); read_pccard()
142 status = i2c_read(ci->i2c, ci->cfg.adr, 3, data, n); read_pccard()
151 status = i2c_write(ci->i2c, ci->cfg.adr, addr, 3); write_pccard()
156 status = i2c_write(ci->i2c, ci->cfg.adr, buf, n+1); write_pccard()
166 status = i2c_write(ci->i2c, ci->cfg.adr, addr, 3); read_io()
168 status = i2c_read(ci->i2c, ci->cfg.adr, 3, val, 1); read_io()
178 status = i2c_write(ci->i2c, ci->cfg.adr, addr, 3); write_io()
180 status = i2c_write(ci->i2c, ci->cfg.adr, buf, 2); write_io()
190 status = i2c_write(ci->i2c, ci->cfg.adr, addr, 3);
192 status = i2c_read(ci->i2c, ci->cfg.adr, 3, data, n);
201 status = i2c_write(ci->i2c, ci->cfg.adr, addr, 3);
206 status = i2c_write(ci->i2c, ci->cfg.adr, buf, n + 1);
216 status = i2c_write_reg(ci->i2c, ci->cfg.adr, 0, reg); write_regm()
218 status = i2c_read_reg(ci->i2c, ci->cfg.adr, 1, &ci->regs[reg]); write_regm()
222 status = i2c_write_reg(ci->i2c, ci->cfg.adr, 1, ci->regs[reg]); write_regm()
240 status = i2c_write_reg(ci->i2c, ci->cfg.adr, 0, adr); write_block()
244 status = i2c_write(ci->i2c, ci->cfg.adr, buf, n + 1); write_block()
364 if (ci->cfg.clock_mode) { init()
365 if (ci->cfg.polarity) { init()
384 if (ci->cfg.polarity) { init()
688 struct dvb_ca_en50221 *cxd2099_attach(struct cxd2099_cfg *cfg, cxd2099_attach() argument
695 if (i2c_read_reg(i2c, cfg->adr, 0, &val) < 0) { cxd2099_attach()
696 dev_info(&i2c->dev, "No CXD2099 detected at %02x\n", cfg->adr); cxd2099_attach()
705 ci->cfg = *cfg; cxd2099_attach()
714 dev_info(&i2c->dev, "Attached CXD2099AR at %02x\n", ci->cfg.adr); cxd2099_attach()
/linux-4.1.27/drivers/staging/media/omap4iss/
H A Diss_ipipe.c27 __ipipe_get_format(struct iss_ipipe_device *ipipe, struct v4l2_subdev_pad_config *cfg,
179 __ipipe_get_format(struct iss_ipipe_device *ipipe, struct v4l2_subdev_pad_config *cfg, __ipipe_get_format() argument
183 return v4l2_subdev_get_try_format(&ipipe->subdev, cfg, pad); __ipipe_get_format()
191 * @cfg: V4L2 subdev pad config
196 ipipe_try_format(struct iss_ipipe_device *ipipe, struct v4l2_subdev_pad_config *cfg, ipipe_try_format() argument
223 format = __ipipe_get_format(ipipe, cfg, IPIPE_PAD_SINK, which); ipipe_try_format()
239 * @cfg : V4L2 subdev pad config
244 struct v4l2_subdev_pad_config *cfg, ipipe_enum_mbus_code()
271 struct v4l2_subdev_pad_config *cfg, ipipe_enum_frame_size()
283 ipipe_try_format(ipipe, cfg, fse->pad, &format, fse->which); ipipe_enum_frame_size()
293 ipipe_try_format(ipipe, cfg, fse->pad, &format, fse->which); ipipe_enum_frame_size()
303 * @cfg: V4L2 subdev pad config
309 static int ipipe_get_format(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config *cfg, ipipe_get_format() argument
315 format = __ipipe_get_format(ipipe, cfg, fmt->pad, fmt->which); ipipe_get_format()
326 * @cfg: V4L2 subdev pad config
332 static int ipipe_set_format(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config *cfg, ipipe_set_format() argument
338 format = __ipipe_get_format(ipipe, cfg, fmt->pad, fmt->which); ipipe_set_format()
342 ipipe_try_format(ipipe, cfg, fmt->pad, &fmt->format, fmt->which); ipipe_set_format()
347 format = __ipipe_get_format(ipipe, cfg, IPIPE_PAD_SOURCE_VP, ipipe_set_format()
350 ipipe_try_format(ipipe, cfg, IPIPE_PAD_SOURCE_VP, format, ipipe_set_format()
243 ipipe_enum_mbus_code(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config *cfg, struct v4l2_subdev_mbus_code_enum *code) ipipe_enum_mbus_code() argument
270 ipipe_enum_frame_size(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config *cfg, struct v4l2_subdev_frame_size_enum *fse) ipipe_enum_frame_size() argument
/linux-4.1.27/drivers/power/reset/
H A Dqnap-poweroff.c56 static const struct power_off_cfg *cfg; variable in typeref:struct:power_off_cfg
60 const unsigned divisor = ((tclk + (8 * cfg->baud)) / (16 * cfg->baud)); qnap_power_off()
74 writel(cfg->cmd, UART1_REG(TX)); qnap_power_off()
86 cfg = match->data; qnap_power_off_probe()
/linux-4.1.27/drivers/message/fusion/
H A Dmptfc.c295 CONFIGPARMS cfg; mptfc_GetFcDevPage0() local
328 cfg.cfghdr.hdr = &hdr; mptfc_GetFcDevPage0()
329 cfg.physAddr = -1; mptfc_GetFcDevPage0()
330 cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER; mptfc_GetFcDevPage0()
331 cfg.dir = 0; mptfc_GetFcDevPage0()
332 cfg.pageAddr = port_id; mptfc_GetFcDevPage0()
333 cfg.timeout = 0; mptfc_GetFcDevPage0()
335 if ((rc = mpt_config(ioc, &cfg)) != 0) mptfc_GetFcDevPage0()
348 cfg.physAddr = page0_dma; mptfc_GetFcDevPage0()
349 cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT; mptfc_GetFcDevPage0()
351 if ((rc = mpt_config(ioc, &cfg)) == 0) { mptfc_GetFcDevPage0()
742 CONFIGPARMS cfg; mptfc_GetFcPortPage0() local
759 cfg.cfghdr.hdr = &hdr; mptfc_GetFcPortPage0()
760 cfg.physAddr = -1; mptfc_GetFcPortPage0()
761 cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER; mptfc_GetFcPortPage0()
762 cfg.dir = 0; mptfc_GetFcPortPage0()
763 cfg.pageAddr = portnum; mptfc_GetFcPortPage0()
764 cfg.timeout = 0; mptfc_GetFcPortPage0()
766 if ((rc = mpt_config(ioc, &cfg)) != 0) mptfc_GetFcPortPage0()
779 cfg.physAddr = page0_dma; mptfc_GetFcPortPage0()
780 cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT; mptfc_GetFcPortPage0()
782 if ((rc = mpt_config(ioc, &cfg)) == 0) { mptfc_GetFcPortPage0()
838 CONFIGPARMS cfg; mptfc_WriteFcPortPage1() local
852 cfg.cfghdr.hdr = &hdr; mptfc_WriteFcPortPage1()
853 cfg.physAddr = -1; mptfc_WriteFcPortPage1()
854 cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER; mptfc_WriteFcPortPage1()
855 cfg.dir = 0; mptfc_WriteFcPortPage1()
856 cfg.pageAddr = portnum; mptfc_WriteFcPortPage1()
857 cfg.timeout = 0; mptfc_WriteFcPortPage1()
859 if ((rc = mpt_config(ioc, &cfg)) != 0) mptfc_WriteFcPortPage1()
868 cfg.physAddr = ioc->fc_data.fc_port_page1[portnum].dma; mptfc_WriteFcPortPage1()
869 cfg.action = MPI_CONFIG_ACTION_PAGE_WRITE_CURRENT; mptfc_WriteFcPortPage1()
870 cfg.dir = 1; mptfc_WriteFcPortPage1()
872 rc = mpt_config(ioc, &cfg); mptfc_WriteFcPortPage1()
881 CONFIGPARMS cfg; mptfc_GetFcPortPage1() local
895 cfg.cfghdr.hdr = &hdr; mptfc_GetFcPortPage1()
896 cfg.physAddr = -1; mptfc_GetFcPortPage1()
897 cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER; mptfc_GetFcPortPage1()
898 cfg.dir = 0; mptfc_GetFcPortPage1()
899 cfg.pageAddr = portnum; mptfc_GetFcPortPage1()
900 cfg.timeout = 0; mptfc_GetFcPortPage1()
902 if ((rc = mpt_config(ioc, &cfg)) != 0) mptfc_GetFcPortPage1()
935 cfg.physAddr = page1_dma; mptfc_GetFcPortPage1()
936 cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT; mptfc_GetFcPortPage1()
938 if ((rc = mpt_config(ioc, &cfg)) == 0) { mptfc_GetFcPortPage1()
/linux-4.1.27/drivers/spi/
H A Dspi-pxa2xx-dma.c165 struct dma_slave_config cfg; pxa2xx_spi_dma_prepare_one() local
182 memset(&cfg, 0, sizeof(cfg)); pxa2xx_spi_dma_prepare_one()
183 cfg.direction = dir; pxa2xx_spi_dma_prepare_one()
186 cfg.dst_addr = drv_data->ssdr_physical; pxa2xx_spi_dma_prepare_one()
187 cfg.dst_addr_width = width; pxa2xx_spi_dma_prepare_one()
188 cfg.dst_maxburst = chip->dma_burst_size; pxa2xx_spi_dma_prepare_one()
194 cfg.src_addr = drv_data->ssdr_physical; pxa2xx_spi_dma_prepare_one()
195 cfg.src_addr_width = width; pxa2xx_spi_dma_prepare_one()
196 cfg.src_maxburst = chip->dma_burst_size; pxa2xx_spi_dma_prepare_one()
203 ret = dmaengine_slave_config(chan, &cfg); pxa2xx_spi_dma_prepare_one()
H A Dspi-au1550.c174 u32 cfg, stat; au1550_spi_chipsel() local
186 cfg = hw->regs->psc_spicfg; au1550_spi_chipsel()
188 hw->regs->psc_spicfg = cfg & ~PSC_SPICFG_DE_ENABLE; au1550_spi_chipsel()
192 cfg |= PSC_SPICFG_BI; au1550_spi_chipsel()
194 cfg &= ~PSC_SPICFG_BI; au1550_spi_chipsel()
196 cfg &= ~PSC_SPICFG_CDE; au1550_spi_chipsel()
198 cfg |= PSC_SPICFG_CDE; au1550_spi_chipsel()
201 cfg |= PSC_SPICFG_MLF; au1550_spi_chipsel()
203 cfg &= ~PSC_SPICFG_MLF; au1550_spi_chipsel()
206 cfg &= ~PSC_SPICFG_DD_DISABLE; au1550_spi_chipsel()
208 cfg |= PSC_SPICFG_DD_DISABLE; au1550_spi_chipsel()
209 cfg = PSC_SPICFG_CLR_LEN(cfg); au1550_spi_chipsel()
210 cfg |= PSC_SPICFG_SET_LEN(spi->bits_per_word); au1550_spi_chipsel()
212 cfg = PSC_SPICFG_CLR_BAUD(cfg); au1550_spi_chipsel()
213 cfg &= ~PSC_SPICFG_SET_DIV(3); au1550_spi_chipsel()
214 cfg |= au1550_spi_baudcfg(hw, spi->max_speed_hz); au1550_spi_chipsel()
216 hw->regs->psc_spicfg = cfg | PSC_SPICFG_DE_ENABLE; au1550_spi_chipsel()
234 u32 cfg, stat; au1550_spi_setupxfer() local
250 cfg = hw->regs->psc_spicfg; au1550_spi_setupxfer()
252 hw->regs->psc_spicfg = cfg & ~PSC_SPICFG_DE_ENABLE; au1550_spi_setupxfer()
256 cfg &= ~PSC_SPICFG_DD_DISABLE; au1550_spi_setupxfer()
258 cfg |= PSC_SPICFG_DD_DISABLE; au1550_spi_setupxfer()
259 cfg = PSC_SPICFG_CLR_LEN(cfg); au1550_spi_setupxfer()
260 cfg |= PSC_SPICFG_SET_LEN(bpw); au1550_spi_setupxfer()
262 cfg = PSC_SPICFG_CLR_BAUD(cfg); au1550_spi_setupxfer()
263 cfg &= ~PSC_SPICFG_SET_DIV(3); au1550_spi_setupxfer()
264 cfg |= au1550_spi_baudcfg(hw, hz); au1550_spi_setupxfer()
266 hw->regs->psc_spicfg = cfg; au1550_spi_setupxfer()
269 if (cfg & PSC_SPICFG_DE_ENABLE) { au1550_spi_setupxfer()
685 u32 stat, cfg; au1550_spi_setup_psc_as_spi() local
705 cfg = hw->usedma ? 0 : PSC_SPICFG_DD_DISABLE; au1550_spi_setup_psc_as_spi()
706 cfg |= PSC_SPICFG_SET_LEN(8); au1550_spi_setup_psc_as_spi()
707 cfg |= PSC_SPICFG_RT_FIFO8 | PSC_SPICFG_TT_FIFO8; au1550_spi_setup_psc_as_spi()
709 cfg |= PSC_SPICFG_SET_BAUD(4) | PSC_SPICFG_SET_DIV(0); au1550_spi_setup_psc_as_spi()
712 cfg |= PSC_SPICFG_LB; au1550_spi_setup_psc_as_spi()
715 hw->regs->psc_spicfg = cfg; au1550_spi_setup_psc_as_spi()
/linux-4.1.27/drivers/tty/
H A Dmips_ejtag_fdc.c490 u32 cfg; mips_ejtag_fdc_put() local
507 cfg = mips_ejtag_fdc_read(priv, REG_FDCFG); mips_ejtag_fdc_put()
508 cfg &= ~REG_FDCFG_TXINTTHRES; mips_ejtag_fdc_put()
509 cfg |= REG_FDCFG_TXINTTHRES_NOTFULL; mips_ejtag_fdc_put()
510 mips_ejtag_fdc_write(priv, REG_FDCFG, cfg); mips_ejtag_fdc_put()
563 unsigned int stat, channel, data, cfg, i, flipped; mips_ejtag_fdc_handle() local
629 cfg = mips_ejtag_fdc_read(priv, REG_FDCFG); mips_ejtag_fdc_handle()
630 cfg &= ~REG_FDCFG_TXINTTHRES; mips_ejtag_fdc_handle()
631 cfg |= REG_FDCFG_TXINTTHRES_DISABLED; mips_ejtag_fdc_handle()
632 mips_ejtag_fdc_write(priv, REG_FDCFG, cfg); mips_ejtag_fdc_handle()
888 unsigned int cfg, tx_fifo; mips_ejtag_fdc_tty_probe() local
907 cfg = mips_ejtag_fdc_read(priv, REG_FDCFG); mips_ejtag_fdc_tty_probe()
908 tx_fifo = (cfg & REG_FDCFG_TXFIFOSIZE) >> REG_FDCFG_TXFIFOSIZE_SHIFT; mips_ejtag_fdc_tty_probe()
910 cfg &= ~(REG_FDCFG_TXINTTHRES | REG_FDCFG_RXINTTHRES); mips_ejtag_fdc_tty_probe()
911 cfg |= REG_FDCFG_TXINTTHRES_DISABLED; mips_ejtag_fdc_tty_probe()
912 cfg |= REG_FDCFG_RXINTTHRES_DISABLED; mips_ejtag_fdc_tty_probe()
913 mips_ejtag_fdc_write(priv, REG_FDCFG, cfg); mips_ejtag_fdc_tty_probe()
995 cfg = mips_ejtag_fdc_read(priv, REG_FDCFG); mips_ejtag_fdc_tty_probe()
996 cfg &= ~REG_FDCFG_RXINTTHRES; mips_ejtag_fdc_tty_probe()
997 cfg |= REG_FDCFG_RXINTTHRES_NOTEMPTY; mips_ejtag_fdc_tty_probe()
998 mips_ejtag_fdc_write(priv, REG_FDCFG, cfg); mips_ejtag_fdc_tty_probe()
1025 cfg = mips_ejtag_fdc_read(priv, REG_FDCFG); mips_ejtag_fdc_tty_probe()
1027 cfg &= ~(REG_FDCFG_TXINTTHRES | REG_FDCFG_RXINTTHRES); mips_ejtag_fdc_tty_probe()
1028 cfg |= REG_FDCFG_TXINTTHRES_DISABLED; mips_ejtag_fdc_tty_probe()
1029 cfg |= REG_FDCFG_RXINTTHRES_DISABLED; mips_ejtag_fdc_tty_probe()
1030 mips_ejtag_fdc_write(priv, REG_FDCFG, cfg); mips_ejtag_fdc_tty_probe()
1053 unsigned int cfg; mips_ejtag_fdc_tty_remove() local
1057 cfg = mips_ejtag_fdc_read(priv, REG_FDCFG); mips_ejtag_fdc_tty_remove()
1059 cfg &= ~(REG_FDCFG_TXINTTHRES | REG_FDCFG_RXINTTHRES); mips_ejtag_fdc_tty_remove()
1060 cfg |= REG_FDCFG_TXINTTHRES_DISABLED; mips_ejtag_fdc_tty_remove()
1061 cfg |= REG_FDCFG_RXINTTHRES_DISABLED; mips_ejtag_fdc_tty_remove()
1062 mips_ejtag_fdc_write(priv, REG_FDCFG, cfg); mips_ejtag_fdc_tty_remove()
1083 unsigned int cfg; mips_ejtag_fdc_tty_cpu_down() local
1087 cfg = mips_ejtag_fdc_read(priv, REG_FDCFG); mips_ejtag_fdc_tty_cpu_down()
1089 cfg &= ~(REG_FDCFG_TXINTTHRES | REG_FDCFG_RXINTTHRES); mips_ejtag_fdc_tty_cpu_down()
1090 cfg |= REG_FDCFG_TXINTTHRES_DISABLED; mips_ejtag_fdc_tty_cpu_down()
1091 cfg |= REG_FDCFG_RXINTTHRES_DISABLED; mips_ejtag_fdc_tty_cpu_down()
1092 mips_ejtag_fdc_write(priv, REG_FDCFG, cfg); mips_ejtag_fdc_tty_cpu_down()
1106 unsigned int cfg; mips_ejtag_fdc_tty_cpu_up() local
1116 cfg = mips_ejtag_fdc_read(priv, REG_FDCFG); mips_ejtag_fdc_tty_cpu_up()
1117 cfg &= ~(REG_FDCFG_TXINTTHRES | REG_FDCFG_RXINTTHRES); mips_ejtag_fdc_tty_cpu_up()
1118 cfg |= REG_FDCFG_TXINTTHRES_DISABLED; mips_ejtag_fdc_tty_cpu_up()
1119 cfg |= REG_FDCFG_RXINTTHRES_NOTEMPTY; mips_ejtag_fdc_tty_cpu_up()
1120 mips_ejtag_fdc_write(priv, REG_FDCFG, cfg); mips_ejtag_fdc_tty_cpu_up()
/linux-4.1.27/arch/mips/netlogic/xlr/
H A Dfmn-config.c83 struct xlr_board_fmn_config *cfg = &xlr_board_fmn_config; check_credit_distribution() local
90 total_credits += cfg->cpu[n].credit_config[bkt]; check_credit_distribution()
91 total_credits += cfg->gmac[0].credit_config[bkt]; check_credit_distribution()
92 total_credits += cfg->gmac[1].credit_config[bkt]; check_credit_distribution()
93 total_credits += cfg->dma.credit_config[bkt]; check_credit_distribution()
94 total_credits += cfg->cmp.credit_config[bkt]; check_credit_distribution()
95 total_credits += cfg->sae.credit_config[bkt]; check_credit_distribution()
96 total_credits += cfg->xgmac[0].credit_config[bkt]; check_credit_distribution()
97 total_credits += cfg->xgmac[1].credit_config[bkt]; check_credit_distribution()
98 if (total_credits > cfg->bucket_size[bkt]) check_credit_distribution()
100 bkt, total_credits, cfg->bucket_size[bkt]); check_credit_distribution()
/linux-4.1.27/sound/oss/
H A Dpas2_card.c59 static struct address_info cfg; variable in typeref:struct:address_info
406 cfg.io_base = io; init_pas2()
407 cfg.irq = irq; init_pas2()
408 cfg.dma = dma; init_pas2()
409 cfg.dma2 = dma16; init_pas2()
416 if (cfg.io_base == -1 || cfg.dma == -1 || cfg.irq == -1) { init_pas2()
421 if (!probe_pas(&cfg)) init_pas2()
423 attach_pas_card(&cfg); init_pas2()
430 unload_pas(&cfg); cleanup_pas2()
/linux-4.1.27/sound/soc/
H A Dsoc-ac97.c161 struct snd_ac97_reset_cfg *cfg) snd_soc_ac97_parse_pinctl()
173 cfg->pctl = p; snd_soc_ac97_parse_pinctl()
180 cfg->pstate_reset = state; snd_soc_ac97_parse_pinctl()
187 cfg->pstate_warm_reset = state; snd_soc_ac97_parse_pinctl()
194 cfg->pstate_run = state; snd_soc_ac97_parse_pinctl()
206 cfg->gpio_sync = gpio; snd_soc_ac97_parse_pinctl()
218 cfg->gpio_sdata = gpio; snd_soc_ac97_parse_pinctl()
230 cfg->gpio_reset = gpio; snd_soc_ac97_parse_pinctl()
263 struct snd_ac97_reset_cfg cfg; snd_soc_set_ac97_ops_of_reset() local
266 ret = snd_soc_ac97_parse_pinctl(dev, &cfg); snd_soc_set_ac97_ops_of_reset()
277 snd_ac97_rst_cfg = cfg; snd_soc_set_ac97_ops_of_reset()
160 snd_soc_ac97_parse_pinctl(struct device *dev, struct snd_ac97_reset_cfg *cfg) snd_soc_ac97_parse_pinctl() argument
/linux-4.1.27/drivers/xen/
H A Dpci.c218 struct pci_mmcfg_region *cfg; xen_mcfg_late() local
231 list_for_each_entry(cfg, &pci_mmcfg_list, list) { xen_mcfg_late()
234 r.address = cfg->address; xen_mcfg_late()
235 r.segment = cfg->segment; xen_mcfg_late()
236 r.start_bus = cfg->start_bus; xen_mcfg_late()
237 r.end_bus = cfg->end_bus; xen_mcfg_late()
250 cfg->name, rc); xen_mcfg_late()
/linux-4.1.27/drivers/input/misc/
H A Dbma150.c417 const struct bma150_cfg *cfg) bma150_initialize()
425 error = bma150_set_bandwidth(bma150, cfg->bandwidth); bma150_initialize()
429 error = bma150_set_range(bma150, cfg->range); bma150_initialize()
435 cfg->any_motion_int, bma150_initialize()
436 cfg->any_motion_dur, bma150_initialize()
437 cfg->any_motion_thres); bma150_initialize()
442 cfg->hg_int, cfg->hg_hyst, bma150_initialize()
443 cfg->hg_dur, cfg->hg_thres); bma150_initialize()
448 cfg->lg_int, cfg->lg_hyst, bma150_initialize()
449 cfg->lg_dur, cfg->lg_thres); bma150_initialize()
532 const struct bma150_cfg *cfg; bma150_probe() local
564 cfg = &pdata->cfg; bma150_probe()
566 cfg = &default_cfg; bma150_probe()
569 error = bma150_initialize(bma150, cfg); bma150_probe()
416 bma150_initialize(struct bma150_data *bma150, const struct bma150_cfg *cfg) bma150_initialize() argument
/linux-4.1.27/drivers/clk/qcom/
H A Dclk-rcg2.c67 u32 cfg; clk_rcg2_get_parent() local
70 ret = regmap_read(rcg->clkr.regmap, rcg->cmd_rcgr + CFG_REG, &cfg); clk_rcg2_get_parent()
74 cfg &= CFG_SRC_SEL_MASK; clk_rcg2_get_parent()
75 cfg >>= CFG_SRC_SEL_SHIFT; clk_rcg2_get_parent()
78 if (cfg == rcg->parent_map[i].cfg) clk_rcg2_get_parent()
117 u32 cfg = rcg->parent_map[index].cfg << CFG_SRC_SEL_SHIFT; clk_rcg2_set_parent() local
120 CFG_SRC_SEL_MASK, cfg); clk_rcg2_set_parent()
156 u32 cfg, hid_div, m = 0, n = 0, mode = 0, mask; clk_rcg2_recalc_rate() local
158 regmap_read(rcg->clkr.regmap, rcg->cmd_rcgr + CFG_REG, &cfg); clk_rcg2_recalc_rate()
168 mode = cfg & CFG_MODE_MASK; clk_rcg2_recalc_rate()
173 hid_div = cfg >> CFG_SRC_DIV_SHIFT; clk_rcg2_recalc_rate()
230 u32 cfg, mask; clk_rcg2_configure() local
257 cfg = f->pre_div << CFG_SRC_DIV_SHIFT; clk_rcg2_configure()
258 cfg |= rcg->parent_map[index].cfg << CFG_SRC_SEL_SHIFT; clk_rcg2_configure()
260 cfg |= CFG_MODE_DUAL_EDGE; clk_rcg2_configure()
262 rcg->cmd_rcgr + CFG_REG, mask, cfg); clk_rcg2_configure()
/linux-4.1.27/drivers/dma/sh/
H A Drcar-hpbdma.c96 const struct hpb_dmae_slave_config *cfg; member in struct:hpb_dmae_chan
320 if (chan->cfg->flags & HPB_DMAE_SET_ASYNC_RESET) hpb_dmae_start_xfer()
321 hpb_dmae_async_reset(hpbdev, chan->cfg->rstr); hpb_dmae_start_xfer()
350 int ch = chan->cfg->dma_ch; hpb_dmae_chan_irq()
401 const struct hpb_dmae_slave_config *cfg) hpb_dmae_alloc_chan_resources()
406 int slave_id = cfg->id; hpb_dmae_alloc_chan_resources()
414 HPB_DMAE_CHAN(cfg->dma_ch); hpb_dmae_alloc_chan_resources()
418 dev_dbg(dev, " -- cfg->dma_ch : %d\n", cfg->dma_ch); hpb_dmae_alloc_chan_resources()
437 if ((cfg->dcr & (HPB_DMAE_DCR_CT | HPB_DMAE_DCR_DIP)) == 0) { hpb_dmae_alloc_chan_resources()
439 } else if ((cfg->dcr & (HPB_DMAE_DCR_CT | HPB_DMAE_DCR_DIP)) == hpb_dmae_alloc_chan_resources()
447 if (cfg->flags & HPB_DMAE_SET_ASYNC_MODE) hpb_dmae_alloc_chan_resources()
448 hpb_dmae_set_async_mode(hpbdev, cfg->mdm, cfg->mdr); hpb_dmae_alloc_chan_resources()
449 ch_reg_write(hpb_chan, cfg->dcr, HPB_DMAE_DCR); hpb_dmae_alloc_chan_resources()
450 ch_reg_write(hpb_chan, cfg->port, HPB_DMAE_DPTR); hpb_dmae_alloc_chan_resources()
452 hpb_dmae_enable_int(hpbdev, cfg->dma_ch); hpb_dmae_alloc_chan_resources()
468 chan->cfg = sc; hpb_dmae_set_slave()
400 hpb_dmae_alloc_chan_resources(struct hpb_dmae_chan *hpb_chan, const struct hpb_dmae_slave_config *cfg) hpb_dmae_alloc_chan_resources() argument
H A Dsudmac.c32 u32 cfg; member in struct:sudmac_chan
105 sudmac_writel(sc, sc->cfg, SUDMAC_CH0CFG + sc->offset); sudmac_set_reg()
144 const struct sudmac_slave_config *cfg; sudmac_find_slave() local
147 for (i = 0, cfg = pdata->slave; i < pdata->slave_num; i++, cfg++) sudmac_find_slave()
148 if (cfg->slave_id == slave_id) sudmac_find_slave()
149 return cfg; sudmac_find_slave()
158 const struct sudmac_slave_config *cfg = sudmac_find_slave(sc, slave_id); sudmac_set_slave() local
160 if (!cfg) sudmac_set_slave()
264 sc->cfg |= SUDMAC_SENDBUFM; sudmac_chan_probe()
266 sc->cfg |= SUDMAC_RCVENDM; sudmac_chan_probe()
267 sc->cfg |= (su_dev->pdata->channel->wait << 4) & SUDMAC_LBA_WAIT; sudmac_chan_probe()
/linux-4.1.27/drivers/input/mouse/
H A Dbcm5974.c250 struct bcm5974_config cfg; /* device configuration */ member in struct:bcm5974
433 const struct bcm5974_config *cfg; bcm5974_get_config() local
435 for (cfg = bcm5974_config_table; cfg->ansi; ++cfg) bcm5974_get_config()
436 if (cfg->ansi == id || cfg->iso == id || cfg->jis == id) bcm5974_get_config()
437 return cfg; bcm5974_get_config()
457 const struct bcm5974_config *cfg) setup_events_to_report()
466 set_abs(input_dev, ABS_MT_TOUCH_MAJOR, &cfg->w); setup_events_to_report()
467 set_abs(input_dev, ABS_MT_TOUCH_MINOR, &cfg->w); setup_events_to_report()
469 set_abs(input_dev, ABS_MT_WIDTH_MAJOR, &cfg->w); setup_events_to_report()
470 set_abs(input_dev, ABS_MT_WIDTH_MINOR, &cfg->w); setup_events_to_report()
472 set_abs(input_dev, ABS_MT_ORIENTATION, &cfg->o); setup_events_to_report()
474 set_abs(input_dev, ABS_MT_POSITION_X, &cfg->x); setup_events_to_report()
475 set_abs(input_dev, ABS_MT_POSITION_Y, &cfg->y); setup_events_to_report()
480 if (cfg->caps & HAS_INTEGRATED_BUTTON) setup_events_to_report()
526 const struct bcm5974_config *cfg, report_synaptics_data()
535 abs_p = clamp_val(256 * p / cfg->p.max, 0, 255); report_synaptics_data()
536 abs_w = clamp_val(16 * w / cfg->w.max, 0, 15); report_synaptics_data()
547 const struct bcm5974_config *c = &dev->cfg; report_tp_state()
605 if (dev->cfg.tp_type == TYPE3) bcm5974_wellspring_mode()
853 const struct bcm5974_config *cfg; bcm5974_probe() local
859 cfg = bcm5974_get_config(udev); bcm5974_probe()
872 dev->cfg = *cfg; bcm5974_probe()
876 if (cfg->tp_type == TYPE1) { bcm5974_probe()
888 dev->cfg.bt_datalen, GFP_KERNEL, bcm5974_probe()
895 dev->cfg.tp_datalen, GFP_KERNEL, bcm5974_probe()
902 usb_rcvintpipe(udev, cfg->bt_ep), bcm5974_probe()
903 dev->bt_data, dev->cfg.bt_datalen, bcm5974_probe()
907 usb_rcvintpipe(udev, cfg->tp_ep), bcm5974_probe()
908 dev->tp_data, dev->cfg.tp_datalen, bcm5974_probe()
919 input_dev->id.version = cfg->caps; bcm5974_probe()
927 setup_events_to_report(input_dev, cfg); bcm5974_probe()
939 usb_free_coherent(dev->udev, dev->cfg.tp_datalen, bcm5974_probe()
943 usb_free_coherent(dev->udev, dev->cfg.bt_datalen, bcm5974_probe()
963 usb_free_coherent(dev->udev, dev->cfg.tp_datalen, bcm5974_disconnect()
966 usb_free_coherent(dev->udev, dev->cfg.bt_datalen, bcm5974_disconnect()
456 setup_events_to_report(struct input_dev *input_dev, const struct bcm5974_config *cfg) setup_events_to_report() argument
525 report_synaptics_data(struct input_dev *input, const struct bcm5974_config *cfg, const struct tp_finger *f, int raw_n) report_synaptics_data() argument
/linux-4.1.27/arch/blackfin/include/asm/
H A Ddma.h70 unsigned DMA_MMR_SIZE_TYPE cfg; member in struct:dma_desc_array
78 unsigned DMA_MMR_SIZE_TYPE cfg; member in struct:dmasg
89 unsigned long cfg; /* DMA Configuration register */ member in struct:dma_register
123 unsigned short cfg; /* DMA Configuration register */ member in struct:dma_register
217 dma_ch[channel].regs->cfg = config; set_dma_config()
286 return dma_ch[channel].regs->cfg; get_dma_config()
302 dma_ch[channel].regs->cfg = set_dma_sg()
303 (dma_ch[channel].regs->cfg & ~NDSIZE) | set_dma_sg()
314 dma_ch[channel].regs->cfg &= ~DMAEN; disable_dma()
321 dma_ch[channel].regs->cfg |= DMAEN; enable_dma()
/linux-4.1.27/drivers/net/wireless/rtlwifi/rtl8188ee/
H A Dsw.c134 rtlpriv->dbg.global_debuglevel = rtlpriv->cfg->mod_params->debug; rtl88e_init_sw_vars()
136 rtlpriv->psc.inactiveps = rtlpriv->cfg->mod_params->inactiveps; rtl88e_init_sw_vars()
137 rtlpriv->psc.swctrl_lps = rtlpriv->cfg->mod_params->swctrl_lps; rtl88e_init_sw_vars()
138 rtlpriv->psc.fwctrl_lps = rtlpriv->cfg->mod_params->fwctrl_lps; rtl88e_init_sw_vars()
139 rtlpci->msi_support = rtlpriv->cfg->mod_params->msi_support; rtl88e_init_sw_vars()
140 rtlpriv->cfg->mod_params->sw_crypto = rtl88e_init_sw_vars()
141 rtlpriv->cfg->mod_params->sw_crypto; rtl88e_init_sw_vars()
142 rtlpriv->cfg->mod_params->disable_watchdog = rtl88e_init_sw_vars()
143 rtlpriv->cfg->mod_params->disable_watchdog; rtl88e_init_sw_vars()
144 if (rtlpriv->cfg->mod_params->disable_watchdog) rtl88e_init_sw_vars()
172 rtlpriv->cfg->fw_name = "rtlwifi/rtl8188efw.bin"; rtl88e_init_sw_vars()
174 pr_info("Using firmware %s\n", rtlpriv->cfg->fw_name); rtl88e_init_sw_vars()
175 err = request_firmware_nowait(THIS_MODULE, 1, rtlpriv->cfg->fw_name, rtl88e_init_sw_vars()
/linux-4.1.27/arch/powerpc/platforms/cell/
H A Dspider-pic.c85 void __iomem *cfg = spider_get_irq_config(pic, irqd_to_hwirq(d)); spider_unmask_irq() local
87 out_be32(cfg, in_be32(cfg) | 0x30000000u); spider_unmask_irq()
93 void __iomem *cfg = spider_get_irq_config(pic, irqd_to_hwirq(d)); spider_mask_irq() local
95 out_be32(cfg, in_be32(cfg) & ~0x30000000u); spider_mask_irq()
121 void __iomem *cfg = spider_get_irq_config(pic, hw); spider_set_irq_type() local
155 old_mask = in_be32(cfg) & 0x30000000u; spider_set_irq_type()
156 out_be32(cfg, old_mask | (ic << 24) | (0x7 << 16) | spider_set_irq_type()
158 out_be32(cfg + 4, (0x2 << 16) | (hw & 0xff)); spider_set_irq_type()
306 void __iomem *cfg = pic->regs + TIR_CFGA + 8 * i; spider_init_one() local
307 out_be32(cfg, in_be32(cfg) & ~0x30000000u); spider_init_one()
/linux-4.1.27/sound/isa/
H A Dsc6000.c122 * sc6000_irq_to_softcfg - Decode irq number into cfg code.
151 * sc6000_dma_to_softcfg - Decode dma number into cfg code.
174 * sc6000_mpu_irq_to_softcfg - Decode MPU-401 irq number into cfg code.
284 static int sc6000_hw_cfg_write(char __iomem *vport, const int *cfg) sc6000_hw_cfg_write() argument
294 if (sc6000_write(vport, cfg[0]) < 0) { sc6000_hw_cfg_write()
295 snd_printk(KERN_ERR "DATA 0x%x: failed!\n", cfg[0]); sc6000_hw_cfg_write()
298 if (sc6000_write(vport, cfg[1]) < 0) { sc6000_hw_cfg_write()
299 snd_printk(KERN_ERR "DATA 0x%x: failed!\n", cfg[1]); sc6000_hw_cfg_write()
367 static void sc6000_hw_cfg_encode(char __iomem *vport, int *cfg, sc6000_hw_cfg_encode() argument
371 cfg[0] = 0; sc6000_hw_cfg_encode()
372 cfg[1] = 0; sc6000_hw_cfg_encode()
374 cfg[0] |= 1; sc6000_hw_cfg_encode()
376 cfg[0] |= (xmpu & 0x30) >> 2; sc6000_hw_cfg_encode()
377 cfg[1] |= 0x20; sc6000_hw_cfg_encode()
380 cfg[0] |= 0x10; sc6000_hw_cfg_encode()
381 cfg[0] |= 0x40; /* always set */ sc6000_hw_cfg_encode()
383 cfg[0] |= 0x02; sc6000_hw_cfg_encode()
384 cfg[1] |= 0x80; /* enable WSS system */ sc6000_hw_cfg_encode()
385 cfg[1] &= ~0x40; /* disable IDE */ sc6000_hw_cfg_encode()
386 snd_printd("hw cfg %x, %x\n", cfg[0], cfg[1]); sc6000_hw_cfg_encode()
433 int cfg[2]; sc6000_init_board() local
434 sc6000_hw_cfg_encode(vport, &cfg[0], port[dev], mpu_port[dev], sc6000_init_board()
436 if (sc6000_hw_cfg_write(vport, cfg) < 0) { sc6000_init_board()
/linux-4.1.27/sound/soc/codecs/
H A Darizona.c1692 struct arizona_fll_cfg *cfg, arizona_calc_fratio()
1701 cfg->refdiv = 0; arizona_calc_fratio()
1705 cfg->refdiv++; arizona_calc_fratio()
1712 init_ratio = arizona_find_fratio(Fref, &cfg->fratio); arizona_calc_fratio()
1729 cfg->fratio = init_ratio - 1; arizona_calc_fratio()
1732 refdiv = cfg->refdiv; arizona_calc_fratio()
1742 cfg->refdiv = refdiv; arizona_calc_fratio()
1743 cfg->fratio = ratio - 1; arizona_calc_fratio()
1750 cfg->refdiv = refdiv; arizona_calc_fratio()
1751 cfg->fratio = ratio - 1; arizona_calc_fratio()
1763 return cfg->fratio + 1; arizona_calc_fratio()
1767 struct arizona_fll_cfg *cfg, arizona_calc_fll()
1783 cfg->outdiv = div; arizona_calc_fll()
1788 ratio = arizona_calc_fratio(fll, cfg, target, Fref, sync); arizona_calc_fll()
1793 Fref = Fref / (1 << cfg->refdiv); arizona_calc_fll()
1795 cfg->n = target / (ratio * Fref); arizona_calc_fll()
1801 cfg->theta = (target - (cfg->n * ratio * Fref)) arizona_calc_fll()
1803 cfg->lambda = (ratio * Fref) / gcd_fll; arizona_calc_fll()
1805 cfg->theta = 0; arizona_calc_fll()
1806 cfg->lambda = 0; arizona_calc_fll()
1813 while (cfg->lambda >= (1 << 16)) { arizona_calc_fll()
1814 cfg->theta >>= 1; arizona_calc_fll()
1815 cfg->lambda >>= 1; arizona_calc_fll()
1820 cfg->gain = fll_gains[i].gain; arizona_calc_fll()
1831 cfg->n, cfg->theta, cfg->lambda); arizona_calc_fll()
1833 cfg->fratio, cfg->fratio, cfg->outdiv, cfg->refdiv); arizona_calc_fll()
1834 arizona_fll_dbg(fll, "GAIN=%d\n", cfg->gain); arizona_calc_fll()
1841 struct arizona_fll_cfg *cfg, int source, arizona_apply_fll()
1845 ARIZONA_FLL1_THETA_MASK, cfg->theta); arizona_apply_fll()
1847 ARIZONA_FLL1_LAMBDA_MASK, cfg->lambda); arizona_apply_fll()
1850 cfg->fratio << ARIZONA_FLL1_FRATIO_SHIFT); arizona_apply_fll()
1854 cfg->refdiv << ARIZONA_FLL1_CLK_REF_DIV_SHIFT | arizona_apply_fll()
1860 cfg->gain << ARIZONA_FLL1_GAIN_SHIFT); arizona_apply_fll()
1864 cfg->outdiv << ARIZONA_FLL1_OUTDIV_SHIFT); arizona_apply_fll()
1867 cfg->gain << ARIZONA_FLL1_GAIN_SHIFT); arizona_apply_fll()
1872 ARIZONA_FLL1_CTRL_UPD | cfg->n); arizona_apply_fll()
1896 struct arizona_fll_cfg cfg; arizona_enable_fll() local
1918 arizona_calc_fll(fll, &cfg, fll->ref_freq, false); arizona_enable_fll()
1920 arizona_apply_fll(arizona, fll->base, &cfg, fll->ref_src, arizona_enable_fll()
1923 arizona_calc_fll(fll, &cfg, fll->sync_freq, true); arizona_enable_fll()
1925 arizona_apply_fll(arizona, fll->base + 0x10, &cfg, arizona_enable_fll()
1930 arizona_calc_fll(fll, &cfg, fll->sync_freq, false); arizona_enable_fll()
1932 arizona_apply_fll(arizona, fll->base, &cfg, arizona_enable_fll()
1691 arizona_calc_fratio(struct arizona_fll *fll, struct arizona_fll_cfg *cfg, unsigned int target, unsigned int Fref, bool sync) arizona_calc_fratio() argument
1766 arizona_calc_fll(struct arizona_fll *fll, struct arizona_fll_cfg *cfg, unsigned int Fref, bool sync) arizona_calc_fll() argument
1840 arizona_apply_fll(struct arizona *arizona, unsigned int base, struct arizona_fll_cfg *cfg, int source, bool sync) arizona_apply_fll() argument
/linux-4.1.27/sound/usb/usx2y/
H A Dus122l.c382 struct usb_stream_config *cfg; usb_stream_hwdep_ioctl() local
392 cfg = memdup_user((void *)arg, sizeof(*cfg)); usb_stream_hwdep_ioctl()
393 if (IS_ERR(cfg)) usb_stream_hwdep_ioctl()
394 return PTR_ERR(cfg); usb_stream_hwdep_ioctl()
396 if (cfg->version != USB_STREAM_INTERFACE_VERSION) { usb_stream_hwdep_ioctl()
401 if ((cfg->sample_rate != 44100 && cfg->sample_rate != 48000 && usb_stream_hwdep_ioctl()
403 (cfg->sample_rate != 88200 && cfg->sample_rate != 96000))) || usb_stream_hwdep_ioctl()
404 cfg->frame_size != 6 || usb_stream_hwdep_ioctl()
405 cfg->period_frames > 0x3000) { usb_stream_hwdep_ioctl()
409 switch (cfg->sample_rate) { usb_stream_hwdep_ioctl()
422 if (cfg->period_frames < min_period_frames) { usb_stream_hwdep_ioctl()
434 if (!s || memcmp(cfg, &s->cfg, sizeof(*cfg))) { usb_stream_hwdep_ioctl()
440 if (!s || memcmp(cfg, &s->cfg, sizeof(*cfg)) || usb_stream_hwdep_ioctl()
443 if (!us122l_start(us122l, cfg->sample_rate, cfg->period_frames)) usb_stream_hwdep_ioctl()
451 kfree(cfg); usb_stream_hwdep_ioctl()
725 us122l->sk.s->cfg.sample_rate); snd_us122l_resume()
/linux-4.1.27/drivers/net/wireless/rtlwifi/rtl8723be/
H A Dsw.c147 rtlpriv->dbg.global_debuglevel = rtlpriv->cfg->mod_params->debug; rtl8723be_init_sw_vars()
149 rtlpriv->psc.inactiveps = rtlpriv->cfg->mod_params->inactiveps; rtl8723be_init_sw_vars()
150 rtlpriv->psc.swctrl_lps = rtlpriv->cfg->mod_params->swctrl_lps; rtl8723be_init_sw_vars()
151 rtlpriv->psc.fwctrl_lps = rtlpriv->cfg->mod_params->fwctrl_lps; rtl8723be_init_sw_vars()
152 rtlpci->msi_support = rtlpriv->cfg->mod_params->msi_support; rtl8723be_init_sw_vars()
153 rtlpriv->cfg->mod_params->sw_crypto = rtl8723be_init_sw_vars()
154 rtlpriv->cfg->mod_params->sw_crypto; rtl8723be_init_sw_vars()
155 rtlpriv->cfg->mod_params->disable_watchdog = rtl8723be_init_sw_vars()
156 rtlpriv->cfg->mod_params->disable_watchdog; rtl8723be_init_sw_vars()
157 if (rtlpriv->cfg->mod_params->disable_watchdog) rtl8723be_init_sw_vars()
187 pr_info("Using firmware %s\n", rtlpriv->cfg->fw_name); rtl8723be_init_sw_vars()
188 err = request_firmware_nowait(THIS_MODULE, 1, rtlpriv->cfg->fw_name, rtl8723be_init_sw_vars()
/linux-4.1.27/drivers/gpu/drm/atmel-hlcdc/
H A Datmel_hlcdc_crtc.c65 unsigned int cfg; atmel_hlcdc_crtc_mode_set_nofb() local
88 cfg = 0; atmel_hlcdc_crtc_mode_set_nofb()
94 cfg |= ATMEL_HLCDC_CLKSEL; atmel_hlcdc_crtc_mode_set_nofb()
101 cfg |= ATMEL_HLCDC_CLKDIV(div); atmel_hlcdc_crtc_mode_set_nofb()
105 ATMEL_HLCDC_CLKPOL, cfg); atmel_hlcdc_crtc_mode_set_nofb()
107 cfg = 0; atmel_hlcdc_crtc_mode_set_nofb()
110 cfg |= ATMEL_HLCDC_VSPOL; atmel_hlcdc_crtc_mode_set_nofb()
113 cfg |= ATMEL_HLCDC_HSPOL; atmel_hlcdc_crtc_mode_set_nofb()
121 cfg); atmel_hlcdc_crtc_mode_set_nofb()
/linux-4.1.27/arch/x86/platform/uv/
H A Duv_irq.c134 struct irq_cfg *cfg = irq_cfg(irq); arch_enable_uv_irq() local
143 err = assign_irq_vector(irq, cfg, eligible_cpu); arch_enable_uv_irq()
161 entry->vector = cfg->vector; arch_enable_uv_irq()
172 if (cfg->move_in_progress) arch_enable_uv_irq()
173 send_cleanup_vector(cfg); arch_enable_uv_irq()
201 struct irq_cfg *cfg = irqd_cfg(data); uv_set_irq_affinity() local
213 entry->vector = cfg->vector; uv_set_irq_affinity()
227 if (cfg->move_in_progress) uv_set_irq_affinity()
228 send_cleanup_vector(cfg); uv_set_irq_affinity()
/linux-4.1.27/drivers/gpu/drm/nouveau/include/nvif/
H A Ddriver.h6 int (*init)(const char *name, u64 device, const char *cfg,
/linux-4.1.27/drivers/gpu/drm/nouveau/nvif/
H A Dclient.c72 const char *name, u64 device, const char *cfg, const char *dbg, nvif_client_init()
88 ret = client->driver->init(name, device, cfg, dbg, nvif_client_init()
109 const char *cfg, const char *dbg, nvif_client_new()
115 device, cfg, dbg, client); nvif_client_new()
71 nvif_client_init(void (*dtor)(struct nvif_client *), const char *driver, const char *name, u64 device, const char *cfg, const char *dbg, struct nvif_client *client) nvif_client_init() argument
108 nvif_client_new(const char *driver, const char *name, u64 device, const char *cfg, const char *dbg, struct nvif_client **pclient) nvif_client_new() argument
/linux-4.1.27/arch/cris/include/arch-v32/arch/hwregs/iop/asm/
H A Diop_reg_space_asm.h2 * generated by ../gen_sw.pl Mon Apr 11 16:10:18 2005 iop_sw.cfg

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