Lines Matching refs:cfg
26 void d40_log_cfg(struct stedma40_chan_cfg *cfg, in d40_log_cfg() argument
33 if (cfg->dir == DMA_MEM_TO_DEV || in d40_log_cfg()
34 cfg->dir == DMA_MEM_TO_MEM) in d40_log_cfg()
38 if (cfg->dir == DMA_DEV_TO_MEM || in d40_log_cfg()
39 cfg->dir == DMA_MEM_TO_MEM) in d40_log_cfg()
43 if (cfg->dir == DMA_DEV_TO_MEM || in d40_log_cfg()
44 cfg->dir == DMA_DEV_TO_DEV) in d40_log_cfg()
48 if (cfg->dir == DMA_MEM_TO_DEV || in d40_log_cfg()
49 cfg->dir == DMA_DEV_TO_DEV) in d40_log_cfg()
53 l3 |= cfg->dst_info.psize << D40_MEM_LCSP3_DCFG_PSIZE_POS; in d40_log_cfg()
54 l3 |= d40_width_to_bits(cfg->dst_info.data_width) in d40_log_cfg()
58 l1 |= cfg->src_info.psize << D40_MEM_LCSP1_SCFG_PSIZE_POS; in d40_log_cfg()
59 l1 |= d40_width_to_bits(cfg->src_info.data_width) in d40_log_cfg()
67 void d40_phy_cfg(struct stedma40_chan_cfg *cfg, u32 *src_cfg, u32 *dst_cfg) in d40_phy_cfg() argument
72 if ((cfg->dir == DMA_DEV_TO_MEM) || in d40_phy_cfg()
73 (cfg->dir == DMA_DEV_TO_DEV)) { in d40_phy_cfg()
76 src |= D40_TYPE_TO_EVENT(cfg->dev_type); in d40_phy_cfg()
78 if (cfg->src_info.flow_ctrl == STEDMA40_NO_FLOW_CTRL) in d40_phy_cfg()
83 if ((cfg->dir == DMA_MEM_TO_DEV) || in d40_phy_cfg()
84 (cfg->dir == DMA_DEV_TO_DEV)) { in d40_phy_cfg()
87 dst |= D40_TYPE_TO_EVENT(cfg->dev_type); in d40_phy_cfg()
89 if (cfg->dst_info.flow_ctrl == STEDMA40_NO_FLOW_CTRL) in d40_phy_cfg()
102 if (cfg->src_info.psize != STEDMA40_PSIZE_PHY_1) { in d40_phy_cfg()
104 src |= cfg->src_info.psize << D40_SREG_CFG_PSIZE_POS; in d40_phy_cfg()
106 if (cfg->dst_info.psize != STEDMA40_PSIZE_PHY_1) { in d40_phy_cfg()
108 dst |= cfg->dst_info.psize << D40_SREG_CFG_PSIZE_POS; in d40_phy_cfg()
112 src |= d40_width_to_bits(cfg->src_info.data_width) in d40_phy_cfg()
114 dst |= d40_width_to_bits(cfg->dst_info.data_width) in d40_phy_cfg()
118 if (cfg->high_priority) { in d40_phy_cfg()
123 if (cfg->src_info.big_endian) in d40_phy_cfg()
125 if (cfg->dst_info.big_endian) in d40_phy_cfg()