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Searched refs:parents (Results 1 – 68 of 68) sorted by relevance

/linux-4.1.27/drivers/clk/sunxi/
Dclk-a20-gmac.c67 const char *parents[SUN7I_A20_GMAC_PARENTS]; in sun7i_a20_gmac_clk_setup() local
83 parents[0] = of_clk_get_parent_name(node, 0); in sun7i_a20_gmac_clk_setup()
84 parents[1] = of_clk_get_parent_name(node, 1); in sun7i_a20_gmac_clk_setup()
85 if (!parents[0] || !parents[1]) in sun7i_a20_gmac_clk_setup()
102 parents, SUN7I_A20_GMAC_PARENTS, in sun7i_a20_gmac_clk_setup()
Dclk-sun6i-ar100.c175 const char *parents[SUN6I_AR100_MAX_PARENTS]; in sun6i_a31_ar100_clk_probe() local
199 parents[i] = of_clk_get_parent_name(np, i); in sun6i_a31_ar100_clk_probe()
205 init.parent_names = parents; in sun6i_a31_ar100_clk_probe()
Dclk-factors.c173 const char *parents[FACTORS_MAX_PARENTS]; in sunxi_factors_register() local
178 (parents[i] = of_clk_get_parent_name(node, i)) != NULL) in sunxi_factors_register()
233 parents, i, in sunxi_factors_register()
Dclk-sunxi.c196 const char *parents[SUN6I_AHB1_MAX_PARENTS]; in sun6i_ahb1_clk_setup() local
204 (parents[i] = of_clk_get_parent_name(node, i)) != NULL) in sun6i_ahb1_clk_setup()
226 clk = clk_register_composite(NULL, clk_name, parents, i, in sun6i_ahb1_clk_setup()
785 const char *parents[SUNXI_MAX_PARENTS]; in sunxi_mux_clk_setup() local
792 (parents[i] = of_clk_get_parent_name(node, i)) != NULL) in sunxi_mux_clk_setup()
797 clk = clk_register_mux(NULL, clk_name, parents, i, in sunxi_mux_clk_setup()
/linux-4.1.27/drivers/clk/st/
Dclkgen-mux.c26 const char **parents; in clkgen_mux_get_parents() local
33 parents = kzalloc(nparents * sizeof(const char *), GFP_KERNEL); in clkgen_mux_get_parents()
34 if (!parents) in clkgen_mux_get_parents()
38 parents[i] = of_clk_get_parent_name(np, i); in clkgen_mux_get_parents()
41 return parents; in clkgen_mux_get_parents()
394 const char **parents; in st_of_clkgena_divmux_setup() local
407 parents = clkgen_mux_get_parents(np, &num_parents); in st_of_clkgena_divmux_setup()
408 if (IS_ERR(parents)) in st_of_clkgena_divmux_setup()
436 clk = clk_register_genamux(clk_name, parents, num_parents, in st_of_clkgena_divmux_setup()
445 kfree(parents); in st_of_clkgena_divmux_setup()
[all …]
Dclk-flexgen.c245 const char **parents; in flexgen_get_parents() local
252 parents = kcalloc(nparents, sizeof(const char *), GFP_KERNEL); in flexgen_get_parents()
253 if (!parents) in flexgen_get_parents()
257 parents[i] = of_clk_get_parent_name(np, i); in flexgen_get_parents()
260 return parents; in flexgen_get_parents()
268 const char **parents; in st_of_flexgen_setup() local
281 parents = flexgen_get_parents(np, &num_parents); in st_of_flexgen_setup()
282 if (!parents) in st_of_flexgen_setup()
323 clk = clk_register_flexgen(clk_name, parents, num_parents, in st_of_flexgen_setup()
332 kfree(parents); in st_of_flexgen_setup()
[all …]
/linux-4.1.27/drivers/clk/samsung/
Dclk-exynos-clkout.c60 struct clk *parents[EXYNOS_CLKOUT_PARENTS]; in exynos_clkout_init() local
76 parents[i] = of_clk_get_by_name(node, name); in exynos_clkout_init()
77 if (IS_ERR(parents[i])) { in exynos_clkout_init()
82 parent_names[i] = __clk_get_name(parents[i]); in exynos_clkout_init()
127 if (!IS_ERR(parents[i])) in exynos_clkout_init()
128 clk_put(parents[i]); in exynos_clkout_init()
/linux-4.1.27/drivers/clk/keystone/
Dpll.c302 const char *parents[2]; in of_pll_mux_clk_init() local
312 parents[0] = of_clk_get_parent_name(node, 0); in of_pll_mux_clk_init()
313 parents[1] = of_clk_get_parent_name(node, 1); in of_pll_mux_clk_init()
314 if (!parents[0] || !parents[1]) { in of_pll_mux_clk_init()
329 clk = clk_register_mux(NULL, clk_name, (const char **)&parents, in of_pll_mux_clk_init()
330 ARRAY_SIZE(parents) , 0, reg, shift, mask, in of_pll_mux_clk_init()
/linux-4.1.27/drivers/clk/pxa/
Dclk-pxa.h83 #define PXA_CKEN(_dev_id, _con_id, _name, parents, _mult_lp, _div_lp, \ argument
86 .dev_id = _dev_id, .con_id = _con_id, .parent_names = parents,\
93 #define PXA_CKEN_1RATE(dev_id, con_id, name, parents, cken_reg, \ argument
95 PXA_CKEN(dev_id, con_id, name, parents, 1, 1, 1, 1, \
Dclk-pxa25x.c100 #define PXA25X_CKEN(dev_id, con_id, parents, mult, div, \ argument
102 PXA_CKEN(dev_id, con_id, bit, parents, mult, div, mult, div, \
114 #define PXA25X_CKEN_1RATE(dev_id, con_id, bit, parents, delay) \ argument
115 PXA_CKEN_1RATE(dev_id, con_id, bit, parents, \
117 #define PXA25X_CKEN_1RATE_AO(dev_id, con_id, bit, parents, delay) \ argument
118 PXA_CKEN_1RATE(dev_id, con_id, bit, parents, \
Dclk-pxa27x.c93 #define PXA27X_CKEN(dev_id, con_id, parents, mult_hp, div_hp, \ argument
95 PXA_CKEN(dev_id, con_id, bit, parents, 1, 1, mult_hp, div_hp, \
107 #define PXA27X_CKEN_1RATE(dev_id, con_id, bit, parents, delay) \ argument
108 PXA_CKEN_1RATE(dev_id, con_id, bit, parents, \
110 #define PXA27X_CKEN_1RATE_AO(dev_id, con_id, bit, parents, delay) \ argument
111 PXA_CKEN_1RATE(dev_id, con_id, bit, parents, \
Dclk-pxa3xx.c130 #define PXA3XX_CKEN(dev_id, con_id, parents, mult_lp, div_lp, mult_hp, \ argument
132 PXA_CKEN(dev_id, con_id, bit, parents, mult_lp, div_lp, \
139 #define PXA3XX_CKEN_1RATE(dev_id, con_id, bit, parents) \ argument
140 PXA_CKEN_1RATE(dev_id, con_id, bit, parents, \
/linux-4.1.27/drivers/clk/shmobile/
Dclk-div6.c37 u8 *parents; member
137 if (clock->parents[i] == hw_index) in cpg_div6_clock_get_parent()
156 hw_index = clock->parents[index]; in cpg_div6_clock_set_parent()
197 clock->parents = kmalloc_array(num_parents, sizeof(*clock->parents), in cpg_div6_clock_init()
231 clock->parents[valid_parents] = i; in cpg_div6_clock_init()
/linux-4.1.27/arch/arm/mach-imx/
Dclk.h74 u8 shift, u8 width, const char **parents,
112 u8 shift, u8 width, const char **parents, int num_parents) in imx_clk_mux() argument
114 return clk_register_mux(NULL, name, parents, num_parents, in imx_clk_mux()
120 void __iomem *reg, u8 shift, u8 width, const char **parents, in imx_clk_mux_flags() argument
123 return clk_register_mux(NULL, name, parents, num_parents, in imx_clk_mux_flags()
Dclk-fixup-mux.c75 u8 shift, u8 width, const char **parents, in imx_clk_fixup_mux() argument
91 init.parent_names = parents; in imx_clk_fixup_mux()
/linux-4.1.27/drivers/clk/tegra/
Dclk-tegra-pmc.c40 const char **parents; member
53 .parents = clk_out ##_num ##_parents,\
98 clk = clk_register_mux(NULL, data->mux_name, data->parents, in tegra_pmc_clk_init()
/linux-4.1.27/drivers/clk/ti/
Dclk-3xxx-legacy.c96 .parents = osc_sys_ck_parents,
132 .parents = dpll3_ck_parents,
303 .parents = dpll4_ck_parents,
401 .parents = omap_96m_fck_parents,
505 .parents = dpll5_ck_parents,
588 .parents = omap_48m_fck_parents,
648 .parents = mcbsp2_mux_fck_parents,
820 .parents = gpt2_mux_fck_parents,
959 .parents = mcbsp3_mux_fck_parents,
1004 .parents = gpt9_mux_fck_parents,
[all …]
Dclock.h89 const char **parents; member
138 const char **parents; member
Ddpll.c209 clk_ref = clk_get_sys(NULL, dpll->parents[0]); in ti_clk_register_dpll()
210 clk_bypass = clk_get_sys(NULL, dpll->parents[1]); in ti_clk_register_dpll()
231 init.parent_names = dpll->parents; in ti_clk_register_dpll()
Dcomposite.c146 parent_names = comp->mux->parents; in ti_clk_register_composite()
Dmux.c176 return _register_mux(NULL, setup->name, mux->parents, mux->num_parents, in ti_clk_register_mux()
/linux-4.1.27/drivers/clk/pistachio/
Dclk.h37 const char **parents; member
48 .parents = _pnames, \
Dclk.c83 clk = clk_register_mux(NULL, mux[i].name, mux[i].parents, in pistachio_clk_register_mux()
/linux-4.1.27/Documentation/devicetree/bindings/clock/
Dclock-bindings.txt135 ==Assigned clock parents and rates==
139 node through assigned-clocks, assigned-clock-parents and assigned-clock-rates
140 properties. The assigned-clock-parents property should contain a list of parent
141 clocks in form of phandle and clock specifier pairs, the assigned-clock-parents
156 assigned-clock-parents = <&pll 2>;
Drenesas,cpg-div6-clocks.txt18 clocks must be specified. For clocks with multiple parents, invalid
Drenesas,cpg-mstp-clocks.txt26 - clocks: Reference to the parent clocks, one per output clock. The parents
/linux-4.1.27/drivers/clk/
Dclk.c56 struct clk_core **parents; member
617 else if (!clk->parents) in clk_core_get_parent_by_index()
619 else if (!clk->parents[index]) in clk_core_get_parent_by_index()
620 return clk->parents[index] = in clk_core_get_parent_by_index()
623 return clk->parents[index]; in clk_core_get_parent_by_index()
1409 if (!clk->parents) { in clk_fetch_parent_index()
1410 clk->parents = kcalloc(clk->num_parents, in clk_fetch_parent_index()
1412 if (!clk->parents) in clk_fetch_parent_index()
1422 if (clk->parents[i] == parent) in clk_fetch_parent_index()
1425 if (clk->parents[i]) in clk_fetch_parent_index()
[all …]
/linux-4.1.27/fs/btrfs/
Dbackref.c225 struct ulist *parents, struct __prelim_ref *ref, in add_all_parents() argument
242 ret = ulist_add(parents, eb->start, 0, GFP_NOFS); in add_all_parents()
282 ret = ulist_add_merge_ptr(parents, eb->start, in add_all_parents()
311 struct ulist *parents, in __resolve_indirect_ref() argument
369 ret = add_all_parents(root, path, parents, ref, level, time_seq, in __resolve_indirect_ref()
391 struct ulist *parents; in __resolve_indirect_refs() local
395 parents = ulist_alloc(GFP_NOFS); in __resolve_indirect_refs()
396 if (!parents) in __resolve_indirect_refs()
414 parents, extent_item_pos, in __resolve_indirect_refs()
429 node = ulist_next(parents, &uiter); in __resolve_indirect_refs()
[all …]
Dqgroup.c2069 struct ulist *parents; in qgroup_subtree_accounting() local
2076 parents = ulist_alloc(GFP_NOFS); in qgroup_subtree_accounting()
2077 if (!parents) in qgroup_subtree_accounting()
2126 err = ulist_add(parents, glist->group->qgroupid, in qgroup_subtree_accounting()
2135 while ((unode = ulist_next(parents, &uiter))) { in qgroup_subtree_accounting()
2143 err = ulist_add(parents, glist->group->qgroupid, in qgroup_subtree_accounting()
2157 ulist_free(parents); in qgroup_subtree_accounting()
/linux-4.1.27/arch/arm/boot/dts/
Dexynos4412-odroid-common.dtsi57 assigned-clock-parents = <&clock CLK_FOUT_EPLL>,
126 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
134 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
142 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
150 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
Dstih407.dtsi40 assigned-clock-parents = <0>,
100 assigned-clock-parents = <&clk_s_d2_quadfs 0>,
Dexynos4210-trats.dts457 assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
465 assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
473 assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
481 assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
Dexynos4210-universal_c210.dts480 assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
488 assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
496 assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
504 assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
Dstih410.dtsi111 assigned-clock-parents = <0>,
171 assigned-clock-parents = <&clk_s_d2_quadfs 0>,
Dexynos4412-trats2.dts769 assigned-clock-parents = <&clock CLK_XUSBXTI>,
776 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
784 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
792 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
800 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
810 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
830 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
949 assigned-clock-parents = <&clock CLK_XUSBXTI>;
Drk3288-evb-rk808.dts228 assigned-clock-parents = <&ext_gmac>;
Drk3288-popmetal.dts134 assigned-clock-parents = <&ext_gmac>;
Drk3288-firefly.dtsi184 assigned-clock-parents = <&ext_gmac>;
Dexynos3250.dtsi181 assigned-clock-parents = <&cmu CLK_FIN_PLL>,
Dexynos5420-peach-pit.dts920 assigned-clock-parents = <&clock CLK_FIN_PLL>;
Dexynos5800-peach-pi.dts883 assigned-clock-parents = <&clock CLK_FIN_PLL>;
Dsun6i-a31.dtsi387 assigned-clock-parents = <&pll6 0>;
/linux-4.1.27/drivers/pinctrl/samsung/
Dpinctrl-s3c24xx.c96 int parents[NUM_EINT_IRQ]; member
207 int parent_irq = eint_data->parents[data->hwirq]; in s3c2410_eint0_3_ack()
218 int parent_irq = eint_data->parents[data->hwirq]; in s3c2410_eint0_3_mask()
229 int parent_irq = eint_data->parents[data->hwirq]; in s3c2410_eint0_3_unmask()
516 eint_data->parents[i] = irq; in s3c24xx_eint_init()
/linux-4.1.27/Documentation/devicetree/bindings/clock/ti/
Dmux.txt7 parents, one of which can be selected as output. This clock does not
10 By default the "clocks" property lists the parents in the same order
Dcomposite.txt8 a multiplexer clock with multiple input clock signals or parents, one
/linux-4.1.27/drivers/clk/mvebu/
Dkirkwood.c236 const char **parents; member
309 desc[n].parents, desc[n].num_parents, in kirkwood_clk_muxing_setup()
/linux-4.1.27/Documentation/devicetree/bindings/net/
Drockchip-dwmac.txt30 - assigned-clock-parents = parent of main clock.
63 assigned-clock-parents = <&ext_gmac>;
/linux-4.1.27/Documentation/devicetree/bindings/leds/
Dleds-ns2.txt1 Binding for dual-GPIO LED found on Network Space v2 (and parents).
/linux-4.1.27/Documentation/devicetree/bindings/interrupt-controller/
Dinterrupts.txt26 to reference multiple interrupt parents. Each entry in this property contains
28 should only be used when a device has multiple interrupt parents.
Dbrcm,bcm7120-l2-intc.txt65 respective interrupt parents. Should match exactly the number of interrupts
/linux-4.1.27/arch/x86/kvm/
Dmmu.c1902 #define for_each_sp(pvec, sp, parents, i) \ argument
1903 for (i = mmu_pages_next(&pvec, &parents, -1), \
1906 i = mmu_pages_next(&pvec, &parents, i))
1909 struct mmu_page_path *parents, in mmu_pages_next() argument
1918 parents->idx[0] = pvec->page[n].idx; in mmu_pages_next()
1922 parents->parent[sp->role.level-2] = sp; in mmu_pages_next()
1923 parents->idx[sp->role.level-1] = pvec->page[n].idx; in mmu_pages_next()
1929 static void mmu_pages_clear_parents(struct mmu_page_path *parents) in mmu_pages_clear_parents() argument
1935 unsigned int idx = parents->idx[level]; in mmu_pages_clear_parents()
1937 sp = parents->parent[level]; in mmu_pages_clear_parents()
[all …]
/linux-4.1.27/drivers/clk/zynq/
Dclkc.c107 const char **parents, int enable) in zynq_clk_register_fclk() argument
137 clk = clk_register_mux(NULL, mux_name, parents, 4, in zynq_clk_register_fclk()
180 const char **parents, unsigned int two_gates) in zynq_clk_register_periph_clk() argument
195 clk = clk_register_mux(NULL, mux_name, parents, 4, in zynq_clk_register_periph_clk()
/linux-4.1.27/Documentation/devicetree/bindings/arm/msm/
Dtimer.txt17 - clocks: Reference to the parent clocks, one per output clock. The parents
/linux-4.1.27/Documentation/devicetree/bindings/video/
Dexynos_hdmi.txt24 parents i.e. sclk_pixel and sclk_hdmiphy. If hdmiphy is stable
/linux-4.1.27/Documentation/power/
Dswsusp.txt189 * SUSPEND all but swap device and parents
192 * SUSPEND swap device and parents
195 Oh no, that does not work, if swap device or its parents uses DMA,
198 * SUSPEND all but swap device and parents
199 * FREEZE swap device and parents
201 * UNFREEZE swap device and parents
203 * SUSPEND swap device and parents
/linux-4.1.27/scripts/kconfig/
Dgconf.c59 static GtkTreeIter *parents[256]; variable
208 for (parents[0] = NULL, i = 1; i < 256; i++) in init_tree_model()
209 parents[i] = (GtkTreeIter *) g_malloc(sizeof(GtkTreeIter)); in init_tree_model()
1200 GtkTreeIter *parent = parents[indent - 1]; in place_node()
1201 GtkTreeIter *node = parents[indent]; in place_node()
/linux-4.1.27/Documentation/devicetree/bindings/i2c/
Di2c-pxa-pci-ce4100.txt45 * requires also a valid translation in parents ranges
/linux-4.1.27/Documentation/filesystems/
Ddirectory-locking32 * lock parents in "ancestors first" order.
Doverlayfs.txt149 exists in the upper filesystem - creating it and any parents as
Dporting73 same (i.e. parents and victim are locked, etc.).
Dvfs.txt1086 d_drop: this unhashes a dentry from its parents hash list. A
1095 d_add: add a dentry to its parents hash list and then calls
/linux-4.1.27/Documentation/
Dclk.txt48 struct clk **parents;
Dsysfs-rules.txt163 access the chain of parents is a bug in the application.
/linux-4.1.27/tools/testing/ktest/
Dktest.pl3738 my @parents = get_depends $config;
3739 foreach my $parent (@parents) {
/linux-4.1.27/Documentation/driver-model/
Dporting.txt138 devices are shutdown before their physical parents, and vice versa.
/linux-4.1.27/drivers/leds/
DKconfig438 Network Space v2 board (and parents). This include Internet Space v2,
/linux-4.1.27/Documentation/cgroups/
Dcpusets.txt130 of the parents CPU and Memory Node resources.
207 - Its CPUs and Memory Nodes must be a subset of its parents.
Dcgroups.txt295 value of their parents' notify_on_release settings. The default value of