Searched refs:timer (Results 1 - 200 of 3187) sorted by relevance

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/linux-4.1.27/drivers/clocksource/
H A Dzevio-timer.c2 * linux/drivers/clocksource/zevio-timer.c
69 struct zevio_timer *timer = container_of(dev, struct zevio_timer, zevio_timer_set_event() local
72 writel(delta, timer->timer1 + IO_CURRENT_VAL); zevio_timer_set_event()
74 timer->timer1 + IO_CONTROL); zevio_timer_set_event()
82 struct zevio_timer *timer = container_of(dev, struct zevio_timer, zevio_timer_set_mode() local
88 /* Enable timer interrupts */ zevio_timer_set_mode()
89 writel(TIMER_INTR_MSK, timer->interrupt_regs + IO_INTR_MSK); zevio_timer_set_mode()
90 writel(TIMER_INTR_ALL, timer->interrupt_regs + IO_INTR_ACK); zevio_timer_set_mode()
94 /* Disable timer interrupts */ zevio_timer_set_mode()
95 writel(0, timer->interrupt_regs + IO_INTR_MSK); zevio_timer_set_mode()
96 writel(TIMER_INTR_ALL, timer->interrupt_regs + IO_INTR_ACK); zevio_timer_set_mode()
97 /* Stop timer */ zevio_timer_set_mode()
98 writel(CNTL_STOP_TIMER, timer->timer1 + IO_CONTROL); zevio_timer_set_mode()
109 struct zevio_timer *timer = dev_id; zevio_timer_interrupt() local
112 intr = readl(timer->interrupt_regs + IO_INTR_ACK); zevio_timer_interrupt()
116 writel(TIMER_INTR_MSK, timer->interrupt_regs + IO_INTR_ACK); zevio_timer_interrupt()
117 writel(CNTL_STOP_TIMER, timer->timer1 + IO_CONTROL); zevio_timer_interrupt()
119 if (timer->clkevt.event_handler) zevio_timer_interrupt()
120 timer->clkevt.event_handler(&timer->clkevt); zevio_timer_interrupt()
127 struct zevio_timer *timer; zevio_timer_add() local
131 timer = kzalloc(sizeof(*timer), GFP_KERNEL); zevio_timer_add()
132 if (!timer) zevio_timer_add()
135 timer->base = of_iomap(node, 0); zevio_timer_add()
136 if (!timer->base) { zevio_timer_add()
140 timer->timer1 = timer->base + IO_TIMER1; zevio_timer_add()
141 timer->timer2 = timer->base + IO_TIMER2; zevio_timer_add()
143 timer->clk = of_clk_get(node, 0); zevio_timer_add()
144 if (IS_ERR(timer->clk)) { zevio_timer_add()
145 ret = PTR_ERR(timer->clk); zevio_timer_add()
150 timer->interrupt_regs = of_iomap(node, 1); zevio_timer_add()
154 scnprintf(timer->clocksource_name, sizeof(timer->clocksource_name), zevio_timer_add()
158 scnprintf(timer->clockevent_name, sizeof(timer->clockevent_name), zevio_timer_add()
162 if (timer->interrupt_regs && irqnr) { zevio_timer_add()
163 timer->clkevt.name = timer->clockevent_name; zevio_timer_add()
164 timer->clkevt.set_next_event = zevio_timer_set_event; zevio_timer_add()
165 timer->clkevt.set_mode = zevio_timer_set_mode; zevio_timer_add()
166 timer->clkevt.rating = 200; zevio_timer_add()
167 timer->clkevt.cpumask = cpu_all_mask; zevio_timer_add()
168 timer->clkevt.features = CLOCK_EVT_FEAT_ONESHOT; zevio_timer_add()
169 timer->clkevt.irq = irqnr; zevio_timer_add()
171 writel(CNTL_STOP_TIMER, timer->timer1 + IO_CONTROL); zevio_timer_add()
172 writel(0, timer->timer1 + IO_DIVIDER); zevio_timer_add()
174 /* Start with timer interrupts disabled */ zevio_timer_add()
175 writel(0, timer->interrupt_regs + IO_INTR_MSK); zevio_timer_add()
176 writel(TIMER_INTR_ALL, timer->interrupt_regs + IO_INTR_ACK); zevio_timer_add()
178 /* Interrupt to occur when timer value matches 0 */ zevio_timer_add()
179 writel(0, timer->base + IO_MATCH(TIMER_MATCH)); zevio_timer_add()
181 timer->clkevt_irq.name = timer->clockevent_name; zevio_timer_add()
182 timer->clkevt_irq.handler = zevio_timer_interrupt; zevio_timer_add()
183 timer->clkevt_irq.dev_id = timer; zevio_timer_add()
184 timer->clkevt_irq.flags = IRQF_TIMER | IRQF_IRQPOLL; zevio_timer_add()
186 setup_irq(irqnr, &timer->clkevt_irq); zevio_timer_add()
188 clockevents_config_and_register(&timer->clkevt, zevio_timer_add()
189 clk_get_rate(timer->clk), 0x0001, 0xffff); zevio_timer_add()
190 pr_info("Added %s as clockevent\n", timer->clockevent_name); zevio_timer_add()
193 writel(CNTL_STOP_TIMER, timer->timer2 + IO_CONTROL); zevio_timer_add()
194 writel(0, timer->timer2 + IO_CURRENT_VAL); zevio_timer_add()
195 writel(0, timer->timer2 + IO_DIVIDER); zevio_timer_add()
197 timer->timer2 + IO_CONTROL); zevio_timer_add()
199 clocksource_mmio_init(timer->timer2 + IO_CURRENT_VAL, zevio_timer_add()
200 timer->clocksource_name, zevio_timer_add()
201 clk_get_rate(timer->clk), zevio_timer_add()
205 pr_info("Added %s as clocksource\n", timer->clocksource_name); zevio_timer_add()
209 iounmap(timer->base); zevio_timer_add()
211 kfree(timer); zevio_timer_add()
220 CLOCKSOURCE_OF_DECLARE(zevio_timer, "lsi,zevio-timer", zevio_timer_init);
H A Dbcm2835_timer.c75 struct bcm2835_timer *timer = container_of(evt_dev, bcm2835_time_set_next_event() local
78 timer->compare); bcm2835_time_set_next_event()
84 struct bcm2835_timer *timer = dev_id; bcm2835_time_interrupt() local
86 if (readl_relaxed(timer->control) & timer->match_mask) { bcm2835_time_interrupt()
87 writel_relaxed(timer->match_mask, timer->control); bcm2835_time_interrupt()
89 event_handler = ACCESS_ONCE(timer->evt.event_handler); bcm2835_time_interrupt()
91 event_handler(&timer->evt); bcm2835_time_interrupt()
103 struct bcm2835_timer *timer; bcm2835_timer_init() local
122 timer = kzalloc(sizeof(*timer), GFP_KERNEL); bcm2835_timer_init()
123 if (!timer) bcm2835_timer_init()
124 panic("Can't allocate timer struct\n"); bcm2835_timer_init()
126 timer->control = base + REG_CONTROL; bcm2835_timer_init()
127 timer->compare = base + REG_COMPARE(DEFAULT_TIMER); bcm2835_timer_init()
128 timer->match_mask = BIT(DEFAULT_TIMER); bcm2835_timer_init()
129 timer->evt.name = node->name; bcm2835_timer_init()
130 timer->evt.rating = 300; bcm2835_timer_init()
131 timer->evt.features = CLOCK_EVT_FEAT_ONESHOT; bcm2835_timer_init()
132 timer->evt.set_mode = bcm2835_time_set_mode; bcm2835_timer_init()
133 timer->evt.set_next_event = bcm2835_time_set_next_event; bcm2835_timer_init()
134 timer->evt.cpumask = cpumask_of(0); bcm2835_timer_init()
135 timer->act.name = node->name; bcm2835_timer_init()
136 timer->act.flags = IRQF_TIMER | IRQF_SHARED; bcm2835_timer_init()
137 timer->act.dev_id = timer; bcm2835_timer_init()
138 timer->act.handler = bcm2835_time_interrupt; bcm2835_timer_init()
140 if (setup_irq(irq, &timer->act)) bcm2835_timer_init()
141 panic("Can't set up timer IRQ\n"); bcm2835_timer_init()
143 clockevents_config_and_register(&timer->evt, freq, 0xf, 0xffffffff); bcm2835_timer_init()
145 pr_info("bcm2835: system timer (irq = %d)\n", irq); bcm2835_timer_init()
147 CLOCKSOURCE_OF_DECLARE(bcm2835, "brcm,bcm2835-system-timer",
H A Ddw_apb_timer.c52 static unsigned long apbt_readl(struct dw_apb_timer *timer, unsigned long offs) apbt_readl() argument
54 return readl(timer->base + offs); apbt_readl()
57 static void apbt_writel(struct dw_apb_timer *timer, unsigned long val, apbt_writel() argument
60 writel(val, timer->base + offs); apbt_writel()
63 static void apbt_disable_int(struct dw_apb_timer *timer) apbt_disable_int() argument
65 unsigned long ctrl = apbt_readl(timer, APBTMR_N_CONTROL); apbt_disable_int()
68 apbt_writel(timer, ctrl, APBTMR_N_CONTROL); apbt_disable_int()
78 disable_irq(dw_ced->timer.irq); dw_apb_clockevent_pause()
79 apbt_disable_int(&dw_ced->timer); dw_apb_clockevent_pause()
82 static void apbt_eoi(struct dw_apb_timer *timer) apbt_eoi() argument
84 apbt_readl(timer, APBTMR_N_EOI); apbt_eoi()
93 pr_info("Spurious APBT timer interrupt %d", irq); dw_apb_clockevent_irq()
98 dw_ced->eoi(&dw_ced->timer); dw_apb_clockevent_irq()
104 static void apbt_enable_int(struct dw_apb_timer *timer) apbt_enable_int() argument
106 unsigned long ctrl = apbt_readl(timer, APBTMR_N_CONTROL); apbt_enable_int()
108 apbt_readl(timer, APBTMR_N_EOI); apbt_enable_int()
110 apbt_writel(timer, ctrl, APBTMR_N_CONTROL); apbt_enable_int()
126 period = DIV_ROUND_UP(dw_ced->timer.freq, HZ); apbt_set_mode()
127 ctrl = apbt_readl(&dw_ced->timer, APBTMR_N_CONTROL); apbt_set_mode()
129 apbt_writel(&dw_ced->timer, ctrl, APBTMR_N_CONTROL); apbt_set_mode()
131 * DW APB p. 46, have to disable timer before load counter, apbt_set_mode()
135 apbt_writel(&dw_ced->timer, ctrl, APBTMR_N_CONTROL); apbt_set_mode()
138 apbt_writel(&dw_ced->timer, period, APBTMR_N_LOAD_COUNT); apbt_set_mode()
140 apbt_writel(&dw_ced->timer, ctrl, APBTMR_N_CONTROL); apbt_set_mode()
144 ctrl = apbt_readl(&dw_ced->timer, APBTMR_N_CONTROL); apbt_set_mode()
146 * set free running mode, this mode will let timer reload max apbt_set_mode()
153 apbt_writel(&dw_ced->timer, ctrl, APBTMR_N_CONTROL); apbt_set_mode()
155 apbt_writel(&dw_ced->timer, ctrl, APBTMR_N_CONTROL); apbt_set_mode()
161 apbt_writel(&dw_ced->timer, ~0, APBTMR_N_LOAD_COUNT); apbt_set_mode()
164 apbt_writel(&dw_ced->timer, ctrl, APBTMR_N_CONTROL); apbt_set_mode()
169 ctrl = apbt_readl(&dw_ced->timer, APBTMR_N_CONTROL); apbt_set_mode()
171 apbt_writel(&dw_ced->timer, ctrl, APBTMR_N_CONTROL); apbt_set_mode()
175 apbt_enable_int(&dw_ced->timer); apbt_set_mode()
186 /* Disable timer */ apbt_next_event()
187 ctrl = apbt_readl(&dw_ced->timer, APBTMR_N_CONTROL); apbt_next_event()
189 apbt_writel(&dw_ced->timer, ctrl, APBTMR_N_CONTROL); apbt_next_event()
191 apbt_writel(&dw_ced->timer, delta, APBTMR_N_LOAD_COUNT); apbt_next_event()
193 apbt_writel(&dw_ced->timer, ctrl, APBTMR_N_CONTROL); apbt_next_event()
199 * dw_apb_clockevent_init() - use an APB timer as a clock_event_device
202 * @name: The name used for the timer and the IRQ for it.
203 * @rating: The rating to give the timer.
204 * @base: I/O base for the timer registers.
205 * @irq: The interrupt number to use for the timer.
206 * @freq: The frequency that the timer counts at.
211 * it has been called for a timer then the IRQ will be requested, if not it
226 dw_ced->timer.base = base; dw_apb_clockevent_init()
227 dw_ced->timer.irq = irq; dw_apb_clockevent_init()
228 dw_ced->timer.freq = freq; dw_apb_clockevent_init()
238 dw_ced->ced.irq = dw_ced->timer.irq; dw_apb_clockevent_init()
252 pr_err("failed to request timer irq\n"); dw_apb_clockevent_init()
267 enable_irq(dw_ced->timer.irq); dw_apb_clockevent_resume()
277 free_irq(dw_ced->timer.irq, &dw_ced->ced); dw_apb_clockevent_stop()
287 apbt_writel(&dw_ced->timer, 0, APBTMR_N_CONTROL); dw_apb_clockevent_register()
289 apbt_enable_int(&dw_ced->timer); dw_apb_clockevent_register()
306 unsigned long ctrl = apbt_readl(&dw_cs->timer, APBTMR_N_CONTROL); dw_apb_clocksource_start()
309 apbt_writel(&dw_cs->timer, ctrl, APBTMR_N_CONTROL); dw_apb_clocksource_start()
310 apbt_writel(&dw_cs->timer, ~0, APBTMR_N_LOAD_COUNT); dw_apb_clocksource_start()
314 apbt_writel(&dw_cs->timer, ctrl, APBTMR_N_CONTROL); dw_apb_clocksource_start()
325 current_count = apbt_readl(&dw_cs->timer, APBTMR_N_CURRENT_VALUE); __apbt_read_clocksource()
339 * dw_apb_clocksource_init() - use an APB timer as a clocksource.
343 * @base: The I/O base for the timer registers.
344 * @freq: The frequency that the timer counts at.
346 * This creates a clocksource using an APB timer but does not yet register it
359 dw_cs->timer.base = base; dw_apb_clocksource_init()
360 dw_cs->timer.freq = freq; dw_apb_clocksource_init()
378 clocksource_register_hz(&dw_cs->cs, dw_cs->timer.freq); dw_apb_clocksource_register()
388 return (cycle_t)~apbt_readl(&dw_cs->timer, APBTMR_N_CURRENT_VALUE); dw_apb_clocksource_read()
H A Dtimer-sun5i.c51 struct sun5i_timer timer; member in struct:sun5i_timer_clksrc
59 struct sun5i_timer timer; member in struct:sun5i_timer_clkevt
67 * When we disable a timer, we need to wait at least for 2 cycles of
68 * the timer source clock. We will use for that the clocksource timer
74 u32 old = readl(ce->timer.base + TIMER_CNTVAL_LO_REG(1)); sun5i_clkevt_sync()
76 while ((old - readl(ce->timer.base + TIMER_CNTVAL_LO_REG(1))) < TIMER_SYNC_TICKS) sun5i_clkevt_sync()
80 static void sun5i_clkevt_time_stop(struct sun5i_timer_clkevt *ce, u8 timer) sun5i_clkevt_time_stop() argument
82 u32 val = readl(ce->timer.base + TIMER_CTL_REG(timer)); sun5i_clkevt_time_stop()
83 writel(val & ~TIMER_CTL_ENABLE, ce->timer.base + TIMER_CTL_REG(timer)); sun5i_clkevt_time_stop()
88 static void sun5i_clkevt_time_setup(struct sun5i_timer_clkevt *ce, u8 timer, u32 delay) sun5i_clkevt_time_setup() argument
90 writel(delay, ce->timer.base + TIMER_INTVAL_LO_REG(timer)); sun5i_clkevt_time_setup()
93 static void sun5i_clkevt_time_start(struct sun5i_timer_clkevt *ce, u8 timer, bool periodic) sun5i_clkevt_time_start() argument
95 u32 val = readl(ce->timer.base + TIMER_CTL_REG(timer)); sun5i_clkevt_time_start()
103 ce->timer.base + TIMER_CTL_REG(timer)); sun5i_clkevt_time_start()
114 sun5i_clkevt_time_setup(ce, 0, ce->timer.ticks_per_jiffy); sun5i_clkevt_mode()
145 writel(0x1, ce->timer.base + TIMER_IRQ_ST_REG); sun5i_timer_interrupt()
155 return ~readl(cs->timer.base + TIMER_CNTVAL_LO_REG(1)); sun5i_clksrc_read()
162 struct sun5i_timer *timer = to_sun5i_timer(nb); sun5i_rate_cb_clksrc() local
163 struct sun5i_timer_clksrc *cs = container_of(timer, struct sun5i_timer_clksrc, timer); sun5i_rate_cb_clksrc()
201 cs->timer.base = base; sun5i_setup_clocksource()
202 cs->timer.clk = clk; sun5i_setup_clocksource()
203 cs->timer.clk_rate_cb.notifier_call = sun5i_rate_cb_clksrc; sun5i_setup_clocksource()
204 cs->timer.clk_rate_cb.next = NULL; sun5i_setup_clocksource()
206 ret = clk_notifier_register(clk, &cs->timer.clk_rate_cb); sun5i_setup_clocksource()
231 clk_notifier_unregister(clk, &cs->timer.clk_rate_cb); sun5i_setup_clocksource()
243 struct sun5i_timer *timer = to_sun5i_timer(nb); sun5i_rate_cb_clkevt() local
244 struct sun5i_timer_clkevt *ce = container_of(timer, struct sun5i_timer_clkevt, timer); sun5i_rate_cb_clkevt()
248 ce->timer.ticks_per_jiffy = DIV_ROUND_UP(ndata->new_rate, HZ); sun5i_rate_cb_clkevt()
274 ce->timer.base = base; sun5i_setup_clockevent()
275 ce->timer.ticks_per_jiffy = DIV_ROUND_UP(rate, HZ); sun5i_setup_clockevent()
276 ce->timer.clk = clk; sun5i_setup_clockevent()
277 ce->timer.clk_rate_cb.notifier_call = sun5i_rate_cb_clkevt; sun5i_setup_clockevent()
278 ce->timer.clk_rate_cb.next = NULL; sun5i_setup_clockevent()
280 ret = clk_notifier_register(clk, &ce->timer.clk_rate_cb); sun5i_setup_clockevent()
311 clk_notifier_unregister(clk, &ce->timer.clk_rate_cb); sun5i_setup_clockevent()
336 panic("Can't get timer clock"); sun5i_timer_init()
H A Dtimer-keystone.c21 #define TIMER_NAME "timer-keystone"
41 * struct keystone_timer: holds timer's data
42 * @base: timer memory base address
44 * @event_dev: event device based on timer
50 } timer; variable in typeref:struct:keystone_timer
54 return readl_relaxed(timer.base + rg); keystone_timer_readl()
59 writel_relaxed(val, timer.base + rg); keystone_timer_writel()
74 * keystone_timer_config: configures timer to work in oneshot/periodic modes.
98 /* disable timer */ keystone_timer_config()
100 /* here we have to be sure the timer has been disabled */ keystone_timer_config()
110 * enable timer keystone_timer_config()
125 /* disable timer */ keystone_timer_disable()
149 keystone_timer_config(timer.hz_period, CLOCK_EVT_MODE_PERIODIC); keystone_set_mode()
163 struct clock_event_device *event_dev = &timer.event_dev; keystone_timer_init()
174 timer.base = of_iomap(np, 0); keystone_timer_init()
175 if (!timer.base) { keystone_timer_init()
183 iounmap(timer.base); keystone_timer_init()
197 /* here we have to be sure the timer has been disabled */ keystone_timer_init()
200 /* reset timer as 64-bit, no pre-scaler, plus features are disabled */ keystone_timer_init()
203 /* unreset timer */ keystone_timer_init()
210 timer.hz_period = DIV_ROUND_UP(rate, HZ); keystone_timer_init()
212 /* enable timer interrupts */ keystone_timer_init()
233 pr_info("keystone timer clock @%lu Hz\n", rate); keystone_timer_init()
237 iounmap(timer.base); keystone_timer_init()
240 CLOCKSOURCE_OF_DECLARE(keystone_timer, "ti,keystone-timer",
H A Ddw_apb_timer_of.c47 timer_clk = of_clk_get_by_name(np, "timer"); timer_get_base_and_rate()
70 panic("No IRQ for clock event timer"); add_clockevent()
102 * timer is found. sched_io_base then points to the current_value add_clocksource()
103 * register of the clocksource timer. add_clocksource()
134 static void __init dw_apb_timer_init(struct device_node *timer) dw_apb_timer_init() argument
138 pr_debug("%s: found clockevent timer\n", __func__); dw_apb_timer_init()
139 add_clockevent(timer); dw_apb_timer_init()
142 pr_debug("%s: found clocksource timer\n", __func__); dw_apb_timer_init()
143 add_clocksource(timer); dw_apb_timer_init()
152 CLOCKSOURCE_OF_DECLARE(pc3x2_timer, "picochip,pc3x2-timer", dw_apb_timer_init);
153 CLOCKSOURCE_OF_DECLARE(apb_timer_osc, "snps,dw-apb-timer-osc", dw_apb_timer_init);
154 CLOCKSOURCE_OF_DECLARE(apb_timer_sp, "snps,dw-apb-timer-sp", dw_apb_timer_init);
155 CLOCKSOURCE_OF_DECLARE(apb_timer, "snps,dw-apb-timer", dw_apb_timer_init);
H A Dmeson6_timer.c2 * Amlogic Meson6 SoCs timer handling.
46 static void meson6_clkevt_time_stop(unsigned char timer) meson6_clkevt_time_stop() argument
50 writel(val & ~TIMER_ENABLE_BIT(timer), timer_base + TIMER_ISA_MUX); meson6_clkevt_time_stop()
53 static void meson6_clkevt_time_setup(unsigned char timer, unsigned long delay) meson6_clkevt_time_setup() argument
55 writel(delay, timer_base + TIMER_ISA_VAL(timer)); meson6_clkevt_time_setup()
58 static void meson6_clkevt_time_start(unsigned char timer, bool periodic) meson6_clkevt_time_start() argument
63 val |= TIMER_PERIODIC_BIT(timer); meson6_clkevt_time_start()
65 val &= ~TIMER_PERIODIC_BIT(timer); meson6_clkevt_time_start()
67 writel(val | TIMER_ENABLE_BIT(timer), timer_base + TIMER_ISA_MUX); meson6_clkevt_time_start()
130 timer_base = of_io_request_and_map(node, 0, "meson6-timer"); meson6_timer_init()
138 /* Set 1us for timer E */ meson6_timer_init()
153 /* Stop the timer A */ meson6_timer_init()
166 CLOCKSOURCE_OF_DECLARE(meson6, "amlogic,meson6-timer",
H A Dscx200_hrt.c5 * high-resolution timer. The Geode SC-1100 (at least) has a buggy
8 * will detect and de-rate the bad TSC, allowing this timer to take
39 #define HR_TMEN (1 << 0) /* timer interrupt enable */
43 /* The base timer frequency, * 27 if selected */
48 /* Read the timer value */ read_hrt()
68 /* Reserve the timer's ISA io-region for ourselves */ init_hrt_clocksource()
72 pr_warn("unable to lock timer region\n"); init_hrt_clocksource()
76 /* write timer config */ init_hrt_clocksource()
84 pr_info("enabling scx200 high-res timer (%s MHz +%d ppm)\n", mhz27 ? "27":"1", ppm); init_hrt_clocksource()
H A Dcadence_ttc_timer.c6 * based on arch/mips/kernel/time.c timer driver
34 * The input frequency to the timer module for emulation is 2.5MHz which is
35 * common to all the timer channels (T1, T2, and T3). With a pre-scaler of 32,
38 * The input frequency to the timer module in silicon is configurable and
72 * struct ttc_timer - This definition defines local timer structure
74 * @base_addr: Base address of timer
110 * ttc_set_interval - Set the timer interval value
112 * @timer: Pointer to the timer instance
115 static void ttc_set_interval(struct ttc_timer *timer, ttc_set_interval() argument
121 ctrl_reg = readl_relaxed(timer->base_addr + TTC_CNT_CNTRL_OFFSET); ttc_set_interval()
123 writel_relaxed(ctrl_reg, timer->base_addr + TTC_CNT_CNTRL_OFFSET); ttc_set_interval()
125 writel_relaxed(cycles, timer->base_addr + TTC_INTR_VAL_OFFSET); ttc_set_interval()
133 writel_relaxed(ctrl_reg, timer->base_addr + TTC_CNT_CNTRL_OFFSET); ttc_set_interval()
137 * ttc_clock_event_interrupt - Clock event timer interrupt handler
147 struct ttc_timer *timer = &ttce->ttc; ttc_clock_event_interrupt() local
150 readl_relaxed(timer->base_addr + TTC_ISR_OFFSET); ttc_clock_event_interrupt()
158 * __ttc_clocksource_read - Reads the timer counter register
160 * returns: Current timer counter register value
164 struct ttc_timer *timer = &to_ttc_timer_clksrc(cs)->ttc; __ttc_clocksource_read() local
166 return (cycle_t)readl_relaxed(timer->base_addr + __ttc_clocksource_read()
187 struct ttc_timer *timer = &ttce->ttc; ttc_set_next_event() local
189 ttc_set_interval(timer, cycles); ttc_set_next_event()
194 * ttc_set_mode - Sets the mode of timer
203 struct ttc_timer *timer = &ttce->ttc; ttc_set_mode() local
208 ttc_set_interval(timer, DIV_ROUND_CLOSEST(ttce->ttc.freq, ttc_set_mode()
214 ctrl_reg = readl_relaxed(timer->base_addr + ttc_set_mode()
218 timer->base_addr + TTC_CNT_CNTRL_OFFSET); ttc_set_mode()
221 ctrl_reg = readl_relaxed(timer->base_addr + ttc_set_mode()
225 timer->base_addr + TTC_CNT_CNTRL_OFFSET); ttc_set_mode()
265 * store timer clock ctrl register so we can restore it in case ttc_rate_change_clocksource_cb()
439 * Setup the clock event timer to be an interval timer which ttc_setup_clockevent()
460 * ttc_timer_init - Initialize the timer
462 * Initializes the timer hardware and register the clock source and clock event
463 * timers with Linux kernal timer framework
465 static void __init ttc_timer_init(struct device_node *timer) ttc_timer_init() argument
481 * and use it. Note that the event timer uses the interrupt and it's the ttc_timer_init()
484 timer_baseaddr = of_iomap(timer, 0); ttc_timer_init()
486 pr_err("ERROR: invalid timer base address\n"); ttc_timer_init()
490 irq = irq_of_parse_and_map(timer, 1); ttc_timer_init()
496 of_property_read_u32(timer, "timer-width", &timer_width); ttc_timer_init()
500 clk_cs = of_clk_get(timer, clksel); ttc_timer_init()
502 pr_err("ERROR: timer input clock not found\n"); ttc_timer_init()
508 clk_ce = of_clk_get(timer, clksel); ttc_timer_init()
510 pr_err("ERROR: timer input clock not found\n"); ttc_timer_init()
517 pr_info("%s #0 at %p, irq=%d\n", timer->name, timer_baseaddr, irq); ttc_timer_init()
H A Dtime-armada-370-xp.c2 * Marvell Armada 370/XP SoC timer handling.
14 * Timer 0 is used as free-running clocksource, while timer 1 is
22 * * Armada 370 has no 25 MHz fixed timer.
24 * * Armada XP cannot work properly without such 25 MHz fixed timer as
28 * See Documentation/devicetree/bindings/timer/marvell,armada-370-xp-timer.txt
36 #include <linux/timer.h>
83 * Number of timer ticks per jiffy.
108 * Clear clockevent timer interrupt. armada_370_xp_clkevt_next_event()
113 * Setup new clockevent timer value. armada_370_xp_clkevt_next_event()
118 * Enable the timer. armada_370_xp_clkevt_next_event()
131 * Setup timer to fire at 1/HZ intervals. armada_370_xp_clkevt_mode()
137 * Enable timer. armada_370_xp_clkevt_mode()
142 * Disable timer. armada_370_xp_clkevt_mode()
147 * ACK pending timer interrupt. armada_370_xp_clkevt_mode()
158 * ACK timer interrupt and call event handler. armada_370_xp_timer_interrupt()
269 * We use timer 0 as clocksource, and private(local) timer 0 armada_370_xp_timer_common_init()
277 * Setup free-running clocksource timer (interrupts armada_370_xp_timer_common_init()
288 * Set scale and timer for sched_clock. armada_370_xp_timer_common_init()
302 * Setup clockevent timer (interrupt-driven). armada_370_xp_timer_common_init()
308 /* Immediately configure the timer on the boot CPU */ armada_370_xp_timer_common_init()
326 CLOCKSOURCE_OF_DECLARE(armada_xp, "marvell,armada-xp-timer",
354 CLOCKSOURCE_OF_DECLARE(armada_375, "marvell,armada-375-timer",
368 CLOCKSOURCE_OF_DECLARE(armada_370, "marvell,armada-370-timer",
H A Dsun4i_timer.c2 * Allwinner A1X SoCs timer handling.
46 * When we disable a timer, we need to wait at least for 2 cycles of
47 * the timer source clock. We will use for that the clocksource timer
59 static void sun4i_clkevt_time_stop(u8 timer) sun4i_clkevt_time_stop() argument
61 u32 val = readl(timer_base + TIMER_CTL_REG(timer)); sun4i_clkevt_time_stop()
62 writel(val & ~TIMER_CTL_ENABLE, timer_base + TIMER_CTL_REG(timer)); sun4i_clkevt_time_stop()
66 static void sun4i_clkevt_time_setup(u8 timer, unsigned long delay) sun4i_clkevt_time_setup() argument
68 writel(delay, timer_base + TIMER_INTVAL_REG(timer)); sun4i_clkevt_time_setup()
71 static void sun4i_clkevt_time_start(u8 timer, bool periodic) sun4i_clkevt_time_start() argument
73 u32 val = readl(timer_base + TIMER_CTL_REG(timer)); sun4i_clkevt_time_start()
81 timer_base + TIMER_CTL_REG(timer)); sun4i_clkevt_time_start()
163 panic("Can't get timer clock"); sun4i_timer_init()
190 /* Make sure timer is stopped before playing with interrupts */ sun4i_timer_init()
207 CLOCKSOURCE_OF_DECLARE(sun4i, "allwinner,sun4i-a10-timer",
H A Dcs5535-clockevt.c63 static void disable_timer(struct cs5535_mfgpt_timer *timer) disable_timer() argument
66 cs5535_mfgpt_write(timer, MFGPT_REG_SETUP, disable_timer()
71 static void start_timer(struct cs5535_mfgpt_timer *timer, uint16_t delta) start_timer() argument
73 cs5535_mfgpt_write(timer, MFGPT_REG_CMP2, delta); start_timer()
74 cs5535_mfgpt_write(timer, MFGPT_REG_COUNTER, 0); start_timer()
76 cs5535_mfgpt_write(timer, MFGPT_REG_SETUP, start_timer()
140 struct cs5535_mfgpt_timer *timer; cs5535_mfgpt_init() local
144 timer = cs5535_mfgpt_alloc_timer(MFGPT_TIMER_ANY, MFGPT_DOMAIN_WORKING); cs5535_mfgpt_init()
145 if (!timer) { cs5535_mfgpt_init()
146 printk(KERN_ERR DRV_NAME ": Could not allocate MFGPT timer\n"); cs5535_mfgpt_init()
149 cs5535_event_clock = timer; cs5535_mfgpt_init()
152 if (cs5535_mfgpt_setup_irq(timer, MFGPT_CMP2, &timer_irq)) { cs5535_mfgpt_init()
172 ": Registering MFGPT timer as a clock event, using IRQ %d\n", cs5535_mfgpt_init()
H A Dtime-orion.c2 * Marvell Orion SoC timer handling.
10 * Timer 0 is used as free-running clocksource, while timer 1 is
55 /* setup and enable one-shot timer */ orion_clkevt_next_event()
67 /* setup and enable periodic timer at 1/HZ intervals */ orion_clkevt_mode()
74 /* disable timer */ orion_clkevt_mode()
106 /* timer registers are shared with watchdog timer */ orion_timer_init()
132 /* setup timer1 as clockevent timer */ orion_timer_init()
142 CLOCKSOURCE_OF_DECLARE(orion_timer, "marvell,orion-timer", orion_timer_init);
H A Dclksrc-dbx500-prcmu.c8 * plat-nomadik/timer.c Linus Walleij <linus.walleij@stericsson.com>
42 /* Negate because the timer is a decrementing counter */ clksrc_dbx500_prcmu_read()
47 .name = "dbx500-prcmu-timer",
71 * The A9 sub system expects the timer to be configured as clksrc_dbx500_prcmu_init()
72 * a continous looping timer. clksrc_dbx500_prcmu_init()
H A Dmtk_timer.c68 static void mtk_clkevt_time_stop(struct mtk_clock_event_device *evt, u8 timer) mtk_clkevt_time_stop() argument
72 val = readl(evt->gpt_base + TIMER_CTRL_REG(timer)); mtk_clkevt_time_stop()
74 TIMER_CTRL_REG(timer)); mtk_clkevt_time_stop()
78 unsigned long delay, u8 timer) mtk_clkevt_time_setup()
80 writel(delay, evt->gpt_base + TIMER_CMP_REG(timer)); mtk_clkevt_time_setup()
84 bool periodic, u8 timer) mtk_clkevt_time_start()
89 writel(GPT_IRQ_ACK(timer), evt->gpt_base + GPT_IRQ_ACK_REG); mtk_clkevt_time_start()
91 val = readl(evt->gpt_base + TIMER_CTRL_REG(timer)); mtk_clkevt_time_start()
93 /* Clear 2 bit timer operation mode field */ mtk_clkevt_time_start()
102 evt->gpt_base + TIMER_CTRL_REG(timer)); mtk_clkevt_time_start()
160 mtk_timer_setup(struct mtk_clock_event_device *evt, u8 timer, u8 option) mtk_timer_setup() argument
163 evt->gpt_base + TIMER_CTRL_REG(timer)); mtk_timer_setup()
166 evt->gpt_base + TIMER_CLK_REG(timer)); mtk_timer_setup()
168 writel(0x0, evt->gpt_base + TIMER_CMP_REG(timer)); mtk_timer_setup()
171 evt->gpt_base + TIMER_CTRL_REG(timer)); mtk_timer_setup()
174 static void mtk_timer_enable_irq(struct mtk_clock_event_device *evt, u8 timer) mtk_timer_enable_irq() argument
179 writel(val | GPT_IRQ_ENABLE(timer), mtk_timer_enable_irq()
203 evt->gpt_base = of_io_request_and_map(node, 0, "mtk-timer"); mtk_timer_init()
217 pr_warn("Can't get timer clock"); mtk_timer_init()
262 CLOCKSOURCE_OF_DECLARE(mtk_mt6577, "mediatek,mt6577-timer", mtk_timer_init);
77 mtk_clkevt_time_setup(struct mtk_clock_event_device *evt, unsigned long delay, u8 timer) mtk_clkevt_time_setup() argument
83 mtk_clkevt_time_start(struct mtk_clock_event_device *evt, bool periodic, u8 timer) mtk_clkevt_time_start() argument
H A Dtimer-u300.c4 * Timer COH 901 328, runs the OS timer interrupt.
27 * APP side special timer registers
28 * This timer contains four timers which can fire an interrupt each.
29 * OS (operating system) timer @ 32768 Hz
30 * DD (device driver) timer @ 1 kHz
31 * GP1 (general purpose 1) timer @ 1MHz
32 * GP2 (general purpose 2) timer @ 1MHz
192 * have oneshot timer active, the oneshot scheduling function
216 * Set continuous mode, so the timer keeps triggering u300_set_mode()
221 /* Enable timer interrupts */ u300_set_mode()
224 /* Then enable the OS timer again */ u300_set_mode()
249 /* Enable interrupts for this timer */ u300_set_mode()
252 /* Enable timer */ u300_set_mode()
272 * The app timer in one shot mode obviously has to be reprogrammed
274 * the interrupt disable + timer disable commands with a reset command,
276 * the timer is very sensitive to the instruction order, though you don't
289 /* Reset the General Purpose timer 1. */ u300_set_next_event()
296 * the timer will tilt if you don't!) u300_set_next_event()
300 /* Enable timer interrupts */ u300_set_next_event()
303 /* Then enable the OS timer again */ u300_set_next_event()
310 /* Use general purpose timer 1 as clock event */
322 /* Clock event timer interrupt handler */ u300_timer_interrupt()
326 /* ACK/Clear timer IRQ for the APP GPT1 Timer */ u300_timer_interrupt()
371 panic("could not ioremap system timer\n"); u300_timer_init_of()
373 /* Get the IRQ for the GP1 timer */ u300_timer_init_of()
376 panic("no IRQ for system timer\n"); u300_timer_init_of()
378 pr_info("U300 GP1 timer @ base: %p, IRQ: %u\n", u300_timer_base, irq); u300_timer_init_of()
409 /* Reset the General Purpose timer 1. */ u300_timer_init_of()
416 /* Reset the General Purpose timer 2 */ u300_timer_init_of()
419 /* Set this timer to run around forever */ u300_timer_init_of()
424 /* Disable timer interrupts */ u300_timer_init_of()
427 /* Then enable the GP2 timer to use as a free running us counter */ u300_timer_init_of()
431 /* Use general purpose timer 2 as clock source */ u300_timer_init_of()
434 pr_err("timer: failed to initialize U300 clock source\n"); u300_timer_init_of()
H A Dtimer-integrator-ap.c2 * Integrator/AP timer driver
63 * IRQ handler for the timer
81 /* Disable timer */ clkevt_set_mode()
86 /* Enable the timer and start the periodic tick */ clkevt_set_mode()
92 /* Leave the timer disabled, .set_next_event will enable it */ clkevt_set_mode()
126 .name = "timer",
168 base = of_io_request_and_map(node, 0, "integrator-timer"); integrator_ap_timer_init_of()
182 "arm,timer-primary", &path); integrator_ap_timer_init_of()
187 "arm,timer-secondary", &path); integrator_ap_timer_init_of()
193 /* The primary timer lacks IRQ, use as clocksource */ integrator_ap_timer_init_of()
199 /* The secondary timer will drive the clock event */ integrator_ap_timer_init_of()
209 CLOCKSOURCE_OF_DECLARE(integrator_ap_timer, "arm,integrator-timer",
H A Darm_global_timer.c57 * 1. Read the upper 32-bit timer counter register
58 * 2. Read the lower 32-bit timer counter register
59 * 3. Read the upper 32-bit timer counter register again. If the value is
61 * Otherwise the 64-bit timer counter value is correct.
216 /* enables timer on all the cores */ gt_clocksource_init()
249 * In A9 r2p0 the comparators for each processor with the global timer global_timer_of_register()
250 * fire when the timer value is greater than or equal to. In previous global_timer_of_register()
251 * revisions the comparators fired when the timer value was equal to. global_timer_of_register()
255 pr_warn("global-timer: non support for this cpu version.\n"); global_timer_of_register()
261 pr_warn("global-timer: unable to parse irq\n"); global_timer_of_register()
267 pr_warn("global-timer: invalid base address\n"); global_timer_of_register()
277 pr_warn("global-timer: clk not found\n"); global_timer_of_register()
285 pr_warn("global-timer: can't allocate memory\n"); global_timer_of_register()
293 pr_warn("global-timer: can't register interrupt %d (%d)\n", global_timer_of_register()
300 pr_warn("global-timer: unable to register cpu notifier.\n"); global_timer_of_register()
304 /* Immediately configure the timer on the boot CPU */ global_timer_of_register()
318 WARN(err, "ARM Global timer register failed (%d)\n", err); global_timer_of_register()
322 CLOCKSOURCE_OF_DECLARE(arm_gt, "arm,cortex-a9-global-timer",
H A Dbcm_kona_timer.c48 * We use the peripheral timers for system tick, the cpu global timer for
105 * timer (0) is disabled by the timer interrupt already kona_timer_set_next_event()
107 * the timer. kona_timer_set_next_event()
110 * timer-interrupt->set_next_event. CPU local timers, when kona_timer_set_next_event()
145 .name = "timer 1",
208 CLOCKSOURCE_OF_DECLARE(brcm_kona, "brcm,kona-timer", kona_timer_init);
210 * bcm,kona-timer is deprecated by brcm,kona-timer
213 CLOCKSOURCE_OF_DECLARE(bcm_kona, "bcm,kona-timer", kona_timer_init);
H A Dclps711x-timer.c99 "clps711x-timer", clkevt); _clps711x_clkevt_init()
105 struct clk *tc1 = clk_get_sys("clps711x-timer.0", NULL); clps711x_clksrc_init()
106 struct clk *tc2 = clk_get_sys("clps711x-timer.1", NULL); clps711x_clksrc_init()
119 switch (of_alias_get_id(np, "timer")) { clps711x_timer_init()
130 CLOCKSOURCE_OF_DECLARE(clps711x, "cirrus,clps711x-timer", clps711x_timer_init);
H A Dvf_pit_timer.c76 * set a new value to PITLDVAL register will not restart the timer, pit_set_next_event()
77 * to abort the current cycle and start a timer period with the new pit_set_next_event()
78 * value, the timer must be disabled and enabled again. pit_set_next_event()
114 * and start the counter again. So software need to disable the timer pit_timer_interrupt()
126 .name = "VF pit timer",
134 .name = "VF pit timer",
152 * The pit is a 32-bit down count timer, when the conter value pit_clockevent_init()
173 * PIT0 and PIT1 can be chained to build a 64-bit timer, pit_timer_init()
/linux-4.1.27/arch/arm/plat-omap/
H A Ddmtimer.c63 * omap_dm_timer_read_reg - read timer registers in posted and non-posted mode
64 * @timer: timer pointer over which read operation to perform
71 static inline u32 omap_dm_timer_read_reg(struct omap_dm_timer *timer, u32 reg) omap_dm_timer_read_reg() argument
74 return __omap_dm_timer_read(timer, reg, timer->posted); omap_dm_timer_read_reg()
78 * omap_dm_timer_write_reg - write timer registers in posted and non-posted mode
79 * @timer: timer pointer over which write operation is to perform
87 static void omap_dm_timer_write_reg(struct omap_dm_timer *timer, u32 reg, omap_dm_timer_write_reg() argument
91 __omap_dm_timer_write(timer, reg, value, timer->posted); omap_dm_timer_write_reg()
94 static void omap_timer_restore_context(struct omap_dm_timer *timer) omap_timer_restore_context() argument
96 omap_dm_timer_write_reg(timer, OMAP_TIMER_WAKEUP_EN_REG, omap_timer_restore_context()
97 timer->context.twer); omap_timer_restore_context()
98 omap_dm_timer_write_reg(timer, OMAP_TIMER_COUNTER_REG, omap_timer_restore_context()
99 timer->context.tcrr); omap_timer_restore_context()
100 omap_dm_timer_write_reg(timer, OMAP_TIMER_LOAD_REG, omap_timer_restore_context()
101 timer->context.tldr); omap_timer_restore_context()
102 omap_dm_timer_write_reg(timer, OMAP_TIMER_MATCH_REG, omap_timer_restore_context()
103 timer->context.tmar); omap_timer_restore_context()
104 omap_dm_timer_write_reg(timer, OMAP_TIMER_IF_CTRL_REG, omap_timer_restore_context()
105 timer->context.tsicr); omap_timer_restore_context()
106 writel_relaxed(timer->context.tier, timer->irq_ena); omap_timer_restore_context()
107 omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, omap_timer_restore_context()
108 timer->context.tclr); omap_timer_restore_context()
111 static int omap_dm_timer_reset(struct omap_dm_timer *timer) omap_dm_timer_reset() argument
115 if (timer->revision != 1) omap_dm_timer_reset()
118 omap_dm_timer_write_reg(timer, OMAP_TIMER_IF_CTRL_REG, 0x06); omap_dm_timer_reset()
121 l = __omap_dm_timer_read(timer, omap_dm_timer_reset()
126 dev_err(&timer->pdev->dev, "Timer failed to reset\n"); omap_dm_timer_reset()
130 /* Configure timer for smart-idle mode */ omap_dm_timer_reset()
131 l = __omap_dm_timer_read(timer, OMAP_TIMER_OCP_CFG_OFFSET, 0); omap_dm_timer_reset()
133 __omap_dm_timer_write(timer, OMAP_TIMER_OCP_CFG_OFFSET, l, 0); omap_dm_timer_reset()
135 timer->posted = 0; omap_dm_timer_reset()
140 static int omap_dm_timer_prepare(struct omap_dm_timer *timer) omap_dm_timer_prepare() argument
148 if (!(timer->capability & OMAP_TIMER_NEEDS_RESET)) { omap_dm_timer_prepare()
149 timer->fclk = clk_get(&timer->pdev->dev, "fck"); omap_dm_timer_prepare()
150 if (WARN_ON_ONCE(IS_ERR(timer->fclk))) { omap_dm_timer_prepare()
151 dev_err(&timer->pdev->dev, ": No fclk handle.\n"); omap_dm_timer_prepare()
156 omap_dm_timer_enable(timer); omap_dm_timer_prepare()
158 if (timer->capability & OMAP_TIMER_NEEDS_RESET) { omap_dm_timer_prepare()
159 rc = omap_dm_timer_reset(timer); omap_dm_timer_prepare()
161 omap_dm_timer_disable(timer); omap_dm_timer_prepare()
166 __omap_dm_timer_enable_posted(timer); omap_dm_timer_prepare()
167 omap_dm_timer_disable(timer); omap_dm_timer_prepare()
169 return omap_dm_timer_set_source(timer, OMAP_TIMER_SRC_32_KHZ); omap_dm_timer_prepare()
189 struct omap_dm_timer *timer = NULL, *t; _omap_dm_timer_request() local
218 timer = t; _omap_dm_timer_request()
219 timer->reserved = 1; _omap_dm_timer_request()
226 * If timer is not NULL, we have already found _omap_dm_timer_request()
227 * one timer but it was not an exact match _omap_dm_timer_request()
230 * timer found and see if this one is a better _omap_dm_timer_request()
233 if (timer) _omap_dm_timer_request()
234 timer->reserved = 0; _omap_dm_timer_request()
235 timer = t; _omap_dm_timer_request()
236 timer->reserved = 1; _omap_dm_timer_request()
245 timer = t; _omap_dm_timer_request()
246 timer->reserved = 1; _omap_dm_timer_request()
252 timer = t; _omap_dm_timer_request()
253 timer->reserved = 1; _omap_dm_timer_request()
260 if (timer && omap_dm_timer_prepare(timer)) { _omap_dm_timer_request()
261 timer->reserved = 0; _omap_dm_timer_request()
262 timer = NULL; _omap_dm_timer_request()
265 if (!timer) _omap_dm_timer_request()
266 pr_debug("%s: timer request failed!\n", __func__); _omap_dm_timer_request()
268 return timer; _omap_dm_timer_request()
279 /* Requesting timer by ID is not supported when device tree is used */ omap_dm_timer_request_specific()
291 * omap_dm_timer_request_by_cap - Request a timer by capability
294 * Find a timer based upon capabilities bit mask. Callers of this function
296 * comment "timer capabilities used in hwmod database". Returns pointer to
297 * timer handle on success and a NULL pointer on failure.
306 * omap_dm_timer_request_by_node - Request a timer by device-tree node
307 * @np: Pointer to device-tree timer node
309 * Request a timer based upon a device node pointer. Returns pointer to
310 * timer handle on success and a NULL pointer on failure.
321 int omap_dm_timer_free(struct omap_dm_timer *timer) omap_dm_timer_free() argument
323 if (unlikely(!timer)) omap_dm_timer_free()
326 clk_put(timer->fclk); omap_dm_timer_free()
328 WARN_ON(!timer->reserved); omap_dm_timer_free()
329 timer->reserved = 0; omap_dm_timer_free()
334 void omap_dm_timer_enable(struct omap_dm_timer *timer) omap_dm_timer_enable() argument
338 pm_runtime_get_sync(&timer->pdev->dev); omap_dm_timer_enable()
340 if (!(timer->capability & OMAP_TIMER_ALWON)) { omap_dm_timer_enable()
341 if (timer->get_context_loss_count) { omap_dm_timer_enable()
342 c = timer->get_context_loss_count(&timer->pdev->dev); omap_dm_timer_enable()
343 if (c != timer->ctx_loss_count) { omap_dm_timer_enable()
344 omap_timer_restore_context(timer); omap_dm_timer_enable()
345 timer->ctx_loss_count = c; omap_dm_timer_enable()
348 omap_timer_restore_context(timer); omap_dm_timer_enable()
354 void omap_dm_timer_disable(struct omap_dm_timer *timer) omap_dm_timer_disable() argument
356 pm_runtime_put_sync(&timer->pdev->dev); omap_dm_timer_disable()
360 int omap_dm_timer_get_irq(struct omap_dm_timer *timer) omap_dm_timer_get_irq() argument
362 if (timer) omap_dm_timer_get_irq()
363 return timer->irq; omap_dm_timer_get_irq()
377 struct omap_dm_timer *timer = NULL; omap_dm_timer_modify_idlect_mask() local
384 /* If any active timer is using ARMXOR return modified mask */ omap_dm_timer_modify_idlect_mask()
386 list_for_each_entry(timer, &omap_timer_list, node) { omap_dm_timer_modify_idlect_mask()
389 l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG); omap_dm_timer_modify_idlect_mask()
406 struct clk *omap_dm_timer_get_fclk(struct omap_dm_timer *timer) omap_dm_timer_get_fclk() argument
408 if (timer && !IS_ERR(timer->fclk)) omap_dm_timer_get_fclk()
409 return timer->fclk; omap_dm_timer_get_fclk()
424 int omap_dm_timer_trigger(struct omap_dm_timer *timer) omap_dm_timer_trigger() argument
426 if (unlikely(!timer || pm_runtime_suspended(&timer->pdev->dev))) { omap_dm_timer_trigger()
427 pr_err("%s: timer not available or enabled.\n", __func__); omap_dm_timer_trigger()
431 omap_dm_timer_write_reg(timer, OMAP_TIMER_TRIGGER_REG, 0); omap_dm_timer_trigger()
436 int omap_dm_timer_start(struct omap_dm_timer *timer) omap_dm_timer_start() argument
440 if (unlikely(!timer)) omap_dm_timer_start()
443 omap_dm_timer_enable(timer); omap_dm_timer_start()
445 l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG); omap_dm_timer_start()
448 omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l); omap_dm_timer_start()
452 timer->context.tclr = l; omap_dm_timer_start()
457 int omap_dm_timer_stop(struct omap_dm_timer *timer) omap_dm_timer_stop() argument
461 if (unlikely(!timer)) omap_dm_timer_stop()
464 if (!(timer->capability & OMAP_TIMER_NEEDS_RESET)) omap_dm_timer_stop()
465 rate = clk_get_rate(timer->fclk); omap_dm_timer_stop()
467 __omap_dm_timer_stop(timer, timer->posted, rate); omap_dm_timer_stop()
474 timer->context.tclr = omap_dm_timer_stop()
475 omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG); omap_dm_timer_stop()
476 omap_dm_timer_disable(timer); omap_dm_timer_stop()
481 int omap_dm_timer_set_source(struct omap_dm_timer *timer, int source) omap_dm_timer_set_source() argument
488 if (unlikely(!timer)) omap_dm_timer_set_source()
491 pdata = timer->pdev->dev.platform_data; omap_dm_timer_set_source()
502 return pdata->set_timer_src(timer->pdev, source); omap_dm_timer_set_source()
504 if (IS_ERR(timer->fclk)) omap_dm_timer_set_source()
521 parent = clk_get(&timer->pdev->dev, parent_name); omap_dm_timer_set_source()
527 ret = clk_set_parent(timer->fclk, parent); omap_dm_timer_set_source()
538 int omap_dm_timer_set_load(struct omap_dm_timer *timer, int autoreload, omap_dm_timer_set_load() argument
543 if (unlikely(!timer)) omap_dm_timer_set_load()
546 omap_dm_timer_enable(timer); omap_dm_timer_set_load()
547 l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG); omap_dm_timer_set_load()
552 omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l); omap_dm_timer_set_load()
553 omap_dm_timer_write_reg(timer, OMAP_TIMER_LOAD_REG, load); omap_dm_timer_set_load()
555 omap_dm_timer_write_reg(timer, OMAP_TIMER_TRIGGER_REG, 0); omap_dm_timer_set_load()
557 timer->context.tclr = l; omap_dm_timer_set_load()
558 timer->context.tldr = load; omap_dm_timer_set_load()
559 omap_dm_timer_disable(timer); omap_dm_timer_set_load()
565 int omap_dm_timer_set_load_start(struct omap_dm_timer *timer, int autoreload, omap_dm_timer_set_load_start() argument
570 if (unlikely(!timer)) omap_dm_timer_set_load_start()
573 omap_dm_timer_enable(timer); omap_dm_timer_set_load_start()
575 l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG); omap_dm_timer_set_load_start()
578 omap_dm_timer_write_reg(timer, OMAP_TIMER_LOAD_REG, load); omap_dm_timer_set_load_start()
584 __omap_dm_timer_load_start(timer, l, load, timer->posted); omap_dm_timer_set_load_start()
587 timer->context.tclr = l; omap_dm_timer_set_load_start()
588 timer->context.tldr = load; omap_dm_timer_set_load_start()
589 timer->context.tcrr = load; omap_dm_timer_set_load_start()
594 int omap_dm_timer_set_match(struct omap_dm_timer *timer, int enable, omap_dm_timer_set_match() argument
599 if (unlikely(!timer)) omap_dm_timer_set_match()
602 omap_dm_timer_enable(timer); omap_dm_timer_set_match()
603 l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG); omap_dm_timer_set_match()
608 omap_dm_timer_write_reg(timer, OMAP_TIMER_MATCH_REG, match); omap_dm_timer_set_match()
609 omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l); omap_dm_timer_set_match()
612 timer->context.tclr = l; omap_dm_timer_set_match()
613 timer->context.tmar = match; omap_dm_timer_set_match()
614 omap_dm_timer_disable(timer); omap_dm_timer_set_match()
619 int omap_dm_timer_set_pwm(struct omap_dm_timer *timer, int def_on, omap_dm_timer_set_pwm() argument
624 if (unlikely(!timer)) omap_dm_timer_set_pwm()
627 omap_dm_timer_enable(timer); omap_dm_timer_set_pwm()
628 l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG); omap_dm_timer_set_pwm()
636 omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l); omap_dm_timer_set_pwm()
639 timer->context.tclr = l; omap_dm_timer_set_pwm()
640 omap_dm_timer_disable(timer); omap_dm_timer_set_pwm()
645 int omap_dm_timer_set_prescaler(struct omap_dm_timer *timer, int prescaler) omap_dm_timer_set_prescaler() argument
649 if (unlikely(!timer)) omap_dm_timer_set_prescaler()
652 omap_dm_timer_enable(timer); omap_dm_timer_set_prescaler()
653 l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG); omap_dm_timer_set_prescaler()
659 omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l); omap_dm_timer_set_prescaler()
662 timer->context.tclr = l; omap_dm_timer_set_prescaler()
663 omap_dm_timer_disable(timer); omap_dm_timer_set_prescaler()
668 int omap_dm_timer_set_int_enable(struct omap_dm_timer *timer, omap_dm_timer_set_int_enable() argument
671 if (unlikely(!timer)) omap_dm_timer_set_int_enable()
674 omap_dm_timer_enable(timer); omap_dm_timer_set_int_enable()
675 __omap_dm_timer_int_enable(timer, value); omap_dm_timer_set_int_enable()
678 timer->context.tier = value; omap_dm_timer_set_int_enable()
679 timer->context.twer = value; omap_dm_timer_set_int_enable()
680 omap_dm_timer_disable(timer); omap_dm_timer_set_int_enable()
686 * omap_dm_timer_set_int_disable - disable timer interrupts
687 * @timer: pointer to timer handle
690 * Disables the specified timer interrupts for a timer.
692 int omap_dm_timer_set_int_disable(struct omap_dm_timer *timer, u32 mask) omap_dm_timer_set_int_disable() argument
696 if (unlikely(!timer)) omap_dm_timer_set_int_disable()
699 omap_dm_timer_enable(timer); omap_dm_timer_set_int_disable()
701 if (timer->revision == 1) omap_dm_timer_set_int_disable()
702 l = readl_relaxed(timer->irq_ena) & ~mask; omap_dm_timer_set_int_disable()
704 writel_relaxed(l, timer->irq_dis); omap_dm_timer_set_int_disable()
705 l = omap_dm_timer_read_reg(timer, OMAP_TIMER_WAKEUP_EN_REG) & ~mask; omap_dm_timer_set_int_disable()
706 omap_dm_timer_write_reg(timer, OMAP_TIMER_WAKEUP_EN_REG, l); omap_dm_timer_set_int_disable()
709 timer->context.tier &= ~mask; omap_dm_timer_set_int_disable()
710 timer->context.twer &= ~mask; omap_dm_timer_set_int_disable()
711 omap_dm_timer_disable(timer); omap_dm_timer_set_int_disable()
716 unsigned int omap_dm_timer_read_status(struct omap_dm_timer *timer) omap_dm_timer_read_status() argument
720 if (unlikely(!timer || pm_runtime_suspended(&timer->pdev->dev))) { omap_dm_timer_read_status()
721 pr_err("%s: timer not available or enabled.\n", __func__); omap_dm_timer_read_status()
725 l = readl_relaxed(timer->irq_stat); omap_dm_timer_read_status()
731 int omap_dm_timer_write_status(struct omap_dm_timer *timer, unsigned int value) omap_dm_timer_write_status() argument
733 if (unlikely(!timer || pm_runtime_suspended(&timer->pdev->dev))) omap_dm_timer_write_status()
736 __omap_dm_timer_write_status(timer, value); omap_dm_timer_write_status()
742 unsigned int omap_dm_timer_read_counter(struct omap_dm_timer *timer) omap_dm_timer_read_counter() argument
744 if (unlikely(!timer || pm_runtime_suspended(&timer->pdev->dev))) { omap_dm_timer_read_counter()
745 pr_err("%s: timer not iavailable or enabled.\n", __func__); omap_dm_timer_read_counter()
749 return __omap_dm_timer_read_counter(timer, timer->posted); omap_dm_timer_read_counter()
753 int omap_dm_timer_write_counter(struct omap_dm_timer *timer, unsigned int value) omap_dm_timer_write_counter() argument
755 if (unlikely(!timer || pm_runtime_suspended(&timer->pdev->dev))) { omap_dm_timer_write_counter()
756 pr_err("%s: timer not available or enabled.\n", __func__); omap_dm_timer_write_counter()
760 omap_dm_timer_write_reg(timer, OMAP_TIMER_COUNTER_REG, value); omap_dm_timer_write_counter()
763 timer->context.tcrr = value; omap_dm_timer_write_counter()
770 struct omap_dm_timer *timer; omap_dm_timers_active() local
772 list_for_each_entry(timer, &omap_timer_list, node) { omap_dm_timers_active()
773 if (!timer->reserved) omap_dm_timers_active()
776 if (omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG) & omap_dm_timers_active()
789 * @pdev: pointer to current timer platform device
792 * timer devices.
797 struct omap_dm_timer *timer; omap_dm_timer_probe() local
824 timer = devm_kzalloc(dev, sizeof(struct omap_dm_timer), GFP_KERNEL); omap_dm_timer_probe()
825 if (!timer) { omap_dm_timer_probe()
830 timer->fclk = ERR_PTR(-ENODEV); omap_dm_timer_probe()
831 timer->io_base = devm_ioremap_resource(dev, mem); omap_dm_timer_probe()
832 if (IS_ERR(timer->io_base)) omap_dm_timer_probe()
833 return PTR_ERR(timer->io_base); omap_dm_timer_probe()
836 if (of_find_property(dev->of_node, "ti,timer-alwon", NULL)) omap_dm_timer_probe()
837 timer->capability |= OMAP_TIMER_ALWON; omap_dm_timer_probe()
838 if (of_find_property(dev->of_node, "ti,timer-dsp", NULL)) omap_dm_timer_probe()
839 timer->capability |= OMAP_TIMER_HAS_DSP_IRQ; omap_dm_timer_probe()
840 if (of_find_property(dev->of_node, "ti,timer-pwm", NULL)) omap_dm_timer_probe()
841 timer->capability |= OMAP_TIMER_HAS_PWM; omap_dm_timer_probe()
842 if (of_find_property(dev->of_node, "ti,timer-secure", NULL)) omap_dm_timer_probe()
843 timer->capability |= OMAP_TIMER_SECURE; omap_dm_timer_probe()
845 timer->id = pdev->id; omap_dm_timer_probe()
846 timer->capability = pdata->timer_capability; omap_dm_timer_probe()
847 timer->reserved = omap_dm_timer_reserved_systimer(timer->id); omap_dm_timer_probe()
848 timer->get_context_loss_count = pdata->get_context_loss_count; omap_dm_timer_probe()
852 timer->errata = pdata->timer_errata; omap_dm_timer_probe()
854 timer->irq = irq->start; omap_dm_timer_probe()
855 timer->pdev = pdev; omap_dm_timer_probe()
858 if (!(timer->capability & OMAP_TIMER_NEEDS_RESET)) { omap_dm_timer_probe()
863 if (!timer->reserved) { omap_dm_timer_probe()
870 __omap_dm_timer_init_regs(timer); omap_dm_timer_probe()
874 /* add the timer element to the list */ omap_dm_timer_probe()
876 list_add_tail(&timer->node, &omap_timer_list); omap_dm_timer_probe()
890 * omap_dm_timer_remove - cleanup a registered timer device
891 * @pdev: pointer to current timer platform device
893 * Called by driver framework whenever a timer device is unregistered.
894 * In addition to freeing platform resources it also deletes the timer
899 struct omap_dm_timer *timer; omap_dm_timer_remove() local
904 list_for_each_entry(timer, &omap_timer_list, node) omap_dm_timer_remove()
905 if (!strcmp(dev_name(&timer->pdev->dev), omap_dm_timer_remove()
907 list_del(&timer->node); omap_dm_timer_remove()
924 .compatible = "ti,omap2420-timer",
927 .compatible = "ti,omap3430-timer",
931 .compatible = "ti,omap4430-timer",
935 .compatible = "ti,omap5430-timer",
939 .compatible = "ti,am335x-timer",
943 .compatible = "ti,am335x-timer-1ms",
/linux-4.1.27/drivers/gpu/drm/nouveau/nvkm/subdev/timer/
H A Dpriv.h3 #include <subdev/timer.h>
/linux-4.1.27/arch/s390/kernel/
H A Dvtime.c2 * Virtual cpu timer based timer functions.
34 u64 timer; get_vtimer() local
36 asm volatile("stpt %0" : "=m" (timer)); get_vtimer()
37 return timer; get_vtimer()
42 u64 timer; set_vtimer() local
45 " stpt %0\n" /* Store current cpu timer value */ set_vtimer()
47 : "=m" (timer) : "m" (expires)); set_vtimer()
48 S390_lowcore.system_timer += S390_lowcore.last_update_timer - timer; set_vtimer()
69 u64 timer, clock, user, system, steal; do_account_vtime() local
73 timer = S390_lowcore.last_update_timer; do_account_vtime()
76 " stpt %0\n" /* Store current cpu timer value */ do_account_vtime()
84 S390_lowcore.system_timer += timer - S390_lowcore.last_update_timer; do_account_vtime()
171 u64 timer, system, system_scaled; vtime_account_irq_enter() local
173 timer = S390_lowcore.last_update_timer; vtime_account_irq_enter()
175 S390_lowcore.system_timer += timer - S390_lowcore.last_update_timer; vtime_account_irq_enter()
202 static void list_add_sorted(struct vtimer_list *timer, struct list_head *head) list_add_sorted() argument
207 if (tmp->expires > timer->expires) { list_for_each_entry()
208 list_add_tail(&timer->entry, &tmp->entry); list_for_each_entry()
212 list_add_tail(&timer->entry, head);
216 * Handler for expired virtual CPU timer.
220 struct vtimer_list *timer, *tmp; virt_timer_expire() local
224 /* walk timer list, fire all expired timers */ virt_timer_expire()
227 list_for_each_entry_safe(timer, tmp, &virt_timer_list, entry) { virt_timer_expire()
228 if (timer->expires < elapsed) virt_timer_expire()
229 /* move expired timer to the callback queue */ virt_timer_expire()
230 list_move_tail(&timer->entry, &cb_list); virt_timer_expire()
232 timer->expires -= elapsed; virt_timer_expire()
235 timer = list_first_entry(&virt_timer_list, virt_timer_expire()
237 atomic64_set(&virt_timer_current, timer->expires); virt_timer_expire()
243 list_for_each_entry_safe(timer, tmp, &cb_list, entry) { virt_timer_expire()
244 list_del_init(&timer->entry); virt_timer_expire()
245 timer->function(timer->data); virt_timer_expire()
246 if (timer->interval) { virt_timer_expire()
247 /* Recharge interval timer */ virt_timer_expire()
248 timer->expires = timer->interval + virt_timer_expire()
251 list_add_sorted(timer, &virt_timer_list); virt_timer_expire()
257 void init_virt_timer(struct vtimer_list *timer) init_virt_timer() argument
259 timer->function = NULL; init_virt_timer()
260 INIT_LIST_HEAD(&timer->entry); init_virt_timer()
264 static inline int vtimer_pending(struct vtimer_list *timer) vtimer_pending() argument
266 return !list_empty(&timer->entry); vtimer_pending()
269 static void internal_add_vtimer(struct vtimer_list *timer) internal_add_vtimer() argument
272 /* First timer, just program it. */ internal_add_vtimer()
273 atomic64_set(&virt_timer_current, timer->expires); internal_add_vtimer()
275 list_add(&timer->entry, &virt_timer_list); internal_add_vtimer()
277 /* Update timer against current base. */ internal_add_vtimer()
278 timer->expires += atomic64_read(&virt_timer_elapsed); internal_add_vtimer()
279 if (likely((s64) timer->expires < internal_add_vtimer()
281 /* The new timer expires before the current timer. */ internal_add_vtimer()
282 atomic64_set(&virt_timer_current, timer->expires); internal_add_vtimer()
283 /* Insert new timer into the list. */ internal_add_vtimer()
284 list_add_sorted(timer, &virt_timer_list); internal_add_vtimer()
288 static void __add_vtimer(struct vtimer_list *timer, int periodic) __add_vtimer() argument
292 timer->interval = periodic ? timer->expires : 0; __add_vtimer()
294 internal_add_vtimer(timer); __add_vtimer()
299 * add_virt_timer - add an oneshot virtual CPU timer
301 void add_virt_timer(struct vtimer_list *timer) add_virt_timer() argument
303 __add_vtimer(timer, 0); add_virt_timer()
308 * add_virt_timer_int - add an interval virtual CPU timer
310 void add_virt_timer_periodic(struct vtimer_list *timer) add_virt_timer_periodic() argument
312 __add_vtimer(timer, 1); add_virt_timer_periodic()
316 static int __mod_vtimer(struct vtimer_list *timer, u64 expires, int periodic) __mod_vtimer() argument
321 BUG_ON(!timer->function); __mod_vtimer()
323 if (timer->expires == expires && vtimer_pending(timer)) __mod_vtimer()
326 rc = vtimer_pending(timer); __mod_vtimer()
328 list_del_init(&timer->entry); __mod_vtimer()
329 timer->interval = periodic ? expires : 0; __mod_vtimer()
330 timer->expires = expires; __mod_vtimer()
331 internal_add_vtimer(timer); __mod_vtimer()
337 * returns whether it has modified a pending timer (1) or not (0)
339 int mod_virt_timer(struct vtimer_list *timer, u64 expires) mod_virt_timer() argument
341 return __mod_vtimer(timer, expires, 0); mod_virt_timer()
346 * returns whether it has modified a pending timer (1) or not (0)
348 int mod_virt_timer_periodic(struct vtimer_list *timer, u64 expires) mod_virt_timer_periodic() argument
350 return __mod_vtimer(timer, expires, 1); mod_virt_timer_periodic()
355 * Delete a virtual timer.
357 * returns whether the deleted timer was pending (1) or not (0)
359 int del_virt_timer(struct vtimer_list *timer) del_virt_timer() argument
363 if (!vtimer_pending(timer)) del_virt_timer()
366 list_del_init(&timer->entry); del_virt_timer()
373 * Start the virtual CPU timer on the current CPU.
377 /* set initial cpu timer */ vtime_init()
/linux-4.1.27/arch/mn10300/include/asm/
H A Dtimer-regs.h1 /* AM33v2 on-board timer module registers
23 #define TMPSCNT __SYSREG(0xd4003071, u8) /* timer prescaler control */
24 #define TMPSCNT_ENABLE 0x80 /* timer prescaler enable */
25 #define TMPSCNT_DISABLE 0x00 /* timer prescaler disable */
30 #define TM0MD __SYSREG(0xd4003000, u8) /* timer 0 mode register */
31 #define TM0MD_SRC 0x07 /* timer source */
35 #define TM0MD_SRC_TM1UFLOW 0x05 /* - timer 1 underflow */
36 #define TM0MD_SRC_TM2UFLOW 0x06 /* - timer 2 underflow */
42 #define TM0MD_COUNT_ENABLE 0x80 /* timer count enable */
44 #define TM1MD __SYSREG(0xd4003001, u8) /* timer 1 mode register */
45 #define TM1MD_SRC 0x07 /* timer source */
49 #define TM1MD_SRC_TM0CASCADE 0x03 /* - cascade with timer 0 */
50 #define TM1MD_SRC_TM0UFLOW 0x04 /* - timer 0 underflow */
51 #define TM1MD_SRC_TM2UFLOW 0x06 /* - timer 2 underflow */
56 #define TM1MD_COUNT_ENABLE 0x80 /* timer count enable */
58 #define TM2MD __SYSREG(0xd4003002, u8) /* timer 2 mode register */
59 #define TM2MD_SRC 0x07 /* timer source */
63 #define TM2MD_SRC_TM1CASCADE 0x03 /* - cascade with timer 1 */
64 #define TM2MD_SRC_TM0UFLOW 0x04 /* - timer 0 underflow */
65 #define TM2MD_SRC_TM1UFLOW 0x05 /* - timer 1 underflow */
70 #define TM2MD_COUNT_ENABLE 0x80 /* timer count enable */
72 #define TM3MD __SYSREG(0xd4003003, u8) /* timer 3 mode register */
73 #define TM3MD_SRC 0x07 /* timer source */
77 #define TM3MD_SRC_TM2CASCADE 0x03 /* - cascade with timer 2 */
78 #define TM3MD_SRC_TM0UFLOW 0x04 /* - timer 0 underflow */
79 #define TM3MD_SRC_TM1UFLOW 0x05 /* - timer 1 underflow */
80 #define TM3MD_SRC_TM2UFLOW 0x06 /* - timer 2 underflow */
85 #define TM3MD_COUNT_ENABLE 0x80 /* timer count enable */
87 #define TM01MD __SYSREG(0xd4003000, u16) /* timer 0:1 mode register */
89 #define TM0BR __SYSREG(0xd4003010, u8) /* timer 0 base register */
90 #define TM1BR __SYSREG(0xd4003011, u8) /* timer 1 base register */
91 #define TM2BR __SYSREG(0xd4003012, u8) /* timer 2 base register */
92 #define TM3BR __SYSREG(0xd4003013, u8) /* timer 3 base register */
93 #define TM01BR __SYSREG(0xd4003010, u16) /* timer 0:1 base register */
95 #define TM0BC __SYSREGC(0xd4003020, u8) /* timer 0 binary counter */
96 #define TM1BC __SYSREGC(0xd4003021, u8) /* timer 1 binary counter */
97 #define TM2BC __SYSREGC(0xd4003022, u8) /* timer 2 binary counter */
98 #define TM3BC __SYSREGC(0xd4003023, u8) /* timer 3 binary counter */
99 #define TM01BC __SYSREGC(0xd4003020, u16) /* timer 0:1 binary counter */
101 #define TM0IRQ 2 /* timer 0 IRQ */
102 #define TM1IRQ 3 /* timer 1 IRQ */
103 #define TM2IRQ 4 /* timer 2 IRQ */
104 #define TM3IRQ 5 /* timer 3 IRQ */
106 #define TM0ICR GxICR(TM0IRQ) /* timer 0 uflow intr ctrl reg */
107 #define TM1ICR GxICR(TM1IRQ) /* timer 1 uflow intr ctrl reg */
108 #define TM2ICR GxICR(TM2IRQ) /* timer 2 uflow intr ctrl reg */
109 #define TM3ICR GxICR(TM3IRQ) /* timer 3 uflow intr ctrl reg */
114 #define TM4MD __SYSREG(0xd4003080, u8) /* timer 4 mode register */
115 #define TM4MD_SRC 0x07 /* timer source */
119 #define TM4MD_SRC_TM0UFLOW 0x04 /* - timer 0 underflow */
120 #define TM4MD_SRC_TM1UFLOW 0x05 /* - timer 1 underflow */
121 #define TM4MD_SRC_TM2UFLOW 0x06 /* - timer 2 underflow */
126 #define TM4MD_COUNT_ENABLE 0x80 /* timer count enable */
128 #define TM5MD __SYSREG(0xd4003082, u8) /* timer 5 mode register */
129 #define TM5MD_SRC 0x07 /* timer source */
133 #define TM5MD_SRC_TM4CASCADE 0x03 /* - cascade with timer 4 */
134 #define TM5MD_SRC_TM0UFLOW 0x04 /* - timer 0 underflow */
135 #define TM5MD_SRC_TM1UFLOW 0x05 /* - timer 1 underflow */
136 #define TM5MD_SRC_TM2UFLOW 0x06 /* - timer 2 underflow */
140 #define TM5MD_SRC_TM7UFLOW 0x07 /* - timer 7 underflow */
143 #define TM5MD_COUNT_ENABLE 0x80 /* timer count enable */
145 #define TM7MD __SYSREG(0xd4003086, u8) /* timer 7 mode register */
146 #define TM7MD_SRC 0x07 /* timer source */
150 #define TM7MD_SRC_TM0UFLOW 0x04 /* - timer 0 underflow */
151 #define TM7MD_SRC_TM1UFLOW 0x05 /* - timer 1 underflow */
152 #define TM7MD_SRC_TM2UFLOW 0x06 /* - timer 2 underflow */
157 #define TM7MD_COUNT_ENABLE 0x80 /* timer count enable */
159 #define TM8MD __SYSREG(0xd4003088, u8) /* timer 8 mode register */
160 #define TM8MD_SRC 0x07 /* timer source */
164 #define TM8MD_SRC_TM7CASCADE 0x03 /* - cascade with timer 7 */
165 #define TM8MD_SRC_TM0UFLOW 0x04 /* - timer 0 underflow */
166 #define TM8MD_SRC_TM1UFLOW 0x05 /* - timer 1 underflow */
167 #define TM8MD_SRC_TM2UFLOW 0x06 /* - timer 2 underflow */
171 #define TM8MD_SRC_TM7UFLOW 0x07 /* - timer 7 underflow */
174 #define TM8MD_COUNT_ENABLE 0x80 /* timer count enable */
176 #define TM9MD __SYSREG(0xd400308a, u8) /* timer 9 mode register */
177 #define TM9MD_SRC 0x07 /* timer source */
181 #define TM9MD_SRC_TM8CASCADE 0x03 /* - cascade with timer 8 */
182 #define TM9MD_SRC_TM0UFLOW 0x04 /* - timer 0 underflow */
183 #define TM9MD_SRC_TM1UFLOW 0x05 /* - timer 1 underflow */
184 #define TM9MD_SRC_TM2UFLOW 0x06 /* - timer 2 underflow */
188 #define TM9MD_SRC_TM7UFLOW 0x07 /* - timer 7 underflow */
191 #define TM9MD_COUNT_ENABLE 0x80 /* timer count enable */
193 #define TM10MD __SYSREG(0xd400308c, u8) /* timer 10 mode register */
194 #define TM10MD_SRC 0x07 /* timer source */
198 #define TM10MD_SRC_TM9CASCADE 0x03 /* - cascade with timer 9 */
199 #define TM10MD_SRC_TM0UFLOW 0x04 /* - timer 0 underflow */
200 #define TM10MD_SRC_TM1UFLOW 0x05 /* - timer 1 underflow */
201 #define TM10MD_SRC_TM2UFLOW 0x06 /* - timer 2 underflow */
205 #define TM10MD_SRC_TM7UFLOW 0x07 /* - timer 7 underflow */
208 #define TM10MD_COUNT_ENABLE 0x80 /* timer count enable */
210 #define TM11MD __SYSREG(0xd400308e, u8) /* timer 11 mode register */
211 #define TM11MD_SRC 0x07 /* timer source */
215 #define TM11MD_SRC_TM0UFLOW 0x04 /* - timer 0 underflow */
216 #define TM11MD_SRC_TM1UFLOW 0x05 /* - timer 1 underflow */
217 #define TM11MD_SRC_TM2UFLOW 0x06 /* - timer 2 underflow */
221 #define TM11MD_SRC_TM7UFLOW 0x07 /* - timer 7 underflow */
224 #define TM11MD_COUNT_ENABLE 0x80 /* timer count enable */
227 #define TM12MD __SYSREG(0xd4003180, u8) /* timer 11 mode register */
228 #define TM12MD_SRC 0x07 /* timer source */
232 #define TM12MD_SRC_TM0UFLOW 0x04 /* - timer 0 underflow */
233 #define TM12MD_SRC_TM1UFLOW 0x05 /* - timer 1 underflow */
234 #define TM12MD_SRC_TM2UFLOW 0x06 /* - timer 2 underflow */
235 #define TM12MD_SRC_TM7UFLOW 0x07 /* - timer 7 underflow */
237 #define TM12MD_COUNT_ENABLE 0x80 /* timer count enable */
239 #define TM13MD __SYSREG(0xd4003182, u8) /* timer 11 mode register */
240 #define TM13MD_SRC 0x07 /* timer source */
244 #define TM13MD_SRC_TM12CASCADE 0x03 /* - cascade with timer 12 */
245 #define TM13MD_SRC_TM0UFLOW 0x04 /* - timer 0 underflow */
246 #define TM13MD_SRC_TM1UFLOW 0x05 /* - timer 1 underflow */
247 #define TM13MD_SRC_TM2UFLOW 0x06 /* - timer 2 underflow */
248 #define TM13MD_SRC_TM7UFLOW 0x07 /* - timer 7 underflow */
250 #define TM13MD_COUNT_ENABLE 0x80 /* timer count enable */
252 #define TM14MD __SYSREG(0xd4003184, u8) /* timer 11 mode register */
253 #define TM14MD_SRC 0x07 /* timer source */
257 #define TM14MD_SRC_TM13CASCADE 0x03 /* - cascade with timer 13 */
258 #define TM14MD_SRC_TM0UFLOW 0x04 /* - timer 0 underflow */
259 #define TM14MD_SRC_TM1UFLOW 0x05 /* - timer 1 underflow */
260 #define TM14MD_SRC_TM2UFLOW 0x06 /* - timer 2 underflow */
261 #define TM14MD_SRC_TM7UFLOW 0x07 /* - timer 7 underflow */
263 #define TM14MD_COUNT_ENABLE 0x80 /* timer count enable */
265 #define TM15MD __SYSREG(0xd4003186, u8) /* timer 11 mode register */
266 #define TM15MD_SRC 0x07 /* timer source */
270 #define TM15MD_SRC_TM0UFLOW 0x04 /* - timer 0 underflow */
271 #define TM15MD_SRC_TM1UFLOW 0x05 /* - timer 1 underflow */
272 #define TM15MD_SRC_TM2UFLOW 0x06 /* - timer 2 underflow */
273 #define TM15MD_SRC_TM7UFLOW 0x07 /* - timer 7 underflow */
275 #define TM15MD_COUNT_ENABLE 0x80 /* timer count enable */
279 #define TM4BR __SYSREG(0xd4003090, u16) /* timer 4 base register */
280 #define TM5BR __SYSREG(0xd4003092, u16) /* timer 5 base register */
281 #define TM45BR __SYSREG(0xd4003090, u32) /* timer 4:5 base register */
282 #define TM7BR __SYSREG(0xd4003096, u16) /* timer 7 base register */
283 #define TM8BR __SYSREG(0xd4003098, u16) /* timer 8 base register */
284 #define TM9BR __SYSREG(0xd400309a, u16) /* timer 9 base register */
285 #define TM89BR __SYSREG(0xd4003098, u32) /* timer 8:9 base register */
286 #define TM10BR __SYSREG(0xd400309c, u16) /* timer 10 base register */
287 #define TM11BR __SYSREG(0xd400309e, u16) /* timer 11 base register */
289 #define TM12BR __SYSREG(0xd4003190, u16) /* timer 12 base register */
290 #define TM13BR __SYSREG(0xd4003192, u16) /* timer 13 base register */
291 #define TM14BR __SYSREG(0xd4003194, u16) /* timer 14 base register */
292 #define TM15BR __SYSREG(0xd4003196, u16) /* timer 15 base register */
295 #define TM4BC __SYSREG(0xd40030a0, u16) /* timer 4 binary counter */
296 #define TM5BC __SYSREG(0xd40030a2, u16) /* timer 5 binary counter */
297 #define TM45BC __SYSREG(0xd40030a0, u32) /* timer 4:5 binary counter */
298 #define TM7BC __SYSREG(0xd40030a6, u16) /* timer 7 binary counter */
299 #define TM8BC __SYSREG(0xd40030a8, u16) /* timer 8 binary counter */
300 #define TM9BC __SYSREG(0xd40030aa, u16) /* timer 9 binary counter */
301 #define TM89BC __SYSREG(0xd40030a8, u32) /* timer 8:9 binary counter */
302 #define TM10BC __SYSREG(0xd40030ac, u16) /* timer 10 binary counter */
303 #define TM11BC __SYSREG(0xd40030ae, u16) /* timer 11 binary counter */
305 #define TM12BC __SYSREG(0xd40031a0, u16) /* timer 12 binary counter */
306 #define TM13BC __SYSREG(0xd40031a2, u16) /* timer 13 binary counter */
307 #define TM14BC __SYSREG(0xd40031a4, u16) /* timer 14 binary counter */
308 #define TM15BC __SYSREG(0xd40031a6, u16) /* timer 15 binary counter */
311 #define TM4IRQ 6 /* timer 4 IRQ */
312 #define TM5IRQ 7 /* timer 5 IRQ */
313 #define TM7IRQ 11 /* timer 7 IRQ */
314 #define TM8IRQ 12 /* timer 8 IRQ */
315 #define TM9IRQ 13 /* timer 9 IRQ */
316 #define TM10IRQ 14 /* timer 10 IRQ */
317 #define TM11IRQ 15 /* timer 11 IRQ */
319 #define TM12IRQ 64 /* timer 12 IRQ */
320 #define TM13IRQ 65 /* timer 13 IRQ */
321 #define TM14IRQ 66 /* timer 14 IRQ */
322 #define TM15IRQ 67 /* timer 15 IRQ */
325 #define TM4ICR GxICR(TM4IRQ) /* timer 4 uflow intr ctrl reg */
326 #define TM5ICR GxICR(TM5IRQ) /* timer 5 uflow intr ctrl reg */
327 #define TM7ICR GxICR(TM7IRQ) /* timer 7 uflow intr ctrl reg */
328 #define TM8ICR GxICR(TM8IRQ) /* timer 8 uflow intr ctrl reg */
329 #define TM9ICR GxICR(TM9IRQ) /* timer 9 uflow intr ctrl reg */
330 #define TM10ICR GxICR(TM10IRQ) /* timer 10 uflow intr ctrl reg */
331 #define TM11ICR GxICR(TM11IRQ) /* timer 11 uflow intr ctrl reg */
333 #define TM12ICR GxICR(TM12IRQ) /* timer 12 uflow intr ctrl reg */
334 #define TM13ICR GxICR(TM13IRQ) /* timer 13 uflow intr ctrl reg */
335 #define TM14ICR GxICR(TM14IRQ) /* timer 14 uflow intr ctrl reg */
336 #define TM15ICR GxICR(TM15IRQ) /* timer 15 uflow intr ctrl reg */
340 * 16-bit timer 6
343 #define TM6MD_SRC 0x0007 /* timer source */
347 #define TM6MD_SRC_TM0UFLOW 0x0004 /* - timer 0 underflow */
348 #define TM6MD_SRC_TM1UFLOW 0x0005 /* - timer 1 underflow */
349 #define TM6MD_SRC_TM2UFLOW 0x0006 /* - timer 2 underflow */
367 #define TM6MD_COUNT_ENABLE 0x8000 /* timer count enable */
414 #define TM6IRQ 6 /* timer 6 IRQ */
415 #define TM6AIRQ 9 /* timer 6A IRQ */
416 #define TM6BIRQ 10 /* timer 6B IRQ */
418 #define TM6ICR GxICR(TM6IRQ) /* timer 6 uflow intr ctrl reg */
419 #define TM6AICR GxICR(TM6AIRQ) /* timer 6A intr control reg */
420 #define TM6BICR GxICR(TM6BIRQ) /* timer 6B intr control reg */
428 #define TMTMD_TMTCNE 0x80 /* timer count enable */
438 #define TMSMD_TMSCNE 0x80 /* timer count enable */
443 #define TMTIRQ 119 /* OS Tick timer IRQ */
444 #define TMSIRQ 120 /* Timestamp timer IRQ */
446 #define TMTICR GxICR(TMTIRQ) /* OS Tick timer uflow intr ctrl reg */
447 #define TMSICR GxICR(TMSIRQ) /* Timestamp timer uflow intr ctrl reg */
H A Dreset-regs.h1 /* MN10300 Reset controller and watchdog timer definitions
21 * watchdog timer registers
25 #define WDCTR __SYSREG(0xc0001002, u8) /* watchdog timer control reg */
33 #define WDCTR_WDCNE 0x80 /* watchdog timer enable */
38 #define RSTCTR_WDTRST 0x04 /* watchdog timer reset flag */
39 #define RSTCTR_WDREN 0x08 /* watchdog timer reset enable */
H A Dserial-regs.h28 #define SC0CTR_CK_TM8UFLOW_8 0x0000 /* - 1/8 timer 8 underflow (serial port 0 only) */
29 #define SC0CTR_CK_TM2UFLOW_2 0x0003 /* - 1/2 timer 2 underflow (serial port 0 only) */
30 #define SC0CTR_CK_TM0UFLOW_8 0x0004 /* - 1/8 timer 0 underflow (serial port 0 only) */
31 #define SC0CTR_CK_TM2UFLOW_8 0x0005 /* - 1/8 timer 2 underflow (serial port 0 only) */
32 #define SC1CTR_CK_TM9UFLOW_8 0x0000 /* - 1/8 timer 9 underflow (serial port 1 only) */
33 #define SC1CTR_CK_TM3UFLOW_2 0x0003 /* - 1/2 timer 3 underflow (serial port 1 only) */
34 #define SC1CTR_CK_TM1UFLOW_8 0x0004 /* - 1/8 timer 1 underflow (serial port 1 only) */
35 #define SC1CTR_CK_TM3UFLOW_8 0x0005 /* - 1/8 timer 3 underflow (serial port 1 only) */
37 #define SC0CTR_CK_TM8UFLOW_8 0x0000 /* - 1/8 timer 8 underflow (serial port 0 only) */
38 #define SC0CTR_CK_TM0UFLOW_8 0x0004 /* - 1/8 timer 0 underflow (serial port 0 only) */
39 #define SC0CTR_CK_TM2UFLOW_8 0x0005 /* - 1/8 timer 2 underflow (serial port 0 only) */
40 #define SC1CTR_CK_TM12UFLOW_8 0x0000 /* - 1/8 timer 12 underflow (serial port 1 only) */
89 #define SC0RXIRQ 20 /* timer 0 Receive IRQ */
90 #define SC0TXIRQ 21 /* timer 0 Transmit IRQ */
102 #define SC1RXIRQ 22 /* timer 1 Receive IRQ */
103 #define SC1TXIRQ 23 /* timer 1 Transmit IRQ */
112 #define SC2CTR_CK_TM10UFLOW 0x0000 /* - timer 10 underflow */
113 #define SC2CTR_CK_TM2UFLOW 0x0001 /* - timer 2 underflow */
115 #define SC2CTR_CK_TM3UFLOW 0x0003 /* - timer 3 underflow */
118 #define SC2CTR_CK_TM9UFLOW_8 0x0000 /* - 1/8 timer 9 underflow */
121 #define SC2CTR_CK_TM3UFLOW_2 0x0003 /* - 1/2 timer 3 underflow */
122 #define SC2CTR_CK_TM1UFLOW_8 0x0004 /* - 1/8 timer 1 underflow */
123 #define SC2CTR_CK_TM3UFLOW_8 0x0005 /* - 1/8 timer 3 underflow */
H A Dpio-regs.h24 #define P0MD_0_TM0IO 0x0002 /* timer 0 I/O mode */
29 #define P0MD_1_TM1IO 0x0008 /* timer 1 I/O mode */
34 #define P0MD_2_TM2IO 0x0020 /* timer 2 I/O mode */
38 #define P0MD_3_TM3IO 0x0080 /* timer 3 I/O mode */
42 #define P0MD_4_TM4IO 0x0200 /* timer 4 I/O mode */
47 #define P0MD_5_TM5IO 0x0800 /* timer 5 I/O mode */
51 #define P0MD_6_TM6IOA 0x2000 /* timer 6 I/O mode A */
55 #define P0MD_7_TM6IOB 0x8000 /* timer 6 I/O mode B */
83 #define P1MD_0_TM7IO 0x0002 /* timer 7 I/O mode */
88 #define P1MD_1_TM8IO 0x0008 /* timer 8 I/O mode */
93 #define P1MD_2_TM9IO 0x0020 /* timer 9 I/O mode */
98 #define P1MD_3_TM10IO 0x0080 /* timer 10 I/O mode */
103 #define P1MD_4_TM11IO 0x0200 /* timer 11 I/O mode */
/linux-4.1.27/sound/isa/gus/
H A Dgus_timer.c32 static int snd_gf1_timer1_start(struct snd_timer * timer) snd_gf1_timer1_start() argument
39 gus = snd_timer_chip(timer); snd_gf1_timer1_start()
41 ticks = timer->sticks; snd_gf1_timer1_start()
43 snd_gf1_write8(gus, SNDRV_GF1_GB_ADLIB_TIMER_1, 256 - ticks); /* timer 1 count */ snd_gf1_timer1_start()
44 snd_gf1_write8(gus, SNDRV_GF1_GB_SOUND_BLASTER_CONTROL, tmp); /* enable timer 1 IRQ */ snd_gf1_timer1_start()
45 snd_gf1_adlib_write(gus, 0x04, tmp >> 2); /* timer 2 start */ snd_gf1_timer1_start()
50 static int snd_gf1_timer1_stop(struct snd_timer * timer) snd_gf1_timer1_stop() argument
56 gus = snd_timer_chip(timer); snd_gf1_timer1_stop()
59 snd_gf1_write8(gus, SNDRV_GF1_GB_SOUND_BLASTER_CONTROL, tmp); /* disable timer #1 */ snd_gf1_timer1_stop()
68 static int snd_gf1_timer2_start(struct snd_timer * timer) snd_gf1_timer2_start() argument
75 gus = snd_timer_chip(timer); snd_gf1_timer2_start()
77 ticks = timer->sticks; snd_gf1_timer2_start()
79 snd_gf1_write8(gus, SNDRV_GF1_GB_ADLIB_TIMER_2, 256 - ticks); /* timer 2 count */ snd_gf1_timer2_start()
80 snd_gf1_write8(gus, SNDRV_GF1_GB_SOUND_BLASTER_CONTROL, tmp); /* enable timer 2 IRQ */ snd_gf1_timer2_start()
81 snd_gf1_adlib_write(gus, 0x04, tmp >> 2); /* timer 2 start */ snd_gf1_timer2_start()
86 static int snd_gf1_timer2_stop(struct snd_timer * timer) snd_gf1_timer2_stop() argument
92 gus = snd_timer_chip(timer); snd_gf1_timer2_stop()
95 snd_gf1_write8(gus, SNDRV_GF1_GB_SOUND_BLASTER_CONTROL, tmp); /* disable timer #1 */ snd_gf1_timer2_stop()
106 struct snd_timer *timer = gus->gf1.timer1; snd_gf1_interrupt_timer1() local
108 if (timer == NULL) snd_gf1_interrupt_timer1()
110 snd_timer_interrupt(timer, timer->sticks); snd_gf1_interrupt_timer1()
115 struct snd_timer *timer = gus->gf1.timer2; snd_gf1_interrupt_timer2() local
117 if (timer == NULL) snd_gf1_interrupt_timer2()
119 snd_timer_interrupt(timer, timer->sticks); snd_gf1_interrupt_timer2()
144 static void snd_gf1_timer1_free(struct snd_timer *timer) snd_gf1_timer1_free() argument
146 struct snd_gus_card *gus = timer->private_data; snd_gf1_timer1_free()
150 static void snd_gf1_timer2_free(struct snd_timer *timer) snd_gf1_timer2_free() argument
152 struct snd_gus_card *gus = timer->private_data; snd_gf1_timer2_free()
158 struct snd_timer *timer; snd_gf1_timers_init() local
173 if (snd_timer_new(gus->card, "GF1 timer", &tid, &timer) >= 0) { snd_gf1_timers_init()
174 strcpy(timer->name, "GF1 timer #1"); snd_gf1_timers_init()
175 timer->private_data = gus; snd_gf1_timers_init()
176 timer->private_free = snd_gf1_timer1_free; snd_gf1_timers_init()
177 timer->hw = snd_gf1_timer1; snd_gf1_timers_init()
179 gus->gf1.timer1 = timer; snd_gf1_timers_init()
183 if (snd_timer_new(gus->card, "GF1 timer", &tid, &timer) >= 0) { snd_gf1_timers_init()
184 strcpy(timer->name, "GF1 timer #2"); snd_gf1_timers_init()
185 timer->private_data = gus; snd_gf1_timers_init()
186 timer->private_free = snd_gf1_timer2_free; snd_gf1_timers_init()
187 timer->hw = snd_gf1_timer2; snd_gf1_timers_init()
189 gus->gf1.timer2 = timer; snd_gf1_timers_init()
/linux-4.1.27/sound/core/
H A Dtimer.c31 #include <sound/timer.h>
49 MODULE_DESCRIPTION("ALSA timer interface");
57 MODULE_ALIAS("devname:snd/timer");
91 static int snd_timer_free(struct snd_timer *timer);
96 static void snd_timer_reschedule(struct snd_timer * timer, unsigned long ticks_left);
99 * create a timer instance with the given owner string.
100 * when timer is not NULL, increments the module counter
103 struct snd_timer *timer) snd_timer_instance_new()
120 timeri->timer = timer; snd_timer_instance_new()
121 if (timer && !try_module_get(timer->module)) { snd_timer_instance_new()
131 * find a timer instance from the given timer id
135 struct snd_timer *timer = NULL; snd_timer_find() local
137 list_for_each_entry(timer, &snd_timer_list, device_list) { snd_timer_find()
138 if (timer->tmr_class != tid->dev_class) snd_timer_find()
140 if ((timer->tmr_class == SNDRV_TIMER_CLASS_CARD || snd_timer_find()
141 timer->tmr_class == SNDRV_TIMER_CLASS_PCM) && snd_timer_find()
142 (timer->card == NULL || snd_timer_find()
143 timer->card->number != tid->card)) snd_timer_find()
145 if (timer->tmr_device != tid->device) snd_timer_find()
147 if (timer->tmr_subdevice != tid->subdevice) snd_timer_find()
149 return timer; snd_timer_find()
161 request_module("snd-timer-%i", tid->device); snd_timer_request()
183 struct snd_timer *timer; snd_timer_check_slave() local
187 list_for_each_entry(timer, &snd_timer_list, device_list) { snd_timer_check_slave()
188 list_for_each_entry(master, &timer->open_list_head, open_list) { snd_timer_check_slave()
195 slave->timer = master->timer; snd_timer_check_slave()
219 spin_lock(&master->timer->lock); snd_timer_check_master()
221 slave->timer = master->timer; snd_timer_check_master()
225 spin_unlock(&master->timer->lock); snd_timer_check_master()
232 * open a timer instance
239 struct snd_timer *timer; snd_timer_open() local
246 pr_debug("ALSA: timer: invalid slave class %i\n", snd_timer_open()
268 timer = snd_timer_find(tid); snd_timer_open()
270 if (!timer) { snd_timer_open()
274 timer = snd_timer_find(tid); snd_timer_open()
277 if (!timer) { snd_timer_open()
281 if (!list_empty(&timer->open_list_head)) { snd_timer_open()
282 timeri = list_entry(timer->open_list_head.next, snd_timer_open()
289 timeri = snd_timer_instance_new(owner, timer); snd_timer_open()
295 if (timer->card) snd_timer_open()
296 get_device(&timer->card->card_dev); snd_timer_open()
299 if (list_empty(&timer->open_list_head) && timer->hw.open) snd_timer_open()
300 timer->hw.open(timer); snd_timer_open()
301 list_add_tail(&timeri->open_list, &timer->open_list_head); snd_timer_open()
311 * close a timer instance
315 struct snd_timer *timer = NULL; snd_timer_close() local
321 /* force to stop the timer */ snd_timer_close()
337 timer = timeri->timer; snd_timer_close()
338 if (snd_BUG_ON(!timer)) snd_timer_close()
341 spin_lock_irq(&timer->lock); snd_timer_close()
343 spin_unlock_irq(&timer->lock); snd_timer_close()
345 spin_lock_irq(&timer->lock); snd_timer_close()
347 spin_unlock_irq(&timer->lock); snd_timer_close()
350 if (list_empty(&timer->open_list_head) && snd_timer_close()
351 timer->hw.close) snd_timer_close()
352 timer->hw.close(timer); snd_timer_close()
355 spin_lock(&timer->lock); snd_timer_close()
360 slave->timer = NULL; snd_timer_close()
364 spin_unlock(&timer->lock); snd_timer_close()
367 if (timer->card) snd_timer_close()
368 put_device(&timer->card->card_dev); snd_timer_close()
376 if (timer) snd_timer_close()
377 module_put(timer->module); snd_timer_close()
383 struct snd_timer * timer; snd_timer_resolution() local
387 if ((timer = timeri->timer) != NULL) { snd_timer_resolution()
388 if (timer->hw.c_resolution) snd_timer_resolution()
389 return timer->hw.c_resolution(timer); snd_timer_resolution()
390 return timer->hw.resolution; snd_timer_resolution()
397 struct snd_timer *timer; snd_timer_notify1() local
417 timer = ti->timer; snd_timer_notify1()
418 if (timer == NULL) snd_timer_notify1()
420 if (timer->hw.flags & SNDRV_TIMER_HW_SLAVE) snd_timer_notify1()
422 spin_lock_irqsave(&timer->lock, flags); snd_timer_notify1()
426 spin_unlock_irqrestore(&timer->lock, flags); snd_timer_notify1()
429 static int snd_timer_start1(struct snd_timer *timer, struct snd_timer_instance *timeri, snd_timer_start1() argument
432 list_move_tail(&timeri->active_list, &timer->active_list_head); snd_timer_start1()
433 if (timer->running) { snd_timer_start1()
434 if (timer->hw.flags & SNDRV_TIMER_HW_SLAVE) snd_timer_start1()
436 timer->flags |= SNDRV_TIMER_FLG_RESCHED; snd_timer_start1()
440 timer->sticks = sticks; snd_timer_start1()
441 timer->hw.start(timer); snd_timer_start1()
443 timer->running++; snd_timer_start1()
459 if (timeri->master && timeri->timer) { snd_timer_start_slave()
460 spin_lock(&timeri->timer->lock); snd_timer_start_slave()
463 spin_unlock(&timeri->timer->lock); snd_timer_start_slave()
470 * start the timer instance
474 struct snd_timer *timer; snd_timer_start() local
486 timer = timeri->timer; snd_timer_start()
487 if (timer == NULL) snd_timer_start()
489 if (timer->card && timer->card->shutdown) snd_timer_start()
491 spin_lock_irqsave(&timer->lock, flags); snd_timer_start()
499 result = snd_timer_start1(timer, timeri, ticks); snd_timer_start()
501 spin_unlock_irqrestore(&timer->lock, flags); snd_timer_start()
509 struct snd_timer *timer; _snd_timer_stop() local
521 if (timeri->timer) _snd_timer_stop()
522 spin_lock(&timeri->timer->lock); _snd_timer_stop()
526 if (timeri->timer) _snd_timer_stop()
527 spin_unlock(&timeri->timer->lock); _snd_timer_stop()
531 timer = timeri->timer; _snd_timer_stop()
532 if (!timer) _snd_timer_stop()
534 spin_lock_irqsave(&timer->lock, flags); _snd_timer_stop()
537 spin_unlock_irqrestore(&timer->lock, flags); _snd_timer_stop()
542 if (timer->card && timer->card->shutdown) { _snd_timer_stop()
543 spin_unlock_irqrestore(&timer->lock, flags); _snd_timer_stop()
547 !(--timer->running)) { _snd_timer_stop()
548 timer->hw.stop(timer); _snd_timer_stop()
549 if (timer->flags & SNDRV_TIMER_FLG_RESCHED) { _snd_timer_stop()
550 timer->flags &= ~SNDRV_TIMER_FLG_RESCHED; _snd_timer_stop()
551 snd_timer_reschedule(timer, 0); _snd_timer_stop()
552 if (timer->flags & SNDRV_TIMER_FLG_CHANGE) { _snd_timer_stop()
553 timer->flags &= ~SNDRV_TIMER_FLG_CHANGE; _snd_timer_stop()
554 timer->hw.start(timer); _snd_timer_stop()
559 spin_unlock_irqrestore(&timer->lock, flags); _snd_timer_stop()
567 * stop the timer instance.
569 * do not call this from the timer callback!
573 struct snd_timer *timer; snd_timer_stop() local
580 timer = timeri->timer; snd_timer_stop()
581 if (!timer) snd_timer_stop()
583 spin_lock_irqsave(&timer->lock, flags); snd_timer_stop()
586 spin_unlock_irqrestore(&timer->lock, flags); snd_timer_stop()
595 struct snd_timer *timer; snd_timer_continue() local
603 timer = timeri->timer; snd_timer_continue()
604 if (! timer) snd_timer_continue()
606 if (timer->card && timer->card->shutdown) snd_timer_continue()
608 spin_lock_irqsave(&timer->lock, flags); snd_timer_continue()
616 result = snd_timer_start1(timer, timeri, timer->sticks); snd_timer_continue()
618 spin_unlock_irqrestore(&timer->lock, flags); snd_timer_continue()
632 * reschedule the timer
635 * when the scheduling ticks is changed set CHANGE flag to reprogram the timer.
637 static void snd_timer_reschedule(struct snd_timer * timer, unsigned long ticks_left) snd_timer_reschedule() argument
642 list_for_each_entry(ti, &timer->active_list_head, active_list) { snd_timer_reschedule()
646 timer->running++; snd_timer_reschedule()
654 timer->flags &= ~SNDRV_TIMER_FLG_RESCHED; snd_timer_reschedule()
657 if (ticks > timer->hw.ticks) snd_timer_reschedule()
658 ticks = timer->hw.ticks; snd_timer_reschedule()
660 timer->flags |= SNDRV_TIMER_FLG_CHANGE; snd_timer_reschedule()
661 timer->sticks = ticks; snd_timer_reschedule()
665 * timer tasklet
670 struct snd_timer *timer = (struct snd_timer *) arg; snd_timer_tasklet() local
676 if (timer->card && timer->card->shutdown) snd_timer_tasklet()
679 spin_lock_irqsave(&timer->lock, flags); snd_timer_tasklet()
681 while (!list_empty(&timer->sack_list_head)) { snd_timer_tasklet()
682 p = timer->sack_list_head.next; /* get first item */ snd_timer_tasklet()
693 spin_unlock(&timer->lock); snd_timer_tasklet()
696 spin_lock(&timer->lock); snd_timer_tasklet()
699 spin_unlock_irqrestore(&timer->lock, flags); snd_timer_tasklet()
703 * timer interrupt
705 * ticks_left is usually equal to timer->sticks.
708 void snd_timer_interrupt(struct snd_timer * timer, unsigned long ticks_left) snd_timer_interrupt() argument
716 if (timer == NULL) snd_timer_interrupt()
719 if (timer->card && timer->card->shutdown) snd_timer_interrupt()
722 spin_lock_irqsave(&timer->lock, flags); snd_timer_interrupt()
725 if (timer->hw.c_resolution) snd_timer_interrupt()
726 resolution = timer->hw.c_resolution(timer); snd_timer_interrupt()
728 resolution = timer->hw.resolution; snd_timer_interrupt()
735 list_for_each_entry_safe(ti, tmp, &timer->active_list_head, snd_timer_interrupt()
751 --timer->running; snd_timer_interrupt()
754 if ((timer->hw.flags & SNDRV_TIMER_HW_TASKLET) || snd_timer_interrupt()
756 ack_list_head = &timer->ack_list_head; snd_timer_interrupt()
758 ack_list_head = &timer->sack_list_head; snd_timer_interrupt()
768 if (timer->flags & SNDRV_TIMER_FLG_RESCHED) snd_timer_interrupt()
769 snd_timer_reschedule(timer, timer->sticks); snd_timer_interrupt()
770 if (timer->running) { snd_timer_interrupt()
771 if (timer->hw.flags & SNDRV_TIMER_HW_STOP) { snd_timer_interrupt()
772 timer->hw.stop(timer); snd_timer_interrupt()
773 timer->flags |= SNDRV_TIMER_FLG_CHANGE; snd_timer_interrupt()
775 if (!(timer->hw.flags & SNDRV_TIMER_HW_AUTO) || snd_timer_interrupt()
776 (timer->flags & SNDRV_TIMER_FLG_CHANGE)) { snd_timer_interrupt()
777 /* restart timer */ snd_timer_interrupt()
778 timer->flags &= ~SNDRV_TIMER_FLG_CHANGE; snd_timer_interrupt()
779 timer->hw.start(timer); snd_timer_interrupt()
782 timer->hw.stop(timer); snd_timer_interrupt()
786 while (!list_empty(&timer->ack_list_head)) { snd_timer_interrupt()
787 p = timer->ack_list_head.next; /* get first item */ snd_timer_interrupt()
797 spin_unlock(&timer->lock); snd_timer_interrupt()
800 spin_lock(&timer->lock); snd_timer_interrupt()
805 use_tasklet = !list_empty(&timer->sack_list_head); snd_timer_interrupt()
806 spin_unlock_irqrestore(&timer->lock, flags); snd_timer_interrupt()
809 tasklet_schedule(&timer->task_queue); snd_timer_interrupt()
819 struct snd_timer *timer; snd_timer_new() local
831 timer = kzalloc(sizeof(*timer), GFP_KERNEL); snd_timer_new()
832 if (!timer) snd_timer_new()
834 timer->tmr_class = tid->dev_class; snd_timer_new()
835 timer->card = card; snd_timer_new()
836 timer->tmr_device = tid->device; snd_timer_new()
837 timer->tmr_subdevice = tid->subdevice; snd_timer_new()
839 strlcpy(timer->id, id, sizeof(timer->id)); snd_timer_new()
840 INIT_LIST_HEAD(&timer->device_list); snd_timer_new()
841 INIT_LIST_HEAD(&timer->open_list_head); snd_timer_new()
842 INIT_LIST_HEAD(&timer->active_list_head); snd_timer_new()
843 INIT_LIST_HEAD(&timer->ack_list_head); snd_timer_new()
844 INIT_LIST_HEAD(&timer->sack_list_head); snd_timer_new()
845 spin_lock_init(&timer->lock); snd_timer_new()
846 tasklet_init(&timer->task_queue, snd_timer_tasklet, snd_timer_new()
847 (unsigned long)timer); snd_timer_new()
849 timer->module = card->module; snd_timer_new()
850 err = snd_device_new(card, SNDRV_DEV_TIMER, timer, &ops); snd_timer_new()
852 snd_timer_free(timer); snd_timer_new()
857 *rtimer = timer; snd_timer_new()
861 static int snd_timer_free(struct snd_timer *timer) snd_timer_free() argument
863 if (!timer) snd_timer_free()
867 if (! list_empty(&timer->open_list_head)) { snd_timer_free()
870 pr_warn("ALSA: timer %p is busy?\n", timer); snd_timer_free()
871 list_for_each_safe(p, n, &timer->open_list_head) { snd_timer_free()
874 ti->timer = NULL; snd_timer_free()
877 list_del(&timer->device_list); snd_timer_free()
880 if (timer->private_free) snd_timer_free()
881 timer->private_free(timer); snd_timer_free()
882 kfree(timer); snd_timer_free()
888 struct snd_timer *timer = device->device_data; snd_timer_dev_free() local
889 return snd_timer_free(timer); snd_timer_dev_free()
894 struct snd_timer *timer = dev->device_data; snd_timer_dev_register() local
897 if (snd_BUG_ON(!timer || !timer->hw.start || !timer->hw.stop)) snd_timer_dev_register()
899 if (!(timer->hw.flags & SNDRV_TIMER_HW_SLAVE) && snd_timer_dev_register()
900 !timer->hw.resolution && timer->hw.c_resolution == NULL) snd_timer_dev_register()
905 if (timer1->tmr_class > timer->tmr_class) snd_timer_dev_register()
907 if (timer1->tmr_class < timer->tmr_class) snd_timer_dev_register()
909 if (timer1->card && timer->card) { snd_timer_dev_register()
910 if (timer1->card->number > timer->card->number) snd_timer_dev_register()
912 if (timer1->card->number < timer->card->number) snd_timer_dev_register()
915 if (timer1->tmr_device > timer->tmr_device) snd_timer_dev_register()
917 if (timer1->tmr_device < timer->tmr_device) snd_timer_dev_register()
919 if (timer1->tmr_subdevice > timer->tmr_subdevice) snd_timer_dev_register()
921 if (timer1->tmr_subdevice < timer->tmr_subdevice) snd_timer_dev_register()
927 list_add_tail(&timer->device_list, &timer1->device_list); snd_timer_dev_register()
939 struct snd_timer *timer = device->device_data; snd_timer_dev_disconnect() local
943 list_del_init(&timer->device_list); snd_timer_dev_disconnect()
945 list_for_each_entry(ti, &timer->open_list_head, open_list) { snd_timer_dev_disconnect()
958 void snd_timer_notify(struct snd_timer *timer, int event, struct timespec *tstamp) snd_timer_notify() argument
964 if (timer->card && timer->card->shutdown) snd_timer_notify()
966 if (! (timer->hw.flags & SNDRV_TIMER_HW_SLAVE)) snd_timer_notify()
971 spin_lock_irqsave(&timer->lock, flags); snd_timer_notify()
975 if (timer->hw.c_resolution) snd_timer_notify()
976 resolution = timer->hw.c_resolution(timer); snd_timer_notify()
978 resolution = timer->hw.resolution; snd_timer_notify()
980 list_for_each_entry(ti, &timer->active_list_head, active_list) { snd_timer_notify()
987 spin_unlock_irqrestore(&timer->lock, flags); snd_timer_notify()
1005 int snd_timer_global_free(struct snd_timer *timer) snd_timer_global_free() argument
1007 return snd_timer_free(timer); snd_timer_global_free()
1010 int snd_timer_global_register(struct snd_timer *timer) snd_timer_global_register() argument
1015 dev.device_data = timer; snd_timer_global_register()
1020 * System timer
1032 struct snd_timer *timer = (struct snd_timer *)data; snd_timer_s_function() local
1033 struct snd_timer_system_private *priv = timer->private_data; snd_timer_s_function()
1037 snd_timer_interrupt(timer, (long)jiff - (long)priv->last_jiffies); snd_timer_s_function()
1040 static int snd_timer_s_start(struct snd_timer * timer) snd_timer_s_start() argument
1045 priv = (struct snd_timer_system_private *) timer->private_data; snd_timer_s_start()
1047 if (priv->correction > timer->sticks - 1) { snd_timer_s_start()
1048 priv->correction -= timer->sticks - 1; snd_timer_s_start()
1051 njiff += timer->sticks - priv->correction; snd_timer_s_start()
1059 static int snd_timer_s_stop(struct snd_timer * timer) snd_timer_s_stop() argument
1064 priv = (struct snd_timer_system_private *) timer->private_data; snd_timer_s_stop()
1068 timer->sticks = priv->last_expires - jiff; snd_timer_s_stop()
1070 timer->sticks = 1; snd_timer_s_stop()
1084 static void snd_timer_free_system(struct snd_timer *timer) snd_timer_free_system() argument
1086 kfree(timer->private_data); snd_timer_free_system()
1091 struct snd_timer *timer; snd_timer_register_system() local
1095 err = snd_timer_global_new("system", SNDRV_TIMER_GLOBAL_SYSTEM, &timer); snd_timer_register_system()
1098 strcpy(timer->name, "system timer"); snd_timer_register_system()
1099 timer->hw = snd_timer_system; snd_timer_register_system()
1102 snd_timer_free(timer); snd_timer_register_system()
1105 setup_timer(&priv->tlist, snd_timer_s_function, (unsigned long) timer); snd_timer_register_system()
1106 timer->private_data = priv; snd_timer_register_system()
1107 timer->private_free = snd_timer_free_system; snd_timer_register_system()
1108 return snd_timer_global_register(timer); snd_timer_register_system()
1119 struct snd_timer *timer; snd_timer_proc_read() local
1123 list_for_each_entry(timer, &snd_timer_list, device_list) { snd_timer_proc_read()
1124 if (timer->card && timer->card->shutdown) snd_timer_proc_read()
1126 switch (timer->tmr_class) { snd_timer_proc_read()
1128 snd_iprintf(buffer, "G%i: ", timer->tmr_device); snd_timer_proc_read()
1132 timer->card->number, timer->tmr_device); snd_timer_proc_read()
1135 snd_iprintf(buffer, "P%i-%i-%i: ", timer->card->number, snd_timer_proc_read()
1136 timer->tmr_device, timer->tmr_subdevice); snd_timer_proc_read()
1139 snd_iprintf(buffer, "?%i-%i-%i-%i: ", timer->tmr_class, snd_timer_proc_read()
1140 timer->card ? timer->card->number : -1, snd_timer_proc_read()
1141 timer->tmr_device, timer->tmr_subdevice); snd_timer_proc_read()
1143 snd_iprintf(buffer, "%s :", timer->name); snd_timer_proc_read()
1144 if (timer->hw.resolution) snd_timer_proc_read()
1146 timer->hw.resolution / 1000, snd_timer_proc_read()
1147 timer->hw.resolution % 1000, snd_timer_proc_read()
1148 timer->hw.ticks); snd_timer_proc_read()
1149 if (timer->hw.flags & SNDRV_TIMER_HW_SLAVE) snd_timer_proc_read()
1152 list_for_each_entry(ti, &timer->open_list_head, open_list) snd_timer_proc_read()
1372 static void snd_timer_user_copy_id(struct snd_timer_id *id, struct snd_timer *timer) snd_timer_user_copy_id() argument
1374 id->dev_class = timer->tmr_class; snd_timer_user_copy_id()
1376 id->card = timer->card ? timer->card->number : -1; snd_timer_user_copy_id()
1377 id->device = timer->tmr_device; snd_timer_user_copy_id()
1378 id->subdevice = timer->tmr_subdevice; snd_timer_user_copy_id()
1384 struct snd_timer *timer; snd_timer_user_next_device() local
1394 timer = list_entry(snd_timer_list.next, snd_timer_user_next_device()
1396 snd_timer_user_copy_id(&id, timer); snd_timer_user_next_device()
1403 timer = list_entry(p, struct snd_timer, device_list); snd_timer_user_next_device()
1404 if (timer->tmr_class > SNDRV_TIMER_CLASS_GLOBAL) { snd_timer_user_next_device()
1405 snd_timer_user_copy_id(&id, timer); snd_timer_user_next_device()
1408 if (timer->tmr_device >= id.device) { snd_timer_user_next_device()
1409 snd_timer_user_copy_id(&id, timer); snd_timer_user_next_device()
1436 timer = list_entry(p, struct snd_timer, device_list); snd_timer_user_next_device()
1437 if (timer->tmr_class > id.dev_class) { snd_timer_user_next_device()
1438 snd_timer_user_copy_id(&id, timer); snd_timer_user_next_device()
1441 if (timer->tmr_class < id.dev_class) snd_timer_user_next_device()
1443 if (timer->card->number > id.card) { snd_timer_user_next_device()
1444 snd_timer_user_copy_id(&id, timer); snd_timer_user_next_device()
1447 if (timer->card->number < id.card) snd_timer_user_next_device()
1449 if (timer->tmr_device > id.device) { snd_timer_user_next_device()
1450 snd_timer_user_copy_id(&id, timer); snd_timer_user_next_device()
1453 if (timer->tmr_device < id.device) snd_timer_user_next_device()
1455 if (timer->tmr_subdevice > id.subdevice) { snd_timer_user_next_device()
1456 snd_timer_user_copy_id(&id, timer); snd_timer_user_next_device()
1459 if (timer->tmr_subdevice < id.subdevice) snd_timer_user_next_device()
1461 snd_timer_user_copy_id(&id, timer); snd_timer_user_next_device()
1650 t = tu->timeri->timer; snd_timer_user_info()
1682 t = tu->timeri->timer; snd_timer_user_params()
2025 /* unregister the system timer */ snd_timer_free_all()
2028 struct snd_timer *timer, *n; snd_timer_free_all() local
2030 list_for_each_entry_safe(timer, n, &snd_timer_list, device_list) snd_timer_free_all()
2031 snd_timer_free(timer); snd_timer_free_all()
2045 dev_set_name(&timer_dev, "timer"); alsa_timer_init()
2049 "system timer"); alsa_timer_init()
2054 pr_err("ALSA: unable to register system timer (%i)\n", err); alsa_timer_init()
2062 pr_err("ALSA: unable to register timer device (%i)\n", err); alsa_timer_init()
102 snd_timer_instance_new(char *owner, struct snd_timer *timer) snd_timer_instance_new() argument
H A Dpcm_timer.c26 #include <sound/timer.h>
57 "pcm timer resolution out of range (rate = %u, period_size = %lu)\n", snd_pcm_timer_resolution_change()
65 static unsigned long snd_pcm_timer_resolution(struct snd_timer * timer) snd_pcm_timer_resolution() argument
69 substream = timer->private_data; snd_pcm_timer_resolution()
73 static int snd_pcm_timer_start(struct snd_timer * timer) snd_pcm_timer_start() argument
77 substream = snd_timer_chip(timer); snd_pcm_timer_start()
82 static int snd_pcm_timer_stop(struct snd_timer * timer) snd_pcm_timer_stop() argument
86 substream = snd_timer_chip(timer); snd_pcm_timer_stop()
105 static void snd_pcm_timer_free(struct snd_timer *timer) snd_pcm_timer_free() argument
107 struct snd_pcm_substream *substream = timer->private_data; snd_pcm_timer_free()
108 substream->timer = NULL; snd_pcm_timer_free()
114 struct snd_timer *timer; snd_pcm_timer_init() local
121 if (snd_timer_new(substream->pcm->card, "PCM", &tid, &timer) < 0) snd_pcm_timer_init()
123 sprintf(timer->name, "PCM %s %i-%i-%i", snd_pcm_timer_init()
127 timer->hw = snd_pcm_timer; snd_pcm_timer_init()
128 if (snd_device_register(timer->card, timer) < 0) { snd_pcm_timer_init()
129 snd_device_free(timer->card, timer); snd_pcm_timer_init()
132 timer->private_data = substream; snd_pcm_timer_init()
133 timer->private_free = snd_pcm_timer_free; snd_pcm_timer_init()
134 substream->timer = timer; snd_pcm_timer_init()
139 if (substream->timer) { snd_pcm_timer_done()
140 snd_device_free(substream->pcm->card, substream->timer); snd_pcm_timer_done()
141 substream->timer = NULL; snd_pcm_timer_done()
H A Drtctimer.c2 * RTC based high-frequency timer
28 #include <sound/timer.h>
47 * The hardware dependent description for this timer.
91 rtctimer_start(struct snd_timer *timer) rtctimer_start() argument
93 rtc_task_t *rtc = timer->private_data; rtctimer_start()
102 rtctimer_stop(struct snd_timer *timer) rtctimer_stop() argument
104 rtc_task_t *rtc = timer->private_data; rtctimer_stop()
131 struct snd_timer *timer; rtctimer_init() local
139 /* Create a new timer and set up the fields */ rtctimer_init()
140 err = snd_timer_global_new("rtc", SNDRV_TIMER_GLOBAL_RTC, &timer); rtctimer_init()
144 timer->module = THIS_MODULE; rtctimer_init()
145 strcpy(timer->name, "RTC timer"); rtctimer_init()
146 timer->hw = rtc_hw; rtctimer_init()
147 timer->hw.resolution = NANO_SEC / rtctimer_freq; rtctimer_init()
149 tasklet_init(&rtc_tasklet, rtctimer_tasklet, (unsigned long)timer); rtctimer_init()
155 err = snd_timer_global_register(timer); rtctimer_init()
157 snd_timer_global_free(timer); rtctimer_init()
160 rtctimer = timer; /* remember this */ rtctimer_init()
181 MODULE_PARM_DESC(rtctimer_freq, "timer frequency in Hz");
185 MODULE_ALIAS("snd-timer-" __stringify(SNDRV_TIMER_GLOBAL_RTC));
H A Dhrtimer.c2 * ALSA timer back-end using hrtimer
27 #include <sound/timer.h>
33 MODULE_ALIAS("snd-timer-" __stringify(SNDRV_TIMER_GLOBAL_HRTIMER));
39 struct snd_timer *timer; member in struct:snd_hrtimer
47 struct snd_timer *t = stime->timer; snd_hrtimer_callback()
54 snd_timer_interrupt(stime->timer, t->sticks * oruns); snd_hrtimer_callback()
69 stime->timer = t; snd_hrtimer_open()
124 struct snd_timer *timer; snd_hrtimer_init() local
136 /* Create a new timer and set up the fields */ snd_hrtimer_init()
138 &timer); snd_hrtimer_init()
142 timer->module = THIS_MODULE; snd_hrtimer_init()
143 strcpy(timer->name, "HR timer"); snd_hrtimer_init()
144 timer->hw = hrtimer_hw; snd_hrtimer_init()
145 timer->hw.resolution = resolution; snd_hrtimer_init()
146 timer->hw.ticks = NANO_SEC / resolution; snd_hrtimer_init()
148 err = snd_timer_global_register(timer); snd_hrtimer_init()
150 snd_timer_global_free(timer); snd_hrtimer_init()
153 mytimer = timer; /* remember this */ snd_hrtimer_init()
H A DMakefile23 snd-timer-objs := timer.o
32 obj-$(CONFIG_SND_TIMER) += snd-timer.o
/linux-4.1.27/arch/mips/include/asm/mach-jz4740/
H A Dtimer.h3 * JZ4740 platform timer support
64 static inline void jz4740_timer_stop(unsigned int timer) jz4740_timer_stop() argument
66 writel(BIT(timer), jz4740_timer_base + JZ_REG_TIMER_STOP_SET); jz4740_timer_stop()
69 static inline void jz4740_timer_start(unsigned int timer) jz4740_timer_start() argument
71 writel(BIT(timer), jz4740_timer_base + JZ_REG_TIMER_STOP_CLEAR); jz4740_timer_start()
74 static inline bool jz4740_timer_is_enabled(unsigned int timer) jz4740_timer_is_enabled() argument
76 return readb(jz4740_timer_base + JZ_REG_TIMER_ENABLE) & BIT(timer); jz4740_timer_is_enabled()
79 static inline void jz4740_timer_enable(unsigned int timer) jz4740_timer_enable() argument
81 writeb(BIT(timer), jz4740_timer_base + JZ_REG_TIMER_ENABLE_SET); jz4740_timer_enable()
84 static inline void jz4740_timer_disable(unsigned int timer) jz4740_timer_disable() argument
86 writeb(BIT(timer), jz4740_timer_base + JZ_REG_TIMER_ENABLE_CLEAR); jz4740_timer_disable()
89 static inline void jz4740_timer_set_period(unsigned int timer, uint16_t period) jz4740_timer_set_period() argument
91 writew(period, jz4740_timer_base + JZ_REG_TIMER_DFR(timer)); jz4740_timer_set_period()
94 static inline void jz4740_timer_set_duty(unsigned int timer, uint16_t duty) jz4740_timer_set_duty() argument
96 writew(duty, jz4740_timer_base + JZ_REG_TIMER_DHR(timer)); jz4740_timer_set_duty()
99 static inline void jz4740_timer_set_count(unsigned int timer, uint16_t count) jz4740_timer_set_count() argument
101 writew(count, jz4740_timer_base + JZ_REG_TIMER_CNT(timer)); jz4740_timer_set_count()
104 static inline uint16_t jz4740_timer_get_count(unsigned int timer) jz4740_timer_get_count() argument
106 return readw(jz4740_timer_base + JZ_REG_TIMER_CNT(timer)); jz4740_timer_get_count()
109 static inline void jz4740_timer_ack_full(unsigned int timer) jz4740_timer_ack_full() argument
111 writel(JZ_TIMER_IRQ_FULL(timer), jz4740_timer_base + JZ_REG_TIMER_FLAG_CLEAR); jz4740_timer_ack_full()
114 static inline void jz4740_timer_irq_full_enable(unsigned int timer) jz4740_timer_irq_full_enable() argument
116 writel(JZ_TIMER_IRQ_FULL(timer), jz4740_timer_base + JZ_REG_TIMER_FLAG_CLEAR); jz4740_timer_irq_full_enable()
117 writel(JZ_TIMER_IRQ_FULL(timer), jz4740_timer_base + JZ_REG_TIMER_MASK_CLEAR); jz4740_timer_irq_full_enable()
120 static inline void jz4740_timer_irq_full_disable(unsigned int timer) jz4740_timer_irq_full_disable() argument
122 writel(JZ_TIMER_IRQ_FULL(timer), jz4740_timer_base + JZ_REG_TIMER_MASK_SET); jz4740_timer_irq_full_disable()
125 static inline void jz4740_timer_set_ctrl(unsigned int timer, uint16_t ctrl) jz4740_timer_set_ctrl() argument
127 writew(ctrl, jz4740_timer_base + JZ_REG_TIMER_CTRL(timer)); jz4740_timer_set_ctrl()
130 static inline uint16_t jz4740_timer_get_ctrl(unsigned int timer) jz4740_timer_get_ctrl() argument
132 return readw(jz4740_timer_base + JZ_REG_TIMER_CTRL(timer)); jz4740_timer_get_ctrl()
/linux-4.1.27/sound/core/seq/oss/
H A Dseq_oss_timer.c37 static void calc_alsa_tempo(struct seq_oss_timer *timer);
42 * create and register a new timer.
67 * delete timer.
68 * if no more timer exists, stop the queue.
83 * 0 : not a timer event -- enqueue this event
129 calc_alsa_tempo(struct seq_oss_timer *timer) calc_alsa_tempo() argument
131 timer->tempo = (60 * 1000000) / timer->oss_tempo; calc_alsa_tempo()
132 timer->ppq = timer->oss_timebase; calc_alsa_tempo()
137 * dispatch a timer event
160 snd_seq_oss_timer_start(struct seq_oss_timer *timer) snd_seq_oss_timer_start() argument
162 struct seq_oss_devinfo *dp = timer->dp; snd_seq_oss_timer_start()
165 if (timer->running) snd_seq_oss_timer_start()
166 snd_seq_oss_timer_stop(timer); snd_seq_oss_timer_start()
170 tmprec.ppq = timer->ppq; snd_seq_oss_timer_start()
171 tmprec.tempo = timer->tempo; snd_seq_oss_timer_start()
175 timer->running = 1; snd_seq_oss_timer_start()
176 timer->cur_tick = 0; snd_seq_oss_timer_start()
185 snd_seq_oss_timer_stop(struct seq_oss_timer *timer) snd_seq_oss_timer_stop() argument
187 if (! timer->running) snd_seq_oss_timer_stop()
189 send_timer_event(timer->dp, SNDRV_SEQ_EVENT_STOP, 0); snd_seq_oss_timer_stop()
190 timer->running = 0; snd_seq_oss_timer_stop()
199 snd_seq_oss_timer_continue(struct seq_oss_timer *timer) snd_seq_oss_timer_continue() argument
201 if (timer->running) snd_seq_oss_timer_continue()
203 send_timer_event(timer->dp, SNDRV_SEQ_EVENT_CONTINUE, 0); snd_seq_oss_timer_continue()
204 timer->running = 1; snd_seq_oss_timer_continue()
213 snd_seq_oss_timer_tempo(struct seq_oss_timer *timer, int value) snd_seq_oss_timer_tempo() argument
219 timer->oss_tempo = value; snd_seq_oss_timer_tempo()
220 calc_alsa_tempo(timer); snd_seq_oss_timer_tempo()
221 if (timer->running) snd_seq_oss_timer_tempo()
222 send_timer_event(timer->dp, SNDRV_SEQ_EVENT_TEMPO, timer->tempo); snd_seq_oss_timer_tempo()
231 snd_seq_oss_timer_ioctl(struct seq_oss_timer *timer, unsigned int cmd, int __user *arg) snd_seq_oss_timer_ioctl() argument
241 value = ((timer->oss_tempo * timer->oss_timebase) + 30) / 60; snd_seq_oss_timer_ioctl()
245 if (timer->dp->seq_mode == SNDRV_SEQ_OSS_MODE_SYNTH) snd_seq_oss_timer_ioctl()
250 return snd_seq_oss_timer_start(timer); snd_seq_oss_timer_ioctl()
252 return snd_seq_oss_timer_stop(timer); snd_seq_oss_timer_ioctl()
254 return snd_seq_oss_timer_continue(timer); snd_seq_oss_timer_ioctl()
258 return snd_seq_oss_timer_tempo(timer, value); snd_seq_oss_timer_ioctl()
266 timer->oss_timebase = value; snd_seq_oss_timer_ioctl()
267 calc_alsa_tempo(timer); snd_seq_oss_timer_ioctl()
H A Dseq_oss_timer.h3 * timer handling routines
28 * timer information definition
43 int snd_seq_oss_timer_start(struct seq_oss_timer *timer);
44 int snd_seq_oss_timer_stop(struct seq_oss_timer *timer);
45 int snd_seq_oss_timer_continue(struct seq_oss_timer *timer);
46 int snd_seq_oss_timer_tempo(struct seq_oss_timer *timer, int value);
49 int snd_seq_oss_timer_ioctl(struct seq_oss_timer *timer, unsigned int cmd, int __user *arg);
55 snd_seq_oss_timer_cur_tick(struct seq_oss_timer *timer) snd_seq_oss_timer_cur_tick() argument
57 return timer->cur_tick; snd_seq_oss_timer_cur_tick()
65 snd_seq_oss_timer_is_realtime(struct seq_oss_timer *timer) snd_seq_oss_timer_is_realtime() argument
67 return timer->realtime; snd_seq_oss_timer_is_realtime()
/linux-4.1.27/drivers/staging/lustre/lnet/selftest/
H A DMakefile3 lnet_selftest-y := console.o conrpc.o conctl.o framework.o timer.o rpc.o \
H A Dtimer.c36 * lnet/selftest/timer.c
71 stt_add_timer(stt_timer_t *timer) stt_add_timer() argument
79 LASSERT(timer->stt_func != NULL); stt_add_timer()
80 LASSERT(list_empty(&timer->stt_list)); stt_add_timer()
81 LASSERT(cfs_time_after(timer->stt_expires, get_seconds())); stt_add_timer()
84 list_for_each_prev(pos, STTIMER_SLOT(timer->stt_expires)) { list_for_each_prev()
87 if (cfs_time_aftereq(timer->stt_expires, old->stt_expires)) list_for_each_prev()
90 list_add(&timer->stt_list, pos);
96 * The function returns whether it has deactivated a pending timer or not.
97 * (ie. del_timer() of an inactive timer returns 0, del_timer() of an
98 * active timer returns 1.)
101 * When 0 is returned, it is possible that timer->stt_func _is_ running on
105 stt_del_timer(stt_timer_t *timer) stt_del_timer() argument
114 if (!list_empty(&timer->stt_list)) { stt_del_timer()
116 list_del_init(&timer->stt_list); stt_del_timer()
128 stt_timer_t *timer; stt_expire_list() local
131 timer = list_entry(slot->next, stt_timer_t, stt_list); stt_expire_list()
133 if (cfs_time_after(timer->stt_expires, now)) stt_expire_list()
136 list_del_init(&timer->stt_list); stt_expire_list()
140 (*timer->stt_func) (timer->stt_data); stt_expire_list()
225 CERROR("Can't spawn timer thread: %d\n", rc); stt_startup()
/linux-4.1.27/arch/arm/mach-footbridge/
H A DMakefile15 obj-$(CONFIG_ARCH_CATS) += cats-hw.o isa-timer.o
16 obj-$(CONFIG_ARCH_EBSA285) += ebsa285.o dc21285-timer.o
17 obj-$(CONFIG_ARCH_NETWINDER) += netwinder-hw.o isa-timer.o
18 obj-$(CONFIG_ARCH_PERSONAL_SERVER) += personal.o dc21285-timer.o
/linux-4.1.27/arch/arm/mach-lpc32xx/
H A DMakefile5 obj-y := timer.o irq.o common.o serial.o clock.o
H A Dtimer.c2 * arch/arm/mach-lpc32xx/timer.c
57 * Disable the timer. When using oneshot, we must also lpc32xx_clkevt_mode()
58 * disable the timer to wait for the first call to lpc32xx_clkevt_mode()
106 /* Enable timer clock */ lpc32xx_timer_init()
115 * timer rates. This rate is needed to compute the tick rate. lpc32xx_timer_init()
126 /* Get PCLK divider and divide ARM PLL clock by it to get timer rate */ lpc32xx_timer_init()
129 /* Initial timer setup */ lpc32xx_timer_init()
/linux-4.1.27/arch/s390/include/asm/
H A Dvtimer.h3 * Virtual CPU timer
21 extern void init_virt_timer(struct vtimer_list *timer);
22 extern void add_virt_timer(struct vtimer_list *timer);
23 extern void add_virt_timer_periodic(struct vtimer_list *timer);
24 extern int mod_virt_timer(struct vtimer_list *timer, u64 expires);
25 extern int mod_virt_timer_periodic(struct vtimer_list *timer, u64 expires);
26 extern int del_virt_timer(struct vtimer_list *timer);
/linux-4.1.27/include/linux/sunrpc/
H A Dtimer.h2 * linux/include/linux/sunrpc/timer.h
4 * Declarations for the RPC transport timer.
23 extern void rpc_update_rtt(struct rpc_rtt *rt, unsigned timer, long m);
24 extern unsigned long rpc_calc_rto(struct rpc_rtt *rt, unsigned timer);
26 static inline void rpc_set_timeo(struct rpc_rtt *rt, int timer, int ntimeo) rpc_set_timeo() argument
29 if (!timer) rpc_set_timeo()
31 t = &rt->ntimeouts[timer-1]; rpc_set_timeo()
42 static inline int rpc_ntimeo(struct rpc_rtt *rt, int timer) rpc_ntimeo() argument
44 if (!timer) rpc_ntimeo()
46 return rt->ntimeouts[timer-1]; rpc_ntimeo()
H A Dtypes.h12 #include <linux/timer.h>
/linux-4.1.27/virt/kvm/arm/
H A Darch_timer.c40 static bool timer_is_armed(struct arch_timer_cpu *timer) timer_is_armed() argument
42 return timer->armed; timer_is_armed()
45 /* timer_arm: as in "arm the timer", not as in ARM the company */ timer_arm()
46 static void timer_arm(struct arch_timer_cpu *timer, u64 ns) timer_arm() argument
48 timer->armed = true; timer_arm()
49 hrtimer_start(&timer->timer, ktime_add_ns(ktime_get(), ns), timer_arm()
53 static void timer_disarm(struct arch_timer_cpu *timer) timer_disarm() argument
55 if (timer_is_armed(timer)) { timer_disarm()
56 hrtimer_cancel(&timer->timer); timer_disarm()
57 cancel_work_sync(&timer->expired); timer_disarm()
58 timer->armed = false; timer_disarm()
65 struct arch_timer_cpu *timer = &vcpu->arch.timer_cpu; kvm_timer_inject_irq() local
67 timer->cntv_ctl |= ARCH_TIMER_CTRL_IT_MASK; kvm_timer_inject_irq()
69 timer->irq->irq, kvm_timer_inject_irq()
70 timer->irq->level); kvm_timer_inject_irq()
79 * We disable the timer in the world switch and let it be kvm_arch_timer_handler()
80 * handled by kvm_timer_sync_hwstate(). Getting a timer kvm_arch_timer_handler()
89 * Work function for handling the backup timer that we schedule when a vcpu is
90 * no longer running, but had a timer programmed to fire in the future.
101 * the timer has expired when entering the guest. kvm_timer_inject_irq_work()
108 struct arch_timer_cpu *timer; kvm_timer_expire() local
109 timer = container_of(hrt, struct arch_timer_cpu, timer); kvm_timer_expire()
110 queue_work(wqueue, &timer->expired); kvm_timer_expire()
116 struct arch_timer_cpu *timer = &vcpu->arch.timer_cpu; kvm_timer_should_fire() local
119 if ((timer->cntv_ctl & ARCH_TIMER_CTRL_IT_MASK) || kvm_timer_should_fire()
120 !(timer->cntv_ctl & ARCH_TIMER_CTRL_ENABLE)) kvm_timer_should_fire()
123 cval = timer->cntv_cval; kvm_timer_should_fire()
124 now = kvm_phys_timer_read() - vcpu->kvm->arch.timer.cntvoff; kvm_timer_should_fire()
130 * kvm_timer_flush_hwstate - prepare to move the virt timer to the cpu
134 * virtual timer state back to the physical CPU.
138 struct arch_timer_cpu *timer = &vcpu->arch.timer_cpu; kvm_timer_flush_hwstate() local
142 * keep the background timer running, as we're about to kvm_timer_flush_hwstate()
143 * populate the CPU timer again. kvm_timer_flush_hwstate()
145 timer_disarm(timer); kvm_timer_flush_hwstate()
148 * If the timer expired while we were not scheduled, now is the time kvm_timer_flush_hwstate()
156 * kvm_timer_sync_hwstate - sync timer state from cpu
159 * Check if the virtual timer was armed and either schedule a corresponding
160 * soft timer or inject directly if already expired.
164 struct arch_timer_cpu *timer = &vcpu->arch.timer_cpu; kvm_timer_sync_hwstate() local
168 BUG_ON(timer_is_armed(timer)); kvm_timer_sync_hwstate()
179 cval = timer->cntv_cval; kvm_timer_sync_hwstate()
180 now = kvm_phys_timer_read() - vcpu->kvm->arch.timer.cntvoff; kvm_timer_sync_hwstate()
184 timer_arm(timer, ns); kvm_timer_sync_hwstate()
190 struct arch_timer_cpu *timer = &vcpu->arch.timer_cpu; kvm_timer_vcpu_reset() local
193 * The vcpu timer irq number cannot be determined in kvm_timer_vcpu_reset()
196 * vcpu timer irq number when the vcpu is reset. kvm_timer_vcpu_reset()
198 timer->irq = irq; kvm_timer_vcpu_reset()
203 struct arch_timer_cpu *timer = &vcpu->arch.timer_cpu; kvm_timer_vcpu_init() local
205 INIT_WORK(&timer->expired, kvm_timer_inject_irq_work); kvm_timer_vcpu_init()
206 hrtimer_init(&timer->timer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS); kvm_timer_vcpu_init()
207 timer->timer.function = kvm_timer_expire; kvm_timer_vcpu_init()
217 struct arch_timer_cpu *timer = &vcpu->arch.timer_cpu; kvm_arm_timer_set_reg() local
221 timer->cntv_ctl = value; kvm_arm_timer_set_reg()
224 vcpu->kvm->arch.timer.cntvoff = kvm_phys_timer_read() - value; kvm_arm_timer_set_reg()
227 timer->cntv_cval = value; kvm_arm_timer_set_reg()
237 struct arch_timer_cpu *timer = &vcpu->arch.timer_cpu; kvm_arm_timer_get_reg() local
241 return timer->cntv_ctl; kvm_arm_timer_get_reg()
243 return kvm_phys_timer_read() - vcpu->kvm->arch.timer.cntvoff; kvm_arm_timer_get_reg()
245 return timer->cntv_cval; kvm_arm_timer_get_reg()
272 { .compatible = "arm,armv7-timer", },
273 { .compatible = "arm,armv8-timer", },
295 kvm_err("kvm_arch_timer: no virtual timer interrupt\n"); kvm_timer_hyp_init()
301 "kvm guest timer", kvm_get_running_vcpus()); kvm_timer_hyp_init()
312 kvm_err("Cannot register timer CPU notifier\n"); kvm_timer_hyp_init()
335 struct arch_timer_cpu *timer = &vcpu->arch.timer_cpu; kvm_timer_vcpu_terminate() local
337 timer_disarm(timer); kvm_timer_vcpu_terminate()
342 if (kvm->arch.timer.enabled) kvm_timer_enable()
347 * time, which may be enabling the timer multiple times. That doesn't kvm_timer_enable()
354 kvm->arch.timer.enabled = 1; kvm_timer_enable()
359 kvm->arch.timer.cntvoff = kvm_phys_timer_read(); kvm_timer_init()
/linux-4.1.27/include/linux/
H A Dhrtimer.h24 #include <linux/timer.h>
50 * Values to track state of the timer
57 * 0x04 timer is migrated to another cpu
62 * 0x05 timer was migrated on CPU hotunplug
65 * SMP. It happens for example when a posix timer expired and the callback
66 * queued a signal. Between dropping the lock which protects the posix timer
68 * signal and rearm the timer. We have to preserve the callback running state,
69 * as otherwise the timer could be removed before the softirq code finishes the
70 * the handling of the timer.
75 * necessary. HRTIMER_STATE_MIGRATE is cleared after the timer is
90 * which the timer is based. Is setup by adding
94 * The time which was given as expiry time when the timer
96 * @function: timer expiry callback function
97 * @base: pointer to the timer base (per cpu and per clock)
99 * @start_pid: timer statistics field to store the pid of the task which
100 * started the timer
101 * @start_site: timer statistics field to store the site where the timer
103 * @start_comm: timer statistics field to store the name of the process which
104 * started the timer
123 * @timer: embedded timer structure
126 * task is set to NULL, when the timer expires.
129 struct hrtimer timer; member in struct:hrtimer_sleeper
134 * struct hrtimer_clock_base - the timer base for a specific clock
137 * timer to a base on another cpu.
200 static inline void hrtimer_set_expires(struct hrtimer *timer, ktime_t time) hrtimer_set_expires() argument
202 timer->node.expires = time; hrtimer_set_expires()
203 timer->_softexpires = time; hrtimer_set_expires()
206 static inline void hrtimer_set_expires_range(struct hrtimer *timer, ktime_t time, ktime_t delta) hrtimer_set_expires_range() argument
208 timer->_softexpires = time; hrtimer_set_expires_range()
209 timer->node.expires = ktime_add_safe(time, delta); hrtimer_set_expires_range()
212 static inline void hrtimer_set_expires_range_ns(struct hrtimer *timer, ktime_t time, unsigned long delta) hrtimer_set_expires_range_ns() argument
214 timer->_softexpires = time; hrtimer_set_expires_range_ns()
215 timer->node.expires = ktime_add_safe(time, ns_to_ktime(delta)); hrtimer_set_expires_range_ns()
218 static inline void hrtimer_set_expires_tv64(struct hrtimer *timer, s64 tv64) hrtimer_set_expires_tv64() argument
220 timer->node.expires.tv64 = tv64; hrtimer_set_expires_tv64()
221 timer->_softexpires.tv64 = tv64; hrtimer_set_expires_tv64()
224 static inline void hrtimer_add_expires(struct hrtimer *timer, ktime_t time) hrtimer_add_expires() argument
226 timer->node.expires = ktime_add_safe(timer->node.expires, time); hrtimer_add_expires()
227 timer->_softexpires = ktime_add_safe(timer->_softexpires, time); hrtimer_add_expires()
230 static inline void hrtimer_add_expires_ns(struct hrtimer *timer, u64 ns) hrtimer_add_expires_ns() argument
232 timer->node.expires = ktime_add_ns(timer->node.expires, ns); hrtimer_add_expires_ns()
233 timer->_softexpires = ktime_add_ns(timer->_softexpires, ns); hrtimer_add_expires_ns()
236 static inline ktime_t hrtimer_get_expires(const struct hrtimer *timer) hrtimer_get_expires() argument
238 return timer->node.expires; hrtimer_get_expires()
241 static inline ktime_t hrtimer_get_softexpires(const struct hrtimer *timer) hrtimer_get_softexpires() argument
243 return timer->_softexpires; hrtimer_get_softexpires()
246 static inline s64 hrtimer_get_expires_tv64(const struct hrtimer *timer) hrtimer_get_expires_tv64() argument
248 return timer->node.expires.tv64; hrtimer_get_expires_tv64()
250 static inline s64 hrtimer_get_softexpires_tv64(const struct hrtimer *timer) hrtimer_get_softexpires_tv64() argument
252 return timer->_softexpires.tv64; hrtimer_get_softexpires_tv64()
255 static inline s64 hrtimer_get_expires_ns(const struct hrtimer *timer) hrtimer_get_expires_ns() argument
257 return ktime_to_ns(timer->node.expires); hrtimer_get_expires_ns()
260 static inline ktime_t hrtimer_expires_remaining(const struct hrtimer *timer) hrtimer_expires_remaining() argument
262 return ktime_sub(timer->node.expires, timer->base->get_time()); hrtimer_expires_remaining()
273 static inline ktime_t hrtimer_cb_get_time(struct hrtimer *timer) hrtimer_cb_get_time() argument
275 return timer->base->get_time(); hrtimer_cb_get_time()
278 static inline int hrtimer_is_hres_active(struct hrtimer *timer) hrtimer_is_hres_active() argument
280 return timer->base->cpu_base->hres_active; hrtimer_is_hres_active()
309 static inline ktime_t hrtimer_cb_get_time(struct hrtimer *timer) hrtimer_cb_get_time() argument
311 return timer->base->softirq_time; hrtimer_cb_get_time()
314 static inline int hrtimer_is_hres_active(struct hrtimer *timer) hrtimer_is_hres_active() argument
334 /* Exported timer functions: */ timerfd_clock_was_set()
337 extern void hrtimer_init(struct hrtimer *timer, clockid_t which_clock, timerfd_clock_was_set()
341 extern void hrtimer_init_on_stack(struct hrtimer *timer, clockid_t which_clock, timerfd_clock_was_set()
344 extern void destroy_hrtimer_on_stack(struct hrtimer *timer); timerfd_clock_was_set()
346 static inline void hrtimer_init_on_stack(struct hrtimer *timer, hrtimer_init_on_stack() argument
350 hrtimer_init(timer, which_clock, mode); hrtimer_init_on_stack()
352 static inline void destroy_hrtimer_on_stack(struct hrtimer *timer) { } destroy_hrtimer_on_stack() argument
355 /* Basic timer operations: */ destroy_hrtimer_on_stack()
356 extern int hrtimer_start(struct hrtimer *timer, ktime_t tim, destroy_hrtimer_on_stack()
358 extern int hrtimer_start_range_ns(struct hrtimer *timer, ktime_t tim, destroy_hrtimer_on_stack()
361 __hrtimer_start_range_ns(struct hrtimer *timer, ktime_t tim, destroy_hrtimer_on_stack()
365 extern int hrtimer_cancel(struct hrtimer *timer); destroy_hrtimer_on_stack()
366 extern int hrtimer_try_to_cancel(struct hrtimer *timer); destroy_hrtimer_on_stack()
368 static inline int hrtimer_start_expires(struct hrtimer *timer, hrtimer_start_expires() argument
373 soft = hrtimer_get_softexpires(timer); hrtimer_start_expires()
374 hard = hrtimer_get_expires(timer); hrtimer_start_expires()
376 return hrtimer_start_range_ns(timer, soft, delta, mode); hrtimer_start_expires()
379 static inline int hrtimer_restart(struct hrtimer *timer) hrtimer_restart() argument
381 return hrtimer_start_expires(timer, HRTIMER_MODE_ABS); hrtimer_restart()
385 extern ktime_t hrtimer_get_remaining(const struct hrtimer *timer);
391 * A timer is active, when it is enqueued into the rbtree or the
395 static inline int hrtimer_active(const struct hrtimer *timer) hrtimer_active() argument
397 return timer->state != HRTIMER_STATE_INACTIVE; hrtimer_active()
401 * Helper function to check, whether the timer is on one of the queues
403 static inline int hrtimer_is_queued(struct hrtimer *timer) hrtimer_is_queued() argument
405 return timer->state & HRTIMER_STATE_ENQUEUED; hrtimer_is_queued()
409 * Helper function to check, whether the timer is running the callback
412 static inline int hrtimer_callback_running(struct hrtimer *timer) hrtimer_callback_running() argument
414 return timer->state & HRTIMER_STATE_CALLBACK; hrtimer_callback_running()
419 hrtimer_forward(struct hrtimer *timer, ktime_t now, ktime_t interval);
422 static inline u64 hrtimer_forward_now(struct hrtimer *timer, hrtimer_forward_now() argument
425 return hrtimer_forward(timer, timer->base->get_time(), interval); hrtimer_forward_now()
H A Dtimer.h55 * A deferrable timer will work normally when the system is busy, but
57 * the timer will be serviced when the CPU eventually wakes up with a
58 * subsequent non-deferrable timer.
60 * An irqsafe timer is executed with IRQ disabled and it's safe to wait for
94 void init_timer_key(struct timer_list *timer, unsigned int flags,
98 extern void init_timer_on_stack_key(struct timer_list *timer,
101 extern void destroy_timer_on_stack(struct timer_list *timer);
103 static inline void destroy_timer_on_stack(struct timer_list *timer) { } init_timer_on_stack_key() argument
104 static inline void init_timer_on_stack_key(struct timer_list *timer, init_timer_on_stack_key() argument
108 init_timer_key(timer, flags, name, key); init_timer_on_stack_key()
131 #define init_timer(timer) \
132 __init_timer((timer), 0)
133 #define init_timer_deferrable(timer) \
134 __init_timer((timer), TIMER_DEFERRABLE)
135 #define init_timer_on_stack(timer) \
136 __init_timer_on_stack((timer), 0)
152 #define setup_timer(timer, fn, data) \
153 __setup_timer((timer), (fn), (data), 0)
154 #define setup_timer_on_stack(timer, fn, data) \
155 __setup_timer_on_stack((timer), (fn), (data), 0)
156 #define setup_deferrable_timer_on_stack(timer, fn, data) \
157 __setup_timer_on_stack((timer), (fn), (data), TIMER_DEFERRABLE)
160 * timer_pending - is a timer pending?
161 * @timer: the timer in question
163 * timer_pending will tell whether a given timer is currently pending,
165 * to this timer, eg. interrupt contexts, or other CPUs on SMP.
167 * return value: 1 if the timer is pending, 0 if not.
169 static inline int timer_pending(const struct timer_list * timer) timer_pending() argument
171 return timer->entry.next != NULL; timer_pending()
174 extern void add_timer_on(struct timer_list *timer, int cpu);
175 extern int del_timer(struct timer_list * timer);
176 extern int mod_timer(struct timer_list *timer, unsigned long expires);
177 extern int mod_timer_pending(struct timer_list *timer, unsigned long expires);
178 extern int mod_timer_pinned(struct timer_list *timer, unsigned long expires);
185 * The jiffies value which is added to now, when there is no timer
186 * in the timer wheel:
191 * Return when the next timer-wheel timeout occurs (in absolute jiffies),
192 * locks the timer base and does the comparison against the given
208 extern void timer_stats_update_stats(void *timer, pid_t pid, void *startf,
212 extern void __timer_stats_timer_set_start_info(struct timer_list *timer,
215 static inline void timer_stats_timer_set_start_info(struct timer_list *timer) timer_stats_timer_set_start_info() argument
219 __timer_stats_timer_set_start_info(timer, __builtin_return_address(0)); timer_stats_timer_set_start_info()
222 static inline void timer_stats_timer_clear_start_info(struct timer_list *timer) timer_stats_timer_clear_start_info() argument
224 timer->start_site = NULL; timer_stats_timer_clear_start_info()
231 static inline void timer_stats_timer_set_start_info(struct timer_list *timer) timer_stats_timer_set_start_info() argument
235 static inline void timer_stats_timer_clear_start_info(struct timer_list *timer) timer_stats_timer_clear_start_info() argument
240 extern void add_timer(struct timer_list *timer);
242 extern int try_to_del_timer_sync(struct timer_list *timer);
245 extern int del_timer_sync(struct timer_list *timer);
H A Dposix-timers.h61 /* POSIX.1b interval timer structure. */
66 clockid_t it_clock; /* which timer type */
67 timer_t it_id; /* timer id */
70 int it_requeue_pending; /* waiting to requeue this timer */
81 struct hrtimer timer; member in struct:k_itimer::__anon12360::__anon12361
105 int (*timer_create) (struct k_itimer *timer);
123 /* function to call to trigger timer event */
126 void posix_cpu_timer_schedule(struct k_itimer *timer);
H A Dtimerqueue.h27 * timerqueue_getnext - Returns the timer with the earliest expiration time
31 * Returns a pointer to the timer node that has the
H A Dbcm47xx_wdt.h5 #include <linux/timer.h>
H A Dhpet.h26 union { /* timer compare register */
98 unsigned int hd_state; /* timer allocated */
102 static inline void hpet_reserve_timer(struct hpet_data *hd, int timer) hpet_reserve_timer() argument
104 hd->hd_state |= (1 << timer); hpet_reserve_timer()
H A Dcs5535.h214 extern uint16_t cs5535_mfgpt_read(struct cs5535_mfgpt_timer *timer,
216 extern void cs5535_mfgpt_write(struct cs5535_mfgpt_timer *timer, uint16_t reg,
219 extern int cs5535_mfgpt_toggle_event(struct cs5535_mfgpt_timer *timer, int cmp,
221 extern int cs5535_mfgpt_set_irq(struct cs5535_mfgpt_timer *timer, int cmp,
223 extern struct cs5535_mfgpt_timer *cs5535_mfgpt_alloc_timer(int timer,
225 extern void cs5535_mfgpt_free_timer(struct cs5535_mfgpt_timer *timer);
227 static inline int cs5535_mfgpt_setup_irq(struct cs5535_mfgpt_timer *timer, cs5535_mfgpt_setup_irq() argument
230 return cs5535_mfgpt_set_irq(timer, cmp, irq, 1); cs5535_mfgpt_setup_irq()
233 static inline int cs5535_mfgpt_release_irq(struct cs5535_mfgpt_timer *timer, cs5535_mfgpt_release_irq() argument
236 return cs5535_mfgpt_set_irq(timer, cmp, irq, 0); cs5535_mfgpt_release_irq()
H A Dif_eql.h22 #include <linux/timer.h>
46 struct timer_list timer; member in struct:equalizer
/linux-4.1.27/net/netfilter/
H A Dxt_IDLETIMER.c4 * Netfilter module to trigger a timer when packet matches.
5 * After timer expires a kevent will be sent.
33 #include <linux/timer.h>
52 struct timer_list timer; member in struct:idletimer_tg
84 struct idletimer_tg *timer; idletimer_tg_show() local
89 timer = __idletimer_tg_find_by_label(attr->name); idletimer_tg_show()
90 if (timer) idletimer_tg_show()
91 expires = timer->timer.expires; idletimer_tg_show()
104 struct idletimer_tg *timer = container_of(work, struct idletimer_tg, idletimer_tg_work() local
107 sysfs_notify(idletimer_tg_kobj, NULL, timer->attr.attr.name); idletimer_tg_work()
112 struct idletimer_tg *timer = (struct idletimer_tg *) data; idletimer_tg_expired() local
114 pr_debug("timer %s expired\n", timer->attr.attr.name); idletimer_tg_expired()
116 schedule_work(&timer->work); idletimer_tg_expired()
123 info->timer = kmalloc(sizeof(*info->timer), GFP_KERNEL); idletimer_tg_create()
124 if (!info->timer) { idletimer_tg_create()
129 info->timer->attr.attr.name = kstrdup(info->label, GFP_KERNEL); idletimer_tg_create()
130 if (!info->timer->attr.attr.name) { idletimer_tg_create()
134 info->timer->attr.attr.mode = S_IRUGO; idletimer_tg_create()
135 info->timer->attr.show = idletimer_tg_show; idletimer_tg_create()
137 ret = sysfs_create_file(idletimer_tg_kobj, &info->timer->attr.attr); idletimer_tg_create()
143 list_add(&info->timer->entry, &idletimer_tg_list); idletimer_tg_create()
145 setup_timer(&info->timer->timer, idletimer_tg_expired, idletimer_tg_create()
146 (unsigned long) info->timer); idletimer_tg_create()
147 info->timer->refcnt = 1; idletimer_tg_create()
149 mod_timer(&info->timer->timer, idletimer_tg_create()
152 INIT_WORK(&info->timer->work, idletimer_tg_work); idletimer_tg_create()
157 kfree(info->timer->attr.attr.name); idletimer_tg_create()
159 kfree(info->timer); idletimer_tg_create()
172 pr_debug("resetting timer %s, timeout period %u\n", idletimer_tg_target()
175 BUG_ON(!info->timer); idletimer_tg_target()
177 mod_timer(&info->timer->timer, idletimer_tg_target()
204 info->timer = __idletimer_tg_find_by_label(info->label); idletimer_tg_checkentry()
205 if (info->timer) { idletimer_tg_checkentry()
206 info->timer->refcnt++; idletimer_tg_checkentry()
207 mod_timer(&info->timer->timer, idletimer_tg_checkentry()
210 pr_debug("increased refcnt of timer %s to %u\n", idletimer_tg_checkentry()
211 info->label, info->timer->refcnt); idletimer_tg_checkentry()
215 pr_debug("failed to create timer\n"); idletimer_tg_checkentry()
233 if (--info->timer->refcnt == 0) { idletimer_tg_destroy()
234 pr_debug("deleting timer %s\n", info->label); idletimer_tg_destroy()
236 list_del(&info->timer->entry); idletimer_tg_destroy()
237 del_timer_sync(&info->timer->timer); idletimer_tg_destroy()
238 sysfs_remove_file(idletimer_tg_kobj, &info->timer->attr.attr); idletimer_tg_destroy()
239 kfree(info->timer->attr.attr.name); idletimer_tg_destroy()
240 kfree(info->timer); idletimer_tg_destroy()
242 pr_debug("decreased refcnt of timer %s to %u\n", idletimer_tg_destroy()
243 info->label, info->timer->refcnt); idletimer_tg_destroy()
/linux-4.1.27/arch/nios2/kernel/
H A Dtime.c39 struct nios2_timer timer; member in struct:nios2_clockevent_dev
44 struct nios2_timer timer; member in struct:nios2_clocksource
60 static u16 timer_readw(struct nios2_timer *timer, u32 offs) timer_readw() argument
62 return readw(timer->base + offs); timer_readw()
65 static void timer_writew(struct nios2_timer *timer, u16 val, u32 offs) timer_writew() argument
67 writew(val, timer->base + offs); timer_writew()
70 static inline unsigned long read_timersnapshot(struct nios2_timer *timer) read_timersnapshot() argument
74 timer_writew(timer, 0, ALTERA_TIMER_SNAPL_REG); read_timersnapshot()
75 count = timer_readw(timer, ALTERA_TIMER_SNAPH_REG) << 16 | read_timersnapshot()
76 timer_readw(timer, ALTERA_TIMER_SNAPL_REG); read_timersnapshot()
88 count = read_timersnapshot(&nios2_cs->timer); nios2_timer_read()
110 static void nios2_timer_start(struct nios2_timer *timer) nios2_timer_start() argument
114 ctrl = timer_readw(timer, ALTERA_TIMER_CONTROL_REG); nios2_timer_start()
116 timer_writew(timer, ctrl, ALTERA_TIMER_CONTROL_REG); nios2_timer_start()
119 static void nios2_timer_stop(struct nios2_timer *timer) nios2_timer_stop() argument
123 ctrl = timer_readw(timer, ALTERA_TIMER_CONTROL_REG); nios2_timer_stop()
125 timer_writew(timer, ctrl, ALTERA_TIMER_CONTROL_REG); nios2_timer_stop()
128 static void nios2_timer_config(struct nios2_timer *timer, unsigned long period, nios2_timer_config() argument
133 /* The timer's actual period is one cycle greater than the value nios2_timer_config()
137 ctrl = timer_readw(timer, ALTERA_TIMER_CONTROL_REG); nios2_timer_config()
139 timer_writew(timer, ctrl | ALTERA_TIMER_CONTROL_STOP_MSK, nios2_timer_config()
143 timer_writew(timer, period, ALTERA_TIMER_PERIODL_REG); nios2_timer_config()
144 timer_writew(timer, period >> 16, ALTERA_TIMER_PERIODH_REG); nios2_timer_config()
151 timer_writew(timer, ctrl, ALTERA_TIMER_CONTROL_REG); nios2_timer_config()
159 nios2_timer_config(&nios2_ced->timer, delta, evt->mode); nios2_timer_set_next_event()
169 struct nios2_timer *timer = &nios2_ced->timer; nios2_timer_set_mode() local
173 period = DIV_ROUND_UP(timer->freq, HZ); nios2_timer_set_mode()
174 nios2_timer_config(timer, period, CLOCK_EVT_MODE_PERIODIC); nios2_timer_set_mode()
179 nios2_timer_stop(timer); nios2_timer_set_mode()
182 nios2_timer_start(timer); nios2_timer_set_mode()
193 timer_writew(&nios2_ced->timer, 0, ALTERA_TIMER_STATUS_REG); timer_interrupt()
221 static __init void nios2_clockevent_init(struct device_node *timer) nios2_clockevent_init() argument
227 nios2_timer_get_base_and_freq(timer, &iobase, &freq); nios2_clockevent_init()
229 irq = irq_of_parse_and_map(timer, 0); nios2_clockevent_init()
231 panic("Unable to parse timer irq\n"); nios2_clockevent_init()
233 nios2_ce.timer.base = iobase; nios2_clockevent_init()
234 nios2_ce.timer.freq = freq; nios2_clockevent_init()
239 nios2_timer_stop(&nios2_ce.timer); nios2_clockevent_init()
241 timer_writew(&nios2_ce.timer, 0, ALTERA_TIMER_STATUS_REG); nios2_clockevent_init()
243 if (request_irq(irq, timer_interrupt, IRQF_TIMER, timer->name, nios2_clockevent_init()
245 panic("Unable to setup timer irq\n"); nios2_clockevent_init()
250 static __init void nios2_clocksource_init(struct device_node *timer) nios2_clocksource_init() argument
256 nios2_timer_get_base_and_freq(timer, &iobase, &freq); nios2_clocksource_init()
258 nios2_cs.timer.base = iobase; nios2_clocksource_init()
259 nios2_cs.timer.freq = freq; nios2_clocksource_init()
263 timer_writew(&nios2_cs.timer, USHRT_MAX, ALTERA_TIMER_PERIODL_REG); nios2_clocksource_init()
264 timer_writew(&nios2_cs.timer, USHRT_MAX, ALTERA_TIMER_PERIODH_REG); nios2_clocksource_init()
268 timer_writew(&nios2_cs.timer, ctrl, ALTERA_TIMER_CONTROL_REG); nios2_clocksource_init()
275 * The first timer instance will use as a clockevent. If there are two or
279 static void __init nios2_time_init(struct device_node *timer) nios2_time_init() argument
285 nios2_clockevent_init(timer); nios2_time_init()
288 nios2_clocksource_init(timer); nios2_time_init()
308 CLOCKSOURCE_OF_DECLARE(nios2_timer, "altr,timer-1.0", nios2_time_init);
/linux-4.1.27/kernel/time/
H A Dhrtimer.c11 * kernel/timer.c, hrtimers provide finer resolution and accuracy
23 * based on kernel/timer.c
50 #include <linux/timer.h>
55 #include <trace/events/timer.h>
60 * The timer bases:
63 * into the timer bases by the hrtimer_base_type enum. When trying
141 * means that all timers which are tied to this base via timer->base are
147 * When the timer's base is locked, and the timer removed from list, it is
148 * possible to set timer->base = NULL and drop the lock: the timer remains
152 struct hrtimer_clock_base *lock_hrtimer_base(const struct hrtimer *timer, lock_hrtimer_base() argument
158 base = timer->base; lock_hrtimer_base()
161 if (likely(base == timer->base)) lock_hrtimer_base()
163 /* The timer has migrated to another CPU: */ lock_hrtimer_base()
171 * With HIGHRES=y we do not migrate the timer when it is expiring
178 hrtimer_check_target(struct hrtimer *timer, struct hrtimer_clock_base *new_base) hrtimer_check_target() argument
186 expires = ktime_sub(hrtimer_get_expires(timer), new_base->offset); hrtimer_check_target()
194 * Switch the timer base to the current CPU when possible.
197 switch_hrtimer_base(struct hrtimer *timer, struct hrtimer_clock_base *base, switch_hrtimer_base() argument
212 * We are trying to move timer to new_base. switch_hrtimer_base()
213 * However we can't change timer's base while it is running, switch_hrtimer_base()
216 * code will take care of this when the timer function has switch_hrtimer_base()
218 * the timer is enqueued. switch_hrtimer_base()
220 if (unlikely(hrtimer_callback_running(timer))) switch_hrtimer_base()
224 timer->base = NULL; switch_hrtimer_base()
228 if (cpu != this_cpu && hrtimer_check_target(timer, new_base)) { switch_hrtimer_base()
232 timer->base = base; switch_hrtimer_base()
235 timer->base = new_base; switch_hrtimer_base()
237 if (cpu != this_cpu && hrtimer_check_target(timer, new_base)) { switch_hrtimer_base()
248 lock_hrtimer_base(const struct hrtimer *timer, unsigned long *flags) lock_hrtimer_base() argument
250 struct hrtimer_clock_base *base = timer->base; lock_hrtimer_base()
324 struct hrtimer *timer = addr; hrtimer_fixup_init() local
328 hrtimer_cancel(timer); hrtimer_fixup_init()
329 debug_object_init(timer, &hrtimer_debug_descr); hrtimer_fixup_init()
363 struct hrtimer *timer = addr; hrtimer_fixup_free() local
367 hrtimer_cancel(timer); hrtimer_fixup_free()
368 debug_object_free(timer, &hrtimer_debug_descr); hrtimer_fixup_free()
383 static inline void debug_hrtimer_init(struct hrtimer *timer) debug_hrtimer_init() argument
385 debug_object_init(timer, &hrtimer_debug_descr); debug_hrtimer_init()
388 static inline void debug_hrtimer_activate(struct hrtimer *timer) debug_hrtimer_activate() argument
390 debug_object_activate(timer, &hrtimer_debug_descr); debug_hrtimer_activate()
393 static inline void debug_hrtimer_deactivate(struct hrtimer *timer) debug_hrtimer_deactivate() argument
395 debug_object_deactivate(timer, &hrtimer_debug_descr); debug_hrtimer_deactivate()
398 static inline void debug_hrtimer_free(struct hrtimer *timer) debug_hrtimer_free() argument
400 debug_object_free(timer, &hrtimer_debug_descr); debug_hrtimer_free()
403 static void __hrtimer_init(struct hrtimer *timer, clockid_t clock_id,
406 void hrtimer_init_on_stack(struct hrtimer *timer, clockid_t clock_id, hrtimer_init_on_stack() argument
409 debug_object_init_on_stack(timer, &hrtimer_debug_descr); hrtimer_init_on_stack()
410 __hrtimer_init(timer, clock_id, mode); hrtimer_init_on_stack()
414 void destroy_hrtimer_on_stack(struct hrtimer *timer) destroy_hrtimer_on_stack() argument
416 debug_object_free(timer, &hrtimer_debug_descr); destroy_hrtimer_on_stack()
420 static inline void debug_hrtimer_init(struct hrtimer *timer) { } debug_hrtimer_activate() argument
421 static inline void debug_hrtimer_activate(struct hrtimer *timer) { } debug_hrtimer_deactivate() argument
422 static inline void debug_hrtimer_deactivate(struct hrtimer *timer) { } debug_hrtimer_deactivate() argument
426 debug_init(struct hrtimer *timer, clockid_t clockid, debug_init() argument
429 debug_hrtimer_init(timer); debug_init()
430 trace_hrtimer_init(timer, clockid, mode); debug_init()
433 static inline void debug_activate(struct hrtimer *timer) debug_activate() argument
435 debug_hrtimer_activate(timer); debug_activate()
436 trace_hrtimer_start(timer); debug_activate()
439 static inline void debug_deactivate(struct hrtimer *timer) debug_deactivate() argument
441 debug_hrtimer_deactivate(timer); debug_deactivate()
442 trace_hrtimer_cancel(timer); debug_deactivate()
454 struct hrtimer *timer; __hrtimer_get_next_event() local
460 timer = container_of(next, struct hrtimer, node); __hrtimer_get_next_event()
461 expires = ktime_sub(hrtimer_get_expires(timer), base->offset); __hrtimer_get_next_event()
476 /* High resolution timer related functions */
480 * High resolution timer enabled ?
532 * If a hang was detected in the last timer interrupt then we hrtimer_force_reprogram()
555 * When a timer is enqueued and expires earlier than the already enqueued
556 * timers, we have to check, whether it expires earlier than the timer for
560 * and no expiry check happens. The timer gets enqueued into the rbtree. The
566 static int hrtimer_reprogram(struct hrtimer *timer, hrtimer_reprogram() argument
570 ktime_t expires = ktime_sub(hrtimer_get_expires(timer), base->offset); hrtimer_reprogram()
573 WARN_ON_ONCE(hrtimer_get_expires_tv64(timer) < 0); hrtimer_reprogram()
577 * device. The timer callback is either running on a different CPU or hrtimer_reprogram()
582 if (hrtimer_callback_running(timer)) hrtimer_reprogram()
586 * CLOCK_REALTIME timer might be requested with an absolute hrtimer_reprogram()
598 * When the target cpu of the timer is currently executing hrtimer_reprogram()
607 * If a hang was detected in the last timer interrupt then we hrtimer_reprogram()
608 * do not schedule a timer which is earlier than the expiry hrtimer_reprogram()
714 static inline int hrtimer_reprogram(struct hrtimer *timer, hrtimer_reprogram() argument
730 * We might have to reprogram the high resolution timer interrupt. On retrigger_next_event()
732 * resolution timer interrupts. On UP we just disable interrupts and retrigger_next_event()
745 * During resume we might have to reprogram the high resolution timer
761 static inline void timer_stats_hrtimer_set_start_info(struct hrtimer *timer) timer_stats_hrtimer_set_start_info() argument
764 if (timer->start_site) timer_stats_hrtimer_set_start_info()
766 timer->start_site = __builtin_return_address(0); timer_stats_hrtimer_set_start_info()
767 memcpy(timer->start_comm, current->comm, TASK_COMM_LEN); timer_stats_hrtimer_set_start_info()
768 timer->start_pid = current->pid; timer_stats_hrtimer_set_start_info()
772 static inline void timer_stats_hrtimer_clear_start_info(struct hrtimer *timer) timer_stats_hrtimer_clear_start_info() argument
775 timer->start_site = NULL; timer_stats_hrtimer_clear_start_info()
779 static inline void timer_stats_account_hrtimer(struct hrtimer *timer) timer_stats_account_hrtimer() argument
784 timer_stats_update_stats(timer, timer->start_pid, timer->start_site, timer_stats_account_hrtimer()
785 timer->function, timer->start_comm, 0); timer_stats_account_hrtimer()
793 void unlock_hrtimer_base(const struct hrtimer *timer, unsigned long *flags) unlock_hrtimer_base() argument
795 raw_spin_unlock_irqrestore(&timer->base->cpu_base->lock, *flags); unlock_hrtimer_base()
799 * hrtimer_forward - forward the timer expiry
800 * @timer: hrtimer to forward
804 * Forward the timer expiry so it will expire in the future.
807 u64 hrtimer_forward(struct hrtimer *timer, ktime_t now, ktime_t interval) hrtimer_forward() argument
812 delta = ktime_sub(now, hrtimer_get_expires(timer)); hrtimer_forward()
817 if (interval.tv64 < timer->base->resolution.tv64) hrtimer_forward()
818 interval.tv64 = timer->base->resolution.tv64; hrtimer_forward()
824 hrtimer_add_expires_ns(timer, incr * orun); hrtimer_forward()
825 if (hrtimer_get_expires_tv64(timer) > now.tv64) hrtimer_forward()
833 hrtimer_add_expires(timer, interval); hrtimer_forward()
840 * enqueue_hrtimer - internal function to (re)start a timer
842 * The timer is inserted in expiry order. Insertion into the
845 * Returns 1 when the new timer is the leftmost timer in the tree.
847 static int enqueue_hrtimer(struct hrtimer *timer, enqueue_hrtimer() argument
850 debug_activate(timer); enqueue_hrtimer()
852 timerqueue_add(&base->active, &timer->node); enqueue_hrtimer()
859 timer->state |= HRTIMER_STATE_ENQUEUED; enqueue_hrtimer()
861 return (&timer->node == base->active.next); enqueue_hrtimer()
865 * __remove_hrtimer - internal function to remove a timer
869 * High resolution timer mode reprograms the clock event device when the
870 * timer is the one which expires next. The caller can disable this by setting
872 * anyway (e.g. timer interrupt)
874 static void __remove_hrtimer(struct hrtimer *timer, __remove_hrtimer() argument
879 if (!(timer->state & HRTIMER_STATE_ENQUEUED)) __remove_hrtimer()
883 timerqueue_del(&base->active, &timer->node); __remove_hrtimer()
884 if (&timer->node == next_timer) { __remove_hrtimer()
890 expires = ktime_sub(hrtimer_get_expires(timer), __remove_hrtimer()
900 timer->state = newstate; __remove_hrtimer()
907 remove_hrtimer(struct hrtimer *timer, struct hrtimer_clock_base *base) remove_hrtimer() argument
909 if (hrtimer_is_queued(timer)) { remove_hrtimer()
914 * Remove the timer and force reprogramming when high remove_hrtimer()
915 * resolution mode is active and the timer is on the current remove_hrtimer()
916 * CPU. If we remove a timer on another CPU, reprogramming is remove_hrtimer()
921 debug_deactivate(timer); remove_hrtimer()
922 timer_stats_hrtimer_clear_start_info(timer); remove_hrtimer()
926 * otherwise we could move the timer base in remove_hrtimer()
929 state = timer->state & HRTIMER_STATE_CALLBACK; remove_hrtimer()
930 __remove_hrtimer(timer, base, state, reprogram); remove_hrtimer()
936 int __hrtimer_start_range_ns(struct hrtimer *timer, ktime_t tim, __hrtimer_start_range_ns() argument
944 base = lock_hrtimer_base(timer, &flags); __hrtimer_start_range_ns()
946 /* Remove an active timer from the queue: */ __hrtimer_start_range_ns()
947 ret = remove_hrtimer(timer, base); __hrtimer_start_range_ns()
955 * resolution when starting a relative timer, to avoid short __hrtimer_start_range_ns()
963 hrtimer_set_expires_range_ns(timer, tim, delta_ns); __hrtimer_start_range_ns()
965 /* Switch the timer base, if necessary: */ __hrtimer_start_range_ns()
966 new_base = switch_hrtimer_base(timer, base, mode & HRTIMER_MODE_PINNED); __hrtimer_start_range_ns()
968 timer_stats_hrtimer_set_start_info(timer); __hrtimer_start_range_ns()
970 leftmost = enqueue_hrtimer(timer, new_base); __hrtimer_start_range_ns()
973 unlock_hrtimer_base(timer, &flags); __hrtimer_start_range_ns()
977 if (!hrtimer_is_hres_active(timer)) { __hrtimer_start_range_ns()
979 * Kick to reschedule the next tick to handle the new timer __hrtimer_start_range_ns()
984 hrtimer_reprogram(timer, new_base)) { __hrtimer_start_range_ns()
987 * (it might still be on another CPU if the timer was pending) __hrtimer_start_range_ns()
1005 unlock_hrtimer_base(timer, &flags); __hrtimer_start_range_ns()
1013 * @timer: the timer to be added
1015 * @delta_ns: "slack" range for the timer
1021 * 1 when the timer was active
1023 int hrtimer_start_range_ns(struct hrtimer *timer, ktime_t tim, hrtimer_start_range_ns() argument
1026 return __hrtimer_start_range_ns(timer, tim, delta_ns, mode, 1); hrtimer_start_range_ns()
1032 * @timer: the timer to be added
1039 * 1 when the timer was active
1042 hrtimer_start(struct hrtimer *timer, ktime_t tim, const enum hrtimer_mode mode) hrtimer_start() argument
1044 return __hrtimer_start_range_ns(timer, tim, 0, mode, 1); hrtimer_start()
1050 * hrtimer_try_to_cancel - try to deactivate a timer
1051 * @timer: hrtimer to stop
1054 * 0 when the timer was not active
1055 * 1 when the timer was active
1056 * -1 when the timer is currently excuting the callback function and
1059 int hrtimer_try_to_cancel(struct hrtimer *timer) hrtimer_try_to_cancel() argument
1065 base = lock_hrtimer_base(timer, &flags); hrtimer_try_to_cancel()
1067 if (!hrtimer_callback_running(timer)) hrtimer_try_to_cancel()
1068 ret = remove_hrtimer(timer, base); hrtimer_try_to_cancel()
1070 unlock_hrtimer_base(timer, &flags); hrtimer_try_to_cancel()
1078 * hrtimer_cancel - cancel a timer and wait for the handler to finish.
1079 * @timer: the timer to be cancelled
1082 * 0 when the timer was not active
1083 * 1 when the timer was active
1085 int hrtimer_cancel(struct hrtimer *timer) hrtimer_cancel() argument
1088 int ret = hrtimer_try_to_cancel(timer); hrtimer_cancel()
1098 * hrtimer_get_remaining - get remaining time for the timer
1099 * @timer: the timer to read
1101 ktime_t hrtimer_get_remaining(const struct hrtimer *timer) hrtimer_get_remaining() argument
1106 lock_hrtimer_base(timer, &flags); hrtimer_get_remaining()
1107 rem = hrtimer_expires_remaining(timer); hrtimer_get_remaining()
1108 unlock_hrtimer_base(timer, &flags); hrtimer_get_remaining()
1118 * Returns the delta to the next expiry event or KTIME_MAX if no timer
1141 static void __hrtimer_init(struct hrtimer *timer, clockid_t clock_id, __hrtimer_init() argument
1147 memset(timer, 0, sizeof(struct hrtimer)); __hrtimer_init()
1155 timer->base = &cpu_base->clock_base[base]; __hrtimer_init()
1156 timerqueue_init(&timer->node); __hrtimer_init()
1159 timer->start_site = NULL; __hrtimer_init()
1160 timer->start_pid = -1; __hrtimer_init()
1161 memset(timer->start_comm, 0, TASK_COMM_LEN); __hrtimer_init()
1166 * hrtimer_init - initialize a timer to the given clock
1167 * @timer: the timer to be initialized
1169 * @mode: timer mode abs/rel
1171 void hrtimer_init(struct hrtimer *timer, clockid_t clock_id, hrtimer_init() argument
1174 debug_init(timer, clock_id, mode); hrtimer_init()
1175 __hrtimer_init(timer, clock_id, mode); hrtimer_init()
1180 * hrtimer_get_res - get the timer resolution for a clock
1199 static void __run_hrtimer(struct hrtimer *timer, ktime_t *now) __run_hrtimer() argument
1201 struct hrtimer_clock_base *base = timer->base; __run_hrtimer()
1208 debug_deactivate(timer); __run_hrtimer()
1209 __remove_hrtimer(timer, base, HRTIMER_STATE_CALLBACK, 0); __run_hrtimer()
1210 timer_stats_account_hrtimer(timer); __run_hrtimer()
1211 fn = timer->function; __run_hrtimer()
1216 * the timer base. __run_hrtimer()
1219 trace_hrtimer_expire_entry(timer, now); __run_hrtimer()
1220 restart = fn(timer); __run_hrtimer()
1221 trace_hrtimer_expire_exit(timer); __run_hrtimer()
1230 BUG_ON(timer->state != HRTIMER_STATE_CALLBACK); __run_hrtimer()
1231 enqueue_hrtimer(timer, base); __run_hrtimer()
1234 WARN_ON_ONCE(!(timer->state & HRTIMER_STATE_CALLBACK)); __run_hrtimer()
1236 timer->state &= ~HRTIMER_STATE_CALLBACK; __run_hrtimer()
1242 * High resolution timer interrupt
1261 * held to prevent that a timer is enqueued in our queue via hrtimer_interrupt()
1280 struct hrtimer *timer; hrtimer_interrupt() local
1282 timer = container_of(node, struct hrtimer, node); hrtimer_interrupt()
1293 * are right-of a not yet expired timer, because that hrtimer_interrupt()
1294 * timer will have to trigger a wakeup anyway. hrtimer_interrupt()
1296 if (basenow.tv64 < hrtimer_get_softexpires_tv64(timer)) hrtimer_interrupt()
1299 __run_hrtimer(timer, &basenow); hrtimer_interrupt()
1320 * The next timer was already expired due to: hrtimer_interrupt()
1381 * hrtimer_peek_ahead_timers will peek at the timer queue of
1384 * they are run immediately and then removed from the timer queue.
1408 * Called from timer softirq every jiffy, expire hrtimers: __hrtimer_peek_ahead_timers()
1410 * For HRT its the fall back code to run the softirq in the timer __hrtimer_peek_ahead_timers()
1422 * clocksource switch happens in the timer interrupt with hrtimer_run_pending()
1457 struct hrtimer *timer; hrtimer_run_queues() local
1459 timer = container_of(node, struct hrtimer, node); hrtimer_run_queues()
1461 hrtimer_get_expires_tv64(timer)) hrtimer_run_queues()
1464 __run_hrtimer(timer, &base->softirq_time); hrtimer_run_queues()
1473 static enum hrtimer_restart hrtimer_wakeup(struct hrtimer *timer) hrtimer_wakeup() argument
1476 container_of(timer, struct hrtimer_sleeper, timer); hrtimer_wakeup()
1488 sl->timer.function = hrtimer_wakeup; hrtimer_init_sleeper()
1499 hrtimer_start_expires(&t->timer, mode); do_nanosleep()
1500 if (!hrtimer_active(&t->timer)) do_nanosleep()
1506 hrtimer_cancel(&t->timer); do_nanosleep()
1516 static int update_rmtp(struct hrtimer *timer, struct timespec __user *rmtp) update_rmtp() argument
1521 rem = hrtimer_expires_remaining(timer); update_rmtp()
1538 hrtimer_init_on_stack(&t.timer, restart->nanosleep.clockid, hrtimer_nanosleep_restart()
1540 hrtimer_set_expires_tv64(&t.timer, restart->nanosleep.expires); hrtimer_nanosleep_restart()
1547 ret = update_rmtp(&t.timer, rmtp); hrtimer_nanosleep_restart()
1555 destroy_hrtimer_on_stack(&t.timer); hrtimer_nanosleep_restart()
1571 hrtimer_init_on_stack(&t.timer, clockid, mode); hrtimer_nanosleep()
1572 hrtimer_set_expires_range_ns(&t.timer, timespec_to_ktime(*rqtp), slack); hrtimer_nanosleep()
1583 ret = update_rmtp(&t.timer, rmtp); hrtimer_nanosleep()
1590 restart->nanosleep.clockid = t.timer.base->clockid; hrtimer_nanosleep()
1592 restart->nanosleep.expires = hrtimer_get_expires_tv64(&t.timer); hrtimer_nanosleep()
1596 destroy_hrtimer_on_stack(&t.timer); hrtimer_nanosleep()
1636 struct hrtimer *timer; migrate_hrtimer_list() local
1640 timer = container_of(node, struct hrtimer, node); migrate_hrtimer_list()
1641 BUG_ON(hrtimer_callback_running(timer)); migrate_hrtimer_list()
1642 debug_deactivate(timer); migrate_hrtimer_list()
1646 * timer could be seen as !active and just vanish away migrate_hrtimer_list()
1649 __remove_hrtimer(timer, old_base, HRTIMER_STATE_MIGRATE, 0); migrate_hrtimer_list()
1650 timer->base = new_base; migrate_hrtimer_list()
1653 * reprogram the event device in case the timer migrate_hrtimer_list()
1659 enqueue_hrtimer(timer, new_base); migrate_hrtimer_list()
1662 timer->state &= ~HRTIMER_STATE_MIGRATE; migrate_hrtimer_list()
1743 * @mode: timer mode, HRTIMER_MODE_ABS or HRTIMER_MODE_REL
1744 * @clock: timer clock, CLOCK_MONOTONIC or CLOCK_REALTIME
1769 hrtimer_init_on_stack(&t.timer, clock, mode); schedule_hrtimeout_range_clock()
1770 hrtimer_set_expires_range_ns(&t.timer, *expires, delta); schedule_hrtimeout_range_clock()
1774 hrtimer_start_expires(&t.timer, mode); schedule_hrtimeout_range_clock()
1775 if (!hrtimer_active(&t.timer)) schedule_hrtimeout_range_clock()
1781 hrtimer_cancel(&t.timer); schedule_hrtimeout_range_clock()
1782 destroy_hrtimer_on_stack(&t.timer); schedule_hrtimeout_range_clock()
1793 * @mode: timer mode, HRTIMER_MODE_ABS or HRTIMER_MODE_REL
1802 * but may decide to fire the timer earlier, but no earlier than @expires.
1815 * Returns 0 when the timer has expired otherwise -EINTR
1828 * @mode: timer mode, HRTIMER_MODE_ABS or HRTIMER_MODE_REL
1845 * Returns 0 when the timer has expired otherwise -EINTR
H A Dtimer.c2 * linux/kernel/timer.c
17 * 2000-10-05 Implemented scalable SMP per-CPU timer handling.
53 #include <trace/events/timer.h>
60 * per-CPU timer vector definitions:
124 timer_set_base(struct timer_list *timer, struct tvec_base *new_base) timer_set_base() argument
126 unsigned long flags = (unsigned long)timer->base & TIMER_FLAG_MASK; timer_set_base()
128 timer->base = (struct tvec_base *)((unsigned long)(new_base) | flags); timer_set_base()
151 * due to delays of the timer irq, long irq off times etc etc) then round_jiffies_common()
334 * set_timer_slack - set the allowed slack for a timer
335 * @timer: the timer to be modified
338 * Set the amount of time, in jiffies, that a certain timer has
339 * in terms of slack. By setting this value, the timer subsystem
340 * will schedule the actual timer somewhere between
346 void set_timer_slack(struct timer_list *timer, int slack_hz) set_timer_slack() argument
348 timer->slack = slack_hz; set_timer_slack()
367 __internal_add_timer(struct tvec_base *base, struct timer_list *timer) __internal_add_timer() argument
369 unsigned long expires = timer->expires; __internal_add_timer()
387 * Can happen if you add a timer with expires == jiffies, __internal_add_timer()
388 * or you set a timer to go off in the past __internal_add_timer()
407 list_add_tail(&timer->entry, vec); __internal_add_timer()
410 static void internal_add_timer(struct tvec_base *base, struct timer_list *timer) internal_add_timer() argument
413 __internal_add_timer(base, timer); internal_add_timer()
417 if (!tbase_get_deferrable(timer->base)) { internal_add_timer()
419 time_before(timer->expires, base->next_timer)) internal_add_timer()
420 base->next_timer = timer->expires; internal_add_timer()
426 * to be triggered to reevaluate the timer wheel. internal_add_timer()
428 * with the timer by holding the timer base lock. This also internal_add_timer()
430 * evaluate the timer wheel. internal_add_timer()
442 void __timer_stats_timer_set_start_info(struct timer_list *timer, void *addr) __timer_stats_timer_set_start_info() argument
444 if (timer->start_site) __timer_stats_timer_set_start_info()
447 timer->start_site = addr; __timer_stats_timer_set_start_info()
448 memcpy(timer->start_comm, current->comm, TASK_COMM_LEN); __timer_stats_timer_set_start_info()
449 timer->start_pid = current->pid; __timer_stats_timer_set_start_info()
452 static void timer_stats_account_timer(struct timer_list *timer) timer_stats_account_timer() argument
456 if (likely(!timer->start_site)) timer_stats_account_timer()
458 if (unlikely(tbase_get_deferrable(timer->base))) timer_stats_account_timer()
461 timer_stats_update_stats(timer, timer->start_pid, timer->start_site, timer_stats_account_timer()
462 timer->function, timer->start_comm, flag); timer_stats_account_timer()
466 static void timer_stats_account_timer(struct timer_list *timer) {} timer_stats_account_timer() argument
484 struct timer_list *timer = addr; timer_fixup_init() local
488 del_timer_sync(timer); timer_fixup_init()
489 debug_object_init(timer, &timer_debug_descr); timer_fixup_init()
496 /* Stub timer callback for improperly used timers. */ stub_timer()
509 struct timer_list *timer = addr; timer_fixup_activate() local
515 * This is not really a fixup. The timer was timer_fixup_activate()
519 if (timer->entry.next == NULL && timer_fixup_activate()
520 timer->entry.prev == TIMER_ENTRY_STATIC) { timer_fixup_activate()
521 debug_object_init(timer, &timer_debug_descr); timer_fixup_activate()
522 debug_object_activate(timer, &timer_debug_descr); timer_fixup_activate()
525 setup_timer(timer, stub_timer, 0); timer_fixup_activate()
544 struct timer_list *timer = addr; timer_fixup_free() local
548 del_timer_sync(timer); timer_fixup_free()
549 debug_object_free(timer, &timer_debug_descr); timer_fixup_free()
562 struct timer_list *timer = addr; timer_fixup_assert_init() local
566 if (timer->entry.prev == TIMER_ENTRY_STATIC) { timer_fixup_assert_init()
568 * This is not really a fixup. The timer was timer_fixup_assert_init()
572 debug_object_init(timer, &timer_debug_descr); timer_fixup_assert_init()
575 setup_timer(timer, stub_timer, 0); timer_fixup_assert_init()
592 static inline void debug_timer_init(struct timer_list *timer) debug_timer_init() argument
594 debug_object_init(timer, &timer_debug_descr); debug_timer_init()
597 static inline void debug_timer_activate(struct timer_list *timer) debug_timer_activate() argument
599 debug_object_activate(timer, &timer_debug_descr); debug_timer_activate()
602 static inline void debug_timer_deactivate(struct timer_list *timer) debug_timer_deactivate() argument
604 debug_object_deactivate(timer, &timer_debug_descr); debug_timer_deactivate()
607 static inline void debug_timer_free(struct timer_list *timer) debug_timer_free() argument
609 debug_object_free(timer, &timer_debug_descr); debug_timer_free()
612 static inline void debug_timer_assert_init(struct timer_list *timer) debug_timer_assert_init() argument
614 debug_object_assert_init(timer, &timer_debug_descr); debug_timer_assert_init()
617 static void do_init_timer(struct timer_list *timer, unsigned int flags,
620 void init_timer_on_stack_key(struct timer_list *timer, unsigned int flags, init_timer_on_stack_key() argument
623 debug_object_init_on_stack(timer, &timer_debug_descr); init_timer_on_stack_key()
624 do_init_timer(timer, flags, name, key); init_timer_on_stack_key()
628 void destroy_timer_on_stack(struct timer_list *timer) destroy_timer_on_stack() argument
630 debug_object_free(timer, &timer_debug_descr); destroy_timer_on_stack()
635 static inline void debug_timer_init(struct timer_list *timer) { } debug_timer_activate() argument
636 static inline void debug_timer_activate(struct timer_list *timer) { } debug_timer_deactivate() argument
637 static inline void debug_timer_deactivate(struct timer_list *timer) { } debug_timer_assert_init() argument
638 static inline void debug_timer_assert_init(struct timer_list *timer) { } debug_timer_assert_init() argument
641 static inline void debug_init(struct timer_list *timer) debug_init() argument
643 debug_timer_init(timer); debug_init()
644 trace_timer_init(timer); debug_init()
648 debug_activate(struct timer_list *timer, unsigned long expires) debug_activate() argument
650 debug_timer_activate(timer); debug_activate()
651 trace_timer_start(timer, expires); debug_activate()
654 static inline void debug_deactivate(struct timer_list *timer) debug_deactivate() argument
656 debug_timer_deactivate(timer); debug_deactivate()
657 trace_timer_cancel(timer); debug_deactivate()
660 static inline void debug_assert_init(struct timer_list *timer) debug_assert_init() argument
662 debug_timer_assert_init(timer); debug_assert_init()
665 static void do_init_timer(struct timer_list *timer, unsigned int flags, do_init_timer() argument
670 timer->entry.next = NULL; do_init_timer()
671 timer->base = (void *)((unsigned long)base | flags); do_init_timer()
672 timer->slack = -1; do_init_timer()
674 timer->start_site = NULL; do_init_timer()
675 timer->start_pid = -1; do_init_timer()
676 memset(timer->start_comm, 0, TASK_COMM_LEN); do_init_timer()
678 lockdep_init_map(&timer->lockdep_map, name, key, 0); do_init_timer()
682 * init_timer_key - initialize a timer
683 * @timer: the timer to be initialized
684 * @flags: timer flags
685 * @name: name of the timer
686 * @key: lockdep class key of the fake lock used for tracking timer
689 * init_timer_key() must be done to a timer prior calling *any* of the
690 * other timer functions.
692 void init_timer_key(struct timer_list *timer, unsigned int flags, init_timer_key() argument
695 debug_init(timer); init_timer_key()
696 do_init_timer(timer, flags, name, key); init_timer_key()
700 static inline void detach_timer(struct timer_list *timer, bool clear_pending) detach_timer() argument
702 struct list_head *entry = &timer->entry; detach_timer()
704 debug_deactivate(timer); detach_timer()
713 detach_expired_timer(struct timer_list *timer, struct tvec_base *base) detach_expired_timer() argument
715 detach_timer(timer, true); detach_expired_timer()
716 if (!tbase_get_deferrable(timer->base)) detach_expired_timer()
722 static int detach_if_pending(struct timer_list *timer, struct tvec_base *base, detach_if_pending() argument
725 if (!timer_pending(timer)) detach_if_pending()
728 detach_timer(timer, clear_pending); detach_if_pending()
729 if (!tbase_get_deferrable(timer->base)) { detach_if_pending()
731 if (timer->expires == base->next_timer) detach_if_pending()
741 * means that all timers which are tied to this base via timer->base are
747 * When the timer's base is locked, and the timer removed from list, it is
748 * possible to set timer->base = NULL and drop the lock: the timer remains
751 static struct tvec_base *lock_timer_base(struct timer_list *timer,
753 __acquires(timer->base->lock)
758 struct tvec_base *prelock_base = timer->base;
762 if (likely(prelock_base == timer->base))
764 /* The timer has migrated to another CPU */
772 __mod_timer(struct timer_list *timer, unsigned long expires, __mod_timer() argument
779 timer_stats_timer_set_start_info(timer); __mod_timer()
780 BUG_ON(!timer->function); __mod_timer()
782 base = lock_timer_base(timer, &flags); __mod_timer()
784 ret = detach_if_pending(timer, base, false); __mod_timer()
788 debug_activate(timer, expires); __mod_timer()
795 * We are trying to schedule the timer on the local CPU. __mod_timer()
796 * However we can't change timer's base while it is running, __mod_timer()
797 * otherwise del_timer_sync() can't detect that the timer's __mod_timer()
799 * the timer is serialized wrt itself. __mod_timer()
801 if (likely(base->running_timer != timer)) { __mod_timer()
803 timer_set_base(timer, NULL); __mod_timer()
807 timer_set_base(timer, base); __mod_timer()
811 timer->expires = expires; __mod_timer()
812 internal_add_timer(base, timer); __mod_timer()
821 * mod_timer_pending - modify a pending timer's timeout
822 * @timer: the pending timer to be modified
830 int mod_timer_pending(struct timer_list *timer, unsigned long expires) mod_timer_pending() argument
832 return __mod_timer(timer, expires, true, TIMER_NOT_PINNED); mod_timer_pending()
837 * Decide where to put the timer while taking the slack into account
847 unsigned long apply_slack(struct timer_list *timer, unsigned long expires) apply_slack() argument
852 if (timer->slack >= 0) { apply_slack()
853 expires_limit = expires + timer->slack; apply_slack()
876 * mod_timer - modify a timer's timeout
877 * @timer: the timer to be modified
881 * active timer (if the timer is inactive it will be activated)
883 * mod_timer(timer, expires) is equivalent to:
885 * del_timer(timer); timer->expires = expires; add_timer(timer);
888 * same timer, then mod_timer() is the only safe way to modify the timeout,
889 * since add_timer() cannot modify an already running timer.
891 * The function returns whether it has modified a pending timer or not.
892 * (ie. mod_timer() of an inactive timer returns 0, mod_timer() of an
893 * active timer returns 1.)
895 int mod_timer(struct timer_list *timer, unsigned long expires) mod_timer() argument
897 expires = apply_slack(timer, expires); mod_timer()
901 * networking code - if the timer is re-modified mod_timer()
904 if (timer_pending(timer) && timer->expires == expires) mod_timer()
907 return __mod_timer(timer, expires, false, TIMER_NOT_PINNED); mod_timer()
912 * mod_timer_pinned - modify a timer's timeout
913 * @timer: the timer to be modified
917 * active timer (if the timer is inactive it will be activated)
918 * and to ensure that the timer is scheduled on the current CPU.
920 * Note that this does not prevent the timer from being migrated
923 * example, cancelling the timer when the corresponding CPU goes
926 * mod_timer_pinned(timer, expires) is equivalent to:
928 * del_timer(timer); timer->expires = expires; add_timer(timer);
930 int mod_timer_pinned(struct timer_list *timer, unsigned long expires) mod_timer_pinned() argument
932 if (timer->expires == expires && timer_pending(timer)) mod_timer_pinned()
935 return __mod_timer(timer, expires, false, TIMER_PINNED); mod_timer_pinned()
940 * add_timer - start a timer
941 * @timer: the timer to be added
944 * timer interrupt at the ->expires point in the future. The
947 * The timer's ->expires, ->function (and if the handler uses it, ->data)
951 * timer tick.
953 void add_timer(struct timer_list *timer) add_timer() argument
955 BUG_ON(timer_pending(timer)); add_timer()
956 mod_timer(timer, timer->expires); add_timer()
961 * add_timer_on - start a timer on a particular CPU
962 * @timer: the timer to be added
967 void add_timer_on(struct timer_list *timer, int cpu) add_timer_on() argument
972 timer_stats_timer_set_start_info(timer); add_timer_on()
973 BUG_ON(timer_pending(timer) || !timer->function); add_timer_on()
975 timer_set_base(timer, base); add_timer_on()
976 debug_activate(timer, timer->expires); add_timer_on()
977 internal_add_timer(base, timer); add_timer_on()
983 * del_timer - deactive a timer.
984 * @timer: the timer to be deactivated
986 * del_timer() deactivates a timer - this works on both active and inactive
989 * The function returns whether it has deactivated a pending timer or not.
990 * (ie. del_timer() of an inactive timer returns 0, del_timer() of an
991 * active timer returns 1.)
993 int del_timer(struct timer_list *timer) del_timer() argument
999 debug_assert_init(timer); del_timer()
1001 timer_stats_timer_clear_start_info(timer); del_timer()
1002 if (timer_pending(timer)) { del_timer()
1003 base = lock_timer_base(timer, &flags); del_timer()
1004 ret = detach_if_pending(timer, base, true); del_timer()
1013 * try_to_del_timer_sync - Try to deactivate a timer
1014 * @timer: timer do del
1016 * This function tries to deactivate a timer. Upon successful (ret >= 0)
1017 * exit the timer is not queued and the handler is not running on any CPU.
1019 int try_to_del_timer_sync(struct timer_list *timer) try_to_del_timer_sync() argument
1025 debug_assert_init(timer); try_to_del_timer_sync()
1027 base = lock_timer_base(timer, &flags); try_to_del_timer_sync()
1029 if (base->running_timer != timer) { try_to_del_timer_sync()
1030 timer_stats_timer_clear_start_info(timer); try_to_del_timer_sync()
1031 ret = detach_if_pending(timer, base, true); try_to_del_timer_sync()
1043 * del_timer_sync - deactivate a timer and wait for the handler to finish.
1044 * @timer: the timer to be deactivated
1047 * the timer it also makes sure the handler has finished executing on other
1050 * Synchronization rules: Callers must prevent restarting of the timer,
1052 * interrupt contexts unless the timer is an irqsafe one. The caller must
1053 * not hold locks which would prevent completion of the timer's
1054 * handler. The timer's handler must not call add_timer_on(). Upon exit the
1055 * timer is not queued and the handler is not running on any CPU.
1059 * nothing to do with the timer in question. Here's why:
1076 * The function returns whether it has deactivated a pending timer or not.
1078 int del_timer_sync(struct timer_list *timer) del_timer_sync() argument
1088 lock_map_acquire(&timer->lockdep_map); del_timer_sync()
1089 lock_map_release(&timer->lockdep_map); del_timer_sync()
1096 WARN_ON(in_irq() && !tbase_get_irqsafe(timer->base)); del_timer_sync()
1098 int ret = try_to_del_timer_sync(timer); del_timer_sync()
1110 struct timer_list *timer, *tmp; cascade() local
1119 list_for_each_entry_safe(timer, tmp, &tv_list, entry) { cascade()
1120 BUG_ON(tbase_get_base(timer->base) != base); cascade()
1122 __internal_add_timer(base, timer); cascade()
1128 static void call_timer_fn(struct timer_list *timer, void (*fn)(unsigned long), call_timer_fn() argument
1135 * It is permissible to free the timer from inside the call_timer_fn()
1139 * timer->lockdep_map, make a copy and use that here. call_timer_fn()
1143 lockdep_copy_map(&lockdep_map, &timer->lockdep_map); call_timer_fn()
1152 trace_timer_expire_entry(timer); call_timer_fn()
1154 trace_timer_expire_exit(timer); call_timer_fn()
1159 WARN_ONCE(1, "timer: %pF preempt leak: %08x -> %08x\n", call_timer_fn()
1175 * @base: the timer vector to be processed.
1177 * This function cascades all vectors and executes all expired timer
1182 struct timer_list *timer; __run_timers() local
1209 timer = list_first_entry(head, struct timer_list,entry); __run_timers()
1210 fn = timer->function; __run_timers()
1211 data = timer->data; __run_timers()
1212 irqsafe = tbase_get_irqsafe(timer->base); __run_timers()
1214 timer_stats_account_timer(timer); __run_timers()
1216 base->running_timer = timer; __run_timers()
1217 detach_expired_timer(timer, base); __run_timers()
1221 call_timer_fn(timer, fn, data); __run_timers()
1225 call_timer_fn(timer, fn, data); __run_timers()
1236 * Find out when the next timer event is due to happen. This
1248 /* Look for timer events in tv1. */ __next_timer_interrupt()
1291 * Do we still search for the first timer or are __next_timer_interrupt()
1311 * Check, if the next hrtimer event is before the next timer wheel
1325 * Expired timer available, let it expire in the next tick cmp_next_hrtimer_event()
1344 * the timer softirq cmp_next_hrtimer_event()
1355 * get_next_timer_interrupt - return the jiffy of the next pending timer
1364 * Pretend that there is no timer pending if the cpu is offline. get_next_timer_interrupt()
1386 * Called from the timer interrupt handler to charge one tick to the current
1393 /* Note: this timer irq context must be accounted for as well. */ update_process_times()
1406 * This function runs timers and the timer-tq in bottom half context.
1419 * Called by the local, per-CPU timer interrupt on SMP.
1460 * in jiffies will be returned, or 0 if the timer expired in time
1473 struct timer_list timer; schedule_timeout() local
1507 setup_timer_on_stack(&timer, process_timeout, (unsigned long)current); schedule_timeout()
1508 __mod_timer(&timer, expire, false, TIMER_NOT_PINNED); schedule_timeout()
1510 del_singleshot_timer_sync(&timer); schedule_timeout()
1512 /* Remove the timer from the object tracker */ schedule_timeout()
1513 destroy_timer_on_stack(&timer); schedule_timeout()
1550 struct timer_list *timer; migrate_timer_list() local
1553 timer = list_first_entry(head, struct timer_list, entry); migrate_timer_list()
1555 detach_timer(timer, false); migrate_timer_list()
1556 timer_set_base(timer, new_base); migrate_timer_list()
1557 internal_add_timer(new_base, timer); migrate_timer_list()
1662 /* ensure there are enough low bits for flags in timer->base pointer */ init_timers()
H A Dposix-cpu-timers.c11 #include <trace/events/timer.h>
17 * Called after updating RLIMIT_CPU to run cpu timer and update
82 static void bump_cpu_timer(struct k_itimer *timer, bump_cpu_timer() argument
88 if (timer->it.cpu.incr == 0) bump_cpu_timer()
91 if (now < timer->it.cpu.expires) bump_cpu_timer()
94 incr = timer->it.cpu.incr; bump_cpu_timer()
95 delta = now + incr - timer->it.cpu.expires; bump_cpu_timer()
105 timer->it.cpu.expires += incr; bump_cpu_timer()
106 timer->it_overrun += 1 << i; bump_cpu_timer()
219 * The POSIX timer interface allows for absolute time expiry thread_group_cputimer()
221 * to synchronize the timer to the clock every time we start thread_group_cputimer()
315 * Validate the clockid_t for a new CPU-clock timer, and initialize the timer.
317 * new timer already all-zeros initialized.
360 * Clean up a CPU-clock timer that is about to be destroyed.
361 * This is called from timer deletion with the timer already locked.
362 * If we return TIMER_RETRY, it's necessary to release the timer's lock
363 * and try again. (This happens when the timer is in the middle of firing.)
365 static int posix_cpu_timer_del(struct k_itimer *timer) posix_cpu_timer_del() argument
370 struct task_struct *p = timer->it.cpu.task; posix_cpu_timer_del()
376 * thread timer list entry concurrent read/writes. posix_cpu_timer_del()
384 WARN_ON_ONCE(!list_empty(&timer->it.cpu.entry)); posix_cpu_timer_del()
386 if (timer->it.cpu.firing) posix_cpu_timer_del()
389 list_del(&timer->it.cpu.entry); posix_cpu_timer_del()
402 struct cpu_timer_list *timer, *next; cleanup_timers_list() local
404 list_for_each_entry_safe(timer, next, head, entry) cleanup_timers_list()
405 list_del_init(&timer->entry); cleanup_timers_list()
444 * Insert the timer on the appropriate list before any timers that
447 static void arm_timer(struct k_itimer *timer) arm_timer() argument
449 struct task_struct *p = timer->it.cpu.task; arm_timer()
452 struct cpu_timer_list *const nt = &timer->it.cpu; arm_timer()
455 if (CPUCLOCK_PERTHREAD(timer->it_clock)) { arm_timer()
462 head += CPUCLOCK_WHICH(timer->it_clock); arm_timer()
476 * We are the new earliest-expiring POSIX 1.b timer, hence
482 switch (CPUCLOCK_WHICH(timer->it_clock)) {
501 * The timer is locked, fire it and arrange for its reload.
503 static void cpu_timer_fire(struct k_itimer *timer) cpu_timer_fire() argument
505 if ((timer->it_sigev_notify & ~SIGEV_THREAD_ID) == SIGEV_NONE) { cpu_timer_fire()
509 timer->it.cpu.expires = 0; cpu_timer_fire()
510 } else if (unlikely(timer->sigq == NULL)) { cpu_timer_fire()
513 * not a normal timer from sys_timer_create. cpu_timer_fire()
515 wake_up_process(timer->it_process); cpu_timer_fire()
516 timer->it.cpu.expires = 0; cpu_timer_fire()
517 } else if (timer->it.cpu.incr == 0) { cpu_timer_fire()
519 * One-shot timer. Clear it as soon as it's fired. cpu_timer_fire()
521 posix_timer_event(timer, 0); cpu_timer_fire()
522 timer->it.cpu.expires = 0; cpu_timer_fire()
523 } else if (posix_timer_event(timer, ++timer->it_requeue_pending)) { cpu_timer_fire()
527 * reload the timer. But we need to keep it cpu_timer_fire()
530 posix_cpu_timer_schedule(timer); cpu_timer_fire()
535 * Sample a process (thread group) timer for the given group_leader task.
596 * This is called with the timer locked and interrupts disabled. posix_cpu_timer_kick_nohz()
597 * If we return TIMER_RETRY, it's necessary to release the timer's lock posix_cpu_timer_kick_nohz()
598 * and try again. (This happens when the timer is in the middle of firing.) posix_cpu_timer_kick_nohz()
600 static int posix_cpu_timer_set(struct k_itimer *timer, int timer_flags, posix_cpu_timer_set() argument
605 struct task_struct *p = timer->it.cpu.task; posix_cpu_timer_set()
611 new_expires = timespec_to_sample(timer->it_clock, &new->it_value); posix_cpu_timer_set()
627 * Disarm any old timer after extracting its expiry time. posix_cpu_timer_set()
632 old_incr = timer->it.cpu.incr; posix_cpu_timer_set()
633 old_expires = timer->it.cpu.expires; posix_cpu_timer_set()
634 if (unlikely(timer->it.cpu.firing)) { posix_cpu_timer_set()
635 timer->it.cpu.firing = -1; posix_cpu_timer_set()
638 list_del_init(&timer->it.cpu.entry); posix_cpu_timer_set()
644 * timer, we need a sample to balance the thread expiry posix_cpu_timer_set()
648 if (CPUCLOCK_PERTHREAD(timer->it_clock)) { posix_cpu_timer_set()
649 cpu_clock_sample(timer->it_clock, p, &val); posix_cpu_timer_set()
651 cpu_timer_sample_group(timer->it_clock, p, &val); posix_cpu_timer_set()
660 * Update the timer in case it has posix_cpu_timer_set()
663 * and with the next reloaded timer posix_cpu_timer_set()
669 bump_cpu_timer(timer, val); posix_cpu_timer_set()
670 if (val < timer->it.cpu.expires) { posix_cpu_timer_set()
671 old_expires = timer->it.cpu.expires - val; posix_cpu_timer_set()
672 sample_to_timespec(timer->it_clock, posix_cpu_timer_set()
684 * We are colliding with the timer actually firing. posix_cpu_timer_set()
685 * Punt after filling in the timer's old value, and posix_cpu_timer_set()
699 * For a timer with no notification action, we don't actually posix_cpu_timer_set()
700 * arm the timer (we'll just fake it for timer_gettime). posix_cpu_timer_set()
702 timer->it.cpu.expires = new_expires; posix_cpu_timer_set()
704 arm_timer(timer); posix_cpu_timer_set()
712 timer->it.cpu.incr = timespec_to_sample(timer->it_clock, posix_cpu_timer_set()
716 * This acts as a modification timestamp for the timer, posix_cpu_timer_set()
718 * that we have reset the timer manually. posix_cpu_timer_set()
720 timer->it_requeue_pending = (timer->it_requeue_pending + 2) & posix_cpu_timer_set()
722 timer->it_overrun_last = 0; posix_cpu_timer_set()
723 timer->it_overrun = -1; posix_cpu_timer_set()
731 cpu_timer_fire(timer); posix_cpu_timer_set()
737 sample_to_timespec(timer->it_clock, posix_cpu_timer_set()
745 static void posix_cpu_timer_get(struct k_itimer *timer, struct itimerspec *itp) posix_cpu_timer_get() argument
748 struct task_struct *p = timer->it.cpu.task; posix_cpu_timer_get()
755 sample_to_timespec(timer->it_clock, posix_cpu_timer_get()
756 timer->it.cpu.incr, &itp->it_interval); posix_cpu_timer_get()
758 if (timer->it.cpu.expires == 0) { /* Timer not armed at all. */ posix_cpu_timer_get()
766 if (CPUCLOCK_PERTHREAD(timer->it_clock)) { posix_cpu_timer_get()
767 cpu_clock_sample(timer->it_clock, p, &now); posix_cpu_timer_get()
774 * also make timer sampling safe if it ends up calling posix_cpu_timer_get()
782 * Call the timer disarmed, nothing else to do. posix_cpu_timer_get()
784 timer->it.cpu.expires = 0; posix_cpu_timer_get()
785 sample_to_timespec(timer->it_clock, timer->it.cpu.expires, posix_cpu_timer_get()
788 cpu_timer_sample_group(timer->it_clock, p, &now); posix_cpu_timer_get()
793 if (now < timer->it.cpu.expires) { posix_cpu_timer_get()
794 sample_to_timespec(timer->it_clock, posix_cpu_timer_get()
795 timer->it.cpu.expires - now, posix_cpu_timer_get()
799 * The timer should have expired already, but the firing posix_cpu_timer_get()
1000 * when the last timer signal was delivered and we have to reload the timer.
1002 void posix_cpu_timer_schedule(struct k_itimer *timer) posix_cpu_timer_schedule() argument
1006 struct task_struct *p = timer->it.cpu.task; posix_cpu_timer_schedule()
1012 * Fetch the current sample and update the timer's expiry time. posix_cpu_timer_schedule()
1014 if (CPUCLOCK_PERTHREAD(timer->it_clock)) { posix_cpu_timer_schedule()
1015 cpu_clock_sample(timer->it_clock, p, &now); posix_cpu_timer_schedule()
1016 bump_cpu_timer(timer, now); posix_cpu_timer_schedule()
1020 /* Protect timer list r/w in arm_timer() */ posix_cpu_timer_schedule()
1026 * Protect arm_timer() and timer sampling in case of call to posix_cpu_timer_schedule()
1035 timer->it.cpu.expires = 0; posix_cpu_timer_schedule()
1042 cpu_timer_sample_group(timer->it_clock, p, &now); posix_cpu_timer_schedule()
1043 bump_cpu_timer(timer, now); posix_cpu_timer_schedule()
1051 arm_timer(timer); posix_cpu_timer_schedule()
1054 /* Kick full dynticks CPUs in case they need to tick on the new timer */ posix_cpu_timer_schedule()
1057 timer->it_overrun_last = timer->it_overrun; posix_cpu_timer_schedule()
1058 timer->it_overrun = -1; posix_cpu_timer_schedule()
1059 ++timer->it_requeue_pending; posix_cpu_timer_schedule()
1093 * true if a timer has expired, else return false.
1129 * This is called from the timer interrupt handler. The irq handler has
1136 struct k_itimer *timer, *next; run_posix_cpu_timers() local
1164 * We must release these locks before taking any timer's lock. run_posix_cpu_timers()
1165 * There is a potential race with timer deletion here, as the run_posix_cpu_timers()
1167 * the firing flag in each timer, so that a deletion attempt run_posix_cpu_timers()
1168 * that gets the timer lock before we do will give it up and run_posix_cpu_timers()
1169 * spin until we've taken care of that timer below. run_posix_cpu_timers()
1176 * each timer's lock before clearing its firing flag, so no run_posix_cpu_timers()
1177 * timer call will interfere. run_posix_cpu_timers()
1179 list_for_each_entry_safe(timer, next, &firing, it.cpu.entry) { run_posix_cpu_timers()
1182 spin_lock(&timer->it_lock); run_posix_cpu_timers()
1183 list_del_init(&timer->it.cpu.entry); run_posix_cpu_timers()
1184 cpu_firing = timer->it.cpu.firing; run_posix_cpu_timers()
1185 timer->it.cpu.firing = 0; run_posix_cpu_timers()
1188 * of the timer, which already reported this run_posix_cpu_timers()
1192 cpu_timer_fire(timer); run_posix_cpu_timers()
1193 spin_unlock(&timer->it_lock); run_posix_cpu_timers()
1230 * Update expiration cache if we are the earliest timer, or eventually set_process_cpu_timer()
1231 * RLIMIT_CPU limit is earlier than prof_exp cpu timer expire. set_process_cpu_timer()
1250 struct k_itimer timer; do_cpu_nanosleep() local
1254 * Set up a temporary timer and then wait for it to go off. do_cpu_nanosleep()
1256 memset(&timer, 0, sizeof timer); do_cpu_nanosleep()
1257 spin_lock_init(&timer.it_lock); do_cpu_nanosleep()
1258 timer.it_clock = which_clock; do_cpu_nanosleep()
1259 timer.it_overrun = -1; do_cpu_nanosleep()
1260 error = posix_cpu_timer_create(&timer); do_cpu_nanosleep()
1261 timer.it_process = current; do_cpu_nanosleep()
1268 spin_lock_irq(&timer.it_lock); do_cpu_nanosleep()
1269 error = posix_cpu_timer_set(&timer, flags, it, NULL); do_cpu_nanosleep()
1271 spin_unlock_irq(&timer.it_lock); do_cpu_nanosleep()
1276 if (timer.it.cpu.expires == 0) { do_cpu_nanosleep()
1278 * Our timer fired and was reset, below do_cpu_nanosleep()
1281 posix_cpu_timer_del(&timer); do_cpu_nanosleep()
1282 spin_unlock_irq(&timer.it_lock); do_cpu_nanosleep()
1290 spin_unlock_irq(&timer.it_lock); do_cpu_nanosleep()
1292 spin_lock_irq(&timer.it_lock); do_cpu_nanosleep()
1298 sample_to_timespec(which_clock, timer.it.cpu.expires, rqtp); do_cpu_nanosleep()
1299 error = posix_cpu_timer_set(&timer, 0, &zero_it, it); do_cpu_nanosleep()
1304 posix_cpu_timer_del(&timer); do_cpu_nanosleep()
1306 spin_unlock_irq(&timer.it_lock); do_cpu_nanosleep()
1310 * We need to handle case when timer was or is in the do_cpu_nanosleep()
1314 spin_lock_irq(&timer.it_lock); do_cpu_nanosleep()
1315 error = posix_cpu_timer_del(&timer); do_cpu_nanosleep()
1316 spin_unlock_irq(&timer.it_lock); do_cpu_nanosleep()
1407 static int process_cpu_timer_create(struct k_itimer *timer) process_cpu_timer_create() argument
1409 timer->it_clock = PROCESS_CLOCK; process_cpu_timer_create()
1410 return posix_cpu_timer_create(timer); process_cpu_timer_create()
1432 static int thread_cpu_timer_create(struct k_itimer *timer) thread_cpu_timer_create() argument
1434 timer->it_clock = THREAD_CLOCK; thread_cpu_timer_create()
1435 return posix_cpu_timer_create(timer); thread_cpu_timer_create()
H A Dposix-timers.c10 * 2004-06-01 Fix CLOCK_REALTIME clock/timer TIMER_ABSTIME bug.
59 * This keeps timer ids unique per process, but now they can intersect between
90 * The timer ID is turned into a timer address by idr_find().
94 * b) checking that the timer id matches the one in the timer itself.
95 * c) that the timer owner is in the callers thread group.
103 * RESOLUTION: Clock resolution is used to round up timer and interval
114 * The standard POSIX timer management code assumes the
116 * the timer. 2.) The list, it_lock, it_clock, it_id and
117 * it_pid fields are not modified by timer code.
138 static int common_timer_del(struct k_itimer *timer);
159 struct k_itimer *timer; __posix_timers_find() local
161 hlist_for_each_entry_rcu(timer, head, t_hash) { hlist_for_each_entry_rcu()
162 if ((timer->it_signal == sig) && (timer->it_id == id)) hlist_for_each_entry_rcu()
163 return timer; hlist_for_each_entry_rcu()
176 static int posix_timer_add(struct k_itimer *timer) posix_timer_add() argument
187 hlist_add_head_rcu(&timer->t_hash, head); posix_timer_add()
353 struct hrtimer *timer = &timr->it.real.timer; schedule_next_timer() local
358 timr->it_overrun += (unsigned int) hrtimer_forward(timer, schedule_next_timer()
359 timer->base->get_time(), schedule_next_timer()
365 hrtimer_restart(timer); schedule_next_timer()
372 * restart the timer. It should only be called if the timer is to be
376 * To protect against the timer going away while the interrupt is queued,
410 * do_schedule_next_timer() locks the timer posix_timer_event()
423 /* If we failed to send the signal the timer stops. */ posix_timer_event()
429 * This function gets called when a POSIX.1b interval timer expires. It
430 * is used as a callback from the kernel internal timer. The
435 static enum hrtimer_restart posix_timer_fn(struct hrtimer *timer) posix_timer_fn() argument
442 timr = container_of(timer, struct k_itimer, it.real.timer); posix_timer_fn()
455 ktime_t now = hrtimer_cb_get_time(timer); posix_timer_fn()
459 * timer completely and restart it in case the posix_timer_fn()
469 * the timer right back on the softirq pending posix_timer_fn()
471 * hrtimer_forward() to expire the timer posix_timer_fn()
488 hrtimer_forward(timer, now, posix_timer_fn()
589 hrtimer_init(&new_timer->it.real.timer, new_timer->it_clock, 0); common_timer_create()
593 /* Create a POSIX.1b interval timer. */
669 * In the case of the timer belonging to another task, after SYSCALL_DEFINE3()
670 * the task is unlocked, the timer is owned by the other task SYSCALL_DEFINE3()
681 * we get the timer locked down so it is not deleted under us. The
683 * the find to the timer lock. To avoid a dead lock, the timer id MUST
684 * be release with out holding the timer lock.
713 * Get the time remaining on a POSIX.1b interval timer. This function
714 * is ALWAYS called with spin_lock_irq on the timer, thus it must not
718 * of a timer that has a requeue pending. These timers should appear to
719 * be in the timer list with an expiry as if we were to requeue them
722 * The second issue is the SIGEV_NONE timer which may be active but is
723 * not really ever put in the timer list (to save system resources).
724 * This timer may be expired, and if so, we will do it here. Otherwise
725 * it is the same as a requeue pending timer WRT to what we should
732 struct hrtimer *timer = &timr->it.real.timer; common_timer_get() local
738 /* interval timer ? */ common_timer_get()
741 else if (!hrtimer_active(timer) && common_timer_get()
745 now = timer->base->get_time(); common_timer_get()
749 * timer move the expiry time forward by intervals, so common_timer_get()
754 timr->it_overrun += (unsigned int) hrtimer_forward(timer, now, iv); common_timer_get()
756 remaining = ktime_sub(hrtimer_get_expires(timer), now); common_timer_get()
757 /* Return 0 only, when the timer is expired and not pending */ common_timer_get()
760 * A single shot SIGEV_NONE timer must return 0, when common_timer_get()
769 /* Get the time remaining on a POSIX.1b interval timer. */ SYSCALL_DEFINE2()
798 * Get the number of overruns of a POSIX.1b interval timer. This is to
799 * be the overrun of the timer last delivered. At the same time we are
800 * accumulating overruns on the next timer. The overrun is frozen when
822 /* Set a POSIX.1b interval timer. */
828 struct hrtimer *timer = &timr->it.real.timer; common_timer_set() local
834 /* disable the timer */ common_timer_set()
840 if (hrtimer_try_to_cancel(timer) < 0) common_timer_set()
847 /* switch off the timer when it_value is zero */ common_timer_set()
852 hrtimer_init(&timr->it.real.timer, timr->it_clock, mode); common_timer_set()
853 timr->it.real.timer.function = posix_timer_fn; common_timer_set()
855 hrtimer_set_expires(timer, timespec_to_ktime(new_setting->it_value)); common_timer_set()
864 hrtimer_add_expires(timer, timer->base->get_time()); common_timer_set()
869 hrtimer_start_expires(timer, mode); common_timer_set()
873 /* Set a POSIX.1b interval timer */ SYSCALL_DEFINE4()
918 static int common_timer_del(struct k_itimer *timer) common_timer_del() argument
920 timer->it.real.interval.tv64 = 0; common_timer_del()
922 if (hrtimer_try_to_cancel(&timer->it.real.timer) < 0) common_timer_del()
927 static inline int timer_delete_hook(struct k_itimer *timer) timer_delete_hook() argument
929 struct k_clock *kc = clockid_to_kclock(timer->it_clock); timer_delete_hook()
933 return kc->timer_del(timer); timer_delete_hook()
936 /* Delete a POSIX.1b interval timer. */ SYSCALL_DEFINE1()
939 struct k_itimer *timer; SYSCALL_DEFINE1() local
943 timer = lock_timer(timer_id, &flags); SYSCALL_DEFINE1()
944 if (!timer) SYSCALL_DEFINE1()
947 if (timer_delete_hook(timer) == TIMER_RETRY) { SYSCALL_DEFINE1()
948 unlock_timer(timer, flags); SYSCALL_DEFINE1()
953 list_del(&timer->list); SYSCALL_DEFINE1()
959 timer->it_signal = NULL; SYSCALL_DEFINE1()
961 unlock_timer(timer, flags); SYSCALL_DEFINE1()
962 release_posix_timer(timer, IT_ID_SET); SYSCALL_DEFINE1()
967 * return timer owned by the process, used by exit_itimers
969 static void itimer_delete(struct k_itimer *timer) itimer_delete() argument
974 spin_lock_irqsave(&timer->it_lock, flags); itimer_delete()
976 if (timer_delete_hook(timer) == TIMER_RETRY) { itimer_delete()
977 unlock_timer(timer, flags); itimer_delete()
980 list_del(&timer->list); itimer_delete()
985 timer->it_signal = NULL; itimer_delete()
987 unlock_timer(timer, flags); itimer_delete()
988 release_posix_timer(timer, IT_ID_SET); itimer_delete()
H A Ditimer.c15 #include <trace/events/timer.h>
20 * itimer_get_remtime - get remaining time for the timer
22 * @timer: the timer to read
25 * less than zero or 1usec for an pending expired timer
27 static struct timeval itimer_get_remtime(struct hrtimer *timer) itimer_get_remtime() argument
29 ktime_t rem = hrtimer_get_remaining(timer); itimer_get_remtime()
36 if (hrtimer_active(timer)) { itimer_get_remtime()
119 * The timer is automagically restarted, when interval != 0
121 enum hrtimer_restart it_real_fn(struct hrtimer *timer) it_real_fn() argument
124 container_of(timer, struct signal_struct, real_timer); it_real_fn()
193 struct hrtimer *timer; do_setitimer() local
207 timer = &tsk->signal->real_timer; do_setitimer()
209 ovalue->it_value = itimer_get_remtime(timer); do_setitimer()
214 if (hrtimer_try_to_cancel(timer) < 0) { do_setitimer()
222 hrtimer_start(timer, expires, HRTIMER_MODE_REL); do_setitimer()
247 * Returns the remaining time in seconds of a pending timer or 0 when
248 * the timer is not active.
H A Dtimer_stats.c4 * Collect timer usage statistics.
25 * We export the addresses and counting of timer functions being called,
49 * This is our basic unit of interest: a timer expiry event identified
50 * by the timer, its start/expire functions and the PID of the task that
51 * started the timer. We count the number of times an event happens:
62 void *timer; member in struct:entry
129 (((unsigned long)(entry)->timer ^ \
156 return entry1->timer == entry2->timer && match_entries()
224 * timer_stats_update_stats - Update the statistics for a timer.
225 * @timer: pointer to either a timer_list or a hrtimer
226 * @pid: the pid of the task which set up the timer
227 * @startf: pointer to the function which did the timer setup
228 * @timerf: pointer to the timer callback function of the timer
229 * @comm: name of the process which set up the timer
231 * When the timer is already registered, then the event counter is
232 * incremented. Otherwise the timer is registered in a free slot.
234 void timer_stats_update_stats(void *timer, pid_t pid, void *startf, timer_stats_update_stats() argument
250 input.timer = timer; timer_stats_update_stats()
H A Dalarmtimer.c4 * This interface provides a timer which is similarto hrtimers,
7 * This interface is influenced by the Android RTC Alarm timer
30 * struct alarm_base - Alarm timer bases
33 * @timer: hrtimer used to schedule events while running
51 /* rtc timer and device for setting alarm wakeups at suspend */
130 * alarmtimer_enqueue - Adds an alarm timer to an alarm_base timerqueue alarmtimer_rtc_timer_init()
131 * @base: pointer to the base where the timer is being run alarmtimer_rtc_timer_init()
148 * alarmtimer_dequeue - Removes an alarm timer from an alarm_base timerqueue
149 * @base: pointer to the base where the timer is running
168 * @timer: pointer to hrtimer being run
170 * When a alarm timer fires, this runs through the timerqueue to
173 * when the next future alarm timer expires.
175 static enum hrtimer_restart alarmtimer_fired(struct hrtimer *timer) alarmtimer_fired() argument
177 struct alarm *alarm = container_of(timer, struct alarm, timer); alarmtimer_fired()
192 hrtimer_set_expires(&alarm->timer, alarm->node.expires); alarmtimer_fired()
216 * to see which is the soonest timer to expire. We then
217 * set an rtc timer to fire that far into the future, which
239 /* Find the soonest timer to expire*/ alarmtimer_suspend()
262 /* Setup an rtc timer to fire that far in the future */ alarmtimer_suspend()
306 hrtimer_init(&alarm->timer, alarm_bases[type].base_clockid, alarm_init()
308 alarm->timer.function = alarmtimer_fired; alarm_init()
329 ret = hrtimer_start(&alarm->timer, alarm->node.expires, alarm_start()
356 hrtimer_set_expires(&alarm->timer, alarm->node.expires); alarm_restart()
357 hrtimer_restart(&alarm->timer); alarm_restart()
364 * alarm_try_to_cancel - Tries to cancel an alarm timer
367 * Returns 1 if the timer was canceled, 0 if it was not running,
377 ret = hrtimer_try_to_cancel(&alarm->timer); alarm_try_to_cancel()
387 * alarm_cancel - Spins trying to cancel an alarm timer until it is done
390 * Returns 1 if the timer was canceled, 0 if it was not active.
462 * Posix timer callback for expired alarm timers.
574 * Cancels any programmed alarms for the given timer.
590 * @flags: timer flags
594 * Sets the timer to new_setting, and starts the timer.
611 /* If the timer was already set, cancel it */ alarm_timer_set()
615 /* start the timer */ alarm_timer_set()
652 * Sets the alarm timer and sleeps until it is fired or interrupted.
675 * @type: timer type
816 * alarmtimer_init - Initialize alarm timer code
H A Dtick-broadcast-hrtimer.c27 * Note, we cannot cancel the timer here as we might bc_set_mode()
48 * which is about to enter idle has the earliest broadcast timer event.
54 * We try to cancel the timer first. If the callback is on bc_set_next()
56 * were able to cancel the timer nothing can rearm it as we bc_set_next()
61 * restart the timer because we are in the callback, but we bc_set_next()
H A Dtimer_list.c57 print_timer(struct seq_file *m, struct hrtimer *taddr, struct hrtimer *timer, print_timer() argument
66 print_name_offset(m, timer->function); print_timer()
67 SEQ_printf(m, ", S:%02lx", timer->state); print_timer()
70 print_name_offset(m, timer->start_site); print_timer()
71 memcpy(tmp, timer->start_comm, TASK_COMM_LEN); print_timer()
73 SEQ_printf(m, ", %s/%d", tmp, timer->start_pid); print_timer()
77 (unsigned long long)ktime_to_ns(hrtimer_get_softexpires(timer)), print_timer()
78 (unsigned long long)ktime_to_ns(hrtimer_get_expires(timer)), print_timer()
79 (long long)(ktime_to_ns(hrtimer_get_softexpires(timer)) - now), print_timer()
80 (long long)(ktime_to_ns(hrtimer_get_expires(timer)) - now)); print_timer()
87 struct hrtimer *timer, tmp; print_active_timers() local
108 timer = container_of(curr, struct hrtimer, node); print_active_timers()
109 tmp = *timer; print_active_timers()
112 print_timer(m, timer, &tmp, i, now); print_active_timers()
/linux-4.1.27/arch/arm/plat-omap/include/plat/
H A Ddmtimer.h47 /* timer interrupt enable bits */
61 /* timer capabilities used in hwmod database */
69 * timer errata flags
73 * timer counter register is never read. For more details please refer to
132 int omap_dm_timer_free(struct omap_dm_timer *timer);
133 void omap_dm_timer_enable(struct omap_dm_timer *timer);
134 void omap_dm_timer_disable(struct omap_dm_timer *timer);
136 int omap_dm_timer_get_irq(struct omap_dm_timer *timer);
139 struct clk *omap_dm_timer_get_fclk(struct omap_dm_timer *timer);
141 int omap_dm_timer_trigger(struct omap_dm_timer *timer);
142 int omap_dm_timer_start(struct omap_dm_timer *timer);
143 int omap_dm_timer_stop(struct omap_dm_timer *timer);
145 int omap_dm_timer_set_source(struct omap_dm_timer *timer, int source);
146 int omap_dm_timer_set_load(struct omap_dm_timer *timer, int autoreload, unsigned int value);
147 int omap_dm_timer_set_load_start(struct omap_dm_timer *timer, int autoreload, unsigned int value);
148 int omap_dm_timer_set_match(struct omap_dm_timer *timer, int enable, unsigned int match);
149 int omap_dm_timer_set_pwm(struct omap_dm_timer *timer, int def_on, int toggle, int trigger);
150 int omap_dm_timer_set_prescaler(struct omap_dm_timer *timer, int prescaler);
152 int omap_dm_timer_set_int_enable(struct omap_dm_timer *timer, unsigned int value);
153 int omap_dm_timer_set_int_disable(struct omap_dm_timer *timer, u32 mask);
155 unsigned int omap_dm_timer_read_status(struct omap_dm_timer *timer);
156 int omap_dm_timer_write_status(struct omap_dm_timer *timer, unsigned int value);
157 unsigned int omap_dm_timer_read_counter(struct omap_dm_timer *timer);
158 int omap_dm_timer_write_counter(struct omap_dm_timer *timer, unsigned int value);
169 * These registers are offsets from timer->iobase.
185 * These registers are offsets from timer->func_base. The func_base
205 #define OMAP_TIMER_CTRL_ST (1 << 0) /* start timer */
279 static inline u32 __omap_dm_timer_read(struct omap_dm_timer *timer, u32 reg, __omap_dm_timer_read() argument
283 while (readl_relaxed(timer->pend) & (reg >> WPSHIFT)) __omap_dm_timer_read()
286 return readl_relaxed(timer->func_base + (reg & 0xff)); __omap_dm_timer_read()
289 static inline void __omap_dm_timer_write(struct omap_dm_timer *timer, __omap_dm_timer_write() argument
293 while (readl_relaxed(timer->pend) & (reg >> WPSHIFT)) __omap_dm_timer_write()
296 writel_relaxed(val, timer->func_base + (reg & 0xff)); __omap_dm_timer_write()
299 static inline void __omap_dm_timer_init_regs(struct omap_dm_timer *timer) __omap_dm_timer_init_regs() argument
304 tidr = readl_relaxed(timer->io_base); __omap_dm_timer_init_regs()
306 timer->revision = 1; __omap_dm_timer_init_regs()
307 timer->irq_stat = timer->io_base + OMAP_TIMER_V1_STAT_OFFSET; __omap_dm_timer_init_regs()
308 timer->irq_ena = timer->io_base + OMAP_TIMER_V1_INT_EN_OFFSET; __omap_dm_timer_init_regs()
309 timer->irq_dis = timer->io_base + OMAP_TIMER_V1_INT_EN_OFFSET; __omap_dm_timer_init_regs()
310 timer->pend = timer->io_base + _OMAP_TIMER_WRITE_PEND_OFFSET; __omap_dm_timer_init_regs()
311 timer->func_base = timer->io_base; __omap_dm_timer_init_regs()
313 timer->revision = 2; __omap_dm_timer_init_regs()
314 timer->irq_stat = timer->io_base + OMAP_TIMER_V2_IRQSTATUS; __omap_dm_timer_init_regs()
315 timer->irq_ena = timer->io_base + OMAP_TIMER_V2_IRQENABLE_SET; __omap_dm_timer_init_regs()
316 timer->irq_dis = timer->io_base + OMAP_TIMER_V2_IRQENABLE_CLR; __omap_dm_timer_init_regs()
317 timer->pend = timer->io_base + __omap_dm_timer_init_regs()
320 timer->func_base = timer->io_base + OMAP_TIMER_V2_FUNC_OFFSET; __omap_dm_timer_init_regs()
326 * @timer: pointer to timer instance handle
328 * Enables the write posted mode for the timer. When posted mode is enabled
329 * writes to certain timer registers are immediately acknowledged by the
332 * timer registers.
334 static inline void __omap_dm_timer_enable_posted(struct omap_dm_timer *timer) __omap_dm_timer_enable_posted() argument
336 if (timer->posted) __omap_dm_timer_enable_posted()
339 if (timer->errata & OMAP_TIMER_ERRATA_I103_I767) { __omap_dm_timer_enable_posted()
340 timer->posted = OMAP_TIMER_NONPOSTED; __omap_dm_timer_enable_posted()
341 __omap_dm_timer_write(timer, OMAP_TIMER_IF_CTRL_REG, 0, 0); __omap_dm_timer_enable_posted()
345 __omap_dm_timer_write(timer, OMAP_TIMER_IF_CTRL_REG, __omap_dm_timer_enable_posted()
347 timer->context.tsicr = OMAP_TIMER_CTRL_POSTED; __omap_dm_timer_enable_posted()
348 timer->posted = OMAP_TIMER_POSTED; __omap_dm_timer_enable_posted()
352 * __omap_dm_timer_override_errata - override errata flags for a timer
353 * @timer: pointer to timer handle
356 * For a given timer, override a timer errata by clearing the flags
358 * overridden for a timer if the timer is used in such a way the erratum
361 static inline void __omap_dm_timer_override_errata(struct omap_dm_timer *timer, __omap_dm_timer_override_errata() argument
364 timer->errata &= ~errata; __omap_dm_timer_override_errata()
367 static inline void __omap_dm_timer_stop(struct omap_dm_timer *timer, __omap_dm_timer_stop() argument
372 l = __omap_dm_timer_read(timer, OMAP_TIMER_CTRL_REG, posted); __omap_dm_timer_stop()
375 __omap_dm_timer_write(timer, OMAP_TIMER_CTRL_REG, l, posted); __omap_dm_timer_stop()
378 __omap_dm_timer_read(timer, OMAP_TIMER_CTRL_REG, posted); __omap_dm_timer_stop()
381 * timer is stopped __omap_dm_timer_stop()
388 writel_relaxed(OMAP_TIMER_INT_OVERFLOW, timer->irq_stat); __omap_dm_timer_stop()
391 static inline void __omap_dm_timer_load_start(struct omap_dm_timer *timer, __omap_dm_timer_load_start() argument
395 __omap_dm_timer_write(timer, OMAP_TIMER_COUNTER_REG, load, posted); __omap_dm_timer_load_start()
396 __omap_dm_timer_write(timer, OMAP_TIMER_CTRL_REG, ctrl, posted); __omap_dm_timer_load_start()
399 static inline void __omap_dm_timer_int_enable(struct omap_dm_timer *timer, __omap_dm_timer_int_enable() argument
402 writel_relaxed(value, timer->irq_ena); __omap_dm_timer_int_enable()
403 __omap_dm_timer_write(timer, OMAP_TIMER_WAKEUP_EN_REG, value, 0); __omap_dm_timer_int_enable()
407 __omap_dm_timer_read_counter(struct omap_dm_timer *timer, int posted) __omap_dm_timer_read_counter() argument
409 return __omap_dm_timer_read(timer, OMAP_TIMER_COUNTER_REG, posted); __omap_dm_timer_read_counter()
412 static inline void __omap_dm_timer_write_status(struct omap_dm_timer *timer, __omap_dm_timer_write_status() argument
415 writel_relaxed(value, timer->irq_stat); __omap_dm_timer_write_status()
/linux-4.1.27/arch/powerpc/sysdev/
H A Dfsl_mpic_timer_wakeup.c2 * MPIC timer wakeup driver
23 struct mpic_timer *timer; member in struct:fsl_mpic_timer_wakeup
37 if (wakeup->timer) { fsl_free_resource()
38 disable_irq_wake(wakeup->timer->irq); fsl_free_resource()
39 mpic_free_timer(wakeup->timer); fsl_free_resource()
42 wakeup->timer = NULL; fsl_free_resource()
52 return wakeup->timer ? IRQ_HANDLED : IRQ_NONE; fsl_mpic_timer_irq()
63 if (fsl_wakeup->timer) { fsl_timer_wakeup_show()
64 mpic_get_remain_time(fsl_wakeup->timer, &interval); fsl_timer_wakeup_show()
86 if (fsl_wakeup->timer) { fsl_timer_wakeup_store()
87 disable_irq_wake(fsl_wakeup->timer->irq); fsl_timer_wakeup_store()
88 mpic_free_timer(fsl_wakeup->timer); fsl_timer_wakeup_store()
89 fsl_wakeup->timer = NULL; fsl_timer_wakeup_store()
97 fsl_wakeup->timer = mpic_request_timer(fsl_mpic_timer_irq, fsl_timer_wakeup_store()
99 if (!fsl_wakeup->timer) { fsl_timer_wakeup_store()
104 ret = enable_irq_wake(fsl_wakeup->timer->irq); fsl_timer_wakeup_store()
106 mpic_free_timer(fsl_wakeup->timer); fsl_timer_wakeup_store()
107 fsl_wakeup->timer = NULL; fsl_timer_wakeup_store()
113 mpic_start_timer(fsl_wakeup->timer); fsl_timer_wakeup_store()
146 if (fsl_wakeup->timer) { fsl_wakeup_sys_exit()
147 disable_irq_wake(fsl_wakeup->timer->irq); fsl_wakeup_sys_exit()
148 mpic_free_timer(fsl_wakeup->timer); fsl_wakeup_sys_exit()
159 MODULE_DESCRIPTION("Freescale MPIC global timer wakeup driver");
H A Dmpic_timer.c2 * MPIC timer driver
67 unsigned int timer_num; /* cascade control timer */
72 struct mpic_timer timer[TIMERS_PER_GROUP]; member in struct:timer_group_priv
82 /* cascade timer 0 and 1 */
84 /* cascade timer 1 and 2 */
86 /* cascade timer 2 and 3 */
142 /* detect whether there is a cascade timer available */ detect_idle_cascade_timer()
159 priv->timer[num].cascade_handle = casc_priv; detect_idle_cascade_timer()
161 /* set timer busy */ detect_idle_cascade_timer()
164 return &priv->timer[num]; detect_idle_cascade_timer()
182 casc_priv = priv->timer[num].cascade_handle; set_cascade_timer()
213 /* detect idle timer */ get_cascade_timer()
218 /* set ticks to timer */ get_cascade_timer()
229 struct mpic_timer *timer; get_timer() local
246 timer = get_cascade_timer(priv, ticks); get_timer()
247 if (!timer) get_timer()
250 return timer; get_timer()
254 /* one timer: Reverse allocation */ get_timer()
258 /* set timer busy */ get_timer()
260 /* set ticks & stop timer */ get_timer()
264 priv->timer[num].cascade_handle = NULL; get_timer()
266 return &priv->timer[num]; get_timer()
276 * mpic_start_timer - start hardware timer
277 * @handle: the timer to be started.
285 struct timer_group_priv, timer[handle->num]); mpic_start_timer()
292 * mpic_stop_timer - stop hardware timer
293 * @handle: the timer to be stoped
295 * The timer periodically generates an interrupt. Unless user stops the timer.
300 struct timer_group_priv, timer[handle->num]); mpic_stop_timer()
305 casc_priv = priv->timer[handle->num].cascade_handle; mpic_stop_timer()
316 * mpic_get_remain_time - get timer time
317 * @handle: the timer to be selected.
318 * @time: time for timer
320 * Query timer remaining time.
325 struct timer_group_priv, timer[handle->num]); mpic_get_remain_time()
331 casc_priv = priv->timer[handle->num].cascade_handle; mpic_get_remain_time()
348 * mpic_free_timer - free hardware timer
349 * @handle: the timer to be removed.
351 * Free the timer.
358 struct timer_group_priv, timer[handle->num]); mpic_free_timer()
365 casc_priv = priv->timer[handle->num].cascade_handle; mpic_free_timer()
367 free_irq(priv->timer[handle->num].irq, priv->timer[handle->num].dev); mpic_free_timer()
376 priv->timer[handle->num].cascade_handle = NULL; mpic_free_timer()
385 * mpic_request_timer - get a hardware timer
388 * @time: time for timer
414 IRQF_TRIGGER_LOW, "global-timer", dev); mpic_request_timer()
492 /* Set timer idle */ timer_group_get_irq()
494 priv->timer[offset + j].irq = irq; timer_group_get_irq()
495 priv->timer[offset + j].num = offset + j; timer_group_get_irq()
516 if (of_device_is_compatible(np, "fsl,mpic-global-timer")) timer_group_init()
521 pr_err("%s: cannot ioremap timer register address.\n", timer_group_init()
537 pr_err("%s: cannot get timer frequency.\n", np->full_name); timer_group_init()
543 pr_err("%s: cannot get timer irqs.\n", np->full_name); timer_group_init()
549 /* Init FSL timer hardware */ timer_group_init()
572 /* Init FSL timer hardware */ mpic_timer_resume()
579 { .compatible = "fsl,mpic-global-timer", },
H A Dfsl_gtm.c44 u8 gtcfr2; /* Timer 3, timer 4 global config register */
84 * gtm_get_timer - request GTM timer to use it with the rest of GTM API
87 * This function reserves GTM timer for later use. It returns gtm_timer
88 * structure to use with the rest of GTM API, you should use timer->irq
89 * to manage timer interrupt.
117 * gtm_get_specific_timer - request specific GTM timer
119 * @timer: specific timer number, Timer1 is 0.
122 * This function reserves GTM timer for later use. It returns gtm_timer
123 * structure to use with the rest of GTM API, you should use timer->irq
124 * to manage timer interrupt.
127 unsigned int timer) gtm_get_specific_timer16()
131 if (timer > 3) gtm_get_specific_timer16()
136 if (gtm->timers[timer].requested) gtm_get_specific_timer16()
139 ret = &gtm->timers[timer]; gtm_get_specific_timer16()
149 * gtm_put_timer16 - release 16 bits GTM timer
153 * This function releases GTM timer so others may request it.
167 * timer in reference mode.
235 * gtm_set_timer16 - (re)set 16 bit timer with arbitrary precision
237 * @usec: timer interval in microseconds
238 * @reload: if set, the timer will reset upon expiry rather than
242 * This function (re)sets the GTM timer so that it counts up to the requested
244 * function will reduce the precision of the timer as needed in order for the
267 * gtm_set_exact_utimer16 - (re)set 16 bits timer
269 * @usec: timer interval in microseconds
270 * @reload: if set, the timer will reset upon expiry rather than
274 * This function (re)sets GTM timer so that it counts up to the requested
276 * flag was set, timer will also reset itself upon reference value, otherwise
281 * (single timer width).
292 * run the timer as is. gtm_set_exact_timer16()
300 * gtm_stop_timer16 - stop single timer
304 * This function simply stops the GTM timer.
322 * gtm_ack_timer16 - acknowledge timer event (free-run timers only)
327 * Thus function used to acknowledge timer interrupt event, use it inside the
342 * so we have to provide shortcuts to write timer independent code. gtm_set_shortcuts()
126 gtm_get_specific_timer16(struct gtm *gtm, unsigned int timer) gtm_get_specific_timer16() argument
/linux-4.1.27/arch/sh/include/asm/
H A Dheartbeat.h4 #include <linux/timer.h>
12 struct timer_list timer; member in struct:heartbeat_data
H A Dpush-switch.h4 #include <linux/timer.h>
12 /* debounce timer */
/linux-4.1.27/include/trace/events/
H A Dtimer.h2 #define TRACE_SYSTEM timer
9 #include <linux/timer.h>
13 TP_PROTO(struct timer_list *timer),
15 TP_ARGS(timer),
18 __field( void *, timer )
22 __entry->timer = timer;
25 TP_printk("timer=%p", __entry->timer)
29 * timer_init - called when the timer is initialized
30 * @timer: pointer to struct timer_list
34 TP_PROTO(struct timer_list *timer),
36 TP_ARGS(timer)
40 * timer_start - called when the timer is started
41 * @timer: pointer to struct timer_list
46 TP_PROTO(struct timer_list *timer, unsigned long expires),
48 TP_ARGS(timer, expires),
51 __field( void *, timer )
58 __entry->timer = timer;
59 __entry->function = timer->function;
64 TP_printk("timer=%p function=%pf expires=%lu [timeout=%ld]",
65 __entry->timer, __entry->function, __entry->expires,
70 * timer_expire_entry - called immediately before the timer callback
71 * @timer: pointer to struct timer_list
73 * Allows to determine the timer latency.
77 TP_PROTO(struct timer_list *timer),
79 TP_ARGS(timer),
82 __field( void *, timer )
88 __entry->timer = timer;
90 __entry->function = timer->function;
93 TP_printk("timer=%p function=%pf now=%lu", __entry->timer, __entry->function,__entry->now)
97 * timer_expire_exit - called immediately after the timer callback returns
98 * @timer: pointer to struct timer_list
101 * determine the runtime of the timer callback function.
103 * NOTE: Do NOT derefernce timer in TP_fast_assign. The pointer might
108 TP_PROTO(struct timer_list *timer),
110 TP_ARGS(timer)
114 * timer_cancel - called when the timer is canceled
115 * @timer: pointer to struct timer_list
119 TP_PROTO(struct timer_list *timer),
121 TP_ARGS(timer)
194 * Allows to determine the timer latency.
262 * @which: name of the interval timer
300 * @which: type of the interval timer
301 * @pid: pid of the process which owns the timer
/linux-4.1.27/arch/c6x/platforms/
H A Dtimer64.c35 static struct timer_regs __iomem *timer; variable in typeref:struct:__iomem
69 ((soc_readl(&timer->emumgt) & (0xf << 16)) >> 16)
82 u32 tcr = soc_readl(&timer->tcr) & ~TCR_ENAMODELO_MASK; timer64_config()
84 soc_writel(tcr, &timer->tcr); timer64_config()
85 soc_writel(period - 1, &timer->prdlo); timer64_config()
86 soc_writel(0, &timer->cntlo); timer64_config()
88 soc_writel(tcr, &timer->tcr); timer64_config()
98 /* disable timer, reset count */ timer64_enable()
99 soc_writel(soc_readl(&timer->tcr) & ~TCR_ENAMODELO_MASK, &timer->tcr); timer64_enable()
100 soc_writel(0, &timer->prdlo); timer64_enable()
103 val = soc_readl(&timer->tcr); timer64_enable()
104 soc_writel(val & ~(TCR_CLKSRCLO | TCR_PWIDLO_MASK), &timer->tcr); timer64_enable()
107 val = soc_readl(&timer->tgcr) & ~TGCR_TIMMODE_MASK; timer64_enable()
108 soc_writel(val, &timer->tgcr); timer64_enable()
109 soc_writel(val | (TGCR_TIMLORS | TGCR_TIMMODE_UD32), &timer->tgcr); timer64_enable()
114 /* disable timer, reset count */ timer64_disable()
115 soc_writel(soc_readl(&timer->tcr) & ~TCR_ENAMODELO_MASK, &timer->tcr); timer64_disable()
116 soc_writel(0, &timer->prdlo); timer64_disable()
170 .name = "timer",
198 pr_debug("Cannot find ti,c64x+timer64 timer.\n"); timer64_init()
203 timer = of_iomap(np, 0); timer64_init()
204 if (!timer) { timer64_init()
205 pr_debug("%s: Cannot map timer registers.\n", np->full_name); timer64_init()
208 pr_debug("%s: Timer registers=%p.\n", np->full_name, timer); timer64_init()
213 iounmap(timer); timer64_init()
223 * It is necessary to enable the timer block here because timer64_init()
224 * the TIMER_DIVISOR macro needs to read a timer register timer64_init()
/linux-4.1.27/drivers/net/fddi/skfp/
H A Dsmttimer.c18 SMT timer
39 void smt_timer_stop(struct s_smc *smc, struct smt_timer *timer) smt_timer_stop() argument
45 * remove timer from queue smt_timer_stop()
47 timer->tm_active = FALSE ; smt_timer_stop()
48 if (smc->t.st_queue == timer && !timer->tm_next) { smt_timer_stop()
52 if (tm == timer) { smt_timer_stop()
62 void smt_timer_start(struct s_smc *smc, struct smt_timer *timer, u_long time, smt_timer_start() argument
72 smt_timer_stop(smc,timer) ; smt_timer_start()
73 timer->tm_smc = smc ; smt_timer_start()
74 timer->tm_token = token ; smt_timer_start()
75 timer->tm_active = TRUE ; smt_timer_start()
77 smc->t.st_queue = timer ; smt_timer_start()
78 timer->tm_next = NULL; smt_timer_start()
79 timer->tm_delta = time ; smt_timer_start()
84 * timer correction smt_timer_start()
99 *prev = timer ; smt_timer_start()
100 timer->tm_next = tm ; smt_timer_start()
101 timer->tm_delta = time - delta ; smt_timer_start()
103 tm->tm_delta -= timer->tm_delta ; smt_timer_start()
H A Dhwt.c18 * Timer Driver for FBI board (timer chip 82C54)
48 * Start hardware timer (clock ticks are 16us).
56 * time - The time in units of 16us to load the timer with.
81 outpd(ADDR(B2_TI_INI), (u_long) cnt * 200) ; /* Load timer value. */ hwt_start()
82 outpw(ADDR(B2_TI_CRTL), TIM_START) ; /* Start timer. */ hwt_start()
91 * Stop hardware timer.
113 * Initialize hardware timer.
136 * Clear timer interrupt.
155 * Stop hardware timer and read time elapsed since last start.
174 /* Check if timer expired (or wraparound). */ hwt_read()
190 * Stop hardware timer and read timer value and start the timer again.
196 * current timer value in units of 80ns.
224 * NOTE: The function will return immediately, if the timer is not
234 * check if timer is running hwt_wait_time()
/linux-4.1.27/arch/sparc/include/uapi/asm/
H A Dwatchdog.h24 #define WD_FREERUN 0x01 /* timer is running, interrupts disabled */
25 #define WD_EXPIRED 0x02 /* timer has expired */
26 #define WD_RUNNING 0x04 /* timer is running, interrupts enabled */
27 #define WD_STOPPED 0x08 /* timer has not been started */
28 #define WD_SERVICED 0x10 /* timer interrupt was serviced */
/linux-4.1.27/sound/pci/emu10k1/
H A Dtimer.c32 static int snd_emu10k1_timer_start(struct snd_timer *timer) snd_emu10k1_timer_start() argument
38 emu = snd_timer_chip(timer); snd_emu10k1_timer_start()
39 delay = timer->sticks - 1; snd_emu10k1_timer_start()
49 static int snd_emu10k1_timer_stop(struct snd_timer *timer) snd_emu10k1_timer_stop() argument
54 emu = snd_timer_chip(timer); snd_emu10k1_timer_stop()
61 static int snd_emu10k1_timer_precise_resolution(struct snd_timer *timer, snd_emu10k1_timer_precise_resolution() argument
80 struct snd_timer *timer = NULL; snd_emu10k1_timer() local
89 if ((err = snd_timer_new(emu->card, "EMU10K1", &tid, &timer)) >= 0) { snd_emu10k1_timer()
90 strcpy(timer->name, "EMU10K1 timer"); snd_emu10k1_timer()
91 timer->private_data = emu; snd_emu10k1_timer()
92 timer->hw = snd_emu10k1_timer_hw; snd_emu10k1_timer()
94 emu->timer = timer; snd_emu10k1_timer()
H A DMakefile8 emuproc.o emumixer.o emufx.o timer.o p16v.o
/linux-4.1.27/drivers/isdn/mISDN/
H A Dtimerdev.c3 * general timer device for using in ISDN stacks
23 #include <linux/timer.h>
75 struct mISDNtimer *timer, *next; mISDN_close() local
82 timer = list_first_entry(list, struct mISDNtimer, list); mISDN_close()
84 del_timer_sync(&timer->tl); mISDN_close()
87 list_del(&timer->list); mISDN_close()
88 kfree(timer); mISDN_close()
92 list_for_each_entry_safe(timer, next, &dev->expired, list) { mISDN_close()
93 kfree(timer); mISDN_close()
104 struct mISDNtimer *timer; mISDN_read() local
128 timer = list_first_entry(list, struct mISDNtimer, list); mISDN_read()
129 list_del(&timer->list); mISDN_read()
131 if (put_user(timer->id, (int __user *)buf)) mISDN_read()
135 kfree(timer); mISDN_read()
165 struct mISDNtimer *timer = (void *)data; dev_expire_timer() local
168 spin_lock_irqsave(&timer->dev->lock, flags); dev_expire_timer()
169 if (timer->id >= 0) dev_expire_timer()
170 list_move_tail(&timer->list, &timer->dev->expired); dev_expire_timer()
171 spin_unlock_irqrestore(&timer->dev->lock, flags); dev_expire_timer()
172 wake_up_interruptible(&timer->dev->wait); dev_expire_timer()
179 struct mISDNtimer *timer; misdn_add_timer() local
186 timer = kzalloc(sizeof(struct mISDNtimer), GFP_KERNEL); misdn_add_timer()
187 if (!timer) misdn_add_timer()
189 timer->dev = dev; misdn_add_timer()
190 setup_timer(&timer->tl, dev_expire_timer, (long)timer); misdn_add_timer()
192 id = timer->id = dev->next_id++; misdn_add_timer()
195 list_add_tail(&timer->list, &dev->pending); misdn_add_timer()
196 timer->tl.expires = jiffies + ((HZ * (u_long)timeout) / 1000); misdn_add_timer()
197 add_timer(&timer->tl); misdn_add_timer()
206 struct mISDNtimer *timer; misdn_del_timer() local
209 list_for_each_entry(timer, &dev->pending, list) { misdn_del_timer()
210 if (timer->id == id) { misdn_del_timer()
211 list_del_init(&timer->list); misdn_del_timer()
212 timer->id = -1; misdn_del_timer()
214 del_timer_sync(&timer->tl); misdn_del_timer()
215 kfree(timer); misdn_del_timer()
293 printk(KERN_WARNING "mISDN: Could not register timer device\n"); mISDN_inittimer()
/linux-4.1.27/arch/arm/plat-orion/
H A Dtime.c4 * Marvell Orion SoC timer handling.
10 * Timer 0 is used as free-running clocksource, while timer 1 is
15 #include <linux/timer.h>
54 * Number of timer ticks per jiffy.
84 * Clear and enable clockevent timer interrupt. orion_clkevt_next_event()
93 * Setup new clockevent timer value. orion_clkevt_next_event()
98 * Enable the timer. orion_clkevt_next_event()
118 * Setup timer to fire at 1/HZ intervals. orion_clkevt_mode()
124 * Enable timer interrupt. orion_clkevt_mode()
130 * Enable timer. orion_clkevt_mode()
137 * Disable timer. orion_clkevt_mode()
143 * Disable timer interrupt. orion_clkevt_mode()
149 * ACK pending timer interrupt. orion_clkevt_mode()
168 * ACK timer interrupt and call event handler. orion_timer_interrupt()
203 * Set scale and timer for sched_clock. orion_time_init()
208 * Setup free-running clocksource timer (interrupts orion_time_init()
221 * Setup clockevent timer (interrupt-driven). orion_time_init()
/linux-4.1.27/arch/arm/mach-omap1/
H A Dtime.c7 * Partial timer rewrite and additional dynamic tick timer support by
11 * MPU timer code based on the older MPU timer code for OMAP
74 omap_mpu_timer_regs_t __iomem *timer = omap_mpu_timer_base(nr); omap_mpu_timer_read() local
75 return readl(&timer->read_tim); omap_mpu_timer_read()
80 omap_mpu_timer_regs_t __iomem *timer = omap_mpu_timer_base(nr); omap_mpu_set_autoreset() local
82 writel(readl(&timer->cntl) | MPU_TIMER_AR, &timer->cntl); omap_mpu_set_autoreset()
87 omap_mpu_timer_regs_t __iomem *timer = omap_mpu_timer_base(nr); omap_mpu_remove_autoreset() local
89 writel(readl(&timer->cntl) & ~MPU_TIMER_AR, &timer->cntl); omap_mpu_remove_autoreset()
95 omap_mpu_timer_regs_t __iomem *timer = omap_mpu_timer_base(nr); omap_mpu_timer_start() local
101 writel(MPU_TIMER_CLOCK_ENABLE, &timer->cntl); omap_mpu_timer_start()
103 writel(load_val, &timer->load_tim); omap_mpu_timer_start()
105 writel(timerflags, &timer->cntl); omap_mpu_timer_start()
110 omap_mpu_timer_regs_t __iomem *timer = omap_mpu_timer_base(nr); omap_mpu_timer_stop() local
112 writel(readl(&timer->cntl) & ~MPU_TIMER_ST, &timer->cntl); omap_mpu_timer_stop()
117 * MPU timer 1 ... count down to zero, interrupt, reload
180 * MPU timer 2 ... free running 32-bit clock source and scheduler clock
191 omap_mpu_timer_regs_t __iomem *timer = omap_mpu_timer_base(1); omap_init_clocksource() local
198 if (clocksource_mmio_init(&timer->read_tim, "mpu_timer2", rate, omap_init_clocksource()
223 pr_err("Bogus timer, should not happen\n"); omap_mpu_timer_init()
H A Dtimer32k.c7 * Partial timer rewrite and additional dynamic tick timer support by
10 * OMAP Dual-mode timer framework support by Timo Teras
12 * MPU timer code based on the older MPU timer code for OMAP
61 * 32KHz OS timer
64 * 32KHz synchronous timer. The 32KHz synchronous timer is used to keep track
65 * of time in addition to the 32KHz OS timer. Using only the 32KHz OS timer
66 * on 1510 would be possible, but the timer would not be as accurate as
67 * with the 32KHz synchronized timer.
136 .name = "32k-timer",
153 .name = "32KHz timer",
/linux-4.1.27/arch/cris/arch-v32/lib/
H A Ddelay.c16 * On ETRAX FS, we can check the free-running read-only 100MHz timer
24 u32 t0 = REG_RD(timer, regi_timer0, r_time); cris_delay10ns()
25 while (REG_RD(timer, regi_timer0, r_time) - t0 < n10ns) cris_delay10ns()
/linux-4.1.27/arch/cris/include/arch-v10/arch/
H A Dtimex.h2 * Use prescale timer at 25000 Hz instead of the baudrate timer at
3 * 19200 to get rid of the 64ppm to fast timer (and we get better
13 #define CLOCK_TICK_RATE 25000 /* Underlying frequency of the HZ timer */
/linux-4.1.27/arch/cris/include/arch-v32/arch/hwregs/asm/
H A Dtimer_defs_asm.h6 * file: ../../inst/timer/rtl/timer_regs.r
10 * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/timer_defs_asm.h ../../inst/timer/rtl/timer_regs.r
56 /* Register rw_tmr0_div, scope timer, type rw */
59 /* Register r_tmr0_data, scope timer, type r */
62 /* Register rw_tmr0_ctrl, scope timer, type rw */
69 /* Register rw_tmr1_div, scope timer, type rw */
72 /* Register r_tmr1_data, scope timer, type r */
75 /* Register rw_tmr1_ctrl, scope timer, type rw */
82 /* Register rs_cnt_data, scope timer, type rs */
89 /* Register r_cnt_data, scope timer, type r */
96 /* Register rw_cnt_cfg, scope timer, type rw */
101 /* Register rw_trig, scope timer, type rw */
104 /* Register rw_trig_cfg, scope timer, type rw */
109 /* Register r_time, scope timer, type r */
112 /* Register rw_out, scope timer, type rw */
117 /* Register rw_wd_ctrl, scope timer, type rw */
127 /* Register r_wd_stat, scope timer, type r */
135 /* Register rw_intr_mask, scope timer, type rw */
150 /* Register rw_ack_intr, scope timer, type rw */
165 /* Register r_intr, scope timer, type r */
180 /* Register r_masked_intr, scope timer, type r */
195 /* Register rw_test, scope timer, type rw */
/linux-4.1.27/arch/cris/include/arch-v32/mach-a3/mach/hwregs/asm/
H A Dtimer_defs_asm.h6 * file: timer.r
8 * by ../../../tools/rdesc/bin/rdes2c -asm -outfile timer_defs_asm.h timer.r
53 /* Register rw_tmr0_div, scope timer, type rw */
56 /* Register r_tmr0_data, scope timer, type r */
59 /* Register rw_tmr0_ctrl, scope timer, type rw */
66 /* Register rw_tmr1_div, scope timer, type rw */
69 /* Register r_tmr1_data, scope timer, type r */
72 /* Register rw_tmr1_ctrl, scope timer, type rw */
79 /* Register rs_cnt_data, scope timer, type rs */
86 /* Register r_cnt_data, scope timer, type r */
93 /* Register rw_cnt_cfg, scope timer, type rw */
98 /* Register rw_trig, scope timer, type rw */
101 /* Register rw_trig_cfg, scope timer, type rw */
106 /* Register r_time, scope timer, type r */
109 /* Register rw_out, scope timer, type rw */
114 /* Register rw_wd_ctrl, scope timer, type rw */
124 /* Register r_wd_stat, scope timer, type r */
132 /* Register rw_intr_mask, scope timer, type rw */
147 /* Register rw_ack_intr, scope timer, type rw */
162 /* Register r_intr, scope timer, type r */
177 /* Register r_masked_intr, scope timer, type r */
192 /* Register rw_test, scope timer, type rw */
/linux-4.1.27/arch/cris/include/arch-v32/mach-fs/mach/hwregs/asm/
H A Dtimer_defs_asm.h6 * file: ../../inst/timer/rtl/timer_regs.r
10 * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/timer_defs_asm.h ../../inst/timer/rtl/timer_regs.r
56 /* Register rw_tmr0_div, scope timer, type rw */
59 /* Register r_tmr0_data, scope timer, type r */
62 /* Register rw_tmr0_ctrl, scope timer, type rw */
69 /* Register rw_tmr1_div, scope timer, type rw */
72 /* Register r_tmr1_data, scope timer, type r */
75 /* Register rw_tmr1_ctrl, scope timer, type rw */
82 /* Register rs_cnt_data, scope timer, type rs */
89 /* Register r_cnt_data, scope timer, type r */
96 /* Register rw_cnt_cfg, scope timer, type rw */
101 /* Register rw_trig, scope timer, type rw */
104 /* Register rw_trig_cfg, scope timer, type rw */
109 /* Register r_time, scope timer, type r */
112 /* Register rw_out, scope timer, type rw */
117 /* Register rw_wd_ctrl, scope timer, type rw */
127 /* Register r_wd_stat, scope timer, type r */
135 /* Register rw_intr_mask, scope timer, type rw */
150 /* Register rw_ack_intr, scope timer, type rw */
165 /* Register r_intr, scope timer, type r */
180 /* Register r_masked_intr, scope timer, type r */
195 /* Register rw_test, scope timer, type rw */
/linux-4.1.27/net/rose/
H A Drose_timer.c16 #include <linux/timer.h>
50 del_timer(&rose->timer); rose_start_t1timer()
52 rose->timer.data = (unsigned long)sk; rose_start_t1timer()
53 rose->timer.function = &rose_timer_expiry; rose_start_t1timer()
54 rose->timer.expires = jiffies + rose->t1; rose_start_t1timer()
56 add_timer(&rose->timer); rose_start_t1timer()
63 del_timer(&rose->timer); rose_start_t2timer()
65 rose->timer.data = (unsigned long)sk; rose_start_t2timer()
66 rose->timer.function = &rose_timer_expiry; rose_start_t2timer()
67 rose->timer.expires = jiffies + rose->t2; rose_start_t2timer()
69 add_timer(&rose->timer); rose_start_t2timer()
76 del_timer(&rose->timer); rose_start_t3timer()
78 rose->timer.data = (unsigned long)sk; rose_start_t3timer()
79 rose->timer.function = &rose_timer_expiry; rose_start_t3timer()
80 rose->timer.expires = jiffies + rose->t3; rose_start_t3timer()
82 add_timer(&rose->timer); rose_start_t3timer()
89 del_timer(&rose->timer); rose_start_hbtimer()
91 rose->timer.data = (unsigned long)sk; rose_start_hbtimer()
92 rose->timer.function = &rose_timer_expiry; rose_start_hbtimer()
93 rose->timer.expires = jiffies + rose->hb; rose_start_hbtimer()
95 add_timer(&rose->timer); rose_start_hbtimer()
120 del_timer(&rose_sk(sk)->timer); rose_stop_timer()
/linux-4.1.27/arch/xtensa/kernel/
H A Dtime.c83 struct ccount_timer *timer = ccount_timer_set_mode() local
87 * There is no way to disable the timer interrupt at the device level, ccount_timer_set_mode()
95 if (timer->irq_enabled) { ccount_timer_set_mode()
97 timer->irq_enabled = 0; ccount_timer_set_mode()
102 if (!timer->irq_enabled) { ccount_timer_set_mode()
104 timer->irq_enabled = 1; ccount_timer_set_mode()
115 .name = "timer",
120 struct ccount_timer *timer = &per_cpu(ccount_timer, cpu); local_timer_setup() local
121 struct clock_event_device *clockevent = &timer->evt; local_timer_setup()
123 timer->irq_enabled = 1; local_timer_setup()
124 clockevent->name = timer->name; local_timer_setup()
125 snprintf(timer->name, sizeof(timer->name), "ccount_clockevent_%u", cpu); local_timer_setup()
132 if (WARN(!clockevent->irq, "error: can't map timer irq")) local_timer_setup()
156 * The timer interrupt is called HZ times per second.
/linux-4.1.27/arch/x86/kernel/
H A Dapb_timer.c15 * The timer information, such as frequency and addresses, is provided to the
21 * - timer 0 - NR_CPUs for per cpu timer
22 * - one timer for clocksource
23 * - one timer for watchdog driver.
24 * It is also worth notice that APB timer does not support true one-shot mode,
26 * APB timer can also be used as broadcast timer along with per cpu local APIC
27 * timer, but by default APB timer has higher rating than local APIC timers.
57 * Common DW APB timer info
62 struct dw_apb_clock_event_device *timer; member in struct:apbt_dev
99 printk(KERN_WARNING "No timer base from SFI, use default\n"); apbt_set_mapping()
111 /* Now figure out the physical timer id for clocksource device */ apbt_set_mapping()
116 /* Now figure out the physical timer id */ apbt_set_mapping()
117 pr_debug("Use timer %d for clocksource\n", apbt_set_mapping()
128 panic("Failed to setup APB system timer\n"); apbt_set_mapping()
151 adev->timer = dw_apb_clockevent_init(smp_processor_id(), "apbt0", apbt_clockevent_register()
156 adev->timer->eoi = NULL; apbt_clockevent_register()
159 global_clock_event = &adev->timer->ced; apbt_clockevent_register()
164 dw_apb_clockevent_register(adev->timer); apbt_clockevent_register()
194 if (!adev->timer) { apbt_setup_secondary_clock()
195 adev->timer = dw_apb_clockevent_init(cpu, adev->name, apbt_setup_secondary_clock()
198 adev->timer->eoi = NULL; apbt_setup_secondary_clock()
200 dw_apb_clockevent_resume(adev->timer); apbt_setup_secondary_clock()
207 dw_apb_clockevent_register(adev->timer); apbt_setup_secondary_clock()
215 * per cpu timer irq registered so that we do need to do free_irq/request_irq.
230 dw_apb_clockevent_pause(adev->timer); apbt_cpuhp_notify()
235 dw_apb_clockevent_stop(adev->timer); apbt_cpuhp_notify()
265 /* Start the counter, use timer 2 as source, timer 0/1 for event */ apbt_clocksource_register()
293 * Early setup the APBT timer, only use timer 0 for booting then switch to
294 * per CPU timer if possible.
297 * panic if set up failed, this is the only platform timer on Moorestown.
332 /* kernel cmdline disable apb timer, so we will use lapic timers */ apbt_time_init()
334 printk(KERN_INFO "apbt: disabled per cpu timer\n"); apbt_time_init()
344 /* here we set up per CPU timer data structure */ apbt_time_init()
353 printk(KERN_ERR "Failed to get timer for cpu %d\n", i); apbt_time_init()
363 panic("failed to enable APB timer\n"); apbt_time_init()
378 /* check if the timer can count down, otherwise return */ apbt_quick_calibrate()
391 /* restart the timer to ensure it won't get to 0 in the calibration */ apbt_quick_calibrate()
413 printk(KERN_INFO "TSC freq calculated by APB timer is %lu khz\n", khz); apbt_quick_calibrate()
H A Dtime.c21 #include <asm/timer.h>
55 * Default timer interrupt handler for PIT/HPET
66 .name = "timer"
76 /* Default timer init function */ hpet_time_init()
91 * Initialize TSC and delay the periodic timer init to
/linux-4.1.27/drivers/misc/
H A Dcs5535-mfgpt.c47 int cs5535_mfgpt_toggle_event(struct cs5535_mfgpt_timer *timer, int cmp, cs5535_mfgpt_toggle_event() argument
53 if (!timer) { cs5535_mfgpt_toggle_event()
70 mask = 1 << (timer->nr + 24); cs5535_mfgpt_toggle_event()
75 mask = 1 << (timer->nr + shift); cs5535_mfgpt_toggle_event()
80 mask = 1 << (timer->nr + shift); cs5535_mfgpt_toggle_event()
99 int cs5535_mfgpt_set_irq(struct cs5535_mfgpt_timer *timer, int cmp, int *irq, cs5535_mfgpt_set_irq() argument
105 if (!timer) { cs5535_mfgpt_set_irq()
112 * is using the same CMP of the timer's Siamese twin, the IRQ is set to cs5535_mfgpt_set_irq()
119 shift = ((cmp == MFGPT_CMP1 ? 0 : 4) + timer->nr % 4) * 4; cs5535_mfgpt_set_irq()
137 if (cs5535_mfgpt_toggle_event(timer, cmp, MFGPT_EVENT_IRQ, enable)) cs5535_mfgpt_set_irq()
151 struct cs5535_mfgpt_timer *timer = NULL; cs5535_mfgpt_alloc_timer() local
174 /* try to find any available timer */ cs5535_mfgpt_alloc_timer()
179 /* check if the requested timer's available */ cs5535_mfgpt_alloc_timer()
185 /* if timer_nr is not -1, it's an available timer */ cs5535_mfgpt_alloc_timer()
192 timer = kmalloc(sizeof(*timer), GFP_KERNEL); cs5535_mfgpt_alloc_timer()
193 if (!timer) { cs5535_mfgpt_alloc_timer()
200 timer->chip = mfgpt; cs5535_mfgpt_alloc_timer()
201 timer->nr = timer_nr; cs5535_mfgpt_alloc_timer()
202 dev_info(&mfgpt->pdev->dev, "registered timer %d\n", timer_nr); cs5535_mfgpt_alloc_timer()
205 return timer; cs5535_mfgpt_alloc_timer()
210 * XXX: This frees the timer memory, but never resets the actual hardware
211 * timer. The old geode_mfgpt code did this; it would be good to figure
212 * out a way to actually release the hardware timer. See comments below.
214 void cs5535_mfgpt_free_timer(struct cs5535_mfgpt_timer *timer) cs5535_mfgpt_free_timer() argument
219 /* timer can be made available again only if never set up */ cs5535_mfgpt_free_timer()
220 val = cs5535_mfgpt_read(timer, MFGPT_REG_SETUP); cs5535_mfgpt_free_timer()
222 spin_lock_irqsave(&timer->chip->lock, flags); cs5535_mfgpt_free_timer()
223 __set_bit(timer->nr, timer->chip->avail); cs5535_mfgpt_free_timer()
224 spin_unlock_irqrestore(&timer->chip->lock, flags); cs5535_mfgpt_free_timer()
227 kfree(timer); cs5535_mfgpt_free_timer()
231 uint16_t cs5535_mfgpt_read(struct cs5535_mfgpt_timer *timer, uint16_t reg) cs5535_mfgpt_read() argument
233 return inw(timer->chip->base + reg + (timer->nr * 8)); cs5535_mfgpt_read()
237 void cs5535_mfgpt_write(struct cs5535_mfgpt_timer *timer, uint16_t reg, cs5535_mfgpt_write() argument
240 outw(value, timer->chip->base + reg + (timer->nr * 8)); cs5535_mfgpt_write()
292 struct cs5535_mfgpt_timer timer = { .chip = mfgpt }; scan_timers() local
307 timer.nr = i; scan_timers()
308 val = cs5535_mfgpt_read(&timer, MFGPT_REG_SETUP); scan_timers()
381 MODULE_DESCRIPTION("CS5535/CS5536 MFGPT timer driver");
/linux-4.1.27/drivers/s390/cio/
H A Deadm_sch.h6 #include <linux/timer.h>
15 struct timer_list timer; member in struct:eadm_private
/linux-4.1.27/net/sunrpc/
H A Dtimer.c2 * linux/net/sunrpc/timer.c
54 * @timer: timer array index (request type)
60 void rpc_update_rtt(struct rpc_rtt *rt, unsigned int timer, long m) rpc_update_rtt() argument
64 if (timer-- == 0) rpc_update_rtt()
74 srtt = (long *)&rt->srtt[timer]; rpc_update_rtt()
81 sdrtt = (long *)&rt->sdrtt[timer]; rpc_update_rtt()
94 * @timer: timer array index (request type)
101 * happen so infrequently that timer estimation would probably be
109 unsigned long rpc_calc_rto(struct rpc_rtt *rt, unsigned int timer) rpc_calc_rto() argument
113 if (timer-- == 0) rpc_calc_rto()
116 res = ((rt->srtt[timer] + 7) >> 3) + rt->sdrtt[timer]; rpc_calc_rto()
H A DMakefile14 addr.o rpcb_clnt.o timer.o xdr.o \
/linux-4.1.27/include/sound/
H A Dtimer.h29 #define snd_timer_chip(timer) ((timer)->private_data)
37 #define SNDRV_TIMER_HW_SLAVE 0x00000004 /* only slave timer (variable resolution) */
39 #define SNDRV_TIMER_HW_TASKLET 0x00000010 /* timer is called from tasklet */
46 #define SNDRV_TIMER_IFLG_CALLBACK 0x00000020 /* timer callback is active */
58 unsigned long resolution; /* average timer resolution for one tick in nsec */
61 unsigned long ticks; /* max timer ticks per interrupt */
63 int (*open) (struct snd_timer * timer);
64 int (*close) (struct snd_timer * timer);
65 unsigned long (*c_resolution) (struct snd_timer * timer);
66 int (*start) (struct snd_timer * timer);
67 int (*stop) (struct snd_timer * timer);
68 int (*set_period) (struct snd_timer * timer, unsigned long period_num, unsigned long period_den);
69 int (*precise_resolution) (struct snd_timer * timer, unsigned long *num, unsigned long *den);
84 void (*private_free) (struct snd_timer *timer);
96 struct snd_timer *timer; member in struct:snd_timer_instance
128 void snd_timer_notify(struct snd_timer *timer, int event, struct timespec *tstamp);
130 int snd_timer_global_free(struct snd_timer *timer);
131 int snd_timer_global_register(struct snd_timer *timer);
141 void snd_timer_interrupt(struct snd_timer *timer, unsigned long ticks_left);
/linux-4.1.27/drivers/char/
H A Dhangcheck-timer.c2 * hangcheck-timer.c
4 * Driver for a little io fencing timer.
26 * The hangcheck-timer driver uses the TSC to catch delays that
27 * jiffies does not notice. A timer is set. When the timer fires, it
29 * margin of error. The hangcheck_tick module parameter takes the timer
32 * timer and 180 seconds for the margin of error. IOW, a timer is set
33 * for 60 seconds. When the timer fires, the callback checks the
34 * actual duration that the timer waited. If the duration exceeds the
51 #include <linux/timer.h>
57 #define DEFAULT_IOFENCE_TICK 180 /* Default timer timeout, in seconds */
68 MODULE_PARM_DESC(hangcheck_margin, "If the hangcheck timer has been delayed more than hangcheck_margin seconds, the driver will fire.");
70 MODULE_PARM_DESC(hangcheck_reboot, "If nonzero, the machine will reboot when the timer margin is exceeded.");
72 MODULE_PARM_DESC(hangcheck_dump_tasks, "If nonzero, the machine will dump the system task state when the timer margin is exceeded.");
75 MODULE_DESCRIPTION("Hangcheck-timer detects when the system has gone out to lunch past a certain margin.");
168 printk("Hangcheck: starting hangcheck timer %s (tick is %d seconds, margin is %d seconds).\n", hangcheck_init()
184 printk("Hangcheck: Stopped hangcheck timer.\n"); hangcheck_exit()
H A Dmmtimer.c11 * multimedia timer. The code below is currently specific to the SGI Altix
17 * 10/13/04 - Christoph Lameter, Dimitri Sivanich - provide timer interrupt
18 * support via the posix timer interface
102 /* Setup timer on comparator RTC1 */ mmtimer_setup_int_0()
132 /* Setup timer on comparator RTC2 */ mmtimer_setup_int_1()
154 /* Setup timer on comparator RTC3 */ mmtimer_setup_int_2()
231 #define TIMER_SET 0 /* Comparator is set for this timer */
235 /* There is one of these for each timer */
238 struct k_itimer *timer; member in struct:mmtimer
262 int nodeid = n->timer->it.mmtimer.node; mmtimer_add_list()
263 unsigned long expires = n->timer->it.mmtimer.expires; mmtimer_add_list()
275 if (expires < x->timer->it.mmtimer.expires) mmtimer_add_list()
282 * Insert the timer to the rbtree and check whether it mmtimer_add_list()
283 * replaces the first pending timer mmtimer_add_list()
289 struct mmtimer, list)->timer->it.mmtimer.expires) mmtimer_add_list()
294 * Set the comparator for the next timer.
310 t = x->timer; mmtimer_set_next_timer()
312 /* Not an interval timer */ mmtimer_set_next_timer()
322 /* Interval timer */ mmtimer_set_next_timer()
340 printk(KERN_ALERT "mmtimer: cannot reschedule timer\n"); mmtimer_set_next_timer()
512 * mmtimer_interrupt - timer interrupt handler
540 if (base->timer) mmtimer_interrupt()
541 expires = base->timer->it.mmtimer.expires; mmtimer_interrupt()
568 t = x->timer; mmtimer_tasklet()
590 /* Set comparator for next timer, if there is one */ mmtimer_tasklet()
598 static int sgi_timer_create(struct k_itimer *timer) sgi_timer_create() argument
600 /* Insure that a newly created timer is off */ sgi_timer_create()
601 timer->it.mmtimer.clock = TIMER_OFF; sgi_timer_create()
605 /* This does not really delete a timer. It just insures
606 * that the timer is not active
627 if (t->timer == timr) sgi_timer_del()
630 if (expires < t->timer->it.mmtimer.expires) sgi_timer_del()
694 /* Clear timer */ sgi_timer_set()
710 /* Fire the timer immediately */ sgi_timer_set()
731 /* Lock the node timer structure */ sgi_timer_set()
734 base->timer = timr; sgi_timer_set()
744 /* Add the new struct mmtimer to node's timer list */ sgi_timer_set()
760 /* Unlock the node timer structure */ sgi_timer_set()
H A Dhpet.c205 struct hpet_timer __iomem *timer; hpet_timer_set_irq() local
213 timer = devp->hd_timer; hpet_timer_set_irq()
216 v = readl(&timer->hpet_config); hpet_timer_set_irq()
219 writel(v, &timer->hpet_config); hpet_timer_set_irq()
223 v = (readq(&timer->hpet_config) & Tn_INT_ROUTE_CAP_MASK) >> hpet_timer_set_irq()
251 v = readl(&timer->hpet_config); hpet_timer_set_irq()
253 writel(v, &timer->hpet_config); hpet_timer_set_irq()
421 struct hpet_timer __iomem *timer; hpet_release() local
425 timer = devp->hd_timer; hpet_release()
429 writeq((readq(&timer->hpet_config) & ~Tn_INT_ENB_CNF_MASK), hpet_release()
430 &timer->hpet_config); hpet_release()
438 && readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) { hpet_release()
441 v = readq(&timer->hpet_config); hpet_release()
443 writeq(v, &timer->hpet_config); hpet_release()
458 struct hpet_timer __iomem *timer; hpet_ioctl_ieon() local
465 timer = devp->hd_timer; hpet_ioctl_ieon()
481 if (readl(&timer->hpet_config) & Tn_INT_TYPE_CNF_MASK) hpet_ioctl_ieon()
493 * unwanted interrupt status bit, program the timer hpet_ioctl_ieon()
496 writel(readl(&timer->hpet_config) & ~Tn_TYPE_CNF_MASK, hpet_ioctl_ieon()
497 &timer->hpet_config); hpet_ioctl_ieon()
499 &timer->hpet_compare); hpet_ioctl_ieon()
523 v = readq(&timer->hpet_config); hpet_ioctl_ieon()
533 writeq(v, &timer->hpet_config); hpet_ioctl_ieon()
544 write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare); hpet_ioctl_ieon()
549 write_counter(t, &timer->hpet_compare); hpet_ioctl_ieon()
553 write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare); hpet_ioctl_ieon()
560 writeq(g, &timer->hpet_config); hpet_ioctl_ieon()
566 /* converts Hz to number of timer ticks */ hpet_time_div()
581 struct hpet_timer __iomem *timer; hpet_ioctl_common() local
593 timer = devp->hd_timer; hpet_ioctl_common()
609 v = readq(&timer->hpet_config); hpet_ioctl_common()
611 writeq(v, &timer->hpet_config); hpet_ioctl_common()
625 readq(&timer->hpet_config) & Tn_PER_INT_CAP_MASK; hpet_ioctl_common()
631 v = readq(&timer->hpet_config); hpet_ioctl_common()
639 v = readq(&timer->hpet_config); hpet_ioctl_common()
645 readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) { hpet_ioctl_common()
646 v = readq(&timer->hpet_config); hpet_ioctl_common()
648 writeq(v, &timer->hpet_config); hpet_ioctl_common()
778 * Adjustment for when arming the timer with
786 struct hpet_timer __iomem *timer = NULL; __hpet_calibrate() local
794 timer = devp->hd_timer; __hpet_calibrate()
798 if (!timer) __hpet_calibrate()
802 t = read_counter(&timer->hpet_compare); __hpet_calibrate()
813 write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare); __hpet_calibrate()
932 struct hpet_timer __iomem *timer; hpet_alloc() local
934 timer = &hpet->hpet_timers[devp - hpetp->hp_dev]; hpet_alloc()
938 devp->hd_timer = timer; hpet_alloc()
941 * If the timer was reserved by platform code, hpet_alloc()
942 * then make timer unavailable for opens. hpet_alloc()
/linux-4.1.27/arch/m68k/coldfire/
H A Dtimers.c4 * timers.c -- generic ColdFire hardware timer support.
28 * By default use timer1 as the system clock timer.
57 /* Timer1 is always used as system timer */ init_timer_irq()
63 /* Timer2 is to be used as a high speed profile timer */ init_timer_irq()
75 /* Reset the ColdFire timer */ mcftmr_tick()
85 .name = "timer",
123 * The coldfire timer runs from 0 to TRR included, then 0 hw_timer_init()
148 * By default use timer2 as the profiler clock timer.
153 * Choose a reasonably fast profile timer. Make it an odd value to
159 * Use the other timer to provide high accuracy profiling info.
173 .name = "profile timer",
180 printk(KERN_INFO "PROFILE: lodging TIMER2 @ %dHz as profile timer\n", coldfire_profile_init()
H A Dsltimers.c4 * sltimers.c -- generic ColdFire slice timer support.
8 * timers.c -- generic ColdFire hardware timer support.
33 * By default use Slice Timer 1 as the profiler clock timer.
38 * Choose a reasonably fast profile timer. Make it an odd value to
53 .name = "profile timer",
60 printk(KERN_INFO "PROFILE: lodging TIMER 1 @ %dHz as profile timer\n", mcfslt_profile_init()
77 * By default use Slice Timer 0 as the system clock timer.
95 .name = "timer",
130 * The coldfire slice timer (SLT) runs from STCNT to 0 included, hw_timer_init()
H A Dpit.c4 * pit.c -- Freescale ColdFire PIT timer. Currently this type of
5 * hardware timer only exists in the Freescale ColdFire
31 * By default use timer1 as the system clock timer.
40 * Initialize the PIT timer.
108 /* Reset the ColdFire timer */ pit_tick()
120 .name = "timer",
/linux-4.1.27/net/decnet/
H A Ddn_timer.c12 * Steve Whitehouse : Made keepalive timer part of the same
13 * timer idea.
22 #include <linux/timer.h>
31 * Slow timer is for everything else (n * 500mS)
62 * The persist timer is the standard slow timer used for retransmits dn_slow_timer()
65 * the function pointer in the socket. Setting the timer to a value dn_slow_timer()
67 * timer off in a permant way by returning non-zero, so that dn_slow_timer()
68 * timer based routines may remove sockets. This is why we have a dn_slow_timer()
69 * sock_hold()/sock_put() around the timer to prevent the socket dn_slow_timer()
84 * Check for keepalive timeout. After the other timer 'cos if dn_slow_timer()
85 * the previous timer caused a retransmit, we don't need to dn_slow_timer()
/linux-4.1.27/arch/arm/mach-omap2/
H A Dtimer.c2 * linux/arch/arm/mach-omap2/timer.c
4 * OMAP2 GP timer support.
16 * OMAP Dual-mode timer framework support by Timo Teras
22 * Roughly modelled after the OMAP1 MPU timer code.
146 { .compatible = "ti,omap2420-timer", },
147 { .compatible = "ti,omap3430-timer", },
148 { .compatible = "ti,omap4430-timer", },
149 { .compatible = "ti,omap5430-timer", },
150 { .compatible = "ti,dm814-timer", },
151 { .compatible = "ti,dm816-timer", },
152 { .compatible = "ti,am335x-timer", },
153 { .compatible = "ti,am335x-timer-1ms", },
158 * omap_get_timer_dt - get a timer using device-tree
160 * @property - optional timer property to match
162 * Helper function to get a timer during early boot using device-tree for use
163 * as kernel system timer. Optionally, the property argument can be used to
164 * select a timer with a specific property. Once a timer is found then mark
165 * the timer node in device-tree as disabled, to prevent the kernel from
166 * registering this timer as a platform device and so no one else can use it.
180 if (!property && (of_get_property(np, "ti,timer-alwon", NULL) || for_each_matching_node()
181 of_get_property(np, "ti,timer-dsp", NULL) || for_each_matching_node()
182 of_get_property(np, "ti,timer-pwm", NULL) || for_each_matching_node()
183 of_get_property(np, "ti,timer-secure", NULL))) for_each_matching_node()
196 * For secure OMAP3 devices, timers with device type "timer-secure" cannot
208 /* If we are a secure device, remove any secure timer nodes */ omap_dmtimer_init()
210 np = omap_get_timer_dt(omap_timer_match, "ti,timer-secure"); omap_dmtimer_init()
217 * omap_dm_timer_get_errata - get errata flags for a timer
219 * Get the timer errata flags that are specific to the OMAP device being used.
229 static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer, omap_dm_timer_init_one() argument
252 timer->irq = irq_of_parse_and_map(np, 0); omap_dm_timer_init_one()
253 if (!timer->irq) omap_dm_timer_init_one()
256 timer->io_base = of_iomap(np, 0); omap_dm_timer_init_one()
260 if (omap_dm_timer_reserve_systimer(timer->id)) omap_dm_timer_init_one()
263 sprintf(name, "timer%d", timer->id); omap_dm_timer_init_one()
278 timer->irq = irq.start; omap_dm_timer_init_one()
286 timer->io_base = ioremap(mem.start, mem.end - mem.start); omap_dm_timer_init_one()
289 if (!timer->io_base) omap_dm_timer_init_one()
293 timer->fclk = clk_get(NULL, omap_hwmod_get_main_clk(oh)); omap_dm_timer_init_one()
294 if (IS_ERR(timer->fclk)) omap_dm_timer_init_one()
295 return PTR_ERR(timer->fclk); omap_dm_timer_init_one()
301 r = clk_set_parent(timer->fclk, src); omap_dm_timer_init_one()
312 __omap_dm_timer_init_regs(timer); omap_dm_timer_init_one()
315 __omap_dm_timer_enable_posted(timer); omap_dm_timer_init_one()
318 if (posted != timer->posted) omap_dm_timer_init_one()
321 timer->rate = clk_get_rate(timer->fclk); omap_dm_timer_init_one()
322 timer->reserved = 1; omap_dm_timer_init_one()
337 * For clock-event timers we never read the timer counter and omap2_gp_clockevent_init()
488 * by the CPU local timer peripherals in the MPU cluster. The timer counts
627 OMAP_SYS_32K_TIMER_INIT(2, 1, "timer_32k_ck", "ti,timer-alwon",
632 OMAP_SYS_32K_TIMER_INIT(3, 1, "timer_32k_ck", "ti,timer-alwon",
634 OMAP_SYS_32K_TIMER_INIT(3_secure, 12, "secure_32k_fck", "ti,timer-secure",
641 1, "timer_sys_ck", "ti,timer-alwon");
646 static OMAP_SYS_32K_TIMER_INIT(4, 1, "timer_32k_ck", "ti,timer-alwon",
689 * omap_timer_init - build and register timer device with an
690 * associated timer hwmod
691 * @oh: timer hwmod pointer to be used to build timer device
694 * Called by omap_hwmod_for_each_by_class to register each of the timer
695 * devices present in the system. The number of timer devices is known
697 * end of function call memory is allocated for timer device and it is
711 /* on secure device, do not register secure timer */ omap_timer_init()
726 * timer devices. In a way, we are avoiding usage of omap_timer_init()
733 sscanf(oh->name, "timer%2d", &id); omap_timer_init()
758 * given class name and then build and register the timer device.
768 ret = omap_hwmod_for_each_by_class("timer", omap_timer_init, NULL); omap2_dm_timer_init()
/linux-4.1.27/drivers/isdn/sc/
H A DMakefile10 ioctl.o interrupt.o message.o timer.o
/linux-4.1.27/arch/sparc/include/asm/
H A Dtimex_64.h9 #include <asm/timer.h>
H A Dtimer_64.h0 /* timer.h: System timer definitions for sun5.
H A Dtimer_32.h2 * timer.h: Definitions for the timer chips on the Sparc.
23 /* The counter timer register has the value offset by 9 bits.
/linux-4.1.27/arch/um/include/shared/skas/
H A Dstub-data.h14 struct itimerval timer; member in struct:stub_data
/linux-4.1.27/include/uapi/linux/
H A Dtime.h28 * defining a timer setting:
35 struct timespec it_interval; /* timer period */
36 struct timespec it_value; /* timer expiration */
40 struct timeval it_interval; /* timer interval */
H A Dhpet.h23 #define MAX_HPET_TBS 8 /* maximum hpet timer blocks */
/linux-4.1.27/include/asm-generic/
H A Dparam.h7 # define HZ CONFIG_HZ /* Internal kernel timer frequency */
/linux-4.1.27/drivers/staging/android/
H A Dtimed_gpio.c31 struct hrtimer timer; member in struct:timed_gpio_data
38 static enum hrtimer_restart gpio_timer_func(struct hrtimer *timer) gpio_timer_func() argument
41 container_of(timer, struct timed_gpio_data, timer); gpio_timer_func()
54 if (!hrtimer_active(&data->timer)) gpio_get_time()
57 t = hrtimer_get_remaining(&data->timer); gpio_get_time()
70 /* cancel previous timer and set GPIO according to value */ gpio_enable()
71 hrtimer_cancel(&data->timer); gpio_enable()
78 hrtimer_start(&data->timer, gpio_enable()
106 hrtimer_init(&gpio_dat->timer, CLOCK_MONOTONIC, timed_gpio_probe()
108 gpio_dat->timer.function = gpio_timer_func; timed_gpio_probe()
H A Dtimed_output.h22 /* enable the output and set the timer */
25 /* returns the current number of milliseconds remaining on the timer */
/linux-4.1.27/lib/
H A Dtimerqueue.c31 * timerqueue_add - Adds timer to timerqueue.
34 * @node: timer node to be added
36 * Adds the timer node to the timerqueue, sorted by the
65 * timerqueue_del - Removes a timer from the timerqueue.
68 * @node: timer node to be removed
70 * Removes the timer node from the timerqueue.
89 * timerqueue_iterate_next - Returns the timer after the provided timer
91 * @node: Pointer to a timer.
93 * Provides the timer that is after the given node. This is used, when
94 * necessary, to iterate through the list of timers in a timer list
/linux-4.1.27/tools/lib/traceevent/
H A Dplugin_hrtimer.c33 if (pevent_print_num_field(s, "0x%llx", event, "timer", timer_expire_handler()
53 if (pevent_print_num_field(s, "0x%llx", event, "timer", timer_start_handler()
72 "timer", "hrtimer_expire_entry", PEVENT_PLUGIN_LOADER()
75 pevent_register_event_handler(pevent, -1, "timer", "hrtimer_start", PEVENT_PLUGIN_LOADER()
83 "timer", "hrtimer_expire_entry", PEVENT_PLUGIN_UNLOADER()
86 pevent_unregister_event_handler(pevent, -1, "timer", "hrtimer_start", PEVENT_PLUGIN_UNLOADER()
/linux-4.1.27/include/kvm/
H A Darm_arch_timer.h27 /* Is the timer enabled */
35 /* Registers: control register, timer value */
44 /* Background timer used when the guest is not running */
45 struct hrtimer timer; member in struct:arch_timer_cpu
47 /* Work queued with the above timer expires */
50 /* Background timer active */
/linux-4.1.27/sound/drivers/opl3/
H A Dopl3_lib.c93 * The detection algorithm plays with the timer built in the FM chip and snd_opl3_detect()
115 /* Unmask and start timer 1 */ snd_opl3_detect()
158 static int snd_opl3_timer1_start(struct snd_timer * timer) snd_opl3_timer1_start() argument
165 opl3 = snd_timer_chip(timer); snd_opl3_timer1_start()
167 ticks = timer->sticks; snd_opl3_timer1_start()
170 opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER1, 256 - ticks); /* timer 1 count */ snd_opl3_timer1_start()
171 opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, tmp); /* enable timer 1 IRQ */ snd_opl3_timer1_start()
176 static int snd_opl3_timer1_stop(struct snd_timer * timer) snd_opl3_timer1_stop() argument
182 opl3 = snd_timer_chip(timer); snd_opl3_timer1_stop()
186 opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, tmp); /* disable timer #1 */ snd_opl3_timer1_stop()
195 static int snd_opl3_timer2_start(struct snd_timer * timer) snd_opl3_timer2_start() argument
202 opl3 = snd_timer_chip(timer); snd_opl3_timer2_start()
204 ticks = timer->sticks; snd_opl3_timer2_start()
207 opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER2, 256 - ticks); /* timer 1 count */ snd_opl3_timer2_start()
208 opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, tmp); /* enable timer 1 IRQ */ snd_opl3_timer2_start()
213 static int snd_opl3_timer2_stop(struct snd_timer * timer) snd_opl3_timer2_stop() argument
219 opl3 = snd_timer_chip(timer); snd_opl3_timer2_stop()
223 opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, tmp); /* disable timer #1 */ snd_opl3_timer2_stop()
252 struct snd_timer *timer = NULL; snd_opl3_timer1_init() local
261 if ((err = snd_timer_new(opl3->card, "AdLib timer #1", &tid, &timer)) >= 0) { snd_opl3_timer1_init()
262 strcpy(timer->name, "AdLib timer #1"); snd_opl3_timer1_init()
263 timer->private_data = opl3; snd_opl3_timer1_init()
264 timer->hw = snd_opl3_timer1; snd_opl3_timer1_init()
266 opl3->timer1 = timer; snd_opl3_timer1_init()
272 struct snd_timer *timer = NULL; snd_opl3_timer2_init() local
281 if ((err = snd_timer_new(opl3->card, "AdLib timer #2", &tid, &timer)) >= 0) { snd_opl3_timer2_init()
282 strcpy(timer->name, "AdLib timer #2"); snd_opl3_timer2_init()
283 timer->private_data = opl3; snd_opl3_timer2_init()
284 timer->hw = snd_opl3_timer2; snd_opl3_timer2_init()
286 opl3->timer2 = timer; snd_opl3_timer2_init()
298 struct snd_timer *timer; snd_opl3_interrupt() local
312 timer = opl3->timer1; snd_opl3_interrupt()
313 snd_timer_interrupt(timer, timer->sticks); snd_opl3_interrupt()
316 timer = opl3->timer2; snd_opl3_interrupt()
317 snd_timer_interrupt(timer, timer->sticks); snd_opl3_interrupt()
/linux-4.1.27/drivers/s390/net/
H A Dfsm.h6 #include <linux/timer.h>
20 * timer handling.
227 * Initializes a timer for an FSM.
231 * @param timer The timer to be initialized.
236 * Clears a pending timer of an FSM instance.
238 * @param timer The timer to clear.
240 extern void fsm_deltimer(fsm_timer *timer);
243 * Adds and starts a timer to an FSM instance.
245 * @param timer The timer to be added. The field fi of that timer
247 * @param millisec Duration, after which the timer should expire.
248 * @param event Event, to trigger if timer expires.
251 * @return 0 on success, -1 if timer is already active.
253 extern int fsm_addtimer(fsm_timer *timer, int millisec, int event, void *arg);
256 * Modifies a timer of an FSM.
258 * @param timer The timer to modify.
259 * @param millisec Duration, after which the timer should expire.
260 * @param event Event, to trigger if timer expires.
263 extern void fsm_modtimer(fsm_timer *timer, int millisec, int event, void *arg);
/linux-4.1.27/arch/cris/arch-v32/kernel/
H A Dtime.c64 data = REG_RD(timer, regi_timer0, r_tmr0_data); get_ns_in_jiffie()
69 /* From timer MDS describing the hardware watchdog:
71 * The watchdog timer is an 8-bit timer with a configurable start value.
112 REG_WR(timer, regi_timer0, rw_wd_ctrl, wd_ctrl); reset_watchdog()
127 REG_WR(timer, regi_timer0, rw_wd_ctrl, wd_ctrl); stop_watchdog()
183 REG_WR(timer, timer_base, rw_tmr0_ctrl, ctrl); crisv32_clkevt_mode()
194 REG_WR(timer, timer_base, rw_tmr0_div, evt); crisv32_clkevt_next_event()
195 REG_WR(timer, timer_base, rw_tmr0_ctrl, ctrl); crisv32_clkevt_next_event()
198 REG_WR(timer, timer_base, rw_tmr0_ctrl, ctrl); crisv32_clkevt_next_event()
213 intr = REG_RD(timer, timer_base, r_masked_intr); crisv32_timer_interrupt()
217 REG_WR(timer, timer_base, rw_tmr0_ctrl, ctrl); crisv32_timer_interrupt()
218 REG_WR(timer, timer_base, rw_ack_intr, ack); crisv32_timer_interrupt()
231 .name = "crisv32-timer",
238 /* Timer is IRQF_SHARED so drivers can add stuff to the timer irq chain. */
242 .name = "crisv32-timer",
248 return REG_RD(timer, timer_base, r_time); crisv32_timer_sched_clock()
259 REG_WR(timer, timer_base, rw_tmr0_ctrl, ctrl); crisv32_timer_init()
261 timer_intr_mask = REG_RD(timer, timer_base, rw_intr_mask); crisv32_timer_init()
263 REG_WR(timer, timer_base, rw_intr_mask, timer_intr_mask); crisv32_timer_init()
288 "crisv32-timer", CRISV32_TIMER_FREQ, time_init()
335 data = REG_RD(timer, timer_regs[freqs->cpu], cris_time_freq_notifier()
338 REG_WR(timer, timer_regs[freqs->cpu], rw_tmr0_div, div); cris_time_freq_notifier()
H A Dfasttimer.c29 * timer0 is running at 100MHz and generating jiffies timer ticks
139 r_time0 = REG_RD(timer, regi_timer0, r_time); start_timer_trig()
144 intr_mask = REG_RD(timer, regi_timer0, rw_intr_mask); start_timer_trig()
146 REG_WR(timer, regi_timer0, rw_intr_mask, intr_mask); start_timer_trig()
148 /* Set timer values and check if trigger wraps. */ start_timer_trig()
157 REG_WR(timer, regi_timer0, rw_ack_intr, ack_intr); start_timer_trig()
159 /* Start timer */ start_timer_trig()
160 REG_WR(timer, regi_timer0, rw_trig, trig); start_timer_trig()
162 REG_WR(timer, regi_timer0, rw_trig_cfg, trig_cfg); start_timer_trig()
165 r_time1 = REG_RD(timer, regi_timer0, r_time); start_timer_trig()
170 intr_mask = REG_RD(timer, regi_timer0, rw_intr_mask); start_timer_trig()
172 REG_WR(timer, regi_timer0, rw_intr_mask, intr_mask); start_timer_trig()
178 REG_WR(timer, regi_timer0, rw_trig_cfg, trig_cfg); start_timer_trig()
179 REG_WR(timer, regi_timer0, rw_ack_intr, ack_intr); start_timer_trig()
209 "timer name: %s data: 0x%08lX already " start_one_shot_timer()
237 /* Put first in list and modify the timer value */ start_one_shot_timer()
311 /* Check if the timer interrupt is for us (a trig int) */ timer_trig_interrupt()
312 masked_intr = REG_RD(timer, regi_timer0, r_masked_intr); timer_trig_interrupt()
328 * fast timer list, but any time we hold a reference to a timer_trig_handler()
329 * timer in the list, since del_fast_timer may be called timer_trig_handler()
331 * when interrupts are enabled is when calling the timer timer_trig_handler()
336 /* Clear timer trig interrupt */ timer_trig_handler()
337 intr_mask = REG_RD(timer, regi_timer0, rw_intr_mask); timer_trig_handler()
339 REG_WR(timer, regi_timer0, rw_intr_mask, intr_mask); timer_trig_handler()
341 /* First stop timer, then ack interrupt */ timer_trig_handler()
342 /* Stop timer */ timer_trig_handler()
344 REG_WR(timer, regi_timer0, rw_trig_cfg, trig_cfg); timer_trig_handler()
348 REG_WR(timer, regi_timer0, rw_ack_intr, ack_intr); timer_trig_handler()
372 /* Remove this timer before call, since it may reuse the timer */ timer_trig_handler()
383 * interrupts, since the timer may be removed and we timer_trig_handler()
386 * if the timer was stack-allocated). timer_trig_handler()
406 /* Start next timer.. */ timer_trig_handler()
459 /* Uninterruptible sleep on the fast timer. (The condition is schedule_usleep()
460 * somewhat redundant since the timer is what wakes us up.) */ schedule_usleep()
482 seq_printf(m, "Fast timer interrupts: %i\n", fast_timer_ints); proc_fasttimer_show()
485 seq_printf(m, "Fast timer running: %s\n", proc_fasttimer_show()
596 printk("timer removed!\n"); proc_fasttimer_show()
783 "fast timer int", &fast_timer_list)) fast_timer_init()
/linux-4.1.27/arch/cris/include/arch-v32/mach-a3/mach/hwregs/
H A Dtimer_defs.h6 * file: timer.r
8 * by ../../../tools/rdesc/bin/rdes2c -outfile timer_defs.h timer.r
82 /* C-code for register scope timer */
84 /* Register rw_tmr0_div, scope timer, type rw */
89 /* Register r_tmr0_data, scope timer, type r */
93 /* Register rw_tmr0_ctrl, scope timer, type rw */
102 /* Register rw_tmr1_div, scope timer, type rw */
107 /* Register r_tmr1_data, scope timer, type r */
111 /* Register rw_tmr1_ctrl, scope timer, type rw */
120 /* Register rs_cnt_data, scope timer, type rs */
127 /* Register r_cnt_data, scope timer, type r */
134 /* Register rw_cnt_cfg, scope timer, type rw */
142 /* Register rw_trig, scope timer, type rw */
147 /* Register rw_trig_cfg, scope timer, type rw */
155 /* Register r_time, scope timer, type r */
159 /* Register rw_out, scope timer, type rw */
167 /* Register rw_wd_ctrl, scope timer, type rw */
177 /* Register r_wd_stat, scope timer, type r */
185 /* Register rw_intr_mask, scope timer, type rw */
196 /* Register rw_ack_intr, scope timer, type rw */
207 /* Register r_intr, scope timer, type r */
217 /* Register r_masked_intr, scope timer, type r */
227 /* Register rw_test, scope timer, type rw */
/linux-4.1.27/arch/cris/include/arch-v32/mach-fs/mach/hwregs/
H A Dtimer_defs.h6 * file: ../../inst/timer/rtl/timer_regs.r
10 * by /n/asic/design/tools/rdesc/src/rdes2c --outfile timer_defs.h ../../inst/timer/rtl/timer_regs.r
85 /* C-code for register scope timer */
87 /* Register rw_tmr0_div, scope timer, type rw */
92 /* Register r_tmr0_data, scope timer, type r */
96 /* Register rw_tmr0_ctrl, scope timer, type rw */
105 /* Register rw_tmr1_div, scope timer, type rw */
110 /* Register r_tmr1_data, scope timer, type r */
114 /* Register rw_tmr1_ctrl, scope timer, type rw */
123 /* Register rs_cnt_data, scope timer, type rs */
130 /* Register r_cnt_data, scope timer, type r */
137 /* Register rw_cnt_cfg, scope timer, type rw */
145 /* Register rw_trig, scope timer, type rw */
150 /* Register rw_trig_cfg, scope timer, type rw */
158 /* Register r_time, scope timer, type r */
162 /* Register rw_out, scope timer, type rw */
170 /* Register rw_wd_ctrl, scope timer, type rw */
180 /* Register r_wd_stat, scope timer, type r */
188 /* Register rw_intr_mask, scope timer, type rw */
199 /* Register rw_ack_intr, scope timer, type rw */
210 /* Register r_intr, scope timer, type r */
220 /* Register r_masked_intr, scope timer, type r */
230 /* Register rw_test, scope timer, type rw */
/linux-4.1.27/drivers/watchdog/
H A Dintel_scu_watchdog.c64 "Watchdog timer margin"
72 "Default Watchdog timer setting"
87 "the watchdog timer will be refreshed for one more interval"
89 "watchdog timer will reset the system."
108 pr_crit("System will reset when watchdog timer times out!\n"); watchdog_fire()
145 pr_err("Error setting SCU watchdog timer: %x\n", ipc_ret); watchdog_set_ipc()
154 /* timer interrupt handler */ watchdog_timer_interrupt()
165 /* has the timer been started? If not, then this is spurious */ watchdog_timer_interrupt()
171 /* temporarily disable the timer */ watchdog_timer_interrupt()
174 /* set the timer to the threshold */ watchdog_timer_interrupt()
178 /* allow the timer to run */ watchdog_timer_interrupt()
190 /* temporarily disable the timer */ intel_scu_keepalive()
193 /* set the timer to the soft_threshold */ intel_scu_keepalive()
197 /* allow the timer to run */ intel_scu_keepalive()
223 pr_debug("set_heartbeat: timer freq is %d\n", intel_scu_set_heartbeat()
240 /* temporarily disable the timer */ intel_scu_set_heartbeat()
248 /* Make sure the watchdog timer is stopped */ intel_scu_set_heartbeat()
261 /* Make sure timer is stopped */ intel_scu_set_heartbeat()
265 /* Unable to set timer value */ intel_scu_set_heartbeat()
266 pr_err("Unable to set timer\n"); intel_scu_set_heartbeat()
270 /* set the timer to the soft threshold */ intel_scu_set_heartbeat()
274 /* read count value before starting timer */ intel_scu_set_heartbeat()
277 /* Start the timer */ intel_scu_set_heartbeat()
313 * This watchdog should not be closed, after the timer intel_scu_release()
317 * timer is refreshed for one more interval. At the end intel_scu_release()
318 * of that interval, the watchdog timer will reset the system. intel_scu_release()
327 /* Just close, since timer has not been started */ intel_scu_release()
328 pr_debug("closed, without starting timer\n"); intel_scu_release()
334 /* Since the timer was started, prevent future reopens */ intel_scu_release()
337 /* Refresh the timer for one more interval */ intel_scu_release()
357 /* Start watchdog with timer value set by init */ intel_scu_write()
418 /* Turn off the watchdog timer. */ intel_scu_notify_sys()
441 * We don't really need to check this as the SFI timer get will fail intel_scu_watchdog_init()
466 pr_debug("timer is not available\n"); intel_scu_watchdog_init()
469 /* make sure the timer exists */ intel_scu_watchdog_init()
471 pr_debug("timer %d does not have valid physical memory\n", intel_scu_watchdog_init()
477 pr_debug("timer %d invalid irq\n", sfi_mtimer_num); intel_scu_watchdog_init()
485 pr_debug("timer unable to ioremap\n"); intel_scu_watchdog_init()
533 /* Make sure timer is disabled before returning */ intel_scu_watchdog_init()
554 /* disable the timer */ intel_scu_watchdog_exit()
H A Dvia_wdt.c21 #include <linux/timer.h>
34 * hardware timer counter.
38 #define VIA_WDT_COUNT 4 /* MMIO addr+4: timer counter reg. */
44 #define VIA_WDT_DISABLED 0x08 /* 1: timer is disabled */
71 static DEFINE_TIMER(timer, wdt_timer_tick, 0, 0);
72 /* The timer that pings the watchdog */
73 static unsigned long next_heartbeat; /* the next_heartbeat for the timer */
83 * Timer tick: the timer will make sure that the watchdog timer hardware
85 * 1) the watchog timer has been started and /dev/watchdog is open
89 * 2) the watchdog timer has been stopped by userspace.
96 mod_timer(&timer, jiffies + WDT_HEARTBEAT); wdt_timer_tick()
115 mod_timer(&timer, jiffies + WDT_HEARTBEAT); wdt_start()
218 mod_timer(&timer, jiffies + WDT_HEARTBEAT); wdt_probe()
235 del_timer_sync(&timer); wdt_remove()
259 MODULE_DESCRIPTION("Driver for watchdog timer on VIA chipset");
H A Dep93xx_wdt.c32 #include <linux/timer.h>
51 static struct timer_list timer; variable in typeref:struct:timer_list
65 /* Re-set the timer interval */ ep93xx_wdt_timer_ping()
66 mod_timer(&timer, jiffies + WDT_INTERVAL); ep93xx_wdt_timer_ping()
74 mod_timer(&timer, jiffies + WDT_INTERVAL); ep93xx_wdt_start()
81 del_timer_sync(&timer); ep93xx_wdt_stop()
138 setup_timer(&timer, ep93xx_wdt_timer_ping, 1); ep93xx_wdt_probe()
H A Dgpio_wdt.c40 struct timer_list timer; member in struct:gpio_wdt_priv
58 mod_timer(&priv->timer, priv->last_jiffies + priv->hw_margin); gpio_wdt_start_impl()
77 mod_timer(&priv->timer, 0); gpio_wdt_stop()
111 /* Restart timer */ gpio_wdt_hwping()
112 mod_timer(&priv->timer, jiffies + priv->hw_margin); gpio_wdt_hwping()
135 mod_timer(&priv->timer, 0); gpio_wdt_notify_sys()
224 setup_timer(&priv->timer, gpio_wdt_hwping, (unsigned long)&priv->wdd); gpio_wdt_probe()
249 del_timer_sync(&priv->timer); gpio_wdt_remove()
H A Dsp5100_tco.h2 * sp5100_tco: TCO timer driver for sp5100 chipsets.
6 * TCO timer driver for sp5100 chipsets
H A Dalim7101_wdt.c5 * and the Cobalt kernel WDT timer driver by Tim Hockin
27 #include <linux/timer.h>
74 static DEFINE_TIMER(timer, wdt_timer_ping, 0, 1);
115 /* Re-set the timer interval */ wdt_timer_ping()
116 mod_timer(&timer, jiffies + WDT_INTERVAL); wdt_timer_ping()
154 /* We must enable before we kick off the timer in case the timer wdt_startup()
159 /* Start the timer */ wdt_startup()
160 mod_timer(&timer, jiffies + WDT_INTERVAL); wdt_startup()
162 pr_info("Watchdog timer is now enabled\n"); wdt_startup()
167 /* Stop the timer */ wdt_turnoff()
168 del_timer_sync(&timer); wdt_turnoff()
170 pr_info("Watchdog timer is now disabled...\n"); wdt_turnoff()
186 /* See if we got the magic character 'V' and reload the timer */ fop_write()
204 /* someone wrote to us, we should restart timer */ fop_write()
225 /* wim: shouldn't there be a: del_timer(&timer); */ fop_close()
H A Dimx2_wdt.c19 * Stopable timer: Yes No
37 #include <linux/timer.h>
46 #define IMX2_WDT_WCR_WDZST (1 << 0) /* -> Watchdog timer Suspend */
65 struct timer_list timer; /* Pings the watchdog when closed */ member in struct:imx2_wdt_device
118 /* Suspend timer in low power mode, write once-only */ imx2_wdt_setup()
161 mod_timer(&wdev->timer, jiffies + wdog->timeout * HZ / 2); imx2_wdt_timer_ping()
179 /* delete the timer that pings the watchdog after close */ imx2_wdt_start()
180 del_timer_sync(&wdev->timer); imx2_wdt_start()
192 * We use a timer to ping the watchdog while /dev/watchdog is closed imx2_wdt_stop()
275 setup_timer(&wdev->timer, imx2_wdt_timer_ping, (unsigned long)wdog); imx2_wdt_probe()
314 del_timer_sync(&wdev->timer); imx2_wdt_remove()
328 * We are running, we need to delete the timer but will imx2_wdt_shutdown()
331 del_timer_sync(&wdev->timer); imx2_wdt_shutdown()
352 del_timer_sync(&wdev->timer); imx2_wdt_suspend()
383 * the timer again. imx2_wdt_resume()
386 mod_timer(&wdev->timer, imx2_wdt_resume()
/linux-4.1.27/net/x25/
H A Dx25_timer.c18 * X.25 002 Jonathan Naylor New timer architecture.
24 #include <linux/timer.h>
36 setup_timer(&x25->timer, x25_timer_expiry, (unsigned long)sk); x25_init_timers()
57 mod_timer(&x25->timer, jiffies + x25->t2); x25_start_t2timer()
64 mod_timer(&x25->timer, jiffies + x25->t21); x25_start_t21timer()
71 mod_timer(&x25->timer, jiffies + x25->t22); x25_start_t22timer()
78 mod_timer(&x25->timer, jiffies + x25->t23); x25_start_t23timer()
83 del_timer(&x25_sk(sk)->timer); x25_stop_timer()
90 if (!timer_pending(&x25->timer)) x25_display_timer()
93 return x25->timer.expires - jiffies; x25_display_timer()
/linux-4.1.27/drivers/staging/comedi/drivers/addi-data/
H A Dhwdrv_apci1564.c31 ctrl = inl(devpriv->timer + ADDI_TCW_CTRL_REG); apci1564_timer_insn_config()
34 outl(ctrl, devpriv->timer + ADDI_TCW_CTRL_REG); apci1564_timer_insn_config()
37 /* Enable timer int & disable all the other int sources */ apci1564_timer_insn_config()
38 outl(0x02, devpriv->timer + ADDI_TCW_CTRL_REG); apci1564_timer_insn_config()
52 outl(0x0, devpriv->timer + ADDI_TCW_CTRL_REG); apci1564_timer_insn_config()
56 outl(data[2], devpriv->timer + ADDI_TCW_TIMEBASE_REG); apci1564_timer_insn_config()
59 outl(data[3], devpriv->timer + ADDI_TCW_RELOAD_REG); apci1564_timer_insn_config()
61 ctrl = inl(devpriv->timer + ADDI_TCW_CTRL_REG); apci1564_timer_insn_config()
65 outl(ctrl, devpriv->timer + ADDI_TCW_CTRL_REG); apci1564_timer_insn_config()
78 ctrl = inl(devpriv->timer + ADDI_TCW_CTRL_REG); apci1564_timer_insn_write()
88 outl(ctrl, devpriv->timer + ADDI_TCW_CTRL_REG); apci1564_timer_insn_write()
101 data[0] = inl(devpriv->timer + ADDI_TCW_STATUS_REG) & 0x1; apci1564_timer_insn_read()
104 data[1] = inl(devpriv->timer + ADDI_TCW_VAL_REG); apci1564_timer_insn_read()
135 /* - Disable the timer mode */ apci1564_counter_insn_config()
/linux-4.1.27/arch/arm/lib/
H A Ddelay.c77 void __init register_current_timer_delay(const struct delay_timer *timer) register_current_timer_delay() argument
82 clocks_calc_mult_shift(&new_mult, &new_shift, timer->freq, register_current_timer_delay()
87 pr_err("Ignoring delay timer %ps, which has insufficient resolution of %lluns\n", register_current_timer_delay()
88 timer, res); register_current_timer_delay()
93 pr_info("Switching to timer-based delay loop, resolution %lluns\n", res); register_current_timer_delay()
94 delay_timer = timer; register_current_timer_delay()
95 lpj_fine = timer->freq / HZ; register_current_timer_delay()
/linux-4.1.27/sound/pci/ctxfi/
H A Dcttimer.c2 * PCM timer handling on ctxfi
19 MODULE_PARM_DESC(use_system_timer, "Force to use system-timer");
32 /* timer instance -- assigned to each PCM stream */
38 struct timer_list timer; member in struct:ct_timer_instance
47 /* timer instance manager */
49 spinlock_t lock; /* global timer lock (for xfitimer) */
58 unsigned int running:1; /* global timer running */
63 * system-timer-based updates
90 mod_timer(&ti->timer, jiffies + interval); ct_systimer_callback()
96 setup_timer(&ti->timer, ct_systimer_callback, ct_systimer_init()
107 mod_timer(&ti->timer, ct_systimer_start()
119 del_timer(&ti->timer); ct_systimer_stop()
126 try_to_del_timer_sync(&ti->timer); ct_systimer_prepare()
141 * Handling multiple streams using a global emu20k1 timer irq
176 * reprogram the timer interval;
177 * checks the running instance list and determines the next timer interval.
248 /* Handle timer-interrupt */ ct_xfitimer_callback()
275 /* start/stop the timer */ ct_xfitimer_update()
334 * timer instance
397 * timer manager
402 struct ct_timer *timer = data; ct_timer_interrupt() local
404 /* Interval timer interrupt */ ct_timer_interrupt()
405 if ((status & IT_INT) && timer->ops->interrupt) ct_timer_interrupt()
406 timer->ops->interrupt(timer); ct_timer_interrupt()
424 dev_info(atc->card->dev, "Use xfi-native timer\n"); ct_timer_new()
429 dev_info(atc->card->dev, "Use system timer\n"); ct_timer_new()
/linux-4.1.27/drivers/leds/trigger/
H A Dledtrig-transient.c6 * Based on Richard Purdie's ledtrig-timer.c and Atsushi Nemoto's
17 * Transient trigger allows one shot timer activation. Please refer to
26 #include <linux/timer.h>
35 struct timer_list timer; member in struct:transient_trig_data
71 /* cancel the running timer */ transient_activate_store()
73 del_timer(&transient_data->timer); transient_activate_store()
80 /* start timer if there is no active timer */ transient_activate_store()
87 mod_timer(&transient_data->timer, transient_activate_store()
92 timer is not active - just return */ transient_activate_store()
94 timer is already active - just return */ transient_activate_store()
185 setup_timer(&tdata->timer, transient_timer_function, transient_trig_activate()
206 del_timer_sync(&transient_data->timer); transient_trig_deactivate()
H A Dledtrig-heartbeat.c6 * Based on Richard Purdie's ledtrig-timer.c and some arch's
18 #include <linux/timer.h>
29 struct timer_list timer; member in struct:heartbeat_trig_data
78 mod_timer(&heartbeat_data->timer, jiffies + delay); led_heartbeat_function()
90 setup_timer(&heartbeat_data->timer, heartbeat_trig_activate()
93 led_heartbeat_function(heartbeat_data->timer.data); heartbeat_trig_activate()
102 del_timer_sync(&heartbeat_data->timer); heartbeat_trig_deactivate()
/linux-4.1.27/arch/arm/mach-mmp/
H A Dtime.c12 * The timers module actually includes three timers, each timer with up to
56 * FIXME: the timer needs some delay to stablize the counter capture
85 * Disable timer 0. timer_interrupt()
102 * Disable timer 0. timer_set_next_event()
107 * Clear and enable timer match 0 interrupt. timer_set_next_event()
113 * Setup new clockevent timer value. timer_set_next_event()
118 * Enable timer 0. timer_set_next_event()
178 /* set timer 0 to periodic mode, and timer 1 to free-running mode */ timer_config()
189 /* enable timer 1 counter */ timer_config()
194 .name = "timer",
217 { .compatible = "mrvl,mmp-timer", },
245 pr_err("Failed to get timer from device tree with error:%d\n", ret); mmp_dt_init_timer()
/linux-4.1.27/drivers/net/wireless/brcm80211/brcmsmac/
H A Dmac80211_if.h20 #include <linux/timer.h>
43 bool set; /* indicates if timer is active */
46 char *name; /* Description of the timer */
76 /* timer related fields */
78 struct brcms_timer *timers; /* timer cleanup queue */
102 /* timer functions */
106 void brcms_free_timer(struct brcms_timer *timer);
107 void brcms_add_timer(struct brcms_timer *timer, uint ms, int periodic);
108 bool brcms_del_timer(struct brcms_timer *timer);
/linux-4.1.27/arch/mips/lasat/
H A Dpicvue_proc.c17 #include <linux/timer.h>
30 static struct timer_list timer; variable in typeref:struct:timer_list
116 del_timer(&timer); pvc_scroll_proc_write()
129 add_timer(&timer); pvc_scroll_proc_write()
166 timer.expires = jiffies + scroll_interval; pvc_proc_timerfunc()
167 add_timer(&timer); pvc_proc_timerfunc()
178 del_timer_sync(&timer); pvc_proc_cleanup()
205 init_timer(&timer); pvc_proc_init()
206 timer.function = pvc_proc_timerfunc; pvc_proc_init()
/linux-4.1.27/arch/m68k/68360/
H A Dconfig.c55 pquicc->timer_ter1 = 0x0002; /* clear timer event */ hw_tick()
61 .name = "timer",
72 /* Restart mode, Enable int, 32KHz, Enable timer */ hw_timer_init()
79 request_irq(IRQ_MACHSPEC | 1, timer_routine, 0, "timer", NULL); hw_timer_init()
84 /* Set up timer 1 (in [1..4]) to do 100Hz */ hw_timer_init()
86 pquicc->timer_tgcr = tgcr_save; /* stop and reset timer 1 */ hw_timer_init()
97 pquicc->timer_ter1 = 0x0003; /* clear timer events */ hw_timer_init()
101 /* enable timer 1 interrupt in CIMR */ hw_timer_init()
104 /* Start timer 1: */ hw_timer_init()
H A Dints.c98 _ramvec[vba+CPMVEC_TIMER4] = inthandler; /* timer 4 */ trap_init()
103 _ramvec[vba+CPMVEC_TIMER3] = inthandler; /* timer 3 */ trap_init()
107 _ramvec[vba+CPMVEC_RISCTIMER] = inthandler; /* timer table */ trap_init()
108 _ramvec[vba+CPMVEC_TIMER2] = inthandler; /* timer 2 */ trap_init()
115 /* _ramvec[vba+CPMVEC_TIMER1] = cpm_isr_timer1; */ /* timer 1 */ trap_init()
116 _ramvec[vba+CPMVEC_TIMER1] = inthandler; /* timer 1 */ trap_init()
/linux-4.1.27/arch/arm/mach-netx/
H A Dtime.c42 /* disable timer */ netx_set_mode()
81 .name = "netx-timer" __stringify(TIMER_CLOCKEVENT),
88 * IRQ handler for the timer
110 * Set up timer interrupt
114 /* disable timer initially */ netx_timer_init()
117 /* Reset the timer value to zero */ netx_timer_init()
125 /* Enable the interrupt in the specific timer netx_timer_init()
126 * register and start timer netx_timer_init()
134 /* Setup timer one for clocksource */ netx_timer_init()
/linux-4.1.27/drivers/net/fddi/skfp/h/
H A Dsmc.h99 struct smt_timer ecm_timer ; /* timer */
120 * timer and flags
122 struct smt_timer rmt_timer0 ; /* timer 0 */
123 struct smt_timer rmt_timer1 ; /* timer 1 */
124 struct smt_timer rmt_timer2 ; /* timer 2 */
125 u_char timer0_exp ; /* flag : timer 0 expired */
126 u_char timer1_exp ; /* flag : timer 1 expired */
127 u_char timer2_exp ; /* flag : timer 2 expired */
243 * timer package
280 u_long TSR ; /* timer */
338 u_long smt_tvu ; /* timer valid una */
339 u_long smt_tvd ; /* timer valid dna */
347 struct smt_timer smt_timer ; /* SMT NIF timer */
365 u_long pcm_tb_min ; /* PCM : TB_Min timer value */
366 u_long pcm_tb_max ; /* PCM : TB_Max timer value */
367 u_long pcm_c_min ; /* PCM : C_Min timer value */
368 u_long pcm_t_out ; /* PCM : T_Out timer value */
369 u_long pcm_tl_min ; /* PCM : TL_min timer value */
370 u_long pcm_lc_short ; /* PCM : LC_Short timer value */
371 u_long pcm_lc_medium ; /* PCM : LC_Medium timer value */
372 u_long pcm_lc_long ; /* PCM : LC_Long timer value */
373 u_long pcm_lc_extended ; /* PCM : LC_Extended timer value */
374 u_long pcm_t_next_9 ; /* PCM : T_Next[9] timer value */
375 u_long pcm_ns_max ; /* PCM : NS_Max timer value */
377 u_long ecm_i_max ; /* ECM : I_Max timer value */
378 u_long ecm_in_max ; /* ECM : IN_Max timer value */
379 u_long ecm_td_min ; /* ECM : TD_Min timer */
380 u_long ecm_test_done ; /* ECM : path test done timer */
383 u_long rmt_t_non_op ; /* RMT : T_Non_OP timer value */
384 u_long rmt_t_stuck ; /* RMT : T_Stuck timer value */
385 u_long rmt_t_direct ; /* RMT : T_Direct timer value */
386 u_long rmt_t_jam ; /* RMT : T_Jam timer value */
387 u_long rmt_t_announce ; /* RMT : T_Announce timer value */
394 u_long mac_d_max ; /* MAC : D_Max timer value */
454 struct s_timer t ; /* timer */
/linux-4.1.27/drivers/staging/iio/trigger/
H A Diio-trig-bfin-timer.h5 * struct iio_bfin_timer_trigger_pdata - timer trigger platform data
11 * timer trigger. If output_enable is set to true an external trigger signal
12 * will generated on the pin corresponding to the timer. This is useful for
/linux-4.1.27/drivers/oprofile/
H A Doprof.c32 /* timer
34 1 - use the timer int mechanism regardless
36 static int timer = 0; variable
252 if (!timer && !oprofilefs_register()) oprofile_init()
257 /* setup timer mode: */ oprofile_init()
259 /* no nmi timer mode if oprofile.timer is set */ oprofile_init()
260 if (timer || op_nmi_timer_init(&oprofile_ops)) { oprofile_init()
281 module_param_named(timer, timer, int, 0644);
282 MODULE_PARM_DESC(timer, "force use of timer interrupt");
/linux-4.1.27/drivers/pcmcia/
H A Dbcm63xx_pcmcia.h5 #include <linux/timer.h>
48 /* timer used for socket status polling */
49 struct timer_list timer; member in struct:bcm63xx_pcmcia_socket
/linux-4.1.27/block/
H A Dblk-timeout.c74 * blk_delete_timer - Delete/cancel timer for a given function.
75 * @req: request that we are canceling timer for
153 * request by deleting the timer and calling the q's timeout function.
181 * blk_add_timer - Start timeout timer for a single request
185 * Each request has its own timer, and as it is added to the queue, we
186 * set up the timer. When the request completes, we cancel the timer.
214 * If the timer isn't already pending or this timeout is earlier blk_add_timer()
215 * than an existing one, modify the timer. Round up to next nearest blk_add_timer()
225 * Due to added timer slack to group timers, the timer blk_add_timer()
228 * modifying the timer because expires for value X blk_add_timer()
/linux-4.1.27/arch/mn10300/kernel/
H A Dprofile.c24 /* use timer 11 to drive the profiling interrupts */ profile_init()
30 /* set up timer 11 profile_init()
43 printk(KERN_INFO "Profiling initiated on timer 11, priority 0, %uHz\n", profile_init()
/linux-4.1.27/arch/avr32/include/asm/
H A Dtimex.h12 * This is the frequency of the timer used for Linux's timer interrupt.
16 * For many system the exact clockrate of the timer isn't known but due to
/linux-4.1.27/drivers/rtc/
H A Dinterface.c20 static int rtc_timer_enqueue(struct rtc_device *rtc, struct rtc_timer *timer);
21 static void rtc_timer_remove(struct rtc_device *rtc, struct rtc_timer *timer);
88 /* A timer might have just expired */ rtc_set_time()
132 /* A timer might have just expired */ rtc_set_mmss()
581 * @timer: pointer to the pie mode hrtimer
587 enum hrtimer_restart rtc_pie_update_irq(struct hrtimer *timer) rtc_pie_update_irq() argument
592 rtc = container_of(timer, struct rtc_device, pie_timer); rtc_pie_update_irq()
595 count = hrtimer_forward_now(timer, period); rtc_pie_update_irq()
692 * We always cancel the timer here first, because otherwise rtc_update_hrtimer()
693 * we could run into BUG_ON(timer->state != HRTIMER_STATE_CALLBACK); rtc_update_hrtimer()
694 * when we manage to start the timer before the callback rtc_update_hrtimer()
785 * @timer timer being added.
787 * Enqueues a timer onto the rtc devices timerqueue and sets
790 * Sets the enabled bit on the added timer.
794 static int rtc_timer_enqueue(struct rtc_device *rtc, struct rtc_timer *timer) rtc_timer_enqueue() argument
796 timer->enabled = 1; rtc_timer_enqueue()
797 timerqueue_add(&rtc->timerqueue, &timer->node); rtc_timer_enqueue()
798 if (&timer->node == timerqueue_getnext(&rtc->timerqueue)) { rtc_timer_enqueue()
801 alarm.time = rtc_ktime_to_tm(timer->node.expires); rtc_timer_enqueue()
808 timerqueue_del(&rtc->timerqueue, &timer->node); rtc_timer_enqueue()
809 timer->enabled = 0; rtc_timer_enqueue()
827 * @timer timer being removed.
829 * Removes a timer onto the rtc devices timerqueue and sets
832 * Clears the enabled bit on the removed timer.
836 static void rtc_timer_remove(struct rtc_device *rtc, struct rtc_timer *timer) rtc_timer_remove() argument
839 timerqueue_del(&rtc->timerqueue, &timer->node); rtc_timer_remove()
840 timer->enabled = 0; rtc_timer_remove()
841 if (next == &timer->node) { rtc_timer_remove()
862 * @timer timer being removed.
871 struct rtc_timer *timer; rtc_timer_do_work() local
887 /* expire timer */ rtc_timer_do_work()
888 timer = container_of(next, struct rtc_timer, node); rtc_timer_do_work()
889 timerqueue_del(&rtc->timerqueue, &timer->node); rtc_timer_do_work()
890 timer->enabled = 0; rtc_timer_do_work()
891 if (timer->task.func) rtc_timer_do_work()
892 timer->task.func(timer->task.private_data); rtc_timer_do_work()
895 if (ktime_to_ns(timer->period)) { rtc_timer_do_work()
896 timer->node.expires = ktime_add(timer->node.expires, rtc_timer_do_work()
897 timer->period); rtc_timer_do_work()
898 timer->enabled = 1; rtc_timer_do_work()
899 timerqueue_add(&rtc->timerqueue, &timer->node); rtc_timer_do_work()
919 timer = container_of(next, struct rtc_timer, node); rtc_timer_do_work()
920 timerqueue_del(&rtc->timerqueue, &timer->node); rtc_timer_do_work()
921 timer->enabled = 0; rtc_timer_do_work()
934 * @timer: timer to be intiialized
935 * @f: function pointer to be called when timer fires
940 void rtc_timer_init(struct rtc_timer *timer, void (*f)(void *p), void *data) rtc_timer_init() argument
942 timerqueue_init(&timer->node); rtc_timer_init()
943 timer->enabled = 0; rtc_timer_init()
944 timer->task.func = f; rtc_timer_init()
945 timer->task.private_data = data; rtc_timer_init()
950 * @ timer: timer being set
951 * @ expires: time at which to expire the timer
952 * @ period: period that the timer will recur
956 int rtc_timer_start(struct rtc_device *rtc, struct rtc_timer *timer, rtc_timer_start() argument
961 if (timer->enabled) rtc_timer_start()
962 rtc_timer_remove(rtc, timer); rtc_timer_start()
964 timer->node.expires = expires; rtc_timer_start()
965 timer->period = period; rtc_timer_start()
967 ret = rtc_timer_enqueue(rtc, timer); rtc_timer_start()
975 * @ timer: timer being set
979 int rtc_timer_cancel(struct rtc_device *rtc, struct rtc_timer *timer) rtc_timer_cancel() argument
983 if (timer->enabled) rtc_timer_cancel()
984 rtc_timer_remove(rtc, timer); rtc_timer_cancel()
/linux-4.1.27/arch/microblaze/kernel/
H A Dtimer.c80 /* loading value to timer reg */ xilinx_timer0_start_periodic()
86 /* see timer data sheet for detail xilinx_timer0_start_periodic()
90 * ENT- enable timer itself xilinx_timer0_start_periodic()
96 * UDT - set the timer as down counter xilinx_timer0_start_periodic()
107 /* loading value to timer reg */ xilinx_timer0_start_oneshot()
177 .name = "timer",
201 /* reading actual value of timer 1 */ xilinx_read()
254 static void __init xilinx_timer_init(struct device_node *timer) xilinx_timer_init() argument
266 timer_baseaddr = of_iomap(timer, 0); xilinx_timer_init()
268 pr_err("ERROR: invalid timer base address\n"); xilinx_timer_init()
281 irq = irq_of_parse_and_map(timer, 0); xilinx_timer_init()
283 of_property_read_u32(timer, "xlnx,one-timer-only", &timer_num); xilinx_timer_init()
289 pr_info("%s: irq=%d\n", timer->full_name, irq); xilinx_timer_init()
291 clk = of_clk_get(timer, 0); xilinx_timer_init()
293 pr_err("ERROR: timer CCF input clock not found\n"); xilinx_timer_init()
295 of_property_read_u32(timer, "clock-frequency", xilinx_timer_init()
318 CLOCKSOURCE_OF_DECLARE(xilinx_timer, "xlnx,xps-timer-1.00.a",
H A DMakefile20 reset.o setup.o signal.o sys_microblaze.o timer.o traps.o unwind.o
/linux-4.1.27/arch/cris/include/arch-v32/arch/
H A Dtimex.h13 #define CLOCK_TICK_RATE 100000000 /* Underlying frequency of the HZ timer */
21 ((TIMER0_DIV - REG_RD(timer, regi_timer0, r_tmr0_data)) / 100)
/linux-4.1.27/arch/m68k/include/asm/
H A Dmcfslt.h4 * mcfslt.h -- ColdFire internal Slice (SLT) timer support defines.
16 * Define the SLT timer register set addresses.
H A Dm68360_quicc.h74 struct timer_pram timer; member in struct:quicc::__anon1796::scc_pram::__anon1798::__anon1799
204 volatile unsigned short timer_tgcr; /* timer global configuration reg */
206 volatile unsigned short timer_tmr1; /* timer 1 mode reg */
207 volatile unsigned short timer_tmr2; /* timer 2 mode reg */
208 volatile unsigned short timer_trr1; /* timer 1 referance reg */
209 volatile unsigned short timer_trr2; /* timer 2 referance reg */
210 volatile unsigned short timer_tcr1; /* timer 1 capture reg */
211 volatile unsigned short timer_tcr2; /* timer 2 capture reg */
212 volatile unsigned short timer_tcn1; /* timer 1 counter reg */
213 volatile unsigned short timer_tcn2; /* timer 2 counter reg */
214 volatile unsigned short timer_tmr3; /* timer 3 mode reg */
215 volatile unsigned short timer_tmr4; /* timer 4 mode reg */
216 volatile unsigned short timer_trr3; /* timer 3 referance reg */
217 volatile unsigned short timer_trr4; /* timer 4 referance reg */
218 volatile unsigned short timer_tcr3; /* timer 3 capture reg */
219 volatile unsigned short timer_tcr4; /* timer 4 capture reg */
220 volatile unsigned short timer_tcn3; /* timer 3 counter reg */
221 volatile unsigned short timer_tcn4; /* timer 4 counter reg */
222 volatile unsigned short timer_ter1; /* timer 1 event reg */
223 volatile unsigned short timer_ter2; /* timer 2 event reg */
224 volatile unsigned short timer_ter3; /* timer 3 event reg */
225 volatile unsigned short timer_ter4; /* timer 4 event reg */
/linux-4.1.27/arch/arm/plat-samsung/include/plat/
H A Dbacklight.h15 * @no: GPIO number for PWM timer out
16 * @func: Special function of GPIO line for PWM timer
/linux-4.1.27/drivers/md/bcache/
H A Dstats.c16 * Every so often, a timer goes off and rescales the rolling averages.
17 * accounting_rescale[] is how many times the timer has to go off before we
21 * accounting_delay is how often the timer goes off - 22 times in 5 minutes,
124 if (del_timer_sync(&acc->timer)) bch_cache_accounting_destroy()
175 acc->timer.expires += accounting_delay; scale_accounting()
178 add_timer(&acc->timer); scale_accounting()
236 init_timer(&acc->timer); bch_cache_accounting_init()
237 acc->timer.expires = jiffies + accounting_delay; bch_cache_accounting_init()
238 acc->timer.data = (unsigned long) acc; bch_cache_accounting_init()
239 acc->timer.function = scale_accounting; bch_cache_accounting_init()
240 add_timer(&acc->timer); bch_cache_accounting_init()
/linux-4.1.27/drivers/net/ethernet/dec/tulip/
H A DMakefile18 timer.o tulip_core.o \
/linux-4.1.27/drivers/scsi/bnx2fc/
H A Dbnx2fc_constants.h74 /* E_D_TOV timer resolution in ms */
77 /* E_D_TOV timer resolution for SDM (4 micro) */
81 /* REC timer resolution in ms */
84 /* REC timer resolution for SDM (4 micro) */
87 /* E_D_TOV timer default wraparound value (2 sec) in 20 ms resolution */
91 /* REC_TOV timer default wraparound value (3 sec) in 20 ms resolution */
101 /* In case timer services are required then shall be updated by Xstorm after
102 * start processing the task. In case no timer facilities are required then the
106 * After driver has initialize the task in case timer services required *
109 /* After driver has initialize the task in case timer services required */
111 /* In case timer services are required then shall be updated by Xstorm after
112 * start processing the task. In case no timer facilities are required then the
120 /* For E_D_T_TOV timer expiration in Xstorm (Class 2 only) */
122 /* For REC_TOV timer expiration indication received from Xstorm */
137 /* For REC_TOV timer expiration indication received from Xstorm */
139 /* For E_D_T_TOV timer expiration in Ustorm */
/linux-4.1.27/arch/metag/kernel/
H A Dtime.c23 /* Set up the timer clock sources */ time_init()
/linux-4.1.27/include/net/
H A Dflowcache.h6 #include <linux/timer.h>
/linux-4.1.27/arch/mips/jz4740/
H A Dtimer.c3 * JZ4740 platform timer support
21 #include <asm/mach-jz4740/timer.h>
43 panic("Failed to ioremap timer registers"); jz4740_timer_init()
45 /* Disable all timer clocks except for those used as system timers */ jz4740_timer_init()
/linux-4.1.27/arch/mips/sgi-ip27/
H A DMakefile6 ip27-memory.o ip27-nmi.o ip27-reset.o ip27-timer.o ip27-hubio.o \
/linux-4.1.27/arch/ia64/sn/kernel/sn2/
H A DMakefile15 prominfo_proc.o timer.o timer_interrupt.o sn_hwperf.o
H A Dtimer.c2 * linux/arch/ia64/sn/kernel/sn2/timer.c
6 * David Mosberger <davidm@hpl.hp.com>: updated for new timer-interpolation infrastructure
/linux-4.1.27/arch/arm/mach-ux500/
H A DMakefile5 obj-y := cpu.o id.o timer.o pm.o
/linux-4.1.27/arch/arm/common/
H A DMakefile14 obj-$(CONFIG_ARM_TIMER_SP804) += timer-sp.o
/linux-4.1.27/net/irda/
H A DMakefile11 irlap.o irlap_event.o irlap_frame.o timer.o qos.o irqueue.o \
/linux-4.1.27/include/net/irda/
H A Dtimer.h3 * Filename: timer.h
30 #include <linux/timer.h>
50 * Normally twice of p-timer. Note 3, IrLAP 6.3.11.2 - p. 60 suggests
51 * at least twice duration of the P-timer.
59 * Slot timer must never exceed 85 ms, and must always be at least 25 ms,
83 /* Set new value for timer (update or add timer). irda_start_timer()
/linux-4.1.27/arch/mips/kernel/
H A Dtime.c67 * (only needed if you intended to use cpu counter as timer interrupt
79 * initializes an interrupt timer now takes care of its own request_irq rsp.
125 * The use of the R4k timer as a clock event takes precedence; time_init()
126 * if reading the Count register might interfere with the timer time_init()
127 * interrupt, then we don't use the timer as a clock source. time_init()
128 * We may still use the timer as a clock source though if the time_init()
129 * timer interrupt isn't reliable; the interference doesn't time_init()
H A Dcevt-r4k.c42 * Return true if the timer interrupt should not be checked
48 * timer interrupt (cp0_perfcount_irq < 0). If it is and a handle_perf_irq()
51 * happened (!r2) then don't check for a timer interrupt. handle_perf_irq()
75 * above we now know that the reason we got here must be a timer c0_compare_interrupt()
93 * IRQF_SHARED: The timer interrupt may be shared with other interrupts
97 .name = "timer",
116 * so wait up to worst case number of cycle counter ticks for timer interrupt
131 * IP7 already pending? Try to clear it by acking the timer. c0_compare_int_usable()
151 /* increase delta if the timer was already expired */ c0_compare_int_usable()
172 * Feels like a real count / compare timer. c0_compare_int_usable()
/linux-4.1.27/arch/mn10300/unit-asb2364/include/unit/
H A Dtimex.h1 /* timex.h: MN2WS0038 architecture timer specifications
14 #include <asm/timer-regs.h>
41 # error MTM tick timer interval value is overflow.
66 * If we aren't using broadcasting, each core needs its own event timer.
67 * Since CPU0 uses the tick timer which is 24-bits, we use timer 4 & 5
122 /* set up TMS(Timestamp) 32bit timer register to count real time startup_timestamp_counter()
/linux-4.1.27/arch/frv/include/asm/
H A Dtimer-regs.h0 /* timer-regs.h: hardware timer register definitions
71 /* timer control register - non-readback mode */
84 /* timer control register - readback mode */
92 /* timer control status registers - non-readback mode */
95 /* timer control status registers - readback mode */
101 /* timer clock select registers */
/linux-4.1.27/arch/openrisc/kernel/
H A Dtime.c44 * Keep timer in continuous mode always. openrisc_timer_set_next_event()
74 /* This is the clock event device based on the OR1K tick timer.
75 * As the timer is being used as a continuous clock-source (required for HR
76 * timers) we cannot enable the PERIODIC feature. The tick timer can run using
91 /* This can be done very simply... we just need to keep the timer timer_ack()
99 * The timer interrupt is mostly handled in generic code nowadays... this
103 * This function needs to be called by the timer exception handler and that's
138 * Clocksource: Based on OpenRISC timer/counter
140 * This sets up the OpenRISC Tick Timer as a clock source. The tick timer
174 panic("Linux not supported on devices without tick timer"); time_init()
/linux-4.1.27/net/bridge/
H A Dbr_stp_timer.c2 * Spanning tree protocol; timer-related code
38 br_debug(br, "hello timer expired\n"); br_hello_timer_expired()
63 * According to the spec, the message age timer cannot be br_message_age_timer_expired()
86 br_debug(br, "port %u(%s) forward delay timer\n", br_forward_delay_timer_expired()
110 br_debug(br, "tcn timer expired\n"); br_tcn_timer_expired()
124 br_debug(br, "topo change timer expired\n"); br_topology_change_timer_expired()
135 br_debug(p->br, "port %u(%s) hold timer expired\n", br_hold_timer_expired()
172 unsigned long br_timer_value(const struct timer_list *timer) br_timer_value() argument
174 return timer_pending(timer) br_timer_value()
175 ? jiffies_delta_to_clock_t(timer->expires - jiffies) : 0; br_timer_value()
/linux-4.1.27/arch/sparc/kernel/
H A Dirq.h47 #define FEAT_L10_CLOCKSOURCE (1 << 0) /* L10 timer is used as a clocksource */
48 #define FEAT_L10_CLOCKEVENT (1 << 1) /* L10 timer is used as a clockevent */
49 #define FEAT_L14_ONESHOT (1 << 2) /* L14 timer clockevent can oneshot */
64 /* clock rate used for clock event timer */
67 /* one period for clock source timer */
/linux-4.1.27/arch/m68k/68000/
H A Dtimers.c4 * timers.c - Generic hardware timer support.
72 .name = "timer",
94 .name = "timer",
105 /* disable timer 1 */ hw_timer_init()
116 /* Enable timer 1 */ hw_timer_init()
/linux-4.1.27/arch/tile/kernel/
H A Dtime.c14 * Support the cycle counter clocksource and tile timer clock event device.
111 /* Start up the tile-timer interrupt source on the boot cpu. */ time_init()
116 * Define the tile timer clock event device. The timer is driven by
123 * we can possibly cover with the timer, based on MAX_TICK combined
127 #define MAX_TICK 0x7fffffff /* we have 31 bits of countdown timer */
128 #define TILE_MINSEC 5 /* timer covers no more than 5 seconds */
154 .name = "tile timer",
174 /* Start out with timer not firing. */ setup_tile_timer()
177 /* Register tile timer. */ setup_tile_timer()
188 * Mask the timer interrupt here, since we are a oneshot timer do_timer_interrupt()
199 /* Call the generic timer handler */ do_timer_interrupt()
229 * Use the tile timer to convert nsecs to core clock cycles, relying
241 * as in clocksource.h and x86's timer.h, we split the calculation ns2cycles()
/linux-4.1.27/arch/metag/tbx/
H A Dtbitimer.S10 * TBI timer support routines and data values
51 * Initialise or stop timer support
66 MOVT D0FrT,#HI(___TBITimeCore) /* Get timer core reg values */
82 * D0Ar6 is assumed to be the timer value read
91 MOVT D0FrT,#HI(___TBITimeCore) /* Get timer core reg values */
102 * Register Usage: D1Ar1 holds Id, D0Ar2 holds value to be added to the timer
106 * D0Ar6 is assumed to be the timer value read
115 MOVT D0FrT,#HI(___TBITimeCore) /* Get timer core reg values */
121 ADD D1Ar3,D1Ar3,D1Re0 /* ... real timer ... */
137 * D0Ar6 is assumed to be the timer value read
147 MOVT D0FrT,#HI(___TBITimeCore) /* Get timer core reg values */
153 ADD D1Ar3,D1Ar3,D1Re0 /* ... real timer ... */
161 * Perform core timer access logic
166 * On return D0Ar6, D1Ar5 holds the old 64-bit timer value
177 TSTT D1Ar1,#HI(TBID_ISTAT_BIT) /* Interrupt level timer? */
/linux-4.1.27/drivers/isdn/divert/
H A Disdn_divert.c14 #include <linux/timer.h>
27 struct timer_list timer; /* timer control structure */ member in struct:call_struc
56 /* timer callback function */
64 del_timer(&cs->timer); /* delete active timer */ deflect_timer_expire()
73 cs->timer.expires = jiffies + (HZ * AUTODEL_TIME); deflect_timer_expire()
74 add_timer(&cs->timer); deflect_timer_expire()
85 cs->timer.expires = jiffies + (HZ * AUTODEL_TIME); deflect_timer_expire()
86 add_timer(&cs->timer); deflect_timer_expire()
160 init_timer(&cs->timer); cf_command()
162 cs->timer.function = deflect_timer_expire; cf_command()
163 cs->timer.data = (ulong) cs; /* pointer to own structure */ cf_command()
226 del_timer(&cs->timer); deflect_extern_action()
231 cs->timer.expires = jiffies + (HZ * AUTODEL_TIME); deflect_extern_action()
232 add_timer(&cs->timer); deflect_extern_action()
239 del_timer(&cs->timer); deflect_extern_action()
244 cs->timer.expires = jiffies + (HZ * AUTODEL_TIME); deflect_extern_action()
245 add_timer(&cs->timer); deflect_extern_action()
252 del_timer(&cs->timer); deflect_extern_action()
259 cs->timer.expires = jiffies + (HZ * AUTODEL_TIME); deflect_extern_action()
260 add_timer(&cs->timer); deflect_extern_action()
455 init_timer(&cs->timer); isdn_divert_icall()
457 cs->timer.function = deflect_timer_expire; isdn_divert_icall()
458 cs->timer.data = (ulong) cs; /* pointer to own structure */ isdn_divert_icall()
465 cs->timer.expires = jiffies + (HZ * dv->rule.waittime); isdn_divert_icall()
467 cs->timer.expires = jiffies + (HZ * extern_wait_max); isdn_divert_icall()
469 cs->timer.expires = 0; isdn_divert_icall()
477 if (!cs->timer.expires) { isdn_divert_icall()
483 cs->timer.expires = jiffies + (HZ * AUTODEL_TIME); isdn_divert_icall()
522 if (cs->timer.expires) add_timer(&cs->timer); isdn_divert_icall()
541 del_timer(&cs->timer); deleteprocs()
755 del_timer(&cs1->timer); prot_stat_callback()
787 del_timer(&cs->timer); isdn_divert_stat_callback()
797 del_timer(&cs->timer); isdn_divert_stat_callback()
/linux-4.1.27/sound/core/seq/
H A Dseq_queue.c125 q->timer = snd_seq_timer_new(); queue_new()
126 if (q->tickq == NULL || q->timeq == NULL || q->timer == NULL) { queue_new()
129 snd_seq_timer_delete(&q->timer); queue_new()
144 /* stop and release the timer */ queue_delete()
146 snd_seq_timer_stop(q->timer); queue_delete()
154 snd_seq_timer_delete(&q->timer); queue_delete()
275 if (snd_seq_compare_tick_time(&q->timer->tick.cur_tick, snd_seq_check_queue()
289 if (snd_seq_compare_real_time(&q->timer->cur_time, snd_seq_check_queue()
328 cell->event.time.tick += q->timer->tick.cur_tick; snd_seq_enqueue_event()
333 &q->timer->cur_time); snd_seq_enqueue_event()
442 /* open timer -
455 tmr = queue->timer; snd_seq_queue_timer_open()
464 /* close timer -
494 result = snd_seq_timer_set_tempo(q->timer, info->tempo); snd_seq_queue_timer_set_tempo()
496 result = snd_seq_timer_set_ppq(q->timer, info->ppq); snd_seq_queue_timer_set_tempo()
498 result = snd_seq_timer_set_skew(q->timer, info->skew_value, snd_seq_queue_timer_set_tempo()
507 * if it is the first client, starts the timer.
508 * if it is not longer used by any clients, stop the timer.
527 snd_seq_timer_defaults(queue->timer); snd_seq_queue_use()
559 * stop the timer on all queues owned by this client
575 if (q->timer->running) snd_seq_queue_client_termination()
576 snd_seq_timer_stop(q->timer); snd_seq_queue_client_termination()
577 snd_seq_timer_reset(q->timer); snd_seq_queue_client_termination()
664 sev.time.tick = q->timer->tick.cur_tick; queue_broadcast_event()
687 if (! snd_seq_timer_start(q->timer)) snd_seq_queue_process_event()
692 if (! snd_seq_timer_continue(q->timer)) snd_seq_queue_process_event()
697 snd_seq_timer_stop(q->timer); snd_seq_queue_process_event()
702 snd_seq_timer_set_tempo(q->timer, ev->data.queue.param.value); snd_seq_queue_process_event()
707 if (snd_seq_timer_set_position_tick(q->timer, ev->data.queue.param.time.tick) == 0) { snd_seq_queue_process_event()
713 if (snd_seq_timer_set_position_time(q->timer, ev->data.queue.param.time.time) == 0) { snd_seq_queue_process_event()
718 if (snd_seq_timer_set_skew(q->timer, snd_seq_queue_process_event()
729 * Queue control via timer control port:
730 * this function is exported as a callback of timer port.
771 tmr = q->timer; snd_seq_info_queues_read()
782 snd_iprintf(buffer, "timer state : %s\n", tmr->running ? "Running" : "Stopped"); snd_seq_info_queues_read()
783 snd_iprintf(buffer, "timer PPQ : %d\n", tmr->ppq); snd_seq_info_queues_read()
H A Dseq_timer.h24 #include <sound/timer.h>
37 initialized:1; /* timer is initialized */
46 int type; /* timer type */
47 struct snd_timer_id alsa_id; /* ALSA's timer ID */
48 struct snd_timer_instance *timeri; /* timer instance */
50 unsigned long preferred_resolution; /* timer resolution, ticks/sec */
61 /* create new timer (constructor) */
64 /* delete timer (destructor) */
122 /* called by timer isr */
H A Dseq.c66 MODULE_PARM_DESC(seq_default_timer_class, "The default timer class.");
68 MODULE_PARM_DESC(seq_default_timer_sclass, "The default timer slave class.");
70 MODULE_PARM_DESC(seq_default_timer_card, "The default timer card number.");
72 MODULE_PARM_DESC(seq_default_timer_device, "The default timer device number.");
74 MODULE_PARM_DESC(seq_default_timer_subdevice, "The default timer subdevice number.");
76 MODULE_PARM_DESC(seq_default_timer_resolution, "The default timer resolution in Hz.");
H A Dseq_timer.c29 /* allowed sequencer timer frequencies, in Hz */
53 /* create new timer (constructor) */ snd_seq_timer_new()
72 /* delete timer (destructor) */ snd_seq_timer_delete()
79 pr_debug("ALSA: seq: snd_seq_timer_delete() called with NULL timer\n"); snd_seq_timer_delete()
134 /* called by timer interrupt routine. the period time since previous invocation is passed */ snd_seq_timer_interrupt()
145 tmr = q->timer; snd_seq_timer_interrupt()
161 /* update timer */ snd_seq_timer_interrupt()
167 /* register actual time of this timer update */ snd_seq_timer_interrupt()
208 pr_debug("ALSA: seq: cannot change ppq of a running timer\n"); snd_seq_timer_set_ppq()
250 /* set timer skew */ snd_seq_timer_set_skew()
277 tmr = q->timer; snd_seq_timer_open()
283 if (tmr->type != SNDRV_SEQ_TIMER_ALSA) /* standard ALSA timer */ snd_seq_timer_open()
301 pr_err("ALSA: seq fatal error: cannot create timer (%i)\n", err); snd_seq_timer_open()
318 tmr = q->timer; snd_seq_timer_close()
357 t = tmr->timeri->timer; initialize_timer()
487 if ((tmr = q->timer) == NULL || snd_seq_info_timer_read()
492 snd_iprintf(buffer, "Timer for queue %i : %s\n", q->queue, ti->timer->name); snd_seq_info_timer_read()
/linux-4.1.27/arch/mips/include/asm/netlogic/xlr/
H A Dpic.h105 #define PIC_CTRL_STE 8 /* timer enable start bit */
267 nlm_pic_read_timer(uint64_t base, int timer) nlm_pic_read_timer() argument
271 up1 = nlm_read_reg(base, PIC_TIMER_COUNT_1(timer)); nlm_pic_read_timer()
272 low = nlm_read_reg(base, PIC_TIMER_COUNT_0(timer)); nlm_pic_read_timer()
273 up2 = nlm_read_reg(base, PIC_TIMER_COUNT_1(timer)); nlm_pic_read_timer()
276 low = nlm_read_reg(base, PIC_TIMER_COUNT_0(timer)); nlm_pic_read_timer()
282 nlm_pic_read_timer32(uint64_t base, int timer) nlm_pic_read_timer32() argument
284 return nlm_read_reg(base, PIC_TIMER_COUNT_0(timer)); nlm_pic_read_timer32()
288 nlm_pic_set_timer(uint64_t base, int timer, uint64_t value, int irq, int cpu) nlm_pic_set_timer() argument
297 nlm_write_reg(base, PIC_TIMER_MAXVAL_0(timer), low); nlm_pic_set_timer()
298 nlm_write_reg(base, PIC_TIMER_MAXVAL_1(timer), up); nlm_pic_set_timer()
299 nlm_pic_init_irt(base, PIC_IRT_TIMER_INDEX(timer), irq, cpu, 0); nlm_pic_set_timer()
301 /* enable the timer */ nlm_pic_set_timer()
302 pic_ctrl |= (1 << (PIC_CTRL_STE + timer)); nlm_pic_set_timer()
/linux-4.1.27/arch/cris/arch-v10/kernel/
H A Dtime.c61 /* The timer interrupt comes from Etrax timer 0. In order to get cris_v10_gettimeoffset()
67 /* Convert timer value to nsec */ cris_v10_gettimeoffset()
73 * 3.10.4 Watchdog timer
75 * When the watchdog timer is started, it generates an NMI if the watchdog
78 * The watchdog timer is stopped after reset. The watchdog timer is controlled
143 /* acknowledge the timer irq */ timer_interrupt()
165 /* call the real timer interrupt handler */ timer_interrupt()
172 /* timer is IRQF_SHARED so drivers can add stuff to the timer irq chain */
177 .name = "timer",
197 * timer settings below (hz and divide factor) !!! time_init()
244 /* unmask the timer irq */ time_init()
/linux-4.1.27/arch/m68k/mvme147/
H A Dconfig.c68 m147_pcc->watchdog = 0x0a; /* Clear timer */ mvme147_reset()
106 /* Using pcc tick timer 1 */
119 if (request_irq(PCC_IRQ_TIMER1, mvme147_timer_int, 0, "timer 1", NULL)) mvme147_sched_init()
120 pr_err("Couldn't register timer interrupt\n"); mvme147_sched_init()
125 m147_pcc->t1_cntrl = 0x0; /* clear timer */ mvme147_sched_init()
126 m147_pcc->t1_cntrl = 0x3; /* start timer */ mvme147_sched_init()
/linux-4.1.27/arch/arm/plat-iop/
H A Dtime.c34 * Minimum clocksource/clockevent timer range in seconds
39 * IOP clocksource (free-running timer 1).
63 * IOP clockevents (interrupting timer 0).
93 /* ->set_next_event sets period and enables timer */ iop_set_mode()
154 * Set up interrupting clockevent timer 0. iop_init_time()
164 * Set up free-running clocksource timer 1. iop_init_time()
/linux-4.1.27/arch/arm/mach-gemini/
H A Dtime.c70 /* Start the timer */ gemini_timer_set_mode()
86 * arm the timer instead. gemini_timer_set_mode()
108 * IRQ handler for the timer
125 * Set up timer interrupt, and return the current time in seconds.
154 * Make irqs happen for the system timer gemini_timer_init()
165 pr_err("timer: failed to initialize gemini clock source\n"); gemini_timer_init()
/linux-4.1.27/arch/arm/kernel/
H A Dsmp_twd.c52 /* period set, and timer enabled in 'next_event' hook */ twd_set_mode()
78 * local_timer_ack: checks for a local timer interrupt.
80 * If a local timer interrupt has occurred, acknowledge and return 1.
121 * frequency. The timer is local to a cpu, so cross-call to the twd_rate_change()
166 * frequency. The timer is local to a cpu, so cross-call to the twd_cpufreq_transition()
199 * the timer ticks twd_calibrate_rate()
202 pr_info("Calibrating local timer... "); twd_calibrate_rate()
210 /* OK, now the tick has started, let's get the timer going */ twd_calibrate_rate()
351 * Immediately configure the timer on the boot CPU, unless we need twd_local_timer_common_register()
353 * setup the timer in late_time_init. twd_local_timer_common_register()
411 CLOCKSOURCE_OF_DECLARE(arm_twd_a9, "arm,cortex-a9-twd-timer", twd_local_timer_of_register);
412 CLOCKSOURCE_OF_DECLARE(arm_twd_a5, "arm,cortex-a5-twd-timer", twd_local_timer_of_register);
413 CLOCKSOURCE_OF_DECLARE(arm_twd_11mp, "arm,arm11mp-twd-timer", twd_local_timer_of_register);
/linux-4.1.27/arch/arc/kernel/
H A Dtime.c48 #define ARC_REG_TIMER0_LIMIT 0x23 /* timer 0 limit */
49 #define ARC_REG_TIMER0_CTRL 0x22 /* timer 0 control */
50 #define ARC_REG_TIMER0_CNT 0x21 /* timer 0 count */
51 #define ARC_REG_TIMER1_LIMIT 0x102 /* timer 1 limit */
52 #define ARC_REG_TIMER1_CTRL 0x101 /* timer 1 control */
53 #define ARC_REG_TIMER1_CNT 0x100 /* timer 1 count */
147 * Arm the timer to interrupt after @cycles
218 * Setup the local event timer for @cpu
229 /* setup the per-cpu timer IRQ handler - for all cpus */ arc_local_timer_setup()
238 * -Also sets up any global state needed for timer subsystem:
239 * - for "counting" timer, registers a clocksource, usable across CPUs
241 * - for "event" timer, sets up TIMER0 IRQ (as that is platform agnostic)
256 /* sets up the periodic event timer */ time_init()
/linux-4.1.27/drivers/infiniband/hw/mthca/
H A Dmthca_catas.c35 #include <linux/timer.h>
144 mod_timer(&dev->catas_err.timer, poll_catas()
152 init_timer(&dev->catas_err.timer); mthca_start_catas_poll()
167 dev->catas_err.timer.data = (unsigned long) dev; mthca_start_catas_poll()
168 dev->catas_err.timer.function = poll_catas; mthca_start_catas_poll()
169 dev->catas_err.timer.expires = jiffies + MTHCA_CATAS_POLL_INTERVAL; mthca_start_catas_poll()
171 add_timer(&dev->catas_err.timer); mthca_start_catas_poll()
176 del_timer_sync(&dev->catas_err.timer); mthca_stop_catas_poll()
/linux-4.1.27/arch/x86/kvm/
H A Di8254.h20 u8 gate; /* timer start */
29 struct hrtimer timer; member in struct:kvm_kpit_state
/linux-4.1.27/arch/sh/kernel/
H A Dlocaltimer.c2 * Dummy local timer
31 * Used on SMP for either the local timer or SMP_MSG_TIMER
/linux-4.1.27/drivers/acpi/acpica/
H A Dhwtimer.c59 * RETURN: Status and timer resolution
87 * PARAMETERS: ticks - Where the timer value is returned ACPI_EXPORT_SYMBOL()
89 * RETURN: Status and current timer value (ticks) ACPI_EXPORT_SYMBOL()
128 * rollovers, the timer resolution, and timer frequency. ACPI_EXPORT_SYMBOL()
133 * a versatile and accurate timer. ACPI_EXPORT_SYMBOL()
135 * Note that this function accommodates only a single timer ACPI_EXPORT_SYMBOL()
165 * Handle (max one) timer rollovers on 24-bit versus 32-bit timers. ACPI_EXPORT_SYMBOL()
/linux-4.1.27/arch/score/include/asm/
H A Dscoreregs.h45 #define TMR_M_FREE 0x0000 /* free running timer mode */
46 #define TMR_M_PERIODIC 0x0400 /* periodic timer mode */
/linux-4.1.27/arch/mips/lantiq/xway/
H A Dgptu.c34 /* timer control register */
36 /* timer auto reload register */
38 /* timer manual reload register */
40 /* timer count register */
77 int timer = irq - irqres[0].start; timer_irq_handler() local
78 gptu_w32(1 << timer, GPTU_IRNCR); timer_irq_handler()
123 unsigned int timer) clkdev_add_gptu()
132 clk->bits = timer; clkdev_add_gptu()
122 clkdev_add_gptu(struct device *dev, const char *con, unsigned int timer) clkdev_add_gptu() argument
/linux-4.1.27/arch/arm/mach-w90x900/include/mach/
H A Dregs-timer.h2 * arch/arm/mach-w90x900/include/mach/regs-timer.h
9 * Based on arch/arm/mach-s3c2410/include/mach/regs-timer.h
/linux-4.1.27/arch/xtensa/include/asm/
H A Dparam.h15 # define HZ CONFIG_HZ /* internal timer frequency */
/linux-4.1.27/drivers/pps/clients/
H A Dpps-ktimer.c2 * pps-ktimer.c -- kernel timer test client
28 #include <linux/timer.h>
39 * The kernel timer
100 MODULE_DESCRIPTION("dummy PPS source by using a kernel timer (just for debug)");

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