Searched refs:SOC (Results 1 - 115 of 115) sorted by relevance

/linux-4.1.27/drivers/soc/ti/
H A DMakefile2 # TI Keystone SOC drivers
/linux-4.1.27/arch/arm/include/debug/
H A Dux500.S18 * DEBUG_LL only works if only one SOC is built in. We don't use #else below
19 * in order to get "__UX500_UART redefined" warnings if more than one SOC is
35 #error Unknown SOC
/linux-4.1.27/arch/powerpc/include/asm/
H A Dmpc85xx.h15 #define SVR_REV(svr) ((svr) & 0xFF) /* SOC design resision */
19 /* Some parts define SVR[0:23] as the SOC version */
20 #define SVR_SOC_VER(svr) (((svr) >> 8) & 0xFFF7FF) /* SOC Version fields */
H A Dqe.h212 __be16 model; /* The SOC model */
213 u8 major; /* The SOC revision major */
214 u8 minor; /* The SOC revision minor */
/linux-4.1.27/arch/mips/include/asm/mips-boards/
H A Dmaltaint.h39 /* SOC-it Classic interrupt offsets */
48 /* SOC-it EIC interrupt offsets */
H A Dgeneric.h47 * CoreEMUL with SOC-it 101 System Controller is treated like a CoreMSC
/linux-4.1.27/arch/mips/kernel/
H A Dirq-msc01.c80 * Interrupt handler for interrupts coming from SOC-it.
102 .name = "SOC-it-Level",
111 .name = "SOC-it-Edge",
/linux-4.1.27/arch/powerpc/boot/
H A Dfsl-soc.c2 * Freescale SOC support functions
/linux-4.1.27/arch/arm/mach-keystone/
H A Dplatsmp.c2 * Keystone SOC SMP platform code
H A Dkeystone.c2 * Keystone2 based boards and SOC related code.
/linux-4.1.27/arch/mips/include/asm/
H A Dbootinfo.h80 #define MACH_INGENIC_JZ4730 0 /* JZ4730 SOC */
81 #define MACH_INGENIC_JZ4740 1 /* JZ4740 SOC */
/linux-4.1.27/arch/x86/platform/intel-mid/
H A Dmrfl.c41 pr_debug("Actual FSB frequency detected by SOC 0x%x : %x\n", tangier_calibrate_tsc()
/linux-4.1.27/arch/mips/include/asm/mach-rc32434/
H A Dcpu-feature-overrides.h29 * The IDT RC32434 SOC has a built-in MIPS 4Kc core.
/linux-4.1.27/arch/arm/mach-ux500/
H A Did.c65 * SOC MIDR ASICID ADDRESS ASICID VALUE
/linux-4.1.27/include/linux/can/platform/
H A Dti_hecc.h33 * RAM and mailbox offsets for different SOC's
/linux-4.1.27/drivers/scsi/mvsas/
H A Dmv_64xx.h39 MVS_PHY_CTL = 0x40, /* SOC PHY Control */
40 MVS_PORTS_IMP = 0x9C, /* SOC Port Implemented */
H A Dmv_94xx.h46 MVS_PHY_CTL = 0x40, /* SOC PHY Control */
47 MVS_PORTS_IMP = 0x9C, /* SOC Port Implemented */
/linux-4.1.27/drivers/thermal/samsung/
H A Dexynos_tmu.h49 * @type: determines the type of SOC
H A Dexynos_tmu.c151 * @soc: id of the SOC type.
1008 * TODO: Add regulator as an SOC feature, so that regulator enable exynos_map_dt_data()
/linux-4.1.27/drivers/usb/host/
H A Dehci-fsl.h21 /* offsets for the non-ehci registers in the FSL SOC USB controller */
H A Dehci-spear.c2 * Driver for EHCI HCD on SPEAr SOC
H A Dehci-mem.c30 * There's also "register" data (e.g. PCI or SOC), which is memory mapped.
H A Dehci-fsl.c57 pr_debug("initializing FSL-SOC USB Controller\n"); usb_hcd_fsl_probe()
H A Dohci-dbg.c129 "cmdstatus 0x%05x SOC=%d%s%s%s%s\n", temp, ohci_dump_status()
H A Dfotg210-hcd.c1877 * There's also "register" data (e.g. PCI or SOC), which is memory mapped.
H A Dfusbh200-hcd.c1829 * There's also "register" data (e.g. PCI or SOC), which is memory mapped.
/linux-4.1.27/arch/mips/sibyte/swarm/
H A Dplatform.c117 /* Set the number of available units based on the SOC type. */ sb1250_device_init()
/linux-4.1.27/drivers/net/wireless/brcm80211/brcmsmac/
H A Daiutils.h25 * SOC Interconnect Address Map.
46 /* SOC Interconnect types (aka chip types) */
75 /* Not really related to SOC Interconnect, but a couple of software
/linux-4.1.27/arch/x86/include/asm/
H A Dpmc_atom.h2 * Intel Atom SOC Power Management Controller Header File
/linux-4.1.27/drivers/base/
H A Dsoc.c124 /* Fetch a unique (reclaimable) SOC ID. */ soc_device_register()
/linux-4.1.27/drivers/power/reset/
H A Dkeystone-reset.c61 /* reset the SOC */ rsctrl_restart_handler()
/linux-4.1.27/arch/mips/pci/
H A Dfixup-malta.c34 {0, 0, 0, 0, 0 }, /* 17: Bonito/SOC-it PCI Bridge*/
/linux-4.1.27/drivers/net/wireless/ath/ath6kl/
H A Dbmi.h104 * Semantics: Read a 32-bit Target SOC register.
114 * Semantics: Write a 32-bit Target SOC register.
H A Dbmi.c339 ath6kl_dbg(ATH6KL_DBG_BMI, "bmi read SOC reg: addr: 0x%x\n", addr); ath6kl_bmi_reg_read()
383 "bmi write SOC reg: addr: 0x%x, param: %d\n", ath6kl_bmi_reg_write()
/linux-4.1.27/arch/x86/kernel/
H A Dpmc_atom.c2 * Intel Atom SOC Power Management Controller Driver
370 MODULE_DESCRIPTION("Intel Atom SOC Power Management Controller Interface");
H A Diosf_mbi.c15 * The IOSF-SB is a fabric bus available on Atom based SOC's that uses a
/linux-4.1.27/arch/powerpc/platforms/83xx/
H A Dusb.c2 * Freescale 83xx USB SOC setup code
167 /* Map USB SOC space */ mpc831x_usb_cfg()
/linux-4.1.27/arch/mips/netlogic/xlp/
H A Dusb-init-xlp2.c246 /* Fixup the IRQ for USB devices which is exist on XLP9XX SOC PCIE bus */ nlm_xlp9xx_usb_fixup_final()
267 /* Fixup the IRQ for USB devices which is exist on XLP2XX SOC PCIE bus */ nlm_xlp2xx_usb_fixup_final()
H A Dusb-init.c120 /* Fixup the IRQ for USB devices which is exist on XLP SOC PCIE bus */ nlm_usb_fixup_final()
/linux-4.1.27/drivers/power/
H A Dmax17042_battery.c465 /* Update SOC register with new SOC */ max17042_load_new_capacity_params()
534 * to perform signal debouncing and initial SOC reporting max17042_init_chip()
600 dev_info(&chip->client->dev, "SOC threshold INTR\n"); max17042_thread_handler()
804 /* re-program the SOC thresholds to 1% change */ max17042_resume()
H A Djz4740-battery.c2 * Battery measurement code for Ingenic JZ SOC.
H A D88pm860x_battery.c510 /* restore SOC from RTC domain register */ pm860x_init_battery()
H A Dcharger-manager.c957 /* Do not adjust SOC when charging: voltage is overrated */ charger_get_property()
/linux-4.1.27/drivers/pcmcia/
H A Dsoc_common.h113 * If provided, the get_timing routine overrides the SOC default.
/linux-4.1.27/drivers/cpufreq/
H A Delanfreq.c74 * Finds out at which frequency the CPU of the Elan SOC runs
/linux-4.1.27/include/uapi/linux/
H A Dserial_core.h159 /* Broadcom SB1250, etc. SOC */
/linux-4.1.27/arch/mips/mti-malta/
H A Dmalta-memory.c68 /* SOC-it swaps, or perhaps doesn't swap, when DMA'ing the last fw_getmdesc()
/linux-4.1.27/arch/mips/sibyte/sb1250/
H A Dsetup.c172 printk("Unknown SOC type %x\n", soc_type); sys_rev_decode()
/linux-4.1.27/include/linux/mfd/da9052/
H A Dda9052.h104 /* SOC I/O transfer related fixes for DA9052/53 */
/linux-4.1.27/drivers/media/dvb-frontends/
H A Ddib0090.c90 /* Use those defines to identify SOC version */
91 #define SOC 0x02 macro
365 if ((identity->version & 0x3) == SOC) { dib0090_identify()
369 dprintk("SOC 8090 P1-G11R1 Has been detected"); dib0090_identify()
373 dprintk("SOC 8090 P1-G21R1 Has been detected"); dib0090_identify()
377 dprintk("SOC 7090 P1-G11R1 Has been detected"); dib0090_identify()
381 dprintk("SOC 7090 P1-G21R1 Has been detected"); dib0090_identify()
455 if ((identity->version & 0x3) == SOC) { dib0090_fw_identify()
459 dprintk("SOC 8090 P1-G11R1 Has been detected"); dib0090_fw_identify()
463 dprintk("SOC 8090 P1-G21R1 Has been detected"); dib0090_fw_identify()
467 dprintk("SOC 7090 P1-G11R1 Has been detected"); dib0090_fw_identify()
471 dprintk("SOC 7090 P1-G21R1 Has been detected"); dib0090_fw_identify()
1577 /* Update the efuse : Only available for KROSUS > P1C and SOC as well*/ dib0090_reset()
2141 if (state->rest == 0 || state->identity.in_soc) { /* Just for 8090P SOCS where auto captrim HW bug : TO CHECK IN ACI for SOCS !!! if 400 for 8090p SOC => tune issue !!! */ dib0090_captrim_search()
2273 /* if soc and AGC pwm control, disengage mux to be able to R/W access to 0x01 register to set the right filter (cutoff_freq_select) during the tune sequence, otherwise, SOC SERPAR error when accessing to 0x01 */ dib0090_tune()
/linux-4.1.27/arch/mips/include/asm/sibyte/
H A Dsb1250_regs.h43 * of the same type on the SOC, the constants below will be
49 * The information in this file is based on the SB1250 SOC
162 /* XXX: not correct; depends on SOC type. */
H A Dsb1250_scd.h132 /* The "peripheral set" (SOC type) is the low 4 bits of the "part" field. */
148 * Calculate correct SOC type given a copy of system revision register.
H A Dbcm1480_regs.h52 * of the same type on the SOC, the constants below will be
/linux-4.1.27/drivers/tty/serial/
H A Ducc_uart.c17 * is the name of the SOC (e.g. 8323), and YZ is the revision of the SOC,
1107 * Obtain the SOC model number and revision level
1109 * This function parses the device tree to obtain the SOC model. It then
1112 * The device tree stores the SOC model two different ways.
1146 /* Extract the SOC number from the "PowerPC," string */ soc_info()
H A Dsb1250-duart.c3 * in the BCM1250 and derived System-On-a-Chip (SOC) devices.
791 /* Set the number of available units based on the SOC type. */ sbd_probe_duarts()
H A Dserial-tegra.c87 * tegra_uart_chip_data: SOC specific data.
/linux-4.1.27/drivers/pinctrl/nomadik/
H A Dpinctrl-abx500.h82 * function between the ABx500 SOC family when using
H A Dpinctrl-ab9540.c359 * ALTERNATFUNC register. We need to specifies these values as SOC
447 * GPIO54 would be logical..., so at SOC point of view we consider
H A Dpinctrl-ab8505.c251 * ALTERNATFUNC register. We need to specifies these values as SOC
H A Dpinctrl-ab8500.c369 * ALTERNATFUNC register. We need to specifies these values as SOC
H A Dpinctrl-abx500.c1219 dev_err(&pdev->dev, "Invalid SOC data\n"); abx500_gpio_probe()
/linux-4.1.27/drivers/usb/gadget/udc/
H A Dmv_udc.h224 /* some SOC has mutiple clock sources for USB*/
H A Dfsl_udc_core.c9 * Freescale high-speed USB SOC DR module device controller driver.
53 #define DRIVER_DESC "Freescale High-Speed USB SOC Device Controller driver"
2412 ERR("This SOC doesn't support device role\n"); fsl_udc_probe()
/linux-4.1.27/arch/mips/sibyte/common/
H A Dbus_watcher.c95 #error bus watcher being built for unknown Sibyte SOC! check_bus_watcher()
/linux-4.1.27/include/linux/gpio/
H A Ddriver.h66 * Example sources would be SOC controllers, FPGAs, multifunction
/linux-4.1.27/sound/soc/codecs/
H A Dcs4270.c315 * @dai: the SOC DAI (ignored)
398 * @dai: the SOC DAI
H A Dsta32x.c645 * @dai: the SOC DAI (ignored)
H A Dsta350.c676 * @dai: the SOC DAI (ignored)
/linux-4.1.27/drivers/net/wireless/rt2x00/
H A Drt2800pci.c66 * SOC devices don't support MCU requests. rt2800pci_mcu_status()
H A Drt2800lib.c438 * SOC devices don't support MCU requests. rt2800_mcu_request()
582 * PCI(e) & SOC devices require firmware with a length rt2800_check_firmware()
1186 /* Check for SoC (SOC devices don't support MCU requests) */ rt2800_brightness_set()
/linux-4.1.27/drivers/rtc/
H A Drtc-sirfsoc.c356 dev_err(&pdev->dev, "Unable to register for the SiRF SOC RTC IRQ\n"); sirfsoc_rtc_probe()
/linux-4.1.27/drivers/bcma/
H A Dscan.c33 { BCMA_CORE_4706_SOC_RAM, "BCM4706 SOC RAM" },
/linux-4.1.27/drivers/pinctrl/
H A Dpinctrl-tegra114.c1675 PINGROUP(gmi_cs1_n_pj2, RSVD1, NAND, GMI, SOC, 0x31d8, N, N, N),
1702 PINGROUP(gmi_oe_n_pi1, RSVD1, NAND, GMI, SOC, 0x3244, N, N, N),
1750 PINGROUP(clk_32k_out_pa0, BLINK, SOC, RSVD3, RSVD4, 0x331c, N, N, N),
1783 PINGROUP(hdmi_cec_pee3, CEC, SDMMC3, RSVD3, SOC, 0x33e0, Y, N, N),
H A Dpinctrl-tegra124.c1865 PINGROUP(pk0, RSVD1, SDMMC3, GMI, SOC, 0x31cc, N, N, N),
1868 PINGROUP(pj2, RSVD1, RSVD2, GMI, SOC, 0x31d8, N, N, N),
1939 PINGROUP(kb_row15_ps7, KBC, SOC, RSVD3, RSVD4, 0x32f8, N, N, N),
1948 PINGROUP(clk_32k_out_pa0, BLINK, SOC, RSVD3, RSVD4, 0x331c, N, N, N),
H A Dpinctrl-tegra210.c1447 PINGROUP(clk_32k_out_py5, SOC, BLINK, RSVD2, RSVD3, 0x3164, N, N, N, 0x944, 12, 5, 20, 5, -1, -1, -1, -1),
1516 PINGROUP(pl1, SOC, RSVD1, RSVD2, RSVD3, 0x3278, Y, Y, N, -1, -1, -1, -1, -1, -1, -1, -1, -1),
1522 PINGROUP(pz5, SOC, RSVD1, RSVD2, RSVD3, 0x3290, N, N, N, -1, -1, -1, -1, -1, -1, -1, -1, -1),
H A Dpinctrl-st.c340 /* SOC specific data */
/linux-4.1.27/arch/powerpc/sysdev/
H A Dfsl_lbc.c42 * BR register. If the SOC has eLBC then it returns 32bit physical address
/linux-4.1.27/arch/arm/mach-omap2/
H A Dvoltage.c210 * This API is to be called by the SOC/PMIC file to specify the
/linux-4.1.27/include/linux/
H A Datmel_tc.h19 * Depending on the SOC, each timer may have its own clock and IRQ, or those
H A Ddevice.h672 * and SOC based hardware, Linux often uses platform_data to point
/linux-4.1.27/drivers/iommu/
H A Dfsl_pamu.c984 * there is no worry that a future SOC will inadvertently have one of these
1115 /* Check to see if we need to implement the work-around on this SOC */ fsl_pamu_probe()
1228 * single PAMU node represents all of the PAMU devices in the SOC fsl_pamu_init()
/linux-4.1.27/include/linux/spi/
H A Dspi.h222 * @bus_num: board-specific (and often SOC-specific) identifier for a
321 * board-specific. usually that simplifies to being SOC-specific.
322 * example: one SOC has three SPI controllers, numbered 0..2,
/linux-4.1.27/drivers/gpu/drm/ast/
H A Dast_main.c176 * the SOC scratch register #1 bits 11:8 (interestingly marked ast_detect_chip()
/linux-4.1.27/arch/mips/mm/
H A Dcerr-sb1.c30 * that unsafe... So for now we don't. (BCM1250/BCM112x erratum SOC-48.)
/linux-4.1.27/arch/arm/mach-mvebu/
H A Dpmsu.c16 * other SOC units
/linux-4.1.27/include/linux/mfd/
H A Dsta2x11-mfd.h377 * APB-SOC registers
/linux-4.1.27/drivers/i2c/busses/
H A Di2c-i801.c52 * Avoton (SOC) 0x1f3c 32 hard yes yes yes
60 * BayTrail (SOC) 0x0f12 32 hard yes yes yes
/linux-4.1.27/drivers/net/ethernet/broadcom/
H A Dsb1250-mac.c19 * This driver is designed for the Broadcom SiByte SOC built-in
59 MODULE_DESCRIPTION("Broadcom SiByte SOC GB Ethernet driver");
824 * data portion starts in the middle of a cache line, the SOC sbdma_add_rcvbuffer()
/linux-4.1.27/drivers/net/ethernet/freescale/
H A Dfec_main.c929 * For i.MX6SX SOC, enet use AXI bus, we use disable MAC fec_restart()
1115 * For i.MX6SX SOC, enet use AXI bus, we use disable MAC fec_stop()
3431 /* SOC supply clock to phy, when clock is disabled, phy link down fec_suspend()
3432 * SOC control phy regulator, when regulator is disabled, phy link down fec_suspend()
/linux-4.1.27/drivers/spi/
H A Dspi-bfin-sport.c870 /* Disable the SSP at the peripheral and SOC level */ bfin_sport_spi_remove()
H A Dspi-pxa2xx.c1410 /* Enable SOC clock */ pxa2xx_spi_probe()
1486 /* Disable the SSP at the peripheral and SOC level */ pxa2xx_spi_remove()
H A Dspi-bfin5xx.c1384 /* Disable the SSP at the peripheral and SOC level */ bfin_spi_remove()
H A Dspi.c1504 * SPI controllers use board specific (often SOC specific) bus numbers,
/linux-4.1.27/drivers/gpio/
H A Dgpiolib-sysfs.c765 /* Many systems register gpio chips for SOC support very early, gpiochip_export()
H A Dgpiolib.c27 * get/set operations for common cases, so that access to SOC-integrated
787 * before IRQs are enabled, for non-sleeping (SOC) GPIOs. __gpiod_request()
/linux-4.1.27/arch/mips/cavium-octeon/
H A Docteon-platform.c991 MODULE_DESCRIPTION("Platform driver for Octeon SOC");
/linux-4.1.27/arch/powerpc/platforms/52xx/
H A Dmpc52xx_pic.c370 /* It is an internal SOC irq. Choose the correct irq_chip */ mpc52xx_irqhost_map()
/linux-4.1.27/arch/powerpc/sysdev/qe_lib/
H A Dqe.c411 * The SOC model and revision are not validated, they are only displayed for
/linux-4.1.27/arch/c6x/platforms/
H A Ddscr.c100 /* These are callbacks to SOC-specific code. */
/linux-4.1.27/arch/arm/kernel/
H A Dhead.S504 @ Core indicates it is SMP. Check for Aegis SOC where a single
/linux-4.1.27/sound/soc/mxs/
H A Dmxs-saif.c43 * SAIF is a little different with other normal SOC DAIs on clock using.
/linux-4.1.27/drivers/ata/
H A Dsata_mv.c1560 * SOC chips have an issue whereby the HDD LEDs don't always blink
1562 * of the SOC takes care of it, generating a steady blink rate when
1565 * Unfortunately, the blink mode is a global hardware setting for the SOC,
1566 * so we must use it whenever at least one port on the SOC has NCQ enabled.
1571 * Note that this code assumes that an SOC never has more than one HC onboard.
/linux-4.1.27/drivers/scsi/qla2xxx/
H A Dqla_mr.c519 * qlafx00_warm_reset() - Perform warm reset of iSA(CPUs being reset on SOC).
1569 "current SOC temperature: %d\n", qlafx00_timer_routine()
2074 "ISPFx00(%s): Critical temp timer, current SOC temperature: 0x%x\n", qlafx00_initialize_adapter()
/linux-4.1.27/drivers/net/can/
H A Dflexcan.c187 * SOC Version IP-Version Glitch- [TR]WRN_INT Memory err
/linux-4.1.27/drivers/media/i2c/
H A Ds5k4ecgx.c1032 MODULE_DESCRIPTION("Samsung S5K4ECGX 5MP SOC camera");
/linux-4.1.27/drivers/media/i2c/soc_camera/
H A Dmt9t112.c327 dev_dbg(&client->dev, "SOC CLK : %10u K %s\n", clk, enable); mt9t112_clock_info()
/linux-4.1.27/drivers/media/platform/soc_camera/
H A Datmel-isi.c463 SOC camera operations for the device
H A Domap1_camera.c884 * SOC Camera host operations
/linux-4.1.27/drivers/media/usb/gspca/
H A Dsq930x.c247 {0x01, 0x0001}, /* select IFP/SOC registers */
H A Dzc3xx.c4397 {0xaa, 0x01, 0x0001}, /* select IFP/SOC registers */
/linux-4.1.27/drivers/net/wireless/brcm80211/brcmfmac/
H A Dchip.c31 /* SOC Interconnect types (aka chip types) */
/linux-4.1.27/arch/mips/include/asm/mach-au1x00/
H A Dau1000.h37 /* SOC Interrupt numbers */
/linux-4.1.27/drivers/net/wireless/ath/ath9k/
H A Dar9003_phy.c893 * SOC, MAC, BB, RADIO initvals. ar9003_hw_process_ini()
/linux-4.1.27/drivers/usb/musb/
H A Dmusb_core.c87 * (plus recentrly, SOC or family details)
/linux-4.1.27/arch/arm/common/
H A Dedma.c257 * of SOC-specific initialization code.

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