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Searched refs:gr (Results 1 – 115 of 115) sorted by relevance

/linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/engine/gr/
Dbase.c31 struct nvkm_gr *gr = nvkm_gr(engine); in nvkm_gr_tile() local
32 if (gr->func->tile) in nvkm_gr_tile()
33 gr->func->tile(gr, region, tile); in nvkm_gr_tile()
37 nvkm_gr_units(struct nvkm_gr *gr) in nvkm_gr_units() argument
39 if (gr->func->units) in nvkm_gr_units()
40 return gr->func->units(gr); in nvkm_gr_units()
45 nvkm_gr_tlb_flush(struct nvkm_gr *gr) in nvkm_gr_tlb_flush() argument
47 if (gr->func->tlb_flush) in nvkm_gr_tlb_flush()
48 return gr->func->tlb_flush(gr); in nvkm_gr_tlb_flush()
55 struct nvkm_gr *gr = nvkm_gr(oclass->engine); in nvkm_gr_oclass_get() local
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DKbuild1 nvkm-y += nvkm/engine/gr/base.o
2 nvkm-y += nvkm/engine/gr/nv04.o
3 nvkm-y += nvkm/engine/gr/nv10.o
4 nvkm-y += nvkm/engine/gr/nv15.o
5 nvkm-y += nvkm/engine/gr/nv17.o
6 nvkm-y += nvkm/engine/gr/nv20.o
7 nvkm-y += nvkm/engine/gr/nv25.o
8 nvkm-y += nvkm/engine/gr/nv2a.o
9 nvkm-y += nvkm/engine/gr/nv30.o
10 nvkm-y += nvkm/engine/gr/nv34.o
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Dctxgm20b.c25 gm20b_grctx_generate_r406028(struct gf100_gr *gr) in gm20b_grctx_generate_r406028() argument
27 struct nvkm_device *device = gr->base.engine.subdev.device; in gm20b_grctx_generate_r406028()
31 for (i = 0; i < gr->gpc_nr; i++) in gm20b_grctx_generate_r406028()
32 tpc_per_gpc |= gr->tpc_nr[i] << (4 * i); in gm20b_grctx_generate_r406028()
39 gm20b_grctx_generate_main(struct gf100_gr *gr, struct gf100_grctx *info) in gm20b_grctx_generate_main() argument
41 struct nvkm_device *device = gr->base.engine.subdev.device; in gm20b_grctx_generate_main()
42 const struct gf100_grctx_func *grctx = gr->func->grctx; in gm20b_grctx_generate_main()
46 gf100_gr_mmio(gr, gr->fuc_sw_ctx); in gm20b_grctx_generate_main()
48 gf100_gr_wait_idle(gr); in gm20b_grctx_generate_main()
55 grctx->unkn(gr); in gm20b_grctx_generate_main()
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Dgk20a.c150 gk20a_gr_wait_mem_scrubbing(struct gf100_gr *gr) in gk20a_gr_wait_mem_scrubbing() argument
152 struct nvkm_subdev *subdev = &gr->base.engine.subdev; in gk20a_gr_wait_mem_scrubbing()
175 gk20a_gr_set_hww_esr_report_mask(struct gf100_gr *gr) in gk20a_gr_set_hww_esr_report_mask() argument
177 struct nvkm_device *device = gr->base.engine.subdev.device; in gk20a_gr_set_hww_esr_report_mask()
183 gk20a_gr_init(struct gf100_gr *gr) in gk20a_gr_init() argument
185 struct nvkm_device *device = gr->base.engine.subdev.device; in gk20a_gr_init()
186 const u32 magicgpc918 = DIV_ROUND_UP(0x00800000, gr->tpc_total); in gk20a_gr_init()
195 gf100_gr_mmio(gr, gr->fuc_sw_nonctx); in gk20a_gr_init()
197 ret = gk20a_gr_wait_mem_scrubbing(gr); in gk20a_gr_init()
201 ret = gf100_gr_wait_idle(gr); in gk20a_gr_init()
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Dgf100.c44 gf100_gr_zbc_clear_color(struct gf100_gr *gr, int zbc) in gf100_gr_zbc_clear_color() argument
46 struct nvkm_device *device = gr->base.engine.subdev.device; in gf100_gr_zbc_clear_color()
47 if (gr->zbc_color[zbc].format) { in gf100_gr_zbc_clear_color()
48 nvkm_wr32(device, 0x405804, gr->zbc_color[zbc].ds[0]); in gf100_gr_zbc_clear_color()
49 nvkm_wr32(device, 0x405808, gr->zbc_color[zbc].ds[1]); in gf100_gr_zbc_clear_color()
50 nvkm_wr32(device, 0x40580c, gr->zbc_color[zbc].ds[2]); in gf100_gr_zbc_clear_color()
51 nvkm_wr32(device, 0x405810, gr->zbc_color[zbc].ds[3]); in gf100_gr_zbc_clear_color()
53 nvkm_wr32(device, 0x405814, gr->zbc_color[zbc].format); in gf100_gr_zbc_clear_color()
59 gf100_gr_zbc_color_get(struct gf100_gr *gr, int format, in gf100_gr_zbc_color_get() argument
62 struct nvkm_ltc *ltc = gr->base.engine.subdev.device->ltc; in gf100_gr_zbc_color_get()
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Dctxgk20a.c28 gk20a_grctx_generate_main(struct gf100_gr *gr, struct gf100_grctx *info) in gk20a_grctx_generate_main() argument
30 struct nvkm_device *device = gr->base.engine.subdev.device; in gk20a_grctx_generate_main()
31 const struct gf100_grctx_func *grctx = gr->func->grctx; in gk20a_grctx_generate_main()
35 gf100_gr_mmio(gr, gr->fuc_sw_ctx); in gk20a_grctx_generate_main()
37 gf100_gr_wait_idle(gr); in gk20a_grctx_generate_main()
44 grctx->unkn(gr); in gk20a_grctx_generate_main()
46 gf100_grctx_generate_tpcid(gr); in gk20a_grctx_generate_main()
47 gf100_grctx_generate_r406028(gr); in gk20a_grctx_generate_main()
48 gk104_grctx_generate_r418bb8(gr); in gk20a_grctx_generate_main()
49 gf100_grctx_generate_r406800(gr); in gk20a_grctx_generate_main()
[all …]
Dctxgf100.c1007 struct nvkm_device *device = info->gr->base.engine.subdev.device; in gf100_grctx_mmio_item()
1030 const struct gf100_grctx_func *grctx = info->gr->func->grctx; in gf100_grctx_generate_bundle()
1043 const struct gf100_grctx_func *grctx = info->gr->func->grctx; in gf100_grctx_generate_pagepool()
1056 struct gf100_gr *gr = info->gr; in gf100_grctx_generate_attrib() local
1057 const struct gf100_grctx_func *grctx = gr->func->grctx; in gf100_grctx_generate_attrib()
1062 const int b = mmio_vram(info, size * gr->tpc_total, (1 << s), access); in gf100_grctx_generate_attrib()
1070 for (gpc = 0; gpc < gr->gpc_nr; gpc++) { in gf100_grctx_generate_attrib()
1071 for (tpc = 0; tpc < gr->tpc_nr[gpc]; tpc++) { in gf100_grctx_generate_attrib()
1081 gf100_grctx_generate_unkn(struct gf100_gr *gr) in gf100_grctx_generate_unkn() argument
1086 gf100_grctx_generate_tpcid(struct gf100_gr *gr) in gf100_grctx_generate_tpcid() argument
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Dctxgm204.c922 gm204_grctx_generate_tpcid(struct gf100_gr *gr) in gm204_grctx_generate_tpcid() argument
924 struct nvkm_device *device = gr->base.engine.subdev.device; in gm204_grctx_generate_tpcid()
928 for (gpc = 0; gpc < gr->gpc_nr; gpc++) { in gm204_grctx_generate_tpcid()
929 if (tpc < gr->tpc_nr[gpc]) { in gm204_grctx_generate_tpcid()
940 gm204_grctx_generate_rop_active_fbps(struct gf100_gr *gr) in gm204_grctx_generate_rop_active_fbps() argument
942 struct nvkm_device *device = gr->base.engine.subdev.device; in gm204_grctx_generate_rop_active_fbps()
949 gm204_grctx_generate_405b60(struct gf100_gr *gr) in gm204_grctx_generate_405b60() argument
951 struct nvkm_device *device = gr->base.engine.subdev.device; in gm204_grctx_generate_405b60()
952 const u32 dist_nr = DIV_ROUND_UP(gr->tpc_total, 4); in gm204_grctx_generate_405b60()
958 memcpy(tpcnr, gr->tpc_nr, sizeof(gr->tpc_nr)); in gm204_grctx_generate_405b60()
[all …]
Dctxgf117.c185 struct gf100_gr *gr = info->gr; in gf117_grctx_generate_attrib() local
186 const struct gf100_grctx_func *grctx = gr->func->grctx; in gf117_grctx_generate_attrib()
192 const int b = mmio_vram(info, size * gr->tpc_total, (1 << s), access); in gf117_grctx_generate_attrib()
196 u32 ao = bo + grctx->attrib_nr_max * gr->tpc_total; in gf117_grctx_generate_attrib()
204 for (gpc = 0; gpc < gr->gpc_nr; gpc++) { in gf117_grctx_generate_attrib()
205 for (ppc = 0; ppc < gr->ppc_nr[gpc]; ppc++) { in gf117_grctx_generate_attrib()
206 const u32 a = alpha * gr->ppc_tpc_nr[gpc][ppc]; in gf117_grctx_generate_attrib()
207 const u32 b = beta * gr->ppc_tpc_nr[gpc][ppc]; in gf117_grctx_generate_attrib()
210 if (!(gr->ppc_mask[gpc] & (1 << ppc))) in gf117_grctx_generate_attrib()
214 bo += grctx->attrib_nr_max * gr->ppc_tpc_nr[gpc][ppc]; in gf117_grctx_generate_attrib()
[all …]
Dctxgk104.c846 const struct gf100_grctx_func *grctx = info->gr->func->grctx; in gk104_grctx_generate_bundle()
863 const struct gf100_grctx_func *grctx = info->gr->func->grctx; in gk104_grctx_generate_pagepool()
875 gk104_grctx_generate_unkn(struct gf100_gr *gr) in gk104_grctx_generate_unkn() argument
877 struct nvkm_device *device = gr->base.engine.subdev.device; in gk104_grctx_generate_unkn()
887 gk104_grctx_generate_r418bb8(struct gf100_gr *gr) in gk104_grctx_generate_r418bb8() argument
889 struct nvkm_device *device = gr->base.engine.subdev.device; in gk104_grctx_generate_r418bb8()
896 memcpy(tpcnr, gr->tpc_nr, sizeof(gr->tpc_nr)); in gk104_grctx_generate_r418bb8()
899 for (tpc = 0; tpc < gr->tpc_total; tpc++) { in gk104_grctx_generate_r418bb8()
901 gpc = (gpc + 1) % gr->gpc_nr; in gk104_grctx_generate_r418bb8()
913 ntpcv = gr->tpc_total; in gk104_grctx_generate_r418bb8()
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Dctxgm107.c866 const struct gf100_grctx_func *grctx = info->gr->func->grctx; in gm107_grctx_generate_bundle()
883 const struct gf100_grctx_func *grctx = info->gr->func->grctx; in gm107_grctx_generate_pagepool()
898 struct gf100_gr *gr = info->gr; in gm107_grctx_generate_attrib() local
899 const struct gf100_grctx_func *grctx = gr->func->grctx; in gm107_grctx_generate_attrib()
905 const int b = mmio_vram(info, size * gr->tpc_total, (1 << s), access); in gm107_grctx_generate_attrib()
908 u32 ao = bo + grctx->attrib_nr_max * gr->tpc_total; in gm107_grctx_generate_attrib()
917 for (gpc = 0; gpc < gr->gpc_nr; gpc++) { in gm107_grctx_generate_attrib()
918 for (ppc = 0; ppc < gr->ppc_nr[gpc]; ppc++, n++) { in gm107_grctx_generate_attrib()
919 const u32 as = alpha * gr->ppc_tpc_nr[gpc][ppc]; in gm107_grctx_generate_attrib()
920 const u32 bs = attrib * gr->ppc_tpc_nr[gpc][ppc]; in gm107_grctx_generate_attrib()
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Dnv10.c401 struct nv10_gr *gr; member
414 #define PIPE_SAVE(gr, state, addr) \ argument
422 #define PIPE_RESTORE(gr, state, addr) \ argument
434 struct nvkm_gr *gr = &chan->gr->base; in nv17_gr_mthd_lma_window() local
445 nv04_gr_idle(gr); in nv17_gr_mthd_lma_window()
452 nv04_gr_idle(gr); in nv17_gr_mthd_lma_window()
462 nv04_gr_idle(gr); in nv17_gr_mthd_lma_window()
485 nv04_gr_idle(gr); in nv17_gr_mthd_lma_window()
500 nv04_gr_idle(gr); in nv17_gr_mthd_lma_window()
507 struct nvkm_gr *gr = &chan->gr->base; in nv17_gr_mthd_lma_enable() local
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Dgm204.c233 gm204_gr_init_ctxctl(struct gf100_gr *gr) in gm204_gr_init_ctxctl() argument
239 gm204_gr_init(struct gf100_gr *gr) in gm204_gr_init() argument
241 struct nvkm_device *device = gr->base.engine.subdev.device; in gm204_gr_init()
242 const u32 magicgpc918 = DIV_ROUND_UP(0x00800000, gr->tpc_total); in gm204_gr_init()
252 nvkm_wr32(device, 0x4188b4, nvkm_memory_addr(gr->unk4188b4) >> 8); in gm204_gr_init()
253 nvkm_wr32(device, 0x4188b8, nvkm_memory_addr(gr->unk4188b8) >> 8); in gm204_gr_init()
257 nvkm_wr32(device, 0x100cc8, nvkm_memory_addr(gr->unk4188b4) >> 8); in gm204_gr_init()
258 nvkm_wr32(device, 0x100ccc, nvkm_memory_addr(gr->unk4188b8) >> 8); in gm204_gr_init()
261 gf100_gr_mmio(gr, gr->func->mmio); in gm204_gr_init()
263 gm107_gr_init_bios(gr); in gm204_gr_init()
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Dgk104.c181 gk104_gr_init(struct gf100_gr *gr) in gk104_gr_init() argument
183 struct nvkm_device *device = gr->base.engine.subdev.device; in gk104_gr_init()
184 const u32 magicgpc918 = DIV_ROUND_UP(0x00800000, gr->tpc_total); in gk104_gr_init()
196 nvkm_wr32(device, GPC_BCAST(0x08b4), nvkm_memory_addr(gr->unk4188b4) >> 8); in gk104_gr_init()
197 nvkm_wr32(device, GPC_BCAST(0x08b8), nvkm_memory_addr(gr->unk4188b8) >> 8); in gk104_gr_init()
199 gf100_gr_mmio(gr, gr->func->mmio); in gk104_gr_init()
204 memcpy(tpcnr, gr->tpc_nr, sizeof(gr->tpc_nr)); in gk104_gr_init()
205 for (i = 0, gpc = -1; i < gr->tpc_total; i++) { in gk104_gr_init()
207 gpc = (gpc + 1) % gr->gpc_nr; in gk104_gr_init()
209 tpc = gr->tpc_nr[gpc] - tpcnr[gpc]--; in gk104_gr_init()
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Dnv40.c34 nv40_gr_units(struct nvkm_gr *gr) in nv40_gr_units() argument
36 return nvkm_rd32(gr->engine.subdev.device, 0x1540); in nv40_gr_units()
78 struct nv40_gr *gr = chan->gr; in nv40_gr_chan_bind() local
79 int ret = nvkm_gpuobj_new(gr->base.engine.subdev.device, gr->size, in nv40_gr_chan_bind()
84 nv40_grctx_fill(gr->base.engine.subdev.device, *pgpuobj); in nv40_gr_chan_bind()
95 struct nv40_gr *gr = chan->gr; in nv40_gr_chan_fini() local
96 struct nvkm_subdev *subdev = &gr->base.engine.subdev; in nv40_gr_chan_fini()
134 spin_lock_irqsave(&chan->gr->base.engine.lock, flags); in nv40_gr_chan_dtor()
136 spin_unlock_irqrestore(&chan->gr->base.engine.lock, flags); in nv40_gr_chan_dtor()
151 struct nv40_gr *gr = nv40_gr(base); in nv40_gr_chan_new() local
[all …]
Dgm107.c282 gm107_gr_init_bios(struct gf100_gr *gr) in gm107_gr_init_bios() argument
294 struct nvkm_device *device = gr->base.engine.subdev.device; in gm107_gr_init_bios()
311 gm107_gr_init(struct gf100_gr *gr) in gm107_gr_init() argument
313 struct nvkm_device *device = gr->base.engine.subdev.device; in gm107_gr_init()
314 const u32 magicgpc918 = DIV_ROUND_UP(0x00800000, gr->tpc_total); in gm107_gr_init()
323 nvkm_wr32(device, GPC_BCAST(0x08b4), nvkm_memory_addr(gr->unk4188b4) >> 8); in gm107_gr_init()
324 nvkm_wr32(device, GPC_BCAST(0x08b8), nvkm_memory_addr(gr->unk4188b8) >> 8); in gm107_gr_init()
326 gf100_gr_mmio(gr, gr->func->mmio); in gm107_gr_init()
328 gm107_gr_init_bios(gr); in gm107_gr_init()
333 memcpy(tpcnr, gr->tpc_nr, sizeof(gr->tpc_nr)); in gm107_gr_init()
[all …]
Dnv20.c19 struct nv20_gr *gr = chan->gr; in nv20_gr_chan_init() local
22 nvkm_kmap(gr->ctxtab); in nv20_gr_chan_init()
23 nvkm_wo32(gr->ctxtab, chan->chid * 4, inst >> 4); in nv20_gr_chan_init()
24 nvkm_done(gr->ctxtab); in nv20_gr_chan_init()
32 struct nv20_gr *gr = chan->gr; in nv20_gr_chan_fini() local
33 struct nvkm_device *device = gr->base.engine.subdev.device; in nv20_gr_chan_fini()
52 nvkm_kmap(gr->ctxtab); in nv20_gr_chan_fini()
53 nvkm_wo32(gr->ctxtab, chan->chid * 4, 0x00000000); in nv20_gr_chan_fini()
54 nvkm_done(gr->ctxtab); in nv20_gr_chan_fini()
77 struct nv20_gr *gr = nv20_gr(base); in nv20_gr_chan_new() local
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Dnv50.c31 nv50_gr_units(struct nvkm_gr *gr) in nv50_gr_units() argument
33 return nvkm_rd32(gr->engine.subdev.device, 0x1540); in nv50_gr_units()
70 struct nv50_gr *gr = nv50_gr_chan(object)->gr; in nv50_gr_chan_bind() local
71 int ret = nvkm_gpuobj_new(gr->base.engine.subdev.device, gr->size, in nv50_gr_chan_bind()
75 nv50_grctx_fill(gr->base.engine.subdev.device, *pgpuobj); in nv50_gr_chan_bind()
90 struct nv50_gr *gr = nv50_gr(base); in nv50_gr_chan_new() local
96 chan->gr = gr; in nv50_gr_chan_new()
238 nv50_gr_prop_trap(struct nv50_gr *gr, u32 ustatus_addr, u32 ustatus, u32 tp) in nv50_gr_prop_trap() argument
240 struct nvkm_subdev *subdev = &gr->base.engine.subdev; in nv50_gr_prop_trap()
280 nv50_gr_mp_trap(struct nv50_gr *gr, int tpid, int display) in nv50_gr_mp_trap() argument
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Dnv04.c361 struct nv04_gr *gr; member
1072 nv04_gr_channel(struct nv04_gr *gr) in nv04_gr_channel() argument
1074 struct nvkm_device *device = gr->base.engine.subdev.device; in nv04_gr_channel()
1078 if (chid < ARRAY_SIZE(gr->chan)) in nv04_gr_channel()
1079 chan = gr->chan[chid]; in nv04_gr_channel()
1087 struct nvkm_device *device = chan->gr->base.engine.subdev.device; in nv04_gr_load_context()
1102 struct nvkm_device *device = chan->gr->base.engine.subdev.device; in nv04_gr_unload_context()
1114 nv04_gr_context_switch(struct nv04_gr *gr) in nv04_gr_context_switch() argument
1116 struct nvkm_device *device = gr->base.engine.subdev.device; in nv04_gr_context_switch()
1121 nv04_gr_idle(&gr->base); in nv04_gr_context_switch()
[all …]
Dg84.c93 nvkm_gr_vstatus_print(struct nv50_gr *gr, int r, in nvkm_gr_vstatus_print() argument
96 struct nvkm_subdev *subdev = &gr->base.engine.subdev; in nvkm_gr_vstatus_print()
115 struct nv50_gr *gr = nv50_gr(base); in g84_gr_tlb_flush() local
116 struct nvkm_subdev *subdev = &gr->base.engine.subdev; in g84_gr_tlb_flush()
125 spin_lock_irqsave(&gr->lock, flags); in g84_gr_tlb_flush()
156 nvkm_gr_vstatus_print(gr, 0, nv50_gr_vstatus_0, in g84_gr_tlb_flush()
158 nvkm_gr_vstatus_print(gr, 1, nv50_gr_vstatus_1, in g84_gr_tlb_flush()
160 nvkm_gr_vstatus_print(gr, 2, nv50_gr_vstatus_2, in g84_gr_tlb_flush()
171 spin_unlock_irqrestore(&gr->lock, flags); in g84_gr_tlb_flush()
Dctxgf108.c733 struct gf100_gr *gr = info->gr; in gf108_grctx_generate_attrib() local
734 const struct gf100_grctx_func *grctx = gr->func->grctx; in gf108_grctx_generate_attrib()
740 const int b = mmio_vram(info, size * gr->tpc_total, (1 << s), access); in gf108_grctx_generate_attrib()
744 u32 ao = bo + grctx->attrib_nr_max * gr->tpc_total; in gf108_grctx_generate_attrib()
752 for (gpc = 0; gpc < gr->gpc_nr; gpc++) { in gf108_grctx_generate_attrib()
753 for (tpc = 0; tpc < gr->tpc_nr[gpc]; tpc++) { in gf108_grctx_generate_attrib()
768 gf108_grctx_generate_unkn(struct gf100_gr *gr) in gf108_grctx_generate_unkn() argument
770 struct nvkm_device *device = gr->base.engine.subdev.device; in gf108_grctx_generate_unkn()
Dgm20b.c30 gm20b_gr_init_gpc_mmu(struct gf100_gr *gr) in gm20b_gr_init_gpc_mmu() argument
32 struct nvkm_device *device = gr->base.engine.subdev.device; in gm20b_gr_init_gpc_mmu()
55 gm20b_gr_set_hww_esr_report_mask(struct gf100_gr *gr) in gm20b_gr_set_hww_esr_report_mask() argument
57 struct nvkm_device *device = gr->base.engine.subdev.device; in gm20b_gr_set_hww_esr_report_mask()
Dnv30.c24 struct nv20_gr *gr = nv20_gr(base); in nv30_gr_chan_new() local
31 chan->gr = gr; in nv30_gr_chan_new()
35 ret = nvkm_memory_new(gr->base.engine.subdev.device, in nv30_gr_chan_new()
105 struct nv20_gr *gr = nv20_gr(base); in nv30_gr_init() local
106 struct nvkm_device *device = gr->base.engine.subdev.device; in nv30_gr_init()
109 nvkm_memory_addr(gr->ctxtab) >> 4); in nv30_gr_init()
Dnv2a.c23 struct nv20_gr *gr = nv20_gr(base); in nv2a_gr_chan_new() local
30 chan->gr = gr; in nv2a_gr_chan_new()
34 ret = nvkm_memory_new(gr->base.engine.subdev.device, in nv2a_gr_chan_new()
Dnv34.c23 struct nv20_gr *gr = nv20_gr(base); in nv34_gr_chan_new() local
30 chan->gr = gr; in nv34_gr_chan_new()
34 ret = nvkm_memory_new(gr->base.engine.subdev.device, in nv34_gr_chan_new()
Dnv35.c23 struct nv20_gr *gr = nv20_gr(base); in nv35_gr_chan_new() local
30 chan->gr = gr; in nv35_gr_chan_new()
34 ret = nvkm_memory_new(gr->base.engine.subdev.device, in nv35_gr_chan_new()
Dnv25.c23 struct nv20_gr *gr = nv20_gr(base); in nv25_gr_chan_new() local
30 chan->gr = gr; in nv25_gr_chan_new()
34 ret = nvkm_memory_new(gr->base.engine.subdev.device, in nv25_gr_chan_new()
Dnv44.c33 struct nv40_gr *gr = nv40_gr(base); in nv44_gr_tile() local
34 struct nvkm_device *device = gr->base.engine.subdev.device; in nv44_gr_tile()
39 nv04_gr_idle(&gr->base); in nv44_gr_tile()
Dnv20.h25 struct nv20_gr *gr; member
Dnv50.h25 struct nv50_gr *gr; member
Dnv40.h22 struct nv40_gr *gr; member
Dctxgf100.h6 struct gf100_gr *gr; member
Dgf100.h152 struct gf100_gr *gr; member
/linux-4.4.14/arch/parisc/kernel/
Dsignal.c75 err |= __copy_from_user(regs->gr, sc->sc_gr, sizeof(regs->gr)); in restore_sigcontext()
82 DBG(2,"restore_sigcontext: r28 is %ld\n", regs->gr[28]); in restore_sigcontext()
91 unsigned long usp = (regs->gr[30] & ~(0x01UL)); in sys_rt_sigreturn()
159 regs->gr[31] = regs->iaoq[0]; in sys_rt_sigreturn()
206 err |= __put_user(regs->gr[31], &sc->sc_iaoq[0]); in setup_sigcontext()
207 err |= __put_user(regs->gr[31]+4, &sc->sc_iaoq[1]); in setup_sigcontext()
211 regs->gr[31], regs->gr[31]+4); in setup_sigcontext()
220 err |= __copy_to_user(sc->sc_gr, regs->gr, sizeof(regs->gr)); in setup_sigcontext()
223 DBG(1,"setup_sigcontext: r28 is %ld\n", regs->gr[28]); in setup_sigcontext()
241 usp = (regs->gr[30] & ~(0x01UL)); in setup_rt_frame()
[all …]
Dasm-offsets.c67 DEFINE(TASK_PT_PSW, offsetof(struct task_struct, thread.regs.gr[ 0])); in main()
68 DEFINE(TASK_PT_GR1, offsetof(struct task_struct, thread.regs.gr[ 1])); in main()
69 DEFINE(TASK_PT_GR2, offsetof(struct task_struct, thread.regs.gr[ 2])); in main()
70 DEFINE(TASK_PT_GR3, offsetof(struct task_struct, thread.regs.gr[ 3])); in main()
71 DEFINE(TASK_PT_GR4, offsetof(struct task_struct, thread.regs.gr[ 4])); in main()
72 DEFINE(TASK_PT_GR5, offsetof(struct task_struct, thread.regs.gr[ 5])); in main()
73 DEFINE(TASK_PT_GR6, offsetof(struct task_struct, thread.regs.gr[ 6])); in main()
74 DEFINE(TASK_PT_GR7, offsetof(struct task_struct, thread.regs.gr[ 7])); in main()
75 DEFINE(TASK_PT_GR8, offsetof(struct task_struct, thread.regs.gr[ 8])); in main()
76 DEFINE(TASK_PT_GR9, offsetof(struct task_struct, thread.regs.gr[ 9])); in main()
[all …]
Dptrace.c150 task_regs(child)->gr[0] &= ~USER_PSW_BITS; in arch_ptrace()
151 task_regs(child)->gr[0] |= data; in arch_ptrace()
273 secure_computing_strict(regs->gr[20]); in do_syscall_trace_enter()
282 regs->gr[20] = -1UL; in do_syscall_trace_enter()
288 audit_syscall_entry(regs->gr[20], regs->gr[26], regs->gr[25], in do_syscall_trace_enter()
289 regs->gr[24], regs->gr[23]); in do_syscall_trace_enter()
292 audit_syscall_entry(regs->gr[20] & 0xffffffff, in do_syscall_trace_enter()
293 regs->gr[26] & 0xffffffff, in do_syscall_trace_enter()
294 regs->gr[25] & 0xffffffff, in do_syscall_trace_enter()
295 regs->gr[24] & 0xffffffff, in do_syscall_trace_enter()
[all …]
Dprocess.c215 cregs->gr[27] = ((unsigned long *)usp)[3]; in copy_thread()
216 cregs->gr[26] = ((unsigned long *)usp)[2]; in copy_thread()
218 cregs->gr[26] = usp; in copy_thread()
220 cregs->gr[25] = kthread_arg; in copy_thread()
229 cregs->gr[30] = usp; in copy_thread()
236 cregs->cr27 = cregs->gr[23]; in copy_thread()
Dtraps.c80 printbinary(buf, regs->gr[0], 32); in print_gr()
84 PRINTREGS(level, regs->gr, "r", RFMT, i); in print_gr()
147 printk("%s RP(r2): " RFMT "\n", level, regs->gr[2]); in show_regs()
151 printk("%s RP(r2): %pS\n", level, (void *) regs->gr[2]); in show_regs()
208 r.gr[2] = (unsigned long)__builtin_return_address(0); in parisc_show_stack()
209 r.gr[30] = sp; in parisc_show_stack()
364 regs->gr[0] = pim_wide->cr[22]; in transfer_pim_to_trap_frame()
367 regs->gr[i] = pim_wide->gr[i]; in transfer_pim_to_trap_frame()
388 regs->gr[0] = pim_narrow->cr[22]; in transfer_pim_to_trap_frame()
391 regs->gr[i] = pim_narrow->gr[i]; in transfer_pim_to_trap_frame()
[all …]
Dsignal32.c78 regs->gr[regn] = compat_reg; in restore_sigcontext32()
81 regs->gr[regn] = ((u64)compat_regt << 32) | (u64)compat_reg; in restore_sigcontext32()
83 regn, regs->gr[regn], compat_regt, compat_reg); in restore_sigcontext32()
130 DBG(2,"restore_sigcontext32: r28 is %ld\n", regs->gr[28]); in restore_sigcontext32()
160 compat_reg = (compat_uint_t)(regs->gr[31]); in setup_sigcontext32()
167 compat_reg = (compat_uint_t)(regs->gr[31] >> 32); in setup_sigcontext32()
172 compat_reg = (compat_uint_t)(regs->gr[31]+4); in setup_sigcontext32()
177 compat_reg = (compat_uint_t)((regs->gr[31]+4) >> 32); in setup_sigcontext32()
194 regs->gr[31], regs->gr[31]+4); in setup_sigcontext32()
247 compat_reg = (compat_uint_t)(regs->gr[regn]); in setup_sigcontext32()
[all …]
Dunaligned.c164 regs->gr[toreg] = val; in emulate_ldh()
204 regs->gr[toreg] = val; in emulate_ldw()
277 regs->gr[toreg] = val; in emulate_ldd()
284 unsigned long val = regs->gr[frreg]; in emulate_sth()
321 val = regs->gr[frreg]; in emulate_stw()
367 val = regs->gr[frreg]; in emulate_std()
452 unsigned long newbase = R1(regs->iir)?regs->gr[R1(regs->iir)]:0; in handle_unaligned()
508 newbase += (R2(regs->iir)?regs->gr[R2(regs->iir)]:0)<<shift; in handle_unaligned()
510 newbase += (R2(regs->iir)?regs->gr[R2(regs->iir)]:0); in handle_unaligned()
670 regs->gr[R1(regs->iir)] = newbase; in handle_unaligned()
[all …]
Dunwind.c216 info->prev_sp = regs->gr[30]; in unwind_special()
357 info->sp = regs->gr[30]; in unwind_frame_init()
359 info->rp = regs->gr[2]; in unwind_frame_init()
360 info->r31 = regs->gr[31]; in unwind_frame_init()
375 r2->gr[30] = r->ksp; in unwind_frame_init_from_blocked_task()
427 r.gr[2] = (unsigned long) __builtin_return_address(0); in return_address()
428 r.gr[30] = sp; in return_address()
Dstacktrace.c27 r.gr[2] = (unsigned long)__builtin_return_address(0); in dump_trace()
28 r.gr[30] = sp; in dump_trace()
Dperf_asm.S31 #define MTDIAG_1(gr) .word 0x14201840 + gr*0x10000 argument
32 #define MTDIAG_2(gr) .word 0x14401840 + gr*0x10000 argument
33 #define MFDIAG_1(gr) .word 0x142008A0 + gr argument
34 #define MFDIAG_2(gr) .word 0x144008A0 + gr argument
Dtime.c177 if (regs->gr[0] & PSW_N) in profile_pc()
182 pc = regs->gr[2]; in profile_pc()
Dbinfmt_elf32.c18 for (i = 0; i < 32; i++) dst[i] = (elf_greg_t) pt->gr[i]; \
Dirq.c406 unsigned long sp = regs->gr[30]; in stack_overflow_check()
/linux-4.4.14/arch/s390/include/asm/
Dvx-insn.h26 .macro GR_NUM opd gr
28 .ifc \gr,%r0
31 .ifc \gr,%r1
34 .ifc \gr,%r2
37 .ifc \gr,%r3
40 .ifc \gr,%r4
43 .ifc \gr,%r5
46 .ifc \gr,%r6
49 .ifc \gr,%r7
52 .ifc \gr,%r8
[all …]
Dnmi.h54 u64 gr : 1; /* 28 general register validity */ member
/linux-4.4.14/arch/parisc/include/asm/
Dsyscall.h14 return regs->gr[20]; in syscall_get_nr()
25 args[5] = regs->gr[21]; in syscall_get_arguments()
27 args[4] = regs->gr[22]; in syscall_get_arguments()
29 args[3] = regs->gr[23]; in syscall_get_arguments()
31 args[2] = regs->gr[24]; in syscall_get_arguments()
33 args[1] = regs->gr[25]; in syscall_get_arguments()
35 args[0] = regs->gr[26]; in syscall_get_arguments()
Dprocessor.h158 .regs = { .gr = { 0, }, \
287 regs->gr[ 0] = USER_PSW | (USER_WIDE_MODE ? PSW_W : 0); \
292 regs->gr[30] = (((unsigned long)sp + 63) &~ 63) | (USER_WIDE_MODE ? 1 : 0); \
293 regs->gr[31] = pc; \
295 get_user(regs->gr[25], (argv - 1)); \
296 regs->gr[24] = (long) argv; \
297 regs->gr[23] = 0; \
309 #define KSTK_ESP(tsk) ((tsk)->thread.regs.gr[30])
Dptrace.h19 #define user_stack_pointer(regs) ((regs)->gr[30])
24 return regs->gr[20]; in regs_return_value()
Dspecial_insns.h13 #define mtctl(gr, cr) \ argument
16 : "r" (gr), "i" (cr) : "memory")
Dassembly.h109 .macro tophys_r1 gr
111 sub \gr, %r1, \gr
114 .macro tovirt_r1 gr
116 add \gr, %r1, \gr
Delf.h279 memcpy(dst + 0, pt->gr, 32 * sizeof(elf_greg_t)); \
329 #define ELF_PLAT_INIT(_r, load_addr) _r->gr[23] = 0
Dpdc.h208 __u32 gr[32]; member
241 __u64 gr[32]; member
Dcompat.h272 return (void __user *)regs->gr[30]; in arch_compat_alloc_user_space()
/linux-4.4.14/drivers/parisc/
Dpower.c66 #define MTCPU(dr, gr) MFCPU_X(dr, gr, 0, 0x12) /* move value of gr to dr[dr] */ argument
67 #define MFCPU_C(dr, gr) MFCPU_X(dr, gr, 0, 0x30) /* for dr0 and dr8 only ! */ argument
68 #define MFCPU_T(dr, gr) MFCPU_X(dr, 0, gr, 0xa0) /* all dr except dr0 and dr8 */ argument
/linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/engine/device/
Dbase.c93 .gr = nv04_gr_new,
114 .gr = nv04_gr_new,
135 .gr = nv10_gr_new,
156 .gr = nv15_gr_new,
178 .gr = nv15_gr_new,
200 .gr = nv17_gr_new,
222 .gr = nv17_gr_new,
244 .gr = nv15_gr_new,
266 .gr = nv17_gr_new,
288 .gr = nv20_gr_new,
[all …]
/linux-4.4.14/arch/powerpc/kvm/
Dbook3s_hv_rm_mmu.c703 unsigned long v, r, gr; in kvmppc_h_clear_ref() local
720 gr = rev->guest_rpte; in kvmppc_h_clear_ref()
726 gr |= r & (HPTE_R_R | HPTE_R_C); in kvmppc_h_clear_ref()
729 rmap = revmap_for_hpte(kvm, v, gr); in kvmppc_h_clear_ref()
737 vcpu->arch.gpr[4] = gr; in kvmppc_h_clear_ref()
749 unsigned long v, r, gr; in kvmppc_h_clear_mod() local
766 gr = rev->guest_rpte; in kvmppc_h_clear_mod()
767 if (gr & HPTE_R_C) { in kvmppc_h_clear_mod()
776 gr |= r & (HPTE_R_R | HPTE_R_C); in kvmppc_h_clear_mod()
781 rmap = revmap_for_hpte(kvm, v, gr); in kvmppc_h_clear_mod()
[all …]
Dbook3s_64_mmu_hv.c315 unsigned long v, gr; in kvmppc_mmu_book3s_64_hv_xlate() local
341 gr = kvm->arch.revmap[index].guest_rpte; in kvmppc_mmu_book3s_64_hv_xlate()
350 pp = gr & (HPTE_R_PP0 | HPTE_R_PP); in kvmppc_mmu_book3s_64_hv_xlate()
357 gpte->may_execute = gpte->may_read && !(gr & (HPTE_R_N | HPTE_R_G)); in kvmppc_mmu_book3s_64_hv_xlate()
361 int amrfield = hpte_get_skey_perm(gr, vcpu->arch.amr); in kvmppc_mmu_book3s_64_hv_xlate()
369 gpte->raddr = kvmppc_mmu_get_real_addr(v, gr, eaddr); in kvmppc_mmu_book3s_64_hv_xlate()
1540 unsigned long v, hr, gr; in debugfs_htab_read() local
1579 gr = kvm->arch.revmap[i].guest_rpte; in debugfs_htab_read()
1588 i, v, hr, gr); in debugfs_htab_read()
/linux-4.4.14/drivers/macintosh/
Dwindfarm_pm81.c166 s32 gd, gp, gr; member
200 .gr = 0x000002fd,
212 .gr = 0x0000072b,
224 .gr = 0x000002fd,
302 pid_param.gr = param->gr; in wf_smu_create_sys_fans()
441 pid_param.gr = piddata->gr / pid_param.history_len; in wf_smu_create_cpu_fans()
Dwindfarm_pid.h30 s32 gd, gp, gr; /* PID gains */ member
63 s32 gd, gp, gr; /* PID gains */ member
Dwindfarm_pm112.c168 pid.gr = piddata->gr / piddata->history_len; in create_cpu_loop()
346 .gr = 0,
396 .gr = 0,
447 .gr = 0x1277952,
Dwindfarm_pm91.c186 pid_param.gr = piddata->gr / pid_param.history_len; in wf_smu_create_cpu_fans()
297 .gr = 0x00000000, in wf_smu_create_drive_fans()
378 .gr = 0x00020000, in wf_smu_create_slots_fans()
Dwindfarm_pid.c68 target = (s32)((integ * (s64)st->param.gr + deriv * (s64)st->param.gd + in wf_pid_run()
119 integ *= st->param.gr; in wf_cpu_pid_run()
Dwindfarm_rm31.c327 pid.gr = mpu->pid_gr; in cpu_setup_pid()
346 .gr = 0,
359 .gr = 0x06553600,
446 .gr = 0x00100000,
Dwindfarm_pm72.c426 pid.gr = mpu->pid_gr; in cpu_setup_pid()
445 .gr = 0,
457 .gr = 0,
537 .gr = 0,
Dwindfarm_pm121.c554 pid_param.gr = PM121_SYS_GR; in pm121_create_sys_fans()
696 pid_param.gr = piddata->gr / pid_param.history_len; in pm121_create_cpu_fans()
/linux-4.4.14/drivers/mmc/card/
Dmmc_test.c151 struct mmc_test_general_result *gr; member
522 if (!test->gr) in mmc_test_save_transfer_result()
535 list_add_tail(&tr->link, &test->gr->tr_lst); in mmc_test_save_transfer_result()
2624 struct mmc_test_general_result *gr; in mmc_test_run() local
2644 gr = kzalloc(sizeof(struct mmc_test_general_result), in mmc_test_run()
2646 if (gr) { in mmc_test_run()
2647 INIT_LIST_HEAD(&gr->tr_lst); in mmc_test_run()
2650 gr->card = test->card; in mmc_test_run()
2651 gr->testcase = i; in mmc_test_run()
2654 list_add_tail(&gr->link, &mmc_test_result); in mmc_test_run()
[all …]
/linux-4.4.14/drivers/net/ethernet/mellanox/mlx5/core/
Dflow_table.c352 void *gr; in mlx5_create_flow_table() local
361 gr = kcalloc(num_groups, sizeof(struct mlx5_ftg), GFP_KERNEL); in mlx5_create_flow_table()
363 if (!ft || !gr || !bm) in mlx5_create_flow_table()
366 ft->group = gr; in mlx5_create_flow_table()
397 kfree(gr); in mlx5_create_flow_table()
/linux-4.4.14/arch/frv/kernel/
Dptrace.c79 offs_gr0 = offsetof(struct user_int_regs, gr[0]); in genregs_set()
80 offs_gr1 = offsetof(struct user_int_regs, gr[1]); in genregs_set()
94 &iregs->gr[1], offs_gr1, sizeof(*iregs)); in genregs_set()
Dasm-offsets.c70 DEF_IREG(__INT_GR0, i.gr[0]); in foo()
94 OFFSET(__THREAD_GR16, thread_struct, gr[0]); in foo()
Dgdb-stub.c1612 ptr = mem2hex(&__debug_user_context->i.gr[loop], ptr, 4, 0); in gdbstub()
1615 ptr = mem2hex(&__debug_user_context->i.gr[29], ptr, 4, 0); in gdbstub()
1616 ptr = mem2hex(&__debug_user_context->i.gr[30], ptr, 4, 0); in gdbstub()
1618 ptr = mem2hex(&__debug_user_context->i.gr[31], ptr, 4, 0); in gdbstub()
1625 ptr = mem2hex(&__debug_user_context->i.gr[loop], ptr, 4, 0); in gdbstub()
1691 ptr = hex2mem(ptr, &__debug_user_context->i.gr[loop], 4); in gdbstub()
1704 ptr = hex2mem(ptr, &__debug_user_context->i.gr[loop], 4); in gdbstub()
1814 __debug_user_context->i.gr[addr - GDB_REG_GR(0)] = temp; in gdbstub()
Dsetup.c1020 const char *gr, *fr, *fm, *fp, *cm, *nem, *ble; in show_cpuinfo() local
1025 gr = cpu_hsr0_all & HSR0_GRHE ? "gr0-63" : "gr0-31"; in show_cpuinfo()
1041 cpu_core, gr, ble, cm, nem, in show_cpuinfo()
Dsignal.c78 *_gr8 = user->i.gr[8]; in restore_sigcontext()
/linux-4.4.14/drivers/usb/dwc2/
Dcore.c251 struct dwc2_gregs_backup *gr; in dwc2_backup_global_registers() local
255 gr = &hsotg->gr_backup; in dwc2_backup_global_registers()
257 gr->gotgctl = dwc2_readl(hsotg->regs + GOTGCTL); in dwc2_backup_global_registers()
258 gr->gintmsk = dwc2_readl(hsotg->regs + GINTMSK); in dwc2_backup_global_registers()
259 gr->gahbcfg = dwc2_readl(hsotg->regs + GAHBCFG); in dwc2_backup_global_registers()
260 gr->gusbcfg = dwc2_readl(hsotg->regs + GUSBCFG); in dwc2_backup_global_registers()
261 gr->grxfsiz = dwc2_readl(hsotg->regs + GRXFSIZ); in dwc2_backup_global_registers()
262 gr->gnptxfsiz = dwc2_readl(hsotg->regs + GNPTXFSIZ); in dwc2_backup_global_registers()
263 gr->hptxfsiz = dwc2_readl(hsotg->regs + HPTXFSIZ); in dwc2_backup_global_registers()
264 gr->gdfifocfg = dwc2_readl(hsotg->regs + GDFIFOCFG); in dwc2_backup_global_registers()
[all …]
/linux-4.4.14/arch/parisc/include/uapi/asm/
Dptrace.h19 unsigned long gr[32]; /* PSW is in gr[0] */ member
/linux-4.4.14/arch/ia64/kernel/
Dptrace.c879 retval |= __copy_to_user(&ppr->gr[1], &pt->r1, sizeof(long)); in ptrace_getregs()
880 retval |= __copy_to_user(&ppr->gr[2], &pt->r2, sizeof(long) *2); in ptrace_getregs()
887 retval |= __put_user(val, &ppr->gr[i]); in ptrace_getregs()
892 retval |= __copy_to_user(&ppr->gr[8], &pt->r8, sizeof(long) * 4); in ptrace_getregs()
896 retval |= __copy_to_user(&ppr->gr[12], &pt->r12, sizeof(long) * 2); in ptrace_getregs()
897 retval |= __copy_to_user(&ppr->gr[14], &pt->r14, sizeof(long)); in ptrace_getregs()
898 retval |= __copy_to_user(&ppr->gr[15], &pt->r15, sizeof(long)); in ptrace_getregs()
902 retval |= __copy_to_user(&ppr->gr[16], &pt->r16, sizeof(long) * 16); in ptrace_getregs()
1015 retval |= __copy_from_user(&pt->r1, &ppr->gr[1], sizeof(long)); in ptrace_setregs()
1016 retval |= __copy_from_user(&pt->r2, &ppr->gr[2], sizeof(long) * 2); in ptrace_setregs()
[all …]
Dunwind.c865 desc_br_gr (unsigned char brmask, unsigned char gr, struct unw_state_record *sr) in desc_br_gr() argument
872 sr->region_start + sr->region_len - 1, gr++); in desc_br_gr()
932 desc_gr_gr (unsigned char grmask, unsigned char gr, struct unw_state_record *sr) in desc_gr_gr() argument
939 sr->region_start + sr->region_len - 1, gr++); in desc_gr_gr()
1154 #define UNW_DEC_PROLOGUE_GR(fmt,r,m,gr,arg) desc_prologue(0,r,m,gr,arg) argument
/linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/subdev/fb/
Dbase.c57 if (device->gr) in nvkm_fb_tile_prog()
58 nvkm_engine_tile(&device->gr->engine, region); in nvkm_fb_tile_prog()
/linux-4.4.14/arch/parisc/mm/
Dfault.c154 d->fault_gp = regs->gr[27]; in fixup_exception()
167 regs->gr[0] &= ~PSW_B; /* IPSW in gr[0] */ in fixup_exception()
/linux-4.4.14/include/uapi/linux/
Dam437x-vpfe.h94 char gr; member
/linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/
Dnv50.c169 if (i == NVKM_ENGINE_GR && device->gr) { in nv50_vm_flush()
170 int ret = nvkm_gr_tlb_flush(device->gr); in nv50_vm_flush()
/linux-4.4.14/arch/frv/include/asm/
Dprocessor.h49 unsigned long gr[12]; /* [GR16-GR27] */ member
/linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/engine/
DKbuild11 include $(src)/nvkm/engine/gr/Kbuild
/linux-4.4.14/include/media/davinci/
Ddm644x_ccdc.h103 char gr; member
Ddm355_ccdc.h124 unsigned char gr; member
/linux-4.4.14/sound/sparc/
Damd7930.c87 __u16 gr; member
391 sbus_writeb(((map->gr >> 0) & 0xff), amd->regs + AMD7930_DR); in __amd7930_write_map()
392 sbus_writeb(((map->gr >> 8) & 0xff), amd->regs + AMD7930_DR); in __amd7930_write_map()
486 map->gr = gx_coeff[255]; in __amd7930_update_map()
489 map->gr = gx_coeff[level]; in __amd7930_update_map()
/linux-4.4.14/drivers/gpu/drm/nouveau/include/nvif/
Ddevice.h73 #define nvxx_gr(a) nvxx_device(a)->gr
/linux-4.4.14/drivers/video/fbdev/omap2/dss/
Dmanager-sysfs.c383 info.cpr_coefs.gr, in manager_cpr_coef_show()
404 &coefs.gr, &coefs.gg, &coefs.gb, in manager_cpr_coef_store()
409 coefs.gr, coefs.gg, coefs.gb, in manager_cpr_coef_store()
Ddispc.c1094 coef_g = FLD_VAL(coefs->gr, 31, 22) | FLD_VAL(coefs->gg, 20, 11) | in dispc_mgr_set_cpr_coef()
/linux-4.4.14/arch/ia64/include/uapi/asm/
Dptrace.h215 unsigned long gr[32]; member
/linux-4.4.14/drivers/gpu/drm/nouveau/include/nvkm/core/
Ddevice.h129 struct nvkm_gr *gr; member
194 int (*gr )(struct nvkm_device *, int idx, struct nvkm_gr **); member
/linux-4.4.14/arch/frv/include/uapi/asm/
Dregisters.h183 unsigned long gr[64]; member
/linux-4.4.14/Documentation/ja_JP/
Dstable_kernel_rules.txt21 校正者： 武井伸光さん、<takei at webmasters dot gr dot jp>
DHOWTO25 武井伸光さん、<takei at webmasters dot gr dot jp>
/linux-4.4.14/arch/powerpc/include/asm/
Dsmu.h632 __s32 gp,gr,gd; member
/linux-4.4.14/fs/dlm/
Dlock.c136 #define modes_compat(gr, rq) \ argument
137 __dlm_compat_matrix[(gr)->lkb_grmode + 1][(rq)->lkb_rqmode + 1]
2596 static int lock_requires_bast(struct dlm_lkb *gr, int high, int cw) in lock_requires_bast() argument
2598 if (gr->lkb_grmode == DLM_LOCK_PR && cw) { in lock_requires_bast()
2599 if (gr->lkb_highbast < DLM_LOCK_EX) in lock_requires_bast()
2604 if (gr->lkb_highbast < high && in lock_requires_bast()
2605 !__dlm_compat_matrix[gr->lkb_grmode+1][high+1]) in lock_requires_bast()
2646 static int modes_require_bast(struct dlm_lkb *gr, struct dlm_lkb *rq) in modes_require_bast() argument
2648 if ((gr->lkb_grmode == DLM_LOCK_PR && rq->lkb_rqmode == DLM_LOCK_CW) || in modes_require_bast()
2649 (gr->lkb_grmode == DLM_LOCK_CW && rq->lkb_rqmode == DLM_LOCK_PR)) { in modes_require_bast()
[all …]
/linux-4.4.14/arch/s390/kernel/
Dnmi.c113 if (!mci.gr) { in s390_validate_registers()
/linux-4.4.14/drivers/gpu/drm/nouveau/
Dnouveau_abi16.c176 struct nvkm_gr *gr = nvxx_gr(device); in nouveau_abi16_ioctl_getparam() local
226 getparam->value = nvkm_gr_units(gr); in nouveau_abi16_ioctl_getparam()
/linux-4.4.14/drivers/gpu/drm/ast/
Dast_drv.h277 u8 gr[9]; member
Dast_mode.c266 ast_set_index_reg(ast, AST_IO_GR_PORT, i, stdtable->gr[i]); in ast_set_std_reg()
/linux-4.4.14/drivers/staging/media/davinci_vpfe/
Ddm365_ipipe_hw.c454 regw_ip(base_addr, dpc_thr->corr_thr.gr & OTFDPC_DPC2_THR_MASK, in set_dpc_thresholds()
462 regw_ip(base_addr, dpc_thr->det_thr.gr & OTFDPC_DPC2_THR_MASK, in set_dpc_thresholds()
493 dpc_2_0->det_thr.gr = dpc_2_0->det_thr.b = 0; in ipipe_set_otfdpc_regs()
Ddavinci_vpfe_user.h654 unsigned short gr; member
Ddm365_ipipe.c145 dpc_2_0->det_thr.gr > OTFDPC_DPC2_THR_MASK || in ipipe_validate_otfdpc_params()
149 dpc_2_0->corr_thr.gr > OTFDPC_DPC2_THR_MASK || in ipipe_validate_otfdpc_params()
/linux-4.4.14/drivers/scsi/
DBusLogic.h343 } gr; member
DBusLogic.c1560 adapter->ext_trans_enable = georeg.gr.ext_trans_enable; in blogic_rdconfig()
/linux-4.4.14/arch/ia64/include/asm/
Dpal.h466 gr : 1, /* General registers member
683 #define pmci_proc_gpr_valid pme_processor.gr
Dsal.h881 u64 gr[4]; member
/linux-4.4.14/drivers/media/usb/gspca/
Dzc3xx.c5733 u8 gr[16]; in setcontrast() local
5774 gr[i - 1] = (g - gp2) / 2; in setcontrast()
5776 gr[0] = gp1 == 0 ? 0 : (g - gp1); in setcontrast()
5780 gr[15] = (0xff - gp2) / 2; in setcontrast()
5782 reg_w(gspca_dev, gr[i], 0x0130 + i); /* gradient */ in setcontrast()
/linux-4.4.14/drivers/media/platform/davinci/
Ddm355_ccdc.c452 val = ((bcomp->gr & CCDC_BLK_COMP_MASK) << in ccdc_config_black_compense()
Ddm644x_ccdc.c489 ((bcomp->gr & CCDC_BLK_COMP_MASK) << in ccdc_config_black_compense()
/linux-4.4.14/include/video/
Domapdss.h381 s16 gr, gg, gb; member
/linux-4.4.14/drivers/media/platform/am437x/
Dam437x-vpfe.c643 ((bcomp->gr & VPFE_BLK_COMP_MASK) << in vpfe_ccdc_config_black_compense()
/linux-4.4.14/Documentation/
Dkprobes.txt641 ppc64: POWER5 (gr), 1656 MHz (SMT disabled, 1 virtual CPU per physical CPU)