Lines Matching refs:gr
44 gf100_gr_zbc_clear_color(struct gf100_gr *gr, int zbc) in gf100_gr_zbc_clear_color() argument
46 struct nvkm_device *device = gr->base.engine.subdev.device; in gf100_gr_zbc_clear_color()
47 if (gr->zbc_color[zbc].format) { in gf100_gr_zbc_clear_color()
48 nvkm_wr32(device, 0x405804, gr->zbc_color[zbc].ds[0]); in gf100_gr_zbc_clear_color()
49 nvkm_wr32(device, 0x405808, gr->zbc_color[zbc].ds[1]); in gf100_gr_zbc_clear_color()
50 nvkm_wr32(device, 0x40580c, gr->zbc_color[zbc].ds[2]); in gf100_gr_zbc_clear_color()
51 nvkm_wr32(device, 0x405810, gr->zbc_color[zbc].ds[3]); in gf100_gr_zbc_clear_color()
53 nvkm_wr32(device, 0x405814, gr->zbc_color[zbc].format); in gf100_gr_zbc_clear_color()
59 gf100_gr_zbc_color_get(struct gf100_gr *gr, int format, in gf100_gr_zbc_color_get() argument
62 struct nvkm_ltc *ltc = gr->base.engine.subdev.device->ltc; in gf100_gr_zbc_color_get()
66 if (gr->zbc_color[i].format) { in gf100_gr_zbc_color_get()
67 if (gr->zbc_color[i].format != format) in gf100_gr_zbc_color_get()
69 if (memcmp(gr->zbc_color[i].ds, ds, sizeof( in gf100_gr_zbc_color_get()
70 gr->zbc_color[i].ds))) in gf100_gr_zbc_color_get()
72 if (memcmp(gr->zbc_color[i].l2, l2, sizeof( in gf100_gr_zbc_color_get()
73 gr->zbc_color[i].l2))) { in gf100_gr_zbc_color_get()
86 memcpy(gr->zbc_color[zbc].ds, ds, sizeof(gr->zbc_color[zbc].ds)); in gf100_gr_zbc_color_get()
87 memcpy(gr->zbc_color[zbc].l2, l2, sizeof(gr->zbc_color[zbc].l2)); in gf100_gr_zbc_color_get()
88 gr->zbc_color[zbc].format = format; in gf100_gr_zbc_color_get()
90 gf100_gr_zbc_clear_color(gr, zbc); in gf100_gr_zbc_color_get()
95 gf100_gr_zbc_clear_depth(struct gf100_gr *gr, int zbc) in gf100_gr_zbc_clear_depth() argument
97 struct nvkm_device *device = gr->base.engine.subdev.device; in gf100_gr_zbc_clear_depth()
98 if (gr->zbc_depth[zbc].format) in gf100_gr_zbc_clear_depth()
99 nvkm_wr32(device, 0x405818, gr->zbc_depth[zbc].ds); in gf100_gr_zbc_clear_depth()
100 nvkm_wr32(device, 0x40581c, gr->zbc_depth[zbc].format); in gf100_gr_zbc_clear_depth()
106 gf100_gr_zbc_depth_get(struct gf100_gr *gr, int format, in gf100_gr_zbc_depth_get() argument
109 struct nvkm_ltc *ltc = gr->base.engine.subdev.device->ltc; in gf100_gr_zbc_depth_get()
113 if (gr->zbc_depth[i].format) { in gf100_gr_zbc_depth_get()
114 if (gr->zbc_depth[i].format != format) in gf100_gr_zbc_depth_get()
116 if (gr->zbc_depth[i].ds != ds) in gf100_gr_zbc_depth_get()
118 if (gr->zbc_depth[i].l2 != l2) { in gf100_gr_zbc_depth_get()
131 gr->zbc_depth[zbc].format = format; in gf100_gr_zbc_depth_get()
132 gr->zbc_depth[zbc].ds = ds; in gf100_gr_zbc_depth_get()
133 gr->zbc_depth[zbc].l2 = l2; in gf100_gr_zbc_depth_get()
135 gf100_gr_zbc_clear_depth(gr, zbc); in gf100_gr_zbc_depth_get()
146 struct gf100_gr *gr = gf100_gr(nvkm_gr(object->engine)); in gf100_fermi_mthd_zbc_color() local
173 ret = gf100_gr_zbc_color_get(gr, args->v0.format, in gf100_fermi_mthd_zbc_color()
192 struct gf100_gr *gr = gf100_gr(nvkm_gr(object->engine)); in gf100_fermi_mthd_zbc_depth() local
201 ret = gf100_gr_zbc_depth_get(gr, args->v0.format, in gf100_fermi_mthd_zbc_depth()
262 struct gf100_gr *gr = gf100_gr(base); in gf100_gr_object_get() local
265 while (gr->func->sclass[c].oclass) { in gf100_gr_object_get()
267 *sclass = gr->func->sclass[index]; in gf100_gr_object_get()
284 struct gf100_gr *gr = chan->gr; in gf100_gr_chan_bind() local
287 ret = nvkm_gpuobj_new(gr->base.engine.subdev.device, gr->size, in gf100_gr_chan_bind()
293 for (i = 0; i < gr->size; i += 4) in gf100_gr_chan_bind()
294 nvkm_wo32(*pgpuobj, i, gr->data[i / 4]); in gf100_gr_chan_bind()
296 if (!gr->firmware) { in gf100_gr_chan_bind()
347 struct gf100_gr *gr = gf100_gr(base); in gf100_gr_chan_new() local
348 struct gf100_gr_data *data = gr->mmio_data; in gf100_gr_chan_new()
349 struct gf100_gr_mmio *mmio = gr->mmio_list; in gf100_gr_chan_new()
351 struct nvkm_device *device = gr->base.engine.subdev.device; in gf100_gr_chan_new()
357 chan->gr = gr; in gf100_gr_chan_new()
377 for (i = 0; data->size && i < ARRAY_SIZE(gr->mmio_data); i++) { in gf100_gr_chan_new()
396 for (i = 0; mmio->addr && i < ARRAY_SIZE(gr->mmio_list); i++) { in gf100_gr_chan_new()
674 gf100_gr_zbc_init(struct gf100_gr *gr) in gf100_gr_zbc_init() argument
684 struct nvkm_ltc *ltc = gr->base.engine.subdev.device->ltc; in gf100_gr_zbc_init()
687 if (!gr->zbc_color[0].format) { in gf100_gr_zbc_init()
688 gf100_gr_zbc_color_get(gr, 1, & zero[0], &zero[4]); in gf100_gr_zbc_init()
689 gf100_gr_zbc_color_get(gr, 2, & one[0], &one[4]); in gf100_gr_zbc_init()
690 gf100_gr_zbc_color_get(gr, 4, &f32_0[0], &f32_0[4]); in gf100_gr_zbc_init()
691 gf100_gr_zbc_color_get(gr, 4, &f32_1[0], &f32_1[4]); in gf100_gr_zbc_init()
692 gf100_gr_zbc_depth_get(gr, 1, 0x00000000, 0x00000000); in gf100_gr_zbc_init()
693 gf100_gr_zbc_depth_get(gr, 1, 0x3f800000, 0x3f800000); in gf100_gr_zbc_init()
697 gf100_gr_zbc_clear_color(gr, index); in gf100_gr_zbc_init()
699 gf100_gr_zbc_clear_depth(gr, index); in gf100_gr_zbc_init()
708 gf100_gr_wait_idle(struct gf100_gr *gr) in gf100_gr_wait_idle() argument
710 struct nvkm_subdev *subdev = &gr->base.engine.subdev; in gf100_gr_wait_idle()
737 gf100_gr_mmio(struct gf100_gr *gr, const struct gf100_gr_pack *p) in gf100_gr_mmio() argument
739 struct nvkm_device *device = gr->base.engine.subdev.device; in gf100_gr_mmio()
754 gf100_gr_icmd(struct gf100_gr *gr, const struct gf100_gr_pack *p) in gf100_gr_icmd() argument
756 struct nvkm_device *device = gr->base.engine.subdev.device; in gf100_gr_icmd()
779 gf100_gr_wait_idle(gr); in gf100_gr_icmd()
792 gf100_gr_mthd(struct gf100_gr *gr, const struct gf100_gr_pack *p) in gf100_gr_mthd() argument
794 struct nvkm_device *device = gr->base.engine.subdev.device; in gf100_gr_mthd()
819 struct gf100_gr *gr = gf100_gr(base); in gf100_gr_units() local
822 cfg = (u32)gr->gpc_nr; in gf100_gr_units()
823 cfg |= (u32)gr->tpc_total << 8; in gf100_gr_units()
824 cfg |= (u64)gr->rop_nr << 32; in gf100_gr_units()
855 gf100_gr_trap_gpc_rop(struct gf100_gr *gr, int gpc) in gf100_gr_trap_gpc_rop() argument
857 struct nvkm_subdev *subdev = &gr->base.engine.subdev; in gf100_gr_trap_gpc_rop()
897 gf100_gr_trap_mp(struct gf100_gr *gr, int gpc, int tpc) in gf100_gr_trap_mp() argument
899 struct nvkm_subdev *subdev = &gr->base.engine.subdev; in gf100_gr_trap_mp()
918 gf100_gr_trap_tpc(struct gf100_gr *gr, int gpc, int tpc) in gf100_gr_trap_tpc() argument
920 struct nvkm_subdev *subdev = &gr->base.engine.subdev; in gf100_gr_trap_tpc()
932 gf100_gr_trap_mp(gr, gpc, tpc); in gf100_gr_trap_tpc()
956 gf100_gr_trap_gpc(struct gf100_gr *gr, int gpc) in gf100_gr_trap_gpc() argument
958 struct nvkm_subdev *subdev = &gr->base.engine.subdev; in gf100_gr_trap_gpc()
964 gf100_gr_trap_gpc_rop(gr, gpc); in gf100_gr_trap_gpc()
989 for (tpc = 0; tpc < gr->tpc_nr[gpc]; tpc++) { in gf100_gr_trap_gpc()
992 gf100_gr_trap_tpc(gr, gpc, tpc); in gf100_gr_trap_gpc()
1004 gf100_gr_trap_intr(struct gf100_gr *gr) in gf100_gr_trap_intr() argument
1006 struct nvkm_subdev *subdev = &gr->base.engine.subdev; in gf100_gr_trap_intr()
1074 for (gpc = 0; stat && gpc < gr->gpc_nr; gpc++) { in gf100_gr_trap_intr()
1077 gf100_gr_trap_gpc(gr, gpc); in gf100_gr_trap_intr()
1087 for (rop = 0; rop < gr->rop_nr; rop++) { in gf100_gr_trap_intr()
1106 gf100_gr_ctxctl_debug_unit(struct gf100_gr *gr, u32 base) in gf100_gr_ctxctl_debug_unit() argument
1108 struct nvkm_subdev *subdev = &gr->base.engine.subdev; in gf100_gr_ctxctl_debug_unit()
1125 gf100_gr_ctxctl_debug(struct gf100_gr *gr) in gf100_gr_ctxctl_debug() argument
1127 struct nvkm_device *device = gr->base.engine.subdev.device; in gf100_gr_ctxctl_debug()
1131 gf100_gr_ctxctl_debug_unit(gr, 0x409000); in gf100_gr_ctxctl_debug()
1133 gf100_gr_ctxctl_debug_unit(gr, 0x502000 + (gpc * 0x8000)); in gf100_gr_ctxctl_debug()
1137 gf100_gr_ctxctl_isr(struct gf100_gr *gr) in gf100_gr_ctxctl_isr() argument
1139 struct nvkm_subdev *subdev = &gr->base.engine.subdev; in gf100_gr_ctxctl_isr()
1165 gf100_gr_ctxctl_debug(gr); in gf100_gr_ctxctl_isr()
1172 gf100_gr_ctxctl_debug(gr); in gf100_gr_ctxctl_isr()
1180 struct gf100_gr *gr = gf100_gr(base); in gf100_gr_intr() local
1181 struct nvkm_subdev *subdev = &gr->base.engine.subdev; in gf100_gr_intr()
1249 gf100_gr_trap_intr(gr); in gf100_gr_intr()
1255 gf100_gr_ctxctl_isr(gr); in gf100_gr_intr()
1270 gf100_gr_init_fw(struct gf100_gr *gr, u32 fuc_base, in gf100_gr_init_fw() argument
1273 struct nvkm_device *device = gr->base.engine.subdev.device; in gf100_gr_init_fw()
1293 gf100_gr_init_csdata(struct gf100_gr *gr, in gf100_gr_init_csdata() argument
1297 struct nvkm_device *device = gr->base.engine.subdev.device; in gf100_gr_init_csdata()
1335 gf100_gr_init_ctxctl(struct gf100_gr *gr) in gf100_gr_init_ctxctl() argument
1337 const struct gf100_grctx_func *grctx = gr->func->grctx; in gf100_gr_init_ctxctl()
1338 struct nvkm_subdev *subdev = &gr->base.engine.subdev; in gf100_gr_init_ctxctl()
1342 if (gr->firmware) { in gf100_gr_init_ctxctl()
1345 gf100_gr_init_fw(gr, 0x409000, &gr->fuc409c, &gr->fuc409d); in gf100_gr_init_ctxctl()
1346 gf100_gr_init_fw(gr, 0x41a000, &gr->fuc41ac, &gr->fuc41ad); in gf100_gr_init_ctxctl()
1369 if ((gr->size = nvkm_rd32(device, 0x409800))) in gf100_gr_init_ctxctl()
1427 if (gr->data == NULL) { in gf100_gr_init_ctxctl()
1428 int ret = gf100_grctx_generate(gr); in gf100_gr_init_ctxctl()
1437 if (!gr->func->fecs.ucode) { in gf100_gr_init_ctxctl()
1444 for (i = 0; i < gr->func->fecs.ucode->data.size / 4; i++) in gf100_gr_init_ctxctl()
1445 nvkm_wr32(device, 0x4091c4, gr->func->fecs.ucode->data.data[i]); in gf100_gr_init_ctxctl()
1448 for (i = 0; i < gr->func->fecs.ucode->code.size / 4; i++) { in gf100_gr_init_ctxctl()
1451 nvkm_wr32(device, 0x409184, gr->func->fecs.ucode->code.data[i]); in gf100_gr_init_ctxctl()
1456 for (i = 0; i < gr->func->gpccs.ucode->data.size / 4; i++) in gf100_gr_init_ctxctl()
1457 nvkm_wr32(device, 0x41a1c4, gr->func->gpccs.ucode->data.data[i]); in gf100_gr_init_ctxctl()
1460 for (i = 0; i < gr->func->gpccs.ucode->code.size / 4; i++) { in gf100_gr_init_ctxctl()
1463 nvkm_wr32(device, 0x41a184, gr->func->gpccs.ucode->code.data[i]); in gf100_gr_init_ctxctl()
1468 gf100_gr_init_csdata(gr, grctx->hub, 0x409000, 0x000, 0x000000); in gf100_gr_init_ctxctl()
1469 gf100_gr_init_csdata(gr, grctx->gpc, 0x41a000, 0x000, 0x418000); in gf100_gr_init_ctxctl()
1470 gf100_gr_init_csdata(gr, grctx->tpc, 0x41a000, 0x004, 0x419800); in gf100_gr_init_ctxctl()
1471 gf100_gr_init_csdata(gr, grctx->ppc, 0x41a000, 0x008, 0x41be00); in gf100_gr_init_ctxctl()
1480 gf100_gr_ctxctl_debug(gr); in gf100_gr_init_ctxctl()
1484 gr->size = nvkm_rd32(device, 0x409804); in gf100_gr_init_ctxctl()
1485 if (gr->data == NULL) { in gf100_gr_init_ctxctl()
1486 int ret = gf100_grctx_generate(gr); in gf100_gr_init_ctxctl()
1499 struct gf100_gr *gr = gf100_gr(base); in gf100_gr_oneinit() local
1500 struct nvkm_device *device = gr->base.engine.subdev.device; in gf100_gr_oneinit()
1506 &gr->unk4188b4); in gf100_gr_oneinit()
1511 &gr->unk4188b8); in gf100_gr_oneinit()
1515 nvkm_kmap(gr->unk4188b4); in gf100_gr_oneinit()
1517 nvkm_wo32(gr->unk4188b4, i, 0x00000010); in gf100_gr_oneinit()
1518 nvkm_done(gr->unk4188b4); in gf100_gr_oneinit()
1520 nvkm_kmap(gr->unk4188b8); in gf100_gr_oneinit()
1522 nvkm_wo32(gr->unk4188b8, i, 0x00000010); in gf100_gr_oneinit()
1523 nvkm_done(gr->unk4188b8); in gf100_gr_oneinit()
1525 gr->rop_nr = (nvkm_rd32(device, 0x409604) & 0x001f0000) >> 16; in gf100_gr_oneinit()
1526 gr->gpc_nr = nvkm_rd32(device, 0x409604) & 0x0000001f; in gf100_gr_oneinit()
1527 for (i = 0; i < gr->gpc_nr; i++) { in gf100_gr_oneinit()
1528 gr->tpc_nr[i] = nvkm_rd32(device, GPC_UNIT(i, 0x2608)); in gf100_gr_oneinit()
1529 gr->tpc_total += gr->tpc_nr[i]; in gf100_gr_oneinit()
1530 gr->ppc_nr[i] = gr->func->ppc_nr; in gf100_gr_oneinit()
1531 for (j = 0; j < gr->ppc_nr[i]; j++) { in gf100_gr_oneinit()
1534 gr->ppc_mask[i] |= (1 << j); in gf100_gr_oneinit()
1535 gr->ppc_tpc_nr[i][j] = hweight8(mask); in gf100_gr_oneinit()
1542 if (gr->tpc_total == 11) { /* 465, 3/4/4/0, 4 */ in gf100_gr_oneinit()
1543 gr->magic_not_rop_nr = 0x07; in gf100_gr_oneinit()
1545 if (gr->tpc_total == 14) { /* 470, 3/3/4/4, 5 */ in gf100_gr_oneinit()
1546 gr->magic_not_rop_nr = 0x05; in gf100_gr_oneinit()
1548 if (gr->tpc_total == 15) { /* 480, 3/4/4/4, 6 */ in gf100_gr_oneinit()
1549 gr->magic_not_rop_nr = 0x06; in gf100_gr_oneinit()
1553 gr->magic_not_rop_nr = 0x03; in gf100_gr_oneinit()
1556 gr->magic_not_rop_nr = 0x01; in gf100_gr_oneinit()
1559 gr->magic_not_rop_nr = 0x01; in gf100_gr_oneinit()
1562 gr->magic_not_rop_nr = 0x06; in gf100_gr_oneinit()
1565 gr->magic_not_rop_nr = 0x03; in gf100_gr_oneinit()
1568 gr->magic_not_rop_nr = 0x03; in gf100_gr_oneinit()
1574 gr->magic_not_rop_nr = 0x01; in gf100_gr_oneinit()
1584 struct gf100_gr *gr = gf100_gr(base); in gf100_gr_init_() local
1585 nvkm_pmu_pgob(gr->base.engine.subdev.device->pmu, false); in gf100_gr_init_()
1586 return gr->func->init(gr); in gf100_gr_init_()
1599 struct gf100_gr *gr = gf100_gr(base); in gf100_gr_dtor() local
1601 if (gr->func->dtor) in gf100_gr_dtor()
1602 gr->func->dtor(gr); in gf100_gr_dtor()
1603 kfree(gr->data); in gf100_gr_dtor()
1605 gf100_gr_dtor_fw(&gr->fuc409c); in gf100_gr_dtor()
1606 gf100_gr_dtor_fw(&gr->fuc409d); in gf100_gr_dtor()
1607 gf100_gr_dtor_fw(&gr->fuc41ac); in gf100_gr_dtor()
1608 gf100_gr_dtor_fw(&gr->fuc41ad); in gf100_gr_dtor()
1610 nvkm_memory_del(&gr->unk4188b8); in gf100_gr_dtor()
1611 nvkm_memory_del(&gr->unk4188b4); in gf100_gr_dtor()
1612 return gr; in gf100_gr_dtor()
1627 gf100_gr_ctor_fw(struct gf100_gr *gr, const char *fwname, in gf100_gr_ctor_fw() argument
1630 struct nvkm_subdev *subdev = &gr->base.engine.subdev; in gf100_gr_ctor_fw()
1662 int index, struct gf100_gr *gr) in gf100_gr_ctor() argument
1666 gr->func = func; in gf100_gr_ctor()
1667 gr->firmware = nvkm_boolopt(device->cfgopt, "NvGrUseFW", in gf100_gr_ctor()
1671 gr->firmware || func->fecs.ucode != NULL, in gf100_gr_ctor()
1672 &gr->base); in gf100_gr_ctor()
1676 if (gr->firmware) { in gf100_gr_ctor()
1677 nvkm_info(&gr->base.engine.subdev, "using external firmware\n"); in gf100_gr_ctor()
1678 if (gf100_gr_ctor_fw(gr, "fecs_inst", &gr->fuc409c) || in gf100_gr_ctor()
1679 gf100_gr_ctor_fw(gr, "fecs_data", &gr->fuc409d) || in gf100_gr_ctor()
1680 gf100_gr_ctor_fw(gr, "gpccs_inst", &gr->fuc41ac) || in gf100_gr_ctor()
1681 gf100_gr_ctor_fw(gr, "gpccs_data", &gr->fuc41ad)) in gf100_gr_ctor()
1692 struct gf100_gr *gr; in gf100_gr_new_() local
1693 if (!(gr = kzalloc(sizeof(*gr), GFP_KERNEL))) in gf100_gr_new_()
1695 *pgr = &gr->base; in gf100_gr_new_()
1696 return gf100_gr_ctor(func, device, index, gr); in gf100_gr_new_()
1700 gf100_gr_init(struct gf100_gr *gr) in gf100_gr_init() argument
1702 struct nvkm_device *device = gr->base.engine.subdev.device; in gf100_gr_init()
1703 const u32 magicgpc918 = DIV_ROUND_UP(0x00800000, gr->tpc_total); in gf100_gr_init()
1715 nvkm_wr32(device, GPC_BCAST(0x08b4), nvkm_memory_addr(gr->unk4188b4) >> 8); in gf100_gr_init()
1716 nvkm_wr32(device, GPC_BCAST(0x08b8), nvkm_memory_addr(gr->unk4188b8) >> 8); in gf100_gr_init()
1718 gf100_gr_mmio(gr, gr->func->mmio); in gf100_gr_init()
1722 memcpy(tpcnr, gr->tpc_nr, sizeof(gr->tpc_nr)); in gf100_gr_init()
1723 for (i = 0, gpc = -1; i < gr->tpc_total; i++) { in gf100_gr_init()
1725 gpc = (gpc + 1) % gr->gpc_nr; in gf100_gr_init()
1727 tpc = gr->tpc_nr[gpc] - tpcnr[gpc]--; in gf100_gr_init()
1737 for (gpc = 0; gpc < gr->gpc_nr; gpc++) { in gf100_gr_init()
1739 gr->magic_not_rop_nr << 8 | gr->tpc_nr[gpc]); in gf100_gr_init()
1741 gr->tpc_total); in gf100_gr_init()
1769 for (gpc = 0; gpc < gr->gpc_nr; gpc++) { in gf100_gr_init()
1774 for (tpc = 0; tpc < gr->tpc_nr[gpc]; tpc++) { in gf100_gr_init()
1787 for (rop = 0; rop < gr->rop_nr; rop++) { in gf100_gr_init()
1803 gf100_gr_zbc_init(gr); in gf100_gr_init()
1805 return gf100_gr_init_ctxctl(gr); in gf100_gr_init()