34 nv40_gr_units(struct nvkm_gr *gr)  in nv40_gr_units()  argument
36 	return nvkm_rd32(gr->engine.subdev.device, 0x1540);  in nv40_gr_units()
78 	struct nv40_gr *gr = chan->gr;  in nv40_gr_chan_bind()  local
79 	int ret = nvkm_gpuobj_new(gr->base.engine.subdev.device, gr->size,  in nv40_gr_chan_bind()
84 		nv40_grctx_fill(gr->base.engine.subdev.device, *pgpuobj);  in nv40_gr_chan_bind()
95 	struct nv40_gr *gr = chan->gr;  in nv40_gr_chan_fini()  local
96 	struct nvkm_subdev *subdev = &gr->base.engine.subdev;  in nv40_gr_chan_fini()
134 	spin_lock_irqsave(&chan->gr->base.engine.lock, flags);  in nv40_gr_chan_dtor()
136 	spin_unlock_irqrestore(&chan->gr->base.engine.lock, flags);  in nv40_gr_chan_dtor()
151 	struct nv40_gr *gr = nv40_gr(base);  in nv40_gr_chan_new()  local
158 	chan->gr = gr;  in nv40_gr_chan_new()
162 	spin_lock_irqsave(&chan->gr->base.engine.lock, flags);  in nv40_gr_chan_new()
163 	list_add(&chan->head, &gr->chan);  in nv40_gr_chan_new()
164 	spin_unlock_irqrestore(&chan->gr->base.engine.lock, flags);  in nv40_gr_chan_new()
175 	struct nv40_gr *gr = nv40_gr(base);  in nv40_gr_tile()  local
176 	struct nvkm_device *device = gr->base.engine.subdev.device;  in nv40_gr_tile()
181 	nv04_gr_idle(&gr->base);  in nv40_gr_tile()
234 	struct nv40_gr *gr = nv40_gr(base);  in nv40_gr_intr()  local
236 	struct nvkm_subdev *subdev = &gr->base.engine.subdev;  in nv40_gr_intr()
251 	spin_lock_irqsave(&gr->base.engine.lock, flags);  in nv40_gr_intr()
252 	list_for_each_entry(temp, &gr->chan, head) {  in nv40_gr_intr()
256 			list_add(&chan->head, &gr->chan);  in nv40_gr_intr()
283 	spin_unlock_irqrestore(&gr->base.engine.lock, flags);  in nv40_gr_intr()
289 	struct nv40_gr *gr = nv40_gr(base);  in nv40_gr_init()  local
290 	struct nvkm_device *device = gr->base.engine.subdev.device;  in nv40_gr_init()
295 	ret = nv40_grctx_init(device, &gr->size);  in nv40_gr_init()
434 	struct nv40_gr *gr;  in nv40_gr_new_()  local
436 	if (!(gr = kzalloc(sizeof(*gr), GFP_KERNEL)))  in nv40_gr_new_()
438 	*pgr = &gr->base;  in nv40_gr_new_()
439 	INIT_LIST_HEAD(&gr->chan);  in nv40_gr_new_()
441 	return nvkm_gr_ctor(func, device, index, 0x00001000, true, &gr->base);  in nv40_gr_new_()