1/*
2 * Code to handle x86 style IRQs plus some generic interrupt stuff.
3 *
4 * Copyright (C) 1992 Linus Torvalds
5 * Copyright (C) 1994, 1995, 1996, 1997, 1998 Ralf Baechle
6 * Copyright (C) 1999 SuSE GmbH (Philipp Rumpf, prumpf@tux.org)
7 * Copyright (C) 1999-2000 Grant Grundler
8 * Copyright (c) 2005 Matthew Wilcox
9 *
10 *    This program is free software; you can redistribute it and/or modify
11 *    it under the terms of the GNU General Public License as published by
12 *    the Free Software Foundation; either version 2, or (at your option)
13 *    any later version.
14 *
15 *    This program is distributed in the hope that it will be useful,
16 *    but WITHOUT ANY WARRANTY; without even the implied warranty of
17 *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
18 *    GNU General Public License for more details.
19 *
20 *    You should have received a copy of the GNU General Public License
21 *    along with this program; if not, write to the Free Software
22 *    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 */
24#include <linux/bitops.h>
25#include <linux/errno.h>
26#include <linux/init.h>
27#include <linux/interrupt.h>
28#include <linux/kernel_stat.h>
29#include <linux/seq_file.h>
30#include <linux/types.h>
31#include <asm/io.h>
32
33#include <asm/smp.h>
34#include <asm/ldcw.h>
35
36#undef PARISC_IRQ_CR16_COUNTS
37
38extern irqreturn_t timer_interrupt(int, void *);
39extern irqreturn_t ipi_interrupt(int, void *);
40
41#define EIEM_MASK(irq)       (1UL<<(CPU_IRQ_MAX - irq))
42
43/* Bits in EIEM correlate with cpu_irq_action[].
44** Numbered *Big Endian*! (ie bit 0 is MSB)
45*/
46static volatile unsigned long cpu_eiem = 0;
47
48/*
49** local ACK bitmap ... habitually set to 1, but reset to zero
50** between ->ack() and ->end() of the interrupt to prevent
51** re-interruption of a processing interrupt.
52*/
53static DEFINE_PER_CPU(unsigned long, local_ack_eiem) = ~0UL;
54
55static void cpu_mask_irq(struct irq_data *d)
56{
57	unsigned long eirr_bit = EIEM_MASK(d->irq);
58
59	cpu_eiem &= ~eirr_bit;
60	/* Do nothing on the other CPUs.  If they get this interrupt,
61	 * The & cpu_eiem in the do_cpu_irq_mask() ensures they won't
62	 * handle it, and the set_eiem() at the bottom will ensure it
63	 * then gets disabled */
64}
65
66static void __cpu_unmask_irq(unsigned int irq)
67{
68	unsigned long eirr_bit = EIEM_MASK(irq);
69
70	cpu_eiem |= eirr_bit;
71
72	/* This is just a simple NOP IPI.  But what it does is cause
73	 * all the other CPUs to do a set_eiem(cpu_eiem) at the end
74	 * of the interrupt handler */
75	smp_send_all_nop();
76}
77
78static void cpu_unmask_irq(struct irq_data *d)
79{
80	__cpu_unmask_irq(d->irq);
81}
82
83void cpu_ack_irq(struct irq_data *d)
84{
85	unsigned long mask = EIEM_MASK(d->irq);
86	int cpu = smp_processor_id();
87
88	/* Clear in EIEM so we can no longer process */
89	per_cpu(local_ack_eiem, cpu) &= ~mask;
90
91	/* disable the interrupt */
92	set_eiem(cpu_eiem & per_cpu(local_ack_eiem, cpu));
93
94	/* and now ack it */
95	mtctl(mask, 23);
96}
97
98void cpu_eoi_irq(struct irq_data *d)
99{
100	unsigned long mask = EIEM_MASK(d->irq);
101	int cpu = smp_processor_id();
102
103	/* set it in the eiems---it's no longer in process */
104	per_cpu(local_ack_eiem, cpu) |= mask;
105
106	/* enable the interrupt */
107	set_eiem(cpu_eiem & per_cpu(local_ack_eiem, cpu));
108}
109
110#ifdef CONFIG_SMP
111int cpu_check_affinity(struct irq_data *d, const struct cpumask *dest)
112{
113	int cpu_dest;
114
115	/* timer and ipi have to always be received on all CPUs */
116	if (irqd_is_per_cpu(d))
117		return -EINVAL;
118
119	/* whatever mask they set, we just allow one CPU */
120	cpu_dest = cpumask_first_and(dest, cpu_online_mask);
121
122	return cpu_dest;
123}
124
125static int cpu_set_affinity_irq(struct irq_data *d, const struct cpumask *dest,
126				bool force)
127{
128	int cpu_dest;
129
130	cpu_dest = cpu_check_affinity(d, dest);
131	if (cpu_dest < 0)
132		return -1;
133
134	cpumask_copy(irq_data_get_affinity_mask(d), dest);
135
136	return 0;
137}
138#endif
139
140static struct irq_chip cpu_interrupt_type = {
141	.name			= "CPU",
142	.irq_mask		= cpu_mask_irq,
143	.irq_unmask		= cpu_unmask_irq,
144	.irq_ack		= cpu_ack_irq,
145	.irq_eoi		= cpu_eoi_irq,
146#ifdef CONFIG_SMP
147	.irq_set_affinity	= cpu_set_affinity_irq,
148#endif
149	/* XXX: Needs to be written.  We managed without it so far, but
150	 * we really ought to write it.
151	 */
152	.irq_retrigger	= NULL,
153};
154
155DEFINE_PER_CPU_SHARED_ALIGNED(irq_cpustat_t, irq_stat);
156#define irq_stats(x)		(&per_cpu(irq_stat, x))
157
158/*
159 * /proc/interrupts printing for arch specific interrupts
160 */
161int arch_show_interrupts(struct seq_file *p, int prec)
162{
163	int j;
164
165#ifdef CONFIG_DEBUG_STACKOVERFLOW
166	seq_printf(p, "%*s: ", prec, "STK");
167	for_each_online_cpu(j)
168		seq_printf(p, "%10u ", irq_stats(j)->kernel_stack_usage);
169	seq_puts(p, "  Kernel stack usage\n");
170# ifdef CONFIG_IRQSTACKS
171	seq_printf(p, "%*s: ", prec, "IST");
172	for_each_online_cpu(j)
173		seq_printf(p, "%10u ", irq_stats(j)->irq_stack_usage);
174	seq_puts(p, "  Interrupt stack usage\n");
175# endif
176#endif
177#ifdef CONFIG_SMP
178	seq_printf(p, "%*s: ", prec, "RES");
179	for_each_online_cpu(j)
180		seq_printf(p, "%10u ", irq_stats(j)->irq_resched_count);
181	seq_puts(p, "  Rescheduling interrupts\n");
182#endif
183	seq_printf(p, "%*s: ", prec, "UAH");
184	for_each_online_cpu(j)
185		seq_printf(p, "%10u ", irq_stats(j)->irq_unaligned_count);
186	seq_puts(p, "  Unaligned access handler traps\n");
187	seq_printf(p, "%*s: ", prec, "FPA");
188	for_each_online_cpu(j)
189		seq_printf(p, "%10u ", irq_stats(j)->irq_fpassist_count);
190	seq_puts(p, "  Floating point assist traps\n");
191	seq_printf(p, "%*s: ", prec, "TLB");
192	for_each_online_cpu(j)
193		seq_printf(p, "%10u ", irq_stats(j)->irq_tlb_count);
194	seq_puts(p, "  TLB shootdowns\n");
195	return 0;
196}
197
198int show_interrupts(struct seq_file *p, void *v)
199{
200	int i = *(loff_t *) v, j;
201	unsigned long flags;
202
203	if (i == 0) {
204		seq_puts(p, "    ");
205		for_each_online_cpu(j)
206			seq_printf(p, "       CPU%d", j);
207
208#ifdef PARISC_IRQ_CR16_COUNTS
209		seq_printf(p, " [min/avg/max] (CPU cycle counts)");
210#endif
211		seq_putc(p, '\n');
212	}
213
214	if (i < NR_IRQS) {
215		struct irq_desc *desc = irq_to_desc(i);
216		struct irqaction *action;
217
218		raw_spin_lock_irqsave(&desc->lock, flags);
219		action = desc->action;
220		if (!action)
221			goto skip;
222		seq_printf(p, "%3d: ", i);
223#ifdef CONFIG_SMP
224		for_each_online_cpu(j)
225			seq_printf(p, "%10u ", kstat_irqs_cpu(i, j));
226#else
227		seq_printf(p, "%10u ", kstat_irqs(i));
228#endif
229
230		seq_printf(p, " %14s", irq_desc_get_chip(desc)->name);
231#ifndef PARISC_IRQ_CR16_COUNTS
232		seq_printf(p, "  %s", action->name);
233
234		while ((action = action->next))
235			seq_printf(p, ", %s", action->name);
236#else
237		for ( ;action; action = action->next) {
238			unsigned int k, avg, min, max;
239
240			min = max = action->cr16_hist[0];
241
242			for (avg = k = 0; k < PARISC_CR16_HIST_SIZE; k++) {
243				int hist = action->cr16_hist[k];
244
245				if (hist) {
246					avg += hist;
247				} else
248					break;
249
250				if (hist > max) max = hist;
251				if (hist < min) min = hist;
252			}
253
254			avg /= k;
255			seq_printf(p, " %s[%d/%d/%d]", action->name,
256					min,avg,max);
257		}
258#endif
259
260		seq_putc(p, '\n');
261 skip:
262		raw_spin_unlock_irqrestore(&desc->lock, flags);
263	}
264
265	if (i == NR_IRQS)
266		arch_show_interrupts(p, 3);
267
268	return 0;
269}
270
271
272
273/*
274** The following form a "set": Virtual IRQ, Transaction Address, Trans Data.
275** Respectively, these map to IRQ region+EIRR, Processor HPA, EIRR bit.
276**
277** To use txn_XXX() interfaces, get a Virtual IRQ first.
278** Then use that to get the Transaction address and data.
279*/
280
281int cpu_claim_irq(unsigned int irq, struct irq_chip *type, void *data)
282{
283	if (irq_has_action(irq))
284		return -EBUSY;
285	if (irq_get_chip(irq) != &cpu_interrupt_type)
286		return -EBUSY;
287
288	/* for iosapic interrupts */
289	if (type) {
290		irq_set_chip_and_handler(irq, type, handle_percpu_irq);
291		irq_set_chip_data(irq, data);
292		__cpu_unmask_irq(irq);
293	}
294	return 0;
295}
296
297int txn_claim_irq(int irq)
298{
299	return cpu_claim_irq(irq, NULL, NULL) ? -1 : irq;
300}
301
302/*
303 * The bits_wide parameter accommodates the limitations of the HW/SW which
304 * use these bits:
305 * Legacy PA I/O (GSC/NIO): 5 bits (architected EIM register)
306 * V-class (EPIC):          6 bits
307 * N/L/A-class (iosapic):   8 bits
308 * PCI 2.2 MSI:            16 bits
309 * Some PCI devices:       32 bits (Symbios SCSI/ATM/HyperFabric)
310 *
311 * On the service provider side:
312 * o PA 1.1 (and PA2.0 narrow mode)     5-bits (width of EIR register)
313 * o PA 2.0 wide mode                   6-bits (per processor)
314 * o IA64                               8-bits (0-256 total)
315 *
316 * So a Legacy PA I/O device on a PA 2.0 box can't use all the bits supported
317 * by the processor...and the N/L-class I/O subsystem supports more bits than
318 * PA2.0 has. The first case is the problem.
319 */
320int txn_alloc_irq(unsigned int bits_wide)
321{
322	int irq;
323
324	/* never return irq 0 cause that's the interval timer */
325	for (irq = CPU_IRQ_BASE + 1; irq <= CPU_IRQ_MAX; irq++) {
326		if (cpu_claim_irq(irq, NULL, NULL) < 0)
327			continue;
328		if ((irq - CPU_IRQ_BASE) >= (1 << bits_wide))
329			continue;
330		return irq;
331	}
332
333	/* unlikely, but be prepared */
334	return -1;
335}
336
337
338unsigned long txn_affinity_addr(unsigned int irq, int cpu)
339{
340#ifdef CONFIG_SMP
341	struct irq_data *d = irq_get_irq_data(irq);
342	cpumask_copy(irq_data_get_affinity_mask(d), cpumask_of(cpu));
343#endif
344
345	return per_cpu(cpu_data, cpu).txn_addr;
346}
347
348
349unsigned long txn_alloc_addr(unsigned int virt_irq)
350{
351	static int next_cpu = -1;
352
353	next_cpu++; /* assign to "next" CPU we want this bugger on */
354
355	/* validate entry */
356	while ((next_cpu < nr_cpu_ids) &&
357		(!per_cpu(cpu_data, next_cpu).txn_addr ||
358		 !cpu_online(next_cpu)))
359		next_cpu++;
360
361	if (next_cpu >= nr_cpu_ids)
362		next_cpu = 0;	/* nothing else, assign monarch */
363
364	return txn_affinity_addr(virt_irq, next_cpu);
365}
366
367
368unsigned int txn_alloc_data(unsigned int virt_irq)
369{
370	return virt_irq - CPU_IRQ_BASE;
371}
372
373static inline int eirr_to_irq(unsigned long eirr)
374{
375	int bit = fls_long(eirr);
376	return (BITS_PER_LONG - bit) + TIMER_IRQ;
377}
378
379#ifdef CONFIG_IRQSTACKS
380/*
381 * IRQ STACK - used for irq handler
382 */
383#define IRQ_STACK_SIZE      (4096 << 2) /* 16k irq stack size */
384
385union irq_stack_union {
386	unsigned long stack[IRQ_STACK_SIZE/sizeof(unsigned long)];
387	volatile unsigned int slock[4];
388	volatile unsigned int lock[1];
389};
390
391DEFINE_PER_CPU(union irq_stack_union, irq_stack_union) = {
392		.slock = { 1,1,1,1 },
393	};
394#endif
395
396
397int sysctl_panic_on_stackoverflow = 1;
398
399static inline void stack_overflow_check(struct pt_regs *regs)
400{
401#ifdef CONFIG_DEBUG_STACKOVERFLOW
402	#define STACK_MARGIN	(256*6)
403
404	/* Our stack starts directly behind the thread_info struct. */
405	unsigned long stack_start = (unsigned long) current_thread_info();
406	unsigned long sp = regs->gr[30];
407	unsigned long stack_usage;
408	unsigned int *last_usage;
409	int cpu = smp_processor_id();
410
411	/* if sr7 != 0, we interrupted a userspace process which we do not want
412	 * to check for stack overflow. We will only check the kernel stack. */
413	if (regs->sr[7])
414		return;
415
416	/* calculate kernel stack usage */
417	stack_usage = sp - stack_start;
418#ifdef CONFIG_IRQSTACKS
419	if (likely(stack_usage <= THREAD_SIZE))
420		goto check_kernel_stack; /* found kernel stack */
421
422	/* check irq stack usage */
423	stack_start = (unsigned long) &per_cpu(irq_stack_union, cpu).stack;
424	stack_usage = sp - stack_start;
425
426	last_usage = &per_cpu(irq_stat.irq_stack_usage, cpu);
427	if (unlikely(stack_usage > *last_usage))
428		*last_usage = stack_usage;
429
430	if (likely(stack_usage < (IRQ_STACK_SIZE - STACK_MARGIN)))
431		return;
432
433	pr_emerg("stackcheck: %s will most likely overflow irq stack "
434		 "(sp:%lx, stk bottom-top:%lx-%lx)\n",
435		current->comm, sp, stack_start, stack_start + IRQ_STACK_SIZE);
436	goto panic_check;
437
438check_kernel_stack:
439#endif
440
441	/* check kernel stack usage */
442	last_usage = &per_cpu(irq_stat.kernel_stack_usage, cpu);
443
444	if (unlikely(stack_usage > *last_usage))
445		*last_usage = stack_usage;
446
447	if (likely(stack_usage < (THREAD_SIZE - STACK_MARGIN)))
448		return;
449
450	pr_emerg("stackcheck: %s will most likely overflow kernel stack "
451		 "(sp:%lx, stk bottom-top:%lx-%lx)\n",
452		current->comm, sp, stack_start, stack_start + THREAD_SIZE);
453
454#ifdef CONFIG_IRQSTACKS
455panic_check:
456#endif
457	if (sysctl_panic_on_stackoverflow)
458		panic("low stack detected by irq handler - check messages\n");
459#endif
460}
461
462#ifdef CONFIG_IRQSTACKS
463/* in entry.S: */
464void call_on_stack(unsigned long p1, void *func, unsigned long new_stack);
465
466static void execute_on_irq_stack(void *func, unsigned long param1)
467{
468	union irq_stack_union *union_ptr;
469	unsigned long irq_stack;
470	volatile unsigned int *irq_stack_in_use;
471
472	union_ptr = &per_cpu(irq_stack_union, smp_processor_id());
473	irq_stack = (unsigned long) &union_ptr->stack;
474	irq_stack = ALIGN(irq_stack + sizeof(irq_stack_union.slock),
475			 64); /* align for stack frame usage */
476
477	/* We may be called recursive. If we are already using the irq stack,
478	 * just continue to use it. Use spinlocks to serialize
479	 * the irq stack usage.
480	 */
481	irq_stack_in_use = (volatile unsigned int *)__ldcw_align(union_ptr);
482	if (!__ldcw(irq_stack_in_use)) {
483		void (*direct_call)(unsigned long p1) = func;
484
485		/* We are using the IRQ stack already.
486		 * Do direct call on current stack. */
487		direct_call(param1);
488		return;
489	}
490
491	/* This is where we switch to the IRQ stack. */
492	call_on_stack(param1, func, irq_stack);
493
494	/* free up irq stack usage. */
495	*irq_stack_in_use = 1;
496}
497
498void do_softirq_own_stack(void)
499{
500	execute_on_irq_stack(__do_softirq, 0);
501}
502#endif /* CONFIG_IRQSTACKS */
503
504/* ONLY called from entry.S:intr_extint() */
505void do_cpu_irq_mask(struct pt_regs *regs)
506{
507	struct pt_regs *old_regs;
508	unsigned long eirr_val;
509	int irq, cpu = smp_processor_id();
510	struct irq_data *irq_data;
511#ifdef CONFIG_SMP
512	cpumask_t dest;
513#endif
514
515	old_regs = set_irq_regs(regs);
516	local_irq_disable();
517	irq_enter();
518
519	eirr_val = mfctl(23) & cpu_eiem & per_cpu(local_ack_eiem, cpu);
520	if (!eirr_val)
521		goto set_out;
522	irq = eirr_to_irq(eirr_val);
523
524	irq_data = irq_get_irq_data(irq);
525
526	/* Filter out spurious interrupts, mostly from serial port at bootup */
527	if (unlikely(!irq_desc_has_action(irq_data_to_desc(irq_data))))
528		goto set_out;
529
530#ifdef CONFIG_SMP
531	cpumask_copy(&dest, irq_data_get_affinity_mask(irq_data));
532	if (irqd_is_per_cpu(irq_data) &&
533	    !cpumask_test_cpu(smp_processor_id(), &dest)) {
534		int cpu = cpumask_first(&dest);
535
536		printk(KERN_DEBUG "redirecting irq %d from CPU %d to %d\n",
537		       irq, smp_processor_id(), cpu);
538		gsc_writel(irq + CPU_IRQ_BASE,
539			   per_cpu(cpu_data, cpu).hpa);
540		goto set_out;
541	}
542#endif
543	stack_overflow_check(regs);
544
545#ifdef CONFIG_IRQSTACKS
546	execute_on_irq_stack(&generic_handle_irq, irq);
547#else
548	generic_handle_irq(irq);
549#endif /* CONFIG_IRQSTACKS */
550
551 out:
552	irq_exit();
553	set_irq_regs(old_regs);
554	return;
555
556 set_out:
557	set_eiem(cpu_eiem & per_cpu(local_ack_eiem, cpu));
558	goto out;
559}
560
561static struct irqaction timer_action = {
562	.handler = timer_interrupt,
563	.name = "timer",
564	.flags = IRQF_TIMER | IRQF_PERCPU | IRQF_IRQPOLL,
565};
566
567#ifdef CONFIG_SMP
568static struct irqaction ipi_action = {
569	.handler = ipi_interrupt,
570	.name = "IPI",
571	.flags = IRQF_PERCPU,
572};
573#endif
574
575static void claim_cpu_irqs(void)
576{
577	int i;
578	for (i = CPU_IRQ_BASE; i <= CPU_IRQ_MAX; i++) {
579		irq_set_chip_and_handler(i, &cpu_interrupt_type,
580					 handle_percpu_irq);
581	}
582
583	irq_set_handler(TIMER_IRQ, handle_percpu_irq);
584	setup_irq(TIMER_IRQ, &timer_action);
585#ifdef CONFIG_SMP
586	irq_set_handler(IPI_IRQ, handle_percpu_irq);
587	setup_irq(IPI_IRQ, &ipi_action);
588#endif
589}
590
591void __init init_IRQ(void)
592{
593	local_irq_disable();	/* PARANOID - should already be disabled */
594	mtctl(~0UL, 23);	/* EIRR : clear all pending external intr */
595#ifdef CONFIG_SMP
596	if (!cpu_eiem) {
597		claim_cpu_irqs();
598		cpu_eiem = EIEM_MASK(IPI_IRQ) | EIEM_MASK(TIMER_IRQ);
599	}
600#else
601	claim_cpu_irqs();
602	cpu_eiem = EIEM_MASK(TIMER_IRQ);
603#endif
604        set_eiem(cpu_eiem);	/* EIEM : enable all external intr */
605}
606