/linux-4.4.14/arch/arm64/boot/dts/arm/ |
D | rtsm_ve-aemv8a.dts | 17 interrupt-parent = <&gic>; 78 gic: interrupt-controller@2c001000 { label 79 compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic"; 121 interrupt-map = <0 0 0 &gic 0 0 4>, 122 <0 0 1 &gic 0 1 4>, 123 <0 0 2 &gic 0 2 4>, 124 <0 0 3 &gic 0 3 4>, 125 <0 0 4 &gic 0 4 4>, 126 <0 0 5 &gic 0 5 4>, 127 <0 0 6 &gic 0 6 4>, [all …]
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D | foundation-v8.dts | 14 interrupt-parent = <&gic>; 75 gic: interrupt-controller@2c001000 { label 76 compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic"; 119 interrupt-map = <0 0 0 &gic 0 0 4>, 120 <0 0 1 &gic 0 1 4>, 121 <0 0 2 &gic 0 2 4>, 122 <0 0 3 &gic 0 3 4>, 123 <0 0 4 &gic 0 4 4>, 124 <0 0 5 &gic 0 5 4>, 125 <0 0 6 &gic 0 6 4>, [all …]
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D | vexpress-v2f-1xv7-ca53x2.dts | 14 #include <dt-bindings/interrupt-controller/arm-gic.h> 21 interrupt-parent = <&gic>; 66 gic: interrupt-controller@2c001000 { label 67 compatible = "arm,gic-400"; 145 interrupt-map = <0 0 0 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 146 <0 0 1 &gic GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 147 <0 0 2 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 148 <0 0 3 &gic GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 149 <0 0 4 &gic GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, 150 <0 0 5 &gic GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>, [all …]
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D | juno-base.dtsi | 32 gic: interrupt-controller@2c010000 { label 33 compatible = "arm,gic-400", "arm,cortex-a15-gic"; 45 compatible = "arm,gic-v2m-frame"; 198 interrupt-map = <0 0 0 &gic 0 0 0 68 IRQ_TYPE_LEVEL_HIGH>, 199 <0 0 1 &gic 0 0 0 69 IRQ_TYPE_LEVEL_HIGH>, 200 <0 0 2 &gic 0 0 0 70 IRQ_TYPE_LEVEL_HIGH>, 201 <0 0 3 &gic 0 0 0 160 IRQ_TYPE_LEVEL_HIGH>, 202 <0 0 4 &gic 0 0 0 161 IRQ_TYPE_LEVEL_HIGH>, 203 <0 0 5 &gic 0 0 0 162 IRQ_TYPE_LEVEL_HIGH>, 204 <0 0 6 &gic 0 0 0 163 IRQ_TYPE_LEVEL_HIGH>, [all …]
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D | juno-r1.dts | 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 16 interrupt-parent = <&gic>; 162 interrupt-map = <0 0 0 1 &gic 0 0 0 136 4>, 163 <0 0 0 2 &gic 0 0 0 137 4>, 164 <0 0 0 3 &gic 0 0 0 138 4>, 165 <0 0 0 4 &gic 0 0 0 139 4>;
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D | juno.dts | 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 16 interrupt-parent = <&gic>;
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/linux-4.4.14/arch/arm/boot/dts/ |
D | vexpress-v2p-ca5s.dts | 17 interrupt-parent = <&gic>; 105 gic: interrupt-controller@2c001000 { label 106 compatible = "arm,cortex-a5-gic", "arm,cortex-a9-gic"; 207 interrupt-map = <0 0 0 &gic 0 0 4>, 208 <0 0 1 &gic 0 1 4>, 209 <0 0 2 &gic 0 2 4>, 210 <0 0 3 &gic 0 3 4>, 211 <0 0 4 &gic 0 4 4>, 212 <0 0 5 &gic 0 5 4>, 213 <0 0 6 &gic 0 6 4>, [all …]
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D | vexpress-v2p-ca15-tc1.dts | 17 interrupt-parent = <&gic>; 78 gic: interrupt-controller@2c001000 { label 79 compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic"; 237 interrupt-map = <0 0 0 &gic 0 0 4>, 238 <0 0 1 &gic 0 1 4>, 239 <0 0 2 &gic 0 2 4>, 240 <0 0 3 &gic 0 3 4>, 241 <0 0 4 &gic 0 4 4>, 242 <0 0 5 &gic 0 5 4>, 243 <0 0 6 &gic 0 6 4>, [all …]
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D | bcm5301x.dtsi | 14 #include <dt-bindings/interrupt-controller/arm-gic.h> 18 interrupt-parent = <&gic>; 68 gic: interrupt-controller@1000 { label 69 compatible = "arm,cortex-a9-gic"; 119 <0x00000000 0 &gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>, 122 <0x00012000 0 &gic GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, 123 <0x00012000 1 &gic GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>, 124 <0x00012000 2 &gic GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, 125 <0x00012000 3 &gic GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, 126 <0x00012000 4 &gic GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, [all …]
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D | vexpress-v2p-ca9.dts | 17 interrupt-parent = <&gic>; 160 gic: interrupt-controller@1e001000 { label 161 compatible = "arm,cortex-a9-gic"; 316 interrupt-map = <0 0 0 &gic 0 0 4>, 317 <0 0 1 &gic 0 1 4>, 318 <0 0 2 &gic 0 2 4>, 319 <0 0 3 &gic 0 3 4>, 320 <0 0 4 &gic 0 4 4>, 321 <0 0 5 &gic 0 5 4>, 322 <0 0 6 &gic 0 6 4>, [all …]
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D | vexpress-v2p-ca15_a7.dts | 17 interrupt-parent = <&gic>; 123 gic: interrupt-controller@2c001000 { label 124 compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic"; 595 interrupt-map = <0 0 0 &gic 0 0 4>, 596 <0 0 1 &gic 0 1 4>, 597 <0 0 2 &gic 0 2 4>, 598 <0 0 3 &gic 0 3 4>, 599 <0 0 4 &gic 0 4 4>, 600 <0 0 5 &gic 0 5 4>, 601 <0 0 6 &gic 0 6 4>, [all …]
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D | exynos5410.dtsi | 21 interrupt-parent = <&gic>; 84 gic: interrupt-controller@10481000 { label 85 compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic"; 123 <4 &gic 0 120 0>, 124 <5 &gic 0 121 0>, 125 <6 &gic 0 122 0>, 126 <7 &gic 0 123 0>, 127 <8 &gic 0 128 0>, 128 <9 &gic 0 129 0>, 129 <10 &gic 0 130 0>, [all …]
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D | alpine.dtsi | 27 #include <dt-bindings/interrupt-controller/arm-gic.h> 73 interrupt-parent = <&gic>; 88 gic: gic@fb001000 { label 89 compatible = "arm,cortex-a15-gic"; 151 interrupt-map = <0x4000 0 0 1 &gic 0 43 4>, 152 <0x4800 0 0 1 &gic 0 44 4>;
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D | xenvm-4.2.dts | 14 interrupt-parent = <&gic>; 53 gic: interrupt-controller@2c001000 { label 54 compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
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D | mt6580.dtsi | 16 #include <dt-bindings/interrupt-controller/arm-gic.h> 84 interrupt-parent = <&gic>; 88 gic: interrupt-controller@10211000 { label 89 compatible = "arm,cortex-a7-gic"; 92 interrupt-parent = <&gic>;
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D | mt8127.dtsi | 16 #include <dt-bindings/interrupt-controller/arm-gic.h> 89 interrupt-parent = <&gic>; 122 interrupt-parent = <&gic>; 126 gic: interrupt-controller@10211000 { label 127 compatible = "arm,cortex-a7-gic"; 130 interrupt-parent = <&gic>;
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D | bcm7445.dtsi | 1 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 interrupt-parent = <&gic>; 49 gic: interrupt-controller@ffd00000 { label 50 compatible = "brcm,brahma-b15-gic", "arm,cortex-a15-gic"; 102 interrupt-parent = <&gic>; 115 interrupt-parent = <&gic>; 132 interrupt-parent = <&gic>; 142 interrupt-parent = <&gic>;
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D | mt6592.dtsi | 16 #include <dt-bindings/interrupt-controller/arm-gic.h> 99 interrupt-parent = <&gic>; 103 gic: interrupt-controller@10211000 { label 104 compatible = "arm,cortex-a7-gic"; 107 interrupt-parent = <&gic>;
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D | mt6589.dtsi | 17 #include <dt-bindings/interrupt-controller/arm-gic.h> 95 interrupt-parent = <&gic>; 99 gic: interrupt-controller@10211000 { label 100 compatible = "arm,cortex-a7-gic"; 103 interrupt-parent = <&gic>;
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D | exynos5.dtsi | 19 interrupt-parent = <&gic>; 49 gic: interrupt-controller@10481000 { label 50 compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
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D | hip01.dtsi | 17 interrupt-parent = <&gic>; 21 gic: interrupt-controller@1e001000 { label 22 compatible = "arm,cortex-a9-gic"; 40 interrupt-parent = <&gic>;
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D | axm55xx.dtsi | 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 18 interrupt-parent = <&gic>; 59 gic: interrupt-controller@2001001000 { label 60 compatible = "arm,cortex-a15-gic"; 96 interrupt-parent = <&gic>;
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D | exynos5440.dtsi | 18 interrupt-parent = <&gic>; 35 gic: interrupt-controller@2E0000 { label 36 compatible = "arm,cortex-a15-gic"; 192 interrupt-parent = <&gic>; 204 interrupt-parent = <&gic>; 298 interrupt-map = <0x0 0 &gic 53>; 319 interrupt-map = <0x0 0 &gic 56>;
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D | armada-39x.dtsi | 48 #include <dt-bindings/interrupt-controller/arm-gic.h> 87 interrupt-parent = <&gic>; 125 gic: interrupt-controller@d000 { label 126 compatible = "arm,cortex-a9-gic"; 310 interrupts-extended = <&gic GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, 311 <&gic GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, 312 <&gic GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>, 313 <&gic GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>, 440 interrupt-map = <0 0 0 0 &gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; 458 interrupt-map = <0 0 0 0 &gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; [all …]
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D | keystone.dtsi | 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 19 interrupt-parent = <&gic>; 29 gic: interrupt-controller { label 30 compatible = "arm,cortex-a15-gic"; 66 interrupt-parent = <&gic>; 303 interrupt-parent = <&gic>; 317 interrupt-parent = <&gic>;
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D | exynos4210.dtsi | 112 interrupt-map = <0 &gic 0 57 0>, 113 <1 &gic 0 69 0>, 116 <4 &gic 0 42 0>, 117 <5 &gic 0 48 0>; 140 interrupt-parent = <&gic>; 262 &gic {
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D | mt8135.dtsi | 17 #include <dt-bindings/interrupt-controller/arm-gic.h> 114 interrupt-parent = <&gic>; 203 interrupt-parent = <&gic>; 218 gic: interrupt-controller@10211000 { label 219 compatible = "arm,cortex-a15-gic"; 222 interrupt-parent = <&gic>;
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D | bcm63138.dtsi | 5 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 interrupt-parent = <&gic>; 83 gic: interrupt-controller@1e100 { label 84 compatible = "arm,cortex-a9-gic";
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D | bcm-nsp.dtsi | 33 #include <dt-bindings/interrupt-controller/arm-gic.h> 41 interrupt-parent = <&gic>; 68 gic: interrupt-controller@19021000 { label 69 compatible = "arm,cortex-a9-gic";
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D | bcm-cygnus.dtsi | 33 #include <dt-bindings/interrupt-controller/arm-gic.h> 42 interrupt-parent = <&gic>; 71 gic: interrupt-controller@21000 { label 72 compatible = "arm,cortex-a9-gic"; 152 interrupt-map = <0 0 0 0 &gic GIC_SPI 100 IRQ_TYPE_NONE>; 173 interrupt-map = <0 0 0 0 &gic GIC_SPI 106 IRQ_TYPE_NONE>;
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D | vf500.dtsi | 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 30 compatible = "arm,cortex-a9-gic";
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D | k2e.dtsi | 19 interrupt-parent = <&gic>; 116 interrupt-parent = <&gic>; 130 interrupt-parent = <&gic>;
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D | exynos5260.dtsi | 18 interrupt-parent = <&gic>; 161 gic: interrupt-controller@10481000 { label 162 compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic"; 217 interrupt-parent = <&gic>;
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D | armada-375.dtsi | 49 #include <dt-bindings/interrupt-controller/arm-gic.h> 109 interrupt-parent = <&gic>; 197 gic: interrupt-controller@d000 { label 198 compatible = "arm,cortex-a9-gic"; 421 interrupts-extended = <&gic GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, 422 <&gic GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, 423 <&gic GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>, 424 <&gic GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>, 612 interrupt-map = <0 0 0 0 &gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; 629 interrupt-map = <0 0 0 0 &gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
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D | ls1021a.dtsi | 49 #include <dt-bindings/interrupt-controller/arm-gic.h> 53 interrupt-parent = <&gic>; 107 interrupt-parent = <&gic>; 110 gic: interrupt-controller@1400000 { label 111 compatible = "arm,cortex-a7-gic"; 444 interrupt-parent = <&gic>; 474 interrupt-parent = <&gic>; 503 interrupt-parent = <&gic>;
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D | berlin2cd.dtsi | 44 #include <dt-bindings/interrupt-controller/arm-gic.h> 85 interrupt-parent = <&gic>; 110 gic: interrupt-controller@ad1000 { label 111 compatible = "arm,cortex-a9-gic"; 333 interrupt-parent = <&gic>; 465 interrupt-parent = <&gic>;
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D | armada-385.dtsi | 119 interrupt-map = <0 0 0 0 &gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; 137 interrupt-map = <0 0 0 0 &gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; 155 interrupt-map = <0 0 0 0 &gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; 176 interrupt-map = <0 0 0 0 &gic GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
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D | armada-38x.dtsi | 50 #include <dt-bindings/interrupt-controller/arm-gic.h> 76 interrupt-parent = <&gic>; 164 gic: interrupt-controller@d000 { label 165 compatible = "arm,cortex-a9-gic"; 395 interrupts-extended = <&gic GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, 396 <&gic GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, 397 <&gic GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>, 398 <&gic GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
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D | berlin2.dtsi | 44 #include <dt-bindings/interrupt-controller/arm-gic.h> 96 interrupt-parent = <&gic>; 141 gic: interrupt-controller@ad1000 { label 142 compatible = "arm,cortex-a9-gic"; 353 interrupt-parent = <&gic>; 534 interrupt-parent = <&gic>;
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D | bcm21664.dtsi | 14 #include <dt-bindings/interrupt-controller/arm-gic.h> 24 interrupt-parent = <&gic>; 49 gic: interrupt-controller@3ff00100 { label 50 compatible = "arm,cortex-a9-gic";
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D | zx296702.dtsi | 4 #include <dt-bindings/interrupt-controller/arm-gic.h> 41 compatible = "arm,cortex-a9-gic";
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D | armada-380.dtsi | 108 interrupt-map = <0 0 0 0 &gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; 126 interrupt-map = <0 0 0 0 &gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; 144 interrupt-map = <0 0 0 0 &gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
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D | meson.dtsi | 51 interrupt-parent = <&gic>; 60 gic: interrupt-controller@c4301000 { label 61 compatible = "arm,cortex-a9-gic";
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D | meson8b.dtsi | 52 interrupt-parent = <&gic>; 100 gic: interrupt-controller@c4301000 { label 101 compatible = "arm,cortex-a9-gic";
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D | exynos5420.dtsi | 240 <4 &gic 0 120 0>, 241 <5 &gic 0 121 0>, 242 <6 &gic 0 122 0>, 243 <7 &gic 0 123 0>, 244 <8 &gic 0 128 0>, 245 <9 &gic 0 129 0>, 246 <10 &gic 0 130 0>, 247 <11 &gic 0 131 0>; 298 interrupt-parent = <&gic>; 331 interrupt-parent = <&gic>; [all …]
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D | r8a7793.dtsi | 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 17 interrupt-parent = <&gic>; 44 gic: interrupt-controller@f1001000 { label 45 compatible = "arm,gic-400";
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D | bcm11351.dtsi | 14 #include <dt-bindings/interrupt-controller/arm-gic.h> 24 interrupt-parent = <&gic>; 49 gic: interrupt-controller@3ff00100 { label 50 compatible = "arm,cortex-a9-gic";
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D | emev2.dtsi | 16 interrupt-parent = <&gic>; 46 gic: interrupt-controller@e0020000 { label 47 compatible = "arm,cortex-a9-gic";
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D | berlin2q.dtsi | 38 #include <dt-bindings/interrupt-controller/arm-gic.h> 108 interrupt-parent = <&gic>; 165 gic: interrupt-controller@ad1000 { label 166 compatible = "arm,cortex-a9-gic"; 403 interrupt-parent = <&gic>; 633 interrupt-parent = <&gic>;
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D | hisi-x5hd2.dtsi | 18 gic: interrupt-controller@f8a01000 { label 19 compatible = "arm,cortex-a9-gic"; 23 /* gic dist base, gic cpu base */ 31 interrupt-parent = <&gic>;
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D | r8a7794.dtsi | 13 #include <dt-bindings/interrupt-controller/arm-gic.h> 18 interrupt-parent = <&gic>; 53 gic: interrupt-controller@f1001000 { label 54 compatible = "arm,gic-400"; 667 interrupt-map = <0x0000 0 0 1 &gic 0 108 IRQ_TYPE_LEVEL_HIGH 668 0x0800 0 0 1 &gic 0 108 IRQ_TYPE_LEVEL_HIGH 669 0x1000 0 0 2 &gic 0 108 IRQ_TYPE_LEVEL_HIGH>; 702 interrupt-map = <0x0000 0 0 1 &gic 0 113 IRQ_TYPE_LEVEL_HIGH 703 0x0800 0 0 1 &gic 0 113 IRQ_TYPE_LEVEL_HIGH 704 0x1000 0 0 2 &gic 0 113 IRQ_TYPE_LEVEL_HIGH>;
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D | spear13xx.dtsi | 17 interrupt-parent = <&gic>; 38 gic: interrupt-controller@ec801000 { label 39 compatible = "arm,cortex-a9-gic";
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D | hi3620.dtsi | 72 interrupt-parent = <&gic>; 83 gic: interrupt-controller@1000 { label 84 compatible = "arm,cortex-a9-gic"; 88 /* gic dist base, gic cpu base */
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D | stih41x.dtsi | 28 compatible = "arm,cortex-a9-gic";
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D | r8a7790.dtsi | 14 #include <dt-bindings/interrupt-controller/arm-gic.h> 19 interrupt-parent = <&gic>; 115 gic: interrupt-controller@f1001000 { label 116 compatible = "arm,gic-400"; 1490 interrupt-map = <0x0000 0 0 1 &gic 0 108 IRQ_TYPE_LEVEL_HIGH 1491 0x0800 0 0 1 &gic 0 108 IRQ_TYPE_LEVEL_HIGH 1492 0x1000 0 0 2 &gic 0 108 IRQ_TYPE_LEVEL_HIGH>; 1525 interrupt-map = <0x0000 0 0 1 &gic 0 112 IRQ_TYPE_LEVEL_HIGH 1526 0x0800 0 0 1 &gic 0 112 IRQ_TYPE_LEVEL_HIGH 1527 0x1000 0 0 2 &gic 0 112 IRQ_TYPE_LEVEL_HIGH>; [all …]
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D | spear1310.dtsi | 92 interrupt-map = <0x0 0 &gic 0 68 0x4>; 110 interrupt-map = <0x0 0 &gic 0 69 0x4>; 128 interrupt-map = <0x0 0 &gic 0 70 0x4>;
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D | rk3xxx.dtsi | 45 #include <dt-bindings/interrupt-controller/arm-gic.h> 49 interrupt-parent = <&gic>; 139 gic: interrupt-controller@1013d000 { label 140 compatible = "arm,cortex-a9-gic";
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D | arm-realview-pb1176.dts | 183 compatible = "arm,arm1176jzf-devchip-gic", "arm,arm11mp-gic"; 365 compatible = "arm,arm1176jzf-devchip-gic", "arm,arm11mp-gic";
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D | omap4.dtsi | 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 53 gic: interrupt-controller@48241000 { label 54 compatible = "arm,cortex-a9-gic"; 59 interrupt-parent = <&gic>; 74 interrupt-parent = <&gic>; 82 interrupt-parent = <&gic>; 847 interrupt-parent = <&gic>; 854 interrupt-parent = <&gic>;
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D | exynos4415.dtsi | 25 interrupt-parent = <&gic>; 195 gic: interrupt-controller@10481000 { label 196 compatible = "arm,cortex-a9-gic"; 233 interrupt-parent = <&gic>; 386 interrupt-parent = <&gic>;
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D | tegra114.dtsi | 5 #include <dt-bindings/interrupt-controller/arm-gic.h> 127 gic: interrupt-controller@50041000 { label 128 compatible = "arm,cortex-a15-gic"; 137 interrupt-parent = <&gic>; 149 interrupt-parent = <&gic>; 785 interrupt-parent = <&gic>;
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D | r8a7779.dtsi | 15 #include <dt-bindings/interrupt-controller/arm-gic.h> 20 interrupt-parent = <&gic>; 58 gic: interrupt-controller@f0001000 { label 59 compatible = "arm,cortex-a9-gic";
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D | am4372.dtsi | 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 50 gic: interrupt-controller@48241000 { label 51 compatible = "arm,cortex-a9-gic"; 56 interrupt-parent = <&gic>; 64 interrupt-parent = <&gic>; 76 interrupt-parent = <&gic>; 84 interrupt-parent = <&gic>;
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D | exynos4x12.dtsi | 91 interrupt-map = <0 &gic 0 57 0>, 95 <4 &gic 1 12 0>; 362 interrupt-parent = <&gic>;
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D | sun8i-a23-a33.dtsi | 47 #include <dt-bindings/interrupt-controller/arm-gic.h> 52 interrupt-parent = <&gic>; 564 gic: interrupt-controller@01c81000 { label 565 compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
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D | r8a7791.dtsi | 14 #include <dt-bindings/interrupt-controller/arm-gic.h> 19 interrupt-parent = <&gic>; 72 gic: interrupt-controller@f1001000 { label 73 compatible = "arm,gic-400"; 1501 interrupt-map = <0x0000 0 0 1 &gic 0 108 IRQ_TYPE_LEVEL_HIGH 1502 0x0800 0 0 1 &gic 0 108 IRQ_TYPE_LEVEL_HIGH 1503 0x1000 0 0 2 &gic 0 108 IRQ_TYPE_LEVEL_HIGH>; 1536 interrupt-map = <0x0000 0 0 1 &gic 0 113 IRQ_TYPE_LEVEL_HIGH 1537 0x0800 0 0 1 &gic 0 113 IRQ_TYPE_LEVEL_HIGH 1538 0x1000 0 0 2 &gic 0 113 IRQ_TYPE_LEVEL_HIGH>; [all …]
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D | r7s72100.dtsi | 17 interrupt-parent = <&gic>; 331 gic: interrupt-controller@e8201000 { label 332 compatible = "arm,cortex-a9-gic";
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D | tegra124.dtsi | 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 31 interrupt-map = <0 0 0 0 &gic GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; 167 gic: interrupt-controller@0,50041000 { label 168 compatible = "arm,cortex-a15-gic"; 177 interrupt-parent = <&gic>; 207 interrupt-parent = <&gic>; 1036 interrupt-parent = <&gic>;
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D | omap4-duovero.dtsi | 175 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_1N cascaded to gic */ 181 interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_2N cascaded to gic */
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D | exynos3250.dtsi | 26 interrupt-parent = <&gic>; 152 interrupt-parent = <&gic>; 225 gic: interrupt-controller@10481000 { label 226 compatible = "arm,cortex-a15-gic";
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D | sun9i-a80.dtsi | 47 #include <dt-bindings/interrupt-controller/arm-gic.h> 52 interrupt-parent = <&gic>; 526 gic: interrupt-controller@01c41000 { label 527 compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
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D | k2l.dtsi | 19 interrupt-parent = <&gic>;
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D | omap4-var-som-om44.dtsi | 187 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_1N cascaded to gic */ 198 interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_2N cascaded to gic */
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D | k2hk.dtsi | 19 interrupt-parent = <&gic>;
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D | exynos4.dtsi | 27 interrupt-parent = <&gic>; 128 gic: interrupt-controller@10490000 { label 129 compatible = "arm,cortex-a9-gic"; 158 interrupt-parent = <&gic>; 651 interrupt-parent = <&gic>;
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D | ecx-2000.dts | 95 compatible = "arm,cortex-a15-gic";
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D | omap5.dtsi | 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 82 interrupt-parent = <&gic>; 91 gic: interrupt-controller@48211000 { label 92 compatible = "arm,cortex-a15-gic"; 99 interrupt-parent = <&gic>; 107 interrupt-parent = <&gic>;
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D | exynos4212.dtsi | 131 &gic {
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D | omap5-board-common.dtsi | 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 336 interrupts-extended = <&gic GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH 592 interrupts = <GIC_SPI 119 IRQ_TYPE_NONE>; /* IRQ_SYS_2N cascaded to gic */
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D | exynos5250.dtsi | 186 <0x4 0 &gic 0 120 0>, 187 <0x5 0 &gic 0 121 0>; 204 interrupt-parent = <&gic>; 235 interrupt-parent = <&gic>; 669 interrupt-parent = <&gic>;
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D | highbank.dts | 110 compatible = "arm,cortex-a9-gic";
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D | r8a73a4.dtsi | 13 #include <dt-bindings/interrupt-controller/arm-gic.h> 18 interrupt-parent = <&gic>; 443 gic: interrupt-controller@f1001000 { label 444 compatible = "arm,gic-400";
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D | exynos4412.dtsi | 154 &gic {
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D | hip04.dtsi | 174 interrupt-parent = <&gic>; 204 interrupt-parent = <&gic>; 207 gic: interrupt-controller@c01000 { label
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D | r8a7778.dtsi | 24 interrupt-parent = <&gic>; 63 gic: interrupt-controller@fe438000 { label 64 compatible = "arm,cortex-a9-gic";
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D | sun6i-a31.dtsi | 47 #include <dt-bindings/interrupt-controller/arm-gic.h> 53 interrupt-parent = <&gic>; 1012 gic: interrupt-controller@01c81000 { label 1013 compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
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D | sh73a0.dtsi | 14 #include <dt-bindings/interrupt-controller/arm-gic.h> 19 interrupt-parent = <&gic>; 48 gic: interrupt-controller@f0001000 { label 49 compatible = "arm,cortex-a9-gic";
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D | meson6.dtsi | 54 interrupt-parent = <&gic>;
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D | r8a7740.dtsi | 18 interrupt-parent = <&gic>; 32 gic: interrupt-controller@c2800000 { label 33 compatible = "arm,cortex-a9-gic";
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D | exynos3250-pinctrl.dtsi | 331 interrupt-parent = <&gic>; 342 interrupt-parent = <&gic>;
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D | spear1340.dtsi | 57 interrupt-map = <0x0 0 &gic 0 68 0x4>;
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D | omap4-panda-common.dtsi | 374 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_1N cascaded to gic */ 385 interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_2N cascaded to gic */
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D | exynos4415-pinctrl.dtsi | 360 interrupt-parent = <&gic>; 371 interrupt-parent = <&gic>;
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D | qcom-msm8660.dtsi | 5 #include <dt-bindings/interrupt-controller/arm-gic.h>
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D | dra7.dtsi | 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 52 interrupt-parent = <&gic>; 55 gic: interrupt-controller@48211000 { label 56 compatible = "arm,cortex-a15-gic"; 64 interrupt-parent = <&gic>; 72 interrupt-parent = <&gic>;
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D | meson8.dtsi | 53 interrupt-parent = <&gic>;
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D | sun7i-a20.dtsi | 47 #include <dt-bindings/interrupt-controller/arm-gic.h> 55 interrupt-parent = <&gic>; 1404 gic: interrupt-controller@01c81000 { label 1405 compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
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D | stih415.dtsi | 12 #include <dt-bindings/interrupt-controller/arm-gic.h>
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D | omap4-sdp.dts | 365 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_1N cascaded to gic */ 376 interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_2N cascaded to gic */
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D | sun7i-a20-pcduino3-nano.dts | 47 #include <dt-bindings/interrupt-controller/arm-gic.h>
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D | qcom-msm8960.dtsi | 5 #include <dt-bindings/interrupt-controller/arm-gic.h>
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D | sun7i-a20-bananapro.dts | 47 #include <dt-bindings/interrupt-controller/arm-gic.h>
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D | uniphier-ph1-sld3.dtsi | 118 compatible = "arm,cortex-a9-gic";
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D | socfpga_arria10.dtsi | 18 #include <dt-bindings/interrupt-controller/arm-gic.h> 50 compatible = "arm,cortex-a9-gic";
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D | rk3288.dtsi | 43 #include <dt-bindings/interrupt-controller/arm-gic.h> 53 interrupt-parent = <&gic>; 876 gic: interrupt-controller@ffc01000 { label 877 compatible = "arm,gic-400";
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D | uniphier-ph1-sld8.dtsi | 256 compatible = "arm,cortex-a9-gic";
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D | uniphier-ph1-ld4.dtsi | 256 compatible = "arm,cortex-a9-gic";
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D | uniphier-ph1-pro5.dtsi | 269 compatible = "arm,cortex-a9-gic";
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D | uniphier-proxstream2.dtsi | 279 compatible = "arm,cortex-a9-gic";
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D | uniphier-ph1-pro4.dtsi | 279 compatible = "arm,cortex-a9-gic";
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D | imx6ul.dtsi | 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 88 compatible = "arm,cortex-a7-gic";
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D | exynos4210-pinctrl.dtsi | 537 interrupt-parent = <&gic>; 548 interrupt-parent = <&gic>;
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D | zynq-7000.dtsi | 132 compatible = "arm,cortex-a9-gic";
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D | tegra20.dtsi | 4 #include <dt-bindings/interrupt-controller/arm-gic.h> 153 compatible = "arm,cortex-a9-gic";
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D | atlas7.dtsi | 14 interrupt-parent = <&gic>; 71 gic: interrupt-controller@10301000 { label 72 compatible = "arm,cortex-a9-gic";
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D | exynos4x12-pinctrl.dtsi | 581 interrupt-parent = <&gic>; 592 interrupt-parent = <&gic>;
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D | imx7d.dtsi | 45 #include <dt-bindings/interrupt-controller/arm-gic.h> 101 compatible = "arm,cortex-a7-gic";
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D | tegra30.dtsi | 5 #include <dt-bindings/interrupt-controller/arm-gic.h> 238 compatible = "arm,cortex-a9-gic";
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D | stih416.dtsi | 14 #include <dt-bindings/interrupt-controller/arm-gic.h>
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D | imx6qdl.dtsi | 14 #include <dt-bindings/interrupt-controller/arm-gic.h> 51 compatible = "arm,cortex-a9-gic";
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/linux-4.4.14/arch/arm64/boot/dts/xilinx/ |
D | zynqmp.dtsi | 67 interrupt-parent = <&gic>; 80 gic: interrupt-controller@f9010000 { label 81 compatible = "arm,gic-400", "arm,cortex-a15-gic"; 88 interrupt-parent = <&gic>; 106 interrupt-parent = <&gic>; 118 interrupt-parent = <&gic>; 134 interrupt-parent = <&gic>; 142 interrupt-parent = <&gic>; 154 interrupt-parent = <&gic>; 166 interrupt-parent = <&gic>; [all …]
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/linux-4.4.14/drivers/irqchip/ |
D | irq-gic.c | 332 struct gic_chip_data *gic = &gic_data[0]; in gic_handle_irq() local 333 void __iomem *cpu_base = gic_data_cpu_base(gic); in gic_handle_irq() 342 handle_domain_irq(gic->domain, irqnr, regs); in gic_handle_irq() 434 static u8 gic_get_cpumask(struct gic_chip_data *gic) in gic_get_cpumask() argument 436 void __iomem *base = gic_data_dist_base(gic); in gic_get_cpumask() 453 static void gic_cpu_if_up(struct gic_chip_data *gic) in gic_cpu_if_up() argument 455 void __iomem *cpu_base = gic_data_cpu_base(gic); in gic_cpu_if_up() 472 static void __init gic_dist_init(struct gic_chip_data *gic) in gic_dist_init() argument 476 unsigned int gic_irqs = gic->gic_irqs; in gic_dist_init() 477 void __iomem *base = gic_data_dist_base(gic); in gic_dist_init() [all …]
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D | Makefile | 23 obj-$(CONFIG_ARM_GIC) += irq-gic.o irq-gic-common.o 24 obj-$(CONFIG_ARM_GIC_V2M) += irq-gic-v2m.o 25 obj-$(CONFIG_ARM_GIC_V3) += irq-gic-v3.o irq-gic-common.o 26 obj-$(CONFIG_ARM_GIC_V3_ITS) += irq-gic-v3-its.o irq-gic-v3-its-pci-msi.o irq-gic-v3-its-platform-… 50 obj-$(CONFIG_MIPS_GIC) += irq-mips-gic.o
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/linux-4.4.14/Documentation/devicetree/bindings/bus/ |
D | brcm,bus-axi.txt | 34 <0x00024000 0 &gic GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>, 37 <0x00025000 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 40 <0x00012000 0 &gic GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, 41 <0x00012000 1 &gic GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>, 42 <0x00012000 2 &gic GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, 43 <0x00012000 3 &gic GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, 44 <0x00012000 4 &gic GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, 45 <0x00012000 5 &gic GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
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/linux-4.4.14/Documentation/devicetree/bindings/interrupt-controller/ |
D | arm,gic.txt | 14 "arm,arm1176jzf-devchip-gic" 15 "arm,arm11mp-gic" 16 "arm,cortex-a15-gic" 17 "arm,cortex-a7-gic" 18 "arm,cortex-a9-gic" 19 "arm,gic-400" 21 "brcm,brahma-b15-gic" 66 "ic_clk" (for "arm,arm11mp-gic") 67 "PERIPHCLKEN" (for "arm,cortex-a15-gic") 68 "PERIPHCLK", "PERIPHCLKEN" (for "arm,cortex-a9-gic") [all …]
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D | arm,gic-v3.txt | 10 - compatible : should at least contain "arm,gic-v3". 58 - compatible : Should at least contain "arm,gic-v3-its". 71 gic: interrupt-controller@2cf00000 { 72 compatible = "arm,gic-v3"; 85 gic-its@2c200000 { 86 compatible = "arm,gic-v3-its"; 93 gic: interrupt-controller@2c010000 { 94 compatible = "arm,gic-v3"; 110 gic-its@2c200000 { 111 compatible = "arm,gic-v3-its"; [all …]
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D | mips-gic.txt | 9 - compatible : Should be "mti,gic". 14 See <include/dt-bindings/interrupt-controller/mips-gic.h>. 28 - compatible : Should be "mti,gic-timer". 39 gic: interrupt-controller@1bdc0000 { 40 compatible = "mti,gic"; 49 compatible = "mti,gic-timer"; 57 interrupt-parent = <&gic>;
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D | mediatek,sysirq.txt | 19 Documentation/devicetree/bindings/arm/gic.txt 30 interrupt-parent = <&gic>;
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D | allwinner,sun67i-sc-nmi.txt | 25 interrupt-parent = <&gic>;
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D | ti,omap4-wugen-mpu | 32 interrupt-parent = <&gic>;
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D | snps,dw-apb-ictl.txt | 30 interrupt-parent = <&gic>;
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/linux-4.4.14/drivers/net/ethernet/renesas/ |
D | ravb_ptp.c | 188 u32 gic; in ravb_ptp_extts() local 198 gic = ravb_read(ndev, GIC); in ravb_ptp_extts() 200 gic |= GIC_PTCE; in ravb_ptp_extts() 202 gic &= ~GIC_PTCE; in ravb_ptp_extts() 203 ravb_write(ndev, gic, GIC); in ravb_ptp_extts() 219 u32 gic; in ravb_ptp_perout() local 251 gic = ravb_read(ndev, GIC); in ravb_ptp_perout() 252 gic |= GIC_PTME; in ravb_ptp_perout() 253 ravb_write(ndev, gic, GIC); in ravb_ptp_perout() 262 gic = ravb_read(ndev, GIC); in ravb_ptp_perout() [all …]
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/linux-4.4.14/arch/arm64/boot/dts/freescale/ |
D | fsl-ls2080a.dtsi | 49 interrupt-parent = <&gic>; 135 gic: interrupt-controller@6000000 { label 136 compatible = "arm,gic-v3"; 149 its: gic-its@6020000 { 150 compatible = "arm,gic-v3-its"; 407 interrupt-map = <0000 0 0 1 &gic 0 0 0 109 4>, 408 <0000 0 0 2 &gic 0 0 0 110 4>, 409 <0000 0 0 3 &gic 0 0 0 111 4>, 410 <0000 0 0 4 &gic 0 0 0 112 4>; 430 interrupt-map = <0000 0 0 1 &gic 0 0 0 114 4>, [all …]
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/linux-4.4.14/arch/arm64/boot/dts/mediatek/ |
D | mt6795.dtsi | 15 #include <dt-bindings/interrupt-controller/arm-gic.h> 109 interrupt-parent = <&gic>; 125 interrupt-parent = <&gic>; 129 gic: interrupt-controller@10221000 { label 130 compatible = "arm,gic-400"; 132 interrupt-parent = <&gic>;
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D | mt8173.dtsi | 16 #include <dt-bindings/interrupt-controller/arm-gic.h> 128 interrupt-parent = <&gic>; 266 interrupt-parent = <&gic>; 276 gic: interrupt-controller@10220000 { label 277 compatible = "arm,gic-400"; 279 interrupt-parent = <&gic>;
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/linux-4.4.14/arch/arm64/boot/dts/apm/ |
D | apm-storm.dtsi | 14 interrupt-parent = <&gic>; 80 gic: interrupt-controller@78010000 { label 81 compatible = "arm,cortex-a15-gic"; 536 interrupt-map = <0x0 0x0 0x0 0x1 &gic 0x0 0xc2 0x1 537 0x0 0x0 0x0 0x2 &gic 0x0 0xc3 0x1 538 0x0 0x0 0x0 0x3 &gic 0x0 0xc4 0x1 539 0x0 0x0 0x0 0x4 &gic 0x0 0xc5 0x1>; 561 interrupt-map = <0x0 0x0 0x0 0x1 &gic 0x0 0xc8 0x1 562 0x0 0x0 0x0 0x2 &gic 0x0 0xc9 0x1 563 0x0 0x0 0x0 0x3 &gic 0x0 0xca 0x1 [all …]
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D | apm-shadowcat.dtsi | 14 interrupt-parent = <&gic>; 80 gic: interrupt-controller@78090000 { label 81 compatible = "arm,cortex-a15-gic"; 193 interrupt-parent = <&gic>;
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/linux-4.4.14/Documentation/devicetree/bindings/pci/ |
D | xgene-pci.txt | 45 interrupt-map = <0x0 0x0 0x0 0x1 &gic 0x0 0xc2 0x1 46 0x0 0x0 0x0 0x2 &gic 0x0 0xc3 0x1 47 0x0 0x0 0x0 0x3 &gic 0x0 0xc4 0x1 48 0x0 0x0 0x0 0x4 &gic 0x0 0xc5 0x1>;
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D | layerscape-pci.txt | 48 interrupt-map = <0000 0 0 1 &gic GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>, 49 <0000 0 0 2 &gic GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>, 50 <0000 0 0 3 &gic GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>, 51 <0000 0 0 4 &gic GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
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D | xgene-pci-msi.txt | 61 interrupt-map = <0x0 0x0 0x0 0x1 &gic 0x0 0xc2 0x1 62 0x0 0x0 0x0 0x2 &gic 0x0 0xc3 0x1 63 0x0 0x0 0x0 0x3 &gic 0x0 0xc4 0x1 64 0x0 0x0 0x0 0x4 &gic 0x0 0xc5 0x1>;
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D | pci-rcar-gen2.txt | 42 interrupt-map = <0x0000 0 0 1 &gic 0 108 IRQ_TYPE_LEVEL_HIGH 43 0x0800 0 0 1 &gic 0 108 IRQ_TYPE_LEVEL_HIGH 44 0x1000 0 0 2 &gic 0 108 IRQ_TYPE_LEVEL_HIGH>;
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D | host-generic-pci.txt | 94 interrupt-map = < 0x0 0x0 0x0 0x1 &gic 0x0 0x4 0x1 95 0x800 0x0 0x0 0x1 &gic 0x0 0x5 0x1 96 0x1000 0x0 0x0 0x1 &gic 0x0 0x6 0x1 97 0x1800 0x0 0x0 0x1 &gic 0x0 0x7 0x1>;
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D | samsung,exynos5440-pcie.txt | 33 interrupt-map = <0 0 0 0 &gic GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 53 interrupt-map = <0 0 0 0 &gic GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
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D | pci-keystone.txt | 27 interrupt-parent = <&gic>; 47 interrupt-parent = <&gic>;
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D | brcm,iproc-pcie.txt | 42 interrupt-map = <0 0 0 0 &gic GIC_SPI 100 IRQ_TYPE_NONE>; 69 interrupt-map = <0 0 0 0 &gic GIC_SPI 106 IRQ_TYPE_NONE>;
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D | rcar-pci.txt | 43 interrupt-map = <0 0 0 0 &gic 0 116 4>;
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/linux-4.4.14/arch/mips/vdso/ |
D | gettimeofday.c | 83 void __iomem *gic = get_gic(data); in read_gic_count() local 87 hi = __raw_readl(gic + GIC_UMV_SH_COUNTER_63_32_OFS); in read_gic_count() 88 lo = __raw_readl(gic + GIC_UMV_SH_COUNTER_31_00_OFS); in read_gic_count() 89 hi2 = __raw_readl(gic + GIC_UMV_SH_COUNTER_63_32_OFS); in read_gic_count()
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/linux-4.4.14/arch/arm64/boot/dts/hisilicon/ |
D | hi6220.dtsi | 7 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 interrupt-parent = <&gic>; 113 gic: interrupt-controller@f6801000 { label 114 compatible = "arm,gic-400"; 127 interrupt-parent = <&gic>;
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D | hip05.dtsi | 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 16 interrupt-parent = <&gic>; 201 gic: interrupt-controller@8d000000 { label 202 compatible = "arm,gic-v3"; 218 compatible = "arm,gic-v3-its";
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/linux-4.4.14/arch/arm64/boot/dts/broadcom/ |
D | ns2.dtsi | 33 #include <dt-bindings/interrupt-controller/arm-gic.h> 39 interrupt-parent = <&gic>; 98 gic: interrupt-controller@65210000 { label 99 compatible = "arm,gic-400";
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/linux-4.4.14/Documentation/devicetree/bindings/timer/ |
D | samsung,exynos4210-mct.txt | 64 interrupt-map = <0 &gic 0 57 0>, 65 <1 &gic 0 69 0>, 68 <4 &gic 0 42 0>, 69 <5 &gic 0 48 0>;
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/linux-4.4.14/drivers/staging/media/davinci_vpfe/ |
D | dm365_ipipe.c | 288 static int ipipe_validate_gic_params(struct vpfe_ipipe_gic *gic) in ipipe_validate_gic_params() argument 290 if (gic->en > 1 || gic->gain > GIC_GAIN_MASK || in ipipe_validate_gic_params() 291 gic->thr > GIC_THR_MASK || gic->slope > GIC_SLOPE_MASK || in ipipe_validate_gic_params() 292 gic->apply_lsc_gain > 1 || in ipipe_validate_gic_params() 293 gic->nf2_thr_gain.integer > GIC_NFGAN_INT_MASK || in ipipe_validate_gic_params() 294 gic->nf2_thr_gain.decimal > GIC_NFGAN_DECI_MASK) in ipipe_validate_gic_params() 304 struct vpfe_ipipe_gic *gic = &ipipe->config.gic; in ipipe_set_gic_params() local 307 memset((void *)gic, 0, sizeof(struct vpfe_ipipe_gic)); in ipipe_set_gic_params() 311 memcpy(gic, gic_param, sizeof(struct vpfe_ipipe_gic)); in ipipe_set_gic_params() 312 if (ipipe_validate_gic_params(gic) < 0) { in ipipe_set_gic_params() [all …]
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D | dm365_ipipe_hw.c | 574 void ipipe_set_gic_regs(void __iomem *base_addr, struct vpfe_ipipe_gic *gic) in ipipe_set_gic_regs() argument 579 regw_ip(base_addr, gic->en & 1, GIC_EN); in ipipe_set_gic_regs() 581 if (!gic->en) in ipipe_set_gic_regs() 585 val = (gic->wt_fn_type << GIC_TYP_SHIFT) | in ipipe_set_gic_regs() 586 (gic->thr_sel << GIC_THR_SEL_SHIFT) | in ipipe_set_gic_regs() 587 ((gic->apply_lsc_gain & 1) << GIC_APPLY_LSC_GAIN_SHIFT); in ipipe_set_gic_regs() 590 regw_ip(base_addr, gic->gain & GIC_GAIN_MASK, GIC_GAN); in ipipe_set_gic_regs() 592 if (gic->gic_alg != VPFE_IPIPE_GIC_ALG_ADAPT_GAIN) { in ipipe_set_gic_regs() 598 if (gic->thr_sel == VPFE_IPIPE_GIC_THR_REG) { in ipipe_set_gic_regs() 599 regw_ip(base_addr, gic->thr & GIC_THR_MASK, GIC_THR); in ipipe_set_gic_regs() [all …]
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D | dm365_ipipe.h | 85 struct vpfe_ipipe_gic gic; member
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D | dm365_ipipe_hw.h | 552 void ipipe_set_gic_regs(void __iomem *base_addr, struct vpfe_ipipe_gic *gic);
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D | davinci_vpfe_user.h | 1176 struct vpfe_ipipe_gic __user *gic; member
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/linux-4.4.14/arch/arm64/boot/dts/marvell/ |
D | berlin4ct.dtsi | 45 #include <dt-bindings/interrupt-controller/arm-gic.h> 49 interrupt-parent = <&gic>; 127 gic: interrupt-controller@901000 { label 128 compatible = "arm,gic-400"; 223 interrupt-parent = <&gic>; 240 interrupt-parent = <&gic>;
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/linux-4.4.14/Documentation/devicetree/bindings/mfd/ |
D | twl-familly.txt | 35 interrupts = <39>; /* IRQ_SYS_1N cascaded to gic */ 38 interrupt-parent = <&gic>;
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D | omap-usb-host.txt | 83 interrupt-parent = <&gic>; 90 interrupt-parent = <&gic>;
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D | twl6040.txt | 46 interrupt-parent = <&gic>;
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D | arizona.txt | 85 interrupt-parent = <&gic>;
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/linux-4.4.14/arch/arm64/boot/dts/sprd/ |
D | sc9836.dtsi | 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 192 gic: interrupt-controller@12001000 { label 193 compatible = "arm,gic-400";
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D | sharkl64.dtsi | 10 interrupt-parent = <&gic>;
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/linux-4.4.14/arch/arm64/boot/dts/amd/ |
D | amd-seattle-soc.dtsi | 14 compatible = "arm,gic-400", "arm,cortex-a15-gic"; 26 compatible = "arm,gic-v2m-frame";
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/linux-4.4.14/Documentation/devicetree/bindings/arm/ux500/ |
D | boards.txt | 26 see binding for arm/gic.txt 55 compatible = "arm,cortex-a9-gic";
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/linux-4.4.14/Documentation/devicetree/bindings/gpio/ |
D | renesas,gpio-rcar.txt | 45 interrupt-parent = <&gic>; 57 interrupt-parent = <&gic>;
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/linux-4.4.14/Documentation/devicetree/bindings/spi/ |
D | spi-rspi.txt | 52 interrupt-parent = <&gic>; 61 interrupt-parent = <&gic>;
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D | spi-zynqmp-qspi.txt | 23 interrupt-parent = <&gic>;
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D | sh-hspi.txt | 23 interrupt-parent = <&gic>;
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/linux-4.4.14/Documentation/devicetree/bindings/crypto/ |
D | amd-ccp.txt | 17 interrupt-parent = <&gic>;
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/linux-4.4.14/Documentation/devicetree/bindings/sound/ |
D | omap-mcpdm.txt | 19 interrupt-parent = <&gic>;
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D | omap-dmic.txt | 19 interrupt-parent = <&gic>;
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D | simple-card.txt | 127 interrupt-parent = <&gic>;
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/linux-4.4.14/Documentation/devicetree/bindings/ata/ |
D | ahci-ceva.txt | 16 interrupt-parent = <&gic>;
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D | sata_rcar.txt | 20 interrupt-parent = <&gic>;
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/linux-4.4.14/Documentation/devicetree/bindings/arm/ |
D | vexpress.txt | 174 interrupt-parent = <&gic>; 195 gic: interrupt-controller@2c001000 { 196 compatible = "arm,cortex-a9-gic"; 224 interrupt-map = <0 0 0 &gic 0 0 4>;
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D | arm-boards | 198 interrupt-parent = <&gic>;
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/linux-4.4.14/Documentation/devicetree/bindings/rtc/ |
D | xlnx-rtc.txt | 21 interrupt-parent = <&gic>;
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/linux-4.4.14/Documentation/devicetree/bindings/arm/keystone/ |
D | keystone.txt | 9 the form "ti,keystone-*". Generic devices like gic, arch_timers, ns16550
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/linux-4.4.14/arch/arm64/boot/dts/exynos/ |
D | exynos7.dtsi | 16 interrupt-parent = <&gic>; 87 gic: interrupt-controller@11001000 { label 88 compatible = "arm,gic-400"; 235 interrupt-parent = <&gic>;
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D | exynos7-pinctrl.dtsi | 21 interrupt-parent = <&gic>; 32 interrupt-parent = <&gic>;
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/linux-4.4.14/Documentation/devicetree/bindings/mmc/ |
D | arasan,sdhci.txt | 26 interrupt-parent = <&gic>;
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/linux-4.4.14/Documentation/devicetree/bindings/iio/adc/ |
D | xilinx-xadc.txt | 80 interrupt-parent = <&gic>; 102 interrupt-parent = <&gic>;
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/linux-4.4.14/Documentation/devicetree/bindings/net/ |
D | samsung-sxgbe.txt | 39 interrupt-parent = <&gic>;
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D | sh_eth.txt | 39 interrupt-parent = <&gic>;
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D | amd-xgbe.txt | 61 interrupt-parent = <&gic>;
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D | renesas,ravb.txt | 42 interrupt-parent = <&gic>;
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/linux-4.4.14/arch/arm64/boot/dts/cavium/ |
D | thunder-88xx.dtsi | 377 compatible = "arm,gic-v3"; 387 its: gic-its@8010,00020000 { 388 compatible = "arm,gic-v3-its";
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/linux-4.4.14/Documentation/devicetree/bindings/dma/ |
D | ti-dma-crossbar.txt | 56 interrupts-extended = <&gic GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
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D | shdma.txt | 42 interrupt-parent = <&gic>;
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/linux-4.4.14/arch/arm64/boot/dts/altera/ |
D | socfpga_stratix10.dtsi | 75 compatible = "arm,gic-400", "arm,cortex-a15-gic";
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/linux-4.4.14/drivers/clocksource/ |
D | Makefile | 59 obj-$(CONFIG_CLKSRC_MIPS_GIC) += mips-gic-timer.o
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/linux-4.4.14/Documentation/devicetree/bindings/arm/samsung/ |
D | pmu.txt | 52 interrupt-parent = <&gic>;
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/linux-4.4.14/Documentation/devicetree/bindings/arm/omap/ |
D | crossbar.txt | 45 Documentation/devicetree/bindings/arm/gic.txt for further details.
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/linux-4.4.14/arch/arm64/boot/dts/rockchip/ |
D | rk3368.dtsi | 46 #include <dt-bindings/interrupt-controller/arm-gic.h> 51 interrupt-parent = <&gic>; 513 gic: interrupt-controller@ffb71000 { label 514 compatible = "arm,gic-400";
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/linux-4.4.14/Documentation/devicetree/bindings/display/ |
D | renesas,du.txt | 61 interrupt-parent = <&gic>;
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/linux-4.4.14/Documentation/devicetree/bindings/serial/ |
D | renesas,sci-serial.txt | 63 interrupt-parent = <&gic>;
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/linux-4.4.14/arch/mips/kernel/ |
D | Makefile | 55 obj-$(CONFIG_MIPS_GIC_IPI) += smp-gic.o
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/linux-4.4.14/Documentation/devicetree/bindings/pinctrl/ |
D | samsung-pinctrl.txt | 220 interrupt-parent = <&gic>; 302 interrupt-parent = <&gic>;
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/linux-4.4.14/arch/arm64/boot/dts/qcom/ |
D | msm8916.dtsi | 14 #include <dt-bindings/interrupt-controller/arm-gic.h>
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