Searched refs:rd (Results 1 - 200 of 588) sorted by relevance

123

/linux-4.1.27/arch/arm/include/debug/
H A Dsamsung.S16 .macro fifo_level_s5pv210 rd, rx
17 ldr \rd, [\rx, # S3C2410_UFSTAT]
18 and \rd, \rd, #S5PV210_UFSTAT_TXMASK
21 .macro fifo_full_s5pv210 rd, rx
22 ldr \rd, [\rx, # S3C2410_UFSTAT]
23 tst \rd, #S5PV210_UFSTAT_TXFULL
29 .macro fifo_level_s3c2440 rd, rx
30 ldr \rd, [\rx, # S3C2410_UFSTAT]
31 and \rd, \rd, #S3C2440_UFSTAT_TXMASK
38 .macro fifo_full_s3c2440 rd, rx
39 ldr \rd, [\rx, # S3C2410_UFSTAT]
40 tst \rd, #S3C2440_UFSTAT_TXFULL
47 .macro senduart,rd,rx
48 strb \rd, [\rx, # S3C2410_UTXH]
51 .macro busyuart, rd, rx
52 ldr \rd, [\rx, # S3C2410_UFCON]
53 tst \rd, #S3C2410_UFCON_FIFOMODE @ fifo enabled?
57 fifo_full \rd, \rx
63 ldr \rd, [\rx, # S3C2410_UTRSTAT]
64 tst \rd, #S3C2410_UTRSTAT_TXFE
70 .macro waituart,rd,rx
71 ldr \rd, [\rx, # S3C2410_UFCON]
72 tst \rd, #S3C2410_UFCON_FIFOMODE @ fifo enabled?
76 fifo_level \rd, \rx
77 teq \rd, #0
82 ldr \rd, [\rx, # S3C2410_UTRSTAT]
83 tst \rd, #S3C2410_UTRSTAT_TXFE
H A D8250.S18 .macro store, rd, rx:vararg
19 str \rd, \rx
22 .macro load, rd, rx:vararg
23 ldr \rd, \rx
26 .macro store, rd, rx:vararg
27 strb \rd, \rx
30 .macro load, rd, rx:vararg
31 ldrb \rd, \rx
37 .macro senduart,rd,rx
38 store \rd, [\rx, #UART_TX << UART_SHIFT]
41 .macro busyuart,rd,rx
42 1002: load \rd, [\rx, #UART_LSR << UART_SHIFT]
43 and \rd, \rd, #UART_LSR_TEMT | UART_LSR_THRE
44 teq \rd, #UART_LSR_TEMT | UART_LSR_THRE
48 .macro waituart,rd,rx
50 1001: load \rd, [\rx, #UART_MSR << UART_SHIFT]
51 tst \rd, #UART_MSR_CTS
H A Drenesas-scif.S35 .macro waituart, rd, rx
36 1001: ldrh \rd, [\rx, #FSR]
37 tst \rd, #TDFE
41 .macro senduart, rd, rx
42 strb \rd, [\rx, #FTDR]
43 ldrh \rd, [\rx, #FSR]
44 bic \rd, \rd, #TEND
45 strh \rd, [\rx, #FSR]
48 .macro busyuart, rd, rx
49 1001: ldrh \rd, [\rx, #FSR]
50 tst \rd, #TEND
H A Dsirf.S26 .macro senduart,rd,rx
27 str \rd, [\rx, #SIRF_LLUART_TXFIFO_DATA]
30 .macro busyuart,rd,rx
33 .macro waituart,rd,rx
34 1001: ldr \rd, [\rx, #SIRF_LLUART_TXFIFO_STATUS]
35 tst \rd, #SIRF_LLUART_TXFIFO_EMPTY
H A Dmeson.S21 .macro senduart,rd,rx
22 str \rd, [\rx, #MESON_AO_UART_WFIFO]
25 .macro busyuart,rd,rx
26 1002: ldr \rd, [\rx, #MESON_AO_UART_STATUS]
27 tst \rd, #MESON_AO_UART_TX_FIFO_EMPTY
31 .macro waituart,rd,rx
32 1001: ldr \rd, [\rx, #MESON_AO_UART_STATUS]
33 tst \rd, #MESON_AO_UART_TX_FIFO_FULL
H A Dnetx.S22 .macro senduart,rd,rx
23 str \rd, [\rx, #UART_DATA]
26 .macro busyuart,rd,rx
27 1002: ldr \rd, [\rx, #UART_FLAG]
28 tst \rd, #UART_FLAG_BUSY
32 .macro waituart,rd,rx
33 1001: ldr \rd, [\rx, #UART_FLAG]
34 tst \rd, #UART_FLAG_BUSY
H A Dvt8500.S24 .macro senduart,rd,rx
25 strb \rd, [\rx, #0]
28 .macro busyuart,rd,rx
29 1001: ldr \rd, [\rx, #0x1c]
30 ands \rd, \rd, #0x2
34 .macro waituart,rd,rx
H A Ddigicolor.S24 .macro senduart,rd,rx
25 strb \rd, [\rx, #UA0_EMI_REC]
28 .macro waituart,rd,rx
31 .macro busyuart,rd,rx
32 1001: ldrb \rd, [\rx, #UA0_STATUS]
33 tst \rd, #UA0_STATUS_TX_READY
H A Defm32.S31 .macro senduart,rd,rx
32 strb \rd, [\rx, #UARTn_TXDATA]
35 .macro waituart,rd,rx
36 1001: ldr \rd, [\rx, #UARTn_STATUS]
37 tst \rd, #UARTn_STATUS_TXBL
41 .macro busyuart,rd,rx
42 1001: ldr \rd, [\rx, UARTn_STATUS]
43 tst \rd, #UARTn_STATUS_TXC
H A Dks8695.S26 .macro senduart, rd, rx
27 str \rd, [\rx, #KS8695_URTH] @ Write to Transmit Holding Register
30 .macro busyuart, rd, rx
31 1001: ldr \rd, [\rx, #KS8695_URLS] @ Read Line Status Register
32 tst \rd, #URLS_URTE @ Holding & Shift registers empty?
36 .macro waituart, rd, rx
37 1001: ldr \rd, [\rx, #KS8695_URLS] @ Read Line Status Register
38 tst \rd, #URLS_URTHRE @ Holding Register empty?
H A Dsti.S47 .macro senduart,rd,rx
48 strb \rd, [\rx, #ASC_TX_BUF_OFF]
51 .macro waituart,rd,rx
52 1001: ldr \rd, [\rx, #ASC_STA_OFF]
53 tst \rd, #ASC_STA_TX_FULL
57 .macro busyuart,rd,rx
58 1001: ldr \rd, [\rx, #ASC_STA_OFF]
59 tst \rd, #ASC_STA_TX_EMPTY
H A Dzynq.S40 .macro senduart,rd,rx
41 str \rd, [\rx, #UART_FIFO_OFFSET] @ TXDATA
44 .macro waituart,rd,rx
45 1001: ldr \rd, [\rx, #UART_SR_OFFSET]
46 ARM_BE8( rev \rd, \rd )
47 tst \rd, #UART_SR_TXEMPTY
51 .macro busyuart,rd,rx
52 1002: ldr \rd, [\rx, #UART_SR_OFFSET] @ get status register
53 ARM_BE8( rev \rd, \rd )
54 tst \rd, #UART_SR_TXFULL @
H A Ds3c24xx.S24 .macro fifo_full_s3c2410 rd, rx
25 ldr \rd, [\rx, # S3C2410_UFSTAT]
26 tst \rd, #S3C2410_UFSTAT_TXFULL
29 .macro fifo_level_s3c2410 rd, rx
30 ldr \rd, [\rx, # S3C2410_UFSTAT]
31 and \rd, \rd, #S3C2410_UFSTAT_TXMASK
H A Dclps711x.S27 .macro waituart,rd,rx
30 .macro senduart,rd,rx
31 str \rd, [\rx, #UARTDR]
34 .macro busyuart,rd,rx
35 1001: ldr \rd, [\rx, #SYSFLG]
36 tst \rd, #SYSFLG_UBUSY
H A Dimx.S36 .macro senduart,rd,rx
37 str \rd, [\rx, #0x40] @ TXDATA
40 .macro waituart,rd,rx
43 .macro busyuart,rd,rx
44 1002: ldr \rd, [\rx, #0x98] @ SR2
45 tst \rd, #1 << 3 @ TXDC
H A Dvf.S26 .macro senduart, rd, rx
27 strb \rd, [\rx, #0x7] @ Data Register
30 .macro busyuart, rd, rx
31 1001: ldrb \rd, [\rx, #0x4] @ Status Register 1
32 tst \rd, #1 << 6 @ TC
36 .macro waituart,rd,rx
H A Dat91.S37 .macro senduart,rd,rx
38 strb \rd, [\rx, #(AT91_DBGU_THR)] @ Write to Transmitter Holding Register
41 .macro waituart,rd,rx
42 1001: ldr \rd, [\rx, #(AT91_DBGU_SR)] @ Read Status Register
43 tst \rd, #AT91_DBGU_TXRDY @ DBGU_TXRDY = 1 when ready to transmit
47 .macro busyuart,rd,rx
48 1001: ldr \rd, [\rx, #(AT91_DBGU_SR)] @ Read Status Register
49 tst \rd, #AT91_DBGU_TXEMPTY @ DBGU_TXEMPTY = 1 when transmission complete
H A Dsa1100.S54 .macro senduart,rd,rx
55 str \rd, [\rx, #UTDR]
58 .macro waituart,rd,rx
59 1001: ldr \rd, [\rx, #UTSR1]
60 tst \rd, #UTSR1_TNF
64 .macro busyuart,rd,rx
65 1001: ldr \rd, [\rx, #UTSR1]
66 tst \rd, #UTSR1_TBY
H A Domap2plus.S174 .macro senduart,rd,rx
175 orr \rd, \rd, \rx, lsl #24 @ preserve LSR reg offset
177 strb \rd, [\rx] @ send lower byte of rd
178 orr \rx, \rx, \rd, lsr #24 @ restore original rx (LSR)
179 bic \rd, \rd, #(0xff << 24) @ restore original rd
182 .macro busyuart,rd,rx
183 1001: ldrb \rd, [\rx] @ rx contains UART_LSR address
184 and \rd, \rd, #(UART_LSR_TEMT | UART_LSR_THRE)
185 teq \rd, #(UART_LSR_TEMT | UART_LSR_THRE)
189 .macro waituart,rd,rx
H A Dtegra.S174 .macro senduart, rd, rx
176 strneb \rd, [\rx, #UART_TX << UART_SHIFT]
180 .macro busyuart, rd, rx
183 1001: ldrb \rd, [\rx, #UART_LSR << UART_SHIFT]
184 and \rd, \rd, #UART_LSR_THRE
185 teq \rd, #UART_LSR_THRE
190 .macro waituart, rd, rx
194 1001: ldrb \rd, [\rx, #UART_MSR << UART_SHIFT]
195 tst \rd, #UART_MSR_CTS
/linux-4.1.27/drivers/gpu/drm/msm/
H A Dmsm_rd.c20 * tail -f /sys/kernel/debug/dri/<minor>/rd > logfile.rd
97 static void rd_write(struct msm_rd_state *rd, const void *buf, int sz) rd_write() argument
99 struct circ_buf *fifo = &rd->fifo; rd_write()
106 wait_event(rd->fifo_event, circ_space(&rd->fifo) > 0); rd_write()
108 n = min(sz, circ_space_to_end(&rd->fifo)); rd_write()
115 wake_up_all(&rd->fifo_event); rd_write()
119 static void rd_write_section(struct msm_rd_state *rd, rd_write_section() argument
122 rd_write(rd, &type, 4); rd_write_section()
123 rd_write(rd, &sz, 4); rd_write_section()
124 rd_write(rd, buf, sz); rd_write_section()
130 struct msm_rd_state *rd = file->private_data; rd_read() local
131 struct circ_buf *fifo = &rd->fifo; rd_read()
135 mutex_lock(&rd->read_lock); rd_read()
137 ret = wait_event_interruptible(rd->fifo_event, rd_read()
138 circ_count(&rd->fifo) > 0); rd_read()
142 n = min_t(int, sz, circ_count_to_end(&rd->fifo)); rd_read()
150 wake_up_all(&rd->fifo_event); rd_read()
153 mutex_unlock(&rd->read_lock); rd_read()
161 struct msm_rd_state *rd = inode->i_private; rd_open() local
162 struct drm_device *dev = rd->dev; rd_open()
171 if (rd->open || !gpu) { rd_open()
176 file->private_data = rd; rd_open()
177 rd->open = true; rd_open()
185 rd_write_section(rd, RD_GPU_ID, &gpu_id, sizeof(gpu_id)); rd_open()
194 struct msm_rd_state *rd = inode->i_private; rd_release() local
195 rd->open = false; rd_release()
211 struct msm_rd_state *rd; msm_rd_debugfs_init() local
214 if (priv->rd) msm_rd_debugfs_init()
217 rd = kzalloc(sizeof(*rd), GFP_KERNEL); msm_rd_debugfs_init()
218 if (!rd) msm_rd_debugfs_init()
221 rd->dev = minor->dev; msm_rd_debugfs_init()
222 rd->fifo.buf = rd->buf; msm_rd_debugfs_init()
224 mutex_init(&rd->read_lock); msm_rd_debugfs_init()
225 priv->rd = rd; msm_rd_debugfs_init()
227 init_waitqueue_head(&rd->fifo_event); msm_rd_debugfs_init()
229 rd->node = kzalloc(sizeof(*rd->node), GFP_KERNEL); msm_rd_debugfs_init()
230 if (!rd->node) msm_rd_debugfs_init()
233 rd->ent = debugfs_create_file("rd", S_IFREG | S_IRUGO, msm_rd_debugfs_init()
234 minor->debugfs_root, rd, &rd_debugfs_fops); msm_rd_debugfs_init()
235 if (!rd->ent) { msm_rd_debugfs_init()
236 DRM_ERROR("Cannot create /sys/kernel/debug/dri/%s/rd\n", msm_rd_debugfs_init()
241 rd->node->minor = minor; msm_rd_debugfs_init()
242 rd->node->dent = rd->ent; msm_rd_debugfs_init()
243 rd->node->info_ent = NULL; msm_rd_debugfs_init()
246 list_add(&rd->node->list, &minor->debugfs_list); msm_rd_debugfs_init()
259 struct msm_rd_state *rd = priv->rd; msm_rd_debugfs_cleanup() local
261 if (!rd) msm_rd_debugfs_cleanup()
264 priv->rd = NULL; msm_rd_debugfs_cleanup()
266 debugfs_remove(rd->ent); msm_rd_debugfs_cleanup()
268 if (rd->node) { msm_rd_debugfs_cleanup()
270 list_del(&rd->node->list); msm_rd_debugfs_cleanup()
272 kfree(rd->node); msm_rd_debugfs_cleanup()
275 mutex_destroy(&rd->read_lock); msm_rd_debugfs_cleanup()
277 kfree(rd); msm_rd_debugfs_cleanup()
285 struct msm_rd_state *rd = priv->rd; msm_rd_dump_submit() local
289 if (!rd->open) msm_rd_dump_submit()
293 * rd->read_lock is used to serialize the reads msm_rd_dump_submit()
301 rd_write_section(rd, RD_CMD, msg, ALIGN(n, 4)); msm_rd_dump_submit()
317 rd_write_section(rd, RD_GPUADDR, msm_rd_dump_submit()
319 rd_write_section(rd, RD_BUFFER_CONTENTS, msm_rd_dump_submit()
331 rd_write_section(rd, RD_CMDSTREAM_ADDR, msm_rd_dump_submit()
/linux-4.1.27/arch/sparc/include/asm/
H A Dhead_32.h12 rd %psr, %l0; b label; rd %wim, %l3; nop;
15 #define SRMMU_TFAULT rd %psr, %l0; rd %wim, %l3; b srmmu_fault; mov 1, %l7;
16 #define SRMMU_DFAULT rd %psr, %l0; rd %wim, %l3; b srmmu_fault; mov 0, %l7;
20 rd %psr, %l0; mov num, %l7; b bad_trap_handler; rd %wim, %l3;
37 rd %psr, %l0;
41 rd %psr,%l0; \
48 rd %psr,%l0; \
58 b getcc_trap_handler; rd %psr, %l0; nop; nop;
62 b setcc_trap_handler; rd %psr, %l0; nop; nop;
66 rd %psr, %i0; jmp %l2; rett %l2 + 4; nop;
72 mov int_level, %l7; rd %psr, %l0; b real_irq_entry; rd %wim, %l3;
78 rd %psr, %l0; rd %wim, %l3; b spill_window_entry; andcc %l0, PSR_PS, %g0;
81 rd %psr, %l0; rd %wim, %l3; b fill_window_entry; andcc %l0, PSR_PS, %g0;
H A Dlsu.h9 #define LSU_CONTROL_PR _AC(0x0000000001000000,UL) /* Phys-rd watchpoint enable*/
11 #define LSU_CONTROL_VR _AC(0x0000000000400000,UL) /* Virt-rd watchpoint enable*/
H A Dperf_event.h11 "rd %%asi, %1\n\t" \
H A Dfpumacro.h23 __asm__ __volatile__("rd %%fprs, %0" : "=r" (retval)); fprs_read()
H A Dvisasm.h15 rd %fprs, %o5; \
37 rd %fprs, %o5; \
50 " rd %%fprs, %%o5\n" save_and_clear_fpu()
H A Dirqflags_32.h26 asm volatile("rd %%psr, %0" : "=r" (flags)); arch_local_save_flags()
H A Dbackoff.h56 88: rd %ccr, %g0; \
57 rd %ccr, %g0; \
58 rd %ccr, %g0; \
H A Dwinmacro.h77 rd %y, %scratch; \
107 661: rd %tbr, %idreg; \
118 rd %asr17, %idreg; \
H A Dswitch_to_32.h65 "rd %%psr, %%g4\n\t" \
67 "rd %%wim, %%g5\n\t" \
H A Dprocessor_64.h14 #define current_text_addr() ({ void *pc; __asm__("rd %%pc, %0" : "=r" (pc)); pc; })
209 "rd %%ccr, %%g0\n\t" \
210 "rd %%ccr, %%g0\n\t" \
211 "rd %%ccr, %%g0\n\t" \
H A Dpsr.h22 "rd %%psr, %0\n\t" get_psr()
H A Dross.h84 * 1000 0011 0100 0111 1100 0000 0000 0000 ! rd %iccr, %g1
103 __asm__ __volatile__(".word 0x8347c000\n\t" /* rd %iccr, %g1 */ get_ross_icr()
H A Dirq_64.h84 __asm__ __volatile__("rd %%softint, %0" get_softint()
H A Dmbus.h83 __asm__ __volatile__("rd %%tbr, %0\n\t" get_cpuid()
/linux-4.1.27/arch/arm/net/
H A Dbpf_jit_32.h132 #define _AL3_R(op, rd, rn, rm) ((op ## _R) | (rd) << 12 | (rn) << 16 | (rm))
134 #define _AL3_I(op, rd, rn, imm) ((op ## _I) | (rd) << 12 | (rn) << 16 | (imm))
136 #define ARM_ADD_R(rd, rn, rm) _AL3_R(ARM_INST_ADD, rd, rn, rm)
137 #define ARM_ADD_I(rd, rn, imm) _AL3_I(ARM_INST_ADD, rd, rn, imm)
139 #define ARM_AND_R(rd, rn, rm) _AL3_R(ARM_INST_AND, rd, rn, rm)
140 #define ARM_AND_I(rd, rn, imm) _AL3_I(ARM_INST_AND, rd, rn, imm)
142 #define ARM_BIC_R(rd, rn, rm) _AL3_R(ARM_INST_BIC, rd, rn, rm)
143 #define ARM_BIC_I(rd, rn, imm) _AL3_I(ARM_INST_BIC, rd, rn, imm)
152 #define ARM_EOR_R(rd, rn, rm) _AL3_R(ARM_INST_EOR, rd, rn, rm)
153 #define ARM_EOR_I(rd, rn, imm) _AL3_I(ARM_INST_EOR, rd, rn, imm)
166 #define ARM_LSL_R(rd, rn, rm) (_AL3_R(ARM_INST_LSL, rd, 0, rn) | (rm) << 8)
167 #define ARM_LSL_I(rd, rn, imm) (_AL3_I(ARM_INST_LSL, rd, 0, rn) | (imm) << 7)
169 #define ARM_LSR_R(rd, rn, rm) (_AL3_R(ARM_INST_LSR, rd, 0, rn) | (rm) << 8)
170 #define ARM_LSR_I(rd, rn, imm) (_AL3_I(ARM_INST_LSR, rd, 0, rn) | (imm) << 7)
172 #define ARM_MOV_R(rd, rm) _AL3_R(ARM_INST_MOV, rd, 0, rm)
173 #define ARM_MOV_I(rd, imm) _AL3_I(ARM_INST_MOV, rd, 0, imm)
175 #define ARM_MOVW(rd, imm) \
176 (ARM_INST_MOVW | ((imm) >> 12) << 16 | (rd) << 12 | ((imm) & 0x0fff))
178 #define ARM_MOVT(rd, imm) \
179 (ARM_INST_MOVT | ((imm) >> 12) << 16 | (rd) << 12 | ((imm) & 0x0fff))
181 #define ARM_MUL(rd, rm, rn) (ARM_INST_MUL | (rd) << 16 | (rm) << 8 | (rn))
186 #define ARM_ORR_R(rd, rn, rm) _AL3_R(ARM_INST_ORR, rd, rn, rm)
187 #define ARM_ORR_I(rd, rn, imm) _AL3_I(ARM_INST_ORR, rd, rn, imm)
188 #define ARM_ORR_S(rd, rn, rm, type, rs) \
189 (ARM_ORR_R(rd, rn, rm) | (type) << 5 | (rs) << 7)
191 #define ARM_REV(rd, rm) (ARM_INST_REV | (rd) << 12 | (rm))
192 #define ARM_REV16(rd, rm) (ARM_INST_REV16 | (rd) << 12 | (rm))
194 #define ARM_RSB_I(rd, rn, imm) _AL3_I(ARM_INST_RSB, rd, rn, imm)
196 #define ARM_SUB_R(rd, rn, rm) _AL3_R(ARM_INST_SUB, rd, rn, rm)
197 #define ARM_SUB_I(rd, rn, imm) _AL3_I(ARM_INST_SUB, rd, rn, imm)
205 #define ARM_UDIV(rd, rn, rm) (ARM_INST_UDIV | (rd) << 16 | (rn) | (rm) << 8)
H A Dbpf_jit_32.c300 static inline void emit_mov_i_no8m(int rd, u32 val, struct jit_ctx *ctx) emit_mov_i_no8m() argument
303 emit(ARM_LDR_I(rd, ARM_PC, imm_offset(val, ctx)), ctx); emit_mov_i_no8m()
305 emit(ARM_MOVW(rd, val & 0xffff), ctx); emit_mov_i_no8m()
307 emit(ARM_MOVT(rd, val >> 16), ctx); emit_mov_i_no8m()
311 static inline void emit_mov_i(int rd, u32 val, struct jit_ctx *ctx) emit_mov_i() argument
316 emit(ARM_MOV_I(rd, imm12), ctx); emit_mov_i()
318 emit_mov_i_no8m(rd, val, ctx); emit_mov_i()
440 static inline void emit_udiv(u8 rd, u8 rm, u8 rn, struct jit_ctx *ctx) emit_udiv() argument
444 emit(ARM_UDIV(rd, rm, rn), ctx); emit_udiv()
468 if (rd != ARM_R0) emit_udiv()
469 emit(ARM_MOV_R(rd, ARM_R0), ctx); emit_udiv()
/linux-4.1.27/drivers/powercap/
H A Dintel_rapl.c191 void (*set_floor_freq)(struct rapl_domain *rd, bool mode);
226 static int rapl_read_data_raw(struct rapl_domain *rd,
229 static int rapl_write_data_raw(struct rapl_domain *rd,
232 static u64 rapl_unit_xlate(struct rapl_domain *rd, int package,
289 struct rapl_domain *rd; get_energy_counter() local
296 rd = power_zone_to_rapl_domain(power_zone); get_energy_counter()
298 if (!rapl_read_data_raw(rd, ENERGY_COUNTER, true, &energy_now)) { get_energy_counter()
311 struct rapl_domain *rd = power_zone_to_rapl_domain(pcd_dev); get_max_energy_counter() local
313 *energy = rapl_unit_xlate(rd, 0, ENERGY_UNIT, ENERGY_STATUS_MASK, 0); get_max_energy_counter()
319 struct rapl_domain *rd = power_zone_to_rapl_domain(power_zone); release_zone() local
325 if (rd->id == RAPL_DOMAIN_PACKAGE) { release_zone()
326 rp = find_package_by_id(rd->package_id); release_zone()
329 rd->name); release_zone()
332 kfree(rd); release_zone()
340 static int find_nr_power_limit(struct rapl_domain *rd) find_nr_power_limit() argument
345 if (rd->rpl[i].name == NULL) find_nr_power_limit()
354 struct rapl_domain *rd = power_zone_to_rapl_domain(power_zone); set_domain_enable() local
356 if (rd->state & DOMAIN_STATE_BIOS_LOCKED) set_domain_enable()
360 rapl_write_data_raw(rd, PL1_ENABLE, mode); set_domain_enable()
361 rapl_defaults->set_floor_freq(rd, mode); set_domain_enable()
369 struct rapl_domain *rd = power_zone_to_rapl_domain(power_zone); get_domain_enable() local
372 if (rd->state & DOMAIN_STATE_BIOS_LOCKED) { get_domain_enable()
377 if (rapl_read_data_raw(rd, PL1_ENABLE, true, &val)) { get_domain_enable()
426 struct rapl_domain *rd; set_power_limit() local
431 rd = power_zone_to_rapl_domain(power_zone); set_power_limit()
432 rp = find_package_by_id(rd->package_id); set_power_limit()
438 if (rd->state & DOMAIN_STATE_BIOS_LOCKED) { set_power_limit()
440 rd->name); set_power_limit()
445 switch (rd->rpl[id].prim_id) { set_power_limit()
447 rapl_write_data_raw(rd, POWER_LIMIT1, power_limit); set_power_limit()
450 rapl_write_data_raw(rd, POWER_LIMIT2, power_limit); set_power_limit()
456 package_power_limit_irq_save(rd->package_id); set_power_limit()
465 struct rapl_domain *rd; get_current_power_limit() local
471 rd = power_zone_to_rapl_domain(power_zone); get_current_power_limit()
472 switch (rd->rpl[id].prim_id) { get_current_power_limit()
483 if (rapl_read_data_raw(rd, prim, true, &val)) get_current_power_limit()
496 struct rapl_domain *rd; set_time_window() local
500 rd = power_zone_to_rapl_domain(power_zone); set_time_window()
501 switch (rd->rpl[id].prim_id) { set_time_window()
503 rapl_write_data_raw(rd, TIME_WINDOW1, window); set_time_window()
506 rapl_write_data_raw(rd, TIME_WINDOW2, window); set_time_window()
517 struct rapl_domain *rd; get_time_window() local
522 rd = power_zone_to_rapl_domain(power_zone); get_time_window()
523 switch (rd->rpl[id].prim_id) { get_time_window()
525 ret = rapl_read_data_raw(rd, TIME_WINDOW1, true, &val); get_time_window()
528 ret = rapl_read_data_raw(rd, TIME_WINDOW2, true, &val); get_time_window()
544 struct rapl_domain *rd; get_constraint_name() local
546 rd = power_zone_to_rapl_domain(power_zone); get_constraint_name()
547 rpl = (struct rapl_power_limit *) &rd->rpl[id]; get_constraint_name()
556 struct rapl_domain *rd; get_max_power() local
562 rd = power_zone_to_rapl_domain(power_zone); get_max_power()
563 switch (rd->rpl[id].prim_id) { get_max_power()
574 if (rapl_read_data_raw(rd, prim, true, &val)) get_max_power()
597 struct rapl_domain *rd = rp->domains; rapl_init_domains() local
603 rd->name = rapl_domain_names[RAPL_DOMAIN_PACKAGE]; rapl_init_domains()
604 rd->id = RAPL_DOMAIN_PACKAGE; rapl_init_domains()
605 rd->msrs[0] = MSR_PKG_POWER_LIMIT; rapl_init_domains()
606 rd->msrs[1] = MSR_PKG_ENERGY_STATUS; rapl_init_domains()
607 rd->msrs[2] = MSR_PKG_PERF_STATUS; rapl_init_domains()
608 rd->msrs[3] = 0; rapl_init_domains()
609 rd->msrs[4] = MSR_PKG_POWER_INFO; rapl_init_domains()
610 rd->rpl[0].prim_id = PL1_ENABLE; rapl_init_domains()
611 rd->rpl[0].name = pl1_name; rapl_init_domains()
612 rd->rpl[1].prim_id = PL2_ENABLE; rapl_init_domains()
613 rd->rpl[1].name = pl2_name; rapl_init_domains()
616 rd->name = rapl_domain_names[RAPL_DOMAIN_PP0]; rapl_init_domains()
617 rd->id = RAPL_DOMAIN_PP0; rapl_init_domains()
618 rd->msrs[0] = MSR_PP0_POWER_LIMIT; rapl_init_domains()
619 rd->msrs[1] = MSR_PP0_ENERGY_STATUS; rapl_init_domains()
620 rd->msrs[2] = 0; rapl_init_domains()
621 rd->msrs[3] = MSR_PP0_POLICY; rapl_init_domains()
622 rd->msrs[4] = 0; rapl_init_domains()
623 rd->rpl[0].prim_id = PL1_ENABLE; rapl_init_domains()
624 rd->rpl[0].name = pl1_name; rapl_init_domains()
627 rd->name = rapl_domain_names[RAPL_DOMAIN_PP1]; rapl_init_domains()
628 rd->id = RAPL_DOMAIN_PP1; rapl_init_domains()
629 rd->msrs[0] = MSR_PP1_POWER_LIMIT; rapl_init_domains()
630 rd->msrs[1] = MSR_PP1_ENERGY_STATUS; rapl_init_domains()
631 rd->msrs[2] = 0; rapl_init_domains()
632 rd->msrs[3] = MSR_PP1_POLICY; rapl_init_domains()
633 rd->msrs[4] = 0; rapl_init_domains()
634 rd->rpl[0].prim_id = PL1_ENABLE; rapl_init_domains()
635 rd->rpl[0].name = pl1_name; rapl_init_domains()
638 rd->name = rapl_domain_names[RAPL_DOMAIN_DRAM]; rapl_init_domains()
639 rd->id = RAPL_DOMAIN_DRAM; rapl_init_domains()
640 rd->msrs[0] = MSR_DRAM_POWER_LIMIT; rapl_init_domains()
641 rd->msrs[1] = MSR_DRAM_ENERGY_STATUS; rapl_init_domains()
642 rd->msrs[2] = MSR_DRAM_PERF_STATUS; rapl_init_domains()
643 rd->msrs[3] = 0; rapl_init_domains()
644 rd->msrs[4] = MSR_DRAM_POWER_INFO; rapl_init_domains()
645 rd->rpl[0].prim_id = PL1_ENABLE; rapl_init_domains()
646 rd->rpl[0].name = pl1_name; rapl_init_domains()
647 rd->domain_energy_unit = rapl_init_domains()
649 if (rd->domain_energy_unit) rapl_init_domains()
651 rd->domain_energy_unit); rapl_init_domains()
655 rd->package_id = rp->id; rapl_init_domains()
656 rd++; rapl_init_domains()
661 static u64 rapl_unit_xlate(struct rapl_domain *rd, int package, rapl_unit_xlate() argument
680 if (rd && rd->domain_energy_unit) rapl_unit_xlate()
681 units = rd->domain_energy_unit; rapl_unit_xlate()
754 static int rapl_read_data_raw(struct rapl_domain *rd, rapl_read_data_raw() argument
766 msr = rd->msrs[rp->id]; rapl_read_data_raw()
770 cpu = find_active_cpu_on_package(rd->package_id); rapl_read_data_raw()
775 if (prim == FW_LOCK && rd->id == RAPL_DOMAIN_PACKAGE) { rapl_read_data_raw()
781 *data = rd->rdd.primitives[prim]; rapl_read_data_raw()
793 *data = rapl_unit_xlate(rd, rd->package_id, rp->unit, final, 0); rapl_read_data_raw()
801 static int rapl_write_data_raw(struct rapl_domain *rd, rapl_write_data_raw() argument
810 cpu = find_active_cpu_on_package(rd->package_id); rapl_write_data_raw()
813 msr = rd->msrs[rp->id]; rapl_write_data_raw()
815 dev_dbg(&rd->power_zone.dev, rapl_write_data_raw()
819 value = rapl_unit_xlate(rd, rd->package_id, rp->unit, value, 1); rapl_write_data_raw()
823 dev_dbg(&rd->power_zone.dev, rapl_write_data_raw()
961 static void set_floor_freq_default(struct rapl_domain *rd, bool mode) set_floor_freq_default() argument
963 int nr_powerlimit = find_nr_power_limit(rd); set_floor_freq_default()
968 rapl_write_data_raw(rd, PL1_CLAMP, mode); set_floor_freq_default()
972 rapl_write_data_raw(rd, PL2_ENABLE, mode); set_floor_freq_default()
973 rapl_write_data_raw(rd, PL2_CLAMP, mode); set_floor_freq_default()
977 static void set_floor_freq_atom(struct rapl_domain *rd, bool enable) set_floor_freq_atom() argument
1102 struct rapl_domain *rd, *rd_package = NULL; rapl_unregister_powercap() local
1110 for (rd = rp->domains; rd < rp->domains + rp->nr_domains; rapl_unregister_powercap()
1111 rd++) { rapl_unregister_powercap()
1113 rp->id, rd->name); rapl_unregister_powercap()
1114 rapl_write_data_raw(rd, PL1_ENABLE, 0); rapl_unregister_powercap()
1115 rapl_write_data_raw(rd, PL2_ENABLE, 0); rapl_unregister_powercap()
1116 rapl_write_data_raw(rd, PL1_CLAMP, 0); rapl_unregister_powercap()
1117 rapl_write_data_raw(rd, PL2_CLAMP, 0); rapl_unregister_powercap()
1118 if (rd->id == RAPL_DOMAIN_PACKAGE) { rapl_unregister_powercap()
1119 rd_package = rd; rapl_unregister_powercap()
1122 powercap_unregister_zone(control_type, &rd->power_zone); rapl_unregister_powercap()
1136 struct rapl_domain *rd; rapl_package_register_powercap() local
1143 for (rd = rp->domains; rd < rp->domains + rp->nr_domains; rd++) { rapl_package_register_powercap()
1144 if (rd->id == RAPL_DOMAIN_PACKAGE) { rapl_package_register_powercap()
1145 nr_pl = find_nr_power_limit(rd); rapl_package_register_powercap()
1147 rp->id, rd->name); rapl_package_register_powercap()
1150 rd->name, rp->id); rapl_package_register_powercap()
1151 power_zone = powercap_register_zone(&rd->power_zone, rapl_package_register_powercap()
1154 &zone_ops[rd->id], rapl_package_register_powercap()
1175 for (rd = rp->domains; rd < rp->domains + rp->nr_domains; rd++) { rapl_package_register_powercap()
1176 if (rd->id == RAPL_DOMAIN_PACKAGE) rapl_package_register_powercap()
1179 nr_pl = find_nr_power_limit(rd); rapl_package_register_powercap()
1180 power_zone = powercap_register_zone(&rd->power_zone, rapl_package_register_powercap()
1181 control_type, rd->name, rapl_package_register_powercap()
1183 &zone_ops[rd->id], nr_pl, rapl_package_register_powercap()
1188 rp->id, rd->name, dev_name); rapl_package_register_powercap()
1200 while (--rd >= rp->domains) { rapl_package_register_powercap()
1201 pr_debug("unregister package %d domain %s\n", rp->id, rd->name); rapl_package_register_powercap()
1202 powercap_unregister_zone(control_type, &rd->power_zone); rapl_package_register_powercap()
1210 struct rapl_domain *rd; rapl_register_powercap() local
1229 for (rd = rp->domains; rd < rp->domains + rp->nr_domains; rapl_register_powercap()
1230 rd++) { rapl_register_powercap()
1232 rp->id, rd->name); rapl_register_powercap()
1233 powercap_unregister_zone(control_type, &rd->power_zone); rapl_register_powercap()
1278 struct rapl_domain *rd; rapl_detect_domains() local
1304 for (rd = rp->domains; rd < rp->domains + rp->nr_domains; rd++) { rapl_detect_domains()
1306 if (rapl_read_data_raw(rd, FW_LOCK, false, &locked)) { rapl_detect_domains()
1308 rp->id, rd->name); rapl_detect_domains()
1309 rd->state |= DOMAIN_STATE_BIOS_LOCKED; rapl_detect_domains()
1379 struct rapl_domain *rd, *rd_package = NULL; rapl_remove_package() local
1381 for (rd = rp->domains; rd < rp->domains + rp->nr_domains; rd++) { rapl_remove_package()
1382 if (rd->id == RAPL_DOMAIN_PACKAGE) { rapl_remove_package()
1383 rd_package = rd; rapl_remove_package()
1386 pr_debug("remove package %d, %s domain\n", rp->id, rd->name); rapl_remove_package()
1387 powercap_unregister_zone(control_type, &rd->power_zone); rapl_remove_package()
/linux-4.1.27/arch/unicore32/kernel/
H A Ddebug-macro.S17 .macro put_word_ocd, rd, rx=r16
21 movc p1.c1, \rd, #1
29 .macro senduart, rd, rx
30 put_word_ocd \rd, \rx
33 .macro busyuart, rd, rx
36 .macro waituart, rd, rx
73 .macro senduart,rd,rx
74 str \rd, [\rx, #UART_THR_OFFSET]
77 .macro waituart,rd,rx
78 1001: ldr \rd, [\rx, #UART_LSR_OFFSET]
79 tst \rd, #UART_LSR_THRE
83 .macro busyuart,rd,rx
84 1001: ldr \rd, [\rx, #UART_LSR_OFFSET]
85 tst \rd, #UART_LSR_TEMT
H A Dentry.S52 .macro load_user_sp_lr, rd, rtemp, offset = 0
57 ldw sp, [\rd+], #\offset @ load sp_user
58 ldw lr, [\rd+], #\offset + 4 @ load lr_user
88 .macro get_thread_info, rd
89 mov \rd, sp >> #13
90 mov \rd, \rd << #13
/linux-4.1.27/kernel/time/
H A Dsched_clock.c100 struct clock_read_data *rd; sched_clock() local
104 rd = cd.read_data + (seq & 1); sched_clock()
106 cyc = (rd->read_sched_clock() - rd->epoch_cyc) & sched_clock()
107 rd->sched_clock_mask; sched_clock()
108 res = rd->epoch_ns + cyc_to_ns(cyc, rd->mult, rd->shift); sched_clock()
124 static void update_clock_read_data(struct clock_read_data *rd) update_clock_read_data() argument
127 cd.read_data[1] = *rd; update_clock_read_data()
133 cd.read_data[0] = *rd; update_clock_read_data()
146 struct clock_read_data rd; update_sched_clock() local
148 rd = cd.read_data[0]; update_sched_clock()
151 ns = rd.epoch_ns + cyc_to_ns((cyc - rd.epoch_cyc) & rd.sched_clock_mask, rd.mult, rd.shift); update_sched_clock()
153 rd.epoch_ns = ns; update_sched_clock()
154 rd.epoch_cyc = cyc; update_sched_clock()
156 update_clock_read_data(&rd); update_sched_clock()
174 struct clock_read_data rd; sched_clock_register() local
191 rd = cd.read_data[0]; sched_clock_register()
196 ns = rd.epoch_ns + cyc_to_ns((cyc - rd.epoch_cyc) & rd.sched_clock_mask, rd.mult, rd.shift); sched_clock_register()
199 rd.read_sched_clock = read; sched_clock_register()
200 rd.sched_clock_mask = new_mask; sched_clock_register()
201 rd.mult = new_mult; sched_clock_register()
202 rd.shift = new_shift; sched_clock_register()
203 rd.epoch_cyc = new_epoch; sched_clock_register()
204 rd.epoch_ns = ns; sched_clock_register()
206 update_clock_read_data(&rd); sched_clock_register()
274 struct clock_read_data *rd = &cd.read_data[0]; sched_clock_suspend() local
278 rd->read_sched_clock = suspended_sched_clock_read; sched_clock_suspend()
285 struct clock_read_data *rd = &cd.read_data[0]; sched_clock_resume() local
287 rd->epoch_cyc = cd.actual_read_sched_clock(); sched_clock_resume()
289 rd->read_sched_clock = cd.actual_read_sched_clock; sched_clock_resume()
/linux-4.1.27/fs/jffs2/
H A Dwrite.c206 struct jffs2_raw_dirent *rd, const unsigned char *name, jffs2_write_dirent()
218 je32_to_cpu(rd->pino), name, name, je32_to_cpu(rd->ino), jffs2_write_dirent()
219 je32_to_cpu(rd->name_crc)); jffs2_write_dirent()
221 D1(if(je32_to_cpu(rd->hdr_crc) != crc32(0, rd, sizeof(struct jffs2_unknown_node)-4)) { jffs2_write_dirent()
231 je32_to_cpu(rd->pino), name, name, je32_to_cpu(rd->ino), jffs2_write_dirent()
232 je32_to_cpu(rd->name_crc)); jffs2_write_dirent()
237 vecs[0].iov_base = rd; jffs2_write_dirent()
238 vecs[0].iov_len = sizeof(*rd); jffs2_write_dirent()
246 fd->version = je32_to_cpu(rd->version); jffs2_write_dirent()
247 fd->ino = je32_to_cpu(rd->ino); jffs2_write_dirent()
249 fd->type = rd->type; jffs2_write_dirent()
258 if ((alloc_mode!=ALLOC_GC) && (je32_to_cpu(rd->version) < f->highest_version)) { jffs2_write_dirent()
262 je32_to_cpu(rd->version), f->highest_version); jffs2_write_dirent()
263 rd->version = cpu_to_je32(++f->highest_version); jffs2_write_dirent()
264 fd->version = je32_to_cpu(rd->version); jffs2_write_dirent()
265 rd->node_crc = cpu_to_je32(crc32(0, rd, sizeof(*rd)-8)); jffs2_write_dirent()
269 (alloc_mode==ALLOC_GC)?0:je32_to_cpu(rd->pino)); jffs2_write_dirent()
270 if (ret || (retlen != sizeof(*rd) + namelen)) { jffs2_write_dirent()
272 sizeof(*rd) + namelen, flash_ofs, ret, retlen); jffs2_write_dirent()
275 jffs2_add_physical_node_ref(c, flash_ofs | REF_OBSOLETE, PAD(sizeof(*rd)+namelen), NULL); jffs2_write_dirent()
293 ret = jffs2_reserve_space_gc(c, sizeof(*rd) + namelen, &dummy, jffs2_write_dirent()
300 ret = jffs2_reserve_space(c, sizeof(*rd) + namelen, &dummy, jffs2_write_dirent()
321 fd->raw = jffs2_add_physical_node_ref(c, flash_ofs | dirent_node_state(rd), jffs2_write_dirent()
322 PAD(sizeof(*rd)+namelen), f->inocache); jffs2_write_dirent()
444 struct jffs2_raw_dirent *rd; jffs2_do_create() local
491 ret = jffs2_reserve_space(c, sizeof(*rd)+qstr->len, &alloclen, jffs2_do_create()
500 rd = jffs2_alloc_raw_dirent(); jffs2_do_create()
501 if (!rd) { jffs2_do_create()
509 rd->magic = cpu_to_je16(JFFS2_MAGIC_BITMASK); jffs2_do_create()
510 rd->nodetype = cpu_to_je16(JFFS2_NODETYPE_DIRENT); jffs2_do_create()
511 rd->totlen = cpu_to_je32(sizeof(*rd) + qstr->len); jffs2_do_create()
512 rd->hdr_crc = cpu_to_je32(crc32(0, rd, sizeof(struct jffs2_unknown_node)-4)); jffs2_do_create()
514 rd->pino = cpu_to_je32(dir_f->inocache->ino); jffs2_do_create()
515 rd->version = cpu_to_je32(++dir_f->highest_version); jffs2_do_create()
516 rd->ino = ri->ino; jffs2_do_create()
517 rd->mctime = ri->ctime; jffs2_do_create()
518 rd->nsize = qstr->len; jffs2_do_create()
519 rd->type = DT_REG; jffs2_do_create()
520 rd->node_crc = cpu_to_je32(crc32(0, rd, sizeof(*rd)-8)); jffs2_do_create()
521 rd->name_crc = cpu_to_je32(crc32(0, qstr->name, qstr->len)); jffs2_do_create()
523 fd = jffs2_write_dirent(c, dir_f, rd, qstr->name, qstr->len, ALLOC_NORMAL); jffs2_do_create()
525 jffs2_free_raw_dirent(rd); jffs2_do_create()
550 struct jffs2_raw_dirent *rd; jffs2_do_unlink() local
558 rd = jffs2_alloc_raw_dirent(); jffs2_do_unlink()
559 if (!rd) jffs2_do_unlink()
562 ret = jffs2_reserve_space(c, sizeof(*rd)+namelen, &alloclen, jffs2_do_unlink()
565 jffs2_free_raw_dirent(rd); jffs2_do_unlink()
572 rd->magic = cpu_to_je16(JFFS2_MAGIC_BITMASK); jffs2_do_unlink()
573 rd->nodetype = cpu_to_je16(JFFS2_NODETYPE_DIRENT); jffs2_do_unlink()
574 rd->totlen = cpu_to_je32(sizeof(*rd) + namelen); jffs2_do_unlink()
575 rd->hdr_crc = cpu_to_je32(crc32(0, rd, sizeof(struct jffs2_unknown_node)-4)); jffs2_do_unlink()
577 rd->pino = cpu_to_je32(dir_f->inocache->ino); jffs2_do_unlink()
578 rd->version = cpu_to_je32(++dir_f->highest_version); jffs2_do_unlink()
579 rd->ino = cpu_to_je32(0); jffs2_do_unlink()
580 rd->mctime = cpu_to_je32(time); jffs2_do_unlink()
581 rd->nsize = namelen; jffs2_do_unlink()
582 rd->type = DT_UNKNOWN; jffs2_do_unlink()
583 rd->node_crc = cpu_to_je32(crc32(0, rd, sizeof(*rd)-8)); jffs2_do_unlink()
584 rd->name_crc = cpu_to_je32(crc32(0, name, namelen)); jffs2_do_unlink()
586 fd = jffs2_write_dirent(c, dir_f, rd, name, namelen, ALLOC_DELETION); jffs2_do_unlink()
588 jffs2_free_raw_dirent(rd); jffs2_do_unlink()
670 struct jffs2_raw_dirent *rd; jffs2_do_link() local
675 rd = jffs2_alloc_raw_dirent(); jffs2_do_link()
676 if (!rd) jffs2_do_link()
679 ret = jffs2_reserve_space(c, sizeof(*rd)+namelen, &alloclen, jffs2_do_link()
682 jffs2_free_raw_dirent(rd); jffs2_do_link()
689 rd->magic = cpu_to_je16(JFFS2_MAGIC_BITMASK); jffs2_do_link()
690 rd->nodetype = cpu_to_je16(JFFS2_NODETYPE_DIRENT); jffs2_do_link()
691 rd->totlen = cpu_to_je32(sizeof(*rd) + namelen); jffs2_do_link()
692 rd->hdr_crc = cpu_to_je32(crc32(0, rd, sizeof(struct jffs2_unknown_node)-4)); jffs2_do_link()
694 rd->pino = cpu_to_je32(dir_f->inocache->ino); jffs2_do_link()
695 rd->version = cpu_to_je32(++dir_f->highest_version); jffs2_do_link()
696 rd->ino = cpu_to_je32(ino); jffs2_do_link()
697 rd->mctime = cpu_to_je32(time); jffs2_do_link()
698 rd->nsize = namelen; jffs2_do_link()
700 rd->type = type; jffs2_do_link()
702 rd->node_crc = cpu_to_je32(crc32(0, rd, sizeof(*rd)-8)); jffs2_do_link()
703 rd->name_crc = cpu_to_je32(crc32(0, name, namelen)); jffs2_do_link()
705 fd = jffs2_write_dirent(c, dir_f, rd, name, namelen, ALLOC_NORMAL); jffs2_do_link()
707 jffs2_free_raw_dirent(rd); jffs2_do_link()
205 jffs2_write_dirent(struct jffs2_sb_info *c, struct jffs2_inode_info *f, struct jffs2_raw_dirent *rd, const unsigned char *name, uint32_t namelen, int alloc_mode) jffs2_write_dirent() argument
H A Ddir.c284 struct jffs2_raw_dirent *rd; jffs2_symlink() local
377 ret = jffs2_reserve_space(c, sizeof(*rd)+namelen, &alloclen, jffs2_symlink()
382 rd = jffs2_alloc_raw_dirent(); jffs2_symlink()
383 if (!rd) { jffs2_symlink()
393 rd->magic = cpu_to_je16(JFFS2_MAGIC_BITMASK); jffs2_symlink()
394 rd->nodetype = cpu_to_je16(JFFS2_NODETYPE_DIRENT); jffs2_symlink()
395 rd->totlen = cpu_to_je32(sizeof(*rd) + namelen); jffs2_symlink()
396 rd->hdr_crc = cpu_to_je32(crc32(0, rd, sizeof(struct jffs2_unknown_node)-4)); jffs2_symlink()
398 rd->pino = cpu_to_je32(dir_i->i_ino); jffs2_symlink()
399 rd->version = cpu_to_je32(++dir_f->highest_version); jffs2_symlink()
400 rd->ino = cpu_to_je32(inode->i_ino); jffs2_symlink()
401 rd->mctime = cpu_to_je32(get_seconds()); jffs2_symlink()
402 rd->nsize = namelen; jffs2_symlink()
403 rd->type = DT_LNK; jffs2_symlink()
404 rd->node_crc = cpu_to_je32(crc32(0, rd, sizeof(*rd)-8)); jffs2_symlink()
405 rd->name_crc = cpu_to_je32(crc32(0, dentry->d_name.name, namelen)); jffs2_symlink()
407 fd = jffs2_write_dirent(c, dir_f, rd, dentry->d_name.name, namelen, ALLOC_NORMAL); jffs2_symlink()
413 jffs2_free_raw_dirent(rd); jffs2_symlink()
419 dir_i->i_mtime = dir_i->i_ctime = ITIME(je32_to_cpu(rd->mctime)); jffs2_symlink()
421 jffs2_free_raw_dirent(rd); jffs2_symlink()
446 struct jffs2_raw_dirent *rd; jffs2_mkdir() local
521 ret = jffs2_reserve_space(c, sizeof(*rd)+namelen, &alloclen, jffs2_mkdir()
526 rd = jffs2_alloc_raw_dirent(); jffs2_mkdir()
527 if (!rd) { jffs2_mkdir()
537 rd->magic = cpu_to_je16(JFFS2_MAGIC_BITMASK); jffs2_mkdir()
538 rd->nodetype = cpu_to_je16(JFFS2_NODETYPE_DIRENT); jffs2_mkdir()
539 rd->totlen = cpu_to_je32(sizeof(*rd) + namelen); jffs2_mkdir()
540 rd->hdr_crc = cpu_to_je32(crc32(0, rd, sizeof(struct jffs2_unknown_node)-4)); jffs2_mkdir()
542 rd->pino = cpu_to_je32(dir_i->i_ino); jffs2_mkdir()
543 rd->version = cpu_to_je32(++dir_f->highest_version); jffs2_mkdir()
544 rd->ino = cpu_to_je32(inode->i_ino); jffs2_mkdir()
545 rd->mctime = cpu_to_je32(get_seconds()); jffs2_mkdir()
546 rd->nsize = namelen; jffs2_mkdir()
547 rd->type = DT_DIR; jffs2_mkdir()
548 rd->node_crc = cpu_to_je32(crc32(0, rd, sizeof(*rd)-8)); jffs2_mkdir()
549 rd->name_crc = cpu_to_je32(crc32(0, dentry->d_name.name, namelen)); jffs2_mkdir()
551 fd = jffs2_write_dirent(c, dir_f, rd, dentry->d_name.name, namelen, ALLOC_NORMAL); jffs2_mkdir()
557 jffs2_free_raw_dirent(rd); jffs2_mkdir()
563 dir_i->i_mtime = dir_i->i_ctime = ITIME(je32_to_cpu(rd->mctime)); jffs2_mkdir()
566 jffs2_free_raw_dirent(rd); jffs2_mkdir()
614 struct jffs2_raw_dirent *rd; jffs2_mknod() local
694 ret = jffs2_reserve_space(c, sizeof(*rd)+namelen, &alloclen, jffs2_mknod()
699 rd = jffs2_alloc_raw_dirent(); jffs2_mknod()
700 if (!rd) { jffs2_mknod()
710 rd->magic = cpu_to_je16(JFFS2_MAGIC_BITMASK); jffs2_mknod()
711 rd->nodetype = cpu_to_je16(JFFS2_NODETYPE_DIRENT); jffs2_mknod()
712 rd->totlen = cpu_to_je32(sizeof(*rd) + namelen); jffs2_mknod()
713 rd->hdr_crc = cpu_to_je32(crc32(0, rd, sizeof(struct jffs2_unknown_node)-4)); jffs2_mknod()
715 rd->pino = cpu_to_je32(dir_i->i_ino); jffs2_mknod()
716 rd->version = cpu_to_je32(++dir_f->highest_version); jffs2_mknod()
717 rd->ino = cpu_to_je32(inode->i_ino); jffs2_mknod()
718 rd->mctime = cpu_to_je32(get_seconds()); jffs2_mknod()
719 rd->nsize = namelen; jffs2_mknod()
722 rd->type = (mode & S_IFMT) >> 12; jffs2_mknod()
724 rd->node_crc = cpu_to_je32(crc32(0, rd, sizeof(*rd)-8)); jffs2_mknod()
725 rd->name_crc = cpu_to_je32(crc32(0, dentry->d_name.name, namelen)); jffs2_mknod()
727 fd = jffs2_write_dirent(c, dir_f, rd, dentry->d_name.name, namelen, ALLOC_NORMAL); jffs2_mknod()
733 jffs2_free_raw_dirent(rd); jffs2_mknod()
739 dir_i->i_mtime = dir_i->i_ctime = ITIME(je32_to_cpu(rd->mctime)); jffs2_mknod()
741 jffs2_free_raw_dirent(rd); jffs2_mknod()
H A Dreadinode.c587 struct jffs2_raw_dirent *rd, size_t read, read_direntry()
596 crc = crc32(0, rd, sizeof(*rd) - 8); read_direntry()
597 if (unlikely(crc != je32_to_cpu(rd->node_crc))) { read_direntry()
599 ref_offset(ref), je32_to_cpu(rd->node_crc), crc); read_direntry()
610 if (unlikely(PAD((rd->nsize + sizeof(*rd))) != PAD(je32_to_cpu(rd->totlen)))) { read_direntry()
612 ref_offset(ref), rd->nsize, je32_to_cpu(rd->totlen)); read_direntry()
625 ref->flash_offset = ref_offset(ref) | dirent_node_state(rd); read_direntry()
629 fd = jffs2_alloc_full_dirent(rd->nsize + 1); read_direntry()
634 fd->version = je32_to_cpu(rd->version); read_direntry()
635 fd->ino = je32_to_cpu(rd->ino); read_direntry()
636 fd->type = rd->type; read_direntry()
642 if(fd->version > rii->mctime_ver && je32_to_cpu(rd->mctime)) { read_direntry()
644 rii->latest_mctime = je32_to_cpu(rd->mctime); read_direntry()
651 if (read > sizeof(*rd)) read_direntry()
652 memcpy(&fd->name[0], &rd->name[0], read_direntry()
653 min_t(uint32_t, rd->nsize, (read - sizeof(*rd)) )); read_direntry()
656 if (rd->nsize + sizeof(*rd) > read) { read_direntry()
659 int already = read - sizeof(*rd); read_direntry()
662 rd->nsize - already, &read, &fd->name[already]); read_direntry()
663 if (unlikely(read != rd->nsize - already) && likely(!err)) read_direntry()
673 fd->nhash = full_name_hash(fd->name, rd->nsize); read_direntry()
675 fd->name[rd->nsize] = '\0'; read_direntry()
694 struct jffs2_raw_inode *rd, int rdlen, read_dnode()
705 crc = crc32(0, rd, sizeof(*rd) - 8); read_dnode()
706 if (unlikely(crc != je32_to_cpu(rd->node_crc))) { read_dnode()
708 ref_offset(ref), je32_to_cpu(rd->node_crc), crc); read_dnode()
720 csize = je32_to_cpu(rd->csize); read_dnode()
726 if (unlikely(je32_to_cpu(rd->offset) > je32_to_cpu(rd->isize)) || read_dnode()
727 unlikely(PAD(je32_to_cpu(rd->csize) + sizeof(*rd)) != PAD(je32_to_cpu(rd->totlen)))) { read_dnode()
773 buf = (unsigned char *)rd + sizeof(*rd); read_dnode()
775 len = min_t(uint32_t, rdlen - sizeof(*rd), csize); read_dnode()
782 if (len >= csize && unlikely(tn->partial_crc != je32_to_cpu(rd->data_crc))) { read_dnode()
784 ref_offset(ref), tn->partial_crc, je32_to_cpu(rd->data_crc)); read_dnode()
819 tn->version = je32_to_cpu(rd->version); read_dnode()
820 tn->fn->ofs = je32_to_cpu(rd->offset); read_dnode()
821 tn->data_crc = je32_to_cpu(rd->data_crc); read_dnode()
831 if (rd->compr == JFFS2_COMPR_ZERO && !je32_to_cpu(rd->dsize) && csize) read_dnode()
834 tn->fn->size = je32_to_cpu(rd->dsize); read_dnode()
837 ref_offset(ref), je32_to_cpu(rd->version), read_dnode()
838 je32_to_cpu(rd->offset), je32_to_cpu(rd->dsize), csize); read_dnode()
849 dbg_readinode2("After adding ver %d:\n", je32_to_cpu(rd->version)); read_dnode()
586 read_direntry(struct jffs2_sb_info *c, struct jffs2_raw_node_ref *ref, struct jffs2_raw_dirent *rd, size_t read, struct jffs2_readinode_info *rii) read_direntry() argument
693 read_dnode(struct jffs2_sb_info *c, struct jffs2_raw_node_ref *ref, struct jffs2_raw_inode *rd, int rdlen, struct jffs2_readinode_info *rii) read_dnode() argument
H A Dgc.c834 struct jffs2_raw_dirent rd; jffs2_garbage_collect_dirent() local
838 rd.magic = cpu_to_je16(JFFS2_MAGIC_BITMASK); jffs2_garbage_collect_dirent()
839 rd.nodetype = cpu_to_je16(JFFS2_NODETYPE_DIRENT); jffs2_garbage_collect_dirent()
840 rd.nsize = strlen(fd->name); jffs2_garbage_collect_dirent()
841 rd.totlen = cpu_to_je32(sizeof(rd) + rd.nsize); jffs2_garbage_collect_dirent()
842 rd.hdr_crc = cpu_to_je32(crc32(0, &rd, sizeof(struct jffs2_unknown_node)-4)); jffs2_garbage_collect_dirent()
844 rd.pino = cpu_to_je32(f->inocache->ino); jffs2_garbage_collect_dirent()
845 rd.version = cpu_to_je32(++f->highest_version); jffs2_garbage_collect_dirent()
846 rd.ino = cpu_to_je32(fd->ino); jffs2_garbage_collect_dirent()
850 rd.mctime = cpu_to_je32(JFFS2_F_I_MTIME(f)); jffs2_garbage_collect_dirent()
852 rd.mctime = cpu_to_je32(0); jffs2_garbage_collect_dirent()
853 rd.type = fd->type; jffs2_garbage_collect_dirent()
854 rd.node_crc = cpu_to_je32(crc32(0, &rd, sizeof(rd)-8)); jffs2_garbage_collect_dirent()
855 rd.name_crc = cpu_to_je32(crc32(0, fd->name, rd.nsize)); jffs2_garbage_collect_dirent()
857 ret = jffs2_reserve_space_gc(c, sizeof(rd)+rd.nsize, &alloclen, jffs2_garbage_collect_dirent()
858 JFFS2_SUMMARY_DIRENT_SIZE(rd.nsize)); jffs2_garbage_collect_dirent()
861 sizeof(rd)+rd.nsize, ret); jffs2_garbage_collect_dirent()
864 new_fd = jffs2_write_dirent(c, f, &rd, fd->name, rd.nsize, ALLOC_GC); jffs2_garbage_collect_dirent()
887 struct jffs2_raw_dirent *rd; jffs2_garbage_collect_deletion_dirent() local
895 rd = kmalloc(rawlen, GFP_KERNEL); jffs2_garbage_collect_deletion_dirent()
896 if (!rd) jffs2_garbage_collect_deletion_dirent()
926 ret = jffs2_flash_read(c, ref_offset(raw), rawlen, &retlen, (char *)rd); jffs2_garbage_collect_deletion_dirent()
940 if (je16_to_cpu(rd->nodetype) != JFFS2_NODETYPE_DIRENT) jffs2_garbage_collect_deletion_dirent()
944 if (je32_to_cpu(rd->name_crc) != name_crc) jffs2_garbage_collect_deletion_dirent()
948 if (rd->nsize != name_len || !je32_to_cpu(rd->ino)) jffs2_garbage_collect_deletion_dirent()
952 if (memcmp(rd->name, fd->name, name_len)) jffs2_garbage_collect_deletion_dirent()
962 ref_offset(raw), je32_to_cpu(rd->ino)); jffs2_garbage_collect_deletion_dirent()
963 kfree(rd); jffs2_garbage_collect_deletion_dirent()
969 kfree(rd); jffs2_garbage_collect_deletion_dirent()
H A Dscan.c49 struct jffs2_raw_dirent *rd, uint32_t ofs, struct jffs2_summary *s);
1040 struct jffs2_raw_dirent *rd, uint32_t ofs, struct jffs2_summary *s) jffs2_scan_dirent_node()
1052 crc = crc32(0, rd, sizeof(*rd)-8); jffs2_scan_dirent_node()
1054 if (crc != je32_to_cpu(rd->node_crc)) { jffs2_scan_dirent_node()
1056 __func__, ofs, je32_to_cpu(rd->node_crc), crc); jffs2_scan_dirent_node()
1058 if ((err = jffs2_scan_dirty_space(c, jeb, PAD(je32_to_cpu(rd->totlen))))) jffs2_scan_dirent_node()
1063 pseudo_random += je32_to_cpu(rd->version); jffs2_scan_dirent_node()
1066 checkedlen = strnlen(rd->name, rd->nsize); jffs2_scan_dirent_node()
1067 if (checkedlen < rd->nsize) { jffs2_scan_dirent_node()
1075 memcpy(&fd->name, rd->name, checkedlen); jffs2_scan_dirent_node()
1078 crc = crc32(0, fd->name, rd->nsize); jffs2_scan_dirent_node()
1079 if (crc != je32_to_cpu(rd->name_crc)) { jffs2_scan_dirent_node()
1081 __func__, ofs, je32_to_cpu(rd->name_crc), crc); jffs2_scan_dirent_node()
1083 fd->name, je32_to_cpu(rd->ino)); jffs2_scan_dirent_node()
1087 if ((err = jffs2_scan_dirty_space(c, jeb, PAD(je32_to_cpu(rd->totlen))))) jffs2_scan_dirent_node()
1091 ic = jffs2_scan_make_ino_cache(c, je32_to_cpu(rd->pino)); jffs2_scan_dirent_node()
1097 fd->raw = jffs2_link_node_ref(c, jeb, ofs | dirent_node_state(rd), jffs2_scan_dirent_node()
1098 PAD(je32_to_cpu(rd->totlen)), ic); jffs2_scan_dirent_node()
1101 fd->version = je32_to_cpu(rd->version); jffs2_scan_dirent_node()
1102 fd->ino = je32_to_cpu(rd->ino); jffs2_scan_dirent_node()
1104 fd->type = rd->type; jffs2_scan_dirent_node()
1108 jffs2_sum_add_dirent_mem(s, rd, ofs - jeb->offset); jffs2_scan_dirent_node()
1039 jffs2_scan_dirent_node(struct jffs2_sb_info *c, struct jffs2_eraseblock *jeb, struct jffs2_raw_dirent *rd, uint32_t ofs, struct jffs2_summary *s) jffs2_scan_dirent_node() argument
H A Dsummary.c133 int jffs2_sum_add_dirent_mem(struct jffs2_summary *s, struct jffs2_raw_dirent *rd, jffs2_sum_add_dirent_mem() argument
137 kmalloc(sizeof(struct jffs2_sum_dirent_mem) + rd->nsize, GFP_KERNEL); jffs2_sum_add_dirent_mem()
142 temp->nodetype = rd->nodetype; jffs2_sum_add_dirent_mem()
143 temp->totlen = rd->totlen; jffs2_sum_add_dirent_mem()
145 temp->pino = rd->pino; jffs2_sum_add_dirent_mem()
146 temp->version = rd->version; jffs2_sum_add_dirent_mem()
147 temp->ino = rd->ino; jffs2_sum_add_dirent_mem()
148 temp->nsize = rd->nsize; jffs2_sum_add_dirent_mem()
149 temp->type = rd->type; jffs2_sum_add_dirent_mem()
152 memcpy(temp->name, rd->name, rd->nsize); jffs2_sum_add_dirent_mem()
/linux-4.1.27/arch/unicore32/mm/
H A Dproc-macros.S41 .macro vma_vm_mm, rd, rn
42 ldw \rd, [\rn+], #VMA_VM_MM
48 .macro vma_vm_flags, rd, rn
49 ldw \rd, [\rn+], #VMA_VM_FLAGS
52 .macro tsk_mm, rd, rn
53 ldw \rd, [\rn+], #TI_TASK
54 ldw \rd, [\rd+], #TSK_ACTIVE_MM
60 .macro act_mm, rd
61 andn \rd, sp, #8128
62 andn \rd, \rd, #63
63 ldw \rd, [\rd+], #TI_TASK
64 ldw \rd, [\rd+], #TSK_ACTIVE_MM
70 .macro mmid, rd, rn
71 ldw \rd, [\rn+], #MM_CONTEXT_ID
77 .macro asid, rd, rn
78 and \rd, \rn, #255
H A Dalignment.c217 unsigned int rd = RD_BITS(instr); do_alignment_ldrhstrh() local
231 regs->uregs[rd] = val; do_alignment_ldrhstrh()
233 put16_unaligned_check(regs->uregs[rd], addr); do_alignment_ldrhstrh()
252 unsigned int rd = RD_BITS(instr); do_alignment_ldrstr() local
258 get32_unaligned_check(regs->uregs[rd], addr); do_alignment_ldrstr()
260 put32_unaligned_check(regs->uregs[rd], addr); do_alignment_ldrstr()
265 get32t_unaligned_check(regs->uregs[rd], addr); do_alignment_ldrstr()
267 put32t_unaligned_check(regs->uregs[rd], addr); do_alignment_ldrstr()
291 unsigned int rd, rn, pc_correction, reg_correction, nr_regs, regbits; do_alignment_ldmstm() local
330 for (regbits = REGMASK_BITS(instr), rd = 0; regbits; do_alignment_ldmstm()
331 regbits >>= 1, rd += 1) do_alignment_ldmstm()
335 uregs[rd + reg_correction], eaddr); do_alignment_ldmstm()
338 uregs[rd + reg_correction], eaddr); do_alignment_ldmstm()
/linux-4.1.27/arch/arm/mach-tegra/
H A Dsleep.h62 .macro cpu_to_halt_reg rd, rcpu
64 subne \rd, \rcpu, #1 variable
65 movne \rd, \rd, lsl #3 variable
66 addne \rd, \rd, #0x14 variable
67 moveq \rd, #0 variable
71 .macro cpu_to_csr_reg rd, rcpu
73 subne \rd, \rcpu, #1 variable
74 movne \rd, \rd, lsl #3 variable
75 addne \rd, \rd, #0x18 variable
76 moveq \rd, #8 variable
80 .macro cpu_id, rd
81 mrc p15, 0, \rd, c0, c0, 5 variable
82 and \rd, \rd, #0xF variable
H A Dsleep-tegra30.S83 .macro emc_device_mask, rd, base
84 ldr \rd, [\base, #EMC_ADR_CFG]
85 tst \rd, #0x1
86 moveq \rd, #(0x1 << 8) @ just 1 device
87 movne \rd, #(0x3 << 8) @ 2 devices
90 .macro emc_timing_update, rd, base
91 mov \rd, #1
92 str \rd, [\base, #EMC_TIMING_CONTROL]
94 ldr \rd, [\base, #EMC_EMC_STATUS]
95 tst \rd, #(0x1<<23) @ wait EMC_STATUS_TIMING_UPDATE_STALLED is clear
99 .macro pll_enable, rd, r_car_base, pll_base, pll_misc
100 ldr \rd, [\r_car_base, #\pll_base]
101 tst \rd, #(1 << 30)
102 orreq \rd, \rd, #(1 << 30)
103 streq \rd, [\r_car_base, #\pll_base]
106 ldr \rd, [\r_car_base, #\pll_misc]
107 bic \rd, \rd, #(1 << 18)
108 str \rd, [\r_car_base, #\pll_misc]
109 ldr \rd, [\r_car_base, #\pll_misc]
110 ldr \rd, [\r_car_base, #\pll_misc]
111 orr \rd, \rd, #(1 << 18)
112 str \rd, [\r_car_base, #\pll_misc]
116 .macro pll_locked, rd, r_car_base, pll_base
118 ldr \rd, [\r_car_base, #\pll_base]
119 tst \rd, #(1 << 27)
123 .macro pll_iddq_exit, rd, car, iddq, iddq_bit
124 ldr \rd, [\car, #\iddq]
125 bic \rd, \rd, #(1<<\iddq_bit)
126 str \rd, [\car, #\iddq]
129 .macro pll_iddq_entry, rd, car, iddq, iddq_bit
130 ldr \rd, [\car, #\iddq]
131 orr \rd, \rd, #(1<<\iddq_bit)
132 str \rd, [\car, #\iddq]
H A Dsleep-tegra20.S56 .macro pll_enable, rd, r_car_base, pll_base
57 ldr \rd, [\r_car_base, #\pll_base]
58 tst \rd, #(1 << 30)
59 orreq \rd, \rd, #(1 << 30)
60 streq \rd, [\r_car_base, #\pll_base]
63 .macro emc_device_mask, rd, base
64 ldr \rd, [\base, #EMC_ADR_CFG]
65 tst \rd, #(0x3 << 24)
66 moveq \rd, #(0x1 << 8) @ just 1 device
67 movne \rd, #(0x3 << 8) @ 2 devices
/linux-4.1.27/arch/arm/lib/
H A Dio-writesw-armv4.S13 .macro outword, rd
15 strh \rd, [r0]
16 mov \rd, \rd, lsr #16
17 strh \rd, [r0]
19 mov lr, \rd, lsr #16
21 strh \rd, [r0]
H A Dio-readsw-armv4.S13 .macro pack, rd, hw1, hw2
15 orr \rd, \hw1, \hw2, lsl #16
17 orr \rd, \hw2, \hw1, lsl #16
/linux-4.1.27/drivers/media/tuners/
H A Dqt1010.c35 dev_warn(&priv->i2c->dev, "%s: i2c rd failed reg=%02x\n", qt1010_readreg()
64 qt1010_i2c_oper_t rd[48] = { qt1010_set_params() local
136 rd[2].val = reg05; qt1010_set_params()
139 rd[4].val = (freq + QT1010_OFFSET) / FREQ1; qt1010_set_params()
142 if (mod1 < 8000000) rd[6].val = 0x1d; qt1010_set_params()
143 else rd[6].val = 0x1c; qt1010_set_params()
146 if (mod1 < 1*FREQ2) rd[7].val = 0x09; /* +0 MHz */ qt1010_set_params()
147 else if (mod1 < 2*FREQ2) rd[7].val = 0x08; /* +4 MHz */ qt1010_set_params()
148 else if (mod1 < 3*FREQ2) rd[7].val = 0x0f; /* +8 MHz */ qt1010_set_params()
149 else if (mod1 < 4*FREQ2) rd[7].val = 0x0e; /* +12 MHz */ qt1010_set_params()
150 else if (mod1 < 5*FREQ2) rd[7].val = 0x0d; /* +16 MHz */ qt1010_set_params()
151 else if (mod1 < 6*FREQ2) rd[7].val = 0x0c; /* +20 MHz */ qt1010_set_params()
152 else if (mod1 < 7*FREQ2) rd[7].val = 0x0b; /* +24 MHz */ qt1010_set_params()
153 else rd[7].val = 0x0a; /* +28 MHz */ qt1010_set_params()
156 if (mod2 < 2000000) rd[8].val = 0x45; qt1010_set_params()
157 else rd[8].val = 0x44; qt1010_set_params()
161 rd[10].val = tmpval-((mod2/QT1010_STEP)*0x08); qt1010_set_params()
164 rd[13].val = 0xfd; /* TODO: correct value calculation */ qt1010_set_params()
167 rd[14].val = 0x91; /* TODO: correct value calculation */ qt1010_set_params()
170 if (freq < 450000000) rd[15].val = 0xd0; /* 450 MHz */ qt1010_set_params()
171 else if (freq < 482000000) rd[15].val = 0xd1; /* 482 MHz */ qt1010_set_params()
172 else if (freq < 514000000) rd[15].val = 0xd4; /* 514 MHz */ qt1010_set_params()
173 else if (freq < 546000000) rd[15].val = 0xd7; /* 546 MHz */ qt1010_set_params()
174 else if (freq < 610000000) rd[15].val = 0xda; /* 610 MHz */ qt1010_set_params()
175 else rd[15].val = 0xd0; qt1010_set_params()
178 rd[35].val = (reg05 & 0xf0); qt1010_set_params()
187 rd[40].val = (priv->reg1f_init_val + 0x0e + tmpval); qt1010_set_params()
196 rd[41].val = (priv->reg20_init_val + 0x0d + tmpval); qt1010_set_params()
199 rd[43].val = priv->reg25_init_val; qt1010_set_params()
202 rd[45].val = 0x92; /* TODO: correct value calculation */ qt1010_set_params()
208 freq, rd[2].val, rd[4].val, rd[6].val, rd[7].val, \ qt1010_set_params()
209 rd[8].val, rd[10].val, rd[13].val, rd[14].val, \ qt1010_set_params()
210 rd[15].val, rd[35].val, rd[40].val, rd[41].val, \ qt1010_set_params()
211 rd[43].val, rd[45].val); qt1010_set_params()
213 for (i = 0; i < ARRAY_SIZE(rd); i++) { qt1010_set_params()
214 if (rd[i].oper == QT1010_WR) { qt1010_set_params()
215 err = qt1010_writereg(priv, rd[i].reg, rd[i].val); qt1010_set_params()
217 err = qt1010_readreg(priv, rd[i].reg, &tmpval); qt1010_set_params()
/linux-4.1.27/include/linux/
H A Draid_class.h59 struct raid_data *rd; \
61 rd = dev_get_drvdata(device); \
62 rd->attr = value; \
68 struct raid_data *rd; \
70 rd = dev_get_drvdata(device); \
71 return rd->attr; \
H A Dhdlcdrv.h27 unsigned rd, wr; member in struct:hdlcdrv_hdlcbuffer
33 unsigned int rd; member in struct:hdlcdrv_bitbuffer
163 ret = !((HDLCDRV_HDLCBUFFER - 1 + hb->rd - hb->wr) % HDLCDRV_HDLCBUFFER); hdlcdrv_hbuf_full()
176 ret = (hb->rd == hb->wr); hdlcdrv_hbuf_empty()
190 if (hb->rd == hb->wr) hdlcdrv_hbuf_get()
193 newr = (hb->rd+1) % HDLCDRV_HDLCBUFFER; hdlcdrv_hbuf_get()
194 val = hb->buf[hb->rd]; hdlcdrv_hbuf_get()
195 hb->rd = newr; hdlcdrv_hbuf_get()
211 if (newp != hb->rd) { hdlcdrv_hbuf_put()
/linux-4.1.27/arch/powerpc/lib/
H A Dsstep.c533 static void __kprobes set_cr0(struct pt_regs *regs, int rd) set_cr0() argument
535 long val = regs->gpr[rd]; set_cr0()
550 static void __kprobes add_with_carry(struct pt_regs *regs, int rd, add_with_carry() argument
558 regs->gpr[rd] = val; add_with_carry()
645 unsigned int opcode, ra, rb, rd, spr, u; analyse_instr() local
690 rd = (instr >> 21) & 0x1c; analyse_instr()
693 regs->ccr = (regs->ccr & ~(0xfUL << rd)) | (val << rd); analyse_instr()
729 rd = (instr >> 21) & 0x1f; analyse_instr()
733 regs->ccr = (regs->ccr & ~(1UL << (31 - rd))) | analyse_instr()
734 (val << (31 - rd)); analyse_instr()
767 rd = (instr >> 21) & 0x1f; analyse_instr()
774 if (rd & trap_compare(regs->gpr[ra], (short) instr)) analyse_instr()
779 if (rd & trap_compare((int)regs->gpr[ra], (short) instr)) analyse_instr()
784 regs->gpr[rd] = regs->gpr[ra] * (short) instr; analyse_instr()
789 add_with_carry(regs, rd, ~regs->gpr[ra], imm, 1); analyse_instr()
796 if ((rd & 1) == 0) analyse_instr()
799 do_cmp_unsigned(regs, val, imm, rd >> 2); analyse_instr()
806 if ((rd & 1) == 0) analyse_instr()
809 do_cmp_signed(regs, val, imm, rd >> 2); analyse_instr()
814 add_with_carry(regs, rd, regs->gpr[ra], imm, 0); analyse_instr()
819 add_with_carry(regs, rd, regs->gpr[ra], imm, 0); analyse_instr()
820 set_cr0(regs, rd); analyse_instr()
827 regs->gpr[rd] = imm; analyse_instr()
834 regs->gpr[rd] = imm; analyse_instr()
840 val = DATA32(regs->gpr[rd]); analyse_instr()
848 val = DATA32(regs->gpr[rd]); analyse_instr()
856 val = DATA32(regs->gpr[rd]); analyse_instr()
862 regs->gpr[ra] = regs->gpr[rd] | imm; analyse_instr()
867 regs->gpr[ra] = regs->gpr[rd] | (imm << 16); analyse_instr()
872 regs->gpr[ra] = regs->gpr[rd] ^ imm; analyse_instr()
877 regs->gpr[ra] = regs->gpr[rd] ^ (imm << 16); analyse_instr()
882 regs->gpr[ra] = regs->gpr[rd] & imm; analyse_instr()
888 regs->gpr[ra] = regs->gpr[rd] & (imm << 16); analyse_instr()
895 val = regs->gpr[rd]; analyse_instr()
932 if (rd == 0x1f || analyse_instr()
933 (rd & trap_compare((int)regs->gpr[ra], analyse_instr()
939 if (rd & trap_compare(regs->gpr[ra], regs->gpr[rb])) analyse_instr()
947 op->reg = rd; analyse_instr()
953 op->reg = rd; analyse_instr()
961 op->reg = rd; analyse_instr()
970 regs->gpr[rd] = regs->ccr; analyse_instr()
971 regs->gpr[rd] &= 0xffffffffUL; analyse_instr()
976 val = regs->gpr[rd]; analyse_instr()
989 regs->gpr[rd] = regs->xer; analyse_instr()
990 regs->gpr[rd] &= 0xffffffffUL; analyse_instr()
993 regs->gpr[rd] = regs->link; analyse_instr()
996 regs->gpr[rd] = regs->ctr; analyse_instr()
1000 op->reg = rd; analyse_instr()
1010 regs->xer = (regs->gpr[rd] & 0xffffffffUL); analyse_instr()
1013 regs->link = regs->gpr[rd]; analyse_instr()
1016 regs->ctr = regs->gpr[rd]; analyse_instr()
1020 op->val = regs->gpr[rd]; analyse_instr()
1033 if ((rd & 1) == 0) { analyse_instr()
1039 do_cmp_signed(regs, val, val2, rd >> 2); analyse_instr()
1046 if ((rd & 1) == 0) { analyse_instr()
1052 do_cmp_unsigned(regs, val, val2, rd >> 2); analyse_instr()
1059 add_with_carry(regs, rd, ~regs->gpr[ra], analyse_instr()
1064 asm("mulhdu %0,%1,%2" : "=r" (regs->gpr[rd]) : analyse_instr()
1069 add_with_carry(regs, rd, regs->gpr[ra], analyse_instr()
1074 asm("mulhwu %0,%1,%2" : "=r" (regs->gpr[rd]) : analyse_instr()
1079 regs->gpr[rd] = regs->gpr[rb] - regs->gpr[ra]; analyse_instr()
1083 asm("mulhd %0,%1,%2" : "=r" (regs->gpr[rd]) : analyse_instr()
1088 asm("mulhw %0,%1,%2" : "=r" (regs->gpr[rd]) : analyse_instr()
1093 regs->gpr[rd] = -regs->gpr[ra]; analyse_instr()
1097 add_with_carry(regs, rd, ~regs->gpr[ra], regs->gpr[rb], analyse_instr()
1102 add_with_carry(regs, rd, regs->gpr[ra], regs->gpr[rb], analyse_instr()
1107 add_with_carry(regs, rd, ~regs->gpr[ra], 0L, analyse_instr()
1112 add_with_carry(regs, rd, regs->gpr[ra], 0L, analyse_instr()
1117 add_with_carry(regs, rd, ~regs->gpr[ra], -1L, analyse_instr()
1122 regs->gpr[rd] = regs->gpr[ra] * regs->gpr[rb]; analyse_instr()
1126 add_with_carry(regs, rd, regs->gpr[ra], -1L, analyse_instr()
1131 regs->gpr[rd] = (unsigned int) regs->gpr[ra] * analyse_instr()
1136 regs->gpr[rd] = regs->gpr[ra] + regs->gpr[rb]; analyse_instr()
1140 regs->gpr[rd] = regs->gpr[ra] / regs->gpr[rb]; analyse_instr()
1144 regs->gpr[rd] = (unsigned int) regs->gpr[ra] / analyse_instr()
1149 regs->gpr[rd] = (long int) regs->gpr[ra] / analyse_instr()
1154 regs->gpr[rd] = (int) regs->gpr[ra] / analyse_instr()
1164 "r" (regs->gpr[rd])); analyse_instr()
1169 "r" (regs->gpr[rd])); analyse_instr()
1173 regs->gpr[ra] = regs->gpr[rd] & regs->gpr[rb]; analyse_instr()
1177 regs->gpr[ra] = regs->gpr[rd] & ~regs->gpr[rb]; analyse_instr()
1181 regs->gpr[ra] = ~(regs->gpr[rd] | regs->gpr[rb]); analyse_instr()
1185 regs->gpr[ra] = ~(regs->gpr[rd] ^ regs->gpr[rb]); analyse_instr()
1189 regs->gpr[ra] = regs->gpr[rd] ^ regs->gpr[rb]; analyse_instr()
1193 regs->gpr[ra] = regs->gpr[rd] | ~regs->gpr[rb]; analyse_instr()
1197 regs->gpr[ra] = regs->gpr[rd] | regs->gpr[rb]; analyse_instr()
1201 regs->gpr[ra] = ~(regs->gpr[rd] & regs->gpr[rb]); analyse_instr()
1205 regs->gpr[ra] = (signed short) regs->gpr[rd]; analyse_instr()
1209 regs->gpr[ra] = (signed char) regs->gpr[rd]; analyse_instr()
1213 regs->gpr[ra] = (signed int) regs->gpr[rd]; analyse_instr()
1223 regs->gpr[ra] = (regs->gpr[rd] << sh) & 0xffffffffUL; analyse_instr()
1231 regs->gpr[ra] = (regs->gpr[rd] & 0xffffffffUL) >> sh; analyse_instr()
1238 ival = (signed int) regs->gpr[rd]; analyse_instr()
1248 ival = (signed int) regs->gpr[rd]; analyse_instr()
1260 regs->gpr[ra] = regs->gpr[rd] << sh; analyse_instr()
1268 regs->gpr[ra] = regs->gpr[rd] >> sh; analyse_instr()
1275 ival = (signed long int) regs->gpr[rd]; analyse_instr()
1286 ival = (signed long int) regs->gpr[rd]; analyse_instr()
1311 op->reg = rd; analyse_instr()
1317 op->reg = rd; analyse_instr()
1333 op->reg = rd; analyse_instr()
1334 op->val = regs->gpr[rd]; analyse_instr()
1487 op->val = byterev_8(regs->gpr[rd]); analyse_instr()
1497 op->val = byterev_4(regs->gpr[rd]); analyse_instr()
1516 op->val = byterev_2(regs->gpr[rd]); analyse_instr()
1524 op->reg = rd | ((instr & 1) << 5); analyse_instr()
1532 op->reg = rd | ((instr & 1) << 5); analyse_instr()
1583 if (ra >= rd) analyse_instr()
1585 op->type = MKOP(LOAD_MULTI, 0, 4 * (32 - rd)); analyse_instr()
1590 op->type = MKOP(STORE_MULTI, 0, 4 * (32 - rd)); analyse_instr()
1667 set_cr0(regs, rd); analyse_instr()
1773 int i, rd, nb; emulate_step() local
1895 rd = op.reg; emulate_step()
1900 err = read_mem(&regs->gpr[rd], op.ea, nb, regs); emulate_step()
1904 regs->gpr[rd] <<= 32 - 8 * nb; emulate_step()
1906 ++rd; emulate_step()
1950 rd = op.reg; emulate_step()
1952 val = regs->gpr[rd]; emulate_step()
1962 ++rd; emulate_step()
/linux-4.1.27/drivers/net/irda/
H A Dvlsi_ir.c139 struct ring_descr *rd; vlsi_ring_debug() local
143 __func__, r, r->size, r->mask, r->len, r->dir, r->rd[0].hw); vlsi_ring_debug()
147 rd = &r->rd[i]; vlsi_ring_debug()
149 printk("skb=%p data=%p hw=%p\n", rd->skb, rd->buf, rd->hw); vlsi_ring_debug()
151 __func__, (unsigned) rd_get_status(rd), vlsi_ring_debug()
152 (unsigned) rd_get_count(rd), (unsigned) rd_get_addr(rd)); vlsi_ring_debug()
298 struct ring_descr *rd; vlsi_proc_ring() local
303 r->size, r->mask, r->len, r->dir, r->rd[0].hw); vlsi_proc_ring()
314 rd = &r->rd[h]; vlsi_proc_ring()
315 j = (unsigned) rd_get_count(rd); vlsi_proc_ring()
316 seq_printf(seq, "current: rd = %d / status = %02x / len = %u\n", vlsi_proc_ring()
317 h, (unsigned)rd_get_status(rd), j); vlsi_proc_ring()
320 min_t(unsigned, j, 20), rd->buf); vlsi_proc_ring()
324 rd = &r->rd[i]; vlsi_proc_ring()
326 seq_printf(seq, "skb=%p data=%p hw=%p\n", rd->skb, rd->buf, rd->hw); vlsi_proc_ring()
328 (unsigned) rd_get_status(rd), vlsi_proc_ring()
329 (unsigned) rd_get_count(rd), (unsigned) rd_get_addr(rd)); vlsi_proc_ring()
395 struct ring_descr *rd; vlsi_alloc_ring() local
410 r->rd = (struct ring_descr *)(r+1); vlsi_alloc_ring()
417 rd = r->rd + i; vlsi_alloc_ring()
418 memset(rd, 0, sizeof(*rd)); vlsi_alloc_ring()
419 rd->hw = hwmap + i; vlsi_alloc_ring()
420 rd->buf = kmalloc(len, GFP_KERNEL|GFP_DMA); vlsi_alloc_ring()
421 if (rd->buf == NULL || vlsi_alloc_ring()
422 !(busaddr = pci_map_single(pdev, rd->buf, len, dir))) { vlsi_alloc_ring()
423 if (rd->buf) { vlsi_alloc_ring()
425 __func__, rd->buf); vlsi_alloc_ring()
426 kfree(rd->buf); vlsi_alloc_ring()
427 rd->buf = NULL; vlsi_alloc_ring()
430 rd = r->rd + j; vlsi_alloc_ring()
431 busaddr = rd_get_addr(rd); vlsi_alloc_ring()
432 rd_set_addr_status(rd, 0, 0); vlsi_alloc_ring()
435 kfree(rd->buf); vlsi_alloc_ring()
436 rd->buf = NULL; vlsi_alloc_ring()
441 rd_set_addr_status(rd, busaddr, 0); vlsi_alloc_ring()
443 rd->skb = NULL; vlsi_alloc_ring()
450 struct ring_descr *rd; vlsi_free_ring() local
455 rd = r->rd + i; vlsi_free_ring()
456 if (rd->skb) vlsi_free_ring()
457 dev_kfree_skb_any(rd->skb); vlsi_free_ring()
458 busaddr = rd_get_addr(rd); vlsi_free_ring()
459 rd_set_addr_status(rd, 0, 0); vlsi_free_ring()
462 kfree(rd->buf); vlsi_free_ring()
523 static int vlsi_process_rx(struct vlsi_ring *r, struct ring_descr *rd) vlsi_process_rx() argument
532 pci_dma_sync_single_for_cpu(r->pdev, rd_get_addr(rd), r->len, r->dir); vlsi_process_rx()
534 status = rd_get_status(rd); vlsi_process_rx()
547 len = rd_get_count(rd); vlsi_process_rx()
558 /* rd->buf is a streaming PCI_DMA_FROMDEVICE map. Doing the vlsi_process_rx()
564 le16_to_cpus(rd->buf+len); vlsi_process_rx()
565 if (irda_calc_crc16(INIT_FCS,rd->buf,len+crclen) != GOOD_FCS) { vlsi_process_rx()
572 if (!rd->skb) { vlsi_process_rx()
578 skb = rd->skb; vlsi_process_rx()
579 rd->skb = NULL; vlsi_process_rx()
581 memcpy(skb_put(skb,len), rd->buf, len); vlsi_process_rx()
589 rd_set_status(rd, 0); vlsi_process_rx()
590 rd_set_count(rd, 0); vlsi_process_rx()
598 struct ring_descr *rd; vlsi_fill_rx() local
600 for (rd = ring_last(r); rd != NULL; rd = ring_put(r)) { vlsi_fill_rx()
601 if (rd_is_active(rd)) { vlsi_fill_rx()
607 if (!rd->skb) { vlsi_fill_rx()
608 rd->skb = dev_alloc_skb(IRLAP_SKB_ALLOCSIZE); vlsi_fill_rx()
609 if (rd->skb) { vlsi_fill_rx()
610 skb_reserve(rd->skb,1); vlsi_fill_rx()
611 rd->skb->protocol = htons(ETH_P_IRDA); vlsi_fill_rx()
617 pci_dma_sync_single_for_device(r->pdev, rd_get_addr(rd), r->len, r->dir); vlsi_fill_rx()
618 rd_activate(rd); vlsi_fill_rx()
626 struct ring_descr *rd; vlsi_rx_interrupt() local
629 for (rd = ring_first(r); rd != NULL; rd = ring_get(r)) { vlsi_rx_interrupt()
631 if (rd_is_active(rd)) vlsi_rx_interrupt()
634 ret = vlsi_process_rx(r, rd); vlsi_rx_interrupt()
675 struct ring_descr *rd; vlsi_unarm_rx() local
678 for (rd = ring_first(r); rd != NULL; rd = ring_get(r)) { vlsi_unarm_rx()
681 if (rd_is_active(rd)) { vlsi_unarm_rx()
682 rd_set_status(rd, 0); vlsi_unarm_rx()
683 if (rd_get_count(rd)) { vlsi_unarm_rx()
687 rd_set_count(rd, 0); vlsi_unarm_rx()
688 pci_dma_sync_single_for_cpu(r->pdev, rd_get_addr(rd), r->len, r->dir); vlsi_unarm_rx()
689 if (rd->skb) { vlsi_unarm_rx()
690 dev_kfree_skb_any(rd->skb); vlsi_unarm_rx()
691 rd->skb = NULL; vlsi_unarm_rx()
695 ret = vlsi_process_rx(r, rd); vlsi_unarm_rx()
720 static int vlsi_process_tx(struct vlsi_ring *r, struct ring_descr *rd) vlsi_process_tx() argument
726 pci_dma_sync_single_for_cpu(r->pdev, rd_get_addr(rd), r->len, r->dir); vlsi_process_tx()
728 status = rd_get_status(rd); vlsi_process_tx()
733 rd_set_status(rd, 0); vlsi_process_tx()
735 if (rd->skb) { vlsi_process_tx()
736 len = rd->skb->len; vlsi_process_tx()
737 dev_kfree_skb_any(rd->skb); vlsi_process_tx()
738 rd->skb = NULL; vlsi_process_tx()
741 len = rd_get_count(rd); /* incorrect for SIR! (due to wrapping) */ vlsi_process_tx()
743 rd_set_count(rd, 0); vlsi_process_tx()
848 struct ring_descr *rd; vlsi_hard_start_xmit() local
909 rd = ring_last(r); vlsi_hard_start_xmit()
910 if (!rd) { vlsi_hard_start_xmit()
915 if (rd_is_active(rd)) { vlsi_hard_start_xmit()
920 if (!rd->buf) { vlsi_hard_start_xmit()
925 if (rd->skb) { vlsi_hard_start_xmit()
946 len = async_wrap_skb(skb, rd->buf, r->len); vlsi_hard_start_xmit()
971 skb_copy_from_linear_data(skb, rd->buf, len); vlsi_hard_start_xmit()
974 rd->skb = skb; /* remember skb for tx-complete stats */ vlsi_hard_start_xmit()
976 rd_set_count(rd, len); vlsi_hard_start_xmit()
977 rd_set_status(rd, status); /* not yet active! */ vlsi_hard_start_xmit()
983 pci_dma_sync_single_for_device(r->pdev, rd_get_addr(rd), r->len, r->dir); vlsi_hard_start_xmit()
998 rd_activate(rd); vlsi_hard_start_xmit()
1043 struct ring_descr *rd; vlsi_tx_interrupt() local
1048 for (rd = ring_first(r); rd != NULL; rd = ring_get(r)) { vlsi_tx_interrupt()
1050 if (rd_is_active(rd)) vlsi_tx_interrupt()
1053 ret = vlsi_process_tx(r, rd); vlsi_tx_interrupt()
1071 if (idev->new_baud && rd == NULL) /* tx ring empty and speed change pending */ vlsi_tx_interrupt()
1075 if (rd == NULL) /* tx ring empty: re-enable rx */ vlsi_tx_interrupt()
1103 struct ring_descr *rd; vlsi_unarm_tx() local
1106 for (rd = ring_first(r); rd != NULL; rd = ring_get(r)) { vlsi_unarm_tx()
1109 if (rd_is_active(rd)) { vlsi_unarm_tx()
1110 rd_set_status(rd, 0); vlsi_unarm_tx()
1111 rd_set_count(rd, 0); vlsi_unarm_tx()
1112 pci_dma_sync_single_for_cpu(r->pdev, rd_get_addr(rd), r->len, r->dir); vlsi_unarm_tx()
1113 if (rd->skb) { vlsi_unarm_tx()
1114 dev_kfree_skb_any(rd->skb); vlsi_unarm_tx()
1115 rd->skb = NULL; vlsi_unarm_tx()
1121 ret = vlsi_process_tx(r, rd); vlsi_unarm_tx()
H A Dvlsi_ir.h594 static inline int rd_is_active(struct ring_descr *rd) rd_is_active() argument
596 return (rd->hw->rd_status & RD_ACTIVE) != 0; rd_is_active()
599 static inline void rd_activate(struct ring_descr *rd) rd_activate() argument
601 rd->hw->rd_status |= RD_ACTIVE; rd_activate()
604 static inline void rd_set_status(struct ring_descr *rd, u8 s) rd_set_status() argument
606 rd->hw->rd_status = s; /* may pass ownership to the hardware */ rd_set_status()
609 static inline void rd_set_addr_status(struct ring_descr *rd, dma_addr_t a, u8 s) rd_set_addr_status() argument
627 rd->hw->rd_addr = cpu_to_le32(a); rd_set_addr_status()
629 rd_set_status(rd, s); /* may pass ownership to the hardware */ rd_set_addr_status()
632 static inline void rd_set_count(struct ring_descr *rd, u16 c) rd_set_count() argument
634 rd->hw->rd_count = cpu_to_le16(c); rd_set_count()
637 static inline u8 rd_get_status(struct ring_descr *rd) rd_get_status() argument
639 return rd->hw->rd_status; rd_get_status()
642 static inline dma_addr_t rd_get_addr(struct ring_descr *rd) rd_get_addr() argument
646 a = le32_to_cpu(rd->hw->rd_addr); rd_get_addr()
650 static inline u16 rd_get_count(struct ring_descr *rd) rd_get_count() argument
652 return le16_to_cpu(rd->hw->rd_count); rd_get_count()
664 * consumer advances r->head after removing processed rd
675 struct ring_descr *rd; member in struct:vlsi_ring
685 return (((t+1) & r->mask) == (atomic_read(&r->head) & r->mask)) ? NULL : &r->rd[t]; ring_last()
699 return (h == (atomic_read(&r->tail) & r->mask)) ? NULL : &r->rd[h]; ring_first()
/linux-4.1.27/drivers/watchdog/
H A Dwd501p.h29 #define WDT_BUZZER (io+6) /* PCI only: rd=disable, wr=enable */
34 #define WDT_CLOCK (io+12) /* COUNT2: rd=16.67MHz, wr=2.0833MHz */
36 #define WDT_OPTONOTRST (io+13) /* wr=enable, rd=disable */
38 #define WDT_OPTORST (io+14) /* wr=enable, rd=disable */
40 #define WDT_PROGOUT (io+15) /* wr=enable, rd=disable */
/linux-4.1.27/arch/arm/common/
H A Dicst.c54 unsigned int i = 0, rd, best = (unsigned int)-1; icst_hz_to_vco() local
77 for (rd = p->rd_min; rd <= p->rd_max; rd++) { icst_hz_to_vco()
82 fref_div = (2 * p->ref) / rd; icst_hz_to_vco()
95 vco.r = rd - 2; icst_hz_to_vco()
/linux-4.1.27/arch/arm/include/asm/
H A Dvfpmacros.h11 .macro VFPFMRX, rd, sysreg, cond variable
12 MRC\cond p10, 7, \rd, \sysreg, cr0, 0 @ FMRX \rd, \sysreg variable
15 .macro VFPFMXR, sysreg, rd, cond variable
16 MCR\cond p10, 7, \rd, \sysreg, cr0, 0 @ FMXR \sysreg, \rd variable
H A Dassembler.h183 .macro get_thread_info, rd
184 ARM( mov \rd, sp, lsr #THREAD_SIZE_ORDER + PAGE_SHIFT )
185 THUMB( mov \rd, sp )
186 THUMB( lsr \rd, \rd, #THREAD_SIZE_ORDER + PAGE_SHIFT )
187 mov \rd, \rd, lsl #THREAD_SIZE_ORDER + PAGE_SHIFT variable
/linux-4.1.27/arch/tile/kernel/
H A Dunaligned.c176 * unalign load/store shares same register with ra, rb and rd.
179 static void find_regs(tilegx_bundle_bits bundle, uint64_t *rd, uint64_t *ra, find_regs() argument
202 if (rd) { find_regs()
204 *rd = reg; find_regs()
205 alias_reg_map = (1ULL << *rd) | (1ULL << *ra); find_regs()
250 if (rd) { find_regs()
254 *rd = reg; find_regs()
255 alias_reg_map = (1ULL << *rd) | (1ULL << *ra); find_regs()
312 * Sanity check for register ra, rb, rd, clob1/2/3. Return true if any of them
316 static bool check_regs(uint64_t rd, uint64_t ra, uint64_t rb, check_regs() argument
326 if (rd != -1) { check_regs()
327 if ((rd >= 56) && (rd != TREG_ZERO)) check_regs()
377 static tilegx_bundle_bits jit_x0_addi(int rd, int ra, int imm8) jit_x0_addi() argument
381 create_Dest_X0(rd) | create_SrcA_X0(ra) | jit_x0_addi()
386 static tilegx_bundle_bits jit_x1_ldna(int rd, int ra) jit_x1_ldna() argument
390 create_Dest_X1(rd) | create_SrcA_X1(ra); jit_x1_ldna()
394 static tilegx_bundle_bits jit_x0_dblalign(int rd, int ra, int rb) jit_x0_dblalign() argument
398 create_Dest_X0(rd) | create_SrcA_X0(ra) | jit_x0_dblalign()
464 static tilegx_bundle_bits jit_x1_ld(int rd, int ra) jit_x1_ld() argument
468 create_Dest_X1(rd) | create_SrcA_X1(ra); jit_x1_ld()
472 static tilegx_bundle_bits jit_x1_ld_add(int rd, int ra, int imm8) jit_x1_ld_add() argument
477 GX_INSN_X1_MASK) | create_Dest_X1(rd) | jit_x1_ld_add()
482 static tilegx_bundle_bits jit_x0_bfexts(int rd, int ra, int bfs, int bfe) jit_x0_bfexts() argument
487 create_Dest_X0(rd) | create_SrcA_X0(ra) | jit_x0_bfexts()
492 static tilegx_bundle_bits jit_x0_bfextu(int rd, int ra, int bfs, int bfe) jit_x0_bfextu() argument
497 create_Dest_X0(rd) | create_SrcA_X0(ra) | jit_x0_bfextu()
502 static tilegx_bundle_bits jit_x1_addi(int rd, int ra, int imm8) jit_x1_addi() argument
506 create_Dest_X1(rd) | create_SrcA_X1(ra) | jit_x1_addi()
511 static tilegx_bundle_bits jit_x0_shrui(int rd, int ra, int imm6) jit_x0_shrui() argument
516 create_Dest_X0(rd) | create_SrcA_X0(ra) | jit_x0_shrui()
521 static tilegx_bundle_bits jit_x0_rotli(int rd, int ra, int imm6) jit_x0_rotli() argument
526 create_Dest_X0(rd) | create_SrcA_X0(ra) | jit_x0_rotli()
545 * registers: ra, rb and rd. and 3 scratch registers by calling
562 uint64_t ra = -1, rb = -1, rd = -1, clob1 = -1, clob2 = -1, clob3 = -1; jit_bundle_gen() local
678 find_regs(bundle, &rd, &ra, &rb, &clob1, &clob2, jit_bundle_gen()
696 find_regs(bundle, &rd, &ra, &rb, &clob1, jit_bundle_gen()
788 find_regs(bundle, load_n_store ? (&rd) : NULL, jit_bundle_gen()
797 if (check_regs(rd, ra, rb, clob1, clob2, clob3) == true) jit_bundle_gen()
809 * {ld/2u/4s rd, ra; movei rx, 0} or {st/2/4 ra, rb; movei rx, 0} jit_bundle_gen()
923 /* Set register rd. */ jit_bundle_gen()
924 regs->regs[rd] = x; jit_bundle_gen()
1018 if ((ra != rb) && (rd != TREG_SP) && !alias && jit_bundle_gen()
1062 if (rd == ra) { jit_bundle_gen()
1075 jit_x1_ldna(rd, ra); jit_bundle_gen()
1080 * Note: we must make sure that rd must not jit_bundle_gen()
1084 jit_x0_dblalign(rd, clob1, clob2) | jit_bundle_gen()
1099 jit_x1_ldna(rd, ra); jit_bundle_gen()
1104 * Note: we must make sure that rd must not jit_bundle_gen()
1108 jit_x0_dblalign(rd, clob1, ra) | jit_bundle_gen()
1122 rd, rd, jit_bundle_gen()
1129 rd, rd, jit_bundle_gen()
1137 rd, rd, jit_bundle_gen()
1144 rd, rd, jit_bundle_gen()
1305 jit_x1_ldna(rd, clob2); jit_bundle_gen()
1310 jit_x0_dblalign(rd, clob1, clob2) | jit_bundle_gen()
1330 rd, rd, jit_bundle_gen()
1337 rd, rd, jit_bundle_gen()
1345 rd, rd, jit_bundle_gen()
1352 rd, rd, jit_bundle_gen()
1377 (int)alias, (int)rd, (int)ra, jit_bundle_gen()
H A Dhead_64.S30 #define GET_FIRST_INT(rd, rs) shrsi rd, rs, 32
31 #define GET_SECOND_INT(rd, rs) addxi rd, rs, 0
33 #define GET_FIRST_INT(rd, rs) addxi rd, rs, 0
34 #define GET_SECOND_INT(rd, rs) shrsi rd, rs, 32
/linux-4.1.27/drivers/i2c/busses/
H A Di2c-pasemi.c120 u32 rd; pasemi_i2c_xfer_msg() local
135 rd = RXFIFO_RD(smbus); pasemi_i2c_xfer_msg()
136 if (rd & MRXFIFO_EMPTY) { pasemi_i2c_xfer_msg()
140 msg->buf[i] = rd & MRXFIFO_DATA_M; pasemi_i2c_xfer_msg()
179 unsigned int rd; pasemi_smb_xfer() local
228 rd = RXFIFO_RD(smbus); pasemi_smb_xfer()
229 len = min_t(u8, (rd & MRXFIFO_DATA_M), pasemi_smb_xfer()
260 rd = RXFIFO_RD(smbus); pasemi_smb_xfer()
261 len = min_t(u8, (rd & MRXFIFO_DATA_M), pasemi_smb_xfer()
281 rd = RXFIFO_RD(smbus); pasemi_smb_xfer()
282 if (rd & MRXFIFO_EMPTY) { pasemi_smb_xfer()
286 data->byte = rd & MRXFIFO_DATA_M; pasemi_smb_xfer()
290 rd = RXFIFO_RD(smbus); pasemi_smb_xfer()
291 if (rd & MRXFIFO_EMPTY) { pasemi_smb_xfer()
295 data->word = rd & MRXFIFO_DATA_M; pasemi_smb_xfer()
296 rd = RXFIFO_RD(smbus); pasemi_smb_xfer()
297 if (rd & MRXFIFO_EMPTY) { pasemi_smb_xfer()
301 data->word |= (rd & MRXFIFO_DATA_M) << 8; pasemi_smb_xfer()
307 rd = RXFIFO_RD(smbus); pasemi_smb_xfer()
308 if (rd & MRXFIFO_EMPTY) { pasemi_smb_xfer()
312 data->block[i] = rd & MRXFIFO_DATA_M; pasemi_smb_xfer()
/linux-4.1.27/drivers/media/usb/dvb-usb-v2/
H A Dce6230.h40 CONFIG_READ = 0xd0, /* rd 0 (unclear) */
42 I2C_READ = 0xd9, /* rd 9 (unclear) */
44 DEMOD_READ = 0xdb, /* rd b */
46 REG_READ = 0xde, /* rd e */
/linux-4.1.27/drivers/scsi/
H A Draid_class.c83 struct raid_data *rd; raid_setup() local
87 rd = kzalloc(sizeof(*rd), GFP_KERNEL); raid_setup()
88 if (!rd) raid_setup()
91 INIT_LIST_HEAD(&rd->component_list); raid_setup()
92 dev_set_drvdata(cdev, rd); raid_setup()
100 struct raid_data *rd = dev_get_drvdata(cdev); raid_remove() local
104 list_for_each_entry_safe(rc, next, &rd->component_list, node) { raid_remove()
110 kfree(rd); raid_remove()
181 struct raid_data *rd = dev_get_drvdata(dev); \
190 name = raid_##states##_name(rd->attr); \
196 raid_attr_show_internal(attr, %d, rd->attr, code) \
230 struct raid_data *rd = dev_get_drvdata(cdev); raid_component_add() local
241 rc->num = rd->component_count++; raid_component_add()
244 list_add_tail(&rc->node, &rd->component_list); raid_component_add()
254 rd->component_count--; raid_component_add()
/linux-4.1.27/arch/sparc/lib/
H A DGENcopy_from_user.S24 rd %asi, %g1; \
H A DNG4copy_from_user.S24 rd %asi, %g1; \
H A DGENcopy_to_user.S28 rd %asi, %g1; \
H A DNG2copy_from_user.S29 rd %asi, %g1; \
H A DNGcopy_from_user.S26 rd %asi, %g1; \
H A DNGcopy_to_user.S29 rd %asi, %g1; \
H A DU1copy_from_user.S24 rd %asi, %g1; \
H A DU1copy_to_user.S24 rd %asi, %g1; \
H A DU3copy_to_user.S24 rd %asi, %g1; \
H A DNG2copy_to_user.S38 rd %asi, %g1; \
H A DNG4copy_to_user.S33 rd %asi, %g1; \
H A DVISsave.S41 rd %gsr, %g3
50 rd %gsr, %g2
H A DGENbzero.S41 rd %asi, %o5
119 rd %asi, %o5
H A DNGbzero.S41 rd %asi, %o5
121 rd %asi, %o5
H A DNGpage.S20 rd %asi, %g3
66 rd %asi, %g3
H A Dmuldi3.S63 rd %y, %o1
/linux-4.1.27/arch/mips/kvm/
H A Ddyntrans.c75 int32_t rt, rd, sel; kvm_mips_trans_mfc0() local
80 rd = (inst >> 11) & 0x1f; kvm_mips_trans_mfc0()
83 if ((rd == MIPS_CP0_ERRCTL) && (sel == 0)) { kvm_mips_trans_mfc0()
91 reg[rd][sel]) + offsetof(struct kvm_mips_commpage, kvm_mips_trans_mfc0()
117 int32_t rt, rd, sel; kvm_mips_trans_mtc0() local
122 rd = (inst >> 11) & 0x1f; kvm_mips_trans_mtc0()
128 reg[rd][sel]) + offsetof(struct kvm_mips_commpage, cop0); kvm_mips_trans_mtc0()
H A Demulate.c65 arch->gprs[insn.r_format.rd] = epc + 8; kvm_compute_return_epc()
982 int32_t rt, rd, copz, sel, co_bit, op; kvm_mips_emulate_CP0() local
997 rd = (inst >> 11) & 0x1f; kvm_mips_emulate_CP0()
1032 cop0->stat[rd][sel]++; kvm_mips_emulate_CP0()
1035 if ((rd == MIPS_CP0_COUNT) && (sel == 0)) { kvm_mips_emulate_CP0()
1037 } else if ((rd == MIPS_CP0_ERRCTL) && (sel == 0)) { kvm_mips_emulate_CP0()
1043 vcpu->arch.gprs[rt] = cop0->reg[rd][sel]; kvm_mips_emulate_CP0()
1052 pc, rd, sel, rt, vcpu->arch.gprs[rt]); kvm_mips_emulate_CP0()
1057 vcpu->arch.gprs[rt] = cop0->reg[rd][sel]; kvm_mips_emulate_CP0()
1062 cop0->stat[rd][sel]++; kvm_mips_emulate_CP0()
1064 if ((rd == MIPS_CP0_TLB_INDEX) kvm_mips_emulate_CP0()
1073 if ((rd == MIPS_CP0_PRID) && (sel == 1)) { kvm_mips_emulate_CP0()
1080 } else if (rd == MIPS_CP0_TLB_HI && sel == 0) { kvm_mips_emulate_CP0()
1099 else if ((rd == MIPS_CP0_COUNT) && (sel == 0)) { kvm_mips_emulate_CP0()
1102 } else if ((rd == MIPS_CP0_COMPARE) && (sel == 0)) { kvm_mips_emulate_CP0()
1112 } else if ((rd == MIPS_CP0_STATUS) && (sel == 0)) { kvm_mips_emulate_CP0()
1184 } else if ((rd == MIPS_CP0_CONFIG) && (sel == 5)) { kvm_mips_emulate_CP0()
1221 } else if ((rd == MIPS_CP0_CAUSE) && (sel == 0)) { kvm_mips_emulate_CP0()
1237 cop0->reg[rd][sel] = vcpu->arch.gprs[rt]; kvm_mips_emulate_CP0()
1244 rd, sel, cop0->reg[rd][sel]); kvm_mips_emulate_CP0()
1248 kvm_err("!!!!!!![%#lx]dmtc_op: rt: %d, rd: %d, sel: %d!!!!!!\n", kvm_mips_emulate_CP0()
1249 vcpu->arch.pc, rt, rd, sel); kvm_mips_emulate_CP0()
1288 kvm_debug("WRPGPR[%d][%d] = %#lx\n", pss, rd, kvm_mips_emulate_CP0()
1290 vcpu->arch.gprs[rd] = vcpu->arch.gprs[rt]; kvm_mips_emulate_CP0()
2345 int rd = (inst & RD) >> 11; kvm_mips_handle_ri() local
2347 /* If usermode, check RDHWR rd is allowed by guest HWREna */ kvm_mips_handle_ri()
2348 if (usermode && !(kvm_read_c0_guest_hwrena(cop0) & BIT(rd))) { kvm_mips_handle_ri()
2350 rd, opc); kvm_mips_handle_ri()
2353 switch (rd) { kvm_mips_handle_ri()
2379 kvm_debug("RDHWR %#x not supported @ %p\n", rd, opc); kvm_mips_handle_ri()
/linux-4.1.27/drivers/media/dvb-frontends/
H A Ddib3000mb.c355 rd(DIB3000MB_REG_AS_IRQ_PENDING), dib3000mb_set_frontend()
356 rd(DIB3000MB_REG_LOCK2_VALUE))) < 0 && as_count++ < 100) dib3000mb_set_frontend()
462 if (!rd(DIB3000MB_REG_TPS_LOCK)) dib3000mb_get_frontend()
465 dds_val = ((rd(DIB3000MB_REG_DDS_VALUE_MSB) & 0xff) << 16) + rd(DIB3000MB_REG_DDS_VALUE_LSB); dib3000mb_get_frontend()
466 deb_getf("DDS_VAL: %x %x %x",dds_val, rd(DIB3000MB_REG_DDS_VALUE_MSB), rd(DIB3000MB_REG_DDS_VALUE_LSB)); dib3000mb_get_frontend()
474 dds_val = ((rd(DIB3000MB_REG_DDS_FREQ_MSB) & 0xff) << 16) + rd(DIB3000MB_REG_DDS_FREQ_LSB); dib3000mb_get_frontend()
475 deb_getf("DDS_FREQ: %x %x %x",dds_val, rd(DIB3000MB_REG_DDS_FREQ_MSB), rd(DIB3000MB_REG_DDS_FREQ_LSB)); dib3000mb_get_frontend()
490 switch ((tps_val = rd(DIB3000MB_REG_TPS_QAM))) { dib3000mb_get_frontend()
509 if (rd(DIB3000MB_REG_TPS_HRCH)) { dib3000mb_get_frontend()
513 switch ((tps_val = rd(DIB3000MB_REG_TPS_VIT_ALPHA))) { dib3000mb_get_frontend()
536 tps_val = rd(DIB3000MB_REG_TPS_CODE_RATE_LP); dib3000mb_get_frontend()
543 tps_val = rd(DIB3000MB_REG_TPS_CODE_RATE_HP); dib3000mb_get_frontend()
573 switch ((tps_val = rd(DIB3000MB_REG_TPS_GUARD_TIME))) { dib3000mb_get_frontend()
596 switch ((tps_val = rd(DIB3000MB_REG_TPS_FFT))) { dib3000mb_get_frontend()
620 if (rd(DIB3000MB_REG_AGC_LOCK)) dib3000mb_read_status()
622 if (rd(DIB3000MB_REG_CARRIER_LOCK)) dib3000mb_read_status()
624 if (rd(DIB3000MB_REG_VIT_LCK)) dib3000mb_read_status()
626 if (rd(DIB3000MB_REG_TS_SYNC_LOCK)) dib3000mb_read_status()
632 rd(DIB3000MB_REG_TPS_LOCK), dib3000mb_read_status()
633 rd(DIB3000MB_REG_TPS_QAM), dib3000mb_read_status()
634 rd(DIB3000MB_REG_TPS_HRCH), dib3000mb_read_status()
635 rd(DIB3000MB_REG_TPS_VIT_ALPHA), dib3000mb_read_status()
636 rd(DIB3000MB_REG_TPS_CODE_RATE_HP), dib3000mb_read_status()
637 rd(DIB3000MB_REG_TPS_CODE_RATE_LP), dib3000mb_read_status()
638 rd(DIB3000MB_REG_TPS_GUARD_TIME), dib3000mb_read_status()
639 rd(DIB3000MB_REG_TPS_FFT), dib3000mb_read_status()
640 rd(DIB3000MB_REG_TPS_CELL_ID)); dib3000mb_read_status()
650 *ber = ((rd(DIB3000MB_REG_BER_MSB) << 16) | rd(DIB3000MB_REG_BER_LSB)); dib3000mb_read_ber()
659 *strength = rd(DIB3000MB_REG_SIGNAL_POWER) * 0xffff / 0x170; dib3000mb_read_signal_strength()
666 short sigpow = rd(DIB3000MB_REG_SIGNAL_POWER); dib3000mb_read_snr()
667 int icipow = ((rd(DIB3000MB_REG_NOISE_POWER_MSB) & 0xff) << 16) | dib3000mb_read_snr()
668 rd(DIB3000MB_REG_NOISE_POWER_LSB); dib3000mb_read_snr()
677 *unc = rd(DIB3000MB_REG_PACKET_ERROR_RATE); dib3000mb_read_unc_blocks()
769 if (rd(DIB3000_REG_MANUFACTOR_ID) != DIB3000_I2C_ID_DIBCOM) dib3000mb_attach()
772 if (rd(DIB3000_REG_DEVICE_ID) != DIB3000MB_DEVICE_ID) dib3000mb_attach()
H A Da8293.c30 static int a8293_i2c(struct a8293_priv *priv, u8 *val, int len, bool rd) a8293_i2c() argument
41 if (rd) a8293_i2c()
50 dev_warn(&priv->i2c->dev, "%s: i2c failed=%d rd=%d\n", a8293_i2c()
51 KBUILD_MODNAME, ret, rd); a8293_i2c()
/linux-4.1.27/arch/mips/include/asm/
H A Duasm.h201 # define UASM_i_ADDU(buf, rs, rt, rd) uasm_i_daddu(buf, rs, rt, rd)
204 # define UASM_i_LWX(buf, rs, rt, rd) uasm_i_ldx(buf, rs, rt, rd)
205 # define UASM_i_MFC0(buf, rt, rd...) uasm_i_dmfc0(buf, rt, rd)
206 # define UASM_i_MTC0(buf, rt, rd...) uasm_i_dmtc0(buf, rt, rd)
213 # define UASM_i_SUBU(buf, rs, rt, rd) uasm_i_dsubu(buf, rs, rt, rd)
217 # define UASM_i_ADDU(buf, rs, rt, rd) uasm_i_addu(buf, rs, rt, rd)
220 # define UASM_i_LWX(buf, rs, rt, rd) uasm_i_lwx(buf, rs, rt, rd)
221 # define UASM_i_MFC0(buf, rt, rd...) uasm_i_mfc0(buf, rt, rd)
222 # define UASM_i_MTC0(buf, rt, rd...) uasm_i_mtc0(buf, rt, rd)
229 # define UASM_i_SUBU(buf, rs, rt, rd) uasm_i_subu(buf, rs, rt, rd)
H A Dasmmacro.h176 .macro _EXT rd, rs, p, s
177 ext \rd, \rs, \p, \s variable
180 .macro _EXT rd, rs, p, s
181 srl \rd, \rs, \p
182 andi \rd, \rd, (1 << \s) - 1
205 .macro MFTR rt=0, rd=0, u=0, sel=0 variable
206 .word 0x41000000 | (\rt << 16) | (\rd << 11) | (\u << 5) | (\sel)
209 .macro MTTR rt=0, rd=0, u=0, sel=0 variable
210 .word 0x41800000 | (\rt << 16) | (\rd << 11) | (\u << 5) | (\sel)
214 .macro _cfcmsa rd, cs
218 cfcmsa \rd, $\cs
302 .macro _cfcmsa rd, cs
308 move \rd, $1
H A Dasm.h178 #define MOVN(rd, rs, rt) \
182 move rd, rs; \
185 #define MOVZ(rd, rs, rt) \
189 move rd, rs; \
194 #define MOVN(rd, rs, rt) \
198 move rd, rs; \
201 #define MOVZ(rd, rs, rt) \
205 move rd, rs; \
211 #define MOVN(rd, rs, rt) \
212 movn rd, rs, rt
213 #define MOVZ(rd, rs, rt) \
214 movz rd, rs, rt
H A Dmipsmtregs.h329 #define mttgpr(rd,v) \
336 " # mttgpr $1, " #rd " \n" \
337 " .word 0x41810020 | (" #rd " << 11) \n" \
342 #define mttc0(rd, sel, v) \
349 " # mttc0 %0," #rd ", " #sel " \n" \
350 " .word 0x41810000 | (" #rd " << 11) | " #sel " \n" \
357 #define mttr(rd, u, sel, v) \
360 "mttr %0," #rd ", " #u ", " #sel \
/linux-4.1.27/fs/hfs/
H A Ddir.c62 struct hfs_readdir_data *rd; hfs_readdir() local
155 rd = file->private_data; hfs_readdir()
156 if (!rd) { hfs_readdir()
157 rd = kmalloc(sizeof(struct hfs_readdir_data), GFP_KERNEL); hfs_readdir()
158 if (!rd) { hfs_readdir()
162 file->private_data = rd; hfs_readdir()
163 rd->file = file; hfs_readdir()
164 list_add(&rd->list, &HFS_I(inode)->open_dir_list); hfs_readdir()
166 memcpy(&rd->key, &fd.key, sizeof(struct hfs_cat_key)); hfs_readdir()
174 struct hfs_readdir_data *rd = file->private_data; hfs_dir_release() local
175 if (rd) { hfs_dir_release()
177 list_del(&rd->list); hfs_dir_release()
179 kfree(rd); hfs_dir_release()
/linux-4.1.27/drivers/media/pci/bt8xx/
H A Ddst_priv.h24 struct dst_gpio_read rd; member in union:dst_gpio_packet
/linux-4.1.27/arch/sparc/kernel/
H A Dutrap.S10 rd %pc, %g7
H A Dvisemul.c54 /* 000101000 - four 16-bit compare; set rd if src1 > src2 */
57 /* 000101100 - two 32-bit compare; set rd if src1 > src2 */
60 /* 000100000 - four 16-bit compare; set rd if src1 <= src2 */
63 /* 000100100 - two 32-bit compare; set rd if src1 <= src2 */
66 /* 000100010 - four 16-bit compare; set rd if src1 != src2 */
69 /* 000100110 - two 32-bit compare; set rd if src1 != src2 */
72 /* 000101010 - four 16-bit compare; set rd if src1 == src2 */
75 /* 000101110 - two 32-bit compare; set rd if src1 == src2 */
140 unsigned int rd, int from_kernel) maybe_flush_windows()
142 if (rs2 >= 16 || rs1 >= 16 || rd >= 16) { maybe_flush_windows()
203 static void store_reg(struct pt_regs *regs, unsigned long val, unsigned long rd) store_reg() argument
205 if (rd < 16) { store_reg()
206 unsigned long *rd_kern = __fetch_reg_addr_kern(rd, regs); store_reg()
210 unsigned long __user *rd_user = __fetch_reg_addr_user(rd, regs); store_reg()
361 "rd %%ccr, %0" edge()
450 unsigned long rs1, rs2, *rd, rd_val; pdist() local
455 rd = fpd_regaddr(f, RD(insn)); pdist()
457 rd_val = *rd; pdist()
473 *rd = rd_val; pdist()
139 maybe_flush_windows(unsigned int rs1, unsigned int rs2, unsigned int rd, int from_kernel) maybe_flush_windows() argument
H A Dunaligned_64.c104 unsigned int rd, int from_kernel) maybe_flush_windows()
106 if (rs2 >= 16 || rs1 >= 16 || rd >= 16) { maybe_flush_windows()
169 unsigned int insn, unsigned int rd) compute_effective_address()
177 maybe_flush_windows(rs1, 0, rd, from_kernel); compute_effective_address()
180 maybe_flush_windows(rs1, rs2, rd, from_kernel); compute_effective_address()
398 int ret, rd = ((insn >> 25) & 0x1f); handle_popc() local
403 maybe_flush_windows(0, 0, rd, from_kernel); handle_popc()
406 maybe_flush_windows(0, insn & 0x1f, rd, from_kernel); handle_popc()
410 if (rd < 16) { handle_popc()
411 if (rd) handle_popc()
412 regs->u_regs[rd] = ret; handle_popc()
419 put_user(ret, &win32->locals[rd - 16]); handle_popc()
423 put_user(ret, &win->locals[rd - 16]); handle_popc()
563 int rd = ((insn >> 25) & 0x1f); handle_ld_nf() local
569 maybe_flush_windows(0, 0, rd, from_kernel); handle_ld_nf()
570 reg = fetch_reg_addr(rd, regs); handle_ld_nf()
571 if (from_kernel || rd < 16) { handle_ld_nf()
103 maybe_flush_windows(unsigned int rs1, unsigned int rs2, unsigned int rd, int from_kernel) maybe_flush_windows() argument
168 compute_effective_address(struct pt_regs *regs, unsigned int insn, unsigned int rd) compute_effective_address() argument
H A Dtrampoline_32.S69 rd %psr, %g1
130 rd %psr, %g1
173 rd %asr17,%g3
186 rd %psr, %g1
H A Dwinfixup.S32 rd %pc, %g7
102 rd %pc, %g7
118 rd %pc, %g7
145 rd %pc, %g7
H A Dsun4v_tlb_miss.S267 rd %pc, %g7
283 rd %pc, %g7
299 rd %pc, %g7
315 rd %pc, %g7
349 rd %pc, %g7
359 rd %pc, %g7
373 rd %pc, %g7
389 rd %pc, %g7
H A Dunaligned_32.c71 unsigned int rd) maybe_flush_windows()
73 if(rs2 >= 16 || rs1 >= 16 || rd >= 16) { maybe_flush_windows()
139 unsigned int rd = (insn >> 25) & 0x1f; compute_effective_address() local
142 maybe_flush_windows(rs1, 0, rd); compute_effective_address()
145 maybe_flush_windows(rs1, rs2, rd); compute_effective_address()
155 unsigned int rd = (insn >> 25) & 0x1f; safe_compute_effective_address() local
158 maybe_flush_windows(rs1, 0, rd); safe_compute_effective_address()
161 maybe_flush_windows(rs1, rs2, rd); safe_compute_effective_address()
70 maybe_flush_windows(unsigned int rs1, unsigned int rs2, unsigned int rd) maybe_flush_windows() argument
H A Dentry.S174 rd %wim, %l3
258 rd %tbr, %reg; \
883 rd %psr, %g4
886 rd %wim, %g5
902 rd %psr, %g4
907 rd %wim, %g5
925 rd %psr, %g4
927 rd %wim, %g5
972 rd %psr, %l1
996 rd %wim, %l3
1157 rd %y, %o1
1160 rd %y, %o1
1171 rd %y, %o1
1174 rd %y, %o1
1183 rd %y, %o1
1199 rd %wim,%l3
1215 rd %wim,%l3
1248 rd %psr, %o5 ! must clear interrupts
1256 rd %wim, %o3 ! get current wim
1286 rd %wim, %l3
1323 rd %psr, %l0
1348 661: rd %tbr, %g1
1359 rd %asr17, %o0
H A Dtime_64.c81 "1: rd %%tick, %%g2\n" tick_disable_protection()
98 " rd %%tick_cmpr, %%g0" tick_disable_irq()
113 __asm__ __volatile__("rd %%tick, %0\n\t" tick_get_tick()
124 __asm__ __volatile__("rd %%tick, %0" tick_add_compare()
143 "rd %%tick_cmpr, %%g0\n\t" tick_add_compare()
147 __asm__ __volatile__("rd %%tick, %0" tick_add_compare()
159 __asm__ __volatile__("rd %%tick, %0\n\t" tick_add_tick()
201 " rd %%asr24, %%g2\n" stick_init_tick()
216 __asm__ __volatile__("rd %%asr24, %0" stick_get_tick()
226 __asm__ __volatile__("rd %%asr24, %0\n\t" stick_add_tick()
239 __asm__ __volatile__("rd %%asr24, %0" stick_add_compare()
247 __asm__ __volatile__("rd %%asr24, %0" stick_add_compare()
H A Duna_asm_64.S11 rd %asi, %o4
69 rd %asi, %o5
H A Dsun4v_ivec.S38 * 3rd 64-bit word: 64-bit arg, load into %g7
192 rd %pc, %g7
221 rd %pc, %g7
303 rd %pc, %g7
332 rd %pc, %g7
H A Dirq_32.c36 "rd %%psr, %0\n\t" arch_local_irq_save()
53 "rd %%psr, %0\n\t" arch_local_irq_enable()
68 "rd %%psr, %0\n\t" arch_local_irq_restore()
H A Dpcr.c59 __asm__ __volatile__("rd %%pcr, %0" : "=r" (val)); direct_pcr_read()
74 __asm__ __volatile__("rd %%pic, %0" : "=r" (val)); direct_pic_read()
90 "rd %%pic, %%g0" : : "r" (val)); direct_pic_write()
H A Dkprobes.c251 unsigned long rd = ((insn >> 25) & 0x1f); retpc_fixup() local
253 if (rd <= 15) { retpc_fixup()
254 slot = &regs->u_regs[rd]; retpc_fixup()
259 rd -= 16; retpc_fixup()
262 slot += rd; retpc_fixup()
H A Dwof.S59 * rd %psr, %l0
60 * rd %wim, %l3
206 rd %psr, %glob_tmp
230 rd %wim, %twin_tmp
363 rd %psr, %glob_tmp
H A Dfpu_traps.S10 rd %fprs, %g5
338 rd %fprs, %g1
341 rd %gsr, %g3
H A Dwuf.S37 * rd %psr, %l0
38 * rd %wim, %l3
163 rd %psr, %g3 /* Read %psr in live user window */
/linux-4.1.27/arch/arm/crypto/
H A Dsha512-armv7-neon.S84 #define rounds2_0_63(ra, rb, rc, rd, re, rf, rg, rh, rw0, rw1, rw01q, rw2, \
117 vadd.u64 rd, rd, RT1; /* d+=t1; */ \
121 vshr.u64 RT2, rd, #14; \
122 vshl.u64 RT3, rd, #64 - 14; \
124 vshr.u64 RT4, rd, #18; \
125 vshl.u64 RT5, rd, #64 - 18; \
129 vshr.u64 RT4, rd, #41; \
130 vshl.u64 RT5, rd, #64 - 41; \
133 vmov.64 RT7, rd; \
195 #define rounds2_64_79(ra, rb, rc, rd, re, rf, rg, rh, rw0, rw1, \
229 vadd.u64 rd, rd, RT1; /* d+=t1; */ \
233 vshr.u64 RT2, rd, #14; \
234 vshl.u64 RT3, rd, #64 - 14; \
236 vshr.u64 RT4, rd, #18; \
237 vshl.u64 RT5, rd, #64 - 18; \
241 vshr.u64 RT4, rd, #41; \
242 vshl.u64 RT5, rd, #64 - 41; \
245 vmov.64 RT7, rd; \
H A Daes-ce-core.S125 * ip : address of 3rd round key
131 add ip, r2, #32 @ 3rd round key
138 add ip, r2, #32 @ 3rd round key
144 add ip, r2, #32 @ 3rd round key
150 add ip, r2, #32 @ 3rd round key
390 add ip, r6, #32 @ 3rd round key of key 2
483 add ip, r2, #32 @ 3rd round key
/linux-4.1.27/arch/powerpc/include/asm/
H A Dppc_asm.h480 #define toreal(rd)
481 #define fromreal(rd)
485 * these macros, which use rs = 0 to get the tophys offset in rd, rather than
487 * (i.e. set register rd to 0 when rs == 0).
489 #define tophys(rd,rs) \
490 addis rd,rs,0
492 #define tovirt(rd,rs) \
493 addis rd,rs,0
496 #define toreal(rd) /* we can access c000... in real mode */
497 #define fromreal(rd)
499 #define tophys(rd,rs) \
500 clrldi rd,rs,2
502 #define tovirt(rd,rs) \
503 rotldi rd,rs,16; \
504 ori rd,rd,((KERNELBASE>>48)&0xFFFF);\
505 rotldi rd,rd,48
511 #define toreal(rd) tophys(rd,rd)
512 #define fromreal(rd) tovirt(rd,rd)
514 #define tophys(rd,rs) \
515 0: addis rd,rs,-PAGE_OFFSET@h; \
521 #define tovirt(rd,rs) \
522 0: addis rd,rs,PAGE_OFFSET@h; \
/linux-4.1.27/drivers/clk/samsung/
H A Dclk.c22 struct samsung_clk_reg_dump *rd, samsung_clk_save()
25 for (; num_regs > 0; --num_regs, ++rd) samsung_clk_save()
26 rd->value = readl(base + rd->offset); samsung_clk_save()
30 const struct samsung_clk_reg_dump *rd, samsung_clk_restore()
33 for (; num_regs > 0; --num_regs, ++rd) samsung_clk_restore()
34 writel(rd->value, base + rd->offset); samsung_clk_restore()
41 struct samsung_clk_reg_dump *rd; samsung_clk_alloc_reg_dump() local
44 rd = kcalloc(nr_rdump, sizeof(*rd), GFP_KERNEL); samsung_clk_alloc_reg_dump()
45 if (!rd) samsung_clk_alloc_reg_dump()
49 rd[i].offset = rdump[i]; samsung_clk_alloc_reg_dump()
51 return rd; samsung_clk_alloc_reg_dump()
21 samsung_clk_save(void __iomem *base, struct samsung_clk_reg_dump *rd, unsigned int num_regs) samsung_clk_save() argument
29 samsung_clk_restore(void __iomem *base, const struct samsung_clk_reg_dump *rd, unsigned int num_regs) samsung_clk_restore() argument
/linux-4.1.27/tools/testing/selftests/rcutorture/bin/
H A Dkvm.sh282 -v rd=$resdir/$ds/ \
300 print "echo ----Start batch: `date` >> " rd "/log";
317 print "echo ", cfr[jn], cpusr[jn] ovf ": Starting build. `date` >> " rd "/log";
321 print "mkdir " rd cfr[jn] " || :";
322 print "kvm-test-1-run.sh " CONFIGDIR cf[j], builddir, rd cfr[jn], dur " \"" TORTURE_QEMU_ARG "\" \"" TORTURE_BOOTARGS "\" > " rd cfr[jn] "/kvm-test-1-run.sh.out 2>&1 &"
324 print "echo ", cfr[jn], cpusr[jn] ovf ": Waiting for build to complete. `date` >> " rd "/log";
330 print "echo ", cfr[jn], cpusr[jn] ovf ": Build complete. `date` >> " rd "/log";
339 print "\techo ----", cfr[j], cpusr[j] ovf ": Starting kernel. `date` >> " rd "/log";
346 print "\techo ---- All kernel runs complete. `date` >> " rd "/log";
351 print "echo ----", cfr[j], cpusr[j] ovf ": Build/run results: >> " rd "/log";
352 print "cat " rd cfr[j] "/kvm-test-1-run.sh.out";
353 print "cat " rd cfr[j] "/kvm-test-1-run.sh.out >> " rd "/log";
/linux-4.1.27/arch/arm/mm/
H A Dproc-xscale.S71 .macro cpwait, rd
72 mrc p15, 0, \rd, c2, c0, 0 @ arbitrary read of cp15
73 mov \rd, \rd @ wait for completion
77 .macro cpwait_ret, lr, rd
78 mrc p15, 0, \rd, c2, c0, 0 @ arbitrary read of cp15
79 sub pc, \lr, \rd, LSR #32 @ wait for completion and
86 * rd and rs are two scratch registers.
88 .macro clean_d_cache, rd, rs
90 ldr \rd, [\rs]
91 eor \rd, \rd, #CACHESIZE
92 str \rd, [\rs]
93 add \rs, \rd, #CACHESIZE
94 1: mcr p15, 0, \rd, c7, c2, 5 @ allocate D cache line
95 add \rd, \rd, #CACHELINESIZE
96 mcr p15, 0, \rd, c7, c2, 5 @ allocate D cache line
97 add \rd, \rd, #CACHELINESIZE
98 mcr p15, 0, \rd, c7, c2, 5 @ allocate D cache line
99 add \rd, \rd, #CACHELINESIZE
100 mcr p15, 0, \rd, c7, c2, 5 @ allocate D cache line
101 add \rd, \rd, #CACHELINESIZE
102 teq \rd, \rs
H A Dabort-lv4t.S35 /* 0 */ b .data_arm_lateldrhpost @ ldrh rd, [rn], #m/rm
36 /* 1 */ b .data_arm_lateldrhpre @ ldrh rd, [rn, #m/rm]
39 /* 4 */ b .data_arm_lateldrpostconst @ ldr rd, [rn], #m
40 /* 5 */ b .data_arm_lateldrpreconst @ ldr rd, [rn, #m]
41 /* 6 */ b .data_arm_lateldrpostreg @ ldr rd, [rn], rm
42 /* 7 */ b .data_arm_lateldrprereg @ ldr rd, [rn, rm]
47 /* c */ b do_DataAbort @ ldc rd, [rn], #m @ Same as ldr rd, [rn], #m
48 /* d */ b do_DataAbort @ ldc rd, [rn, #m]
H A Dalignment.c344 unsigned int rd = RD_BITS(instr); do_alignment_ldrhstrh() local
359 regs->uregs[rd] = val; do_alignment_ldrhstrh()
361 put16_unaligned_check(regs->uregs[rd], addr); do_alignment_ldrhstrh()
374 regs->uregs[rd] = val; do_alignment_ldrhstrh()
376 put16t_unaligned_check(regs->uregs[rd], addr); do_alignment_ldrhstrh()
388 unsigned int rd = RD_BITS(instr); do_alignment_ldrdstrd() local
396 } else if (((rd & 1) == 1) || (rd == 14)) do_alignment_ldrdstrd()
400 rd2 = rd + 1; do_alignment_ldrdstrd()
411 regs->uregs[rd] = val; do_alignment_ldrdstrd()
415 put32_unaligned_check(regs->uregs[rd], addr); do_alignment_ldrdstrd()
425 regs->uregs[rd] = val; do_alignment_ldrdstrd()
429 put32t_unaligned_check(regs->uregs[rd], addr); do_alignment_ldrdstrd()
443 unsigned int rd = RD_BITS(instr); do_alignment_ldrstr() local
453 regs->uregs[rd] = val; do_alignment_ldrstr()
455 put32_unaligned_check(regs->uregs[rd], addr); do_alignment_ldrstr()
462 regs->uregs[rd] = val; do_alignment_ldrstr()
464 put32t_unaligned_check(regs->uregs[rd], addr); do_alignment_ldrstr()
487 unsigned int rd, rn, correction, nr_regs, regbits; do_alignment_ldmstm() local
534 for (regbits = REGMASK_BITS(instr), rd = 0; regbits; do_alignment_ldmstm()
535 regbits >>= 1, rd += 1) do_alignment_ldmstm()
540 regs->uregs[rd] = val; do_alignment_ldmstm()
542 put32t_unaligned_check(regs->uregs[rd], eaddr); do_alignment_ldmstm()
546 for (regbits = REGMASK_BITS(instr), rd = 0; regbits; do_alignment_ldmstm()
547 regbits >>= 1, rd += 1) do_alignment_ldmstm()
552 regs->uregs[rd] = val; do_alignment_ldmstm()
554 put32_unaligned_check(regs->uregs[rd], eaddr); do_alignment_ldmstm()
H A Dproc-xsc3.S58 .macro cpwait_ret, lr, rd
59 mrc p15, 0, \rd, c2, c0, 0 @ arbitrary read of cp15
60 sub pc, \lr, \rd, LSR #32 @ wait for completion and
68 .macro clean_d_cache rd, rs
69 mov \rd, #0x1f00
70 orr \rd, \rd, #0x00e0
71 1: mcr p15, 0, \rd, c7, c14, 2 @ clean/invalidate L1 D line
72 adds \rd, \rd, #0x40000000
74 subs \rd, \rd, #0x20
H A Dcopypage-xsc3.c10 * Adapted for 3rd gen XScale core, no more mini-dcache
/linux-4.1.27/arch/arm/probes/kprobes/
H A Dactions-arm.c167 int rd = (insn >> 12) & 0xf; emulate_rd12rn16rm0rs8_rwflags() local
172 register unsigned long rdv asm("r0") = regs->uregs[rd]; emulate_rd12rn16rm0rs8_rwflags()
190 if (rd == 15) emulate_rd12rn16rm0rs8_rwflags()
193 regs->uregs[rd] = rdv; emulate_rd12rn16rm0rs8_rwflags()
201 int rd = (insn >> 12) & 0xf; emulate_rd12rn16rm0_rwflags_nopc() local
205 register unsigned long rdv asm("r0") = regs->uregs[rd]; emulate_rd12rn16rm0_rwflags_nopc()
220 regs->uregs[rd] = rdv; emulate_rd12rn16rm0_rwflags_nopc()
229 int rd = (insn >> 16) & 0xf; emulate_rd16rn12rm0rs8_rwflags_nopc() local
234 register unsigned long rdv asm("r2") = regs->uregs[rd]; emulate_rd16rn12rm0rs8_rwflags_nopc()
250 regs->uregs[rd] = rdv; emulate_rd16rn12rm0rs8_rwflags_nopc()
258 int rd = (insn >> 12) & 0xf; emulate_rd12rm0_noflags_nopc() local
261 register unsigned long rdv asm("r0") = regs->uregs[rd]; emulate_rd12rm0_noflags_nopc()
271 regs->uregs[rd] = rdv; emulate_rd12rm0_noflags_nopc()
H A Dactions-thumb.c50 int rd = (insn >> 8) & 0xf; t32_simulate_mrs() local
52 regs->uregs[rd] = regs->ARM_cpsr & mask; t32_simulate_mrs()
217 int rd = (insn >> 8) & 0xf; t32_emulate_rd8rn16rm0_rwflags() local
221 register unsigned long rdv asm("r1") = regs->uregs[rd]; t32_emulate_rd8rn16rm0_rwflags()
236 regs->uregs[rd] = rdv; t32_emulate_rd8rn16rm0_rwflags()
245 int rd = (insn >> 8) & 0xf; t32_emulate_rd8pc16_noflags() local
247 register unsigned long rdv asm("r1") = regs->uregs[rd]; t32_emulate_rd8pc16_noflags()
257 regs->uregs[rd] = rdv; t32_emulate_rd8pc16_noflags()
264 int rd = (insn >> 8) & 0xf; t32_emulate_rd8rn16_noflags() local
267 register unsigned long rdv asm("r1") = regs->uregs[rd]; t32_emulate_rd8rn16_noflags()
277 regs->uregs[rd] = rdv; t32_emulate_rd8rn16_noflags()
/linux-4.1.27/arch/x86/include/asm/
H A Dsysfb.h31 M_MB_3, /* MacBook, 3rd rev. */
37 M_MBA_3, /* Macbook Air, 3rd rev */
45 M_MBP_5_3, /* MacBook Pro, 5,3rd gen */
H A Dpgtable_64_types.h31 * 3rd level page
/linux-4.1.27/net/wireless/
H A Dreg.c339 static void update_world_regdomain(const struct ieee80211_regdomain *rd) update_world_regdomain() argument
347 reset_regdomains(false, rd); update_world_regdomain()
349 cfg80211_world_regdom = rd; update_world_regdomain()
598 reg_get_max_bandwidth_from_range(const struct ieee80211_regdomain *rd, reg_get_max_bandwidth_from_range() argument
606 for (idx = 0; idx < rd->n_reg_rules; idx++) reg_get_max_bandwidth_from_range()
607 if (rule == &rd->reg_rules[idx]) reg_get_max_bandwidth_from_range()
610 if (idx == rd->n_reg_rules) reg_get_max_bandwidth_from_range()
617 tmp = &rd->reg_rules[--no]; reg_get_max_bandwidth_from_range()
632 while (no < rd->n_reg_rules - 1) { reg_get_max_bandwidth_from_range()
633 tmp = &rd->reg_rules[++no]; reg_get_max_bandwidth_from_range()
647 unsigned int reg_get_max_bandwidth(const struct ieee80211_regdomain *rd, reg_get_max_bandwidth() argument
650 unsigned int bw = reg_get_max_bandwidth_from_range(rd, rule); reg_get_max_bandwidth()
689 static bool is_valid_rd(const struct ieee80211_regdomain *rd) is_valid_rd() argument
694 if (!rd->n_reg_rules) is_valid_rd()
697 if (WARN_ON(rd->n_reg_rules > NL80211_MAX_SUPP_REG_RULES)) is_valid_rd()
700 for (i = 0; i < rd->n_reg_rules; i++) { is_valid_rd()
701 reg_rule = &rd->reg_rules[i]; is_valid_rd()
902 * Once completed we will mark the alpha2 for the rd as intersected, "98",
918 struct ieee80211_regdomain *rd; regdom_intersect() local
947 rd = kzalloc(size_of_regd, GFP_KERNEL); regdom_intersect()
948 if (!rd) regdom_intersect()
964 add_rule(&intersected_rule, rd->reg_rules, regdom_intersect()
965 &rd->n_reg_rules); regdom_intersect()
969 rd->alpha2[0] = '9'; regdom_intersect()
970 rd->alpha2[1] = '8'; regdom_intersect()
971 rd->dfs_region = reg_intersect_dfs_region(rd1->dfs_region, regdom_intersect()
974 return rd; regdom_intersect()
2669 static void print_rd_rules(const struct ieee80211_regdomain *rd) print_rd_rules() argument
2679 for (i = 0; i < rd->n_reg_rules; i++) { print_rd_rules()
2680 reg_rule = &rd->reg_rules[i]; print_rd_rules()
2687 reg_get_max_bandwidth(rd, reg_rule)); print_rd_rules()
2736 static void print_regdomain(const struct ieee80211_regdomain *rd) print_regdomain() argument
2740 if (is_intersected_alpha2(rd->alpha2)) { print_regdomain()
2752 } else if (is_world_regdom(rd->alpha2)) { print_regdomain()
2755 if (is_unknown_alpha2(rd->alpha2)) print_regdomain()
2760 rd->alpha2[0], rd->alpha2[1]); print_regdomain()
2763 rd->alpha2[0], rd->alpha2[1]); print_regdomain()
2767 pr_info(" DFS Master region: %s", reg_dfs_region_str(rd->dfs_region)); print_regdomain()
2768 print_rd_rules(rd); print_regdomain()
2771 static void print_regdomain_info(const struct ieee80211_regdomain *rd) print_regdomain_info() argument
2773 pr_info("Regulatory domain: %c%c\n", rd->alpha2[0], rd->alpha2[1]); print_regdomain_info()
2774 print_rd_rules(rd); print_regdomain_info()
2777 static int reg_set_rd_core(const struct ieee80211_regdomain *rd) reg_set_rd_core() argument
2779 if (!is_world_regdom(rd->alpha2)) reg_set_rd_core()
2781 update_world_regdomain(rd); reg_set_rd_core()
2785 static int reg_set_rd_user(const struct ieee80211_regdomain *rd, reg_set_rd_user() argument
2790 if (!regdom_changes(rd->alpha2)) reg_set_rd_user()
2793 if (!is_valid_rd(rd)) { reg_set_rd_user()
2795 print_regdomain_info(rd); reg_set_rd_user()
2800 reset_regdomains(false, rd); reg_set_rd_user()
2804 intersected_rd = regdom_intersect(rd, get_cfg80211_regdom()); reg_set_rd_user()
2808 kfree(rd); reg_set_rd_user()
2809 rd = NULL; reg_set_rd_user()
2815 static int reg_set_rd_driver(const struct ieee80211_regdomain *rd, reg_set_rd_driver() argument
2823 if (is_world_regdom(rd->alpha2)) reg_set_rd_driver()
2826 if (!regdom_changes(rd->alpha2)) reg_set_rd_driver()
2829 if (!is_valid_rd(rd)) { reg_set_rd_driver()
2831 print_regdomain_info(rd); reg_set_rd_driver()
2846 regd = reg_copy_regd(rd); reg_set_rd_driver()
2851 reset_regdomains(false, rd); reg_set_rd_driver()
2855 intersected_rd = regdom_intersect(rd, get_cfg80211_regdom()); reg_set_rd_driver()
2865 rcu_assign_pointer(request_wiphy->regd, rd); reg_set_rd_driver()
2868 rd = NULL; reg_set_rd_driver()
2875 static int reg_set_rd_country_ie(const struct ieee80211_regdomain *rd, reg_set_rd_country_ie() argument
2880 if (!is_alpha2_set(rd->alpha2) && !is_an_alpha2(rd->alpha2) && reg_set_rd_country_ie()
2881 !is_unknown_alpha2(rd->alpha2)) reg_set_rd_country_ie()
2886 * rd is non static (it means CRDA was present and was used last) reg_set_rd_country_ie()
2890 if (!is_valid_rd(rd)) { reg_set_rd_country_ie()
2892 print_regdomain_info(rd); reg_set_rd_country_ie()
2906 reset_regdomains(false, rd); reg_set_rd_country_ie()
2913 * kmalloc'd the rd structure.
2915 int set_regdom(const struct ieee80211_regdomain *rd, set_regdom() argument
2922 if (!reg_is_valid_request(rd->alpha2)) { set_regdom()
2923 kfree(rd); set_regdom()
2935 r = reg_set_rd_core(rd); set_regdom()
2938 r = reg_set_rd_user(rd, lr); set_regdom()
2942 r = reg_set_rd_driver(rd, lr); set_regdom()
2945 r = reg_set_rd_country_ie(rd, lr); set_regdom()
2962 kfree(rd); set_regdom()
2967 if (WARN_ON(!lr->intersect && rd != get_cfg80211_regdom())) set_regdom()
2983 struct ieee80211_regdomain *rd) __regulatory_set_wiphy_regd()
2989 if (WARN_ON(!wiphy || !rd)) __regulatory_set_wiphy_regd()
2996 if (WARN(!is_valid_rd(rd), "Invalid regulatory domain detected\n")) { __regulatory_set_wiphy_regd()
2997 print_regdomain_info(rd); __regulatory_set_wiphy_regd()
3001 regd = reg_copy_regd(rd); __regulatory_set_wiphy_regd()
3017 struct ieee80211_regdomain *rd) regulatory_set_wiphy_regd()
3019 int ret = __regulatory_set_wiphy_regd(wiphy, rd); regulatory_set_wiphy_regd()
3030 struct ieee80211_regdomain *rd) regulatory_set_wiphy_regd_sync_rtnl()
3036 ret = __regulatory_set_wiphy_regd(wiphy, rd); regulatory_set_wiphy_regd_sync_rtnl()
2982 __regulatory_set_wiphy_regd(struct wiphy *wiphy, struct ieee80211_regdomain *rd) __regulatory_set_wiphy_regd() argument
3016 regulatory_set_wiphy_regd(struct wiphy *wiphy, struct ieee80211_regdomain *rd) regulatory_set_wiphy_regd() argument
3029 regulatory_set_wiphy_regd_sync_rtnl(struct wiphy *wiphy, struct ieee80211_regdomain *rd) regulatory_set_wiphy_regd_sync_rtnl() argument
H A Dreg.h54 int set_regdom(const struct ieee80211_regdomain *rd,
57 unsigned int reg_get_max_bandwidth(const struct ieee80211_regdomain *rd,
94 * We will intersect the rd with the what CRDA tells us should apply
/linux-4.1.27/drivers/net/wireless/rt2x00/
H A Drt2x00usb.c172 struct rt2x00_async_read_data *rd = urb->context; rt2x00usb_register_read_async_cb() local
173 if (rd->callback(rd->rt2x00dev, urb->status, le32_to_cpu(rd->reg))) { rt2x00usb_register_read_async_cb()
175 kfree(rd); rt2x00usb_register_read_async_cb()
177 kfree(rd); rt2x00usb_register_read_async_cb()
186 struct rt2x00_async_read_data *rd; rt2x00usb_register_read_async() local
188 rd = kmalloc(sizeof(*rd), GFP_ATOMIC); rt2x00usb_register_read_async()
189 if (!rd) rt2x00usb_register_read_async()
194 kfree(rd); rt2x00usb_register_read_async()
198 rd->rt2x00dev = rt2x00dev; rt2x00usb_register_read_async()
199 rd->callback = callback; rt2x00usb_register_read_async()
200 rd->cr.bRequestType = USB_VENDOR_REQUEST_IN; rt2x00usb_register_read_async()
201 rd->cr.bRequest = USB_MULTI_READ; rt2x00usb_register_read_async()
202 rd->cr.wValue = 0; rt2x00usb_register_read_async()
203 rd->cr.wIndex = cpu_to_le16(offset); rt2x00usb_register_read_async()
204 rd->cr.wLength = cpu_to_le16(sizeof(u32)); rt2x00usb_register_read_async()
207 (unsigned char *)(&rd->cr), &rd->reg, sizeof(rd->reg), rt2x00usb_register_read_async()
208 rt2x00usb_register_read_async_cb, rd); rt2x00usb_register_read_async()
210 kfree(rd); rt2x00usb_register_read_async()
/linux-4.1.27/arch/microblaze/include/asm/
H A Dpage.h185 #define tophys(rd, rs) addik rd, rs, 0
186 #define tovirt(rd, rs) addik rd, rs, 0
192 #define tophys(rd, rs) \
193 addik rd, rs, (CONFIG_KERNEL_BASE_ADDR - CONFIG_KERNEL_START)
194 #define tovirt(rd, rs) \
195 addik rd, rs, (CONFIG_KERNEL_START - CONFIG_KERNEL_BASE_ADDR)
/linux-4.1.27/arch/sparc/math-emu/
H A Dmath_64.c172 /* ftt tells which ftt it may happen in, r is rd, b is rs2 and a is rs1. The *u arg tells do_mathemu()
358 argp rs1 = NULL, rs2 = NULL, rd = NULL; do_mathemu() local
415 case 1: rd = (argp)&f->regs[freg]; do_mathemu()
456 case FMOVQ: rd->q[0] = rs2->q[0]; rd->q[1] = rs2->q[1]; break; do_mathemu()
457 case FABSQ: rd->q[0] = rs2->q[0] & 0x7fffffffffffffffUL; rd->q[1] = rs2->q[1]; break; do_mathemu()
458 case FNEGQ: rd->q[0] = rs2->q[0] ^ 0x8000000000000000UL; rd->q[1] = rs2->q[1]; break; do_mathemu()
506 case 1: rd->s = IR; break; do_mathemu()
507 case 2: rd->d = XR; break; do_mathemu()
508 case 5: FP_PACK_SP (rd, SR); break; do_mathemu()
509 case 6: FP_PACK_DP (rd, DR); break; do_mathemu()
510 case 7: FP_PACK_QP (rd, QR); break; do_mathemu()
H A Dmath_32.c278 /* r is rd, b is rs2 and a is rs1. The *u arg tells do_one_mathemu()
283 argp rs1 = NULL, rs2 = NULL, rd = NULL; do_one_mathemu() local
396 switch ((type >> 6) & 0x3) { /* and finally rd. This one's a bit different */ do_one_mathemu()
399 /* anything but 0 in the rd field is an error */ do_one_mathemu()
418 rd = (void *)&fregs[freg]; do_one_mathemu()
451 case FMOVS: rd->s = rs2->s; break; do_one_mathemu()
452 case FABSS: rd->s = rs2->s & 0x7fffffff; break; do_one_mathemu()
453 case FNEGS: rd->s = rs2->s ^ 0x80000000; break; do_one_mathemu()
505 case 1: rd->s = IR; break; do_one_mathemu()
506 case 5: FP_PACK_SP (rd, SR); break; do_one_mathemu()
507 case 6: FP_PACK_DP (rd, DR); break; do_one_mathemu()
508 case 7: FP_PACK_QP (rd, QR); break; do_one_mathemu()
/linux-4.1.27/drivers/net/ethernet/seeq/
H A Dsgiseeq.c340 struct sgiseeq_rx_desc *rd; sgiseeq_rx() local
348 rd = &sp->rx_desc[sp->rx_new]; sgiseeq_rx()
349 dma_sync_desc_cpu(dev, rd); sgiseeq_rx()
350 while (!(rd->rdma.cntinfo & HPCDMA_OWN)) { sgiseeq_rx()
351 len = PKT_BUF_SZ - (rd->rdma.cntinfo & HPCDMA_BCNT) - 3; sgiseeq_rx()
352 dma_unmap_single(dev->dev.parent, rd->rdma.pbuf, sgiseeq_rx()
354 pkt_status = rd->skb->data[len]; sgiseeq_rx()
358 if (!ether_addr_equal(rd->skb->data + 6, dev->dev_addr)) { sgiseeq_rx()
360 skb = rd->skb; sgiseeq_rx()
371 skb_copy_to_linear_data(skb, rd->skb->data, len); sgiseeq_rx()
373 newskb = rd->skb; sgiseeq_rx()
387 newskb = rd->skb; sgiseeq_rx()
391 newskb = rd->skb; sgiseeq_rx()
393 rd->skb = newskb; sgiseeq_rx()
394 rd->rdma.pbuf = dma_map_single(dev->dev.parent, sgiseeq_rx()
399 rd->rdma.cntinfo = RCNTINFO_INIT; sgiseeq_rx()
401 dma_sync_desc_dev(dev, rd); sgiseeq_rx()
402 rd = &sp->rx_desc[sp->rx_new]; sgiseeq_rx()
403 dma_sync_desc_cpu(dev, rd); sgiseeq_rx()
/linux-4.1.27/fs/hfsplus/
H A Ddir.c139 struct hfsplus_readdir_data *rd; hfsplus_readdir() local
265 rd = file->private_data; hfsplus_readdir()
266 if (!rd) { hfsplus_readdir()
267 rd = kmalloc(sizeof(struct hfsplus_readdir_data), GFP_KERNEL); hfsplus_readdir()
268 if (!rd) { hfsplus_readdir()
272 file->private_data = rd; hfsplus_readdir()
273 rd->file = file; hfsplus_readdir()
274 list_add(&rd->list, &HFSPLUS_I(inode)->open_dir_list); hfsplus_readdir()
276 memcpy(&rd->key, fd.key, sizeof(struct hfsplus_cat_key)); hfsplus_readdir()
285 struct hfsplus_readdir_data *rd = file->private_data; hfsplus_dir_release() local
286 if (rd) { hfsplus_dir_release()
288 list_del(&rd->list); hfsplus_dir_release()
290 kfree(rd); hfsplus_dir_release()
/linux-4.1.27/drivers/gpu/drm/exynos/
H A Dexynos_drm_dmabuf.c75 struct scatterlist *rd, *wr; exynos_gem_map_dma_buf() local
100 rd = buf->sgt->sgl; exynos_gem_map_dma_buf()
103 sg_set_page(wr, sg_page(rd), rd->length, rd->offset); exynos_gem_map_dma_buf()
104 rd = sg_next(rd); exynos_gem_map_dma_buf()
/linux-4.1.27/drivers/gpu/drm/udl/
H A Dudl_dmabuf.c79 struct scatterlist *rd, *wr; udl_map_dma_buf() local
117 rd = obj->sg->sgl; udl_map_dma_buf()
120 sg_set_page(wr, sg_page(rd), rd->length, rd->offset); udl_map_dma_buf()
121 rd = sg_next(rd); udl_map_dma_buf()
/linux-4.1.27/drivers/net/wireless/zd1211rw/
H A Dzd_rf_al2230.c115 /* for newest (3rd cut) AL2300 */ zd1211_al2230_init_hw()
118 /* for newest (3rd cut) AL2300 */ zd1211_al2230_init_hw()
121 /* for newest (3rd cut) AL2300 */ zd1211_al2230_init_hw()
130 /* for newest (3rd cut) AL2300 */ zd1211_al2230_init_hw()
224 { ZD_CR17, 0x2B }, /* for newest(3rd cut) AL2230 */ zd1211b_al2230_init_hw()
229 { ZD_CR35, 0x3e }, /* for newest(3rd cut) AL2230 */ zd1211b_al2230_init_hw()
231 { ZD_CR46, 0x99 }, /* for newest(3rd cut) AL2230 */ zd1211b_al2230_init_hw()
247 { ZD_CR106, 0x24 }, /* for newest(3rd cut) AL2230 */ zd1211b_al2230_init_hw()
253 { ZD_CR115, 0x26 }, /* 24->26 at 4902 for newest(3rd cut) zd1211b_al2230_init_hw()
H A Dzd_rf_al7230b.c122 /* for newest (3rd cut) AL2300 */ zd1211_al7230b_init_hw()
125 /* for newest (3rd cut) AL2300 */ zd1211_al7230b_init_hw()
128 /* for newest (3rd cut) AL2300 */ zd1211_al7230b_init_hw()
145 /* for newest (3rd cut) AL2300 */ zd1211_al7230b_init_hw()
213 { ZD_CR17, 0x2B }, /* for newest (3rd cut) AL2230 */ zd1211b_al7230b_init_hw()
219 { ZD_CR35, 0x3e }, /* for newest (3rd cut) AL2230 */ zd1211b_al7230b_init_hw()
221 { ZD_CR46, 0x99 }, /* for newest (3rd cut) AL2230 */ zd1211b_al7230b_init_hw()
/linux-4.1.27/drivers/video/fbdev/omap/
H A Dlcd_mipid.c355 } *rd, rd_ctrl[7] = { ls041y3_esd_check_mode2() local
365 rd = rd_ctrl; ls041y3_esd_check_mode2()
366 for (i = 0; i < 3; i++, rd++) ls041y3_esd_check_mode2()
367 mipid_write(md, rd->cmd, (u8 *)rd->wbuf, rd->wlen); ls041y3_esd_check_mode2()
370 mipid_read(md, rd->cmd, rbuf, 2); ls041y3_esd_check_mode2()
371 rd++; ls041y3_esd_check_mode2()
373 for (i = 0; i < 3; i++, rd++) { ls041y3_esd_check_mode2()
375 mipid_write(md, rd->cmd, (u8 *)rd->wbuf, rd->wlen); ls041y3_esd_check_mode2()
/linux-4.1.27/drivers/media/pci/pt3/
H A Dpt3_i2c.c117 bool rd; translate() local
121 rd = !!(msgs[i].flags & I2C_M_RD); translate()
123 put_byte_write(cbuf, msgs[i].addr << 1 | rd); translate()
124 if (rd) translate()
/linux-4.1.27/arch/mips/include/asm/octeon/
H A Dcvmx-asm.h130 asm ("pop %[rd],%[rs]" : [rd] "=d" (result) : [rs] "d" (input))
132 asm ("dpop %[rd],%[rs]" : [rd] "=d" (result) : [rs] "d" (input))
/linux-4.1.27/arch/mips/loongson/lemote-2f/
H A Dec_kb3310b.h115 /* Audio: rd/wr */
119 /* USB port power or not: rd/wr */
142 /* Reset the machine auto-clear: rd/wr */
145 /* Light the led: rd/wr */
/linux-4.1.27/arch/arc/include/uapi/asm/
H A Dswab.h52 * 8051fd98: asl r5,r3,24 ; get 3rd Byte
57 * 8051fdb4: or r2,r2,r5 ; combine 0th and 3rd Bytes
/linux-4.1.27/drivers/of/
H A Ddynamic.c243 struct of_reconfig_data rd; of_attach_node() local
246 memset(&rd, 0, sizeof(rd)); of_attach_node()
247 rd.dn = np; of_attach_node()
257 of_reconfig_notify(OF_RECONFIG_ATTACH_NODE, &rd); of_attach_node()
295 struct of_reconfig_data rd; of_detach_node() local
299 memset(&rd, 0, sizeof(rd)); of_detach_node()
300 rd.dn = np; of_detach_node()
310 of_reconfig_notify(OF_RECONFIG_DETACH_NODE, &rd); of_detach_node()
506 struct of_reconfig_data rd; __of_changeset_entry_notify() local
518 memset(&rd, 0, sizeof(rd)); __of_changeset_entry_notify()
519 rd.dn = ce->np; __of_changeset_entry_notify()
520 ret = of_reconfig_notify(ce->action, &rd); __of_changeset_entry_notify()
H A Dplatform.c507 struct of_reconfig_data *rd = arg; of_platform_notify() local
511 switch (of_reconfig_get_state_change(action, rd)) { of_platform_notify()
514 if (!of_node_check_flag(rd->dn->parent, OF_POPULATED_BUS)) of_platform_notify()
518 if (of_node_check_flag(rd->dn, OF_POPULATED)) of_platform_notify()
522 pdev_parent = of_find_device_by_node(rd->dn->parent); of_platform_notify()
523 pdev = of_platform_device_create(rd->dn, NULL, of_platform_notify()
529 __func__, rd->dn->full_name); of_platform_notify()
538 if (!of_node_check_flag(rd->dn, OF_POPULATED)) of_platform_notify()
542 pdev = of_find_device_by_node(rd->dn); of_platform_notify()
/linux-4.1.27/drivers/net/hamradio/
H A Dhdlcdrv.c455 s->hdlcrx.hbuf.rd = s->hdlcrx.hbuf.wr = 0; hdlcdrv_open()
459 s->hdlctx.hbuf.rd = s->hdlctx.hbuf.wr = 0; hdlcdrv_open()
586 if (s->bitbuf_channel.rd == s->bitbuf_channel.wr) hdlcdrv_ioctl()
589 s->bitbuf_channel.buffer[s->bitbuf_channel.rd]; hdlcdrv_ioctl()
590 s->bitbuf_channel.rd = (s->bitbuf_channel.rd+1) % hdlcdrv_ioctl()
599 if (s->bitbuf_hdlc.rd == s->bitbuf_hdlc.wr) hdlcdrv_ioctl()
602 s->bitbuf_hdlc.buffer[s->bitbuf_hdlc.rd]; hdlcdrv_ioctl()
603 s->bitbuf_hdlc.rd = (s->bitbuf_hdlc.rd+1) % hdlcdrv_ioctl()
651 s->hdlcrx.hbuf.rd = s->hdlcrx.hbuf.wr = 0; hdlcdrv_setup()
656 s->hdlctx.hbuf.rd = s->hdlctx.hbuf.wr = 0; hdlcdrv_setup()
666 s->bitbuf_channel.rd = s->bitbuf_channel.wr = 0; hdlcdrv_setup()
669 s->bitbuf_hdlc.rd = s->bitbuf_hdlc.wr = 0; hdlcdrv_setup()
/linux-4.1.27/drivers/net/ethernet/
H A Dkorina.c184 struct dma_desc *rd) korina_start_rx()
186 korina_start_dma(lp->rx_dma_regs, CPHYSADDR(rd)); korina_start_rx()
190 struct dma_desc *rd) korina_chain_rx()
192 korina_chain_dma(lp->rx_dma_regs, CPHYSADDR(rd)); korina_chain_rx()
351 struct dma_desc *rd = &lp->rd_ring[lp->rx_next_done]; korina_rx() local
357 dma_cache_inv((u32)rd, sizeof(*rd)); korina_rx()
363 devcs = rd->devcs; korina_rx()
365 if ((KORINA_RBSIZE - (u32)DMA_COUNT(rd->control)) == 0) korina_rx()
421 rd->devcs = 0; korina_rx()
425 rd->ca = CPHYSADDR(skb_new->data); korina_rx()
427 rd->ca = CPHYSADDR(skb->data); korina_rx()
429 rd->control = DMA_COUNT(KORINA_RBSIZE) | korina_rx()
436 dma_cache_wback((u32)rd, sizeof(*rd)); korina_rx()
437 rd = &lp->rd_ring[lp->rx_next_done]; korina_rx()
448 rd->devcs = 0; korina_rx()
450 rd->ca = CPHYSADDR(skb->data); korina_rx()
451 dma_cache_wback((u32)rd, sizeof(*rd)); korina_rx()
452 korina_chain_rx(lp, rd); korina_rx()
183 korina_start_rx(struct korina_private *lp, struct dma_desc *rd) korina_start_rx() argument
189 korina_chain_rx(struct korina_private *lp, struct dma_desc *rd) korina_chain_rx() argument
/linux-4.1.27/tools/testing/selftests/net/
H A Dpsock_tpacket.c79 struct iovec *rd; member in struct:ring
252 while (__v1_v2_rx_kernel_ready(ring->rd[frame_num].iov_base, walk_v1_v2_rx()
254 ppd.raw = ring->rd[frame_num].iov_base; walk_v1_v2_rx()
391 while (__v1_v2_tx_kernel_ready(ring->rd[frame_num].iov_base, walk_v1_v2_tx()
394 ppd.raw = ring->rd[frame_num].iov_base; walk_v1_v2_tx()
559 pbd = (struct block_desc *) ring->rd[block_num].iov_base; walk_v3_rx()
655 ring->rd_len = ring->rd_num * sizeof(*ring->rd); setup_ring()
656 ring->rd = malloc(ring->rd_len); setup_ring()
657 if (ring->rd == NULL) { setup_ring()
677 memset(ring->rd, 0, ring->rd_len); mmap_ring()
679 ring->rd[i].iov_base = ring->mm_space + (i * ring->flen); mmap_ring()
680 ring->rd[i].iov_len = ring->flen; mmap_ring()
710 free(ring->rd); unmap_ring()
/linux-4.1.27/drivers/net/ethernet/apm/xgene/
H A Dxgene_enet_xgmac.c103 static bool xgene_enet_rd_indirect(void __iomem *addr, void __iomem *rd, xgene_enet_rd_indirect() argument
120 *rd_data = ioread32(rd); xgene_enet_rd_indirect()
129 void __iomem *addr, *rd, *cmd, *cmd_done; xgene_enet_rd_mac() local
132 rd = pdata->mcx_mac_addr + MAC_READ_REG_OFFSET; xgene_enet_rd_mac()
136 if (!xgene_enet_rd_indirect(addr, rd, cmd, cmd_done, rd_addr, rd_data)) xgene_enet_rd_mac()
/linux-4.1.27/arch/ia64/hp/sim/
H A Dsimscsi.c71 static int rd, wr; variable
103 while ((sc = queue[rd].sc) != NULL) { simscsi_interrupt()
105 queue[rd].sc = NULL; simscsi_interrupt()
109 rd = (rd + 1) % SIMSCSI_REQ_QUEUE_LEN; simscsi_interrupt()
/linux-4.1.27/drivers/net/wireless/brcm80211/brcmfmac/
H A Dsdio.c1391 struct brcmf_sdio_hdrinfo *rd, brcmf_sdio_hdparse()
1419 (roundup(len, bus->blocksize) != rd->len)) { brcmf_sdio_hdparse()
1423 if (type == BRCMF_SDIO_FT_SUB && len > rd->len) { brcmf_sdio_hdparse()
1427 rd->len = len; brcmf_sdio_hdparse()
1434 rd->len = 0; brcmf_sdio_hdparse()
1438 rd->channel = (swheader & SDPCM_CHANNEL_MASK) >> SDPCM_CHANNEL_SHIFT; brcmf_sdio_hdparse()
1439 if (len > MAX_RX_DATASZ && rd->channel != SDPCM_CONTROL_CHANNEL && brcmf_sdio_hdparse()
1444 rd->len = 0; brcmf_sdio_hdparse()
1447 if (type == BRCMF_SDIO_FT_SUPER && rd->channel != SDPCM_GLOM_CHANNEL) { brcmf_sdio_hdparse()
1449 rd->len = 0; brcmf_sdio_hdparse()
1452 if (type == BRCMF_SDIO_FT_SUB && rd->channel != SDPCM_DATA_CHANNEL && brcmf_sdio_hdparse()
1453 rd->channel != SDPCM_EVENT_CHANNEL) { brcmf_sdio_hdparse()
1455 rd->len = 0; brcmf_sdio_hdparse()
1458 rd->dat_offset = brcmf_sdio_getdatoffset(header); brcmf_sdio_hdparse()
1459 if (rd->dat_offset < SDPCM_HDRLEN || rd->dat_offset > rd->len) { brcmf_sdio_hdparse()
1463 rd->len = 0; brcmf_sdio_hdparse()
1466 if (rd->seq_num != rx_seq) { brcmf_sdio_hdparse()
1468 rx_seq, rd->seq_num); brcmf_sdio_hdparse()
1470 rd->seq_num = rx_seq; brcmf_sdio_hdparse()
1475 rd->len_nxtfrm = (swheader & SDPCM_NEXTLEN_MASK) >> SDPCM_NEXTLEN_SHIFT; brcmf_sdio_hdparse()
1476 if (rd->len_nxtfrm << 4 > MAX_RX_DATASZ) { brcmf_sdio_hdparse()
1478 if (rd->channel != SDPCM_GLOM_CHANNEL) brcmf_sdio_hdparse()
1480 rd->len_nxtfrm = 0; brcmf_sdio_hdparse()
1896 struct brcmf_sdio_hdrinfo *rd = &bus->cur_read, rd_new; brcmf_sdio_readframes() local
1904 for (rd->seq_num = bus->rx_seq, rxleft = maxframes; brcmf_sdio_readframes()
1906 rd->seq_num++, rxleft--) { brcmf_sdio_readframes()
1913 cnt = brcmf_sdio_rxglom(bus, rd->seq_num); brcmf_sdio_readframes()
1915 rd->seq_num += cnt - 1; brcmf_sdio_readframes()
1920 rd->len_left = rd->len; brcmf_sdio_readframes()
1923 if (!rd->len) { brcmf_sdio_readframes()
1940 if (brcmf_sdio_hdparse(bus, bus->rxhdr, rd, brcmf_sdio_readframes()
1949 if (rd->channel == SDPCM_CONTROL_CHANNEL) { brcmf_sdio_readframes()
1951 rd->len, brcmf_sdio_readframes()
1952 rd->dat_offset); brcmf_sdio_readframes()
1954 rd->len = rd->len_nxtfrm << 4; brcmf_sdio_readframes()
1955 rd->len_nxtfrm = 0; brcmf_sdio_readframes()
1957 rd->channel = SDPCM_EVENT_CHANNEL; brcmf_sdio_readframes()
1961 rd->len_left = rd->len > BRCMF_FIRSTREAD ? brcmf_sdio_readframes()
1962 rd->len - BRCMF_FIRSTREAD : 0; brcmf_sdio_readframes()
1966 brcmf_sdio_pad(bus, &pad, &rd->len_left); brcmf_sdio_readframes()
1968 pkt = brcmu_pkt_buf_get_skb(rd->len_left + head_read + brcmf_sdio_readframes()
1974 RETRYCHAN(rd->channel)); brcmf_sdio_readframes()
1979 pkt_align(pkt, rd->len_left, bus->head_align); brcmf_sdio_readframes()
1987 rd->len, rd->channel, ret); brcmf_sdio_readframes()
1991 RETRYCHAN(rd->channel)); brcmf_sdio_readframes()
2002 rd_new.seq_num = rd->seq_num; brcmf_sdio_readframes()
2006 rd->len = 0; brcmf_sdio_readframes()
2010 if (rd->len != roundup(rd_new.len, 16)) { brcmf_sdio_readframes()
2012 rd->len, brcmf_sdio_readframes()
2014 rd->len = 0; brcmf_sdio_readframes()
2021 rd->len_nxtfrm = rd_new.len_nxtfrm; brcmf_sdio_readframes()
2022 rd->channel = rd_new.channel; brcmf_sdio_readframes()
2023 rd->dat_offset = rd_new.dat_offset; brcmf_sdio_readframes()
2035 rd->len = 0; brcmf_sdio_readframes()
2045 pkt->data, rd->len, "Rx Data:\n"); brcmf_sdio_readframes()
2048 if (rd->channel == SDPCM_GLOM_CHANNEL) { brcmf_sdio_readframes()
2051 rd->len); brcmf_sdio_readframes()
2053 pkt->data, rd->len, brcmf_sdio_readframes()
2055 __skb_trim(pkt, rd->len); brcmf_sdio_readframes()
2066 rd->len = rd->len_nxtfrm << 4; brcmf_sdio_readframes()
2067 rd->len_nxtfrm = 0; brcmf_sdio_readframes()
2069 rd->channel = SDPCM_EVENT_CHANNEL; brcmf_sdio_readframes()
2074 __skb_trim(pkt, rd->len); brcmf_sdio_readframes()
2075 skb_pull(pkt, rd->dat_offset); brcmf_sdio_readframes()
2078 rd->len = rd->len_nxtfrm << 4; brcmf_sdio_readframes()
2079 rd->len_nxtfrm = 0; brcmf_sdio_readframes()
2081 rd->channel = SDPCM_EVENT_CHANNEL; brcmf_sdio_readframes()
2099 rd->seq_num--; brcmf_sdio_readframes()
2100 bus->rx_seq = rd->seq_num; brcmf_sdio_readframes()
1390 brcmf_sdio_hdparse(struct brcmf_sdio *bus, u8 *header, struct brcmf_sdio_hdrinfo *rd, enum brcmf_sdio_frmtype type) brcmf_sdio_hdparse() argument
/linux-4.1.27/drivers/net/
H A Dvxlan.c387 struct vxlan_rdst *rd, int type) vxlan_fdb_notify()
397 err = vxlan_fdb_info(skb, vxlan, fdb, 0, 0, type, 0, rd); vxlan_fdb_notify()
491 struct vxlan_rdst *rd; vxlan_fdb_find_rdst() local
493 list_for_each_entry(rd, &f->remotes, list) { vxlan_fdb_find_rdst()
494 if (vxlan_addr_equal(&rd->remote_ip, ip) && vxlan_fdb_find_rdst()
495 rd->remote_port == port && vxlan_fdb_find_rdst()
496 rd->remote_vni == vni && vxlan_fdb_find_rdst()
497 rd->remote_ifindex == ifindex) vxlan_fdb_find_rdst()
498 return rd; vxlan_fdb_find_rdst()
508 struct vxlan_rdst *rd; vxlan_fdb_replace() local
510 rd = vxlan_fdb_find_rdst(f, ip, port, vni, ifindex); vxlan_fdb_replace()
511 if (rd) vxlan_fdb_replace()
514 rd = list_first_entry_or_null(&f->remotes, struct vxlan_rdst, list); vxlan_fdb_replace()
515 if (!rd) vxlan_fdb_replace()
517 rd->remote_ip = *ip; vxlan_fdb_replace()
518 rd->remote_port = port; vxlan_fdb_replace()
519 rd->remote_vni = vni; vxlan_fdb_replace()
520 rd->remote_ifindex = ifindex; vxlan_fdb_replace()
529 struct vxlan_rdst *rd; vxlan_fdb_append() local
531 rd = vxlan_fdb_find_rdst(f, ip, port, vni, ifindex); vxlan_fdb_append()
532 if (rd) vxlan_fdb_append()
535 rd = kmalloc(sizeof(*rd), GFP_ATOMIC); vxlan_fdb_append()
536 if (rd == NULL) vxlan_fdb_append()
538 rd->remote_ip = *ip; vxlan_fdb_append()
539 rd->remote_port = port; vxlan_fdb_append()
540 rd->remote_vni = vni; vxlan_fdb_append()
541 rd->remote_ifindex = ifindex; vxlan_fdb_append()
543 list_add_tail_rcu(&rd->list, &f->remotes); vxlan_fdb_append()
545 *rdp = rd; vxlan_fdb_append()
708 struct vxlan_rdst *rd = NULL; vxlan_fdb_create() local
742 &rd); vxlan_fdb_create()
772 vxlan_fdb_append(f, ip, port, vni, ifindex, &rd); vxlan_fdb_create()
780 if (rd == NULL) vxlan_fdb_create()
781 rd = first_remote_rtnl(f); vxlan_fdb_create()
782 vxlan_fdb_notify(vxlan, f, rd, RTM_NEWNEIGH); vxlan_fdb_create()
791 struct vxlan_rdst *rd, *nd; vxlan_fdb_free() local
793 list_for_each_entry_safe(rd, nd, &f->remotes, list) vxlan_fdb_free()
794 kfree(rd); vxlan_fdb_free()
908 struct vxlan_rdst *rd = NULL; vxlan_fdb_delete() local
926 rd = vxlan_fdb_find_rdst(f, &ip, port, vni, ifindex); vxlan_fdb_delete()
927 if (!rd) vxlan_fdb_delete()
936 if (rd && !list_is_singular(&f->remotes)) { vxlan_fdb_delete()
937 list_del_rcu(&rd->list); vxlan_fdb_delete()
938 vxlan_fdb_notify(vxlan, f, rd, RTM_DELNEIGH); vxlan_fdb_delete()
939 kfree_rcu(rd, rcu); vxlan_fdb_delete()
964 struct vxlan_rdst *rd; vxlan_fdb_dump() local
969 list_for_each_entry_rcu(rd, &f->remotes, list) { vxlan_fdb_dump()
974 NLM_F_MULTI, rd); vxlan_fdb_dump()
386 vxlan_fdb_notify(struct vxlan_dev *vxlan, struct vxlan_fdb *fdb, struct vxlan_rdst *rd, int type) vxlan_fdb_notify() argument
/linux-4.1.27/arch/mips/lantiq/xway/
H A Dreset.c72 u32 rd; member in struct:ltq_xrx200_gphy_reset
101 ltq_rcu_w32(ltq_rcu_r32(RCU_RST_REQ) | xrx200_gphy[id].rd, xrx200_gphy_boot()
104 ltq_rcu_w32(ltq_rcu_r32(RCU_RST_REQ) & ~xrx200_gphy[id].rd, xrx200_gphy_boot()
/linux-4.1.27/arch/arm64/include/asm/
H A Dassembler.h155 .macro regs_to_64, rd, lbits, hbits variable
157 .macro regs_to_64, rd, hbits, lbits
159 orr \rd, \lbits, \hbits, lsl #32 variable
/linux-4.1.27/arch/powerpc/sysdev/
H A Dfsl_pci.c864 unsigned int rd, ra, rb, d; mcheck_handle_load() local
866 rd = get_rt(inst); mcheck_handle_load()
876 regs->gpr[rd] = 0xffffffff; mcheck_handle_load()
880 regs->gpr[rd] = 0xffffffff; mcheck_handle_load()
885 regs->gpr[rd] = 0xff; mcheck_handle_load()
889 regs->gpr[rd] = 0xff; mcheck_handle_load()
895 regs->gpr[rd] = 0xffff; mcheck_handle_load()
899 regs->gpr[rd] = 0xffff; mcheck_handle_load()
904 regs->gpr[rd] = ~0UL; mcheck_handle_load()
908 regs->gpr[rd] = ~0UL; mcheck_handle_load()
918 regs->gpr[rd] = 0xffffffff; mcheck_handle_load()
922 regs->gpr[rd] = 0xffffffff; mcheck_handle_load()
927 regs->gpr[rd] = 0xff; mcheck_handle_load()
931 regs->gpr[rd] = 0xff; mcheck_handle_load()
936 regs->gpr[rd] = 0xffff; mcheck_handle_load()
940 regs->gpr[rd] = 0xffff; mcheck_handle_load()
945 regs->gpr[rd] = ~0UL; mcheck_handle_load()
949 regs->gpr[rd] = ~0UL; mcheck_handle_load()
/linux-4.1.27/drivers/input/touchscreen/
H A Dtsc2005.c210 static void tsc2005_setup_read(struct tsc2005_spi_rd *rd, u8 reg, bool last) tsc2005_setup_read() argument
212 memset(rd, 0, sizeof(*rd)); tsc2005_setup_read()
214 rd->spi_tx = (reg | TSC2005_REG_READ) << 16; tsc2005_setup_read()
215 rd->spi_xfer.tx_buf = &rd->spi_tx; tsc2005_setup_read()
216 rd->spi_xfer.rx_buf = &rd->spi_rx; tsc2005_setup_read()
217 rd->spi_xfer.len = 4; tsc2005_setup_read()
218 rd->spi_xfer.bits_per_word = 24; tsc2005_setup_read()
219 rd->spi_xfer.cs_change = !last; tsc2005_setup_read()
/linux-4.1.27/drivers/staging/lustre/lnet/klnds/o2iblnd/
H A Do2iblnd.h837 kiblnd_rd_size (kib_rdma_desc_t *rd) kiblnd_rd_size() argument
842 for (i = size = 0; i < rd->rd_nfrags; i++) kiblnd_rd_size()
843 size += rd->rd_frags[i].rf_nob; kiblnd_rd_size()
849 kiblnd_rd_frag_addr(kib_rdma_desc_t *rd, int index) kiblnd_rd_frag_addr() argument
851 return rd->rd_frags[index].rf_addr; kiblnd_rd_frag_addr()
855 kiblnd_rd_frag_size(kib_rdma_desc_t *rd, int index) kiblnd_rd_frag_size() argument
857 return rd->rd_frags[index].rf_nob; kiblnd_rd_frag_size()
861 kiblnd_rd_frag_key(kib_rdma_desc_t *rd, int index) kiblnd_rd_frag_key() argument
863 return rd->rd_key; kiblnd_rd_frag_key()
867 kiblnd_rd_consume_frag(kib_rdma_desc_t *rd, int index, __u32 nob) kiblnd_rd_consume_frag() argument
869 if (nob < rd->rd_frags[index].rf_nob) { kiblnd_rd_consume_frag()
870 rd->rd_frags[index].rf_addr += nob; kiblnd_rd_consume_frag()
871 rd->rd_frags[index].rf_nob -= nob; kiblnd_rd_consume_frag()
880 kiblnd_rd_msg_size(kib_rdma_desc_t *rd, int msgtype, int n) kiblnd_rd_msg_size() argument
949 kib_rdma_desc_t *rd);
955 kib_rdma_desc_t *rd, int nfrags);
965 kib_rdma_desc_t *rd, __u64 *iova, kib_phys_mr_t **pp_pmr);
H A Do2iblnd_cb.c551 kiblnd_fmr_map_tx(kib_net_t *net, kib_tx_t *tx, kib_rdma_desc_t *rd, int nob) kiblnd_fmr_map_tx() argument
567 for (i = 0, npages = 0; i < rd->rd_nfrags; i++) { kiblnd_fmr_map_tx()
568 for (size = 0; size < rd->rd_frags[i].rf_nob; kiblnd_fmr_map_tx()
570 pages[npages++] = (rd->rd_frags[i].rf_addr & kiblnd_fmr_map_tx()
584 /* If rd is not tx_rd, it's going to get sent to a peer, who will need kiblnd_fmr_map_tx()
586 rd->rd_key = (rd != tx->tx_rd) ? tx->tx_u.fmr.fmr_pfmr->fmr->rkey : kiblnd_fmr_map_tx()
588 rd->rd_frags[0].rf_addr &= ~hdev->ibh_page_mask; kiblnd_fmr_map_tx()
589 rd->rd_frags[0].rf_nob = nob; kiblnd_fmr_map_tx()
590 rd->rd_nfrags = 1; kiblnd_fmr_map_tx()
596 kiblnd_pmr_map_tx(kib_net_t *net, kib_tx_t *tx, kib_rdma_desc_t *rd, int nob) kiblnd_pmr_map_tx() argument
609 iova = rd->rd_frags[0].rf_addr & ~hdev->ibh_page_mask; kiblnd_pmr_map_tx()
614 rc = kiblnd_pmr_pool_map(pps, hdev, rd, &iova, &tx->tx_u.pmr); kiblnd_pmr_map_tx()
620 /* If rd is not tx_rd, it's going to get sent to a peer, who will need kiblnd_pmr_map_tx()
622 rd->rd_key = (rd != tx->tx_rd) ? tx->tx_u.pmr->pmr_mr->rkey : kiblnd_pmr_map_tx()
624 rd->rd_nfrags = 1; kiblnd_pmr_map_tx()
625 rd->rd_frags[0].rf_addr = iova; kiblnd_pmr_map_tx()
626 rd->rd_frags[0].rf_nob = nob; kiblnd_pmr_map_tx()
656 kib_rdma_desc_t *rd, int nfrags) kiblnd_map_tx()
664 /* If rd is not tx_rd, it's going to get sent to a peer and I'm the kiblnd_map_tx()
666 tx->tx_dmadir = (rd != tx->tx_rd) ? DMA_FROM_DEVICE : DMA_TO_DEVICE; kiblnd_map_tx()
669 rd->rd_nfrags = kiblnd_map_tx()
673 for (i = 0, nob = 0; i < rd->rd_nfrags; i++) { kiblnd_map_tx()
674 rd->rd_frags[i].rf_nob = kiblnd_sg_dma_len( kiblnd_map_tx()
676 rd->rd_frags[i].rf_addr = kiblnd_sg_dma_address( kiblnd_map_tx()
678 nob += rd->rd_frags[i].rf_nob; kiblnd_map_tx()
682 mr = kiblnd_find_rd_dma_mr(hdev, rd); kiblnd_map_tx()
685 rd->rd_key = (rd != tx->tx_rd) ? mr->rkey : mr->lkey; kiblnd_map_tx()
690 return kiblnd_fmr_map_tx(net, tx, rd, nob); kiblnd_map_tx()
692 return kiblnd_pmr_map_tx(net, tx, rd, nob); kiblnd_map_tx()
699 kiblnd_setup_rd_iov(lnet_ni_t *ni, kib_tx_t *tx, kib_rdma_desc_t *rd, kiblnd_setup_rd_iov() argument
748 return kiblnd_map_tx(ni, tx, rd, sg - tx->tx_frags); kiblnd_setup_rd_iov()
752 kiblnd_setup_rd_kiov(lnet_ni_t *ni, kib_tx_t *tx, kib_rdma_desc_t *rd, kiblnd_setup_rd_kiov() argument
788 return kiblnd_map_tx(ni, tx, rd, sg - tx->tx_frags); kiblnd_setup_rd_kiov()
655 kiblnd_map_tx(lnet_ni_t *ni, kib_tx_t *tx, kib_rdma_desc_t *rd, int nfrags) kiblnd_map_tx() argument
/linux-4.1.27/net/9p/
H A Dtrans_fd.c150 * @rd: reference to file to read from
157 struct file *rd; member in struct:p9_trans_fd
243 if (!ts->rd->f_op->poll) p9_fd_poll()
249 ret = ts->rd->f_op->poll(ts->rd, pt); p9_fd_poll()
253 if (ts->rd != ts->wr) { p9_fd_poll()
282 if (!(ts->rd->f_flags & O_NONBLOCK)) p9_fd_read()
285 ret = kernel_read(ts->rd, ts->rd->f_pos, v, len); p9_fd_read()
793 ts->rd = fget(rfd); p9_fd_open()
795 if (!ts->rd || !ts->wr) { p9_fd_open()
796 if (ts->rd) p9_fd_open()
797 fput(ts->rd); p9_fd_open()
830 p->wr = p->rd = file; p9_socket_open()
834 p->rd->f_flags |= O_NONBLOCK; p9_socket_open()
881 if (ts->rd) p9_fd_close()
882 fput(ts->rd); p9_fd_close()
/linux-4.1.27/drivers/net/ethernet/apple/
H A Dmace.c432 volatile struct dbdma_regs __iomem *rd = mp->rx_dma; mace_open() local
472 out_le32(&rd->control, (RUN|PAUSE|FLUSH|WAKE) << 16); /* clear run bit */ mace_open()
473 out_le32(&rd->cmdptr, virt_to_bus(mp->rx_cmds)); mace_open()
474 out_le32(&rd->control, (RUN << 16) | RUN); mace_open()
502 volatile struct dbdma_regs __iomem *rd = mp->rx_dma; mace_close() local
510 rd->control = cpu_to_le32((RUN|PAUSE|FLUSH|WAKE) << 16); /* clear run bit */ mace_close()
811 volatile struct dbdma_regs __iomem *rd = mp->rx_dma; mace_tx_timeout() local
833 cp = bus_to_virt(le32_to_cpu(rd->cmdptr)); mace_tx_timeout()
834 dbdma_reset(rd); mace_tx_timeout()
836 out_le32(&rd->cmdptr, virt_to_bus(cp)); mace_tx_timeout()
837 out_le32(&rd->control, (RUN << 16) | RUN); mace_tx_timeout()
880 volatile struct dbdma_regs __iomem *rd = mp->rx_dma; mace_rxdma_intr() local
971 if ((le32_to_cpu(rd->status) & ACTIVE) != 0) { mace_rxdma_intr()
972 out_le32(&rd->control, (PAUSE << 16) | PAUSE); mace_rxdma_intr()
973 while ((in_le32(&rd->status) & ACTIVE) != 0) mace_rxdma_intr()
980 out_le32(&rd->control, ((RUN|WAKE) << 16) | (RUN|WAKE)); mace_rxdma_intr()
H A Dbmac.c229 volatile struct dbdma_regs __iomem *rd = bp->rx_dma; bmac_enable_and_reset_chip() local
232 if (rd) bmac_enable_and_reset_chip()
233 dbdma_reset(rd); bmac_enable_and_reset_chip()
406 volatile struct dbdma_regs __iomem *rd = bp->rx_dma; bmac_start_chip() local
410 dbdma_continue(rd); bmac_start_chip()
477 volatile struct dbdma_regs __iomem *rd = bp->rx_dma; bmac_suspend() local
486 rd->control = cpu_to_le32(DBDMA_CLEAR(RUN|PAUSE|FLUSH|WAKE)); /* clear run bit */ bmac_suspend()
613 volatile struct dbdma_regs __iomem *rd = bp->rx_dma; bmac_init_rx_ring() local
637 dbdma_reset(rd); bmac_init_rx_ring()
638 out_le32(&rd->cmdptr, virt_to_bus(bp->rx_cmds)); bmac_init_rx_ring()
683 volatile struct dbdma_regs __iomem *rd = bp->rx_dma; bmac_rxdma_intr() local
742 dbdma_continue(rd); bmac_rxdma_intr()
1397 volatile struct dbdma_regs __iomem *rd = bp->rx_dma; bmac_close() local
1414 rd->control = cpu_to_le32(DBDMA_CLEAR(RUN|PAUSE|FLUSH|WAKE)); /* clear run bit */ bmac_close()
1481 volatile struct dbdma_regs __iomem *rd = bp->rx_dma; bmac_tx_timeout() local
1509 cp = bus_to_virt(le32_to_cpu(rd->cmdptr)); bmac_tx_timeout()
1510 out_le32(&rd->control, DBDMA_CLEAR(RUN|PAUSE|FLUSH|WAKE|ACTIVE|DEAD)); bmac_tx_timeout()
1512 out_le32(&rd->cmdptr, virt_to_bus(cp)); bmac_tx_timeout()
1513 out_le32(&rd->control, DBDMA_SET(RUN|WAKE)); bmac_tx_timeout()
/linux-4.1.27/arch/xtensa/platforms/iss/
H A Dconsole.c103 int rd = 1; rs_poll() local
109 rd = simc_read(0, &c, 1); rs_poll()
110 if (rd <= 0) rs_poll()
118 if (rd) rs_poll()
/linux-4.1.27/arch/x86/boot/
H A Dbioscall.S68 movw 68(%esp), %di /* Original %cx == 3rd argument */
/linux-4.1.27/drivers/gpu/drm/nouveau/nvif/
H A Dobject.c83 struct nvif_ioctl_rd_v0 rd; nvif_object_rd() member in struct:__anon4197
86 .rd.size = size, nvif_object_rd()
87 .rd.addr = addr, nvif_object_rd()
94 return args.rd.data; nvif_object_rd()
/linux-4.1.27/drivers/media/common/b2c2/
H A Dflexcop-misc.c54 [FC_AIR_ATSC3] = "Air2PC/AirStar 2 ATSC 3rd generation (HD5000)",
/linux-4.1.27/include/uapi/linux/
H A Dppp-comp.h51 /* Macros for handling the 3rd byte of the BSD-Compress config option. */
H A Dserio.h18 * bit masks for use in "interrupt" flags (3rd argument)
/linux-4.1.27/arch/nios2/mm/
H A Dpgtable.c29 * resv |way |rd | we|pid |dbl|bad|perm|d
/linux-4.1.27/arch/arm/mach-orion5x/
H A Dboard-rd88f5182.c110 if (of_machine_is_compatible("marvell,rd-88f5182-nas")) rd88f5182_pci_init()
/linux-4.1.27/arch/arm/kernel/
H A Dentry-ftrace.S60 .macro mcount_adjust_addr rd, rn
61 bic \rd, \rn, #1 @ clear the Thumb bit if present
62 sub \rd, \rd, #MCOUNT_INSN_SIZE
H A Dentry-header.S172 @ mode. Useful in Thumb-2 mode where "stm/ldm rd, {sp, lr}^" is not
175 .macro store_user_sp_lr, rd, rtemp, offset = 0
180 str sp, [\rd, #\offset] @ save sp_usr
181 str lr, [\rd, #\offset + 4] @ save lr_usr
187 .macro load_user_sp_lr, rd, rtemp, offset = 0
192 ldr sp, [\rd, #\offset] @ load sp_usr
193 ldr lr, [\rd, #\offset + 4] @ load lr_usr
/linux-4.1.27/net/ipx/
H A Dipx_route.c103 static int ipxrtr_create(struct ipx_route_definition *rd) ipxrtr_create() argument
109 intrfc = ipxitf_find_using_net(rd->ipx_router_network); ipxrtr_create()
112 rc = ipxrtr_add_route(rd->ipx_network, intrfc, rd->ipx_router_node); ipxrtr_create()
/linux-4.1.27/security/selinux/ss/
H A Dconstraint.h34 #define CEXPR_XTARGET 16 /* special 3rd target for validatetrans rule */
/linux-4.1.27/drivers/hid/
H A Dhid-sony.c933 static void sixaxis_parse_report(struct sony_sc *sc, __u8 *rd, int size) sixaxis_parse_report() argument
945 if (rd[30] >= 0xee) { sixaxis_parse_report()
947 battery_charging = !(rd[30] & 0x01); sixaxis_parse_report()
950 __u8 index = rd[30] <= 5 ? rd[30] : 5; sixaxis_parse_report()
963 static void dualshock4_parse_report(struct sony_sc *sc, __u8 *rd, int size) dualshock4_parse_report() argument
982 cable_state = (rd[offset] >> 4) & 0x01; dualshock4_parse_report()
983 battery_capacity = rd[offset] & 0x0F; dualshock4_parse_report()
1022 x = rd[offset+1] | ((rd[offset+2] & 0xF) << 8); dualshock4_parse_report()
1023 y = ((rd[offset+2] & 0xF0) >> 4) | (rd[offset+3] << 4); dualshock4_parse_report()
1027 !(rd[offset] >> 7)); dualshock4_parse_report()
1036 __u8 *rd, int size) sony_raw_event()
1044 if ((sc->quirks & SIXAXIS_CONTROLLER) && rd[0] == 0x01 && size == 49) { sony_raw_event()
1045 swap(rd[41], rd[42]); sony_raw_event()
1046 swap(rd[43], rd[44]); sony_raw_event()
1047 swap(rd[45], rd[46]); sony_raw_event()
1048 swap(rd[47], rd[48]); sony_raw_event()
1050 sixaxis_parse_report(sc, rd, size); sony_raw_event()
1051 } else if (((sc->quirks & DUALSHOCK4_CONTROLLER_USB) && rd[0] == 0x01 && sony_raw_event()
1053 && rd[0] == 0x11 && size == 78)) { sony_raw_event()
1054 dualshock4_parse_report(sc, rd, size); sony_raw_event()
1553 /* Set flag for all leds off, required for 3rd party INTEC controller */ sixaxis_state_worker()
1035 sony_raw_event(struct hid_device *hdev, struct hid_report *report, __u8 *rd, int size) sony_raw_event() argument
/linux-4.1.27/drivers/net/wireless/ath/
H A Dregd.c546 u16 rd = ath_regd_get_eepromRD(reg); ath_regd_is_eeprom_valid() local
549 if (rd & COUNTRY_ERD_FLAG) { ath_regd_is_eeprom_valid()
551 u16 cc = rd & ~COUNTRY_ERD_FLAG; ath_regd_is_eeprom_valid()
560 if (rd != CTRY_DEFAULT) ath_regd_is_eeprom_valid()
564 if (regDomainPairs[i].reg_domain == rd) ath_regd_is_eeprom_valid()
568 "ath: invalid regulatory domain/country code 0x%x\n", rd); ath_regd_is_eeprom_valid()
585 /* EEPROM rd code to regpair mapping */
599 static u16 ath_regd_get_default_country(u16 rd) ath_regd_get_default_country() argument
601 if (rd & COUNTRY_ERD_FLAG) { ath_regd_get_default_country()
603 u16 cc = rd & ~COUNTRY_ERD_FLAG; ath_regd_get_default_country()
/linux-4.1.27/drivers/net/ethernet/amd/
H A D7990.c275 volatile struct lance_rx_desc *rd; lance_rx() local
297 for (rd = &ib->brx_ring[lp->rx_new]; /* For each Rx ring we own... */ lance_rx()
298 !((bits = rd->rmd1_bits) & LE_R1_OWN); lance_rx()
299 rd = &ib->brx_ring[lp->rx_new]) { lance_rx()
321 int len = (rd->mblength & 0xfff) - 4; lance_rx()
326 rd->mblength = 0; lance_rx()
327 rd->rmd1_bits = LE_R1_OWN; lance_rx()
344 rd->mblength = 0; lance_rx()
345 rd->rmd1_bits = LE_R1_OWN; lance_rx()
H A Da2065.c249 volatile struct lance_rx_desc *rd; lance_rx() local
269 for (rd = &ib->brx_ring[lp->rx_new]; lance_rx()
270 !((bits = rd->rmd1_bits) & LE_R1_OWN); lance_rx()
271 rd = &ib->brx_ring[lp->rx_new]) { lance_rx()
293 int len = (rd->mblength & 0xfff) - 4; lance_rx()
298 rd->mblength = 0; lance_rx()
299 rd->rmd1_bits = LE_R1_OWN; lance_rx()
316 rd->mblength = 0; lance_rx()
317 rd->rmd1_bits = LE_R1_OWN; lance_rx()
H A Dsunlance.c511 struct lance_rx_desc *rd; lance_rx_dvma() local
516 for (rd = &ib->brx_ring [entry]; lance_rx_dvma()
517 !((bits = rd->rmd1_bits) & LE_R1_OWN); lance_rx_dvma()
518 rd = &ib->brx_ring [entry]) { lance_rx_dvma()
534 len = (rd->mblength & 0xfff) - 4; lance_rx_dvma()
539 rd->mblength = 0; lance_rx_dvma()
540 rd->rmd1_bits = LE_R1_OWN; lance_rx_dvma()
558 rd->mblength = 0; lance_rx_dvma()
559 rd->rmd1_bits = LE_R1_OWN; lance_rx_dvma()
680 struct lance_rx_desc __iomem *rd; lance_rx_pio() local
686 for (rd = &ib->brx_ring [entry]; lance_rx_pio()
687 !((bits = sbus_readb(&rd->rmd1_bits)) & LE_R1_OWN); lance_rx_pio()
688 rd = &ib->brx_ring [entry]) { lance_rx_pio()
704 len = (sbus_readw(&rd->mblength) & 0xfff) - 4; lance_rx_pio()
709 sbus_writew(0, &rd->mblength); lance_rx_pio()
710 sbus_writeb(LE_R1_OWN, &rd->rmd1_bits); lance_rx_pio()
726 sbus_writew(0, &rd->mblength); lance_rx_pio()
727 sbus_writeb(LE_R1_OWN, &rd->rmd1_bits); lance_rx_pio()
H A Ddeclance.c240 #define rds_ptr(rd, rt, type) \
241 ((volatile u16 *)((u8 *)(rd) + rds_off(rt, type)))
558 volatile u16 *rd; lance_rx() local
582 for (rd = lib_ptr(ib, brx_ring[lp->rx_new], lp->type); lance_rx()
583 !((bits = *rds_ptr(rd, rmd1, lp->type)) & LE_R1_OWN); lance_rx()
584 rd = lib_ptr(ib, brx_ring[lp->rx_new], lp->type)) { lance_rx()
606 len = (*rds_ptr(rd, mblength, lp->type) & 0xfff) - 4; lance_rx()
611 *rds_ptr(rd, mblength, lp->type) = 0; lance_rx()
612 *rds_ptr(rd, rmd1, lp->type) = lance_rx()
632 *rds_ptr(rd, mblength, lp->type) = 0; lance_rx()
633 *rds_ptr(rd, length, lp->type) = -RX_BUFF_SIZE | 0xf000; lance_rx()
634 *rds_ptr(rd, rmd1, lp->type) = lance_rx()
/linux-4.1.27/sound/soc/davinci/
H A Ddavinci-mcasp.c1023 struct davinci_mcasp_ruledata *rd = rule->private; davinci_mcasp_hw_rule_rate() local
1031 if (channels > rd->mcasp->tdm_slots) davinci_mcasp_hw_rule_rate()
1032 channels = rd->mcasp->tdm_slots; davinci_mcasp_hw_rule_rate()
1041 davinci_mcasp_calc_clk_div(rd->mcasp, bclk_freq, &ppm); davinci_mcasp_hw_rule_rate()
1046 dev_dbg(rd->mcasp->dev, davinci_mcasp_hw_rule_rate()
1057 struct davinci_mcasp_ruledata *rd = rule->private; davinci_mcasp_hw_rule_format() local
1066 if (channels > rd->mcasp->tdm_slots) davinci_mcasp_hw_rule_format()
1067 channels = rd->mcasp->tdm_slots; davinci_mcasp_hw_rule_format()
1074 davinci_mcasp_calc_clk_div(rd->mcasp, bclk_freq, &ppm); davinci_mcasp_hw_rule_format()
1081 dev_dbg(rd->mcasp->dev, davinci_mcasp_hw_rule_format()
1091 struct davinci_mcasp_ruledata *rd = rule->private; davinci_mcasp_hw_rule_channels() local
1096 int max_chan_per_wire = rd->mcasp->tdm_slots < ci->max ? davinci_mcasp_hw_rule_channels()
1097 rd->mcasp->tdm_slots : ci->max; davinci_mcasp_hw_rule_channels()
1105 davinci_mcasp_calc_clk_div(rd->mcasp, bclk_freq, &ppm); davinci_mcasp_hw_rule_channels()
1110 if (c1 == rd->mcasp->tdm_slots) { davinci_mcasp_hw_rule_channels()
1111 for (c = c1; c <= rd->serializers*c1 && davinci_mcasp_hw_rule_channels()
1119 dev_dbg(rd->mcasp->dev, davinci_mcasp_hw_rule_channels()
/linux-4.1.27/drivers/net/ethernet/qlogic/qlcnic/
H A Dqlcnic_hw.c31 u32 rd[4]; member in struct:qlcnic_ms_reg_ctrl
1323 ms->rd[0] = QLCNIC_MS_RDDATA_LO; qlcnic_set_ms_controls()
1325 ms->rd[1] = QLCNIC_MS_RDDATA_HI; qlcnic_set_ms_controls()
1328 ms->rd[2] = QLCNIC_MS_RDDATA_ULO; qlcnic_set_ms_controls()
1329 ms->rd[3] = QLCNIC_MS_RDDATA_UHI; qlcnic_set_ms_controls()
1332 ms->rd[0] = QLCNIC_MS_RDDATA_ULO; qlcnic_set_ms_controls()
1334 ms->rd[1] = QLCNIC_MS_RDDATA_UHI; qlcnic_set_ms_controls()
1337 ms->rd[2] = QLCNIC_MS_RDDATA_LO; qlcnic_set_ms_controls()
1338 ms->rd[3] = QLCNIC_MS_RDDATA_HI; qlcnic_set_ms_controls()
1390 qlcnic_ind_wr(adapter, ms.wd[0], qlcnic_ind_rd(adapter, ms.rd[0])); qlcnic_pci_mem_write_2M()
1391 qlcnic_ind_wr(adapter, ms.wd[1], qlcnic_ind_rd(adapter, ms.rd[1])); qlcnic_pci_mem_write_2M()
1465 temp = qlcnic_ind_rd(adapter, ms.rd[3]); qlcnic_pci_mem_read_2M()
1467 val |= qlcnic_ind_rd(adapter, ms.rd[2]); qlcnic_pci_mem_read_2M()
/linux-4.1.27/kernel/sched/
H A Drt.c269 return atomic_read(&rq->rd->rto_count); rt_overloaded()
277 cpumask_set_cpu(rq->cpu, rq->rd->rto_mask); rt_set_overload()
288 atomic_inc(&rq->rd->rto_count); rt_set_overload()
297 atomic_dec(&rq->rd->rto_count); rt_clear_overload()
298 cpumask_clear_cpu(rq->cpu, rq->rd->rto_mask); rt_clear_overload()
529 return this_rq()->rd->span; sched_rt_period_mask()
628 struct root_domain *rd = rq_of_rt_rq(rt_rq)->rd; do_balance_runtime() local
632 weight = cpumask_weight(rd->span); do_balance_runtime()
636 for_each_cpu(i, rd->span) { do_balance_runtime()
682 struct root_domain *rd = rq->rd; __disable_runtime() local
716 for_each_cpu(i, rd->span) { for_each_rt_rq()
1023 cpupri_set(&rq->rd->cpupri, rq->cpu, prio); inc_rt_prio_smp()
1039 cpupri_set(&rq->rd->cpupri, rq->cpu, rt_rq->highest_prio.curr); dec_rt_prio_smp()
1376 !cpupri_find(&rq->rd->cpupri, rq->curr, NULL)) check_preempt_equal_prio()
1384 && cpupri_find(&rq->rd->cpupri, p, NULL)) check_preempt_equal_prio()
1562 if (!cpupri_find(&task_rq(task)->rd->cpupri, task, lowest_mask)) find_lowest_rq()
1808 cpu = cpumask_next(prev_cpu, rq->rd->rto_mask); rto_next_cpu()
1825 cpu = cpumask_first(rq->rd->rto_mask); rto_next_cpu()
1973 for_each_cpu(cpu, this_rq->rd->rto_mask) { pull_rt_task()
2109 cpupri_set(&rq->rd->cpupri, rq->cpu, rq->rt.highest_prio.curr); rq_online_rt()
2120 cpupri_set(&rq->rd->cpupri, rq->cpu, CPUPRI_INVALID); rq_offline_rt()
H A Ddeadline.c92 return atomic_read(&rq->rd->dlo_count); dl_overloaded()
100 cpumask_set_cpu(rq->cpu, rq->rd->dlo_mask); dl_set_overload()
108 atomic_inc(&rq->rd->dlo_count); dl_set_overload()
116 atomic_dec(&rq->rd->dlo_count); dl_clear_overload()
117 cpumask_clear_cpu(rq->cpu, rq->rd->dlo_mask); dl_clear_overload()
751 cpudl_set(&rq->rd->cpudl, rq->cpu, deadline, 1); inc_dl_deadline()
775 cpudl_set(&rq->rd->cpudl, rq->cpu, 0, 0); dec_dl_deadline()
783 cpudl_set(&rq->rd->cpudl, rq->cpu, entry->deadline, 1); dec_dl_deadline()
1031 cpudl_find(&rq->rd->cpudl, rq->curr, NULL) == -1) check_preempt_equal_dl()
1039 cpudl_find(&rq->rd->cpudl, p, NULL) != -1) check_preempt_equal_dl()
1253 best_cpu = cpudl_find(&task_rq(task)->rd->cpudl, find_later_rq()
1492 for_each_cpu(cpu, this_rq->rd->dlo_mask) { pull_dl_task()
1587 src_rd = rq->rd; set_cpus_allowed_dl()
1647 cpudl_set_freecpu(&rq->rd->cpudl, rq->cpu); rq_online_dl()
1649 cpudl_set(&rq->rd->cpudl, rq->cpu, rq->dl.earliest_dl.curr, 1); rq_online_dl()
1658 cpudl_set(&rq->rd->cpudl, rq->cpu, 0, 0); rq_offline_dl()
1659 cpudl_clear_freecpu(&rq->rd->cpudl, rq->cpu); rq_offline_dl()
/linux-4.1.27/drivers/net/ethernet/via/
H A Dvia-velocity.c1534 struct rx_desc *rd = &(vptr->rx.ring[idx]); velocity_alloc_rx_buf() local
1554 *((u32 *) & (rd->rdesc0)) = 0; velocity_alloc_rx_buf()
1555 rd->size = cpu_to_le16(vptr->rx.buf_sz) | RX_INTEN; velocity_alloc_rx_buf()
1556 rd->pa_low = cpu_to_le32(rd_info->skb_dma); velocity_alloc_rx_buf()
1557 rd->pa_high = 0; velocity_alloc_rx_buf()
1567 struct rx_desc *rd = vptr->rx.ring + dirty; velocity_rx_refill() local
1570 if (rd->rdesc0.len & OWNED_BY_NIC) velocity_rx_refill()
1605 struct rx_desc *rd = vptr->rx.ring + i; velocity_free_rd_ring() local
1607 memset(rd, 0, sizeof(*rd)); velocity_free_rd_ring()
1971 * @rd: receive packet descriptor
1977 static inline void velocity_rx_csum(struct rx_desc *rd, struct sk_buff *skb) velocity_rx_csum() argument
1981 if (rd->rdesc1.CSM & CSM_IPKT) { velocity_rx_csum()
1982 if (rd->rdesc1.CSM & CSM_IPOK) { velocity_rx_csum()
1983 if ((rd->rdesc1.CSM & CSM_TCPKT) || velocity_rx_csum()
1984 (rd->rdesc1.CSM & CSM_UDPKT)) { velocity_rx_csum()
1985 if (!(rd->rdesc1.CSM & CSM_TUPOK)) velocity_rx_csum()
1997 * @rd: receive packet descriptor
2054 struct rx_desc *rd = &(vptr->rx.ring[idx]); velocity_receive_frame() local
2055 int pkt_len = le16_to_cpu(rd->rdesc0.len) & 0x3fff; velocity_receive_frame()
2058 if (rd->rdesc0.RSR & (RSR_STP | RSR_EDP)) { velocity_receive_frame()
2064 if (rd->rdesc0.RSR & RSR_MAR) velocity_receive_frame()
2077 if (rd->rdesc0.RSR & RSR_RL) { velocity_receive_frame()
2083 velocity_rx_csum(rd, skb); velocity_receive_frame()
2098 if (rd->rdesc0.RSR & RSR_DETAG) { velocity_receive_frame()
2099 u16 vid = swab16(le16_to_cpu(rd->rdesc1.PQTAG)); velocity_receive_frame()
2126 struct rx_desc *rd = vptr->rx.ring + rd_curr; velocity_rx_srv() local
2131 if (rd->rdesc0.len & OWNED_BY_NIC) velocity_rx_srv()
2139 if (rd->rdesc0.RSR & (RSR_RXOK | RSR_CE | RSR_RL)) { velocity_rx_srv()
2143 if (rd->rdesc0.RSR & RSR_CRC) velocity_rx_srv()
2145 if (rd->rdesc0.RSR & RSR_FAE) velocity_rx_srv()
2151 rd->size |= RX_INTEN; velocity_rx_srv()
/linux-4.1.27/arch/sparc/mm/
H A Dswift.S59 rd %psr, %g1
125 rd %psr, %g1
/linux-4.1.27/arch/x86/crypto/
H A Daes-x86_64-asm_64.S83 #define round(TAB,OFFSET,r1,r2,r3,r4,r5,r6,r7,r8,ra,rb,rc,rd) \
125 xorl OFFSET+12(r8),rd ## E; \
/linux-4.1.27/include/linux/platform_data/
H A Dvideo-pxafb.h93 * 2. a0cs{rd,wr}_set_hld are controlled by the same register bits
96 * 3. same to {rd,wr}_pulse_width
/linux-4.1.27/net/dsa/
H A Dtag_brcm.c39 /* 3rd byte in the tag */
48 /* 3rd byte in the tag */
/linux-4.1.27/arch/sparc/power/
H A Dhibernate_asm.S63 rd %asi, %g1
/linux-4.1.27/arch/mips/include/asm/sgi/
H A Dgio.h52 * IDs above 0x50/0xd0 are of 3rd party boards.
/linux-4.1.27/drivers/net/ethernet/intel/igb/
H A De1000_82575.h174 #define E1000_DCA_RXCTRL_DESC_RRO_EN (1 << 9) /* DCA Rx rd Desc Relax Order */
178 #define E1000_DCA_TXCTRL_DESC_RRO_EN (1 << 9) /* Tx rd Desc Relax Order */
180 #define E1000_DCA_TXCTRL_DATA_RRO_EN (1 << 13) /* Tx rd data Relax Order */
/linux-4.1.27/drivers/media/usb/hdpvr/
H A Dhdpvr.h203 * 3rd and 4th byte (little endian): peak bitrate in 100 000 bit/s
227 * 3rd byte MF enable chroma, min=0, max=1
252 * 3rd and 4th byte (little endian): vertical resolution
/linux-4.1.27/crypto/
H A Dserpent_generic.c587 u32 rs[4], rd[4]; tnepres_encrypt() local
594 serpent_encrypt(tfm, (u8 *)rd, (u8 *)rs); tnepres_encrypt()
596 d[0] = swab32(rd[3]); tnepres_encrypt()
597 d[1] = swab32(rd[2]); tnepres_encrypt()
598 d[2] = swab32(rd[1]); tnepres_encrypt()
599 d[3] = swab32(rd[0]); tnepres_encrypt()
607 u32 rs[4], rd[4]; tnepres_decrypt() local
614 serpent_decrypt(tfm, (u8 *)rd, (u8 *)rs); tnepres_decrypt()
616 d[0] = swab32(rd[3]); tnepres_decrypt()
617 d[1] = swab32(rd[2]); tnepres_decrypt()
618 d[2] = swab32(rd[1]); tnepres_decrypt()
619 d[3] = swab32(rd[0]); tnepres_decrypt()
/linux-4.1.27/include/scsi/
H A Dsg.h130 (_GET_s yield result via 'int *' 3rd argument unless otherwise indicated) */
136 #define SG_SET_TRANSFORM 0x2204 /* N.B. 3rd arg is not pointer but value: */
137 /* 3rd arg = 0 to disable transform, 1 to enable it */
143 /* The following ioctl has a 'sg_scsi_id_t *' object as its 3rd argument. */
165 /* Returns -EBUSY if occupied. 3rd argument pointer to int (see next) */
/linux-4.1.27/arch/powerpc/platforms/pseries/
H A Dhotplug-memory.c709 struct of_reconfig_data *rd = data; pseries_memory_notifier() local
714 err = pseries_add_mem_node(rd->dn); pseries_memory_notifier()
717 err = pseries_remove_mem_node(rd->dn); pseries_memory_notifier()
720 if (!strcmp(rd->prop->name, "ibm,dynamic-memory")) pseries_memory_notifier()
721 err = pseries_update_drconf_memory(rd); pseries_memory_notifier()
/linux-4.1.27/drivers/media/v4l2-core/
H A Dvideobuf2-dma-contig.c242 struct scatterlist *rd, *wr; vb2_dc_dmabuf_ops_attach() local
261 rd = buf->sgt_base->sgl; vb2_dc_dmabuf_ops_attach()
264 sg_set_page(wr, sg_page(rd), rd->length, rd->offset); vb2_dc_dmabuf_ops_attach()
265 rd = sg_next(rd); vb2_dc_dmabuf_ops_attach()
H A Dvideobuf2-dma-sg.c445 struct scatterlist *rd, *wr; vb2_dma_sg_dmabuf_ops_attach() local
464 rd = buf->dma_sgt->sgl; vb2_dma_sg_dmabuf_ops_attach()
467 sg_set_page(wr, sg_page(rd), rd->length, rd->offset); vb2_dma_sg_dmabuf_ops_attach()
468 rd = sg_next(rd); vb2_dma_sg_dmabuf_ops_attach()
/linux-4.1.27/drivers/mtd/nand/
H A Dnand_bbt.c847 struct nand_bbt_descr *rd, *rd2; check_create() local
858 rd = NULL; check_create()
869 rd = md; check_create()
872 rd = td; check_create()
875 rd = td; check_create()
879 rd = td; check_create()
882 rd = md; check_create()
890 rd = td; check_create()
909 if (rd) { check_create()
910 res = read_abs_bbt(mtd, buf, rd, chipsel); check_create()
913 rd->pages[i] = -1; check_create()
914 rd->version[i] = 0; check_create()
/linux-4.1.27/drivers/net/ethernet/intel/ixgbevf/
H A Ddefines.h290 #define IXGBE_DCA_RXCTRL_DESC_RRO_EN (1 << 9) /* Rx rd Desc Relax Order */
295 #define IXGBE_DCA_TXCTRL_DESC_RRO_EN (1 << 9) /* Tx rd Desc Relax Order */
297 #define IXGBE_DCA_TXCTRL_DATA_RRO_EN (1 << 13) /* Tx rd data Relax Order */
/linux-4.1.27/fs/qnx4/
H A Dinode.c155 int rd, rl; qnx4_checkroot() local
161 rd = le32_to_cpu(s->RootDir.di_first_xtnt.xtnt_blk) - 1; qnx4_checkroot()
164 bh = sb_bread(sb, rd + j); /* root dir, first block */ qnx4_checkroot()

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