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Searched refs:levels (Results 1 – 200 of 255) sorted by relevance

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/linux-4.1.27/drivers/gpu/drm/radeon/
Drv730_dpm.c247 &table->ACPIState.levels[0].vddc); in rv730_populate_smc_acpi_state()
248 table->ACPIState.levels[0].gen2PCIE = pi->pcie_gen2 ? in rv730_populate_smc_acpi_state()
250 table->ACPIState.levels[0].gen2XSP = in rv730_populate_smc_acpi_state()
254 &table->ACPIState.levels[0].vddc); in rv730_populate_smc_acpi_state()
255 table->ACPIState.levels[0].gen2PCIE = 0; in rv730_populate_smc_acpi_state()
297 table->ACPIState.levels[0].mclk.mclk730.vMPLL_FUNC_CNTL = cpu_to_be32(mpll_func_cntl); in rv730_populate_smc_acpi_state()
298 table->ACPIState.levels[0].mclk.mclk730.vMPLL_FUNC_CNTL2 = cpu_to_be32(mpll_func_cntl_2); in rv730_populate_smc_acpi_state()
299 table->ACPIState.levels[0].mclk.mclk730.vMPLL_FUNC_CNTL3 = cpu_to_be32(mpll_func_cntl_3); in rv730_populate_smc_acpi_state()
300 table->ACPIState.levels[0].mclk.mclk730.vMCLK_PWRMGT_CNTL = cpu_to_be32(mclk_pwrmgt_cntl); in rv730_populate_smc_acpi_state()
301 table->ACPIState.levels[0].mclk.mclk730.vDLL_CNTL = cpu_to_be32(dll_cntl); in rv730_populate_smc_acpi_state()
[all …]
Drv740_dpm.c335 &table->ACPIState.levels[0].vddc); in rv740_populate_smc_acpi_state()
336 table->ACPIState.levels[0].gen2PCIE = in rv740_populate_smc_acpi_state()
339 table->ACPIState.levels[0].gen2XSP = in rv740_populate_smc_acpi_state()
343 &table->ACPIState.levels[0].vddc); in rv740_populate_smc_acpi_state()
344 table->ACPIState.levels[0].gen2PCIE = 0; in rv740_populate_smc_acpi_state()
374 table->ACPIState.levels[0].mclk.mclk770.vMPLL_AD_FUNC_CNTL = cpu_to_be32(mpll_ad_func_cntl); in rv740_populate_smc_acpi_state()
375 table->ACPIState.levels[0].mclk.mclk770.vMPLL_AD_FUNC_CNTL_2 = cpu_to_be32(mpll_ad_func_cntl_2); in rv740_populate_smc_acpi_state()
376 table->ACPIState.levels[0].mclk.mclk770.vMPLL_DQ_FUNC_CNTL = cpu_to_be32(mpll_dq_func_cntl); in rv740_populate_smc_acpi_state()
377 table->ACPIState.levels[0].mclk.mclk770.vMPLL_DQ_FUNC_CNTL_2 = cpu_to_be32(mpll_dq_func_cntl_2); in rv740_populate_smc_acpi_state()
378 table->ACPIState.levels[0].mclk.mclk770.vMCLK_PWRMGT_CNTL = cpu_to_be32(mclk_pwrmgt_cntl); in rv740_populate_smc_acpi_state()
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Dcypress_dpm.c775 &smc_state->levels[0], in cypress_convert_power_state_to_smc()
782 &smc_state->levels[1], in cypress_convert_power_state_to_smc()
789 &smc_state->levels[2], in cypress_convert_power_state_to_smc()
794 smc_state->levels[0].arbValue = MC_CG_ARB_FREQ_F1; in cypress_convert_power_state_to_smc()
795 smc_state->levels[1].arbValue = MC_CG_ARB_FREQ_F2; in cypress_convert_power_state_to_smc()
796 smc_state->levels[2].arbValue = MC_CG_ARB_FREQ_F3; in cypress_convert_power_state_to_smc()
799 smc_state->levels[0].ACIndex = 2; in cypress_convert_power_state_to_smc()
800 smc_state->levels[1].ACIndex = 3; in cypress_convert_power_state_to_smc()
801 smc_state->levels[2].ACIndex = 4; in cypress_convert_power_state_to_smc()
803 smc_state->levels[0].ACIndex = 0; in cypress_convert_power_state_to_smc()
[all …]
Dsumo_dpm.c348 u32 highest_engine_clock = ps->levels[ps->num_levels - 1].sclk; in sumo_program_bsp()
412 m_a = asi * ps->levels[i].sclk / 100; in sumo_program_at()
671 pi->boost_pl = new_ps->levels[new_ps->num_levels - 1]; in sumo_patch_boost_state()
763 sumo_program_power_level(rdev, &new_ps->levels[i], i); in sumo_program_power_levels_0_to_n()
845 if (new_ps->levels[new_ps->num_levels - 1].sclk >= in sumo_set_uvd_clock_before_set_eng_clock()
846 current_ps->levels[current_ps->num_levels - 1].sclk) in sumo_set_uvd_clock_before_set_eng_clock()
863 if (new_ps->levels[new_ps->num_levels - 1].sclk < in sumo_set_uvd_clock_after_set_eng_clock()
864 current_ps->levels[current_ps->num_levels - 1].sclk) in sumo_set_uvd_clock_after_set_eng_clock()
1054 current_vddc = current_ps->levels[current_index].vddc_index; in sumo_patch_thermal_state()
1055 current_sclk = current_ps->levels[current_index].sclk; in sumo_patch_thermal_state()
[all …]
Drv770_dpm.c290 smc_state->levels[i].aT = cpu_to_be32(a_t); in rv770_populate_smc_t()
296 smc_state->levels[RV770_SMC_PERFORMANCE_LEVELS_PER_SWSTATE - 1].aT = in rv770_populate_smc_t()
310 smc_state->levels[i].bSP = cpu_to_be32(pi->dsp); in rv770_populate_smc_sp()
312 smc_state->levels[RV770_SMC_PERFORMANCE_LEVELS_PER_SWSTATE - 1].bSP = in rv770_populate_smc_sp()
686 &smc_state->levels[0], in rv770_convert_power_state_to_smc()
693 &smc_state->levels[1], in rv770_convert_power_state_to_smc()
700 &smc_state->levels[2], in rv770_convert_power_state_to_smc()
705 smc_state->levels[0].arbValue = MC_CG_ARB_FREQ_F1; in rv770_convert_power_state_to_smc()
706 smc_state->levels[1].arbValue = MC_CG_ARB_FREQ_F2; in rv770_convert_power_state_to_smc()
707 smc_state->levels[2].arbValue = MC_CG_ARB_FREQ_F3; in rv770_convert_power_state_to_smc()
[all …]
Dtrinity_dpm.c847 trinity_program_power_level(rdev, &new_ps->levels[i], i); in trinity_program_power_levels_0_to_n()
967 if (new_ps->levels[new_ps->num_levels - 1].sclk >= in trinity_set_uvd_clock_before_set_eng_clock()
968 current_ps->levels[current_ps->num_levels - 1].sclk) in trinity_set_uvd_clock_before_set_eng_clock()
981 if (new_ps->levels[new_ps->num_levels - 1].sclk < in trinity_set_uvd_clock_after_set_eng_clock()
982 current_ps->levels[current_ps->num_levels - 1].sclk) in trinity_set_uvd_clock_after_set_eng_clock()
1313 ps->levels[0] = pi->boot_pl; in trinity_patch_boot_state()
1336 pi->current_ps.levels[0] = pi->boot_pl; in trinity_construct_boot_state()
1391 current_vddc = current_ps->levels[current_index].vddc_index; in trinity_patch_thermal_state()
1392 current_sclk = current_ps->levels[current_index].sclk; in trinity_patch_thermal_state()
1398 ps->levels[0].vddc_index = current_vddc; in trinity_patch_thermal_state()
[all …]
Dni_dpm.c1692 table->initialState.levels[0].mclk.vMPLL_AD_FUNC_CNTL = in ni_populate_smc_initial_state()
1694 table->initialState.levels[0].mclk.vMPLL_AD_FUNC_CNTL_2 = in ni_populate_smc_initial_state()
1696 table->initialState.levels[0].mclk.vMPLL_DQ_FUNC_CNTL = in ni_populate_smc_initial_state()
1698 table->initialState.levels[0].mclk.vMPLL_DQ_FUNC_CNTL_2 = in ni_populate_smc_initial_state()
1700 table->initialState.levels[0].mclk.vMCLK_PWRMGT_CNTL = in ni_populate_smc_initial_state()
1702 table->initialState.levels[0].mclk.vDLL_CNTL = in ni_populate_smc_initial_state()
1704 table->initialState.levels[0].mclk.vMPLL_SS = in ni_populate_smc_initial_state()
1706 table->initialState.levels[0].mclk.vMPLL_SS2 = in ni_populate_smc_initial_state()
1708 table->initialState.levels[0].mclk.mclk_value = in ni_populate_smc_initial_state()
1711 table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL = in ni_populate_smc_initial_state()
[all …]
Dsi_dpm.c2314 smc_state->levels[0].dpm2.MaxPS = 0; in si_populate_power_containment_values()
2315 smc_state->levels[0].dpm2.NearTDPDec = 0; in si_populate_power_containment_values()
2316 smc_state->levels[0].dpm2.AboveSafeInc = 0; in si_populate_power_containment_values()
2317 smc_state->levels[0].dpm2.BelowSafeInc = 0; in si_populate_power_containment_values()
2318 smc_state->levels[0].dpm2.PwrEfficiencyRatio = 0; in si_populate_power_containment_values()
2368 …smc_state->levels[i].dpm2.MaxPS = (u8)((SISLANDS_DPM2_MAX_PULSE_SKIP * (max_sclk - min_sclk)) / ma… in si_populate_power_containment_values()
2369 smc_state->levels[i].dpm2.NearTDPDec = SISLANDS_DPM2_NEAR_TDP_DEC; in si_populate_power_containment_values()
2370 smc_state->levels[i].dpm2.AboveSafeInc = SISLANDS_DPM2_ABOVE_SAFE_INC; in si_populate_power_containment_values()
2371 smc_state->levels[i].dpm2.BelowSafeInc = SISLANDS_DPM2_BELOW_SAFE_INC; in si_populate_power_containment_values()
2372 smc_state->levels[i].dpm2.PwrEfficiencyRatio = cpu_to_be16(pwr_efficiency_ratio); in si_populate_power_containment_values()
[all …]
Dkv_dpm.c1716 if ((table->entries[i].clk >= new_ps->levels[0].sclk) || in kv_set_valid_clock_range()
1724 if (table->entries[i].clk <= new_ps->levels[new_ps->num_levels - 1].sclk) in kv_set_valid_clock_range()
1730 if ((new_ps->levels[0].sclk - table->entries[pi->highest_valid].clk) > in kv_set_valid_clock_range()
1731 (table->entries[pi->lowest_valid].clk - new_ps->levels[new_ps->num_levels - 1].sclk)) in kv_set_valid_clock_range()
1741 if (table->entries[i].sclk_frequency >= new_ps->levels[0].sclk || in kv_set_valid_clock_range()
1750 new_ps->levels[new_ps->num_levels - 1].sclk) in kv_set_valid_clock_range()
1756 if ((new_ps->levels[0].sclk - in kv_set_valid_clock_range()
1759 new_ps->levels[new_ps->num_levels -1].sclk)) in kv_set_valid_clock_range()
2188 if (ps->levels[i].sclk < sclk) in kv_apply_state_adjust_rules()
2189 ps->levels[i].sclk = sclk; in kv_apply_state_adjust_rules()
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Dbtc_dpm.c1407 &table->ULVState.levels[0], in btc_populate_ulv_state()
1410 table->ULVState.levels[0].arbValue = MC_CG_ARB_FREQ_F0; in btc_populate_ulv_state()
1411 table->ULVState.levels[0].ACIndex = 1; in btc_populate_ulv_state()
1413 table->ULVState.levels[1] = table->ULVState.levels[0]; in btc_populate_ulv_state()
1414 table->ULVState.levels[2] = table->ULVState.levels[0]; in btc_populate_ulv_state()
1432 table->ACPIState.levels[0].ACIndex = 0; in btc_populate_smc_acpi_state()
1433 table->ACPIState.levels[1].ACIndex = 0; in btc_populate_smc_acpi_state()
1434 table->ACPIState.levels[2].ACIndex = 0; in btc_populate_smc_acpi_state()
Dtrinity_dpm.h49 struct trinity_pl levels[SUMO_MAX_HARDWARE_POWERLEVELS]; member
Dci_dpm.c3254 SMU7_Discrete_GraphicsLevel *levels = pi->smc_state_table.GraphicsLevel; in ci_populate_all_graphic_levels() local
3257 memset(levels, 0, level_array_size); in ci_populate_all_graphic_levels()
3279 (u8 *)levels, level_array_size, in ci_populate_all_graphic_levels()
3301 SMU7_Discrete_MemoryLevel *levels = pi->smc_state_table.MemoryLevel; in ci_populate_all_memory_levels() local
3304 memset(levels, 0, level_array_size); in ci_populate_all_memory_levels()
3336 (u8 *)levels, level_array_size, in ci_populate_all_memory_levels()
4177 u32 tmp, levels, i; in ci_dpm_force_performance_level() local
4183 levels = 0; in ci_dpm_force_performance_level()
4186 levels++; in ci_dpm_force_performance_level()
4187 if (levels) { in ci_dpm_force_performance_level()
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Drv770_smc.h135 RV770_SMC_HW_PERFORMANCE_LEVEL levels[RV770_SMC_PERFORMANCE_LEVELS_PER_SWSTATE]; member
Dkv_dpm.h82 struct kv_pl levels[SUMO_MAX_HARDWARE_POWERLEVELS]; member
Dsumo_dpm.h45 struct sumo_pl levels[SUMO_MAX_HARDWARE_POWERLEVELS]; member
Dnislands_smc.h141 NISLANDS_SMC_HW_PERFORMANCE_LEVEL levels[1]; member
Dsislands_smc.h189 SISLANDS_SMC_HW_PERFORMANCE_LEVEL levels[1]; member
/linux-4.1.27/sound/oss/
Dpas2_mixer.c39 static int *levels; variable
132 levels[whichDev] = mixer_output(right, left, 63, 0x01, 0); in pas_mixer_set()
140 levels[whichDev] = mixer_output(right, left, 12, 0x03, 0); in pas_mixer_set()
143 levels[whichDev] = mixer_output(right, left, 12, 0x04, 0); in pas_mixer_set()
147 levels[whichDev] = mixer_output(right, left, 31, 0x10 | 0x00, mixer); in pas_mixer_set()
150 levels[whichDev] = mixer_output(right, left, 31, 0x10 | 0x05, mixer); in pas_mixer_set()
153 levels[whichDev] = mixer_output(right, left, 31, 0x10 | 0x07, mixer); in pas_mixer_set()
156 levels[whichDev] = mixer_output(right, left, 31, 0x10 | 0x06, mixer); in pas_mixer_set()
159 levels[whichDev] = mixer_output(right, left, 31, 0x10 | 0x02, mixer); in pas_mixer_set()
162 levels[whichDev] = mixer_output(right, left, 31, 0x10 | 0x03, mixer); in pas_mixer_set()
[all …]
Dwaveartist.c67 static unsigned short levels[SOUND_MIXER_NRDEVICES] = { variable
110 unsigned short *levels; /* cache of volume settings */ member
938 lev_left = devc->levels[whichDev] & 0xff; in waveartist_mixer_update()
939 lev_right = devc->levels[whichDev] >> 8; in waveartist_mixer_update()
1060 devc->levels[dev] = lev_l | lev_r << 8; in waveartist_decode_mixer()
1076 return devc->levels[dev]; in waveartist_get_mixer()
1404 devc->levels = levels; in attach_waveartist()
1637 devc->levels[dev] = lev_l | lev_r << 8; in netwinder_decode_mixer()
1641 devc->levels[SOUND_MIXER_MIC] &= 0xff; in netwinder_decode_mixer()
1642 devc->levels[SOUND_MIXER_MIC] |= lev_l << 8; in netwinder_decode_mixer()
[all …]
Dsb_mixer.c253 return devc->levels[dev]; in sb_mixer_get()
327 devc->levels[dev] = left | (right << 8); in smw_mixer_set()
329 val = ((devc->levels[SOUND_MIXER_TREBLE] & 0xff) * 16 / (unsigned) 100) << 4; in smw_mixer_set()
330 val |= ((devc->levels[SOUND_MIXER_BASS] & 0xff) * 16 / (unsigned) 100) & 0x0f; in smw_mixer_set()
334 val = (((devc->levels[SOUND_MIXER_TREBLE] >> 8) & 0xff) * 16 / (unsigned) 100) << 4; in smw_mixer_set()
335 val |= (((devc->levels[SOUND_MIXER_BASS] >> 8) & 0xff) * 16 / (unsigned) 100) & 0x0f; in smw_mixer_set()
351 devc->levels[dev] = left | (right << 8); in smw_mixer_set()
385 if (retval >= 0) devc->levels[dev] = retval; in sb_mixer_set()
660 devc->levels = load_mixer_volumes(name, smg_default_levels, 1); in sb_mixer_reset()
662 devc->levels = load_mixer_volumes(name, sb_default_levels, 1); in sb_mixer_reset()
[all …]
Dsoundcard.c85 int *load_mixer_volumes(char *name, int *levels, int present) in load_mixer_volumes() argument
93 return mixer_vols[i].levels; in load_mixer_volumes()
98 return levels; in load_mixer_volumes()
110 mixer_vols[n].levels[i] = levels[i]; in load_mixer_volumes()
111 return mixer_vols[n].levels; in load_mixer_volumes()
122 load_mixer_volumes(buf.name, buf.levels, 0); in set_mixer_levels()
Dsb.h111 int *levels; member
Dad1848.c96 int *levels; member
502 return devc->levels[dev]; in ad1848_mixer_get()
563 devc->levels[dev] = retvol; in ad1848_mixer_set()
641 devc->levels = load_mixer_volumes(name, default_mixer_levels, 1); in ad1848_mixer_reset()
646 ad1848_mixer_set(devc, i, devc->levels[i]); in ad1848_mixer_reset()
651 devc->mixer_output_port = devc->levels[31] | AUDIO_HEADPHONE | AUDIO_LINE_OUT; in ad1848_mixer_reset()
1583 devc->levels = NULL; in ad1848_detect()
Ddev_table.h243 int *load_mixer_volumes(char *name, int *levels, int present);
Dsb_ess.c1683 value = devc->levels[dev];
1711 value = devc->levels[i];
/linux-4.1.27/Documentation/arm64/
Dmemory.txt7 Linux kernel. The architecture allows up to 4 levels of translation
8 tables with a 4KB page size and up to 3 levels with a 64KB page size.
10 AArch64 Linux uses either 3 levels or 4 levels of translation tables
13 64KB pages, only 2 levels of translation tables, allowing 42-bit (4TB)
24 AArch64 Linux memory layout with 4KB pages + 3 levels:
32 AArch64 Linux memory layout with 4KB pages + 4 levels:
40 AArch64 Linux memory layout with 64KB pages + 2 levels:
48 AArch64 Linux memory layout with 64KB pages + 3 levels:
Dbooting.txt10 The AArch64 exception model is made up of a number of exception levels
/linux-4.1.27/drivers/video/backlight/
Dpwm_bl.c32 unsigned int *levels; member
84 if (pb->levels) in compute_duty_cycle()
85 duty_cycle = pb->levels[brightness]; in compute_duty_cycle()
156 size_t size = sizeof(*data->levels) * data->max_brightness; in pwm_backlight_parse_dt()
158 data->levels = devm_kzalloc(dev, size, GFP_KERNEL); in pwm_backlight_parse_dt()
159 if (!data->levels) in pwm_backlight_parse_dt()
163 data->levels, in pwm_backlight_parse_dt()
226 if (data->levels) { in pwm_backlight_probe()
230 if (data->levels[i] > pb->scale) in pwm_backlight_probe()
231 pb->scale = data->levels[i]; in pwm_backlight_probe()
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/linux-4.1.27/Documentation/scheduler/
Dsched-nice-design.txt2 nice-levels implementation in the new Linux scheduler.
4 Nice levels were always pretty weak under Linux and people continuously
12 In the O(1) scheduler (in 2003) we changed negative nice levels to be
54 To sum it up: we always wanted to make nice levels more consistent, but
79 nice levels were not 'punchy enough', so lots of people had to resort to
86 To address the first complaint (of nice levels being not "punchy"
88 (and granularity was made a separate concept from nice levels) and thus
94 To address the second complaint (of nice levels not being consistent),
96 tasks, regardless of their absolute nice levels. So on the new
100 levels were changed to be "multiplicative" (or exponential) - that way
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D00-INDEX12 - How and why the scheduler's nice levels are implemented.
Dsched-design-CFS.txt46 with a few add-on embellishments like nice levels, multiprocessing and various
104 The CFS scheduler has a much stronger handling of nice levels and SCHED_BATCH
150 priority levels, instead of 140 in the previous scheduler) and it needs no
Dsched-rt-group.txt178 the limited static priority levels 0-99. With deadline scheduling you need to
Dsched-stats.txt18 are no architectures which need more than three domain levels. The first
/linux-4.1.27/drivers/acpi/
Dvideo.c205 int *levels; member
272 if (vd->brightness->levels[i] == cur_level) in acpi_video_get_brightness()
289 vd->brightness->levels[request_level]); in acpi_video_set_brightness()
319 if (level == video->brightness->levels[offset]) { in video_get_cur_state()
338 level = video->brightness->levels[state - 1]; in video_set_cur_state()
356 union acpi_object **levels) in acpi_video_device_lcd_query_levels() argument
363 *levels = NULL; in acpi_video_device_lcd_query_levels()
375 *levels = obj; in acpi_video_device_lcd_query_levels()
400 if (level == device->brightness->levels[state]) { in acpi_video_device_lcd_set_level()
604 level = device->brightness->levels[bqc_value + 2]; in acpi_video_bqc_value_to_level()
[all …]
/linux-4.1.27/Documentation/devicetree/bindings/video/backlight/
Dpwm-backlight.txt6 - brightness-levels: Array of distinct brightness levels. Typically these
12 array defined by the "brightness-levels" property)
30 brightness-levels = <0 4 8 16 32 64 128 255>;
/linux-4.1.27/Documentation/cpuidle/
Dcore.txt2 Supporting multiple CPU idle levels in kernel
8 Various CPUs today support multiple idle levels that are differentiated
Dgovernor.txt4 Supporting multiple CPU idle levels in kernel
Ddriver.txt3 Supporting multiple CPU idle levels in kernel
Dsysfs.txt3 Supporting multiple CPU idle levels in kernel
/linux-4.1.27/Documentation/ABI/
DREADME3 everchanging nature of Linux, and the differing maturity levels, these
6 We have four different levels of ABI stability, as shown by the four
7 different subdirectories in this location. Interfaces may change levels
10 The different levels of stability are:
61 How things move between levels:
/linux-4.1.27/drivers/md/
Ddm-verity.c71 unsigned char levels; /* the number of tree levels */ member
365 if (likely(v->levels)) { in verity_verify_io()
382 for (i = v->levels - 1; i >= 0; i--) { in verity_verify_io()
497 for (i = v->levels - 2; i >= 0; i--) { in verity_prefetch_io()
919 v->levels = 0; in verity_ctr()
921 while (v->hash_per_block_bits * v->levels < 64 && in verity_ctr()
923 (v->hash_per_block_bits * v->levels)) in verity_ctr()
924 v->levels++; in verity_ctr()
926 if (v->levels > DM_VERITY_MAX_LEVELS) { in verity_ctr()
933 for (i = v->levels - 1; i >= 0; i--) { in verity_ctr()
Ddm-thin-metadata.c406 pmd->info.levels = 2; in __setup_btree_details()
417 pmd->tl_info.levels = 1; in __setup_btree_details()
425 pmd->bl_info.levels = 1; in __setup_btree_details()
433 pmd->details_info.levels = 1; in __setup_btree_details()
DKconfig88 an error free MD (multiple device) to the higher levels of the
113 RAID-10 provides a variety of layouts that provide different levels
189 This brings the redundancy (and uptime) of RAID levels across the
/linux-4.1.27/Documentation/acpi/
Dvideo_extension.txt56 The first two levels are for when laptop are on AC or on battery and are
57 not used by Linux currently. The remaining 10 levels are supported levels
62 the range of available brightness levels is from 0 to 9 (max_brightness)
Ddebug.txt75 The ACPI interpreter uses several different levels, but the Linux
82 The possible levels are defined in include/acpi/acoutput.h. Reading
/linux-4.1.27/drivers/iommu/
Dio-pgtable-arm.c49 #define ARM_LPAE_START_LVL(d) (ARM_LPAE_MAX_LEVELS - (d)->levels)
56 ((((d)->levels - ((l) - ARM_LPAE_START_LVL(d) + 1)) \
191 int levels; member
577 data->levels = DIV_ROUND_UP(va_bits, data->bits_per_level); in arm_lpae_alloc_pgtable()
580 pgd_bits = va_bits - (data->bits_per_level * (data->levels - 1)); in arm_lpae_alloc_pgtable()
688 if (data->levels == ARM_LPAE_MAX_LEVELS) { in arm_64_lpae_alloc_pgtable_s2()
694 data->levels--; in arm_64_lpae_alloc_pgtable_s2()
857 data->levels, data->pgd_size, data->pg_shift, in arm_lpae_dump_ops()
Damd_iommu.c3510 int levels, ret; in amd_iommu_domain_enable_v2() local
3516 for (levels = 0; (pasids - 1) & ~0x1ff; pasids >>= 9) in amd_iommu_domain_enable_v2()
3517 levels += 1; in amd_iommu_domain_enable_v2()
3519 if (levels > amd_iommu_max_glx_val) in amd_iommu_domain_enable_v2()
3538 domain->glx = levels; in amd_iommu_domain_enable_v2()
/linux-4.1.27/drivers/md/persistent-data/
Ddm-btree.c198 return f->level < (info->levels - 1); in is_internal_level()
351 unsigned level, last_level = info->levels - 1; in dm_btree_lookup()
358 for (level = 0; level < info->levels; level++) { in dm_btree_lookup()
664 unsigned level, index = -1, last_level = info->levels - 1; in insert()
673 for (level = 0; level < (info->levels - 1); level++) { in insert()
808 for (level = 0; level < info->levels; level++) { in dm_btree_find_key()
810 level == info->levels - 1 ? NULL : &root); in dm_btree_find_key()
884 BUG_ON(info->levels > 1); in dm_btree_walk()
Ddm-btree.h87 unsigned levels; member
Ddm-btree-remove.c555 unsigned level, last_level = info->levels - 1; in dm_btree_remove()
563 for (level = 0; level < info->levels; level++) { in dm_btree_remove()
Ddm-space-map-common.c196 ll->bitmap_info.levels = 1; in sm_ll_init()
209 ll->ref_count_info.levels = 1; in sm_ll_init()
Ddm-array.c625 info->btree_info.levels = 1; in dm_array_info_init()
/linux-4.1.27/include/linux/
Dpwm_backlight.h15 unsigned int *levels; member
Dqnx6_fs.h88 __u8 levels; member
/linux-4.1.27/fs/qnx6/
Dinode.c217 pr_debug("inode_levels: %02x\n", sb->Inode.levels); in qnx6_superblock_debug()
418 if (sb1->Inode.levels > QNX6_PTR_MAX_LEVELS) { in qnx6_fill_super()
420 QNX6_PTR_MAX_LEVELS, sb1->Inode.levels); in qnx6_fill_super()
423 if (sb1->Longfile.levels > QNX6_PTR_MAX_LEVELS) { in qnx6_fill_super()
425 QNX6_PTR_MAX_LEVELS, sb1->Longfile.levels); in qnx6_fill_super()
512 ei->di_filelevels = p->levels; in qnx6_private_inode()
/linux-4.1.27/arch/arm/boot/dts/
Dimx6dl-tx6u-811x.dts34 brightness-levels = < 0 1 2 3 4 5 6 7 8 9
56 brightness-levels = < 0 1 2 3 4 5 6 7 8 9
Dimx6q-tx6q-1110.dts34 brightness-levels = < 0 1 2 3 4 5 6 7 8 9
56 brightness-levels = < 0 1 2 3 4 5 6 7 8 9
Dwm8850-w70v2.dts23 brightness-levels = <0 40 60 80 100 130 190 255>;
Dimx53-tx53-x13x.dts30 brightness-levels = <
50 brightness-levels = <
Dimx6dl-aristainetos_7.dts58 brightness-levels = <0 4 8 16 32 64 128 255>;
Dimx6dl-aristainetos_4.dts22 brightness-levels = <0 4 8 16 32 64 128 255>;
Dimx6dl-tx6dl-comtft.dts32 brightness-levels = < 0 1 2 3 4 5 6 7 8 9
Dimx6q-tx6q-1010-comtft.dts32 brightness-levels = < 0 1 2 3 4 5 6 7 8 9
Dvf-colibri-eval-v3.dtsi51 brightness-levels = <0 4 8 16 32 64 128 255>;
Dimx6q-tx6q-1020-comtft.dts32 brightness-levels = < 0 1 2 3 4 5 6 7 8 9
Dtegra20-medcom-wide.dts50 brightness-levels = <0 4 8 16 32 64 128 255>;
Dimx28-cfa10058.dts141 brightness-levels = <0 4 8 16 32 64 128 255>;
Dimx6qdl-sabrelite.dtsi118 brightness-levels = <0 4 8 16 32 64 128 255>;
127 brightness-levels = <0 4 8 16 32 64 128 255>;
Dimx6qdl-nitrogen6x.dtsi119 brightness-levels = <0 4 8 16 32 64 128 255>;
128 brightness-levels = <0 4 8 16 32 64 128 255>;
Dimx23-evk.dts156 brightness-levels = <0 4 8 16 32 64 128 255>;
Dimx6dl-tx6u-801x.dts32 brightness-levels = < 0 1 2 3 4 5 6 7 8 9
Dimx6q-tx6q-1010.dts32 brightness-levels = < 0 1 2 3 4 5 6 7 8 9
Dimx28-cfa10057.dts174 brightness-levels = <0 4 8 16 32 64 128 255>;
Dimx28-cfa10055.dts164 brightness-levels = <0 4 8 16 32 64 128 255>;
Dimx6q-tx6q-1020.dts32 brightness-levels = < 0 1 2 3 4 5 6 7 8 9
Dtegra30-colibri-eval-v3.dts120 brightness-levels = <255 128 64 32 16 8 4 0>;
Dimx28-apf28dev.dts217 brightness-levels = <0 4 8 16 32 64 128 255>;
Ds5pv210-smdkv210.dts49 brightness-levels = <0 4 8 16 32 64 128 255>;
Dtegra30-apalis-eval.dts180 brightness-levels = <255 231 223 207 191 159 127 0>;
Dimx53-mba53.dts27 brightness-levels = <0 24 28 32 36 40 44 48 52 56 60 64 68 72 76 80 84 88 92 96 100>;
Dimx28-m28cu3.dts207 brightness-levels = <0 4 8 16 32 64 128 255>;
Drk3288-evb.dtsi23 brightness-levels = <
Dimx28-m28evk.dts235 brightness-levels = <0 4 8 16 32 64 128 255>;
Dimx53-tx53-x03x.dts159 brightness-levels = <
Dimx53-m53evk.dts51 brightness-levels = <0 4 8 16 32 64 128 255>;
Dr8a7740-armadillo800eva.dts143 brightness-levels = <0 1 2 4 8 16 32 64 128 255>;
Dtegra114-tn7.dts269 brightness-levels = <0 4 8 16 32 64 128 255>;
Dimx28-eukrea-mbmx28lc.dtsi26 brightness-levels = <0 25 50 75 100 125 150 175 200 225 255>;
Dimx28-evk.dts375 brightness-levels = <0 4 8 16 32 64 128 255>;
Dimx28-cfa10049.dts424 brightness-levels = <0 4 8 16 32 64 128 255>;
Dimx6qdl-gw52xx.dtsi33 brightness-levels = <0 4 8 16 32 64 128 255>;
Dimx6qdl-sabreauto.dtsi42 brightness-levels = <0 4 8 16 32 64 128 255>;
Dimx6qdl-gw53xx.dtsi34 brightness-levels = <0 4 8 16 32 64 128 255>;
Dimx6qdl-gw54xx.dtsi34 brightness-levels = <0 4 8 16 32 64 128 255>;
Dimx6sx-sdb.dtsi30 brightness-levels = <0 4 8 16 32 64 128 255>;
Dimx6qdl-sabresd.dtsi121 brightness-levels = <0 4 8 16 32 64 128 255>;
Dimx6sl-evk.dts26 brightness-levels = <0 4 8 16 32 64 128 255>;
Dtegra20-paz00.dts498 brightness-levels = <0 16 32 48 64 80 96 112 128 144 160 176 192 208 224 240 255>;
Dtegra30-cardhu.dtsi410 brightness-levels = <0 4 8 16 32 64 128 255>;
Dtegra124-nyan.dtsi441 brightness-levels =
Dimx28-tx28.dts161 brightness-levels = < 0 1 2 3 4 5 6 7 8 9
Domap4-sdp.dts107 brightness-levels = <
Dtegra20-ventana.dts580 brightness-levels = <0 4 8 16 32 64 128 255>;
Dam335x-evm.dts85 brightness-levels = <0 51 53 56 62 75 101 152 255>;
Dexynos5250-snow.dts233 brightness-levels = <0 100 500 1000 1500 2000 2500 2800>;
Dam437x-sk-evm.dts30 brightness-levels = <0 51 53 56 62 75 101 152 255>;
Dam437x-gp-evm.dts48 brightness-levels = <0 51 53 56 62 75 101 152 255>;
Dam43x-epos-evm.dts108 brightness-levels = <0 51 53 56 62 75 101 152 255>;
/linux-4.1.27/Documentation/power/regulator/
Doverview.txt86 o Constraints - Constraints are used to define power levels for performance
87 and hardware protection. Constraints exist at three levels:
106 dynamically setting voltage or current limit levels.
110 to through the levels as follows :-
/linux-4.1.27/Documentation/devicetree/bindings/sound/
Ddavinci-mcasp-audio.txt31 - tx-num-evt : FIFO levels.
32 - rx-num-evt : FIFO levels.
Dcs42l56.txt39 Amplifiers adapt to the output signal levels.
/linux-4.1.27/Documentation/devicetree/bindings/arc/
Dinterrupts.txt3 The core interrupt controller provides 32 prioritised interrupts (2 levels)
/linux-4.1.27/arch/ia64/kernel/
Dtopology.c310 unsigned long i, levels, unique_caches; in cpu_cache_sysfs_init() local
317 if ((status = ia64_pal_cache_summary(&levels, &unique_caches)) != 0) { in cpu_cache_sysfs_init()
327 for (i=0; i < levels; i++) { in cpu_cache_sysfs_init()
Dpalinfo.c213 unsigned long i, levels, unique_caches; in cache_info() local
218 if ((status = ia64_pal_cache_summary(&levels, &unique_caches)) != 0) { in cache_info()
224 levels, unique_caches); in cache_info()
226 for (i=0; i < levels; i++) { in cache_info()
Dsetup.c858 unsigned long l, levels, unique_caches; in get_cache_info() local
862 status = ia64_pal_cache_summary(&levels, &unique_caches); in get_cache_info()
874 for (l = 0; l < levels; ++l) { in get_cache_info()
/linux-4.1.27/Documentation/thermal/
Dexynos_thermal38 when temperature exceeds pre-defined levels.
40 The threshold levels are defined as follows:
/linux-4.1.27/drivers/xen/xenbus/
Dxenbus_probe.h41 unsigned int levels; member
Dxenbus_probe_backend.c192 .levels = 3, /* backend/type/<frontend>/<id> */
Dxenbus_probe_frontend.c146 .levels = 2, /* device/type/<id> */
Dxenbus_probe.c569 rootlen = strsep_len(node, '/', bus->levels); in xenbus_dev_changed()
/linux-4.1.27/Documentation/devicetree/bindings/net/
Dmarvell-orion-net.txt8 The Discovery ethernet controller is described with two levels of nodes. The
11 the multiple levels is that the port registers are interleaved within a single
/linux-4.1.27/Documentation/devicetree/bindings/usb/
Dmsm-hsusb.txt68 - qcom,vdd-levels: This property must be a list of three integer values
94 qcom,vdd-levels = <1 5 7>;
/linux-4.1.27/arch/sparc/kernel/
Dsun4d_smp.c228 #define IGEN_MESSAGE(bcast, devid, sid, levels) \ argument
229 (((bcast) << 31) | ((devid) << 23) | ((sid) << 15) | (levels))
/linux-4.1.27/arch/frv/kernel/
Dirq.c152 #error dont know external IRQ trigger levels for this setup in init_IRQ()
/linux-4.1.27/drivers/net/wimax/i2400m/
DKconfig32 code using the sysfs debug-levels file.
/linux-4.1.27/net/wimax/
DKconfig35 the sysfs debug-levels file.
/linux-4.1.27/Documentation/devicetree/bindings/video/
Dcirrus,clps711x-fb.txt14 - cmap-invert : Invert the color levels (Optional).
/linux-4.1.27/drivers/sh/intc/
DKconfig19 drivers that are using special priority levels.
/linux-4.1.27/drivers/irqchip/
Dirq-metag-ext.c603 u32 levels[4]; member
659 context->levels[bank] = metag_in32(level_addr); in meta_intc_suspend()
736 tmp = (tmp & ~mask) | (context->levels[bank] & mask); in meta_intc_resume()
/linux-4.1.27/sound/pci/lx6464es/
Dlx6464es.c918 u32 levels[64]; in lx_proc_levels_read() local
924 err = lx_level_peaks(chip, 1, 64, levels); in lx_proc_levels_read()
930 snd_iprintf(buffer, "%08x ", levels[i*8+j]); in lx_proc_levels_read()
936 err = lx_level_peaks(chip, 0, 64, levels); in lx_proc_levels_read()
942 snd_iprintf(buffer, "%08x ", levels[i*8+j]); in lx_proc_levels_read()
/linux-4.1.27/drivers/platform/x86/
Ddell-laptop.c992 u8 levels; member
1065 info->levels = (buffer->output[2] >> 16) & 0xFF; in kbd_get_info()
1083 if (kbd_info.levels != 0) in kbd_get_max_level()
1084 return kbd_info.levels; in kbd_get_max_level()
1094 if (kbd_info.levels != 0) in kbd_get_level()
1109 if (kbd_info.levels != 0) { in kbd_set_level()
Dtoshiba_acpi.c1362 int levels; in lcd_proc_show() local
1367 levels = dev->backlight_dev->props.max_brightness + 1; in lcd_proc_show()
1371 seq_printf(m, "brightness_levels: %d\n", levels); in lcd_proc_show()
1418 int levels = dev->backlight_dev->props.max_brightness + 1; in lcd_proc_write() local
1426 value >= 0 && value < levels) { in lcd_proc_write()
/linux-4.1.27/Documentation/virtual/kvm/devices/
Darm-vgic.txt80 maximum possible 128 preemption levels. The semantics of the register
88 Bits for undefined preemption levels are RAZ/WI.
Dvm.txt40 the number of page table levels.
/linux-4.1.27/Documentation/block/
Dioprio.txt24 there are 8 levels of class data that determine exactly how much time this
32 to the cpu nice levels just more coarsely implemented. 0 is the highest
/linux-4.1.27/drivers/gpu/drm/nouveau/
DKconfig53 The paranoia and spam levels will add a lot of extra checks which
/linux-4.1.27/arch/ia64/pci/
Dpci.c771 unsigned long levels, unique_caches; in set_pci_dfl_cacheline_size() local
775 status = ia64_pal_cache_summary(&levels, &unique_caches); in set_pci_dfl_cacheline_size()
782 status = ia64_pal_cache_config_info(levels - 1, in set_pci_dfl_cacheline_size()
/linux-4.1.27/Documentation/ABI/testing/
Dsysfs-driver-samsung-laptop5 Description: Some Samsung laptops have different "performance levels"
Dsysfs-devices-system-cpu115 Various CPUs today support multiple idle levels that are
Dsysfs-class-regulator27 or microamps to determine configured regulator output levels.
/linux-4.1.27/Documentation/mn10300/
Dcompartmentalisation.txt5 The sources for various parts are compartmentalised at two different levels:
/linux-4.1.27/Documentation/arm/OMAP/
Domap_pm112 DSPBridge expresses target DSP performance levels in terms of OPP IDs.
113 CPUFreq expresses target MPU performance levels in terms of MPU
/linux-4.1.27/tools/perf/Documentation/
Dperf-record.txt218 The privilege levels may be omitted, in which case, the privilege levels of the associated
220 levels are subject to permissions. When sampling on multiple events, branch stack sampling
Dperf-script-python.txt253 levels if they don't exist e.g syscalls[comm][pid][id] = 1 will create
254 the intermediate hash levels and finally assign the value 1 to the
585 without having to go to the trouble of creating intermediate levels if
/linux-4.1.27/Documentation/input/
Dbcm5974.txt47 yields different levels of verbosity. Example (as root):
/linux-4.1.27/include/linux/wimax/
Ddebug.h253 #error D_MODULENAME is not defined in your debug-levels.h file
/linux-4.1.27/fs/ext3/
Dnamei.c289 struct dx_entry *entries, int levels) in dx_show_entries() argument
302 printk("%s%3u:%03u hash %8x/%8x ",levels?"":" ", i, block, hash, range); in dx_show_entries()
304 stats = levels? in dx_show_entries()
305 dx_show_entries(hinfo, dir, ((struct dx_node *) bh->b_data)->entries, levels - 1): in dx_show_entries()
313 printk("%snames %u, fullness %u (%u%%)\n", levels?"":" ", in dx_show_entries()
1524 int levels = frame - frames; in ext3_dx_add_entry() local
1529 if (levels && (dx_get_count(frames->entries) == in ext3_dx_add_entry()
1547 if (levels) { in ext3_dx_add_entry()
/linux-4.1.27/Documentation/laptops/
Dtoshiba_haps.txt72 available protection levels are:
Dthinkpad-acpi.txt950 has eight brightness levels, ranging from 0 to 7. Some of the levels
952 display backlight brightness control methods have 16 levels, ranging
1153 Fan levels:
1155 Most ThinkPad fans work in "levels" at the firmware interface. Level 0
1157 adjacent levels often map to the same fan speed. 7 is the highest
1224 and "full-speed" levels. The driver accepts "disengaged" as an alias for
/linux-4.1.27/Documentation/filesystems/
Decryptfs.txt71 levels unless you are doing so for the sole purpose of debugging or
Dqnx6.txt50 data and the addressing levels in that specific tree.
61 tree levels.
Ddlmfs.txt71 Two levels of locks are supported - Shared Read, and Exclusive.
Df2fs.txt505 each levels incrementally from 1 to N. In each levels F2FS needs to scan only
512 file name. F2FS searches the empty slots in the hash tables of whole levels from
Dlogfs.txt65 are on levels 1, 2, 3 4 or 5 for 1x, 2x, 3x, 4x or 5x indirect blocks,
/linux-4.1.27/Documentation/sound/oss/
DWaveArtist4 WaveArtist mixer and volume levels can be accessed via these commands:
/linux-4.1.27/Documentation/
Dpi-futex.txt44 design with multiple tasks (with multiple priority levels) sharing
48 we've got even more priority levels.
Dmd.txt169 Some raid levels allow this value to be set while the array is
179 raid levels that involve striping (0,4,5,6,10). The address space
188 levels. It can be written while assembling an array.
485 Active md devices for levels that support data redundancy (1,4,5,6,10)
499 levels.
535 re-written. As most raid levels work in units of pages rather
Dassoc_array.txt361 one nibble (4 bits) per level, so on a 32-bit CPU this is good for 8 levels and
362 on a 64-bit CPU, 16 levels. Unless the scattering is really poor, it is
390 fixed levels. For example:
486 levels. Shortcuts exist to save memory and to speed up traversal.
/linux-4.1.27/tools/usb/
Dffs-test.c67 static const char levels[8][6] = { in _msg() local
79 fprintf(stderr, "%s: %s ", argv0, levels[level]); in _msg()
/linux-4.1.27/Documentation/networking/
Dnetif-msg.txt64 The set of message levels is named
Dipvs-sysctl.txt89 Higher debugging levels include the messages for lower debugging
90 levels, so setting debug level 2, includes level 0, 1 and 2
DREADME.ipw2100145 information on the various debugging levels available, run the 'dvals'
207 1-5 Different levels of power management. The higher the
/linux-4.1.27/Documentation/virtual/kvm/
Dnested-vmx.txt28 Single-level virtualization has two levels - the host (KVM) and the guests.
29 In nested virtualization, we have three levels: The host (KVM), which we call
/linux-4.1.27/Documentation/leds/
Dleds-lm3556.txt17 In Flash Mode, the LED current source(LED) provides 16 target current levels
/linux-4.1.27/Documentation/cpu-freq/
Dintel-pstate.txt50 performance levels. The idea that frequency can be set to a single
/linux-4.1.27/kernel/power/
Dsnapshot.c292 int levels; /* Number of Radix Tree Levels */ member
374 for (i = zone->levels; i < levels_needed; i++) { in add_rtree_block()
382 zone->levels += 1; in add_rtree_block()
394 for (i = zone->levels; i > 0; i--) { in add_rtree_block()
672 for (i = zone->levels; i > 0; i--) { in memory_bm_find_bit()
/linux-4.1.27/Documentation/hwmon/
Dpc8736029 Also note that for the PC87366, initialization levels 2 and 3 don't enable
171 Monitoring of in9 isn't enabled at lower init levels (<3) because that
Dw83792d173 sf2_level[1-3]_fan[1-3] - three PWM/DC levels for each fan for Smart Fan II
/linux-4.1.27/arch/powerpc/boot/dts/
Dtqm5200.dts59 // 5200 interrupts are encoded into two levels;
Dcharon.dts62 // 5200 interrupts are encoded into two levels;
Dlite5200.dts59 // 5200 interrupts are encoded into two levels;
Dmpc5200b.dtsi60 // 5200 interrupts are encoded into two levels;
/linux-4.1.27/sound/pci/rme9652/
Dhdspm.c6172 struct hdspm_peak_rms *levels; in snd_hdspm_hwdep_ioctl() local
6181 levels = &hdspm->peak_rms; in snd_hdspm_hwdep_ioctl()
6183 levels->input_peaks[i] = in snd_hdspm_hwdep_ioctl()
6186 levels->playback_peaks[i] = in snd_hdspm_hwdep_ioctl()
6189 levels->output_peaks[i] = in snd_hdspm_hwdep_ioctl()
6193 levels->input_rms[i] = in snd_hdspm_hwdep_ioctl()
6198 levels->playback_rms[i] = in snd_hdspm_hwdep_ioctl()
6203 levels->output_rms[i] = in snd_hdspm_hwdep_ioctl()
6211 levels->speed = qs; in snd_hdspm_hwdep_ioctl()
6213 levels->speed = ds; in snd_hdspm_hwdep_ioctl()
[all …]
/linux-4.1.27/drivers/message/fusion/
DKconfig120 There are various debug levels that can be found in the source:
/linux-4.1.27/Documentation/development-process/
D8.Conclusion14 Various web sites discuss kernel development at all levels of detail. Your
/linux-4.1.27/Documentation/wimax/
DREADME.wimax80 what is printed and the available levels, check the source. The code
DREADME.i2400m200 what is printed and the available levels, check the source. The code
/linux-4.1.27/Documentation/device-mapper/
Dpersistent-data.txt79 thin-provisioning target uses a btree with two levels of nesting.
/linux-4.1.27/Documentation/scsi/
Dscsi-parameters.txt97 scsi_logging_level= [SCSI] a bit mask of logging levels
/linux-4.1.27/Documentation/mmc/
Dmmc-async-req.txt5 It depends. Fast eMMC and multiple cache levels with speculative cache
/linux-4.1.27/Documentation/vm/
Dsplit_page_table_lock61 levels.
/linux-4.1.27/Documentation/devicetree/bindings/arm/
Dtopology.txt17 correspond to physical CPUs and are to be mapped to the hierarchy levels.
94 levels) since name uniqueness will be guaranteed by the device tree hierarchy.
/linux-4.1.27/arch/x86/kernel/cpu/
Dintel_cacheinfo.c213 static const unsigned char levels[] = { 1, 1, 2, 3 }; variable
280 eax->split.level = levels[leaf]; in amd_cpuid4()
/linux-4.1.27/arch/blackfin/mach-bf609/
DKconfig13 int "SEC interrupt priority levels"
17 Divide the total number of interrupt priority levels into sub-levels.
18 There is 2 ^ (SEC_IRQ_PRIORITY_LEVELS + 1) different levels.
/linux-4.1.27/Documentation/arm/
Dcluster-pm-race-avoidance.txt483 support CPU topologies involving more than two levels (i.e.,
486 additional topological levels, and modifying the transition
487 rules for the intermediate (non-outermost) cluster levels.
/linux-4.1.27/fs/ext4/
Dnamei.c683 struct dx_entry *entries, int levels) in dx_show_entries() argument
696 printk("%s%3u:%03u hash %8x/%8x ",levels?"":" ", i, block, hash, range); in dx_show_entries()
700 stats = levels? in dx_show_entries()
701 dx_show_entries(hinfo, dir, ((struct dx_node *) bh->b_data)->entries, levels - 1): in dx_show_entries()
711 levels ? "" : " ", names, space/bcount, in dx_show_entries()
2263 int levels = frame - frames; in ext4_dx_add_entry() local
2268 if (levels && (dx_get_count(frames->entries) == in ext4_dx_add_entry()
2288 if (levels) { in ext4_dx_add_entry()
/linux-4.1.27/Documentation/i2c/busses/
Di2c-piix441 SMBus - you can not access it on I2C levels. The good news is that it
/linux-4.1.27/Documentation/devicetree/bindings/
Dmarvell.txt99 The Discover ethernet controller is described with two levels
102 that block. The reason for the multiple levels is that the
/linux-4.1.27/drivers/net/ethernet/dec/tulip/
DKconfig99 interrupts even at low levels of traffic at the cost of a small
/linux-4.1.27/Documentation/devicetree/bindings/mmc/
Dmmc.txt48 line levels. We choose to follow the SDHCI standard, which specifies both those
/linux-4.1.27/arch/arm/mm/
Dcache-v7.S104 beq start_flush_levels @ start flushing cache levels
/linux-4.1.27/Documentation/video4linux/cx2341x/
Dfw-decoder-regs.txt226 1 = Affects video output levels
611 1 = Affect video output levels
/linux-4.1.27/include/uapi/linux/
Dsoundcard.h960 int levels[32]; member
/linux-4.1.27/arch/blackfin/
DKconfig.debug144 The trace buffer does not record loops two levels deep. Helpful if
/linux-4.1.27/Documentation/devicetree/bindings/powerpc/fsl/
Dmpc5200.txt172 The mpc5200 pic binding splits hardware IRQ numbers into two levels. The
/linux-4.1.27/Documentation/s390/
Dcds.txt120 share those 15 interrupt levels. Devices attached to the ISA bus system must
121 not share interrupt levels (aka. IRQs), as the ISA bus bases on edge triggered
/linux-4.1.27/drivers/media/usb/dvb-usb/
DKconfig21 appropriate drivers) for debug levels.
/linux-4.1.27/arch/mn10300/
DKconfig430 what it does is restrict the levels of interrupt which are permitted
/linux-4.1.27/Documentation/cgroups/
Dunified-hierarchy.txt73 called for is the ability to have differing levels of granularity
192 nice levels to cgroup weights. This works for some cases but falls
/linux-4.1.27/Documentation/usb/
DURB.txt127 such as whether the lower levels may block when memory is tight.

12