Searched refs:chip (Results 1 - 200 of 3812) sorted by relevance

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/linux-4.1.27/drivers/staging/rts5208/
H A D	rtsx_chip.c	34 static void rtsx_calibration(struct rtsx_chip *chip) rtsx_calibration() argument 36 rtsx_write_phy_register(chip, 0x1B, 0x135E); rtsx_calibration() 38 rtsx_write_phy_register(chip, 0x00, 0x0280); rtsx_calibration() 39 rtsx_write_phy_register(chip, 0x01, 0x7112); rtsx_calibration() 40 rtsx_write_phy_register(chip, 0x01, 0x7110); rtsx_calibration() 41 rtsx_write_phy_register(chip, 0x01, 0x7112); rtsx_calibration() 42 rtsx_write_phy_register(chip, 0x01, 0x7113); rtsx_calibration() 43 rtsx_write_phy_register(chip, 0x00, 0x0288); rtsx_calibration() 46 void rtsx_disable_card_int(struct rtsx_chip *chip) rtsx_disable_card_int() argument 48 u32 reg = rtsx_readl(chip, RTSX_BIER); rtsx_disable_card_int() 51 rtsx_writel(chip, RTSX_BIER, reg); rtsx_disable_card_int() 54 void rtsx_enable_card_int(struct rtsx_chip *chip) rtsx_enable_card_int() argument 56 u32 reg = rtsx_readl(chip, RTSX_BIER); rtsx_enable_card_int() 59 for (i = 0; i <= chip->max_lun; i++) { rtsx_enable_card_int() 60 if (chip->lun2card[i] & XD_CARD) rtsx_enable_card_int() 62 if (chip->lun2card[i] & SD_CARD) rtsx_enable_card_int() 64 if (chip->lun2card[i] & MS_CARD) rtsx_enable_card_int() 67 if (chip->hw_bypass_sd) rtsx_enable_card_int() 70 rtsx_writel(chip, RTSX_BIER, reg); rtsx_enable_card_int() 73 void rtsx_enable_bus_int(struct rtsx_chip *chip) rtsx_enable_bus_int() argument 83 for (i = 0; i <= chip->max_lun; i++) { rtsx_enable_bus_int() 84 dev_dbg(rtsx_dev(chip), "lun2card[%d] = 0x%02x\n", rtsx_enable_bus_int() 85 i, chip->lun2card[i]); rtsx_enable_bus_int() 87 if (chip->lun2card[i] & XD_CARD) rtsx_enable_bus_int() 89 if (chip->lun2card[i] & SD_CARD) rtsx_enable_bus_int() 91 if (chip->lun2card[i] & MS_CARD) rtsx_enable_bus_int() 94 if (chip->hw_bypass_sd) rtsx_enable_bus_int() 98 if (chip->ic_version >= IC_VER_C) rtsx_enable_bus_int() 103 if (!chip->adma_mode) rtsx_enable_bus_int() 107 rtsx_writel(chip, RTSX_BIER, reg); rtsx_enable_bus_int() 109 dev_dbg(rtsx_dev(chip), "RTSX_BIER: 0x%08x\n", reg); rtsx_enable_bus_int() 112 void rtsx_disable_bus_int(struct rtsx_chip *chip) rtsx_disable_bus_int() argument 114 rtsx_writel(chip, RTSX_BIER, 0); rtsx_disable_bus_int() 117 static int rtsx_pre_handle_sdio_old(struct rtsx_chip *chip) rtsx_pre_handle_sdio_old() argument 121 if (chip->ignore_sd && CHK_SDIO_EXIST(chip)) { rtsx_pre_handle_sdio_old() 122 if (chip->asic_code) { rtsx_pre_handle_sdio_old() 123 retval = rtsx_write_register(chip, CARD_PULL_CTL5, rtsx_pre_handle_sdio_old() 127 rtsx_trace(chip); rtsx_pre_handle_sdio_old() 131 retval = rtsx_write_register(chip, FPGA_PULL_CTL, rtsx_pre_handle_sdio_old() 135 rtsx_trace(chip); rtsx_pre_handle_sdio_old() 139 retval = rtsx_write_register(chip, CARD_SHARE_MODE, 0xFF, rtsx_pre_handle_sdio_old() 142 rtsx_trace(chip); rtsx_pre_handle_sdio_old() 147 retval = rtsx_write_register(chip, 0xFF2C, 0x01, 0x01); rtsx_pre_handle_sdio_old() 149 rtsx_trace(chip); rtsx_pre_handle_sdio_old() 153 retval = rtsx_write_register(chip, SDIO_CTRL, 0xFF, rtsx_pre_handle_sdio_old() 156 rtsx_trace(chip); rtsx_pre_handle_sdio_old() 160 chip->sd_int = 1; rtsx_pre_handle_sdio_old() 161 chip->sd_io = 1; rtsx_pre_handle_sdio_old() 163 chip->need_reset |= SD_CARD; rtsx_pre_handle_sdio_old() 170 static int rtsx_pre_handle_sdio_new(struct rtsx_chip *chip) rtsx_pre_handle_sdio_new() argument 176 if (chip->driver_first_load) { rtsx_pre_handle_sdio_new() 177 if (CHECK_PID(chip, 0x5288)) { rtsx_pre_handle_sdio_new() 178 retval = rtsx_read_register(chip, 0xFE5A, &tmp); rtsx_pre_handle_sdio_new() 180 rtsx_trace(chip); rtsx_pre_handle_sdio_new() 185 } else if (CHECK_PID(chip, 0x5208)) { rtsx_pre_handle_sdio_new() 186 retval = rtsx_read_register(chip, 0xFE70, &tmp); rtsx_pre_handle_sdio_new() 188 rtsx_trace(chip); rtsx_pre_handle_sdio_new() 195 if (chip->sdio_in_charge) rtsx_pre_handle_sdio_new() 198 dev_dbg(rtsx_dev(chip), "chip->sdio_in_charge = %d\n", rtsx_pre_handle_sdio_new() 199 chip->sdio_in_charge); rtsx_pre_handle_sdio_new() 200 dev_dbg(rtsx_dev(chip), "chip->driver_first_load = %d\n", rtsx_pre_handle_sdio_new() 201 chip->driver_first_load); rtsx_pre_handle_sdio_new() 202 dev_dbg(rtsx_dev(chip), "sw_bypass_sd = %d\n", rtsx_pre_handle_sdio_new() 208 retval = rtsx_read_register(chip, TLPTISTAT, &tmp); rtsx_pre_handle_sdio_new() 210 rtsx_trace(chip); rtsx_pre_handle_sdio_new() 217 if (CHECK_PID(chip, 0x5288)) { rtsx_pre_handle_sdio_new() 218 retval = rtsx_write_register(chip, 0xFE5A, rtsx_pre_handle_sdio_new() 221 rtsx_trace(chip); rtsx_pre_handle_sdio_new() 224 } else if (CHECK_PID(chip, 0x5208)) { rtsx_pre_handle_sdio_new() 225 retval = rtsx_write_register(chip, 0xFE70, rtsx_pre_handle_sdio_new() 228 rtsx_trace(chip); rtsx_pre_handle_sdio_new() 233 retval = rtsx_write_register(chip, TLPTISTAT, 0xFF, rtsx_pre_handle_sdio_new() 236 rtsx_trace(chip); rtsx_pre_handle_sdio_new() 240 chip->need_reset |= SD_CARD; rtsx_pre_handle_sdio_new() 242 dev_dbg(rtsx_dev(chip), "Chip inserted with SDIO!\n"); rtsx_pre_handle_sdio_new() 244 if (chip->asic_code) { rtsx_pre_handle_sdio_new() 245 retval = sd_pull_ctl_enable(chip); rtsx_pre_handle_sdio_new() 247 rtsx_trace(chip); rtsx_pre_handle_sdio_new() 251 retval = rtsx_write_register(chip, rtsx_pre_handle_sdio_new() 256 rtsx_trace(chip); rtsx_pre_handle_sdio_new() 260 retval = card_share_mode(chip, SD_CARD); rtsx_pre_handle_sdio_new() 262 rtsx_trace(chip); rtsx_pre_handle_sdio_new() 267 if (CHECK_PID(chip, 0x5288)) { rtsx_pre_handle_sdio_new() 268 retval = rtsx_write_register(chip, 0xFE5A, rtsx_pre_handle_sdio_new() 271 rtsx_trace(chip); rtsx_pre_handle_sdio_new() 274 } else if (CHECK_PID(chip, 0x5208)) { rtsx_pre_handle_sdio_new() 275 retval = rtsx_write_register(chip, 0xFE70, rtsx_pre_handle_sdio_new() 278 rtsx_trace(chip); rtsx_pre_handle_sdio_new() 283 chip->chip_insert_with_sdio = 1; rtsx_pre_handle_sdio_new() 284 chip->sd_io = 1; rtsx_pre_handle_sdio_new() 287 retval = rtsx_write_register(chip, TLPTISTAT, 0x08, 0x08); rtsx_pre_handle_sdio_new() 289 rtsx_trace(chip); rtsx_pre_handle_sdio_new() 293 chip->need_reset |= SD_CARD; rtsx_pre_handle_sdio_new() 300 static int rtsx_reset_aspm(struct rtsx_chip *chip) rtsx_reset_aspm() argument 304 if (chip->dynamic_aspm) { rtsx_reset_aspm() 305 if (!CHK_SDIO_EXIST(chip) || !CHECK_PID(chip, 0x5288)) rtsx_reset_aspm() 308 ret = rtsx_write_cfg_dw(chip, 2, 0xC0, 0xFF, rtsx_reset_aspm() 309 chip->aspm_l0s_l1_en); rtsx_reset_aspm() 311 rtsx_trace(chip); rtsx_reset_aspm() 318 if (CHECK_PID(chip, 0x5208)) { rtsx_reset_aspm() 319 ret = rtsx_write_register(chip, ASPM_FORCE_CTL, 0xFF, 0x3F); rtsx_reset_aspm() 321 rtsx_trace(chip); rtsx_reset_aspm() 325 ret = rtsx_write_config_byte(chip, LCTLR, chip->aspm_l0s_l1_en); rtsx_reset_aspm() 327 rtsx_trace(chip); rtsx_reset_aspm() 331 chip->aspm_level[0] = chip->aspm_l0s_l1_en; rtsx_reset_aspm() 332 if (CHK_SDIO_EXIST(chip)) { rtsx_reset_aspm() 333 chip->aspm_level[1] = chip->aspm_l0s_l1_en; rtsx_reset_aspm() 334 ret = rtsx_write_cfg_dw(chip, CHECK_PID(chip, 0x5288) ? 2 : 1, rtsx_reset_aspm() 335 0xC0, 0xFF, chip->aspm_l0s_l1_en); rtsx_reset_aspm() 337 rtsx_trace(chip); rtsx_reset_aspm() 342 chip->aspm_enabled = 1; rtsx_reset_aspm() 347 static int rtsx_enable_pcie_intr(struct rtsx_chip *chip) rtsx_enable_pcie_intr() argument 351 if (!chip->asic_code || !CHECK_PID(chip, 0x5208)) { rtsx_enable_pcie_intr() 352 rtsx_enable_bus_int(chip); rtsx_enable_pcie_intr() 356 if (chip->phy_debug_mode) { rtsx_enable_pcie_intr() 357 ret = rtsx_write_register(chip, CDRESUMECTL, 0x77, 0); rtsx_enable_pcie_intr() 359 rtsx_trace(chip); rtsx_enable_pcie_intr() 362 rtsx_disable_bus_int(chip); rtsx_enable_pcie_intr() 364 rtsx_enable_bus_int(chip); rtsx_enable_pcie_intr() 367 if (chip->ic_version >= IC_VER_D) { rtsx_enable_pcie_intr() 370 ret = rtsx_read_phy_register(chip, 0x00, &reg); rtsx_enable_pcie_intr() 372 rtsx_trace(chip); rtsx_enable_pcie_intr() 378 ret = rtsx_write_phy_register(chip, 0x00, reg); rtsx_enable_pcie_intr() 380 rtsx_trace(chip); rtsx_enable_pcie_intr() 384 ret = rtsx_read_phy_register(chip, 0x1C, &reg); rtsx_enable_pcie_intr() 386 rtsx_trace(chip); rtsx_enable_pcie_intr() 391 ret = rtsx_write_phy_register(chip, 0x1C, reg); rtsx_enable_pcie_intr() 393 rtsx_trace(chip); rtsx_enable_pcie_intr() 398 if (chip->driver_first_load && (chip->ic_version < IC_VER_C)) rtsx_enable_pcie_intr() 399 rtsx_calibration(chip); rtsx_enable_pcie_intr() 404 int rtsx_reset_chip(struct rtsx_chip *chip) rtsx_reset_chip() argument 408 rtsx_writel(chip, RTSX_HCBAR, chip->host_cmds_addr); rtsx_reset_chip() 410 rtsx_disable_aspm(chip); rtsx_reset_chip() 412 retval = rtsx_write_register(chip, HOST_SLEEP_STATE, 0x03, 0x00); rtsx_reset_chip() 414 rtsx_trace(chip); rtsx_reset_chip() 419 retval = rtsx_write_register(chip, CARD_CLK_EN, 0x1E, 0); rtsx_reset_chip() 421 rtsx_trace(chip); rtsx_reset_chip() 427 if (CHECK_LUN_MODE(chip, SD_MS_2LUN)) { rtsx_reset_chip() 428 retval = rtsx_write_register(chip, FPDCTL, OC_POWER_DOWN, 0); rtsx_reset_chip() 430 rtsx_trace(chip); rtsx_reset_chip() 434 retval = rtsx_write_register(chip, FPDCTL, OC_POWER_DOWN, rtsx_reset_chip() 437 rtsx_trace(chip); rtsx_reset_chip() 442 retval = rtsx_write_register(chip, OCPPARA1, OCP_TIME_MASK, rtsx_reset_chip() 445 rtsx_trace(chip); rtsx_reset_chip() 448 retval = rtsx_write_register(chip, OCPPARA2, OCP_THD_MASK, rtsx_reset_chip() 451 rtsx_trace(chip); rtsx_reset_chip() 454 retval = rtsx_write_register(chip, OCPCTL, 0xFF, rtsx_reset_chip() 457 rtsx_trace(chip); rtsx_reset_chip() 462 retval = rtsx_write_register(chip, FPDCTL, OC_POWER_DOWN, rtsx_reset_chip() 465 rtsx_trace(chip); rtsx_reset_chip() 470 if (!CHECK_PID(chip, 0x5288)) { rtsx_reset_chip() 471 retval = rtsx_write_register(chip, CARD_GPIO_DIR, 0xFF, 0x03); rtsx_reset_chip() 473 rtsx_trace(chip); rtsx_reset_chip() 479 retval = rtsx_write_register(chip, CARD_GPIO, 0xFF, 0x03); rtsx_reset_chip() 481 rtsx_trace(chip); rtsx_reset_chip() 486 retval = rtsx_write_register(chip, CHANGE_LINK_STATE, 0x0A, 0); rtsx_reset_chip() 488 rtsx_trace(chip); rtsx_reset_chip() 493 retval = rtsx_write_register(chip, CARD_DRIVE_SEL, 0xFF, rtsx_reset_chip() 494 chip->card_drive_sel); rtsx_reset_chip() 496 rtsx_trace(chip); rtsx_reset_chip() 501 retval = rtsx_write_register(chip, CARD_AUTO_BLINK, 0xFF, rtsx_reset_chip() 504 rtsx_trace(chip); rtsx_reset_chip() 509 if (chip->asic_code) { rtsx_reset_chip() 511 retval = rtsx_write_register(chip, SSC_CTL1, 0xFF, rtsx_reset_chip() 514 rtsx_trace(chip); rtsx_reset_chip() 517 retval = rtsx_write_register(chip, SSC_CTL2, 0xFF, 0x12); rtsx_reset_chip() 519 rtsx_trace(chip); rtsx_reset_chip() 531 retval = rtsx_write_register(chip, CHANGE_LINK_STATE, 0x16, 0x10); rtsx_reset_chip() 533 rtsx_trace(chip); rtsx_reset_chip() 538 if (chip->aspm_l0s_l1_en) { rtsx_reset_chip() 539 retval = rtsx_reset_aspm(chip); rtsx_reset_chip() 541 rtsx_trace(chip); rtsx_reset_chip() 545 if (chip->asic_code && CHECK_PID(chip, 0x5208)) { rtsx_reset_chip() 546 retval = rtsx_write_phy_register(chip, 0x07, 0x0129); rtsx_reset_chip() 548 rtsx_trace(chip); rtsx_reset_chip() 552 retval = rtsx_write_config_byte(chip, LCTLR, rtsx_reset_chip() 553 chip->aspm_l0s_l1_en); rtsx_reset_chip() 555 rtsx_trace(chip); rtsx_reset_chip() 560 retval = rtsx_write_config_byte(chip, 0x81, 1); rtsx_reset_chip() 562 rtsx_trace(chip); rtsx_reset_chip() 566 if (CHK_SDIO_EXIST(chip)) { rtsx_reset_chip() 567 retval = rtsx_write_cfg_dw(chip, rtsx_reset_chip() 568 CHECK_PID(chip, 0x5288) ? 2 : 1, rtsx_reset_chip() 572 rtsx_trace(chip); rtsx_reset_chip() 577 if (CHECK_PID(chip, 0x5288) && !CHK_SDIO_EXIST(chip)) { rtsx_reset_chip() 578 retval = rtsx_write_cfg_dw(chip, 2, 0xC0, 0xFFFF, 0x0103); rtsx_reset_chip() 580 rtsx_trace(chip); rtsx_reset_chip() 584 retval = rtsx_write_cfg_dw(chip, 2, 0x84, 0xFF, 0x03); rtsx_reset_chip() 586 rtsx_trace(chip); rtsx_reset_chip() 591 retval = rtsx_write_register(chip, IRQSTAT0, LINK_RDY_INT, rtsx_reset_chip() 594 rtsx_trace(chip); rtsx_reset_chip() 598 retval = rtsx_write_register(chip, PERST_GLITCH_WIDTH, 0xFF, 0x80); rtsx_reset_chip() 600 rtsx_trace(chip); rtsx_reset_chip() 604 retval = rtsx_enable_pcie_intr(chip); rtsx_reset_chip() 606 rtsx_trace(chip); rtsx_reset_chip() 610 chip->need_reset = 0; rtsx_reset_chip() 612 chip->int_reg = rtsx_readl(chip, RTSX_BIPR); rtsx_reset_chip() 614 if (chip->hw_bypass_sd) rtsx_reset_chip() 616 dev_dbg(rtsx_dev(chip), "In %s, chip->int_reg = 0x%x\n", __func__, rtsx_reset_chip() 617 chip->int_reg); rtsx_reset_chip() 618 if (chip->int_reg & SD_EXIST) { rtsx_reset_chip() 620 if (CHECK_PID(chip, 0x5208) && (chip->ic_version < IC_VER_C)) rtsx_reset_chip() 621 retval = rtsx_pre_handle_sdio_old(chip); rtsx_reset_chip() 623 retval = rtsx_pre_handle_sdio_new(chip); rtsx_reset_chip() 625 dev_dbg(rtsx_dev(chip), "chip->need_reset = 0x%x (rtsx_reset_chip)\n", rtsx_reset_chip() 626 (unsigned int)(chip->need_reset)); rtsx_reset_chip() 628 retval = rtsx_pre_handle_sdio_old(chip); rtsx_reset_chip() 631 rtsx_trace(chip); rtsx_reset_chip() 636 chip->sd_io = 0; rtsx_reset_chip() 637 retval = rtsx_write_register(chip, SDIO_CTRL, rtsx_reset_chip() 640 rtsx_trace(chip); rtsx_reset_chip() 646 if (chip->int_reg & XD_EXIST) rtsx_reset_chip() 647 chip->need_reset |= XD_CARD; rtsx_reset_chip() 648 if (chip->int_reg & MS_EXIST) rtsx_reset_chip() 649 chip->need_reset |= MS_CARD; rtsx_reset_chip() 650 if (chip->int_reg & CARD_EXIST) { rtsx_reset_chip() 651 retval = rtsx_write_register(chip, SSC_CTL1, SSC_RSTB, rtsx_reset_chip() 654 rtsx_trace(chip); rtsx_reset_chip() 659 dev_dbg(rtsx_dev(chip), "In %s, chip->need_reset = 0x%x\n", __func__, rtsx_reset_chip() 660 (unsigned int)(chip->need_reset)); rtsx_reset_chip() 662 retval = rtsx_write_register(chip, RCCTL, 0x01, 0x00); rtsx_reset_chip() 664 rtsx_trace(chip); rtsx_reset_chip() 668 if (CHECK_PID(chip, 0x5208) || CHECK_PID(chip, 0x5288)) { rtsx_reset_chip() 670 retval = rtsx_write_register(chip, MAIN_PWR_OFF_CTL, 0x03, rtsx_reset_chip() 673 rtsx_trace(chip); rtsx_reset_chip() 678 if (chip->remote_wakeup_en && !chip->auto_delink_en) { rtsx_reset_chip() 679 retval = rtsx_write_register(chip, WAKE_SEL_CTL, 0x07, 0x07); rtsx_reset_chip() 681 rtsx_trace(chip); rtsx_reset_chip() 684 if (chip->aux_pwr_exist) { rtsx_reset_chip() 685 retval = rtsx_write_register(chip, PME_FORCE_CTL, rtsx_reset_chip() 688 rtsx_trace(chip); rtsx_reset_chip() 693 retval = rtsx_write_register(chip, WAKE_SEL_CTL, 0x07, 0x04); rtsx_reset_chip() 695 rtsx_trace(chip); rtsx_reset_chip() 698 retval = rtsx_write_register(chip, PME_FORCE_CTL, 0xFF, 0x30); rtsx_reset_chip() 700 rtsx_trace(chip); rtsx_reset_chip() 705 if (CHECK_PID(chip, 0x5208) && (chip->ic_version >= IC_VER_D)) { rtsx_reset_chip() 706 retval = rtsx_write_register(chip, PETXCFG, 0x1C, 0x14); rtsx_reset_chip() 708 rtsx_trace(chip); rtsx_reset_chip() 713 if (chip->asic_code && CHECK_PID(chip, 0x5208)) { rtsx_reset_chip() 714 retval = rtsx_clr_phy_reg_bit(chip, 0x1C, 2); rtsx_reset_chip() 716 rtsx_trace(chip); rtsx_reset_chip() 721 if (chip->ft2_fast_mode) { rtsx_reset_chip() 722 retval = rtsx_write_register(chip, CARD_PWR_CTL, 0xFF, rtsx_reset_chip() 725 rtsx_trace(chip); rtsx_reset_chip() 728 udelay(chip->pmos_pwr_on_interval); rtsx_reset_chip() 729 retval = rtsx_write_register(chip, CARD_PWR_CTL, 0xFF, rtsx_reset_chip() 732 rtsx_trace(chip); rtsx_reset_chip() 740 rtsx_reset_detected_cards(chip, 0); rtsx_reset_chip() 742 chip->driver_first_load = 0; rtsx_reset_chip() 781 static int rts5208_init(struct rtsx_chip *chip) rts5208_init() argument 787 retval = rtsx_write_register(chip, CLK_SEL, 0x03, 0x03); rts5208_init() 789 rtsx_trace(chip); rts5208_init() 792 retval = rtsx_read_register(chip, CLK_SEL, &val); rts5208_init() 794 rtsx_trace(chip); rts5208_init() 797 chip->asic_code = val == 0 ? 1 : 0; rts5208_init() 799 if (chip->asic_code) { rts5208_init() 800 retval = rtsx_read_phy_register(chip, 0x1C, &reg); rts5208_init() 802 rtsx_trace(chip); rts5208_init() 806 dev_dbg(rtsx_dev(chip), "Value of phy register 0x1C is 0x%x\n", rts5208_init() 808 chip->ic_version = (reg >> 4) & 0x07; rts5208_init() 809 chip->phy_debug_mode = reg & PHY_DEBUG_MODE ? 1 : 0; rts5208_init() 812 retval = rtsx_read_register(chip, 0xFE80, &val); rts5208_init() 814 rtsx_trace(chip); rts5208_init() 817 chip->ic_version = val; rts5208_init() 818 chip->phy_debug_mode = 0; rts5208_init() 821 retval = rtsx_read_register(chip, PDINFO, &val); rts5208_init() 823 rtsx_trace(chip); rts5208_init() 826 dev_dbg(rtsx_dev(chip), "PDINFO: 0x%x\n", val); rts5208_init() 827 chip->aux_pwr_exist = val & AUX_PWR_DETECTED ? 1 : 0; rts5208_init() 829 retval = rtsx_read_register(chip, 0xFE50, &val); rts5208_init() 831 rtsx_trace(chip); rts5208_init() 834 chip->hw_bypass_sd = val & 0x01 ? 1 : 0; rts5208_init() 836 rtsx_read_config_byte(chip, 0x0E, &val); rts5208_init() 838 SET_SDIO_EXIST(chip); rts5208_init() 840 CLR_SDIO_EXIST(chip); rts5208_init() 842 if (chip->use_hw_setting) { rts5208_init() 843 retval = rtsx_read_register(chip, CHANGE_LINK_STATE, &val); rts5208_init() 845 rtsx_trace(chip); rts5208_init() 848 chip->auto_delink_en = val & 0x80 ? 1 : 0; rts5208_init() 854 static int rts5288_init(struct rtsx_chip *chip) rts5288_init() argument 860 retval = rtsx_write_register(chip, CLK_SEL, 0x03, 0x03); rts5288_init() 862 rtsx_trace(chip); rts5288_init() 865 retval = rtsx_read_register(chip, CLK_SEL, &val); rts5288_init() 867 rtsx_trace(chip); rts5288_init() 870 chip->asic_code = val == 0 ? 1 : 0; rts5288_init() 872 chip->ic_version = 0; rts5288_init() 873 chip->phy_debug_mode = 0; rts5288_init() 875 retval = rtsx_read_register(chip, PDINFO, &val); rts5288_init() 877 rtsx_trace(chip); rts5288_init() 880 dev_dbg(rtsx_dev(chip), "PDINFO: 0x%x\n", val); rts5288_init() 881 chip->aux_pwr_exist = val & AUX_PWR_DETECTED ? 1 : 0; rts5288_init() 883 retval = rtsx_read_register(chip, CARD_SHARE_MODE, &val); rts5288_init() 885 rtsx_trace(chip); rts5288_init() 888 dev_dbg(rtsx_dev(chip), "CARD_SHARE_MODE: 0x%x\n", val); rts5288_init() 889 chip->baro_pkg = val & 0x04 ? QFN : LQFP; rts5288_init() 891 retval = rtsx_read_register(chip, 0xFE5A, &val); rts5288_init() 893 rtsx_trace(chip); rts5288_init() 896 chip->hw_bypass_sd = val & 0x10 ? 1 : 0; rts5288_init() 898 retval = rtsx_read_cfg_dw(chip, 0, 0x718, &lval); rts5288_init() 900 rtsx_trace(chip); rts5288_init() 905 dev_dbg(rtsx_dev(chip), "Max function number: %d\n", max_func); rts5288_init() 907 SET_SDIO_EXIST(chip); rts5288_init() 909 CLR_SDIO_EXIST(chip); rts5288_init() 911 if (chip->use_hw_setting) { rts5288_init() 912 retval = rtsx_read_register(chip, CHANGE_LINK_STATE, &val); rts5288_init() 914 rtsx_trace(chip); rts5288_init() 917 chip->auto_delink_en = val & 0x80 ? 1 : 0; rts5288_init() 919 if (CHECK_BARO_PKG(chip, LQFP)) rts5288_init() 920 chip->lun_mode = SD_MS_1LUN; rts5288_init() 922 chip->lun_mode = DEFAULT_SINGLE; rts5288_init() 928 int rtsx_init_chip(struct rtsx_chip *chip) rtsx_init_chip() argument 930 struct sd_info *sd_card = &chip->sd_card; rtsx_init_chip() 931 struct xd_info *xd_card = &chip->xd_card; rtsx_init_chip() 932 struct ms_info *ms_card = &chip->ms_card; rtsx_init_chip() 936 dev_dbg(rtsx_dev(chip), "Vendor ID: 0x%04x, Product ID: 0x%04x\n", rtsx_init_chip() 937 chip->vendor_id, chip->product_id); rtsx_init_chip() 939 chip->ic_version = 0; rtsx_init_chip() 942 chip->msg_idx = 0; rtsx_init_chip() 949 chip->xd_reset_counter = 0; rtsx_init_chip() 950 chip->sd_reset_counter = 0; rtsx_init_chip() 951 chip->ms_reset_counter = 0; rtsx_init_chip() 953 chip->xd_show_cnt = MAX_SHOW_CNT; rtsx_init_chip() 954 chip->sd_show_cnt = MAX_SHOW_CNT; rtsx_init_chip() 955 chip->ms_show_cnt = MAX_SHOW_CNT; rtsx_init_chip() 957 chip->sd_io = 0; rtsx_init_chip() 958 chip->auto_delink_cnt = 0; rtsx_init_chip() 959 chip->auto_delink_allowed = 1; rtsx_init_chip() 960 rtsx_set_stat(chip, RTSX_STAT_INIT); rtsx_init_chip() 962 chip->aspm_enabled = 0; rtsx_init_chip() 963 chip->chip_insert_with_sdio = 0; rtsx_init_chip() 964 chip->sdio_aspm = 0; rtsx_init_chip() 965 chip->sdio_idle = 0; rtsx_init_chip() 966 chip->sdio_counter = 0; rtsx_init_chip() 967 chip->cur_card = 0; rtsx_init_chip() 968 chip->phy_debug_mode = 0; rtsx_init_chip() 969 chip->sdio_func_exist = 0; rtsx_init_chip() 970 memset(chip->sdio_raw_data, 0, 12); rtsx_init_chip() 973 set_sense_type(chip, i, SENSE_TYPE_NO_SENSE); rtsx_init_chip() 974 chip->rw_fail_cnt[i] = 0; rtsx_init_chip() 977 if (!check_sd_speed_prior(chip->sd_speed_prior)) rtsx_init_chip() 978 chip->sd_speed_prior = 0x01040203; rtsx_init_chip() 980 dev_dbg(rtsx_dev(chip), "sd_speed_prior = 0x%08x\n", rtsx_init_chip() 981 chip->sd_speed_prior); rtsx_init_chip() 983 if (!check_sd_current_prior(chip->sd_current_prior)) rtsx_init_chip() 984 chip->sd_current_prior = 0x00010203; rtsx_init_chip() 986 dev_dbg(rtsx_dev(chip), "sd_current_prior = 0x%08x\n", rtsx_init_chip() 987 chip->sd_current_prior); rtsx_init_chip() 989 if ((chip->sd_ddr_tx_phase > 31) || (chip->sd_ddr_tx_phase < 0)) rtsx_init_chip() 990 chip->sd_ddr_tx_phase = 0; rtsx_init_chip() 992 if ((chip->mmc_ddr_tx_phase > 31) || (chip->mmc_ddr_tx_phase < 0)) rtsx_init_chip() 993 chip->mmc_ddr_tx_phase = 0; rtsx_init_chip() 995 retval = rtsx_write_register(chip, FPDCTL, SSC_POWER_DOWN, 0); rtsx_init_chip() 997 rtsx_trace(chip); rtsx_init_chip() 1001 retval = rtsx_write_register(chip, CLK_DIV, 0x07, 0x07); rtsx_init_chip() 1003 rtsx_trace(chip); rtsx_init_chip() 1006 dev_dbg(rtsx_dev(chip), "chip->use_hw_setting = %d\n", rtsx_init_chip() 1007 chip->use_hw_setting); rtsx_init_chip() 1009 if (CHECK_PID(chip, 0x5208)) { rtsx_init_chip() 1010 retval = rts5208_init(chip); rtsx_init_chip() 1012 rtsx_trace(chip); rtsx_init_chip() 1016 } else if (CHECK_PID(chip, 0x5288)) { rtsx_init_chip() 1017 retval = rts5288_init(chip); rtsx_init_chip() 1019 rtsx_trace(chip); rtsx_init_chip() 1024 if (chip->ss_en == 2) rtsx_init_chip() 1025 chip->ss_en = 0; rtsx_init_chip() 1027 dev_dbg(rtsx_dev(chip), "chip->asic_code = %d\n", chip->asic_code); rtsx_init_chip() 1028 dev_dbg(rtsx_dev(chip), "chip->ic_version = 0x%x\n", chip->ic_version); rtsx_init_chip() 1029 dev_dbg(rtsx_dev(chip), "chip->phy_debug_mode = %d\n", rtsx_init_chip() 1030 chip->phy_debug_mode); rtsx_init_chip() 1031 dev_dbg(rtsx_dev(chip), "chip->aux_pwr_exist = %d\n", rtsx_init_chip() 1032 chip->aux_pwr_exist); rtsx_init_chip() 1033 dev_dbg(rtsx_dev(chip), "chip->sdio_func_exist = %d\n", rtsx_init_chip() 1034 chip->sdio_func_exist); rtsx_init_chip() 1035 dev_dbg(rtsx_dev(chip), "chip->hw_bypass_sd = %d\n", rtsx_init_chip() 1036 chip->hw_bypass_sd); rtsx_init_chip() 1037 dev_dbg(rtsx_dev(chip), "chip->aspm_l0s_l1_en = %d\n", rtsx_init_chip() 1038 chip->aspm_l0s_l1_en); rtsx_init_chip() 1039 dev_dbg(rtsx_dev(chip), "chip->lun_mode = %d\n", chip->lun_mode); rtsx_init_chip() 1040 dev_dbg(rtsx_dev(chip), "chip->auto_delink_en = %d\n", rtsx_init_chip() 1041 chip->auto_delink_en); rtsx_init_chip() 1042 dev_dbg(rtsx_dev(chip), "chip->ss_en = %d\n", chip->ss_en); rtsx_init_chip() 1043 dev_dbg(rtsx_dev(chip), "chip->baro_pkg = %d\n", chip->baro_pkg); rtsx_init_chip() 1045 if (CHECK_LUN_MODE(chip, SD_MS_2LUN)) { rtsx_init_chip() 1046 chip->card2lun[SD_CARD] = 0; rtsx_init_chip() 1047 chip->card2lun[MS_CARD] = 1; rtsx_init_chip() 1048 chip->card2lun[XD_CARD] = 0xFF; rtsx_init_chip() 1049 chip->lun2card[0] = SD_CARD; rtsx_init_chip() 1050 chip->lun2card[1] = MS_CARD; rtsx_init_chip() 1051 chip->max_lun = 1; rtsx_init_chip() 1052 SET_SDIO_IGNORED(chip); rtsx_init_chip() 1053 } else if (CHECK_LUN_MODE(chip, SD_MS_1LUN)) { rtsx_init_chip() 1054 chip->card2lun[SD_CARD] = 0; rtsx_init_chip() 1055 chip->card2lun[MS_CARD] = 0; rtsx_init_chip() 1056 chip->card2lun[XD_CARD] = 0xFF; rtsx_init_chip() 1057 chip->lun2card[0] = SD_CARD | MS_CARD; rtsx_init_chip() 1058 chip->max_lun = 0; rtsx_init_chip() 1060 chip->card2lun[XD_CARD] = 0; rtsx_init_chip() 1061 chip->card2lun[SD_CARD] = 0; rtsx_init_chip() 1062 chip->card2lun[MS_CARD] = 0; rtsx_init_chip() 1063 chip->lun2card[0] = XD_CARD | SD_CARD | MS_CARD; rtsx_init_chip() 1064 chip->max_lun = 0; rtsx_init_chip() 1067 retval = rtsx_reset_chip(chip); rtsx_init_chip() 1069 rtsx_trace(chip); rtsx_init_chip() 1076 void rtsx_release_chip(struct rtsx_chip *chip) rtsx_release_chip() argument 1078 xd_free_l2p_tbl(chip); rtsx_release_chip() 1079 ms_free_l2p_tbl(chip); rtsx_release_chip() 1080 chip->card_exist = 0; rtsx_release_chip() 1081 chip->card_ready = 0; rtsx_release_chip() 1085 static inline void rtsx_blink_led(struct rtsx_chip *chip) rtsx_blink_led() argument 1087 if (chip->card_exist && chip->blink_led) { rtsx_blink_led() 1088 if (chip->led_toggle_counter < LED_TOGGLE_INTERVAL) { rtsx_blink_led() 1089 chip->led_toggle_counter++; rtsx_blink_led() 1091 chip->led_toggle_counter = 0; rtsx_blink_led() 1092 toggle_gpio(chip, LED_GPIO); rtsx_blink_led() 1098 static void rtsx_monitor_aspm_config(struct rtsx_chip *chip) rtsx_monitor_aspm_config() argument 1106 rtsx_read_config_byte(chip, LCTLR, &reg0); rtsx_monitor_aspm_config() 1107 if (chip->aspm_level[0] != reg0) { rtsx_monitor_aspm_config() 1109 chip->aspm_level[0] = reg0; rtsx_monitor_aspm_config() 1111 if (CHK_SDIO_EXIST(chip) && !CHK_SDIO_IGNORED(chip)) { rtsx_monitor_aspm_config() 1112 rtsx_read_cfg_dw(chip, 1, 0xC0, &tmp); rtsx_monitor_aspm_config() 1114 if (chip->aspm_level[1] != reg1) { rtsx_monitor_aspm_config() 1116 chip->aspm_level[1] = reg1; rtsx_monitor_aspm_config() 1129 chip->aspm_l0s_l1_en = 0x03; rtsx_monitor_aspm_config() 1131 dev_dbg(rtsx_dev(chip), "aspm_level[0] = 0x%02x, aspm_level[1] = 0x%02x\n", rtsx_monitor_aspm_config() 1132 chip->aspm_level[0], chip->aspm_level[1]); rtsx_monitor_aspm_config() 1134 if (chip->aspm_l0s_l1_en) { rtsx_monitor_aspm_config() 1135 chip->aspm_enabled = 1; rtsx_monitor_aspm_config() 1137 chip->aspm_enabled = 0; rtsx_monitor_aspm_config() 1138 chip->sdio_aspm = 0; rtsx_monitor_aspm_config() 1140 rtsx_write_register(chip, ASPM_FORCE_CTL, 0xFF, rtsx_monitor_aspm_config() 1141 0x30 | chip->aspm_level[0] | rtsx_monitor_aspm_config() 1142 (chip->aspm_level[1] << 2)); rtsx_monitor_aspm_config() 1146 void rtsx_polling_func(struct rtsx_chip *chip) rtsx_polling_func() argument 1149 struct sd_info *sd_card = &chip->sd_card; rtsx_polling_func() 1153 if (rtsx_chk_stat(chip, RTSX_STAT_SUSPEND)) rtsx_polling_func() 1156 if (rtsx_chk_stat(chip, RTSX_STAT_DELINK)) rtsx_polling_func() 1159 if (chip->polling_config) { rtsx_polling_func() 1162 rtsx_read_config_byte(chip, 0, &val); rtsx_polling_func() 1165 if (rtsx_chk_stat(chip, RTSX_STAT_SS)) rtsx_polling_func() 1169 if (chip->ocp_int) { rtsx_polling_func() 1170 rtsx_read_register(chip, OCPSTAT, &chip->ocp_stat); rtsx_polling_func() 1172 if (chip->card_exist & SD_CARD) rtsx_polling_func() 1173 sd_power_off_card3v3(chip); rtsx_polling_func() 1174 else if (chip->card_exist & MS_CARD) rtsx_polling_func() 1175 ms_power_off_card3v3(chip); rtsx_polling_func() 1176 else if (chip->card_exist & XD_CARD) rtsx_polling_func() 1177 xd_power_off_card3v3(chip); rtsx_polling_func() 1179 chip->ocp_int = 0; rtsx_polling_func() 1185 if (chip->card_exist & SD_CARD) { rtsx_polling_func() 1188 rtsx_read_register(chip, 0xFD30, &val); rtsx_polling_func() 1192 chip->need_reinit |= SD_CARD; rtsx_polling_func() 1200 rtsx_init_cards(chip); rtsx_polling_func() 1202 if (chip->ss_en) { rtsx_polling_func() 1205 if (CHECK_PID(chip, 0x5288)) { rtsx_polling_func() 1208 if (CHK_SDIO_EXIST(chip) && !CHK_SDIO_IGNORED(chip)) { rtsx_polling_func() 1211 rtsx_read_cfg_dw(chip, 1, 0x04, &val); rtsx_polling_func() 1220 if (ss_allowed && !chip->sd_io) { rtsx_polling_func() 1221 if (rtsx_get_stat(chip) != RTSX_STAT_IDLE) { rtsx_polling_func() 1222 chip->ss_counter = 0; rtsx_polling_func() 1224 if (chip->ss_counter < rtsx_polling_func() 1225 (chip->ss_idle_period / POLLING_INTERVAL)) { rtsx_polling_func() 1226 chip->ss_counter++; rtsx_polling_func() 1228 rtsx_exclusive_enter_ss(chip); rtsx_polling_func() 1234 if (CHECK_PID(chip, 0x5208)) { rtsx_polling_func() 1235 rtsx_monitor_aspm_config(chip); rtsx_polling_func() 1238 if (CHK_SDIO_EXIST(chip) && !CHK_SDIO_IGNORED(chip) && rtsx_polling_func() 1239 chip->aspm_l0s_l1_en && chip->dynamic_aspm) { rtsx_polling_func() 1240 if (chip->sd_io) { rtsx_polling_func() 1241 dynamic_configure_sdio_aspm(chip); rtsx_polling_func() 1243 if (!chip->sdio_aspm) { rtsx_polling_func() 1244 dev_dbg(rtsx_dev(chip), "SDIO enter ASPM!\n"); rtsx_polling_func() 1245 rtsx_write_register(chip, rtsx_polling_func() 1248 (chip->aspm_level[1] << 2)); rtsx_polling_func() 1249 chip->sdio_aspm = 1; rtsx_polling_func() 1256 if (chip->idle_counter < IDLE_MAX_COUNT) { rtsx_polling_func() 1257 chip->idle_counter++; rtsx_polling_func() 1259 if (rtsx_get_stat(chip) != RTSX_STAT_IDLE) { rtsx_polling_func() 1260 dev_dbg(rtsx_dev(chip), "Idle state!\n"); rtsx_polling_func() 1261 rtsx_set_stat(chip, RTSX_STAT_IDLE); rtsx_polling_func() 1264 chip->led_toggle_counter = 0; rtsx_polling_func() 1266 rtsx_force_power_on(chip, SSC_PDCTL); rtsx_polling_func() 1268 turn_off_led(chip, LED_GPIO); rtsx_polling_func() 1270 if (chip->auto_power_down && !chip->card_ready && rtsx_polling_func() 1271 !chip->sd_io) rtsx_polling_func() 1272 rtsx_force_power_down(chip, rtsx_polling_func() 1277 switch (rtsx_get_stat(chip)) { rtsx_polling_func() 1280 rtsx_blink_led(chip); rtsx_polling_func() 1282 do_remaining_work(chip); rtsx_polling_func() 1286 if (chip->sd_io && !chip->sd_int) rtsx_polling_func() 1287 try_to_switch_sdio_ctrl(chip); rtsx_polling_func() 1289 rtsx_enable_aspm(chip); rtsx_polling_func() 1297 if (CHECK_LUN_MODE(chip, SD_MS_2LUN)) { rtsx_polling_func() 1298 if (chip->ocp_stat & rtsx_polling_func() 1300 dev_dbg(rtsx_dev(chip), "Over current, OCPSTAT is 0x%x\n", rtsx_polling_func() 1301 chip->ocp_stat); rtsx_polling_func() 1303 if (chip->ocp_stat & (SD_OC_NOW | SD_OC_EVER)) { rtsx_polling_func() 1304 if (chip->card_exist & SD_CARD) { rtsx_polling_func() 1305 rtsx_write_register(chip, CARD_OE, SD_OUTPUT_EN, rtsx_polling_func() 1307 card_power_off(chip, SD_CARD); rtsx_polling_func() 1308 chip->card_fail |= SD_CARD; rtsx_polling_func() 1311 if (chip->ocp_stat & (MS_OC_NOW | MS_OC_EVER)) { rtsx_polling_func() 1312 if (chip->card_exist & MS_CARD) { rtsx_polling_func() 1313 rtsx_write_register(chip, CARD_OE, MS_OUTPUT_EN, rtsx_polling_func() 1315 card_power_off(chip, MS_CARD); rtsx_polling_func() 1316 chip->card_fail |= MS_CARD; rtsx_polling_func() 1320 if (chip->ocp_stat & (SD_OC_NOW | SD_OC_EVER)) { rtsx_polling_func() 1321 dev_dbg(rtsx_dev(chip), "Over current, OCPSTAT is 0x%x\n", rtsx_polling_func() 1322 chip->ocp_stat); rtsx_polling_func() 1323 if (chip->card_exist & SD_CARD) { rtsx_polling_func() 1324 rtsx_write_register(chip, CARD_OE, SD_OUTPUT_EN, rtsx_polling_func() 1326 chip->card_fail |= SD_CARD; rtsx_polling_func() 1327 } else if (chip->card_exist & MS_CARD) { rtsx_polling_func() 1328 rtsx_write_register(chip, CARD_OE, MS_OUTPUT_EN, rtsx_polling_func() 1330 chip->card_fail |= MS_CARD; rtsx_polling_func() 1331 } else if (chip->card_exist & XD_CARD) { rtsx_polling_func() 1332 rtsx_write_register(chip, CARD_OE, XD_OUTPUT_EN, rtsx_polling_func() 1334 chip->card_fail |= XD_CARD; rtsx_polling_func() 1336 card_power_off(chip, SD_CARD); rtsx_polling_func() 1342 if (chip->auto_delink_en && chip->auto_delink_allowed && rtsx_polling_func() 1343 !chip->card_ready && !chip->card_ejected && !chip->sd_io) { rtsx_polling_func() 1344 int enter_L1 = chip->auto_delink_in_L1 && ( rtsx_polling_func() 1345 chip->aspm_l0s_l1_en || chip->ss_en); rtsx_polling_func() 1346 int delink_stage1_cnt = chip->delink_stage1_step; rtsx_polling_func() 1348 chip->delink_stage2_step; rtsx_polling_func() 1350 chip->delink_stage3_step; rtsx_polling_func() 1352 if (chip->auto_delink_cnt <= delink_stage3_cnt) { rtsx_polling_func() 1353 if (chip->auto_delink_cnt == delink_stage1_cnt) { rtsx_polling_func() 1354 rtsx_set_stat(chip, RTSX_STAT_DELINK); rtsx_polling_func() 1356 if (chip->asic_code && CHECK_PID(chip, 0x5208)) rtsx_polling_func() 1357 rtsx_set_phy_reg_bit(chip, 0x1C, 2); rtsx_polling_func() 1359 if (chip->card_exist) { rtsx_polling_func() 1360 dev_dbg(rtsx_dev(chip), "False card inserted, do force delink\n"); rtsx_polling_func() 1363 rtsx_write_register(chip, rtsx_polling_func() 1367 rtsx_write_register(chip, rtsx_polling_func() 1372 rtsx_enter_L1(chip); rtsx_polling_func() 1374 chip->auto_delink_cnt = rtsx_polling_func() 1377 dev_dbg(rtsx_dev(chip), "No card inserted, do delink\n"); rtsx_polling_func() 1380 rtsx_write_register(chip, rtsx_polling_func() 1384 rtsx_write_register(chip, rtsx_polling_func() 1389 rtsx_enter_L1(chip); rtsx_polling_func() 1393 if (chip->auto_delink_cnt == delink_stage2_cnt) { rtsx_polling_func() 1394 dev_dbg(rtsx_dev(chip), "Try to do force delink\n"); rtsx_polling_func() 1397 rtsx_exit_L1(chip); rtsx_polling_func() 1399 if (chip->asic_code && CHECK_PID(chip, 0x5208)) rtsx_polling_func() 1400 rtsx_set_phy_reg_bit(chip, 0x1C, 2); rtsx_polling_func() 1402 rtsx_write_register(chip, CHANGE_LINK_STATE, rtsx_polling_func() 1406 chip->auto_delink_cnt++; rtsx_polling_func() 1409 chip->auto_delink_cnt = 0; rtsx_polling_func() 1413 void rtsx_undo_delink(struct rtsx_chip *chip) rtsx_undo_delink() argument 1415 chip->auto_delink_allowed = 0; rtsx_undo_delink() 1416 rtsx_write_register(chip, CHANGE_LINK_STATE, 0x0A, 0x00); rtsx_undo_delink() 1421 * @chip: Realtek's card reader chip 1427 void rtsx_stop_cmd(struct rtsx_chip *chip, int card) rtsx_stop_cmd() argument 1435 reg = rtsx_readl(chip, addr); rtsx_stop_cmd() 1436 dev_dbg(rtsx_dev(chip), "BAR (0x%02x): 0x%08x\n", addr, reg); rtsx_stop_cmd() 1438 rtsx_writel(chip, RTSX_HCBCTLR, STOP_CMD); rtsx_stop_cmd() 1439 rtsx_writel(chip, RTSX_HDBCTLR, STOP_DMA); rtsx_stop_cmd() 1445 rtsx_read_register(chip, addr, &val); rtsx_stop_cmd() 1446 dev_dbg(rtsx_dev(chip), "0x%04X: 0x%02x\n", addr, val); rtsx_stop_cmd() 1449 rtsx_write_register(chip, DMACTL, 0x80, 0x80); rtsx_stop_cmd() 1450 rtsx_write_register(chip, RBCTL, 0x80, 0x80); rtsx_stop_cmd() 1455 int rtsx_write_register(struct rtsx_chip *chip, u16 addr, u8 mask, u8 data) rtsx_write_register() argument 1464 rtsx_writel(chip, RTSX_HAIMR, val); rtsx_write_register() 1467 val = rtsx_readl(chip, RTSX_HAIMR); rtsx_write_register() 1470 rtsx_trace(chip); rtsx_write_register() 1478 rtsx_trace(chip); rtsx_write_register() 1482 int rtsx_read_register(struct rtsx_chip *chip, u16 addr, u8 *data) rtsx_read_register() argument 1492 rtsx_writel(chip, RTSX_HAIMR, val); rtsx_read_register() 1495 val = rtsx_readl(chip, RTSX_HAIMR); rtsx_read_register() 1501 rtsx_trace(chip); rtsx_read_register() 1511 int rtsx_write_cfg_dw(struct rtsx_chip *chip, u8 func_no, u16 addr, u32 mask, rtsx_write_cfg_dw() argument 1520 retval = rtsx_write_register(chip, CFGDATA0 + i, rtsx_write_cfg_dw() 1524 rtsx_trace(chip); rtsx_write_cfg_dw() 1534 retval = rtsx_write_register(chip, CFGADDR0, 0xFF, (u8)addr); rtsx_write_cfg_dw() 1536 rtsx_trace(chip); rtsx_write_cfg_dw() 1539 retval = rtsx_write_register(chip, CFGADDR1, 0xFF, rtsx_write_cfg_dw() 1542 rtsx_trace(chip); rtsx_write_cfg_dw() 1546 retval = rtsx_write_register(chip, CFGRWCTL, 0xFF, rtsx_write_cfg_dw() 1549 rtsx_trace(chip); rtsx_write_cfg_dw() 1554 retval = rtsx_read_register(chip, CFGRWCTL, &tmp); rtsx_write_cfg_dw() 1556 rtsx_trace(chip); rtsx_write_cfg_dw() 1567 int rtsx_read_cfg_dw(struct rtsx_chip *chip, u8 func_no, u16 addr, u32 *val) rtsx_read_cfg_dw() argument 1574 retval = rtsx_write_register(chip, CFGADDR0, 0xFF, (u8)addr); rtsx_read_cfg_dw() 1576 rtsx_trace(chip); rtsx_read_cfg_dw() 1579 retval = rtsx_write_register(chip, CFGADDR1, 0xFF, (u8)(addr >> 8)); rtsx_read_cfg_dw() 1581 rtsx_trace(chip); rtsx_read_cfg_dw() 1584 retval = rtsx_write_register(chip, CFGRWCTL, 0xFF, rtsx_read_cfg_dw() 1587 rtsx_trace(chip); rtsx_read_cfg_dw() 1592 retval = rtsx_read_register(chip, CFGRWCTL, &tmp); rtsx_read_cfg_dw() 1594 rtsx_trace(chip); rtsx_read_cfg_dw() 1602 retval = rtsx_read_register(chip, CFGDATA0 + i, &tmp); rtsx_read_cfg_dw() 1604 rtsx_trace(chip); rtsx_read_cfg_dw() 1616 int rtsx_write_cfg_seq(struct rtsx_chip *chip, u8 func, u16 addr, u8 *buf, rtsx_write_cfg_seq() argument 1626 rtsx_trace(chip); rtsx_write_cfg_seq() 1635 dev_dbg(rtsx_dev(chip), "dw_len = %d\n", dw_len); rtsx_write_cfg_seq() 1639 rtsx_trace(chip); rtsx_write_cfg_seq() 1646 rtsx_trace(chip); rtsx_write_cfg_seq() 1666 retval = rtsx_write_cfg_dw(chip, func, aligned_addr + i * 4, rtsx_write_cfg_seq() 1671 rtsx_trace(chip); rtsx_write_cfg_seq() 1682 int rtsx_read_cfg_seq(struct rtsx_chip *chip, u8 func, u16 addr, u8 *buf, rtsx_read_cfg_seq() argument 1696 dev_dbg(rtsx_dev(chip), "dw_len = %d\n", dw_len); rtsx_read_cfg_seq() 1700 rtsx_trace(chip); rtsx_read_cfg_seq() 1705 retval = rtsx_read_cfg_dw(chip, func, aligned_addr + i * 4, rtsx_read_cfg_seq() 1709 rtsx_trace(chip); rtsx_read_cfg_seq() 1731 int rtsx_write_phy_register(struct rtsx_chip *chip, u8 addr, u16 val) rtsx_write_phy_register() argument 1738 retval = rtsx_write_register(chip, PHYDATA0, 0xFF, (u8)val); rtsx_write_phy_register() 1740 rtsx_trace(chip); rtsx_write_phy_register() 1743 retval = rtsx_write_register(chip, PHYDATA1, 0xFF, (u8)(val >> 8)); rtsx_write_phy_register() 1745 rtsx_trace(chip); rtsx_write_phy_register() 1748 retval = rtsx_write_register(chip, PHYADDR, 0xFF, addr); rtsx_write_phy_register() 1750 rtsx_trace(chip); rtsx_write_phy_register() 1753 retval = rtsx_write_register(chip, PHYRWCTL, 0xFF, 0x81); rtsx_write_phy_register() 1755 rtsx_trace(chip); rtsx_write_phy_register() 1760 retval = rtsx_read_register(chip, PHYRWCTL, &tmp); rtsx_write_phy_register() 1762 rtsx_trace(chip); rtsx_write_phy_register() 1772 rtsx_trace(chip); rtsx_write_phy_register() 1779 int rtsx_read_phy_register(struct rtsx_chip *chip, u8 addr, u16 *val) rtsx_read_phy_register() argument 1787 retval = rtsx_write_register(chip, PHYADDR, 0xFF, addr); rtsx_read_phy_register() 1789 rtsx_trace(chip); rtsx_read_phy_register() 1792 retval = rtsx_write_register(chip, PHYRWCTL, 0xFF, 0x80); rtsx_read_phy_register() 1794 rtsx_trace(chip); rtsx_read_phy_register() 1799 retval = rtsx_read_register(chip, PHYRWCTL, &tmp); rtsx_read_phy_register() 1801 rtsx_trace(chip); rtsx_read_phy_register() 1811 rtsx_trace(chip); rtsx_read_phy_register() 1815 retval = rtsx_read_register(chip, PHYDATA0, &tmp); rtsx_read_phy_register() 1817 rtsx_trace(chip); rtsx_read_phy_register() 1821 retval = rtsx_read_register(chip, PHYDATA1, &tmp); rtsx_read_phy_register() 1823 rtsx_trace(chip); rtsx_read_phy_register() 1834 int rtsx_read_efuse(struct rtsx_chip *chip, u8 addr, u8 *val) rtsx_read_efuse() argument 1840 retval = rtsx_write_register(chip, EFUSE_CTRL, 0xFF, 0x80 | addr); rtsx_read_efuse() 1842 rtsx_trace(chip); rtsx_read_efuse() 1847 retval = rtsx_read_register(chip, EFUSE_CTRL, &data); rtsx_read_efuse() 1849 rtsx_trace(chip); rtsx_read_efuse() 1858 rtsx_trace(chip); rtsx_read_efuse() 1862 retval = rtsx_read_register(chip, EFUSE_DATA, &data); rtsx_read_efuse() 1864 rtsx_trace(chip); rtsx_read_efuse() 1873 int rtsx_write_efuse(struct rtsx_chip *chip, u8 addr, u8 val) rtsx_write_efuse() argument 1884 dev_dbg(rtsx_dev(chip), "Write 0x%x to 0x%x\n", tmp, addr); rtsx_write_efuse() 1886 retval = rtsx_write_register(chip, EFUSE_DATA, 0xFF, tmp); rtsx_write_efuse() 1888 rtsx_trace(chip); rtsx_write_efuse() 1891 retval = rtsx_write_register(chip, EFUSE_CTRL, 0xFF, rtsx_write_efuse() 1894 rtsx_trace(chip); rtsx_write_efuse() 1899 retval = rtsx_read_register(chip, EFUSE_CTRL, &data); rtsx_write_efuse() 1901 rtsx_trace(chip); rtsx_write_efuse() 1910 rtsx_trace(chip); rtsx_write_efuse() 1920 int rtsx_clr_phy_reg_bit(struct rtsx_chip *chip, u8 reg, u8 bit) rtsx_clr_phy_reg_bit() argument 1925 retval = rtsx_read_phy_register(chip, reg, &value); rtsx_clr_phy_reg_bit() 1927 rtsx_trace(chip); rtsx_clr_phy_reg_bit() 1933 retval = rtsx_write_phy_register(chip, reg, value); rtsx_clr_phy_reg_bit() 1935 rtsx_trace(chip); rtsx_clr_phy_reg_bit() 1943 int rtsx_set_phy_reg_bit(struct rtsx_chip *chip, u8 reg, u8 bit) rtsx_set_phy_reg_bit() argument 1948 retval = rtsx_read_phy_register(chip, reg, &value); rtsx_set_phy_reg_bit() 1950 rtsx_trace(chip); rtsx_set_phy_reg_bit() 1956 retval = rtsx_write_phy_register(chip, reg, value); rtsx_set_phy_reg_bit() 1958 rtsx_trace(chip); rtsx_set_phy_reg_bit() 1966 int rtsx_check_link_ready(struct rtsx_chip *chip) rtsx_check_link_ready() argument 1971 retval = rtsx_read_register(chip, IRQSTAT0, &val); rtsx_check_link_ready() 1973 rtsx_trace(chip); rtsx_check_link_ready() 1977 dev_dbg(rtsx_dev(chip), "IRQSTAT0: 0x%x\n", val); rtsx_check_link_ready() 1979 dev_dbg(rtsx_dev(chip), "Delinked!\n"); rtsx_check_link_ready() 1980 rtsx_write_register(chip, IRQSTAT0, LINK_RDY_INT, LINK_RDY_INT); rtsx_check_link_ready() 1987 static void rtsx_handle_pm_dstate(struct rtsx_chip *chip, u8 dstate) rtsx_handle_pm_dstate() argument 1991 dev_dbg(rtsx_dev(chip), "%04x set pm_dstate to %d\n", rtsx_handle_pm_dstate() 1992 chip->product_id, dstate); rtsx_handle_pm_dstate() 1994 if (CHK_SDIO_EXIST(chip)) { rtsx_handle_pm_dstate() 1997 if (CHECK_PID(chip, 0x5288)) rtsx_handle_pm_dstate() 2002 rtsx_read_cfg_dw(chip, func_no, 0x84, &ultmp); rtsx_handle_pm_dstate() 2003 dev_dbg(rtsx_dev(chip), "pm_dstate of function %d: 0x%x\n", rtsx_handle_pm_dstate() 2005 rtsx_write_cfg_dw(chip, func_no, 0x84, 0xFF, dstate); rtsx_handle_pm_dstate() 2008 rtsx_write_config_byte(chip, 0x44, dstate); rtsx_handle_pm_dstate() 2009 rtsx_write_config_byte(chip, 0x45, 0); rtsx_handle_pm_dstate() 2012 void rtsx_enter_L1(struct rtsx_chip *chip) rtsx_enter_L1() argument 2014 rtsx_handle_pm_dstate(chip, 2); rtsx_enter_L1() 2017 void rtsx_exit_L1(struct rtsx_chip *chip) rtsx_exit_L1() argument 2019 rtsx_write_config_byte(chip, 0x44, 0); rtsx_exit_L1() 2020 rtsx_write_config_byte(chip, 0x45, 0); rtsx_exit_L1() 2023 void rtsx_enter_ss(struct rtsx_chip *chip) rtsx_enter_ss() argument 2025 dev_dbg(rtsx_dev(chip), "Enter Selective Suspend State!\n"); rtsx_enter_ss() 2027 rtsx_write_register(chip, IRQSTAT0, LINK_RDY_INT, LINK_RDY_INT); rtsx_enter_ss() 2029 if (chip->power_down_in_ss) { rtsx_enter_ss() 2030 rtsx_power_off_card(chip); rtsx_enter_ss() 2031 rtsx_force_power_down(chip, SSC_PDCTL | OC_PDCTL); rtsx_enter_ss() 2034 if (CHK_SDIO_EXIST(chip)) rtsx_enter_ss() 2035 rtsx_write_cfg_dw(chip, CHECK_PID(chip, 0x5288) ? 2 : 1, rtsx_enter_ss() 2038 if (chip->auto_delink_en) { rtsx_enter_ss() 2039 rtsx_write_register(chip, HOST_SLEEP_STATE, 0x01, 0x01); rtsx_enter_ss() 2041 if (!chip->phy_debug_mode) { rtsx_enter_ss() 2044 tmp = rtsx_readl(chip, RTSX_BIER); rtsx_enter_ss() 2046 rtsx_writel(chip, RTSX_BIER, tmp); rtsx_enter_ss() 2049 rtsx_write_register(chip, CHANGE_LINK_STATE, 0x02, 0); rtsx_enter_ss() 2052 rtsx_enter_L1(chip); rtsx_enter_ss() 2054 RTSX_CLR_DELINK(chip); rtsx_enter_ss() 2055 rtsx_set_stat(chip, RTSX_STAT_SS); rtsx_enter_ss() 2058 void rtsx_exit_ss(struct rtsx_chip *chip) rtsx_exit_ss() argument 2060 dev_dbg(rtsx_dev(chip), "Exit Selective Suspend State!\n"); rtsx_exit_ss() 2062 rtsx_exit_L1(chip); rtsx_exit_ss() 2064 if (chip->power_down_in_ss) { rtsx_exit_ss() 2065 rtsx_force_power_on(chip, SSC_PDCTL | OC_PDCTL); rtsx_exit_ss() 2069 if (RTSX_TST_DELINK(chip)) { rtsx_exit_ss() 2070 chip->need_reinit = SD_CARD | MS_CARD | XD_CARD; rtsx_exit_ss() 2071 rtsx_reinit_cards(chip, 1); rtsx_exit_ss() 2072 RTSX_CLR_DELINK(chip); rtsx_exit_ss() 2073 } else if (chip->power_down_in_ss) { rtsx_exit_ss() 2074 chip->need_reinit = SD_CARD | MS_CARD | XD_CARD; rtsx_exit_ss() 2075 rtsx_reinit_cards(chip, 0); rtsx_exit_ss() 2079 int rtsx_pre_handle_interrupt(struct rtsx_chip *chip) rtsx_pre_handle_interrupt() argument 2089 if (chip->ss_en) { rtsx_pre_handle_interrupt() 2090 chip->ss_counter = 0; rtsx_pre_handle_interrupt() 2091 if (rtsx_get_stat(chip) == RTSX_STAT_SS) { rtsx_pre_handle_interrupt() 2093 rtsx_exit_L1(chip); rtsx_pre_handle_interrupt() 2094 rtsx_set_stat(chip, RTSX_STAT_RUN); rtsx_pre_handle_interrupt() 2098 int_enable = rtsx_readl(chip, RTSX_BIER); rtsx_pre_handle_interrupt() 2099 chip->int_reg = rtsx_readl(chip, RTSX_BIPR); rtsx_pre_handle_interrupt() 2101 if (((chip->int_reg & int_enable) == 0) || rtsx_pre_handle_interrupt() 2102 (chip->int_reg == 0xFFFFFFFF)) rtsx_pre_handle_interrupt() 2105 status = chip->int_reg &= (int_enable | 0x7FFFFF); rtsx_pre_handle_interrupt() 2108 chip->auto_delink_cnt = 0; rtsx_pre_handle_interrupt() 2112 set_bit(SD_NR, &chip->need_reset); rtsx_pre_handle_interrupt() 2114 set_bit(SD_NR, &chip->need_release); rtsx_pre_handle_interrupt() 2115 chip->sd_reset_counter = 0; rtsx_pre_handle_interrupt() 2116 chip->sd_show_cnt = 0; rtsx_pre_handle_interrupt() 2117 clear_bit(SD_NR, &chip->need_reset); rtsx_pre_handle_interrupt() 2127 set_bit(SD_NR, &chip->need_reinit); rtsx_pre_handle_interrupt() 2129 if (!CHECK_PID(chip, 0x5288) || CHECK_BARO_PKG(chip, QFN)) { rtsx_pre_handle_interrupt() 2132 set_bit(XD_NR, &chip->need_reset); rtsx_pre_handle_interrupt() 2134 set_bit(XD_NR, &chip->need_release); rtsx_pre_handle_interrupt() 2135 chip->xd_reset_counter = 0; rtsx_pre_handle_interrupt() 2136 chip->xd_show_cnt = 0; rtsx_pre_handle_interrupt() 2137 clear_bit(XD_NR, &chip->need_reset); rtsx_pre_handle_interrupt() 2141 set_bit(XD_NR, &chip->need_reinit); rtsx_pre_handle_interrupt() 2146 set_bit(MS_NR, &chip->need_reset); rtsx_pre_handle_interrupt() 2148 set_bit(MS_NR, &chip->need_release); rtsx_pre_handle_interrupt() 2149 chip->ms_reset_counter = 0; rtsx_pre_handle_interrupt() 2150 chip->ms_show_cnt = 0; rtsx_pre_handle_interrupt() 2151 clear_bit(MS_NR, &chip->need_reset); rtsx_pre_handle_interrupt() 2155 set_bit(MS_NR, &chip->need_reinit); rtsx_pre_handle_interrupt() 2160 chip->ocp_int = ocp_int & status; rtsx_pre_handle_interrupt() 2163 if (chip->sd_io && (chip->int_reg & DATA_DONE_INT)) rtsx_pre_handle_interrupt() 2164 chip->int_reg &= ~(u32)DATA_DONE_INT; rtsx_pre_handle_interrupt() 2169 void rtsx_do_before_power_down(struct rtsx_chip *chip, int pm_stat) rtsx_do_before_power_down() argument 2173 dev_dbg(rtsx_dev(chip), "%s, pm_stat = %d\n", __func__, pm_stat); rtsx_do_before_power_down() 2175 rtsx_set_stat(chip, RTSX_STAT_SUSPEND); rtsx_do_before_power_down() 2177 retval = rtsx_force_power_on(chip, SSC_PDCTL); rtsx_do_before_power_down() 2181 rtsx_release_cards(chip); rtsx_do_before_power_down() 2182 rtsx_disable_bus_int(chip); rtsx_do_before_power_down() 2183 turn_off_led(chip, LED_GPIO); rtsx_do_before_power_down() 2186 if (chip->sd_io) { rtsx_do_before_power_down() 2187 chip->sdio_in_charge = 1; rtsx_do_before_power_down() 2188 if (CHECK_PID(chip, 0x5208)) { rtsx_do_before_power_down() 2189 rtsx_write_register(chip, TLPTISTAT, 0x08, 0x08); rtsx_do_before_power_down() 2191 rtsx_write_register(chip, 0xFE70, 0x80, 0x80); rtsx_do_before_power_down() 2192 } else if (CHECK_PID(chip, 0x5288)) { rtsx_do_before_power_down() 2193 rtsx_write_register(chip, TLPTISTAT, 0x08, 0x08); rtsx_do_before_power_down() 2195 rtsx_write_register(chip, 0xFE5A, 0x08, 0x08); rtsx_do_before_power_down() 2200 if (CHECK_PID(chip, 0x5208) && (chip->ic_version >= IC_VER_D)) { rtsx_do_before_power_down() 2202 rtsx_write_register(chip, PETXCFG, 0x08, 0x08); rtsx_do_before_power_down() 2206 dev_dbg(rtsx_dev(chip), "Host enter S1\n"); rtsx_do_before_power_down() 2207 rtsx_write_register(chip, HOST_SLEEP_STATE, 0x03, rtsx_do_before_power_down() 2210 if (chip->s3_pwr_off_delay > 0) rtsx_do_before_power_down() 2211 wait_timeout(chip->s3_pwr_off_delay); rtsx_do_before_power_down() 2213 dev_dbg(rtsx_dev(chip), "Host enter S3\n"); rtsx_do_before_power_down() 2214 rtsx_write_register(chip, HOST_SLEEP_STATE, 0x03, rtsx_do_before_power_down() 2218 if (chip->do_delink_before_power_down && chip->auto_delink_en) rtsx_do_before_power_down() 2219 rtsx_write_register(chip, CHANGE_LINK_STATE, 0x02, 2); rtsx_do_before_power_down() 2221 rtsx_force_power_down(chip, SSC_PDCTL | OC_PDCTL); rtsx_do_before_power_down() 2223 chip->cur_clk = 0; rtsx_do_before_power_down() 2224 chip->cur_card = 0; rtsx_do_before_power_down() 2225 chip->card_exist = 0; rtsx_do_before_power_down() 2228 void rtsx_enable_aspm(struct rtsx_chip *chip) rtsx_enable_aspm() argument 2230 if (chip->aspm_l0s_l1_en && chip->dynamic_aspm && !chip->aspm_enabled) { rtsx_enable_aspm() 2231 dev_dbg(rtsx_dev(chip), "Try to enable ASPM\n"); rtsx_enable_aspm() 2232 chip->aspm_enabled = 1; rtsx_enable_aspm() 2234 if (chip->asic_code && CHECK_PID(chip, 0x5208)) rtsx_enable_aspm() 2235 rtsx_write_phy_register(chip, 0x07, 0); rtsx_enable_aspm() 2236 if (CHECK_PID(chip, 0x5208)) { rtsx_enable_aspm() 2237 rtsx_write_register(chip, ASPM_FORCE_CTL, 0xF3, rtsx_enable_aspm() 2238 0x30 | chip->aspm_level[0]); rtsx_enable_aspm() 2240 rtsx_write_config_byte(chip, LCTLR, rtsx_enable_aspm() 2241 chip->aspm_l0s_l1_en); rtsx_enable_aspm() 2244 if (CHK_SDIO_EXIST(chip)) { rtsx_enable_aspm() 2245 u16 val = chip->aspm_l0s_l1_en | 0x0100; rtsx_enable_aspm() 2247 rtsx_write_cfg_dw(chip, CHECK_PID(chip, 0x5288) ? 2 : 1, rtsx_enable_aspm() 2253 void rtsx_disable_aspm(struct rtsx_chip *chip) rtsx_disable_aspm() argument 2255 if (CHECK_PID(chip, 0x5208)) rtsx_disable_aspm() 2256 rtsx_monitor_aspm_config(chip); rtsx_disable_aspm() 2258 if (chip->aspm_l0s_l1_en && chip->dynamic_aspm && chip->aspm_enabled) { rtsx_disable_aspm() 2259 dev_dbg(rtsx_dev(chip), "Try to disable ASPM\n"); rtsx_disable_aspm() 2260 chip->aspm_enabled = 0; rtsx_disable_aspm() 2262 if (chip->asic_code && CHECK_PID(chip, 0x5208)) rtsx_disable_aspm() 2263 rtsx_write_phy_register(chip, 0x07, 0x0129); rtsx_disable_aspm() 2264 if (CHECK_PID(chip, 0x5208)) rtsx_disable_aspm() 2265 rtsx_write_register(chip, ASPM_FORCE_CTL, rtsx_disable_aspm() 2268 rtsx_write_config_byte(chip, LCTLR, 0x00); rtsx_disable_aspm() 2274 int rtsx_read_ppbuf(struct rtsx_chip *chip, u8 *buf, int buf_len) rtsx_read_ppbuf() argument 2282 rtsx_trace(chip); rtsx_read_ppbuf() 2289 rtsx_init_cmd(chip); rtsx_read_ppbuf() 2292 rtsx_add_cmd(chip, READ_REG_CMD, reg_addr++, 0, 0); rtsx_read_ppbuf() 2294 retval = rtsx_send_cmd(chip, 0, 250); rtsx_read_ppbuf() 2296 rtsx_trace(chip); rtsx_read_ppbuf() 2300 memcpy(ptr, rtsx_get_cmd_data(chip), 256); rtsx_read_ppbuf() 2305 rtsx_init_cmd(chip); rtsx_read_ppbuf() 2308 rtsx_add_cmd(chip, READ_REG_CMD, reg_addr++, 0, 0); rtsx_read_ppbuf() 2310 retval = rtsx_send_cmd(chip, 0, 250); rtsx_read_ppbuf() 2312 rtsx_trace(chip); rtsx_read_ppbuf() 2317 memcpy(ptr, rtsx_get_cmd_data(chip), buf_len%256); rtsx_read_ppbuf() 2322 int rtsx_write_ppbuf(struct rtsx_chip *chip, u8 *buf, int buf_len) rtsx_write_ppbuf() argument 2330 rtsx_trace(chip); rtsx_write_ppbuf() 2337 rtsx_init_cmd(chip); rtsx_write_ppbuf() 2340 rtsx_add_cmd(chip, WRITE_REG_CMD, reg_addr++, 0xFF, rtsx_write_ppbuf() 2345 retval = rtsx_send_cmd(chip, 0, 250); rtsx_write_ppbuf() 2347 rtsx_trace(chip); rtsx_write_ppbuf() 2353 rtsx_init_cmd(chip); rtsx_write_ppbuf() 2356 rtsx_add_cmd(chip, WRITE_REG_CMD, reg_addr++, 0xFF, rtsx_write_ppbuf() 2361 retval = rtsx_send_cmd(chip, 0, 250); rtsx_write_ppbuf() 2363 rtsx_trace(chip); rtsx_write_ppbuf() 2371 int rtsx_check_chip_exist(struct rtsx_chip *chip) rtsx_check_chip_exist() argument 2373 if (rtsx_readl(chip, 0) == 0xFFFFFFFF) { rtsx_check_chip_exist() 2374 rtsx_trace(chip); rtsx_check_chip_exist() 2381 int rtsx_force_power_on(struct rtsx_chip *chip, u8 ctl) rtsx_force_power_on() argument 2392 if (CHECK_LUN_MODE(chip, SD_MS_2LUN)) rtsx_force_power_on() 2398 retval = rtsx_write_register(chip, FPDCTL, mask, 0); rtsx_force_power_on() 2400 rtsx_trace(chip); rtsx_force_power_on() 2404 if (CHECK_PID(chip, 0x5288)) rtsx_force_power_on() 2411 int rtsx_force_power_down(struct rtsx_chip *chip, u8 ctl) rtsx_force_power_down() argument 2422 if (CHECK_LUN_MODE(chip, SD_MS_2LUN)) rtsx_force_power_down() 2429 retval = rtsx_write_register(chip, FPDCTL, mask, val); rtsx_force_power_down() 2431 rtsx_trace(chip); rtsx_force_power_down()
H A D	rtsx_card.c	34 void do_remaining_work(struct rtsx_chip *chip) do_remaining_work() argument 36 struct sd_info *sd_card = &(chip->sd_card); do_remaining_work() 38 struct xd_info *xd_card = &(chip->xd_card); do_remaining_work() 40 struct ms_info *ms_card = &(chip->ms_card); do_remaining_work() 42 if (chip->card_ready & SD_CARD) { do_remaining_work() 44 rtsx_set_stat(chip, RTSX_STAT_RUN); do_remaining_work() 52 if (chip->card_ready & XD_CARD) { do_remaining_work() 54 rtsx_set_stat(chip, RTSX_STAT_RUN); do_remaining_work() 62 if (chip->card_ready & MS_CARD) { do_remaining_work() 65 rtsx_set_stat(chip, RTSX_STAT_RUN); do_remaining_work() 73 rtsx_set_stat(chip, RTSX_STAT_RUN); do_remaining_work() 83 sd_cleanup_work(chip); do_remaining_work() 86 xd_cleanup_work(chip); do_remaining_work() 89 ms_cleanup_work(chip); do_remaining_work() 92 void try_to_switch_sdio_ctrl(struct rtsx_chip *chip) try_to_switch_sdio_ctrl() argument 96 rtsx_read_register(chip, 0xFF34, &reg1); try_to_switch_sdio_ctrl() 97 rtsx_read_register(chip, 0xFF38, &reg2); try_to_switch_sdio_ctrl() 98 dev_dbg(rtsx_dev(chip), "reg 0xFF34: 0x%x, reg 0xFF38: 0x%x\n", try_to_switch_sdio_ctrl() 101 chip->sd_int = 1; try_to_switch_sdio_ctrl() 102 rtsx_write_register(chip, SDIO_CTRL, 0xFF, try_to_switch_sdio_ctrl() 104 rtsx_write_register(chip, PWR_GATE_CTRL, try_to_switch_sdio_ctrl() 110 void dynamic_configure_sdio_aspm(struct rtsx_chip *chip) dynamic_configure_sdio_aspm() argument 116 rtsx_read_register(chip, 0xFF08 + i, &buf[i]); dynamic_configure_sdio_aspm() 117 rtsx_read_register(chip, 0xFF25, &reg); dynamic_configure_sdio_aspm() 118 if ((memcmp(buf, chip->sdio_raw_data, 12) != 0) || (reg & 0x03)) { dynamic_configure_sdio_aspm() 119 chip->sdio_counter = 0; dynamic_configure_sdio_aspm() 120 chip->sdio_idle = 0; dynamic_configure_sdio_aspm() 122 if (!chip->sdio_idle) { dynamic_configure_sdio_aspm() 123 chip->sdio_counter++; dynamic_configure_sdio_aspm() 124 if (chip->sdio_counter >= SDIO_IDLE_COUNT) { dynamic_configure_sdio_aspm() 125 chip->sdio_counter = 0; dynamic_configure_sdio_aspm() 126 chip->sdio_idle = 1; dynamic_configure_sdio_aspm() 130 memcpy(chip->sdio_raw_data, buf, 12); dynamic_configure_sdio_aspm() 132 if (chip->sdio_idle) { dynamic_configure_sdio_aspm() 133 if (!chip->sdio_aspm) { dynamic_configure_sdio_aspm() 134 dev_dbg(rtsx_dev(chip), "SDIO enter ASPM!\n"); dynamic_configure_sdio_aspm() 135 rtsx_write_register(chip, ASPM_FORCE_CTL, 0xFC, dynamic_configure_sdio_aspm() 136 0x30 | (chip->aspm_level[1] << 2)); dynamic_configure_sdio_aspm() 137 chip->sdio_aspm = 1; dynamic_configure_sdio_aspm() 140 if (chip->sdio_aspm) { dynamic_configure_sdio_aspm() 141 dev_dbg(rtsx_dev(chip), "SDIO exit ASPM!\n"); dynamic_configure_sdio_aspm() 142 rtsx_write_register(chip, ASPM_FORCE_CTL, 0xFC, 0x30); dynamic_configure_sdio_aspm() 143 chip->sdio_aspm = 0; dynamic_configure_sdio_aspm() 149 void do_reset_sd_card(struct rtsx_chip *chip) do_reset_sd_card() argument 153 dev_dbg(rtsx_dev(chip), "%s: %d, card2lun = 0x%x\n", __func__, do_reset_sd_card() 154 chip->sd_reset_counter, chip->card2lun[SD_CARD]); do_reset_sd_card() 156 if (chip->card2lun[SD_CARD] >= MAX_ALLOWED_LUN_CNT) { do_reset_sd_card() 157 clear_bit(SD_NR, &(chip->need_reset)); do_reset_sd_card() 158 chip->sd_reset_counter = 0; do_reset_sd_card() 159 chip->sd_show_cnt = 0; do_reset_sd_card() 163 chip->rw_fail_cnt[chip->card2lun[SD_CARD]] = 0; do_reset_sd_card() 165 rtsx_set_stat(chip, RTSX_STAT_RUN); do_reset_sd_card() 166 rtsx_write_register(chip, SDIO_CTRL, 0xFF, 0); do_reset_sd_card() 168 retval = reset_sd_card(chip); do_reset_sd_card() 169 if (chip->need_release & SD_CARD) do_reset_sd_card() 172 clear_bit(SD_NR, &(chip->need_reset)); do_reset_sd_card() 173 chip->sd_reset_counter = 0; do_reset_sd_card() 174 chip->sd_show_cnt = 0; do_reset_sd_card() 175 chip->card_ready |= SD_CARD; do_reset_sd_card() 176 chip->card_fail &= ~SD_CARD; do_reset_sd_card() 177 chip->rw_card[chip->card2lun[SD_CARD]] = sd_rw; do_reset_sd_card() 179 if (chip->sd_io || (chip->sd_reset_counter >= MAX_RESET_CNT)) { do_reset_sd_card() 180 clear_bit(SD_NR, &(chip->need_reset)); do_reset_sd_card() 181 chip->sd_reset_counter = 0; do_reset_sd_card() 182 chip->sd_show_cnt = 0; do_reset_sd_card() 184 chip->sd_reset_counter++; do_reset_sd_card() 186 chip->card_ready &= ~SD_CARD; do_reset_sd_card() 187 chip->card_fail |= SD_CARD; do_reset_sd_card() 188 chip->capacity[chip->card2lun[SD_CARD]] = 0; do_reset_sd_card() 189 chip->rw_card[chip->card2lun[SD_CARD]] = NULL; do_reset_sd_card() 191 rtsx_write_register(chip, CARD_OE, SD_OUTPUT_EN, 0); do_reset_sd_card() 192 if (!chip->ft2_fast_mode) do_reset_sd_card() 193 card_power_off(chip, SD_CARD); do_reset_sd_card() 194 if (chip->sd_io) { do_reset_sd_card() 195 chip->sd_int = 0; do_reset_sd_card() 196 try_to_switch_sdio_ctrl(chip); do_reset_sd_card() 198 disable_card_clock(chip, SD_CARD); do_reset_sd_card() 203 void do_reset_xd_card(struct rtsx_chip *chip) do_reset_xd_card() argument 207 dev_dbg(rtsx_dev(chip), "%s: %d, card2lun = 0x%x\n", __func__, do_reset_xd_card() 208 chip->xd_reset_counter, chip->card2lun[XD_CARD]); do_reset_xd_card() 210 if (chip->card2lun[XD_CARD] >= MAX_ALLOWED_LUN_CNT) { do_reset_xd_card() 211 clear_bit(XD_NR, &(chip->need_reset)); do_reset_xd_card() 212 chip->xd_reset_counter = 0; do_reset_xd_card() 213 chip->xd_show_cnt = 0; do_reset_xd_card() 217 chip->rw_fail_cnt[chip->card2lun[XD_CARD]] = 0; do_reset_xd_card() 219 rtsx_set_stat(chip, RTSX_STAT_RUN); do_reset_xd_card() 220 rtsx_write_register(chip, SDIO_CTRL, 0xFF, 0); do_reset_xd_card() 222 retval = reset_xd_card(chip); do_reset_xd_card() 223 if (chip->need_release & XD_CARD) do_reset_xd_card() 226 clear_bit(XD_NR, &(chip->need_reset)); do_reset_xd_card() 227 chip->xd_reset_counter = 0; do_reset_xd_card() 228 chip->card_ready |= XD_CARD; do_reset_xd_card() 229 chip->card_fail &= ~XD_CARD; do_reset_xd_card() 230 chip->rw_card[chip->card2lun[XD_CARD]] = xd_rw; do_reset_xd_card() 232 if (chip->xd_reset_counter >= MAX_RESET_CNT) { do_reset_xd_card() 233 clear_bit(XD_NR, &(chip->need_reset)); do_reset_xd_card() 234 chip->xd_reset_counter = 0; do_reset_xd_card() 235 chip->xd_show_cnt = 0; do_reset_xd_card() 237 chip->xd_reset_counter++; do_reset_xd_card() 239 chip->card_ready &= ~XD_CARD; do_reset_xd_card() 240 chip->card_fail |= XD_CARD; do_reset_xd_card() 241 chip->capacity[chip->card2lun[XD_CARD]] = 0; do_reset_xd_card() 242 chip->rw_card[chip->card2lun[XD_CARD]] = NULL; do_reset_xd_card() 244 rtsx_write_register(chip, CARD_OE, XD_OUTPUT_EN, 0); do_reset_xd_card() 245 if (!chip->ft2_fast_mode) do_reset_xd_card() 246 card_power_off(chip, XD_CARD); do_reset_xd_card() 247 disable_card_clock(chip, XD_CARD); do_reset_xd_card() 251 void do_reset_ms_card(struct rtsx_chip *chip) do_reset_ms_card() argument 255 dev_dbg(rtsx_dev(chip), "%s: %d, card2lun = 0x%x\n", __func__, do_reset_ms_card() 256 chip->ms_reset_counter, chip->card2lun[MS_CARD]); do_reset_ms_card() 258 if (chip->card2lun[MS_CARD] >= MAX_ALLOWED_LUN_CNT) { do_reset_ms_card() 259 clear_bit(MS_NR, &(chip->need_reset)); do_reset_ms_card() 260 chip->ms_reset_counter = 0; do_reset_ms_card() 261 chip->ms_show_cnt = 0; do_reset_ms_card() 265 chip->rw_fail_cnt[chip->card2lun[MS_CARD]] = 0; do_reset_ms_card() 267 rtsx_set_stat(chip, RTSX_STAT_RUN); do_reset_ms_card() 268 rtsx_write_register(chip, SDIO_CTRL, 0xFF, 0); do_reset_ms_card() 270 retval = reset_ms_card(chip); do_reset_ms_card() 271 if (chip->need_release & MS_CARD) do_reset_ms_card() 274 clear_bit(MS_NR, &(chip->need_reset)); do_reset_ms_card() 275 chip->ms_reset_counter = 0; do_reset_ms_card() 276 chip->card_ready |= MS_CARD; do_reset_ms_card() 277 chip->card_fail &= ~MS_CARD; do_reset_ms_card() 278 chip->rw_card[chip->card2lun[MS_CARD]] = ms_rw; do_reset_ms_card() 280 if (chip->ms_reset_counter >= MAX_RESET_CNT) { do_reset_ms_card() 281 clear_bit(MS_NR, &(chip->need_reset)); do_reset_ms_card() 282 chip->ms_reset_counter = 0; do_reset_ms_card() 283 chip->ms_show_cnt = 0; do_reset_ms_card() 285 chip->ms_reset_counter++; do_reset_ms_card() 287 chip->card_ready &= ~MS_CARD; do_reset_ms_card() 288 chip->card_fail |= MS_CARD; do_reset_ms_card() 289 chip->capacity[chip->card2lun[MS_CARD]] = 0; do_reset_ms_card() 290 chip->rw_card[chip->card2lun[MS_CARD]] = NULL; do_reset_ms_card() 292 rtsx_write_register(chip, CARD_OE, MS_OUTPUT_EN, 0); do_reset_ms_card() 293 if (!chip->ft2_fast_mode) do_reset_ms_card() 294 card_power_off(chip, MS_CARD); do_reset_ms_card() 295 disable_card_clock(chip, MS_CARD); do_reset_ms_card() 299 static void release_sdio(struct rtsx_chip *chip) release_sdio() argument 301 if (chip->sd_io) { release_sdio() 302 rtsx_write_register(chip, CARD_STOP, SD_STOP | SD_CLR_ERR, release_sdio() 305 if (chip->chip_insert_with_sdio) { release_sdio() 306 chip->chip_insert_with_sdio = 0; release_sdio() 308 if (CHECK_PID(chip, 0x5288)) release_sdio() 309 rtsx_write_register(chip, 0xFE5A, 0x08, 0x00); release_sdio() 311 rtsx_write_register(chip, 0xFE70, 0x80, 0x00); release_sdio() 314 rtsx_write_register(chip, SDIO_CTRL, SDIO_CD_CTRL, 0); release_sdio() 315 chip->sd_io = 0; release_sdio() 319 void rtsx_power_off_card(struct rtsx_chip *chip) rtsx_power_off_card() argument 321 if ((chip->card_ready & SD_CARD) || chip->sd_io) { rtsx_power_off_card() 322 sd_cleanup_work(chip); rtsx_power_off_card() 323 sd_power_off_card3v3(chip); rtsx_power_off_card() 326 if (chip->card_ready & XD_CARD) { rtsx_power_off_card() 327 xd_cleanup_work(chip); rtsx_power_off_card() 328 xd_power_off_card3v3(chip); rtsx_power_off_card() 331 if (chip->card_ready & MS_CARD) { rtsx_power_off_card() 332 ms_cleanup_work(chip); rtsx_power_off_card() 333 ms_power_off_card3v3(chip); rtsx_power_off_card() 337 void rtsx_release_cards(struct rtsx_chip *chip) rtsx_release_cards() argument 339 chip->int_reg = rtsx_readl(chip, RTSX_BIPR); rtsx_release_cards() 341 if ((chip->card_ready & SD_CARD) || chip->sd_io) { rtsx_release_cards() 342 if (chip->int_reg & SD_EXIST) rtsx_release_cards() 343 sd_cleanup_work(chip); rtsx_release_cards() 344 release_sd_card(chip); rtsx_release_cards() 347 if (chip->card_ready & XD_CARD) { rtsx_release_cards() 348 if (chip->int_reg & XD_EXIST) rtsx_release_cards() 349 xd_cleanup_work(chip); rtsx_release_cards() 350 release_xd_card(chip); rtsx_release_cards() 353 if (chip->card_ready & MS_CARD) { rtsx_release_cards() 354 if (chip->int_reg & MS_EXIST) rtsx_release_cards() 355 ms_cleanup_work(chip); rtsx_release_cards() 356 release_ms_card(chip); rtsx_release_cards() 360 void rtsx_reset_cards(struct rtsx_chip *chip) rtsx_reset_cards() argument 362 if (!chip->need_reset) rtsx_reset_cards() 365 rtsx_set_stat(chip, RTSX_STAT_RUN); rtsx_reset_cards() 367 rtsx_force_power_on(chip, SSC_PDCTL | OC_PDCTL); rtsx_reset_cards() 369 rtsx_disable_aspm(chip); rtsx_reset_cards() 371 if ((chip->need_reset & SD_CARD) && chip->chip_insert_with_sdio) rtsx_reset_cards() 372 clear_bit(SD_NR, &(chip->need_reset)); rtsx_reset_cards() 374 if (chip->need_reset & XD_CARD) { rtsx_reset_cards() 375 chip->card_exist |= XD_CARD; rtsx_reset_cards() 377 if (chip->xd_show_cnt >= MAX_SHOW_CNT) rtsx_reset_cards() 378 do_reset_xd_card(chip); rtsx_reset_cards() 380 chip->xd_show_cnt++; rtsx_reset_cards() 382 if (CHECK_PID(chip, 0x5288) && CHECK_BARO_PKG(chip, QFN)) { rtsx_reset_cards() 383 if (chip->card_exist & XD_CARD) { rtsx_reset_cards() 384 clear_bit(SD_NR, &(chip->need_reset)); rtsx_reset_cards() 385 clear_bit(MS_NR, &(chip->need_reset)); rtsx_reset_cards() 388 if (chip->need_reset & SD_CARD) { rtsx_reset_cards() 389 chip->card_exist |= SD_CARD; rtsx_reset_cards() 391 if (chip->sd_show_cnt >= MAX_SHOW_CNT) { rtsx_reset_cards() 392 rtsx_write_register(chip, RBCTL, RB_FLUSH, RB_FLUSH); rtsx_reset_cards() 393 do_reset_sd_card(chip); rtsx_reset_cards() 395 chip->sd_show_cnt++; rtsx_reset_cards() 398 if (chip->need_reset & MS_CARD) { rtsx_reset_cards() 399 chip->card_exist |= MS_CARD; rtsx_reset_cards() 401 if (chip->ms_show_cnt >= MAX_SHOW_CNT) rtsx_reset_cards() 402 do_reset_ms_card(chip); rtsx_reset_cards() 404 chip->ms_show_cnt++; rtsx_reset_cards() 408 void rtsx_reinit_cards(struct rtsx_chip *chip, int reset_chip) rtsx_reinit_cards() argument 410 rtsx_set_stat(chip, RTSX_STAT_RUN); rtsx_reinit_cards() 412 rtsx_force_power_on(chip, SSC_PDCTL | OC_PDCTL); rtsx_reinit_cards() 415 rtsx_reset_chip(chip); rtsx_reinit_cards() 417 chip->int_reg = rtsx_readl(chip, RTSX_BIPR); rtsx_reinit_cards() 419 if ((chip->int_reg & SD_EXIST) && (chip->need_reinit & SD_CARD)) { rtsx_reinit_cards() 420 release_sdio(chip); rtsx_reinit_cards() 421 release_sd_card(chip); rtsx_reinit_cards() 425 chip->card_exist |= SD_CARD; rtsx_reinit_cards() 426 do_reset_sd_card(chip); rtsx_reinit_cards() 429 if ((chip->int_reg & XD_EXIST) && (chip->need_reinit & XD_CARD)) { rtsx_reinit_cards() 430 release_xd_card(chip); rtsx_reinit_cards() 434 chip->card_exist |= XD_CARD; rtsx_reinit_cards() 435 do_reset_xd_card(chip); rtsx_reinit_cards() 438 if ((chip->int_reg & MS_EXIST) && (chip->need_reinit & MS_CARD)) { rtsx_reinit_cards() 439 release_ms_card(chip); rtsx_reinit_cards() 443 chip->card_exist |= MS_CARD; rtsx_reinit_cards() 444 do_reset_ms_card(chip); rtsx_reinit_cards() 447 chip->need_reinit = 0; rtsx_reinit_cards() 451 void card_cd_debounce(struct rtsx_chip *chip, unsigned long *need_reset, card_cd_debounce() argument 456 chip->int_reg = rtsx_readl(chip, RTSX_BIPR); card_cd_debounce() 458 if (chip->card_exist) { card_cd_debounce() 459 if (chip->card_exist & XD_CARD) { card_cd_debounce() 460 if (!(chip->int_reg & XD_EXIST)) card_cd_debounce() 462 } else if (chip->card_exist & SD_CARD) { card_cd_debounce() 463 if (!(chip->int_reg & SD_EXIST)) card_cd_debounce() 465 } else if (chip->card_exist & MS_CARD) { card_cd_debounce() 466 if (!(chip->int_reg & MS_EXIST)) card_cd_debounce() 470 if (chip->int_reg & XD_EXIST) card_cd_debounce() 472 else if (chip->int_reg & SD_EXIST) card_cd_debounce() 474 else if (chip->int_reg & MS_EXIST) card_cd_debounce() 483 chip->int_reg = rtsx_readl(chip, RTSX_BIPR); card_cd_debounce() 485 if (chip->int_reg & XD_EXIST) card_cd_debounce() 490 if (chip->int_reg & SD_EXIST) card_cd_debounce() 495 if (chip->int_reg & MS_EXIST) card_cd_debounce() 504 if (!(chip->card_exist & XD_CARD) && card_cd_debounce() 507 if (!(chip->card_exist & SD_CARD) && card_cd_debounce() 510 if (!(chip->card_exist & MS_CARD) && card_cd_debounce() 515 if (CHECK_PID(chip, 0x5288) && CHECK_BARO_PKG(chip, QFN)) card_cd_debounce() 516 rtsx_write_register(chip, HOST_SLEEP_STATE, 0xC0, 0x00); card_cd_debounce() 525 void rtsx_init_cards(struct rtsx_chip *chip) rtsx_init_cards() argument 527 if (RTSX_TST_DELINK(chip) && (rtsx_get_stat(chip) != RTSX_STAT_SS)) { rtsx_init_cards() 528 dev_dbg(rtsx_dev(chip), "Reset chip in polling thread!\n"); rtsx_init_cards() 529 rtsx_reset_chip(chip); rtsx_init_cards() 530 RTSX_CLR_DELINK(chip); rtsx_init_cards() 534 card_cd_debounce(chip, &(chip->need_reset), &(chip->need_release)); rtsx_init_cards() 537 if (chip->need_release) { rtsx_init_cards() 538 if (CHECK_PID(chip, 0x5288) && CHECK_BARO_PKG(chip, QFN)) { rtsx_init_cards() 539 if (chip->int_reg & XD_EXIST) { rtsx_init_cards() 540 clear_bit(SD_NR, &(chip->need_release)); rtsx_init_cards() 541 clear_bit(MS_NR, &(chip->need_release)); rtsx_init_cards() 545 if (!(chip->card_exist & SD_CARD) && !chip->sd_io) rtsx_init_cards() 546 clear_bit(SD_NR, &(chip->need_release)); rtsx_init_cards() 547 if (!(chip->card_exist & XD_CARD)) rtsx_init_cards() 548 clear_bit(XD_NR, &(chip->need_release)); rtsx_init_cards() 549 if (!(chip->card_exist & MS_CARD)) rtsx_init_cards() 550 clear_bit(MS_NR, &(chip->need_release)); rtsx_init_cards() 552 dev_dbg(rtsx_dev(chip), "chip->need_release = 0x%x\n", rtsx_init_cards() 553 (unsigned int)(chip->need_release)); rtsx_init_cards() 556 if (chip->need_release) { rtsx_init_cards() 557 if (chip->ocp_stat & (CARD_OC_NOW | CARD_OC_EVER)) rtsx_init_cards() 558 rtsx_write_register(chip, OCPCLR, rtsx_init_cards() 561 chip->ocp_stat = 0; rtsx_init_cards() 564 if (chip->need_release) { rtsx_init_cards() 565 rtsx_set_stat(chip, RTSX_STAT_RUN); rtsx_init_cards() 566 rtsx_force_power_on(chip, SSC_PDCTL | OC_PDCTL); rtsx_init_cards() 569 if (chip->need_release & SD_CARD) { rtsx_init_cards() 570 clear_bit(SD_NR, &(chip->need_release)); rtsx_init_cards() 571 chip->card_exist &= ~SD_CARD; rtsx_init_cards() 572 chip->card_ejected &= ~SD_CARD; rtsx_init_cards() 573 chip->card_fail &= ~SD_CARD; rtsx_init_cards() 574 CLR_BIT(chip->lun_mc, chip->card2lun[SD_CARD]); rtsx_init_cards() 575 chip->rw_fail_cnt[chip->card2lun[SD_CARD]] = 0; rtsx_init_cards() 576 rtsx_write_register(chip, RBCTL, RB_FLUSH, RB_FLUSH); rtsx_init_cards() 578 release_sdio(chip); rtsx_init_cards() 579 release_sd_card(chip); rtsx_init_cards() 582 if (chip->need_release & XD_CARD) { rtsx_init_cards() 583 clear_bit(XD_NR, &(chip->need_release)); rtsx_init_cards() 584 chip->card_exist &= ~XD_CARD; rtsx_init_cards() 585 chip->card_ejected &= ~XD_CARD; rtsx_init_cards() 586 chip->card_fail &= ~XD_CARD; rtsx_init_cards() 587 CLR_BIT(chip->lun_mc, chip->card2lun[XD_CARD]); rtsx_init_cards() 588 chip->rw_fail_cnt[chip->card2lun[XD_CARD]] = 0; rtsx_init_cards() 590 release_xd_card(chip); rtsx_init_cards() 592 if (CHECK_PID(chip, 0x5288) && rtsx_init_cards() 593 CHECK_BARO_PKG(chip, QFN)) rtsx_init_cards() 594 rtsx_write_register(chip, HOST_SLEEP_STATE, rtsx_init_cards() 598 if (chip->need_release & MS_CARD) { rtsx_init_cards() 599 clear_bit(MS_NR, &(chip->need_release)); rtsx_init_cards() 600 chip->card_exist &= ~MS_CARD; rtsx_init_cards() 601 chip->card_ejected &= ~MS_CARD; rtsx_init_cards() 602 chip->card_fail &= ~MS_CARD; rtsx_init_cards() 603 CLR_BIT(chip->lun_mc, chip->card2lun[MS_CARD]); rtsx_init_cards() 604 chip->rw_fail_cnt[chip->card2lun[MS_CARD]] = 0; rtsx_init_cards() 606 release_ms_card(chip); rtsx_init_cards() 609 dev_dbg(rtsx_dev(chip), "chip->card_exist = 0x%x\n", rtsx_init_cards() 610 chip->card_exist); rtsx_init_cards() 612 if (!chip->card_exist) rtsx_init_cards() 613 turn_off_led(chip, LED_GPIO); rtsx_init_cards() 616 if (chip->need_reset) { rtsx_init_cards() 617 dev_dbg(rtsx_dev(chip), "chip->need_reset = 0x%x\n", rtsx_init_cards() 618 (unsigned int)(chip->need_reset)); rtsx_init_cards() 620 rtsx_reset_cards(chip); rtsx_init_cards() 623 if (chip->need_reinit) { rtsx_init_cards() 624 dev_dbg(rtsx_dev(chip), "chip->need_reinit = 0x%x\n", rtsx_init_cards() 625 (unsigned int)(chip->need_reinit)); rtsx_init_cards() 627 rtsx_reinit_cards(chip, 0); rtsx_init_cards() 636 int switch_ssc_clock(struct rtsx_chip *chip, int clk) switch_ssc_clock() argument 643 if (chip->cur_clk == clk) switch_ssc_clock() 650 dev_dbg(rtsx_dev(chip), "Switch SSC clock to %dMHz (cur_clk = %d)\n", switch_ssc_clock() 651 clk, chip->cur_clk); switch_ssc_clock() 654 rtsx_trace(chip); switch_ssc_clock() 667 dev_dbg(rtsx_dev(chip), "N = %d, div = %d\n", N, div); switch_ssc_clock() 669 if (chip->ssc_en) { switch_ssc_clock() 678 dev_dbg(rtsx_dev(chip), "ssc_depth = %d\n", ssc_depth); switch_ssc_clock() 680 rtsx_init_cmd(chip); switch_ssc_clock() 681 rtsx_add_cmd(chip, WRITE_REG_CMD, CLK_CTL, CLK_LOW_FREQ, CLK_LOW_FREQ); switch_ssc_clock() 682 rtsx_add_cmd(chip, WRITE_REG_CMD, CLK_DIV, 0xFF, (div << 4) | mcu_cnt); switch_ssc_clock() 683 rtsx_add_cmd(chip, WRITE_REG_CMD, SSC_CTL1, SSC_RSTB, 0); switch_ssc_clock() 684 rtsx_add_cmd(chip, WRITE_REG_CMD, SSC_CTL2, ssc_depth_mask, ssc_depth); switch_ssc_clock() 685 rtsx_add_cmd(chip, WRITE_REG_CMD, SSC_DIV_N_0, 0xFF, N); switch_ssc_clock() 686 rtsx_add_cmd(chip, WRITE_REG_CMD, SSC_CTL1, SSC_RSTB, SSC_RSTB); switch_ssc_clock() 688 rtsx_add_cmd(chip, WRITE_REG_CMD, SD_VPCLK0_CTL, switch_ssc_clock() 690 rtsx_add_cmd(chip, WRITE_REG_CMD, SD_VPCLK0_CTL, switch_ssc_clock() 694 retval = rtsx_send_cmd(chip, 0, WAIT_TIME); switch_ssc_clock() 696 rtsx_trace(chip); switch_ssc_clock() 701 retval = rtsx_write_register(chip, CLK_CTL, CLK_LOW_FREQ, 0); switch_ssc_clock() 703 rtsx_trace(chip); switch_ssc_clock() 707 chip->cur_clk = clk; switch_ssc_clock() 712 int switch_normal_clock(struct rtsx_chip *chip, int clk) switch_normal_clock() argument 718 if (chip->cur_clk == clk) switch_normal_clock() 723 dev_dbg(rtsx_dev(chip), "Switch clock to 20MHz\n"); switch_normal_clock() 730 dev_dbg(rtsx_dev(chip), "Switch clock to 30MHz\n"); switch_normal_clock() 737 dev_dbg(rtsx_dev(chip), "Switch clock to 40MHz\n"); switch_normal_clock() 744 dev_dbg(rtsx_dev(chip), "Switch clock to 50MHz\n"); switch_normal_clock() 751 dev_dbg(rtsx_dev(chip), "Switch clock to 60MHz\n"); switch_normal_clock() 758 dev_dbg(rtsx_dev(chip), "Switch clock to 80MHz\n"); switch_normal_clock() 765 dev_dbg(rtsx_dev(chip), "Switch clock to 100MHz\n"); switch_normal_clock() 772 dev_dbg(rtsx_dev(chip), "Switch clock to 120MHz\n"); switch_normal_clock() 779 dev_dbg(rtsx_dev(chip), "Switch clock to 150MHz\n"); switch_normal_clock() 786 dev_dbg(rtsx_dev(chip), "Switch clock to 200MHz\n"); switch_normal_clock() 793 dev_dbg(rtsx_dev(chip), "Try to switch to an illegal clock (%d)\n", switch_normal_clock() 795 rtsx_trace(chip); switch_normal_clock() 799 retval = rtsx_write_register(chip, CLK_CTL, 0xFF, CLK_LOW_FREQ); switch_normal_clock() 801 rtsx_trace(chip); switch_normal_clock() 805 retval = rtsx_write_register(chip, SD_VPCLK0_CTL, switch_normal_clock() 808 rtsx_trace(chip); switch_normal_clock() 811 retval = rtsx_write_register(chip, SD_VPCLK1_CTL, switch_normal_clock() 814 rtsx_trace(chip); switch_normal_clock() 818 retval = rtsx_write_register(chip, CLK_DIV, 0xFF, switch_normal_clock() 821 rtsx_trace(chip); switch_normal_clock() 824 retval = rtsx_write_register(chip, CLK_SEL, 0xFF, sel); switch_normal_clock() 826 rtsx_trace(chip); switch_normal_clock() 832 retval = rtsx_write_register(chip, SD_VPCLK0_CTL, switch_normal_clock() 835 rtsx_trace(chip); switch_normal_clock() 838 retval = rtsx_write_register(chip, SD_VPCLK1_CTL, switch_normal_clock() 841 rtsx_trace(chip); switch_normal_clock() 846 retval = rtsx_write_register(chip, CLK_CTL, 0xFF, 0); switch_normal_clock() 848 rtsx_trace(chip); switch_normal_clock() 852 chip->cur_clk = clk; switch_normal_clock() 857 void trans_dma_enable(enum dma_data_direction dir, struct rtsx_chip *chip, trans_dma_enable() argument 863 rtsx_add_cmd(chip, WRITE_REG_CMD, IRQSTAT0, DMA_DONE_INT, DMA_DONE_INT); trans_dma_enable() 865 rtsx_add_cmd(chip, WRITE_REG_CMD, DMATC3, 0xFF, (u8)(byte_cnt >> 24)); trans_dma_enable() 866 rtsx_add_cmd(chip, WRITE_REG_CMD, DMATC2, 0xFF, (u8)(byte_cnt >> 16)); trans_dma_enable() 867 rtsx_add_cmd(chip, WRITE_REG_CMD, DMATC1, 0xFF, (u8)(byte_cnt >> 8)); trans_dma_enable() 868 rtsx_add_cmd(chip, WRITE_REG_CMD, DMATC0, 0xFF, (u8)byte_cnt); trans_dma_enable() 871 rtsx_add_cmd(chip, WRITE_REG_CMD, DMACTL, trans_dma_enable() 875 rtsx_add_cmd(chip, WRITE_REG_CMD, DMACTL, trans_dma_enable() 880 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, 0x01, RING_BUFFER); trans_dma_enable() 883 int enable_card_clock(struct rtsx_chip *chip, u8 card) enable_card_clock() argument 895 retval = rtsx_write_register(chip, CARD_CLK_EN, clk_en, clk_en); enable_card_clock() 897 rtsx_trace(chip); enable_card_clock() 904 int disable_card_clock(struct rtsx_chip *chip, u8 card) disable_card_clock() argument 916 retval = rtsx_write_register(chip, CARD_CLK_EN, clk_en, 0); disable_card_clock() 918 rtsx_trace(chip); disable_card_clock() 925 int card_power_on(struct rtsx_chip *chip, u8 card) card_power_on() argument 930 if (CHECK_LUN_MODE(chip, SD_MS_2LUN) && (card == MS_CARD)) { card_power_on() 940 rtsx_init_cmd(chip); card_power_on() 941 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PWR_CTL, mask, val1); card_power_on() 943 retval = rtsx_send_cmd(chip, 0, 100); card_power_on() 945 rtsx_trace(chip); card_power_on() 949 udelay(chip->pmos_pwr_on_interval); card_power_on() 951 rtsx_init_cmd(chip); card_power_on() 952 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PWR_CTL, mask, val2); card_power_on() 954 retval = rtsx_send_cmd(chip, 0, 100); card_power_on() 956 rtsx_trace(chip); card_power_on() 963 int card_power_off(struct rtsx_chip *chip, u8 card) card_power_off() argument 968 if (CHECK_LUN_MODE(chip, SD_MS_2LUN) && (card == MS_CARD)) { card_power_off() 976 retval = rtsx_write_register(chip, CARD_PWR_CTL, mask, val); card_power_off() 978 rtsx_trace(chip); card_power_off() 985 int card_rw(struct scsi_cmnd *srb, struct rtsx_chip *chip, card_rw() argument 992 if (chip->rw_card[lun] == NULL) { card_rw() 993 rtsx_trace(chip); card_rw() 998 chip->rw_need_retry = 0; card_rw() 1000 retval = chip->rw_card[lun](srb, chip, sec_addr, sec_cnt); card_rw() 1002 if (rtsx_check_chip_exist(chip) != STATUS_SUCCESS) { card_rw() 1003 rtsx_release_chip(chip); card_rw() 1004 rtsx_trace(chip); card_rw() 1007 if (detect_card_cd(chip, chip->cur_card) != card_rw() 1009 rtsx_trace(chip); card_rw() 1013 if (!chip->rw_need_retry) { card_rw() 1014 dev_dbg(rtsx_dev(chip), "RW fail, but no need to retry\n"); card_rw() 1018 chip->rw_need_retry = 0; card_rw() 1022 dev_dbg(rtsx_dev(chip), "Retry RW, (i = %d)\n", i); card_rw() 1028 int card_share_mode(struct rtsx_chip *chip, int card) card_share_mode() argument 1033 if (CHECK_PID(chip, 0x5208)) { card_share_mode() 1042 rtsx_trace(chip); card_share_mode() 1046 } else if (CHECK_PID(chip, 0x5288)) { card_share_mode() 1055 rtsx_trace(chip); card_share_mode() 1060 rtsx_trace(chip); card_share_mode() 1064 retval = rtsx_write_register(chip, CARD_SHARE_MODE, mask, value); card_share_mode() 1066 rtsx_trace(chip); card_share_mode() 1074 int select_card(struct rtsx_chip *chip, int card) select_card() argument 1078 if (chip->cur_card != card) { select_card() 1090 rtsx_trace(chip); select_card() 1094 retval = rtsx_write_register(chip, CARD_SELECT, 0x07, mod); select_card() 1096 rtsx_trace(chip); select_card() 1099 chip->cur_card = card; select_card() 1101 retval = card_share_mode(chip, card); select_card() 1103 rtsx_trace(chip); select_card() 1111 void toggle_gpio(struct rtsx_chip *chip, u8 gpio) toggle_gpio() argument 1115 rtsx_read_register(chip, CARD_GPIO, &temp_reg); toggle_gpio() 1117 rtsx_write_register(chip, CARD_GPIO, 0xFF, temp_reg); toggle_gpio() 1120 void turn_on_led(struct rtsx_chip *chip, u8 gpio) turn_on_led() argument 1122 if (CHECK_PID(chip, 0x5288)) turn_on_led() 1123 rtsx_write_register(chip, CARD_GPIO, (u8)(1 << gpio), turn_on_led() 1126 rtsx_write_register(chip, CARD_GPIO, (u8)(1 << gpio), 0); turn_on_led() 1129 void turn_off_led(struct rtsx_chip *chip, u8 gpio) turn_off_led() argument 1131 if (CHECK_PID(chip, 0x5288)) turn_off_led() 1132 rtsx_write_register(chip, CARD_GPIO, (u8)(1 << gpio), 0); turn_off_led() 1134 rtsx_write_register(chip, CARD_GPIO, (u8)(1 << gpio), turn_off_led() 1138 int detect_card_cd(struct rtsx_chip *chip, int card) detect_card_cd() argument 1149 dev_dbg(rtsx_dev(chip), "Wrong card type: 0x%x\n", card); detect_card_cd() 1150 rtsx_trace(chip); detect_card_cd() 1154 status = rtsx_readl(chip, RTSX_BIPR); detect_card_cd() 1156 rtsx_trace(chip); detect_card_cd() 1163 int check_card_exist(struct rtsx_chip *chip, unsigned int lun) check_card_exist() argument 1165 if (chip->card_exist & chip->lun2card[lun]) check_card_exist() 1171 int check_card_ready(struct rtsx_chip *chip, unsigned int lun) check_card_ready() argument 1173 if (chip->card_ready & chip->lun2card[lun]) check_card_ready() 1179 int check_card_wp(struct rtsx_chip *chip, unsigned int lun) check_card_wp() argument 1181 if (chip->card_wp & chip->lun2card[lun]) check_card_wp() 1187 int check_card_fail(struct rtsx_chip *chip, unsigned int lun) check_card_fail() argument 1189 if (chip->card_fail & chip->lun2card[lun]) check_card_fail() 1195 int check_card_ejected(struct rtsx_chip *chip, unsigned int lun) check_card_ejected() argument 1197 if (chip->card_ejected & chip->lun2card[lun]) check_card_ejected() 1203 u8 get_lun_card(struct rtsx_chip *chip, unsigned int lun) get_lun_card() argument 1205 if ((chip->card_ready & chip->lun2card[lun]) == XD_CARD) get_lun_card() 1207 else if ((chip->card_ready & chip->lun2card[lun]) == SD_CARD) get_lun_card() 1209 else if ((chip->card_ready & chip->lun2card[lun]) == MS_CARD) get_lun_card() 1215 void eject_card(struct rtsx_chip *chip, unsigned int lun) eject_card() argument 1217 do_remaining_work(chip); eject_card() 1219 if ((chip->card_ready & chip->lun2card[lun]) == SD_CARD) { eject_card() 1220 release_sd_card(chip); eject_card() 1221 chip->card_ejected |= SD_CARD; eject_card() 1222 chip->card_ready &= ~SD_CARD; eject_card() 1223 chip->capacity[lun] = 0; eject_card() 1224 } else if ((chip->card_ready & chip->lun2card[lun]) == XD_CARD) { eject_card() 1225 release_xd_card(chip); eject_card() 1226 chip->card_ejected |= XD_CARD; eject_card() 1227 chip->card_ready &= ~XD_CARD; eject_card() 1228 chip->capacity[lun] = 0; eject_card() 1229 } else if ((chip->card_ready & chip->lun2card[lun]) == MS_CARD) { eject_card() 1230 release_ms_card(chip); eject_card() 1231 chip->card_ejected |= MS_CARD; eject_card() 1232 chip->card_ready &= ~MS_CARD; eject_card() 1233 chip->capacity[lun] = 0; eject_card()
H A D	spi.c	30 static inline void spi_set_err_code(struct rtsx_chip *chip, u8 err_code) spi_set_err_code() argument 32 struct spi_info *spi = &(chip->spi); spi_set_err_code() 37 static int spi_init(struct rtsx_chip *chip) spi_init() argument 41 retval = rtsx_write_register(chip, SPI_CONTROL, 0xFF, spi_init() 44 rtsx_trace(chip); spi_init() 47 retval = rtsx_write_register(chip, SPI_TCTL, EDO_TIMING_MASK, spi_init() 50 rtsx_trace(chip); spi_init() 57 static int spi_set_init_para(struct rtsx_chip *chip) spi_set_init_para() argument 59 struct spi_info *spi = &(chip->spi); spi_set_init_para() 62 retval = rtsx_write_register(chip, SPI_CLK_DIVIDER1, 0xFF, spi_set_init_para() 65 rtsx_trace(chip); spi_set_init_para() 68 retval = rtsx_write_register(chip, SPI_CLK_DIVIDER0, 0xFF, spi_set_init_para() 71 rtsx_trace(chip); spi_set_init_para() 75 retval = switch_clock(chip, spi->spi_clock); spi_set_init_para() 77 rtsx_trace(chip); spi_set_init_para() 81 retval = select_card(chip, SPI_CARD); spi_set_init_para() 83 rtsx_trace(chip); spi_set_init_para() 87 retval = rtsx_write_register(chip, CARD_CLK_EN, SPI_CLK_EN, spi_set_init_para() 90 rtsx_trace(chip); spi_set_init_para() 93 retval = rtsx_write_register(chip, CARD_OE, SPI_OUTPUT_EN, spi_set_init_para() 96 rtsx_trace(chip); spi_set_init_para() 102 retval = spi_init(chip); spi_set_init_para() 104 rtsx_trace(chip); spi_set_init_para() 111 static int sf_polling_status(struct rtsx_chip *chip, int msec) sf_polling_status() argument 115 rtsx_init_cmd(chip); sf_polling_status() 117 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_COMMAND, 0xFF, SPI_RDSR); sf_polling_status() 118 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_TRANSFER0, 0xFF, sf_polling_status() 120 rtsx_add_cmd(chip, CHECK_REG_CMD, SPI_TRANSFER0, SPI_TRANSFER0_END, sf_polling_status() 123 retval = rtsx_send_cmd(chip, 0, msec); sf_polling_status() 125 rtsx_clear_spi_error(chip); sf_polling_status() 126 spi_set_err_code(chip, SPI_BUSY_ERR); sf_polling_status() 127 rtsx_trace(chip); sf_polling_status() 134 static int sf_enable_write(struct rtsx_chip *chip, u8 ins) sf_enable_write() argument 136 struct spi_info *spi = &(chip->spi); sf_enable_write() 142 rtsx_init_cmd(chip); sf_enable_write() 144 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_COMMAND, 0xFF, ins); sf_enable_write() 145 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_CA_NUMBER, 0xFF, sf_enable_write() 147 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_TRANSFER0, 0xFF, sf_enable_write() 149 rtsx_add_cmd(chip, CHECK_REG_CMD, SPI_TRANSFER0, SPI_TRANSFER0_END, sf_enable_write() 152 retval = rtsx_send_cmd(chip, 0, 100); sf_enable_write() 154 rtsx_clear_spi_error(chip); sf_enable_write() 155 spi_set_err_code(chip, SPI_HW_ERR); sf_enable_write() 156 rtsx_trace(chip); sf_enable_write() 163 static int sf_disable_write(struct rtsx_chip *chip, u8 ins) sf_disable_write() argument 165 struct spi_info *spi = &(chip->spi); sf_disable_write() 171 rtsx_init_cmd(chip); sf_disable_write() 173 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_COMMAND, 0xFF, ins); sf_disable_write() 174 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_CA_NUMBER, 0xFF, sf_disable_write() 176 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_TRANSFER0, 0xFF, sf_disable_write() 178 rtsx_add_cmd(chip, CHECK_REG_CMD, SPI_TRANSFER0, SPI_TRANSFER0_END, sf_disable_write() 181 retval = rtsx_send_cmd(chip, 0, 100); sf_disable_write() 183 rtsx_clear_spi_error(chip); sf_disable_write() 184 spi_set_err_code(chip, SPI_HW_ERR); sf_disable_write() 185 rtsx_trace(chip); sf_disable_write() 192 static void sf_program(struct rtsx_chip *chip, u8 ins, u8 addr_mode, u32 addr, sf_program() argument 195 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_COMMAND, 0xFF, ins); sf_program() 196 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_CA_NUMBER, 0xFF, sf_program() 198 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_LENGTH0, 0xFF, (u8)len); sf_program() 199 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_LENGTH1, 0xFF, (u8)(len >> 8)); sf_program() 201 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_ADDR0, 0xFF, (u8)addr); sf_program() 202 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_ADDR1, 0xFF, sf_program() 204 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_ADDR2, 0xFF, sf_program() 206 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_TRANSFER0, 0xFF, sf_program() 209 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_TRANSFER0, 0xFF, sf_program() 212 rtsx_add_cmd(chip, CHECK_REG_CMD, SPI_TRANSFER0, SPI_TRANSFER0_END, sf_program() 216 static int sf_erase(struct rtsx_chip *chip, u8 ins, u8 addr_mode, u32 addr) sf_erase() argument 220 rtsx_init_cmd(chip); sf_erase() 222 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_COMMAND, 0xFF, ins); sf_erase() 223 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_CA_NUMBER, 0xFF, sf_erase() 226 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_ADDR0, 0xFF, (u8)addr); sf_erase() 227 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_ADDR1, 0xFF, sf_erase() 229 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_ADDR2, 0xFF, sf_erase() 231 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_TRANSFER0, 0xFF, sf_erase() 234 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_TRANSFER0, 0xFF, sf_erase() 237 rtsx_add_cmd(chip, CHECK_REG_CMD, SPI_TRANSFER0, SPI_TRANSFER0_END, sf_erase() 240 retval = rtsx_send_cmd(chip, 0, 100); sf_erase() 242 rtsx_clear_spi_error(chip); sf_erase() 243 spi_set_err_code(chip, SPI_HW_ERR); sf_erase() 244 rtsx_trace(chip); sf_erase() 251 static int spi_init_eeprom(struct rtsx_chip *chip) spi_init_eeprom() argument 256 if (chip->asic_code) spi_init_eeprom() 261 retval = rtsx_write_register(chip, SPI_CLK_DIVIDER1, 0xFF, 0x00); spi_init_eeprom() 263 rtsx_trace(chip); spi_init_eeprom() 266 retval = rtsx_write_register(chip, SPI_CLK_DIVIDER0, 0xFF, 0x27); spi_init_eeprom() 268 rtsx_trace(chip); spi_init_eeprom() 272 retval = switch_clock(chip, clk); spi_init_eeprom() 274 rtsx_trace(chip); spi_init_eeprom() 278 retval = select_card(chip, SPI_CARD); spi_init_eeprom() 280 rtsx_trace(chip); spi_init_eeprom() 284 retval = rtsx_write_register(chip, CARD_CLK_EN, SPI_CLK_EN, spi_init_eeprom() 287 rtsx_trace(chip); spi_init_eeprom() 290 retval = rtsx_write_register(chip, CARD_OE, SPI_OUTPUT_EN, spi_init_eeprom() 293 rtsx_trace(chip); spi_init_eeprom() 299 retval = rtsx_write_register(chip, SPI_CONTROL, 0xFF, spi_init_eeprom() 302 rtsx_trace(chip); spi_init_eeprom() 305 retval = rtsx_write_register(chip, SPI_TCTL, EDO_TIMING_MASK, spi_init_eeprom() 308 rtsx_trace(chip); spi_init_eeprom() 315 static int spi_eeprom_program_enable(struct rtsx_chip *chip) spi_eeprom_program_enable() argument 319 rtsx_init_cmd(chip); spi_eeprom_program_enable() 321 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_CA_NUMBER, 0xFF, 0x86); spi_eeprom_program_enable() 322 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_COMMAND, 0xFF, 0x13); spi_eeprom_program_enable() 323 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_TRANSFER0, 0xFF, spi_eeprom_program_enable() 325 rtsx_add_cmd(chip, CHECK_REG_CMD, SPI_TRANSFER0, SPI_TRANSFER0_END, spi_eeprom_program_enable() 328 retval = rtsx_send_cmd(chip, 0, 100); spi_eeprom_program_enable() 330 rtsx_trace(chip); spi_eeprom_program_enable() 337 int spi_erase_eeprom_chip(struct rtsx_chip *chip) spi_erase_eeprom_chip() argument 341 retval = spi_init_eeprom(chip); spi_erase_eeprom_chip() 343 rtsx_trace(chip); spi_erase_eeprom_chip() 347 retval = spi_eeprom_program_enable(chip); spi_erase_eeprom_chip() 349 rtsx_trace(chip); spi_erase_eeprom_chip() 353 rtsx_init_cmd(chip); spi_erase_eeprom_chip() 355 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_GPIO_DIR, 0x01, 0); spi_erase_eeprom_chip() 356 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, 0x01, RING_BUFFER); spi_erase_eeprom_chip() 357 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_COMMAND, 0xFF, 0x12); spi_erase_eeprom_chip() 358 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_CA_NUMBER, 0xFF, 0x84); spi_erase_eeprom_chip() 359 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_TRANSFER0, 0xFF, spi_erase_eeprom_chip() 361 rtsx_add_cmd(chip, CHECK_REG_CMD, SPI_TRANSFER0, SPI_TRANSFER0_END, spi_erase_eeprom_chip() 364 retval = rtsx_send_cmd(chip, 0, 100); spi_erase_eeprom_chip() 366 rtsx_trace(chip); spi_erase_eeprom_chip() 370 retval = rtsx_write_register(chip, CARD_GPIO_DIR, 0x01, 0x01); spi_erase_eeprom_chip() 372 rtsx_trace(chip); spi_erase_eeprom_chip() 379 int spi_erase_eeprom_byte(struct rtsx_chip *chip, u16 addr) spi_erase_eeprom_byte() argument 383 retval = spi_init_eeprom(chip); spi_erase_eeprom_byte() 385 rtsx_trace(chip); spi_erase_eeprom_byte() 389 retval = spi_eeprom_program_enable(chip); spi_erase_eeprom_byte() 391 rtsx_trace(chip); spi_erase_eeprom_byte() 395 rtsx_init_cmd(chip); spi_erase_eeprom_byte() 397 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_GPIO_DIR, 0x01, 0); spi_erase_eeprom_byte() 398 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, 0x01, RING_BUFFER); spi_erase_eeprom_byte() 399 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_COMMAND, 0xFF, 0x07); spi_erase_eeprom_byte() 400 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_ADDR0, 0xFF, (u8)addr); spi_erase_eeprom_byte() 401 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_ADDR1, 0xFF, (u8)(addr >> 8)); spi_erase_eeprom_byte() 402 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_CA_NUMBER, 0xFF, 0x46); spi_erase_eeprom_byte() 403 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_TRANSFER0, 0xFF, spi_erase_eeprom_byte() 405 rtsx_add_cmd(chip, CHECK_REG_CMD, SPI_TRANSFER0, SPI_TRANSFER0_END, spi_erase_eeprom_byte() 408 retval = rtsx_send_cmd(chip, 0, 100); spi_erase_eeprom_byte() 410 rtsx_trace(chip); spi_erase_eeprom_byte() 414 retval = rtsx_write_register(chip, CARD_GPIO_DIR, 0x01, 0x01); spi_erase_eeprom_byte() 416 rtsx_trace(chip); spi_erase_eeprom_byte() 424 int spi_read_eeprom(struct rtsx_chip *chip, u16 addr, u8 *val) spi_read_eeprom() argument 429 retval = spi_init_eeprom(chip); spi_read_eeprom() 431 rtsx_trace(chip); spi_read_eeprom() 435 rtsx_init_cmd(chip); spi_read_eeprom() 437 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_GPIO_DIR, 0x01, 0); spi_read_eeprom() 438 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, 0x01, RING_BUFFER); spi_read_eeprom() 439 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_COMMAND, 0xFF, 0x06); spi_read_eeprom() 440 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_ADDR0, 0xFF, (u8)addr); spi_read_eeprom() 441 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_ADDR1, 0xFF, (u8)(addr >> 8)); spi_read_eeprom() 442 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_CA_NUMBER, 0xFF, 0x46); spi_read_eeprom() 443 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_LENGTH0, 0xFF, 1); spi_read_eeprom() 444 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_TRANSFER0, 0xFF, spi_read_eeprom() 446 rtsx_add_cmd(chip, CHECK_REG_CMD, SPI_TRANSFER0, SPI_TRANSFER0_END, spi_read_eeprom() 449 retval = rtsx_send_cmd(chip, 0, 100); spi_read_eeprom() 451 rtsx_trace(chip); spi_read_eeprom() 456 retval = rtsx_read_register(chip, SPI_DATA, &data); spi_read_eeprom() 458 rtsx_trace(chip); spi_read_eeprom() 465 retval = rtsx_write_register(chip, CARD_GPIO_DIR, 0x01, 0x01); spi_read_eeprom() 467 rtsx_trace(chip); spi_read_eeprom() 474 int spi_write_eeprom(struct rtsx_chip *chip, u16 addr, u8 val) spi_write_eeprom() argument 478 retval = spi_init_eeprom(chip); spi_write_eeprom() 480 rtsx_trace(chip); spi_write_eeprom() 484 retval = spi_eeprom_program_enable(chip); spi_write_eeprom() 486 rtsx_trace(chip); spi_write_eeprom() 490 rtsx_init_cmd(chip); spi_write_eeprom() 492 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_GPIO_DIR, 0x01, 0); spi_write_eeprom() 493 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, 0x01, RING_BUFFER); spi_write_eeprom() 494 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_COMMAND, 0xFF, 0x05); spi_write_eeprom() 495 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_ADDR0, 0xFF, val); spi_write_eeprom() 496 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_ADDR1, 0xFF, (u8)addr); spi_write_eeprom() 497 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_ADDR2, 0xFF, (u8)(addr >> 8)); spi_write_eeprom() 498 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_CA_NUMBER, 0xFF, 0x4E); spi_write_eeprom() 499 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_TRANSFER0, 0xFF, spi_write_eeprom() 501 rtsx_add_cmd(chip, CHECK_REG_CMD, SPI_TRANSFER0, SPI_TRANSFER0_END, spi_write_eeprom() 504 retval = rtsx_send_cmd(chip, 0, 100); spi_write_eeprom() 506 rtsx_trace(chip); spi_write_eeprom() 510 retval = rtsx_write_register(chip, CARD_GPIO_DIR, 0x01, 0x01); spi_write_eeprom() 512 rtsx_trace(chip); spi_write_eeprom() 520 int spi_get_status(struct scsi_cmnd *srb, struct rtsx_chip *chip) spi_get_status() argument 522 struct spi_info *spi = &(chip->spi); spi_get_status() 524 dev_dbg(rtsx_dev(chip), "spi_get_status: err_code = 0x%x\n", spi_get_status() 533 int spi_set_parameter(struct scsi_cmnd *srb, struct rtsx_chip *chip) spi_set_parameter() argument 535 struct spi_info *spi = &(chip->spi); spi_set_parameter() 537 spi_set_err_code(chip, SPI_NO_ERR); spi_set_parameter() 539 if (chip->asic_code) spi_set_parameter() 547 dev_dbg(rtsx_dev(chip), "spi_set_parameter: spi_clock = %d, clk_div = %d, write_en = %d\n", spi_set_parameter() 553 int spi_read_flash_id(struct scsi_cmnd *srb, struct rtsx_chip *chip) spi_read_flash_id() argument 559 spi_set_err_code(chip, SPI_NO_ERR); spi_read_flash_id() 563 spi_set_err_code(chip, SPI_INVALID_COMMAND); spi_read_flash_id() 564 rtsx_trace(chip); spi_read_flash_id() 568 retval = spi_set_init_para(chip); spi_read_flash_id() 570 spi_set_err_code(chip, SPI_HW_ERR); spi_read_flash_id() 571 rtsx_trace(chip); spi_read_flash_id() 575 rtsx_init_cmd(chip); spi_read_flash_id() 577 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, 0x01, spi_read_flash_id() 580 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_COMMAND, 0xFF, srb->cmnd[3]); spi_read_flash_id() 581 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_ADDR2, 0xFF, srb->cmnd[4]); spi_read_flash_id() 582 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_ADDR1, 0xFF, srb->cmnd[5]); spi_read_flash_id() 583 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_ADDR0, 0xFF, srb->cmnd[6]); spi_read_flash_id() 584 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_CA_NUMBER, 0xFF, spi_read_flash_id() 586 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_LENGTH1, 0xFF, srb->cmnd[7]); spi_read_flash_id() 587 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_LENGTH0, 0xFF, srb->cmnd[8]); spi_read_flash_id() 591 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_TRANSFER0, spi_read_flash_id() 594 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_TRANSFER0, spi_read_flash_id() 599 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_TRANSFER0, 0xFF, spi_read_flash_id() 602 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_TRANSFER0, 0xFF, spi_read_flash_id() 607 rtsx_add_cmd(chip, CHECK_REG_CMD, SPI_TRANSFER0, SPI_TRANSFER0_END, spi_read_flash_id() 610 retval = rtsx_send_cmd(chip, 0, 100); spi_read_flash_id() 612 rtsx_clear_spi_error(chip); spi_read_flash_id() 613 spi_set_err_code(chip, SPI_HW_ERR); spi_read_flash_id() 614 rtsx_trace(chip); spi_read_flash_id() 621 rtsx_trace(chip); spi_read_flash_id() 625 retval = rtsx_read_ppbuf(chip, buf, len); spi_read_flash_id() 627 spi_set_err_code(chip, SPI_READ_ERR); spi_read_flash_id() 629 rtsx_trace(chip); spi_read_flash_id() 642 int spi_read_flash(struct scsi_cmnd *srb, struct rtsx_chip *chip) spi_read_flash() argument 651 spi_set_err_code(chip, SPI_NO_ERR); spi_read_flash() 659 retval = spi_set_init_para(chip); spi_read_flash() 661 spi_set_err_code(chip, SPI_HW_ERR); spi_read_flash() 662 rtsx_trace(chip); spi_read_flash() 668 rtsx_trace(chip); spi_read_flash() 678 rtsx_init_cmd(chip); spi_read_flash() 680 trans_dma_enable(DMA_FROM_DEVICE, chip, 256, DMA_256); spi_read_flash() 682 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_COMMAND, 0xFF, ins); spi_read_flash() 685 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_ADDR0, 0xFF, spi_read_flash() 687 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_ADDR1, 0xFF, spi_read_flash() 689 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_ADDR2, 0xFF, spi_read_flash() 691 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_CA_NUMBER, 0xFF, spi_read_flash() 694 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_ADDR1, 0xFF, spi_read_flash() 696 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_ADDR2, 0xFF, spi_read_flash() 698 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_ADDR3, 0xFF, spi_read_flash() 700 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_CA_NUMBER, 0xFF, spi_read_flash() 704 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_LENGTH1, 0xFF, spi_read_flash() 706 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_LENGTH0, 0xFF, spi_read_flash() 709 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_TRANSFER0, 0xFF, spi_read_flash() 711 rtsx_add_cmd(chip, CHECK_REG_CMD, SPI_TRANSFER0, spi_read_flash() 714 rtsx_send_cmd_no_wait(chip); spi_read_flash() 716 retval = rtsx_transfer_data(chip, 0, buf, pagelen, 0, spi_read_flash() 720 rtsx_clear_spi_error(chip); spi_read_flash() 721 spi_set_err_code(chip, SPI_HW_ERR); spi_read_flash() 722 rtsx_trace(chip); spi_read_flash() 739 int spi_write_flash(struct scsi_cmnd *srb, struct rtsx_chip *chip) spi_write_flash() argument 748 spi_set_err_code(chip, SPI_NO_ERR); spi_write_flash() 756 retval = spi_set_init_para(chip); spi_write_flash() 758 spi_set_err_code(chip, SPI_HW_ERR); spi_write_flash() 759 rtsx_trace(chip); spi_write_flash() 766 rtsx_trace(chip); spi_write_flash() 771 retval = sf_enable_write(chip, SPI_WREN); spi_write_flash() 774 rtsx_trace(chip); spi_write_flash() 781 rtsx_init_cmd(chip); spi_write_flash() 783 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, spi_write_flash() 785 rtsx_add_cmd(chip, WRITE_REG_CMD, PPBUF_BASE2, 0xFF, spi_write_flash() 787 sf_program(chip, ins, 1, addr, 1); spi_write_flash() 789 retval = rtsx_send_cmd(chip, 0, 100); spi_write_flash() 792 rtsx_clear_spi_error(chip); spi_write_flash() 793 spi_set_err_code(chip, SPI_HW_ERR); spi_write_flash() 794 rtsx_trace(chip); spi_write_flash() 798 retval = sf_polling_status(chip, 100); spi_write_flash() 801 rtsx_trace(chip); spi_write_flash() 814 retval = sf_enable_write(chip, SPI_WREN); spi_write_flash() 816 rtsx_trace(chip); spi_write_flash() 822 rtsx_trace(chip); spi_write_flash() 830 rtsx_init_cmd(chip); spi_write_flash() 832 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, spi_write_flash() 834 rtsx_add_cmd(chip, WRITE_REG_CMD, PPBUF_BASE2, 0xFF, spi_write_flash() 837 sf_program(chip, ins, 1, addr, 1); spi_write_flash() 840 sf_program(chip, ins, 0, 0, 1); spi_write_flash() 843 retval = rtsx_send_cmd(chip, 0, 100); spi_write_flash() 846 rtsx_clear_spi_error(chip); spi_write_flash() 847 spi_set_err_code(chip, SPI_HW_ERR); spi_write_flash() 848 rtsx_trace(chip); spi_write_flash() 852 retval = sf_polling_status(chip, 100); spi_write_flash() 855 rtsx_trace(chip); spi_write_flash() 864 retval = sf_disable_write(chip, SPI_WRDI); spi_write_flash() 866 rtsx_trace(chip); spi_write_flash() 870 retval = sf_polling_status(chip, 100); spi_write_flash() 872 rtsx_trace(chip); spi_write_flash() 878 rtsx_trace(chip); spi_write_flash() 888 retval = sf_enable_write(chip, SPI_WREN); spi_write_flash() 891 rtsx_trace(chip); spi_write_flash() 895 rtsx_init_cmd(chip); spi_write_flash() 897 trans_dma_enable(DMA_TO_DEVICE, chip, 256, DMA_256); spi_write_flash() 898 sf_program(chip, ins, 1, addr, pagelen); spi_write_flash() 900 rtsx_send_cmd_no_wait(chip); spi_write_flash() 905 retval = rtsx_transfer_data(chip, 0, buf, pagelen, 0, spi_write_flash() 909 rtsx_clear_spi_error(chip); spi_write_flash() 910 spi_set_err_code(chip, SPI_HW_ERR); spi_write_flash() 911 rtsx_trace(chip); spi_write_flash() 915 retval = sf_polling_status(chip, 100); spi_write_flash() 918 rtsx_trace(chip); spi_write_flash() 928 spi_set_err_code(chip, SPI_INVALID_COMMAND); spi_write_flash() 929 rtsx_trace(chip); spi_write_flash() 936 int spi_erase_flash(struct scsi_cmnd *srb, struct rtsx_chip *chip) spi_erase_flash() argument 942 spi_set_err_code(chip, SPI_NO_ERR); spi_erase_flash() 949 retval = spi_set_init_para(chip); spi_erase_flash() 951 spi_set_err_code(chip, SPI_HW_ERR); spi_erase_flash() 952 rtsx_trace(chip); spi_erase_flash() 957 retval = sf_enable_write(chip, SPI_WREN); spi_erase_flash() 959 rtsx_trace(chip); spi_erase_flash() 963 retval = sf_erase(chip, ins, 1, addr); spi_erase_flash() 965 rtsx_trace(chip); spi_erase_flash() 969 retval = sf_enable_write(chip, SPI_WREN); spi_erase_flash() 971 rtsx_trace(chip); spi_erase_flash() 975 retval = sf_erase(chip, ins, 0, 0); spi_erase_flash() 977 rtsx_trace(chip); spi_erase_flash() 981 spi_set_err_code(chip, SPI_INVALID_COMMAND); spi_erase_flash() 982 rtsx_trace(chip); spi_erase_flash() 989 int spi_write_flash_status(struct scsi_cmnd *srb, struct rtsx_chip *chip) spi_write_flash_status() argument 998 retval = spi_set_init_para(chip); spi_write_flash_status() 1000 spi_set_err_code(chip, SPI_HW_ERR); spi_write_flash_status() 1001 rtsx_trace(chip); spi_write_flash_status() 1005 retval = sf_enable_write(chip, ewsr); spi_write_flash_status() 1007 rtsx_trace(chip); spi_write_flash_status() 1011 rtsx_init_cmd(chip); spi_write_flash_status() 1013 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, 0x01, spi_write_flash_status() 1016 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_COMMAND, 0xFF, ins); spi_write_flash_status() 1017 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_CA_NUMBER, 0xFF, spi_write_flash_status() 1019 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_LENGTH1, 0xFF, 0); spi_write_flash_status() 1020 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_LENGTH0, 0xFF, 1); spi_write_flash_status() 1021 rtsx_add_cmd(chip, WRITE_REG_CMD, PPBUF_BASE2, 0xFF, status); spi_write_flash_status() 1022 rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_TRANSFER0, 0xFF, spi_write_flash_status() 1024 rtsx_add_cmd(chip, CHECK_REG_CMD, SPI_TRANSFER0, SPI_TRANSFER0_END, spi_write_flash_status() 1027 retval = rtsx_send_cmd(chip, 0, 100); spi_write_flash_status() 1029 rtsx_clear_spi_error(chip); spi_write_flash_status() 1030 spi_set_err_code(chip, SPI_HW_ERR); spi_write_flash_status() 1031 rtsx_trace(chip); spi_write_flash_status()
H A D	xd.c	34 static int xd_build_l2p_tbl(struct rtsx_chip *chip, int zone_no); 35 static int xd_init_page(struct rtsx_chip *chip, u32 phy_blk, u16 logoff, 38 static inline void xd_set_err_code(struct rtsx_chip *chip, u8 err_code) xd_set_err_code() argument 40 struct xd_info *xd_card = &(chip->xd_card); xd_set_err_code() 45 static inline int xd_check_err_code(struct rtsx_chip *chip, u8 err_code) xd_check_err_code() argument 47 struct xd_info *xd_card = &(chip->xd_card); xd_check_err_code() 52 static int xd_set_init_para(struct rtsx_chip *chip) xd_set_init_para() argument 54 struct xd_info *xd_card = &(chip->xd_card); xd_set_init_para() 57 if (chip->asic_code) xd_set_init_para() 62 retval = switch_clock(chip, xd_card->xd_clock); xd_set_init_para() 64 rtsx_trace(chip); xd_set_init_para() 71 static int xd_switch_clock(struct rtsx_chip *chip) xd_switch_clock() argument 73 struct xd_info *xd_card = &(chip->xd_card); xd_switch_clock() 76 retval = select_card(chip, XD_CARD); xd_switch_clock() 78 rtsx_trace(chip); xd_switch_clock() 82 retval = switch_clock(chip, xd_card->xd_clock); xd_switch_clock() 84 rtsx_trace(chip); xd_switch_clock() 91 static int xd_read_id(struct rtsx_chip *chip, u8 id_cmd, u8 *id_buf, u8 buf_len) xd_read_id() argument 96 rtsx_init_cmd(chip); xd_read_id() 98 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_DAT, 0xFF, id_cmd); xd_read_id() 99 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_TRANSFER, 0xFF, xd_read_id() 101 rtsx_add_cmd(chip, CHECK_REG_CMD, XD_TRANSFER, XD_TRANSFER_END, xd_read_id() 105 rtsx_add_cmd(chip, READ_REG_CMD, (u16)(XD_ADDRESS1 + i), 0, 0); xd_read_id() 107 retval = rtsx_send_cmd(chip, XD_CARD, 20); xd_read_id() 109 rtsx_trace(chip); xd_read_id() 113 ptr = rtsx_get_cmd_data(chip) + 1; xd_read_id() 123 static void xd_assign_phy_addr(struct rtsx_chip *chip, u32 addr, u8 mode) xd_assign_phy_addr() argument 125 struct xd_info *xd_card = &(chip->xd_card); xd_assign_phy_addr() 129 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_ADDRESS0, 0xFF, 0); xd_assign_phy_addr() 130 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_ADDRESS1, 0xFF, (u8)addr); xd_assign_phy_addr() 131 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_ADDRESS2, xd_assign_phy_addr() 133 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_ADDRESS3, xd_assign_phy_addr() 135 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_CFG, 0xFF, xd_assign_phy_addr() 140 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_ADDRESS0, 0xFF, (u8)addr); xd_assign_phy_addr() 141 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_ADDRESS1, xd_assign_phy_addr() 143 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_ADDRESS2, xd_assign_phy_addr() 145 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_CFG, 0xFF, xd_assign_phy_addr() 155 static int xd_read_redundant(struct rtsx_chip *chip, u32 page_addr, xd_read_redundant() argument 160 rtsx_init_cmd(chip); xd_read_redundant() 162 xd_assign_phy_addr(chip, page_addr, XD_RW_ADDR); xd_read_redundant() 164 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_TRANSFER, xd_read_redundant() 166 rtsx_add_cmd(chip, CHECK_REG_CMD, XD_TRANSFER, xd_read_redundant() 170 rtsx_add_cmd(chip, READ_REG_CMD, (u16)(XD_PAGE_STATUS + i), xd_read_redundant() 173 rtsx_add_cmd(chip, READ_REG_CMD, (u16)(XD_RESERVED0 + i), xd_read_redundant() 175 rtsx_add_cmd(chip, READ_REG_CMD, XD_PARITY, 0, 0); xd_read_redundant() 177 retval = rtsx_send_cmd(chip, XD_CARD, 500); xd_read_redundant() 179 rtsx_trace(chip); xd_read_redundant() 184 u8 *ptr = rtsx_get_cmd_data(chip) + 1; xd_read_redundant() 194 static int xd_read_data_from_ppb(struct rtsx_chip *chip, int offset, xd_read_data_from_ppb() argument 200 rtsx_trace(chip); xd_read_data_from_ppb() 204 rtsx_init_cmd(chip); xd_read_data_from_ppb() 207 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + offset + i, xd_read_data_from_ppb() 210 retval = rtsx_send_cmd(chip, 0, 250); xd_read_data_from_ppb() 212 rtsx_clear_xd_error(chip); xd_read_data_from_ppb() 213 rtsx_trace(chip); xd_read_data_from_ppb() 217 memcpy(buf, rtsx_get_cmd_data(chip), buf_len); xd_read_data_from_ppb() 222 static int xd_read_cis(struct rtsx_chip *chip, u32 page_addr, u8 *buf, xd_read_cis() argument 229 rtsx_trace(chip); xd_read_cis() 233 rtsx_init_cmd(chip); xd_read_cis() 235 xd_assign_phy_addr(chip, page_addr, XD_RW_ADDR); xd_read_cis() 237 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, xd_read_cis() 239 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_PAGE_CNT, 0xFF, 1); xd_read_cis() 240 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_CHK_DATA_STATUS, xd_read_cis() 243 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_TRANSFER, 0xFF, xd_read_cis() 245 rtsx_add_cmd(chip, CHECK_REG_CMD, XD_TRANSFER, XD_TRANSFER_END, xd_read_cis() 248 retval = rtsx_send_cmd(chip, XD_CARD, 250); xd_read_cis() 250 rtsx_clear_xd_error(chip); xd_read_cis() 251 rtsx_trace(chip); xd_read_cis() 255 retval = rtsx_read_register(chip, XD_PAGE_STATUS, &reg); xd_read_cis() 257 rtsx_trace(chip); xd_read_cis() 261 rtsx_clear_xd_error(chip); xd_read_cis() 262 rtsx_trace(chip); xd_read_cis() 266 retval = rtsx_read_register(chip, XD_CTL, &reg); xd_read_cis() 268 rtsx_trace(chip); xd_read_cis() 272 retval = xd_read_data_from_ppb(chip, 0, buf, buf_len); xd_read_cis() 274 rtsx_trace(chip); xd_read_cis() 280 retval = rtsx_read_register(chip, XD_ECC_BIT1, xd_read_cis() 283 rtsx_trace(chip); xd_read_cis() 286 retval = rtsx_read_register(chip, XD_ECC_BYTE1, xd_read_cis() 289 rtsx_trace(chip); xd_read_cis() 293 dev_dbg(rtsx_dev(chip), "ECC_BIT1 = 0x%x, ECC_BYTE1 = 0x%x\n", xd_read_cis() 296 dev_dbg(rtsx_dev(chip), "Before correct: 0x%x\n", xd_read_cis() 299 dev_dbg(rtsx_dev(chip), "After correct: 0x%x\n", xd_read_cis() 304 rtsx_clear_xd_error(chip); xd_read_cis() 306 retval = xd_read_data_from_ppb(chip, 256, buf, buf_len); xd_read_cis() 308 rtsx_trace(chip); xd_read_cis() 314 retval = rtsx_read_register(chip, XD_ECC_BIT2, xd_read_cis() 317 rtsx_trace(chip); xd_read_cis() 320 retval = rtsx_read_register(chip, XD_ECC_BYTE2, xd_read_cis() 323 rtsx_trace(chip); xd_read_cis() 327 dev_dbg(rtsx_dev(chip), "ECC_BIT2 = 0x%x, ECC_BYTE2 = 0x%x\n", xd_read_cis() 330 dev_dbg(rtsx_dev(chip), "Before correct: 0x%x\n", xd_read_cis() 333 dev_dbg(rtsx_dev(chip), "After correct: 0x%x\n", xd_read_cis() 338 rtsx_clear_xd_error(chip); xd_read_cis() 339 rtsx_trace(chip); xd_read_cis() 346 static void xd_fill_pull_ctl_disable(struct rtsx_chip *chip) xd_fill_pull_ctl_disable() argument 348 if (CHECK_PID(chip, 0x5208)) { xd_fill_pull_ctl_disable() 349 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF, xd_fill_pull_ctl_disable() 351 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF, xd_fill_pull_ctl_disable() 353 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF, xd_fill_pull_ctl_disable() 355 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF, xd_fill_pull_ctl_disable() 357 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF, xd_fill_pull_ctl_disable() 359 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF, xd_fill_pull_ctl_disable() 361 } else if (CHECK_PID(chip, 0x5288)) { xd_fill_pull_ctl_disable() 362 if (CHECK_BARO_PKG(chip, QFN)) { xd_fill_pull_ctl_disable() 363 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL1, xd_fill_pull_ctl_disable() 365 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL2, xd_fill_pull_ctl_disable() 367 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL3, xd_fill_pull_ctl_disable() 369 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL4, xd_fill_pull_ctl_disable() 375 static void xd_fill_pull_ctl_stage1_barossa(struct rtsx_chip *chip) xd_fill_pull_ctl_stage1_barossa() argument 377 if (CHECK_BARO_PKG(chip, QFN)) { xd_fill_pull_ctl_stage1_barossa() 378 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF, 0x55); xd_fill_pull_ctl_stage1_barossa() 379 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF, 0x55); xd_fill_pull_ctl_stage1_barossa() 380 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF, 0x4B); xd_fill_pull_ctl_stage1_barossa() 381 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF, 0x55); xd_fill_pull_ctl_stage1_barossa() 385 static void xd_fill_pull_ctl_enable(struct rtsx_chip *chip) xd_fill_pull_ctl_enable() argument 387 if (CHECK_PID(chip, 0x5208)) { xd_fill_pull_ctl_enable() 388 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF, xd_fill_pull_ctl_enable() 390 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF, xd_fill_pull_ctl_enable() 392 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF, xd_fill_pull_ctl_enable() 394 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF, xd_fill_pull_ctl_enable() 396 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF, xd_fill_pull_ctl_enable() 398 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF, xd_fill_pull_ctl_enable() 400 } else if (CHECK_PID(chip, 0x5288)) { xd_fill_pull_ctl_enable() 401 if (CHECK_BARO_PKG(chip, QFN)) { xd_fill_pull_ctl_enable() 402 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL1, xd_fill_pull_ctl_enable() 404 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL2, xd_fill_pull_ctl_enable() 406 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL3, xd_fill_pull_ctl_enable() 408 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL4, xd_fill_pull_ctl_enable() 414 static int xd_pull_ctl_disable(struct rtsx_chip *chip) xd_pull_ctl_disable() argument 418 if (CHECK_PID(chip, 0x5208)) { xd_pull_ctl_disable() 419 retval = rtsx_write_register(chip, CARD_PULL_CTL1, 0xFF, xd_pull_ctl_disable() 422 rtsx_trace(chip); xd_pull_ctl_disable() 425 retval = rtsx_write_register(chip, CARD_PULL_CTL2, 0xFF, xd_pull_ctl_disable() 428 rtsx_trace(chip); xd_pull_ctl_disable() 431 retval = rtsx_write_register(chip, CARD_PULL_CTL3, 0xFF, xd_pull_ctl_disable() 434 rtsx_trace(chip); xd_pull_ctl_disable() 437 retval = rtsx_write_register(chip, CARD_PULL_CTL4, 0xFF, xd_pull_ctl_disable() 440 rtsx_trace(chip); xd_pull_ctl_disable() 443 retval = rtsx_write_register(chip, CARD_PULL_CTL5, 0xFF, xd_pull_ctl_disable() 446 rtsx_trace(chip); xd_pull_ctl_disable() 449 retval = rtsx_write_register(chip, CARD_PULL_CTL6, 0xFF, xd_pull_ctl_disable() 452 rtsx_trace(chip); xd_pull_ctl_disable() 455 } else if (CHECK_PID(chip, 0x5288)) { xd_pull_ctl_disable() 456 if (CHECK_BARO_PKG(chip, QFN)) { xd_pull_ctl_disable() 457 retval = rtsx_write_register(chip, CARD_PULL_CTL1, xd_pull_ctl_disable() 460 rtsx_trace(chip); xd_pull_ctl_disable() 463 retval = rtsx_write_register(chip, CARD_PULL_CTL2, xd_pull_ctl_disable() 466 rtsx_trace(chip); xd_pull_ctl_disable() 469 retval = rtsx_write_register(chip, CARD_PULL_CTL3, xd_pull_ctl_disable() 472 rtsx_trace(chip); xd_pull_ctl_disable() 475 retval = rtsx_write_register(chip, CARD_PULL_CTL4, xd_pull_ctl_disable() 478 rtsx_trace(chip); xd_pull_ctl_disable() 487 static int reset_xd(struct rtsx_chip *chip) reset_xd() argument 489 struct xd_info *xd_card = &(chip->xd_card); reset_xd() 493 retval = select_card(chip, XD_CARD); reset_xd() 495 rtsx_trace(chip); reset_xd() 499 rtsx_init_cmd(chip); reset_xd() 501 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_CHK_DATA_STATUS, 0xFF, reset_xd() 503 if (chip->asic_code) { reset_xd() 504 if (!CHECK_PID(chip, 0x5288)) reset_xd() 505 xd_fill_pull_ctl_disable(chip); reset_xd() 507 xd_fill_pull_ctl_stage1_barossa(chip); reset_xd() 509 rtsx_add_cmd(chip, WRITE_REG_CMD, FPGA_PULL_CTL, 0xFF, reset_xd() 513 if (!chip->ft2_fast_mode) reset_xd() 514 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_INIT, reset_xd() 517 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_OE, XD_OUTPUT_EN, 0); reset_xd() 519 retval = rtsx_send_cmd(chip, XD_CARD, 100); reset_xd() 521 rtsx_trace(chip); reset_xd() 525 if (!chip->ft2_fast_mode) { reset_xd() 526 retval = card_power_off(chip, XD_CARD); reset_xd() 528 rtsx_trace(chip); reset_xd() 534 rtsx_init_cmd(chip); reset_xd() 536 if (chip->asic_code) { reset_xd() 537 xd_fill_pull_ctl_enable(chip); reset_xd() 539 rtsx_add_cmd(chip, WRITE_REG_CMD, FPGA_PULL_CTL, 0xFF, reset_xd() 544 retval = rtsx_send_cmd(chip, XD_CARD, 100); reset_xd() 546 rtsx_trace(chip); reset_xd() 550 retval = card_power_on(chip, XD_CARD); reset_xd() 552 rtsx_trace(chip); reset_xd() 558 if (chip->ocp_stat & (SD_OC_NOW | SD_OC_EVER)) { reset_xd() 559 dev_dbg(rtsx_dev(chip), "Over current, OCPSTAT is 0x%x\n", reset_xd() 560 chip->ocp_stat); reset_xd() 561 rtsx_trace(chip); reset_xd() 567 rtsx_init_cmd(chip); reset_xd() 569 if (chip->ft2_fast_mode) { reset_xd() 570 if (chip->asic_code) { reset_xd() 571 xd_fill_pull_ctl_enable(chip); reset_xd() 573 rtsx_add_cmd(chip, WRITE_REG_CMD, FPGA_PULL_CTL, 0xFF, reset_xd() 579 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_OE, XD_OUTPUT_EN, XD_OUTPUT_EN); reset_xd() 580 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_CTL, XD_CE_DISEN, XD_CE_DISEN); reset_xd() 582 retval = rtsx_send_cmd(chip, XD_CARD, 100); reset_xd() 584 rtsx_trace(chip); reset_xd() 588 if (!chip->ft2_fast_mode) reset_xd() 591 retval = xd_set_init_para(chip); reset_xd() 593 rtsx_trace(chip); reset_xd() 599 rtsx_init_cmd(chip); reset_xd() 601 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_DTCTL, 0xFF, reset_xd() 604 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_CATCTL, 0xFF, reset_xd() 608 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_TRANSFER, 0xFF, reset_xd() 610 rtsx_add_cmd(chip, CHECK_REG_CMD, XD_TRANSFER, reset_xd() 613 rtsx_add_cmd(chip, READ_REG_CMD, XD_DAT, 0, 0); reset_xd() 614 rtsx_add_cmd(chip, READ_REG_CMD, XD_CTL, 0, 0); reset_xd() 616 retval = rtsx_send_cmd(chip, XD_CARD, 100); reset_xd() 618 rtsx_trace(chip); reset_xd() 622 ptr = rtsx_get_cmd_data(chip) + 1; reset_xd() 624 dev_dbg(rtsx_dev(chip), "XD_DAT: 0x%x, XD_CTL: 0x%x\n", reset_xd() 631 retval = xd_read_id(chip, READ_ID, id_buf, 4); reset_xd() 633 rtsx_trace(chip); reset_xd() 637 dev_dbg(rtsx_dev(chip), "READ_ID: 0x%x 0x%x 0x%x 0x%x\n", reset_xd() 714 retval = xd_read_id(chip, READ_ID, id_buf, 4); reset_xd() 716 rtsx_trace(chip); reset_xd() 734 rtsx_trace(chip); reset_xd() 738 retval = xd_read_id(chip, READ_xD_ID, id_buf, 4); reset_xd() 740 rtsx_trace(chip); reset_xd() 743 dev_dbg(rtsx_dev(chip), "READ_xD_ID: 0x%x 0x%x 0x%x 0x%x\n", reset_xd() 746 rtsx_trace(chip); reset_xd() 754 if (detect_card_cd(chip, XD_CARD) != STATUS_SUCCESS) { reset_xd() 755 rtsx_trace(chip); reset_xd() 762 retval = xd_read_redundant(chip, page_addr, redunt, 11); reset_xd() 775 retval = xd_read_redundant(chip, page_addr + j, reset_xd() 794 retval = xd_read_cis(chip, page_addr, buf, 10); reset_xd() 796 rtsx_trace(chip); reset_xd() 813 dev_dbg(rtsx_dev(chip), "CIS block: 0x%x\n", xd_card->cis_block); reset_xd() 815 rtsx_trace(chip); reset_xd() 819 chip->capacity[chip->card2lun[XD_CARD]] = xd_card->capacity; reset_xd() 863 static int xd_init_l2p_tbl(struct rtsx_chip *chip) xd_init_l2p_tbl() argument 865 struct xd_info *xd_card = &(chip->xd_card); xd_init_l2p_tbl() 868 dev_dbg(rtsx_dev(chip), "xd_init_l2p_tbl: zone_cnt = %d\n", xd_init_l2p_tbl() 872 rtsx_trace(chip); xd_init_l2p_tbl() 877 dev_dbg(rtsx_dev(chip), "Buffer size for l2p table is %d\n", size); xd_init_l2p_tbl() 881 rtsx_trace(chip); xd_init_l2p_tbl() 916 static void xd_set_unused_block(struct rtsx_chip *chip, u32 phy_blk) xd_set_unused_block() argument 918 struct xd_info *xd_card = &(chip->xd_card); xd_set_unused_block() 924 dev_dbg(rtsx_dev(chip), "Set unused block to invalid zone (zone_no = %d, zone_cnt = %d)\n", xd_set_unused_block() 931 if (xd_build_l2p_tbl(chip, zone_no) != STATUS_SUCCESS) xd_set_unused_block() 938 dev_dbg(rtsx_dev(chip), "Set unused block fail, invalid set_index\n"); xd_set_unused_block() 942 dev_dbg(rtsx_dev(chip), "Set unused block to index %d\n", xd_set_unused_block() 951 static u32 xd_get_unused_block(struct rtsx_chip *chip, int zone_no) xd_get_unused_block() argument 953 struct xd_info *xd_card = &(chip->xd_card); xd_get_unused_block() 958 dev_dbg(rtsx_dev(chip), "Get unused block from invalid zone (zone_no = %d, zone_cnt = %d)\n", xd_get_unused_block() 967 dev_dbg(rtsx_dev(chip), "Get unused block fail, no unused block available\n"); xd_get_unused_block() 972 dev_dbg(rtsx_dev(chip), "Get unused block fail, invalid get_index\n"); xd_get_unused_block() 976 dev_dbg(rtsx_dev(chip), "Get unused block from index %d\n", xd_get_unused_block() 989 static void xd_set_l2p_tbl(struct rtsx_chip *chip, xd_set_l2p_tbl() argument 992 struct xd_info *xd_card = &(chip->xd_card); xd_set_l2p_tbl() 999 static u32 xd_get_l2p_tbl(struct rtsx_chip *chip, int zone_no, u16 log_off) xd_get_l2p_tbl() argument 1001 struct xd_info *xd_card = &(chip->xd_card); xd_get_l2p_tbl() 1011 retval = xd_delay_write(chip); xd_get_l2p_tbl() 1013 dev_dbg(rtsx_dev(chip), "In xd_get_l2p_tbl, delay write fail!\n"); xd_get_l2p_tbl() 1019 dev_dbg(rtsx_dev(chip), "No unused block!\n"); xd_get_l2p_tbl() 1024 phy_blk = xd_get_unused_block(chip, zone_no); xd_get_l2p_tbl() 1026 dev_dbg(rtsx_dev(chip), "No unused block available!\n"); xd_get_l2p_tbl() 1030 retval = xd_init_page(chip, phy_blk, log_off, xd_get_l2p_tbl() 1036 dev_dbg(rtsx_dev(chip), "No good unused block available!\n"); xd_get_l2p_tbl() 1040 xd_set_l2p_tbl(chip, zone_no, log_off, (u16)(phy_blk & 0x3FF)); xd_get_l2p_tbl() 1047 int reset_xd_card(struct rtsx_chip *chip) reset_xd_card() argument 1049 struct xd_info *xd_card = &(chip->xd_card); reset_xd_card() 1062 retval = enable_card_clock(chip, XD_CARD); reset_xd_card() 1064 rtsx_trace(chip); reset_xd_card() 1068 retval = reset_xd(chip); reset_xd_card() 1070 rtsx_trace(chip); reset_xd_card() 1074 retval = xd_init_l2p_tbl(chip); reset_xd_card() 1076 rtsx_trace(chip); reset_xd_card() 1083 static int xd_mark_bad_block(struct rtsx_chip *chip, u32 phy_blk) xd_mark_bad_block() argument 1085 struct xd_info *xd_card = &(chip->xd_card); xd_mark_bad_block() 1090 dev_dbg(rtsx_dev(chip), "mark block 0x%x as bad block\n", phy_blk); xd_mark_bad_block() 1093 rtsx_trace(chip); xd_mark_bad_block() 1097 rtsx_init_cmd(chip); xd_mark_bad_block() 1099 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_PAGE_STATUS, 0xFF, XD_GPG); xd_mark_bad_block() 1100 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_BLOCK_STATUS, 0xFF, XD_LATER_BBLK); xd_mark_bad_block() 1101 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_BLOCK_ADDR1_H, 0xFF, 0xFF); xd_mark_bad_block() 1102 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_BLOCK_ADDR1_L, 0xFF, 0xFF); xd_mark_bad_block() 1103 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_BLOCK_ADDR2_H, 0xFF, 0xFF); xd_mark_bad_block() 1104 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_BLOCK_ADDR2_L, 0xFF, 0xFF); xd_mark_bad_block() 1105 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_RESERVED0, 0xFF, 0xFF); xd_mark_bad_block() 1106 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_RESERVED1, 0xFF, 0xFF); xd_mark_bad_block() 1107 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_RESERVED2, 0xFF, 0xFF); xd_mark_bad_block() 1108 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_RESERVED3, 0xFF, 0xFF); xd_mark_bad_block() 1112 xd_assign_phy_addr(chip, page_addr, XD_RW_ADDR); xd_mark_bad_block() 1114 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_PAGE_CNT, 0xFF, xd_mark_bad_block() 1117 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_TRANSFER, 0xFF, xd_mark_bad_block() 1119 rtsx_add_cmd(chip, CHECK_REG_CMD, XD_TRANSFER, xd_mark_bad_block() 1122 retval = rtsx_send_cmd(chip, XD_CARD, 500); xd_mark_bad_block() 1124 rtsx_clear_xd_error(chip); xd_mark_bad_block() 1125 rtsx_read_register(chip, XD_DAT, &reg); xd_mark_bad_block() 1127 xd_set_err_code(chip, XD_PRG_ERROR); xd_mark_bad_block() 1129 xd_set_err_code(chip, XD_TO_ERROR); xd_mark_bad_block() 1130 rtsx_trace(chip); xd_mark_bad_block() 1137 static int xd_init_page(struct rtsx_chip *chip, u32 phy_blk, xd_init_page() argument 1140 struct xd_info *xd_card = &(chip->xd_card); xd_init_page() 1145 dev_dbg(rtsx_dev(chip), "Init block 0x%x\n", phy_blk); xd_init_page() 1148 rtsx_trace(chip); xd_init_page() 1152 rtsx_trace(chip); xd_init_page() 1156 rtsx_init_cmd(chip); xd_init_page() 1158 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_PAGE_STATUS, 0xFF, 0xFF); xd_init_page() 1159 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_BLOCK_STATUS, 0xFF, 0xFF); xd_init_page() 1160 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_BLOCK_ADDR1_H, xd_init_page() 1162 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_BLOCK_ADDR1_L, 0xFF, (u8)logoff); xd_init_page() 1166 xd_assign_phy_addr(chip, page_addr, XD_RW_ADDR); xd_init_page() 1168 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_CFG, xd_init_page() 1171 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_PAGE_CNT, xd_init_page() 1174 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_TRANSFER, xd_init_page() 1176 rtsx_add_cmd(chip, CHECK_REG_CMD, XD_TRANSFER, xd_init_page() 1179 retval = rtsx_send_cmd(chip, XD_CARD, 500); xd_init_page() 1181 rtsx_clear_xd_error(chip); xd_init_page() 1182 rtsx_read_register(chip, XD_DAT, &reg); xd_init_page() 1184 xd_mark_bad_block(chip, phy_blk); xd_init_page() 1185 xd_set_err_code(chip, XD_PRG_ERROR); xd_init_page() 1187 xd_set_err_code(chip, XD_TO_ERROR); xd_init_page() 1189 rtsx_trace(chip); xd_init_page() 1196 static int xd_copy_page(struct rtsx_chip *chip, u32 old_blk, u32 new_blk, xd_copy_page() argument 1199 struct xd_info *xd_card = &(chip->xd_card); xd_copy_page() 1204 dev_dbg(rtsx_dev(chip), "Copy page from block 0x%x to block 0x%x\n", xd_copy_page() 1208 rtsx_trace(chip); xd_copy_page() 1213 rtsx_trace(chip); xd_copy_page() 1222 retval = rtsx_write_register(chip, CARD_DATA_SOURCE, 0x01, xd_copy_page() 1225 rtsx_trace(chip); xd_copy_page() 1230 if (detect_card_cd(chip, XD_CARD) != STATUS_SUCCESS) { xd_copy_page() 1231 rtsx_clear_xd_error(chip); xd_copy_page() 1232 xd_set_err_code(chip, XD_NO_CARD); xd_copy_page() 1233 rtsx_trace(chip); xd_copy_page() 1237 rtsx_init_cmd(chip); xd_copy_page() 1239 xd_assign_phy_addr(chip, old_page, XD_RW_ADDR); xd_copy_page() 1241 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_PAGE_CNT, 0xFF, 1); xd_copy_page() 1242 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_CHK_DATA_STATUS, xd_copy_page() 1244 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_TRANSFER, 0xFF, xd_copy_page() 1246 rtsx_add_cmd(chip, CHECK_REG_CMD, XD_TRANSFER, xd_copy_page() 1249 retval = rtsx_send_cmd(chip, XD_CARD, 500); xd_copy_page() 1251 rtsx_clear_xd_error(chip); xd_copy_page() 1253 rtsx_read_register(chip, XD_CTL, &reg); xd_copy_page() 1257 if (detect_card_cd(chip, xd_copy_page() 1259 xd_set_err_code(chip, XD_NO_CARD); xd_copy_page() 1260 rtsx_trace(chip); xd_copy_page() 1268 rtsx_write_register(chip, xd_copy_page() 1271 rtsx_write_register(chip, xd_copy_page() 1275 dev_dbg(rtsx_dev(chip), "old block 0x%x ecc error\n", xd_copy_page() 1279 xd_set_err_code(chip, XD_TO_ERROR); xd_copy_page() 1280 rtsx_trace(chip); xd_copy_page() 1286 rtsx_clear_xd_error(chip); xd_copy_page() 1288 rtsx_init_cmd(chip); xd_copy_page() 1290 xd_assign_phy_addr(chip, new_page, XD_RW_ADDR); xd_copy_page() 1291 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_PAGE_CNT, 0xFF, 1); xd_copy_page() 1292 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_TRANSFER, 0xFF, xd_copy_page() 1294 rtsx_add_cmd(chip, CHECK_REG_CMD, XD_TRANSFER, xd_copy_page() 1297 retval = rtsx_send_cmd(chip, XD_CARD, 300); xd_copy_page() 1299 rtsx_clear_xd_error(chip); xd_copy_page() 1301 rtsx_read_register(chip, XD_DAT, &reg); xd_copy_page() 1303 xd_mark_bad_block(chip, new_blk); xd_copy_page() 1304 xd_set_err_code(chip, XD_PRG_ERROR); xd_copy_page() 1307 xd_set_err_code(chip, XD_TO_ERROR); xd_copy_page() 1309 rtsx_trace(chip); xd_copy_page() 1320 static int xd_reset_cmd(struct rtsx_chip *chip) xd_reset_cmd() argument 1325 rtsx_init_cmd(chip); xd_reset_cmd() 1327 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_TRANSFER, xd_reset_cmd() 1329 rtsx_add_cmd(chip, CHECK_REG_CMD, XD_TRANSFER, xd_reset_cmd() 1331 rtsx_add_cmd(chip, READ_REG_CMD, XD_DAT, 0, 0); xd_reset_cmd() 1332 rtsx_add_cmd(chip, READ_REG_CMD, XD_CTL, 0, 0); xd_reset_cmd() 1334 retval = rtsx_send_cmd(chip, XD_CARD, 100); xd_reset_cmd() 1336 rtsx_trace(chip); xd_reset_cmd() 1340 ptr = rtsx_get_cmd_data(chip) + 1; xd_reset_cmd() 1344 rtsx_trace(chip); xd_reset_cmd() 1348 static int xd_erase_block(struct rtsx_chip *chip, u32 phy_blk) xd_erase_block() argument 1350 struct xd_info *xd_card = &(chip->xd_card); xd_erase_block() 1356 rtsx_trace(chip); xd_erase_block() 1363 rtsx_init_cmd(chip); xd_erase_block() 1365 xd_assign_phy_addr(chip, page_addr, XD_ERASE_ADDR); xd_erase_block() 1367 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_TRANSFER, 0xFF, xd_erase_block() 1369 rtsx_add_cmd(chip, CHECK_REG_CMD, XD_TRANSFER, xd_erase_block() 1371 rtsx_add_cmd(chip, READ_REG_CMD, XD_DAT, 0, 0); xd_erase_block() 1373 retval = rtsx_send_cmd(chip, XD_CARD, 250); xd_erase_block() 1375 rtsx_clear_xd_error(chip); xd_erase_block() 1376 rtsx_read_register(chip, XD_DAT, &reg); xd_erase_block() 1378 xd_mark_bad_block(chip, phy_blk); xd_erase_block() 1379 xd_set_err_code(chip, XD_PRG_ERROR); xd_erase_block() 1380 rtsx_trace(chip); xd_erase_block() 1383 xd_set_err_code(chip, XD_ERASE_FAIL); xd_erase_block() 1385 retval = xd_reset_cmd(chip); xd_erase_block() 1387 rtsx_trace(chip); xd_erase_block() 1393 ptr = rtsx_get_cmd_data(chip) + 1; xd_erase_block() 1395 xd_mark_bad_block(chip, phy_blk); xd_erase_block() 1396 xd_set_err_code(chip, XD_PRG_ERROR); xd_erase_block() 1397 rtsx_trace(chip); xd_erase_block() 1404 xd_mark_bad_block(chip, phy_blk); xd_erase_block() 1405 xd_set_err_code(chip, XD_ERASE_FAIL); xd_erase_block() 1406 rtsx_trace(chip); xd_erase_block() 1411 static int xd_build_l2p_tbl(struct rtsx_chip *chip, int zone_no) xd_build_l2p_tbl() argument 1413 struct xd_info *xd_card = &(chip->xd_card); xd_build_l2p_tbl() 1421 dev_dbg(rtsx_dev(chip), "xd_build_l2p_tbl: %d\n", zone_no); xd_build_l2p_tbl() 1424 retval = xd_init_l2p_tbl(chip); xd_build_l2p_tbl() 1430 dev_dbg(rtsx_dev(chip), "l2p table of zone %d has been built\n", xd_build_l2p_tbl() 1440 rtsx_trace(chip); xd_build_l2p_tbl() 1449 rtsx_trace(chip); xd_build_l2p_tbl() 1473 dev_dbg(rtsx_dev(chip), "start block 0x%x, end block 0x%x\n", xd_build_l2p_tbl() 1483 retval = xd_read_redundant(chip, page_addr, redunt, 11); xd_build_l2p_tbl() 1488 dev_dbg(rtsx_dev(chip), "bad block\n"); xd_build_l2p_tbl() 1493 dev_dbg(rtsx_dev(chip), "blank block\n"); xd_build_l2p_tbl() 1494 xd_set_unused_block(chip, i); xd_build_l2p_tbl() 1501 retval = xd_erase_block(chip, i); xd_build_l2p_tbl() 1503 xd_set_unused_block(chip, i); xd_build_l2p_tbl() 1521 retval = xd_read_redundant(chip, page_addr, redunt, 11); xd_build_l2p_tbl() 1533 retval = xd_read_redundant(chip, page_addr, xd_build_l2p_tbl() 1542 retval = xd_erase_block(chip, phy_block); xd_build_l2p_tbl() 1544 xd_set_unused_block(chip, phy_block); xd_build_l2p_tbl() 1552 retval = xd_erase_block(chip, phy_block); xd_build_l2p_tbl() 1554 xd_set_unused_block(chip, phy_block); xd_build_l2p_tbl() 1557 retval = xd_erase_block(chip, i); xd_build_l2p_tbl() 1559 xd_set_unused_block(chip, i); xd_build_l2p_tbl() 1562 retval = xd_erase_block(chip, i); xd_build_l2p_tbl() 1564 xd_set_unused_block(chip, i); xd_build_l2p_tbl() 1579 dev_dbg(rtsx_dev(chip), "Block count %d, invalid L2P entry %d\n", xd_build_l2p_tbl() 1581 dev_dbg(rtsx_dev(chip), "Total unused block: %d\n", xd_build_l2p_tbl() 1585 chip->card_wp |= XD_CARD; xd_build_l2p_tbl() 1604 static int xd_send_cmd(struct rtsx_chip *chip, u8 cmd) xd_send_cmd() argument 1608 rtsx_init_cmd(chip); xd_send_cmd() 1610 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_DAT, 0xFF, cmd); xd_send_cmd() 1611 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_TRANSFER, 0xFF, xd_send_cmd() 1613 rtsx_add_cmd(chip, CHECK_REG_CMD, XD_TRANSFER, xd_send_cmd() 1616 retval = rtsx_send_cmd(chip, XD_CARD, 200); xd_send_cmd() 1618 rtsx_trace(chip); xd_send_cmd() 1625 static int xd_read_multiple_pages(struct rtsx_chip *chip, u32 phy_blk, xd_read_multiple_pages() argument 1630 struct xd_info *xd_card = &(chip->xd_card); xd_read_multiple_pages() 1637 rtsx_trace(chip); xd_read_multiple_pages() 1649 retval = xd_read_redundant(chip, page_addr, NULL, 0); xd_read_multiple_pages() 1653 if (detect_card_cd(chip, XD_CARD) != STATUS_SUCCESS) { xd_read_multiple_pages() 1654 xd_set_err_code(chip, XD_NO_CARD); xd_read_multiple_pages() 1655 rtsx_trace(chip); xd_read_multiple_pages() 1663 rtsx_init_cmd(chip); xd_read_multiple_pages() 1665 xd_assign_phy_addr(chip, page_addr, XD_RW_ADDR); xd_read_multiple_pages() 1666 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_CFG, XD_PPB_TO_SIE, XD_PPB_TO_SIE); xd_read_multiple_pages() 1667 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, 0x01, RING_BUFFER); xd_read_multiple_pages() 1668 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_PAGE_CNT, 0xFF, page_cnt); xd_read_multiple_pages() 1669 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_CHK_DATA_STATUS, xd_read_multiple_pages() 1672 trans_dma_enable(chip->srb->sc_data_direction, chip, xd_read_multiple_pages() 1675 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_TRANSFER, 0xFF, xd_read_multiple_pages() 1677 rtsx_add_cmd(chip, CHECK_REG_CMD, XD_TRANSFER, xd_read_multiple_pages() 1680 rtsx_send_cmd_no_wait(chip); xd_read_multiple_pages() 1682 retval = rtsx_transfer_data_partial(chip, XD_CARD, buf, page_cnt * 512, xd_read_multiple_pages() 1683 scsi_sg_count(chip->srb), xd_read_multiple_pages() 1685 chip->xd_timeout); xd_read_multiple_pages() 1687 rtsx_clear_xd_error(chip); xd_read_multiple_pages() 1690 xd_set_err_code(chip, XD_TO_ERROR); xd_read_multiple_pages() 1691 rtsx_trace(chip); xd_read_multiple_pages() 1694 rtsx_trace(chip); xd_read_multiple_pages() 1702 retval = rtsx_read_register(chip, XD_PAGE_STATUS, &reg_val); xd_read_multiple_pages() 1704 rtsx_trace(chip); xd_read_multiple_pages() 1709 xd_set_err_code(chip, XD_PRG_ERROR); xd_read_multiple_pages() 1711 retval = rtsx_read_register(chip, XD_CTL, &reg_val); xd_read_multiple_pages() 1713 rtsx_trace(chip); xd_read_multiple_pages() 1723 if (detect_card_cd(chip, XD_CARD) != STATUS_SUCCESS) { xd_read_multiple_pages() 1724 xd_set_err_code(chip, XD_NO_CARD); xd_read_multiple_pages() 1725 rtsx_trace(chip); xd_read_multiple_pages() 1729 xd_set_err_code(chip, XD_ECC_ERROR); xd_read_multiple_pages() 1731 new_blk = xd_get_unused_block(chip, zone_no); xd_read_multiple_pages() 1734 rtsx_trace(chip); xd_read_multiple_pages() 1738 retval = xd_copy_page(chip, phy_blk, new_blk, 0, xd_read_multiple_pages() 1742 retval = xd_erase_block(chip, new_blk); xd_read_multiple_pages() 1744 xd_set_unused_block(chip, new_blk); xd_read_multiple_pages() 1749 rtsx_trace(chip); xd_read_multiple_pages() 1752 xd_set_l2p_tbl(chip, zone_no, log_off, (u16)(new_blk & 0x3FF)); xd_read_multiple_pages() 1753 xd_erase_block(chip, phy_blk); xd_read_multiple_pages() 1754 xd_mark_bad_block(chip, phy_blk); xd_read_multiple_pages() 1758 rtsx_trace(chip); xd_read_multiple_pages() 1762 static int xd_finish_write(struct rtsx_chip *chip, xd_finish_write() argument 1765 struct xd_info *xd_card = &(chip->xd_card); xd_finish_write() 1769 dev_dbg(rtsx_dev(chip), "xd_finish_write, old_blk = 0x%x, new_blk = 0x%x, log_blk = 0x%x\n", xd_finish_write() 1773 rtsx_trace(chip); xd_finish_write() 1781 retval = xd_init_page(chip, new_blk, log_off, xd_finish_write() 1784 retval = xd_erase_block(chip, new_blk); xd_finish_write() 1786 xd_set_unused_block(chip, new_blk); xd_finish_write() 1787 rtsx_trace(chip); xd_finish_write() 1791 retval = xd_copy_page(chip, old_blk, new_blk, xd_finish_write() 1795 retval = xd_erase_block(chip, new_blk); xd_finish_write() 1797 xd_set_unused_block(chip, new_blk); xd_finish_write() 1800 rtsx_trace(chip); xd_finish_write() 1804 retval = xd_erase_block(chip, old_blk); xd_finish_write() 1807 xd_mark_bad_block(chip, old_blk); xd_finish_write() 1810 xd_set_unused_block(chip, old_blk); xd_finish_write() 1813 xd_set_err_code(chip, XD_NO_ERROR); xd_finish_write() 1818 xd_set_l2p_tbl(chip, zone_no, log_off, (u16)(new_blk & 0x3FF)); xd_finish_write() 1823 static int xd_prepare_write(struct rtsx_chip *chip, xd_prepare_write() argument 1828 dev_dbg(rtsx_dev(chip), "%s, old_blk = 0x%x, new_blk = 0x%x, log_blk = 0x%x, page_off = %d\n", xd_prepare_write() 1832 retval = xd_copy_page(chip, old_blk, new_blk, 0, page_off); xd_prepare_write() 1834 rtsx_trace(chip); xd_prepare_write() 1843 static int xd_write_multiple_pages(struct rtsx_chip *chip, u32 old_blk, xd_write_multiple_pages() argument 1848 struct xd_info *xd_card = &(chip->xd_card); xd_write_multiple_pages() 1854 dev_dbg(rtsx_dev(chip), "%s, old_blk = 0x%x, new_blk = 0x%x, log_blk = 0x%x\n", xd_write_multiple_pages() 1858 rtsx_trace(chip); xd_write_multiple_pages() 1868 retval = xd_send_cmd(chip, READ1_1); xd_write_multiple_pages() 1870 rtsx_trace(chip); xd_write_multiple_pages() 1874 rtsx_init_cmd(chip); xd_write_multiple_pages() 1876 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_BLOCK_ADDR1_H, xd_write_multiple_pages() 1878 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_BLOCK_ADDR1_L, 0xFF, (u8)log_off); xd_write_multiple_pages() 1879 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_BLOCK_STATUS, 0xFF, XD_GBLK); xd_write_multiple_pages() 1880 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_PAGE_STATUS, 0xFF, XD_GPG); xd_write_multiple_pages() 1882 xd_assign_phy_addr(chip, page_addr, XD_RW_ADDR); xd_write_multiple_pages() 1884 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_CFG, XD_BA_TRANSFORM, xd_write_multiple_pages() 1886 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_PAGE_CNT, 0xFF, page_cnt); xd_write_multiple_pages() 1887 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, 0x01, RING_BUFFER); xd_write_multiple_pages() 1889 trans_dma_enable(chip->srb->sc_data_direction, chip, xd_write_multiple_pages() 1892 rtsx_add_cmd(chip, WRITE_REG_CMD, XD_TRANSFER, xd_write_multiple_pages() 1894 rtsx_add_cmd(chip, CHECK_REG_CMD, XD_TRANSFER, xd_write_multiple_pages() 1897 rtsx_send_cmd_no_wait(chip); xd_write_multiple_pages() 1899 retval = rtsx_transfer_data_partial(chip, XD_CARD, buf, page_cnt * 512, xd_write_multiple_pages() 1900 scsi_sg_count(chip->srb), xd_write_multiple_pages() 1901 index, offset, DMA_TO_DEVICE, chip->xd_timeout); xd_write_multiple_pages() 1903 rtsx_clear_xd_error(chip); xd_write_multiple_pages() 1906 xd_set_err_code(chip, XD_TO_ERROR); xd_write_multiple_pages() 1907 rtsx_trace(chip); xd_write_multiple_pages() 1910 rtsx_trace(chip); xd_write_multiple_pages() 1919 retval = xd_erase_block(chip, old_blk); xd_write_multiple_pages() 1922 xd_mark_bad_block(chip, old_blk); xd_write_multiple_pages() 1925 xd_set_unused_block(chip, old_blk); xd_write_multiple_pages() 1928 xd_set_err_code(chip, XD_NO_ERROR); xd_write_multiple_pages() 1932 xd_set_l2p_tbl(chip, zone_no, log_off, (u16)(new_blk & 0x3FF)); xd_write_multiple_pages() 1938 retval = rtsx_read_register(chip, XD_DAT, &reg_val); xd_write_multiple_pages() 1940 rtsx_trace(chip); xd_write_multiple_pages() 1944 xd_set_err_code(chip, XD_PRG_ERROR); xd_write_multiple_pages() 1945 xd_mark_bad_block(chip, new_blk); xd_write_multiple_pages() 1948 rtsx_trace(chip); xd_write_multiple_pages() 1953 int xd_delay_write(struct rtsx_chip *chip) xd_delay_write() argument 1955 struct xd_info *xd_card = &(chip->xd_card); xd_delay_write() 1960 dev_dbg(rtsx_dev(chip), "xd_delay_write\n"); xd_delay_write() 1961 retval = xd_switch_clock(chip); xd_delay_write() 1963 rtsx_trace(chip); xd_delay_write() 1968 retval = xd_finish_write(chip, xd_delay_write() 1973 rtsx_trace(chip); xd_delay_write() 1982 int xd_rw(struct scsi_cmnd *srb, struct rtsx_chip *chip, xd_rw() argument 1985 struct xd_info *xd_card = &(chip->xd_card); xd_rw() 1997 xd_set_err_code(chip, XD_NO_ERROR); xd_rw() 2001 dev_dbg(rtsx_dev(chip), "xd_rw: scsi_sg_count = %d\n", xd_rw() 2006 retval = xd_switch_clock(chip); xd_rw() 2008 rtsx_trace(chip); xd_rw() 2013 if (detect_card_cd(chip, XD_CARD) != STATUS_SUCCESS) { xd_rw() 2014 chip->card_fail |= XD_CARD; xd_rw() 2015 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT); xd_rw() 2016 rtsx_trace(chip); xd_rw() 2026 retval = xd_build_l2p_tbl(chip, zone_no); xd_rw() 2028 chip->card_fail |= XD_CARD; xd_rw() 2029 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT); xd_rw() 2030 rtsx_trace(chip); xd_rw() 2042 retval = xd_copy_page(chip, xd_rw() 2047 set_sense_type(chip, lun, xd_rw() 2049 rtsx_trace(chip); xd_rw() 2062 retval = xd_delay_write(chip); xd_rw() 2064 set_sense_type(chip, lun, xd_rw() 2066 rtsx_trace(chip); xd_rw() 2070 old_blk = xd_get_l2p_tbl(chip, zone_no, log_off); xd_rw() 2071 new_blk = xd_get_unused_block(chip, zone_no); xd_rw() 2074 set_sense_type(chip, lun, xd_rw() 2076 rtsx_trace(chip); xd_rw() 2080 retval = xd_prepare_write(chip, old_blk, new_blk, xd_rw() 2083 if (detect_card_cd(chip, XD_CARD) != xd_rw() 2085 set_sense_type(chip, lun, xd_rw() 2087 rtsx_trace(chip); xd_rw() 2090 set_sense_type(chip, lun, xd_rw() 2092 rtsx_trace(chip); xd_rw() 2100 retval = xd_delay_write(chip); xd_rw() 2102 if (detect_card_cd(chip, XD_CARD) != STATUS_SUCCESS) { xd_rw() 2103 set_sense_type(chip, lun, xd_rw() 2105 rtsx_trace(chip); xd_rw() 2108 set_sense_type(chip, lun, xd_rw() 2110 rtsx_trace(chip); xd_rw() 2115 old_blk = xd_get_l2p_tbl(chip, zone_no, log_off); xd_rw() 2117 set_sense_type(chip, lun, xd_rw() 2119 rtsx_trace(chip); xd_rw() 2124 dev_dbg(rtsx_dev(chip), "old_blk = 0x%x\n", old_blk); xd_rw() 2127 if (detect_card_cd(chip, XD_CARD) != STATUS_SUCCESS) { xd_rw() 2128 chip->card_fail |= XD_CARD; xd_rw() 2129 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT); xd_rw() 2130 rtsx_trace(chip); xd_rw() 2141 retval = xd_read_multiple_pages(chip, old_blk, log_blk, xd_rw() 2145 set_sense_type(chip, lun, xd_rw() 2147 rtsx_trace(chip); xd_rw() 2151 retval = xd_write_multiple_pages(chip, old_blk, xd_rw() 2156 set_sense_type(chip, lun, xd_rw() 2158 rtsx_trace(chip); xd_rw() 2175 retval = xd_build_l2p_tbl(chip, zone_no); xd_rw() 2177 chip->card_fail |= XD_CARD; xd_rw() 2178 set_sense_type(chip, lun, xd_rw() 2180 rtsx_trace(chip); xd_rw() 2185 old_blk = xd_get_l2p_tbl(chip, zone_no, log_off); xd_rw() 2188 set_sense_type(chip, lun, xd_rw() 2191 set_sense_type(chip, lun, xd_rw() 2194 rtsx_trace(chip); xd_rw() 2199 new_blk = xd_get_unused_block(chip, zone_no); xd_rw() 2201 set_sense_type(chip, lun, xd_rw() 2203 rtsx_trace(chip); xd_rw() 2220 if (detect_card_cd(chip, XD_CARD) != STATUS_SUCCESS) { xd_rw() 2221 chip->card_fail |= XD_CARD; xd_rw() 2222 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT); xd_rw() 2223 rtsx_trace(chip); xd_rw() 2227 retval = xd_finish_write(chip, old_blk, new_blk, xd_rw() 2230 if (detect_card_cd(chip, XD_CARD) != STATUS_SUCCESS) { xd_rw() 2231 set_sense_type(chip, lun, xd_rw() 2233 rtsx_trace(chip); xd_rw() 2236 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_WRITE_ERR); xd_rw() 2237 rtsx_trace(chip); xd_rw() 2248 void xd_free_l2p_tbl(struct rtsx_chip *chip) xd_free_l2p_tbl() argument 2250 struct xd_info *xd_card = &(chip->xd_card); xd_free_l2p_tbl() 2269 void xd_cleanup_work(struct rtsx_chip *chip) xd_cleanup_work() argument 2272 struct xd_info *xd_card = &(chip->xd_card); xd_cleanup_work() 2275 dev_dbg(rtsx_dev(chip), "xD: delay write\n"); xd_cleanup_work() 2276 xd_delay_write(chip); xd_cleanup_work() 2282 int xd_power_off_card3v3(struct rtsx_chip *chip) xd_power_off_card3v3() argument 2286 retval = disable_card_clock(chip, XD_CARD); xd_power_off_card3v3() 2288 rtsx_trace(chip); xd_power_off_card3v3() 2292 retval = rtsx_write_register(chip, CARD_OE, XD_OUTPUT_EN, 0); xd_power_off_card3v3() 2294 rtsx_trace(chip); xd_power_off_card3v3() 2298 if (!chip->ft2_fast_mode) { xd_power_off_card3v3() 2299 retval = card_power_off(chip, XD_CARD); xd_power_off_card3v3() 2301 rtsx_trace(chip); xd_power_off_card3v3() 2308 if (chip->asic_code) { xd_power_off_card3v3() 2309 retval = xd_pull_ctl_disable(chip); xd_power_off_card3v3() 2311 rtsx_trace(chip); xd_power_off_card3v3() 2315 retval = rtsx_write_register(chip, FPGA_PULL_CTL, 0xFF, 0xDF); xd_power_off_card3v3() 2317 rtsx_trace(chip); xd_power_off_card3v3() 2325 int release_xd_card(struct rtsx_chip *chip) release_xd_card() argument 2327 struct xd_info *xd_card = &(chip->xd_card); release_xd_card() 2330 chip->card_ready &= ~XD_CARD; release_xd_card() 2331 chip->card_fail &= ~XD_CARD; release_xd_card() 2332 chip->card_wp &= ~XD_CARD; release_xd_card() 2336 xd_free_l2p_tbl(chip); release_xd_card() 2338 retval = xd_power_off_card3v3(chip); release_xd_card() 2340 rtsx_trace(chip); release_xd_card()
H A D	ms.c	31 static inline void ms_set_err_code(struct rtsx_chip *chip, u8 err_code) ms_set_err_code() argument 33 struct ms_info *ms_card = &(chip->ms_card); ms_set_err_code() 38 static inline int ms_check_err_code(struct rtsx_chip *chip, u8 err_code) ms_check_err_code() argument 40 struct ms_info *ms_card = &(chip->ms_card); ms_check_err_code() 45 static int ms_parse_err_code(struct rtsx_chip *chip) ms_parse_err_code() argument 47 rtsx_trace(chip); ms_parse_err_code() 51 static int ms_transfer_tpc(struct rtsx_chip *chip, u8 trans_mode, ms_transfer_tpc() argument 54 struct ms_info *ms_card = &(chip->ms_card); ms_transfer_tpc() 58 dev_dbg(rtsx_dev(chip), "%s: tpc = 0x%x\n", __func__, tpc); ms_transfer_tpc() 60 rtsx_init_cmd(chip); ms_transfer_tpc() 62 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, tpc); ms_transfer_tpc() 63 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_BYTE_CNT, 0xFF, cnt); ms_transfer_tpc() 64 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg); ms_transfer_tpc() 65 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, ms_transfer_tpc() 68 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, ms_transfer_tpc() 70 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER, ms_transfer_tpc() 73 rtsx_add_cmd(chip, READ_REG_CMD, MS_TRANS_CFG, 0, 0); ms_transfer_tpc() 75 retval = rtsx_send_cmd(chip, MS_CARD, 5000); ms_transfer_tpc() 77 rtsx_clear_ms_error(chip); ms_transfer_tpc() 78 ms_set_err_code(chip, MS_TO_ERROR); ms_transfer_tpc() 79 rtsx_trace(chip); ms_transfer_tpc() 80 return ms_parse_err_code(chip); ms_transfer_tpc() 83 ptr = rtsx_get_cmd_data(chip) + 1; ms_transfer_tpc() 87 ms_set_err_code(chip, MS_CRC16_ERROR); ms_transfer_tpc() 88 rtsx_trace(chip); ms_transfer_tpc() 89 return ms_parse_err_code(chip); ms_transfer_tpc() 94 ms_set_err_code(chip, MS_CMD_NK); ms_transfer_tpc() 95 rtsx_trace(chip); ms_transfer_tpc() 96 return ms_parse_err_code(chip); ms_transfer_tpc() 102 rtsx_clear_ms_error(chip); ms_transfer_tpc() 103 ms_set_err_code(chip, MS_TO_ERROR); ms_transfer_tpc() 104 rtsx_trace(chip); ms_transfer_tpc() 105 return ms_parse_err_code(chip); ms_transfer_tpc() 111 static int ms_transfer_data(struct rtsx_chip *chip, u8 trans_mode, ms_transfer_data() argument 120 rtsx_trace(chip); ms_transfer_data() 131 rtsx_trace(chip); ms_transfer_data() 135 rtsx_init_cmd(chip); ms_transfer_data() 137 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, tpc); ms_transfer_data() 138 rtsx_add_cmd(chip, WRITE_REG_CMD, ms_transfer_data() 140 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_SECTOR_CNT_L, 0xFF, (u8)sec_cnt); ms_transfer_data() 141 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg); ms_transfer_data() 144 rtsx_add_cmd(chip, WRITE_REG_CMD, ms_transfer_data() 147 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_CFG, MS_2K_SECTOR_MODE, 0); ms_transfer_data() 150 trans_dma_enable(dir, chip, sec_cnt * 512, DMA_512); ms_transfer_data() 152 rtsx_add_cmd(chip, WRITE_REG_CMD, ms_transfer_data() 154 rtsx_add_cmd(chip, CHECK_REG_CMD, ms_transfer_data() 157 rtsx_send_cmd_no_wait(chip); ms_transfer_data() 159 retval = rtsx_transfer_data(chip, MS_CARD, buf, buf_len, ms_transfer_data() 160 use_sg, dir, chip->mspro_timeout); ms_transfer_data() 162 ms_set_err_code(chip, err_code); ms_transfer_data() 168 rtsx_trace(chip); ms_transfer_data() 172 retval = rtsx_read_register(chip, MS_TRANS_CFG, &val); ms_transfer_data() 174 rtsx_trace(chip); ms_transfer_data() 178 rtsx_trace(chip); ms_transfer_data() 185 static int ms_write_bytes(struct rtsx_chip *chip, ms_write_bytes() argument 188 struct ms_info *ms_card = &(chip->ms_card); ms_write_bytes() 192 rtsx_trace(chip); ms_write_bytes() 196 rtsx_init_cmd(chip); ms_write_bytes() 199 rtsx_add_cmd(chip, WRITE_REG_CMD, ms_write_bytes() 203 rtsx_add_cmd(chip, WRITE_REG_CMD, PPBUF_BASE2 + i, 0xFF, 0xFF); ms_write_bytes() 205 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, tpc); ms_write_bytes() 206 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_BYTE_CNT, 0xFF, cnt); ms_write_bytes() 207 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg); ms_write_bytes() 208 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, ms_write_bytes() 211 rtsx_add_cmd(chip, WRITE_REG_CMD, ms_write_bytes() 213 rtsx_add_cmd(chip, CHECK_REG_CMD, ms_write_bytes() 216 retval = rtsx_send_cmd(chip, MS_CARD, 5000); ms_write_bytes() 220 rtsx_read_register(chip, MS_TRANS_CFG, &val); ms_write_bytes() 221 dev_dbg(rtsx_dev(chip), "MS_TRANS_CFG: 0x%02x\n", val); ms_write_bytes() 223 rtsx_clear_ms_error(chip); ms_write_bytes() 227 ms_set_err_code(chip, MS_CRC16_ERROR); ms_write_bytes() 228 rtsx_trace(chip); ms_write_bytes() 229 return ms_parse_err_code(chip); ms_write_bytes() 234 ms_set_err_code(chip, MS_CMD_NK); ms_write_bytes() 235 rtsx_trace(chip); ms_write_bytes() 236 return ms_parse_err_code(chip); ms_write_bytes() 242 ms_set_err_code(chip, MS_TO_ERROR); ms_write_bytes() 243 rtsx_trace(chip); ms_write_bytes() 244 return ms_parse_err_code(chip); ms_write_bytes() 247 ms_set_err_code(chip, MS_TO_ERROR); ms_write_bytes() 248 rtsx_trace(chip); ms_write_bytes() 249 return ms_parse_err_code(chip); ms_write_bytes() 255 static int ms_read_bytes(struct rtsx_chip *chip, ms_read_bytes() argument 258 struct ms_info *ms_card = &(chip->ms_card); ms_read_bytes() 263 rtsx_trace(chip); ms_read_bytes() 267 rtsx_init_cmd(chip); ms_read_bytes() 269 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, tpc); ms_read_bytes() 270 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_BYTE_CNT, 0xFF, cnt); ms_read_bytes() 271 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg); ms_read_bytes() 272 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, ms_read_bytes() 275 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF, ms_read_bytes() 277 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER, ms_read_bytes() 281 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + i, 0, 0); ms_read_bytes() 284 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + data_len, 0, 0); ms_read_bytes() 286 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + data_len - 1, ms_read_bytes() 289 retval = rtsx_send_cmd(chip, MS_CARD, 5000); ms_read_bytes() 293 rtsx_read_register(chip, MS_TRANS_CFG, &val); ms_read_bytes() 294 rtsx_clear_ms_error(chip); ms_read_bytes() 298 ms_set_err_code(chip, MS_CRC16_ERROR); ms_read_bytes() 299 rtsx_trace(chip); ms_read_bytes() 300 return ms_parse_err_code(chip); ms_read_bytes() 305 ms_set_err_code(chip, MS_CMD_NK); ms_read_bytes() 306 rtsx_trace(chip); ms_read_bytes() 307 return ms_parse_err_code(chip); ms_read_bytes() 313 ms_set_err_code(chip, MS_TO_ERROR); ms_read_bytes() 314 rtsx_trace(chip); ms_read_bytes() 315 return ms_parse_err_code(chip); ms_read_bytes() 318 ms_set_err_code(chip, MS_TO_ERROR); ms_read_bytes() 319 rtsx_trace(chip); ms_read_bytes() 320 return ms_parse_err_code(chip); ms_read_bytes() 323 ptr = rtsx_get_cmd_data(chip) + 1; ms_read_bytes() 329 dev_dbg(rtsx_dev(chip), "Read format progress:\n"); ms_read_bytes() 337 static int ms_set_rw_reg_addr(struct rtsx_chip *chip, ms_set_rw_reg_addr() argument 349 retval = ms_write_bytes(chip, SET_RW_REG_ADRS, 4, ms_set_rw_reg_addr() 353 rtsx_clear_ms_error(chip); ms_set_rw_reg_addr() 356 rtsx_trace(chip); ms_set_rw_reg_addr() 360 static int ms_send_cmd(struct rtsx_chip *chip, u8 cmd, u8 cfg) ms_send_cmd() argument 367 return ms_write_bytes(chip, PRO_SET_CMD, 1, cfg, data, 1); ms_send_cmd() 370 static int ms_set_init_para(struct rtsx_chip *chip) ms_set_init_para() argument 372 struct ms_info *ms_card = &(chip->ms_card); ms_set_init_para() 376 if (chip->asic_code) ms_set_init_para() 377 ms_card->ms_clock = chip->asic_ms_hg_clk; ms_set_init_para() 379 ms_card->ms_clock = chip->fpga_ms_hg_clk; ms_set_init_para() 382 if (chip->asic_code) ms_set_init_para() 383 ms_card->ms_clock = chip->asic_ms_4bit_clk; ms_set_init_para() 385 ms_card->ms_clock = chip->fpga_ms_4bit_clk; ms_set_init_para() 388 if (chip->asic_code) ms_set_init_para() 389 ms_card->ms_clock = chip->asic_ms_1bit_clk; ms_set_init_para() 391 ms_card->ms_clock = chip->fpga_ms_1bit_clk; ms_set_init_para() 394 retval = switch_clock(chip, ms_card->ms_clock); ms_set_init_para() 396 rtsx_trace(chip); ms_set_init_para() 400 retval = select_card(chip, MS_CARD); ms_set_init_para() 402 rtsx_trace(chip); ms_set_init_para() 409 static int ms_switch_clock(struct rtsx_chip *chip) ms_switch_clock() argument 411 struct ms_info *ms_card = &(chip->ms_card); ms_switch_clock() 414 retval = select_card(chip, MS_CARD); ms_switch_clock() 416 rtsx_trace(chip); ms_switch_clock() 420 retval = switch_clock(chip, ms_card->ms_clock); ms_switch_clock() 422 rtsx_trace(chip); ms_switch_clock() 429 static int ms_pull_ctl_disable(struct rtsx_chip *chip) ms_pull_ctl_disable() argument 433 if (CHECK_PID(chip, 0x5208)) { ms_pull_ctl_disable() 434 retval = rtsx_write_register(chip, CARD_PULL_CTL1, 0xFF, ms_pull_ctl_disable() 437 rtsx_trace(chip); ms_pull_ctl_disable() 440 retval = rtsx_write_register(chip, CARD_PULL_CTL2, 0xFF, ms_pull_ctl_disable() 443 rtsx_trace(chip); ms_pull_ctl_disable() 446 retval = rtsx_write_register(chip, CARD_PULL_CTL3, 0xFF, ms_pull_ctl_disable() 449 rtsx_trace(chip); ms_pull_ctl_disable() 452 retval = rtsx_write_register(chip, CARD_PULL_CTL4, 0xFF, ms_pull_ctl_disable() 455 rtsx_trace(chip); ms_pull_ctl_disable() 458 retval = rtsx_write_register(chip, CARD_PULL_CTL5, 0xFF, ms_pull_ctl_disable() 461 rtsx_trace(chip); ms_pull_ctl_disable() 464 retval = rtsx_write_register(chip, CARD_PULL_CTL6, 0xFF, ms_pull_ctl_disable() 467 rtsx_trace(chip); ms_pull_ctl_disable() 470 } else if (CHECK_PID(chip, 0x5288)) { ms_pull_ctl_disable() 471 if (CHECK_BARO_PKG(chip, QFN)) { ms_pull_ctl_disable() 472 retval = rtsx_write_register(chip, CARD_PULL_CTL1, ms_pull_ctl_disable() 475 rtsx_trace(chip); ms_pull_ctl_disable() 478 retval = rtsx_write_register(chip, CARD_PULL_CTL2, ms_pull_ctl_disable() 481 rtsx_trace(chip); ms_pull_ctl_disable() 484 retval = rtsx_write_register(chip, CARD_PULL_CTL3, ms_pull_ctl_disable() 487 rtsx_trace(chip); ms_pull_ctl_disable() 490 retval = rtsx_write_register(chip, CARD_PULL_CTL4, ms_pull_ctl_disable() 493 rtsx_trace(chip); ms_pull_ctl_disable() 502 static int ms_pull_ctl_enable(struct rtsx_chip *chip) ms_pull_ctl_enable() argument 506 rtsx_init_cmd(chip); ms_pull_ctl_enable() 508 if (CHECK_PID(chip, 0x5208)) { ms_pull_ctl_enable() 509 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF, ms_pull_ctl_enable() 511 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF, ms_pull_ctl_enable() 513 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF, ms_pull_ctl_enable() 515 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF, ms_pull_ctl_enable() 517 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF, ms_pull_ctl_enable() 519 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF, ms_pull_ctl_enable() 521 } else if (CHECK_PID(chip, 0x5288)) { ms_pull_ctl_enable() 522 if (CHECK_BARO_PKG(chip, QFN)) { ms_pull_ctl_enable() 523 rtsx_add_cmd(chip, WRITE_REG_CMD, ms_pull_ctl_enable() 525 rtsx_add_cmd(chip, WRITE_REG_CMD, ms_pull_ctl_enable() 527 rtsx_add_cmd(chip, WRITE_REG_CMD, ms_pull_ctl_enable() 529 rtsx_add_cmd(chip, WRITE_REG_CMD, ms_pull_ctl_enable() 534 retval = rtsx_send_cmd(chip, MS_CARD, 100); ms_pull_ctl_enable() 536 rtsx_trace(chip); ms_pull_ctl_enable() 543 static int ms_prepare_reset(struct rtsx_chip *chip) ms_prepare_reset() argument 545 struct ms_info *ms_card = &(chip->ms_card); ms_prepare_reset() 556 retval = ms_power_off_card3v3(chip); ms_prepare_reset() 558 rtsx_trace(chip); ms_prepare_reset() 562 if (!chip->ft2_fast_mode) ms_prepare_reset() 565 retval = enable_card_clock(chip, MS_CARD); ms_prepare_reset() 567 rtsx_trace(chip); ms_prepare_reset() 571 if (chip->asic_code) { ms_prepare_reset() 572 retval = ms_pull_ctl_enable(chip); ms_prepare_reset() 574 rtsx_trace(chip); ms_prepare_reset() 578 retval = rtsx_write_register(chip, FPGA_PULL_CTL, ms_prepare_reset() 581 rtsx_trace(chip); ms_prepare_reset() 586 if (!chip->ft2_fast_mode) { ms_prepare_reset() 587 retval = card_power_on(chip, MS_CARD); ms_prepare_reset() 589 rtsx_trace(chip); ms_prepare_reset() 596 if (CHECK_LUN_MODE(chip, SD_MS_2LUN)) ms_prepare_reset() 601 if (chip->ocp_stat & oc_mask) { ms_prepare_reset() 602 dev_dbg(rtsx_dev(chip), "Over current, OCPSTAT is 0x%x\n", ms_prepare_reset() 603 chip->ocp_stat); ms_prepare_reset() 604 rtsx_trace(chip); ms_prepare_reset() 610 retval = rtsx_write_register(chip, CARD_OE, MS_OUTPUT_EN, ms_prepare_reset() 613 rtsx_trace(chip); ms_prepare_reset() 617 if (chip->asic_code) { ms_prepare_reset() 618 retval = rtsx_write_register(chip, MS_CFG, 0xFF, ms_prepare_reset() 621 rtsx_trace(chip); ms_prepare_reset() 625 retval = rtsx_write_register(chip, MS_CFG, 0xFF, ms_prepare_reset() 628 rtsx_trace(chip); ms_prepare_reset() 632 retval = rtsx_write_register(chip, MS_TRANS_CFG, 0xFF, ms_prepare_reset() 635 rtsx_trace(chip); ms_prepare_reset() 638 retval = rtsx_write_register(chip, CARD_STOP, MS_STOP | MS_CLR_ERR, ms_prepare_reset() 641 rtsx_trace(chip); ms_prepare_reset() 645 retval = ms_set_init_para(chip); ms_prepare_reset() 647 rtsx_trace(chip); ms_prepare_reset() 654 static int ms_identify_media_type(struct rtsx_chip *chip, int switch_8bit_bus) ms_identify_media_type() argument 656 struct ms_info *ms_card = &(chip->ms_card); ms_identify_media_type() 660 retval = ms_set_rw_reg_addr(chip, Pro_StatusReg, 6, SystemParm, 1); ms_identify_media_type() 662 rtsx_trace(chip); ms_identify_media_type() 667 retval = ms_transfer_tpc(chip, MS_TM_READ_BYTES, READ_REG, ms_identify_media_type() 673 rtsx_trace(chip); ms_identify_media_type() 677 retval = rtsx_read_register(chip, PPBUF_BASE2 + 2, &val); ms_identify_media_type() 679 rtsx_trace(chip); ms_identify_media_type() 682 dev_dbg(rtsx_dev(chip), "Type register: 0x%x\n", val); ms_identify_media_type() 687 rtsx_trace(chip); ms_identify_media_type() 691 retval = rtsx_read_register(chip, PPBUF_BASE2 + 4, &val); ms_identify_media_type() 693 rtsx_trace(chip); ms_identify_media_type() 696 dev_dbg(rtsx_dev(chip), "Category register: 0x%x\n", val); ms_identify_media_type() 699 rtsx_trace(chip); ms_identify_media_type() 703 retval = rtsx_read_register(chip, PPBUF_BASE2 + 5, &val); ms_identify_media_type() 705 rtsx_trace(chip); ms_identify_media_type() 708 dev_dbg(rtsx_dev(chip), "Class register: 0x%x\n", val); ms_identify_media_type() 710 retval = rtsx_read_register(chip, PPBUF_BASE2, &val); ms_identify_media_type() 712 rtsx_trace(chip); ms_identify_media_type() 716 chip->card_wp |= MS_CARD; ms_identify_media_type() 718 chip->card_wp &= ~MS_CARD; ms_identify_media_type() 721 chip->card_wp |= MS_CARD; ms_identify_media_type() 724 rtsx_trace(chip); ms_identify_media_type() 730 retval = rtsx_read_register(chip, PPBUF_BASE2 + 3, &val); ms_identify_media_type() 732 rtsx_trace(chip); ms_identify_media_type() 735 dev_dbg(rtsx_dev(chip), "IF Mode register: 0x%x\n", val); ms_identify_media_type() 745 rtsx_trace(chip); ms_identify_media_type() 752 static int ms_confirm_cpu_startup(struct rtsx_chip *chip) ms_confirm_cpu_startup() argument 760 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) { ms_confirm_cpu_startup() 761 ms_set_err_code(chip, MS_NO_CARD); ms_confirm_cpu_startup() 762 rtsx_trace(chip); ms_confirm_cpu_startup() 767 retval = ms_read_bytes(chip, GET_INT, 1, ms_confirm_cpu_startup() 773 rtsx_trace(chip); ms_confirm_cpu_startup() 778 rtsx_trace(chip); ms_confirm_cpu_startup() 787 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1); ms_confirm_cpu_startup() 792 rtsx_trace(chip); ms_confirm_cpu_startup() 798 chip->card_wp |= (MS_CARD); ms_confirm_cpu_startup() 800 rtsx_trace(chip); ms_confirm_cpu_startup() 809 static int ms_switch_parallel_bus(struct rtsx_chip *chip) ms_switch_parallel_bus() argument 817 retval = ms_write_bytes(chip, WRITE_REG, 1, NO_WAIT_INT, ms_switch_parallel_bus() 823 rtsx_trace(chip); ms_switch_parallel_bus() 830 static int ms_switch_8bit_bus(struct rtsx_chip *chip) ms_switch_8bit_bus() argument 832 struct ms_info *ms_card = &(chip->ms_card); ms_switch_8bit_bus() 839 retval = ms_write_bytes(chip, WRITE_REG, 1, ms_switch_8bit_bus() 845 rtsx_trace(chip); ms_switch_8bit_bus() 849 retval = rtsx_write_register(chip, MS_CFG, 0x98, ms_switch_8bit_bus() 852 rtsx_trace(chip); ms_switch_8bit_bus() 856 retval = ms_set_init_para(chip); ms_switch_8bit_bus() 858 rtsx_trace(chip); ms_switch_8bit_bus() 863 retval = ms_transfer_tpc(chip, MS_TM_READ_BYTES, GET_INT, ms_switch_8bit_bus() 866 rtsx_trace(chip); ms_switch_8bit_bus() 874 static int ms_pro_reset_flow(struct rtsx_chip *chip, int switch_8bit_bus) ms_pro_reset_flow() argument 876 struct ms_info *ms_card = &(chip->ms_card); ms_pro_reset_flow() 880 retval = ms_prepare_reset(chip); ms_pro_reset_flow() 882 rtsx_trace(chip); ms_pro_reset_flow() 886 retval = ms_identify_media_type(chip, switch_8bit_bus); ms_pro_reset_flow() 888 rtsx_trace(chip); ms_pro_reset_flow() 892 retval = ms_confirm_cpu_startup(chip); ms_pro_reset_flow() 894 rtsx_trace(chip); ms_pro_reset_flow() 898 retval = ms_switch_parallel_bus(chip); ms_pro_reset_flow() 900 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) { ms_pro_reset_flow() 901 ms_set_err_code(chip, MS_NO_CARD); ms_pro_reset_flow() 902 rtsx_trace(chip); ms_pro_reset_flow() 912 rtsx_trace(chip); ms_pro_reset_flow() 917 retval = rtsx_write_register(chip, MS_CFG, 0x18, MS_BUS_WIDTH_4); ms_pro_reset_flow() 919 rtsx_trace(chip); ms_pro_reset_flow() 922 retval = rtsx_write_register(chip, MS_CFG, PUSH_TIME_ODD, ms_pro_reset_flow() 925 rtsx_trace(chip); ms_pro_reset_flow() 929 retval = ms_set_init_para(chip); ms_pro_reset_flow() 931 rtsx_trace(chip); ms_pro_reset_flow() 936 if (CHK_MSHG(ms_card) && chip->support_ms_8bit && switch_8bit_bus) { ms_pro_reset_flow() 937 retval = ms_switch_8bit_bus(chip); ms_pro_reset_flow() 940 rtsx_trace(chip); ms_pro_reset_flow() 949 static int msxc_change_power(struct rtsx_chip *chip, u8 mode) msxc_change_power() argument 954 ms_cleanup_work(chip); msxc_change_power() 956 retval = ms_set_rw_reg_addr(chip, 0, 0, Pro_DataCount1, 6); msxc_change_power() 958 rtsx_trace(chip); msxc_change_power() 969 retval = ms_write_bytes(chip, PRO_WRITE_REG, 6, NO_WAIT_INT, buf, 6); msxc_change_power() 971 rtsx_trace(chip); msxc_change_power() 975 retval = ms_send_cmd(chip, XC_CHG_POWER, WAIT_INT); msxc_change_power() 977 rtsx_trace(chip); msxc_change_power() 981 retval = rtsx_read_register(chip, MS_TRANS_CFG, buf); msxc_change_power() 983 rtsx_trace(chip); msxc_change_power() 987 rtsx_trace(chip); msxc_change_power() 995 static int ms_read_attribute_info(struct rtsx_chip *chip) ms_read_attribute_info() argument 997 struct ms_info *ms_card = &(chip->ms_card); ms_read_attribute_info() 1010 retval = ms_set_rw_reg_addr(chip, Pro_IntReg, 2, Pro_SystemParm, 7); ms_read_attribute_info() 1012 rtsx_trace(chip); ms_read_attribute_info() 1031 retval = ms_write_bytes(chip, PRO_WRITE_REG, 7, NO_WAIT_INT, ms_read_attribute_info() 1037 rtsx_trace(chip); ms_read_attribute_info() 1043 rtsx_trace(chip); ms_read_attribute_info() 1048 retval = ms_send_cmd(chip, PRO_READ_ATRB, WAIT_INT); ms_read_attribute_info() 1052 retval = rtsx_read_register(chip, MS_TRANS_CFG, &val); ms_read_attribute_info() 1055 rtsx_trace(chip); ms_read_attribute_info() 1060 rtsx_trace(chip); ms_read_attribute_info() 1063 retval = ms_transfer_data(chip, MS_TM_AUTO_READ, ms_read_attribute_info() 1069 rtsx_clear_ms_error(chip); ms_read_attribute_info() 1073 rtsx_trace(chip); ms_read_attribute_info() 1079 retval = rtsx_read_register(chip, MS_TRANS_CFG, &val); ms_read_attribute_info() 1082 rtsx_trace(chip); ms_read_attribute_info() 1089 retval = ms_transfer_tpc(chip, MS_TM_NORMAL_READ, ms_read_attribute_info() 1093 rtsx_trace(chip); ms_read_attribute_info() 1102 rtsx_trace(chip); ms_read_attribute_info() 1109 rtsx_trace(chip); ms_read_attribute_info() 1115 rtsx_trace(chip); ms_read_attribute_info() 1137 dev_dbg(rtsx_dev(chip), "sys_info_addr = 0x%x, sys_info_size = 0x%x\n", ms_read_attribute_info() 1141 rtsx_trace(chip); ms_read_attribute_info() 1146 rtsx_trace(chip); ms_read_attribute_info() 1151 rtsx_trace(chip); ms_read_attribute_info() 1175 dev_dbg(rtsx_dev(chip), "model_name_addr = 0x%x, model_name_size = 0x%x\n", ms_read_attribute_info() 1179 rtsx_trace(chip); ms_read_attribute_info() 1184 rtsx_trace(chip); ms_read_attribute_info() 1189 rtsx_trace(chip); ms_read_attribute_info() 1203 rtsx_trace(chip); ms_read_attribute_info() 1220 dev_dbg(rtsx_dev(chip), "xc_total_blk = 0x%x, xc_blk_size = 0x%x\n", ms_read_attribute_info() 1227 dev_dbg(rtsx_dev(chip), "total_blk = 0x%x, blk_size = 0x%x\n", ms_read_attribute_info() 1233 dev_dbg(rtsx_dev(chip), "total_blk = 0x%x, blk_size = 0x%x\n", ms_read_attribute_info() 1237 dev_dbg(rtsx_dev(chip), "class_code = 0x%x, device_type = 0x%x, sub_class = 0x%x\n", ms_read_attribute_info() 1250 rtsx_trace(chip); ms_read_attribute_info() 1255 rtsx_trace(chip); ms_read_attribute_info() 1261 rtsx_trace(chip); ms_read_attribute_info() 1269 chip->card_wp |= MS_CARD; ms_read_attribute_info() 1271 rtsx_trace(chip); ms_read_attribute_info() 1277 rtsx_trace(chip); ms_read_attribute_info() 1281 dev_dbg(rtsx_dev(chip), "class_code: 0x%x, device_type: 0x%x, sub_class: 0x%x\n", ms_read_attribute_info() 1286 chip->capacity[chip->card2lun[MS_CARD]] = ms_read_attribute_info() 1289 chip->capacity[chip->card2lun[MS_CARD]] = ms_read_attribute_info() 1294 chip->capacity[chip->card2lun[MS_CARD]] = ms_card->capacity; ms_read_attribute_info() 1301 static int mg_set_tpc_para_sub(struct rtsx_chip *chip, 1305 static int reset_ms_pro(struct rtsx_chip *chip) reset_ms_pro() argument 1307 struct ms_info *ms_card = &(chip->ms_card); reset_ms_pro() 1312 if (chip->ms_power_class_en & 0x02) reset_ms_pro() 1314 else if (chip->ms_power_class_en & 0x01) reset_ms_pro() 1323 retval = ms_pro_reset_flow(chip, 1); reset_ms_pro() 1326 retval = ms_pro_reset_flow(chip, 0); reset_ms_pro() 1328 rtsx_trace(chip); reset_ms_pro() 1332 rtsx_trace(chip); reset_ms_pro() 1337 retval = ms_read_attribute_info(chip); reset_ms_pro() 1339 rtsx_trace(chip); reset_ms_pro() 1348 u8 power_class_en = chip->ms_power_class_en; reset_ms_pro() 1350 dev_dbg(rtsx_dev(chip), "power_class_en = 0x%x\n", reset_ms_pro() 1352 dev_dbg(rtsx_dev(chip), "change_power_class = %d\n", reset_ms_pro() 1363 dev_dbg(rtsx_dev(chip), "power_class_mode = 0x%x", reset_ms_pro() 1368 retval = msxc_change_power(chip, reset_ms_pro() 1380 retval = mg_set_tpc_para_sub(chip, 0, 0); reset_ms_pro() 1382 rtsx_trace(chip); reset_ms_pro() 1388 chip->card_bus_width[chip->card2lun[MS_CARD]] = 8; reset_ms_pro() 1390 chip->card_bus_width[chip->card2lun[MS_CARD]] = 4; reset_ms_pro() 1395 static int ms_read_status_reg(struct rtsx_chip *chip) ms_read_status_reg() argument 1400 retval = ms_set_rw_reg_addr(chip, StatusReg0, 2, 0, 0); ms_read_status_reg() 1402 rtsx_trace(chip); ms_read_status_reg() 1406 retval = ms_read_bytes(chip, READ_REG, 2, NO_WAIT_INT, val, 2); ms_read_status_reg() 1408 rtsx_trace(chip); ms_read_status_reg() 1413 ms_set_err_code(chip, MS_FLASH_READ_ERROR); ms_read_status_reg() 1414 rtsx_trace(chip); ms_read_status_reg() 1422 static int ms_read_extra_data(struct rtsx_chip *chip, ms_read_extra_data() argument 1425 struct ms_info *ms_card = &(chip->ms_card); ms_read_extra_data() 1429 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE, ms_read_extra_data() 1432 rtsx_trace(chip); ms_read_extra_data() 1450 retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT, ms_read_extra_data() 1456 rtsx_trace(chip); ms_read_extra_data() 1460 ms_set_err_code(chip, MS_NO_ERROR); ms_read_extra_data() 1463 retval = ms_send_cmd(chip, BLOCK_READ, WAIT_INT); ms_read_extra_data() 1468 rtsx_trace(chip); ms_read_extra_data() 1472 ms_set_err_code(chip, MS_NO_ERROR); ms_read_extra_data() 1473 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1); ms_read_extra_data() 1475 rtsx_trace(chip); ms_read_extra_data() 1480 ms_set_err_code(chip, MS_CMD_NK); ms_read_extra_data() 1481 rtsx_trace(chip); ms_read_extra_data() 1486 retval = ms_read_status_reg(chip); ms_read_extra_data() 1488 rtsx_trace(chip); ms_read_extra_data() 1492 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, ms_read_extra_data() 1495 rtsx_trace(chip); ms_read_extra_data() 1501 retval = ms_read_bytes(chip, READ_REG, MS_EXTRA_SIZE, NO_WAIT_INT, ms_read_extra_data() 1504 rtsx_trace(chip); ms_read_extra_data() 1517 static int ms_write_extra_data(struct rtsx_chip *chip, ms_write_extra_data() argument 1520 struct ms_info *ms_card = &(chip->ms_card); ms_write_extra_data() 1525 rtsx_trace(chip); ms_write_extra_data() 1529 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE, ms_write_extra_data() 1532 rtsx_trace(chip); ms_write_extra_data() 1550 retval = ms_write_bytes(chip, WRITE_REG, (6 + MS_EXTRA_SIZE), ms_write_extra_data() 1553 rtsx_trace(chip); ms_write_extra_data() 1557 retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT); ms_write_extra_data() 1559 rtsx_trace(chip); ms_write_extra_data() 1563 ms_set_err_code(chip, MS_NO_ERROR); ms_write_extra_data() 1564 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1); ms_write_extra_data() 1566 rtsx_trace(chip); ms_write_extra_data() 1571 ms_set_err_code(chip, MS_CMD_NK); ms_write_extra_data() 1572 rtsx_trace(chip); ms_write_extra_data() 1577 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR); ms_write_extra_data() 1578 rtsx_trace(chip); ms_write_extra_data() 1587 static int ms_read_page(struct rtsx_chip *chip, u16 block_addr, u8 page_num) ms_read_page() argument 1589 struct ms_info *ms_card = &(chip->ms_card); ms_read_page() 1593 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE, ms_read_page() 1596 rtsx_trace(chip); ms_read_page() 1611 retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT, data, 6); ms_read_page() 1613 rtsx_trace(chip); ms_read_page() 1617 retval = ms_send_cmd(chip, BLOCK_READ, WAIT_INT); ms_read_page() 1619 rtsx_trace(chip); ms_read_page() 1623 ms_set_err_code(chip, MS_NO_ERROR); ms_read_page() 1624 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1); ms_read_page() 1626 rtsx_trace(chip); ms_read_page() 1631 ms_set_err_code(chip, MS_CMD_NK); ms_read_page() 1632 rtsx_trace(chip); ms_read_page() 1639 ms_set_err_code(chip, MS_FLASH_READ_ERROR); ms_read_page() 1640 rtsx_trace(chip); ms_read_page() 1643 retval = ms_read_status_reg(chip); ms_read_page() 1645 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR); ms_read_page() 1649 ms_set_err_code(chip, MS_BREQ_ERROR); ms_read_page() 1650 rtsx_trace(chip); ms_read_page() 1656 retval = ms_transfer_tpc(chip, MS_TM_NORMAL_READ, READ_PAGE_DATA, ms_read_page() 1659 rtsx_trace(chip); ms_read_page() 1663 if (ms_check_err_code(chip, MS_FLASH_WRITE_ERROR)) { ms_read_page() 1664 rtsx_trace(chip); ms_read_page() 1672 static int ms_set_bad_block(struct rtsx_chip *chip, u16 phy_blk) ms_set_bad_block() argument 1674 struct ms_info *ms_card = &(chip->ms_card); ms_set_bad_block() 1678 retval = ms_read_extra_data(chip, phy_blk, 0, extra, MS_EXTRA_SIZE); ms_set_bad_block() 1680 rtsx_trace(chip); ms_set_bad_block() 1684 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE, ms_set_bad_block() 1687 rtsx_trace(chip); ms_set_bad_block() 1691 ms_set_err_code(chip, MS_NO_ERROR); ms_set_bad_block() 1706 retval = ms_write_bytes(chip, WRITE_REG, 7, NO_WAIT_INT, data, 7); ms_set_bad_block() 1708 rtsx_trace(chip); ms_set_bad_block() 1712 retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT); ms_set_bad_block() 1714 rtsx_trace(chip); ms_set_bad_block() 1718 ms_set_err_code(chip, MS_NO_ERROR); ms_set_bad_block() 1719 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1); ms_set_bad_block() 1721 rtsx_trace(chip); ms_set_bad_block() 1726 ms_set_err_code(chip, MS_CMD_NK); ms_set_bad_block() 1727 rtsx_trace(chip); ms_set_bad_block() 1733 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR); ms_set_bad_block() 1734 rtsx_trace(chip); ms_set_bad_block() 1743 static int ms_erase_block(struct rtsx_chip *chip, u16 phy_blk) ms_erase_block() argument 1745 struct ms_info *ms_card = &(chip->ms_card); ms_erase_block() 1749 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE, ms_erase_block() 1752 rtsx_trace(chip); ms_erase_block() 1756 ms_set_err_code(chip, MS_NO_ERROR); ms_erase_block() 1769 retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT, data, 6); ms_erase_block() 1771 rtsx_trace(chip); ms_erase_block() 1776 retval = ms_send_cmd(chip, BLOCK_ERASE, WAIT_INT); ms_erase_block() 1778 rtsx_trace(chip); ms_erase_block() 1782 ms_set_err_code(chip, MS_NO_ERROR); ms_erase_block() 1783 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1); ms_erase_block() 1785 rtsx_trace(chip); ms_erase_block() 1795 ms_set_err_code(chip, MS_CMD_NK); ms_erase_block() 1796 ms_set_bad_block(chip, phy_blk); ms_erase_block() 1797 rtsx_trace(chip); ms_erase_block() 1803 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR); ms_erase_block() 1804 rtsx_trace(chip); ms_erase_block() 1832 static int ms_init_page(struct rtsx_chip *chip, u16 phy_blk, u16 log_blk, ms_init_page() argument 1846 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) { ms_init_page() 1847 ms_set_err_code(chip, MS_NO_CARD); ms_init_page() 1848 rtsx_trace(chip); ms_init_page() 1852 retval = ms_write_extra_data(chip, phy_blk, i, ms_init_page() 1855 rtsx_trace(chip); ms_init_page() 1863 static int ms_copy_page(struct rtsx_chip *chip, u16 old_blk, u16 new_blk, ms_copy_page() argument 1866 struct ms_info *ms_card = &(chip->ms_card); ms_copy_page() 1871 dev_dbg(rtsx_dev(chip), "Copy page from 0x%x to 0x%x, logical block is 0x%x\n", ms_copy_page() 1873 dev_dbg(rtsx_dev(chip), "start_page = %d, end_page = %d\n", ms_copy_page() 1876 retval = ms_read_extra_data(chip, new_blk, 0, extra, MS_EXTRA_SIZE); ms_copy_page() 1878 rtsx_trace(chip); ms_copy_page() 1882 retval = ms_read_status_reg(chip); ms_copy_page() 1884 rtsx_trace(chip); ms_copy_page() 1888 retval = rtsx_read_register(chip, PPBUF_BASE2, &val); ms_copy_page() 1890 rtsx_trace(chip); ms_copy_page() 1895 retval = ms_send_cmd(chip, CLEAR_BUF, WAIT_INT); ms_copy_page() 1897 rtsx_trace(chip); ms_copy_page() 1901 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1); ms_copy_page() 1903 rtsx_trace(chip); ms_copy_page() 1908 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR); ms_copy_page() 1909 rtsx_trace(chip); ms_copy_page() 1915 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) { ms_copy_page() 1916 ms_set_err_code(chip, MS_NO_CARD); ms_copy_page() 1917 rtsx_trace(chip); ms_copy_page() 1921 ms_read_extra_data(chip, old_blk, i, extra, MS_EXTRA_SIZE); ms_copy_page() 1923 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, ms_copy_page() 1926 rtsx_trace(chip); ms_copy_page() 1930 ms_set_err_code(chip, MS_NO_ERROR); ms_copy_page() 1943 retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT, ms_copy_page() 1946 rtsx_trace(chip); ms_copy_page() 1950 retval = ms_send_cmd(chip, BLOCK_READ, WAIT_INT); ms_copy_page() 1952 rtsx_trace(chip); ms_copy_page() 1956 ms_set_err_code(chip, MS_NO_ERROR); ms_copy_page() 1957 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1); ms_copy_page() 1959 rtsx_trace(chip); ms_copy_page() 1964 ms_set_err_code(chip, MS_CMD_NK); ms_copy_page() 1965 rtsx_trace(chip); ms_copy_page() 1971 retval = ms_read_status_reg(chip); ms_copy_page() 1974 dev_dbg(rtsx_dev(chip), "Uncorrectable error\n"); ms_copy_page() 1979 retval = ms_transfer_tpc(chip, ms_copy_page() 1984 rtsx_trace(chip); ms_copy_page() 1994 ms_write_extra_data(chip, old_blk, i, ms_copy_page() 1996 dev_dbg(rtsx_dev(chip), "page %d : extra[0] = 0x%x\n", ms_copy_page() 2002 ms_write_extra_data(chip, new_blk, i, ms_copy_page() 2010 chip, ms_copy_page() 2018 rtsx_trace(chip); ms_copy_page() 2024 ms_set_err_code(chip, MS_BREQ_ERROR); ms_copy_page() 2025 rtsx_trace(chip); ms_copy_page() 2030 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, ms_copy_page() 2033 ms_set_err_code(chip, MS_NO_ERROR); ms_copy_page() 2058 retval = ms_write_bytes(chip, WRITE_REG, (6 + MS_EXTRA_SIZE), ms_copy_page() 2061 rtsx_trace(chip); ms_copy_page() 2065 retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT); ms_copy_page() 2067 rtsx_trace(chip); ms_copy_page() 2071 ms_set_err_code(chip, MS_NO_ERROR); ms_copy_page() 2072 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1); ms_copy_page() 2074 rtsx_trace(chip); ms_copy_page() 2079 ms_set_err_code(chip, MS_CMD_NK); ms_copy_page() 2080 rtsx_trace(chip); ms_copy_page() 2086 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR); ms_copy_page() 2087 rtsx_trace(chip); ms_copy_page() 2093 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, ms_copy_page() 2096 rtsx_trace(chip); ms_copy_page() 2100 ms_set_err_code(chip, MS_NO_ERROR); ms_copy_page() 2115 retval = ms_write_bytes(chip, WRITE_REG, 7, ms_copy_page() 2118 rtsx_trace(chip); ms_copy_page() 2122 retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT); ms_copy_page() 2124 rtsx_trace(chip); ms_copy_page() 2128 ms_set_err_code(chip, MS_NO_ERROR); ms_copy_page() 2129 retval = ms_read_bytes(chip, GET_INT, 1, ms_copy_page() 2132 rtsx_trace(chip); ms_copy_page() 2137 ms_set_err_code(chip, MS_CMD_NK); ms_copy_page() 2138 rtsx_trace(chip); ms_copy_page() 2144 ms_set_err_code(chip, ms_copy_page() 2146 rtsx_trace(chip); ms_copy_page() 2157 static int reset_ms(struct rtsx_chip *chip) reset_ms() argument 2159 struct ms_info *ms_card = &(chip->ms_card); reset_ms() 2167 retval = ms_prepare_reset(chip); reset_ms() 2169 rtsx_trace(chip); reset_ms() 2175 retval = ms_send_cmd(chip, MS_RESET, NO_WAIT_INT); reset_ms() 2177 rtsx_trace(chip); reset_ms() 2181 retval = ms_read_status_reg(chip); reset_ms() 2183 rtsx_trace(chip); reset_ms() 2187 retval = rtsx_read_register(chip, PPBUF_BASE2, &val); reset_ms() 2189 rtsx_trace(chip); reset_ms() 2193 chip->card_wp |= MS_CARD; reset_ms() 2195 chip->card_wp &= ~MS_CARD; reset_ms() 2202 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) { reset_ms() 2203 ms_set_err_code(chip, MS_NO_CARD); reset_ms() 2204 rtsx_trace(chip); reset_ms() 2208 retval = ms_read_extra_data(chip, i, 0, extra, MS_EXTRA_SIZE); reset_ms() 2224 dev_dbg(rtsx_dev(chip), "No boot block found!"); reset_ms() 2225 rtsx_trace(chip); reset_ms() 2230 retval = ms_read_page(chip, ms_card->boot_block, j); reset_ms() 2232 if (ms_check_err_code(chip, MS_FLASH_WRITE_ERROR)) { reset_ms() 2234 ms_set_err_code(chip, MS_NO_ERROR); reset_ms() 2240 retval = ms_read_page(chip, ms_card->boot_block, 0); reset_ms() 2242 rtsx_trace(chip); reset_ms() 2247 rtsx_init_cmd(chip); reset_ms() 2250 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + 0x1A0 + i, 0, 0); reset_ms() 2252 retval = rtsx_send_cmd(chip, MS_CARD, 100); reset_ms() 2254 rtsx_trace(chip); reset_ms() 2258 ptr = rtsx_get_cmd_data(chip); reset_ms() 2262 rtsx_init_cmd(chip); reset_ms() 2264 rtsx_add_cmd(chip, READ_REG_CMD, HEADER_ID0, 0, 0); reset_ms() 2265 rtsx_add_cmd(chip, READ_REG_CMD, HEADER_ID1, 0, 0); reset_ms() 2269 rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0, 0); reset_ms() 2272 rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0, 0); reset_ms() 2274 rtsx_add_cmd(chip, READ_REG_CMD, MS_Device_Type, 0, 0); reset_ms() 2275 rtsx_add_cmd(chip, READ_REG_CMD, MS_4bit_Support, 0, 0); reset_ms() 2277 retval = rtsx_send_cmd(chip, MS_CARD, 100); reset_ms() 2279 rtsx_trace(chip); reset_ms() 2283 ptr = rtsx_get_cmd_data(chip); reset_ms() 2285 dev_dbg(rtsx_dev(chip), "Boot block data:\n"); reset_ms() 2286 dev_dbg(rtsx_dev(chip), "%*ph\n", 16, ptr); reset_ms() 2305 chip->card_wp |= MS_CARD; reset_ms() 2349 chip->capacity[chip->card2lun[MS_CARD]] = ms_card->capacity; reset_ms() 2353 retval = ms_set_rw_reg_addr(chip, 0, 0, SystemParm, 1); reset_ms() 2355 rtsx_trace(chip); reset_ms() 2359 retval = rtsx_write_register(chip, PPBUF_BASE2, 0xFF, 0x88); reset_ms() 2361 rtsx_trace(chip); reset_ms() 2364 retval = rtsx_write_register(chip, PPBUF_BASE2 + 1, 0xFF, 0); reset_ms() 2366 rtsx_trace(chip); reset_ms() 2370 retval = ms_transfer_tpc(chip, MS_TM_WRITE_BYTES, WRITE_REG, 1, reset_ms() 2373 rtsx_trace(chip); reset_ms() 2377 retval = rtsx_write_register(chip, MS_CFG, reset_ms() 2381 rtsx_trace(chip); reset_ms() 2389 chip->card_bus_width[chip->card2lun[MS_CARD]] = 4; reset_ms() 2391 chip->card_bus_width[chip->card2lun[MS_CARD]] = 1; reset_ms() 2396 static int ms_init_l2p_tbl(struct rtsx_chip *chip) ms_init_l2p_tbl() argument 2398 struct ms_info *ms_card = &(chip->ms_card); ms_init_l2p_tbl() 2404 dev_dbg(rtsx_dev(chip), "ms_card->segment_cnt = %d\n", ms_init_l2p_tbl() 2410 rtsx_trace(chip); ms_init_l2p_tbl() 2414 retval = ms_read_page(chip, ms_card->boot_block, 1); ms_init_l2p_tbl() 2416 rtsx_trace(chip); ms_init_l2p_tbl() 2424 retval = rtsx_read_register(chip, reg_addr++, &val1); ms_init_l2p_tbl() 2426 rtsx_trace(chip); ms_init_l2p_tbl() 2430 retval = rtsx_read_register(chip, reg_addr++, &val2); ms_init_l2p_tbl() 2432 rtsx_trace(chip); ms_init_l2p_tbl() 2454 dev_dbg(rtsx_dev(chip), "defective block count of segment %d is %d\n", ms_init_l2p_tbl() 2469 static u16 ms_get_l2p_tbl(struct rtsx_chip *chip, int seg_no, u16 log_off) ms_get_l2p_tbl() argument 2471 struct ms_info *ms_card = &(chip->ms_card); ms_get_l2p_tbl() 2485 static void ms_set_l2p_tbl(struct rtsx_chip *chip, ms_set_l2p_tbl() argument 2488 struct ms_info *ms_card = &(chip->ms_card); ms_set_l2p_tbl() 2499 static void ms_set_unused_block(struct rtsx_chip *chip, u16 phy_blk) ms_set_unused_block() argument 2501 struct ms_info *ms_card = &(chip->ms_card); ms_set_unused_block() 2515 static u16 ms_get_unused_block(struct rtsx_chip *chip, int seg_no) ms_get_unused_block() argument 2517 struct ms_info *ms_card = &(chip->ms_card); ms_get_unused_block() 2541 static int ms_arbitrate_l2p(struct rtsx_chip *chip, u16 phy_blk, ms_arbitrate_l2p() argument 2544 struct ms_info *ms_card = &(chip->ms_card); ms_arbitrate_l2p() 2555 if (!(chip->card_wp & MS_CARD)) ms_arbitrate_l2p() 2556 ms_erase_block(chip, tmp_blk); ms_arbitrate_l2p() 2558 ms_set_unused_block(chip, tmp_blk); ms_arbitrate_l2p() 2561 if (!(chip->card_wp & MS_CARD)) ms_arbitrate_l2p() 2562 ms_erase_block(chip, phy_blk); ms_arbitrate_l2p() 2564 ms_set_unused_block(chip, phy_blk); ms_arbitrate_l2p() 2568 if (!(chip->card_wp & MS_CARD)) ms_arbitrate_l2p() 2569 ms_erase_block(chip, phy_blk); ms_arbitrate_l2p() 2571 ms_set_unused_block(chip, phy_blk); ms_arbitrate_l2p() 2573 if (!(chip->card_wp & MS_CARD)) ms_arbitrate_l2p() 2574 ms_erase_block(chip, tmp_blk); ms_arbitrate_l2p() 2576 ms_set_unused_block(chip, tmp_blk); ms_arbitrate_l2p() 2584 static int ms_build_l2p_tbl(struct rtsx_chip *chip, int seg_no) ms_build_l2p_tbl() argument 2586 struct ms_info *ms_card = &(chip->ms_card); ms_build_l2p_tbl() 2593 dev_dbg(rtsx_dev(chip), "ms_build_l2p_tbl: %d\n", seg_no); ms_build_l2p_tbl() 2596 retval = ms_init_l2p_tbl(chip); ms_build_l2p_tbl() 2598 rtsx_trace(chip); ms_build_l2p_tbl() 2604 dev_dbg(rtsx_dev(chip), "l2p table of segment %d has been built\n", ms_build_l2p_tbl() 2619 rtsx_trace(chip); ms_build_l2p_tbl() 2628 rtsx_trace(chip); ms_build_l2p_tbl() 2657 retval = ms_read_extra_data(chip, phy_blk, 0, ms_build_l2p_tbl() 2660 dev_dbg(rtsx_dev(chip), "read extra data fail\n"); ms_build_l2p_tbl() 2661 ms_set_bad_block(chip, phy_blk); ms_build_l2p_tbl() 2667 if (!(chip->card_wp & MS_CARD)) { ms_build_l2p_tbl() 2668 retval = ms_erase_block(chip, phy_blk); ms_build_l2p_tbl() 2687 if (!(chip->card_wp & MS_CARD)) { ms_build_l2p_tbl() 2688 retval = ms_erase_block(chip, phy_blk); ms_build_l2p_tbl() 2692 ms_set_unused_block(chip, phy_blk); ms_build_l2p_tbl() 2698 if (!(chip->card_wp & MS_CARD)) { ms_build_l2p_tbl() 2699 retval = ms_erase_block(chip, phy_blk); ms_build_l2p_tbl() 2703 ms_set_unused_block(chip, phy_blk); ms_build_l2p_tbl() 2716 retval = ms_read_extra_data(chip, tmp_blk, 0, ms_build_l2p_tbl() 2722 (void)ms_arbitrate_l2p(chip, phy_blk, ms_build_l2p_tbl() 2729 dev_dbg(rtsx_dev(chip), "unused block count: %d\n", ms_build_l2p_tbl() 2735 chip->card_wp |= MS_CARD; ms_build_l2p_tbl() 2738 chip->card_wp |= MS_CARD; ms_build_l2p_tbl() 2741 if (chip->card_wp & MS_CARD) ms_build_l2p_tbl() 2748 phy_blk = ms_get_unused_block(chip, seg_no); ms_build_l2p_tbl() 2750 chip->card_wp |= MS_CARD; ms_build_l2p_tbl() 2753 retval = ms_init_page(chip, phy_blk, log_blk, 0, 1); ms_build_l2p_tbl() 2755 rtsx_trace(chip); ms_build_l2p_tbl() 2762 chip->card_wp |= MS_CARD; ms_build_l2p_tbl() 2767 chip->card_wp |= MS_CARD; ms_build_l2p_tbl() 2779 dev_dbg(rtsx_dev(chip), "Boot block is not the first normal block.\n"); ms_build_l2p_tbl() 2781 if (chip->card_wp & MS_CARD) ms_build_l2p_tbl() 2784 phy_blk = ms_get_unused_block(chip, 0); ms_build_l2p_tbl() 2785 retval = ms_copy_page(chip, tmp_blk, phy_blk, ms_build_l2p_tbl() 2788 rtsx_trace(chip); ms_build_l2p_tbl() 2794 retval = ms_set_bad_block(chip, tmp_blk); ms_build_l2p_tbl() 2796 rtsx_trace(chip); ms_build_l2p_tbl() 2820 int reset_ms_card(struct rtsx_chip *chip) reset_ms_card() argument 2822 struct ms_info *ms_card = &(chip->ms_card); reset_ms_card() 2827 retval = enable_card_clock(chip, MS_CARD); reset_ms_card() 2829 rtsx_trace(chip); reset_ms_card() 2833 retval = select_card(chip, MS_CARD); reset_ms_card() 2835 rtsx_trace(chip); reset_ms_card() 2841 retval = reset_ms_pro(chip); reset_ms_card() 2844 retval = reset_ms(chip); reset_ms_card() 2846 rtsx_trace(chip); reset_ms_card() 2850 rtsx_trace(chip); reset_ms_card() 2855 retval = ms_set_init_para(chip); reset_ms_card() 2857 rtsx_trace(chip); reset_ms_card() 2865 retval = ms_build_l2p_tbl(chip, ms_card->total_block / 512 - 1); reset_ms_card() 2867 rtsx_trace(chip); reset_ms_card() 2872 dev_dbg(rtsx_dev(chip), "ms_card->ms_type = 0x%x\n", ms_card->ms_type); reset_ms_card() 2877 static int mspro_set_rw_cmd(struct rtsx_chip *chip, mspro_set_rw_cmd() argument 2893 retval = ms_write_bytes(chip, PRO_EX_SET_CMD, 7, mspro_set_rw_cmd() 2899 rtsx_trace(chip); mspro_set_rw_cmd() 2907 void mspro_stop_seq_mode(struct rtsx_chip *chip) mspro_stop_seq_mode() argument 2909 struct ms_info *ms_card = &(chip->ms_card); mspro_stop_seq_mode() 2913 retval = ms_switch_clock(chip); mspro_stop_seq_mode() 2919 ms_send_cmd(chip, PRO_STOP, WAIT_INT); mspro_stop_seq_mode() 2921 rtsx_write_register(chip, RBCTL, RB_FLUSH, RB_FLUSH); mspro_stop_seq_mode() 2925 static inline int ms_auto_tune_clock(struct rtsx_chip *chip) ms_auto_tune_clock() argument 2927 struct ms_info *ms_card = &(chip->ms_card); ms_auto_tune_clock() 2930 if (chip->asic_code) { ms_auto_tune_clock() 2940 retval = ms_switch_clock(chip); ms_auto_tune_clock() 2942 rtsx_trace(chip); ms_auto_tune_clock() 2950 struct rtsx_chip *chip, u32 start_sector, mspro_rw_multi_sector() 2953 struct ms_info *ms_card = &(chip->ms_card); mspro_rw_multi_sector() 2959 ms_set_err_code(chip, MS_NO_ERROR); mspro_rw_multi_sector() 2992 retval = ms_switch_clock(chip); mspro_rw_multi_sector() 2994 rtsx_trace(chip); mspro_rw_multi_sector() 3003 retval = rtsx_read_register(chip, MS_TRANS_CFG, &val); mspro_rw_multi_sector() 3005 rtsx_trace(chip); mspro_rw_multi_sector() 3019 retval = ms_send_cmd(chip, PRO_STOP, WAIT_INT); mspro_rw_multi_sector() 3021 rtsx_trace(chip); mspro_rw_multi_sector() 3025 rtsx_write_register(chip, RBCTL, RB_FLUSH, RB_FLUSH); mspro_rw_multi_sector() 3047 retval = mspro_set_rw_cmd(chip, start_sector, count, rw_cmd); mspro_rw_multi_sector() 3050 rtsx_trace(chip); mspro_rw_multi_sector() 3055 retval = ms_transfer_data(chip, trans_mode, rw_tpc, sector_cnt, mspro_rw_multi_sector() 3060 rtsx_read_register(chip, MS_TRANS_CFG, &val); mspro_rw_multi_sector() 3061 rtsx_clear_ms_error(chip); mspro_rw_multi_sector() 3063 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) { mspro_rw_multi_sector() 3064 chip->rw_need_retry = 0; mspro_rw_multi_sector() 3065 dev_dbg(rtsx_dev(chip), "No card exist, exit mspro_rw_multi_sector\n"); mspro_rw_multi_sector() 3066 rtsx_trace(chip); mspro_rw_multi_sector() 3071 ms_send_cmd(chip, PRO_STOP, WAIT_INT); mspro_rw_multi_sector() 3074 dev_dbg(rtsx_dev(chip), "MSPro CRC error, tune clock!\n"); mspro_rw_multi_sector() 3075 chip->rw_need_retry = 1; mspro_rw_multi_sector() 3076 ms_auto_tune_clock(chip); mspro_rw_multi_sector() 3079 rtsx_trace(chip); mspro_rw_multi_sector() 3093 static int mspro_read_format_progress(struct rtsx_chip *chip, mspro_read_format_progress() argument 3096 struct ms_info *ms_card = &(chip->ms_card); mspro_read_format_progress() 3102 dev_dbg(rtsx_dev(chip), "mspro_read_format_progress, short_data_len = %d\n", mspro_read_format_progress() 3105 retval = ms_switch_clock(chip); mspro_read_format_progress() 3108 rtsx_trace(chip); mspro_read_format_progress() 3112 retval = rtsx_read_register(chip, MS_TRANS_CFG, &tmp); mspro_read_format_progress() 3115 rtsx_trace(chip); mspro_read_format_progress() 3125 rtsx_trace(chip); mspro_read_format_progress() 3134 retval = rtsx_write_register(chip, MS_CFG, MS_NO_CHECK_INT, mspro_read_format_progress() 3138 rtsx_trace(chip); mspro_read_format_progress() 3142 retval = ms_read_bytes(chip, PRO_READ_SHORT_DATA, cnt, WAIT_INT, mspro_read_format_progress() 3146 rtsx_trace(chip); mspro_read_format_progress() 3155 dev_dbg(rtsx_dev(chip), "total_progress = %d, cur_progress = %d\n", mspro_read_format_progress() 3166 dev_dbg(rtsx_dev(chip), "progress = %d\n", ms_card->progress); mspro_read_format_progress() 3169 retval = rtsx_read_register(chip, MS_TRANS_CFG, &tmp); mspro_read_format_progress() 3172 rtsx_trace(chip); mspro_read_format_progress() 3182 retval = rtsx_write_register(chip, MS_CFG, MS_NO_CHECK_INT, 0); mspro_read_format_progress() 3185 rtsx_trace(chip); mspro_read_format_progress() 3191 rtsx_trace(chip); mspro_read_format_progress() 3197 rtsx_trace(chip); mspro_read_format_progress() 3209 rtsx_trace(chip); mspro_read_format_progress() 3216 void mspro_polling_format_status(struct rtsx_chip *chip) mspro_polling_format_status() argument 3218 struct ms_info *ms_card = &(chip->ms_card); mspro_polling_format_status() 3222 (rtsx_get_stat(chip) != RTSX_STAT_SS)) { mspro_polling_format_status() 3223 rtsx_set_stat(chip, RTSX_STAT_RUN); mspro_polling_format_status() 3226 mspro_read_format_progress(chip, MS_SHORT_DATA_LEN); mspro_polling_format_status() 3233 int mspro_format(struct scsi_cmnd *srb, struct rtsx_chip *chip, mspro_format() argument 3236 struct ms_info *ms_card = &(chip->ms_card); mspro_format() 3241 retval = ms_switch_clock(chip); mspro_format() 3243 rtsx_trace(chip); mspro_format() 3247 retval = ms_set_rw_reg_addr(chip, 0x00, 0x00, Pro_TPCParm, 0x01); mspro_format() 3249 rtsx_trace(chip); mspro_format() 3271 retval = ms_write_bytes(chip, PRO_WRITE_REG, 1, mspro_format() 3277 rtsx_trace(chip); mspro_format() 3286 retval = mspro_set_rw_cmd(chip, 0, para, PRO_FORMAT); mspro_format() 3288 rtsx_trace(chip); mspro_format() 3292 retval = rtsx_read_register(chip, MS_TRANS_CFG, &tmp); mspro_format() 3294 rtsx_trace(chip); mspro_format() 3299 rtsx_trace(chip); mspro_format() 3314 set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_NO_SENSE); mspro_format() 3318 rtsx_trace(chip); mspro_format() 3323 static int ms_read_multiple_pages(struct rtsx_chip *chip, u16 phy_blk, ms_read_multiple_pages() argument 3328 struct ms_info *ms_card = &(chip->ms_card); ms_read_multiple_pages() 3333 retval = ms_read_extra_data(chip, phy_blk, start_page, ms_read_multiple_pages() 3337 ms_set_err_code(chip, MS_FLASH_READ_ERROR); ms_read_multiple_pages() 3338 rtsx_trace(chip); ms_read_multiple_pages() 3343 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE, ms_read_multiple_pages() 3346 rtsx_trace(chip); ms_read_multiple_pages() 3362 retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT, ms_read_multiple_pages() 3368 rtsx_trace(chip); ms_read_multiple_pages() 3372 ms_set_err_code(chip, MS_NO_ERROR); ms_read_multiple_pages() 3374 retval = ms_send_cmd(chip, BLOCK_READ, WAIT_INT); ms_read_multiple_pages() 3376 rtsx_trace(chip); ms_read_multiple_pages() 3383 ms_set_err_code(chip, MS_NO_ERROR); ms_read_multiple_pages() 3385 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) { ms_read_multiple_pages() 3386 ms_set_err_code(chip, MS_NO_CARD); ms_read_multiple_pages() 3387 rtsx_trace(chip); ms_read_multiple_pages() 3391 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1); ms_read_multiple_pages() 3393 rtsx_trace(chip); ms_read_multiple_pages() 3398 ms_set_err_code(chip, MS_CMD_NK); ms_read_multiple_pages() 3399 rtsx_trace(chip); ms_read_multiple_pages() 3404 retval = ms_read_status_reg(chip); ms_read_multiple_pages() 3406 if (!(chip->card_wp & MS_CARD)) { ms_read_multiple_pages() 3407 reset_ms(chip); ms_read_multiple_pages() 3409 ms_write_extra_data(chip, phy_blk, ms_read_multiple_pages() 3412 ms_set_err_code(chip, MS_FLASH_READ_ERROR); ms_read_multiple_pages() 3413 rtsx_trace(chip); ms_read_multiple_pages() 3417 ms_set_err_code(chip, MS_FLASH_READ_ERROR); ms_read_multiple_pages() 3418 rtsx_trace(chip); ms_read_multiple_pages() 3423 ms_set_err_code(chip, MS_BREQ_ERROR); ms_read_multiple_pages() 3424 rtsx_trace(chip); ms_read_multiple_pages() 3431 retval = ms_send_cmd(chip, BLOCK_END, WAIT_INT); ms_read_multiple_pages() 3433 rtsx_trace(chip); ms_read_multiple_pages() 3438 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, ms_read_multiple_pages() 3441 rtsx_trace(chip); ms_read_multiple_pages() 3446 ms_set_err_code(chip, MS_FLASH_READ_ERROR); ms_read_multiple_pages() 3447 rtsx_trace(chip); ms_read_multiple_pages() 3456 rtsx_init_cmd(chip); ms_read_multiple_pages() 3458 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, READ_PAGE_DATA); ms_read_multiple_pages() 3459 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, ms_read_multiple_pages() 3461 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, ms_read_multiple_pages() 3464 trans_dma_enable(DMA_FROM_DEVICE, chip, 512, DMA_512); ms_read_multiple_pages() 3466 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF, ms_read_multiple_pages() 3468 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER, ms_read_multiple_pages() 3471 rtsx_send_cmd_no_wait(chip); ms_read_multiple_pages() 3473 retval = rtsx_transfer_data_partial(chip, MS_CARD, ptr, ms_read_multiple_pages() 3474 512, scsi_sg_count(chip->srb), ms_read_multiple_pages() 3476 chip->ms_timeout); ms_read_multiple_pages() 3479 ms_set_err_code(chip, MS_TO_ERROR); ms_read_multiple_pages() 3480 rtsx_clear_ms_error(chip); ms_read_multiple_pages() 3481 rtsx_trace(chip); ms_read_multiple_pages() 3485 retval = rtsx_read_register(chip, MS_TRANS_CFG, &val); ms_read_multiple_pages() 3487 ms_set_err_code(chip, MS_TO_ERROR); ms_read_multiple_pages() 3488 rtsx_clear_ms_error(chip); ms_read_multiple_pages() 3489 rtsx_trace(chip); ms_read_multiple_pages() 3493 ms_set_err_code(chip, MS_CRC16_ERROR); ms_read_multiple_pages() 3494 rtsx_clear_ms_error(chip); ms_read_multiple_pages() 3495 rtsx_trace(chip); ms_read_multiple_pages() 3500 if (scsi_sg_count(chip->srb) == 0) ms_read_multiple_pages() 3507 static int ms_write_multiple_pages(struct rtsx_chip *chip, u16 old_blk, ms_write_multiple_pages() argument 3512 struct ms_info *ms_card = &(chip->ms_card); ms_write_multiple_pages() 3518 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE, ms_write_multiple_pages() 3521 rtsx_trace(chip); ms_write_multiple_pages() 3538 retval = ms_write_bytes(chip, WRITE_REG, 7, NO_WAIT_INT, ms_write_multiple_pages() 3541 rtsx_trace(chip); ms_write_multiple_pages() 3545 retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT); ms_write_multiple_pages() 3547 rtsx_trace(chip); ms_write_multiple_pages() 3551 ms_set_err_code(chip, MS_NO_ERROR); ms_write_multiple_pages() 3552 retval = ms_transfer_tpc(chip, MS_TM_READ_BYTES, GET_INT, 1, ms_write_multiple_pages() 3555 rtsx_trace(chip); ms_write_multiple_pages() 3560 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE, ms_write_multiple_pages() 3563 rtsx_trace(chip); ms_write_multiple_pages() 3567 ms_set_err_code(chip, MS_NO_ERROR); ms_write_multiple_pages() 3592 retval = ms_write_bytes(chip, WRITE_REG, 6 + MS_EXTRA_SIZE, ms_write_multiple_pages() 3598 rtsx_trace(chip); ms_write_multiple_pages() 3603 retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT); ms_write_multiple_pages() 3608 rtsx_trace(chip); ms_write_multiple_pages() 3612 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1); ms_write_multiple_pages() 3614 rtsx_trace(chip); ms_write_multiple_pages() 3620 ms_set_err_code(chip, MS_NO_ERROR); ms_write_multiple_pages() 3622 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) { ms_write_multiple_pages() 3623 ms_set_err_code(chip, MS_NO_CARD); ms_write_multiple_pages() 3624 rtsx_trace(chip); ms_write_multiple_pages() 3629 ms_set_err_code(chip, MS_CMD_NK); ms_write_multiple_pages() 3630 rtsx_trace(chip); ms_write_multiple_pages() 3634 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR); ms_write_multiple_pages() 3635 rtsx_trace(chip); ms_write_multiple_pages() 3639 ms_set_err_code(chip, MS_BREQ_ERROR); ms_write_multiple_pages() 3640 rtsx_trace(chip); ms_write_multiple_pages() 3646 rtsx_init_cmd(chip); ms_write_multiple_pages() 3648 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, ms_write_multiple_pages() 3650 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, ms_write_multiple_pages() 3652 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, ms_write_multiple_pages() 3655 trans_dma_enable(DMA_TO_DEVICE, chip, 512, DMA_512); ms_write_multiple_pages() 3657 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF, ms_write_multiple_pages() 3659 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER, ms_write_multiple_pages() 3662 rtsx_send_cmd_no_wait(chip); ms_write_multiple_pages() 3664 retval = rtsx_transfer_data_partial(chip, MS_CARD, ptr, ms_write_multiple_pages() 3665 512, scsi_sg_count(chip->srb), ms_write_multiple_pages() 3667 chip->ms_timeout); ms_write_multiple_pages() 3669 ms_set_err_code(chip, MS_TO_ERROR); ms_write_multiple_pages() 3670 rtsx_clear_ms_error(chip); ms_write_multiple_pages() 3673 rtsx_trace(chip); ms_write_multiple_pages() 3676 rtsx_trace(chip); ms_write_multiple_pages() 3680 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1); ms_write_multiple_pages() 3682 rtsx_trace(chip); ms_write_multiple_pages() 3688 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR); ms_write_multiple_pages() 3689 rtsx_trace(chip); ms_write_multiple_pages() 3695 retval = ms_send_cmd(chip, BLOCK_END, ms_write_multiple_pages() 3698 rtsx_trace(chip); ms_write_multiple_pages() 3703 retval = ms_read_bytes(chip, GET_INT, 1, ms_write_multiple_pages() 3706 rtsx_trace(chip); ms_write_multiple_pages() 3714 ms_set_err_code(chip, ms_write_multiple_pages() 3716 rtsx_trace(chip); ms_write_multiple_pages() 3722 if (scsi_sg_count(chip->srb) == 0) ms_write_multiple_pages() 3730 static int ms_finish_write(struct rtsx_chip *chip, u16 old_blk, u16 new_blk, ms_finish_write() argument 3733 struct ms_info *ms_card = &(chip->ms_card); ms_finish_write() 3736 retval = ms_copy_page(chip, old_blk, new_blk, log_blk, ms_finish_write() 3739 rtsx_trace(chip); ms_finish_write() 3747 ms_set_bad_block(chip, old_blk); ms_finish_write() 3749 retval = ms_erase_block(chip, old_blk); ms_finish_write() 3751 ms_set_unused_block(chip, old_blk); ms_finish_write() 3754 ms_set_l2p_tbl(chip, seg_no, log_blk - ms_start_idx[seg_no], new_blk); ms_finish_write() 3759 static int ms_prepare_write(struct rtsx_chip *chip, u16 old_blk, u16 new_blk, ms_prepare_write() argument 3765 retval = ms_copy_page(chip, old_blk, new_blk, log_blk, ms_prepare_write() 3768 rtsx_trace(chip); ms_prepare_write() 3777 int ms_delay_write(struct rtsx_chip *chip) ms_delay_write() argument 3779 struct ms_info *ms_card = &(chip->ms_card); ms_delay_write() 3784 retval = ms_set_init_para(chip); ms_delay_write() 3786 rtsx_trace(chip); ms_delay_write() 3791 retval = ms_finish_write(chip, ms_delay_write() 3797 rtsx_trace(chip); ms_delay_write() 3806 static inline void ms_rw_fail(struct scsi_cmnd *srb, struct rtsx_chip *chip) ms_rw_fail() argument 3809 set_sense_type(chip, SCSI_LUN(srb), ms_rw_fail() 3812 set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_MEDIA_WRITE_ERR); ms_rw_fail() 3815 static int ms_rw_multi_sector(struct scsi_cmnd *srb, struct rtsx_chip *chip, ms_rw_multi_sector() argument 3818 struct ms_info *ms_card = &(chip->ms_card); ms_rw_multi_sector() 3829 ms_set_err_code(chip, MS_NO_ERROR); ms_rw_multi_sector() 3835 retval = ms_switch_clock(chip); ms_rw_multi_sector() 3837 ms_rw_fail(srb, chip); ms_rw_multi_sector() 3838 rtsx_trace(chip); ms_rw_multi_sector() 3851 retval = ms_build_l2p_tbl(chip, seg_no); ms_rw_multi_sector() 3853 chip->card_fail |= MS_CARD; ms_rw_multi_sector() 3854 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT); ms_rw_multi_sector() 3855 rtsx_trace(chip); ms_rw_multi_sector() 3866 retval = ms_copy_page(chip, ms_rw_multi_sector() 3871 set_sense_type(chip, lun, ms_rw_multi_sector() 3873 rtsx_trace(chip); ms_rw_multi_sector() 3885 retval = ms_delay_write(chip); ms_rw_multi_sector() 3887 set_sense_type(chip, lun, ms_rw_multi_sector() 3889 rtsx_trace(chip); ms_rw_multi_sector() 3893 old_blk = ms_get_l2p_tbl(chip, seg_no, ms_rw_multi_sector() 3895 new_blk = ms_get_unused_block(chip, seg_no); ms_rw_multi_sector() 3897 set_sense_type(chip, lun, ms_rw_multi_sector() 3899 rtsx_trace(chip); ms_rw_multi_sector() 3903 retval = ms_prepare_write(chip, old_blk, new_blk, ms_rw_multi_sector() 3906 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) { ms_rw_multi_sector() 3907 set_sense_type(chip, lun, ms_rw_multi_sector() 3909 rtsx_trace(chip); ms_rw_multi_sector() 3912 set_sense_type(chip, lun, ms_rw_multi_sector() 3914 rtsx_trace(chip); ms_rw_multi_sector() 3922 retval = ms_delay_write(chip); ms_rw_multi_sector() 3924 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) { ms_rw_multi_sector() 3925 set_sense_type(chip, lun, ms_rw_multi_sector() 3927 rtsx_trace(chip); ms_rw_multi_sector() 3930 set_sense_type(chip, lun, ms_rw_multi_sector() 3932 rtsx_trace(chip); ms_rw_multi_sector() 3936 old_blk = ms_get_l2p_tbl(chip, seg_no, ms_rw_multi_sector() 3939 set_sense_type(chip, lun, ms_rw_multi_sector() 3941 rtsx_trace(chip); ms_rw_multi_sector() 3946 dev_dbg(rtsx_dev(chip), "seg_no = %d, old_blk = 0x%x, new_blk = 0x%x\n", ms_rw_multi_sector() 3957 dev_dbg(rtsx_dev(chip), "start_page = %d, end_page = %d, page_cnt = %d\n", ms_rw_multi_sector() 3961 retval = ms_read_multiple_pages(chip, ms_rw_multi_sector() 3965 retval = ms_write_multiple_pages(chip, old_blk, ms_rw_multi_sector() 3971 toggle_gpio(chip, 1); ms_rw_multi_sector() 3972 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) { ms_rw_multi_sector() 3973 set_sense_type(chip, lun, ms_rw_multi_sector() 3975 rtsx_trace(chip); ms_rw_multi_sector() 3978 ms_rw_fail(srb, chip); ms_rw_multi_sector() 3979 rtsx_trace(chip); ms_rw_multi_sector() 3985 retval = ms_erase_block(chip, old_blk); ms_rw_multi_sector() 3987 ms_set_unused_block(chip, old_blk); ms_rw_multi_sector() 3989 ms_set_l2p_tbl(chip, seg_no, ms_rw_multi_sector() 4011 retval = ms_build_l2p_tbl(chip, seg_no); ms_rw_multi_sector() 4013 chip->card_fail |= MS_CARD; ms_rw_multi_sector() 4014 set_sense_type(chip, lun, ms_rw_multi_sector() 4016 rtsx_trace(chip); ms_rw_multi_sector() 4021 old_blk = ms_get_l2p_tbl(chip, seg_no, ms_rw_multi_sector() 4024 ms_rw_fail(srb, chip); ms_rw_multi_sector() 4025 rtsx_trace(chip); ms_rw_multi_sector() 4030 new_blk = ms_get_unused_block(chip, seg_no); ms_rw_multi_sector() 4032 ms_rw_fail(srb, chip); ms_rw_multi_sector() 4033 rtsx_trace(chip); ms_rw_multi_sector() 4038 dev_dbg(rtsx_dev(chip), "seg_no = %d, old_blk = 0x%x, new_blk = 0x%x\n", ms_rw_multi_sector() 4053 retval = ms_finish_write(chip, old_blk, new_blk, ms_rw_multi_sector() 4056 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) { ms_rw_multi_sector() 4057 set_sense_type(chip, lun, ms_rw_multi_sector() 4059 rtsx_trace(chip); ms_rw_multi_sector() 4063 ms_rw_fail(srb, chip); ms_rw_multi_sector() 4064 rtsx_trace(chip); ms_rw_multi_sector() 4076 int ms_rw(struct scsi_cmnd *srb, struct rtsx_chip *chip, ms_rw() argument 4079 struct ms_info *ms_card = &(chip->ms_card); ms_rw() 4083 retval = mspro_rw_multi_sector(srb, chip, start_sector, ms_rw() 4086 retval = ms_rw_multi_sector(srb, chip, start_sector, ms_rw() 4093 void ms_free_l2p_tbl(struct rtsx_chip *chip) ms_free_l2p_tbl() argument 4095 struct ms_info *ms_card = &(chip->ms_card); ms_free_l2p_tbl() 4117 static int ms_poll_int(struct rtsx_chip *chip) ms_poll_int() argument 4122 rtsx_init_cmd(chip); ms_poll_int() 4124 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANS_CFG, MS_INT_CED, MS_INT_CED); ms_poll_int() 4126 retval = rtsx_send_cmd(chip, MS_CARD, 5000); ms_poll_int() 4128 rtsx_trace(chip); ms_poll_int() 4132 val = *rtsx_get_cmd_data(chip); ms_poll_int() 4134 rtsx_trace(chip); ms_poll_int() 4143 static int check_ms_err(struct rtsx_chip *chip) check_ms_err() argument 4148 retval = rtsx_read_register(chip, MS_TRANSFER, &val); check_ms_err() 4154 retval = rtsx_read_register(chip, MS_TRANS_CFG, &val); check_ms_err() 4164 static int check_ms_err(struct rtsx_chip *chip) check_ms_err() argument 4169 retval = rtsx_read_register(chip, MS_TRANSFER, &val); check_ms_err() 4179 static int mg_send_ex_cmd(struct rtsx_chip *chip, u8 cmd, u8 entry_num) mg_send_ex_cmd() argument 4194 retval = ms_write_bytes(chip, PRO_EX_SET_CMD, 7, WAIT_INT, mg_send_ex_cmd() 4200 rtsx_trace(chip); mg_send_ex_cmd() 4204 if (check_ms_err(chip)) { mg_send_ex_cmd() 4205 rtsx_clear_ms_error(chip); mg_send_ex_cmd() 4206 rtsx_trace(chip); mg_send_ex_cmd() 4213 static int mg_set_tpc_para_sub(struct rtsx_chip *chip, int type, mg_set_tpc_para_sub() argument 4220 retval = ms_set_rw_reg_addr(chip, 0, 0, Pro_TPCParm, 1); mg_set_tpc_para_sub() 4222 retval = ms_set_rw_reg_addr(chip, 0, 0, Pro_DataCount1, 6); mg_set_tpc_para_sub() 4225 rtsx_trace(chip); mg_set_tpc_para_sub() 4237 retval = ms_write_bytes(chip, PRO_WRITE_REG, (type == 0) ? 1 : 6, mg_set_tpc_para_sub() 4240 rtsx_trace(chip); mg_set_tpc_para_sub() 4247 int mg_set_leaf_id(struct scsi_cmnd *srb, struct rtsx_chip *chip) mg_set_leaf_id() argument 4255 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD); mg_set_leaf_id() 4256 rtsx_trace(chip); mg_set_leaf_id() 4260 ms_cleanup_work(chip); mg_set_leaf_id() 4262 retval = ms_switch_clock(chip); mg_set_leaf_id() 4264 rtsx_trace(chip); mg_set_leaf_id() 4268 retval = mg_send_ex_cmd(chip, MG_SET_LID, 0); mg_set_leaf_id() 4270 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB); mg_set_leaf_id() 4271 rtsx_trace(chip); mg_set_leaf_id() 4280 retval = ms_write_bytes(chip, PRO_WRITE_SHORT_DATA, 32, WAIT_INT, mg_set_leaf_id() 4283 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB); mg_set_leaf_id() 4284 rtsx_trace(chip); mg_set_leaf_id() 4287 if (check_ms_err(chip)) { mg_set_leaf_id() 4288 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB); mg_set_leaf_id() 4289 rtsx_clear_ms_error(chip); mg_set_leaf_id() 4290 rtsx_trace(chip); mg_set_leaf_id() 4297 int mg_get_local_EKB(struct scsi_cmnd *srb, struct rtsx_chip *chip) mg_get_local_EKB() argument 4304 ms_cleanup_work(chip); mg_get_local_EKB() 4306 retval = ms_switch_clock(chip); mg_get_local_EKB() 4308 rtsx_trace(chip); mg_get_local_EKB() 4314 rtsx_trace(chip); mg_get_local_EKB() 4323 retval = mg_send_ex_cmd(chip, MG_GET_LEKB, 0); mg_get_local_EKB() 4325 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN); mg_get_local_EKB() 4326 rtsx_trace(chip); mg_get_local_EKB() 4330 retval = ms_transfer_data(chip, MS_TM_AUTO_READ, PRO_READ_LONG_DATA, mg_get_local_EKB() 4333 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN); mg_get_local_EKB() 4334 rtsx_clear_ms_error(chip); mg_get_local_EKB() 4335 rtsx_trace(chip); mg_get_local_EKB() 4338 if (check_ms_err(chip)) { mg_get_local_EKB() 4339 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN); mg_get_local_EKB() 4340 rtsx_clear_ms_error(chip); mg_get_local_EKB() 4341 rtsx_trace(chip); mg_get_local_EKB() 4353 int mg_chg(struct scsi_cmnd *srb, struct rtsx_chip *chip) mg_chg() argument 4355 struct ms_info *ms_card = &(chip->ms_card); mg_chg() 4362 ms_cleanup_work(chip); mg_chg() 4364 retval = ms_switch_clock(chip); mg_chg() 4366 rtsx_trace(chip); mg_chg() 4370 retval = mg_send_ex_cmd(chip, MG_GET_ID, 0); mg_chg() 4372 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM); mg_chg() 4373 rtsx_trace(chip); mg_chg() 4377 retval = ms_read_bytes(chip, PRO_READ_SHORT_DATA, 32, WAIT_INT, mg_chg() 4380 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM); mg_chg() 4381 rtsx_trace(chip); mg_chg() 4384 if (check_ms_err(chip)) { mg_chg() 4385 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM); mg_chg() 4386 rtsx_clear_ms_error(chip); mg_chg() 4387 rtsx_trace(chip); mg_chg() 4394 retval = ms_poll_int(chip); mg_chg() 4396 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM); mg_chg() 4397 rtsx_trace(chip); mg_chg() 4402 retval = mg_send_ex_cmd(chip, MG_SET_RD, 0); mg_chg() 4404 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM); mg_chg() 4405 rtsx_trace(chip); mg_chg() 4418 retval = ms_write_bytes(chip, PRO_WRITE_SHORT_DATA, mg_chg() 4421 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM); mg_chg() 4422 rtsx_trace(chip); mg_chg() 4425 if (check_ms_err(chip)) { mg_chg() 4426 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM); mg_chg() 4427 rtsx_clear_ms_error(chip); mg_chg() 4428 rtsx_trace(chip); mg_chg() 4437 int mg_get_rsp_chg(struct scsi_cmnd *srb, struct rtsx_chip *chip) mg_get_rsp_chg() argument 4439 struct ms_info *ms_card = &(chip->ms_card); mg_get_rsp_chg() 4445 ms_cleanup_work(chip); mg_get_rsp_chg() 4447 retval = ms_switch_clock(chip); mg_get_rsp_chg() 4449 rtsx_trace(chip); mg_get_rsp_chg() 4453 retval = mg_send_ex_cmd(chip, MG_MAKE_RMS, 0); mg_get_rsp_chg() 4455 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN); mg_get_rsp_chg() 4456 rtsx_trace(chip); mg_get_rsp_chg() 4460 retval = ms_read_bytes(chip, PRO_READ_SHORT_DATA, 32, WAIT_INT, mg_get_rsp_chg() 4463 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN); mg_get_rsp_chg() 4464 rtsx_trace(chip); mg_get_rsp_chg() 4467 if (check_ms_err(chip)) { mg_get_rsp_chg() 4468 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN); mg_get_rsp_chg() 4469 rtsx_clear_ms_error(chip); mg_get_rsp_chg() 4470 rtsx_trace(chip); mg_get_rsp_chg() 4486 retval = ms_poll_int(chip); mg_get_rsp_chg() 4488 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN); mg_get_rsp_chg() 4489 rtsx_trace(chip); mg_get_rsp_chg() 4497 int mg_rsp(struct scsi_cmnd *srb, struct rtsx_chip *chip) mg_rsp() argument 4499 struct ms_info *ms_card = &(chip->ms_card); mg_rsp() 4506 ms_cleanup_work(chip); mg_rsp() 4508 retval = ms_switch_clock(chip); mg_rsp() 4510 rtsx_trace(chip); mg_rsp() 4514 retval = mg_send_ex_cmd(chip, MG_MAKE_KSE, 0); mg_rsp() 4516 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN); mg_rsp() 4517 rtsx_trace(chip); mg_rsp() 4530 retval = ms_write_bytes(chip, PRO_WRITE_SHORT_DATA, 32, WAIT_INT, mg_rsp() 4533 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN); mg_rsp() 4534 rtsx_trace(chip); mg_rsp() 4537 if (check_ms_err(chip)) { mg_rsp() 4538 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN); mg_rsp() 4539 rtsx_clear_ms_error(chip); mg_rsp() 4540 rtsx_trace(chip); mg_rsp() 4549 int mg_get_ICV(struct scsi_cmnd *srb, struct rtsx_chip *chip) mg_get_ICV() argument 4551 struct ms_info *ms_card = &(chip->ms_card); mg_get_ICV() 4557 ms_cleanup_work(chip); mg_get_ICV() 4559 retval = ms_switch_clock(chip); mg_get_ICV() 4561 rtsx_trace(chip); mg_get_ICV() 4567 rtsx_trace(chip); mg_get_ICV() 4576 retval = mg_send_ex_cmd(chip, MG_GET_IBD, ms_card->mg_entry_num); mg_get_ICV() 4578 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR); mg_get_ICV() 4579 rtsx_trace(chip); mg_get_ICV() 4583 retval = ms_transfer_data(chip, MS_TM_AUTO_READ, PRO_READ_LONG_DATA, mg_get_ICV() 4586 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR); mg_get_ICV() 4587 rtsx_clear_ms_error(chip); mg_get_ICV() 4588 rtsx_trace(chip); mg_get_ICV() 4591 if (check_ms_err(chip)) { mg_get_ICV() 4592 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR); mg_get_ICV() 4593 rtsx_clear_ms_error(chip); mg_get_ICV() 4594 rtsx_trace(chip); mg_get_ICV() 4606 int mg_set_ICV(struct scsi_cmnd *srb, struct rtsx_chip *chip) mg_set_ICV() argument 4608 struct ms_info *ms_card = &(chip->ms_card); mg_set_ICV() 4617 ms_cleanup_work(chip); mg_set_ICV() 4619 retval = ms_switch_clock(chip); mg_set_ICV() 4621 rtsx_trace(chip); mg_set_ICV() 4627 rtsx_trace(chip); mg_set_ICV() 4634 retval = mg_send_ex_cmd(chip, MG_SET_IBD, ms_card->mg_entry_num); mg_set_ICV() 4638 set_sense_type(chip, lun, mg_set_ICV() 4641 set_sense_type(chip, lun, mg_set_ICV() 4644 set_sense_type(chip, lun, SENSE_TYPE_MG_WRITE_ERR); mg_set_ICV() 4646 rtsx_trace(chip); mg_set_ICV() 4654 rtsx_init_cmd(chip); mg_set_ICV() 4656 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, mg_set_ICV() 4658 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, WAIT_INT); mg_set_ICV() 4659 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, mg_set_ICV() 4662 trans_dma_enable(DMA_TO_DEVICE, chip, 512, DMA_512); mg_set_ICV() 4664 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF, mg_set_ICV() 4666 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER, mg_set_ICV() 4669 rtsx_send_cmd_no_wait(chip); mg_set_ICV() 4671 retval = rtsx_transfer_data(chip, MS_CARD, buf + 4 + i*512, mg_set_ICV() 4673 if ((retval < 0) || check_ms_err(chip)) { mg_set_ICV() 4674 rtsx_clear_ms_error(chip); mg_set_ICV() 4677 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB); mg_set_ICV() 4679 set_sense_type(chip, lun, mg_set_ICV() 4682 set_sense_type(chip, lun, mg_set_ICV() 4686 rtsx_trace(chip); mg_set_ICV() 4691 retval = ms_transfer_data(chip, MS_TM_AUTO_WRITE, PRO_WRITE_LONG_DATA, mg_set_ICV() 4693 if ((retval != STATUS_SUCCESS) || check_ms_err(chip)) { mg_set_ICV() 4694 rtsx_clear_ms_error(chip); mg_set_ICV() 4697 set_sense_type(chip, lun, mg_set_ICV() 4700 set_sense_type(chip, lun, mg_set_ICV() 4703 set_sense_type(chip, lun, SENSE_TYPE_MG_WRITE_ERR); mg_set_ICV() 4705 rtsx_trace(chip); mg_set_ICV() 4717 void ms_cleanup_work(struct rtsx_chip *chip) ms_cleanup_work() argument 4719 struct ms_info *ms_card = &(chip->ms_card); ms_cleanup_work() 4723 dev_dbg(rtsx_dev(chip), "MS Pro: stop transmission\n"); ms_cleanup_work() 4724 mspro_stop_seq_mode(chip); ms_cleanup_work() 4728 rtsx_write_register(chip, MS_CFG, ms_cleanup_work() 4734 dev_dbg(rtsx_dev(chip), "MS: delay write\n"); ms_cleanup_work() 4735 ms_delay_write(chip); ms_cleanup_work() 4741 int ms_power_off_card3v3(struct rtsx_chip *chip) ms_power_off_card3v3() argument 4745 retval = disable_card_clock(chip, MS_CARD); ms_power_off_card3v3() 4747 rtsx_trace(chip); ms_power_off_card3v3() 4751 if (chip->asic_code) { ms_power_off_card3v3() 4752 retval = ms_pull_ctl_disable(chip); ms_power_off_card3v3() 4754 rtsx_trace(chip); ms_power_off_card3v3() 4758 retval = rtsx_write_register(chip, FPGA_PULL_CTL, ms_power_off_card3v3() 4762 rtsx_trace(chip); ms_power_off_card3v3() 4766 retval = rtsx_write_register(chip, CARD_OE, MS_OUTPUT_EN, 0); ms_power_off_card3v3() 4768 rtsx_trace(chip); ms_power_off_card3v3() 4771 if (!chip->ft2_fast_mode) { ms_power_off_card3v3() 4772 retval = card_power_off(chip, MS_CARD); ms_power_off_card3v3() 4774 rtsx_trace(chip); ms_power_off_card3v3() 4782 int release_ms_card(struct rtsx_chip *chip) release_ms_card() argument 4784 struct ms_info *ms_card = &(chip->ms_card); release_ms_card() 4792 chip->card_ready &= ~MS_CARD; release_ms_card() 4793 chip->card_fail &= ~MS_CARD; release_ms_card() 4794 chip->card_wp &= ~MS_CARD; release_ms_card() 4796 ms_free_l2p_tbl(chip); release_ms_card() 4803 retval = ms_power_off_card3v3(chip); release_ms_card() 4805 rtsx_trace(chip); release_ms_card() 2949 mspro_rw_multi_sector(struct scsi_cmnd *srb, struct rtsx_chip *chip, u32 start_sector, u16 sector_cnt) mspro_rw_multi_sector() argument
H A D	trace.c	8 void _rtsx_trace(struct rtsx_chip *chip, const char *file, const char *func, _rtsx_trace() argument 11 struct trace_msg_t *msg = &chip->trace_msg[chip->msg_idx]; _rtsx_trace() 14 dev_dbg(rtsx_dev(chip), "[%s][%s]:[%d]\n", file, func, line); _rtsx_trace() 22 chip->msg_idx++; _rtsx_trace() 23 if (chip->msg_idx >= TRACE_ITEM_CNT) _rtsx_trace() 24 chip->msg_idx = 0; _rtsx_trace()
H A D	sd.c	57 static inline void sd_set_err_code(struct rtsx_chip *chip, u8 err_code) sd_set_err_code() argument 59 struct sd_info *sd_card = &(chip->sd_card); sd_set_err_code() 64 static inline void sd_clr_err_code(struct rtsx_chip *chip) sd_clr_err_code() argument 66 struct sd_info *sd_card = &(chip->sd_card); sd_clr_err_code() 71 static inline int sd_check_err_code(struct rtsx_chip *chip, u8 err_code) sd_check_err_code() argument 73 struct sd_info *sd_card = &(chip->sd_card); sd_check_err_code() 78 static void sd_init_reg_addr(struct rtsx_chip *chip) sd_init_reg_addr() argument 106 static int sd_check_data0_status(struct rtsx_chip *chip) sd_check_data0_status() argument 111 retval = rtsx_read_register(chip, REG_SD_STAT1, &stat); sd_check_data0_status() 113 rtsx_trace(chip); sd_check_data0_status() 118 sd_set_err_code(chip, SD_BUSY); sd_check_data0_status() 119 rtsx_trace(chip); sd_check_data0_status() 126 static int sd_send_cmd_get_rsp(struct rtsx_chip *chip, u8 cmd_idx, sd_send_cmd_get_rsp() argument 129 struct sd_info *sd_card = &(chip->sd_card); sd_send_cmd_get_rsp() 137 sd_clr_err_code(chip); sd_send_cmd_get_rsp() 139 dev_dbg(rtsx_dev(chip), "SD/MMC CMD %d, arg = 0x%08x\n", cmd_idx, arg); sd_send_cmd_get_rsp() 146 rtsx_init_cmd(chip); sd_send_cmd_get_rsp() 148 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD0, 0xFF, 0x40 | cmd_idx); sd_send_cmd_get_rsp() 149 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD1, 0xFF, (u8)(arg >> 24)); sd_send_cmd_get_rsp() 150 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD2, 0xFF, (u8)(arg >> 16)); sd_send_cmd_get_rsp() 151 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD3, 0xFF, (u8)(arg >> 8)); sd_send_cmd_get_rsp() 152 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD4, 0xFF, (u8)arg); sd_send_cmd_get_rsp() 154 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG2, 0xFF, rsp_type); sd_send_cmd_get_rsp() 155 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, sd_send_cmd_get_rsp() 157 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_TRANSFER, sd_send_cmd_get_rsp() 159 rtsx_add_cmd(chip, CHECK_REG_CMD, REG_SD_TRANSFER, sd_send_cmd_get_rsp() 165 rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0, 0); sd_send_cmd_get_rsp() 171 rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0, 0); sd_send_cmd_get_rsp() 176 rtsx_add_cmd(chip, READ_REG_CMD, REG_SD_STAT1, 0, 0); sd_send_cmd_get_rsp() 178 retval = rtsx_send_cmd(chip, SD_CARD, timeout); sd_send_cmd_get_rsp() 182 rtsx_read_register(chip, REG_SD_STAT1, &val); sd_send_cmd_get_rsp() 183 dev_dbg(rtsx_dev(chip), "SD_STAT1: 0x%x\n", val); sd_send_cmd_get_rsp() 185 rtsx_read_register(chip, REG_SD_CFG3, &val); sd_send_cmd_get_rsp() 186 dev_dbg(rtsx_dev(chip), "SD_CFG3: 0x%x\n", val); sd_send_cmd_get_rsp() 190 retval = sd_check_data0_status(chip); sd_send_cmd_get_rsp() 192 rtsx_clear_sd_error(chip); sd_send_cmd_get_rsp() 193 rtsx_trace(chip); sd_send_cmd_get_rsp() 197 sd_set_err_code(chip, SD_TO_ERR); sd_send_cmd_get_rsp() 203 rtsx_clear_sd_error(chip); sd_send_cmd_get_rsp() 205 rtsx_trace(chip); sd_send_cmd_get_rsp() 212 ptr = rtsx_get_cmd_data(chip) + 1; sd_send_cmd_get_rsp() 215 sd_set_err_code(chip, SD_STS_ERR); sd_send_cmd_get_rsp() 216 rtsx_trace(chip); sd_send_cmd_get_rsp() 223 sd_set_err_code(chip, SD_CRC_ERR); sd_send_cmd_get_rsp() 224 rtsx_trace(chip); sd_send_cmd_get_rsp() 232 sd_set_err_code(chip, SD_CRC_ERR); sd_send_cmd_get_rsp() 233 rtsx_trace(chip); sd_send_cmd_get_rsp() 244 rtsx_trace(chip); sd_send_cmd_get_rsp() 254 dev_dbg(rtsx_dev(chip), "ptr[1]: 0x%02x\n", sd_send_cmd_get_rsp() 256 rtsx_trace(chip); sd_send_cmd_get_rsp() 260 dev_dbg(rtsx_dev(chip), "ptr[2]: 0x%02x\n", sd_send_cmd_get_rsp() 262 rtsx_trace(chip); sd_send_cmd_get_rsp() 266 dev_dbg(rtsx_dev(chip), "ptr[3]: 0x%02x\n", sd_send_cmd_get_rsp() 268 rtsx_trace(chip); sd_send_cmd_get_rsp() 284 static int sd_read_data(struct rtsx_chip *chip, sd_read_data() argument 289 struct sd_info *sd_card = &(chip->sd_card); sd_read_data() 293 sd_clr_err_code(chip); sd_read_data() 299 rtsx_trace(chip); sd_read_data() 303 rtsx_init_cmd(chip); sd_read_data() 306 dev_dbg(rtsx_dev(chip), "SD/MMC CMD %d\n", cmd[0] - 0x40); sd_read_data() 308 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD0 + i, sd_read_data() 311 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_L, 0xFF, sd_read_data() 313 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_H, 0xFF, sd_read_data() 315 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BLOCK_CNT_L, 0xFF, sd_read_data() 317 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BLOCK_CNT_H, 0xFF, sd_read_data() 320 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG1, 0x03, bus_width); sd_read_data() 322 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG2, 0xFF, sd_read_data() 326 rtsx_add_cmd(chip, WRITE_REG_CMD, sd_read_data() 329 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_TRANSFER, 0xFF, sd_read_data() 331 rtsx_add_cmd(chip, CHECK_REG_CMD, REG_SD_TRANSFER, SD_TRANSFER_END, sd_read_data() 334 retval = rtsx_send_cmd(chip, SD_CARD, timeout); sd_read_data() 337 sd_send_cmd_get_rsp(chip, SEND_STATUS, sd_card->sd_addr, sd_read_data() 341 rtsx_trace(chip); sd_read_data() 346 retval = rtsx_read_ppbuf(chip, buf, buf_len); sd_read_data() 348 rtsx_trace(chip); sd_read_data() 356 static int sd_write_data(struct rtsx_chip *chip, u8 trans_mode, sd_write_data() argument 360 struct sd_info *sd_card = &(chip->sd_card); sd_write_data() 364 sd_clr_err_code(chip); sd_write_data() 371 rtsx_trace(chip); sd_write_data() 376 retval = rtsx_write_ppbuf(chip, buf, buf_len); sd_write_data() 378 rtsx_trace(chip); sd_write_data() 383 rtsx_init_cmd(chip); sd_write_data() 386 dev_dbg(rtsx_dev(chip), "SD/MMC CMD %d\n", cmd[0] - 0x40); sd_write_data() 388 rtsx_add_cmd(chip, WRITE_REG_CMD, sd_write_data() 392 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_L, 0xFF, sd_write_data() 394 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_H, 0xFF, sd_write_data() 396 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BLOCK_CNT_L, 0xFF, sd_write_data() 398 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BLOCK_CNT_H, 0xFF, sd_write_data() 401 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG1, 0x03, bus_width); sd_write_data() 403 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG2, 0xFF, sd_write_data() 407 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_TRANSFER, 0xFF, sd_write_data() 409 rtsx_add_cmd(chip, CHECK_REG_CMD, REG_SD_TRANSFER, SD_TRANSFER_END, sd_write_data() 412 retval = rtsx_send_cmd(chip, SD_CARD, timeout); sd_write_data() 415 sd_send_cmd_get_rsp(chip, SEND_STATUS, sd_write_data() 419 rtsx_trace(chip); sd_write_data() 426 static int sd_check_csd(struct rtsx_chip *chip, char check_wp) sd_check_csd() argument 428 struct sd_info *sd_card = &(chip->sd_card); sd_check_csd() 435 if (detect_card_cd(chip, SD_CARD) != STATUS_SUCCESS) { sd_check_csd() 436 sd_set_err_code(chip, SD_NO_CARD); sd_check_csd() 437 rtsx_trace(chip); sd_check_csd() 441 retval = sd_send_cmd_get_rsp(chip, SEND_CSD, sd_card->sd_addr, sd_check_csd() 448 rtsx_trace(chip); sd_check_csd() 454 dev_dbg(rtsx_dev(chip), "CSD Response:\n"); sd_check_csd() 455 dev_dbg(rtsx_dev(chip), "%*ph\n", 16, sd_card->raw_csd); sd_check_csd() 458 dev_dbg(rtsx_dev(chip), "csd_ver = %d\n", csd_ver); sd_check_csd() 463 if (chip->asic_code) sd_check_csd() 469 if (chip->asic_code) sd_check_csd() 475 if (chip->asic_code) sd_check_csd() 481 if (chip->asic_code) sd_check_csd() 487 if (chip->asic_code) sd_check_csd() 492 rtsx_trace(chip); sd_check_csd() 496 rtsx_trace(chip); sd_check_csd() 527 chip->card_wp |= SD_CARD; sd_check_csd() 529 dev_dbg(rtsx_dev(chip), "CSD WP Status: 0x%x\n", rsp[15]); sd_check_csd() 535 static int sd_set_sample_push_timing(struct rtsx_chip *chip) sd_set_sample_push_timing() argument 538 struct sd_info *sd_card = &(chip->sd_card); sd_set_sample_push_timing() 541 if ((chip->sd_ctl & SD_PUSH_POINT_CTL_MASK) == SD_PUSH_POINT_DELAY) sd_set_sample_push_timing() 544 if ((chip->sd_ctl & SD_SAMPLE_POINT_CTL_MASK) == SD_SAMPLE_POINT_AUTO) { sd_set_sample_push_timing() 545 if (chip->asic_code) { sd_set_sample_push_timing() 558 } else if ((chip->sd_ctl & SD_SAMPLE_POINT_CTL_MASK) == sd_set_sample_push_timing() 566 retval = rtsx_write_register(chip, REG_SD_CFG1, 0x1C, val); sd_set_sample_push_timing() 568 rtsx_trace(chip); sd_set_sample_push_timing() 575 static void sd_choose_proper_clock(struct rtsx_chip *chip) sd_choose_proper_clock() argument 577 struct sd_info *sd_card = &(chip->sd_card); sd_choose_proper_clock() 580 if (chip->asic_code) sd_choose_proper_clock() 581 sd_card->sd_clock = chip->asic_sd_sdr104_clk; sd_choose_proper_clock() 583 sd_card->sd_clock = chip->fpga_sd_sdr104_clk; sd_choose_proper_clock() 586 if (chip->asic_code) sd_choose_proper_clock() 587 sd_card->sd_clock = chip->asic_sd_ddr50_clk; sd_choose_proper_clock() 589 sd_card->sd_clock = chip->fpga_sd_ddr50_clk; sd_choose_proper_clock() 592 if (chip->asic_code) sd_choose_proper_clock() 593 sd_card->sd_clock = chip->asic_sd_sdr50_clk; sd_choose_proper_clock() 595 sd_card->sd_clock = chip->fpga_sd_sdr50_clk; sd_choose_proper_clock() 598 if (chip->asic_code) sd_choose_proper_clock() 599 sd_card->sd_clock = chip->asic_sd_hs_clk; sd_choose_proper_clock() 601 sd_card->sd_clock = chip->fpga_sd_hs_clk; sd_choose_proper_clock() 604 if (chip->asic_code) sd_choose_proper_clock() 605 sd_card->sd_clock = chip->asic_mmc_52m_clk; sd_choose_proper_clock() 607 sd_card->sd_clock = chip->fpga_mmc_52m_clk; sd_choose_proper_clock() 610 if (chip->asic_code) sd_choose_proper_clock() 617 static int sd_set_clock_divider(struct rtsx_chip *chip, u8 clk_div) sd_set_clock_divider() argument 630 retval = rtsx_write_register(chip, REG_SD_CFG1, mask, val); sd_set_clock_divider() 632 rtsx_trace(chip); sd_set_clock_divider() 639 static int sd_set_init_para(struct rtsx_chip *chip) sd_set_init_para() argument 641 struct sd_info *sd_card = &(chip->sd_card); sd_set_init_para() 644 retval = sd_set_sample_push_timing(chip); sd_set_init_para() 646 rtsx_trace(chip); sd_set_init_para() 650 sd_choose_proper_clock(chip); sd_set_init_para() 652 retval = switch_clock(chip, sd_card->sd_clock); sd_set_init_para() 654 rtsx_trace(chip); sd_set_init_para() 661 int sd_select_card(struct rtsx_chip *chip, int select) sd_select_card() argument 663 struct sd_info *sd_card = &(chip->sd_card); sd_select_card() 678 retval = sd_send_cmd_get_rsp(chip, cmd_idx, addr, cmd_type, NULL, 0); sd_select_card() 680 rtsx_trace(chip); sd_select_card() 688 static int sd_update_lock_status(struct rtsx_chip *chip) sd_update_lock_status() argument 690 struct sd_info *sd_card = &(chip->sd_card); sd_update_lock_status() 694 retval = sd_send_cmd_get_rsp(chip, SEND_STATUS, sd_card->sd_addr, sd_update_lock_status() 697 rtsx_trace(chip); sd_update_lock_status() 706 dev_dbg(rtsx_dev(chip), "sd_card->sd_lock_status = 0x%x\n", sd_update_lock_status() 710 rtsx_trace(chip); sd_update_lock_status() 718 static int sd_wait_state_data_ready(struct rtsx_chip *chip, u8 state, sd_wait_state_data_ready() argument 721 struct sd_info *sd_card = &(chip->sd_card); sd_wait_state_data_ready() 726 retval = sd_send_cmd_get_rsp(chip, SEND_STATUS, sd_wait_state_data_ready() 730 rtsx_trace(chip); sd_wait_state_data_ready() 739 rtsx_trace(chip); sd_wait_state_data_ready() 743 static int sd_change_bank_voltage(struct rtsx_chip *chip, u8 voltage) sd_change_bank_voltage() argument 748 if (chip->asic_code) { sd_change_bank_voltage() 749 retval = rtsx_write_phy_register(chip, 0x08, sd_change_bank_voltage() 751 chip->phy_voltage); sd_change_bank_voltage() 753 rtsx_trace(chip); sd_change_bank_voltage() 757 retval = rtsx_write_register(chip, SD_PAD_CTL, sd_change_bank_voltage() 760 rtsx_trace(chip); sd_change_bank_voltage() 765 if (chip->asic_code) { sd_change_bank_voltage() 766 retval = rtsx_write_phy_register(chip, 0x08, sd_change_bank_voltage() 768 chip->phy_voltage); sd_change_bank_voltage() 770 rtsx_trace(chip); sd_change_bank_voltage() 774 retval = rtsx_write_register(chip, SD_PAD_CTL, sd_change_bank_voltage() 778 rtsx_trace(chip); sd_change_bank_voltage() 783 rtsx_trace(chip); sd_change_bank_voltage() 790 static int sd_voltage_switch(struct rtsx_chip *chip) sd_voltage_switch() argument 795 retval = rtsx_write_register(chip, SD_BUS_STAT, sd_voltage_switch() 799 rtsx_trace(chip); sd_voltage_switch() 803 retval = sd_send_cmd_get_rsp(chip, VOLTAGE_SWITCH, 0, SD_RSP_TYPE_R1, sd_voltage_switch() 806 rtsx_trace(chip); sd_voltage_switch() 810 udelay(chip->sd_voltage_switch_delay); sd_voltage_switch() 812 retval = rtsx_read_register(chip, SD_BUS_STAT, &stat); sd_voltage_switch() 814 rtsx_trace(chip); sd_voltage_switch() 819 rtsx_trace(chip); sd_voltage_switch() 823 retval = rtsx_write_register(chip, SD_BUS_STAT, 0xFF, sd_voltage_switch() 826 rtsx_trace(chip); sd_voltage_switch() 829 retval = sd_change_bank_voltage(chip, SD_IO_1V8); sd_voltage_switch() 831 rtsx_trace(chip); sd_voltage_switch() 837 retval = rtsx_write_register(chip, SD_BUS_STAT, 0xFF, sd_voltage_switch() 840 rtsx_trace(chip); sd_voltage_switch() 845 retval = rtsx_read_register(chip, SD_BUS_STAT, &stat); sd_voltage_switch() 847 rtsx_trace(chip); sd_voltage_switch() 854 dev_dbg(rtsx_dev(chip), "SD_BUS_STAT: 0x%x\n", stat); sd_voltage_switch() 855 rtsx_write_register(chip, SD_BUS_STAT, sd_voltage_switch() 857 rtsx_write_register(chip, CARD_CLK_EN, 0xFF, 0); sd_voltage_switch() 858 rtsx_trace(chip); sd_voltage_switch() 862 retval = rtsx_write_register(chip, SD_BUS_STAT, sd_voltage_switch() 865 rtsx_trace(chip); sd_voltage_switch() 872 static int sd_reset_dcm(struct rtsx_chip *chip, u8 tune_dir) sd_reset_dcm() argument 877 retval = rtsx_write_register(chip, DCM_DRP_CTL, 0xFF, sd_reset_dcm() 880 rtsx_trace(chip); sd_reset_dcm() 883 retval = rtsx_write_register(chip, DCM_DRP_CTL, 0xFF, DCM_RX); sd_reset_dcm() 885 rtsx_trace(chip); sd_reset_dcm() 889 retval = rtsx_write_register(chip, DCM_DRP_CTL, 0xFF, sd_reset_dcm() 892 rtsx_trace(chip); sd_reset_dcm() 895 retval = rtsx_write_register(chip, DCM_DRP_CTL, 0xFF, DCM_TX); sd_reset_dcm() 897 rtsx_trace(chip); sd_reset_dcm() 905 static int sd_change_phase(struct rtsx_chip *chip, u8 sample_point, u8 tune_dir) sd_change_phase() argument 907 struct sd_info *sd_card = &(chip->sd_card); sd_change_phase() 913 dev_dbg(rtsx_dev(chip), "sd_change_phase (sample_point = %d, tune_dir = %d)\n", sd_change_phase() 926 if (chip->asic_code) { sd_change_phase() 927 retval = rtsx_write_register(chip, CLK_CTL, CHANGE_CLK, sd_change_phase() 930 rtsx_trace(chip); sd_change_phase() 933 retval = rtsx_write_register(chip, SD_VP_CTL, 0x1F, sd_change_phase() 936 rtsx_trace(chip); sd_change_phase() 939 retval = rtsx_write_register(chip, SD_VPCLK0_CTL, sd_change_phase() 942 rtsx_trace(chip); sd_change_phase() 945 retval = rtsx_write_register(chip, SD_VPCLK0_CTL, sd_change_phase() 948 rtsx_trace(chip); sd_change_phase() 951 retval = rtsx_write_register(chip, CLK_CTL, CHANGE_CLK, 0); sd_change_phase() 953 rtsx_trace(chip); sd_change_phase() 957 rtsx_read_register(chip, SD_VP_CTL, &val); sd_change_phase() 958 dev_dbg(rtsx_dev(chip), "SD_VP_CTL: 0x%x\n", val); sd_change_phase() 959 rtsx_read_register(chip, SD_DCMPS_CTL, &val); sd_change_phase() 960 dev_dbg(rtsx_dev(chip), "SD_DCMPS_CTL: 0x%x\n", val); sd_change_phase() 963 retval = rtsx_write_register(chip, SD_VP_CTL, sd_change_phase() 967 rtsx_trace(chip); sd_change_phase() 971 retval = rtsx_write_register(chip, SD_VP_CTL, 0xFF, sd_change_phase() 974 rtsx_trace(chip); sd_change_phase() 978 retval = rtsx_write_register(chip, CLK_CTL, sd_change_phase() 981 rtsx_trace(chip); sd_change_phase() 985 retval = rtsx_write_register(chip, SD_VP_CTL, 0xFF, sd_change_phase() 988 rtsx_trace(chip); sd_change_phase() 994 rtsx_init_cmd(chip); sd_change_phase() 995 rtsx_add_cmd(chip, WRITE_REG_CMD, SD_DCMPS_CTL, DCMPS_CHANGE, sd_change_phase() 997 rtsx_add_cmd(chip, CHECK_REG_CMD, SD_DCMPS_CTL, sd_change_phase() 999 retval = rtsx_send_cmd(chip, SD_CARD, 100); sd_change_phase() 1001 rtsx_trace(chip); sd_change_phase() 1005 val = *rtsx_get_cmd_data(chip); sd_change_phase() 1007 rtsx_trace(chip); sd_change_phase() 1012 rtsx_trace(chip); sd_change_phase() 1016 retval = rtsx_write_register(chip, SD_DCMPS_CTL, sd_change_phase() 1019 rtsx_trace(chip); sd_change_phase() 1023 retval = rtsx_write_register(chip, SD_VP_CTL, sd_change_phase() 1026 rtsx_trace(chip); sd_change_phase() 1030 retval = rtsx_write_register(chip, CLK_CTL, sd_change_phase() 1033 rtsx_trace(chip); sd_change_phase() 1041 retval = rtsx_write_register(chip, SD_CFG1, SD_ASYNC_FIFO_NOT_RST, 0); sd_change_phase() 1043 rtsx_trace(chip); sd_change_phase() 1050 rtsx_read_register(chip, SD_VP_CTL, &val); sd_change_phase() 1051 dev_dbg(rtsx_dev(chip), "SD_VP_CTL: 0x%x\n", val); sd_change_phase() 1052 rtsx_read_register(chip, SD_DCMPS_CTL, &val); sd_change_phase() 1053 dev_dbg(rtsx_dev(chip), "SD_DCMPS_CTL: 0x%x\n", val); sd_change_phase() 1055 rtsx_write_register(chip, SD_DCMPS_CTL, DCMPS_CHANGE, 0); sd_change_phase() 1056 rtsx_write_register(chip, SD_VP_CTL, PHASE_CHANGE, 0); sd_change_phase() 1058 sd_reset_dcm(chip, tune_dir); sd_change_phase() 1062 static int sd_check_spec(struct rtsx_chip *chip, u8 bus_width) sd_check_spec() argument 1064 struct sd_info *sd_card = &(chip->sd_card); sd_check_spec() 1068 retval = sd_send_cmd_get_rsp(chip, APP_CMD, sd_card->sd_addr, sd_check_spec() 1071 rtsx_trace(chip); sd_check_spec() 1081 retval = sd_read_data(chip, SD_TM_NORMAL_READ, cmd, 5, 8, 1, bus_width, sd_check_spec() 1084 rtsx_clear_sd_error(chip); sd_check_spec() 1085 rtsx_trace(chip); sd_check_spec() 1092 rtsx_trace(chip); sd_check_spec() 1099 static int sd_query_switch_result(struct rtsx_chip *chip, u8 func_group, sd_query_switch_result() argument 1136 rtsx_trace(chip); sd_query_switch_result() 1164 rtsx_trace(chip); sd_query_switch_result() 1192 rtsx_trace(chip); sd_query_switch_result() 1196 rtsx_trace(chip); sd_query_switch_result() 1203 rtsx_trace(chip); sd_query_switch_result() 1211 rtsx_trace(chip); sd_query_switch_result() 1218 static int sd_check_switch_mode(struct rtsx_chip *chip, u8 mode, sd_check_switch_mode() argument 1221 struct sd_info *sd_card = &(chip->sd_card); sd_check_switch_mode() 1225 dev_dbg(rtsx_dev(chip), "sd_check_switch_mode (mode = %d, func_group = %d, func_to_switch = %d)\n", sd_check_switch_mode() 1250 retval = sd_read_data(chip, SD_TM_NORMAL_READ, cmd, 5, 64, 1, bus_width, sd_check_switch_mode() 1253 rtsx_clear_sd_error(chip); sd_check_switch_mode() 1254 rtsx_trace(chip); sd_check_switch_mode() 1258 dev_dbg(rtsx_dev(chip), "%*ph\n", 64, buf); sd_check_switch_mode() 1266 dev_dbg(rtsx_dev(chip), "func_group1_mask = 0x%02x\n", sd_check_switch_mode() 1268 dev_dbg(rtsx_dev(chip), "func_group2_mask = 0x%02x\n", sd_check_switch_mode() 1270 dev_dbg(rtsx_dev(chip), "func_group3_mask = 0x%02x\n", sd_check_switch_mode() 1272 dev_dbg(rtsx_dev(chip), "func_group4_mask = 0x%02x\n", sd_check_switch_mode() 1280 dev_dbg(rtsx_dev(chip), "Maximum current consumption: %dmA\n", sd_check_switch_mode() 1283 rtsx_trace(chip); sd_check_switch_mode() 1287 retval = sd_query_switch_result(chip, func_group, sd_check_switch_mode() 1290 rtsx_trace(chip); sd_check_switch_mode() 1295 retval = rtsx_write_register(chip, OCPPARA2, sd_check_switch_mode() 1297 chip->sd_800mA_ocp_thd); sd_check_switch_mode() 1299 rtsx_trace(chip); sd_check_switch_mode() 1302 retval = rtsx_write_register(chip, CARD_PWR_CTL, sd_check_switch_mode() 1306 rtsx_trace(chip); sd_check_switch_mode() 1329 static int sd_check_switch(struct rtsx_chip *chip, sd_check_switch() argument 1337 if (detect_card_cd(chip, SD_CARD) != STATUS_SUCCESS) { sd_check_switch() 1338 sd_set_err_code(chip, SD_NO_CARD); sd_check_switch() 1339 rtsx_trace(chip); sd_check_switch() 1343 retval = sd_check_switch_mode(chip, SD_CHECK_MODE, func_group, sd_check_switch() 1348 retval = sd_check_switch_mode(chip, SD_SWITCH_MODE, sd_check_switch() 1355 retval = rtsx_read_register(chip, SD_STAT1, &stat); sd_check_switch() 1357 rtsx_trace(chip); sd_check_switch() 1361 dev_dbg(rtsx_dev(chip), "SD CRC16 error when switching mode\n"); sd_check_switch() 1362 rtsx_trace(chip); sd_check_switch() 1374 rtsx_trace(chip); sd_check_switch() 1381 static int sd_switch_function(struct rtsx_chip *chip, u8 bus_width) sd_switch_function() argument 1383 struct sd_info *sd_card = &(chip->sd_card); sd_switch_function() 1389 retval = sd_check_switch_mode(chip, SD_CHECK_MODE, sd_switch_function() 1392 rtsx_trace(chip); sd_switch_function() 1400 switch ((u8)(chip->sd_speed_prior >> (i*8))) { sd_switch_function() 1403 && chip->sdr104_en) { sd_switch_function() 1410 && chip->ddr50_en) { sd_switch_function() 1417 && chip->sdr50_en) { sd_switch_function() 1437 dev_dbg(rtsx_dev(chip), "SD_FUNC_GROUP_1: func_to_switch = 0x%02x", sd_switch_function() 1445 dev_dbg(rtsx_dev(chip), "Using SDR50 instead of DDR50 for SD Lock\n"); sd_switch_function() 1450 retval = sd_check_switch(chip, SD_FUNC_GROUP_1, func_to_switch, sd_switch_function() 1462 rtsx_trace(chip); sd_switch_function() 1477 retval = rtsx_write_register(chip, SD_PUSH_POINT_CTL, 0x06, sd_switch_function() 1480 rtsx_trace(chip); sd_switch_function() 1483 retval = sd_set_sample_push_timing(chip); sd_switch_function() 1485 rtsx_trace(chip); sd_switch_function() 1501 switch ((u8)(chip->sd_current_prior >> (i*8))) { sd_switch_function() 1534 dev_dbg(rtsx_dev(chip), "SD_FUNC_GROUP_4: func_to_switch = 0x%02x", sd_switch_function() 1538 retval = sd_check_switch(chip, SD_FUNC_GROUP_4, func_to_switch, sd_switch_function() 1541 if (sd_check_err_code(chip, SD_NO_CARD)) { sd_switch_function() 1542 rtsx_trace(chip); sd_switch_function() 1546 dev_dbg(rtsx_dev(chip), "Switch current limit finished! (%d)\n", sd_switch_function() 1551 retval = rtsx_write_register(chip, SD_PUSH_POINT_CTL, 0x06, 0); sd_switch_function() 1553 rtsx_trace(chip); sd_switch_function() 1561 static int sd_wait_data_idle(struct rtsx_chip *chip) sd_wait_data_idle() argument 1568 retval = rtsx_read_register(chip, SD_DATA_STATE, &val); sd_wait_data_idle() 1570 rtsx_trace(chip); sd_wait_data_idle() 1579 dev_dbg(rtsx_dev(chip), "SD_DATA_STATE: 0x%02x\n", val); sd_wait_data_idle() 1584 static int sd_sdr_tuning_rx_cmd(struct rtsx_chip *chip, u8 sample_point) sd_sdr_tuning_rx_cmd() argument 1589 retval = sd_change_phase(chip, sample_point, TUNE_RX); sd_sdr_tuning_rx_cmd() 1591 rtsx_trace(chip); sd_sdr_tuning_rx_cmd() 1601 retval = sd_read_data(chip, SD_TM_AUTO_TUNING, sd_sdr_tuning_rx_cmd() 1604 (void)sd_wait_data_idle(chip); sd_sdr_tuning_rx_cmd() 1606 rtsx_clear_sd_error(chip); sd_sdr_tuning_rx_cmd() 1607 rtsx_trace(chip); sd_sdr_tuning_rx_cmd() 1614 static int sd_ddr_tuning_rx_cmd(struct rtsx_chip *chip, u8 sample_point) sd_ddr_tuning_rx_cmd() argument 1616 struct sd_info *sd_card = &(chip->sd_card); sd_ddr_tuning_rx_cmd() 1620 retval = sd_change_phase(chip, sample_point, TUNE_RX); sd_ddr_tuning_rx_cmd() 1622 rtsx_trace(chip); sd_ddr_tuning_rx_cmd() 1626 dev_dbg(rtsx_dev(chip), "sd ddr tuning rx\n"); sd_ddr_tuning_rx_cmd() 1628 retval = sd_send_cmd_get_rsp(chip, APP_CMD, sd_card->sd_addr, sd_ddr_tuning_rx_cmd() 1631 rtsx_trace(chip); sd_ddr_tuning_rx_cmd() 1641 retval = sd_read_data(chip, SD_TM_NORMAL_READ, sd_ddr_tuning_rx_cmd() 1644 (void)sd_wait_data_idle(chip); sd_ddr_tuning_rx_cmd() 1646 rtsx_clear_sd_error(chip); sd_ddr_tuning_rx_cmd() 1647 rtsx_trace(chip); sd_ddr_tuning_rx_cmd() 1654 static int mmc_ddr_tunning_rx_cmd(struct rtsx_chip *chip, u8 sample_point) mmc_ddr_tunning_rx_cmd() argument 1656 struct sd_info *sd_card = &(chip->sd_card); mmc_ddr_tunning_rx_cmd() 1667 retval = sd_change_phase(chip, sample_point, TUNE_RX); mmc_ddr_tunning_rx_cmd() 1669 rtsx_trace(chip); mmc_ddr_tunning_rx_cmd() 1673 dev_dbg(rtsx_dev(chip), "mmc ddr tuning rx\n"); mmc_ddr_tunning_rx_cmd() 1681 retval = sd_read_data(chip, SD_TM_NORMAL_READ, mmc_ddr_tunning_rx_cmd() 1684 (void)sd_wait_data_idle(chip); mmc_ddr_tunning_rx_cmd() 1686 rtsx_clear_sd_error(chip); mmc_ddr_tunning_rx_cmd() 1687 rtsx_trace(chip); mmc_ddr_tunning_rx_cmd() 1694 static int sd_sdr_tuning_tx_cmd(struct rtsx_chip *chip, u8 sample_point) sd_sdr_tuning_tx_cmd() argument 1696 struct sd_info *sd_card = &(chip->sd_card); sd_sdr_tuning_tx_cmd() 1699 retval = sd_change_phase(chip, sample_point, TUNE_TX); sd_sdr_tuning_tx_cmd() 1701 rtsx_trace(chip); sd_sdr_tuning_tx_cmd() 1705 retval = rtsx_write_register(chip, SD_CFG3, SD_RSP_80CLK_TIMEOUT_EN, sd_sdr_tuning_tx_cmd() 1708 rtsx_trace(chip); sd_sdr_tuning_tx_cmd() 1712 retval = sd_send_cmd_get_rsp(chip, SEND_STATUS, sd_card->sd_addr, sd_sdr_tuning_tx_cmd() 1715 if (sd_check_err_code(chip, SD_RSP_TIMEOUT)) { sd_sdr_tuning_tx_cmd() 1716 rtsx_write_register(chip, SD_CFG3, sd_sdr_tuning_tx_cmd() 1718 rtsx_trace(chip); sd_sdr_tuning_tx_cmd() 1723 retval = rtsx_write_register(chip, SD_CFG3, SD_RSP_80CLK_TIMEOUT_EN, sd_sdr_tuning_tx_cmd() 1726 rtsx_trace(chip); sd_sdr_tuning_tx_cmd() 1733 static int sd_ddr_tuning_tx_cmd(struct rtsx_chip *chip, u8 sample_point) sd_ddr_tuning_tx_cmd() argument 1735 struct sd_info *sd_card = &(chip->sd_card); sd_ddr_tuning_tx_cmd() 1739 retval = sd_change_phase(chip, sample_point, TUNE_TX); sd_ddr_tuning_tx_cmd() 1741 rtsx_trace(chip); sd_ddr_tuning_tx_cmd() 1756 retval = sd_wait_state_data_ready(chip, 0x08, 1, 1000); sd_ddr_tuning_tx_cmd() 1758 rtsx_trace(chip); sd_ddr_tuning_tx_cmd() 1762 retval = rtsx_write_register(chip, SD_CFG3, SD_RSP_80CLK_TIMEOUT_EN, sd_ddr_tuning_tx_cmd() 1765 rtsx_trace(chip); sd_ddr_tuning_tx_cmd() 1775 retval = sd_write_data(chip, SD_TM_AUTO_WRITE_2, sd_ddr_tuning_tx_cmd() 1778 rtsx_clear_sd_error(chip); sd_ddr_tuning_tx_cmd() 1779 rtsx_write_register(chip, SD_CFG3, SD_RSP_80CLK_TIMEOUT_EN, 0); sd_ddr_tuning_tx_cmd() 1780 rtsx_trace(chip); sd_ddr_tuning_tx_cmd() 1784 retval = rtsx_write_register(chip, SD_CFG3, SD_RSP_80CLK_TIMEOUT_EN, sd_ddr_tuning_tx_cmd() 1787 rtsx_trace(chip); sd_ddr_tuning_tx_cmd() 1791 sd_send_cmd_get_rsp(chip, SEND_STATUS, sd_card->sd_addr, SD_RSP_TYPE_R1, sd_ddr_tuning_tx_cmd() 1797 static u8 sd_search_final_phase(struct rtsx_chip *chip, u32 phase_map, sd_search_final_phase() argument 1800 struct sd_info *sd_card = &(chip->sd_card); sd_search_final_phase() 1809 final_phase = (u8)chip->sd_default_rx_phase; sd_search_final_phase() 1811 final_phase = (u8)chip->sd_default_tx_phase; sd_search_final_phase() 1843 dev_dbg(rtsx_dev(chip), "No continuous phase path\n"); sd_search_final_phase() 1873 dev_dbg(rtsx_dev(chip), "path[%d].start = %d\n", sd_search_final_phase() 1875 dev_dbg(rtsx_dev(chip), "path[%d].end = %d\n", i, path[i].end); sd_search_final_phase() 1876 dev_dbg(rtsx_dev(chip), "path[%d].len = %d\n", i, path[i].len); sd_search_final_phase() 1877 dev_dbg(rtsx_dev(chip), "path[%d].mid = %d\n", i, path[i].mid); sd_search_final_phase() 1878 dev_dbg(rtsx_dev(chip), "\n"); sd_search_final_phase() 1912 dev_dbg(rtsx_dev(chip), "Final chosen phase: %d\n", final_phase); sd_search_final_phase() 1916 static int sd_tuning_rx(struct rtsx_chip *chip) sd_tuning_rx() argument 1918 struct sd_info *sd_card = &(chip->sd_card); sd_tuning_rx() 1923 int (*tuning_cmd)(struct rtsx_chip *chip, u8 sample_point); sd_tuning_rx() 1935 rtsx_trace(chip); sd_tuning_rx() 1943 if (detect_card_cd(chip, SD_CARD) != STATUS_SUCCESS) { sd_tuning_rx() 1944 sd_set_err_code(chip, SD_NO_CARD); sd_tuning_rx() 1945 rtsx_trace(chip); sd_tuning_rx() 1949 retval = tuning_cmd(chip, (u8)j); sd_tuning_rx() 1957 dev_dbg(rtsx_dev(chip), "RX raw_phase_map[%d] = 0x%08x\n", sd_tuning_rx() 1960 dev_dbg(rtsx_dev(chip), "RX phase_map = 0x%08x\n", phase_map); sd_tuning_rx() 1962 final_phase = sd_search_final_phase(chip, phase_map, TUNE_RX); sd_tuning_rx() 1964 rtsx_trace(chip); sd_tuning_rx() 1968 retval = sd_change_phase(chip, final_phase, TUNE_RX); sd_tuning_rx() 1970 rtsx_trace(chip); sd_tuning_rx() 1977 static int sd_ddr_pre_tuning_tx(struct rtsx_chip *chip) sd_ddr_pre_tuning_tx() argument 1979 struct sd_info *sd_card = &(chip->sd_card); sd_ddr_pre_tuning_tx() 1985 retval = rtsx_write_register(chip, SD_CFG3, SD_RSP_80CLK_TIMEOUT_EN, sd_ddr_pre_tuning_tx() 1988 rtsx_trace(chip); sd_ddr_pre_tuning_tx() 1994 if (detect_card_cd(chip, SD_CARD) != STATUS_SUCCESS) { sd_ddr_pre_tuning_tx() 1995 sd_set_err_code(chip, SD_NO_CARD); sd_ddr_pre_tuning_tx() 1996 rtsx_write_register(chip, SD_CFG3, sd_ddr_pre_tuning_tx() 1998 rtsx_trace(chip); sd_ddr_pre_tuning_tx() 2002 retval = sd_change_phase(chip, (u8)i, TUNE_TX); sd_ddr_pre_tuning_tx() 2006 retval = sd_send_cmd_get_rsp(chip, SEND_STATUS, sd_ddr_pre_tuning_tx() 2010 !sd_check_err_code(chip, SD_RSP_TIMEOUT)) sd_ddr_pre_tuning_tx() 2014 retval = rtsx_write_register(chip, SD_CFG3, SD_RSP_80CLK_TIMEOUT_EN, sd_ddr_pre_tuning_tx() 2017 rtsx_trace(chip); sd_ddr_pre_tuning_tx() 2021 dev_dbg(rtsx_dev(chip), "DDR TX pre tune phase_map = 0x%08x\n", sd_ddr_pre_tuning_tx() 2024 final_phase = sd_search_final_phase(chip, phase_map, TUNE_TX); sd_ddr_pre_tuning_tx() 2026 rtsx_trace(chip); sd_ddr_pre_tuning_tx() 2030 retval = sd_change_phase(chip, final_phase, TUNE_TX); sd_ddr_pre_tuning_tx() 2032 rtsx_trace(chip); sd_ddr_pre_tuning_tx() 2036 dev_dbg(rtsx_dev(chip), "DDR TX pre tune phase: %d\n", sd_ddr_pre_tuning_tx() 2042 static int sd_tuning_tx(struct rtsx_chip *chip) sd_tuning_tx() argument 2044 struct sd_info *sd_card = &(chip->sd_card); sd_tuning_tx() 2049 int (*tuning_cmd)(struct rtsx_chip *chip, u8 sample_point); sd_tuning_tx() 2061 rtsx_trace(chip); sd_tuning_tx() 2069 if (detect_card_cd(chip, SD_CARD) != STATUS_SUCCESS) { sd_tuning_tx() 2070 sd_set_err_code(chip, SD_NO_CARD); sd_tuning_tx() 2071 rtsx_write_register(chip, SD_CFG3, sd_tuning_tx() 2073 rtsx_trace(chip); sd_tuning_tx() 2077 retval = tuning_cmd(chip, (u8)j); sd_tuning_tx() 2085 dev_dbg(rtsx_dev(chip), "TX raw_phase_map[%d] = 0x%08x\n", sd_tuning_tx() 2088 dev_dbg(rtsx_dev(chip), "TX phase_map = 0x%08x\n", phase_map); sd_tuning_tx() 2090 final_phase = sd_search_final_phase(chip, phase_map, TUNE_TX); sd_tuning_tx() 2092 rtsx_trace(chip); sd_tuning_tx() 2096 retval = sd_change_phase(chip, final_phase, TUNE_TX); sd_tuning_tx() 2098 rtsx_trace(chip); sd_tuning_tx() 2105 static int sd_sdr_tuning(struct rtsx_chip *chip) sd_sdr_tuning() argument 2109 retval = sd_tuning_tx(chip); sd_sdr_tuning() 2111 rtsx_trace(chip); sd_sdr_tuning() 2115 retval = sd_tuning_rx(chip); sd_sdr_tuning() 2117 rtsx_trace(chip); sd_sdr_tuning() 2124 static int sd_ddr_tuning(struct rtsx_chip *chip) sd_ddr_tuning() argument 2128 if (!(chip->sd_ctl & SD_DDR_TX_PHASE_SET_BY_USER)) { sd_ddr_tuning() 2129 retval = sd_ddr_pre_tuning_tx(chip); sd_ddr_tuning() 2131 rtsx_trace(chip); sd_ddr_tuning() 2135 retval = sd_change_phase(chip, (u8)chip->sd_ddr_tx_phase, sd_ddr_tuning() 2138 rtsx_trace(chip); sd_ddr_tuning() 2143 retval = sd_tuning_rx(chip); sd_ddr_tuning() 2145 rtsx_trace(chip); sd_ddr_tuning() 2149 if (!(chip->sd_ctl & SD_DDR_TX_PHASE_SET_BY_USER)) { sd_ddr_tuning() 2150 retval = sd_tuning_tx(chip); sd_ddr_tuning() 2152 rtsx_trace(chip); sd_ddr_tuning() 2160 static int mmc_ddr_tuning(struct rtsx_chip *chip) mmc_ddr_tuning() argument 2164 if (!(chip->sd_ctl & MMC_DDR_TX_PHASE_SET_BY_USER)) { mmc_ddr_tuning() 2165 retval = sd_ddr_pre_tuning_tx(chip); mmc_ddr_tuning() 2167 rtsx_trace(chip); mmc_ddr_tuning() 2171 retval = sd_change_phase(chip, (u8)chip->mmc_ddr_tx_phase, mmc_ddr_tuning() 2174 rtsx_trace(chip); mmc_ddr_tuning() 2179 retval = sd_tuning_rx(chip); mmc_ddr_tuning() 2181 rtsx_trace(chip); mmc_ddr_tuning() 2185 if (!(chip->sd_ctl & MMC_DDR_TX_PHASE_SET_BY_USER)) { mmc_ddr_tuning() 2186 retval = sd_tuning_tx(chip); mmc_ddr_tuning() 2188 rtsx_trace(chip); mmc_ddr_tuning() 2196 int sd_switch_clock(struct rtsx_chip *chip) sd_switch_clock() argument 2198 struct sd_info *sd_card = &(chip->sd_card); sd_switch_clock() 2202 retval = select_card(chip, SD_CARD); sd_switch_clock() 2204 rtsx_trace(chip); sd_switch_clock() 2208 retval = switch_clock(chip, sd_card->sd_clock); sd_switch_clock() 2210 rtsx_trace(chip); sd_switch_clock() 2217 retval = sd_ddr_tuning(chip); sd_switch_clock() 2219 retval = sd_sdr_tuning(chip); sd_switch_clock() 2222 retval = mmc_ddr_tuning(chip); sd_switch_clock() 2226 rtsx_trace(chip); sd_switch_clock() 2234 static int sd_prepare_reset(struct rtsx_chip *chip) sd_prepare_reset() argument 2236 struct sd_info *sd_card = &(chip->sd_card); sd_prepare_reset() 2239 if (chip->asic_code) sd_prepare_reset() 2254 chip->capacity[chip->card2lun[SD_CARD]] = 0; sd_prepare_reset() 2255 chip->sd_io = 0; sd_prepare_reset() 2257 retval = sd_set_init_para(chip); sd_prepare_reset() 2259 rtsx_trace(chip); sd_prepare_reset() 2263 retval = rtsx_write_register(chip, REG_SD_CFG1, 0xFF, 0x40); sd_prepare_reset() 2265 rtsx_trace(chip); sd_prepare_reset() 2269 retval = rtsx_write_register(chip, CARD_STOP, SD_STOP | SD_CLR_ERR, sd_prepare_reset() 2272 rtsx_trace(chip); sd_prepare_reset() 2276 retval = select_card(chip, SD_CARD); sd_prepare_reset() 2278 rtsx_trace(chip); sd_prepare_reset() 2285 static int sd_pull_ctl_disable(struct rtsx_chip *chip) sd_pull_ctl_disable() argument 2289 if (CHECK_PID(chip, 0x5208)) { sd_pull_ctl_disable() 2290 retval = rtsx_write_register(chip, CARD_PULL_CTL1, 0xFF, sd_pull_ctl_disable() 2293 rtsx_trace(chip); sd_pull_ctl_disable() 2296 retval = rtsx_write_register(chip, CARD_PULL_CTL2, 0xFF, sd_pull_ctl_disable() 2299 rtsx_trace(chip); sd_pull_ctl_disable() 2302 retval = rtsx_write_register(chip, CARD_PULL_CTL3, 0xFF, sd_pull_ctl_disable() 2305 rtsx_trace(chip); sd_pull_ctl_disable() 2308 retval = rtsx_write_register(chip, CARD_PULL_CTL4, 0xFF, sd_pull_ctl_disable() 2311 rtsx_trace(chip); sd_pull_ctl_disable() 2314 retval = rtsx_write_register(chip, CARD_PULL_CTL5, 0xFF, sd_pull_ctl_disable() 2317 rtsx_trace(chip); sd_pull_ctl_disable() 2320 retval = rtsx_write_register(chip, CARD_PULL_CTL6, 0xFF, sd_pull_ctl_disable() 2323 rtsx_trace(chip); sd_pull_ctl_disable() 2326 } else if (CHECK_PID(chip, 0x5288)) { sd_pull_ctl_disable() 2327 if (CHECK_BARO_PKG(chip, QFN)) { sd_pull_ctl_disable() 2328 retval = rtsx_write_register(chip, CARD_PULL_CTL1, sd_pull_ctl_disable() 2331 rtsx_trace(chip); sd_pull_ctl_disable() 2334 retval = rtsx_write_register(chip, CARD_PULL_CTL2, sd_pull_ctl_disable() 2337 rtsx_trace(chip); sd_pull_ctl_disable() 2340 retval = rtsx_write_register(chip, CARD_PULL_CTL3, sd_pull_ctl_disable() 2343 rtsx_trace(chip); sd_pull_ctl_disable() 2346 retval = rtsx_write_register(chip, CARD_PULL_CTL4, sd_pull_ctl_disable() 2349 rtsx_trace(chip); sd_pull_ctl_disable() 2358 int sd_pull_ctl_enable(struct rtsx_chip *chip) sd_pull_ctl_enable() argument 2362 rtsx_init_cmd(chip); sd_pull_ctl_enable() 2364 if (CHECK_PID(chip, 0x5208)) { sd_pull_ctl_enable() 2365 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF, sd_pull_ctl_enable() 2367 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF, sd_pull_ctl_enable() 2369 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF, sd_pull_ctl_enable() 2371 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF, sd_pull_ctl_enable() 2373 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF, sd_pull_ctl_enable() 2375 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF, sd_pull_ctl_enable() 2377 } else if (CHECK_PID(chip, 0x5288)) { sd_pull_ctl_enable() 2378 if (CHECK_BARO_PKG(chip, QFN)) { sd_pull_ctl_enable() 2379 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF, sd_pull_ctl_enable() 2381 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF, sd_pull_ctl_enable() 2383 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF, sd_pull_ctl_enable() 2385 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF, sd_pull_ctl_enable() 2390 retval = rtsx_send_cmd(chip, SD_CARD, 100); sd_pull_ctl_enable() 2392 rtsx_trace(chip); sd_pull_ctl_enable() 2399 static int sd_init_power(struct rtsx_chip *chip) sd_init_power() argument 2403 retval = sd_power_off_card3v3(chip); sd_init_power() 2405 rtsx_trace(chip); sd_init_power() 2409 if (!chip->ft2_fast_mode) sd_init_power() 2412 retval = enable_card_clock(chip, SD_CARD); sd_init_power() 2414 rtsx_trace(chip); sd_init_power() 2418 if (chip->asic_code) { sd_init_power() 2419 retval = sd_pull_ctl_enable(chip); sd_init_power() 2421 rtsx_trace(chip); sd_init_power() 2425 retval = rtsx_write_register(chip, FPGA_PULL_CTL, sd_init_power() 2428 rtsx_trace(chip); sd_init_power() 2433 if (!chip->ft2_fast_mode) { sd_init_power() 2434 retval = card_power_on(chip, SD_CARD); sd_init_power() 2436 rtsx_trace(chip); sd_init_power() 2443 if (chip->ocp_stat & (SD_OC_NOW | SD_OC_EVER)) { sd_init_power() 2444 dev_dbg(rtsx_dev(chip), "Over current, OCPSTAT is 0x%x\n", sd_init_power() 2445 chip->ocp_stat); sd_init_power() 2446 rtsx_trace(chip); sd_init_power() 2452 retval = rtsx_write_register(chip, CARD_OE, SD_OUTPUT_EN, sd_init_power() 2455 rtsx_trace(chip); sd_init_power() 2462 static int sd_dummy_clock(struct rtsx_chip *chip) sd_dummy_clock() argument 2466 retval = rtsx_write_register(chip, REG_SD_CFG3, 0x01, 0x01); sd_dummy_clock() 2468 rtsx_trace(chip); sd_dummy_clock() 2472 retval = rtsx_write_register(chip, REG_SD_CFG3, 0x01, 0); sd_dummy_clock() 2474 rtsx_trace(chip); sd_dummy_clock() 2481 static int sd_read_lba0(struct rtsx_chip *chip) sd_read_lba0() argument 2483 struct sd_info *sd_card = &(chip->sd_card); sd_read_lba0() 2504 retval = sd_read_data(chip, SD_TM_NORMAL_READ, cmd, sd_read_lba0() 2507 rtsx_clear_sd_error(chip); sd_read_lba0() 2508 rtsx_trace(chip); sd_read_lba0() 2515 static int sd_check_wp_state(struct rtsx_chip *chip) sd_check_wp_state() argument 2517 struct sd_info *sd_card = &(chip->sd_card); sd_check_wp_state() 2523 retval = sd_send_cmd_get_rsp(chip, APP_CMD, sd_check_wp_state() 2526 rtsx_trace(chip); sd_check_wp_state() 2536 retval = sd_read_data(chip, SD_TM_NORMAL_READ, cmd, 5, 64, 1, sd_check_wp_state() 2539 rtsx_clear_sd_error(chip); sd_check_wp_state() 2541 sd_send_cmd_get_rsp(chip, SEND_STATUS, sd_card->sd_addr, sd_check_wp_state() 2543 rtsx_trace(chip); sd_check_wp_state() 2547 dev_dbg(rtsx_dev(chip), "ACMD13:\n"); sd_check_wp_state() 2548 dev_dbg(rtsx_dev(chip), "%*ph\n", 64, buf); sd_check_wp_state() 2551 dev_dbg(rtsx_dev(chip), "sd_card_type = 0x%04x\n", sd_card_type); sd_check_wp_state() 2554 chip->card_wp |= SD_CARD; sd_check_wp_state() 2558 val = rtsx_readl(chip, RTSX_BIPR); sd_check_wp_state() 2560 chip->card_wp |= SD_CARD; sd_check_wp_state() 2565 static int reset_sd(struct rtsx_chip *chip) reset_sd() argument 2567 struct sd_info *sd_card = &(chip->sd_card); reset_sd() 2592 retval = sd_prepare_reset(chip); reset_sd() 2594 rtsx_trace(chip); reset_sd() 2598 retval = sd_dummy_clock(chip); reset_sd() 2600 rtsx_trace(chip); reset_sd() 2604 if (CHK_SDIO_EXIST(chip) && !CHK_SDIO_IGNORED(chip) && try_sdio) { reset_sd() 2607 for (; rty_cnt < chip->sdio_retry_cnt; rty_cnt++) { reset_sd() 2608 if (detect_card_cd(chip, SD_CARD) != STATUS_SUCCESS) { reset_sd() 2609 sd_set_err_code(chip, SD_NO_CARD); reset_sd() 2610 rtsx_trace(chip); reset_sd() 2614 retval = sd_send_cmd_get_rsp(chip, IO_SEND_OP_COND, 0, reset_sd() 2620 dev_dbg(rtsx_dev(chip), "SD_IO card (Function number: %d)!\n", reset_sd() 2622 chip->sd_io = 1; reset_sd() 2623 rtsx_trace(chip); reset_sd() 2630 sd_init_power(chip); reset_sd() 2632 sd_dummy_clock(chip); reset_sd() 2635 dev_dbg(rtsx_dev(chip), "Normal card!\n"); reset_sd() 2640 retval = sd_send_cmd_get_rsp(chip, GO_IDLE_STATE, 0, SD_RSP_TYPE_R0, reset_sd() 2643 rtsx_trace(chip); reset_sd() 2649 retval = sd_send_cmd_get_rsp(chip, SEND_IF_COND, 0x000001AA, reset_sd() 2661 retval = sd_send_cmd_get_rsp(chip, GO_IDLE_STATE, 0, reset_sd() 2664 rtsx_trace(chip); reset_sd() 2672 retval = sd_send_cmd_get_rsp(chip, APP_CMD, 0, SD_RSP_TYPE_R1, reset_sd() 2675 if (detect_card_cd(chip, SD_CARD) != STATUS_SUCCESS) { reset_sd() 2676 sd_set_err_code(chip, SD_NO_CARD); reset_sd() 2677 rtsx_trace(chip); reset_sd() 2685 rtsx_trace(chip); reset_sd() 2690 retval = sd_send_cmd_get_rsp(chip, SD_APP_OP_COND, voltage, reset_sd() 2697 rtsx_trace(chip); reset_sd() 2707 rtsx_trace(chip); reset_sd() 2722 dev_dbg(rtsx_dev(chip), "support_1v8 = %d\n", support_1v8); reset_sd() 2725 retval = sd_voltage_switch(chip); reset_sd() 2727 rtsx_trace(chip); reset_sd() 2732 retval = sd_send_cmd_get_rsp(chip, ALL_SEND_CID, 0, SD_RSP_TYPE_R2, reset_sd() 2735 rtsx_trace(chip); reset_sd() 2740 retval = sd_send_cmd_get_rsp(chip, SEND_RELATIVE_ADDR, 0, reset_sd() 2743 rtsx_trace(chip); reset_sd() 2754 retval = sd_check_csd(chip, 1); reset_sd() 2756 rtsx_trace(chip); reset_sd() 2760 retval = sd_select_card(chip, 1); reset_sd() 2762 rtsx_trace(chip); reset_sd() 2768 retval = sd_update_lock_status(chip); reset_sd() 2770 rtsx_trace(chip); reset_sd() 2782 retval = sd_send_cmd_get_rsp(chip, APP_CMD, sd_card->sd_addr, reset_sd() 2785 rtsx_trace(chip); reset_sd() 2789 retval = sd_send_cmd_get_rsp(chip, SET_CLR_CARD_DETECT, 0, reset_sd() 2792 rtsx_trace(chip); reset_sd() 2797 retval = sd_send_cmd_get_rsp(chip, APP_CMD, sd_card->sd_addr, reset_sd() 2800 rtsx_trace(chip); reset_sd() 2804 retval = sd_send_cmd_get_rsp(chip, SET_BUS_WIDTH, 2, reset_sd() 2807 rtsx_trace(chip); reset_sd() 2816 retval = sd_send_cmd_get_rsp(chip, SET_BLOCKLEN, 0x200, SD_RSP_TYPE_R1, reset_sd() 2819 rtsx_trace(chip); reset_sd() 2823 retval = sd_set_clock_divider(chip, SD_CLK_DIVIDE_0); reset_sd() 2825 rtsx_trace(chip); reset_sd() 2842 retval = sd_check_spec(chip, switch_bus_width); reset_sd() 2844 retval = sd_switch_function(chip, switch_bus_width); reset_sd() 2846 sd_init_power(chip); reset_sd() 2854 sd_init_power(chip); reset_sd() 2864 retval = sd_send_cmd_get_rsp(chip, APP_CMD, sd_card->sd_addr, reset_sd() 2867 rtsx_trace(chip); reset_sd() 2871 retval = sd_send_cmd_get_rsp(chip, SET_BUS_WIDTH, 2, reset_sd() 2874 rtsx_trace(chip); reset_sd() 2886 retval = rtsx_write_register(chip, SD30_DRIVE_SEL, 0x07, reset_sd() 2887 chip->sd30_drive_sel_1v8); reset_sd() 2889 rtsx_trace(chip); reset_sd() 2893 retval = sd_set_init_para(chip); reset_sd() 2895 rtsx_trace(chip); reset_sd() 2900 retval = sd_ddr_tuning(chip); reset_sd() 2902 retval = sd_sdr_tuning(chip); reset_sd() 2906 rtsx_trace(chip); reset_sd() 2909 retval = sd_init_power(chip); reset_sd() 2911 rtsx_trace(chip); reset_sd() 2921 sd_send_cmd_get_rsp(chip, SEND_STATUS, sd_card->sd_addr, reset_sd() 2925 retval = sd_wait_state_data_ready(chip, 0x08, 1, 1000); reset_sd() 2931 retval = sd_read_lba0(chip); reset_sd() 2934 rtsx_trace(chip); reset_sd() 2937 retval = sd_init_power(chip); reset_sd() 2939 rtsx_trace(chip); reset_sd() 2951 retval = sd_check_wp_state(chip); reset_sd() 2953 rtsx_trace(chip); reset_sd() 2957 chip->card_bus_width[chip->card2lun[SD_CARD]] = 4; reset_sd() 2961 retval = rtsx_write_register(chip, REG_SD_BLOCK_CNT_H, 0xFF, reset_sd() 2964 rtsx_trace(chip); reset_sd() 2967 retval = rtsx_write_register(chip, REG_SD_BLOCK_CNT_L, 0xFF, reset_sd() 2970 rtsx_trace(chip); reset_sd() 2980 static int mmc_test_switch_bus(struct rtsx_chip *chip, u8 width) mmc_test_switch_bus() argument 2982 struct sd_info *sd_card = &(chip->sd_card); mmc_test_switch_bus() 2988 retval = sd_send_cmd_get_rsp(chip, BUSTEST_W, 0, SD_RSP_TYPE_R1, NULL, mmc_test_switch_bus() 2991 rtsx_trace(chip); mmc_test_switch_bus() 3008 retval = rtsx_write_register(chip, REG_SD_CFG3, 0x02, 0x02); mmc_test_switch_bus() 3010 rtsx_trace(chip); mmc_test_switch_bus() 3014 retval = sd_write_data(chip, SD_TM_AUTO_WRITE_3, mmc_test_switch_bus() 3017 rtsx_clear_sd_error(chip); mmc_test_switch_bus() 3018 rtsx_write_register(chip, REG_SD_CFG3, 0x02, 0); mmc_test_switch_bus() 3019 rtsx_trace(chip); mmc_test_switch_bus() 3023 retval = rtsx_write_register(chip, REG_SD_CFG3, 0x02, 0); mmc_test_switch_bus() 3025 rtsx_trace(chip); mmc_test_switch_bus() 3029 dev_dbg(rtsx_dev(chip), "SD/MMC CMD %d\n", BUSTEST_R); mmc_test_switch_bus() 3031 rtsx_init_cmd(chip); mmc_test_switch_bus() 3033 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD0, 0xFF, 0x40 | BUSTEST_R); mmc_test_switch_bus() 3036 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_L, mmc_test_switch_bus() 3039 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_L, mmc_test_switch_bus() 3042 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BLOCK_CNT_L, 0xFF, 1); mmc_test_switch_bus() 3043 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BLOCK_CNT_H, 0xFF, 0); mmc_test_switch_bus() 3045 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG2, 0xFF, mmc_test_switch_bus() 3048 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, 0x01, mmc_test_switch_bus() 3050 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_TRANSFER, 0xFF, mmc_test_switch_bus() 3052 rtsx_add_cmd(chip, CHECK_REG_CMD, REG_SD_TRANSFER, SD_TRANSFER_END, mmc_test_switch_bus() 3055 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2, 0, 0); mmc_test_switch_bus() 3057 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + 1, 0, 0); mmc_test_switch_bus() 3059 retval = rtsx_send_cmd(chip, SD_CARD, 100); mmc_test_switch_bus() 3061 rtsx_clear_sd_error(chip); mmc_test_switch_bus() 3062 rtsx_trace(chip); mmc_test_switch_bus() 3066 ptr = rtsx_get_cmd_data(chip) + 1; mmc_test_switch_bus() 3069 dev_dbg(rtsx_dev(chip), "BUSTEST_R [8bits]: 0x%02x 0x%02x\n", mmc_test_switch_bus() 3080 retval = sd_send_cmd_get_rsp(chip, SWITCH, arg, mmc_test_switch_bus() 3087 dev_dbg(rtsx_dev(chip), "BUSTEST_R [4bits]: 0x%02x\n", ptr[0]); mmc_test_switch_bus() 3097 retval = sd_send_cmd_get_rsp(chip, SWITCH, arg, mmc_test_switch_bus() 3105 rtsx_trace(chip); mmc_test_switch_bus() 3110 static int mmc_switch_timing_bus(struct rtsx_chip *chip, bool switch_ddr) mmc_switch_timing_bus() argument 3112 struct sd_info *sd_card = &(chip->sd_card); mmc_switch_timing_bus() 3118 dev_dbg(rtsx_dev(chip), "SD/MMC CMD %d\n", SEND_EXT_CSD); mmc_switch_timing_bus() 3120 rtsx_init_cmd(chip); mmc_switch_timing_bus() 3122 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD0, 0xFF, mmc_switch_timing_bus() 3124 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD1, 0xFF, 0); mmc_switch_timing_bus() 3125 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD2, 0xFF, 0); mmc_switch_timing_bus() 3126 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD3, 0xFF, 0); mmc_switch_timing_bus() 3127 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD4, 0xFF, 0); mmc_switch_timing_bus() 3129 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_L, 0xFF, 0); mmc_switch_timing_bus() 3130 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_H, 0xFF, 2); mmc_switch_timing_bus() 3131 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BLOCK_CNT_L, 0xFF, 1); mmc_switch_timing_bus() 3132 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BLOCK_CNT_H, 0xFF, 0); mmc_switch_timing_bus() 3134 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG2, 0xFF, mmc_switch_timing_bus() 3137 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, 0x01, mmc_switch_timing_bus() 3139 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_TRANSFER, 0xFF, mmc_switch_timing_bus() 3141 rtsx_add_cmd(chip, CHECK_REG_CMD, REG_SD_TRANSFER, SD_TRANSFER_END, mmc_switch_timing_bus() 3144 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + 196, 0xFF, 0); mmc_switch_timing_bus() 3145 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + 212, 0xFF, 0); mmc_switch_timing_bus() 3146 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + 213, 0xFF, 0); mmc_switch_timing_bus() 3147 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + 214, 0xFF, 0); mmc_switch_timing_bus() 3148 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + 215, 0xFF, 0); mmc_switch_timing_bus() 3150 retval = rtsx_send_cmd(chip, SD_CARD, 1000); mmc_switch_timing_bus() 3153 rtsx_clear_sd_error(chip); mmc_switch_timing_bus() 3154 sd_send_cmd_get_rsp(chip, SEND_STATUS, sd_card->sd_addr, mmc_switch_timing_bus() 3157 rtsx_trace(chip); mmc_switch_timing_bus() 3161 ptr = rtsx_get_cmd_data(chip); mmc_switch_timing_bus() 3163 sd_send_cmd_get_rsp(chip, SEND_STATUS, sd_card->sd_addr, mmc_switch_timing_bus() 3165 rtsx_trace(chip); mmc_switch_timing_bus() 3190 retval = sd_send_cmd_get_rsp(chip, SWITCH, mmc_switch_timing_bus() 3196 sd_choose_proper_clock(chip); mmc_switch_timing_bus() 3197 retval = switch_clock(chip, sd_card->sd_clock); mmc_switch_timing_bus() 3199 rtsx_trace(chip); mmc_switch_timing_bus() 3204 retval = mmc_test_switch_bus(chip, MMC_8BIT_BUS); mmc_switch_timing_bus() 3207 chip->card_bus_width[chip->card2lun[SD_CARD]] = 8; mmc_switch_timing_bus() 3212 retval = mmc_test_switch_bus(chip, MMC_4BIT_BUS); mmc_switch_timing_bus() 3215 chip->card_bus_width[chip->card2lun[SD_CARD]] = 4; mmc_switch_timing_bus() 3223 rtsx_trace(chip); mmc_switch_timing_bus() 3227 rtsx_trace(chip); mmc_switch_timing_bus() 3235 static int reset_mmc(struct rtsx_chip *chip) reset_mmc() argument 3237 struct sd_info *sd_card = &(chip->sd_card); reset_mmc() 3250 retval = sd_prepare_reset(chip); reset_mmc() 3252 rtsx_trace(chip); reset_mmc() 3259 retval = sd_send_cmd_get_rsp(chip, GO_IDLE_STATE, 0, SD_RSP_TYPE_R0, reset_mmc() 3262 rtsx_trace(chip); reset_mmc() 3267 if (detect_card_cd(chip, SD_CARD) != STATUS_SUCCESS) { reset_mmc() 3268 sd_set_err_code(chip, SD_NO_CARD); reset_mmc() 3269 rtsx_trace(chip); reset_mmc() 3273 retval = sd_send_cmd_get_rsp(chip, SEND_OP_COND, reset_mmc() 3277 if (sd_check_err_code(chip, SD_BUSY) || reset_mmc() 3278 sd_check_err_code(chip, SD_TO_ERR)) { reset_mmc() 3281 sd_clr_err_code(chip); reset_mmc() 3284 rtsx_trace(chip); reset_mmc() 3290 sd_clr_err_code(chip); reset_mmc() 3293 rtsx_trace(chip); reset_mmc() 3304 rtsx_trace(chip); reset_mmc() 3313 retval = sd_send_cmd_get_rsp(chip, ALL_SEND_CID, 0, SD_RSP_TYPE_R2, reset_mmc() 3316 rtsx_trace(chip); reset_mmc() 3321 retval = sd_send_cmd_get_rsp(chip, SET_RELATIVE_ADDR, sd_card->sd_addr, reset_mmc() 3324 rtsx_trace(chip); reset_mmc() 3328 retval = sd_check_csd(chip, 1); reset_mmc() 3330 rtsx_trace(chip); reset_mmc() 3336 retval = sd_select_card(chip, 1); reset_mmc() 3338 rtsx_trace(chip); reset_mmc() 3342 retval = sd_send_cmd_get_rsp(chip, SET_BLOCKLEN, 0x200, SD_RSP_TYPE_R1, reset_mmc() 3345 rtsx_trace(chip); reset_mmc() 3351 retval = sd_update_lock_status(chip); reset_mmc() 3353 rtsx_trace(chip); reset_mmc() 3358 retval = sd_set_clock_divider(chip, SD_CLK_DIVIDE_0); reset_mmc() 3360 rtsx_trace(chip); reset_mmc() 3364 chip->card_bus_width[chip->card2lun[SD_CARD]] = 1; reset_mmc() 3369 retval = mmc_switch_timing_bus(chip, switch_ddr); reset_mmc() 3371 retval = sd_init_power(chip); reset_mmc() 3373 rtsx_trace(chip); reset_mmc() 3377 rtsx_trace(chip); reset_mmc() 3383 rtsx_trace(chip); reset_mmc() 3388 retval = sd_set_init_para(chip); reset_mmc() 3390 rtsx_trace(chip); reset_mmc() 3394 retval = mmc_ddr_tuning(chip); reset_mmc() 3396 retval = sd_init_power(chip); reset_mmc() 3398 rtsx_trace(chip); reset_mmc() 3403 rtsx_trace(chip); reset_mmc() 3407 retval = sd_wait_state_data_ready(chip, 0x08, 1, 1000); reset_mmc() 3409 retval = sd_read_lba0(chip); reset_mmc() 3411 retval = sd_init_power(chip); reset_mmc() 3413 rtsx_trace(chip); reset_mmc() 3418 rtsx_trace(chip); reset_mmc() 3427 retval = rtsx_write_register(chip, REG_SD_BLOCK_CNT_H, 0xFF, reset_mmc() 3430 rtsx_trace(chip); reset_mmc() 3433 retval = rtsx_write_register(chip, REG_SD_BLOCK_CNT_L, 0xFF, reset_mmc() 3436 rtsx_trace(chip); reset_mmc() 3442 temp = rtsx_readl(chip, RTSX_BIPR); reset_mmc() 3444 chip->card_wp |= SD_CARD; reset_mmc() 3449 int reset_sd_card(struct rtsx_chip *chip) reset_sd_card() argument 3451 struct sd_info *sd_card = &(chip->sd_card); reset_sd_card() 3454 sd_init_reg_addr(chip); reset_sd_card() 3457 chip->capacity[chip->card2lun[SD_CARD]] = 0; reset_sd_card() 3459 retval = enable_card_clock(chip, SD_CARD); reset_sd_card() 3461 rtsx_trace(chip); reset_sd_card() 3465 if (chip->ignore_sd && CHK_SDIO_EXIST(chip) && reset_sd_card() 3466 !CHK_SDIO_IGNORED(chip)) { reset_sd_card() 3467 if (chip->asic_code) { reset_sd_card() 3468 retval = sd_pull_ctl_enable(chip); reset_sd_card() 3470 rtsx_trace(chip); reset_sd_card() 3474 retval = rtsx_write_register(chip, FPGA_PULL_CTL, reset_sd_card() 3477 rtsx_trace(chip); reset_sd_card() 3481 retval = card_share_mode(chip, SD_CARD); reset_sd_card() 3483 rtsx_trace(chip); reset_sd_card() 3487 chip->sd_io = 1; reset_sd_card() 3488 rtsx_trace(chip); reset_sd_card() 3492 retval = sd_init_power(chip); reset_sd_card() 3494 rtsx_trace(chip); reset_sd_card() 3498 if (chip->sd_ctl & RESET_MMC_FIRST) { reset_sd_card() 3499 retval = reset_mmc(chip); reset_sd_card() 3501 if (sd_check_err_code(chip, SD_NO_CARD)) { reset_sd_card() 3502 rtsx_trace(chip); reset_sd_card() 3506 retval = reset_sd(chip); reset_sd_card() 3508 rtsx_trace(chip); reset_sd_card() 3513 retval = reset_sd(chip); reset_sd_card() 3515 if (sd_check_err_code(chip, SD_NO_CARD)) { reset_sd_card() 3516 rtsx_trace(chip); reset_sd_card() 3520 if (chip->sd_io) { reset_sd_card() 3521 rtsx_trace(chip); reset_sd_card() 3524 retval = reset_mmc(chip); reset_sd_card() 3526 rtsx_trace(chip); reset_sd_card() 3533 retval = sd_set_clock_divider(chip, SD_CLK_DIVIDE_0); reset_sd_card() 3535 rtsx_trace(chip); reset_sd_card() 3539 retval = rtsx_write_register(chip, REG_SD_BYTE_CNT_L, 0xFF, 0); reset_sd_card() 3541 rtsx_trace(chip); reset_sd_card() 3544 retval = rtsx_write_register(chip, REG_SD_BYTE_CNT_H, 0xFF, 2); reset_sd_card() 3546 rtsx_trace(chip); reset_sd_card() 3550 chip->capacity[chip->card2lun[SD_CARD]] = sd_card->capacity; reset_sd_card() 3552 retval = sd_set_init_para(chip); reset_sd_card() 3554 rtsx_trace(chip); reset_sd_card() 3558 dev_dbg(rtsx_dev(chip), "sd_card->sd_type = 0x%x\n", sd_card->sd_type); reset_sd_card() 3563 static int reset_mmc_only(struct rtsx_chip *chip) reset_mmc_only() argument 3565 struct sd_info *sd_card = &(chip->sd_card); reset_mmc_only() 3579 chip->capacity[chip->card2lun[SD_CARD]] = sd_card->capacity = 0; reset_mmc_only() 3581 retval = enable_card_clock(chip, SD_CARD); reset_mmc_only() 3583 rtsx_trace(chip); reset_mmc_only() 3587 retval = sd_init_power(chip); reset_mmc_only() 3589 rtsx_trace(chip); reset_mmc_only() 3593 retval = reset_mmc(chip); reset_mmc_only() 3595 rtsx_trace(chip); reset_mmc_only() 3599 retval = sd_set_clock_divider(chip, SD_CLK_DIVIDE_0); reset_mmc_only() 3601 rtsx_trace(chip); reset_mmc_only() 3605 retval = rtsx_write_register(chip, REG_SD_BYTE_CNT_L, 0xFF, 0); reset_mmc_only() 3607 rtsx_trace(chip); reset_mmc_only() 3610 retval = rtsx_write_register(chip, REG_SD_BYTE_CNT_H, 0xFF, 2); reset_mmc_only() 3612 rtsx_trace(chip); reset_mmc_only() 3616 chip->capacity[chip->card2lun[SD_CARD]] = sd_card->capacity; reset_mmc_only() 3618 retval = sd_set_init_para(chip); reset_mmc_only() 3620 rtsx_trace(chip); reset_mmc_only() 3624 dev_dbg(rtsx_dev(chip), "In reset_mmc_only, sd_card->sd_type = 0x%x\n", reset_mmc_only() 3632 static int wait_data_buf_ready(struct rtsx_chip *chip) wait_data_buf_ready() argument 3634 struct sd_info *sd_card = &(chip->sd_card); wait_data_buf_ready() 3638 if (detect_card_cd(chip, SD_CARD) != STATUS_SUCCESS) { wait_data_buf_ready() 3639 sd_set_err_code(chip, SD_NO_CARD); wait_data_buf_ready() 3640 rtsx_trace(chip); wait_data_buf_ready() 3646 retval = sd_send_cmd_get_rsp(chip, SEND_STATUS, wait_data_buf_ready() 3649 rtsx_trace(chip); wait_data_buf_ready() 3654 return sd_send_cmd_get_rsp(chip, SEND_STATUS, wait_data_buf_ready() 3659 sd_set_err_code(chip, SD_TO_ERR); wait_data_buf_ready() 3661 rtsx_trace(chip); wait_data_buf_ready() 3665 void sd_stop_seq_mode(struct rtsx_chip *chip) sd_stop_seq_mode() argument 3667 struct sd_info *sd_card = &(chip->sd_card); sd_stop_seq_mode() 3671 retval = sd_switch_clock(chip); sd_stop_seq_mode() 3675 retval = sd_send_cmd_get_rsp(chip, STOP_TRANSMISSION, 0, sd_stop_seq_mode() 3678 sd_set_err_code(chip, SD_STS_ERR); sd_stop_seq_mode() 3680 retval = sd_wait_state_data_ready(chip, 0x08, 1, 1000); sd_stop_seq_mode() 3682 sd_set_err_code(chip, SD_STS_ERR); sd_stop_seq_mode() 3686 rtsx_write_register(chip, RBCTL, RB_FLUSH, RB_FLUSH); sd_stop_seq_mode() 3690 static inline int sd_auto_tune_clock(struct rtsx_chip *chip) sd_auto_tune_clock() argument 3692 struct sd_info *sd_card = &(chip->sd_card); sd_auto_tune_clock() 3695 if (chip->asic_code) { sd_auto_tune_clock() 3729 retval = sd_switch_clock(chip); sd_auto_tune_clock() 3731 rtsx_trace(chip); sd_auto_tune_clock() 3738 int sd_rw(struct scsi_cmnd *srb, struct rtsx_chip *chip, u32 start_sector, sd_rw() argument 3741 struct sd_info *sd_card = &(chip->sd_card); sd_rw() 3747 dev_dbg(rtsx_dev(chip), "sd_rw: Read %d %s from 0x%x\n", sd_rw() 3751 dev_dbg(rtsx_dev(chip), "sd_rw: Write %d %s to 0x%x\n", sd_rw() 3758 if (!(chip->card_ready & SD_CARD)) { sd_rw() 3761 retval = reset_sd_card(chip); sd_rw() 3763 chip->card_ready |= SD_CARD; sd_rw() 3764 chip->card_fail &= ~SD_CARD; sd_rw() 3766 chip->card_ready &= ~SD_CARD; sd_rw() 3767 chip->card_fail |= SD_CARD; sd_rw() 3768 chip->capacity[chip->card2lun[SD_CARD]] = 0; sd_rw() 3769 chip->rw_need_retry = 1; sd_rw() 3770 rtsx_trace(chip); sd_rw() 3780 sd_clr_err_code(chip); sd_rw() 3782 retval = sd_switch_clock(chip); sd_rw() 3784 sd_set_err_code(chip, SD_IO_ERR); sd_rw() 3785 rtsx_trace(chip); sd_rw() 3798 sd_send_cmd_get_rsp(chip, SEND_STATUS, sd_card->sd_addr, sd_rw() 3802 retval = sd_send_cmd_get_rsp(chip, STOP_TRANSMISSION, sd_rw() 3805 chip->rw_need_retry = 1; sd_rw() 3806 sd_set_err_code(chip, SD_STS_ERR); sd_rw() 3807 rtsx_trace(chip); sd_rw() 3813 retval = rtsx_write_register(chip, RBCTL, RB_FLUSH, RB_FLUSH); sd_rw() 3815 sd_set_err_code(chip, SD_IO_ERR); sd_rw() 3816 rtsx_trace(chip); sd_rw() 3824 sd_send_cmd_get_rsp(chip, SEND_STATUS, sd_card->sd_addr, sd_rw() 3829 rtsx_init_cmd(chip); sd_rw() 3831 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_L, 0xFF, 0x00); sd_rw() 3832 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_H, 0xFF, 0x02); sd_rw() 3833 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BLOCK_CNT_L, 0xFF, sd_rw() 3835 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BLOCK_CNT_H, 0xFF, sd_rw() 3838 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, 0x01, RING_BUFFER); sd_rw() 3841 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG1, sd_rw() 3844 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG1, sd_rw() 3847 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG1, sd_rw() 3854 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG2, 0xFF, cfg2); sd_rw() 3856 trans_dma_enable(srb->sc_data_direction, chip, sector_cnt * 512, sd_rw() 3860 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_TRANSFER, 0xFF, sd_rw() 3863 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_TRANSFER, 0xFF, sd_rw() 3867 rtsx_add_cmd(chip, CHECK_REG_CMD, REG_SD_TRANSFER, sd_rw() 3870 rtsx_send_cmd_no_wait(chip); sd_rw() 3873 dev_dbg(rtsx_dev(chip), "SD/MMC CMD %d\n", sd_rw() 3875 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD0, 0xFF, sd_rw() 3877 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD1, 0xFF, sd_rw() 3879 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD2, 0xFF, sd_rw() 3881 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD3, 0xFF, sd_rw() 3883 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD4, 0xFF, sd_rw() 3889 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG2, 0xFF, sd_rw() 3892 trans_dma_enable(srb->sc_data_direction, chip, sd_rw() 3895 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_TRANSFER, 0xFF, sd_rw() 3897 rtsx_add_cmd(chip, CHECK_REG_CMD, REG_SD_TRANSFER, sd_rw() 3900 rtsx_send_cmd_no_wait(chip); sd_rw() 3902 retval = rtsx_send_cmd(chip, SD_CARD, 50); sd_rw() 3904 rtsx_clear_sd_error(chip); sd_rw() 3906 chip->rw_need_retry = 1; sd_rw() 3907 sd_set_err_code(chip, SD_TO_ERR); sd_rw() 3908 rtsx_trace(chip); sd_rw() 3912 retval = wait_data_buf_ready(chip); sd_rw() 3914 chip->rw_need_retry = 1; sd_rw() 3915 sd_set_err_code(chip, SD_TO_ERR); sd_rw() 3916 rtsx_trace(chip); sd_rw() 3920 retval = sd_send_cmd_get_rsp(chip, WRITE_MULTIPLE_BLOCK, sd_rw() 3923 chip->rw_need_retry = 1; sd_rw() 3924 rtsx_trace(chip); sd_rw() 3928 rtsx_init_cmd(chip); sd_rw() 3933 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG2, 0xFF, sd_rw() 3936 trans_dma_enable(srb->sc_data_direction, chip, sd_rw() 3939 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_TRANSFER, 0xFF, sd_rw() 3941 rtsx_add_cmd(chip, CHECK_REG_CMD, REG_SD_TRANSFER, sd_rw() 3944 rtsx_send_cmd_no_wait(chip); sd_rw() 3950 retval = rtsx_transfer_data(chip, SD_CARD, scsi_sglist(srb), sd_rw() 3952 srb->sc_data_direction, chip->sd_timeout); sd_rw() 3964 rtsx_read_register(chip, REG_SD_STAT1, &stat); sd_rw() 3965 rtsx_clear_sd_error(chip); sd_rw() 3966 if (detect_card_cd(chip, SD_CARD) != STATUS_SUCCESS) { sd_rw() 3967 chip->rw_need_retry = 0; sd_rw() 3968 dev_dbg(rtsx_dev(chip), "No card exist, exit sd_rw\n"); sd_rw() 3969 rtsx_trace(chip); sd_rw() 3973 chip->rw_need_retry = 1; sd_rw() 3975 retval = sd_send_cmd_get_rsp(chip, STOP_TRANSMISSION, 0, sd_rw() 3978 sd_set_err_code(chip, SD_STS_ERR); sd_rw() 3979 rtsx_trace(chip); sd_rw() 3984 dev_dbg(rtsx_dev(chip), "SD CRC error, tune clock!\n"); sd_rw() 3985 sd_set_err_code(chip, SD_CRC_ERR); sd_rw() 3986 rtsx_trace(chip); sd_rw() 3991 sd_set_err_code(chip, SD_TO_ERR); sd_rw() 3992 rtsx_trace(chip); sd_rw() 3996 rtsx_trace(chip); sd_rw() 4009 if (detect_card_cd(chip, SD_CARD) != STATUS_SUCCESS) { sd_rw() 4010 chip->rw_need_retry = 0; sd_rw() 4011 dev_dbg(rtsx_dev(chip), "No card exist, exit sd_rw\n"); sd_rw() 4012 rtsx_trace(chip); sd_rw() 4016 if (sd_check_err_code(chip, SD_CRC_ERR)) { sd_rw() 4019 reset_mmc_only(chip); sd_rw() 4023 sd_auto_tune_clock(chip); sd_rw() 4025 } else if (sd_check_err_code(chip, SD_TO_ERR | SD_STS_ERR)) { sd_rw() 4026 retval = reset_sd_card(chip); sd_rw() 4028 chip->card_ready &= ~SD_CARD; sd_rw() 4029 chip->card_fail |= SD_CARD; sd_rw() 4030 chip->capacity[chip->card2lun[SD_CARD]] = 0; sd_rw() 4034 rtsx_trace(chip); sd_rw() 4039 int soft_reset_sd_card(struct rtsx_chip *chip) soft_reset_sd_card() argument 4041 return reset_sd(chip); soft_reset_sd_card() 4044 int ext_sd_send_cmd_get_rsp(struct rtsx_chip *chip, u8 cmd_idx, ext_sd_send_cmd_get_rsp() argument 4054 dev_dbg(rtsx_dev(chip), "EXT SD/MMC CMD %d\n", cmd_idx); ext_sd_send_cmd_get_rsp() 4061 rtsx_init_cmd(chip); ext_sd_send_cmd_get_rsp() 4063 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD0, 0xFF, 0x40 | cmd_idx); ext_sd_send_cmd_get_rsp() 4064 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD1, 0xFF, (u8)(arg >> 24)); ext_sd_send_cmd_get_rsp() 4065 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD2, 0xFF, (u8)(arg >> 16)); ext_sd_send_cmd_get_rsp() 4066 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD3, 0xFF, (u8)(arg >> 8)); ext_sd_send_cmd_get_rsp() 4067 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD4, 0xFF, (u8)arg); ext_sd_send_cmd_get_rsp() 4069 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG2, 0xFF, rsp_type); ext_sd_send_cmd_get_rsp() 4070 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, ext_sd_send_cmd_get_rsp() 4072 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_TRANSFER, ext_sd_send_cmd_get_rsp() 4074 rtsx_add_cmd(chip, CHECK_REG_CMD, REG_SD_TRANSFER, SD_TRANSFER_END, ext_sd_send_cmd_get_rsp() 4080 rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0, 0); ext_sd_send_cmd_get_rsp() 4086 rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0, 0); ext_sd_send_cmd_get_rsp() 4090 rtsx_add_cmd(chip, READ_REG_CMD, REG_SD_CMD5, 0, 0); ext_sd_send_cmd_get_rsp() 4092 rtsx_add_cmd(chip, READ_REG_CMD, REG_SD_STAT1, 0, 0); ext_sd_send_cmd_get_rsp() 4094 retval = rtsx_send_cmd(chip, SD_CARD, timeout); ext_sd_send_cmd_get_rsp() 4097 rtsx_clear_sd_error(chip); ext_sd_send_cmd_get_rsp() 4100 retval = sd_check_data0_status(chip); ext_sd_send_cmd_get_rsp() 4102 rtsx_trace(chip); ext_sd_send_cmd_get_rsp() 4106 sd_set_err_code(chip, SD_TO_ERR); ext_sd_send_cmd_get_rsp() 4109 rtsx_trace(chip); ext_sd_send_cmd_get_rsp() 4116 ptr = rtsx_get_cmd_data(chip) + 1; ext_sd_send_cmd_get_rsp() 4119 sd_set_err_code(chip, SD_STS_ERR); ext_sd_send_cmd_get_rsp() 4120 rtsx_trace(chip); ext_sd_send_cmd_get_rsp() 4127 sd_set_err_code(chip, SD_CRC_ERR); ext_sd_send_cmd_get_rsp() 4128 rtsx_trace(chip); ext_sd_send_cmd_get_rsp() 4136 sd_set_err_code(chip, SD_CRC_ERR); ext_sd_send_cmd_get_rsp() 4137 rtsx_trace(chip); ext_sd_send_cmd_get_rsp() 4147 rtsx_trace(chip); ext_sd_send_cmd_get_rsp() 4157 rtsx_trace(chip); ext_sd_send_cmd_get_rsp() 4161 rtsx_trace(chip); ext_sd_send_cmd_get_rsp() 4168 rtsx_trace(chip); ext_sd_send_cmd_get_rsp() 4174 rtsx_trace(chip); ext_sd_send_cmd_get_rsp() 4187 int ext_sd_get_rsp(struct rtsx_chip *chip, int len, u8 *rsp, u8 rsp_type) ext_sd_get_rsp() argument 4195 rtsx_init_cmd(chip); ext_sd_get_rsp() 4200 rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0xFF, 0); ext_sd_get_rsp() 4206 rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0xFF, 0); ext_sd_get_rsp() 4210 rtsx_add_cmd(chip, READ_REG_CMD, REG_SD_CMD5, 0xFF, 0); ext_sd_get_rsp() 4212 retval = rtsx_send_cmd(chip, SD_CARD, 100); ext_sd_get_rsp() 4214 rtsx_trace(chip); ext_sd_get_rsp() 4221 memcpy(rsp, rtsx_get_cmd_data(chip), min_len); ext_sd_get_rsp() 4223 dev_dbg(rtsx_dev(chip), "min_len = %d\n", min_len); ext_sd_get_rsp() 4224 dev_dbg(rtsx_dev(chip), "Response in cmd buf: 0x%x 0x%x 0x%x 0x%x\n", ext_sd_get_rsp() 4231 int sd_pass_thru_mode(struct scsi_cmnd *srb, struct rtsx_chip *chip) sd_pass_thru_mode() argument 4233 struct sd_info *sd_card = &(chip->sd_card); sd_pass_thru_mode() 4259 if (!(CHK_BIT(chip->lun_mc, lun))) { sd_pass_thru_mode() 4260 SET_BIT(chip->lun_mc, lun); sd_pass_thru_mode() 4261 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_CHANGE); sd_pass_thru_mode() 4262 rtsx_trace(chip); sd_pass_thru_mode() 4270 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD); sd_pass_thru_mode() 4271 rtsx_trace(chip); sd_pass_thru_mode() 4285 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD); sd_pass_thru_mode() 4286 rtsx_trace(chip); sd_pass_thru_mode() 4291 if (chip->card_wp & SD_CARD) sd_pass_thru_mode() 4297 buf[15] = chip->max_lun; sd_pass_thru_mode() 4344 int sd_execute_no_data(struct scsi_cmnd *srb, struct rtsx_chip *chip) sd_execute_no_data() argument 4346 struct sd_info *sd_card = &(chip->sd_card); sd_execute_no_data() 4354 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD); sd_execute_no_data() 4355 rtsx_trace(chip); sd_execute_no_data() 4359 retval = sd_switch_clock(chip); sd_execute_no_data() 4361 rtsx_trace(chip); sd_execute_no_data() 4367 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_CHANGE); sd_execute_no_data() 4368 rtsx_trace(chip); sd_execute_no_data() 4384 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD); sd_execute_no_data() 4385 rtsx_trace(chip); sd_execute_no_data() 4390 retval = sd_switch_clock(chip); sd_execute_no_data() 4392 rtsx_trace(chip); sd_execute_no_data() 4399 retval = rtsx_write_register(chip, REG_SD_CFG1, 0x03, sd_execute_no_data() 4402 rtsx_trace(chip); sd_execute_no_data() 4407 retval = rtsx_write_register(chip, REG_SD_CFG1, 0x03, sd_execute_no_data() 4410 rtsx_trace(chip); sd_execute_no_data() 4416 retval = rtsx_write_register(chip, REG_SD_CFG1, 0x03, SD_BUS_WIDTH_4); sd_execute_no_data() 4418 rtsx_trace(chip); sd_execute_no_data() 4424 retval = sd_select_card(chip, 0); sd_execute_no_data() 4426 rtsx_trace(chip); sd_execute_no_data() 4432 retval = ext_sd_send_cmd_get_rsp(chip, APP_CMD, sd_execute_no_data() 4436 rtsx_trace(chip); sd_execute_no_data() 4441 retval = ext_sd_send_cmd_get_rsp(chip, cmd_idx, arg, rsp_type, sd_execute_no_data() 4444 rtsx_trace(chip); sd_execute_no_data() 4449 retval = sd_select_card(chip, 1); sd_execute_no_data() 4451 rtsx_trace(chip); sd_execute_no_data() 4457 retval = sd_update_lock_status(chip); sd_execute_no_data() 4459 rtsx_trace(chip); sd_execute_no_data() 4469 set_sense_type(chip, lun, SENSE_TYPE_NO_SENSE); sd_execute_no_data() 4470 release_sd_card(chip); sd_execute_no_data() 4471 do_reset_sd_card(chip); sd_execute_no_data() 4472 if (!(chip->card_ready & SD_CARD)) sd_execute_no_data() 4473 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT); sd_execute_no_data() 4475 rtsx_trace(chip); sd_execute_no_data() 4479 int sd_execute_read_data(struct scsi_cmnd *srb, struct rtsx_chip *chip) sd_execute_read_data() argument 4481 struct sd_info *sd_card = &(chip->sd_card); sd_execute_read_data() 4490 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD); sd_execute_read_data() 4491 rtsx_trace(chip); sd_execute_read_data() 4497 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_CHANGE); sd_execute_read_data() 4498 rtsx_trace(chip); sd_execute_read_data() 4502 retval = sd_switch_clock(chip); sd_execute_read_data() 4504 rtsx_trace(chip); sd_execute_read_data() 4523 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD); sd_execute_read_data() 4524 rtsx_trace(chip); sd_execute_read_data() 4529 retval = sd_switch_clock(chip); sd_execute_read_data() 4531 rtsx_trace(chip); sd_execute_read_data() 4546 dev_dbg(rtsx_dev(chip), "bus_width = %d\n", bus_width); sd_execute_read_data() 4552 retval = ext_sd_send_cmd_get_rsp(chip, SET_BLOCKLEN, data_len, sd_execute_read_data() 4555 rtsx_trace(chip); sd_execute_read_data() 4561 retval = sd_select_card(chip, 0); sd_execute_read_data() 4563 rtsx_trace(chip); sd_execute_read_data() 4569 retval = ext_sd_send_cmd_get_rsp(chip, APP_CMD, sd_execute_read_data() 4573 rtsx_trace(chip); sd_execute_read_data() 4595 rtsx_trace(chip); sd_execute_read_data() 4599 retval = sd_read_data(chip, SD_TM_NORMAL_READ, cmd, 5, byte_cnt, sd_execute_read_data() 4604 rtsx_clear_sd_error(chip); sd_execute_read_data() 4605 rtsx_trace(chip); sd_execute_read_data() 4614 rtsx_init_cmd(chip); sd_execute_read_data() 4616 trans_dma_enable(DMA_FROM_DEVICE, chip, data_len, DMA_512); sd_execute_read_data() 4618 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_H, 0xFF, sd_execute_read_data() 4620 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_L, 0xFF, sd_execute_read_data() 4622 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BLOCK_CNT_H, sd_execute_read_data() 4624 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BLOCK_CNT_L, sd_execute_read_data() 4627 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD0, 0xFF, sd_execute_read_data() 4629 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD1, 0xFF, sd_execute_read_data() 4631 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD2, 0xFF, sd_execute_read_data() 4633 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD3, 0xFF, sd_execute_read_data() 4635 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD4, 0xFF, sd_execute_read_data() 4638 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG1, 0x03, bus_width); sd_execute_read_data() 4639 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG2, 0xFF, rsp_type); sd_execute_read_data() 4641 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_TRANSFER, sd_execute_read_data() 4643 rtsx_add_cmd(chip, CHECK_REG_CMD, REG_SD_TRANSFER, sd_execute_read_data() 4646 rtsx_send_cmd_no_wait(chip); sd_execute_read_data() 4648 retval = rtsx_transfer_data(chip, SD_CARD, scsi_sglist(srb), sd_execute_read_data() 4653 rtsx_clear_sd_error(chip); sd_execute_read_data() 4654 rtsx_trace(chip); sd_execute_read_data() 4659 rtsx_trace(chip); sd_execute_read_data() 4663 retval = ext_sd_get_rsp(chip, rsp_len, sd_card->rsp, rsp_type); sd_execute_read_data() 4665 rtsx_trace(chip); sd_execute_read_data() 4670 retval = sd_select_card(chip, 1); sd_execute_read_data() 4672 rtsx_trace(chip); sd_execute_read_data() 4678 retval = ext_sd_send_cmd_get_rsp(chip, STOP_TRANSMISSION, sd_execute_read_data() 4681 rtsx_trace(chip); sd_execute_read_data() 4687 retval = ext_sd_send_cmd_get_rsp(chip, SET_BLOCKLEN, 0x200, sd_execute_read_data() 4690 rtsx_trace(chip); sd_execute_read_data() 4694 retval = rtsx_write_register(chip, SD_BYTE_CNT_H, 0xFF, 0x02); sd_execute_read_data() 4696 rtsx_trace(chip); sd_execute_read_data() 4700 retval = rtsx_write_register(chip, SD_BYTE_CNT_L, 0xFF, 0x00); sd_execute_read_data() 4702 rtsx_trace(chip); sd_execute_read_data() 4711 retval = ext_sd_send_cmd_get_rsp(chip, SEND_STATUS, sd_execute_read_data() 4719 rtsx_trace(chip); sd_execute_read_data() 4728 set_sense_type(chip, lun, SENSE_TYPE_NO_SENSE); sd_execute_read_data() 4730 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR); sd_execute_read_data() 4732 release_sd_card(chip); sd_execute_read_data() 4733 do_reset_sd_card(chip); sd_execute_read_data() 4734 if (!(chip->card_ready & SD_CARD)) sd_execute_read_data() 4735 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT); sd_execute_read_data() 4737 rtsx_trace(chip); sd_execute_read_data() 4741 int sd_execute_write_data(struct scsi_cmnd *srb, struct rtsx_chip *chip) sd_execute_write_data() argument 4743 struct sd_info *sd_card = &(chip->sd_card); sd_execute_write_data() 4757 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD); sd_execute_write_data() 4758 rtsx_trace(chip); sd_execute_write_data() 4764 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_CHANGE); sd_execute_write_data() 4765 rtsx_trace(chip); sd_execute_write_data() 4769 retval = sd_switch_clock(chip); sd_execute_write_data() 4771 rtsx_trace(chip); sd_execute_write_data() 4799 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD); sd_execute_write_data() 4800 rtsx_trace(chip); sd_execute_write_data() 4805 retval = sd_switch_clock(chip); sd_execute_write_data() 4807 rtsx_trace(chip); sd_execute_write_data() 4814 retval = rtsx_write_register(chip, REG_SD_CFG1, 0x03, sd_execute_write_data() 4817 rtsx_trace(chip); sd_execute_write_data() 4822 retval = rtsx_write_register(chip, REG_SD_CFG1, 0x03, sd_execute_write_data() 4825 rtsx_trace(chip); sd_execute_write_data() 4831 retval = rtsx_write_register(chip, REG_SD_CFG1, 0x03, SD_BUS_WIDTH_4); sd_execute_write_data() 4833 rtsx_trace(chip); sd_execute_write_data() 4839 retval = ext_sd_send_cmd_get_rsp(chip, SET_BLOCKLEN, data_len, sd_execute_write_data() 4842 rtsx_trace(chip); sd_execute_write_data() 4848 retval = sd_select_card(chip, 0); sd_execute_write_data() 4850 rtsx_trace(chip); sd_execute_write_data() 4856 retval = ext_sd_send_cmd_get_rsp(chip, APP_CMD, sd_execute_write_data() 4860 rtsx_trace(chip); sd_execute_write_data() 4865 retval = ext_sd_send_cmd_get_rsp(chip, cmd_idx, arg, rsp_type, sd_execute_write_data() 4868 rtsx_trace(chip); sd_execute_write_data() 4878 rtsx_trace(chip); sd_execute_write_data() 4890 rtsx_init_cmd(chip); sd_execute_write_data() 4892 rtsx_add_cmd(chip, WRITE_REG_CMD, sd_execute_write_data() 4895 retval = rtsx_send_cmd(chip, 0, 250); sd_execute_write_data() 4898 rtsx_trace(chip); sd_execute_write_data() 4902 rtsx_init_cmd(chip); sd_execute_write_data() 4904 rtsx_add_cmd(chip, WRITE_REG_CMD, sd_execute_write_data() 4907 retval = rtsx_send_cmd(chip, 0, 250); sd_execute_write_data() 4910 rtsx_trace(chip); sd_execute_write_data() 4914 rtsx_init_cmd(chip); sd_execute_write_data() 4916 rtsx_add_cmd(chip, WRITE_REG_CMD, sd_execute_write_data() 4919 retval = rtsx_send_cmd(chip, 0, 250); sd_execute_write_data() 4922 rtsx_trace(chip); sd_execute_write_data() 4929 rtsx_init_cmd(chip); sd_execute_write_data() 4931 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_H, 0xFF, sd_execute_write_data() 4933 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_L, 0xFF, sd_execute_write_data() 4935 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BLOCK_CNT_H, 0xFF, sd_execute_write_data() 4937 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BLOCK_CNT_L, 0xFF, sd_execute_write_data() 4939 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, 0x01, sd_execute_write_data() 4942 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_TRANSFER, 0xFF, sd_execute_write_data() 4944 rtsx_add_cmd(chip, CHECK_REG_CMD, REG_SD_TRANSFER, sd_execute_write_data() 4947 retval = rtsx_send_cmd(chip, SD_CARD, 250); sd_execute_write_data() 4949 rtsx_init_cmd(chip); sd_execute_write_data() 4951 trans_dma_enable(DMA_TO_DEVICE, chip, data_len, DMA_512); sd_execute_write_data() 4953 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_H, 0xFF, sd_execute_write_data() 4955 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_L, 0xFF, sd_execute_write_data() 4957 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BLOCK_CNT_H, sd_execute_write_data() 4959 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BLOCK_CNT_L, sd_execute_write_data() 4962 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_TRANSFER, 0xFF, sd_execute_write_data() 4964 rtsx_add_cmd(chip, CHECK_REG_CMD, REG_SD_TRANSFER, sd_execute_write_data() 4967 rtsx_send_cmd_no_wait(chip); sd_execute_write_data() 4969 retval = rtsx_transfer_data(chip, SD_CARD, scsi_sglist(srb), sd_execute_write_data() 4974 rtsx_trace(chip); sd_execute_write_data() 4980 rtsx_clear_sd_error(chip); sd_execute_write_data() 4981 rtsx_trace(chip); sd_execute_write_data() 4993 rtsx_init_cmd(chip); sd_execute_write_data() 4994 rtsx_add_cmd(chip, CHECK_REG_CMD, 0xFD30, 0x02, 0x02); sd_execute_write_data() 4996 rtsx_send_cmd(chip, SD_CARD, 250); sd_execute_write_data() 4998 retval = sd_update_lock_status(chip); sd_execute_write_data() 5000 dev_dbg(rtsx_dev(chip), "Lock command fail!\n"); sd_execute_write_data() 5007 retval = sd_select_card(chip, 1); sd_execute_write_data() 5009 rtsx_trace(chip); sd_execute_write_data() 5015 retval = ext_sd_send_cmd_get_rsp(chip, STOP_TRANSMISSION, sd_execute_write_data() 5018 rtsx_trace(chip); sd_execute_write_data() 5024 retval = ext_sd_send_cmd_get_rsp(chip, SET_BLOCKLEN, 0x200, sd_execute_write_data() 5027 rtsx_trace(chip); sd_execute_write_data() 5031 retval = rtsx_write_register(chip, SD_BYTE_CNT_H, 0xFF, 0x02); sd_execute_write_data() 5033 rtsx_trace(chip); sd_execute_write_data() 5037 rtsx_write_register(chip, SD_BYTE_CNT_L, 0xFF, 0x00); sd_execute_write_data() 5039 rtsx_trace(chip); sd_execute_write_data() 5048 retval = ext_sd_send_cmd_get_rsp(chip, SEND_STATUS, sd_execute_write_data() 5056 rtsx_trace(chip); sd_execute_write_data() 5063 dev_dbg(rtsx_dev(chip), "lock_cmd_type = 0x%x\n", sd_execute_write_data() 5072 dev_dbg(rtsx_dev(chip), "sd_lock_state = 0x%x, sd_card->sd_lock_status = 0x%x\n", sd_execute_write_data() 5081 retval = reset_sd(chip); sd_execute_write_data() 5084 rtsx_trace(chip); sd_execute_write_data() 5097 set_sense_type(chip, lun, SENSE_TYPE_NO_SENSE); sd_execute_write_data() 5098 rtsx_trace(chip); sd_execute_write_data() 5108 set_sense_type(chip, lun, SENSE_TYPE_NO_SENSE); sd_execute_write_data() 5110 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_WRITE_ERR); sd_execute_write_data() 5112 release_sd_card(chip); sd_execute_write_data() 5113 do_reset_sd_card(chip); sd_execute_write_data() 5114 if (!(chip->card_ready & SD_CARD)) sd_execute_write_data() 5115 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT); sd_execute_write_data() 5117 rtsx_trace(chip); sd_execute_write_data() 5121 int sd_get_cmd_rsp(struct scsi_cmnd *srb, struct rtsx_chip *chip) sd_get_cmd_rsp() argument 5123 struct sd_info *sd_card = &(chip->sd_card); sd_get_cmd_rsp() 5129 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD); sd_get_cmd_rsp() 5130 rtsx_trace(chip); sd_get_cmd_rsp() 5136 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_CHANGE); sd_get_cmd_rsp() 5137 rtsx_trace(chip); sd_get_cmd_rsp() 5144 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD); sd_get_cmd_rsp() 5145 rtsx_trace(chip); sd_get_cmd_rsp() 5154 dev_dbg(rtsx_dev(chip), "Response length: %d\n", data_len); sd_get_cmd_rsp() 5155 dev_dbg(rtsx_dev(chip), "Response: 0x%x 0x%x 0x%x 0x%x\n", sd_get_cmd_rsp() 5163 int sd_hw_rst(struct scsi_cmnd *srb, struct rtsx_chip *chip) sd_hw_rst() argument 5165 struct sd_info *sd_card = &(chip->sd_card); sd_hw_rst() 5170 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD); sd_hw_rst() 5171 rtsx_trace(chip); sd_hw_rst() 5177 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_CHANGE); sd_hw_rst() 5178 rtsx_trace(chip); sd_hw_rst() 5186 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD); sd_hw_rst() 5187 rtsx_trace(chip); sd_hw_rst() 5197 retval = reset_sd_card(chip); sd_hw_rst() 5202 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT); sd_hw_rst() 5204 rtsx_trace(chip); sd_hw_rst() 5213 retval = soft_reset_sd_card(chip); sd_hw_rst() 5215 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT); sd_hw_rst() 5217 rtsx_trace(chip); sd_hw_rst() 5223 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD); sd_hw_rst() 5224 rtsx_trace(chip); sd_hw_rst() 5233 void sd_cleanup_work(struct rtsx_chip *chip) sd_cleanup_work() argument 5235 struct sd_info *sd_card = &(chip->sd_card); sd_cleanup_work() 5238 dev_dbg(rtsx_dev(chip), "SD: stop transmission\n"); sd_cleanup_work() 5239 sd_stop_seq_mode(chip); sd_cleanup_work() 5244 int sd_power_off_card3v3(struct rtsx_chip *chip) sd_power_off_card3v3() argument 5248 retval = disable_card_clock(chip, SD_CARD); sd_power_off_card3v3() 5250 rtsx_trace(chip); sd_power_off_card3v3() 5254 retval = rtsx_write_register(chip, CARD_OE, SD_OUTPUT_EN, 0); sd_power_off_card3v3() 5256 rtsx_trace(chip); sd_power_off_card3v3() 5260 if (!chip->ft2_fast_mode) { sd_power_off_card3v3() 5261 retval = card_power_off(chip, SD_CARD); sd_power_off_card3v3() 5263 rtsx_trace(chip); sd_power_off_card3v3() 5270 if (chip->asic_code) { sd_power_off_card3v3() 5271 retval = sd_pull_ctl_disable(chip); sd_power_off_card3v3() 5273 rtsx_trace(chip); sd_power_off_card3v3() 5277 retval = rtsx_write_register(chip, FPGA_PULL_CTL, sd_power_off_card3v3() 5281 rtsx_trace(chip); sd_power_off_card3v3() 5289 int release_sd_card(struct rtsx_chip *chip) release_sd_card() argument 5291 struct sd_info *sd_card = &(chip->sd_card); release_sd_card() 5294 chip->card_ready &= ~SD_CARD; release_sd_card() 5295 chip->card_fail &= ~SD_CARD; release_sd_card() 5296 chip->card_wp &= ~SD_CARD; release_sd_card() 5298 chip->sd_io = 0; release_sd_card() 5299 chip->sd_int = 0; release_sd_card() 5309 retval = sd_power_off_card3v3(chip); release_sd_card() 5311 rtsx_trace(chip); release_sd_card()
H A D	rtsx_scsi.c	33 void scsi_show_command(struct rtsx_chip *chip) scsi_show_command() argument 35 struct scsi_cmnd *srb = chip->srb; scsi_show_command() 315 dev_dbg(rtsx_dev(chip), "Command %s (%d bytes)\n", scsi_show_command() 320 dev_dbg(rtsx_dev(chip), "%*ph\n", len, srb->cmnd); scsi_show_command() 324 void set_sense_type(struct rtsx_chip *chip, unsigned int lun, int sense_type) set_sense_type() argument 328 set_sense_data(chip, lun, CUR_ERR, 0x06, 0, 0x28, 0, 0, 0); set_sense_type() 332 set_sense_data(chip, lun, CUR_ERR, 0x02, 0, 0x3A, 0, 0, 0); set_sense_type() 336 set_sense_data(chip, lun, CUR_ERR, 0x05, 0, 0x21, 0, 0, 0); set_sense_type() 340 set_sense_data(chip, lun, CUR_ERR, 0x05, 0, 0x25, 0, 0, 0); set_sense_type() 344 set_sense_data(chip, lun, CUR_ERR, 0x07, 0, 0x27, 0, 0, 0); set_sense_type() 348 set_sense_data(chip, lun, CUR_ERR, 0x03, 0, 0x11, 0, 0, 0); set_sense_type() 352 set_sense_data(chip, lun, CUR_ERR, 0x03, 0, 0x0C, 0x02, 0, 0); set_sense_type() 356 set_sense_data(chip, lun, CUR_ERR, ILGAL_REQ, 0, set_sense_type() 361 set_sense_data(chip, lun, CUR_ERR, 0x02, 0, 0x04, 0x04, 0, 0); set_sense_type() 365 set_sense_data(chip, lun, CUR_ERR, 0x03, 0, 0x31, 0x01, 0, 0); set_sense_type() 370 set_sense_data(chip, lun, CUR_ERR, 0x05, 0, 0x6F, 0x02, 0, 0); set_sense_type() 374 set_sense_data(chip, lun, CUR_ERR, 0x05, 0, 0x6F, 0x00, 0, 0); set_sense_type() 378 set_sense_data(chip, lun, CUR_ERR, 0x02, 0, 0x30, 0x00, 0, 0); set_sense_type() 382 set_sense_data(chip, lun, CUR_ERR, 0x03, 0, 0x0C, 0x00, 0, 0); set_sense_type() 388 set_sense_data(chip, lun, CUR_ERR, 0x07, 0, 0x11, 0x13, 0, 0); set_sense_type() 394 set_sense_data(chip, lun, CUR_ERR, 0, 0, 0, 0, 0, 0); set_sense_type() 399 void set_sense_data(struct rtsx_chip *chip, unsigned int lun, u8 err_code, set_sense_data() argument 403 struct sense_data_t *sense = &(chip->sense_buffer[lun]); set_sense_data() 422 static int test_unit_ready(struct scsi_cmnd *srb, struct rtsx_chip *chip) test_unit_ready() argument 426 if (!check_card_ready(chip, lun)) { test_unit_ready() 427 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT); test_unit_ready() 431 if (!(CHK_BIT(chip->lun_mc, lun))) { test_unit_ready() 432 SET_BIT(chip->lun_mc, lun); test_unit_ready() 433 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_CHANGE); test_unit_ready() 438 if (get_lun_card(chip, SCSI_LUN(srb)) == SD_CARD) { test_unit_ready() 439 struct sd_info *sd_card = &(chip->sd_card); test_unit_ready() 443 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_CHANGE); test_unit_ready() 446 set_sense_type(chip, lun, test_unit_ready() 474 static int inquiry(struct scsi_cmnd *srb, struct rtsx_chip *chip) inquiry() argument 484 u8 card = get_lun_card(chip, lun); inquiry() 497 if (CHECK_LUN_MODE(chip, SD_MS_2LUN)) { inquiry() 498 if (chip->lun2card[lun] == SD_CARD) inquiry() 503 } else if (CHECK_LUN_MODE(chip, SD_MS_1LUN)) { inquiry() 511 rtsx_trace(chip); inquiry() 516 if ((chip->mspro_formatter_enable) && inquiry() 517 (chip->lun2card[lun] & MS_CARD)) inquiry() 519 if (chip->mspro_formatter_enable) inquiry() 562 static int start_stop_unit(struct scsi_cmnd *srb, struct rtsx_chip *chip) start_stop_unit() argument 578 if (check_card_ready(chip, lun)) start_stop_unit() 579 eject_card(chip, lun); start_stop_unit() 584 if (check_card_ready(chip, lun)) start_stop_unit() 586 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT); start_stop_unit() 587 rtsx_trace(chip); start_stop_unit() 593 rtsx_trace(chip); start_stop_unit() 598 static int allow_medium_removal(struct scsi_cmnd *srb, struct rtsx_chip *chip) allow_medium_removal() argument 607 set_sense_type(chip, SCSI_LUN(srb), allow_medium_removal() 609 rtsx_trace(chip); allow_medium_removal() 617 static int request_sense(struct scsi_cmnd *srb, struct rtsx_chip *chip) request_sense() argument 621 struct ms_info *ms_card = &(chip->ms_card); request_sense() 624 sense = &(chip->sense_buffer[lun]); request_sense() 626 if ((get_lun_card(chip, lun) == MS_CARD) && request_sense() 629 set_sense_type(chip, lun, SENSE_TYPE_NO_SENSE); request_sense() 634 set_sense_data(chip, lun, CUR_ERR, 0x02, 0, 0x04, 0x04, request_sense() 638 set_sense_type(chip, lun, SENSE_TYPE_FORMAT_CMD_FAILED); request_sense() 643 rtsx_set_stat(chip, RTSX_STAT_RUN); request_sense() 648 rtsx_trace(chip); request_sense() 660 set_sense_type(chip, lun, SENSE_TYPE_NO_SENSE); request_sense() 664 static void ms_mode_sense(struct rtsx_chip *chip, u8 cmd, ms_mode_sense() argument 667 struct ms_info *ms_card = &(chip->ms_card); ms_mode_sense() 689 if (check_card_ready(chip, lun)) { ms_mode_sense() 701 if (check_card_wp(chip, lun)) ms_mode_sense() 757 static int mode_sense(struct scsi_cmnd *srb, struct rtsx_chip *chip) mode_sense() argument 764 u8 card = get_lun_card(chip, lun); mode_sense() 767 if (!check_card_ready(chip, lun)) { mode_sense() 768 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT); mode_sense() 770 rtsx_trace(chip); mode_sense() 778 if ((chip->lun2card[lun] & MS_CARD)) { mode_sense() 781 if (chip->mspro_formatter_enable) mode_sense() 787 if (chip->mspro_formatter_enable) { mode_sense() 796 rtsx_trace(chip); mode_sense() 807 ms_mode_sense(chip, srb->cmnd[0], mode_sense() 813 if (check_card_wp(chip, lun)) mode_sense() 822 ms_mode_sense(chip, srb->cmnd[0], mode_sense() 829 if (check_card_wp(chip, lun)) mode_sense() 841 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD); mode_sense() 857 static int read_write(struct scsi_cmnd *srb, struct rtsx_chip *chip) read_write() argument 860 struct sd_info *sd_card = &(chip->sd_card); read_write() 867 rtsx_disable_aspm(chip); read_write() 869 if (chip->ss_en && (rtsx_get_stat(chip) == RTSX_STAT_SS)) { read_write() 870 rtsx_exit_ss(chip); read_write() 873 rtsx_set_stat(chip, RTSX_STAT_RUN); read_write() 875 if (!check_card_ready(chip, lun) || (get_card_size(chip, lun) == 0)) { read_write() 876 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT); read_write() 877 rtsx_trace(chip); read_write() 881 if (!(CHK_BIT(chip->lun_mc, lun))) { read_write() 882 SET_BIT(chip->lun_mc, lun); read_write() 883 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_CHANGE); read_write() 892 dev_dbg(rtsx_dev(chip), "SD card being erased!\n"); read_write() 893 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_READ_FORBIDDEN); read_write() 894 rtsx_trace(chip); read_write() 898 if (get_lun_card(chip, lun) == SD_CARD) { read_write() 900 dev_dbg(rtsx_dev(chip), "SD card locked!\n"); read_write() 901 set_sense_type(chip, lun, read_write() 903 rtsx_trace(chip); read_write() 926 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD); read_write() 927 rtsx_trace(chip); read_write() 935 if ((start_sec > get_card_size(chip, lun)) || read_write() 936 ((start_sec + sec_cnt) > get_card_size(chip, lun))) { read_write() 937 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_LBA_OVER_RANGE); read_write() 938 rtsx_trace(chip); read_write() 947 if (chip->rw_fail_cnt[lun] == 3) { read_write() 948 dev_dbg(rtsx_dev(chip), "read/write fail three times in succession\n"); read_write() 950 set_sense_type(chip, lun, read_write() 953 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_WRITE_ERR); read_write() 955 rtsx_trace(chip); read_write() 960 if (check_card_wp(chip, lun)) { read_write() 961 dev_dbg(rtsx_dev(chip), "Write protected card!\n"); read_write() 962 set_sense_type(chip, lun, read_write() 964 rtsx_trace(chip); read_write() 969 retval = card_rw(srb, chip, start_sec, sec_cnt); read_write() 971 if (chip->need_release & chip->lun2card[lun]) { read_write() 972 chip->rw_fail_cnt[lun] = 0; read_write() 973 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT); read_write() 975 chip->rw_fail_cnt[lun]++; read_write() 977 set_sense_type(chip, lun, read_write() 980 set_sense_type(chip, lun, read_write() 984 rtsx_trace(chip); read_write() 987 chip->rw_fail_cnt[lun] = 0; read_write() 997 static int read_format_capacity(struct scsi_cmnd *srb, struct rtsx_chip *chip) read_format_capacity() argument 1002 u8 card = get_lun_card(chip, lun); read_format_capacity() 1007 if (!check_card_ready(chip, lun)) { read_format_capacity() 1008 if (!chip->mspro_formatter_enable) { read_format_capacity() 1009 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT); read_format_capacity() 1010 rtsx_trace(chip); read_format_capacity() 1019 rtsx_trace(chip); read_format_capacity() 1028 if ((buf_len > 12) && chip->mspro_formatter_enable && read_format_capacity() 1029 (chip->lun2card[lun] & MS_CARD) && read_format_capacity() 1039 if (check_card_ready(chip, lun)) { read_format_capacity() 1040 card_size = get_card_size(chip, lun); read_format_capacity() 1078 static int read_capacity(struct scsi_cmnd *srb, struct rtsx_chip *chip) read_capacity() argument 1084 if (!check_card_ready(chip, lun)) { read_capacity() 1085 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT); read_capacity() 1086 rtsx_trace(chip); read_capacity() 1090 if (!(CHK_BIT(chip->lun_mc, lun))) { read_capacity() 1091 SET_BIT(chip->lun_mc, lun); read_capacity() 1092 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_CHANGE); read_capacity() 1098 rtsx_trace(chip); read_capacity() 1102 card_size = get_card_size(chip, lun); read_capacity() 1121 static int read_eeprom(struct scsi_cmnd *srb, struct rtsx_chip *chip) read_eeprom() argument 1127 rtsx_disable_aspm(chip); read_eeprom() 1129 if (chip->ss_en && (rtsx_get_stat(chip) == RTSX_STAT_SS)) { read_eeprom() 1130 rtsx_exit_ss(chip); read_eeprom() 1133 rtsx_set_stat(chip, RTSX_STAT_RUN); read_eeprom() 1139 rtsx_trace(chip); read_eeprom() 1143 retval = rtsx_force_power_on(chip, SSC_PDCTL); read_eeprom() 1146 set_sense_type(chip, SCSI_LUN(srb), read_eeprom() 1148 rtsx_trace(chip); read_eeprom() 1153 retval = spi_read_eeprom(chip, i, buf + i); read_eeprom() 1156 set_sense_type(chip, SCSI_LUN(srb), read_eeprom() 1158 rtsx_trace(chip); read_eeprom() 1172 static int write_eeprom(struct scsi_cmnd *srb, struct rtsx_chip *chip) write_eeprom() argument 1178 rtsx_disable_aspm(chip); write_eeprom() 1180 if (chip->ss_en && (rtsx_get_stat(chip) == RTSX_STAT_SS)) { write_eeprom() 1181 rtsx_exit_ss(chip); write_eeprom() 1184 rtsx_set_stat(chip, RTSX_STAT_RUN); write_eeprom() 1188 retval = rtsx_force_power_on(chip, SSC_PDCTL); write_eeprom() 1190 set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_MEDIA_WRITE_ERR); write_eeprom() 1191 rtsx_trace(chip); write_eeprom() 1196 retval = spi_erase_eeprom_chip(chip); write_eeprom() 1198 set_sense_type(chip, SCSI_LUN(srb), write_eeprom() 1200 rtsx_trace(chip); write_eeprom() 1208 rtsx_trace(chip); write_eeprom() 1216 retval = spi_write_eeprom(chip, i, buf[i]); write_eeprom() 1219 set_sense_type(chip, SCSI_LUN(srb), write_eeprom() 1221 rtsx_trace(chip); write_eeprom() 1232 static int read_mem(struct scsi_cmnd *srb, struct rtsx_chip *chip) read_mem() argument 1238 rtsx_disable_aspm(chip); read_mem() 1240 if (chip->ss_en && (rtsx_get_stat(chip) == RTSX_STAT_SS)) { read_mem() 1241 rtsx_exit_ss(chip); read_mem() 1244 rtsx_set_stat(chip, RTSX_STAT_RUN); read_mem() 1250 set_sense_type(chip, SCSI_LUN(srb), read_mem() 1252 rtsx_trace(chip); read_mem() 1258 rtsx_trace(chip); read_mem() 1262 retval = rtsx_force_power_on(chip, SSC_PDCTL); read_mem() 1265 set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_MEDIA_WRITE_ERR); read_mem() 1266 rtsx_trace(chip); read_mem() 1271 retval = rtsx_read_register(chip, addr + i, buf + i); read_mem() 1274 set_sense_type(chip, SCSI_LUN(srb), read_mem() 1276 rtsx_trace(chip); read_mem() 1290 static int write_mem(struct scsi_cmnd *srb, struct rtsx_chip *chip) write_mem() argument 1296 rtsx_disable_aspm(chip); write_mem() 1298 if (chip->ss_en && (rtsx_get_stat(chip) == RTSX_STAT_SS)) { write_mem() 1299 rtsx_exit_ss(chip); write_mem() 1302 rtsx_set_stat(chip, RTSX_STAT_RUN); write_mem() 1308 set_sense_type(chip, SCSI_LUN(srb), write_mem() 1310 rtsx_trace(chip); write_mem() 1317 rtsx_trace(chip); write_mem() 1324 retval = rtsx_force_power_on(chip, SSC_PDCTL); write_mem() 1327 set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_MEDIA_WRITE_ERR); write_mem() 1328 rtsx_trace(chip); write_mem() 1333 retval = rtsx_write_register(chip, addr + i, 0xFF, buf[i]); write_mem() 1336 set_sense_type(chip, SCSI_LUN(srb), write_mem() 1338 rtsx_trace(chip); write_mem() 1348 static int get_sd_csd(struct scsi_cmnd *srb, struct rtsx_chip *chip) get_sd_csd() argument 1350 struct sd_info *sd_card = &(chip->sd_card); get_sd_csd() 1353 if (!check_card_ready(chip, lun)) { get_sd_csd() 1354 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT); get_sd_csd() 1355 rtsx_trace(chip); get_sd_csd() 1359 if (get_lun_card(chip, lun) != SD_CARD) { get_sd_csd() 1360 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR); get_sd_csd() 1361 rtsx_trace(chip); get_sd_csd() 1371 static int toggle_gpio_cmd(struct scsi_cmnd *srb, struct rtsx_chip *chip) toggle_gpio_cmd() argument 1375 rtsx_disable_aspm(chip); toggle_gpio_cmd() 1377 if (chip->ss_en && (rtsx_get_stat(chip) == RTSX_STAT_SS)) { toggle_gpio_cmd() 1378 rtsx_exit_ss(chip); toggle_gpio_cmd() 1381 rtsx_set_stat(chip, RTSX_STAT_RUN); toggle_gpio_cmd() 1385 toggle_gpio(chip, gpio); toggle_gpio_cmd() 1391 static int trace_msg_cmd(struct scsi_cmnd *srb, struct rtsx_chip *chip) trace_msg_cmd() argument 1402 set_sense_type(chip, SCSI_LUN(srb), trace_msg_cmd() 1404 rtsx_trace(chip); trace_msg_cmd() 1412 rtsx_trace(chip); trace_msg_cmd() 1417 if (chip->trace_msg[chip->msg_idx].valid) trace_msg_cmd() 1420 msg_cnt = chip->msg_idx; trace_msg_cmd() 1426 dev_dbg(rtsx_dev(chip), "Trace message count is %d\n", msg_cnt); trace_msg_cmd() 1431 idx = chip->msg_idx - i; trace_msg_cmd() 1435 *(ptr++) = (u8)(chip->trace_msg[idx].line >> 8); trace_msg_cmd() 1436 *(ptr++) = (u8)(chip->trace_msg[idx].line); trace_msg_cmd() 1438 *(ptr++) = chip->trace_msg[idx].func[j]; trace_msg_cmd() 1441 *(ptr++) = chip->trace_msg[idx].file[j]; trace_msg_cmd() 1444 *(ptr++) = chip->trace_msg[idx].timeval_buf[j]; trace_msg_cmd() 1451 chip->msg_idx = 0; trace_msg_cmd() 1453 chip->trace_msg[i].valid = 0; trace_msg_cmd() 1461 static int read_host_reg(struct scsi_cmnd *srb, struct rtsx_chip *chip) read_host_reg() argument 1467 rtsx_disable_aspm(chip); read_host_reg() 1469 if (chip->ss_en && (rtsx_get_stat(chip) == RTSX_STAT_SS)) { read_host_reg() 1470 rtsx_exit_ss(chip); read_host_reg() 1473 rtsx_set_stat(chip, RTSX_STAT_RUN); read_host_reg() 1477 val = rtsx_readl(chip, addr); read_host_reg() 1478 dev_dbg(rtsx_dev(chip), "Host register (0x%x): 0x%x\n", addr, val); read_host_reg() 1492 static int write_host_reg(struct scsi_cmnd *srb, struct rtsx_chip *chip) write_host_reg() argument 1498 rtsx_disable_aspm(chip); write_host_reg() 1500 if (chip->ss_en && (rtsx_get_stat(chip) == RTSX_STAT_SS)) { write_host_reg() 1501 rtsx_exit_ss(chip); write_host_reg() 1504 rtsx_set_stat(chip, RTSX_STAT_RUN); write_host_reg() 1515 rtsx_writel(chip, addr, val); write_host_reg() 1520 static int set_variable(struct scsi_cmnd *srb, struct rtsx_chip *chip) set_variable() argument 1526 struct xd_info *xd_card = &(chip->xd_card); set_variable() 1527 struct sd_info *sd_card = &(chip->sd_card); set_variable() 1528 struct ms_info *ms_card = &(chip->ms_card); set_variable() 1544 set_sense_type(chip, lun, set_variable() 1546 rtsx_trace(chip); set_variable() 1551 chip->blink_led = 1; set_variable() 1555 chip->blink_led = 0; set_variable() 1557 rtsx_disable_aspm(chip); set_variable() 1559 if (chip->ss_en && set_variable() 1560 (rtsx_get_stat(chip) == RTSX_STAT_SS)) { set_variable() 1561 rtsx_exit_ss(chip); set_variable() 1564 rtsx_set_stat(chip, RTSX_STAT_RUN); set_variable() 1566 retval = rtsx_force_power_on(chip, SSC_PDCTL); set_variable() 1568 set_sense_type(chip, SCSI_LUN(srb), set_variable() 1570 rtsx_trace(chip); set_variable() 1574 turn_off_led(chip, LED_GPIO); set_variable() 1577 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD); set_variable() 1578 rtsx_trace(chip); set_variable() 1585 static int get_variable(struct scsi_cmnd *srb, struct rtsx_chip *chip) get_variable() argument 1590 struct xd_info *xd_card = &(chip->xd_card); get_variable() 1591 struct sd_info *sd_card = &(chip->sd_card); get_variable() 1592 struct ms_info *ms_card = &(chip->ms_card); get_variable() 1609 set_sense_type(chip, lun, get_variable() 1611 rtsx_trace(chip); get_variable() 1617 u8 tmp = chip->blink_led; get_variable() 1621 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD); get_variable() 1622 rtsx_trace(chip); get_variable() 1629 static int dma_access_ring_buffer(struct scsi_cmnd *srb, struct rtsx_chip *chip) dma_access_ring_buffer() argument 1635 rtsx_disable_aspm(chip); dma_access_ring_buffer() 1637 if (chip->ss_en && (rtsx_get_stat(chip) == RTSX_STAT_SS)) { dma_access_ring_buffer() 1638 rtsx_exit_ss(chip); dma_access_ring_buffer() 1641 rtsx_set_stat(chip, RTSX_STAT_RUN); dma_access_ring_buffer() 1647 dev_dbg(rtsx_dev(chip), "Read from device\n"); dma_access_ring_buffer() 1649 dev_dbg(rtsx_dev(chip), "Write to device\n"); dma_access_ring_buffer() 1651 retval = rtsx_transfer_data(chip, 0, scsi_sglist(srb), len, dma_access_ring_buffer() 1655 set_sense_type(chip, lun, dma_access_ring_buffer() 1658 set_sense_type(chip, lun, dma_access_ring_buffer() 1661 rtsx_trace(chip); dma_access_ring_buffer() 1669 static int get_dev_status(struct scsi_cmnd *srb, struct rtsx_chip *chip) get_dev_status() argument 1671 struct sd_info *sd_card = &(chip->sd_card); get_dev_status() 1672 struct ms_info *ms_card = &(chip->ms_card); get_dev_status() 1675 u8 card = get_lun_card(chip, lun); get_dev_status() 1683 status[0] = (u8)(chip->product_id); get_dev_status() 1684 status[1] = chip->ic_version; get_dev_status() 1686 if (chip->auto_delink_en) get_dev_status() 1696 if (chip->card_wp) get_dev_status() 1703 if (CHECK_LUN_MODE(chip, get_dev_status() 1704 SD_MS_2LUN) && (chip->lun2card[lun] == MS_CARD)) { get_dev_status() 1712 if (chip->ocp_stat & oc_now_mask) get_dev_status() 1715 if (chip->ocp_stat & oc_ever_mask) get_dev_status() 1784 dev_dbg(rtsx_dev(chip), "status[0x17] = 0x%x\n", status[0x17]); get_dev_status() 1800 static int set_chip_mode(struct scsi_cmnd *srb, struct rtsx_chip *chip) set_chip_mode() argument 1806 if (!CHECK_PID(chip, 0x5208)) { set_chip_mode() 1807 set_sense_type(chip, SCSI_LUN(srb), set_chip_mode() 1809 rtsx_trace(chip); set_chip_mode() 1816 chip->phy_debug_mode = 1; set_chip_mode() 1817 retval = rtsx_write_register(chip, CDRESUMECTL, 0x77, 0); set_chip_mode() 1819 rtsx_trace(chip); set_chip_mode() 1823 rtsx_disable_bus_int(chip); set_chip_mode() 1825 retval = rtsx_read_phy_register(chip, 0x1C, &reg); set_chip_mode() 1827 rtsx_trace(chip); set_chip_mode() 1832 retval = rtsx_write_phy_register(chip, 0x1C, reg); set_chip_mode() 1834 rtsx_trace(chip); set_chip_mode() 1838 chip->phy_debug_mode = 0; set_chip_mode() 1839 retval = rtsx_write_register(chip, CDRESUMECTL, 0x77, 0x77); set_chip_mode() 1841 rtsx_trace(chip); set_chip_mode() 1845 rtsx_enable_bus_int(chip); set_chip_mode() 1847 retval = rtsx_read_phy_register(chip, 0x1C, &reg); set_chip_mode() 1849 rtsx_trace(chip); set_chip_mode() 1854 retval = rtsx_write_phy_register(chip, 0x1C, reg); set_chip_mode() 1856 rtsx_trace(chip); set_chip_mode() 1864 static int rw_mem_cmd_buf(struct scsi_cmnd *srb, struct rtsx_chip *chip) rw_mem_cmd_buf() argument 1871 rtsx_disable_aspm(chip); rw_mem_cmd_buf() 1873 if (chip->ss_en && (rtsx_get_stat(chip) == RTSX_STAT_SS)) { rw_mem_cmd_buf() 1874 rtsx_exit_ss(chip); rw_mem_cmd_buf() 1877 rtsx_set_stat(chip, RTSX_STAT_RUN); rw_mem_cmd_buf() 1881 rtsx_init_cmd(chip); rw_mem_cmd_buf() 1887 set_sense_type(chip, lun, rw_mem_cmd_buf() 1889 rtsx_trace(chip); rw_mem_cmd_buf() 1895 rtsx_add_cmd(chip, cmd_type, addr, mask, value); rw_mem_cmd_buf() 1899 retval = rtsx_send_cmd(chip, 0, 1000); rw_mem_cmd_buf() 1904 value = *(rtsx_get_cmd_data(chip) + idx); rw_mem_cmd_buf() 1906 set_sense_type(chip, lun, rw_mem_cmd_buf() 1908 rtsx_trace(chip); rw_mem_cmd_buf() 1916 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD); rw_mem_cmd_buf() 1917 rtsx_trace(chip); rw_mem_cmd_buf() 1922 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_WRITE_ERR); rw_mem_cmd_buf() 1923 rtsx_trace(chip); rw_mem_cmd_buf() 1930 static int suit_cmd(struct scsi_cmnd *srb, struct rtsx_chip *chip) suit_cmd() argument 1939 result = rw_mem_cmd_buf(srb, chip); suit_cmd() 1948 static int read_phy_register(struct scsi_cmnd *srb, struct rtsx_chip *chip) read_phy_register() argument 1955 rtsx_disable_aspm(chip); read_phy_register() 1957 if (chip->ss_en && (rtsx_get_stat(chip) == RTSX_STAT_SS)) { read_phy_register() 1958 rtsx_exit_ss(chip); read_phy_register() 1961 rtsx_set_stat(chip, RTSX_STAT_RUN); read_phy_register() 1972 rtsx_trace(chip); read_phy_register() 1976 retval = rtsx_force_power_on(chip, SSC_PDCTL); read_phy_register() 1979 set_sense_type(chip, SCSI_LUN(srb), read_phy_register() 1981 rtsx_trace(chip); read_phy_register() 1986 retval = rtsx_read_phy_register(chip, addr + i, &val); read_phy_register() 1989 set_sense_type(chip, SCSI_LUN(srb), read_phy_register() 1991 rtsx_trace(chip); read_phy_register() 2010 static int write_phy_register(struct scsi_cmnd *srb, struct rtsx_chip *chip) write_phy_register() argument 2017 rtsx_disable_aspm(chip); write_phy_register() 2019 if (chip->ss_en && (rtsx_get_stat(chip) == RTSX_STAT_SS)) { write_phy_register() 2020 rtsx_exit_ss(chip); write_phy_register() 2023 rtsx_set_stat(chip, RTSX_STAT_RUN); write_phy_register() 2037 rtsx_trace(chip); write_phy_register() 2044 retval = rtsx_force_power_on(chip, SSC_PDCTL); write_phy_register() 2047 set_sense_type(chip, SCSI_LUN(srb), write_phy_register() 2049 rtsx_trace(chip); write_phy_register() 2055 retval = rtsx_write_phy_register(chip, addr + i, val); write_phy_register() 2058 set_sense_type(chip, SCSI_LUN(srb), write_phy_register() 2060 rtsx_trace(chip); write_phy_register() 2071 static int erase_eeprom2(struct scsi_cmnd *srb, struct rtsx_chip *chip) erase_eeprom2() argument 2077 rtsx_disable_aspm(chip); erase_eeprom2() 2079 if (chip->ss_en && (rtsx_get_stat(chip) == RTSX_STAT_SS)) { erase_eeprom2() 2080 rtsx_exit_ss(chip); erase_eeprom2() 2083 rtsx_set_stat(chip, RTSX_STAT_RUN); erase_eeprom2() 2085 retval = rtsx_force_power_on(chip, SSC_PDCTL); erase_eeprom2() 2087 set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_MEDIA_WRITE_ERR); erase_eeprom2() 2088 rtsx_trace(chip); erase_eeprom2() 2096 retval = spi_erase_eeprom_chip(chip); erase_eeprom2() 2098 set_sense_type(chip, SCSI_LUN(srb), erase_eeprom2() 2100 rtsx_trace(chip); erase_eeprom2() 2104 retval = spi_erase_eeprom_byte(chip, addr); erase_eeprom2() 2106 set_sense_type(chip, SCSI_LUN(srb), erase_eeprom2() 2108 rtsx_trace(chip); erase_eeprom2() 2112 set_sense_type(chip, SCSI_LUN(srb), erase_eeprom2() 2114 rtsx_trace(chip); erase_eeprom2() 2121 static int read_eeprom2(struct scsi_cmnd *srb, struct rtsx_chip *chip) read_eeprom2() argument 2127 rtsx_disable_aspm(chip); read_eeprom2() 2129 if (chip->ss_en && (rtsx_get_stat(chip) == RTSX_STAT_SS)) { read_eeprom2() 2130 rtsx_exit_ss(chip); read_eeprom2() 2133 rtsx_set_stat(chip, RTSX_STAT_RUN); read_eeprom2() 2140 rtsx_trace(chip); read_eeprom2() 2144 retval = rtsx_force_power_on(chip, SSC_PDCTL); read_eeprom2() 2147 set_sense_type(chip, SCSI_LUN(srb), read_eeprom2() 2149 rtsx_trace(chip); read_eeprom2() 2154 retval = spi_read_eeprom(chip, addr + i, buf + i); read_eeprom2() 2157 set_sense_type(chip, SCSI_LUN(srb), read_eeprom2() 2159 rtsx_trace(chip); read_eeprom2() 2173 static int write_eeprom2(struct scsi_cmnd *srb, struct rtsx_chip *chip) write_eeprom2() argument 2179 rtsx_disable_aspm(chip); write_eeprom2() 2181 if (chip->ss_en && (rtsx_get_stat(chip) == RTSX_STAT_SS)) { write_eeprom2() 2182 rtsx_exit_ss(chip); write_eeprom2() 2185 rtsx_set_stat(chip, RTSX_STAT_RUN); write_eeprom2() 2193 rtsx_trace(chip); write_eeprom2() 2200 retval = rtsx_force_power_on(chip, SSC_PDCTL); write_eeprom2() 2203 set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_MEDIA_WRITE_ERR); write_eeprom2() 2204 rtsx_trace(chip); write_eeprom2() 2209 retval = spi_write_eeprom(chip, addr + i, buf[i]); write_eeprom2() 2212 set_sense_type(chip, SCSI_LUN(srb), write_eeprom2() 2214 rtsx_trace(chip); write_eeprom2() 2224 static int read_efuse(struct scsi_cmnd *srb, struct rtsx_chip *chip) read_efuse() argument 2230 rtsx_disable_aspm(chip); read_efuse() 2232 if (chip->ss_en && (rtsx_get_stat(chip) == RTSX_STAT_SS)) { read_efuse() 2233 rtsx_exit_ss(chip); read_efuse() 2236 rtsx_set_stat(chip, RTSX_STAT_RUN); read_efuse() 2243 rtsx_trace(chip); read_efuse() 2247 retval = rtsx_force_power_on(chip, SSC_PDCTL); read_efuse() 2250 set_sense_type(chip, SCSI_LUN(srb), read_efuse() 2252 rtsx_trace(chip); read_efuse() 2257 retval = rtsx_read_efuse(chip, addr + i, buf + i); read_efuse() 2260 set_sense_type(chip, SCSI_LUN(srb), read_efuse() 2262 rtsx_trace(chip); read_efuse() 2276 static int write_efuse(struct scsi_cmnd *srb, struct rtsx_chip *chip) write_efuse() argument 2283 rtsx_disable_aspm(chip); write_efuse() 2285 if (chip->ss_en && (rtsx_get_stat(chip) == RTSX_STAT_SS)) { write_efuse() 2286 rtsx_exit_ss(chip); write_efuse() 2289 rtsx_set_stat(chip, RTSX_STAT_RUN); write_efuse() 2297 rtsx_trace(chip); write_efuse() 2304 retval = rtsx_force_power_on(chip, SSC_PDCTL); write_efuse() 2307 rtsx_trace(chip); write_efuse() 2311 if (chip->asic_code) { write_efuse() 2312 retval = rtsx_read_phy_register(chip, 0x08, &val); write_efuse() 2315 rtsx_trace(chip); write_efuse() 2319 retval = rtsx_write_register(chip, PWR_GATE_CTRL, write_efuse() 2323 rtsx_trace(chip); write_efuse() 2329 retval = rtsx_write_phy_register(chip, 0x08, write_efuse() 2330 0x4C00 | chip->phy_voltage); write_efuse() 2333 rtsx_trace(chip); write_efuse() 2337 retval = rtsx_write_register(chip, PWR_GATE_CTRL, write_efuse() 2341 rtsx_trace(chip); write_efuse() 2348 retval = card_power_on(chip, SPI_CARD); write_efuse() 2351 rtsx_trace(chip); write_efuse() 2358 retval = rtsx_write_efuse(chip, addr + i, buf[i]); write_efuse() 2360 set_sense_type(chip, SCSI_LUN(srb), write_efuse() 2363 rtsx_trace(chip); write_efuse() 2371 retval = card_power_off(chip, SPI_CARD); write_efuse() 2373 rtsx_trace(chip); write_efuse() 2377 if (chip->asic_code) { write_efuse() 2378 retval = rtsx_write_register(chip, PWR_GATE_CTRL, write_efuse() 2381 rtsx_trace(chip); write_efuse() 2387 retval = rtsx_write_phy_register(chip, 0x08, val); write_efuse() 2389 rtsx_trace(chip); write_efuse() 2393 retval = rtsx_write_register(chip, PWR_GATE_CTRL, write_efuse() 2396 rtsx_trace(chip); write_efuse() 2404 static int read_cfg_byte(struct scsi_cmnd *srb, struct rtsx_chip *chip) read_cfg_byte() argument 2412 rtsx_disable_aspm(chip); read_cfg_byte() 2414 if (chip->ss_en && (rtsx_get_stat(chip) == RTSX_STAT_SS)) { read_cfg_byte() 2415 rtsx_exit_ss(chip); read_cfg_byte() 2418 rtsx_set_stat(chip, RTSX_STAT_RUN); read_cfg_byte() 2424 dev_dbg(rtsx_dev(chip), "%s: func = %d, addr = 0x%x, len = %d\n", read_cfg_byte() 2427 if (CHK_SDIO_EXIST(chip) && !CHK_SDIO_IGNORED(chip)) read_cfg_byte() 2433 set_sense_type(chip, SCSI_LUN(srb), read_cfg_byte() 2435 rtsx_trace(chip); read_cfg_byte() 2441 rtsx_trace(chip); read_cfg_byte() 2445 retval = rtsx_read_cfg_seq(chip, func, addr, buf, len); read_cfg_byte() 2447 set_sense_type(chip, SCSI_LUN(srb), read_cfg_byte() 2450 rtsx_trace(chip); read_cfg_byte() 2463 static int write_cfg_byte(struct scsi_cmnd *srb, struct rtsx_chip *chip) write_cfg_byte() argument 2471 rtsx_disable_aspm(chip); write_cfg_byte() 2473 if (chip->ss_en && (rtsx_get_stat(chip) == RTSX_STAT_SS)) { write_cfg_byte() 2474 rtsx_exit_ss(chip); write_cfg_byte() 2477 rtsx_set_stat(chip, RTSX_STAT_RUN); write_cfg_byte() 2483 dev_dbg(rtsx_dev(chip), "%s: func = %d, addr = 0x%x\n", write_cfg_byte() 2486 if (CHK_SDIO_EXIST(chip) && !CHK_SDIO_IGNORED(chip)) write_cfg_byte() 2492 set_sense_type(chip, SCSI_LUN(srb), write_cfg_byte() 2494 rtsx_trace(chip); write_cfg_byte() 2501 rtsx_trace(chip); write_cfg_byte() 2508 retval = rtsx_write_cfg_seq(chip, func, addr, buf, len); write_cfg_byte() 2510 set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_MEDIA_WRITE_ERR); write_cfg_byte() 2512 rtsx_trace(chip); write_cfg_byte() 2521 static int app_cmd(struct scsi_cmnd *srb, struct rtsx_chip *chip) app_cmd() argument 2528 result = read_write(srb, chip); app_cmd() 2532 result = read_host_reg(srb, chip); app_cmd() 2536 result = write_host_reg(srb, chip); app_cmd() 2540 result = get_variable(srb, chip); app_cmd() 2544 result = set_variable(srb, chip); app_cmd() 2549 result = dma_access_ring_buffer(srb, chip); app_cmd() 2553 result = read_phy_register(srb, chip); app_cmd() 2557 result = write_phy_register(srb, chip); app_cmd() 2561 result = erase_eeprom2(srb, chip); app_cmd() 2565 result = read_eeprom2(srb, chip); app_cmd() 2569 result = write_eeprom2(srb, chip); app_cmd() 2573 result = read_efuse(srb, chip); app_cmd() 2577 result = write_efuse(srb, chip); app_cmd() 2581 result = read_cfg_byte(srb, chip); app_cmd() 2585 result = write_cfg_byte(srb, chip); app_cmd() 2589 result = set_chip_mode(srb, chip); app_cmd() 2593 result = suit_cmd(srb, chip); app_cmd() 2597 result = get_dev_status(srb, chip); app_cmd() 2601 set_sense_type(chip, SCSI_LUN(srb), app_cmd() 2603 rtsx_trace(chip); app_cmd() 2611 static int read_status(struct scsi_cmnd *srb, struct rtsx_chip *chip) read_status() argument 2617 rtsx_status[0] = (u8)(chip->vendor_id >> 8); read_status() 2618 rtsx_status[1] = (u8)(chip->vendor_id); read_status() 2620 rtsx_status[2] = (u8)(chip->product_id >> 8); read_status() 2621 rtsx_status[3] = (u8)(chip->product_id); read_status() 2625 if (CHECK_LUN_MODE(chip, SD_MS_2LUN)) { read_status() 2626 if (chip->lun2card[lun] == SD_CARD) read_status() 2631 if (chip->card_exist) { read_status() 2632 if (chip->card_exist & XD_CARD) read_status() 2634 else if (chip->card_exist & SD_CARD) read_status() 2636 else if (chip->card_exist & MS_CARD) read_status() 2645 if (CHECK_LUN_MODE(chip, SD_MS_2LUN)) read_status() 2650 rtsx_status[7] = (u8)(chip->product_id); read_status() 2651 rtsx_status[8] = chip->ic_version; read_status() 2653 if (check_card_exist(chip, lun)) read_status() 2658 if (CHECK_LUN_MODE(chip, SD_MS_2LUN)) read_status() 2663 if (CHECK_LUN_MODE(chip, SD_MS_2LUN)) { read_status() 2664 if (chip->lun2card[lun] == SD_CARD) read_status() 2672 if (check_card_ready(chip, lun)) read_status() 2677 if (get_lun_card(chip, lun) == XD_CARD) { read_status() 2679 } else if (get_lun_card(chip, lun) == SD_CARD) { read_status() 2680 struct sd_info *sd_card = &(chip->sd_card); read_status() 2695 } else if (get_lun_card(chip, lun) == MS_CARD) { read_status() 2696 struct ms_info *ms_card = &(chip->ms_card); read_status() 2710 if (CHECK_LUN_MODE(chip, DEFAULT_SINGLE)) { read_status() 2712 if (chip->sd_io && chip->sd_int) read_status() 2720 if (chip->lun2card[lun] == SD_CARD) read_status() 2728 if (CHK_SDIO_EXIST(chip) && !CHK_SDIO_IGNORED(chip)) read_status() 2740 static int get_card_bus_width(struct scsi_cmnd *srb, struct rtsx_chip *chip) get_card_bus_width() argument 2745 if (!check_card_ready(chip, lun)) { get_card_bus_width() 2746 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT); get_card_bus_width() 2747 rtsx_trace(chip); get_card_bus_width() 2751 card = get_lun_card(chip, lun); get_card_bus_width() 2753 bus_width = chip->card_bus_width[lun]; get_card_bus_width() 2755 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR); get_card_bus_width() 2756 rtsx_trace(chip); get_card_bus_width() 2766 static int spi_vendor_cmd(struct scsi_cmnd *srb, struct rtsx_chip *chip) spi_vendor_cmd() argument 2772 if (CHECK_PID(chip, 0x5208) || CHECK_PID(chip, 0x5288)) { spi_vendor_cmd() 2773 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD); spi_vendor_cmd() 2774 rtsx_trace(chip); spi_vendor_cmd() 2778 rtsx_disable_aspm(chip); spi_vendor_cmd() 2780 if (chip->ss_en && (rtsx_get_stat(chip) == RTSX_STAT_SS)) { spi_vendor_cmd() 2781 rtsx_exit_ss(chip); spi_vendor_cmd() 2784 rtsx_set_stat(chip, RTSX_STAT_RUN); spi_vendor_cmd() 2786 rtsx_force_power_on(chip, SSC_PDCTL); spi_vendor_cmd() 2788 rtsx_read_register(chip, CARD_GPIO_DIR, &gpio_dir); spi_vendor_cmd() 2789 rtsx_write_register(chip, CARD_GPIO_DIR, 0x07, gpio_dir & 0x06); spi_vendor_cmd() 2793 result = spi_get_status(srb, chip); spi_vendor_cmd() 2797 result = spi_set_parameter(srb, chip); spi_vendor_cmd() 2801 result = spi_read_flash_id(srb, chip); spi_vendor_cmd() 2805 result = spi_read_flash(srb, chip); spi_vendor_cmd() 2809 result = spi_write_flash(srb, chip); spi_vendor_cmd() 2813 result = spi_write_flash_status(srb, chip); spi_vendor_cmd() 2817 result = spi_erase_flash(srb, chip); spi_vendor_cmd() 2821 rtsx_write_register(chip, CARD_GPIO_DIR, 0x07, gpio_dir); spi_vendor_cmd() 2823 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD); spi_vendor_cmd() 2824 rtsx_trace(chip); spi_vendor_cmd() 2828 rtsx_write_register(chip, CARD_GPIO_DIR, 0x07, gpio_dir); spi_vendor_cmd() 2831 rtsx_trace(chip); spi_vendor_cmd() 2838 static int vendor_cmnd(struct scsi_cmnd *srb, struct rtsx_chip *chip) vendor_cmnd() argument 2844 result = read_status(srb, chip); vendor_cmnd() 2848 result = read_mem(srb, chip); vendor_cmnd() 2852 result = write_mem(srb, chip); vendor_cmnd() 2856 result = read_eeprom(srb, chip); vendor_cmnd() 2860 result = write_eeprom(srb, chip); vendor_cmnd() 2864 result = toggle_gpio_cmd(srb, chip); vendor_cmnd() 2868 result = get_sd_csd(srb, chip); vendor_cmnd() 2872 result = get_card_bus_width(srb, chip); vendor_cmnd() 2877 result = trace_msg_cmd(srb, chip); vendor_cmnd() 2882 result = app_cmd(srb, chip); vendor_cmnd() 2886 result = spi_vendor_cmd(srb, chip); vendor_cmnd() 2890 set_sense_type(chip, SCSI_LUN(srb), vendor_cmnd() 2892 rtsx_trace(chip); vendor_cmnd() 2900 void led_shine(struct scsi_cmnd *srb, struct rtsx_chip *chip) led_shine() argument 2912 if (chip->rw_cap[lun] >= GPIO_TOGGLE_THRESHOLD) { led_shine() 2913 toggle_gpio(chip, LED_GPIO); led_shine() 2914 chip->rw_cap[lun] = 0; led_shine() 2916 chip->rw_cap[lun] += sec_cnt; led_shine() 2921 static int ms_format_cmnd(struct scsi_cmnd *srb, struct rtsx_chip *chip) ms_format_cmnd() argument 2923 struct ms_info *ms_card = &(chip->ms_card); ms_format_cmnd() 2928 if (get_lun_card(chip, lun) != MS_CARD) { ms_format_cmnd() 2929 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_LUN_NOT_SUPPORT); ms_format_cmnd() 2930 rtsx_trace(chip); ms_format_cmnd() 2937 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD); ms_format_cmnd() 2938 rtsx_trace(chip); ms_format_cmnd() 2942 rtsx_disable_aspm(chip); ms_format_cmnd() 2944 if (chip->ss_en && (rtsx_get_stat(chip) == RTSX_STAT_SS)) { ms_format_cmnd() 2945 rtsx_exit_ss(chip); ms_format_cmnd() 2948 if (!check_card_ready(chip, lun) || ms_format_cmnd() 2949 (get_card_size(chip, lun) == 0)) { ms_format_cmnd() 2950 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT); ms_format_cmnd() 2951 rtsx_trace(chip); ms_format_cmnd() 2955 rtsx_set_stat(chip, RTSX_STAT_RUN); ms_format_cmnd() 2962 if (!(chip->card_ready & MS_CARD)) { ms_format_cmnd() 2963 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT); ms_format_cmnd() 2964 rtsx_trace(chip); ms_format_cmnd() 2968 if (chip->card_wp & MS_CARD) { ms_format_cmnd() 2969 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_WRITE_PROTECT); ms_format_cmnd() 2970 rtsx_trace(chip); ms_format_cmnd() 2975 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_LUN_NOT_SUPPORT); ms_format_cmnd() 2976 rtsx_trace(chip); ms_format_cmnd() 2980 retval = mspro_format(srb, chip, MS_SHORT_DATA_LEN, quick_format); ms_format_cmnd() 2982 set_sense_type(chip, lun, SENSE_TYPE_FORMAT_CMD_FAILED); ms_format_cmnd() 2983 rtsx_trace(chip); ms_format_cmnd() 2992 static int get_ms_information(struct scsi_cmnd *srb, struct rtsx_chip *chip) get_ms_information() argument 2994 struct ms_info *ms_card = &(chip->ms_card); get_ms_information() 3001 if (!check_card_ready(chip, lun)) { get_ms_information() 3002 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT); get_ms_information() 3003 rtsx_trace(chip); get_ms_information() 3006 if (get_lun_card(chip, lun) != MS_CARD) { get_ms_information() 3007 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_LUN_NOT_SUPPORT); get_ms_information() 3008 rtsx_trace(chip); get_ms_information() 3015 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD); get_ms_information() 3016 rtsx_trace(chip); get_ms_information() 3024 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD); get_ms_information() 3025 rtsx_trace(chip); get_ms_information() 3036 rtsx_trace(chip); get_ms_information() 3093 static int ms_sp_cmnd(struct scsi_cmnd *srb, struct rtsx_chip *chip) ms_sp_cmnd() argument 3098 retval = ms_format_cmnd(srb, chip); ms_sp_cmnd() 3101 retval = get_ms_information(srb, chip); ms_sp_cmnd() 3108 static int sd_extention_cmnd(struct scsi_cmnd *srb, struct rtsx_chip *chip) sd_extention_cmnd() argument 3113 rtsx_disable_aspm(chip); sd_extention_cmnd() 3115 if (chip->ss_en && (rtsx_get_stat(chip) == RTSX_STAT_SS)) { sd_extention_cmnd() 3116 rtsx_exit_ss(chip); sd_extention_cmnd() 3119 rtsx_set_stat(chip, RTSX_STAT_RUN); sd_extention_cmnd() 3121 sd_cleanup_work(chip); sd_extention_cmnd() 3123 if (!check_card_ready(chip, lun)) { sd_extention_cmnd() 3124 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT); sd_extention_cmnd() 3125 rtsx_trace(chip); sd_extention_cmnd() 3128 if (get_lun_card(chip, lun) != SD_CARD) { sd_extention_cmnd() 3129 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_LUN_NOT_SUPPORT); sd_extention_cmnd() 3130 rtsx_trace(chip); sd_extention_cmnd() 3136 result = sd_pass_thru_mode(srb, chip); sd_extention_cmnd() 3140 result = sd_execute_no_data(srb, chip); sd_extention_cmnd() 3144 result = sd_execute_read_data(srb, chip); sd_extention_cmnd() 3148 result = sd_execute_write_data(srb, chip); sd_extention_cmnd() 3152 result = sd_get_cmd_rsp(srb, chip); sd_extention_cmnd() 3156 result = sd_hw_rst(srb, chip); sd_extention_cmnd() 3160 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD); sd_extention_cmnd() 3161 rtsx_trace(chip); sd_extention_cmnd() 3170 static int mg_report_key(struct scsi_cmnd *srb, struct rtsx_chip *chip) mg_report_key() argument 3172 struct ms_info *ms_card = &(chip->ms_card); mg_report_key() 3177 rtsx_disable_aspm(chip); mg_report_key() 3179 if (chip->ss_en && (rtsx_get_stat(chip) == RTSX_STAT_SS)) { mg_report_key() 3180 rtsx_exit_ss(chip); mg_report_key() 3183 rtsx_set_stat(chip, RTSX_STAT_RUN); mg_report_key() 3185 ms_cleanup_work(chip); mg_report_key() 3187 if (!check_card_ready(chip, lun)) { mg_report_key() 3188 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT); mg_report_key() 3189 rtsx_trace(chip); mg_report_key() 3192 if (get_lun_card(chip, lun) != MS_CARD) { mg_report_key() 3193 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_LUN_NOT_SUPPORT); mg_report_key() 3194 rtsx_trace(chip); mg_report_key() 3199 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD); mg_report_key() 3200 rtsx_trace(chip); mg_report_key() 3205 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM); mg_report_key() 3206 rtsx_trace(chip); mg_report_key() 3211 dev_dbg(rtsx_dev(chip), "key_format = 0x%x\n", key_format); mg_report_key() 3218 retval = mg_get_local_EKB(srb, chip); mg_report_key() 3220 rtsx_trace(chip); mg_report_key() 3225 set_sense_type(chip, lun, mg_report_key() 3227 rtsx_trace(chip); mg_report_key() 3236 retval = mg_get_rsp_chg(srb, chip); mg_report_key() 3238 rtsx_trace(chip); mg_report_key() 3243 set_sense_type(chip, lun, mg_report_key() 3245 rtsx_trace(chip); mg_report_key() 3259 retval = mg_get_ICV(srb, chip); mg_report_key() 3261 rtsx_trace(chip); mg_report_key() 3266 set_sense_type(chip, lun, mg_report_key() 3268 rtsx_trace(chip); mg_report_key() 3274 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD); mg_report_key() 3275 rtsx_trace(chip); mg_report_key() 3283 static int mg_send_key(struct scsi_cmnd *srb, struct rtsx_chip *chip) mg_send_key() argument 3285 struct ms_info *ms_card = &(chip->ms_card); mg_send_key() 3290 rtsx_disable_aspm(chip); mg_send_key() 3292 if (chip->ss_en && (rtsx_get_stat(chip) == RTSX_STAT_SS)) { mg_send_key() 3293 rtsx_exit_ss(chip); mg_send_key() 3296 rtsx_set_stat(chip, RTSX_STAT_RUN); mg_send_key() 3298 ms_cleanup_work(chip); mg_send_key() 3300 if (!check_card_ready(chip, lun)) { mg_send_key() 3301 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT); mg_send_key() 3302 rtsx_trace(chip); mg_send_key() 3305 if (check_card_wp(chip, lun)) { mg_send_key() 3306 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_WRITE_PROTECT); mg_send_key() 3307 rtsx_trace(chip); mg_send_key() 3310 if (get_lun_card(chip, lun) != MS_CARD) { mg_send_key() 3311 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_LUN_NOT_SUPPORT); mg_send_key() 3312 rtsx_trace(chip); mg_send_key() 3317 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD); mg_send_key() 3318 rtsx_trace(chip); mg_send_key() 3323 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM); mg_send_key() 3324 rtsx_trace(chip); mg_send_key() 3329 dev_dbg(rtsx_dev(chip), "key_format = 0x%x\n", key_format); mg_send_key() 3336 retval = mg_set_leaf_id(srb, chip); mg_send_key() 3338 rtsx_trace(chip); mg_send_key() 3343 set_sense_type(chip, lun, mg_send_key() 3345 rtsx_trace(chip); mg_send_key() 3354 retval = mg_chg(srb, chip); mg_send_key() 3356 rtsx_trace(chip); mg_send_key() 3361 set_sense_type(chip, lun, mg_send_key() 3363 rtsx_trace(chip); mg_send_key() 3372 retval = mg_rsp(srb, chip); mg_send_key() 3374 rtsx_trace(chip); mg_send_key() 3379 set_sense_type(chip, lun, mg_send_key() 3381 rtsx_trace(chip); mg_send_key() 3395 retval = mg_set_ICV(srb, chip); mg_send_key() 3397 rtsx_trace(chip); mg_send_key() 3402 set_sense_type(chip, lun, mg_send_key() 3404 rtsx_trace(chip); mg_send_key() 3410 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD); mg_send_key() 3411 rtsx_trace(chip); mg_send_key() 3420 int rtsx_scsi_handler(struct scsi_cmnd *srb, struct rtsx_chip *chip) rtsx_scsi_handler() argument 3423 struct sd_info *sd_card = &(chip->sd_card); rtsx_scsi_handler() 3425 struct ms_info *ms_card = &(chip->ms_card); rtsx_scsi_handler() 3439 set_sense_data(chip, lun, CUR_ERR, rtsx_scsi_handler() 3441 rtsx_trace(chip); rtsx_scsi_handler() 3447 if ((get_lun_card(chip, lun) == MS_CARD) && rtsx_scsi_handler() 3452 set_sense_data(chip, lun, CUR_ERR, 0x02, 0, 0x04, 0x04, rtsx_scsi_handler() 3454 rtsx_trace(chip); rtsx_scsi_handler() 3464 result = read_write(srb, chip); rtsx_scsi_handler() 3466 led_shine(srb, chip); rtsx_scsi_handler() 3471 result = test_unit_ready(srb, chip); rtsx_scsi_handler() 3475 result = inquiry(srb, chip); rtsx_scsi_handler() 3479 result = read_capacity(srb, chip); rtsx_scsi_handler() 3483 result = start_stop_unit(srb, chip); rtsx_scsi_handler() 3487 result = allow_medium_removal(srb, chip); rtsx_scsi_handler() 3491 result = request_sense(srb, chip); rtsx_scsi_handler() 3496 result = mode_sense(srb, chip); rtsx_scsi_handler() 3500 result = read_format_capacity(srb, chip); rtsx_scsi_handler() 3504 result = vendor_cmnd(srb, chip); rtsx_scsi_handler() 3508 result = ms_sp_cmnd(srb, chip); rtsx_scsi_handler() 3518 result = sd_extention_cmnd(srb, chip); rtsx_scsi_handler() 3524 result = mg_report_key(srb, chip); rtsx_scsi_handler() 3528 result = mg_send_key(srb, chip); rtsx_scsi_handler() 3539 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD); rtsx_scsi_handler()
H A D	rtsx.c	130 struct rtsx_chip *chip = dev->chip; queuecommand_lck() local 133 if (chip->srb != NULL) { queuecommand_lck() 134 dev_err(&dev->pci->dev, "Error: chip->srb = %p\n", queuecommand_lck() 135 chip->srb); queuecommand_lck() 140 if (rtsx_chk_stat(chip, RTSX_STAT_DISCONNECT)) { queuecommand_lck() 149 chip->srb = srb; queuecommand_lck() 166 struct rtsx_chip *chip = dev->chip; command_abort() local 173 if (chip->srb != srb) { command_abort() 179 rtsx_set_stat(chip, RTSX_STAT_ABORT); command_abort() 266 struct rtsx_chip *chip = dev->chip; rtsx_acquire_irq() local 268 dev_info(&dev->pci->dev, "%s: chip->msi_en = %d, pci->irq = %d\n", rtsx_acquire_irq() 269 __func__, chip->msi_en, dev->pci->irq); rtsx_acquire_irq() 272 chip->msi_en ? 0 : IRQF_SHARED, rtsx_acquire_irq() 281 pci_intx(dev->pci, !chip->msi_en); rtsx_acquire_irq() 311 struct rtsx_chip *chip; rtsx_suspend() local 319 chip = dev->chip; rtsx_suspend() 321 rtsx_do_before_power_down(chip, PM_S3); rtsx_suspend() 329 if (chip->msi_en) rtsx_suspend() 346 struct rtsx_chip *chip; rtsx_resume() local 351 chip = dev->chip; rtsx_resume() 368 if (chip->msi_en) { rtsx_resume() 370 chip->msi_en = 0; rtsx_resume() 379 rtsx_write_register(chip, HOST_SLEEP_STATE, 0x03, 0x00); rtsx_resume() 380 rtsx_init_chip(chip); rtsx_resume() 392 struct rtsx_chip *chip; rtsx_shutdown() local 397 chip = dev->chip; rtsx_shutdown() 399 rtsx_do_before_power_down(chip, PM_S1); rtsx_shutdown() 407 if (chip->msi_en) rtsx_shutdown() 416 struct rtsx_chip *chip = dev->chip; rtsx_control_thread() local 427 if (rtsx_chk_stat(chip, RTSX_STAT_DISCONNECT)) { rtsx_control_thread() 437 if (rtsx_chk_stat(chip, RTSX_STAT_ABORT)) { rtsx_control_thread() 438 chip->srb->result = DID_ABORT << 16; rtsx_control_thread() 447 if (chip->srb->sc_data_direction == DMA_BIDIRECTIONAL) { rtsx_control_thread() 449 chip->srb->result = DID_ERROR << 16; rtsx_control_thread() 455 else if (chip->srb->device->id) { rtsx_control_thread() 457 chip->srb->device->id, rtsx_control_thread() 458 (u8)chip->srb->device->lun); rtsx_control_thread() 459 chip->srb->result = DID_BAD_TARGET << 16; rtsx_control_thread() 462 else if (chip->srb->device->lun > chip->max_lun) { rtsx_control_thread() 464 chip->srb->device->id, rtsx_control_thread() 465 (u8)chip->srb->device->lun); rtsx_control_thread() 466 chip->srb->result = DID_BAD_TARGET << 16; rtsx_control_thread() 471 scsi_show_command(chip); rtsx_control_thread() 472 rtsx_invoke_transport(chip->srb, chip); rtsx_control_thread() 479 if (!chip->srb) rtsx_control_thread() 483 else if (chip->srb->result != DID_ABORT << 16) { rtsx_control_thread() 484 chip->srb->scsi_done(chip->srb); rtsx_control_thread() 490 if (rtsx_chk_stat(chip, RTSX_STAT_ABORT)) { rtsx_control_thread() 493 rtsx_set_stat(chip, RTSX_STAT_IDLE); rtsx_control_thread() 497 chip->srb = NULL; rtsx_control_thread() 525 struct rtsx_chip *chip = dev->chip; rtsx_polling_thread() local 526 struct sd_info *sd_card = &(chip->sd_card); rtsx_polling_thread() 527 struct xd_info *xd_card = &(chip->xd_card); rtsx_polling_thread() 528 struct ms_info *ms_card = &(chip->ms_card); rtsx_polling_thread() 546 if (rtsx_chk_stat(chip, RTSX_STAT_DISCONNECT)) { rtsx_polling_thread() 554 mspro_polling_format_status(chip); rtsx_polling_thread() 559 rtsx_polling_func(chip); rtsx_polling_thread() 574 struct rtsx_chip *chip; rtsx_interrupt() local 579 chip = dev->chip; rtsx_interrupt() 583 if (!chip) rtsx_interrupt() 588 retval = rtsx_pre_handle_interrupt(chip); rtsx_interrupt() 591 if (chip->int_reg == 0xFFFFFFFF) rtsx_interrupt() 596 status = chip->int_reg; rtsx_interrupt() 611 RTSX_SET_DELINK(chip); rtsx_interrupt() 653 dev->chip->host_cmds_ptr = NULL; rtsx_release_resources() 654 dev->chip->host_sg_tbl_ptr = NULL; rtsx_release_resources() 659 if (dev->chip->msi_en) rtsx_release_resources() 667 rtsx_release_chip(dev->chip); rtsx_release_resources() 668 kfree(dev->chip); rtsx_release_resources() 676 struct rtsx_chip *chip = dev->chip; quiesce_and_remove_host() local 682 rtsx_set_stat(chip, RTSX_STAT_DISCONNECT); quiesce_and_remove_host() 695 if (chip->srb) { quiesce_and_remove_host() 696 chip->srb->result = DID_NO_CONNECT << 16; quiesce_and_remove_host() 698 chip->srb->scsi_done(dev->chip->srb); quiesce_and_remove_host() 699 chip->srb = NULL; quiesce_and_remove_host() 722 struct rtsx_chip *chip = dev->chip; rtsx_scan_thread() local 730 rtsx_chk_stat(chip, RTSX_STAT_DISCONNECT), rtsx_scan_thread() 735 if (!rtsx_chk_stat(chip, RTSX_STAT_DISCONNECT)) { rtsx_scan_thread() 746 static void rtsx_init_options(struct rtsx_chip *chip) rtsx_init_options() argument 748 chip->vendor_id = chip->rtsx->pci->vendor; rtsx_init_options() 749 chip->product_id = chip->rtsx->pci->device; rtsx_init_options() 750 chip->adma_mode = 1; rtsx_init_options() 751 chip->lun_mc = 0; rtsx_init_options() 752 chip->driver_first_load = 1; rtsx_init_options() 754 chip->sdio_in_charge = 0; rtsx_init_options() 757 chip->mspro_formatter_enable = 1; rtsx_init_options() 758 chip->ignore_sd = 0; rtsx_init_options() 759 chip->use_hw_setting = 0; rtsx_init_options() 760 chip->lun_mode = DEFAULT_SINGLE; rtsx_init_options() 761 chip->auto_delink_en = auto_delink_en; rtsx_init_options() 762 chip->ss_en = ss_en; rtsx_init_options() 763 chip->ss_idle_period = ss_interval * 1000; rtsx_init_options() 764 chip->remote_wakeup_en = 0; rtsx_init_options() 765 chip->aspm_l0s_l1_en = aspm_l0s_l1_en; rtsx_init_options() 766 chip->dynamic_aspm = 1; rtsx_init_options() 767 chip->fpga_sd_sdr104_clk = CLK_200; rtsx_init_options() 768 chip->fpga_sd_ddr50_clk = CLK_100; rtsx_init_options() 769 chip->fpga_sd_sdr50_clk = CLK_100; rtsx_init_options() 770 chip->fpga_sd_hs_clk = CLK_100; rtsx_init_options() 771 chip->fpga_mmc_52m_clk = CLK_80; rtsx_init_options() 772 chip->fpga_ms_hg_clk = CLK_80; rtsx_init_options() 773 chip->fpga_ms_4bit_clk = CLK_80; rtsx_init_options() 774 chip->fpga_ms_1bit_clk = CLK_40; rtsx_init_options() 775 chip->asic_sd_sdr104_clk = 203; rtsx_init_options() 776 chip->asic_sd_sdr50_clk = 98; rtsx_init_options() 777 chip->asic_sd_ddr50_clk = 98; rtsx_init_options() 778 chip->asic_sd_hs_clk = 98; rtsx_init_options() 779 chip->asic_mmc_52m_clk = 98; rtsx_init_options() 780 chip->asic_ms_hg_clk = 117; rtsx_init_options() 781 chip->asic_ms_4bit_clk = 78; rtsx_init_options() 782 chip->asic_ms_1bit_clk = 39; rtsx_init_options() 783 chip->ssc_depth_sd_sdr104 = SSC_DEPTH_2M; rtsx_init_options() 784 chip->ssc_depth_sd_sdr50 = SSC_DEPTH_2M; rtsx_init_options() 785 chip->ssc_depth_sd_ddr50 = SSC_DEPTH_1M; rtsx_init_options() 786 chip->ssc_depth_sd_hs = SSC_DEPTH_1M; rtsx_init_options() 787 chip->ssc_depth_mmc_52m = SSC_DEPTH_1M; rtsx_init_options() 788 chip->ssc_depth_ms_hg = SSC_DEPTH_1M; rtsx_init_options() 789 chip->ssc_depth_ms_4bit = SSC_DEPTH_512K; rtsx_init_options() 790 chip->ssc_depth_low_speed = SSC_DEPTH_512K; rtsx_init_options() 791 chip->ssc_en = 1; rtsx_init_options() 792 chip->sd_speed_prior = 0x01040203; rtsx_init_options() 793 chip->sd_current_prior = 0x00010203; rtsx_init_options() 794 chip->sd_ctl = SD_PUSH_POINT_AUTO | rtsx_init_options() 797 chip->sd_ddr_tx_phase = 0; rtsx_init_options() 798 chip->mmc_ddr_tx_phase = 1; rtsx_init_options() 799 chip->sd_default_tx_phase = 15; rtsx_init_options() 800 chip->sd_default_rx_phase = 15; rtsx_init_options() 801 chip->pmos_pwr_on_interval = 200; rtsx_init_options() 802 chip->sd_voltage_switch_delay = 1000; rtsx_init_options() 803 chip->ms_power_class_en = 3; rtsx_init_options() 805 chip->sd_400mA_ocp_thd = 1; rtsx_init_options() 806 chip->sd_800mA_ocp_thd = 5; rtsx_init_options() 807 chip->ms_ocp_thd = 2; rtsx_init_options() 809 chip->card_drive_sel = 0x55; rtsx_init_options() 810 chip->sd30_drive_sel_1v8 = 0x03; rtsx_init_options() 811 chip->sd30_drive_sel_3v3 = 0x01; rtsx_init_options() 813 chip->do_delink_before_power_down = 1; rtsx_init_options() 814 chip->auto_power_down = 1; rtsx_init_options() 815 chip->polling_config = 0; rtsx_init_options() 817 chip->force_clkreq_0 = 1; rtsx_init_options() 818 chip->ft2_fast_mode = 0; rtsx_init_options() 820 chip->sdio_retry_cnt = 1; rtsx_init_options() 822 chip->xd_timeout = 2000; rtsx_init_options() 823 chip->sd_timeout = 10000; rtsx_init_options() 824 chip->ms_timeout = 2000; rtsx_init_options() 825 chip->mspro_timeout = 15000; rtsx_init_options() 827 chip->power_down_in_ss = 1; rtsx_init_options() 829 chip->sdr104_en = 1; rtsx_init_options() 830 chip->sdr50_en = 1; rtsx_init_options() 831 chip->ddr50_en = 1; rtsx_init_options() 833 chip->delink_stage1_step = 100; rtsx_init_options() 834 chip->delink_stage2_step = 40; rtsx_init_options() 835 chip->delink_stage3_step = 20; rtsx_init_options() 837 chip->auto_delink_in_L1 = 1; rtsx_init_options() 838 chip->blink_led = 1; rtsx_init_options() 839 chip->msi_en = msi_en; rtsx_init_options() 840 chip->hp_watch_bios_hotplug = 0; rtsx_init_options() 841 chip->max_payload = 0; rtsx_init_options() 842 chip->phy_voltage = 0; rtsx_init_options() 844 chip->support_ms_8bit = 1; rtsx_init_options() 845 chip->s3_pwr_off_delay = 1000; rtsx_init_options() 887 dev->chip = kzalloc(sizeof(struct rtsx_chip), GFP_KERNEL); rtsx_probe() 888 if (dev->chip == NULL) { rtsx_probe() 929 dev->chip->host_cmds_ptr = dev->rtsx_resv_buf; rtsx_probe() 930 dev->chip->host_cmds_addr = dev->rtsx_resv_buf_addr; rtsx_probe() 931 dev->chip->host_sg_tbl_ptr = dev->rtsx_resv_buf + HOST_CMDS_BUF_LEN; rtsx_probe() 932 dev->chip->host_sg_tbl_addr = dev->rtsx_resv_buf_addr + rtsx_probe() 935 dev->chip->rtsx = dev; rtsx_probe() 937 rtsx_init_options(dev->chip); rtsx_probe() 941 if (dev->chip->msi_en) { rtsx_probe() 943 dev->chip->msi_en = 0; rtsx_probe() 954 rtsx_init_chip(dev->chip); rtsx_probe() 959 host->max_lun = dev->chip->max_lun; rtsx_probe()
/linux-4.1.27/sound/pci/echoaudio/
H A D	echo3g_dsp.c	31 static int load_asic(struct echoaudio *chip); 32 static int dsp_set_digital_mode(struct echoaudio *chip, u8 mode); 33 static int set_digital_mode(struct echoaudio *chip, u8 mode); 34 static int check_asic_status(struct echoaudio *chip); 35 static int set_sample_rate(struct echoaudio *chip, u32 rate); 36 static int set_input_clock(struct echoaudio *chip, u16 clock); 37 static int set_professional_spdif(struct echoaudio *chip, char prof); 38 static int set_phantom_power(struct echoaudio *chip, char on); 39 static int write_control_reg(struct echoaudio *chip, u32 ctl, u32 frq, 44 static int init_hw(struct echoaudio *chip, u16 device_id, u16 subdevice_id) init_hw() argument 52 if ((err = init_dsp_comm_page(chip))) { init_hw() 53 dev_err(chip->card->dev, init_hw() 58 chip->comm_page->e3g_frq_register = init_hw() 60 chip->device_id = device_id; init_hw() 61 chip->subdevice_id = subdevice_id; init_hw() 62 chip->bad_board = TRUE; init_hw() 63 chip->has_midi = TRUE; init_hw() 64 chip->dsp_code_to_load = FW_ECHO3G_DSP; init_hw() 68 err = load_firmware(chip); init_hw() 73 chip->input_clock_types = ECHO_CLOCK_BIT_INTERNAL | init_hw() 76 chip->card_name = "Gina3G"; init_hw() 77 chip->px_digital_out = chip->bx_digital_out = 6; init_hw() 78 chip->px_analog_in = chip->bx_analog_in = 14; init_hw() 79 chip->px_digital_in = chip->bx_digital_in = 16; init_hw() 80 chip->px_num = chip->bx_num = 24; init_hw() 81 chip->has_phantom_power = TRUE; init_hw() 82 chip->hasnt_input_nominal_level = TRUE; init_hw() 84 chip->input_clock_types = ECHO_CLOCK_BIT_INTERNAL | init_hw() 88 chip->card_name = "Layla3G"; init_hw() 89 chip->px_digital_out = chip->bx_digital_out = 8; init_hw() 90 chip->px_analog_in = chip->bx_analog_in = 16; init_hw() 91 chip->px_digital_in = chip->bx_digital_in = 24; init_hw() 92 chip->px_num = chip->bx_num = 32; init_hw() 97 chip->digital_modes = ECHOCAPS_HAS_DIGITAL_MODE_SPDIF_RCA | init_hw() 106 static int set_mixer_defaults(struct echoaudio *chip) set_mixer_defaults() argument 108 chip->digital_mode = DIGITAL_MODE_SPDIF_RCA; set_mixer_defaults() 109 chip->professional_spdif = FALSE; set_mixer_defaults() 110 chip->non_audio_spdif = FALSE; set_mixer_defaults() 111 chip->bad_board = FALSE; set_mixer_defaults() 112 chip->phantom_power = FALSE; set_mixer_defaults() 113 return init_line_levels(chip); set_mixer_defaults() 118 static int set_phantom_power(struct echoaudio *chip, char on) set_phantom_power() argument 120 u32 control_reg = le32_to_cpu(chip->comm_page->control_register); set_phantom_power() 127 chip->phantom_power = on; set_phantom_power() 128 return write_control_reg(chip, control_reg, set_phantom_power() 129 le32_to_cpu(chip->comm_page->e3g_frq_register), set_phantom_power()
H A D	gina20_dsp.c	32 static int set_professional_spdif(struct echoaudio *chip, char prof); 33 static int update_flags(struct echoaudio *chip); 36 static int init_hw(struct echoaudio *chip, u16 device_id, u16 subdevice_id) init_hw() argument 43 if ((err = init_dsp_comm_page(chip))) { init_hw() 44 dev_err(chip->card->dev, init_hw() 49 chip->device_id = device_id; init_hw() 50 chip->subdevice_id = subdevice_id; init_hw() 51 chip->bad_board = TRUE; init_hw() 52 chip->dsp_code_to_load = FW_GINA20_DSP; init_hw() 53 chip->spdif_status = GD_SPDIF_STATUS_UNDEF; init_hw() 54 chip->clock_state = GD_CLOCK_UNDEF; init_hw() 57 chip->asic_loaded = TRUE; init_hw() 58 chip->input_clock_types = ECHO_CLOCK_BIT_INTERNAL | init_hw() 61 if ((err = load_firmware(chip)) < 0) init_hw() 63 chip->bad_board = FALSE; init_hw() 70 static int set_mixer_defaults(struct echoaudio *chip) set_mixer_defaults() argument 72 chip->professional_spdif = FALSE; set_mixer_defaults() 73 return init_line_levels(chip); set_mixer_defaults() 78 static u32 detect_input_clocks(const struct echoaudio *chip) detect_input_clocks() argument 84 clocks_from_dsp = le32_to_cpu(chip->comm_page->status_clocks); detect_input_clocks() 97 static int load_asic(struct echoaudio *chip) load_asic() argument 104 static int set_sample_rate(struct echoaudio *chip, u32 rate) set_sample_rate() argument 108 if (wait_handshake(chip)) set_sample_rate() 126 if (chip->clock_state == clock_state) set_sample_rate() 128 if (spdif_status == chip->spdif_status) set_sample_rate() 131 chip->comm_page->sample_rate = cpu_to_le32(rate); set_sample_rate() 132 chip->comm_page->gd_clock_state = clock_state; set_sample_rate() 133 chip->comm_page->gd_spdif_status = spdif_status; set_sample_rate() 134 chip->comm_page->gd_resampler_state = 3; /* magic number - should always be 3 */ set_sample_rate() 138 chip->clock_state = clock_state; set_sample_rate() 140 chip->spdif_status = spdif_status; set_sample_rate() 141 chip->sample_rate = rate; set_sample_rate() 143 clear_handshake(chip); set_sample_rate() 144 return send_vector(chip, DSP_VC_SET_GD_AUDIO_STATE); set_sample_rate() 149 static int set_input_clock(struct echoaudio *chip, u16 clock) set_input_clock() argument 155 chip->clock_state = GD_CLOCK_UNDEF; set_input_clock() 156 chip->spdif_status = GD_SPDIF_STATUS_UNDEF; set_input_clock() 157 set_sample_rate(chip, chip->sample_rate); set_input_clock() 158 chip->input_clock = clock; set_input_clock() 161 chip->comm_page->gd_clock_state = GD_CLOCK_SPDIFIN; set_input_clock() 162 chip->comm_page->gd_spdif_status = GD_SPDIF_STATUS_NOCHANGE; set_input_clock() 163 clear_handshake(chip); set_input_clock() 164 send_vector(chip, DSP_VC_SET_GD_AUDIO_STATE); set_input_clock() 165 chip->clock_state = GD_CLOCK_SPDIFIN; set_input_clock() 166 chip->input_clock = clock; set_input_clock() 178 static int set_input_gain(struct echoaudio *chip, u16 input, int gain) set_input_gain() argument 180 if (snd_BUG_ON(input >= num_busses_in(chip))) set_input_gain() 183 if (wait_handshake(chip)) set_input_gain() 186 chip->input_gain[input] = gain; set_input_gain() 188 chip->comm_page->line_in_level[input] = gain; set_input_gain() 195 static int update_flags(struct echoaudio *chip) update_flags() argument 197 if (wait_handshake(chip)) update_flags() 199 clear_handshake(chip); update_flags() 200 return send_vector(chip, DSP_VC_UPDATE_FLAGS); update_flags() 205 static int set_professional_spdif(struct echoaudio *chip, char prof) set_professional_spdif() argument 208 chip->comm_page->flags |= set_professional_spdif() 211 chip->comm_page->flags &= set_professional_spdif() 213 chip->professional_spdif = prof; set_professional_spdif() 214 return update_flags(chip); set_professional_spdif()
H A D	mia_dsp.c	32 static int set_input_clock(struct echoaudio *chip, u16 clock); 33 static int set_professional_spdif(struct echoaudio *chip, char prof); 34 static int update_flags(struct echoaudio *chip); 35 static int set_vmixer_gain(struct echoaudio *chip, u16 output, u16 pipe, 37 static int update_vmixer_level(struct echoaudio *chip); 40 static int init_hw(struct echoaudio *chip, u16 device_id, u16 subdevice_id) init_hw() argument 47 if ((err = init_dsp_comm_page(chip))) { init_hw() 48 dev_err(chip->card->dev, init_hw() 53 chip->device_id = device_id; init_hw() 54 chip->subdevice_id = subdevice_id; init_hw() 55 chip->bad_board = TRUE; init_hw() 56 chip->dsp_code_to_load = FW_MIA_DSP; init_hw() 59 chip->asic_loaded = TRUE; init_hw() 61 chip->has_midi = TRUE; init_hw() 62 chip->input_clock_types = ECHO_CLOCK_BIT_INTERNAL | init_hw() 65 if ((err = load_firmware(chip)) < 0) init_hw() 67 chip->bad_board = FALSE; init_hw() 74 static int set_mixer_defaults(struct echoaudio *chip) set_mixer_defaults() argument 76 return init_line_levels(chip); set_mixer_defaults() 81 static u32 detect_input_clocks(const struct echoaudio *chip) detect_input_clocks() argument 87 clocks_from_dsp = le32_to_cpu(chip->comm_page->status_clocks); detect_input_clocks() 100 static int load_asic(struct echoaudio *chip) load_asic() argument 107 static int set_sample_rate(struct echoaudio *chip, u32 rate) set_sample_rate() argument 128 dev_err(chip->card->dev, set_sample_rate() 134 if (chip->input_clock == ECHO_CLOCK_SPDIF) set_sample_rate() 138 if (control_reg != le32_to_cpu(chip->comm_page->control_register)) { set_sample_rate() 139 if (wait_handshake(chip)) set_sample_rate() 142 chip->comm_page->sample_rate = cpu_to_le32(rate); /* ignored by the DSP */ set_sample_rate() 143 chip->comm_page->control_register = cpu_to_le32(control_reg); set_sample_rate() 144 chip->sample_rate = rate; set_sample_rate() 146 clear_handshake(chip); set_sample_rate() 147 return send_vector(chip, DSP_VC_UPDATE_CLOCKS); set_sample_rate() 154 static int set_input_clock(struct echoaudio *chip, u16 clock) set_input_clock() argument 156 dev_dbg(chip->card->dev, "set_input_clock(%d)\n", clock); set_input_clock() 161 chip->input_clock = clock; set_input_clock() 162 return set_sample_rate(chip, chip->sample_rate); set_input_clock() 168 static int set_vmixer_gain(struct echoaudio *chip, u16 output, u16 pipe, set_vmixer_gain() argument 173 if (snd_BUG_ON(pipe >= num_pipes_out(chip) || set_vmixer_gain() 174 output >= num_busses_out(chip))) set_vmixer_gain() 177 if (wait_handshake(chip)) set_vmixer_gain() 180 chip->vmixer_gain[output][pipe] = gain; set_vmixer_gain() 181 index = output * num_pipes_out(chip) + pipe; set_vmixer_gain() 182 chip->comm_page->vmixer[index] = gain; set_vmixer_gain() 184 dev_dbg(chip->card->dev, set_vmixer_gain() 192 static int update_vmixer_level(struct echoaudio *chip) update_vmixer_level() argument 194 if (wait_handshake(chip)) update_vmixer_level() 196 clear_handshake(chip); update_vmixer_level() 197 return send_vector(chip, DSP_VC_SET_VMIXER_GAIN); update_vmixer_level() 203 static int update_flags(struct echoaudio *chip) update_flags() argument 205 if (wait_handshake(chip)) update_flags() 207 clear_handshake(chip); update_flags() 208 return send_vector(chip, DSP_VC_UPDATE_FLAGS); update_flags() 213 static int set_professional_spdif(struct echoaudio *chip, char prof) set_professional_spdif() argument 215 dev_dbg(chip->card->dev, "set_professional_spdif %d\n", prof); set_professional_spdif() 217 chip->comm_page->flags |= set_professional_spdif() 220 chip->comm_page->flags &= set_professional_spdif() 222 chip->professional_spdif = prof; set_professional_spdif() 223 return update_flags(chip); set_professional_spdif()
H A D	indigo_dsp.c	32 static int set_vmixer_gain(struct echoaudio *chip, u16 output, u16 pipe, 34 static int update_vmixer_level(struct echoaudio *chip); 37 static int init_hw(struct echoaudio *chip, u16 device_id, u16 subdevice_id) init_hw() argument 44 if ((err = init_dsp_comm_page(chip))) { init_hw() 45 dev_err(chip->card->dev, init_hw() 50 chip->device_id = device_id; init_hw() 51 chip->subdevice_id = subdevice_id; init_hw() 52 chip->bad_board = TRUE; init_hw() 53 chip->dsp_code_to_load = FW_INDIGO_DSP; init_hw() 56 chip->asic_loaded = TRUE; init_hw() 57 chip->input_clock_types = ECHO_CLOCK_BIT_INTERNAL; init_hw() 59 if ((err = load_firmware(chip)) < 0) init_hw() 61 chip->bad_board = FALSE; init_hw() 68 static int set_mixer_defaults(struct echoaudio *chip) set_mixer_defaults() argument 70 return init_line_levels(chip); set_mixer_defaults() 75 static u32 detect_input_clocks(const struct echoaudio *chip) detect_input_clocks() argument 83 static int load_asic(struct echoaudio *chip) load_asic() argument 90 static int set_sample_rate(struct echoaudio *chip, u32 rate) set_sample_rate() argument 111 dev_err(chip->card->dev, set_sample_rate() 117 if (control_reg != le32_to_cpu(chip->comm_page->control_register)) { set_sample_rate() 118 if (wait_handshake(chip)) set_sample_rate() 121 chip->comm_page->sample_rate = cpu_to_le32(rate); /* ignored by the DSP */ set_sample_rate() 122 chip->comm_page->control_register = cpu_to_le32(control_reg); set_sample_rate() 123 chip->sample_rate = rate; set_sample_rate() 125 clear_handshake(chip); set_sample_rate() 126 return send_vector(chip, DSP_VC_UPDATE_CLOCKS); set_sample_rate() 134 static int set_vmixer_gain(struct echoaudio *chip, u16 output, u16 pipe, set_vmixer_gain() argument 139 if (snd_BUG_ON(pipe >= num_pipes_out(chip) || set_vmixer_gain() 140 output >= num_busses_out(chip))) set_vmixer_gain() 143 if (wait_handshake(chip)) set_vmixer_gain() 146 chip->vmixer_gain[output][pipe] = gain; set_vmixer_gain() 147 index = output * num_pipes_out(chip) + pipe; set_vmixer_gain() 148 chip->comm_page->vmixer[index] = gain; set_vmixer_gain() 150 dev_dbg(chip->card->dev, set_vmixer_gain() 158 static int update_vmixer_level(struct echoaudio *chip) update_vmixer_level() argument 160 if (wait_handshake(chip)) update_vmixer_level() 162 clear_handshake(chip); update_vmixer_level() 163 return send_vector(chip, DSP_VC_SET_VMIXER_GAIN); update_vmixer_level()
H A D	indigodj_dsp.c	32 static int set_vmixer_gain(struct echoaudio *chip, u16 output, u16 pipe, 34 static int update_vmixer_level(struct echoaudio *chip); 37 static int init_hw(struct echoaudio *chip, u16 device_id, u16 subdevice_id) init_hw() argument 44 if ((err = init_dsp_comm_page(chip))) { init_hw() 45 dev_err(chip->card->dev, init_hw() 50 chip->device_id = device_id; init_hw() 51 chip->subdevice_id = subdevice_id; init_hw() 52 chip->bad_board = TRUE; init_hw() 53 chip->dsp_code_to_load = FW_INDIGO_DJ_DSP; init_hw() 56 chip->asic_loaded = TRUE; init_hw() 57 chip->input_clock_types = ECHO_CLOCK_BIT_INTERNAL; init_hw() 59 if ((err = load_firmware(chip)) < 0) init_hw() 61 chip->bad_board = FALSE; init_hw() 68 static int set_mixer_defaults(struct echoaudio *chip) set_mixer_defaults() argument 70 return init_line_levels(chip); set_mixer_defaults() 75 static u32 detect_input_clocks(const struct echoaudio *chip) detect_input_clocks() argument 83 static int load_asic(struct echoaudio *chip) load_asic() argument 90 static int set_sample_rate(struct echoaudio *chip, u32 rate) set_sample_rate() argument 111 dev_err(chip->card->dev, set_sample_rate() 117 if (control_reg != le32_to_cpu(chip->comm_page->control_register)) { set_sample_rate() 118 if (wait_handshake(chip)) set_sample_rate() 121 chip->comm_page->sample_rate = cpu_to_le32(rate); /* ignored by the DSP */ set_sample_rate() 122 chip->comm_page->control_register = cpu_to_le32(control_reg); set_sample_rate() 123 chip->sample_rate = rate; set_sample_rate() 125 clear_handshake(chip); set_sample_rate() 126 return send_vector(chip, DSP_VC_UPDATE_CLOCKS); set_sample_rate() 134 static int set_vmixer_gain(struct echoaudio *chip, u16 output, u16 pipe, set_vmixer_gain() argument 139 if (snd_BUG_ON(pipe >= num_pipes_out(chip) || set_vmixer_gain() 140 output >= num_busses_out(chip))) set_vmixer_gain() 143 if (wait_handshake(chip)) set_vmixer_gain() 146 chip->vmixer_gain[output][pipe] = gain; set_vmixer_gain() 147 index = output * num_pipes_out(chip) + pipe; set_vmixer_gain() 148 chip->comm_page->vmixer[index] = gain; set_vmixer_gain() 150 dev_dbg(chip->card->dev, set_vmixer_gain() 158 static int update_vmixer_level(struct echoaudio *chip) update_vmixer_level() argument 160 if (wait_handshake(chip)) update_vmixer_level() 162 clear_handshake(chip); update_vmixer_level() 163 return send_vector(chip, DSP_VC_SET_VMIXER_GAIN); update_vmixer_level()
H A D	midi.c	37 static int enable_midi_input(struct echoaudio *chip, char enable) enable_midi_input() argument 39 dev_dbg(chip->card->dev, "enable_midi_input(%d)\n", enable); enable_midi_input() 41 if (wait_handshake(chip)) enable_midi_input() 45 chip->mtc_state = MIDI_IN_STATE_NORMAL; enable_midi_input() 46 chip->comm_page->flags |= enable_midi_input() 49 chip->comm_page->flags &= enable_midi_input() 52 clear_handshake(chip); enable_midi_input() 53 return send_vector(chip, DSP_VC_UPDATE_FLAGS); enable_midi_input() 60 static int write_midi(struct echoaudio *chip, u8 *data, int bytes) write_midi() argument 65 if (wait_handshake(chip)) write_midi() 69 if (! (get_dsp_register(chip, CHI32_STATUS_REG) & CHI32_STATUS_REG_HF4)) write_midi() 72 chip->comm_page->midi_output[0] = bytes; write_midi() 73 memcpy(&chip->comm_page->midi_output[1], data, bytes); write_midi() 74 chip->comm_page->midi_out_free_count = 0; write_midi() 75 clear_handshake(chip); write_midi() 76 send_vector(chip, DSP_VC_MIDI_WRITE); write_midi() 77 dev_dbg(chip->card->dev, "write_midi: %d\n", bytes); write_midi() 90 static inline int mtc_process_data(struct echoaudio *chip, short midi_byte) mtc_process_data() argument 92 switch (chip->mtc_state) { mtc_process_data() 95 chip->mtc_state = MIDI_IN_STATE_TS_HIGH; mtc_process_data() 98 chip->mtc_state = MIDI_IN_STATE_TS_LOW; mtc_process_data() 102 chip->mtc_state = MIDI_IN_STATE_F1_DATA; mtc_process_data() 106 chip->mtc_state = MIDI_IN_STATE_NORMAL; mtc_process_data() 116 static int midi_service_irq(struct echoaudio *chip) midi_service_irq() argument 121 count = le16_to_cpu(chip->comm_page->midi_input[0]); midi_service_irq() 131 midi_byte = le16_to_cpu(chip->comm_page->midi_input[i]); midi_service_irq() 139 if (mtc_process_data(chip, midi_byte) == MIDI_IN_SKIP_DATA) midi_service_irq() 142 chip->midi_buffer[received++] = (u8)midi_byte; midi_service_irq() 157 struct echoaudio *chip = substream->rmidi->private_data; snd_echo_midi_input_open() local 159 chip->midi_in = substream; snd_echo_midi_input_open() 168 struct echoaudio *chip = substream->rmidi->private_data; snd_echo_midi_input_trigger() local 170 if (up != chip->midi_input_enabled) { snd_echo_midi_input_trigger() 171 spin_lock_irq(&chip->lock); snd_echo_midi_input_trigger() 172 enable_midi_input(chip, up); snd_echo_midi_input_trigger() 173 spin_unlock_irq(&chip->lock); snd_echo_midi_input_trigger() 174 chip->midi_input_enabled = up; snd_echo_midi_input_trigger() 182 struct echoaudio *chip = substream->rmidi->private_data; snd_echo_midi_input_close() local 184 chip->midi_in = NULL; snd_echo_midi_input_close() 192 struct echoaudio *chip = substream->rmidi->private_data; snd_echo_midi_output_open() local 194 chip->tinuse = 0; snd_echo_midi_output_open() 195 chip->midi_full = 0; snd_echo_midi_output_open() 196 chip->midi_out = substream; snd_echo_midi_output_open() 204 struct echoaudio *chip = (struct echoaudio *)data; snd_echo_midi_output_write() local 212 spin_lock_irqsave(&chip->lock, flags); snd_echo_midi_output_write() 213 chip->midi_full = 0; snd_echo_midi_output_write() 214 if (!snd_rawmidi_transmit_empty(chip->midi_out)) { snd_echo_midi_output_write() 215 bytes = snd_rawmidi_transmit_peek(chip->midi_out, buf, snd_echo_midi_output_write() 217 dev_dbg(chip->card->dev, "Try to send %d bytes...\n", bytes); snd_echo_midi_output_write() 218 sent = write_midi(chip, buf, bytes); snd_echo_midi_output_write() 220 dev_err(chip->card->dev, snd_echo_midi_output_write() 224 chip->midi_full = 1; snd_echo_midi_output_write() 226 dev_dbg(chip->card->dev, "%d bytes sent\n", sent); snd_echo_midi_output_write() 227 snd_rawmidi_transmit_ack(chip->midi_out, sent); snd_echo_midi_output_write() 231 dev_dbg(chip->card->dev, "Full\n"); snd_echo_midi_output_write() 233 chip->midi_full = 1; snd_echo_midi_output_write() 238 if (!snd_rawmidi_transmit_empty(chip->midi_out) && chip->tinuse) { snd_echo_midi_output_write() 242 mod_timer(&chip->timer, jiffies + (time * HZ + 999) / 1000); snd_echo_midi_output_write() 243 dev_dbg(chip->card->dev, snd_echo_midi_output_write() 246 spin_unlock_irqrestore(&chip->lock, flags); snd_echo_midi_output_write() 254 struct echoaudio *chip = substream->rmidi->private_data; snd_echo_midi_output_trigger() local 256 dev_dbg(chip->card->dev, "snd_echo_midi_output_trigger(%d)\n", up); snd_echo_midi_output_trigger() 257 spin_lock_irq(&chip->lock); snd_echo_midi_output_trigger() 259 if (!chip->tinuse) { snd_echo_midi_output_trigger() 260 setup_timer(&chip->timer, snd_echo_midi_output_write, snd_echo_midi_output_trigger() 261 (unsigned long)chip); snd_echo_midi_output_trigger() 262 chip->tinuse = 1; snd_echo_midi_output_trigger() 265 if (chip->tinuse) { snd_echo_midi_output_trigger() 266 chip->tinuse = 0; snd_echo_midi_output_trigger() 267 spin_unlock_irq(&chip->lock); snd_echo_midi_output_trigger() 268 del_timer_sync(&chip->timer); snd_echo_midi_output_trigger() 269 dev_dbg(chip->card->dev, "Timer removed\n"); snd_echo_midi_output_trigger() 273 spin_unlock_irq(&chip->lock); snd_echo_midi_output_trigger() 275 if (up && !chip->midi_full) snd_echo_midi_output_trigger() 276 snd_echo_midi_output_write((unsigned long)chip); snd_echo_midi_output_trigger() 283 struct echoaudio *chip = substream->rmidi->private_data; snd_echo_midi_output_close() local 285 chip->midi_out = NULL; snd_echo_midi_output_close() 307 struct echoaudio *chip) snd_echo_midi_create() 312 &chip->rmidi)) < 0) snd_echo_midi_create() 315 strcpy(chip->rmidi->name, card->shortname); snd_echo_midi_create() 316 chip->rmidi->private_data = chip; snd_echo_midi_create() 318 snd_rawmidi_set_ops(chip->rmidi, SNDRV_RAWMIDI_STREAM_INPUT, snd_echo_midi_create() 320 snd_rawmidi_set_ops(chip->rmidi, SNDRV_RAWMIDI_STREAM_OUTPUT, snd_echo_midi_create() 323 chip->rmidi->info_flags |= SNDRV_RAWMIDI_INFO_OUTPUT | snd_echo_midi_create() 306 snd_echo_midi_create(struct snd_card *card, struct echoaudio *chip) snd_echo_midi_create() argument
H A D	layla24_dsp.c	31 static int write_control_reg(struct echoaudio *chip, u32 value, char force); 32 static int set_input_clock(struct echoaudio *chip, u16 clock); 33 static int set_professional_spdif(struct echoaudio *chip, char prof); 34 static int set_digital_mode(struct echoaudio *chip, u8 mode); 35 static int load_asic_generic(struct echoaudio *chip, u32 cmd, short asic); 36 static int check_asic_status(struct echoaudio *chip); 39 static int init_hw(struct echoaudio *chip, u16 device_id, u16 subdevice_id) init_hw() argument 46 if ((err = init_dsp_comm_page(chip))) { init_hw() 47 dev_err(chip->card->dev, init_hw() 52 chip->device_id = device_id; init_hw() 53 chip->subdevice_id = subdevice_id; init_hw() 54 chip->bad_board = TRUE; init_hw() 55 chip->has_midi = TRUE; init_hw() 56 chip->dsp_code_to_load = FW_LAYLA24_DSP; init_hw() 57 chip->input_clock_types = init_hw() 60 chip->digital_modes = init_hw() 65 if ((err = load_firmware(chip)) < 0) init_hw() 67 chip->bad_board = FALSE; init_hw() 69 if ((err = init_line_levels(chip)) < 0) init_hw() 77 static int set_mixer_defaults(struct echoaudio *chip) set_mixer_defaults() argument 79 chip->digital_mode = DIGITAL_MODE_SPDIF_RCA; set_mixer_defaults() 80 chip->professional_spdif = FALSE; set_mixer_defaults() 81 chip->digital_in_automute = TRUE; set_mixer_defaults() 82 return init_line_levels(chip); set_mixer_defaults() 87 static u32 detect_input_clocks(const struct echoaudio *chip) detect_input_clocks() argument 92 clocks_from_dsp = le32_to_cpu(chip->comm_page->status_clocks); detect_input_clocks() 112 static int load_asic(struct echoaudio *chip) load_asic() argument 116 if (chip->asic_loaded) load_asic() 124 err = load_asic_generic(chip, DSP_FNC_LOAD_LAYLA24_PCI_CARD_ASIC, load_asic() 129 chip->asic_code = FW_LAYLA24_2S_ASIC; load_asic() 135 err = load_asic_generic(chip, DSP_FNC_LOAD_LAYLA24_EXTERNAL_ASIC, load_asic() 144 err = check_asic_status(chip); load_asic() 149 err = write_control_reg(chip, GML_CONVERTER_ENABLE | GML_48KHZ, load_asic() 157 static int set_sample_rate(struct echoaudio *chip, u32 rate) set_sample_rate() argument 162 chip->digital_mode == DIGITAL_MODE_ADAT)) set_sample_rate() 166 if (chip->input_clock != ECHO_CLOCK_INTERNAL) { set_sample_rate() 167 dev_warn(chip->card->dev, set_sample_rate() 170 chip->comm_page->sample_rate = cpu_to_le32(rate); set_sample_rate() 171 chip->sample_rate = rate; set_sample_rate() 176 control_reg = le32_to_cpu(chip->comm_page->control_register); set_sample_rate() 227 if (wait_handshake(chip)) set_sample_rate() 230 chip->comm_page->sample_rate = set_sample_rate() 233 clear_handshake(chip); set_sample_rate() 234 send_vector(chip, DSP_VC_SET_LAYLA24_FREQUENCY_REG); set_sample_rate() 239 chip->comm_page->sample_rate = cpu_to_le32(rate); /* ignored by the DSP ? */ set_sample_rate() 240 chip->sample_rate = rate; set_sample_rate() 241 dev_dbg(chip->card->dev, set_sample_rate() 244 return write_control_reg(chip, control_reg, FALSE); set_sample_rate() 249 static int set_input_clock(struct echoaudio *chip, u16 clock) set_input_clock() argument 254 control_reg = le32_to_cpu(chip->comm_page->control_register) & set_input_clock() 256 clocks_from_dsp = le32_to_cpu(chip->comm_page->status_clocks); set_input_clock() 261 chip->input_clock = ECHO_CLOCK_INTERNAL; set_input_clock() 262 return set_sample_rate(chip, chip->sample_rate); set_input_clock() 264 if (chip->digital_mode == DIGITAL_MODE_ADAT) set_input_clock() 278 if (chip->digital_mode != DIGITAL_MODE_ADAT) set_input_clock() 284 dev_err(chip->card->dev, set_input_clock() 289 chip->input_clock = clock; set_input_clock() 290 return write_control_reg(chip, control_reg, TRUE); set_input_clock() 298 static int switch_asic(struct echoaudio *chip, short asic) switch_asic() argument 303 if (asic != chip->asic_code) { switch_asic() 304 monitors = kmemdup(chip->comm_page->monitors, switch_asic() 309 memset(chip->comm_page->monitors, ECHOGAIN_MUTED, switch_asic() 313 if (load_asic_generic(chip, DSP_FNC_LOAD_LAYLA24_EXTERNAL_ASIC, switch_asic() 315 memcpy(chip->comm_page->monitors, monitors, switch_asic() 320 chip->asic_code = asic; switch_asic() 321 memcpy(chip->comm_page->monitors, monitors, MONITOR_ARRAY_SIZE); switch_asic() 330 static int dsp_set_digital_mode(struct echoaudio *chip, u8 mode) dsp_set_digital_mode() argument 341 if (chip->input_clock == ECHO_CLOCK_ADAT) dsp_set_digital_mode() 346 if (chip->input_clock == ECHO_CLOCK_SPDIF) dsp_set_digital_mode() 351 dev_err(chip->card->dev, dsp_set_digital_mode() 357 chip->sample_rate = 48000; dsp_set_digital_mode() 358 spin_lock_irq(&chip->lock); dsp_set_digital_mode() 359 set_input_clock(chip, ECHO_CLOCK_INTERNAL); dsp_set_digital_mode() 360 spin_unlock_irq(&chip->lock); dsp_set_digital_mode() 364 if (switch_asic(chip, asic) < 0) dsp_set_digital_mode() 367 spin_lock_irq(&chip->lock); dsp_set_digital_mode() 370 control_reg = le32_to_cpu(chip->comm_page->control_register); dsp_set_digital_mode() 386 err = write_control_reg(chip, control_reg, TRUE); dsp_set_digital_mode() 387 spin_unlock_irq(&chip->lock); dsp_set_digital_mode() 390 chip->digital_mode = mode; dsp_set_digital_mode() 392 dev_dbg(chip->card->dev, "set_digital_mode to %d\n", mode); dsp_set_digital_mode()
H A D	indigoio_dsp.c	32 static int set_vmixer_gain(struct echoaudio *chip, u16 output, u16 pipe, 34 static int update_vmixer_level(struct echoaudio *chip); 37 static int init_hw(struct echoaudio *chip, u16 device_id, u16 subdevice_id) init_hw() argument 44 if ((err = init_dsp_comm_page(chip))) { init_hw() 45 dev_err(chip->card->dev, init_hw() 50 chip->device_id = device_id; init_hw() 51 chip->subdevice_id = subdevice_id; init_hw() 52 chip->bad_board = TRUE; init_hw() 53 chip->dsp_code_to_load = FW_INDIGO_IO_DSP; init_hw() 56 chip->asic_loaded = TRUE; init_hw() 57 chip->input_clock_types = ECHO_CLOCK_BIT_INTERNAL; init_hw() 59 if ((err = load_firmware(chip)) < 0) init_hw() 61 chip->bad_board = FALSE; init_hw() 68 static int set_mixer_defaults(struct echoaudio *chip) set_mixer_defaults() argument 70 return init_line_levels(chip); set_mixer_defaults() 75 static u32 detect_input_clocks(const struct echoaudio *chip) detect_input_clocks() argument 83 static int load_asic(struct echoaudio *chip) load_asic() argument 90 static int set_sample_rate(struct echoaudio *chip, u32 rate) set_sample_rate() argument 92 if (wait_handshake(chip)) set_sample_rate() 95 chip->sample_rate = rate; set_sample_rate() 96 chip->comm_page->sample_rate = cpu_to_le32(rate); set_sample_rate() 97 clear_handshake(chip); set_sample_rate() 98 return send_vector(chip, DSP_VC_UPDATE_CLOCKS); set_sample_rate() 104 static int set_vmixer_gain(struct echoaudio *chip, u16 output, u16 pipe, set_vmixer_gain() argument 109 if (snd_BUG_ON(pipe >= num_pipes_out(chip) || set_vmixer_gain() 110 output >= num_busses_out(chip))) set_vmixer_gain() 113 if (wait_handshake(chip)) set_vmixer_gain() 116 chip->vmixer_gain[output][pipe] = gain; set_vmixer_gain() 117 index = output * num_pipes_out(chip) + pipe; set_vmixer_gain() 118 chip->comm_page->vmixer[index] = gain; set_vmixer_gain() 120 dev_dbg(chip->card->dev, set_vmixer_gain() 128 static int update_vmixer_level(struct echoaudio *chip) update_vmixer_level() argument 130 if (wait_handshake(chip)) update_vmixer_level() 132 clear_handshake(chip); update_vmixer_level() 133 return send_vector(chip, DSP_VC_SET_VMIXER_GAIN); update_vmixer_level()
H A D	echoaudio_3g.c	36 static int check_asic_status(struct echoaudio *chip) check_asic_status() argument 40 if (wait_handshake(chip)) check_asic_status() 43 chip->comm_page->ext_box_status = cpu_to_le32(E3G_ASIC_NOT_LOADED); check_asic_status() 44 chip->asic_loaded = FALSE; check_asic_status() 45 clear_handshake(chip); check_asic_status() 46 send_vector(chip, DSP_VC_TEST_ASIC); check_asic_status() 48 if (wait_handshake(chip)) { check_asic_status() 49 chip->dsp_code = NULL; check_asic_status() 53 box_status = le32_to_cpu(chip->comm_page->ext_box_status); check_asic_status() 54 dev_dbg(chip->card->dev, "box_status=%x\n", box_status); check_asic_status() 58 chip->asic_loaded = TRUE; check_asic_status() 64 static inline u32 get_frq_reg(struct echoaudio *chip) get_frq_reg() argument 66 return le32_to_cpu(chip->comm_page->e3g_frq_register); get_frq_reg() 73 static int write_control_reg(struct echoaudio *chip, u32 ctl, u32 frq, write_control_reg() argument 76 if (wait_handshake(chip)) write_control_reg() 79 dev_dbg(chip->card->dev, write_control_reg() 85 if (ctl != chip->comm_page->control_register || write_control_reg() 86 frq != chip->comm_page->e3g_frq_register || force) { write_control_reg() 87 chip->comm_page->e3g_frq_register = frq; write_control_reg() 88 chip->comm_page->control_register = ctl; write_control_reg() 89 clear_handshake(chip); write_control_reg() 90 return send_vector(chip, DSP_VC_WRITE_CONTROL_REG); write_control_reg() 93 dev_dbg(chip->card->dev, "WriteControlReg: not written, no change\n"); write_control_reg() 100 static int set_digital_mode(struct echoaudio *chip, u8 mode) set_digital_mode() argument 106 if (snd_BUG_ON(chip->pipe_alloc_mask)) set_digital_mode() 109 if (snd_BUG_ON(!(chip->digital_modes & (1 << mode)))) set_digital_mode() 112 previous_mode = chip->digital_mode; set_digital_mode() 113 err = dsp_set_digital_mode(chip, mode); set_digital_mode() 120 spin_lock_irq(&chip->lock); set_digital_mode() 121 for (o = 0; o < num_busses_out(chip); o++) set_digital_mode() 122 for (i = 0; i < num_busses_in(chip); i++) set_digital_mode() 123 set_monitor_gain(chip, o, i, set_digital_mode() 124 chip->monitor_gain[o][i]); set_digital_mode() 127 for (i = 0; i < num_busses_in(chip); i++) set_digital_mode() 128 set_input_gain(chip, i, chip->input_gain[i]); set_digital_mode() 129 update_input_line_level(chip); set_digital_mode() 132 for (o = 0; o < num_busses_out(chip); o++) set_digital_mode() 133 set_output_gain(chip, o, chip->output_gain[o]); set_digital_mode() 134 update_output_line_level(chip); set_digital_mode() 135 spin_unlock_irq(&chip->lock); set_digital_mode() 143 static u32 set_spdif_bits(struct echoaudio *chip, u32 control_reg, u32 rate) set_spdif_bits() argument 152 if (chip->professional_spdif) set_spdif_bits() 160 if (chip->professional_spdif) set_spdif_bits() 163 if (chip->non_audio_spdif) set_spdif_bits() 175 static int set_professional_spdif(struct echoaudio *chip, char prof) set_professional_spdif() argument 179 control_reg = le32_to_cpu(chip->comm_page->control_register); set_professional_spdif() 180 chip->professional_spdif = prof; set_professional_spdif() 181 control_reg = set_spdif_bits(chip, control_reg, chip->sample_rate); set_professional_spdif() 182 return write_control_reg(chip, control_reg, get_frq_reg(chip), 0); set_professional_spdif() 191 static u32 detect_input_clocks(const struct echoaudio *chip) detect_input_clocks() argument 197 clocks_from_dsp = le32_to_cpu(chip->comm_page->status_clocks); detect_input_clocks() 204 switch(chip->digital_mode) { detect_input_clocks() 221 static int load_asic(struct echoaudio *chip) load_asic() argument 225 if (chip->asic_loaded) load_asic() 231 err = load_asic_generic(chip, DSP_FNC_LOAD_3G_ASIC, FW_3G_ASIC); load_asic() 235 chip->asic_code = FW_3G_ASIC; load_asic() 240 box_type = check_asic_status(chip); load_asic() 245 err = write_control_reg(chip, E3G_48KHZ, load_asic() 256 static int set_sample_rate(struct echoaudio *chip, u32 rate) set_sample_rate() argument 261 if (chip->input_clock != ECHO_CLOCK_INTERNAL) { set_sample_rate() 262 dev_warn(chip->card->dev, set_sample_rate() 265 chip->comm_page->sample_rate = cpu_to_le32(rate); set_sample_rate() 266 chip->sample_rate = rate; set_sample_rate() 267 set_input_clock(chip, chip->input_clock); set_sample_rate() 272 chip->digital_mode == DIGITAL_MODE_ADAT)) set_sample_rate() 276 control_reg = le32_to_cpu(chip->comm_page->control_register); set_sample_rate() 303 control_reg = set_spdif_bits(chip, control_reg, rate); set_sample_rate() 315 chip->comm_page->sample_rate = cpu_to_le32(rate); /* ignored by the DSP */ set_sample_rate() 316 chip->sample_rate = rate; set_sample_rate() 317 dev_dbg(chip->card->dev, set_sample_rate() 321 return write_control_reg(chip, control_reg, frq_reg, 0); set_sample_rate() 327 static int set_input_clock(struct echoaudio *chip, u16 clock) set_input_clock() argument 333 control_reg = le32_to_cpu(chip->comm_page->control_register) & set_input_clock() 335 clocks_from_dsp = le32_to_cpu(chip->comm_page->status_clocks); set_input_clock() 339 chip->input_clock = ECHO_CLOCK_INTERNAL; set_input_clock() 340 return set_sample_rate(chip, chip->sample_rate); set_input_clock() 342 if (chip->digital_mode == DIGITAL_MODE_ADAT) set_input_clock() 351 if (chip->digital_mode != DIGITAL_MODE_ADAT) set_input_clock() 364 dev_err(chip->card->dev, set_input_clock() 369 chip->input_clock = clock; set_input_clock() 370 return write_control_reg(chip, control_reg, get_frq_reg(chip), 1); set_input_clock() 375 static int dsp_set_digital_mode(struct echoaudio *chip, u8 mode) dsp_set_digital_mode() argument 385 if (chip->input_clock == ECHO_CLOCK_ADAT) dsp_set_digital_mode() 389 if (chip->input_clock == ECHO_CLOCK_SPDIF) dsp_set_digital_mode() 393 dev_err(chip->card->dev, dsp_set_digital_mode() 398 spin_lock_irq(&chip->lock); dsp_set_digital_mode() 401 chip->sample_rate = 48000; dsp_set_digital_mode() 402 set_input_clock(chip, ECHO_CLOCK_INTERNAL); dsp_set_digital_mode() 406 control_reg = le32_to_cpu(chip->comm_page->control_register); dsp_set_digital_mode() 423 err = write_control_reg(chip, control_reg, get_frq_reg(chip), 1); dsp_set_digital_mode() 424 spin_unlock_irq(&chip->lock); dsp_set_digital_mode() 427 chip->digital_mode = mode; dsp_set_digital_mode() 429 dev_dbg(chip->card->dev, "set_digital_mode(%d)\n", chip->digital_mode); dsp_set_digital_mode()
H A D	echoaudio.c	44 struct echoaudio *chip, const short fw_index) get_firmware() 50 if (chip->fw_cache[fw_index]) { get_firmware() 51 dev_dbg(chip->card->dev, get_firmware() 54 *fw_entry = chip->fw_cache[fw_index]; get_firmware() 59 dev_dbg(chip->card->dev, get_firmware() 62 err = request_firmware(fw_entry, name, pci_device(chip)); get_firmware() 64 dev_err(chip->card->dev, get_firmware() 68 chip->fw_cache[fw_index] = *fw_entry; get_firmware() 76 struct echoaudio *chip) free_firmware() 79 dev_dbg(chip->card->dev, "firmware not released (kept in cache)\n"); free_firmware() 87 static void free_firmware_cache(struct echoaudio *chip) free_firmware_cache() argument 93 if (chip->fw_cache[i]) { free_firmware_cache() 94 release_firmware(chip->fw_cache[i]); free_firmware_cache() 95 dev_dbg(chip->card->dev, "release_firmware(%d)\n", i); free_firmware_cache() 258 struct echoaudio *chip = rule->private; hw_rule_sample_rate() local 261 if (!chip->can_set_rate) { hw_rule_sample_rate() 263 fixed.min = fixed.max = chip->sample_rate; hw_rule_sample_rate() 273 struct echoaudio *chip; pcm_open() local 281 chip = snd_pcm_substream_chip(substream); pcm_open() 291 dev_dbg(chip->card->dev, "max_channels=%d\n", max_channels); pcm_open() 298 if (chip->digital_mode == DIGITAL_MODE_ADAT) { pcm_open() 333 hw_rule_sample_rate, chip, pcm_open() 339 snd_dma_pci_data(chip->pci), pcm_open() 341 dev_err(chip->card->dev, "s-g list allocation failed\n"); pcm_open() 352 struct echoaudio *chip = snd_pcm_substream_chip(substream); pcm_analog_in_open() local 355 if ((err = pcm_open(substream, num_analog_busses_in(chip) - pcm_analog_in_open() 368 atomic_inc(&chip->opencount); pcm_analog_in_open() 369 if (atomic_read(&chip->opencount) > 1 && chip->rate_set) pcm_analog_in_open() 370 chip->can_set_rate=0; pcm_analog_in_open() 371 dev_dbg(chip->card->dev, "pcm_analog_in_open cs=%d oc=%d r=%d\n", pcm_analog_in_open() 372 chip->can_set_rate, atomic_read(&chip->opencount), pcm_analog_in_open() 373 chip->sample_rate); pcm_analog_in_open() 381 struct echoaudio *chip = snd_pcm_substream_chip(substream); pcm_analog_out_open() local 385 max_channels = num_pipes_out(chip); pcm_analog_out_open() 387 max_channels = num_analog_busses_out(chip); pcm_analog_out_open() 403 atomic_inc(&chip->opencount); pcm_analog_out_open() 404 if (atomic_read(&chip->opencount) > 1 && chip->rate_set) pcm_analog_out_open() 405 chip->can_set_rate=0; pcm_analog_out_open() 406 dev_dbg(chip->card->dev, "pcm_analog_out_open cs=%d oc=%d r=%d\n", pcm_analog_out_open() 407 chip->can_set_rate, atomic_read(&chip->opencount), pcm_analog_out_open() 408 chip->sample_rate); pcm_analog_out_open() 418 struct echoaudio *chip = snd_pcm_substream_chip(substream); pcm_digital_in_open() local 421 max_channels = num_digital_busses_in(chip) - substream->number; pcm_digital_in_open() 422 mutex_lock(&chip->mode_mutex); pcm_digital_in_open() 423 if (chip->digital_mode == DIGITAL_MODE_ADAT) pcm_digital_in_open() 444 atomic_inc(&chip->opencount); pcm_digital_in_open() 445 if (atomic_read(&chip->opencount) > 1 && chip->rate_set) pcm_digital_in_open() 446 chip->can_set_rate=0; pcm_digital_in_open() 449 mutex_unlock(&chip->mode_mutex); pcm_digital_in_open() 459 struct echoaudio *chip = snd_pcm_substream_chip(substream); pcm_digital_out_open() local 462 max_channels = num_digital_busses_out(chip) - substream->number; pcm_digital_out_open() 463 mutex_lock(&chip->mode_mutex); pcm_digital_out_open() 464 if (chip->digital_mode == DIGITAL_MODE_ADAT) pcm_digital_out_open() 486 atomic_inc(&chip->opencount); pcm_digital_out_open() 487 if (atomic_read(&chip->opencount) > 1 && chip->rate_set) pcm_digital_out_open() 488 chip->can_set_rate=0; pcm_digital_out_open() 490 mutex_unlock(&chip->mode_mutex); pcm_digital_out_open() 502 struct echoaudio *chip = snd_pcm_substream_chip(substream); pcm_close() local 509 atomic_dec(&chip->opencount); pcm_close() 510 oc = atomic_read(&chip->opencount); pcm_close() 511 dev_dbg(chip->card->dev, "pcm_close oc=%d cs=%d rs=%d\n", oc, pcm_close() 512 chip->can_set_rate, chip->rate_set); pcm_close() 514 chip->can_set_rate = 1; pcm_close() 516 chip->rate_set = 0; pcm_close() 517 dev_dbg(chip->card->dev, "pcm_close2 oc=%d cs=%d rs=%d\n", oc, pcm_close() 518 chip->can_set_rate, chip->rate_set); pcm_close() 530 struct echoaudio *chip; init_engine() local 534 chip = snd_pcm_substream_chip(substream); init_engine() 540 spin_lock_irq(&chip->lock); init_engine() 542 dev_dbg(chip->card->dev, "hwp_ie free(%d)\n", pipe->index); init_engine() 543 err = free_pipes(chip, pipe); init_engine() 545 chip->substream[pipe->index] = NULL; init_engine() 548 err = allocate_pipes(chip, pipe, pipe_index, interleave); init_engine() 550 spin_unlock_irq(&chip->lock); init_engine() 551 dev_err(chip->card->dev, "allocate_pipes(%d) err=%d\n", init_engine() 555 spin_unlock_irq(&chip->lock); init_engine() 556 dev_dbg(chip->card->dev, "allocate_pipes()=%d\n", pipe_index); init_engine() 558 dev_dbg(chip->card->dev, init_engine() 565 dev_err(chip->card->dev, "malloc_pages err=%d\n", err); init_engine() 566 spin_lock_irq(&chip->lock); init_engine() 567 free_pipes(chip, pipe); init_engine() 568 spin_unlock_irq(&chip->lock); init_engine() 573 sglist_init(chip, pipe); init_engine() 584 sglist_add_mapping(chip, pipe, addr, rest); init_engine() 585 sglist_add_irq(chip, pipe); init_engine() 589 sglist_add_mapping(chip, pipe, addr, init_engine() 602 sglist_wrap(chip, pipe); init_engine() 605 * initialized before chip->substream init_engine() 607 chip->last_period[pipe_index] = 0; init_engine() 611 chip->substream[pipe_index] = substream; init_engine() 612 chip->rate_set = 1; init_engine() 613 spin_lock_irq(&chip->lock); init_engine() 614 set_sample_rate(chip, hw_params->rate_num / hw_params->rate_den); init_engine() 615 spin_unlock_irq(&chip->lock); init_engine() 624 struct echoaudio *chip = snd_pcm_substream_chip(substream); pcm_analog_in_hw_params() local 626 return init_engine(substream, hw_params, px_analog_in(chip) + pcm_analog_in_hw_params() 646 struct echoaudio *chip = snd_pcm_substream_chip(substream); pcm_digital_in_hw_params() local 648 return init_engine(substream, hw_params, px_digital_in(chip) + pcm_digital_in_hw_params() 658 struct echoaudio *chip = snd_pcm_substream_chip(substream); pcm_digital_out_hw_params() local 660 return init_engine(substream, hw_params, px_digital_out(chip) + pcm_digital_out_hw_params() 671 struct echoaudio *chip; pcm_hw_free() local 674 chip = snd_pcm_substream_chip(substream); pcm_hw_free() 677 spin_lock_irq(&chip->lock); pcm_hw_free() 679 dev_dbg(chip->card->dev, "pcm_hw_free(%d)\n", pipe->index); pcm_hw_free() 680 free_pipes(chip, pipe); pcm_hw_free() 681 chip->substream[pipe->index] = NULL; pcm_hw_free() 684 spin_unlock_irq(&chip->lock); pcm_hw_free() 694 struct echoaudio *chip = snd_pcm_substream_chip(substream); pcm_prepare() local 699 dev_dbg(chip->card->dev, "Prepare rate=%d format=%d channels=%d\n", pcm_prepare() 720 dev_err(chip->card->dev, pcm_prepare() 726 if (snd_BUG_ON(pipe_index >= px_num(chip))) pcm_prepare() 728 if (snd_BUG_ON(!is_pipe_allocated(chip, pipe_index))) pcm_prepare() 730 set_audio_format(chip, pipe_index, &format); pcm_prepare() 738 struct echoaudio *chip = snd_pcm_substream_chip(substream); pcm_trigger() local 747 if (s == chip->substream[i]) { snd_pcm_group_for_each_entry() 754 spin_lock(&chip->lock); 761 pipe = chip->substream[i]->runtime->private_data; 764 chip->last_period[i] = 0; 776 err = start_transport(chip, channelmask, 777 chip->pipe_cyclic_mask); 783 pipe = chip->substream[i]->runtime->private_data; 787 err = stop_transport(chip, channelmask); 792 pipe = chip->substream[i]->runtime->private_data; 796 err = pause_transport(chip, channelmask); 801 spin_unlock(&chip->lock); 903 static int snd_echo_new_pcm(struct echoaudio *chip) snd_echo_new_pcm() argument 916 if ((err = snd_pcm_new(chip->card, "PCM", 0, num_pipes_out(chip), snd_echo_new_pcm() 917 num_analog_busses_in(chip), &pcm)) < 0) snd_echo_new_pcm() 919 pcm->private_data = chip; snd_echo_new_pcm() 920 chip->analog_pcm = pcm; snd_echo_new_pcm() 921 strcpy(pcm->name, chip->card->shortname); snd_echo_new_pcm() 924 if ((err = snd_echo_preallocate_pages(pcm, snd_dma_pci_data(chip->pci))) < 0) snd_echo_new_pcm() 929 if ((err = snd_pcm_new(chip->card, "Digital PCM", 1, 0, snd_echo_new_pcm() 930 num_digital_busses_in(chip), &pcm)) < 0) snd_echo_new_pcm() 932 pcm->private_data = chip; snd_echo_new_pcm() 933 chip->digital_pcm = pcm; snd_echo_new_pcm() 934 strcpy(pcm->name, chip->card->shortname); snd_echo_new_pcm() 936 if ((err = snd_echo_preallocate_pages(pcm, snd_dma_pci_data(chip->pci))) < 0) snd_echo_new_pcm() 948 if ((err = snd_pcm_new(chip->card, "Analog PCM", 0, snd_echo_new_pcm() 949 num_analog_busses_out(chip), snd_echo_new_pcm() 950 num_analog_busses_in(chip), &pcm)) < 0) snd_echo_new_pcm() 952 pcm->private_data = chip; snd_echo_new_pcm() 953 chip->analog_pcm = pcm; snd_echo_new_pcm() 954 strcpy(pcm->name, chip->card->shortname); snd_echo_new_pcm() 957 if ((err = snd_echo_preallocate_pages(pcm, snd_dma_pci_data(chip->pci))) < 0) snd_echo_new_pcm() 962 if ((err = snd_pcm_new(chip->card, "Digital PCM", 1, snd_echo_new_pcm() 963 num_digital_busses_out(chip), snd_echo_new_pcm() 964 num_digital_busses_in(chip), &pcm)) < 0) snd_echo_new_pcm() 966 pcm->private_data = chip; snd_echo_new_pcm() 967 chip->digital_pcm = pcm; snd_echo_new_pcm() 968 strcpy(pcm->name, chip->card->shortname); snd_echo_new_pcm() 971 if ((err = snd_echo_preallocate_pages(pcm, snd_dma_pci_data(chip->pci))) < 0) snd_echo_new_pcm() 993 struct echoaudio *chip; snd_echo_output_gain_info() local 995 chip = snd_kcontrol_chip(kcontrol); snd_echo_output_gain_info() 997 uinfo->count = num_busses_out(chip); snd_echo_output_gain_info() 1006 struct echoaudio *chip; snd_echo_output_gain_get() local 1009 chip = snd_kcontrol_chip(kcontrol); snd_echo_output_gain_get() 1010 for (c = 0; c < num_busses_out(chip); c++) snd_echo_output_gain_get() 1011 ucontrol->value.integer.value[c] = chip->output_gain[c]; snd_echo_output_gain_get() 1018 struct echoaudio *chip; snd_echo_output_gain_put() local 1022 chip = snd_kcontrol_chip(kcontrol); snd_echo_output_gain_put() 1023 spin_lock_irq(&chip->lock); snd_echo_output_gain_put() 1024 for (c = 0; c < num_busses_out(chip); c++) { snd_echo_output_gain_put() 1029 if (chip->output_gain[c] != gain) { snd_echo_output_gain_put() 1030 set_output_gain(chip, c, gain); snd_echo_output_gain_put() 1035 update_output_line_level(chip); snd_echo_output_gain_put() 1036 spin_unlock_irq(&chip->lock); snd_echo_output_gain_put() 1074 struct echoaudio *chip; snd_echo_input_gain_info() local 1076 chip = snd_kcontrol_chip(kcontrol); snd_echo_input_gain_info() 1078 uinfo->count = num_analog_busses_in(chip); snd_echo_input_gain_info() 1087 struct echoaudio *chip; snd_echo_input_gain_get() local 1090 chip = snd_kcontrol_chip(kcontrol); snd_echo_input_gain_get() 1091 for (c = 0; c < num_analog_busses_in(chip); c++) snd_echo_input_gain_get() 1092 ucontrol->value.integer.value[c] = chip->input_gain[c]; snd_echo_input_gain_get() 1099 struct echoaudio *chip; snd_echo_input_gain_put() local 1103 chip = snd_kcontrol_chip(kcontrol); snd_echo_input_gain_put() 1104 spin_lock_irq(&chip->lock); snd_echo_input_gain_put() 1105 for (c = 0; c < num_analog_busses_in(chip); c++) { snd_echo_input_gain_put() 1110 if (chip->input_gain[c] != gain) { snd_echo_input_gain_put() 1111 set_input_gain(chip, c, gain); snd_echo_input_gain_put() 1116 update_input_line_level(chip); snd_echo_input_gain_put() 1117 spin_unlock_irq(&chip->lock); snd_echo_input_gain_put() 1143 struct echoaudio *chip; snd_echo_output_nominal_info() local 1145 chip = snd_kcontrol_chip(kcontrol); snd_echo_output_nominal_info() 1147 uinfo->count = num_analog_busses_out(chip); snd_echo_output_nominal_info() 1156 struct echoaudio *chip; snd_echo_output_nominal_get() local 1159 chip = snd_kcontrol_chip(kcontrol); snd_echo_output_nominal_get() 1160 for (c = 0; c < num_analog_busses_out(chip); c++) snd_echo_output_nominal_get() 1161 ucontrol->value.integer.value[c] = chip->nominal_level[c]; snd_echo_output_nominal_get() 1168 struct echoaudio *chip; snd_echo_output_nominal_put() local 1172 chip = snd_kcontrol_chip(kcontrol); snd_echo_output_nominal_put() 1173 spin_lock_irq(&chip->lock); snd_echo_output_nominal_put() 1174 for (c = 0; c < num_analog_busses_out(chip); c++) { snd_echo_output_nominal_put() 1175 if (chip->nominal_level[c] != ucontrol->value.integer.value[c]) { snd_echo_output_nominal_put() 1176 set_nominal_level(chip, c, snd_echo_output_nominal_put() 1182 update_output_line_level(chip); snd_echo_output_nominal_put() 1183 spin_unlock_irq(&chip->lock); snd_echo_output_nominal_put() 1205 struct echoaudio *chip; snd_echo_input_nominal_info() local 1207 chip = snd_kcontrol_chip(kcontrol); snd_echo_input_nominal_info() 1209 uinfo->count = num_analog_busses_in(chip); snd_echo_input_nominal_info() 1218 struct echoaudio *chip; snd_echo_input_nominal_get() local 1221 chip = snd_kcontrol_chip(kcontrol); snd_echo_input_nominal_get() 1222 for (c = 0; c < num_analog_busses_in(chip); c++) snd_echo_input_nominal_get() 1224 chip->nominal_level[bx_analog_in(chip) + c]; snd_echo_input_nominal_get() 1231 struct echoaudio *chip; snd_echo_input_nominal_put() local 1235 chip = snd_kcontrol_chip(kcontrol); snd_echo_input_nominal_put() 1236 spin_lock_irq(&chip->lock); snd_echo_input_nominal_put() 1237 for (c = 0; c < num_analog_busses_in(chip); c++) { snd_echo_input_nominal_put() 1238 if (chip->nominal_level[bx_analog_in(chip) + c] != snd_echo_input_nominal_put() 1240 set_nominal_level(chip, bx_analog_in(chip) + c, snd_echo_input_nominal_put() 1246 update_output_line_level(chip); /* "Output" is not a mistake snd_echo_input_nominal_put() 1249 spin_unlock_irq(&chip->lock); snd_echo_input_nominal_put() 1271 struct echoaudio *chip; snd_echo_mixer_info() local 1273 chip = snd_kcontrol_chip(kcontrol); snd_echo_mixer_info() 1278 uinfo->dimen.d[0] = num_busses_out(chip); snd_echo_mixer_info() 1279 uinfo->dimen.d[1] = num_busses_in(chip); snd_echo_mixer_info() 1286 struct echoaudio *chip = snd_kcontrol_chip(kcontrol); snd_echo_mixer_get() local 1287 unsigned int out = ucontrol->id.index / num_busses_in(chip); snd_echo_mixer_get() 1288 unsigned int in = ucontrol->id.index % num_busses_in(chip); snd_echo_mixer_get() 1293 ucontrol->value.integer.value[0] = chip->monitor_gain[out][in]; snd_echo_mixer_get() 1300 struct echoaudio *chip; snd_echo_mixer_put() local 1305 chip = snd_kcontrol_chip(kcontrol); snd_echo_mixer_put() 1306 out = ucontrol->id.index / num_busses_in(chip); snd_echo_mixer_put() 1307 in = ucontrol->id.index % num_busses_in(chip); snd_echo_mixer_put() 1313 if (chip->monitor_gain[out][in] != gain) { snd_echo_mixer_put() 1314 spin_lock_irq(&chip->lock); snd_echo_mixer_put() 1315 set_monitor_gain(chip, out, in, gain); snd_echo_mixer_put() 1316 update_output_line_level(chip); snd_echo_mixer_put() 1317 spin_unlock_irq(&chip->lock); snd_echo_mixer_put() 1343 struct echoaudio *chip; snd_echo_vmixer_info() local 1345 chip = snd_kcontrol_chip(kcontrol); snd_echo_vmixer_info() 1350 uinfo->dimen.d[0] = num_busses_out(chip); snd_echo_vmixer_info() 1351 uinfo->dimen.d[1] = num_pipes_out(chip); snd_echo_vmixer_info() 1358 struct echoaudio *chip; snd_echo_vmixer_get() local 1360 chip = snd_kcontrol_chip(kcontrol); snd_echo_vmixer_get() 1362 chip->vmixer_gain[ucontrol->id.index / num_pipes_out(chip)] snd_echo_vmixer_get() 1363 [ucontrol->id.index % num_pipes_out(chip)]; snd_echo_vmixer_get() 1370 struct echoaudio *chip; snd_echo_vmixer_put() local 1375 chip = snd_kcontrol_chip(kcontrol); snd_echo_vmixer_put() 1376 out = ucontrol->id.index / num_pipes_out(chip); snd_echo_vmixer_put() 1377 vch = ucontrol->id.index % num_pipes_out(chip); snd_echo_vmixer_put() 1381 if (chip->vmixer_gain[out][vch] != ucontrol->value.integer.value[0]) { snd_echo_vmixer_put() 1382 spin_lock_irq(&chip->lock); snd_echo_vmixer_put() 1383 set_vmixer_gain(chip, out, vch, ucontrol->value.integer.value[0]); snd_echo_vmixer_put() 1384 update_vmixer_level(chip); snd_echo_vmixer_put() 1385 spin_unlock_irq(&chip->lock); snd_echo_vmixer_put() 1415 struct echoaudio *chip; snd_echo_digital_mode_info() local 1417 chip = snd_kcontrol_chip(kcontrol); snd_echo_digital_mode_info() 1418 return snd_ctl_enum_info(uinfo, 1, chip->num_digital_modes, names); snd_echo_digital_mode_info() 1424 struct echoaudio *chip; snd_echo_digital_mode_get() local 1427 chip = snd_kcontrol_chip(kcontrol); snd_echo_digital_mode_get() 1428 mode = chip->digital_mode; snd_echo_digital_mode_get() 1429 for (i = chip->num_digital_modes - 1; i >= 0; i--) snd_echo_digital_mode_get() 1430 if (mode == chip->digital_mode_list[i]) { snd_echo_digital_mode_get() 1440 struct echoaudio *chip; snd_echo_digital_mode_put() local 1445 chip = snd_kcontrol_chip(kcontrol); snd_echo_digital_mode_put() 1448 if (emode >= chip->num_digital_modes) snd_echo_digital_mode_put() 1450 dmode = chip->digital_mode_list[emode]; snd_echo_digital_mode_put() 1452 if (dmode != chip->digital_mode) { snd_echo_digital_mode_put() 1455 mutex_lock(&chip->mode_mutex); snd_echo_digital_mode_put() 1460 if (atomic_read(&chip->opencount)) { snd_echo_digital_mode_put() 1463 changed = set_digital_mode(chip, dmode); snd_echo_digital_mode_put() 1465 if (changed > 0 && chip->clock_src_ctl) { snd_echo_digital_mode_put() 1466 snd_ctl_notify(chip->card, snd_echo_digital_mode_put() 1468 &chip->clock_src_ctl->id); snd_echo_digital_mode_put() 1469 dev_dbg(chip->card->dev, snd_echo_digital_mode_put() 1475 mutex_unlock(&chip->mode_mutex); snd_echo_digital_mode_put() 1506 struct echoaudio *chip; snd_echo_spdif_mode_get() local 1508 chip = snd_kcontrol_chip(kcontrol); snd_echo_spdif_mode_get() 1509 ucontrol->value.enumerated.item[0] = !!chip->professional_spdif; snd_echo_spdif_mode_get() 1516 struct echoaudio *chip; snd_echo_spdif_mode_put() local 1519 chip = snd_kcontrol_chip(kcontrol); snd_echo_spdif_mode_put() 1521 if (mode != chip->professional_spdif) { snd_echo_spdif_mode_put() 1522 spin_lock_irq(&chip->lock); snd_echo_spdif_mode_put() 1523 set_professional_spdif(chip, mode); snd_echo_spdif_mode_put() 1524 spin_unlock_irq(&chip->lock); snd_echo_spdif_mode_put() 1552 struct echoaudio *chip; snd_echo_clock_source_info() local 1554 chip = snd_kcontrol_chip(kcontrol); snd_echo_clock_source_info() 1555 return snd_ctl_enum_info(uinfo, 1, chip->num_clock_sources, names); snd_echo_clock_source_info() 1561 struct echoaudio *chip; snd_echo_clock_source_get() local 1564 chip = snd_kcontrol_chip(kcontrol); snd_echo_clock_source_get() 1565 clock = chip->input_clock; snd_echo_clock_source_get() 1567 for (i = 0; i < chip->num_clock_sources; i++) snd_echo_clock_source_get() 1568 if (clock == chip->clock_source_list[i]) snd_echo_clock_source_get() 1577 struct echoaudio *chip; snd_echo_clock_source_put() local 1582 chip = snd_kcontrol_chip(kcontrol); snd_echo_clock_source_put() 1584 if (eclock >= chip->input_clock_types) snd_echo_clock_source_put() 1586 dclock = chip->clock_source_list[eclock]; snd_echo_clock_source_put() 1587 if (chip->input_clock != dclock) { snd_echo_clock_source_put() 1588 mutex_lock(&chip->mode_mutex); snd_echo_clock_source_put() 1589 spin_lock_irq(&chip->lock); snd_echo_clock_source_put() 1590 if ((changed = set_input_clock(chip, dclock)) == 0) snd_echo_clock_source_put() 1592 spin_unlock_irq(&chip->lock); snd_echo_clock_source_put() 1593 mutex_unlock(&chip->mode_mutex); snd_echo_clock_source_put() 1597 dev_dbg(chip->card->dev, snd_echo_clock_source_put() 1623 struct echoaudio *chip = snd_kcontrol_chip(kcontrol); snd_echo_phantom_power_get() local 1625 ucontrol->value.integer.value[0] = chip->phantom_power; snd_echo_phantom_power_get() 1632 struct echoaudio *chip = snd_kcontrol_chip(kcontrol); snd_echo_phantom_power_put() local 1636 if (chip->phantom_power != power) { snd_echo_phantom_power_put() 1637 spin_lock_irq(&chip->lock); snd_echo_phantom_power_put() 1638 changed = set_phantom_power(chip, power); snd_echo_phantom_power_put() 1639 spin_unlock_irq(&chip->lock); snd_echo_phantom_power_put() 1666 struct echoaudio *chip = snd_kcontrol_chip(kcontrol); snd_echo_automute_get() local 1668 ucontrol->value.integer.value[0] = chip->digital_in_automute; snd_echo_automute_get() 1675 struct echoaudio *chip = snd_kcontrol_chip(kcontrol); snd_echo_automute_put() local 1679 if (chip->digital_in_automute != automute) { snd_echo_automute_put() 1680 spin_lock_irq(&chip->lock); snd_echo_automute_put() 1681 changed = set_input_auto_mute(chip, automute); snd_echo_automute_put() 1682 spin_unlock_irq(&chip->lock); snd_echo_automute_put() 1707 struct echoaudio *chip; snd_echo_vumeters_switch_put() local 1709 chip = snd_kcontrol_chip(kcontrol); snd_echo_vumeters_switch_put() 1710 spin_lock_irq(&chip->lock); snd_echo_vumeters_switch_put() 1711 set_meters_on(chip, ucontrol->value.integer.value[0]); snd_echo_vumeters_switch_put() 1712 spin_unlock_irq(&chip->lock); snd_echo_vumeters_switch_put() 1747 struct echoaudio *chip; snd_echo_vumeters_get() local 1749 chip = snd_kcontrol_chip(kcontrol); snd_echo_vumeters_get() 1750 get_audio_meters(chip, ucontrol->value.integer.value); snd_echo_vumeters_get() 1781 struct echoaudio *chip; snd_echo_channels_info_get() local 1784 chip = snd_kcontrol_chip(kcontrol); snd_echo_channels_info_get() 1785 ucontrol->value.integer.value[0] = num_busses_in(chip); snd_echo_channels_info_get() 1786 ucontrol->value.integer.value[1] = num_analog_busses_in(chip); snd_echo_channels_info_get() 1787 ucontrol->value.integer.value[2] = num_busses_out(chip); snd_echo_channels_info_get() 1788 ucontrol->value.integer.value[3] = num_analog_busses_out(chip); snd_echo_channels_info_get() 1789 ucontrol->value.integer.value[4] = num_pipes_out(chip); snd_echo_channels_info_get() 1792 detected = detect_input_clocks(chip); snd_echo_channels_info_get() 1794 src = chip->num_clock_sources - 1; snd_echo_channels_info_get() 1798 if (bit == chip->clock_source_list[src]) { snd_echo_channels_info_get() 1824 struct echoaudio *chip = dev_id; snd_echo_interrupt() local 1828 spin_lock(&chip->lock); snd_echo_interrupt() 1829 st = service_irq(chip); snd_echo_interrupt() 1831 spin_unlock(&chip->lock); snd_echo_interrupt() 1837 substream = chip->substream[ss]; snd_echo_interrupt() 1842 if (period != chip->last_period[ss]) { snd_echo_interrupt() 1843 chip->last_period[ss] = period; snd_echo_interrupt() 1844 spin_unlock(&chip->lock); snd_echo_interrupt() 1846 spin_lock(&chip->lock); snd_echo_interrupt() 1850 spin_unlock(&chip->lock); snd_echo_interrupt() 1853 if (st > 0 && chip->midi_in) { snd_echo_interrupt() 1854 snd_rawmidi_receive(chip->midi_in, chip->midi_buffer, st); snd_echo_interrupt() 1855 dev_dbg(chip->card->dev, "rawmidi_iread=%d\n", st); snd_echo_interrupt() 1868 static int snd_echo_free(struct echoaudio *chip) snd_echo_free() argument 1870 if (chip->comm_page) snd_echo_free() 1871 rest_in_peace(chip); snd_echo_free() 1873 if (chip->irq >= 0) snd_echo_free() 1874 free_irq(chip->irq, chip); snd_echo_free() 1876 if (chip->comm_page) snd_echo_free() 1877 snd_dma_free_pages(&chip->commpage_dma_buf); snd_echo_free() 1879 iounmap(chip->dsp_registers); snd_echo_free() 1880 release_and_free_resource(chip->iores); snd_echo_free() 1881 pci_disable_device(chip->pci); snd_echo_free() 1883 /* release chip data */ snd_echo_free() 1884 free_firmware_cache(chip); snd_echo_free() 1885 kfree(chip); snd_echo_free() 1893 struct echoaudio *chip = device->device_data; snd_echo_dev_free() local 1895 return snd_echo_free(chip); snd_echo_dev_free() 1905 struct echoaudio *chip; snd_echo_create() local 1920 /* Allocate chip if needed */ snd_echo_create() 1922 chip = kzalloc(sizeof(*chip), GFP_KERNEL); snd_echo_create() 1923 if (!chip) { snd_echo_create() 1927 dev_dbg(card->dev, "chip=%p\n", chip); snd_echo_create() 1928 spin_lock_init(&chip->lock); snd_echo_create() 1929 chip->card = card; snd_echo_create() 1930 chip->pci = pci; snd_echo_create() 1931 chip->irq = -1; snd_echo_create() 1932 atomic_set(&chip->opencount, 0); snd_echo_create() 1933 mutex_init(&chip->mode_mutex); snd_echo_create() 1934 chip->can_set_rate = 1; snd_echo_create() 1936 /* If this was called from the resume function, chip is snd_echo_create() 1939 chip = *rchip; snd_echo_create() 1943 chip->dsp_registers_phys = pci_resource_start(pci, 0); snd_echo_create() 1948 if ((chip->iores = request_mem_region(chip->dsp_registers_phys, sz, snd_echo_create() 1950 dev_err(chip->card->dev, "cannot get memory region\n"); snd_echo_create() 1951 snd_echo_free(chip); snd_echo_create() 1954 chip->dsp_registers = (volatile u32 __iomem *) snd_echo_create() 1955 ioremap_nocache(chip->dsp_registers_phys, sz); snd_echo_create() 1958 KBUILD_MODNAME, chip)) { snd_echo_create() 1959 dev_err(chip->card->dev, "cannot grab irq\n"); snd_echo_create() 1960 snd_echo_free(chip); snd_echo_create() 1963 chip->irq = pci->irq; snd_echo_create() 1965 chip->pci, chip->irq, chip->pci->subsystem_device); snd_echo_create() 1969 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci), snd_echo_create() 1971 &chip->commpage_dma_buf) < 0) { snd_echo_create() 1972 dev_err(chip->card->dev, "cannot allocate the comm page\n"); snd_echo_create() 1973 snd_echo_free(chip); snd_echo_create() 1976 chip->comm_page_phys = chip->commpage_dma_buf.addr; snd_echo_create() 1977 chip->comm_page = (struct comm_page *)chip->commpage_dma_buf.area; snd_echo_create() 1979 err = init_hw(chip, chip->pci->device, chip->pci->subsystem_device); snd_echo_create() 1981 err = set_mixer_defaults(chip); snd_echo_create() 1984 snd_echo_free(chip); snd_echo_create() 1988 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) { snd_echo_create() 1989 snd_echo_free(chip); snd_echo_create() 1992 *rchip = chip; snd_echo_create() 2005 struct echoaudio *chip; snd_echo_probe() local 2022 chip = NULL; /* Tells snd_echo_create to allocate chip */ snd_echo_probe() 2023 if ((err = snd_echo_create(card, pci, &chip)) < 0) { snd_echo_probe() 2029 strcpy(card->shortname, chip->card_name); snd_echo_probe() 2037 chip->dsp_registers_phys, chip->irq); snd_echo_probe() 2039 if ((err = snd_echo_new_pcm(chip)) < 0) { snd_echo_probe() 2040 dev_err(chip->card->dev, "new pcm error %d\n", err); snd_echo_probe() 2046 if (chip->has_midi) { /* Some Mia's do not have midi */ snd_echo_probe() 2047 if ((err = snd_echo_midi_create(card, chip)) < 0) { snd_echo_probe() 2048 dev_err(chip->card->dev, "new midi error %d\n", err); snd_echo_probe() 2056 snd_echo_vmixer.count = num_pipes_out(chip) * num_busses_out(chip); snd_echo_probe() 2057 if ((err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_echo_vmixer, chip))) < 0) snd_echo_probe() 2060 err = snd_ctl_add(chip->card, snd_echo_probe() 2061 snd_ctl_new1(&snd_echo_line_output_gain, chip)); snd_echo_probe() 2066 err = snd_ctl_add(chip->card, snd_echo_probe() 2067 snd_ctl_new1(&snd_echo_pcm_output_gain, chip)); snd_echo_probe() 2073 if ((err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_echo_line_input_gain, chip))) < 0) snd_echo_probe() 2078 if (!chip->hasnt_input_nominal_level) snd_echo_probe() 2079 if ((err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_echo_intput_nominal_level, chip))) < 0) snd_echo_probe() 2084 if ((err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_echo_output_nominal_level, chip))) < 0) snd_echo_probe() 2088 if ((err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_echo_vumeters_switch, chip))) < 0) snd_echo_probe() 2091 if ((err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_echo_vumeters, chip))) < 0) snd_echo_probe() 2095 snd_echo_monitor_mixer.count = num_busses_in(chip) * num_busses_out(chip); snd_echo_probe() 2096 if ((err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_echo_monitor_mixer, chip))) < 0) snd_echo_probe() 2101 if ((err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_echo_automute_switch, chip))) < 0) snd_echo_probe() 2105 if ((err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_echo_channels_info, chip))) < 0) snd_echo_probe() 2110 chip->num_digital_modes = 0; snd_echo_probe() 2112 if (chip->digital_modes & (1 << i)) snd_echo_probe() 2113 chip->digital_mode_list[chip->num_digital_modes++] = i; snd_echo_probe() 2115 if ((err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_echo_digital_mode_switch, chip))) < 0) snd_echo_probe() 2121 chip->num_clock_sources = 0; snd_echo_probe() 2123 if (chip->input_clock_types & (1 << i)) snd_echo_probe() 2124 chip->clock_source_list[chip->num_clock_sources++] = i; snd_echo_probe() 2126 if (chip->num_clock_sources > 1) { snd_echo_probe() 2127 chip->clock_src_ctl = snd_ctl_new1(&snd_echo_clock_source_switch, chip); snd_echo_probe() 2128 if ((err = snd_ctl_add(chip->card, chip->clock_src_ctl)) < 0) snd_echo_probe() 2134 if ((err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_echo_spdif_mode_switch, chip))) < 0) snd_echo_probe() 2139 if (chip->has_phantom_power) snd_echo_probe() 2140 if ((err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_echo_phantom_power_switch, chip))) < 0) snd_echo_probe() 2149 pci_set_drvdata(pci, chip); snd_echo_probe() 2165 struct echoaudio *chip = dev_get_drvdata(dev); snd_echo_suspend() local 2167 snd_pcm_suspend_all(chip->analog_pcm); snd_echo_suspend() 2168 snd_pcm_suspend_all(chip->digital_pcm); snd_echo_suspend() 2172 if (chip->midi_out) snd_echo_suspend() 2173 snd_echo_midi_output_trigger(chip->midi_out, 0); snd_echo_suspend() 2175 spin_lock_irq(&chip->lock); snd_echo_suspend() 2176 if (wait_handshake(chip)) { snd_echo_suspend() 2177 spin_unlock_irq(&chip->lock); snd_echo_suspend() 2180 clear_handshake(chip); snd_echo_suspend() 2181 if (send_vector(chip, DSP_VC_GO_COMATOSE) < 0) { snd_echo_suspend() 2182 spin_unlock_irq(&chip->lock); snd_echo_suspend() 2185 spin_unlock_irq(&chip->lock); snd_echo_suspend() 2187 chip->dsp_code = NULL; snd_echo_suspend() 2188 free_irq(chip->irq, chip); snd_echo_suspend() 2189 chip->irq = -1; snd_echo_suspend() 2198 struct echoaudio *chip = dev_get_drvdata(dev); snd_echo_resume() local 2206 commpage = chip->comm_page; snd_echo_resume() 2209 err = init_hw(chip, chip->pci->device, chip->pci->subsystem_device); snd_echo_resume() 2213 snd_echo_free(chip); snd_echo_resume() 2217 /* Temporarily set chip->pipe_alloc_mask=0 otherwise snd_echo_resume() 2220 pipe_alloc_mask = chip->pipe_alloc_mask; snd_echo_resume() 2221 chip->pipe_alloc_mask = 0; snd_echo_resume() 2222 err = restore_dsp_rettings(chip); snd_echo_resume() 2223 chip->pipe_alloc_mask = pipe_alloc_mask; snd_echo_resume() 2238 KBUILD_MODNAME, chip)) { snd_echo_resume() 2239 dev_err(chip->card->dev, "cannot grab irq\n"); snd_echo_resume() 2240 snd_echo_free(chip); snd_echo_resume() 2243 chip->irq = pci->irq; snd_echo_resume() 2244 dev_dbg(dev, "resume irq=%d\n", chip->irq); snd_echo_resume() 2247 if (chip->midi_input_enabled) snd_echo_resume() 2248 enable_midi_input(chip, TRUE); snd_echo_resume() 2249 if (chip->midi_out) snd_echo_resume() 2250 snd_echo_midi_output_trigger(chip->midi_out, 1); snd_echo_resume() 2265 struct echoaudio *chip; snd_echo_remove() local 2267 chip = pci_get_drvdata(pci); snd_echo_remove() 2268 if (chip) snd_echo_remove() 2269 snd_card_free(chip->card); snd_echo_remove() 43 get_firmware(const struct firmware **fw_entry, struct echoaudio *chip, const short fw_index) get_firmware() argument 75 free_firmware(const struct firmware *fw_entry, struct echoaudio *chip) free_firmware() argument
H A D	layla20_dsp.c	32 static int read_dsp(struct echoaudio *chip, u32 *data); 33 static int set_professional_spdif(struct echoaudio *chip, char prof); 34 static int load_asic_generic(struct echoaudio *chip, u32 cmd, short asic); 35 static int check_asic_status(struct echoaudio *chip); 36 static int update_flags(struct echoaudio *chip); 39 static int init_hw(struct echoaudio *chip, u16 device_id, u16 subdevice_id) init_hw() argument 46 if ((err = init_dsp_comm_page(chip))) { init_hw() 47 dev_err(chip->card->dev, init_hw() 52 chip->device_id = device_id; init_hw() 53 chip->subdevice_id = subdevice_id; init_hw() 54 chip->bad_board = TRUE; init_hw() 55 chip->has_midi = TRUE; init_hw() 56 chip->dsp_code_to_load = FW_LAYLA20_DSP; init_hw() 57 chip->input_clock_types = init_hw() 60 chip->output_clock_types = init_hw() 63 if ((err = load_firmware(chip)) < 0) init_hw() 65 chip->bad_board = FALSE; init_hw() 72 static int set_mixer_defaults(struct echoaudio *chip) set_mixer_defaults() argument 74 chip->professional_spdif = FALSE; set_mixer_defaults() 75 return init_line_levels(chip); set_mixer_defaults() 80 static u32 detect_input_clocks(const struct echoaudio *chip) detect_input_clocks() argument 85 clocks_from_dsp = le32_to_cpu(chip->comm_page->status_clocks); detect_input_clocks() 111 static int check_asic_status(struct echoaudio *chip) check_asic_status() argument 116 chip->asic_loaded = FALSE; check_asic_status() 118 send_vector(chip, DSP_VC_TEST_ASIC); check_asic_status() 122 if (read_dsp(chip, &asic_status) < 0) { check_asic_status() 123 dev_err(chip->card->dev, check_asic_status() 130 chip->asic_loaded = TRUE; check_asic_status() 141 static int load_asic(struct echoaudio *chip) load_asic() argument 145 if (chip->asic_loaded) load_asic() 148 err = load_asic_generic(chip, DSP_FNC_LOAD_LAYLA_ASIC, load_asic() 154 return check_asic_status(chip); load_asic() 159 static int set_sample_rate(struct echoaudio *chip, u32 rate) set_sample_rate() argument 166 if (chip->input_clock != ECHO_CLOCK_INTERNAL) { set_sample_rate() 167 dev_warn(chip->card->dev, set_sample_rate() 169 chip->comm_page->sample_rate = cpu_to_le32(rate); set_sample_rate() 170 chip->sample_rate = rate; set_sample_rate() 174 if (wait_handshake(chip)) set_sample_rate() 177 dev_dbg(chip->card->dev, "set_sample_rate(%d)\n", rate); set_sample_rate() 178 chip->sample_rate = rate; set_sample_rate() 179 chip->comm_page->sample_rate = cpu_to_le32(rate); set_sample_rate() 180 clear_handshake(chip); set_sample_rate() 181 return send_vector(chip, DSP_VC_SET_LAYLA_SAMPLE_RATE); set_sample_rate() 186 static int set_input_clock(struct echoaudio *chip, u16 clock_source) set_input_clock() argument 194 rate = chip->sample_rate; set_input_clock() 207 dev_err(chip->card->dev, set_input_clock() 212 chip->input_clock = clock_source; set_input_clock() 214 chip->comm_page->input_clock = cpu_to_le16(clock); set_input_clock() 215 clear_handshake(chip); set_input_clock() 216 send_vector(chip, DSP_VC_UPDATE_CLOCKS); set_input_clock() 219 set_sample_rate(chip, rate); set_input_clock() 226 static int set_output_clock(struct echoaudio *chip, u16 clock) set_output_clock() argument 236 dev_err(chip->card->dev, "set_output_clock wrong clock\n"); set_output_clock() 240 if (wait_handshake(chip)) set_output_clock() 243 chip->comm_page->output_clock = cpu_to_le16(clock); set_output_clock() 244 chip->output_clock = clock; set_output_clock() 245 clear_handshake(chip); set_output_clock() 246 return send_vector(chip, DSP_VC_UPDATE_CLOCKS); set_output_clock() 252 static int set_input_gain(struct echoaudio *chip, u16 input, int gain) set_input_gain() argument 254 if (snd_BUG_ON(input >= num_busses_in(chip))) set_input_gain() 257 if (wait_handshake(chip)) set_input_gain() 260 chip->input_gain[input] = gain; set_input_gain() 262 chip->comm_page->line_in_level[input] = gain; set_input_gain() 269 static int update_flags(struct echoaudio *chip) update_flags() argument 271 if (wait_handshake(chip)) update_flags() 273 clear_handshake(chip); update_flags() 274 return send_vector(chip, DSP_VC_UPDATE_FLAGS); update_flags() 279 static int set_professional_spdif(struct echoaudio *chip, char prof) set_professional_spdif() argument 282 chip->comm_page->flags |= set_professional_spdif() 285 chip->comm_page->flags &= set_professional_spdif() 287 chip->professional_spdif = prof; set_professional_spdif() 288 return update_flags(chip); set_professional_spdif()
H A D	echoaudio_dsp.c	35 static int restore_dsp_rettings(struct echoaudio *chip); 42 static int wait_handshake(struct echoaudio *chip) wait_handshake() argument 50 if (chip->comm_page->handshake) { wait_handshake() 56 dev_err(chip->card->dev, "wait_handshake(): Timeout waiting for DSP\n"); wait_handshake() 66 static int send_vector(struct echoaudio *chip, u32 command) send_vector() argument 74 if (!(get_dsp_register(chip, CHI32_VECTOR_REG) & send_vector() 76 set_dsp_register(chip, CHI32_VECTOR_REG, command); send_vector() 83 dev_err(chip->card->dev, "timeout on send_vector\n"); send_vector() 91 static int write_dsp(struct echoaudio *chip, u32 data) write_dsp() argument 96 status = get_dsp_register(chip, CHI32_STATUS_REG); write_dsp() 98 set_dsp_register(chip, CHI32_DATA_REG, data); write_dsp() 106 chip->bad_board = TRUE; /* Set TRUE until DSP re-loaded */ write_dsp() 107 dev_dbg(chip->card->dev, "write_dsp: Set bad_board to TRUE\n"); write_dsp() 115 static int read_dsp(struct echoaudio *chip, u32 *data) read_dsp() argument 120 status = get_dsp_register(chip, CHI32_STATUS_REG); read_dsp() 122 *data = get_dsp_register(chip, CHI32_DATA_REG); read_dsp() 129 chip->bad_board = TRUE; /* Set TRUE until DSP re-loaded */ read_dsp() 130 dev_err(chip->card->dev, "read_dsp: Set bad_board to TRUE\n"); read_dsp() 145 static int read_sn(struct echoaudio *chip) read_sn() argument 151 if (read_dsp(chip, &sn[i])) { read_sn() 152 dev_err(chip->card->dev, read_sn() 157 dev_dbg(chip->card->dev, read_sn() 167 static inline int check_asic_status(struct echoaudio *chip) check_asic_status() argument 169 chip->asic_loaded = TRUE; check_asic_status() 180 static int load_asic_generic(struct echoaudio *chip, u32 cmd, short asic) load_asic_generic() argument 187 err = get_firmware(&fw, chip, asic); load_asic_generic() 189 dev_warn(chip->card->dev, "Firmware not found !\n"); load_asic_generic() 197 if (write_dsp(chip, cmd) < 0) load_asic_generic() 201 if (write_dsp(chip, size) < 0) load_asic_generic() 205 if (write_dsp(chip, code[i]) < 0) load_asic_generic() 209 free_firmware(fw, chip); load_asic_generic() 213 dev_err(chip->card->dev, "failed on write_dsp\n"); load_asic_generic() 214 free_firmware(fw, chip); load_asic_generic() 227 static int install_resident_loader(struct echoaudio *chip) install_resident_loader() argument 237 if (chip->device_id != DEVICE_ID_56361) install_resident_loader() 242 status = get_dsp_register(chip, CHI32_STATUS_REG); install_resident_loader() 244 dev_dbg(chip->card->dev, install_resident_loader() 250 i = get_firmware(&fw, chip, FW_361_LOADER); install_resident_loader() 252 dev_warn(chip->card->dev, "Firmware not found !\n"); install_resident_loader() 265 set_dsp_register(chip, CHI32_CONTROL_REG, install_resident_loader() 266 get_dsp_register(chip, CHI32_CONTROL_REG) | 0x900); install_resident_loader() 286 if (write_dsp(chip, words)) { install_resident_loader() 287 dev_err(chip->card->dev, install_resident_loader() 292 if (write_dsp(chip, address)) { install_resident_loader() 293 dev_err(chip->card->dev, install_resident_loader() 302 if (write_dsp(chip, data)) { install_resident_loader() 303 dev_err(chip->card->dev, install_resident_loader() 313 status = get_dsp_register(chip, CHI32_STATUS_REG); install_resident_loader() 319 dev_err(chip->card->dev, "Resident loader failed to set HF5\n"); install_resident_loader() 323 dev_dbg(chip->card->dev, "Resident loader successfully installed\n"); install_resident_loader() 324 free_firmware(fw, chip); install_resident_loader() 328 free_firmware(fw, chip); install_resident_loader() 335 static int load_dsp(struct echoaudio *chip, u16 *code) load_dsp() argument 340 if (chip->dsp_code == code) { load_dsp() 341 dev_warn(chip->card->dev, "DSP is already loaded!\n"); load_dsp() 344 chip->bad_board = TRUE; /* Set TRUE until DSP loaded */ load_dsp() 345 chip->dsp_code = NULL; /* Current DSP code not loaded */ load_dsp() 346 chip->asic_loaded = FALSE; /* Loading the DSP code will reset the ASIC */ load_dsp() 348 dev_dbg(chip->card->dev, "load_dsp: Set bad_board to TRUE\n"); load_dsp() 352 if ((i = install_resident_loader(chip)) < 0) load_dsp() 357 if (send_vector(chip, DSP_VC_RESET) < 0) { load_dsp() 358 dev_err(chip->card->dev, load_dsp() 367 if (get_dsp_register(chip, CHI32_STATUS_REG) & load_dsp() 374 dev_err(chip->card->dev, load_dsp() 380 set_dsp_register(chip, CHI32_CONTROL_REG, load_dsp() 381 get_dsp_register(chip, CHI32_CONTROL_REG) | 0x900); load_dsp() 411 if (write_dsp(chip, words) < 0) { load_dsp() 412 dev_err(chip->card->dev, load_dsp() 416 if (write_dsp(chip, address) < 0) { load_dsp() 417 dev_err(chip->card->dev, load_dsp() 421 if (write_dsp(chip, mem_type) < 0) { load_dsp() 422 dev_err(chip->card->dev, load_dsp() 429 if (write_dsp(chip, data) < 0) { load_dsp() 430 dev_err(chip->card->dev, load_dsp() 437 if (write_dsp(chip, 0) < 0) { /* We're done!!! */ load_dsp() 438 dev_err(chip->card->dev, load_dsp() 446 if (get_dsp_register(chip, CHI32_STATUS_REG) & load_dsp() 448 set_dsp_register(chip, CHI32_CONTROL_REG, load_dsp() 449 get_dsp_register(chip, CHI32_CONTROL_REG) & ~0x1b00); load_dsp() 451 if (write_dsp(chip, DSP_FNC_SET_COMMPAGE_ADDR) < 0) { load_dsp() 452 dev_err(chip->card->dev, load_dsp() 457 if (write_dsp(chip, chip->comm_page_phys) < 0) { load_dsp() 458 dev_err(chip->card->dev, load_dsp() 467 if (read_sn(chip) < 0) { load_dsp() 468 dev_err(chip->card->dev, load_dsp() 473 chip->dsp_code = code; /* Show which DSP code loaded */ load_dsp() 474 chip->bad_board = FALSE; /* DSP OK */ load_dsp() 480 dev_err(chip->card->dev, load_dsp() 488 static int load_firmware(struct echoaudio *chip) load_firmware() argument 493 if (snd_BUG_ON(!chip->comm_page)) load_firmware() 497 if (chip->dsp_code) { load_firmware() 498 if ((box_type = check_asic_status(chip)) >= 0) load_firmware() 501 chip->dsp_code = NULL; load_firmware() 504 err = get_firmware(&fw, chip, chip->dsp_code_to_load); load_firmware() 507 err = load_dsp(chip, (u16 *)fw->data); load_firmware() 508 free_firmware(fw, chip); load_firmware() 512 if ((box_type = load_asic(chip)) < 0) load_firmware() 528 static int set_nominal_level(struct echoaudio *chip, u16 index, char consumer) set_nominal_level() argument 530 if (snd_BUG_ON(index >= num_busses_out(chip) + num_busses_in(chip))) set_nominal_level() 534 if (wait_handshake(chip)) set_nominal_level() 537 chip->nominal_level[index] = consumer; set_nominal_level() 540 chip->comm_page->nominal_level_mask |= cpu_to_le32(1 << index); set_nominal_level() 542 chip->comm_page->nominal_level_mask &= ~cpu_to_le32(1 << index); set_nominal_level() 552 static int set_output_gain(struct echoaudio *chip, u16 channel, s8 gain) set_output_gain() argument 554 if (snd_BUG_ON(channel >= num_busses_out(chip))) set_output_gain() 557 if (wait_handshake(chip)) set_output_gain() 561 chip->output_gain[channel] = gain; set_output_gain() 562 chip->comm_page->line_out_level[channel] = gain; set_output_gain() 570 static int set_monitor_gain(struct echoaudio *chip, u16 output, u16 input, set_monitor_gain() argument 573 if (snd_BUG_ON(output >= num_busses_out(chip) || set_monitor_gain() 574 input >= num_busses_in(chip))) set_monitor_gain() 577 if (wait_handshake(chip)) set_monitor_gain() 580 chip->monitor_gain[output][input] = gain; set_monitor_gain() 581 chip->comm_page->monitors[monitor_index(chip, output, input)] = gain; set_monitor_gain() 588 static int update_output_line_level(struct echoaudio *chip) update_output_line_level() argument 590 if (wait_handshake(chip)) update_output_line_level() 592 clear_handshake(chip); update_output_line_level() 593 return send_vector(chip, DSP_VC_UPDATE_OUTVOL); update_output_line_level() 599 static int update_input_line_level(struct echoaudio *chip) update_input_line_level() argument 601 if (wait_handshake(chip)) update_input_line_level() 603 clear_handshake(chip); update_input_line_level() 604 return send_vector(chip, DSP_VC_UPDATE_INGAIN); update_input_line_level() 611 static void set_meters_on(struct echoaudio *chip, char on) set_meters_on() argument 613 if (on && !chip->meters_enabled) { set_meters_on() 614 send_vector(chip, DSP_VC_METERS_ON); set_meters_on() 615 chip->meters_enabled = 1; set_meters_on() 616 } else if (!on && chip->meters_enabled) { set_meters_on() 617 send_vector(chip, DSP_VC_METERS_OFF); set_meters_on() 618 chip->meters_enabled = 0; set_meters_on() 619 memset((s8 *)chip->comm_page->vu_meter, ECHOGAIN_MUTED, set_meters_on() 621 memset((s8 *)chip->comm_page->peak_meter, ECHOGAIN_MUTED, set_meters_on() 636 static void get_audio_meters(struct echoaudio *chip, long *meters) get_audio_meters() argument 642 for (i = 0; i < num_busses_out(chip); i++, m++) { get_audio_meters() 643 meters[n++] = chip->comm_page->vu_meter[m]; get_audio_meters() 644 meters[n++] = chip->comm_page->peak_meter[m]; get_audio_meters() 653 for (i = 0; i < num_busses_in(chip); i++, m++) { get_audio_meters() 654 meters[n++] = chip->comm_page->vu_meter[m]; get_audio_meters() 655 meters[n++] = chip->comm_page->peak_meter[m]; get_audio_meters() 661 for (i = 0; i < num_pipes_out(chip); i++, m++) { get_audio_meters() 662 meters[n++] = chip->comm_page->vu_meter[m]; get_audio_meters() 663 meters[n++] = chip->comm_page->peak_meter[m]; get_audio_meters() 672 static int restore_dsp_rettings(struct echoaudio *chip) restore_dsp_rettings() argument 676 if ((err = check_asic_status(chip)) < 0) restore_dsp_rettings() 680 chip->comm_page->gd_clock_state = GD_CLOCK_UNDEF; restore_dsp_rettings() 681 chip->comm_page->gd_spdif_status = GD_SPDIF_STATUS_UNDEF; restore_dsp_rettings() 682 chip->comm_page->handshake = 0xffffffff; restore_dsp_rettings() 685 for (i = 0; i < num_busses_out(chip); i++) { restore_dsp_rettings() 686 err = set_output_gain(chip, i, chip->output_gain[i]); restore_dsp_rettings() 692 for (i = 0; i < num_pipes_out(chip); i++) restore_dsp_rettings() 693 for (o = 0; o < num_busses_out(chip); o++) { restore_dsp_rettings() 694 err = set_vmixer_gain(chip, o, i, restore_dsp_rettings() 695 chip->vmixer_gain[o][i]); restore_dsp_rettings() 699 if (update_vmixer_level(chip) < 0) restore_dsp_rettings() 704 for (o = 0; o < num_busses_out(chip); o++) restore_dsp_rettings() 705 for (i = 0; i < num_busses_in(chip); i++) { restore_dsp_rettings() 706 err = set_monitor_gain(chip, o, i, restore_dsp_rettings() 707 chip->monitor_gain[o][i]); restore_dsp_rettings() 714 for (i = 0; i < num_busses_in(chip); i++) { restore_dsp_rettings() 715 err = set_input_gain(chip, i, chip->input_gain[i]); restore_dsp_rettings() 721 err = update_output_line_level(chip); restore_dsp_rettings() 725 err = update_input_line_level(chip); restore_dsp_rettings() 729 err = set_sample_rate(chip, chip->sample_rate); restore_dsp_rettings() 733 if (chip->meters_enabled) { restore_dsp_rettings() 734 err = send_vector(chip, DSP_VC_METERS_ON); restore_dsp_rettings() 740 if (set_digital_mode(chip, chip->digital_mode) < 0) restore_dsp_rettings() 745 if (set_professional_spdif(chip, chip->professional_spdif) < 0) restore_dsp_rettings() 750 if (set_phantom_power(chip, chip->phantom_power) < 0) restore_dsp_rettings() 756 if (set_input_clock(chip, chip->input_clock) < 0) restore_dsp_rettings() 761 if (set_output_clock(chip, chip->output_clock) < 0) restore_dsp_rettings() 765 if (wait_handshake(chip) < 0) restore_dsp_rettings() 767 clear_handshake(chip); restore_dsp_rettings() 768 if (send_vector(chip, DSP_VC_UPDATE_FLAGS) < 0) restore_dsp_rettings() 783 static void set_audio_format(struct echoaudio *chip, u16 pipe_index, set_audio_format() argument 850 dev_dbg(chip->card->dev, set_audio_format() 852 chip->comm_page->audio_format[pipe_index] = cpu_to_le16(dsp_format); set_audio_format() 861 static int start_transport(struct echoaudio *chip, u32 channel_mask, start_transport() argument 865 if (wait_handshake(chip)) start_transport() 868 chip->comm_page->cmd_start |= cpu_to_le32(channel_mask); start_transport() 870 if (chip->comm_page->cmd_start) { start_transport() 871 clear_handshake(chip); start_transport() 872 send_vector(chip, DSP_VC_START_TRANSFER); start_transport() 873 if (wait_handshake(chip)) start_transport() 876 chip->active_mask |= channel_mask; start_transport() 877 chip->comm_page->cmd_start = 0; start_transport() 881 dev_err(chip->card->dev, "start_transport: No pipes to start!\n"); start_transport() 887 static int pause_transport(struct echoaudio *chip, u32 channel_mask) pause_transport() argument 890 if (wait_handshake(chip)) pause_transport() 893 chip->comm_page->cmd_stop |= cpu_to_le32(channel_mask); pause_transport() 894 chip->comm_page->cmd_reset = 0; pause_transport() 895 if (chip->comm_page->cmd_stop) { pause_transport() 896 clear_handshake(chip); pause_transport() 897 send_vector(chip, DSP_VC_STOP_TRANSFER); pause_transport() 898 if (wait_handshake(chip)) pause_transport() 901 chip->active_mask &= ~channel_mask; pause_transport() 902 chip->comm_page->cmd_stop = 0; pause_transport() 903 chip->comm_page->cmd_reset = 0; pause_transport() 907 dev_warn(chip->card->dev, "pause_transport: No pipes to stop!\n"); pause_transport() 913 static int stop_transport(struct echoaudio *chip, u32 channel_mask) stop_transport() argument 916 if (wait_handshake(chip)) stop_transport() 919 chip->comm_page->cmd_stop |= cpu_to_le32(channel_mask); stop_transport() 920 chip->comm_page->cmd_reset |= cpu_to_le32(channel_mask); stop_transport() 921 if (chip->comm_page->cmd_reset) { stop_transport() 922 clear_handshake(chip); stop_transport() 923 send_vector(chip, DSP_VC_STOP_TRANSFER); stop_transport() 924 if (wait_handshake(chip)) stop_transport() 927 chip->active_mask &= ~channel_mask; stop_transport() 928 chip->comm_page->cmd_stop = 0; stop_transport() 929 chip->comm_page->cmd_reset = 0; stop_transport() 933 dev_warn(chip->card->dev, "stop_transport: No pipes to stop!\n"); stop_transport() 939 static inline int is_pipe_allocated(struct echoaudio *chip, u16 pipe_index) is_pipe_allocated() argument 941 return (chip->pipe_alloc_mask & (1 << pipe_index)); is_pipe_allocated() 948 static int rest_in_peace(struct echoaudio *chip) rest_in_peace() argument 952 stop_transport(chip, chip->active_mask); rest_in_peace() 954 set_meters_on(chip, FALSE); rest_in_peace() 957 enable_midi_input(chip, FALSE); rest_in_peace() 961 if (chip->dsp_code) { rest_in_peace() 963 chip->dsp_code = NULL; rest_in_peace() 965 return send_vector(chip, DSP_VC_GO_COMATOSE); rest_in_peace() 973 static int init_dsp_comm_page(struct echoaudio *chip) init_dsp_comm_page() argument 977 dev_err(chip->card->dev, init_dsp_comm_page() 983 chip->card_name = ECHOCARD_NAME; init_dsp_comm_page() 984 chip->bad_board = TRUE; /* Set TRUE until DSP loaded */ init_dsp_comm_page() 985 chip->dsp_code = NULL; /* Current DSP code not loaded */ init_dsp_comm_page() 986 chip->asic_loaded = FALSE; init_dsp_comm_page() 987 memset(chip->comm_page, 0, sizeof(struct comm_page)); init_dsp_comm_page() 990 chip->comm_page->comm_size = init_dsp_comm_page() 992 chip->comm_page->handshake = 0xffffffff; init_dsp_comm_page() 993 chip->comm_page->midi_out_free_count = init_dsp_comm_page() 995 chip->comm_page->sample_rate = cpu_to_le32(44100); init_dsp_comm_page() 998 memset(chip->comm_page->monitors, ECHOGAIN_MUTED, MONITOR_ARRAY_SIZE); init_dsp_comm_page() 999 memset(chip->comm_page->vmixer, ECHOGAIN_MUTED, VMIXER_ARRAY_SIZE); init_dsp_comm_page() 1006 /* This function initializes the chip structure with default values, ie. all 1010 static int init_line_levels(struct echoaudio *chip) init_line_levels() argument 1012 memset(chip->output_gain, ECHOGAIN_MUTED, sizeof(chip->output_gain)); init_line_levels() 1013 memset(chip->input_gain, ECHOGAIN_MUTED, sizeof(chip->input_gain)); init_line_levels() 1014 memset(chip->monitor_gain, ECHOGAIN_MUTED, sizeof(chip->monitor_gain)); init_line_levels() 1015 memset(chip->vmixer_gain, ECHOGAIN_MUTED, sizeof(chip->vmixer_gain)); init_line_levels() 1016 chip->input_clock = ECHO_CLOCK_INTERNAL; init_line_levels() 1017 chip->output_clock = ECHO_CLOCK_WORD; init_line_levels() 1018 chip->sample_rate = 44100; init_line_levels() 1019 return restore_dsp_rettings(chip); init_line_levels() 1027 static int service_irq(struct echoaudio *chip) service_irq() argument 1032 if (get_dsp_register(chip, CHI32_STATUS_REG) & CHI32_STATUS_IRQ) { service_irq() 1036 if (chip->comm_page->midi_input[0]) /* The count is at index 0 */ service_irq() 1037 st = midi_service_irq(chip); /* Returns how many midi bytes we received */ service_irq() 1040 chip->comm_page->midi_input[0] = 0; service_irq() 1041 send_vector(chip, DSP_VC_ACK_INT); service_irq() 1056 static int allocate_pipes(struct echoaudio *chip, struct audiopipe *pipe, allocate_pipes() argument 1063 dev_dbg(chip->card->dev, allocate_pipes() 1066 if (chip->bad_board) allocate_pipes() 1073 if (chip->pipe_alloc_mask & channel_mask) { allocate_pipes() 1074 dev_err(chip->card->dev, allocate_pipes() 1079 chip->comm_page->position[pipe_index] = 0; allocate_pipes() 1080 chip->pipe_alloc_mask |= channel_mask; allocate_pipes() 1082 chip->pipe_cyclic_mask |= channel_mask; allocate_pipes() 1090 pipe->dma_counter = &chip->comm_page->position[pipe_index]; allocate_pipes() 1097 static int free_pipes(struct echoaudio *chip, struct audiopipe *pipe) free_pipes() argument 1102 if (snd_BUG_ON(!is_pipe_allocated(chip, pipe->index))) free_pipes() 1110 chip->pipe_alloc_mask &= ~channel_mask; free_pipes() 1111 chip->pipe_cyclic_mask &= ~channel_mask; free_pipes() 1121 static int sglist_init(struct echoaudio *chip, struct audiopipe *pipe) sglist_init() argument 1125 chip->comm_page->sglist_addr[pipe->index].addr = sglist_init() 1132 static int sglist_add_mapping(struct echoaudio *chip, struct audiopipe *pipe, sglist_add_mapping() argument 1143 dev_err(chip->card->dev, "SGlist: too many fragments\n"); sglist_add_mapping() 1151 static inline int sglist_add_irq(struct echoaudio *chip, struct audiopipe *pipe) sglist_add_irq() argument 1153 return sglist_add_mapping(chip, pipe, 0, 0); sglist_add_irq() 1158 static inline int sglist_wrap(struct echoaudio *chip, struct audiopipe *pipe) sglist_wrap() argument 1160 return sglist_add_mapping(chip, pipe, pipe->sgpage.addr, 0); sglist_wrap()
H A D	gina24_dsp.c	32 static int write_control_reg(struct echoaudio *chip, u32 value, char force); 33 static int set_input_clock(struct echoaudio *chip, u16 clock); 34 static int set_professional_spdif(struct echoaudio *chip, char prof); 35 static int set_digital_mode(struct echoaudio *chip, u8 mode); 36 static int load_asic_generic(struct echoaudio *chip, u32 cmd, short asic); 37 static int check_asic_status(struct echoaudio *chip); 40 static int init_hw(struct echoaudio *chip, u16 device_id, u16 subdevice_id) init_hw() argument 47 if ((err = init_dsp_comm_page(chip))) { init_hw() 48 dev_err(chip->card->dev, init_hw() 53 chip->device_id = device_id; init_hw() 54 chip->subdevice_id = subdevice_id; init_hw() 55 chip->bad_board = TRUE; init_hw() 56 chip->input_clock_types = init_hw() 62 if (chip->device_id == DEVICE_ID_56361) { init_hw() 63 chip->dsp_code_to_load = FW_GINA24_361_DSP; init_hw() 64 chip->digital_modes = init_hw() 69 chip->dsp_code_to_load = FW_GINA24_301_DSP; init_hw() 70 chip->digital_modes = init_hw() 77 if ((err = load_firmware(chip)) < 0) init_hw() 79 chip->bad_board = FALSE; init_hw() 86 static int set_mixer_defaults(struct echoaudio *chip) set_mixer_defaults() argument 88 chip->digital_mode = DIGITAL_MODE_SPDIF_RCA; set_mixer_defaults() 89 chip->professional_spdif = FALSE; set_mixer_defaults() 90 chip->digital_in_automute = TRUE; set_mixer_defaults() 91 return init_line_levels(chip); set_mixer_defaults() 96 static u32 detect_input_clocks(const struct echoaudio *chip) detect_input_clocks() argument 102 clocks_from_dsp = le32_to_cpu(chip->comm_page->status_clocks); detect_input_clocks() 122 static int load_asic(struct echoaudio *chip) load_asic() argument 128 if (chip->asic_loaded) load_asic() 135 if (chip->device_id == DEVICE_ID_56361) load_asic() 140 err = load_asic_generic(chip, DSP_FNC_LOAD_GINA24_ASIC, asic); load_asic() 144 chip->asic_code = asic; load_asic() 149 err = check_asic_status(chip); load_asic() 155 err = write_control_reg(chip, control_reg, TRUE); load_asic() 162 static int set_sample_rate(struct echoaudio *chip, u32 rate) set_sample_rate() argument 167 chip->digital_mode == DIGITAL_MODE_ADAT)) set_sample_rate() 171 if (chip->input_clock != ECHO_CLOCK_INTERNAL) { set_sample_rate() 172 dev_warn(chip->card->dev, set_sample_rate() 175 chip->comm_page->sample_rate = cpu_to_le32(rate); set_sample_rate() 176 chip->sample_rate = rate; set_sample_rate() 182 control_reg = le32_to_cpu(chip->comm_page->control_register); set_sample_rate() 218 dev_err(chip->card->dev, set_sample_rate() 225 chip->comm_page->sample_rate = cpu_to_le32(rate); /* ignored by the DSP */ set_sample_rate() 226 chip->sample_rate = rate; set_sample_rate() 227 dev_dbg(chip->card->dev, "set_sample_rate: %d clock %d\n", rate, clock); set_sample_rate() 229 return write_control_reg(chip, control_reg, FALSE); set_sample_rate() 234 static int set_input_clock(struct echoaudio *chip, u16 clock) set_input_clock() argument 240 control_reg = le32_to_cpu(chip->comm_page->control_register) & set_input_clock() 242 clocks_from_dsp = le32_to_cpu(chip->comm_page->status_clocks); set_input_clock() 246 chip->input_clock = ECHO_CLOCK_INTERNAL; set_input_clock() 247 return set_sample_rate(chip, chip->sample_rate); set_input_clock() 249 if (chip->digital_mode == DIGITAL_MODE_ADAT) set_input_clock() 258 if (chip->digital_mode != DIGITAL_MODE_ADAT) set_input_clock() 271 dev_err(chip->card->dev, set_input_clock() 276 chip->input_clock = clock; set_input_clock() 277 return write_control_reg(chip, control_reg, TRUE); set_input_clock() 282 static int dsp_set_digital_mode(struct echoaudio *chip, u8 mode) dsp_set_digital_mode() argument 293 if (chip->input_clock == ECHO_CLOCK_ADAT) dsp_set_digital_mode() 297 if (chip->input_clock == ECHO_CLOCK_SPDIF) dsp_set_digital_mode() 301 dev_err(chip->card->dev, dsp_set_digital_mode() 306 spin_lock_irq(&chip->lock); dsp_set_digital_mode() 309 chip->sample_rate = 48000; dsp_set_digital_mode() 310 set_input_clock(chip, ECHO_CLOCK_INTERNAL); dsp_set_digital_mode() 314 control_reg = le32_to_cpu(chip->comm_page->control_register); dsp_set_digital_mode() 324 if (chip->device_id == DEVICE_ID_56301) dsp_set_digital_mode() 336 err = write_control_reg(chip, control_reg, TRUE); dsp_set_digital_mode() 337 spin_unlock_irq(&chip->lock); dsp_set_digital_mode() 340 chip->digital_mode = mode; dsp_set_digital_mode() 342 dev_dbg(chip->card->dev, dsp_set_digital_mode() 343 "set_digital_mode to %d\n", chip->digital_mode); dsp_set_digital_mode()
H A D	mona_dsp.c	32 static int write_control_reg(struct echoaudio *chip, u32 value, char force); 33 static int set_input_clock(struct echoaudio *chip, u16 clock); 34 static int set_professional_spdif(struct echoaudio *chip, char prof); 35 static int set_digital_mode(struct echoaudio *chip, u8 mode); 36 static int load_asic_generic(struct echoaudio *chip, u32 cmd, short asic); 37 static int check_asic_status(struct echoaudio *chip); 40 static int init_hw(struct echoaudio *chip, u16 device_id, u16 subdevice_id) init_hw() argument 47 if ((err = init_dsp_comm_page(chip))) { init_hw() 48 dev_err(chip->card->dev, init_hw() 53 chip->device_id = device_id; init_hw() 54 chip->subdevice_id = subdevice_id; init_hw() 55 chip->bad_board = TRUE; init_hw() 56 chip->input_clock_types = init_hw() 59 chip->digital_modes = init_hw() 65 if (chip->device_id == DEVICE_ID_56361) init_hw() 66 chip->dsp_code_to_load = FW_MONA_361_DSP; init_hw() 68 chip->dsp_code_to_load = FW_MONA_301_DSP; init_hw() 70 if ((err = load_firmware(chip)) < 0) init_hw() 72 chip->bad_board = FALSE; init_hw() 79 static int set_mixer_defaults(struct echoaudio *chip) set_mixer_defaults() argument 81 chip->digital_mode = DIGITAL_MODE_SPDIF_RCA; set_mixer_defaults() 82 chip->professional_spdif = FALSE; set_mixer_defaults() 83 chip->digital_in_automute = TRUE; set_mixer_defaults() 84 return init_line_levels(chip); set_mixer_defaults() 89 static u32 detect_input_clocks(const struct echoaudio *chip) detect_input_clocks() argument 95 clocks_from_dsp = le32_to_cpu(chip->comm_page->status_clocks); detect_input_clocks() 115 static int load_asic(struct echoaudio *chip) load_asic() argument 121 if (chip->asic_loaded) load_asic() 126 if (chip->device_id == DEVICE_ID_56361) load_asic() 131 err = load_asic_generic(chip, DSP_FNC_LOAD_MONA_PCI_CARD_ASIC, asic); load_asic() 135 chip->asic_code = asic; load_asic() 139 err = load_asic_generic(chip, DSP_FNC_LOAD_MONA_EXTERNAL_ASIC, load_asic() 145 err = check_asic_status(chip); load_asic() 151 err = write_control_reg(chip, control_reg, TRUE); load_asic() 162 static int switch_asic(struct echoaudio *chip, char double_speed) switch_asic() argument 170 if (chip->device_id == DEVICE_ID_56361) { switch_asic() 182 if (asic != chip->asic_code) { switch_asic() 184 err = load_asic_generic(chip, DSP_FNC_LOAD_MONA_PCI_CARD_ASIC, switch_asic() 188 chip->asic_code = asic; switch_asic() 196 static int set_sample_rate(struct echoaudio *chip, u32 rate) set_sample_rate() argument 203 if (chip->input_clock != ECHO_CLOCK_INTERNAL) { set_sample_rate() 204 dev_dbg(chip->card->dev, set_sample_rate() 207 chip->comm_page->sample_rate = cpu_to_le32(rate); set_sample_rate() 208 chip->sample_rate = rate; set_sample_rate() 214 if (chip->digital_mode == DIGITAL_MODE_ADAT) set_sample_rate() 216 if (chip->device_id == DEVICE_ID_56361) set_sample_rate() 221 if (chip->device_id == DEVICE_ID_56361) set_sample_rate() 228 if (asic != chip->asic_code) { set_sample_rate() 231 spin_unlock_irq(&chip->lock); set_sample_rate() 232 err = load_asic_generic(chip, DSP_FNC_LOAD_MONA_PCI_CARD_ASIC, set_sample_rate() 234 spin_lock_irq(&chip->lock); set_sample_rate() 238 chip->asic_code = asic; set_sample_rate() 244 control_reg = le32_to_cpu(chip->comm_page->control_register); set_sample_rate() 281 dev_err(chip->card->dev, set_sample_rate() 288 chip->comm_page->sample_rate = cpu_to_le32(rate); /* ignored by the DSP */ set_sample_rate() 289 chip->sample_rate = rate; set_sample_rate() 290 dev_dbg(chip->card->dev, set_sample_rate() 293 return write_control_reg(chip, control_reg, force_write); set_sample_rate() 298 static int set_input_clock(struct echoaudio *chip, u16 clock) set_input_clock() argument 305 if (atomic_read(&chip->opencount)) set_input_clock() 309 control_reg = le32_to_cpu(chip->comm_page->control_register) & set_input_clock() 311 clocks_from_dsp = le32_to_cpu(chip->comm_page->status_clocks); set_input_clock() 315 chip->input_clock = ECHO_CLOCK_INTERNAL; set_input_clock() 316 return set_sample_rate(chip, chip->sample_rate); set_input_clock() 318 if (chip->digital_mode == DIGITAL_MODE_ADAT) set_input_clock() 320 spin_unlock_irq(&chip->lock); set_input_clock() 321 err = switch_asic(chip, clocks_from_dsp & set_input_clock() 323 spin_lock_irq(&chip->lock); set_input_clock() 333 spin_unlock_irq(&chip->lock); set_input_clock() 334 err = switch_asic(chip, clocks_from_dsp & set_input_clock() 336 spin_lock_irq(&chip->lock); set_input_clock() 346 dev_dbg(chip->card->dev, "Set Mona clock to ADAT\n"); set_input_clock() 347 if (chip->digital_mode != DIGITAL_MODE_ADAT) set_input_clock() 353 dev_err(chip->card->dev, set_input_clock() 358 chip->input_clock = clock; set_input_clock() 359 return write_control_reg(chip, control_reg, TRUE); set_input_clock() 364 static int dsp_set_digital_mode(struct echoaudio *chip, u8 mode) dsp_set_digital_mode() argument 374 if (chip->input_clock == ECHO_CLOCK_ADAT) dsp_set_digital_mode() 378 if (chip->input_clock == ECHO_CLOCK_SPDIF) dsp_set_digital_mode() 382 dev_err(chip->card->dev, dsp_set_digital_mode() 387 spin_lock_irq(&chip->lock); dsp_set_digital_mode() 390 chip->sample_rate = 48000; dsp_set_digital_mode() 391 set_input_clock(chip, ECHO_CLOCK_INTERNAL); dsp_set_digital_mode() 395 control_reg = le32_to_cpu(chip->comm_page->control_register); dsp_set_digital_mode() 409 if (chip->asic_code == FW_MONA_361_1_ASIC96 || dsp_set_digital_mode() 410 chip->asic_code == FW_MONA_301_1_ASIC96) { dsp_set_digital_mode() 411 set_sample_rate(chip, 48000); dsp_set_digital_mode() 418 err = write_control_reg(chip, control_reg, FALSE); dsp_set_digital_mode() 419 spin_unlock_irq(&chip->lock); dsp_set_digital_mode() 422 chip->digital_mode = mode; dsp_set_digital_mode() 424 dev_dbg(chip->card->dev, "set_digital_mode to %d\n", mode); dsp_set_digital_mode()
H A D	darla20_dsp.c	32 static int init_hw(struct echoaudio *chip, u16 device_id, u16 subdevice_id) init_hw() argument 39 if ((err = init_dsp_comm_page(chip))) { init_hw() 40 dev_err(chip->card->dev, init_hw() 45 chip->device_id = device_id; init_hw() 46 chip->subdevice_id = subdevice_id; init_hw() 47 chip->bad_board = TRUE; init_hw() 48 chip->dsp_code_to_load = FW_DARLA20_DSP; init_hw() 49 chip->spdif_status = GD_SPDIF_STATUS_UNDEF; init_hw() 50 chip->clock_state = GD_CLOCK_UNDEF; init_hw() 53 chip->asic_loaded = TRUE; init_hw() 54 chip->input_clock_types = ECHO_CLOCK_BIT_INTERNAL; init_hw() 56 if ((err = load_firmware(chip)) < 0) init_hw() 58 chip->bad_board = FALSE; init_hw() 65 static int set_mixer_defaults(struct echoaudio *chip) set_mixer_defaults() argument 67 return init_line_levels(chip); set_mixer_defaults() 73 static u32 detect_input_clocks(const struct echoaudio *chip) detect_input_clocks() argument 81 static int load_asic(struct echoaudio *chip) load_asic() argument 88 static int set_sample_rate(struct echoaudio *chip, u32 rate) set_sample_rate() argument 92 if (wait_handshake(chip)) set_sample_rate() 110 if (chip->clock_state == clock_state) set_sample_rate() 112 if (spdif_status == chip->spdif_status) set_sample_rate() 115 chip->comm_page->sample_rate = cpu_to_le32(rate); set_sample_rate() 116 chip->comm_page->gd_clock_state = clock_state; set_sample_rate() 117 chip->comm_page->gd_spdif_status = spdif_status; set_sample_rate() 118 chip->comm_page->gd_resampler_state = 3; /* magic number - should always be 3 */ set_sample_rate() 122 chip->clock_state = clock_state; set_sample_rate() 124 chip->spdif_status = spdif_status; set_sample_rate() 125 chip->sample_rate = rate; set_sample_rate() 127 clear_handshake(chip); set_sample_rate() 128 return send_vector(chip, DSP_VC_SET_GD_AUDIO_STATE); set_sample_rate()
H A D	darla24_dsp.c	32 static int init_hw(struct echoaudio *chip, u16 device_id, u16 subdevice_id) init_hw() argument 39 if ((err = init_dsp_comm_page(chip))) { init_hw() 40 dev_err(chip->card->dev, init_hw() 45 chip->device_id = device_id; init_hw() 46 chip->subdevice_id = subdevice_id; init_hw() 47 chip->bad_board = TRUE; init_hw() 48 chip->dsp_code_to_load = FW_DARLA24_DSP; init_hw() 51 chip->asic_loaded = TRUE; init_hw() 52 chip->input_clock_types = ECHO_CLOCK_BIT_INTERNAL | init_hw() 55 if ((err = load_firmware(chip)) < 0) init_hw() 57 chip->bad_board = FALSE; init_hw() 64 static int set_mixer_defaults(struct echoaudio *chip) set_mixer_defaults() argument 66 return init_line_levels(chip); set_mixer_defaults() 71 static u32 detect_input_clocks(const struct echoaudio *chip) detect_input_clocks() argument 77 clocks_from_dsp = le32_to_cpu(chip->comm_page->status_clocks); detect_input_clocks() 90 static int load_asic(struct echoaudio *chip) load_asic() argument 97 static int set_sample_rate(struct echoaudio *chip, u32 rate) set_sample_rate() argument 130 dev_err(chip->card->dev, set_sample_rate() 136 if (wait_handshake(chip)) set_sample_rate() 139 dev_dbg(chip->card->dev, set_sample_rate() 141 chip->sample_rate = rate; set_sample_rate() 144 if (chip->input_clock == ECHO_CLOCK_ESYNC) set_sample_rate() 147 chip->comm_page->sample_rate = cpu_to_le32(rate); /* ignored by the DSP ? */ set_sample_rate() 148 chip->comm_page->gd_clock_state = clock; set_sample_rate() 149 clear_handshake(chip); set_sample_rate() 150 return send_vector(chip, DSP_VC_SET_GD_AUDIO_STATE); set_sample_rate() 155 static int set_input_clock(struct echoaudio *chip, u16 clock) set_input_clock() argument 160 chip->input_clock = clock; set_input_clock() 161 return set_sample_rate(chip, chip->sample_rate); set_input_clock()
H A D	indigo_express_dsp.c	29 static int set_sample_rate(struct echoaudio *chip, u32 rate) set_sample_rate() argument 33 if (wait_handshake(chip)) set_sample_rate() 36 old_control_reg = le32_to_cpu(chip->comm_page->control_register); set_sample_rate() 64 dev_dbg(chip->card->dev, set_sample_rate() 66 chip->comm_page->control_register = cpu_to_le32(control_reg); set_sample_rate() 67 chip->sample_rate = rate; set_sample_rate() 68 clear_handshake(chip); set_sample_rate() 69 return send_vector(chip, DSP_VC_UPDATE_CLOCKS); set_sample_rate() 77 static int set_vmixer_gain(struct echoaudio *chip, u16 output, u16 pipe, set_vmixer_gain() argument 82 if (snd_BUG_ON(pipe >= num_pipes_out(chip) || set_vmixer_gain() 83 output >= num_busses_out(chip))) set_vmixer_gain() 86 if (wait_handshake(chip)) set_vmixer_gain() 89 chip->vmixer_gain[output][pipe] = gain; set_vmixer_gain() 90 index = output * num_pipes_out(chip) + pipe; set_vmixer_gain() 91 chip->comm_page->vmixer[index] = gain; set_vmixer_gain() 93 dev_dbg(chip->card->dev, set_vmixer_gain() 101 static int update_vmixer_level(struct echoaudio *chip) update_vmixer_level() argument 103 if (wait_handshake(chip)) update_vmixer_level() 105 clear_handshake(chip); update_vmixer_level() 106 return send_vector(chip, DSP_VC_SET_VMIXER_GAIN); update_vmixer_level() 111 static u32 detect_input_clocks(const struct echoaudio *chip) detect_input_clocks() argument 119 static int load_asic(struct echoaudio *chip) load_asic() argument
H A D	echoaudio_gml.c	40 static int check_asic_status(struct echoaudio *chip) check_asic_status() argument 44 send_vector(chip, DSP_VC_TEST_ASIC); check_asic_status() 48 if (read_dsp(chip, &asic_status) < 0) { check_asic_status() 49 dev_err(chip->card->dev, check_asic_status() 51 chip->asic_loaded = FALSE; check_asic_status() 55 chip->asic_loaded = (asic_status == ASIC_ALREADY_LOADED); check_asic_status() 56 return chip->asic_loaded ? 0 : -EIO; check_asic_status() 64 static int write_control_reg(struct echoaudio *chip, u32 value, char force) write_control_reg() argument 67 if (chip->digital_in_automute) write_control_reg() 72 dev_dbg(chip->card->dev, "write_control_reg: 0x%x\n", value); write_control_reg() 76 if (value != chip->comm_page->control_register || force) { write_control_reg() 77 if (wait_handshake(chip)) write_control_reg() 79 chip->comm_page->control_register = value; write_control_reg() 80 clear_handshake(chip); write_control_reg() 81 return send_vector(chip, DSP_VC_WRITE_CONTROL_REG); write_control_reg() 93 static int set_input_auto_mute(struct echoaudio *chip, int automute) set_input_auto_mute() argument 95 dev_dbg(chip->card->dev, "set_input_auto_mute %d\n", automute); set_input_auto_mute() 97 chip->digital_in_automute = automute; set_input_auto_mute() 101 return set_input_clock(chip, chip->input_clock); set_input_auto_mute() 107 static int set_digital_mode(struct echoaudio *chip, u8 mode) set_digital_mode() argument 112 if (chip->bad_board) set_digital_mode() 116 if (snd_BUG_ON(chip->pipe_alloc_mask)) set_digital_mode() 119 if (snd_BUG_ON(!(chip->digital_modes & (1 << mode)))) set_digital_mode() 122 previous_mode = chip->digital_mode; set_digital_mode() 123 err = dsp_set_digital_mode(chip, mode); set_digital_mode() 130 spin_lock_irq(&chip->lock); set_digital_mode() 131 for (o = 0; o < num_busses_out(chip); o++) set_digital_mode() 132 for (i = 0; i < num_busses_in(chip); i++) set_digital_mode() 133 set_monitor_gain(chip, o, i, set_digital_mode() 134 chip->monitor_gain[o][i]); set_digital_mode() 137 for (i = 0; i < num_busses_in(chip); i++) set_digital_mode() 138 set_input_gain(chip, i, chip->input_gain[i]); set_digital_mode() 139 update_input_line_level(chip); set_digital_mode() 142 for (o = 0; o < num_busses_out(chip); o++) set_digital_mode() 143 set_output_gain(chip, o, chip->output_gain[o]); set_digital_mode() 144 update_output_line_level(chip); set_digital_mode() 145 spin_unlock_irq(&chip->lock); set_digital_mode() 154 static int set_professional_spdif(struct echoaudio *chip, char prof) set_professional_spdif() argument 160 control_reg = le32_to_cpu(chip->comm_page->control_register); set_professional_spdif() 170 switch (chip->sample_rate) { set_professional_spdif() 184 switch (chip->sample_rate) { set_professional_spdif() 195 if ((err = write_control_reg(chip, control_reg, FALSE))) set_professional_spdif() 197 chip->professional_spdif = prof; set_professional_spdif() 198 dev_dbg(chip->card->dev, "set_professional_spdif to %s\n", set_professional_spdif()
H A D	indigodjx_dsp.c	29 static int update_vmixer_level(struct echoaudio *chip); 30 static int set_vmixer_gain(struct echoaudio *chip, u16 output, 34 static int init_hw(struct echoaudio *chip, u16 device_id, u16 subdevice_id) init_hw() argument 41 err = init_dsp_comm_page(chip); init_hw() 43 dev_err(chip->card->dev, init_hw() 48 chip->device_id = device_id; init_hw() 49 chip->subdevice_id = subdevice_id; init_hw() 50 chip->bad_board = TRUE; init_hw() 51 chip->dsp_code_to_load = FW_INDIGO_DJX_DSP; init_hw() 54 chip->asic_loaded = TRUE; init_hw() 55 chip->input_clock_types = ECHO_CLOCK_BIT_INTERNAL; init_hw() 57 err = load_firmware(chip); init_hw() 60 chip->bad_board = FALSE; init_hw() 67 static int set_mixer_defaults(struct echoaudio *chip) set_mixer_defaults() argument 69 return init_line_levels(chip); set_mixer_defaults()
H A D	indigoiox_dsp.c	29 static int update_vmixer_level(struct echoaudio *chip); 30 static int set_vmixer_gain(struct echoaudio *chip, u16 output, 34 static int init_hw(struct echoaudio *chip, u16 device_id, u16 subdevice_id) init_hw() argument 41 err = init_dsp_comm_page(chip); init_hw() 43 dev_err(chip->card->dev, init_hw() 48 chip->device_id = device_id; init_hw() 49 chip->subdevice_id = subdevice_id; init_hw() 50 chip->bad_board = TRUE; init_hw() 51 chip->dsp_code_to_load = FW_INDIGO_IOX_DSP; init_hw() 54 chip->asic_loaded = TRUE; init_hw() 55 chip->input_clock_types = ECHO_CLOCK_BIT_INTERNAL; init_hw() 57 err = load_firmware(chip); init_hw() 60 chip->bad_board = FALSE; init_hw() 67 static int set_mixer_defaults(struct echoaudio *chip) set_mixer_defaults() argument 69 return init_line_levels(chip); set_mixer_defaults()
/linux-4.1.27/sound/pci/oxygen/
H A D	oxygen_lib.c	41 static inline int oxygen_uart_input_ready(struct oxygen *chip) oxygen_uart_input_ready() argument 43 return !(oxygen_read8(chip, OXYGEN_MPU401 + 1) & MPU401_RX_EMPTY); oxygen_uart_input_ready() 46 static void oxygen_read_uart(struct oxygen *chip) oxygen_read_uart() argument 48 if (unlikely(!oxygen_uart_input_ready(chip))) { oxygen_read_uart() 50 oxygen_read8(chip, OXYGEN_MPU401); oxygen_read_uart() 54 u8 data = oxygen_read8(chip, OXYGEN_MPU401); oxygen_read_uart() 57 if (chip->uart_input_count >= ARRAY_SIZE(chip->uart_input)) oxygen_read_uart() 58 chip->uart_input_count = 0; oxygen_read_uart() 59 chip->uart_input[chip->uart_input_count++] = data; oxygen_read_uart() 60 } while (oxygen_uart_input_ready(chip)); oxygen_read_uart() 61 if (chip->model.uart_input) oxygen_read_uart() 62 chip->model.uart_input(chip); oxygen_read_uart() 67 struct oxygen *chip = dev_id; oxygen_interrupt() local 70 status = oxygen_read16(chip, OXYGEN_INTERRUPT_STATUS); oxygen_interrupt() 74 spin_lock(&chip->reg_lock); oxygen_interrupt() 87 chip->interrupt_mask &= ~OXYGEN_INT_SPDIF_IN_DETECT; oxygen_interrupt() 88 oxygen_write16(chip, OXYGEN_INTERRUPT_MASK, oxygen_interrupt() 89 chip->interrupt_mask & ~clear); oxygen_interrupt() 90 oxygen_write16(chip, OXYGEN_INTERRUPT_MASK, oxygen_interrupt() 91 chip->interrupt_mask); oxygen_interrupt() 94 elapsed_streams = status & chip->pcm_running; oxygen_interrupt() 96 spin_unlock(&chip->reg_lock); oxygen_interrupt() 99 if ((elapsed_streams & (1 << i)) && chip->streams[i]) oxygen_interrupt() 100 snd_pcm_period_elapsed(chip->streams[i]); oxygen_interrupt() 103 spin_lock(&chip->reg_lock); oxygen_interrupt() 104 i = oxygen_read32(chip, OXYGEN_SPDIF_CONTROL); oxygen_interrupt() 108 oxygen_write32(chip, OXYGEN_SPDIF_CONTROL, i); oxygen_interrupt() 109 schedule_work(&chip->spdif_input_bits_work); oxygen_interrupt() 111 spin_unlock(&chip->reg_lock); oxygen_interrupt() 115 schedule_work(&chip->gpio_work); oxygen_interrupt() 118 if (chip->midi) oxygen_interrupt() 119 snd_mpu401_uart_interrupt(0, chip->midi->private_data); oxygen_interrupt() 121 oxygen_read_uart(chip); oxygen_interrupt() 125 wake_up(&chip->ac97_waitqueue); oxygen_interrupt() 132 struct oxygen *chip = container_of(work, struct oxygen, oxygen_spdif_input_bits_changed() local 142 spin_lock_irq(&chip->reg_lock); oxygen_spdif_input_bits_changed() 143 reg = oxygen_read32(chip, OXYGEN_SPDIF_CONTROL); oxygen_spdif_input_bits_changed() 152 oxygen_write32(chip, OXYGEN_SPDIF_CONTROL, reg); oxygen_spdif_input_bits_changed() 153 spin_unlock_irq(&chip->reg_lock); oxygen_spdif_input_bits_changed() 155 spin_lock_irq(&chip->reg_lock); oxygen_spdif_input_bits_changed() 156 reg = oxygen_read32(chip, OXYGEN_SPDIF_CONTROL); oxygen_spdif_input_bits_changed() 169 oxygen_write32(chip, OXYGEN_SPDIF_CONTROL, reg); oxygen_spdif_input_bits_changed() 173 spin_unlock_irq(&chip->reg_lock); oxygen_spdif_input_bits_changed() 175 if (chip->controls[CONTROL_SPDIF_INPUT_BITS]) { oxygen_spdif_input_bits_changed() 176 spin_lock_irq(&chip->reg_lock); oxygen_spdif_input_bits_changed() 177 chip->interrupt_mask |= OXYGEN_INT_SPDIF_IN_DETECT; oxygen_spdif_input_bits_changed() 178 oxygen_write16(chip, OXYGEN_INTERRUPT_MASK, oxygen_spdif_input_bits_changed() 179 chip->interrupt_mask); oxygen_spdif_input_bits_changed() 180 spin_unlock_irq(&chip->reg_lock); oxygen_spdif_input_bits_changed() 186 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, oxygen_spdif_input_bits_changed() 187 &chip->controls[CONTROL_SPDIF_INPUT_BITS]->id); oxygen_spdif_input_bits_changed() 193 struct oxygen *chip = container_of(work, struct oxygen, gpio_work); oxygen_gpio_changed() local 195 if (chip->model.gpio_changed) oxygen_gpio_changed() 196 chip->model.gpio_changed(chip); oxygen_gpio_changed() 203 struct oxygen *chip = entry->private_data; oxygen_proc_read() local 206 switch (oxygen_read8(chip, OXYGEN_REVISION) & OXYGEN_PACKAGE_ID_MASK) { oxygen_proc_read() 216 snd_iprintf(buffer, " %02x", oxygen_read8(chip, i + j)); oxygen_proc_read() 219 if (mutex_lock_interruptible(&chip->mutex) < 0) oxygen_proc_read() 221 if (chip->has_ac97_0) { oxygen_proc_read() 227 oxygen_read_ac97(chip, 0, i + j)); oxygen_proc_read() 231 if (chip->has_ac97_1) { oxygen_proc_read() 237 oxygen_read_ac97(chip, 1, i + j)); oxygen_proc_read() 241 mutex_unlock(&chip->mutex); oxygen_proc_read() 242 if (chip->model.dump_registers) oxygen_proc_read() 243 chip->model.dump_registers(chip, buffer); oxygen_proc_read() 246 static void oxygen_proc_init(struct oxygen *chip) oxygen_proc_init() argument 250 if (!snd_card_proc_new(chip->card, "oxygen", &entry)) oxygen_proc_init() 251 snd_info_set_text_ops(entry, chip, oxygen_proc_read); oxygen_proc_init() 254 #define oxygen_proc_init(chip) 258 oxygen_search_pci_id(struct oxygen *chip, const struct pci_device_id ids[]) oxygen_search_pci_id() argument 266 oxygen_clear_bits8(chip, OXYGEN_FUNCTION, oxygen_search_pci_id() 270 * chip didn't if the first EEPROM word was overwritten. oxygen_search_pci_id() 272 subdevice = oxygen_read_eeprom(chip, 2); oxygen_search_pci_id() 274 if (subdevice == 0xffff && oxygen_read_eeprom(chip, 1) == 0xffff) oxygen_search_pci_id() 288 static void oxygen_restore_eeprom(struct oxygen *chip, oxygen_restore_eeprom() argument 293 eeprom_id = oxygen_read_eeprom(chip, 0); oxygen_restore_eeprom() 304 oxygen_write_eeprom(chip, 1, id->subvendor); oxygen_restore_eeprom() 305 oxygen_write_eeprom(chip, 0, OXYGEN_EEPROM_ID); oxygen_restore_eeprom() 307 oxygen_set_bits8(chip, OXYGEN_MISC, oxygen_restore_eeprom() 309 pci_write_config_word(chip->pci, PCI_SUBSYSTEM_VENDOR_ID, oxygen_restore_eeprom() 311 pci_write_config_word(chip->pci, PCI_SUBSYSTEM_ID, oxygen_restore_eeprom() 313 oxygen_clear_bits8(chip, OXYGEN_MISC, oxygen_restore_eeprom() 316 dev_info(chip->card->dev, "EEPROM ID restored\n"); oxygen_restore_eeprom() 358 tmp |= 1; /* park the PCI arbiter to the sound chip */ configure_pcie_bridge() 372 static void oxygen_init(struct oxygen *chip) oxygen_init() argument 376 chip->dac_routing = 1; oxygen_init() 378 chip->dac_volume[i] = chip->model.dac_volume_min; oxygen_init() 379 chip->dac_mute = 1; oxygen_init() 380 chip->spdif_playback_enable = 1; oxygen_init() 381 chip->spdif_bits = OXYGEN_SPDIF_C | OXYGEN_SPDIF_ORIGINAL | oxygen_init() 383 chip->spdif_pcm_bits = chip->spdif_bits; oxygen_init() 385 if (!(oxygen_read8(chip, OXYGEN_REVISION) & OXYGEN_REVISION_2)) oxygen_init() 386 oxygen_set_bits8(chip, OXYGEN_MISC, oxygen_init() 389 i = oxygen_read16(chip, OXYGEN_AC97_CONTROL); oxygen_init() 390 chip->has_ac97_0 = (i & OXYGEN_AC97_CODEC_0) != 0; oxygen_init() 391 chip->has_ac97_1 = (i & OXYGEN_AC97_CODEC_1) != 0; oxygen_init() 393 oxygen_write8_masked(chip, OXYGEN_FUNCTION, oxygen_init() 395 chip->model.function_flags, oxygen_init() 399 oxygen_write8(chip, OXYGEN_DMA_STATUS, 0); oxygen_init() 400 oxygen_write8(chip, OXYGEN_DMA_PAUSE, 0); oxygen_init() 401 oxygen_write8(chip, OXYGEN_PLAY_CHANNELS, oxygen_init() 405 oxygen_write16(chip, OXYGEN_INTERRUPT_MASK, 0); oxygen_init() 406 oxygen_write8_masked(chip, OXYGEN_MISC, oxygen_init() 407 chip->model.misc_flags, oxygen_init() 413 oxygen_write8(chip, OXYGEN_REC_FORMAT, oxygen_init() 417 oxygen_write8(chip, OXYGEN_PLAY_FORMAT, oxygen_init() 420 oxygen_write8(chip, OXYGEN_REC_CHANNELS, OXYGEN_REC_CHANNELS_2_2_2); oxygen_init() 421 oxygen_write16(chip, OXYGEN_I2S_MULTICH_FORMAT, oxygen_init() 423 chip->model.dac_i2s_format | oxygen_init() 424 OXYGEN_I2S_MCLK(chip->model.dac_mclks) | oxygen_init() 428 if (chip->model.device_config & CAPTURE_0_FROM_I2S_1) oxygen_init() 429 oxygen_write16(chip, OXYGEN_I2S_A_FORMAT, oxygen_init() 431 chip->model.adc_i2s_format | oxygen_init() 432 OXYGEN_I2S_MCLK(chip->model.adc_mclks) | oxygen_init() 437 oxygen_write16(chip, OXYGEN_I2S_A_FORMAT, oxygen_init() 440 if (chip->model.device_config & (CAPTURE_0_FROM_I2S_2 | oxygen_init() 442 oxygen_write16(chip, OXYGEN_I2S_B_FORMAT, oxygen_init() 444 chip->model.adc_i2s_format | oxygen_init() 445 OXYGEN_I2S_MCLK(chip->model.adc_mclks) | oxygen_init() 450 oxygen_write16(chip, OXYGEN_I2S_B_FORMAT, oxygen_init() 453 if (chip->model.device_config & CAPTURE_3_FROM_I2S_3) oxygen_init() 454 oxygen_write16(chip, OXYGEN_I2S_C_FORMAT, oxygen_init() 456 chip->model.adc_i2s_format | oxygen_init() 457 OXYGEN_I2S_MCLK(chip->model.adc_mclks) | oxygen_init() 462 oxygen_write16(chip, OXYGEN_I2S_C_FORMAT, oxygen_init() 465 oxygen_clear_bits32(chip, OXYGEN_SPDIF_CONTROL, oxygen_init() 468 if (chip->model.device_config & CAPTURE_1_FROM_SPDIF) oxygen_init() 469 oxygen_write32_masked(chip, OXYGEN_SPDIF_CONTROL, oxygen_init() 482 oxygen_clear_bits32(chip, OXYGEN_SPDIF_CONTROL, oxygen_init() 486 oxygen_write32(chip, OXYGEN_SPDIF_OUTPUT_BITS, chip->spdif_bits); oxygen_init() 487 oxygen_write16(chip, OXYGEN_2WIRE_BUS_STATUS, oxygen_init() 491 oxygen_clear_bits8(chip, OXYGEN_MPU401_CONTROL, OXYGEN_MPU401_LOOPBACK); oxygen_init() 492 oxygen_write8(chip, OXYGEN_GPI_INTERRUPT_MASK, 0); oxygen_init() 493 oxygen_write16(chip, OXYGEN_GPIO_INTERRUPT_MASK, 0); oxygen_init() 494 oxygen_write16(chip, OXYGEN_PLAY_ROUTING, oxygen_init() 501 oxygen_write8(chip, OXYGEN_REC_ROUTING, oxygen_init() 505 oxygen_write8(chip, OXYGEN_ADC_MONITOR, 0); oxygen_init() 506 oxygen_write8(chip, OXYGEN_A_MONITOR_ROUTING, oxygen_init() 512 if (chip->has_ac97_0 | chip->has_ac97_1) oxygen_init() 513 oxygen_write8(chip, OXYGEN_AC97_INTERRUPT_MASK, oxygen_init() 517 oxygen_write8(chip, OXYGEN_AC97_INTERRUPT_MASK, 0); oxygen_init() 518 oxygen_write32(chip, OXYGEN_AC97_OUT_CONFIG, 0); oxygen_init() 519 oxygen_write32(chip, OXYGEN_AC97_IN_CONFIG, 0); oxygen_init() 520 if (!(chip->has_ac97_0 | chip->has_ac97_1)) oxygen_init() 521 oxygen_set_bits16(chip, OXYGEN_AC97_CONTROL, oxygen_init() 523 if (!chip->has_ac97_0) { oxygen_init() 524 oxygen_set_bits16(chip, OXYGEN_AC97_CONTROL, oxygen_init() 527 oxygen_write_ac97(chip, 0, AC97_RESET, 0); oxygen_init() 529 oxygen_ac97_set_bits(chip, 0, CM9780_GPIO_SETUP, oxygen_init() 531 oxygen_ac97_set_bits(chip, 0, CM9780_MIXER, oxygen_init() 534 oxygen_ac97_set_bits(chip, 0, CM9780_JACK, oxygen_init() 538 oxygen_write_ac97(chip, 0, AC97_MASTER, 0x0000); oxygen_init() 539 oxygen_write_ac97(chip, 0, AC97_PC_BEEP, 0x8000); oxygen_init() 540 oxygen_write_ac97(chip, 0, AC97_MIC, 0x8808); oxygen_init() 541 oxygen_write_ac97(chip, 0, AC97_LINE, 0x0808); oxygen_init() 542 oxygen_write_ac97(chip, 0, AC97_CD, 0x8808); oxygen_init() 543 oxygen_write_ac97(chip, 0, AC97_VIDEO, 0x8808); oxygen_init() 544 oxygen_write_ac97(chip, 0, AC97_AUX, 0x8808); oxygen_init() 545 oxygen_write_ac97(chip, 0, AC97_REC_GAIN, 0x8000); oxygen_init() 546 oxygen_write_ac97(chip, 0, AC97_CENTER_LFE_MASTER, 0x8080); oxygen_init() 547 oxygen_write_ac97(chip, 0, AC97_SURROUND_MASTER, 0x8080); oxygen_init() 548 oxygen_ac97_clear_bits(chip, 0, CM9780_GPIO_STATUS, oxygen_init() 551 oxygen_ac97_set_bits(chip, 0, AC97_POWERDOWN, oxygen_init() 553 oxygen_ac97_set_bits(chip, 0, AC97_EXTENDED_STATUS, oxygen_init() 556 if (chip->has_ac97_1) { oxygen_init() 557 oxygen_set_bits32(chip, OXYGEN_AC97_OUT_CONFIG, oxygen_init() 560 oxygen_write_ac97(chip, 1, AC97_RESET, 0); oxygen_init() 562 oxygen_write_ac97(chip, 1, AC97_MASTER, 0x0000); oxygen_init() 563 oxygen_write_ac97(chip, 1, AC97_HEADPHONE, 0x8000); oxygen_init() 564 oxygen_write_ac97(chip, 1, AC97_PC_BEEP, 0x8000); oxygen_init() 565 oxygen_write_ac97(chip, 1, AC97_MIC, 0x8808); oxygen_init() 566 oxygen_write_ac97(chip, 1, AC97_LINE, 0x8808); oxygen_init() 567 oxygen_write_ac97(chip, 1, AC97_CD, 0x8808); oxygen_init() 568 oxygen_write_ac97(chip, 1, AC97_VIDEO, 0x8808); oxygen_init() 569 oxygen_write_ac97(chip, 1, AC97_AUX, 0x8808); oxygen_init() 570 oxygen_write_ac97(chip, 1, AC97_PCM, 0x0808); oxygen_init() 571 oxygen_write_ac97(chip, 1, AC97_REC_SEL, 0x0000); oxygen_init() 572 oxygen_write_ac97(chip, 1, AC97_REC_GAIN, 0x0000); oxygen_init() 573 oxygen_ac97_set_bits(chip, 1, 0x6a, 0x0040); oxygen_init() 577 static void oxygen_shutdown(struct oxygen *chip) oxygen_shutdown() argument 579 spin_lock_irq(&chip->reg_lock); oxygen_shutdown() 580 chip->interrupt_mask = 0; oxygen_shutdown() 581 chip->pcm_running = 0; oxygen_shutdown() 582 oxygen_write16(chip, OXYGEN_DMA_STATUS, 0); oxygen_shutdown() 583 oxygen_write16(chip, OXYGEN_INTERRUPT_MASK, 0); oxygen_shutdown() 584 spin_unlock_irq(&chip->reg_lock); oxygen_shutdown() 589 struct oxygen *chip = card->private_data; oxygen_card_free() local 591 oxygen_shutdown(chip); oxygen_card_free() 592 if (chip->irq >= 0) oxygen_card_free() 593 free_irq(chip->irq, chip); oxygen_card_free() 594 flush_work(&chip->spdif_input_bits_work); oxygen_card_free() 595 flush_work(&chip->gpio_work); oxygen_card_free() 596 chip->model.cleanup(chip); oxygen_card_free() 597 kfree(chip->model_data); oxygen_card_free() 598 mutex_destroy(&chip->mutex); oxygen_card_free() 599 pci_release_regions(chip->pci); oxygen_card_free() 600 pci_disable_device(chip->pci); oxygen_card_free() 606 int (*get_model)(struct oxygen *chip, oxygen_pci_probe() 612 struct oxygen *chip; oxygen_pci_probe() local 617 sizeof(*chip), &card); oxygen_pci_probe() 621 chip = card->private_data; oxygen_pci_probe() 622 chip->card = card; oxygen_pci_probe() 623 chip->pci = pci; oxygen_pci_probe() 624 chip->irq = -1; oxygen_pci_probe() 625 spin_lock_init(&chip->reg_lock); oxygen_pci_probe() 626 mutex_init(&chip->mutex); oxygen_pci_probe() 627 INIT_WORK(&chip->spdif_input_bits_work, oxygen_pci_probe() 629 INIT_WORK(&chip->gpio_work, oxygen_gpio_changed); oxygen_pci_probe() 630 init_waitqueue_head(&chip->ac97_waitqueue); oxygen_pci_probe() 648 chip->addr = pci_resource_start(pci, 0); oxygen_pci_probe() 650 pci_id = oxygen_search_pci_id(chip, ids); oxygen_pci_probe() 655 oxygen_restore_eeprom(chip, pci_id); oxygen_pci_probe() 656 err = get_model(chip, pci_id); oxygen_pci_probe() 660 if (chip->model.model_data_size) { oxygen_pci_probe() 661 chip->model_data = kzalloc(chip->model.model_data_size, oxygen_pci_probe() 663 if (!chip->model_data) { oxygen_pci_probe() 673 oxygen_init(chip); oxygen_pci_probe() 674 chip->model.init(chip); oxygen_pci_probe() 677 KBUILD_MODNAME, chip); oxygen_pci_probe() 682 chip->irq = pci->irq; oxygen_pci_probe() 684 strcpy(card->driver, chip->model.chip); oxygen_pci_probe() 685 strcpy(card->shortname, chip->model.shortname); oxygen_pci_probe() 687 chip->model.longname, chip->addr, chip->irq); oxygen_pci_probe() 688 strcpy(card->mixername, chip->model.chip); oxygen_pci_probe() 689 snd_component_add(card, chip->model.chip); oxygen_pci_probe() 691 err = oxygen_pcm_init(chip); oxygen_pci_probe() 695 err = oxygen_mixer_init(chip); oxygen_pci_probe() 699 if (chip->model.device_config & (MIDI_OUTPUT | MIDI_INPUT)) { oxygen_pci_probe() 702 if (chip->model.device_config & MIDI_OUTPUT) oxygen_pci_probe() 704 if (chip->model.device_config & MIDI_INPUT) oxygen_pci_probe() 707 chip->addr + OXYGEN_MPU401, oxygen_pci_probe() 708 info_flags, -1, &chip->midi); oxygen_pci_probe() 713 oxygen_proc_init(chip); oxygen_pci_probe() 715 spin_lock_irq(&chip->reg_lock); oxygen_pci_probe() 716 if (chip->model.device_config & CAPTURE_1_FROM_SPDIF) oxygen_pci_probe() 717 chip->interrupt_mask |= OXYGEN_INT_SPDIF_IN_DETECT; oxygen_pci_probe() 718 if (chip->has_ac97_0 | chip->has_ac97_1) oxygen_pci_probe() 719 chip->interrupt_mask |= OXYGEN_INT_AC97; oxygen_pci_probe() 720 oxygen_write16(chip, OXYGEN_INTERRUPT_MASK, chip->interrupt_mask); oxygen_pci_probe() 721 spin_unlock_irq(&chip->reg_lock); oxygen_pci_probe() 750 struct oxygen *chip = card->private_data; oxygen_pci_suspend() local 756 snd_pcm_suspend(chip->streams[i]); oxygen_pci_suspend() 758 if (chip->model.suspend) oxygen_pci_suspend() 759 chip->model.suspend(chip); oxygen_pci_suspend() 761 spin_lock_irq(&chip->reg_lock); oxygen_pci_suspend() 762 saved_interrupt_mask = chip->interrupt_mask; oxygen_pci_suspend() 763 chip->interrupt_mask = 0; oxygen_pci_suspend() 764 oxygen_write16(chip, OXYGEN_DMA_STATUS, 0); oxygen_pci_suspend() 765 oxygen_write16(chip, OXYGEN_INTERRUPT_MASK, 0); oxygen_pci_suspend() 766 spin_unlock_irq(&chip->reg_lock); oxygen_pci_suspend() 768 synchronize_irq(chip->irq); oxygen_pci_suspend() 769 flush_work(&chip->spdif_input_bits_work); oxygen_pci_suspend() 770 flush_work(&chip->gpio_work); oxygen_pci_suspend() 771 chip->interrupt_mask = saved_interrupt_mask; oxygen_pci_suspend() 789 static void oxygen_restore_ac97(struct oxygen *chip, unsigned int codec) oxygen_restore_ac97() argument 793 oxygen_write_ac97(chip, codec, AC97_RESET, 0); oxygen_restore_ac97() 797 oxygen_write_ac97(chip, codec, i * 2, oxygen_restore_ac97() 798 chip->saved_ac97_registers[codec][i]); oxygen_restore_ac97() 804 struct oxygen *chip = card->private_data; oxygen_pci_resume() local 807 oxygen_write16(chip, OXYGEN_DMA_STATUS, 0); oxygen_pci_resume() 808 oxygen_write16(chip, OXYGEN_INTERRUPT_MASK, 0); oxygen_pci_resume() 811 oxygen_write8(chip, i, chip->saved_registers._8[i]); oxygen_pci_resume() 812 if (chip->has_ac97_0) oxygen_pci_resume() 813 oxygen_restore_ac97(chip, 0); oxygen_pci_resume() 814 if (chip->has_ac97_1) oxygen_pci_resume() 815 oxygen_restore_ac97(chip, 1); oxygen_pci_resume() 817 if (chip->model.resume) oxygen_pci_resume() 818 chip->model.resume(chip); oxygen_pci_resume() 820 oxygen_write16(chip, OXYGEN_INTERRUPT_MASK, chip->interrupt_mask); oxygen_pci_resume() 833 struct oxygen *chip = card->private_data; oxygen_pci_shutdown() local 835 oxygen_shutdown(chip); oxygen_pci_shutdown() 836 chip->model.cleanup(chip); oxygen_pci_shutdown() 603 oxygen_pci_probe(struct pci_dev *pci, int index, char *id, struct module *owner, const struct pci_device_id *ids, int (*get_model)(struct oxygen *chip, const struct pci_device_id *id ) ) oxygen_pci_probe() argument
H A D	oxygen_pcm.c	135 struct oxygen *chip = snd_pcm_substream_chip(substream); oxygen_open() local 140 if (channel == PCM_B && chip->has_ac97_1 && oxygen_open() 141 (chip->model.device_config & CAPTURE_2_FROM_AC97_1)) oxygen_open() 147 if (chip->model.device_config & CAPTURE_1_FROM_SPDIF) { oxygen_open() 158 runtime->hw.channels_max = chip->model.dac_channels_pcm; oxygen_open() 161 if (chip->model.pcm_hardware_filter) oxygen_open() 162 chip->model.pcm_hardware_filter(channel, &runtime->hw); oxygen_open() 184 chip->streams[channel] = substream; oxygen_open() 186 mutex_lock(&chip->mutex); oxygen_open() 187 chip->pcm_active |= 1 << channel; oxygen_open() 189 chip->spdif_pcm_bits = chip->spdif_bits; oxygen_open() 190 chip->controls[CONTROL_SPDIF_PCM]->vd[0].access &= oxygen_open() 192 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE | oxygen_open() 194 &chip->controls[CONTROL_SPDIF_PCM]->id); oxygen_open() 196 mutex_unlock(&chip->mutex); oxygen_open() 233 struct oxygen *chip = snd_pcm_substream_chip(substream); oxygen_close() local 236 mutex_lock(&chip->mutex); oxygen_close() 237 chip->pcm_active &= ~(1 << channel); oxygen_close() 239 chip->controls[CONTROL_SPDIF_PCM]->vd[0].access |= oxygen_close() 241 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE | oxygen_close() 243 &chip->controls[CONTROL_SPDIF_PCM]->id); oxygen_close() 246 oxygen_update_spdif_source(chip); oxygen_close() 247 mutex_unlock(&chip->mutex); oxygen_close() 249 chip->streams[channel] = NULL; oxygen_close() 317 struct oxygen *chip = snd_pcm_substream_chip(substream); oxygen_hw_params() local 326 oxygen_write32(chip, channel_base_registers[channel], oxygen_hw_params() 329 oxygen_write32(chip, OXYGEN_DMA_MULTICH_COUNT, oxygen_hw_params() 331 oxygen_write32(chip, OXYGEN_DMA_MULTICH_TCOUNT, oxygen_hw_params() 334 oxygen_write16(chip, channel_base_registers[channel] + 4, oxygen_hw_params() 336 oxygen_write16(chip, channel_base_registers[channel] + 6, oxygen_hw_params() 342 static u16 get_mclk(struct oxygen *chip, unsigned int channel, get_mclk() argument 348 mclks = chip->model.dac_mclks; get_mclk() 350 mclks = chip->model.adc_mclks; get_mclk() 365 struct oxygen *chip = snd_pcm_substream_chip(substream); oxygen_rec_a_hw_params() local 372 spin_lock_irq(&chip->reg_lock); oxygen_rec_a_hw_params() 373 oxygen_write8_masked(chip, OXYGEN_REC_FORMAT, oxygen_rec_a_hw_params() 376 oxygen_write16_masked(chip, OXYGEN_I2S_A_FORMAT, oxygen_rec_a_hw_params() 378 chip->model.adc_i2s_format | oxygen_rec_a_hw_params() 379 get_mclk(chip, PCM_A, hw_params) | oxygen_rec_a_hw_params() 385 spin_unlock_irq(&chip->reg_lock); oxygen_rec_a_hw_params() 387 mutex_lock(&chip->mutex); oxygen_rec_a_hw_params() 388 chip->model.set_adc_params(chip, hw_params); oxygen_rec_a_hw_params() 389 mutex_unlock(&chip->mutex); oxygen_rec_a_hw_params() 396 struct oxygen *chip = snd_pcm_substream_chip(substream); oxygen_rec_b_hw_params() local 404 is_ac97 = chip->has_ac97_1 && oxygen_rec_b_hw_params() 405 (chip->model.device_config & CAPTURE_2_FROM_AC97_1); oxygen_rec_b_hw_params() 407 spin_lock_irq(&chip->reg_lock); oxygen_rec_b_hw_params() 408 oxygen_write8_masked(chip, OXYGEN_REC_FORMAT, oxygen_rec_b_hw_params() 412 oxygen_write16_masked(chip, OXYGEN_I2S_B_FORMAT, oxygen_rec_b_hw_params() 414 chip->model.adc_i2s_format | oxygen_rec_b_hw_params() 415 get_mclk(chip, PCM_B, hw_params) | oxygen_rec_b_hw_params() 421 spin_unlock_irq(&chip->reg_lock); oxygen_rec_b_hw_params() 424 mutex_lock(&chip->mutex); oxygen_rec_b_hw_params() 425 chip->model.set_adc_params(chip, hw_params); oxygen_rec_b_hw_params() 426 mutex_unlock(&chip->mutex); oxygen_rec_b_hw_params() 434 struct oxygen *chip = snd_pcm_substream_chip(substream); oxygen_rec_c_hw_params() local 442 is_spdif = chip->model.device_config & CAPTURE_1_FROM_SPDIF; oxygen_rec_c_hw_params() 444 spin_lock_irq(&chip->reg_lock); oxygen_rec_c_hw_params() 445 oxygen_write8_masked(chip, OXYGEN_REC_FORMAT, oxygen_rec_c_hw_params() 449 oxygen_write16_masked(chip, OXYGEN_I2S_C_FORMAT, oxygen_rec_c_hw_params() 451 chip->model.adc_i2s_format | oxygen_rec_c_hw_params() 452 get_mclk(chip, PCM_B, hw_params) | oxygen_rec_c_hw_params() 458 spin_unlock_irq(&chip->reg_lock); oxygen_rec_c_hw_params() 461 mutex_lock(&chip->mutex); oxygen_rec_c_hw_params() 462 chip->model.set_adc_params(chip, hw_params); oxygen_rec_c_hw_params() 463 mutex_unlock(&chip->mutex); oxygen_rec_c_hw_params() 471 struct oxygen *chip = snd_pcm_substream_chip(substream); oxygen_spdif_hw_params() local 478 mutex_lock(&chip->mutex); oxygen_spdif_hw_params() 479 spin_lock_irq(&chip->reg_lock); oxygen_spdif_hw_params() 480 oxygen_clear_bits32(chip, OXYGEN_SPDIF_CONTROL, oxygen_spdif_hw_params() 482 oxygen_write8_masked(chip, OXYGEN_PLAY_FORMAT, oxygen_spdif_hw_params() 485 oxygen_write32_masked(chip, OXYGEN_SPDIF_CONTROL, oxygen_spdif_hw_params() 488 oxygen_update_spdif_source(chip); oxygen_spdif_hw_params() 489 spin_unlock_irq(&chip->reg_lock); oxygen_spdif_hw_params() 490 mutex_unlock(&chip->mutex); oxygen_spdif_hw_params() 497 struct oxygen *chip = snd_pcm_substream_chip(substream); oxygen_multich_hw_params() local 504 mutex_lock(&chip->mutex); oxygen_multich_hw_params() 505 spin_lock_irq(&chip->reg_lock); oxygen_multich_hw_params() 506 oxygen_write8_masked(chip, OXYGEN_PLAY_CHANNELS, oxygen_multich_hw_params() 509 oxygen_write8_masked(chip, OXYGEN_PLAY_FORMAT, oxygen_multich_hw_params() 512 oxygen_write16_masked(chip, OXYGEN_I2S_MULTICH_FORMAT, oxygen_multich_hw_params() 514 chip->model.dac_i2s_format | oxygen_multich_hw_params() 515 get_mclk(chip, PCM_MULTICH, hw_params) | oxygen_multich_hw_params() 521 oxygen_update_spdif_source(chip); oxygen_multich_hw_params() 522 spin_unlock_irq(&chip->reg_lock); oxygen_multich_hw_params() 524 chip->model.set_dac_params(chip, hw_params); oxygen_multich_hw_params() 525 oxygen_update_dac_routing(chip); oxygen_multich_hw_params() 526 mutex_unlock(&chip->mutex); oxygen_multich_hw_params() 532 struct oxygen *chip = snd_pcm_substream_chip(substream); oxygen_hw_free() local 536 spin_lock_irq(&chip->reg_lock); oxygen_hw_free() 537 chip->interrupt_mask &= ~channel_mask; oxygen_hw_free() 538 oxygen_write16(chip, OXYGEN_INTERRUPT_MASK, chip->interrupt_mask); oxygen_hw_free() 540 oxygen_set_bits8(chip, OXYGEN_DMA_FLUSH, channel_mask); oxygen_hw_free() 541 oxygen_clear_bits8(chip, OXYGEN_DMA_FLUSH, channel_mask); oxygen_hw_free() 542 spin_unlock_irq(&chip->reg_lock); oxygen_hw_free() 549 struct oxygen *chip = snd_pcm_substream_chip(substream); oxygen_spdif_hw_free() local 551 spin_lock_irq(&chip->reg_lock); oxygen_spdif_hw_free() 552 oxygen_clear_bits32(chip, OXYGEN_SPDIF_CONTROL, oxygen_spdif_hw_free() 554 spin_unlock_irq(&chip->reg_lock); oxygen_spdif_hw_free() 560 struct oxygen *chip = snd_pcm_substream_chip(substream); oxygen_prepare() local 564 spin_lock_irq(&chip->reg_lock); oxygen_prepare() 565 oxygen_set_bits8(chip, OXYGEN_DMA_FLUSH, channel_mask); oxygen_prepare() 566 oxygen_clear_bits8(chip, OXYGEN_DMA_FLUSH, channel_mask); oxygen_prepare() 569 chip->interrupt_mask &= ~channel_mask; oxygen_prepare() 571 chip->interrupt_mask |= channel_mask; oxygen_prepare() 572 oxygen_write16(chip, OXYGEN_INTERRUPT_MASK, chip->interrupt_mask); oxygen_prepare() 573 spin_unlock_irq(&chip->reg_lock); oxygen_prepare() 579 struct oxygen *chip = snd_pcm_substream_chip(substream); oxygen_trigger() local 599 if (snd_pcm_substream_chip(s) == chip) { snd_pcm_group_for_each_entry() 605 spin_lock(&chip->reg_lock); 608 chip->pcm_running |= mask; 610 chip->pcm_running &= ~mask; 611 oxygen_write8(chip, OXYGEN_DMA_STATUS, chip->pcm_running); 614 oxygen_set_bits8(chip, OXYGEN_DMA_PAUSE, mask); 616 oxygen_clear_bits8(chip, OXYGEN_DMA_PAUSE, mask); 618 spin_unlock(&chip->reg_lock); 624 struct oxygen *chip = snd_pcm_substream_chip(substream); oxygen_pointer() local 630 curr_addr = oxygen_read32(chip, channel_base_registers[channel]); oxygen_pointer() 700 int oxygen_pcm_init(struct oxygen *chip) oxygen_pcm_init() argument 706 outs = !!(chip->model.device_config & PLAYBACK_0_TO_I2S); oxygen_pcm_init() 707 ins = !!(chip->model.device_config & (CAPTURE_0_FROM_I2S_1 | oxygen_pcm_init() 710 err = snd_pcm_new(chip->card, "Multichannel", oxygen_pcm_init() 717 if (chip->model.device_config & CAPTURE_0_FROM_I2S_1) oxygen_pcm_init() 720 else if (chip->model.device_config & CAPTURE_0_FROM_I2S_2) oxygen_pcm_init() 723 pcm->private_data = chip; oxygen_pcm_init() 728 snd_dma_pci_data(chip->pci), oxygen_pcm_init() 734 snd_dma_pci_data(chip->pci), oxygen_pcm_init() 739 outs = !!(chip->model.device_config & PLAYBACK_1_TO_SPDIF); oxygen_pcm_init() 740 ins = !!(chip->model.device_config & CAPTURE_1_FROM_SPDIF); oxygen_pcm_init() 742 err = snd_pcm_new(chip->card, "Digital", 1, outs, ins, &pcm); oxygen_pcm_init() 751 pcm->private_data = chip; oxygen_pcm_init() 754 snd_dma_pci_data(chip->pci), oxygen_pcm_init() 759 if (chip->has_ac97_1) { oxygen_pcm_init() 760 outs = !!(chip->model.device_config & PLAYBACK_2_TO_AC97_1); oxygen_pcm_init() 761 ins = !!(chip->model.device_config & CAPTURE_2_FROM_AC97_1); oxygen_pcm_init() 764 ins = !!(chip->model.device_config & CAPTURE_2_FROM_I2S_2); oxygen_pcm_init() 767 err = snd_pcm_new(chip->card, outs ? "AC97" : "Analog2", oxygen_pcm_init() 774 oxygen_write8_masked(chip, OXYGEN_REC_ROUTING, oxygen_pcm_init() 781 pcm->private_data = chip; oxygen_pcm_init() 784 snd_dma_pci_data(chip->pci), oxygen_pcm_init() 789 ins = !!(chip->model.device_config & CAPTURE_3_FROM_I2S_3); oxygen_pcm_init() 791 err = snd_pcm_new(chip->card, "Analog3", 3, 0, ins, &pcm); oxygen_pcm_init() 796 oxygen_write8_masked(chip, OXYGEN_REC_ROUTING, oxygen_pcm_init() 799 pcm->private_data = chip; oxygen_pcm_init() 802 snd_dma_pci_data(chip->pci), oxygen_pcm_init()
H A D	xonar.h	21 void xonar_enable_output(struct oxygen *chip); 22 void xonar_disable_output(struct oxygen *chip); 23 void xonar_init_ext_power(struct oxygen *chip); 24 void xonar_init_cs53x1(struct oxygen *chip); 25 void xonar_set_cs53x1_params(struct oxygen *chip, 36 int get_xonar_pcm179x_model(struct oxygen *chip, 38 int get_xonar_cs43xx_model(struct oxygen *chip, 40 int get_xonar_wm87x6_model(struct oxygen *chip, 45 void xonar_hdmi_init(struct oxygen *chip, struct xonar_hdmi *data); 46 void xonar_hdmi_cleanup(struct oxygen *chip); 47 void xonar_hdmi_resume(struct oxygen *chip, struct xonar_hdmi *hdmi); 50 void xonar_set_hdmi_params(struct oxygen *chip, struct xonar_hdmi *hdmi, 52 void xonar_hdmi_uart_input(struct oxygen *chip);
H A D	oxygen.c	154 static void ak4396_write(struct oxygen *chip, unsigned int codec, ak4396_write() argument 161 struct generic_data *data = chip->model_data; ak4396_write() 163 oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER | ak4396_write() 172 static void ak4396_write_cached(struct oxygen *chip, unsigned int codec, ak4396_write_cached() argument 175 struct generic_data *data = chip->model_data; ak4396_write_cached() 178 ak4396_write(chip, codec, reg, value); ak4396_write_cached() 181 static void wm8785_write(struct oxygen *chip, u8 reg, unsigned int value) wm8785_write() argument 183 struct generic_data *data = chip->model_data; wm8785_write() 185 oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER | wm8785_write() 195 static void ak4396_registers_init(struct oxygen *chip) ak4396_registers_init() argument 197 struct generic_data *data = chip->model_data; ak4396_registers_init() 201 ak4396_write(chip, i, AK4396_CONTROL_1, ak4396_registers_init() 203 ak4396_write(chip, i, AK4396_CONTROL_2, ak4396_registers_init() 205 ak4396_write(chip, i, AK4396_CONTROL_3, ak4396_registers_init() 207 ak4396_write(chip, i, AK4396_LCH_ATT, ak4396_registers_init() 208 chip->dac_volume[i * 2]); ak4396_registers_init() 209 ak4396_write(chip, i, AK4396_RCH_ATT, ak4396_registers_init() 210 chip->dac_volume[i * 2 + 1]); ak4396_registers_init() 214 static void ak4396_init(struct oxygen *chip) ak4396_init() argument 216 struct generic_data *data = chip->model_data; ak4396_init() 218 data->dacs = chip->model.dac_channels_pcm / 2; ak4396_init() 221 ak4396_registers_init(chip); ak4396_init() 222 snd_component_add(chip->card, "AK4396"); ak4396_init() 225 static void ak5385_init(struct oxygen *chip) ak5385_init() argument 227 oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_AK5385_DFS_MASK); ak5385_init() 228 oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_AK5385_DFS_MASK); ak5385_init() 229 snd_component_add(chip->card, "AK5385"); ak5385_init() 232 static void wm8785_registers_init(struct oxygen *chip) wm8785_registers_init() argument 234 struct generic_data *data = chip->model_data; wm8785_registers_init() 236 wm8785_write(chip, WM8785_R7, 0); wm8785_registers_init() 237 wm8785_write(chip, WM8785_R0, data->wm8785_regs[0]); wm8785_registers_init() 238 wm8785_write(chip, WM8785_R2, data->wm8785_regs[2]); wm8785_registers_init() 241 static void wm8785_init(struct oxygen *chip) wm8785_init() argument 243 struct generic_data *data = chip->model_data; wm8785_init() 248 wm8785_registers_init(chip); wm8785_init() 249 snd_component_add(chip->card, "WM8785"); wm8785_init() 252 static void generic_init(struct oxygen *chip) generic_init() argument 254 ak4396_init(chip); generic_init() 255 wm8785_init(chip); generic_init() 258 static void meridian_init(struct oxygen *chip) meridian_init() argument 260 oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, meridian_init() 262 oxygen_write16_masked(chip, OXYGEN_GPIO_DATA, meridian_init() 264 ak4396_init(chip); meridian_init() 265 ak5385_init(chip); meridian_init() 268 static void claro_enable_hp(struct oxygen *chip) claro_enable_hp() argument 271 oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_CLARO_HP); claro_enable_hp() 272 oxygen_set_bits16(chip, OXYGEN_GPIO_DATA, GPIO_CLARO_HP); claro_enable_hp() 275 static void claro_init(struct oxygen *chip) claro_init() argument 277 oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_CLARO_DIG_COAX); claro_init() 278 oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_CLARO_DIG_COAX); claro_init() 279 ak4396_init(chip); claro_init() 280 wm8785_init(chip); claro_init() 281 claro_enable_hp(chip); claro_init() 284 static void claro_halo_init(struct oxygen *chip) claro_halo_init() argument 286 oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_CLARO_DIG_COAX); claro_halo_init() 287 oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_CLARO_DIG_COAX); claro_halo_init() 288 ak4396_init(chip); claro_halo_init() 289 ak5385_init(chip); claro_halo_init() 290 claro_enable_hp(chip); claro_halo_init() 293 static void fantasia_init(struct oxygen *chip) fantasia_init() argument 295 ak4396_init(chip); fantasia_init() 296 snd_component_add(chip->card, "CS5340"); fantasia_init() 299 static void stereo_output_init(struct oxygen *chip) stereo_output_init() argument 301 ak4396_init(chip); stereo_output_init() 304 static void generic_cleanup(struct oxygen *chip) generic_cleanup() argument 308 static void claro_disable_hp(struct oxygen *chip) claro_disable_hp() argument 310 oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_CLARO_HP); claro_disable_hp() 313 static void claro_cleanup(struct oxygen *chip) claro_cleanup() argument 315 claro_disable_hp(chip); claro_cleanup() 318 static void claro_suspend(struct oxygen *chip) claro_suspend() argument 320 claro_disable_hp(chip); claro_suspend() 323 static void generic_resume(struct oxygen *chip) generic_resume() argument 325 ak4396_registers_init(chip); generic_resume() 326 wm8785_registers_init(chip); generic_resume() 329 static void meridian_resume(struct oxygen *chip) meridian_resume() argument 331 ak4396_registers_init(chip); meridian_resume() 334 static void claro_resume(struct oxygen *chip) claro_resume() argument 336 ak4396_registers_init(chip); claro_resume() 337 claro_enable_hp(chip); claro_resume() 340 static void stereo_resume(struct oxygen *chip) stereo_resume() argument 342 ak4396_registers_init(chip); stereo_resume() 345 static void set_ak4396_params(struct oxygen *chip, set_ak4396_params() argument 348 struct generic_data *data = chip->model_data; set_ak4396_params() 364 ak4396_write(chip, i, AK4396_CONTROL_1, set_ak4396_params() 366 ak4396_write(chip, i, AK4396_CONTROL_2, value); set_ak4396_params() 367 ak4396_write(chip, i, AK4396_CONTROL_1, set_ak4396_params() 373 static void update_ak4396_volume(struct oxygen *chip) update_ak4396_volume() argument 375 struct generic_data *data = chip->model_data; update_ak4396_volume() 379 ak4396_write_cached(chip, i, AK4396_LCH_ATT, update_ak4396_volume() 380 chip->dac_volume[i * 2]); update_ak4396_volume() 381 ak4396_write_cached(chip, i, AK4396_RCH_ATT, update_ak4396_volume() 382 chip->dac_volume[i * 2 + 1]); update_ak4396_volume() 386 static void update_ak4396_mute(struct oxygen *chip) update_ak4396_mute() argument 388 struct generic_data *data = chip->model_data; update_ak4396_mute() 393 if (chip->dac_mute) update_ak4396_mute() 396 ak4396_write_cached(chip, i, AK4396_CONTROL_2, value); update_ak4396_mute() 399 static void set_wm8785_params(struct oxygen *chip, set_wm8785_params() argument 402 struct generic_data *data = chip->model_data; set_wm8785_params() 413 wm8785_write(chip, WM8785_R7, 0); set_wm8785_params() 414 wm8785_write(chip, WM8785_R0, value); set_wm8785_params() 415 wm8785_write(chip, WM8785_R2, data->wm8785_regs[2]); set_wm8785_params() 419 static void set_ak5385_params(struct oxygen *chip, set_ak5385_params() argument 430 oxygen_write16_masked(chip, OXYGEN_GPIO_DATA, set_ak5385_params() 434 static void set_no_params(struct oxygen *chip, struct snd_pcm_hw_params *params) set_no_params() argument 451 struct oxygen *chip = ctl->private_data; rolloff_get() local 452 struct generic_data *data = chip->model_data; rolloff_get() 462 struct oxygen *chip = ctl->private_data; rolloff_put() local 463 struct generic_data *data = chip->model_data; rolloff_put() 468 mutex_lock(&chip->mutex); rolloff_put() 477 ak4396_write(chip, i, AK4396_CONTROL_2, reg); rolloff_put() 479 mutex_unlock(&chip->mutex); rolloff_put() 502 struct oxygen *chip = ctl->private_data; hpf_get() local 503 struct generic_data *data = chip->model_data; hpf_get() 512 struct oxygen *chip = ctl->private_data; hpf_put() local 513 struct generic_data *data = chip->model_data; hpf_put() 517 mutex_lock(&chip->mutex); hpf_put() 523 wm8785_write(chip, WM8785_R2, reg); hpf_put() 524 mutex_unlock(&chip->mutex); hpf_put() 555 struct oxygen *chip = ctl->private_data; meridian_dig_source_get() local 558 !!(oxygen_read16(chip, OXYGEN_GPIO_DATA) & meridian_dig_source_get() 566 struct oxygen *chip = ctl->private_data; claro_dig_source_get() local 569 !!(oxygen_read16(chip, OXYGEN_GPIO_DATA) & claro_dig_source_get() 577 struct oxygen *chip = ctl->private_data; meridian_dig_source_put() local 581 mutex_lock(&chip->mutex); meridian_dig_source_put() 582 old_reg = oxygen_read16(chip, OXYGEN_GPIO_DATA); meridian_dig_source_put() 590 oxygen_write16(chip, OXYGEN_GPIO_DATA, new_reg); meridian_dig_source_put() 591 mutex_unlock(&chip->mutex); meridian_dig_source_put() 598 struct oxygen *chip = ctl->private_data; claro_dig_source_put() local 602 mutex_lock(&chip->mutex); claro_dig_source_put() 603 old_reg = oxygen_read16(chip, OXYGEN_GPIO_DATA); claro_dig_source_put() 609 oxygen_write16(chip, OXYGEN_GPIO_DATA, new_reg); claro_dig_source_put() 610 mutex_unlock(&chip->mutex); claro_dig_source_put() 630 static int generic_mixer_init(struct oxygen *chip) generic_mixer_init() argument 632 return snd_ctl_add(chip->card, snd_ctl_new1(&rolloff_control, chip)); generic_mixer_init() 635 static int generic_wm8785_mixer_init(struct oxygen *chip) generic_wm8785_mixer_init() argument 639 err = generic_mixer_init(chip); generic_wm8785_mixer_init() 642 err = snd_ctl_add(chip->card, snd_ctl_new1(&hpf_control, chip)); generic_wm8785_mixer_init() 648 static int meridian_mixer_init(struct oxygen *chip) meridian_mixer_init() argument 652 err = generic_mixer_init(chip); meridian_mixer_init() 655 err = snd_ctl_add(chip->card, meridian_mixer_init() 656 snd_ctl_new1(&meridian_dig_source_control, chip)); meridian_mixer_init() 662 static int claro_mixer_init(struct oxygen *chip) claro_mixer_init() argument 666 err = generic_wm8785_mixer_init(chip); claro_mixer_init() 669 err = snd_ctl_add(chip->card, claro_mixer_init() 670 snd_ctl_new1(&claro_dig_source_control, chip)); claro_mixer_init() 676 static int claro_halo_mixer_init(struct oxygen *chip) claro_halo_mixer_init() argument 680 err = generic_mixer_init(chip); claro_halo_mixer_init() 683 err = snd_ctl_add(chip->card, claro_halo_mixer_init() 684 snd_ctl_new1(&claro_dig_source_control, chip)); claro_halo_mixer_init() 690 static void dump_ak4396_registers(struct oxygen *chip, dump_ak4396_registers() argument 693 struct generic_data *data = chip->model_data; dump_ak4396_registers() 704 static void dump_wm8785_registers(struct oxygen *chip, dump_wm8785_registers() argument 707 struct generic_data *data = chip->model_data; dump_wm8785_registers() 716 static void dump_oxygen_registers(struct oxygen *chip, dump_oxygen_registers() argument 719 dump_ak4396_registers(chip, buffer); dump_oxygen_registers() 720 dump_wm8785_registers(chip, buffer); dump_oxygen_registers() 728 .chip = "CMI8788", 759 static int get_oxygen_model(struct oxygen *chip, get_oxygen_model() argument 772 chip->model = model_generic; get_oxygen_model() 776 chip->model.init = meridian_init; get_oxygen_model() 777 chip->model.mixer_init = meridian_mixer_init; get_oxygen_model() 778 chip->model.resume = meridian_resume; get_oxygen_model() 779 chip->model.set_adc_params = set_ak5385_params; get_oxygen_model() 780 chip->model.dump_registers = dump_ak4396_registers; get_oxygen_model() 781 chip->model.device_config = PLAYBACK_0_TO_I2S | get_oxygen_model() 786 chip->model.device_config |= AC97_CD_INPUT; get_oxygen_model() 789 chip->model.init = claro_init; get_oxygen_model() 790 chip->model.mixer_init = claro_mixer_init; get_oxygen_model() 791 chip->model.cleanup = claro_cleanup; get_oxygen_model() 792 chip->model.suspend = claro_suspend; get_oxygen_model() 793 chip->model.resume = claro_resume; get_oxygen_model() 796 chip->model.init = claro_halo_init; get_oxygen_model() 797 chip->model.mixer_init = claro_halo_mixer_init; get_oxygen_model() 798 chip->model.cleanup = claro_cleanup; get_oxygen_model() 799 chip->model.suspend = claro_suspend; get_oxygen_model() 800 chip->model.resume = claro_resume; get_oxygen_model() 801 chip->model.set_adc_params = set_ak5385_params; get_oxygen_model() 802 chip->model.dump_registers = dump_ak4396_registers; get_oxygen_model() 803 chip->model.device_config = PLAYBACK_0_TO_I2S | get_oxygen_model() 812 chip->model.shortname = "C-Media CMI8787"; get_oxygen_model() 813 chip->model.chip = "CMI8787"; get_oxygen_model() 815 chip->model.init = fantasia_init; get_oxygen_model() 817 chip->model.init = stereo_output_init; get_oxygen_model() 818 chip->model.resume = stereo_resume; get_oxygen_model() 819 chip->model.mixer_init = generic_mixer_init; get_oxygen_model() 820 chip->model.set_adc_params = set_no_params; get_oxygen_model() 821 chip->model.dump_registers = dump_ak4396_registers; get_oxygen_model() 822 chip->model.device_config = PLAYBACK_0_TO_I2S | get_oxygen_model() 825 chip->model.device_config |= CAPTURE_0_FROM_I2S_1; get_oxygen_model() 826 chip->model.adc_mclks = OXYGEN_MCLKS(256, 128, 128); get_oxygen_model() 828 chip->model.dac_channels_pcm = 2; get_oxygen_model() 829 chip->model.dac_channels_mixer = 2; get_oxygen_model() 832 chip->model = model_xonar_dg; get_oxygen_model() 833 chip->model.shortname = "Xonar DG"; get_oxygen_model() 836 chip->model = model_xonar_dg; get_oxygen_model() 837 chip->model.shortname = "Xonar DGX"; get_oxygen_model() 843 chip->model.misc_flags = OXYGEN_MISC_MIDI; get_oxygen_model() 844 chip->model.device_config |= MIDI_OUTPUT | MIDI_INPUT; get_oxygen_model() 847 chip->model.shortname = names[id->driver_data]; get_oxygen_model()
H A D	xonar_cs43xx.c	77 static void cs4398_write(struct oxygen *chip, u8 reg, u8 value) cs4398_write() argument 79 struct xonar_cs43xx *data = chip->model_data; cs4398_write() 81 oxygen_write_i2c(chip, I2C_DEVICE_CS4398, reg, value); cs4398_write() 86 static void cs4398_write_cached(struct oxygen *chip, u8 reg, u8 value) cs4398_write_cached() argument 88 struct xonar_cs43xx *data = chip->model_data; cs4398_write_cached() 91 cs4398_write(chip, reg, value); cs4398_write_cached() 94 static void cs4362a_write(struct oxygen *chip, u8 reg, u8 value) cs4362a_write() argument 96 struct xonar_cs43xx *data = chip->model_data; cs4362a_write() 98 oxygen_write_i2c(chip, I2C_DEVICE_CS4362A, reg, value); cs4362a_write() 103 static void cs4362a_write_cached(struct oxygen *chip, u8 reg, u8 value) cs4362a_write_cached() argument 105 struct xonar_cs43xx *data = chip->model_data; cs4362a_write_cached() 108 cs4362a_write(chip, reg, value); cs4362a_write_cached() 111 static void cs43xx_registers_init(struct oxygen *chip) cs43xx_registers_init() argument 113 struct xonar_cs43xx *data = chip->model_data; cs43xx_registers_init() 117 cs4398_write(chip, 8, CS4398_CPEN | CS4398_PDN); cs43xx_registers_init() 118 cs4362a_write(chip, 0x01, CS4362A_PDN | CS4362A_CPEN); cs43xx_registers_init() 120 cs4398_write(chip, 2, data->cs4398_regs[2]); cs43xx_registers_init() 121 cs4398_write(chip, 3, CS4398_ATAPI_B_R | CS4398_ATAPI_A_L); cs43xx_registers_init() 122 cs4398_write(chip, 4, data->cs4398_regs[4]); cs43xx_registers_init() 123 cs4398_write(chip, 5, data->cs4398_regs[5]); cs43xx_registers_init() 124 cs4398_write(chip, 6, data->cs4398_regs[6]); cs43xx_registers_init() 125 cs4398_write(chip, 7, data->cs4398_regs[7]); cs43xx_registers_init() 126 cs4362a_write(chip, 0x02, CS4362A_DIF_LJUST); cs43xx_registers_init() 127 cs4362a_write(chip, 0x03, CS4362A_MUTEC_6 | CS4362A_AMUTE | cs43xx_registers_init() 129 cs4362a_write(chip, 0x04, data->cs4362a_regs[0x04]); cs43xx_registers_init() 130 cs4362a_write(chip, 0x05, 0); cs43xx_registers_init() 132 cs4362a_write(chip, i, data->cs4362a_regs[i]); cs43xx_registers_init() 134 cs4398_write(chip, 8, CS4398_CPEN); cs43xx_registers_init() 135 cs4362a_write(chip, 0x01, CS4362A_CPEN); cs43xx_registers_init() 138 static void xonar_d1_init(struct oxygen *chip) xonar_d1_init() argument 140 struct xonar_cs43xx *data = chip->model_data; xonar_d1_init() 164 oxygen_write16(chip, OXYGEN_2WIRE_BUS_STATUS, xonar_d1_init() 169 cs43xx_registers_init(chip); xonar_d1_init() 171 oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, xonar_d1_init() 175 oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, xonar_d1_init() 178 xonar_init_cs53x1(chip); xonar_d1_init() 179 xonar_enable_output(chip); xonar_d1_init() 181 snd_component_add(chip->card, "CS4398"); xonar_d1_init() 182 snd_component_add(chip->card, "CS4362A"); xonar_d1_init() 183 snd_component_add(chip->card, "CS5361"); xonar_d1_init() 186 static void xonar_dx_init(struct oxygen *chip) xonar_dx_init() argument 188 struct xonar_cs43xx *data = chip->model_data; xonar_dx_init() 193 xonar_init_ext_power(chip); xonar_dx_init() 194 xonar_d1_init(chip); xonar_dx_init() 197 static void xonar_d1_cleanup(struct oxygen *chip) xonar_d1_cleanup() argument 199 xonar_disable_output(chip); xonar_d1_cleanup() 200 cs4362a_write(chip, 0x01, CS4362A_PDN | CS4362A_CPEN); xonar_d1_cleanup() 201 oxygen_clear_bits8(chip, OXYGEN_FUNCTION, OXYGEN_FUNCTION_RESET_CODEC); xonar_d1_cleanup() 204 static void xonar_d1_suspend(struct oxygen *chip) xonar_d1_suspend() argument 206 xonar_d1_cleanup(chip); xonar_d1_suspend() 209 static void xonar_d1_resume(struct oxygen *chip) xonar_d1_resume() argument 211 oxygen_set_bits8(chip, OXYGEN_FUNCTION, OXYGEN_FUNCTION_RESET_CODEC); xonar_d1_resume() 213 cs43xx_registers_init(chip); xonar_d1_resume() 214 xonar_enable_output(chip); xonar_d1_resume() 217 static void set_cs43xx_params(struct oxygen *chip, set_cs43xx_params() argument 220 struct xonar_cs43xx *data = chip->model_data; set_cs43xx_params() 234 cs4398_write_cached(chip, 2, cs4398_fm); set_cs43xx_params() 236 cs4362a_write_cached(chip, 6, cs4362a_fm); set_cs43xx_params() 237 cs4362a_write_cached(chip, 12, cs4362a_fm); set_cs43xx_params() 240 cs4362a_write_cached(chip, 9, cs4362a_fm); set_cs43xx_params() 243 static void update_cs4362a_volumes(struct oxygen *chip) update_cs4362a_volumes() argument 248 mute = chip->dac_mute ? CS4362A_MUTE : 0; update_cs4362a_volumes() 250 cs4362a_write_cached(chip, 7 + i + i / 2, update_cs4362a_volumes() 251 (127 - chip->dac_volume[2 + i]) | mute); update_cs4362a_volumes() 254 static void update_cs43xx_volume(struct oxygen *chip) update_cs43xx_volume() argument 256 cs4398_write_cached(chip, 5, (127 - chip->dac_volume[0]) * 2); update_cs43xx_volume() 257 cs4398_write_cached(chip, 6, (127 - chip->dac_volume[1]) * 2); update_cs43xx_volume() 258 update_cs4362a_volumes(chip); update_cs43xx_volume() 261 static void update_cs43xx_mute(struct oxygen *chip) update_cs43xx_mute() argument 266 if (chip->dac_mute) update_cs43xx_mute() 268 cs4398_write_cached(chip, 4, reg); update_cs43xx_mute() 269 update_cs4362a_volumes(chip); update_cs43xx_mute() 272 static void update_cs43xx_center_lfe_mix(struct oxygen *chip, bool mixed) update_cs43xx_center_lfe_mix() argument 274 struct xonar_cs43xx *data = chip->model_data; update_cs43xx_center_lfe_mix() 282 cs4362a_write_cached(chip, 9, reg); update_cs43xx_center_lfe_mix() 307 struct oxygen *chip = ctl->private_data; rolloff_get() local 308 struct xonar_cs43xx *data = chip->model_data; rolloff_get() 318 struct oxygen *chip = ctl->private_data; rolloff_put() local 319 struct xonar_cs43xx *data = chip->model_data; rolloff_put() 323 mutex_lock(&chip->mutex); rolloff_put() 331 cs4398_write(chip, 7, reg); rolloff_put() 336 cs4362a_write(chip, 0x04, reg); rolloff_put() 338 mutex_unlock(&chip->mutex); rolloff_put() 350 static void xonar_d1_line_mic_ac97_switch(struct oxygen *chip, xonar_d1_line_mic_ac97_switch() argument 354 spin_lock_irq(&chip->reg_lock); xonar_d1_line_mic_ac97_switch() 355 oxygen_write16_masked(chip, OXYGEN_GPIO_DATA, xonar_d1_line_mic_ac97_switch() 358 spin_unlock_irq(&chip->reg_lock); xonar_d1_line_mic_ac97_switch() 364 static int xonar_d1_mixer_init(struct oxygen *chip) xonar_d1_mixer_init() argument 368 err = snd_ctl_add(chip->card, snd_ctl_new1(&front_panel_switch, chip)); xonar_d1_mixer_init() 371 err = snd_ctl_add(chip->card, snd_ctl_new1(&rolloff_control, chip)); xonar_d1_mixer_init() 388 static void dump_d1_registers(struct oxygen *chip, dump_d1_registers() argument 391 struct xonar_cs43xx *data = chip->model_data; dump_d1_registers() 403 .chip = "AV200", 434 int get_xonar_cs43xx_model(struct oxygen *chip, get_xonar_cs43xx_model() argument 439 chip->model = model_xonar_d1; get_xonar_cs43xx_model() 440 chip->model.shortname = "Xonar D1"; get_xonar_cs43xx_model() 444 chip->model = model_xonar_d1; get_xonar_cs43xx_model() 445 chip->model.shortname = "Xonar DX"; get_xonar_cs43xx_model() 446 chip->model.init = xonar_dx_init; get_xonar_cs43xx_model()
H A D	oxygen_io.c	28 u8 oxygen_read8(struct oxygen *chip, unsigned int reg) oxygen_read8() argument 30 return inb(chip->addr + reg); oxygen_read8() 34 u16 oxygen_read16(struct oxygen *chip, unsigned int reg) oxygen_read16() argument 36 return inw(chip->addr + reg); oxygen_read16() 40 u32 oxygen_read32(struct oxygen *chip, unsigned int reg) oxygen_read32() argument 42 return inl(chip->addr + reg); oxygen_read32() 46 void oxygen_write8(struct oxygen *chip, unsigned int reg, u8 value) oxygen_write8() argument 48 outb(value, chip->addr + reg); oxygen_write8() 49 chip->saved_registers._8[reg] = value; oxygen_write8() 53 void oxygen_write16(struct oxygen *chip, unsigned int reg, u16 value) oxygen_write16() argument 55 outw(value, chip->addr + reg); oxygen_write16() 56 chip->saved_registers._16[reg / 2] = cpu_to_le16(value); oxygen_write16() 60 void oxygen_write32(struct oxygen *chip, unsigned int reg, u32 value) oxygen_write32() argument 62 outl(value, chip->addr + reg); oxygen_write32() 63 chip->saved_registers._32[reg / 4] = cpu_to_le32(value); oxygen_write32() 67 void oxygen_write8_masked(struct oxygen *chip, unsigned int reg, oxygen_write8_masked() argument 70 u8 tmp = inb(chip->addr + reg); oxygen_write8_masked() 73 outb(tmp, chip->addr + reg); oxygen_write8_masked() 74 chip->saved_registers._8[reg] = tmp; oxygen_write8_masked() 78 void oxygen_write16_masked(struct oxygen *chip, unsigned int reg, oxygen_write16_masked() argument 81 u16 tmp = inw(chip->addr + reg); oxygen_write16_masked() 84 outw(tmp, chip->addr + reg); oxygen_write16_masked() 85 chip->saved_registers._16[reg / 2] = cpu_to_le16(tmp); oxygen_write16_masked() 89 void oxygen_write32_masked(struct oxygen *chip, unsigned int reg, oxygen_write32_masked() argument 92 u32 tmp = inl(chip->addr + reg); oxygen_write32_masked() 95 outl(tmp, chip->addr + reg); oxygen_write32_masked() 96 chip->saved_registers._32[reg / 4] = cpu_to_le32(tmp); oxygen_write32_masked() 100 static int oxygen_ac97_wait(struct oxygen *chip, unsigned int mask) oxygen_ac97_wait() argument 108 wait_event_timeout(chip->ac97_waitqueue, oxygen_ac97_wait() 109 ({ status |= oxygen_read8(chip, OXYGEN_AC97_INTERRUPT_STATUS); oxygen_ac97_wait() 116 status |= oxygen_read8(chip, OXYGEN_AC97_INTERRUPT_STATUS); oxygen_ac97_wait() 129 void oxygen_write_ac97(struct oxygen *chip, unsigned int codec, oxygen_write_ac97() argument 142 oxygen_write32(chip, OXYGEN_AC97_REGS, reg); oxygen_write_ac97() 144 if (oxygen_ac97_wait(chip, OXYGEN_AC97_INT_WRITE_DONE) >= 0 && oxygen_write_ac97() 146 chip->saved_ac97_registers[codec][index / 2] = data; oxygen_write_ac97() 150 dev_err(chip->card->dev, "AC'97 write timeout\n"); oxygen_write_ac97() 154 u16 oxygen_read_ac97(struct oxygen *chip, unsigned int codec, oxygen_read_ac97() argument 166 oxygen_write32(chip, OXYGEN_AC97_REGS, reg); oxygen_read_ac97() 168 if (oxygen_ac97_wait(chip, OXYGEN_AC97_INT_READ_DONE) >= 0) { oxygen_read_ac97() 169 u16 value = oxygen_read16(chip, OXYGEN_AC97_REGS); oxygen_read_ac97() 182 dev_err(chip->card->dev, "AC'97 read timeout on codec %u\n", codec); oxygen_read_ac97() 187 void oxygen_write_ac97_masked(struct oxygen *chip, unsigned int codec, oxygen_write_ac97_masked() argument 190 u16 value = oxygen_read_ac97(chip, codec, index); oxygen_write_ac97_masked() 193 oxygen_write_ac97(chip, codec, index, value); oxygen_write_ac97_masked() 197 static int oxygen_wait_spi(struct oxygen *chip) oxygen_wait_spi() argument 207 if ((oxygen_read8(chip, OXYGEN_SPI_CONTROL) & oxygen_wait_spi() 211 dev_err(chip->card->dev, "oxygen: SPI wait timeout\n"); oxygen_wait_spi() 215 int oxygen_write_spi(struct oxygen *chip, u8 control, unsigned int data) oxygen_write_spi() argument 221 oxygen_write8(chip, OXYGEN_SPI_DATA1, data); oxygen_write_spi() 222 oxygen_write8(chip, OXYGEN_SPI_DATA2, data >> 8); oxygen_write_spi() 224 oxygen_write8(chip, OXYGEN_SPI_DATA3, data >> 16); oxygen_write_spi() 225 oxygen_write8(chip, OXYGEN_SPI_CONTROL, control); oxygen_write_spi() 226 return oxygen_wait_spi(chip); oxygen_write_spi() 230 void oxygen_write_i2c(struct oxygen *chip, u8 device, u8 map, u8 data) oxygen_write_i2c() argument 235 oxygen_write8(chip, OXYGEN_2WIRE_MAP, map); oxygen_write_i2c() 236 oxygen_write8(chip, OXYGEN_2WIRE_DATA, data); oxygen_write_i2c() 237 oxygen_write8(chip, OXYGEN_2WIRE_CONTROL, oxygen_write_i2c() 242 static void _write_uart(struct oxygen *chip, unsigned int port, u8 data) _write_uart() argument 244 if (oxygen_read8(chip, OXYGEN_MPU401 + 1) & MPU401_TX_FULL) _write_uart() 246 oxygen_write8(chip, OXYGEN_MPU401 + port, data); _write_uart() 249 void oxygen_reset_uart(struct oxygen *chip) oxygen_reset_uart() argument 251 _write_uart(chip, 1, MPU401_RESET); oxygen_reset_uart() 253 _write_uart(chip, 1, MPU401_ENTER_UART); oxygen_reset_uart() 257 void oxygen_write_uart(struct oxygen *chip, u8 data) oxygen_write_uart() argument 259 _write_uart(chip, 0, data); oxygen_write_uart() 263 u16 oxygen_read_eeprom(struct oxygen *chip, unsigned int index) oxygen_read_eeprom() argument 267 oxygen_write8(chip, OXYGEN_EEPROM_CONTROL, oxygen_read_eeprom() 271 if (!(oxygen_read8(chip, OXYGEN_EEPROM_STATUS) oxygen_read_eeprom() 275 return oxygen_read16(chip, OXYGEN_EEPROM_DATA); oxygen_read_eeprom() 278 void oxygen_write_eeprom(struct oxygen *chip, unsigned int index, u16 value) oxygen_write_eeprom() argument 282 oxygen_write16(chip, OXYGEN_EEPROM_DATA, value); oxygen_write_eeprom() 283 oxygen_write8(chip, OXYGEN_EEPROM_CONTROL, oxygen_write_eeprom() 287 if (!(oxygen_read8(chip, OXYGEN_EEPROM_STATUS) oxygen_write_eeprom() 291 dev_err(chip->card->dev, "EEPROM write timeout\n"); oxygen_write_eeprom()
H A D	xonar_pcm179x.c	243 static inline void pcm1796_write_spi(struct oxygen *chip, unsigned int codec, pcm1796_write_spi() argument 250 oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER | pcm1796_write_spi() 258 static inline void pcm1796_write_i2c(struct oxygen *chip, unsigned int codec, pcm1796_write_i2c() argument 261 oxygen_write_i2c(chip, I2C_DEVICE_PCM1796(codec), reg, value); pcm1796_write_i2c() 264 static void pcm1796_write(struct oxygen *chip, unsigned int codec, pcm1796_write() argument 267 struct xonar_pcm179x *data = chip->model_data; pcm1796_write() 269 if ((chip->model.function_flags & OXYGEN_FUNCTION_2WIRE_SPI_MASK) == pcm1796_write() 271 pcm1796_write_spi(chip, codec, reg, value); pcm1796_write() 273 pcm1796_write_i2c(chip, codec, reg, value); pcm1796_write() 279 static void pcm1796_write_cached(struct oxygen *chip, unsigned int codec, pcm1796_write_cached() argument 282 struct xonar_pcm179x *data = chip->model_data; pcm1796_write_cached() 285 pcm1796_write(chip, codec, reg, value); pcm1796_write_cached() 288 static void cs2000_write(struct oxygen *chip, u8 reg, u8 value) cs2000_write() argument 290 struct xonar_pcm179x *data = chip->model_data; cs2000_write() 292 oxygen_write_i2c(chip, I2C_DEVICE_CS2000, reg, value); cs2000_write() 296 static void cs2000_write_cached(struct oxygen *chip, u8 reg, u8 value) cs2000_write_cached() argument 298 struct xonar_pcm179x *data = chip->model_data; cs2000_write_cached() 301 cs2000_write(chip, reg, value); cs2000_write_cached() 304 static void pcm1796_registers_init(struct oxygen *chip) pcm1796_registers_init() argument 306 struct xonar_pcm179x *data = chip->model_data; pcm1796_registers_init() 314 pcm1796_write(chip, i, 18, pcm1796_registers_init() 316 pcm1796_write(chip, i, 16, chip->dac_volume[i * 2] pcm1796_registers_init() 318 pcm1796_write(chip, i, 17, chip->dac_volume[i * 2 + 1] pcm1796_registers_init() 320 pcm1796_write(chip, i, 19, pcm1796_registers_init() 322 pcm1796_write(chip, i, 20, pcm1796_registers_init() 324 pcm1796_write(chip, i, 21, 0); pcm1796_registers_init() 329 static void pcm1796_init(struct oxygen *chip) pcm1796_init() argument 331 struct xonar_pcm179x *data = chip->model_data; pcm1796_init() 341 pcm1796_registers_init(chip); pcm1796_init() 345 static void xonar_d2_init(struct oxygen *chip) xonar_d2_init() argument 347 struct xonar_pcm179x *data = chip->model_data; xonar_d2_init() 353 pcm1796_init(chip); xonar_d2_init() 355 oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_D2_ALT); xonar_d2_init() 356 oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_D2_ALT); xonar_d2_init() 358 oxygen_ac97_set_bits(chip, 0, CM9780_JACK, CM9780_FMIC2MIC); xonar_d2_init() 360 xonar_init_cs53x1(chip); xonar_d2_init() 361 xonar_enable_output(chip); xonar_d2_init() 363 snd_component_add(chip->card, "PCM1796"); xonar_d2_init() 364 snd_component_add(chip->card, "CS5381"); xonar_d2_init() 367 static void xonar_d2x_init(struct oxygen *chip) xonar_d2x_init() argument 369 struct xonar_pcm179x *data = chip->model_data; xonar_d2x_init() 374 oxygen_clear_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_D2X_EXT_POWER); xonar_d2x_init() 375 xonar_init_ext_power(chip); xonar_d2x_init() 376 xonar_d2_init(chip); xonar_d2x_init() 379 static void xonar_hdav_init(struct oxygen *chip) xonar_hdav_init() argument 381 struct xonar_hdav *data = chip->model_data; xonar_hdav_init() 383 oxygen_write16(chip, OXYGEN_2WIRE_BUS_STATUS, xonar_hdav_init() 393 data->pcm179x.dacs = chip->model.dac_channels_mixer / 2; xonar_hdav_init() 394 data->pcm179x.h6 = chip->model.dac_channels_mixer > 2; xonar_hdav_init() 396 pcm1796_init(chip); xonar_hdav_init() 398 oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, xonar_hdav_init() 400 oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_INPUT_ROUTE); xonar_hdav_init() 402 xonar_init_cs53x1(chip); xonar_hdav_init() 403 xonar_init_ext_power(chip); xonar_hdav_init() 404 xonar_hdmi_init(chip, &data->hdmi); xonar_hdav_init() 405 xonar_enable_output(chip); xonar_hdav_init() 407 snd_component_add(chip->card, "PCM1796"); xonar_hdav_init() 408 snd_component_add(chip->card, "CS5381"); xonar_hdav_init() 411 static void xonar_st_init_i2c(struct oxygen *chip) xonar_st_init_i2c() argument 413 oxygen_write16(chip, OXYGEN_2WIRE_BUS_STATUS, xonar_st_init_i2c() 419 static void xonar_st_init_common(struct oxygen *chip) xonar_st_init_common() argument 421 struct xonar_pcm179x *data = chip->model_data; xonar_st_init_common() 424 data->dacs = chip->model.dac_channels_mixer / 2; xonar_st_init_common() 425 data->h6 = chip->model.dac_channels_mixer > 2; xonar_st_init_common() 428 pcm1796_init(chip); xonar_st_init_common() 430 oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, xonar_st_init_common() 433 oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, xonar_st_init_common() 436 xonar_init_cs53x1(chip); xonar_st_init_common() 437 xonar_enable_output(chip); xonar_st_init_common() 439 snd_component_add(chip->card, "PCM1792A"); xonar_st_init_common() 440 snd_component_add(chip->card, "CS5381"); xonar_st_init_common() 443 static void cs2000_registers_init(struct oxygen *chip) cs2000_registers_init() argument 445 struct xonar_pcm179x *data = chip->model_data; cs2000_registers_init() 447 cs2000_write(chip, CS2000_GLOBAL_CFG, CS2000_FREEZE); cs2000_registers_init() 448 cs2000_write(chip, CS2000_DEV_CTRL, 0); cs2000_registers_init() 449 cs2000_write(chip, CS2000_DEV_CFG_1, cs2000_registers_init() 454 cs2000_write(chip, CS2000_DEV_CFG_2, cs2000_registers_init() 457 cs2000_write(chip, CS2000_RATIO_0 + 0, 0x00); /* 1.0 */ cs2000_registers_init() 458 cs2000_write(chip, CS2000_RATIO_0 + 1, 0x10); cs2000_registers_init() 459 cs2000_write(chip, CS2000_RATIO_0 + 2, 0x00); cs2000_registers_init() 460 cs2000_write(chip, CS2000_RATIO_0 + 3, 0x00); cs2000_registers_init() 461 cs2000_write(chip, CS2000_FUN_CFG_1, cs2000_registers_init() 463 cs2000_write(chip, CS2000_FUN_CFG_2, 0); cs2000_registers_init() 464 cs2000_write(chip, CS2000_GLOBAL_CFG, CS2000_EN_DEV_CFG_2); cs2000_registers_init() 468 static void xonar_st_init(struct oxygen *chip) xonar_st_init() argument 470 struct xonar_pcm179x *data = chip->model_data; xonar_st_init() 473 data->h6 = chip->model.dac_channels_mixer > 2; xonar_st_init() 478 oxygen_write16(chip, OXYGEN_I2S_A_FORMAT, xonar_st_init() 486 xonar_st_init_i2c(chip); xonar_st_init() 487 cs2000_registers_init(chip); xonar_st_init() 488 xonar_st_init_common(chip); xonar_st_init() 490 snd_component_add(chip->card, "CS2000"); xonar_st_init() 493 static void xonar_stx_init(struct oxygen *chip) xonar_stx_init() argument 495 struct xonar_pcm179x *data = chip->model_data; xonar_stx_init() 497 xonar_st_init_i2c(chip); xonar_stx_init() 502 xonar_init_ext_power(chip); xonar_stx_init() 503 xonar_st_init_common(chip); xonar_stx_init() 506 static void xonar_xense_init(struct oxygen *chip) xonar_xense_init() argument 508 struct xonar_pcm179x *data = chip->model_data; xonar_xense_init() 513 xonar_init_ext_power(chip); xonar_xense_init() 519 oxygen_write16(chip, OXYGEN_I2S_A_FORMAT, xonar_xense_init() 527 xonar_st_init_i2c(chip); xonar_xense_init() 528 cs2000_registers_init(chip); xonar_xense_init() 534 pcm1796_init(chip); xonar_xense_init() 536 oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, xonar_xense_init() 539 oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, xonar_xense_init() 543 xonar_init_cs53x1(chip); xonar_xense_init() 544 xonar_enable_output(chip); xonar_xense_init() 546 snd_component_add(chip->card, "PCM1796"); xonar_xense_init() 547 snd_component_add(chip->card, "CS5381"); xonar_xense_init() 548 snd_component_add(chip->card, "CS2000"); xonar_xense_init() 551 static void xonar_d2_cleanup(struct oxygen *chip) xonar_d2_cleanup() argument 553 xonar_disable_output(chip); xonar_d2_cleanup() 556 static void xonar_hdav_cleanup(struct oxygen *chip) xonar_hdav_cleanup() argument 558 xonar_hdmi_cleanup(chip); xonar_hdav_cleanup() 559 xonar_disable_output(chip); xonar_hdav_cleanup() 563 static void xonar_st_cleanup(struct oxygen *chip) xonar_st_cleanup() argument 565 xonar_disable_output(chip); xonar_st_cleanup() 568 static void xonar_d2_suspend(struct oxygen *chip) xonar_d2_suspend() argument 570 xonar_d2_cleanup(chip); xonar_d2_suspend() 573 static void xonar_hdav_suspend(struct oxygen *chip) xonar_hdav_suspend() argument 575 xonar_hdav_cleanup(chip); xonar_hdav_suspend() 578 static void xonar_st_suspend(struct oxygen *chip) xonar_st_suspend() argument 580 xonar_st_cleanup(chip); xonar_st_suspend() 583 static void xonar_d2_resume(struct oxygen *chip) xonar_d2_resume() argument 585 pcm1796_registers_init(chip); xonar_d2_resume() 586 xonar_enable_output(chip); xonar_d2_resume() 589 static void xonar_hdav_resume(struct oxygen *chip) xonar_hdav_resume() argument 591 struct xonar_hdav *data = chip->model_data; xonar_hdav_resume() 593 pcm1796_registers_init(chip); xonar_hdav_resume() 594 xonar_hdmi_resume(chip, &data->hdmi); xonar_hdav_resume() 595 xonar_enable_output(chip); xonar_hdav_resume() 598 static void xonar_stx_resume(struct oxygen *chip) xonar_stx_resume() argument 600 pcm1796_registers_init(chip); xonar_stx_resume() 601 xonar_enable_output(chip); xonar_stx_resume() 604 static void xonar_st_resume(struct oxygen *chip) xonar_st_resume() argument 606 cs2000_registers_init(chip); xonar_st_resume() 607 xonar_stx_resume(chip); xonar_st_resume() 610 static void update_pcm1796_oversampling(struct oxygen *chip) update_pcm1796_oversampling() argument 612 struct xonar_pcm179x *data = chip->model_data; update_pcm1796_oversampling() 621 pcm1796_write_cached(chip, i, 20, reg); update_pcm1796_oversampling() 624 static void set_pcm1796_params(struct oxygen *chip, set_pcm1796_params() argument 627 struct xonar_pcm179x *data = chip->model_data; set_pcm1796_params() 631 update_pcm1796_oversampling(chip); set_pcm1796_params() 634 static void update_pcm1796_volume(struct oxygen *chip) update_pcm1796_volume() argument 636 struct xonar_pcm179x *data = chip->model_data; update_pcm1796_volume() 642 pcm1796_write_cached(chip, i, 16, chip->dac_volume[i * 2] update_pcm1796_volume() 644 pcm1796_write_cached(chip, i, 17, chip->dac_volume[i * 2 + 1] update_pcm1796_volume() 650 static void update_pcm1796_mute(struct oxygen *chip) update_pcm1796_mute() argument 652 struct xonar_pcm179x *data = chip->model_data; update_pcm1796_mute() 657 if (chip->dac_mute) update_pcm1796_mute() 660 pcm1796_write_cached(chip, i, 18, value); update_pcm1796_mute() 663 static void update_cs2000_rate(struct oxygen *chip, unsigned int rate) update_cs2000_rate() argument 665 struct xonar_pcm179x *data = chip->model_data; update_cs2000_rate() 694 oxygen_write16_masked(chip, OXYGEN_I2S_A_FORMAT, rate_mclk, update_cs2000_rate() 696 cs2000_write_cached(chip, CS2000_FUN_CFG_1, reg); update_cs2000_rate() 700 static void set_st_params(struct oxygen *chip, set_st_params() argument 703 update_cs2000_rate(chip, params_rate(params)); set_st_params() 704 set_pcm1796_params(chip, params); set_st_params() 707 static void set_hdav_params(struct oxygen *chip, set_hdav_params() argument 710 struct xonar_hdav *data = chip->model_data; set_hdav_params() 712 set_pcm1796_params(chip, params); set_hdav_params() 713 xonar_set_hdmi_params(chip, &data->hdmi, params); set_hdav_params() 738 struct oxygen *chip = ctl->private_data; rolloff_get() local 739 struct xonar_pcm179x *data = chip->model_data; rolloff_get() 750 struct oxygen *chip = ctl->private_data; rolloff_put() local 751 struct xonar_pcm179x *data = chip->model_data; rolloff_put() 756 mutex_lock(&chip->mutex); rolloff_put() 766 pcm1796_write(chip, i, 19, reg); rolloff_put() 768 mutex_unlock(&chip->mutex); rolloff_put() 802 struct oxygen *chip = ctl->private_data; st_output_switch_get() local 805 gpio = oxygen_read16(chip, OXYGEN_GPIO_DATA); st_output_switch_get() 819 struct oxygen *chip = ctl->private_data; st_output_switch_put() local 820 struct xonar_pcm179x *data = chip->model_data; st_output_switch_put() 823 mutex_lock(&chip->mutex); st_output_switch_put() 824 gpio_old = oxygen_read16(chip, OXYGEN_GPIO_DATA); st_output_switch_put() 837 oxygen_write16(chip, OXYGEN_GPIO_DATA, gpio); st_output_switch_put() 839 update_pcm1796_volume(chip); st_output_switch_put() 840 mutex_unlock(&chip->mutex); st_output_switch_put() 857 struct oxygen *chip = ctl->private_data; st_hp_volume_offset_get() local 858 struct xonar_pcm179x *data = chip->model_data; st_hp_volume_offset_get() 860 mutex_lock(&chip->mutex); st_hp_volume_offset_get() 869 mutex_unlock(&chip->mutex); st_hp_volume_offset_get() 878 struct oxygen *chip = ctl->private_data; st_hp_volume_offset_put() local 879 struct xonar_pcm179x *data = chip->model_data; st_hp_volume_offset_put() 886 mutex_lock(&chip->mutex); st_hp_volume_offset_put() 890 update_pcm1796_volume(chip); st_hp_volume_offset_put() 892 mutex_unlock(&chip->mutex); st_hp_volume_offset_put() 916 struct oxygen *chip = ctl->private_data; xense_output_switch_get() local 919 gpio = oxygen_read16(chip, OXYGEN_GPIO_DATA); xense_output_switch_get() 932 struct oxygen *chip = ctl->private_data; xense_output_switch_put() local 933 struct xonar_pcm179x *data = chip->model_data; xense_output_switch_put() 936 mutex_lock(&chip->mutex); xense_output_switch_put() 937 gpio_old = oxygen_read16(chip, OXYGEN_GPIO_DATA); xense_output_switch_put() 950 oxygen_write16(chip, OXYGEN_GPIO_DATA, gpio); xense_output_switch_put() 952 update_pcm1796_volume(chip); xense_output_switch_put() 953 mutex_unlock(&chip->mutex); xense_output_switch_put() 974 static void xonar_line_mic_ac97_switch(struct oxygen *chip, xonar_line_mic_ac97_switch() argument 978 spin_lock_irq(&chip->reg_lock); xonar_line_mic_ac97_switch() 979 oxygen_write16_masked(chip, OXYGEN_GPIO_DATA, xonar_line_mic_ac97_switch() 982 spin_unlock_irq(&chip->reg_lock); xonar_line_mic_ac97_switch() 1004 static int add_pcm1796_controls(struct oxygen *chip) add_pcm1796_controls() argument 1006 struct xonar_pcm179x *data = chip->model_data; add_pcm1796_controls() 1010 err = snd_ctl_add(chip->card, add_pcm1796_controls() 1011 snd_ctl_new1(&rolloff_control, chip)); add_pcm1796_controls() 1018 static int xonar_d2_mixer_init(struct oxygen *chip) xonar_d2_mixer_init() argument 1022 err = snd_ctl_add(chip->card, snd_ctl_new1(&alt_switch, chip)); xonar_d2_mixer_init() 1025 err = add_pcm1796_controls(chip); xonar_d2_mixer_init() 1031 static int xonar_hdav_mixer_init(struct oxygen *chip) xonar_hdav_mixer_init() argument 1035 err = snd_ctl_add(chip->card, snd_ctl_new1(&hdav_hdmi_control, chip)); xonar_hdav_mixer_init() 1038 err = add_pcm1796_controls(chip); xonar_hdav_mixer_init() 1044 static int xonar_st_mixer_init(struct oxygen *chip) xonar_st_mixer_init() argument 1050 err = snd_ctl_add(chip->card, xonar_st_mixer_init() 1051 snd_ctl_new1(&st_controls[i], chip)); xonar_st_mixer_init() 1055 err = add_pcm1796_controls(chip); xonar_st_mixer_init() 1061 static int xonar_xense_mixer_init(struct oxygen *chip) xonar_xense_mixer_init() argument 1067 err = snd_ctl_add(chip->card, xonar_xense_mixer_init() 1068 snd_ctl_new1(&xense_controls[i], chip)); xonar_xense_mixer_init() 1072 err = add_pcm1796_controls(chip); xonar_xense_mixer_init() 1078 static void dump_pcm1796_registers(struct oxygen *chip, dump_pcm1796_registers() argument 1081 struct xonar_pcm179x *data = chip->model_data; dump_pcm1796_registers() 1093 static void dump_cs2000_registers(struct oxygen *chip, dump_cs2000_registers() argument 1096 struct xonar_pcm179x *data = chip->model_data; dump_cs2000_registers() 1110 static void dump_st_registers(struct oxygen *chip, dump_st_registers() argument 1113 dump_pcm1796_registers(chip, buffer); dump_st_registers() 1114 dump_cs2000_registers(chip, buffer); dump_st_registers() 1119 .chip = "AV200", 1155 .chip = "AV200", 1189 .chip = "AV200", 1219 int get_xonar_pcm179x_model(struct oxygen *chip, get_xonar_pcm179x_model() argument 1224 chip->model = model_xonar_d2; get_xonar_pcm179x_model() 1225 chip->model.shortname = "Xonar D2"; get_xonar_pcm179x_model() 1228 chip->model = model_xonar_d2; get_xonar_pcm179x_model() 1229 chip->model.shortname = "Xonar D2X"; get_xonar_pcm179x_model() 1230 chip->model.init = xonar_d2x_init; get_xonar_pcm179x_model() 1233 chip->model = model_xonar_hdav; get_xonar_pcm179x_model() 1234 oxygen_clear_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_DB_MASK); get_xonar_pcm179x_model() 1235 switch (oxygen_read16(chip, OXYGEN_GPIO_DATA) & GPIO_DB_MASK) { get_xonar_pcm179x_model() 1237 chip->model.shortname = "Xonar HDAV1.3"; get_xonar_pcm179x_model() 1240 chip->model.shortname = "Xonar HDAV1.3+H6"; get_xonar_pcm179x_model() 1241 chip->model.dac_channels_mixer = 8; get_xonar_pcm179x_model() 1242 chip->model.dac_mclks = OXYGEN_MCLKS(256, 128, 128); get_xonar_pcm179x_model() 1247 chip->model = model_xonar_st; get_xonar_pcm179x_model() 1248 oxygen_clear_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_DB_MASK); get_xonar_pcm179x_model() 1249 switch (oxygen_read16(chip, OXYGEN_GPIO_DATA) & GPIO_DB_MASK) { get_xonar_pcm179x_model() 1251 chip->model.shortname = "Xonar ST"; get_xonar_pcm179x_model() 1254 chip->model.shortname = "Xonar ST+H6"; get_xonar_pcm179x_model() 1255 chip->model.control_filter = xonar_st_h6_control_filter; get_xonar_pcm179x_model() 1256 chip->model.dac_channels_pcm = 8; get_xonar_pcm179x_model() 1257 chip->model.dac_channels_mixer = 8; get_xonar_pcm179x_model() 1258 chip->model.dac_volume_min = 255; get_xonar_pcm179x_model() 1259 chip->model.dac_mclks = OXYGEN_MCLKS(256, 128, 128); get_xonar_pcm179x_model() 1264 chip->model = model_xonar_st; get_xonar_pcm179x_model() 1265 chip->model.shortname = "Xonar STX"; get_xonar_pcm179x_model() 1266 chip->model.init = xonar_stx_init; get_xonar_pcm179x_model() 1267 chip->model.resume = xonar_stx_resume; get_xonar_pcm179x_model() 1268 chip->model.set_dac_params = set_pcm1796_params; get_xonar_pcm179x_model() 1271 chip->model = model_xonar_st; get_xonar_pcm179x_model() 1272 oxygen_clear_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_DB_MASK); get_xonar_pcm179x_model() 1273 switch (oxygen_read16(chip, OXYGEN_GPIO_DATA) & GPIO_DB_MASK) { get_xonar_pcm179x_model() 1275 chip->model.shortname = "Xonar STX II"; get_xonar_pcm179x_model() 1278 chip->model.shortname = "Xonar STX II+H6"; get_xonar_pcm179x_model() 1279 chip->model.dac_channels_pcm = 8; get_xonar_pcm179x_model() 1280 chip->model.dac_channels_mixer = 8; get_xonar_pcm179x_model() 1281 chip->model.dac_mclks = OXYGEN_MCLKS(256, 128, 128); get_xonar_pcm179x_model() 1284 chip->model.init = xonar_stx_init; get_xonar_pcm179x_model() 1285 chip->model.resume = xonar_stx_resume; get_xonar_pcm179x_model() 1286 chip->model.set_dac_params = set_pcm1796_params; get_xonar_pcm179x_model() 1289 chip->model = model_xonar_st; get_xonar_pcm179x_model() 1290 chip->model.shortname = "Xonar Xense"; get_xonar_pcm179x_model() 1291 chip->model.chip = "AV100"; get_xonar_pcm179x_model() 1292 chip->model.init = xonar_xense_init; get_xonar_pcm179x_model() 1293 chip->model.mixer_init = xonar_xense_mixer_init; get_xonar_pcm179x_model()
H A D	xonar_hdmi.c	29 static void hdmi_write_command(struct oxygen *chip, u8 command, hdmi_write_command() argument 35 oxygen_write_uart(chip, 0xfb); hdmi_write_command() 36 oxygen_write_uart(chip, 0xef); hdmi_write_command() 37 oxygen_write_uart(chip, command); hdmi_write_command() 38 oxygen_write_uart(chip, count); hdmi_write_command() 40 oxygen_write_uart(chip, params[i]); hdmi_write_command() 44 oxygen_write_uart(chip, checksum); hdmi_write_command() 47 static void xonar_hdmi_init_commands(struct oxygen *chip, xonar_hdmi_init_commands() argument 52 oxygen_reset_uart(chip); xonar_hdmi_init_commands() 54 hdmi_write_command(chip, 0x61, 1, &param); xonar_hdmi_init_commands() 56 hdmi_write_command(chip, 0x74, 1, &param); xonar_hdmi_init_commands() 57 hdmi_write_command(chip, 0x54, 5, hdmi->params); xonar_hdmi_init_commands() 60 void xonar_hdmi_init(struct oxygen *chip, struct xonar_hdmi *hdmi) xonar_hdmi_init() argument 64 xonar_hdmi_init_commands(chip, hdmi); xonar_hdmi_init() 67 void xonar_hdmi_cleanup(struct oxygen *chip) xonar_hdmi_cleanup() argument 71 hdmi_write_command(chip, 0x74, 1, &param); xonar_hdmi_cleanup() 74 void xonar_hdmi_resume(struct oxygen *chip, struct xonar_hdmi *hdmi) xonar_hdmi_resume() argument 76 xonar_hdmi_init_commands(chip, hdmi); xonar_hdmi_resume() 91 void xonar_set_hdmi_params(struct oxygen *chip, struct xonar_hdmi *hdmi, xonar_set_hdmi_params() argument 115 hdmi_write_command(chip, 0x54, 5, hdmi->params); xonar_set_hdmi_params() 118 void xonar_hdmi_uart_input(struct oxygen *chip) xonar_hdmi_uart_input() argument 120 if (chip->uart_input_count >= 2 && xonar_hdmi_uart_input() 121 chip->uart_input[chip->uart_input_count - 2] == 'O' && xonar_hdmi_uart_input() 122 chip->uart_input[chip->uart_input_count - 1] == 'K') { xonar_hdmi_uart_input() 123 dev_dbg(chip->card->dev, "message from HDMI chip received:\n"); xonar_hdmi_uart_input() 125 chip->uart_input, chip->uart_input_count); xonar_hdmi_uart_input() 126 chip->uart_input_count = 0; xonar_hdmi_uart_input()
H A D	xonar_dg.h	38 int cs4245_write_spi(struct oxygen *chip, u8 reg); 39 int cs4245_read_spi(struct oxygen *chip, u8 reg); 40 int cs4245_shadow_control(struct oxygen *chip, enum cs4245_shadow_operation op); 41 void dg_init(struct oxygen *chip); 42 void set_cs4245_dac_params(struct oxygen *chip, 44 void set_cs4245_adc_params(struct oxygen *chip, 46 unsigned int adjust_dg_dac_routing(struct oxygen *chip, 48 void dump_cs4245_registers(struct oxygen *chip, 50 void dg_suspend(struct oxygen *chip); 51 void dg_resume(struct oxygen *chip); 52 void dg_cleanup(struct oxygen *chip);
H A D	xonar_lib.c	33 void xonar_enable_output(struct oxygen *chip) xonar_enable_output() argument 35 struct xonar_generic *data = chip->model_data; xonar_enable_output() 37 oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, data->output_enable_bit); xonar_enable_output() 39 oxygen_set_bits16(chip, OXYGEN_GPIO_DATA, data->output_enable_bit); xonar_enable_output() 42 void xonar_disable_output(struct oxygen *chip) xonar_disable_output() argument 44 struct xonar_generic *data = chip->model_data; xonar_disable_output() 46 oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, data->output_enable_bit); xonar_disable_output() 49 static void xonar_ext_power_gpio_changed(struct oxygen *chip) xonar_ext_power_gpio_changed() argument 51 struct xonar_generic *data = chip->model_data; xonar_ext_power_gpio_changed() 54 has_power = !!(oxygen_read8(chip, data->ext_power_reg) xonar_ext_power_gpio_changed() 59 dev_notice(chip->card->dev, "power restored\n"); xonar_ext_power_gpio_changed() 61 dev_crit(chip->card->dev, xonar_ext_power_gpio_changed() 68 void xonar_init_ext_power(struct oxygen *chip) xonar_init_ext_power() argument 70 struct xonar_generic *data = chip->model_data; xonar_init_ext_power() 72 oxygen_set_bits8(chip, data->ext_power_int_reg, xonar_init_ext_power() 74 chip->interrupt_mask |= OXYGEN_INT_GPIO; xonar_init_ext_power() 75 chip->model.gpio_changed = xonar_ext_power_gpio_changed; xonar_init_ext_power() 76 data->has_power = !!(oxygen_read8(chip, data->ext_power_reg) xonar_init_ext_power() 80 void xonar_init_cs53x1(struct oxygen *chip) xonar_init_cs53x1() argument 82 oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_CS53x1_M_MASK); xonar_init_cs53x1() 83 oxygen_write16_masked(chip, OXYGEN_GPIO_DATA, xonar_init_cs53x1() 87 void xonar_set_cs53x1_params(struct oxygen *chip, xonar_set_cs53x1_params() argument 98 oxygen_write16_masked(chip, OXYGEN_GPIO_DATA, xonar_set_cs53x1_params() 105 struct oxygen *chip = ctl->private_data; xonar_gpio_bit_switch_get() local 110 !!(oxygen_read16(chip, OXYGEN_GPIO_DATA) & bit) ^ invert; xonar_gpio_bit_switch_get() 117 struct oxygen *chip = ctl->private_data; xonar_gpio_bit_switch_put() local 123 spin_lock_irq(&chip->reg_lock); xonar_gpio_bit_switch_put() 124 old_bits = oxygen_read16(chip, OXYGEN_GPIO_DATA); xonar_gpio_bit_switch_put() 131 oxygen_write16(chip, OXYGEN_GPIO_DATA, new_bits); xonar_gpio_bit_switch_put() 132 spin_unlock_irq(&chip->reg_lock); xonar_gpio_bit_switch_put()
H A D	xonar_wm87x6.c	101 static void wm8776_write_spi(struct oxygen *chip, wm8776_write_spi() argument 104 oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER | wm8776_write_spi() 112 static void wm8776_write_i2c(struct oxygen *chip, wm8776_write_i2c() argument 115 oxygen_write_i2c(chip, I2C_DEVICE_WM8776, wm8776_write_i2c() 119 static void wm8776_write(struct oxygen *chip, wm8776_write() argument 122 struct xonar_wm87x6 *data = chip->model_data; wm8776_write() 124 if ((chip->model.function_flags & OXYGEN_FUNCTION_2WIRE_SPI_MASK) == wm8776_write() 126 wm8776_write_spi(chip, reg, value); wm8776_write() 128 wm8776_write_i2c(chip, reg, value); wm8776_write() 136 static void wm8776_write_cached(struct oxygen *chip, wm8776_write_cached() argument 139 struct xonar_wm87x6 *data = chip->model_data; wm8776_write_cached() 143 wm8776_write(chip, reg, value); wm8776_write_cached() 146 static void wm8766_write(struct oxygen *chip, wm8766_write() argument 149 struct xonar_wm87x6 *data = chip->model_data; wm8766_write() 151 oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER | wm8766_write() 165 static void wm8766_write_cached(struct oxygen *chip, wm8766_write_cached() argument 168 struct xonar_wm87x6 *data = chip->model_data; wm8766_write_cached() 172 wm8766_write(chip, reg, value); wm8766_write_cached() 175 static void wm8776_registers_init(struct oxygen *chip) wm8776_registers_init() argument 177 struct xonar_wm87x6 *data = chip->model_data; wm8776_registers_init() 179 wm8776_write(chip, WM8776_RESET, 0); wm8776_registers_init() 180 wm8776_write(chip, WM8776_PHASESWAP, WM8776_PH_MASK); wm8776_registers_init() 181 wm8776_write(chip, WM8776_DACCTRL1, WM8776_DZCEN | wm8776_registers_init() 183 wm8776_write(chip, WM8776_DACMUTE, chip->dac_mute ? WM8776_DMUTE : 0); wm8776_registers_init() 184 wm8776_write(chip, WM8776_DACIFCTRL, wm8776_registers_init() 186 wm8776_write(chip, WM8776_ADCIFCTRL, wm8776_registers_init() 188 wm8776_write(chip, WM8776_MSTRCTRL, data->wm8776_regs[WM8776_MSTRCTRL]); wm8776_registers_init() 189 wm8776_write(chip, WM8776_PWRDOWN, data->wm8776_regs[WM8776_PWRDOWN]); wm8776_registers_init() 190 wm8776_write(chip, WM8776_HPLVOL, data->wm8776_regs[WM8776_HPLVOL]); wm8776_registers_init() 191 wm8776_write(chip, WM8776_HPRVOL, data->wm8776_regs[WM8776_HPRVOL] | wm8776_registers_init() 193 wm8776_write(chip, WM8776_ADCLVOL, data->wm8776_regs[WM8776_ADCLVOL]); wm8776_registers_init() 194 wm8776_write(chip, WM8776_ADCRVOL, data->wm8776_regs[WM8776_ADCRVOL]); wm8776_registers_init() 195 wm8776_write(chip, WM8776_ADCMUX, data->wm8776_regs[WM8776_ADCMUX]); wm8776_registers_init() 196 wm8776_write(chip, WM8776_DACLVOL, chip->dac_volume[0]); wm8776_registers_init() 197 wm8776_write(chip, WM8776_DACRVOL, chip->dac_volume[1] | WM8776_UPDATE); wm8776_registers_init() 200 static void wm8766_registers_init(struct oxygen *chip) wm8766_registers_init() argument 202 struct xonar_wm87x6 *data = chip->model_data; wm8766_registers_init() 204 wm8766_write(chip, WM8766_RESET, 0); wm8766_registers_init() 205 wm8766_write(chip, WM8766_DAC_CTRL, data->wm8766_regs[WM8766_DAC_CTRL]); wm8766_registers_init() 206 wm8766_write(chip, WM8766_INT_CTRL, WM8766_FMT_LJUST | WM8766_IWL_24); wm8766_registers_init() 207 wm8766_write(chip, WM8766_DAC_CTRL2, wm8766_registers_init() 208 WM8766_ZCD | (chip->dac_mute ? WM8766_DMUTE_MASK : 0)); wm8766_registers_init() 209 wm8766_write(chip, WM8766_LDA1, chip->dac_volume[2]); wm8766_registers_init() 210 wm8766_write(chip, WM8766_RDA1, chip->dac_volume[3]); wm8766_registers_init() 211 wm8766_write(chip, WM8766_LDA2, chip->dac_volume[4]); wm8766_registers_init() 212 wm8766_write(chip, WM8766_RDA2, chip->dac_volume[5]); wm8766_registers_init() 213 wm8766_write(chip, WM8766_LDA3, chip->dac_volume[6]); wm8766_registers_init() 214 wm8766_write(chip, WM8766_RDA3, chip->dac_volume[7] | WM8766_UPDATE); wm8766_registers_init() 217 static void wm8776_init(struct oxygen *chip) wm8776_init() argument 219 struct xonar_wm87x6 *data = chip->model_data; wm8776_init() 231 wm8776_registers_init(chip); wm8776_init() 234 static void wm8766_init(struct oxygen *chip) wm8766_init() argument 236 struct xonar_wm87x6 *data = chip->model_data; wm8766_init() 240 wm8766_registers_init(chip); wm8766_init() 243 static void xonar_ds_handle_hp_jack(struct oxygen *chip) xonar_ds_handle_hp_jack() argument 245 struct xonar_wm87x6 *data = chip->model_data; xonar_ds_handle_hp_jack() 249 mutex_lock(&chip->mutex); xonar_ds_handle_hp_jack() 251 hp_plugged = !(oxygen_read16(chip, OXYGEN_GPIO_DATA) & xonar_ds_handle_hp_jack() 254 oxygen_write16_masked(chip, OXYGEN_GPIO_DATA, xonar_ds_handle_hp_jack() 261 wm8766_write_cached(chip, WM8766_DAC_CTRL, reg); xonar_ds_handle_hp_jack() 265 mutex_unlock(&chip->mutex); xonar_ds_handle_hp_jack() 268 static void xonar_ds_init(struct oxygen *chip) xonar_ds_init() argument 270 struct xonar_wm87x6 *data = chip->model_data; xonar_ds_init() 275 wm8776_init(chip); xonar_ds_init() 276 wm8766_init(chip); xonar_ds_init() 278 oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, xonar_ds_init() 280 oxygen_clear_bits16(chip, OXYGEN_GPIO_CONTROL, xonar_ds_init() 282 oxygen_set_bits16(chip, OXYGEN_GPIO_DATA, GPIO_DS_INPUT_ROUTE); xonar_ds_init() 283 oxygen_set_bits16(chip, OXYGEN_GPIO_INTERRUPT_MASK, GPIO_DS_HP_DETECT); xonar_ds_init() 284 chip->interrupt_mask |= OXYGEN_INT_GPIO; xonar_ds_init() 286 xonar_enable_output(chip); xonar_ds_init() 288 snd_jack_new(chip->card, "Headphone", xonar_ds_init() 290 xonar_ds_handle_hp_jack(chip); xonar_ds_init() 292 snd_component_add(chip->card, "WM8776"); xonar_ds_init() 293 snd_component_add(chip->card, "WM8766"); xonar_ds_init() 296 static void xonar_hdav_slim_init(struct oxygen *chip) xonar_hdav_slim_init() argument 298 struct xonar_wm87x6 *data = chip->model_data; xonar_hdav_slim_init() 303 wm8776_init(chip); xonar_hdav_slim_init() 305 oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, xonar_hdav_slim_init() 310 xonar_hdmi_init(chip, &data->hdmi); xonar_hdav_slim_init() 311 xonar_enable_output(chip); xonar_hdav_slim_init() 313 snd_component_add(chip->card, "WM8776"); xonar_hdav_slim_init() 316 static void xonar_ds_cleanup(struct oxygen *chip) xonar_ds_cleanup() argument 318 xonar_disable_output(chip); xonar_ds_cleanup() 319 wm8776_write(chip, WM8776_RESET, 0); xonar_ds_cleanup() 322 static void xonar_hdav_slim_cleanup(struct oxygen *chip) xonar_hdav_slim_cleanup() argument 324 xonar_hdmi_cleanup(chip); xonar_hdav_slim_cleanup() 325 xonar_disable_output(chip); xonar_hdav_slim_cleanup() 326 wm8776_write(chip, WM8776_RESET, 0); xonar_hdav_slim_cleanup() 330 static void xonar_ds_suspend(struct oxygen *chip) xonar_ds_suspend() argument 332 xonar_ds_cleanup(chip); xonar_ds_suspend() 335 static void xonar_hdav_slim_suspend(struct oxygen *chip) xonar_hdav_slim_suspend() argument 337 xonar_hdav_slim_cleanup(chip); xonar_hdav_slim_suspend() 340 static void xonar_ds_resume(struct oxygen *chip) xonar_ds_resume() argument 342 wm8776_registers_init(chip); xonar_ds_resume() 343 wm8766_registers_init(chip); xonar_ds_resume() 344 xonar_enable_output(chip); xonar_ds_resume() 345 xonar_ds_handle_hp_jack(chip); xonar_ds_resume() 348 static void xonar_hdav_slim_resume(struct oxygen *chip) xonar_hdav_slim_resume() argument 350 struct xonar_wm87x6 *data = chip->model_data; xonar_hdav_slim_resume() 352 wm8776_registers_init(chip); xonar_hdav_slim_resume() 353 xonar_hdmi_resume(chip, &data->hdmi); xonar_hdav_slim_resume() 354 xonar_enable_output(chip); xonar_hdav_slim_resume() 378 static void set_wm87x6_dac_params(struct oxygen *chip, set_wm87x6_dac_params() argument 383 static void set_wm8776_adc_params(struct oxygen *chip, set_wm8776_adc_params() argument 391 wm8776_write_cached(chip, WM8776_MSTRCTRL, reg); set_wm8776_adc_params() 394 static void set_hdav_slim_dac_params(struct oxygen *chip, set_hdav_slim_dac_params() argument 397 struct xonar_wm87x6 *data = chip->model_data; set_hdav_slim_dac_params() 399 xonar_set_hdmi_params(chip, &data->hdmi, params); set_hdav_slim_dac_params() 402 static void update_wm8776_volume(struct oxygen *chip) update_wm8776_volume() argument 404 struct xonar_wm87x6 *data = chip->model_data; update_wm8776_volume() 407 if (chip->dac_volume[0] == chip->dac_volume[1]) { update_wm8776_volume() 408 if (chip->dac_volume[0] != data->wm8776_regs[WM8776_DACLVOL] || update_wm8776_volume() 409 chip->dac_volume[1] != data->wm8776_regs[WM8776_DACRVOL]) { update_wm8776_volume() 410 wm8776_write(chip, WM8776_DACMASTER, update_wm8776_volume() 411 chip->dac_volume[0] | WM8776_UPDATE); update_wm8776_volume() 412 data->wm8776_regs[WM8776_DACLVOL] = chip->dac_volume[0]; update_wm8776_volume() 413 data->wm8776_regs[WM8776_DACRVOL] = chip->dac_volume[0]; update_wm8776_volume() 416 to_change = (chip->dac_volume[0] != update_wm8776_volume() 418 to_change |= (chip->dac_volume[1] != update_wm8776_volume() 421 wm8776_write(chip, WM8776_DACLVOL, chip->dac_volume[0] | update_wm8776_volume() 424 wm8776_write(chip, WM8776_DACRVOL, update_wm8776_volume() 425 chip->dac_volume[1] | WM8776_UPDATE); update_wm8776_volume() 429 static void update_wm87x6_volume(struct oxygen *chip) update_wm87x6_volume() argument 436 struct xonar_wm87x6 *data = chip->model_data; update_wm87x6_volume() 440 update_wm8776_volume(chip); update_wm87x6_volume() 441 if (chip->dac_volume[2] == chip->dac_volume[3] && update_wm87x6_volume() 442 chip->dac_volume[2] == chip->dac_volume[4] && update_wm87x6_volume() 443 chip->dac_volume[2] == chip->dac_volume[5] && update_wm87x6_volume() 444 chip->dac_volume[2] == chip->dac_volume[6] && update_wm87x6_volume() 445 chip->dac_volume[2] == chip->dac_volume[7]) { update_wm87x6_volume() 448 if (chip->dac_volume[2] != update_wm87x6_volume() 452 wm8766_write(chip, WM8766_MASTDA, update_wm87x6_volume() 453 chip->dac_volume[2] | WM8766_UPDATE); update_wm87x6_volume() 456 chip->dac_volume[2]; update_wm87x6_volume() 461 to_change |= (chip->dac_volume[2 + i] != update_wm87x6_volume() 465 wm8766_write(chip, wm8766_regs[i], update_wm87x6_volume() 466 chip->dac_volume[2 + i] | update_wm87x6_volume() 472 static void update_wm8776_mute(struct oxygen *chip) update_wm8776_mute() argument 474 wm8776_write_cached(chip, WM8776_DACMUTE, update_wm8776_mute() 475 chip->dac_mute ? WM8776_DMUTE : 0); update_wm8776_mute() 478 static void update_wm87x6_mute(struct oxygen *chip) update_wm87x6_mute() argument 480 update_wm8776_mute(chip); update_wm87x6_mute() 481 wm8766_write_cached(chip, WM8766_DAC_CTRL2, WM8766_ZCD | update_wm87x6_mute() 482 (chip->dac_mute ? WM8766_DMUTE_MASK : 0)); update_wm87x6_mute() 485 static void update_wm8766_center_lfe_mix(struct oxygen *chip, bool mixed) update_wm8766_center_lfe_mix() argument 487 struct xonar_wm87x6 *data = chip->model_data; update_wm8766_center_lfe_mix() 500 wm8766_write_cached(chip, WM8766_DAC_CTRL, reg); update_wm8766_center_lfe_mix() 503 static void xonar_ds_gpio_changed(struct oxygen *chip) xonar_ds_gpio_changed() argument 505 xonar_ds_handle_hp_jack(chip); xonar_ds_gpio_changed() 511 struct oxygen *chip = ctl->private_data; wm8776_bit_switch_get() local 512 struct xonar_wm87x6 *data = chip->model_data; wm8776_bit_switch_get() 525 struct oxygen *chip = ctl->private_data; wm8776_bit_switch_put() local 526 struct xonar_wm87x6 *data = chip->model_data; wm8776_bit_switch_put() 533 mutex_lock(&chip->mutex); wm8776_bit_switch_put() 539 wm8776_write(chip, reg_index, reg_value); wm8776_bit_switch_put() 540 mutex_unlock(&chip->mutex); wm8776_bit_switch_put() 619 struct oxygen *chip = ctl->private_data; wm8776_field_set_from_ctl() local 620 struct xonar_wm87x6 *data = chip->model_data; wm8776_field_set_from_ctl() 647 wm8776_write_cached(chip, reg_index, reg_value); wm8776_field_set_from_ctl() 652 struct oxygen *chip = ctl->private_data; wm8776_field_set() local 660 mutex_lock(&chip->mutex); wm8776_field_set() 666 mutex_unlock(&chip->mutex); wm8776_field_set() 709 struct oxygen *chip = ctl->private_data; wm8776_hp_vol_get() local 710 struct xonar_wm87x6 *data = chip->model_data; wm8776_hp_vol_get() 712 mutex_lock(&chip->mutex); wm8776_hp_vol_get() 717 mutex_unlock(&chip->mutex); wm8776_hp_vol_get() 724 struct oxygen *chip = ctl->private_data; wm8776_hp_vol_put() local 725 struct xonar_wm87x6 *data = chip->model_data; wm8776_hp_vol_put() 728 mutex_lock(&chip->mutex); wm8776_hp_vol_put() 737 wm8776_write(chip, WM8776_HPMASTER, wm8776_hp_vol_put() 747 wm8776_write(chip, WM8776_HPLVOL, wm8776_hp_vol_put() 752 wm8776_write(chip, WM8776_HPRVOL, wm8776_hp_vol_put() 756 mutex_unlock(&chip->mutex); wm8776_hp_vol_put() 763 struct oxygen *chip = ctl->private_data; wm8776_input_mux_get() local 764 struct xonar_wm87x6 *data = chip->model_data; wm8776_input_mux_get() 775 struct oxygen *chip = ctl->private_data; wm8776_input_mux_put() local 776 struct xonar_wm87x6 *data = chip->model_data; wm8776_input_mux_put() 782 mutex_lock(&chip->mutex); wm8776_input_mux_put() 794 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, wm8776_input_mux_put() 801 oxygen_write16_masked(chip, OXYGEN_GPIO_DATA, wm8776_input_mux_put() 804 wm8776_write(chip, WM8776_ADCMUX, reg); wm8776_input_mux_put() 806 mutex_unlock(&chip->mutex); wm8776_input_mux_put() 823 struct oxygen *chip = ctl->private_data; wm8776_input_vol_get() local 824 struct xonar_wm87x6 *data = chip->model_data; wm8776_input_vol_get() 826 mutex_lock(&chip->mutex); wm8776_input_vol_get() 831 mutex_unlock(&chip->mutex); wm8776_input_vol_get() 838 struct oxygen *chip = ctl->private_data; wm8776_input_vol_put() local 839 struct xonar_wm87x6 *data = chip->model_data; wm8776_input_vol_put() 842 mutex_lock(&chip->mutex); wm8776_input_vol_put() 847 wm8776_write_cached(chip, WM8776_ADCLVOL, wm8776_input_vol_put() 849 wm8776_write_cached(chip, WM8776_ADCRVOL, wm8776_input_vol_put() 851 mutex_unlock(&chip->mutex); wm8776_input_vol_put() 868 struct oxygen *chip = ctl->private_data; wm8776_level_control_get() local 869 struct xonar_wm87x6 *data = chip->model_data; wm8776_level_control_get() 881 static void activate_control(struct oxygen *chip, activate_control() argument 892 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO, &ctl->id); activate_control() 899 struct oxygen *chip = ctl->private_data; wm8776_level_control_put() local 900 struct xonar_wm87x6 *data = chip->model_data; wm8776_level_control_put() 907 mutex_lock(&chip->mutex); wm8776_level_control_put() 915 wm8776_write_cached(chip, WM8776_ALCCTRL2, wm8776_level_control_put() 919 wm8776_write_cached(chip, WM8776_ALCCTRL1, wm8776_level_control_put() 922 wm8776_write_cached(chip, WM8776_ALCCTRL2, wm8776_level_control_put() 927 wm8776_write_cached(chip, WM8776_ALCCTRL1, wm8776_level_control_put() 930 wm8776_write_cached(chip, WM8776_ALCCTRL2, wm8776_level_control_put() 936 activate_control(chip, data->lc_controls[i], mode); wm8776_level_control_put() 938 mutex_unlock(&chip->mutex); wm8776_level_control_put() 953 struct oxygen *chip = ctl->private_data; hpf_get() local 954 struct xonar_wm87x6 *data = chip->model_data; hpf_get() 963 struct oxygen *chip = ctl->private_data; hpf_put() local 964 struct xonar_wm87x6 *data = chip->model_data; hpf_put() 968 mutex_lock(&chip->mutex); hpf_put() 974 wm8776_write(chip, WM8776_ADCIFCTRL, reg); hpf_put() 975 mutex_unlock(&chip->mutex); hpf_put() 1166 static int add_lc_controls(struct oxygen *chip) add_lc_controls() argument 1168 struct xonar_wm87x6 *data = chip->model_data; add_lc_controls() 1175 ctl = snd_ctl_new1(&lc_controls[i], chip); add_lc_controls() 1178 err = snd_ctl_add(chip->card, ctl); add_lc_controls() 1186 static int xonar_ds_mixer_init(struct oxygen *chip) xonar_ds_mixer_init() argument 1188 struct xonar_wm87x6 *data = chip->model_data; xonar_ds_mixer_init() 1194 ctl = snd_ctl_new1(&ds_controls[i], chip); xonar_ds_mixer_init() 1197 err = snd_ctl_add(chip->card, ctl); xonar_ds_mixer_init() 1208 return add_lc_controls(chip); xonar_ds_mixer_init() 1211 static int xonar_hdav_slim_mixer_init(struct oxygen *chip) xonar_hdav_slim_mixer_init() argument 1218 ctl = snd_ctl_new1(&hdav_slim_controls[i], chip); xonar_hdav_slim_mixer_init() 1221 err = snd_ctl_add(chip->card, ctl); xonar_hdav_slim_mixer_init() 1226 return add_lc_controls(chip); xonar_hdav_slim_mixer_init() 1229 static void dump_wm8776_registers(struct oxygen *chip, dump_wm8776_registers() argument 1232 struct xonar_wm87x6 *data = chip->model_data; dump_wm8776_registers() 1244 static void dump_wm87x6_registers(struct oxygen *chip, dump_wm87x6_registers() argument 1247 struct xonar_wm87x6 *data = chip->model_data; dump_wm87x6_registers() 1250 dump_wm8776_registers(chip, buffer); dump_wm87x6_registers() 1259 .chip = "AV200", 1293 .chip = "AV200", 1323 int get_xonar_wm87x6_model(struct oxygen *chip, get_xonar_wm87x6_model() argument 1328 chip->model = model_xonar_ds; get_xonar_wm87x6_model() 1329 chip->model.shortname = "Xonar DS"; get_xonar_wm87x6_model() 1332 chip->model = model_xonar_ds; get_xonar_wm87x6_model() 1333 chip->model.shortname = "Xonar DSX"; get_xonar_wm87x6_model() 1336 chip->model = model_xonar_hdav_slim; get_xonar_wm87x6_model()
H A D	xonar_dg_mixer.c	32 static int output_select_apply(struct oxygen *chip) output_select_apply() argument 34 struct dg *data = chip->model_data; output_select_apply() 39 oxygen_set_bits8(chip, OXYGEN_GPIO_DATA, GPIO_HP_REAR); output_select_apply() 45 oxygen_clear_bits8(chip, OXYGEN_GPIO_DATA, GPIO_HP_REAR); output_select_apply() 52 oxygen_clear_bits8(chip, OXYGEN_GPIO_DATA, GPIO_HP_REAR); output_select_apply() 54 return cs4245_write_spi(chip, CS4245_SIGNAL_SEL); output_select_apply() 72 struct oxygen *chip = ctl->private_data; output_select_get() local 73 struct dg *data = chip->model_data; output_select_get() 75 mutex_lock(&chip->mutex); output_select_get() 77 mutex_unlock(&chip->mutex); output_select_get() 84 struct oxygen *chip = ctl->private_data; output_select_put() local 85 struct dg *data = chip->model_data; output_select_put() 90 mutex_lock(&chip->mutex); output_select_put() 93 ret = output_select_apply(chip); output_select_put() 95 oxygen_update_dac_routing(chip); output_select_put() 97 mutex_unlock(&chip->mutex); output_select_put() 117 struct oxygen *chip = ctl->private_data; hp_stereo_volume_get() local 118 struct dg *data = chip->model_data; hp_stereo_volume_get() 121 mutex_lock(&chip->mutex); hp_stereo_volume_get() 126 mutex_unlock(&chip->mutex); hp_stereo_volume_get() 133 struct oxygen *chip = ctl->private_data; hp_stereo_volume_put() local 134 struct dg *data = chip->model_data; hp_stereo_volume_put() 143 mutex_lock(&chip->mutex); hp_stereo_volume_put() 148 ret = cs4245_write_spi(chip, CS4245_DAC_A_CTRL); hp_stereo_volume_put() 150 ret = cs4245_write_spi(chip, CS4245_DAC_B_CTRL); hp_stereo_volume_put() 153 mutex_unlock(&chip->mutex); hp_stereo_volume_put() 163 struct oxygen *chip = ctl->private_data; hp_mute_get() local 164 struct dg *data = chip->model_data; hp_mute_get() 166 mutex_lock(&chip->mutex); hp_mute_get() 169 mutex_unlock(&chip->mutex); hp_mute_get() 176 struct oxygen *chip = ctl->private_data; hp_mute_put() local 177 struct dg *data = chip->model_data; hp_mute_put() 183 mutex_lock(&chip->mutex); hp_mute_put() 187 ret = cs4245_write_spi(chip, CS4245_DAC_CTRL_1); hp_mute_put() 189 mutex_unlock(&chip->mutex); hp_mute_put() 195 static int input_volume_apply(struct oxygen *chip, char left, char right) input_volume_apply() argument 197 struct dg *data = chip->model_data; input_volume_apply() 202 ret = cs4245_write_spi(chip, CS4245_PGA_A_CTRL); input_volume_apply() 205 return cs4245_write_spi(chip, CS4245_PGA_B_CTRL); input_volume_apply() 221 struct oxygen *chip = ctl->private_data; input_vol_get() local 222 struct dg *data = chip->model_data; input_vol_get() 225 mutex_lock(&chip->mutex); input_vol_get() 228 mutex_unlock(&chip->mutex); input_vol_get() 235 struct oxygen *chip = ctl->private_data; input_vol_put() local 236 struct dg *data = chip->model_data; input_vol_put() 246 mutex_lock(&chip->mutex); input_vol_put() 253 ret = input_volume_apply(chip, input_vol_put() 259 mutex_unlock(&chip->mutex); input_vol_put() 265 static int input_source_apply(struct oxygen *chip) input_source_apply() argument 267 struct dg *data = chip->model_data; input_source_apply() 276 return cs4245_write_spi(chip, CS4245_ANALOG_IN); input_source_apply() 292 struct oxygen *chip = ctl->private_data; input_sel_get() local 293 struct dg *data = chip->model_data; input_sel_get() 295 mutex_lock(&chip->mutex); input_sel_get() 297 mutex_unlock(&chip->mutex); input_sel_get() 304 struct oxygen *chip = ctl->private_data; input_sel_put() local 305 struct dg *data = chip->model_data; input_sel_put() 312 mutex_lock(&chip->mutex); input_sel_put() 317 ret = input_source_apply(chip); input_sel_put() 319 ret = input_volume_apply(chip, input_sel_put() 324 mutex_unlock(&chip->mutex); input_sel_put() 339 struct oxygen *chip = ctl->private_data; hpf_get() local 340 struct dg *data = chip->model_data; hpf_get() 349 struct oxygen *chip = ctl->private_data; hpf_put() local 350 struct dg *data = chip->model_data; hpf_put() 354 mutex_lock(&chip->mutex); hpf_put() 361 cs4245_write_spi(chip, CS4245_ADC_CTRL); hpf_put() 363 mutex_unlock(&chip->mutex); hpf_put() 433 static int dg_mixer_init(struct oxygen *chip) dg_mixer_init() argument 438 output_select_apply(chip); dg_mixer_init() 439 input_source_apply(chip); dg_mixer_init() 440 oxygen_update_dac_routing(chip); dg_mixer_init() 443 err = snd_ctl_add(chip->card, dg_mixer_init() 444 snd_ctl_new1(&dg_controls[i], chip)); dg_mixer_init() 454 .chip = "CMI8786",
H A D	oxygen.h	79 const char *chip; member in struct:oxygen_model 80 void (*init)(struct oxygen *chip); 82 int (*mixer_init)(struct oxygen *chip); 83 void (*cleanup)(struct oxygen *chip); 84 void (*suspend)(struct oxygen *chip); 85 void (*resume)(struct oxygen *chip); 88 void (*set_dac_params)(struct oxygen *chip, 90 void (*set_adc_params)(struct oxygen *chip, 92 void (*update_dac_volume)(struct oxygen *chip); 93 void (*update_dac_mute)(struct oxygen *chip); 94 void (*update_center_lfe_mix)(struct oxygen *chip, bool mixed); 95 unsigned int (*adjust_dac_routing)(struct oxygen *chip, 97 void (*gpio_changed)(struct oxygen *chip); 98 void (*uart_input)(struct oxygen *chip); 99 void (*ac97_switch)(struct oxygen *chip, 101 void (*dump_registers)(struct oxygen *chip, 159 int (*get_model)(struct oxygen *chip, 171 int oxygen_mixer_init(struct oxygen *chip); 172 void oxygen_update_dac_routing(struct oxygen *chip); 173 void oxygen_update_spdif_source(struct oxygen *chip); 177 int oxygen_pcm_init(struct oxygen *chip); 181 u8 oxygen_read8(struct oxygen *chip, unsigned int reg); 182 u16 oxygen_read16(struct oxygen *chip, unsigned int reg); 183 u32 oxygen_read32(struct oxygen *chip, unsigned int reg); 184 void oxygen_write8(struct oxygen *chip, unsigned int reg, u8 value); 185 void oxygen_write16(struct oxygen *chip, unsigned int reg, u16 value); 186 void oxygen_write32(struct oxygen *chip, unsigned int reg, u32 value); 187 void oxygen_write8_masked(struct oxygen *chip, unsigned int reg, 189 void oxygen_write16_masked(struct oxygen *chip, unsigned int reg, 191 void oxygen_write32_masked(struct oxygen *chip, unsigned int reg, 194 u16 oxygen_read_ac97(struct oxygen *chip, unsigned int codec, 196 void oxygen_write_ac97(struct oxygen *chip, unsigned int codec, 198 void oxygen_write_ac97_masked(struct oxygen *chip, unsigned int codec, 201 int oxygen_write_spi(struct oxygen *chip, u8 control, unsigned int data); 202 void oxygen_write_i2c(struct oxygen *chip, u8 device, u8 map, u8 data); 204 void oxygen_reset_uart(struct oxygen *chip); 205 void oxygen_write_uart(struct oxygen *chip, u8 data); 207 u16 oxygen_read_eeprom(struct oxygen *chip, unsigned int index); 208 void oxygen_write_eeprom(struct oxygen *chip, unsigned int index, u16 value); 210 static inline void oxygen_set_bits8(struct oxygen *chip, oxygen_set_bits8() argument 213 oxygen_write8_masked(chip, reg, value, value); oxygen_set_bits8() 216 static inline void oxygen_set_bits16(struct oxygen *chip, oxygen_set_bits16() argument 219 oxygen_write16_masked(chip, reg, value, value); oxygen_set_bits16() 222 static inline void oxygen_set_bits32(struct oxygen *chip, oxygen_set_bits32() argument 225 oxygen_write32_masked(chip, reg, value, value); oxygen_set_bits32() 228 static inline void oxygen_clear_bits8(struct oxygen *chip, oxygen_clear_bits8() argument 231 oxygen_write8_masked(chip, reg, 0, value); oxygen_clear_bits8() 234 static inline void oxygen_clear_bits16(struct oxygen *chip, oxygen_clear_bits16() argument 237 oxygen_write16_masked(chip, reg, 0, value); oxygen_clear_bits16() 240 static inline void oxygen_clear_bits32(struct oxygen *chip, oxygen_clear_bits32() argument 243 oxygen_write32_masked(chip, reg, 0, value); oxygen_clear_bits32() 246 static inline void oxygen_ac97_set_bits(struct oxygen *chip, unsigned int codec, oxygen_ac97_set_bits() argument 249 oxygen_write_ac97_masked(chip, codec, index, value, value); oxygen_ac97_set_bits() 252 static inline void oxygen_ac97_clear_bits(struct oxygen *chip, oxygen_ac97_clear_bits() argument 256 oxygen_write_ac97_masked(chip, codec, index, 0, value); oxygen_ac97_clear_bits()
H A D	oxygen_mixer.c	31 struct oxygen *chip = ctl->private_data; dac_volume_info() local 34 info->count = chip->model.dac_channels_mixer; dac_volume_info() 35 info->value.integer.min = chip->model.dac_volume_min; dac_volume_info() 36 info->value.integer.max = chip->model.dac_volume_max; dac_volume_info() 43 struct oxygen *chip = ctl->private_data; dac_volume_get() local 46 mutex_lock(&chip->mutex); dac_volume_get() 47 for (i = 0; i < chip->model.dac_channels_mixer; ++i) dac_volume_get() 48 value->value.integer.value[i] = chip->dac_volume[i]; dac_volume_get() 49 mutex_unlock(&chip->mutex); dac_volume_get() 56 struct oxygen *chip = ctl->private_data; dac_volume_put() local 61 mutex_lock(&chip->mutex); dac_volume_put() 62 for (i = 0; i < chip->model.dac_channels_mixer; ++i) dac_volume_put() 63 if (value->value.integer.value[i] != chip->dac_volume[i]) { dac_volume_put() 64 chip->dac_volume[i] = value->value.integer.value[i]; dac_volume_put() 68 chip->model.update_dac_volume(chip); dac_volume_put() 69 mutex_unlock(&chip->mutex); dac_volume_put() 76 struct oxygen *chip = ctl->private_data; dac_mute_get() local 78 mutex_lock(&chip->mutex); dac_mute_get() 79 value->value.integer.value[0] = !chip->dac_mute; dac_mute_get() 80 mutex_unlock(&chip->mutex); dac_mute_get() 87 struct oxygen *chip = ctl->private_data; dac_mute_put() local 90 mutex_lock(&chip->mutex); dac_mute_put() 91 changed = !value->value.integer.value[0] != chip->dac_mute; dac_mute_put() 93 chip->dac_mute = !value->value.integer.value[0]; dac_mute_put() 94 chip->model.update_dac_mute(chip); dac_mute_put() 96 mutex_unlock(&chip->mutex); dac_mute_put() 100 static unsigned int upmix_item_count(struct oxygen *chip) upmix_item_count() argument 102 if (chip->model.dac_channels_pcm < 8) upmix_item_count() 104 else if (chip->model.update_center_lfe_mix) upmix_item_count() 119 struct oxygen *chip = ctl->private_data; upmix_info() local 120 unsigned int count = upmix_item_count(chip); upmix_info() 127 struct oxygen *chip = ctl->private_data; upmix_get() local 129 mutex_lock(&chip->mutex); upmix_get() 130 value->value.enumerated.item[0] = chip->dac_routing; upmix_get() 131 mutex_unlock(&chip->mutex); upmix_get() 135 void oxygen_update_dac_routing(struct oxygen *chip) oxygen_update_dac_routing() argument 168 channels = oxygen_read8(chip, OXYGEN_PLAY_CHANNELS) & oxygen_update_dac_routing() 171 reg_value = reg_values[chip->dac_routing]; oxygen_update_dac_routing() 183 if (chip->model.adjust_dac_routing) oxygen_update_dac_routing() 184 reg_value = chip->model.adjust_dac_routing(chip, reg_value); oxygen_update_dac_routing() 185 oxygen_write16_masked(chip, OXYGEN_PLAY_ROUTING, reg_value, oxygen_update_dac_routing() 190 if (chip->model.update_center_lfe_mix) oxygen_update_dac_routing() 191 chip->model.update_center_lfe_mix(chip, chip->dac_routing > 2); oxygen_update_dac_routing() 197 struct oxygen *chip = ctl->private_data; upmix_put() local 198 unsigned int count = upmix_item_count(chip); upmix_put() 203 mutex_lock(&chip->mutex); upmix_put() 204 changed = value->value.enumerated.item[0] != chip->dac_routing; upmix_put() 206 chip->dac_routing = value->value.enumerated.item[0]; upmix_put() 207 oxygen_update_dac_routing(chip); upmix_put() 209 mutex_unlock(&chip->mutex); upmix_put() 216 struct oxygen *chip = ctl->private_data; spdif_switch_get() local 218 mutex_lock(&chip->mutex); spdif_switch_get() 219 value->value.integer.value[0] = chip->spdif_playback_enable; spdif_switch_get() 220 mutex_unlock(&chip->mutex); spdif_switch_get() 246 void oxygen_update_spdif_source(struct oxygen *chip) oxygen_update_spdif_source() argument 252 old_control = oxygen_read32(chip, OXYGEN_SPDIF_CONTROL); oxygen_update_spdif_source() 253 old_routing = oxygen_read16(chip, OXYGEN_PLAY_ROUTING); oxygen_update_spdif_source() 254 if (chip->pcm_active & (1 << PCM_SPDIF)) { oxygen_update_spdif_source() 261 } else if ((chip->pcm_active & (1 << PCM_MULTICH)) && oxygen_update_spdif_source() 262 chip->spdif_playback_enable) { oxygen_update_spdif_source() 265 oxygen_rate = oxygen_read16(chip, OXYGEN_I2S_MULTICH_FORMAT) oxygen_update_spdif_source() 276 oxygen_write32(chip, OXYGEN_SPDIF_CONTROL, oxygen_update_spdif_source() 278 oxygen_write16(chip, OXYGEN_PLAY_ROUTING, new_routing); oxygen_update_spdif_source() 281 oxygen_write32(chip, OXYGEN_SPDIF_OUTPUT_BITS, oxygen_update_spdif_source() 283 ((chip->pcm_active & (1 << PCM_SPDIF)) ? oxygen_update_spdif_source() 284 chip->spdif_pcm_bits : chip->spdif_bits)); oxygen_update_spdif_source() 285 oxygen_write32(chip, OXYGEN_SPDIF_CONTROL, new_control); oxygen_update_spdif_source() 291 struct oxygen *chip = ctl->private_data; spdif_switch_put() local 294 mutex_lock(&chip->mutex); spdif_switch_put() 295 changed = value->value.integer.value[0] != chip->spdif_playback_enable; spdif_switch_put() 297 chip->spdif_playback_enable = !!value->value.integer.value[0]; spdif_switch_put() 298 spin_lock_irq(&chip->reg_lock); spdif_switch_put() 299 oxygen_update_spdif_source(chip); spdif_switch_put() 300 spin_unlock_irq(&chip->reg_lock); spdif_switch_put() 302 mutex_unlock(&chip->mutex); spdif_switch_put() 335 static inline void write_spdif_bits(struct oxygen *chip, u32 bits) write_spdif_bits() argument 337 oxygen_write32_masked(chip, OXYGEN_SPDIF_OUTPUT_BITS, bits, write_spdif_bits() 349 struct oxygen *chip = ctl->private_data; spdif_default_get() local 351 mutex_lock(&chip->mutex); spdif_default_get() 352 oxygen_to_iec958(chip->spdif_bits, value); spdif_default_get() 353 mutex_unlock(&chip->mutex); spdif_default_get() 360 struct oxygen *chip = ctl->private_data; spdif_default_put() local 365 mutex_lock(&chip->mutex); spdif_default_put() 366 changed = new_bits != chip->spdif_bits; spdif_default_put() 368 chip->spdif_bits = new_bits; spdif_default_put() 369 if (!(chip->pcm_active & (1 << PCM_SPDIF))) spdif_default_put() 370 write_spdif_bits(chip, new_bits); spdif_default_put() 372 mutex_unlock(&chip->mutex); spdif_default_put() 389 struct oxygen *chip = ctl->private_data; spdif_pcm_get() local 391 mutex_lock(&chip->mutex); spdif_pcm_get() 392 oxygen_to_iec958(chip->spdif_pcm_bits, value); spdif_pcm_get() 393 mutex_unlock(&chip->mutex); spdif_pcm_get() 400 struct oxygen *chip = ctl->private_data; spdif_pcm_put() local 405 mutex_lock(&chip->mutex); spdif_pcm_put() 406 changed = new_bits != chip->spdif_pcm_bits; spdif_pcm_put() 408 chip->spdif_pcm_bits = new_bits; spdif_pcm_put() 409 if (chip->pcm_active & (1 << PCM_SPDIF)) spdif_pcm_put() 410 write_spdif_bits(chip, new_bits); spdif_pcm_put() 412 mutex_unlock(&chip->mutex); spdif_pcm_put() 429 struct oxygen *chip = ctl->private_data; spdif_input_default_get() local 432 bits = oxygen_read32(chip, OXYGEN_SPDIF_INPUT_BITS); spdif_input_default_get() 443 struct oxygen *chip = ctl->private_data; spdif_bit_switch_get() local 447 !!(oxygen_read32(chip, OXYGEN_SPDIF_CONTROL) & bit); spdif_bit_switch_get() 454 struct oxygen *chip = ctl->private_data; spdif_bit_switch_put() local 459 spin_lock_irq(&chip->reg_lock); spdif_bit_switch_put() 460 oldreg = oxygen_read32(chip, OXYGEN_SPDIF_CONTROL); spdif_bit_switch_put() 467 oxygen_write32(chip, OXYGEN_SPDIF_CONTROL, newreg); spdif_bit_switch_put() 468 spin_unlock_irq(&chip->reg_lock); spdif_bit_switch_put() 485 struct oxygen *chip = ctl->private_data; monitor_get() local 490 !!invert ^ !!(oxygen_read8(chip, OXYGEN_ADC_MONITOR) & bit); monitor_get() 497 struct oxygen *chip = ctl->private_data; monitor_put() local 503 spin_lock_irq(&chip->reg_lock); monitor_put() 504 oldreg = oxygen_read8(chip, OXYGEN_ADC_MONITOR); monitor_put() 511 oxygen_write8(chip, OXYGEN_ADC_MONITOR, newreg); monitor_put() 512 spin_unlock_irq(&chip->reg_lock); monitor_put() 519 struct oxygen *chip = ctl->private_data; ac97_switch_get() local 526 mutex_lock(&chip->mutex); ac97_switch_get() 527 reg = oxygen_read_ac97(chip, codec, index); ac97_switch_get() 528 mutex_unlock(&chip->mutex); ac97_switch_get() 536 static void mute_ac97_ctl(struct oxygen *chip, unsigned int control) mute_ac97_ctl() argument 541 if (!chip->controls[control]) mute_ac97_ctl() 543 priv_idx = chip->controls[control]->private_value & 0xff; mute_ac97_ctl() 544 value = oxygen_read_ac97(chip, 0, priv_idx); mute_ac97_ctl() 546 oxygen_write_ac97(chip, 0, priv_idx, value | 0x8000); mute_ac97_ctl() 547 if (chip->model.ac97_switch) mute_ac97_ctl() 548 chip->model.ac97_switch(chip, priv_idx, 0x8000); mute_ac97_ctl() 549 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, mute_ac97_ctl() 550 &chip->controls[control]->id); mute_ac97_ctl() 557 struct oxygen *chip = ctl->private_data; ac97_switch_put() local 565 mutex_lock(&chip->mutex); ac97_switch_put() 566 oldreg = oxygen_read_ac97(chip, codec, index); ac97_switch_put() 574 oxygen_write_ac97(chip, codec, index, newreg); ac97_switch_put() 575 if (codec == 0 && chip->model.ac97_switch) ac97_switch_put() 576 chip->model.ac97_switch(chip, index, newreg & 0x8000); ac97_switch_put() 578 oxygen_write_ac97_masked(chip, 0, CM9780_GPIO_STATUS, ac97_switch_put() 582 mute_ac97_ctl(chip, CONTROL_MIC_CAPTURE_SWITCH); ac97_switch_put() 583 mute_ac97_ctl(chip, CONTROL_CD_CAPTURE_SWITCH); ac97_switch_put() 584 mute_ac97_ctl(chip, CONTROL_AUX_CAPTURE_SWITCH); ac97_switch_put() 589 mute_ac97_ctl(chip, CONTROL_LINE_CAPTURE_SWITCH); ac97_switch_put() 590 oxygen_write_ac97_masked(chip, 0, CM9780_GPIO_STATUS, ac97_switch_put() 594 mutex_unlock(&chip->mutex); ac97_switch_put() 613 struct oxygen *chip = ctl->private_data; ac97_volume_get() local 619 mutex_lock(&chip->mutex); ac97_volume_get() 620 reg = oxygen_read_ac97(chip, codec, index); ac97_volume_get() 621 mutex_unlock(&chip->mutex); ac97_volume_get() 634 struct oxygen *chip = ctl->private_data; ac97_volume_put() local 641 mutex_lock(&chip->mutex); ac97_volume_put() 642 oldreg = oxygen_read_ac97(chip, codec, index); ac97_volume_put() 653 oxygen_write_ac97(chip, codec, index, newreg); ac97_volume_put() 654 mutex_unlock(&chip->mutex); ac97_volume_put() 669 struct oxygen *chip = ctl->private_data; mic_fmic_source_get() local 671 mutex_lock(&chip->mutex); mic_fmic_source_get() 673 !!(oxygen_read_ac97(chip, 0, CM9780_JACK) & CM9780_FMIC2MIC); mic_fmic_source_get() 674 mutex_unlock(&chip->mutex); mic_fmic_source_get() 681 struct oxygen *chip = ctl->private_data; mic_fmic_source_put() local 685 mutex_lock(&chip->mutex); mic_fmic_source_put() 686 oldreg = oxygen_read_ac97(chip, 0, CM9780_JACK); mic_fmic_source_put() 693 oxygen_write_ac97(chip, 0, CM9780_JACK, newreg); mic_fmic_source_put() 694 mutex_unlock(&chip->mutex); mic_fmic_source_put() 711 struct oxygen *chip = ctl->private_data; ac97_fp_rec_volume_get() local 714 mutex_lock(&chip->mutex); ac97_fp_rec_volume_get() 715 reg = oxygen_read_ac97(chip, 1, AC97_REC_GAIN); ac97_fp_rec_volume_get() 716 mutex_unlock(&chip->mutex); ac97_fp_rec_volume_get() 725 struct oxygen *chip = ctl->private_data; ac97_fp_rec_volume_put() local 729 mutex_lock(&chip->mutex); ac97_fp_rec_volume_put() 730 oldreg = oxygen_read_ac97(chip, 1, AC97_REC_GAIN); ac97_fp_rec_volume_put() 736 oxygen_write_ac97(chip, 1, AC97_REC_GAIN, newreg); ac97_fp_rec_volume_put() 737 mutex_unlock(&chip->mutex); ac97_fp_rec_volume_put() 1033 struct oxygen *chip = ctl->private_data; oxygen_any_ctl_free() local 1037 for (i = 0; i < ARRAY_SIZE(chip->controls); ++i) oxygen_any_ctl_free() 1038 chip->controls[i] = NULL; oxygen_any_ctl_free() 1041 static int add_controls(struct oxygen *chip, add_controls() argument 1062 if (chip->model.control_filter) { add_controls() 1063 err = chip->model.control_filter(&template); add_controls() 1070 chip->model.dac_channels_pcm == 2) add_controls() 1073 !(chip->model.device_config & AC97_FMIC_SWITCH)) add_controls() 1076 !(chip->model.device_config & AC97_CD_INPUT)) add_controls() 1079 chip->model.dac_tlv) { add_controls() 1080 template.tlv.p = chip->model.dac_tlv; add_controls() 1083 ctl = snd_ctl_new1(&template, chip); add_controls() 1086 err = snd_ctl_add(chip->card, ctl); add_controls() 1091 chip->controls[j] = ctl; add_controls() 1098 int oxygen_mixer_init(struct oxygen *chip) oxygen_mixer_init() argument 1103 err = add_controls(chip, controls, ARRAY_SIZE(controls)); oxygen_mixer_init() 1106 if (chip->model.device_config & PLAYBACK_1_TO_SPDIF) { oxygen_mixer_init() 1107 err = add_controls(chip, spdif_output_controls, oxygen_mixer_init() 1112 if (chip->model.device_config & CAPTURE_1_FROM_SPDIF) { oxygen_mixer_init() 1113 err = add_controls(chip, spdif_input_controls, oxygen_mixer_init() 1119 if (!(chip->model.device_config & monitor_controls[i].pcm_dev)) oxygen_mixer_init() 1121 err = add_controls(chip, monitor_controls[i].controls, oxygen_mixer_init() 1126 if (chip->has_ac97_0) { oxygen_mixer_init() 1127 err = add_controls(chip, ac97_controls, oxygen_mixer_init() 1132 if (chip->has_ac97_1) { oxygen_mixer_init() 1133 err = add_controls(chip, ac97_fp_controls, oxygen_mixer_init() 1138 return chip->model.mixer_init ? chip->model.mixer_init(chip) : 0; oxygen_mixer_init()
/linux-4.1.27/drivers/input/misc/
H A D	max8997_haptic.c	70 static int max8997_haptic_set_duty_cycle(struct max8997_haptic *chip) max8997_haptic_set_duty_cycle() argument 74 if (chip->mode == MAX8997_EXTERNAL_MODE) { max8997_haptic_set_duty_cycle() 75 unsigned int duty = chip->pwm_period * chip->level / 100; max8997_haptic_set_duty_cycle() 76 ret = pwm_config(chip->pwm, duty, chip->pwm_period); max8997_haptic_set_duty_cycle() 82 if (chip->level <= i * 100 / 64) { max8997_haptic_set_duty_cycle() 87 switch (chip->internal_mode_pattern) { max8997_haptic_set_duty_cycle() 89 max8997_write_reg(chip->client, max8997_haptic_set_duty_cycle() 93 max8997_write_reg(chip->client, max8997_haptic_set_duty_cycle() 97 max8997_write_reg(chip->client, max8997_haptic_set_duty_cycle() 101 max8997_write_reg(chip->client, max8997_haptic_set_duty_cycle() 111 static void max8997_haptic_configure(struct max8997_haptic *chip) max8997_haptic_configure() argument 115 value = chip->type << MAX8997_MOTOR_TYPE_SHIFT | max8997_haptic_configure() 116 chip->enabled << MAX8997_ENABLE_SHIFT | max8997_haptic_configure() 117 chip->mode << MAX8997_MODE_SHIFT | chip->pwm_divisor; max8997_haptic_configure() 118 max8997_write_reg(chip->client, MAX8997_HAPTIC_REG_CONF2, value); max8997_haptic_configure() 120 if (chip->mode == MAX8997_INTERNAL_MODE && chip->enabled) { max8997_haptic_configure() 121 value = chip->internal_mode_pattern << MAX8997_CYCLE_SHIFT | max8997_haptic_configure() 122 chip->internal_mode_pattern << MAX8997_SIG_PERIOD_SHIFT | max8997_haptic_configure() 123 chip->internal_mode_pattern << MAX8997_SIG_DUTY_SHIFT | max8997_haptic_configure() 124 chip->internal_mode_pattern << MAX8997_PWM_DUTY_SHIFT; max8997_haptic_configure() 125 max8997_write_reg(chip->client, max8997_haptic_configure() 128 switch (chip->internal_mode_pattern) { max8997_haptic_configure() 130 value = chip->pattern_cycle << 4; max8997_haptic_configure() 131 max8997_write_reg(chip->client, max8997_haptic_configure() 133 value = chip->pattern_signal_period; max8997_haptic_configure() 134 max8997_write_reg(chip->client, max8997_haptic_configure() 139 value = chip->pattern_cycle; max8997_haptic_configure() 140 max8997_write_reg(chip->client, max8997_haptic_configure() 142 value = chip->pattern_signal_period; max8997_haptic_configure() 143 max8997_write_reg(chip->client, max8997_haptic_configure() 148 value = chip->pattern_cycle << 4; max8997_haptic_configure() 149 max8997_write_reg(chip->client, max8997_haptic_configure() 151 value = chip->pattern_signal_period; max8997_haptic_configure() 152 max8997_write_reg(chip->client, max8997_haptic_configure() 157 value = chip->pattern_cycle; max8997_haptic_configure() 158 max8997_write_reg(chip->client, max8997_haptic_configure() 160 value = chip->pattern_signal_period; max8997_haptic_configure() 161 max8997_write_reg(chip->client, max8997_haptic_configure() 171 static void max8997_haptic_enable(struct max8997_haptic *chip) max8997_haptic_enable() argument 175 mutex_lock(&chip->mutex); max8997_haptic_enable() 177 error = max8997_haptic_set_duty_cycle(chip); max8997_haptic_enable() 179 dev_err(chip->dev, "set_pwm_cycle failed, error: %d\n", error); max8997_haptic_enable() 183 if (!chip->enabled) { max8997_haptic_enable() 184 error = regulator_enable(chip->regulator); max8997_haptic_enable() 186 dev_err(chip->dev, "Failed to enable regulator\n"); max8997_haptic_enable() 189 max8997_haptic_configure(chip); max8997_haptic_enable() 190 if (chip->mode == MAX8997_EXTERNAL_MODE) { max8997_haptic_enable() 191 error = pwm_enable(chip->pwm); max8997_haptic_enable() 193 dev_err(chip->dev, "Failed to enable PWM\n"); max8997_haptic_enable() 194 regulator_disable(chip->regulator); max8997_haptic_enable() 198 chip->enabled = true; max8997_haptic_enable() 202 mutex_unlock(&chip->mutex); max8997_haptic_enable() 205 static void max8997_haptic_disable(struct max8997_haptic *chip) max8997_haptic_disable() argument 207 mutex_lock(&chip->mutex); max8997_haptic_disable() 209 if (chip->enabled) { max8997_haptic_disable() 210 chip->enabled = false; max8997_haptic_disable() 211 max8997_haptic_configure(chip); max8997_haptic_disable() 212 if (chip->mode == MAX8997_EXTERNAL_MODE) max8997_haptic_disable() 213 pwm_disable(chip->pwm); max8997_haptic_disable() 214 regulator_disable(chip->regulator); max8997_haptic_disable() 217 mutex_unlock(&chip->mutex); max8997_haptic_disable() 222 struct max8997_haptic *chip = max8997_haptic_play_effect_work() local 225 if (chip->level) max8997_haptic_play_effect_work() 226 max8997_haptic_enable(chip); max8997_haptic_play_effect_work() 228 max8997_haptic_disable(chip); max8997_haptic_play_effect_work() 234 struct max8997_haptic *chip = input_get_drvdata(dev); max8997_haptic_play_effect() local 236 chip->level = effect->u.rumble.strong_magnitude; max8997_haptic_play_effect() 237 if (!chip->level) max8997_haptic_play_effect() 238 chip->level = effect->u.rumble.weak_magnitude; max8997_haptic_play_effect() 240 schedule_work(&chip->work); max8997_haptic_play_effect() 247 struct max8997_haptic *chip = input_get_drvdata(dev); max8997_haptic_close() local 249 cancel_work_sync(&chip->work); max8997_haptic_close() 250 max8997_haptic_disable(chip); max8997_haptic_close() 259 struct max8997_haptic *chip; max8997_haptic_probe() local 271 chip = kzalloc(sizeof(struct max8997_haptic), GFP_KERNEL); max8997_haptic_probe() 273 if (!chip || !input_dev) { max8997_haptic_probe() 279 INIT_WORK(&chip->work, max8997_haptic_play_effect_work); max8997_haptic_probe() 280 mutex_init(&chip->mutex); max8997_haptic_probe() 282 chip->client = iodev->haptic; max8997_haptic_probe() 283 chip->dev = &pdev->dev; max8997_haptic_probe() 284 chip->input_dev = input_dev; max8997_haptic_probe() 285 chip->pwm_period = haptic_pdata->pwm_period; max8997_haptic_probe() 286 chip->type = haptic_pdata->type; max8997_haptic_probe() 287 chip->mode = haptic_pdata->mode; max8997_haptic_probe() 288 chip->pwm_divisor = haptic_pdata->pwm_divisor; max8997_haptic_probe() 290 switch (chip->mode) { max8997_haptic_probe() 292 chip->internal_mode_pattern = max8997_haptic_probe() 294 chip->pattern_cycle = haptic_pdata->pattern_cycle; max8997_haptic_probe() 295 chip->pattern_signal_period = max8997_haptic_probe() 300 chip->pwm = pwm_request(haptic_pdata->pwm_channel_id, max8997_haptic_probe() 302 if (IS_ERR(chip->pwm)) { max8997_haptic_probe() 303 error = PTR_ERR(chip->pwm); max8997_haptic_probe() 313 "Invalid chip mode specified (%d)\n", chip->mode); max8997_haptic_probe() 318 chip->regulator = regulator_get(&pdev->dev, "inmotor"); max8997_haptic_probe() 319 if (IS_ERR(chip->regulator)) { max8997_haptic_probe() 320 error = PTR_ERR(chip->regulator); max8997_haptic_probe() 331 input_set_drvdata(input_dev, chip); max8997_haptic_probe() 351 platform_set_drvdata(pdev, chip); max8997_haptic_probe() 357 regulator_put(chip->regulator); max8997_haptic_probe() 359 if (chip->mode == MAX8997_EXTERNAL_MODE) max8997_haptic_probe() 360 pwm_free(chip->pwm); max8997_haptic_probe() 363 kfree(chip); max8997_haptic_probe() 370 struct max8997_haptic *chip = platform_get_drvdata(pdev); max8997_haptic_remove() local 372 input_unregister_device(chip->input_dev); max8997_haptic_remove() 373 regulator_put(chip->regulator); max8997_haptic_remove() 375 if (chip->mode == MAX8997_EXTERNAL_MODE) max8997_haptic_remove() 376 pwm_free(chip->pwm); max8997_haptic_remove() 378 kfree(chip); max8997_haptic_remove() 386 struct max8997_haptic *chip = platform_get_drvdata(pdev); max8997_haptic_suspend() local 388 max8997_haptic_disable(chip); max8997_haptic_suspend()
H A D	ad714x-spi.c	31 static int ad714x_spi_read(struct ad714x_chip *chip, ad714x_spi_read() argument 34 struct spi_device *spi = to_spi_device(chip->dev); ad714x_spi_read() 43 chip->xfer_buf[0] = cpu_to_be16(AD714x_SPI_CMD_PREFIX | ad714x_spi_read() 45 xfer[0].tx_buf = &chip->xfer_buf[0]; ad714x_spi_read() 46 xfer[0].len = sizeof(chip->xfer_buf[0]); ad714x_spi_read() 49 xfer[1].rx_buf = &chip->xfer_buf[1]; ad714x_spi_read() 50 xfer[1].len = sizeof(chip->xfer_buf[1]) * len; ad714x_spi_read() 55 dev_err(chip->dev, "SPI read error: %d\n", error); ad714x_spi_read() 60 data[i] = be16_to_cpu(chip->xfer_buf[i + 1]); ad714x_spi_read() 65 static int ad714x_spi_write(struct ad714x_chip *chip, ad714x_spi_write() argument 68 struct spi_device *spi = to_spi_device(chip->dev); ad714x_spi_write() 71 chip->xfer_buf[0] = cpu_to_be16(AD714x_SPI_CMD_PREFIX | reg); ad714x_spi_write() 72 chip->xfer_buf[1] = cpu_to_be16(data); ad714x_spi_write() 74 error = spi_write(spi, (u8 *)chip->xfer_buf, ad714x_spi_write() 75 2 * sizeof(*chip->xfer_buf)); ad714x_spi_write() 77 dev_err(chip->dev, "SPI write error: %d\n", error); ad714x_spi_write() 86 struct ad714x_chip *chip; ad714x_spi_probe() local 94 chip = ad714x_probe(&spi->dev, BUS_SPI, spi->irq, ad714x_spi_probe() 96 if (IS_ERR(chip)) ad714x_spi_probe() 97 return PTR_ERR(chip); ad714x_spi_probe() 99 spi_set_drvdata(spi, chip); ad714x_spi_probe() 106 struct ad714x_chip *chip = spi_get_drvdata(spi); ad714x_spi_remove() local 108 ad714x_remove(chip); ad714x_spi_remove()
H A D	ad714x-i2c.c	28 static int ad714x_i2c_write(struct ad714x_chip *chip, ad714x_i2c_write() argument 31 struct i2c_client *client = to_i2c_client(chip->dev); ad714x_i2c_write() 34 chip->xfer_buf[0] = cpu_to_be16(reg); ad714x_i2c_write() 35 chip->xfer_buf[1] = cpu_to_be16(data); ad714x_i2c_write() 37 error = i2c_master_send(client, (u8 *)chip->xfer_buf, ad714x_i2c_write() 38 2 * sizeof(*chip->xfer_buf)); ad714x_i2c_write() 47 static int ad714x_i2c_read(struct ad714x_chip *chip, ad714x_i2c_read() argument 50 struct i2c_client *client = to_i2c_client(chip->dev); ad714x_i2c_read() 54 chip->xfer_buf[0] = cpu_to_be16(reg); ad714x_i2c_read() 56 error = i2c_master_send(client, (u8 *)chip->xfer_buf, ad714x_i2c_read() 57 sizeof(*chip->xfer_buf)); ad714x_i2c_read() 59 error = i2c_master_recv(client, (u8 *)chip->xfer_buf, ad714x_i2c_read() 60 len * sizeof(*chip->xfer_buf)); ad714x_i2c_read() 68 data[i] = be16_to_cpu(chip->xfer_buf[i]); ad714x_i2c_read() 76 struct ad714x_chip *chip; ad714x_i2c_probe() local 78 chip = ad714x_probe(&client->dev, BUS_I2C, client->irq, ad714x_i2c_probe() 80 if (IS_ERR(chip)) ad714x_i2c_probe() 81 return PTR_ERR(chip); ad714x_i2c_probe() 83 i2c_set_clientdata(client, chip); ad714x_i2c_probe() 90 struct ad714x_chip *chip = i2c_get_clientdata(client); ad714x_i2c_remove() local 92 ad714x_remove(chip); ad714x_i2c_remove()
/linux-4.1.27/sound/pci/lola/
H A D	lola.c	87 static int corb_send_verb(struct lola *chip, unsigned int nid, corb_send_verb() argument 94 chip->last_cmd_nid = nid; corb_send_verb() 95 chip->last_verb = verb; corb_send_verb() 96 chip->last_data = data; corb_send_verb() 97 chip->last_extdata = extdata; corb_send_verb() 100 spin_lock_irqsave(&chip->reg_lock, flags); corb_send_verb() 101 if (chip->rirb.cmds < LOLA_CORB_ENTRIES - 1) { corb_send_verb() 102 unsigned int wp = chip->corb.wp + 1; corb_send_verb() 104 chip->corb.wp = wp; corb_send_verb() 105 chip->corb.buf[wp * 2] = cpu_to_le32(data); corb_send_verb() 106 chip->corb.buf[wp * 2 + 1] = cpu_to_le32(extdata); corb_send_verb() 107 lola_writew(chip, BAR0, CORBWP, wp); corb_send_verb() 108 chip->rirb.cmds++; corb_send_verb() 112 spin_unlock_irqrestore(&chip->reg_lock, flags); corb_send_verb() 116 static void lola_queue_unsol_event(struct lola *chip, unsigned int res, lola_queue_unsol_event() argument 119 lola_update_ext_clock_freq(chip, res); lola_queue_unsol_event() 123 static void lola_update_rirb(struct lola *chip) lola_update_rirb() argument 128 wp = lola_readw(chip, BAR0, RIRBWP); lola_update_rirb() 129 if (wp == chip->rirb.wp) lola_update_rirb() 131 chip->rirb.wp = wp; lola_update_rirb() 133 while (chip->rirb.rp != wp) { lola_update_rirb() 134 chip->rirb.rp++; lola_update_rirb() 135 chip->rirb.rp %= LOLA_CORB_ENTRIES; lola_update_rirb() 137 rp = chip->rirb.rp << 1; /* an RIRB entry is 8-bytes */ lola_update_rirb() 138 res_ex = le32_to_cpu(chip->rirb.buf[rp + 1]); lola_update_rirb() 139 res = le32_to_cpu(chip->rirb.buf[rp]); lola_update_rirb() 141 lola_queue_unsol_event(chip, res, res_ex); lola_update_rirb() 142 else if (chip->rirb.cmds) { lola_update_rirb() 143 chip->res = res; lola_update_rirb() 144 chip->res_ex = res_ex; lola_update_rirb() 146 chip->rirb.cmds--; lola_update_rirb() 151 static int rirb_get_response(struct lola *chip, unsigned int *val, rirb_get_response() argument 159 if (chip->polling_mode) { rirb_get_response() 160 spin_lock_irq(&chip->reg_lock); rirb_get_response() 161 lola_update_rirb(chip); rirb_get_response() 162 spin_unlock_irq(&chip->reg_lock); rirb_get_response() 164 if (!chip->rirb.cmds) { rirb_get_response() 165 *val = chip->res; rirb_get_response() 167 *extval = chip->res_ex; rirb_get_response() 169 chip->res, chip->res_ex); rirb_get_response() 170 if (chip->res_ex & LOLA_RIRB_EX_ERROR) { rirb_get_response() 171 dev_warn(chip->card->dev, "RIRB ERROR: " rirb_get_response() 173 chip->last_cmd_nid, rirb_get_response() 174 chip->last_verb, chip->last_data, rirb_get_response() 175 chip->last_extdata); rirb_get_response() 185 dev_warn(chip->card->dev, "RIRB response error\n"); rirb_get_response() 186 if (!chip->polling_mode) { rirb_get_response() 187 dev_warn(chip->card->dev, "switching to polling mode\n"); rirb_get_response() 188 chip->polling_mode = 1; rirb_get_response() 195 int lola_codec_write(struct lola *chip, unsigned int nid, unsigned int verb, lola_codec_write() argument 200 return corb_send_verb(chip, nid, verb, data, extdata); lola_codec_write() 204 int lola_codec_read(struct lola *chip, unsigned int nid, unsigned int verb, lola_codec_read() argument 212 err = corb_send_verb(chip, nid, verb, data, extdata); lola_codec_read() 215 err = rirb_get_response(chip, val, extval); lola_codec_read() 220 int lola_codec_flush(struct lola *chip) lola_codec_flush() argument 223 return rirb_get_response(chip, &tmp, NULL); lola_codec_flush() 231 struct lola *chip = dev_id; lola_interrupt() local 237 spin_lock(&chip->reg_lock); lola_interrupt() 242 status = lola_readl(chip, BAR1, DINTSTS); lola_interrupt() 246 in_sts = lola_readl(chip, BAR1, DIINTSTS); lola_interrupt() 247 out_sts = lola_readl(chip, BAR1, DOINTSTS); lola_interrupt() 250 for (i = 0; in_sts && i < chip->pcm[CAPT].num_streams; i++) { lola_interrupt() 254 reg = lola_dsd_read(chip, i, STS); lola_interrupt() 260 lola_dsd_write(chip, i, STS, reg); lola_interrupt() 264 for (i = 0; out_sts && i < chip->pcm[PLAY].num_streams; i++) { lola_interrupt() 268 reg = lola_dsd_read(chip, i + MAX_STREAM_IN_COUNT, STS); lola_interrupt() 273 lola_dsd_write(chip, i + MAX_STREAM_IN_COUNT, STS, reg); lola_interrupt() 278 rbsts = lola_readb(chip, BAR0, RIRBSTS); lola_interrupt() 281 lola_writeb(chip, BAR0, RIRBSTS, rbsts); lola_interrupt() 282 rbsts = lola_readb(chip, BAR0, CORBSTS); lola_interrupt() 285 lola_writeb(chip, BAR0, CORBSTS, rbsts); lola_interrupt() 287 lola_update_rirb(chip); lola_interrupt() 292 lola_writel(chip, BAR1, DINTSTS, lola_interrupt() 297 spin_unlock(&chip->reg_lock); lola_interrupt() 299 lola_pcm_update(chip, &chip->pcm[CAPT], notify_ins); lola_interrupt() 300 lola_pcm_update(chip, &chip->pcm[PLAY], notify_outs); lola_interrupt() 309 static int reset_controller(struct lola *chip) reset_controller() argument 311 unsigned int gctl = lola_readl(chip, BAR0, GCTL); reset_controller() 316 lola_writel(chip, BAR1, BOARD_MODE, 0); reset_controller() 320 chip->cold_reset = 1; reset_controller() 321 lola_writel(chip, BAR0, GCTL, LOLA_GCTL_RESET); reset_controller() 325 gctl = lola_readl(chip, BAR0, GCTL); reset_controller() 330 dev_err(chip->card->dev, "cannot reset controller\n"); reset_controller() 336 static void lola_irq_enable(struct lola *chip) lola_irq_enable() argument 341 val = (1 << chip->pcm[PLAY].num_streams) - 1; lola_irq_enable() 342 lola_writel(chip, BAR1, DOINTCTL, val); lola_irq_enable() 343 val = (1 << chip->pcm[CAPT].num_streams) - 1; lola_irq_enable() 344 lola_writel(chip, BAR1, DIINTCTL, val); lola_irq_enable() 349 lola_writel(chip, BAR1, DINTCTL, val); lola_irq_enable() 352 static void lola_irq_disable(struct lola *chip) lola_irq_disable() argument 354 lola_writel(chip, BAR1, DINTCTL, 0); lola_irq_disable() 355 lola_writel(chip, BAR1, DIINTCTL, 0); lola_irq_disable() 356 lola_writel(chip, BAR1, DOINTCTL, 0); lola_irq_disable() 359 static int setup_corb_rirb(struct lola *chip) setup_corb_rirb() argument 366 snd_dma_pci_data(chip->pci), setup_corb_rirb() 367 PAGE_SIZE, &chip->rb); setup_corb_rirb() 371 chip->corb.addr = chip->rb.addr; setup_corb_rirb() 372 chip->corb.buf = (u32 *)chip->rb.area; setup_corb_rirb() 373 chip->rirb.addr = chip->rb.addr + 2048; setup_corb_rirb() 374 chip->rirb.buf = (u32 *)(chip->rb.area + 2048); setup_corb_rirb() 377 lola_writeb(chip, BAR0, RIRBCTL, 0); setup_corb_rirb() 378 lola_writeb(chip, BAR0, CORBCTL, 0); setup_corb_rirb() 382 if (!lola_readb(chip, BAR0, RIRBCTL) && setup_corb_rirb() 383 !lola_readb(chip, BAR0, CORBCTL)) setup_corb_rirb() 389 lola_writel(chip, BAR0, CORBLBASE, (u32)chip->corb.addr); setup_corb_rirb() 390 lola_writel(chip, BAR0, CORBUBASE, upper_32_bits(chip->corb.addr)); setup_corb_rirb() 392 lola_writeb(chip, BAR0, CORBSIZE, 0x02); setup_corb_rirb() 394 lola_writew(chip, BAR0, CORBWP, 0); setup_corb_rirb() 396 lola_writew(chip, BAR0, CORBRP, LOLA_RBRWP_CLR); setup_corb_rirb() 398 lola_writeb(chip, BAR0, CORBCTL, LOLA_RBCTL_DMA_EN); setup_corb_rirb() 400 tmp = lola_readb(chip, BAR0, CORBSTS) & LOLA_CORB_INT_MASK; setup_corb_rirb() 402 lola_writeb(chip, BAR0, CORBSTS, tmp); setup_corb_rirb() 403 chip->corb.wp = 0; setup_corb_rirb() 406 lola_writel(chip, BAR0, RIRBLBASE, (u32)chip->rirb.addr); setup_corb_rirb() 407 lola_writel(chip, BAR0, RIRBUBASE, upper_32_bits(chip->rirb.addr)); setup_corb_rirb() 409 lola_writeb(chip, BAR0, RIRBSIZE, 0x02); setup_corb_rirb() 411 lola_writew(chip, BAR0, RIRBWP, LOLA_RBRWP_CLR); setup_corb_rirb() 413 lola_writew(chip, BAR0, RINTCNT, 1); setup_corb_rirb() 415 lola_writeb(chip, BAR0, RIRBCTL, LOLA_RBCTL_DMA_EN | LOLA_RBCTL_IRQ_EN); setup_corb_rirb() 417 tmp = lola_readb(chip, BAR0, RIRBSTS) & LOLA_RIRB_INT_MASK; setup_corb_rirb() 419 lola_writeb(chip, BAR0, RIRBSTS, tmp); setup_corb_rirb() 420 chip->rirb.rp = chip->rirb.cmds = 0; setup_corb_rirb() 425 static void stop_corb_rirb(struct lola *chip) stop_corb_rirb() argument 428 lola_writeb(chip, BAR0, RIRBCTL, 0); stop_corb_rirb() 429 lola_writeb(chip, BAR0, CORBCTL, 0); stop_corb_rirb() 432 static void lola_reset_setups(struct lola *chip) lola_reset_setups() argument 435 lola_set_granularity(chip, chip->granularity, true); lola_reset_setups() 437 lola_set_clock_index(chip, chip->clock.cur_index); lola_reset_setups() 439 lola_enable_clock_events(chip); lola_reset_setups() 441 lola_setup_all_analog_gains(chip, CAPT, false); /* input, update */ lola_reset_setups() 443 lola_set_src_config(chip, chip->input_src_mask, false); lola_reset_setups() 445 lola_setup_all_analog_gains(chip, PLAY, false); /* output, update */ lola_reset_setups() 448 static int lola_parse_tree(struct lola *chip) lola_parse_tree() argument 453 err = lola_read_param(chip, 0, LOLA_PAR_VENDOR_ID, &val); lola_parse_tree() 455 dev_err(chip->card->dev, "Can't read VENDOR_ID\n"); lola_parse_tree() 460 dev_err(chip->card->dev, "Unknown codec vendor 0x%x\n", val); lola_parse_tree() 464 err = lola_read_param(chip, 1, LOLA_PAR_FUNCTION_TYPE, &val); lola_parse_tree() 466 dev_err(chip->card->dev, "Can't read FUNCTION_TYPE\n"); lola_parse_tree() 470 dev_err(chip->card->dev, "Unknown function type %d\n", val); lola_parse_tree() 474 err = lola_read_param(chip, 1, LOLA_PAR_SPECIFIC_CAPS, &val); lola_parse_tree() 476 dev_err(chip->card->dev, "Can't read SPECCAPS\n"); lola_parse_tree() 479 chip->lola_caps = val; lola_parse_tree() 480 chip->pin[CAPT].num_pins = LOLA_AFG_INPUT_PIN_COUNT(chip->lola_caps); lola_parse_tree() 481 chip->pin[PLAY].num_pins = LOLA_AFG_OUTPUT_PIN_COUNT(chip->lola_caps); lola_parse_tree() 482 dev_dbg(chip->card->dev, "speccaps=0x%x, pins in=%d, out=%d\n", lola_parse_tree() 483 chip->lola_caps, lola_parse_tree() 484 chip->pin[CAPT].num_pins, chip->pin[PLAY].num_pins); lola_parse_tree() 486 if (chip->pin[CAPT].num_pins > MAX_AUDIO_INOUT_COUNT || lola_parse_tree() 487 chip->pin[PLAY].num_pins > MAX_AUDIO_INOUT_COUNT) { lola_parse_tree() 488 dev_err(chip->card->dev, "Invalid Lola-spec caps 0x%x\n", val); lola_parse_tree() 493 err = lola_init_pcm(chip, CAPT, &nid); lola_parse_tree() 496 err = lola_init_pcm(chip, PLAY, &nid); lola_parse_tree() 500 err = lola_init_pins(chip, CAPT, &nid); lola_parse_tree() 503 err = lola_init_pins(chip, PLAY, &nid); lola_parse_tree() 507 if (LOLA_AFG_CLOCK_WIDGET_PRESENT(chip->lola_caps)) { lola_parse_tree() 508 err = lola_init_clock_widget(chip, nid); lola_parse_tree() 513 if (LOLA_AFG_MIXER_WIDGET_PRESENT(chip->lola_caps)) { lola_parse_tree() 514 err = lola_init_mixer_widget(chip, nid); lola_parse_tree() 521 err = lola_enable_clock_events(chip); lola_parse_tree() 528 if (!chip->cold_reset) { lola_parse_tree() 529 lola_reset_setups(chip); lola_parse_tree() 530 chip->cold_reset = 1; lola_parse_tree() 533 if (chip->granularity != LOLA_GRANULARITY_MIN) lola_parse_tree() 534 lola_set_granularity(chip, chip->granularity, true); lola_parse_tree() 540 static void lola_stop_hw(struct lola *chip) lola_stop_hw() argument 542 stop_corb_rirb(chip); lola_stop_hw() 543 lola_irq_disable(chip); lola_stop_hw() 546 static void lola_free(struct lola *chip) lola_free() argument 548 if (chip->initialized) lola_free() 549 lola_stop_hw(chip); lola_free() 550 lola_free_pcm(chip); lola_free() 551 lola_free_mixer(chip); lola_free() 552 if (chip->irq >= 0) lola_free() 553 free_irq(chip->irq, (void *)chip); lola_free() 554 iounmap(chip->bar[0].remap_addr); lola_free() 555 iounmap(chip->bar[1].remap_addr); lola_free() 556 if (chip->rb.area) lola_free() 557 snd_dma_free_pages(&chip->rb); lola_free() 558 pci_release_regions(chip->pci); lola_free() 559 pci_disable_device(chip->pci); lola_free() 560 kfree(chip); lola_free() 572 struct lola *chip; lola_create() local 585 chip = kzalloc(sizeof(*chip), GFP_KERNEL); lola_create() 586 if (!chip) { lola_create() 591 spin_lock_init(&chip->reg_lock); lola_create() 592 mutex_init(&chip->open_mutex); lola_create() 593 chip->card = card; lola_create() 594 chip->pci = pci; lola_create() 595 chip->irq = -1; lola_create() 597 chip->granularity = granularity[dev]; lola_create() 598 switch (chip->granularity) { lola_create() 600 chip->sample_rate_max = 48000; lola_create() 603 chip->sample_rate_max = 96000; lola_create() 606 chip->sample_rate_max = 192000; lola_create() 609 dev_warn(chip->card->dev, lola_create() 611 chip->granularity, LOLA_GRANULARITY_MAX); lola_create() 612 chip->granularity = LOLA_GRANULARITY_MAX; lola_create() 613 chip->sample_rate_max = 192000; lola_create() 616 chip->sample_rate_min = sample_rate_min[dev]; lola_create() 617 if (chip->sample_rate_min > chip->sample_rate_max) { lola_create() 618 dev_warn(chip->card->dev, lola_create() 620 chip->sample_rate_min); lola_create() 621 chip->sample_rate_min = 16000; lola_create() 626 kfree(chip); lola_create() 631 chip->bar[0].addr = pci_resource_start(pci, 0); lola_create() 632 chip->bar[0].remap_addr = pci_ioremap_bar(pci, 0); lola_create() 633 chip->bar[1].addr = pci_resource_start(pci, 2); lola_create() 634 chip->bar[1].remap_addr = pci_ioremap_bar(pci, 2); lola_create() 635 if (!chip->bar[0].remap_addr || !chip->bar[1].remap_addr) { lola_create() 636 dev_err(chip->card->dev, "ioremap error\n"); lola_create() 643 err = reset_controller(chip); lola_create() 648 KBUILD_MODNAME, chip)) { lola_create() 649 dev_err(chip->card->dev, "unable to grab IRQ %d\n", pci->irq); lola_create() 653 chip->irq = pci->irq; lola_create() 654 synchronize_irq(chip->irq); lola_create() 656 dever = lola_readl(chip, BAR1, DEVER); lola_create() 657 chip->pcm[CAPT].num_streams = (dever >> 0) & 0x3ff; lola_create() 658 chip->pcm[PLAY].num_streams = (dever >> 10) & 0x3ff; lola_create() 659 chip->version = (dever >> 24) & 0xff; lola_create() 660 dev_dbg(chip->card->dev, "streams in=%d, out=%d, version=0x%x\n", lola_create() 661 chip->pcm[CAPT].num_streams, chip->pcm[PLAY].num_streams, lola_create() 662 chip->version); lola_create() 665 if (chip->pcm[CAPT].num_streams > MAX_STREAM_IN_COUNT || lola_create() 666 chip->pcm[PLAY].num_streams > MAX_STREAM_OUT_COUNT || lola_create() 667 (!chip->pcm[CAPT].num_streams && lola_create() 668 !chip->pcm[PLAY].num_streams)) { lola_create() 669 dev_err(chip->card->dev, "invalid DEVER = %x\n", dever); lola_create() 674 err = setup_corb_rirb(chip); lola_create() 678 err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops); lola_create() 680 dev_err(chip->card->dev, "Error creating device [card]!\n"); lola_create() 688 card->shortname, chip->bar[0].addr, chip->irq); lola_create() 691 lola_irq_enable(chip); lola_create() 693 chip->initialized = 1; lola_create() 694 *rchip = chip; lola_create() 698 lola_free(chip); lola_create() 707 struct lola *chip; lola_probe() local 724 err = lola_create(card, pci, dev, &chip); lola_probe() 727 card->private_data = chip; lola_probe() 729 err = lola_parse_tree(chip); lola_probe() 733 err = lola_create_pcm(chip); lola_probe() 737 err = lola_create_mixer(chip); lola_probe() 741 lola_proc_debug_new(chip); lola_probe()
H A D	lola_mixer.c	31 static int lola_init_pin(struct lola *chip, struct lola_pin *pin, lola_init_pin() argument 38 err = lola_read_param(chip, nid, LOLA_PAR_AUDIO_WIDGET_CAP, &val); lola_init_pin() 40 dev_err(chip->card->dev, "Can't read wcaps for 0x%x\n", nid); lola_init_pin() 51 dev_err(chip->card->dev, "Invalid wcaps 0x%x for 0x%x\n", val, nid); lola_init_pin() 61 err = lola_read_param(chip, nid, LOLA_PAR_AMP_OUT_CAP, &val); lola_init_pin() 63 err = lola_read_param(chip, nid, LOLA_PAR_AMP_IN_CAP, &val); lola_init_pin() 65 dev_err(chip->card->dev, "Can't read AMP-caps for 0x%x\n", nid); lola_init_pin() 79 err = lola_codec_read(chip, nid, LOLA_VERB_GET_MAX_LEVEL, 0, 0, &val, lola_init_pin() 82 dev_err(chip->card->dev, "Can't get MAX_LEVEL 0x%x\n", nid); lola_init_pin() 94 int lola_init_pins(struct lola *chip, int dir, int *nidp) lola_init_pins() argument 98 for (i = 0; i < chip->pin[dir].num_pins; i++, nid++) { lola_init_pins() 99 err = lola_init_pin(chip, &chip->pin[dir].pins[i], dir, nid); lola_init_pins() 102 if (chip->pin[dir].pins[i].is_analog) lola_init_pins() 103 chip->pin[dir].num_analog_pins++; lola_init_pins() 109 void lola_free_mixer(struct lola *chip) lola_free_mixer() argument 111 vfree(chip->mixer.array_saved); lola_free_mixer() 114 int lola_init_mixer_widget(struct lola *chip, int nid) lola_init_mixer_widget() argument 119 err = lola_read_param(chip, nid, LOLA_PAR_AUDIO_WIDGET_CAP, &val); lola_init_mixer_widget() 121 dev_err(chip->card->dev, "Can't read wcaps for 0x%x\n", nid); lola_init_mixer_widget() 126 dev_dbg(chip->card->dev, "No valid mixer widget\n"); lola_init_mixer_widget() 130 chip->mixer.nid = nid; lola_init_mixer_widget() 131 chip->mixer.caps = val; lola_init_mixer_widget() 132 chip->mixer.array = (struct lola_mixer_array __iomem *) lola_init_mixer_widget() 133 (chip->bar[BAR1].remap_addr + LOLA_BAR1_SOURCE_GAIN_ENABLE); lola_init_mixer_widget() 136 chip->mixer.array_saved = vmalloc(sizeof(struct lola_mixer_array)); lola_init_mixer_widget() 139 chip->mixer.src_stream_outs = chip->pcm[PLAY].num_streams; lola_init_mixer_widget() 140 chip->mixer.src_phys_ins = chip->pin[CAPT].num_pins; lola_init_mixer_widget() 143 chip->mixer.dest_stream_ins = chip->pcm[CAPT].num_streams; lola_init_mixer_widget() 144 chip->mixer.dest_phys_outs = chip->pin[PLAY].num_pins; lola_init_mixer_widget() 149 chip->mixer.src_stream_out_ofs = chip->mixer.src_phys_ins + lola_init_mixer_widget() 151 chip->mixer.dest_phys_out_ofs = chip->mixer.dest_stream_ins + lola_init_mixer_widget() 202 if (chip->mixer.src_stream_out_ofs > MAX_AUDIO_INOUT_COUNT || lola_init_mixer_widget() 203 chip->mixer.dest_phys_out_ofs > MAX_STREAM_IN_COUNT) { lola_init_mixer_widget() 204 dev_err(chip->card->dev, "Invalid mixer widget size\n"); lola_init_mixer_widget() 208 chip->mixer.src_mask = ((1U << chip->mixer.src_phys_ins) - 1) | lola_init_mixer_widget() 209 (((1U << chip->mixer.src_stream_outs) - 1) lola_init_mixer_widget() 210 << chip->mixer.src_stream_out_ofs); lola_init_mixer_widget() 211 chip->mixer.dest_mask = ((1U << chip->mixer.dest_stream_ins) - 1) | lola_init_mixer_widget() 212 (((1U << chip->mixer.dest_phys_outs) - 1) lola_init_mixer_widget() 213 << chip->mixer.dest_phys_out_ofs); lola_init_mixer_widget() 215 dev_dbg(chip->card->dev, "Mixer src_mask=%x, dest_mask=%x\n", lola_init_mixer_widget() 216 chip->mixer.src_mask, chip->mixer.dest_mask); lola_init_mixer_widget() 221 static int lola_mixer_set_src_gain(struct lola *chip, unsigned int id, lola_mixer_set_src_gain() argument 226 if (!(chip->mixer.src_mask & (1 << id))) lola_mixer_set_src_gain() 228 oldval = val = readl(&chip->mixer.array->src_gain_enable); lola_mixer_set_src_gain() 235 (gain == readw(&chip->mixer.array->src_gain[id]))) lola_mixer_set_src_gain() 238 dev_dbg(chip->card->dev, lola_mixer_set_src_gain() 241 writew(gain, &chip->mixer.array->src_gain[id]); lola_mixer_set_src_gain() 242 writel(val, &chip->mixer.array->src_gain_enable); lola_mixer_set_src_gain() 243 lola_codec_flush(chip); lola_mixer_set_src_gain() 245 return lola_codec_write(chip, chip->mixer.nid, lola_mixer_set_src_gain() 250 static int lola_mixer_set_src_gains(struct lola *chip, unsigned int mask, 255 if ((chip->mixer.src_mask & mask) != mask) 259 writew(*gains, &chip->mixer.array->src_gain[i]); 263 writel(mask, &chip->mixer.array->src_gain_enable); 264 lola_codec_flush(chip); 265 if (chip->mixer.caps & LOLA_PEAK_METER_CAN_AGC_MASK) { 267 return lola_codec_write(chip, chip->mixer.nid, 273 lola_codec_write(chip, chip->mixer.nid, 281 static int lola_mixer_set_mapping_gain(struct lola *chip, lola_mixer_set_mapping_gain() argument 287 if (!(chip->mixer.src_mask & (1 << src)) || lola_mixer_set_mapping_gain() 288 !(chip->mixer.dest_mask & (1 << dest))) lola_mixer_set_mapping_gain() 291 writew(gain, &chip->mixer.array->dest_mix_gain[dest][src]); lola_mixer_set_mapping_gain() 292 val = readl(&chip->mixer.array->dest_mix_gain_enable[dest]); lola_mixer_set_mapping_gain() 297 writel(val, &chip->mixer.array->dest_mix_gain_enable[dest]); lola_mixer_set_mapping_gain() 298 lola_codec_flush(chip); lola_mixer_set_mapping_gain() 299 return lola_codec_write(chip, chip->mixer.nid, LOLA_VERB_SET_MIX_GAIN, lola_mixer_set_mapping_gain() 304 static int lola_mixer_set_dest_gains(struct lola *chip, unsigned int id, 309 if (!(chip->mixer.dest_mask & (1 << id)) || 310 (chip->mixer.src_mask & mask) != mask) 314 writew(*gains, &chip->mixer.array->dest_mix_gain[id][i]); 318 writel(mask, &chip->mixer.array->dest_mix_gain_enable[id]); 319 lola_codec_flush(chip); 321 return lola_codec_write(chip, chip->mixer.nid, 329 static int set_analog_volume(struct lola *chip, int dir, 333 int lola_setup_all_analog_gains(struct lola *chip, int dir, bool mute) lola_setup_all_analog_gains() argument 338 pin = chip->pin[dir].pins; lola_setup_all_analog_gains() 339 max_idx = chip->pin[dir].num_pins; lola_setup_all_analog_gains() 344 set_analog_volume(chip, dir, idx, val, false); lola_setup_all_analog_gains() 347 return lola_codec_flush(chip); lola_setup_all_analog_gains() 350 void lola_save_mixer(struct lola *chip) lola_save_mixer() argument 353 if (chip->mixer.array_saved) { lola_save_mixer() 355 memcpy_fromio(chip->mixer.array_saved, chip->mixer.array, lola_save_mixer() 356 sizeof(*chip->mixer.array)); lola_save_mixer() 358 lola_setup_all_analog_gains(chip, PLAY, true); /* output mute */ lola_save_mixer() 361 void lola_restore_mixer(struct lola *chip) lola_restore_mixer() argument 365 /*lola_reset_setups(chip);*/ lola_restore_mixer() 366 if (chip->mixer.array_saved) { lola_restore_mixer() 368 memcpy_toio(chip->mixer.array, chip->mixer.array_saved, lola_restore_mixer() 369 sizeof(*chip->mixer.array)); lola_restore_mixer() 373 for (i = 0; i < chip->mixer.src_phys_ins; i++) lola_restore_mixer() 374 lola_codec_write(chip, chip->mixer.nid, lola_restore_mixer() 377 for (i = 0; i < chip->mixer.src_stream_outs; i++) lola_restore_mixer() 378 lola_codec_write(chip, chip->mixer.nid, lola_restore_mixer() 380 chip->mixer.src_stream_out_ofs + i, 0); lola_restore_mixer() 381 for (i = 0; i < chip->mixer.dest_stream_ins; i++) lola_restore_mixer() 382 lola_codec_write(chip, chip->mixer.nid, lola_restore_mixer() 385 for (i = 0; i < chip->mixer.dest_phys_outs; i++) lola_restore_mixer() 386 lola_codec_write(chip, chip->mixer.nid, lola_restore_mixer() 388 chip->mixer.dest_phys_out_ofs + i, 0); lola_restore_mixer() 389 lola_codec_flush(chip); lola_restore_mixer() 396 static int set_analog_volume(struct lola *chip, int dir, set_analog_volume() argument 403 if (idx >= chip->pin[dir].num_pins) set_analog_volume() 405 pin = &chip->pin[dir].pins[idx]; set_analog_volume() 411 lola_codec_flush(chip); set_analog_volume() 412 dev_dbg(chip->card->dev, set_analog_volume() 415 err = lola_codec_write(chip, pin->nid, set_analog_volume() 424 int lola_set_src_config(struct lola *chip, unsigned int src_mask, bool update) lola_set_src_config() argument 431 if ((chip->input_src_caps_mask & src_mask) != src_mask) lola_set_src_config() 434 for (n = 0; n < chip->pin[CAPT].num_pins; n += 2) { lola_set_src_config() 437 if (!(chip->input_src_caps_mask & mask)) lola_set_src_config() 442 src_state = (chip->input_src_mask & mask) != 0; lola_set_src_config() 446 err = lola_codec_write(chip, chip->pcm[CAPT].streams[n].nid, lola_set_src_config() 454 ret = lola_codec_flush(chip); lola_set_src_config() 456 chip->input_src_mask = src_mask; lola_set_src_config() 462 static int init_mixer_values(struct lola *chip) init_mixer_values() argument 467 lola_set_src_config(chip, (1 << chip->pin[CAPT].num_pins) - 1, false); init_mixer_values() 470 memset_io(chip->mixer.array, 0, sizeof(*chip->mixer.array)); init_mixer_values() 472 for (i = 0; i < chip->mixer.dest_stream_ins; i++) init_mixer_values() 473 lola_codec_write(chip, chip->mixer.nid, init_mixer_values() 477 for (i = 0; i < chip->mixer.dest_phys_outs; i++) init_mixer_values() 478 lola_codec_write(chip, chip->mixer.nid, init_mixer_values() 480 chip->mixer.dest_phys_out_ofs + i, 0); init_mixer_values() 483 for (i = 0; i < chip->mixer.src_phys_ins; i++) init_mixer_values() 484 lola_mixer_set_src_gain(chip, i, 336, true); /* 0dB */ init_mixer_values() 487 for (i = 0; i < chip->mixer.src_stream_outs; i++) init_mixer_values() 488 lola_mixer_set_src_gain(chip, init_mixer_values() 489 i + chip->mixer.src_stream_out_ofs, init_mixer_values() 492 for (i = 0; i < chip->mixer.dest_stream_ins; i++) { init_mixer_values() 493 int src = i % chip->mixer.src_phys_ins; init_mixer_values() 494 lola_mixer_set_mapping_gain(chip, src, i, 336, true); init_mixer_values() 500 for (i = 0; i < chip->mixer.src_stream_outs; i++) { init_mixer_values() 501 int src = chip->mixer.src_stream_out_ofs + i; init_mixer_values() 502 int dst = chip->mixer.dest_phys_out_ofs + init_mixer_values() 503 i % chip->mixer.dest_phys_outs; init_mixer_values() 504 lola_mixer_set_mapping_gain(chip, src, dst, 336, true); init_mixer_values() 515 struct lola *chip = snd_kcontrol_chip(kcontrol); lola_analog_vol_info() local 519 uinfo->count = chip->pin[dir].num_pins; lola_analog_vol_info() 521 uinfo->value.integer.max = chip->pin[dir].pins[0].amp_num_steps; lola_analog_vol_info() 528 struct lola *chip = snd_kcontrol_chip(kcontrol); lola_analog_vol_get() local 532 for (i = 0; i < chip->pin[dir].num_pins; i++) lola_analog_vol_get() 534 chip->pin[dir].pins[i].cur_gain_step; lola_analog_vol_get() 541 struct lola *chip = snd_kcontrol_chip(kcontrol); lola_analog_vol_put() local 545 for (i = 0; i < chip->pin[dir].num_pins; i++) { lola_analog_vol_put() 546 err = set_analog_volume(chip, dir, i, lola_analog_vol_put() 558 struct lola *chip = snd_kcontrol_chip(kcontrol); lola_analog_vol_tlv() local 565 pin = &chip->pin[dir].pins[0]; lola_analog_vol_tlv() 594 static int create_analog_mixer(struct lola *chip, int dir, char *name) create_analog_mixer() argument 596 if (!chip->pin[dir].num_pins) create_analog_mixer() 599 if (chip->pin[dir].num_pins != chip->pin[dir].num_analog_pins) create_analog_mixer() 603 return snd_ctl_add(chip->card, create_analog_mixer() 604 snd_ctl_new1(&lola_analog_mixer, chip)); create_analog_mixer() 613 struct lola *chip = snd_kcontrol_chip(kcontrol); lola_input_src_info() local 616 uinfo->count = chip->pin[CAPT].num_pins; lola_input_src_info() 625 struct lola *chip = snd_kcontrol_chip(kcontrol); lola_input_src_get() local 628 for (i = 0; i < chip->pin[CAPT].num_pins; i++) lola_input_src_get() 630 !!(chip->input_src_mask & (1 << i)); lola_input_src_get() 637 struct lola *chip = snd_kcontrol_chip(kcontrol); lola_input_src_put() local 642 for (i = 0; i < chip->pin[CAPT].num_pins; i++) lola_input_src_put() 645 return lola_set_src_config(chip, mask, true); lola_input_src_put() 660 static int create_input_src_mixer(struct lola *chip) create_input_src_mixer() argument 662 if (!chip->input_src_caps_mask) create_input_src_mixer() 665 return snd_ctl_add(chip->card, create_input_src_mixer() 666 snd_ctl_new1(&lola_input_src_mixer, chip)); create_input_src_mixer() 687 struct lola *chip = snd_kcontrol_chip(kcontrol); lola_src_gain_get() local 692 mask = readl(&chip->mixer.array->src_gain_enable); lola_src_gain_get() 696 if (!(chip->mixer.src_mask & (1 << idx))) lola_src_gain_get() 699 val = readw(&chip->mixer.array->src_gain[idx]) + 1; lola_src_gain_get() 710 struct lola *chip = snd_kcontrol_chip(kcontrol); lola_src_gain_put() local 720 err = lola_mixer_set_src_gain(chip, idx, val, !!val); lola_src_gain_put() 740 static int create_src_gain_mixer(struct lola *chip, create_src_gain_mixer() argument 745 return snd_ctl_add(chip->card, create_src_gain_mixer() 746 snd_ctl_new1(&lola_src_gain_mixer, chip)); create_src_gain_mixer() 768 struct lola *chip = snd_kcontrol_chip(kcontrol); 775 mask = readl(&chip->mixer.array->dest_mix_gain_enable[dst]); 779 if (!(chip->mixer.src_mask & (1 << src))) 782 val = readw(&chip->mixer.array->dest_mix_gain[dst][src]) + 1; 793 struct lola *chip = snd_kcontrol_chip(kcontrol); 812 return lola_mixer_set_dest_gains(chip, dst, mask, gains); 827 static int create_dest_gain_mixer(struct lola *chip, 835 return snd_ctl_add(chip->card, 836 snd_ctl_new1(&lola_dest_gain_mixer, chip)); 842 int lola_create_mixer(struct lola *chip) lola_create_mixer() argument 846 err = create_analog_mixer(chip, PLAY, "Analog Playback Volume"); lola_create_mixer() 849 err = create_analog_mixer(chip, CAPT, "Analog Capture Volume"); lola_create_mixer() 852 err = create_input_src_mixer(chip); lola_create_mixer() 855 err = create_src_gain_mixer(chip, chip->mixer.src_phys_ins, 0, lola_create_mixer() 859 err = create_src_gain_mixer(chip, chip->mixer.src_stream_outs, lola_create_mixer() 860 chip->mixer.src_stream_out_ofs, lola_create_mixer() 866 err = create_dest_gain_mixer(chip, lola_create_mixer() 867 chip->mixer.src_phys_ins, 0, lola_create_mixer() 868 chip->mixer.dest_stream_ins, 0, lola_create_mixer() 872 err = create_dest_gain_mixer(chip, lola_create_mixer() 873 chip->mixer.src_stream_outs, lola_create_mixer() 874 chip->mixer.src_stream_out_ofs, lola_create_mixer() 875 chip->mixer.dest_stream_ins, 0, lola_create_mixer() 879 err = create_dest_gain_mixer(chip, lola_create_mixer() 880 chip->mixer.src_phys_ins, 0, lola_create_mixer() 881 chip->mixer.dest_phys_outs, lola_create_mixer() 882 chip->mixer.dest_phys_out_ofs, lola_create_mixer() 886 err = create_dest_gain_mixer(chip, lola_create_mixer() 887 chip->mixer.src_stream_outs, lola_create_mixer() 888 chip->mixer.src_stream_out_ofs, lola_create_mixer() 889 chip->mixer.dest_phys_outs, lola_create_mixer() 890 chip->mixer.dest_phys_out_ofs, lola_create_mixer() 895 return init_mixer_values(chip); lola_create_mixer()
H A D	lola_clock.c	68 static bool check_gran_clock_compatibility(struct lola *chip, check_gran_clock_compatibility() argument 72 if (!chip->granularity) check_gran_clock_compatibility() 89 int lola_set_granularity(struct lola *chip, unsigned int val, bool force) lola_set_granularity() argument 94 if (val == chip->granularity) lola_set_granularity() 98 if (chip->audio_in_alloc_mask || chip->audio_out_alloc_mask) lola_set_granularity() 101 if (!check_gran_clock_compatibility(chip, val, lola_set_granularity() 102 chip->clock.cur_freq)) lola_set_granularity() 106 chip->granularity = val; lola_set_granularity() 110 err = lola_codec_write(chip, 1, LOLA_VERB_SET_GRANULARITY_STEPS, lola_set_granularity() 116 return lola_codec_flush(chip); lola_set_granularity() 123 int lola_init_clock_widget(struct lola *chip, int nid) lola_init_clock_widget() argument 129 err = lola_read_param(chip, nid, LOLA_PAR_AUDIO_WIDGET_CAP, &val); lola_init_clock_widget() 131 dev_err(chip->card->dev, "Can't read wcaps for 0x%x\n", nid); lola_init_clock_widget() 136 dev_dbg(chip->card->dev, "No valid clock widget\n"); lola_init_clock_widget() 140 chip->clock.nid = nid; lola_init_clock_widget() 141 chip->clock.items = val & 0xff; lola_init_clock_widget() 142 dev_dbg(chip->card->dev, "clock_list nid=%x, entries=%d\n", nid, lola_init_clock_widget() 143 chip->clock.items); lola_init_clock_widget() 144 if (chip->clock.items > MAX_SAMPLE_CLOCK_COUNT) { lola_init_clock_widget() 145 dev_err(chip->card->dev, "CLOCK_LIST too big: %d\n", lola_init_clock_widget() 146 chip->clock.items); lola_init_clock_widget() 150 nitems = chip->clock.items; lola_init_clock_widget() 158 err = lola_codec_read(chip, nid, LOLA_VERB_GET_CLOCK_LIST, lola_init_clock_widget() 161 dev_err(chip->card->dev, "Can't read CLOCK_LIST\n"); lola_init_clock_widget() 177 if (freq < chip->sample_rate_min) lola_init_clock_widget() 180 chip->clock.cur_index = idx_list; lola_init_clock_widget() 181 chip->clock.cur_freq = 48000; lola_init_clock_widget() 182 chip->clock.cur_valid = true; lola_init_clock_widget() 186 if (freq < chip->sample_rate_min) lola_init_clock_widget() 196 sc = &chip->clock.sample_clock[idx_list]; lola_init_clock_widget() 201 chip->clock.idx_lookup[idx_list] = idx; lola_init_clock_widget() 204 chip->clock.items--; lola_init_clock_widget() 214 int lola_enable_clock_events(struct lola *chip) lola_enable_clock_events() argument 219 err = lola_codec_read(chip, chip->clock.nid, lola_enable_clock_events() 226 dev_warn(chip->card->dev, "error in enable_clock_events %d\n", lola_enable_clock_events() 233 int lola_set_clock_index(struct lola *chip, unsigned int idx) lola_set_clock_index() argument 238 err = lola_codec_read(chip, chip->clock.nid, lola_set_clock_index() 240 chip->clock.idx_lookup[idx], lola_set_clock_index() 245 dev_warn(chip->card->dev, "error in set_clock %d\n", res); lola_set_clock_index() 251 bool lola_update_ext_clock_freq(struct lola *chip, unsigned int val) lola_update_ext_clock_freq() argument 265 if (chip->clock.sample_clock[chip->clock.cur_index].type != lola_update_ext_clock_freq() 267 chip->clock.cur_freq = lola_sample_rate_convert(val & 0x7f); lola_update_ext_clock_freq() 268 chip->clock.cur_valid = (val & 0x100) != 0; lola_update_ext_clock_freq() 273 int lola_set_clock(struct lola *chip, int idx) lola_set_clock() argument 278 if (idx == chip->clock.cur_index) { lola_set_clock() 280 freq = chip->clock.cur_freq; lola_set_clock() 281 valid = chip->clock.cur_valid; lola_set_clock() 282 } else if (chip->clock.sample_clock[idx].type == lola_set_clock() 285 freq = chip->clock.sample_clock[idx].freq; lola_set_clock() 292 if (!check_gran_clock_compatibility(chip, chip->granularity, freq)) lola_set_clock() 295 if (idx != chip->clock.cur_index) { lola_set_clock() 296 int err = lola_set_clock_index(chip, idx); lola_set_clock() 300 chip->clock.cur_index = idx; lola_set_clock() 301 chip->clock.cur_freq = freq; lola_set_clock() 302 chip->clock.cur_valid = true; lola_set_clock() 307 int lola_set_sample_rate(struct lola *chip, int rate) lola_set_sample_rate() argument 311 if (chip->clock.cur_freq == rate && chip->clock.cur_valid) lola_set_sample_rate() 314 for (i = 0; i < chip->clock.items; i++) { lola_set_sample_rate() 315 if (chip->clock.sample_clock[i].type == LOLA_CLOCK_TYPE_INTERNAL && lola_set_sample_rate() 316 chip->clock.sample_clock[i].freq == rate) lola_set_sample_rate() 319 if (i >= chip->clock.items) lola_set_sample_rate() 321 return lola_set_clock(chip, i); lola_set_sample_rate()
H A D	lola_proc.c	30 struct lola *chip, int nid, const char *name) print_audio_widget() 34 lola_read_param(chip, nid, LOLA_PAR_AUDIO_WIDGET_CAP, &val); print_audio_widget() 36 lola_read_param(chip, nid, LOLA_PAR_STREAM_FORMATS, &val); print_audio_widget() 41 struct lola *chip, int nid, unsigned int ampcap, print_pin_widget() 46 lola_read_param(chip, nid, LOLA_PAR_AUDIO_WIDGET_CAP, &val); print_pin_widget() 50 lola_read_param(chip, nid, ampcap, &val); print_pin_widget() 57 lola_codec_read(chip, nid, LOLA_VERB_GET_MAX_LEVEL, 0, 0, &val, NULL); print_pin_widget() 62 struct lola *chip, int nid) print_clock_widget() 67 lola_read_param(chip, nid, LOLA_PAR_AUDIO_WIDGET_CAP, &val); print_clock_widget() 75 lola_codec_read(chip, nid, LOLA_VERB_GET_CLOCK_LIST, print_clock_widget() 102 struct lola *chip, int nid) print_mixer_widget() 106 lola_read_param(chip, nid, LOLA_PAR_AUDIO_WIDGET_CAP, &val); print_mixer_widget() 113 struct lola *chip = entry->private_data; lola_proc_codec_read() local 117 lola_read_param(chip, 0, LOLA_PAR_VENDOR_ID, &val); lola_proc_codec_read() 119 lola_read_param(chip, 1, LOLA_PAR_FUNCTION_TYPE, &val); lola_proc_codec_read() 121 lola_read_param(chip, 1, LOLA_PAR_SPECIFIC_CAPS, &val); lola_proc_codec_read() 124 chip->pin[CAPT].num_pins, chip->pin[PLAY].num_pins); lola_proc_codec_read() 126 for (i = 0; i < chip->pcm[CAPT].num_streams; i++, nid++) lola_proc_codec_read() 127 print_audio_widget(buffer, chip, nid, "[Audio-In]"); lola_proc_codec_read() 128 for (i = 0; i < chip->pcm[PLAY].num_streams; i++, nid++) lola_proc_codec_read() 129 print_audio_widget(buffer, chip, nid, "[Audio-Out]"); lola_proc_codec_read() 130 for (i = 0; i < chip->pin[CAPT].num_pins; i++, nid++) lola_proc_codec_read() 131 print_pin_widget(buffer, chip, nid, LOLA_PAR_AMP_IN_CAP, lola_proc_codec_read() 133 for (i = 0; i < chip->pin[PLAY].num_pins; i++, nid++) lola_proc_codec_read() 134 print_pin_widget(buffer, chip, nid, LOLA_PAR_AMP_OUT_CAP, lola_proc_codec_read() 136 if (LOLA_AFG_CLOCK_WIDGET_PRESENT(chip->lola_caps)) { lola_proc_codec_read() 137 print_clock_widget(buffer, chip, nid); lola_proc_codec_read() 140 if (LOLA_AFG_MIXER_WIDGET_PRESENT(chip->lola_caps)) { lola_proc_codec_read() 141 print_mixer_widget(buffer, chip, nid); lola_proc_codec_read() 150 struct lola *chip = entry->private_data; lola_proc_codec_rw_write() local 156 lola_codec_read(chip, id, verb, data, extdata, lola_proc_codec_rw_write() 157 &chip->debug_res, lola_proc_codec_rw_write() 158 &chip->debug_res_ex); lola_proc_codec_rw_write() 165 struct lola *chip = entry->private_data; lola_proc_codec_rw_read() local 166 snd_iprintf(buffer, "0x%x 0x%x\n", chip->debug_res, chip->debug_res_ex); lola_proc_codec_rw_read() 175 struct lola *chip = entry->private_data; lola_proc_regs_read() local 180 readl(chip->bar[BAR0].remap_addr + i)); lola_proc_regs_read() 185 readl(chip->bar[BAR1].remap_addr + i)); lola_proc_regs_read() 190 readl(chip->bar[BAR1].remap_addr + i)); lola_proc_regs_read() 195 lola_dsd_read(chip, i, STS)); lola_proc_regs_read() 197 lola_dsd_read(chip, i, LPIB)); lola_proc_regs_read() 199 lola_dsd_read(chip, i, CTL)); lola_proc_regs_read() 201 lola_dsd_read(chip, i, LVI)); lola_proc_regs_read() 203 lola_dsd_read(chip, i, BDPL)); lola_proc_regs_read() 205 lola_dsd_read(chip, i, BDPU)); lola_proc_regs_read() 209 void lola_proc_debug_new(struct lola *chip) lola_proc_debug_new() argument 213 if (!snd_card_proc_new(chip->card, "codec", &entry)) lola_proc_debug_new() 214 snd_info_set_text_ops(entry, chip, lola_proc_codec_read); lola_proc_debug_new() 215 if (!snd_card_proc_new(chip->card, "codec_rw", &entry)) { lola_proc_debug_new() 216 snd_info_set_text_ops(entry, chip, lola_proc_codec_rw_read); lola_proc_debug_new() 220 if (!snd_card_proc_new(chip->card, "regs", &entry)) lola_proc_debug_new() 221 snd_info_set_text_ops(entry, chip, lola_proc_regs_read); lola_proc_debug_new() 29 print_audio_widget(struct snd_info_buffer *buffer, struct lola *chip, int nid, const char *name) print_audio_widget() argument 40 print_pin_widget(struct snd_info_buffer *buffer, struct lola *chip, int nid, unsigned int ampcap, const char *name) print_pin_widget() argument 61 print_clock_widget(struct snd_info_buffer *buffer, struct lola *chip, int nid) print_clock_widget() argument 101 print_mixer_widget(struct snd_info_buffer *buffer, struct lola *chip, int nid) print_mixer_widget() argument
H A D	lola_pcm.c	36 struct lola *chip = snd_pcm_substream_chip(substream); lola_get_pcm() local 37 return &chip->pcm[substream->stream]; lola_get_pcm() 47 static unsigned int lola_get_lrc(struct lola *chip) lola_get_lrc() argument 49 return lola_readl(chip, BAR1, LRC); lola_get_lrc() 52 static unsigned int lola_get_tstamp(struct lola *chip, bool quick_no_sync) lola_get_tstamp() argument 54 unsigned int tstamp = lola_get_lrc(chip) >> 8; lola_get_tstamp() 55 if (chip->granularity) { lola_get_tstamp() 57 tstamp += (wait_banks + 1) * chip->granularity - 1; lola_get_tstamp() 58 tstamp -= tstamp % chip->granularity; lola_get_tstamp() 64 static void lola_stream_clear_pending_irq(struct lola *chip, lola_stream_clear_pending_irq() argument 67 unsigned int val = lola_dsd_read(chip, str->dsd, STS); lola_stream_clear_pending_irq() 70 lola_dsd_write(chip, str->dsd, STS, val); lola_stream_clear_pending_irq() 73 static void lola_stream_start(struct lola *chip, struct lola_stream *str, lola_stream_start() argument 76 lola_stream_clear_pending_irq(chip, str); lola_stream_start() 77 lola_dsd_write(chip, str->dsd, CTL, lola_stream_start() 85 static void lola_stream_stop(struct lola *chip, struct lola_stream *str, lola_stream_stop() argument 88 lola_dsd_write(chip, str->dsd, CTL, lola_stream_stop() 93 lola_stream_clear_pending_irq(chip, str); lola_stream_stop() 96 static void wait_for_srst_clear(struct lola *chip, struct lola_stream *str) wait_for_srst_clear() argument 101 val = lola_dsd_read(chip, str->dsd, CTL); wait_for_srst_clear() 106 dev_warn(chip->card->dev, "SRST not clear (stream %d)\n", str->dsd); wait_for_srst_clear() 109 static int lola_stream_wait_for_fifo(struct lola *chip, lola_stream_wait_for_fifo() argument 116 unsigned int reg = lola_dsd_read(chip, str->dsd, STS); lola_stream_wait_for_fifo() 121 dev_warn(chip->card->dev, "FIFO not ready (stream %d)\n", str->dsd); lola_stream_wait_for_fifo() 128 static int lola_sync_wait_for_fifo(struct lola *chip, lola_sync_wait_for_fifo() argument 146 reg = lola_dsd_read(chip, str->dsd, STS); snd_pcm_group_for_each_entry() 159 dev_warn(chip->card->dev, "FIFO not ready (pending %d)\n", pending - 1); 164 static void lola_sync_pause(struct lola *chip, lola_sync_pause() argument 169 lola_sync_wait_for_fifo(chip, substream, false); snd_pcm_group_for_each_entry() 176 lola_dsd_write(chip, str->dsd, CTL, LOLA_DSD_CTL_SRUN | snd_pcm_group_for_each_entry() 179 lola_sync_wait_for_fifo(chip, substream, true); 182 static void lola_stream_reset(struct lola *chip, struct lola_stream *str) lola_stream_reset() argument 186 lola_sync_pause(chip, str->substream); lola_stream_reset() 188 lola_dsd_write(chip, str->dsd, CTL, lola_stream_reset() 190 lola_stream_wait_for_fifo(chip, str, false); lola_stream_reset() 191 lola_stream_clear_pending_irq(chip, str); lola_stream_reset() 192 lola_dsd_write(chip, str->dsd, CTL, LOLA_DSD_CTL_SRST); lola_stream_reset() 193 lola_dsd_write(chip, str->dsd, LVI, 0); lola_stream_reset() 194 lola_dsd_write(chip, str->dsd, BDPU, 0); lola_stream_reset() 195 lola_dsd_write(chip, str->dsd, BDPL, 0); lola_stream_reset() 196 wait_for_srst_clear(chip, str); lola_stream_reset() 225 struct lola *chip = snd_pcm_substream_chip(substream); lola_pcm_open() local 230 mutex_lock(&chip->open_mutex); lola_pcm_open() 232 mutex_unlock(&chip->open_mutex); lola_pcm_open() 240 if (chip->sample_rate) { lola_pcm_open() 242 runtime->hw.rate_min = chip->sample_rate; lola_pcm_open() 243 runtime->hw.rate_max = chip->sample_rate; lola_pcm_open() 245 runtime->hw.rate_min = chip->sample_rate_min; lola_pcm_open() 246 runtime->hw.rate_max = chip->sample_rate_max; lola_pcm_open() 248 chip->ref_count_rate++; lola_pcm_open() 250 /* period size = multiple of chip->granularity (8, 16 or 32 frames)*/ lola_pcm_open() 252 chip->granularity); lola_pcm_open() 254 chip->granularity); lola_pcm_open() 255 mutex_unlock(&chip->open_mutex); lola_pcm_open() 274 struct lola *chip = snd_pcm_substream_chip(substream); lola_pcm_close() local 277 mutex_lock(&chip->open_mutex); lola_pcm_close() 282 if (--chip->ref_count_rate == 0) { lola_pcm_close() 284 chip->sample_rate = 0; lola_pcm_close() 286 mutex_unlock(&chip->open_mutex); lola_pcm_close() 304 struct lola *chip = snd_pcm_substream_chip(substream); lola_pcm_hw_free() local 308 mutex_lock(&chip->open_mutex); lola_pcm_hw_free() 309 lola_stream_reset(chip, str); lola_pcm_hw_free() 311 mutex_unlock(&chip->open_mutex); lola_pcm_hw_free() 354 static int lola_setup_periods(struct lola *chip, struct lola_pcm *pcm, lola_setup_periods() argument 376 dev_err(chip->card->dev, "Too many BDL entries: buffer=%d, period=%d\n", lola_setup_periods() 405 static int lola_set_stream_config(struct lola *chip, lola_set_stream_config() argument 415 err = lola_codec_read(chip, str->nid, LOLA_VERB_SET_STREAM_FORMAT, lola_set_stream_config() 418 dev_err(chip->card->dev, "Cannot set stream format 0x%x\n", lola_set_stream_config() 426 err = lola_codec_read(chip, str[i].nid, lola_set_stream_config() 430 dev_err(chip->card->dev, lola_set_stream_config() 441 static int lola_setup_controller(struct lola *chip, struct lola_pcm *pcm, lola_setup_controller() argument 451 lola_dsd_write(chip, str->dsd, BDPL, (u32)bdl); lola_setup_controller() 452 lola_dsd_write(chip, str->dsd, BDPU, upper_32_bits(bdl)); lola_setup_controller() 454 lola_dsd_write(chip, str->dsd, LVI, str->frags - 1); lola_setup_controller() 455 lola_stream_clear_pending_irq(chip, str); lola_setup_controller() 457 lola_dsd_write(chip, str->dsd, CTL, lola_setup_controller() 462 return lola_stream_wait_for_fifo(chip, str, true); lola_setup_controller() 467 struct lola *chip = snd_pcm_substream_chip(substream); lola_pcm_prepare() local 474 mutex_lock(&chip->open_mutex); lola_pcm_prepare() 475 lola_stream_reset(chip, str); lola_pcm_prepare() 478 mutex_unlock(&chip->open_mutex); lola_pcm_prepare() 485 mutex_unlock(&chip->open_mutex); lola_pcm_prepare() 495 err = lola_setup_periods(chip, pcm, substream, str); lola_pcm_prepare() 499 err = lola_set_sample_rate(chip, runtime->rate); lola_pcm_prepare() 502 chip->sample_rate = runtime->rate; /* sample rate gets locked */ lola_pcm_prepare() 504 err = lola_set_stream_config(chip, str, runtime->channels); lola_pcm_prepare() 508 err = lola_setup_controller(chip, pcm, str); lola_pcm_prepare() 510 lola_stream_reset(chip, str); lola_pcm_prepare() 519 struct lola *chip = snd_pcm_substream_chip(substream); lola_pcm_trigger() local 546 tstamp = lola_get_tstamp(chip, !sync_streams); lola_pcm_trigger() 547 spin_lock(&chip->reg_lock); snd_pcm_group_for_each_entry() 553 lola_stream_start(chip, str, tstamp); snd_pcm_group_for_each_entry() 555 lola_stream_stop(chip, str, tstamp); snd_pcm_group_for_each_entry() 560 spin_unlock(&chip->reg_lock); 566 struct lola *chip = snd_pcm_substream_chip(substream); lola_pcm_pointer() local 568 unsigned int pos = lola_dsd_read(chip, str->dsd, LPIB); lola_pcm_pointer() 575 void lola_pcm_update(struct lola *chip, struct lola_pcm *pcm, unsigned int bits) lola_pcm_update() argument 601 int lola_create_pcm(struct lola *chip) lola_create_pcm() argument 608 snd_dma_pci_data(chip->pci), lola_create_pcm() 609 PAGE_SIZE, &chip->pcm[i].bdl); lola_create_pcm() 614 err = snd_pcm_new(chip->card, "Digigram Lola", 0, lola_create_pcm() 615 chip->pcm[SNDRV_PCM_STREAM_PLAYBACK].num_streams, lola_create_pcm() 616 chip->pcm[SNDRV_PCM_STREAM_CAPTURE].num_streams, lola_create_pcm() 621 pcm->private_data = chip; lola_create_pcm() 623 if (chip->pcm[i].num_streams) lola_create_pcm() 628 snd_dma_pci_data(chip->pci), lola_create_pcm() 633 void lola_free_pcm(struct lola *chip) lola_free_pcm() argument 635 snd_dma_free_pages(&chip->pcm[0].bdl); lola_free_pcm() 636 snd_dma_free_pages(&chip->pcm[1].bdl); lola_free_pcm() 642 static int lola_init_stream(struct lola *chip, struct lola_stream *str, lola_init_stream() argument 653 err = lola_read_param(chip, nid, LOLA_PAR_AUDIO_WIDGET_CAP, &val); lola_init_stream() 655 dev_err(chip->card->dev, "Can't read wcaps for 0x%x\n", nid); lola_init_stream() 661 dev_err(chip->card->dev, lola_init_stream() 671 dev_err(chip->card->dev, lola_init_stream() 678 chip->input_src_caps_mask |= (1 << idx); lola_init_stream() 681 err = lola_read_param(chip, nid, LOLA_PAR_STREAM_FORMATS, &val); lola_init_stream() 683 dev_err(chip->card->dev, "Can't read FORMATS 0x%x\n", nid); lola_init_stream() 690 dev_err(chip->card->dev, lola_init_stream() 697 int lola_init_pcm(struct lola *chip, int dir, int *nidp) lola_init_pcm() argument 699 struct lola_pcm *pcm = &chip->pcm[dir]; lola_init_pcm() 704 err = lola_init_stream(chip, &pcm->streams[i], i, nid, dir); lola_init_pcm()
/linux-4.1.27/sound/isa/wss/
H A D	wss_lib.c	7 * Yamaha OPL3-SA3 chip 165 static inline void wss_outb(struct snd_wss *chip, u8 offset, u8 val) wss_outb() argument 167 outb(val, chip->port + offset); wss_outb() 170 static inline u8 wss_inb(struct snd_wss *chip, u8 offset) wss_inb() argument 172 return inb(chip->port + offset); wss_inb() 175 static void snd_wss_wait(struct snd_wss *chip) snd_wss_wait() argument 180 timeout > 0 && (wss_inb(chip, CS4231P(REGSEL)) & CS4231_INIT); snd_wss_wait() 185 static void snd_wss_dout(struct snd_wss *chip, unsigned char reg, snd_wss_dout() argument 191 timeout > 0 && (wss_inb(chip, CS4231P(REGSEL)) & CS4231_INIT); snd_wss_dout() 194 wss_outb(chip, CS4231P(REGSEL), chip->mce_bit | reg); snd_wss_dout() 195 wss_outb(chip, CS4231P(REG), value); snd_wss_dout() 199 void snd_wss_out(struct snd_wss *chip, unsigned char reg, unsigned char value) snd_wss_out() argument 201 snd_wss_wait(chip); snd_wss_out() 203 if (wss_inb(chip, CS4231P(REGSEL)) & CS4231_INIT) snd_wss_out() 207 wss_outb(chip, CS4231P(REGSEL), chip->mce_bit | reg); snd_wss_out() 208 wss_outb(chip, CS4231P(REG), value); snd_wss_out() 209 chip->image[reg] = value; snd_wss_out() 212 chip->mce_bit | reg, value); snd_wss_out() 216 unsigned char snd_wss_in(struct snd_wss *chip, unsigned char reg) snd_wss_in() argument 218 snd_wss_wait(chip); snd_wss_in() 220 if (wss_inb(chip, CS4231P(REGSEL)) & CS4231_INIT) snd_wss_in() 224 wss_outb(chip, CS4231P(REGSEL), chip->mce_bit | reg); snd_wss_in() 226 return wss_inb(chip, CS4231P(REG)); snd_wss_in() 230 void snd_cs4236_ext_out(struct snd_wss *chip, unsigned char reg, snd_cs4236_ext_out() argument 233 wss_outb(chip, CS4231P(REGSEL), chip->mce_bit | 0x17); snd_cs4236_ext_out() 234 wss_outb(chip, CS4231P(REG), snd_cs4236_ext_out() 235 reg | (chip->image[CS4236_EXT_REG] & 0x01)); snd_cs4236_ext_out() 236 wss_outb(chip, CS4231P(REG), val); snd_cs4236_ext_out() 237 chip->eimage[CS4236_REG(reg)] = val; snd_cs4236_ext_out() 244 unsigned char snd_cs4236_ext_in(struct snd_wss *chip, unsigned char reg) snd_cs4236_ext_in() argument 246 wss_outb(chip, CS4231P(REGSEL), chip->mce_bit | 0x17); snd_cs4236_ext_in() 247 wss_outb(chip, CS4231P(REG), snd_cs4236_ext_in() 248 reg | (chip->image[CS4236_EXT_REG] & 0x01)); snd_cs4236_ext_in() 250 return wss_inb(chip, CS4231P(REG)); snd_cs4236_ext_in() 254 res = wss_inb(chip, CS4231P(REG)); snd_cs4236_ext_in() 265 static void snd_wss_debug(struct snd_wss *chip) 270 wss_inb(chip, CS4231P(REGSEL)), 271 wss_inb(chip, CS4231P(STATUS))); 275 snd_wss_in(chip, 0x00), 276 snd_wss_in(chip, 0x10)); 280 snd_wss_in(chip, 0x01), 281 snd_wss_in(chip, 0x11)); 285 snd_wss_in(chip, 0x02), 286 snd_wss_in(chip, 0x12)); 290 snd_wss_in(chip, 0x03), 291 snd_wss_in(chip, 0x13)); 295 snd_wss_in(chip, 0x04), 296 snd_wss_in(chip, 0x14)); 300 snd_wss_in(chip, 0x05), 301 snd_wss_in(chip, 0x15)); 305 snd_wss_in(chip, 0x06), 306 snd_wss_in(chip, 0x16)); 310 snd_wss_in(chip, 0x07), 311 snd_wss_in(chip, 0x17)); 315 snd_wss_in(chip, 0x08), 316 snd_wss_in(chip, 0x18)); 320 snd_wss_in(chip, 0x09), 321 snd_wss_in(chip, 0x19)); 325 snd_wss_in(chip, 0x0a), 326 snd_wss_in(chip, 0x1a)); 330 snd_wss_in(chip, 0x0b), 331 snd_wss_in(chip, 0x1b)); 335 snd_wss_in(chip, 0x0c), 336 snd_wss_in(chip, 0x1c)); 340 snd_wss_in(chip, 0x0d), 341 snd_wss_in(chip, 0x1d)); 345 snd_wss_in(chip, 0x0e), 346 snd_wss_in(chip, 0x1e)); 350 snd_wss_in(chip, 0x0f), 351 snd_wss_in(chip, 0x1f)); 360 static void snd_wss_busy_wait(struct snd_wss *chip) snd_wss_busy_wait() argument 364 /* huh.. looks like this sequence is proper for CS4231A chip (GUS MAX) */ snd_wss_busy_wait() 366 wss_inb(chip, CS4231P(REGSEL)); snd_wss_busy_wait() 369 timeout > 0 && (wss_inb(chip, CS4231P(REGSEL)) & CS4231_INIT); snd_wss_busy_wait() 374 void snd_wss_mce_up(struct snd_wss *chip) snd_wss_mce_up() argument 379 snd_wss_wait(chip); snd_wss_mce_up() 381 if (wss_inb(chip, CS4231P(REGSEL)) & CS4231_INIT) snd_wss_mce_up() 385 spin_lock_irqsave(&chip->reg_lock, flags); snd_wss_mce_up() 386 chip->mce_bit |= CS4231_MCE; snd_wss_mce_up() 387 timeout = wss_inb(chip, CS4231P(REGSEL)); snd_wss_mce_up() 391 chip->port); snd_wss_mce_up() 393 wss_outb(chip, CS4231P(REGSEL), snd_wss_mce_up() 394 chip->mce_bit | (timeout & 0x1f)); snd_wss_mce_up() 395 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_wss_mce_up() 399 void snd_wss_mce_down(struct snd_wss *chip) snd_wss_mce_down() argument 406 snd_wss_busy_wait(chip); snd_wss_mce_down() 409 if (wss_inb(chip, CS4231P(REGSEL)) & CS4231_INIT) snd_wss_mce_down() 414 spin_lock_irqsave(&chip->reg_lock, flags); snd_wss_mce_down() 415 chip->mce_bit &= ~CS4231_MCE; snd_wss_mce_down() 416 timeout = wss_inb(chip, CS4231P(REGSEL)); snd_wss_mce_down() 417 wss_outb(chip, CS4231P(REGSEL), chip->mce_bit | (timeout & 0x1f)); snd_wss_mce_down() 418 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_wss_mce_down() 422 chip->port); snd_wss_mce_down() 423 if ((timeout & CS4231_MCE) == 0 || !(chip->hardware & hw_mask)) snd_wss_mce_down() 437 while (snd_wss_in(chip, CS4231_TEST_INIT) & snd_wss_mce_down() 452 while (wss_inb(chip, CS4231P(REGSEL)) & CS4231_INIT) { snd_wss_mce_down() 461 snd_printd("mce_down - exit = 0x%x\n", wss_inb(chip, CS4231P(REGSEL))); snd_wss_mce_down() 483 struct snd_wss *chip = snd_pcm_substream_chip(substream); snd_wss_trigger() local 502 if (s == chip->playback_substream) { snd_pcm_group_for_each_entry() 505 } else if (s == chip->capture_substream) { snd_pcm_group_for_each_entry() 510 spin_lock(&chip->reg_lock); 512 chip->image[CS4231_IFACE_CTRL] |= what; 513 if (chip->trigger) 514 chip->trigger(chip, what, 1); 516 chip->image[CS4231_IFACE_CTRL] &= ~what; 517 if (chip->trigger) 518 chip->trigger(chip, what, 0); 520 snd_wss_out(chip, CS4231_IFACE_CTRL, chip->image[CS4231_IFACE_CTRL]); 521 spin_unlock(&chip->reg_lock); 523 snd_wss_debug(chip); 543 static unsigned char snd_wss_get_format(struct snd_wss *chip, snd_wss_get_format() argument 565 static void snd_wss_calibrate_mute(struct snd_wss *chip, int mute) snd_wss_calibrate_mute() argument 570 spin_lock_irqsave(&chip->reg_lock, flags); snd_wss_calibrate_mute() 571 if (chip->calibrate_mute == mute) { snd_wss_calibrate_mute() 572 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_wss_calibrate_mute() 576 snd_wss_dout(chip, CS4231_LEFT_INPUT, snd_wss_calibrate_mute() 577 chip->image[CS4231_LEFT_INPUT]); snd_wss_calibrate_mute() 578 snd_wss_dout(chip, CS4231_RIGHT_INPUT, snd_wss_calibrate_mute() 579 chip->image[CS4231_RIGHT_INPUT]); snd_wss_calibrate_mute() 580 snd_wss_dout(chip, CS4231_LOOPBACK, snd_wss_calibrate_mute() 581 chip->image[CS4231_LOOPBACK]); snd_wss_calibrate_mute() 583 snd_wss_dout(chip, CS4231_LEFT_INPUT, snd_wss_calibrate_mute() 585 snd_wss_dout(chip, CS4231_RIGHT_INPUT, snd_wss_calibrate_mute() 587 snd_wss_dout(chip, CS4231_LOOPBACK, snd_wss_calibrate_mute() 591 snd_wss_dout(chip, CS4231_AUX1_LEFT_INPUT, snd_wss_calibrate_mute() 592 mute | chip->image[CS4231_AUX1_LEFT_INPUT]); snd_wss_calibrate_mute() 593 snd_wss_dout(chip, CS4231_AUX1_RIGHT_INPUT, snd_wss_calibrate_mute() 594 mute | chip->image[CS4231_AUX1_RIGHT_INPUT]); snd_wss_calibrate_mute() 595 snd_wss_dout(chip, CS4231_AUX2_LEFT_INPUT, snd_wss_calibrate_mute() 596 mute | chip->image[CS4231_AUX2_LEFT_INPUT]); snd_wss_calibrate_mute() 597 snd_wss_dout(chip, CS4231_AUX2_RIGHT_INPUT, snd_wss_calibrate_mute() 598 mute | chip->image[CS4231_AUX2_RIGHT_INPUT]); snd_wss_calibrate_mute() 599 snd_wss_dout(chip, CS4231_LEFT_OUTPUT, snd_wss_calibrate_mute() 600 mute | chip->image[CS4231_LEFT_OUTPUT]); snd_wss_calibrate_mute() 601 snd_wss_dout(chip, CS4231_RIGHT_OUTPUT, snd_wss_calibrate_mute() 602 mute | chip->image[CS4231_RIGHT_OUTPUT]); snd_wss_calibrate_mute() 603 if (!(chip->hardware & WSS_HW_AD1848_MASK)) { snd_wss_calibrate_mute() 604 snd_wss_dout(chip, CS4231_LEFT_LINE_IN, snd_wss_calibrate_mute() 605 mute | chip->image[CS4231_LEFT_LINE_IN]); snd_wss_calibrate_mute() 606 snd_wss_dout(chip, CS4231_RIGHT_LINE_IN, snd_wss_calibrate_mute() 607 mute | chip->image[CS4231_RIGHT_LINE_IN]); snd_wss_calibrate_mute() 608 snd_wss_dout(chip, CS4231_MONO_CTRL, snd_wss_calibrate_mute() 609 mute ? 0xc0 : chip->image[CS4231_MONO_CTRL]); snd_wss_calibrate_mute() 611 if (chip->hardware == WSS_HW_INTERWAVE) { snd_wss_calibrate_mute() 612 snd_wss_dout(chip, CS4231_LEFT_MIC_INPUT, snd_wss_calibrate_mute() 613 mute | chip->image[CS4231_LEFT_MIC_INPUT]); snd_wss_calibrate_mute() 614 snd_wss_dout(chip, CS4231_RIGHT_MIC_INPUT, snd_wss_calibrate_mute() 615 mute | chip->image[CS4231_RIGHT_MIC_INPUT]); snd_wss_calibrate_mute() 616 snd_wss_dout(chip, CS4231_LINE_LEFT_OUTPUT, snd_wss_calibrate_mute() 617 mute | chip->image[CS4231_LINE_LEFT_OUTPUT]); snd_wss_calibrate_mute() 618 snd_wss_dout(chip, CS4231_LINE_RIGHT_OUTPUT, snd_wss_calibrate_mute() 619 mute | chip->image[CS4231_LINE_RIGHT_OUTPUT]); snd_wss_calibrate_mute() 621 chip->calibrate_mute = mute; snd_wss_calibrate_mute() 622 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_wss_calibrate_mute() 625 static void snd_wss_playback_format(struct snd_wss *chip, snd_wss_playback_format() argument 632 mutex_lock(&chip->mce_mutex); snd_wss_playback_format() 633 if (chip->hardware == WSS_HW_CS4231A || snd_wss_playback_format() 634 (chip->hardware & WSS_HW_CS4232_MASK)) { snd_wss_playback_format() 635 spin_lock_irqsave(&chip->reg_lock, flags); snd_wss_playback_format() 636 if ((chip->image[CS4231_PLAYBK_FORMAT] & 0x0f) == (pdfr & 0x0f)) { /* rate is same? */ snd_wss_playback_format() 637 snd_wss_out(chip, CS4231_ALT_FEATURE_1, snd_wss_playback_format() 638 chip->image[CS4231_ALT_FEATURE_1] | 0x10); snd_wss_playback_format() 639 chip->image[CS4231_PLAYBK_FORMAT] = pdfr; snd_wss_playback_format() 640 snd_wss_out(chip, CS4231_PLAYBK_FORMAT, snd_wss_playback_format() 641 chip->image[CS4231_PLAYBK_FORMAT]); snd_wss_playback_format() 642 snd_wss_out(chip, CS4231_ALT_FEATURE_1, snd_wss_playback_format() 643 chip->image[CS4231_ALT_FEATURE_1] &= ~0x10); snd_wss_playback_format() 647 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_wss_playback_format() 648 } else if (chip->hardware == WSS_HW_AD1845) { snd_wss_playback_format() 660 spin_lock_irqsave(&chip->reg_lock, flags); snd_wss_playback_format() 661 snd_wss_out(chip, CS4231_PLAYBK_FORMAT, (pdfr & 0xf0)); snd_wss_playback_format() 662 snd_wss_out(chip, AD1845_UPR_FREQ_SEL, (rate >> 8) & 0xff); snd_wss_playback_format() 663 snd_wss_out(chip, AD1845_LWR_FREQ_SEL, rate & 0xff); snd_wss_playback_format() 665 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_wss_playback_format() 668 snd_wss_mce_up(chip); snd_wss_playback_format() 669 spin_lock_irqsave(&chip->reg_lock, flags); snd_wss_playback_format() 670 if (chip->hardware != WSS_HW_INTERWAVE && !chip->single_dma) { snd_wss_playback_format() 671 if (chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE) snd_wss_playback_format() 673 (chip->image[CS4231_REC_FORMAT] & 0x0f); snd_wss_playback_format() 675 chip->image[CS4231_PLAYBK_FORMAT] = pdfr; snd_wss_playback_format() 677 snd_wss_out(chip, CS4231_PLAYBK_FORMAT, pdfr); snd_wss_playback_format() 678 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_wss_playback_format() 679 if (chip->hardware == WSS_HW_OPL3SA2) snd_wss_playback_format() 681 snd_wss_mce_down(chip); snd_wss_playback_format() 683 mutex_unlock(&chip->mce_mutex); snd_wss_playback_format() 686 static void snd_wss_capture_format(struct snd_wss *chip, snd_wss_capture_format() argument 693 mutex_lock(&chip->mce_mutex); snd_wss_capture_format() 694 if (chip->hardware == WSS_HW_CS4231A || snd_wss_capture_format() 695 (chip->hardware & WSS_HW_CS4232_MASK)) { snd_wss_capture_format() 696 spin_lock_irqsave(&chip->reg_lock, flags); snd_wss_capture_format() 697 if ((chip->image[CS4231_PLAYBK_FORMAT] & 0x0f) == (cdfr & 0x0f) || /* rate is same? */ snd_wss_capture_format() 698 (chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE)) { snd_wss_capture_format() 699 snd_wss_out(chip, CS4231_ALT_FEATURE_1, snd_wss_capture_format() 700 chip->image[CS4231_ALT_FEATURE_1] | 0x20); snd_wss_capture_format() 701 snd_wss_out(chip, CS4231_REC_FORMAT, snd_wss_capture_format() 702 chip->image[CS4231_REC_FORMAT] = cdfr); snd_wss_capture_format() 703 snd_wss_out(chip, CS4231_ALT_FEATURE_1, snd_wss_capture_format() 704 chip->image[CS4231_ALT_FEATURE_1] &= ~0x20); snd_wss_capture_format() 707 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_wss_capture_format() 708 } else if (chip->hardware == WSS_HW_AD1845) { snd_wss_capture_format() 720 spin_lock_irqsave(&chip->reg_lock, flags); snd_wss_capture_format() 721 snd_wss_out(chip, CS4231_REC_FORMAT, (cdfr & 0xf0)); snd_wss_capture_format() 722 snd_wss_out(chip, AD1845_UPR_FREQ_SEL, (rate >> 8) & 0xff); snd_wss_capture_format() 723 snd_wss_out(chip, AD1845_LWR_FREQ_SEL, rate & 0xff); snd_wss_capture_format() 725 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_wss_capture_format() 728 snd_wss_mce_up(chip); snd_wss_capture_format() 729 spin_lock_irqsave(&chip->reg_lock, flags); snd_wss_capture_format() 730 if (chip->hardware != WSS_HW_INTERWAVE && snd_wss_capture_format() 731 !(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE)) { snd_wss_capture_format() 732 if (chip->single_dma) snd_wss_capture_format() 733 snd_wss_out(chip, CS4231_PLAYBK_FORMAT, cdfr); snd_wss_capture_format() 735 snd_wss_out(chip, CS4231_PLAYBK_FORMAT, snd_wss_capture_format() 736 (chip->image[CS4231_PLAYBK_FORMAT] & 0xf0) | snd_wss_capture_format() 738 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_wss_capture_format() 739 snd_wss_mce_down(chip); snd_wss_capture_format() 740 snd_wss_mce_up(chip); snd_wss_capture_format() 741 spin_lock_irqsave(&chip->reg_lock, flags); snd_wss_capture_format() 743 if (chip->hardware & WSS_HW_AD1848_MASK) snd_wss_capture_format() 744 snd_wss_out(chip, CS4231_PLAYBK_FORMAT, cdfr); snd_wss_capture_format() 746 snd_wss_out(chip, CS4231_REC_FORMAT, cdfr); snd_wss_capture_format() 747 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_wss_capture_format() 748 snd_wss_mce_down(chip); snd_wss_capture_format() 750 mutex_unlock(&chip->mce_mutex); snd_wss_capture_format() 759 struct snd_wss *chip = snd_timer_chip(timer); snd_wss_timer_resolution() local 760 if (chip->hardware & WSS_HW_CS4236B_MASK) snd_wss_timer_resolution() 763 return chip->image[CS4231_PLAYBK_FORMAT] & 1 ? 9969 : 9920; snd_wss_timer_resolution() 770 struct snd_wss *chip = snd_timer_chip(timer); snd_wss_timer_start() local 771 spin_lock_irqsave(&chip->reg_lock, flags); snd_wss_timer_start() 773 if ((chip->image[CS4231_ALT_FEATURE_1] & CS4231_TIMER_ENABLE) == 0 || snd_wss_timer_start() 774 (unsigned char)(ticks >> 8) != chip->image[CS4231_TIMER_HIGH] || snd_wss_timer_start() 775 (unsigned char)ticks != chip->image[CS4231_TIMER_LOW]) { snd_wss_timer_start() 776 chip->image[CS4231_TIMER_HIGH] = (unsigned char) (ticks >> 8); snd_wss_timer_start() 777 snd_wss_out(chip, CS4231_TIMER_HIGH, snd_wss_timer_start() 778 chip->image[CS4231_TIMER_HIGH]); snd_wss_timer_start() 779 chip->image[CS4231_TIMER_LOW] = (unsigned char) ticks; snd_wss_timer_start() 780 snd_wss_out(chip, CS4231_TIMER_LOW, snd_wss_timer_start() 781 chip->image[CS4231_TIMER_LOW]); snd_wss_timer_start() 782 snd_wss_out(chip, CS4231_ALT_FEATURE_1, snd_wss_timer_start() 783 chip->image[CS4231_ALT_FEATURE_1] | snd_wss_timer_start() 786 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_wss_timer_start() 793 struct snd_wss *chip = snd_timer_chip(timer); snd_wss_timer_stop() local 794 spin_lock_irqsave(&chip->reg_lock, flags); snd_wss_timer_stop() 795 chip->image[CS4231_ALT_FEATURE_1] &= ~CS4231_TIMER_ENABLE; snd_wss_timer_stop() 796 snd_wss_out(chip, CS4231_ALT_FEATURE_1, snd_wss_timer_stop() 797 chip->image[CS4231_ALT_FEATURE_1]); snd_wss_timer_stop() 798 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_wss_timer_stop() 802 static void snd_wss_init(struct snd_wss *chip) snd_wss_init() argument 806 snd_wss_calibrate_mute(chip, 1); snd_wss_init() 807 snd_wss_mce_down(chip); snd_wss_init() 812 snd_wss_mce_up(chip); snd_wss_init() 813 spin_lock_irqsave(&chip->reg_lock, flags); snd_wss_init() 814 chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE | snd_wss_init() 819 chip->image[CS4231_IFACE_CTRL] |= CS4231_AUTOCALIB; snd_wss_init() 820 snd_wss_out(chip, CS4231_IFACE_CTRL, chip->image[CS4231_IFACE_CTRL]); snd_wss_init() 821 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_wss_init() 822 snd_wss_mce_down(chip); snd_wss_init() 828 snd_wss_mce_up(chip); snd_wss_init() 829 spin_lock_irqsave(&chip->reg_lock, flags); snd_wss_init() 830 chip->image[CS4231_IFACE_CTRL] &= ~CS4231_AUTOCALIB; snd_wss_init() 831 snd_wss_out(chip, CS4231_IFACE_CTRL, chip->image[CS4231_IFACE_CTRL]); snd_wss_init() 832 snd_wss_out(chip, snd_wss_init() 833 CS4231_ALT_FEATURE_1, chip->image[CS4231_ALT_FEATURE_1]); snd_wss_init() 834 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_wss_init() 835 snd_wss_mce_down(chip); snd_wss_init() 839 chip->image[CS4231_ALT_FEATURE_1]); snd_wss_init() 842 spin_lock_irqsave(&chip->reg_lock, flags); snd_wss_init() 843 snd_wss_out(chip, CS4231_ALT_FEATURE_2, snd_wss_init() 844 chip->image[CS4231_ALT_FEATURE_2]); snd_wss_init() 845 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_wss_init() 847 snd_wss_mce_up(chip); snd_wss_init() 848 spin_lock_irqsave(&chip->reg_lock, flags); snd_wss_init() 849 snd_wss_out(chip, CS4231_PLAYBK_FORMAT, snd_wss_init() 850 chip->image[CS4231_PLAYBK_FORMAT]); snd_wss_init() 851 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_wss_init() 852 snd_wss_mce_down(chip); snd_wss_init() 858 snd_wss_mce_up(chip); snd_wss_init() 859 spin_lock_irqsave(&chip->reg_lock, flags); snd_wss_init() 860 if (!(chip->hardware & WSS_HW_AD1848_MASK)) snd_wss_init() 861 snd_wss_out(chip, CS4231_REC_FORMAT, snd_wss_init() 862 chip->image[CS4231_REC_FORMAT]); snd_wss_init() 863 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_wss_init() 864 snd_wss_mce_down(chip); snd_wss_init() 865 snd_wss_calibrate_mute(chip, 0); snd_wss_init() 872 static int snd_wss_open(struct snd_wss *chip, unsigned int mode) snd_wss_open() argument 876 mutex_lock(&chip->open_mutex); snd_wss_open() 877 if ((chip->mode & mode) || snd_wss_open() 878 ((chip->mode & WSS_MODE_OPEN) && chip->single_dma)) { snd_wss_open() 879 mutex_unlock(&chip->open_mutex); snd_wss_open() 882 if (chip->mode & WSS_MODE_OPEN) { snd_wss_open() 883 chip->mode |= mode; snd_wss_open() 884 mutex_unlock(&chip->open_mutex); snd_wss_open() 888 spin_lock_irqsave(&chip->reg_lock, flags); snd_wss_open() 889 if (!(chip->hardware & WSS_HW_AD1848_MASK)) { snd_wss_open() 890 snd_wss_out(chip, CS4231_IRQ_STATUS, snd_wss_open() 894 snd_wss_out(chip, CS4231_IRQ_STATUS, 0); snd_wss_open() 896 wss_outb(chip, CS4231P(STATUS), 0); /* clear IRQ */ snd_wss_open() 897 wss_outb(chip, CS4231P(STATUS), 0); /* clear IRQ */ snd_wss_open() 898 chip->image[CS4231_PIN_CTRL] |= CS4231_IRQ_ENABLE; snd_wss_open() 899 snd_wss_out(chip, CS4231_PIN_CTRL, chip->image[CS4231_PIN_CTRL]); snd_wss_open() 900 if (!(chip->hardware & WSS_HW_AD1848_MASK)) { snd_wss_open() 901 snd_wss_out(chip, CS4231_IRQ_STATUS, snd_wss_open() 905 snd_wss_out(chip, CS4231_IRQ_STATUS, 0); snd_wss_open() 907 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_wss_open() 909 chip->mode = mode; snd_wss_open() 910 mutex_unlock(&chip->open_mutex); snd_wss_open() 914 static void snd_wss_close(struct snd_wss *chip, unsigned int mode) snd_wss_close() argument 918 mutex_lock(&chip->open_mutex); snd_wss_close() 919 chip->mode &= ~mode; snd_wss_close() 920 if (chip->mode & WSS_MODE_OPEN) { snd_wss_close() 921 mutex_unlock(&chip->open_mutex); snd_wss_close() 925 spin_lock_irqsave(&chip->reg_lock, flags); snd_wss_close() 926 if (!(chip->hardware & WSS_HW_AD1848_MASK)) snd_wss_close() 927 snd_wss_out(chip, CS4231_IRQ_STATUS, 0); snd_wss_close() 928 wss_outb(chip, CS4231P(STATUS), 0); /* clear IRQ */ snd_wss_close() 929 wss_outb(chip, CS4231P(STATUS), 0); /* clear IRQ */ snd_wss_close() 930 chip->image[CS4231_PIN_CTRL] &= ~CS4231_IRQ_ENABLE; snd_wss_close() 931 snd_wss_out(chip, CS4231_PIN_CTRL, chip->image[CS4231_PIN_CTRL]); snd_wss_close() 935 if (chip->image[CS4231_IFACE_CTRL] & (CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO | snd_wss_close() 937 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_wss_close() 938 snd_wss_mce_up(chip); snd_wss_close() 939 spin_lock_irqsave(&chip->reg_lock, flags); snd_wss_close() 940 chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO | snd_wss_close() 942 snd_wss_out(chip, CS4231_IFACE_CTRL, snd_wss_close() 943 chip->image[CS4231_IFACE_CTRL]); snd_wss_close() 944 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_wss_close() 945 snd_wss_mce_down(chip); snd_wss_close() 946 spin_lock_irqsave(&chip->reg_lock, flags); snd_wss_close() 950 if (!(chip->hardware & WSS_HW_AD1848_MASK)) snd_wss_close() 951 snd_wss_out(chip, CS4231_IRQ_STATUS, 0); snd_wss_close() 952 wss_outb(chip, CS4231P(STATUS), 0); /* clear IRQ */ snd_wss_close() 953 wss_outb(chip, CS4231P(STATUS), 0); /* clear IRQ */ snd_wss_close() 954 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_wss_close() 956 chip->mode = 0; snd_wss_close() 957 mutex_unlock(&chip->open_mutex); snd_wss_close() 966 struct snd_wss *chip = snd_timer_chip(timer); snd_wss_timer_open() local 967 snd_wss_open(chip, WSS_MODE_TIMER); snd_wss_timer_open() 973 struct snd_wss *chip = snd_timer_chip(timer); snd_wss_timer_close() local 974 snd_wss_close(chip, WSS_MODE_TIMER); snd_wss_timer_close() 997 struct snd_wss *chip = snd_pcm_substream_chip(substream); snd_wss_playback_hw_params() local 1003 new_pdfr = snd_wss_get_format(chip, params_format(hw_params), snd_wss_playback_hw_params() 1006 chip->set_playback_format(chip, hw_params, new_pdfr); snd_wss_playback_hw_params() 1017 struct snd_wss *chip = snd_pcm_substream_chip(substream); snd_wss_playback_prepare() local 1023 spin_lock_irqsave(&chip->reg_lock, flags); snd_wss_playback_prepare() 1024 chip->p_dma_size = size; snd_wss_playback_prepare() 1025 chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO); snd_wss_playback_prepare() 1026 snd_dma_program(chip->dma1, runtime->dma_addr, size, DMA_MODE_WRITE | DMA_AUTOINIT); snd_wss_playback_prepare() 1027 count = snd_wss_get_count(chip->image[CS4231_PLAYBK_FORMAT], count) - 1; snd_wss_playback_prepare() 1028 snd_wss_out(chip, CS4231_PLY_LWR_CNT, (unsigned char) count); snd_wss_playback_prepare() 1029 snd_wss_out(chip, CS4231_PLY_UPR_CNT, (unsigned char) (count >> 8)); snd_wss_playback_prepare() 1030 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_wss_playback_prepare() 1032 snd_wss_debug(chip); snd_wss_playback_prepare() 1040 struct snd_wss *chip = snd_pcm_substream_chip(substream); snd_wss_capture_hw_params() local 1046 new_cdfr = snd_wss_get_format(chip, params_format(hw_params), snd_wss_capture_hw_params() 1049 chip->set_capture_format(chip, hw_params, new_cdfr); snd_wss_capture_hw_params() 1060 struct snd_wss *chip = snd_pcm_substream_chip(substream); snd_wss_capture_prepare() local 1066 spin_lock_irqsave(&chip->reg_lock, flags); snd_wss_capture_prepare() 1067 chip->c_dma_size = size; snd_wss_capture_prepare() 1068 chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_RECORD_ENABLE | CS4231_RECORD_PIO); snd_wss_capture_prepare() 1069 snd_dma_program(chip->dma2, runtime->dma_addr, size, DMA_MODE_READ | DMA_AUTOINIT); snd_wss_capture_prepare() 1070 if (chip->hardware & WSS_HW_AD1848_MASK) snd_wss_capture_prepare() 1071 count = snd_wss_get_count(chip->image[CS4231_PLAYBK_FORMAT], snd_wss_capture_prepare() 1074 count = snd_wss_get_count(chip->image[CS4231_REC_FORMAT], snd_wss_capture_prepare() 1077 if (chip->single_dma && chip->hardware != WSS_HW_INTERWAVE) { snd_wss_capture_prepare() 1078 snd_wss_out(chip, CS4231_PLY_LWR_CNT, (unsigned char) count); snd_wss_capture_prepare() 1079 snd_wss_out(chip, CS4231_PLY_UPR_CNT, snd_wss_capture_prepare() 1082 snd_wss_out(chip, CS4231_REC_LWR_CNT, (unsigned char) count); snd_wss_capture_prepare() 1083 snd_wss_out(chip, CS4231_REC_UPR_CNT, snd_wss_capture_prepare() 1086 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_wss_capture_prepare() 1090 void snd_wss_overrange(struct snd_wss *chip) snd_wss_overrange() argument 1095 spin_lock_irqsave(&chip->reg_lock, flags); snd_wss_overrange() 1096 res = snd_wss_in(chip, CS4231_TEST_INIT); snd_wss_overrange() 1097 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_wss_overrange() 1099 chip->capture_substream->runtime->overrange++; snd_wss_overrange() 1105 struct snd_wss *chip = dev_id; snd_wss_interrupt() local 1108 if (chip->hardware & WSS_HW_AD1848_MASK) snd_wss_interrupt() 1112 status = snd_wss_in(chip, CS4231_IRQ_STATUS); snd_wss_interrupt() 1114 if (chip->timer) snd_wss_interrupt() 1115 snd_timer_interrupt(chip->timer, chip->timer->sticks); snd_wss_interrupt() 1117 if (chip->single_dma && chip->hardware != WSS_HW_INTERWAVE) { snd_wss_interrupt() 1119 if (chip->mode & WSS_MODE_PLAY) { snd_wss_interrupt() 1120 if (chip->playback_substream) snd_wss_interrupt() 1121 snd_pcm_period_elapsed(chip->playback_substream); snd_wss_interrupt() 1123 if (chip->mode & WSS_MODE_RECORD) { snd_wss_interrupt() 1124 if (chip->capture_substream) { snd_wss_interrupt() 1125 snd_wss_overrange(chip); snd_wss_interrupt() 1126 snd_pcm_period_elapsed(chip->capture_substream); snd_wss_interrupt() 1132 if (chip->playback_substream) snd_wss_interrupt() 1133 snd_pcm_period_elapsed(chip->playback_substream); snd_wss_interrupt() 1136 if (chip->capture_substream) { snd_wss_interrupt() 1137 snd_wss_overrange(chip); snd_wss_interrupt() 1138 snd_pcm_period_elapsed(chip->capture_substream); snd_wss_interrupt() 1143 spin_lock(&chip->reg_lock); snd_wss_interrupt() 1145 if (chip->hardware & WSS_HW_AD1848_MASK) snd_wss_interrupt() 1146 wss_outb(chip, CS4231P(STATUS), 0); snd_wss_interrupt() 1148 snd_wss_out(chip, CS4231_IRQ_STATUS, status); snd_wss_interrupt() 1149 spin_unlock(&chip->reg_lock); snd_wss_interrupt() 1156 struct snd_wss *chip = snd_pcm_substream_chip(substream); snd_wss_playback_pointer() local 1159 if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE)) snd_wss_playback_pointer() 1161 ptr = snd_dma_pointer(chip->dma1, chip->p_dma_size); snd_wss_playback_pointer() 1167 struct snd_wss *chip = snd_pcm_substream_chip(substream); snd_wss_capture_pointer() local 1170 if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE)) snd_wss_capture_pointer() 1172 ptr = snd_dma_pointer(chip->dma2, chip->c_dma_size); snd_wss_capture_pointer() 1180 static int snd_ad1848_probe(struct snd_wss *chip) snd_ad1848_probe() argument 1189 while (wss_inb(chip, CS4231P(REGSEL)) & CS4231_INIT) { snd_ad1848_probe() 1194 spin_lock_irqsave(&chip->reg_lock, flags); snd_ad1848_probe() 1197 snd_wss_dout(chip, CS4231_MISC_INFO, 0); snd_ad1848_probe() 1199 snd_wss_dout(chip, CS4231_RIGHT_INPUT, 0x45); /* 0x55 & ~0x10 */ snd_ad1848_probe() 1200 r = snd_wss_in(chip, CS4231_RIGHT_INPUT); snd_ad1848_probe() 1209 snd_wss_dout(chip, CS4231_LEFT_INPUT, 0xaa); snd_ad1848_probe() 1210 r = snd_wss_in(chip, CS4231_LEFT_INPUT); snd_ad1848_probe() 1219 wss_inb(chip, CS4231P(STATUS)); snd_ad1848_probe() 1220 wss_outb(chip, CS4231P(STATUS), 0); snd_ad1848_probe() 1223 if ((chip->hardware & WSS_HW_TYPE_MASK) != WSS_HW_DETECT) snd_ad1848_probe() 1227 chip->hardware = hardware; snd_ad1848_probe() 1231 r = snd_wss_in(chip, CS4231_MISC_INFO); snd_ad1848_probe() 1234 snd_wss_dout(chip, CS4231_MISC_INFO, CS4231_MODE2); snd_ad1848_probe() 1236 if (snd_wss_in(chip, i) != snd_wss_in(chip, 16 + i)) { snd_ad1848_probe() 1244 snd_wss_dout(chip, CS4231_VERSION, 0); snd_ad1848_probe() 1245 r = snd_wss_in(chip, CS4231_VERSION) & 0xe7; snd_ad1848_probe() 1247 chip->hardware = WSS_HW_CMI8330; snd_ad1848_probe() 1252 chip->hardware = WSS_HW_CS4248; snd_ad1848_probe() 1254 chip->hardware = WSS_HW_AD1848; snd_ad1848_probe() 1256 snd_wss_dout(chip, CS4231_MISC_INFO, 0); snd_ad1848_probe() 1258 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_ad1848_probe() 1262 static int snd_wss_probe(struct snd_wss *chip) snd_wss_probe() argument 1269 id = snd_ad1848_probe(chip); snd_wss_probe() 1273 hw = chip->hardware; snd_wss_probe() 1277 if (wss_inb(chip, CS4231P(REGSEL)) & CS4231_INIT) snd_wss_probe() 1280 spin_lock_irqsave(&chip->reg_lock, flags); snd_wss_probe() 1281 snd_wss_out(chip, CS4231_MISC_INFO, snd_wss_probe() 1283 id = snd_wss_in(chip, CS4231_MISC_INFO) & 0x0f; snd_wss_probe() 1284 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_wss_probe() 1289 snd_printdd("wss: port = 0x%lx, id = 0x%x\n", chip->port, id); snd_wss_probe() 1293 rev = snd_wss_in(chip, CS4231_VERSION) & 0xe7; snd_wss_probe() 1296 unsigned char tmp = snd_wss_in(chip, 23); snd_wss_probe() 1297 snd_wss_out(chip, 23, ~tmp); snd_wss_probe() 1298 if (snd_wss_in(chip, 23) != tmp) snd_wss_probe() 1299 chip->hardware = WSS_HW_AD1845; snd_wss_probe() 1301 chip->hardware = WSS_HW_CS4231; snd_wss_probe() 1303 chip->hardware = WSS_HW_CS4231A; snd_wss_probe() 1305 chip->hardware = WSS_HW_CS4232; snd_wss_probe() 1307 chip->hardware = WSS_HW_CS4232A; snd_wss_probe() 1309 chip->hardware = WSS_HW_CS4236; snd_wss_probe() 1311 chip->hardware = WSS_HW_CS4236B; snd_wss_probe() 1314 "unknown CS chip with version 0x%x\n", rev); snd_wss_probe() 1315 return -ENODEV; /* unknown CS4231 chip? */ snd_wss_probe() 1318 spin_lock_irqsave(&chip->reg_lock, flags); snd_wss_probe() 1319 wss_inb(chip, CS4231P(STATUS)); /* clear any pendings IRQ */ snd_wss_probe() 1320 wss_outb(chip, CS4231P(STATUS), 0); snd_wss_probe() 1322 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_wss_probe() 1324 if (!(chip->hardware & WSS_HW_AD1848_MASK)) snd_wss_probe() 1325 chip->image[CS4231_MISC_INFO] = CS4231_MODE2; snd_wss_probe() 1326 switch (chip->hardware) { snd_wss_probe() 1328 chip->image[CS4231_MISC_INFO] = CS4231_IW_MODE3; snd_wss_probe() 1336 chip->image[CS4231_MISC_INFO] = CS4231_4236_MODE3; snd_wss_probe() 1338 chip->hardware = WSS_HW_CS4236; snd_wss_probe() 1342 chip->image[CS4231_IFACE_CTRL] = snd_wss_probe() 1343 (chip->image[CS4231_IFACE_CTRL] & ~CS4231_SINGLE_DMA) | snd_wss_probe() 1344 (chip->single_dma ? CS4231_SINGLE_DMA : 0); snd_wss_probe() 1345 if (chip->hardware != WSS_HW_OPTI93X) { snd_wss_probe() 1346 chip->image[CS4231_ALT_FEATURE_1] = 0x80; snd_wss_probe() 1347 chip->image[CS4231_ALT_FEATURE_2] = snd_wss_probe() 1348 chip->hardware == WSS_HW_INTERWAVE ? 0xc2 : 0x01; snd_wss_probe() 1351 if (chip->hardware == WSS_HW_AD1845) snd_wss_probe() 1352 chip->image[AD1845_PWR_DOWN] = 8; snd_wss_probe() 1354 ptr = (unsigned char *) &chip->image; snd_wss_probe() 1355 regnum = (chip->hardware & WSS_HW_AD1848_MASK) ? 16 : 32; snd_wss_probe() 1356 snd_wss_mce_down(chip); snd_wss_probe() 1357 spin_lock_irqsave(&chip->reg_lock, flags); snd_wss_probe() 1359 snd_wss_out(chip, i, *ptr++); snd_wss_probe() 1360 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_wss_probe() 1361 snd_wss_mce_up(chip); snd_wss_probe() 1362 snd_wss_mce_down(chip); snd_wss_probe() 1368 if (chip->hardware == WSS_HW_CS4236B) { snd_wss_probe() 1369 rev = snd_cs4236_ext_in(chip, CS4236_VERSION); snd_wss_probe() 1370 snd_cs4236_ext_out(chip, CS4236_VERSION, 0xff); snd_wss_probe() 1371 id = snd_cs4236_ext_in(chip, CS4236_VERSION); snd_wss_probe() 1372 snd_cs4236_ext_out(chip, CS4236_VERSION, rev); snd_wss_probe() 1375 chip->hardware = WSS_HW_CS4235; snd_wss_probe() 1383 "unknown CS4235 chip " snd_wss_probe() 1393 chip->hardware = WSS_HW_CS4236B; snd_wss_probe() 1397 "unknown CS4236 chip " snd_wss_probe() 1402 chip->hardware = WSS_HW_CS4237B; snd_wss_probe() 1411 "unknown CS4237B chip " snd_wss_probe() 1416 chip->hardware = WSS_HW_CS4238B; snd_wss_probe() 1424 "unknown CS4238B chip " snd_wss_probe() 1429 chip->hardware = WSS_HW_CS4239; snd_wss_probe() 1437 "unknown CS4239 chip " snd_wss_probe() 1443 "unknown CS4236/CS423xB chip " snd_wss_probe() 1502 struct snd_wss *chip = snd_pcm_substream_chip(substream); snd_wss_playback_open() local 1509 if (chip->hardware & WSS_HW_AD1848_MASK) snd_wss_playback_open() 1514 if (chip->hardware == WSS_HW_INTERWAVE && chip->dma1 > 3) snd_wss_playback_open() 1518 if (chip->hardware == WSS_HW_CS4235 || snd_wss_playback_open() 1519 chip->hardware == WSS_HW_CS4239) snd_wss_playback_open() 1522 snd_pcm_limit_isa_dma_size(chip->dma1, &runtime->hw.buffer_bytes_max); snd_wss_playback_open() 1523 snd_pcm_limit_isa_dma_size(chip->dma1, &runtime->hw.period_bytes_max); snd_wss_playback_open() 1525 if (chip->claim_dma) { snd_wss_playback_open() 1526 if ((err = chip->claim_dma(chip, chip->dma_private_data, chip->dma1)) < 0) snd_wss_playback_open() 1530 err = snd_wss_open(chip, WSS_MODE_PLAY); snd_wss_playback_open() 1532 if (chip->release_dma) snd_wss_playback_open() 1533 chip->release_dma(chip, chip->dma_private_data, chip->dma1); snd_wss_playback_open() 1537 chip->playback_substream = substream; snd_wss_playback_open() 1539 chip->rate_constraint(runtime); snd_wss_playback_open() 1545 struct snd_wss *chip = snd_pcm_substream_chip(substream); snd_wss_capture_open() local 1552 if (chip->hardware & WSS_HW_AD1848_MASK) snd_wss_capture_open() 1557 if (chip->hardware == WSS_HW_CS4235 || snd_wss_capture_open() 1558 chip->hardware == WSS_HW_CS4239 || snd_wss_capture_open() 1559 chip->hardware == WSS_HW_OPTI93X) snd_wss_capture_open() 1563 snd_pcm_limit_isa_dma_size(chip->dma2, &runtime->hw.buffer_bytes_max); snd_wss_capture_open() 1564 snd_pcm_limit_isa_dma_size(chip->dma2, &runtime->hw.period_bytes_max); snd_wss_capture_open() 1566 if (chip->claim_dma) { snd_wss_capture_open() 1567 if ((err = chip->claim_dma(chip, chip->dma_private_data, chip->dma2)) < 0) snd_wss_capture_open() 1571 err = snd_wss_open(chip, WSS_MODE_RECORD); snd_wss_capture_open() 1573 if (chip->release_dma) snd_wss_capture_open() 1574 chip->release_dma(chip, chip->dma_private_data, chip->dma2); snd_wss_capture_open() 1578 chip->capture_substream = substream; snd_wss_capture_open() 1580 chip->rate_constraint(runtime); snd_wss_capture_open() 1586 struct snd_wss *chip = snd_pcm_substream_chip(substream); snd_wss_playback_close() local 1588 chip->playback_substream = NULL; snd_wss_playback_close() 1589 snd_wss_close(chip, WSS_MODE_PLAY); snd_wss_playback_close() 1595 struct snd_wss *chip = snd_pcm_substream_chip(substream); snd_wss_capture_close() local 1597 chip->capture_substream = NULL; snd_wss_capture_close() 1598 snd_wss_close(chip, WSS_MODE_RECORD); snd_wss_capture_close() 1602 static void snd_wss_thinkpad_twiddle(struct snd_wss *chip, int on) snd_wss_thinkpad_twiddle() argument 1606 if (!chip->thinkpad_flag) snd_wss_thinkpad_twiddle() 1625 static void snd_wss_suspend(struct snd_wss *chip) snd_wss_suspend() argument 1630 snd_pcm_suspend_all(chip->pcm); snd_wss_suspend() 1631 spin_lock_irqsave(&chip->reg_lock, flags); snd_wss_suspend() 1633 chip->image[reg] = snd_wss_in(chip, reg); snd_wss_suspend() 1634 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_wss_suspend() 1635 if (chip->thinkpad_flag) snd_wss_suspend() 1636 snd_wss_thinkpad_twiddle(chip, 0); snd_wss_suspend() 1640 static void snd_wss_resume(struct snd_wss *chip) snd_wss_resume() argument 1646 if (chip->thinkpad_flag) snd_wss_resume() 1647 snd_wss_thinkpad_twiddle(chip, 1); snd_wss_resume() 1648 snd_wss_mce_up(chip); snd_wss_resume() 1649 spin_lock_irqsave(&chip->reg_lock, flags); snd_wss_resume() 1655 snd_wss_out(chip, reg, chip->image[reg]); snd_wss_resume() 1660 if (chip->hardware == WSS_HW_OPL3SA2) snd_wss_resume() 1661 snd_wss_out(chip, CS4231_PLAYBK_FORMAT, snd_wss_resume() 1662 chip->image[CS4231_PLAYBK_FORMAT]); snd_wss_resume() 1663 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_wss_resume() 1665 snd_wss_mce_down(chip); snd_wss_resume() 1671 snd_wss_busy_wait(chip); snd_wss_resume() 1672 spin_lock_irqsave(&chip->reg_lock, flags); snd_wss_resume() 1673 chip->mce_bit &= ~CS4231_MCE; snd_wss_resume() 1674 timeout = wss_inb(chip, CS4231P(REGSEL)); snd_wss_resume() 1675 wss_outb(chip, CS4231P(REGSEL), chip->mce_bit | (timeout & 0x1f)); snd_wss_resume() 1676 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_wss_resume() 1679 "- codec still busy\n", chip->port); snd_wss_resume() 1681 !(chip->hardware & (WSS_HW_CS4231_MASK | WSS_HW_CS4232_MASK))) { snd_wss_resume() 1684 snd_wss_busy_wait(chip); snd_wss_resume() 1689 static int snd_wss_free(struct snd_wss *chip) snd_wss_free() argument 1691 release_and_free_resource(chip->res_port); snd_wss_free() 1692 release_and_free_resource(chip->res_cport); snd_wss_free() 1693 if (chip->irq >= 0) { snd_wss_free() 1694 disable_irq(chip->irq); snd_wss_free() 1695 if (!(chip->hwshare & WSS_HWSHARE_IRQ)) snd_wss_free() 1696 free_irq(chip->irq, (void *) chip); snd_wss_free() 1698 if (!(chip->hwshare & WSS_HWSHARE_DMA1) && chip->dma1 >= 0) { snd_wss_free() 1699 snd_dma_disable(chip->dma1); snd_wss_free() 1700 free_dma(chip->dma1); snd_wss_free() 1702 if (!(chip->hwshare & WSS_HWSHARE_DMA2) && snd_wss_free() 1703 chip->dma2 >= 0 && chip->dma2 != chip->dma1) { snd_wss_free() 1704 snd_dma_disable(chip->dma2); snd_wss_free() 1705 free_dma(chip->dma2); snd_wss_free() 1707 if (chip->timer) snd_wss_free() 1708 snd_device_free(chip->card, chip->timer); snd_wss_free() 1709 kfree(chip); snd_wss_free() 1715 struct snd_wss *chip = device->device_data; snd_wss_dev_free() local 1716 return snd_wss_free(chip); snd_wss_dev_free() 1719 const char *snd_wss_chip_id(struct snd_wss *chip) snd_wss_chip_id() argument 1721 switch (chip->hardware) { snd_wss_chip_id() 1745 return chip->card->shortname; snd_wss_chip_id() 1769 struct snd_wss *chip; snd_wss_new() local 1772 chip = kzalloc(sizeof(*chip), GFP_KERNEL); snd_wss_new() 1773 if (chip == NULL) snd_wss_new() 1775 chip->hardware = hardware; snd_wss_new() 1776 chip->hwshare = hwshare; snd_wss_new() 1778 spin_lock_init(&chip->reg_lock); snd_wss_new() 1779 mutex_init(&chip->mce_mutex); snd_wss_new() 1780 mutex_init(&chip->open_mutex); snd_wss_new() 1781 chip->card = card; snd_wss_new() 1782 chip->rate_constraint = snd_wss_xrate; snd_wss_new() 1783 chip->set_playback_format = snd_wss_playback_format; snd_wss_new() 1784 chip->set_capture_format = snd_wss_capture_format; snd_wss_new() 1785 if (chip->hardware == WSS_HW_OPTI93X) snd_wss_new() 1786 memcpy(&chip->image, &snd_opti93x_original_image, snd_wss_new() 1789 memcpy(&chip->image, &snd_wss_original_image, snd_wss_new() 1791 if (chip->hardware & WSS_HW_AD1848_MASK) { snd_wss_new() 1792 chip->image[CS4231_PIN_CTRL] = 0; snd_wss_new() 1793 chip->image[CS4231_TEST_INIT] = 0; snd_wss_new() 1796 *rchip = chip; snd_wss_new() 1811 struct snd_wss *chip; snd_wss_create() local 1814 err = snd_wss_new(card, hardware, hwshare, &chip); snd_wss_create() 1818 chip->irq = -1; snd_wss_create() 1819 chip->dma1 = -1; snd_wss_create() 1820 chip->dma2 = -1; snd_wss_create() 1822 chip->res_port = request_region(port, 4, "WSS"); snd_wss_create() 1823 if (!chip->res_port) { snd_wss_create() 1825 snd_wss_free(chip); snd_wss_create() 1828 chip->port = port; snd_wss_create() 1830 chip->res_cport = request_region(cport, 8, "CS4232 Control"); snd_wss_create() 1831 if (!chip->res_cport) { snd_wss_create() 1834 snd_wss_free(chip); snd_wss_create() 1838 chip->cport = cport; snd_wss_create() 1841 "WSS", (void *) chip)) { snd_wss_create() 1843 snd_wss_free(chip); snd_wss_create() 1846 chip->irq = irq; snd_wss_create() 1849 snd_wss_free(chip); snd_wss_create() 1852 chip->dma1 = dma1; snd_wss_create() 1856 snd_wss_free(chip); snd_wss_create() 1860 chip->single_dma = 1; snd_wss_create() 1861 chip->dma2 = chip->dma1; snd_wss_create() 1863 chip->dma2 = dma2; snd_wss_create() 1866 chip->thinkpad_flag = 1; snd_wss_create() 1867 chip->hardware = WSS_HW_DETECT; /* reset */ snd_wss_create() 1868 snd_wss_thinkpad_twiddle(chip, 1); snd_wss_create() 1872 if (snd_wss_probe(chip) < 0) { snd_wss_create() 1873 snd_wss_free(chip); snd_wss_create() 1876 snd_wss_init(chip); snd_wss_create() 1879 if (chip->hardware & WSS_HW_CS4232_MASK) { snd_wss_create() 1880 if (chip->res_cport == NULL) snd_wss_create() 1887 err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops); snd_wss_create() 1889 snd_wss_free(chip); snd_wss_create() 1895 chip->suspend = snd_wss_suspend; snd_wss_create() 1896 chip->resume = snd_wss_resume; snd_wss_create() 1899 *rchip = chip; snd_wss_create() 1926 int snd_wss_pcm(struct snd_wss *chip, int device) snd_wss_pcm() argument 1931 err = snd_pcm_new(chip->card, "WSS", device, 1, 1, &pcm); snd_wss_pcm() 1939 pcm->private_data = chip; snd_wss_pcm() 1941 if (chip->single_dma) snd_wss_pcm() 1943 if (chip->hardware != WSS_HW_INTERWAVE) snd_wss_pcm() 1945 strcpy(pcm->name, snd_wss_chip_id(chip)); snd_wss_pcm() 1949 64*1024, chip->dma1 > 3 || chip->dma2 > 3 ? 128*1024 : 64*1024); snd_wss_pcm() 1951 chip->pcm = pcm; snd_wss_pcm() 1958 struct snd_wss *chip = timer->private_data; snd_wss_timer_free() local 1959 chip->timer = NULL; snd_wss_timer_free() 1962 int snd_wss_timer(struct snd_wss *chip, int device) snd_wss_timer() argument 1971 tid.card = chip->card->number; snd_wss_timer() 1974 if ((err = snd_timer_new(chip->card, "CS4231", &tid, &timer)) < 0) snd_wss_timer() 1976 strcpy(timer->name, snd_wss_chip_id(chip)); snd_wss_timer() 1977 timer->private_data = chip; snd_wss_timer() 1980 chip->timer = timer; snd_wss_timer() 2002 struct snd_wss *chip = snd_kcontrol_chip(kcontrol); snd_wss_info_mux() local 2004 if (snd_BUG_ON(!chip->card)) snd_wss_info_mux() 2006 if (!strcmp(chip->card->driver, "GUS MAX")) snd_wss_info_mux() 2008 switch (chip->hardware) { snd_wss_info_mux() 2023 struct snd_wss *chip = snd_kcontrol_chip(kcontrol); snd_wss_get_mux() local 2026 spin_lock_irqsave(&chip->reg_lock, flags); snd_wss_get_mux() 2027 ucontrol->value.enumerated.item[0] = (chip->image[CS4231_LEFT_INPUT] & CS4231_MIXS_ALL) >> 6; snd_wss_get_mux() 2028 ucontrol->value.enumerated.item[1] = (chip->image[CS4231_RIGHT_INPUT] & CS4231_MIXS_ALL) >> 6; snd_wss_get_mux() 2029 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_wss_get_mux() 2036 struct snd_wss *chip = snd_kcontrol_chip(kcontrol); snd_wss_put_mux() local 2046 spin_lock_irqsave(&chip->reg_lock, flags); snd_wss_put_mux() 2047 left = (chip->image[CS4231_LEFT_INPUT] & ~CS4231_MIXS_ALL) | left; snd_wss_put_mux() 2048 right = (chip->image[CS4231_RIGHT_INPUT] & ~CS4231_MIXS_ALL) | right; snd_wss_put_mux() 2049 change = left != chip->image[CS4231_LEFT_INPUT] || snd_wss_put_mux() 2050 right != chip->image[CS4231_RIGHT_INPUT]; snd_wss_put_mux() 2051 snd_wss_out(chip, CS4231_LEFT_INPUT, left); snd_wss_put_mux() 2052 snd_wss_out(chip, CS4231_RIGHT_INPUT, right); snd_wss_put_mux() 2053 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_wss_put_mux() 2073 struct snd_wss *chip = snd_kcontrol_chip(kcontrol); snd_wss_get_single() local 2080 spin_lock_irqsave(&chip->reg_lock, flags); snd_wss_get_single() 2081 ucontrol->value.integer.value[0] = (chip->image[reg] >> shift) & mask; snd_wss_get_single() 2082 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_wss_get_single() 2092 struct snd_wss *chip = snd_kcontrol_chip(kcontrol); snd_wss_put_single() local 2105 spin_lock_irqsave(&chip->reg_lock, flags); snd_wss_put_single() 2106 val = (chip->image[reg] & ~(mask << shift)) | val; snd_wss_put_single() 2107 change = val != chip->image[reg]; snd_wss_put_single() 2108 snd_wss_out(chip, reg, val); snd_wss_put_single() 2109 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_wss_put_single() 2130 struct snd_wss *chip = snd_kcontrol_chip(kcontrol); snd_wss_get_double() local 2139 spin_lock_irqsave(&chip->reg_lock, flags); snd_wss_get_double() 2140 ucontrol->value.integer.value[0] = (chip->image[left_reg] >> shift_left) & mask; snd_wss_get_double() 2141 ucontrol->value.integer.value[1] = (chip->image[right_reg] >> shift_right) & mask; snd_wss_get_double() 2142 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_wss_get_double() 2154 struct snd_wss *chip = snd_kcontrol_chip(kcontrol); snd_wss_put_double() local 2173 spin_lock_irqsave(&chip->reg_lock, flags); snd_wss_put_double() 2175 val1 = (chip->image[left_reg] & ~(mask << shift_left)) | val1; snd_wss_put_double() 2176 val2 = (chip->image[right_reg] & ~(mask << shift_right)) | val2; snd_wss_put_double() 2177 change = val1 != chip->image[left_reg] || snd_wss_put_double() 2178 val2 != chip->image[right_reg]; snd_wss_put_double() 2179 snd_wss_out(chip, left_reg, val1); snd_wss_put_double() 2180 snd_wss_out(chip, right_reg, val2); snd_wss_put_double() 2183 val1 = (chip->image[left_reg] & ~mask) | val1 | val2; snd_wss_put_double() 2184 change = val1 != chip->image[left_reg]; snd_wss_put_double() 2185 snd_wss_out(chip, left_reg, val1); snd_wss_put_double() 2187 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_wss_put_double() 2244 int snd_wss_mixer(struct snd_wss *chip) snd_wss_mixer() argument 2251 if (snd_BUG_ON(!chip || !chip->pcm)) snd_wss_mixer() 2254 card = chip->card; snd_wss_mixer() 2256 strcpy(card->mixername, chip->pcm->name); snd_wss_mixer() 2259 if (chip->hardware & WSS_HW_AD1848_MASK) snd_wss_mixer() 2262 else if (chip->hardware == WSS_HW_OPTI93X) snd_wss_mixer() 2268 chip)); snd_wss_mixer()
/linux-4.1.27/sound/isa/sb/
H A D	sb16_main.c	13 * Note: Some chip revisions have hardware bug. Changing capture 15 * 16bit DMA transfers from DSP chip (capture) until 8bit transfer 16 * to DSP chip (playback) starts. This bug can be avoided with 53 static void snd_sb16_csp_playback_prepare(struct snd_sb *chip, struct snd_pcm_runtime *runtime) snd_sb16_csp_playback_prepare() argument 55 if (chip->hardware == SB_HW_16CSP) { snd_sb16_csp_playback_prepare() 56 struct snd_sb_csp *csp = chip->csp; snd_sb16_csp_playback_prepare() 86 if (csp->ops.csp_start(csp, (chip->mode & SB_MODE_PLAYBACK_16) ? snd_sb16_csp_playback_prepare() 94 chip->open = SNDRV_SB_CSP_MODE_DSP_WRITE; snd_sb16_csp_playback_prepare() 101 static void snd_sb16_csp_capture_prepare(struct snd_sb *chip, struct snd_pcm_runtime *runtime) snd_sb16_csp_capture_prepare() argument 103 if (chip->hardware == SB_HW_16CSP) { snd_sb16_csp_capture_prepare() 104 struct snd_sb_csp *csp = chip->csp; snd_sb16_csp_capture_prepare() 124 if (csp->ops.csp_start(csp, (chip->mode & SB_MODE_CAPTURE_16) ? snd_sb16_csp_capture_prepare() 132 chip->open = SNDRV_SB_CSP_MODE_DSP_READ; snd_sb16_csp_capture_prepare() 139 static void snd_sb16_csp_update(struct snd_sb *chip) snd_sb16_csp_update() argument 141 if (chip->hardware == SB_HW_16CSP) { snd_sb16_csp_update() 142 struct snd_sb_csp *csp = chip->csp; snd_sb16_csp_update() 145 spin_lock(&chip->reg_lock); snd_sb16_csp_update() 147 spin_unlock(&chip->reg_lock); snd_sb16_csp_update() 152 static void snd_sb16_csp_playback_open(struct snd_sb *chip, struct snd_pcm_runtime *runtime) snd_sb16_csp_playback_open() argument 155 if (chip->hardware == SB_HW_16CSP) { snd_sb16_csp_playback_open() 156 struct snd_sb_csp *csp = chip->csp; snd_sb16_csp_playback_open() 171 static void snd_sb16_csp_playback_close(struct snd_sb *chip) snd_sb16_csp_playback_close() argument 173 if ((chip->hardware == SB_HW_16CSP) && (chip->open == SNDRV_SB_CSP_MODE_DSP_WRITE)) { snd_sb16_csp_playback_close() 174 struct snd_sb_csp *csp = chip->csp; snd_sb16_csp_playback_close() 178 chip->open = 0; snd_sb16_csp_playback_close() 183 static void snd_sb16_csp_capture_open(struct snd_sb *chip, struct snd_pcm_runtime *runtime) snd_sb16_csp_capture_open() argument 186 if (chip->hardware == SB_HW_16CSP) { snd_sb16_csp_capture_open() 187 struct snd_sb_csp *csp = chip->csp; snd_sb16_csp_capture_open() 202 static void snd_sb16_csp_capture_close(struct snd_sb *chip) snd_sb16_csp_capture_close() argument 204 if ((chip->hardware == SB_HW_16CSP) && (chip->open == SNDRV_SB_CSP_MODE_DSP_READ)) { snd_sb16_csp_capture_close() 205 struct snd_sb_csp *csp = chip->csp; snd_sb16_csp_capture_close() 209 chip->open = 0; snd_sb16_csp_capture_close() 214 #define snd_sb16_csp_playback_prepare(chip, runtime) /*nop*/ 215 #define snd_sb16_csp_capture_prepare(chip, runtime) /*nop*/ 216 #define snd_sb16_csp_update(chip) /*nop*/ 217 #define snd_sb16_csp_playback_open(chip, runtime) /*nop*/ 218 #define snd_sb16_csp_playback_close(chip) /*nop*/ 219 #define snd_sb16_csp_capture_open(chip, runtime) /*nop*/ 220 #define snd_sb16_csp_capture_close(chip) /*nop*/ 224 static void snd_sb16_setup_rate(struct snd_sb *chip, snd_sb16_setup_rate() argument 230 spin_lock_irqsave(&chip->reg_lock, flags); snd_sb16_setup_rate() 231 if (chip->mode & (channel == SNDRV_PCM_STREAM_PLAYBACK ? SB_MODE_PLAYBACK_16 : SB_MODE_CAPTURE_16)) snd_sb16_setup_rate() 232 snd_sb_ack_16bit(chip); snd_sb16_setup_rate() 234 snd_sb_ack_8bit(chip); snd_sb16_setup_rate() 235 if (!(chip->mode & SB_RATE_LOCK)) { snd_sb16_setup_rate() 236 chip->locked_rate = rate; snd_sb16_setup_rate() 237 snd_sbdsp_command(chip, SB_DSP_SAMPLE_RATE_IN); snd_sb16_setup_rate() 238 snd_sbdsp_command(chip, rate >> 8); snd_sb16_setup_rate() 239 snd_sbdsp_command(chip, rate & 0xff); snd_sb16_setup_rate() 240 snd_sbdsp_command(chip, SB_DSP_SAMPLE_RATE_OUT); snd_sb16_setup_rate() 241 snd_sbdsp_command(chip, rate >> 8); snd_sb16_setup_rate() 242 snd_sbdsp_command(chip, rate & 0xff); snd_sb16_setup_rate() 244 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_sb16_setup_rate() 262 struct snd_sb *chip = snd_pcm_substream_chip(substream); snd_sb16_playback_prepare() local 267 snd_sb16_csp_playback_prepare(chip, runtime); snd_sb16_playback_prepare() 274 snd_sb16_setup_rate(chip, runtime->rate, SNDRV_PCM_STREAM_PLAYBACK); snd_sb16_playback_prepare() 275 size = chip->p_dma_size = snd_pcm_lib_buffer_bytes(substream); snd_sb16_playback_prepare() 276 dma = (chip->mode & SB_MODE_PLAYBACK_8) ? chip->dma8 : chip->dma16; snd_sb16_playback_prepare() 280 spin_lock_irqsave(&chip->reg_lock, flags); snd_sb16_playback_prepare() 281 if (chip->mode & SB_MODE_PLAYBACK_16) { snd_sb16_playback_prepare() 284 snd_sbdsp_command(chip, SB_DSP4_OUT16_AI); snd_sb16_playback_prepare() 285 snd_sbdsp_command(chip, format); snd_sb16_playback_prepare() 286 snd_sbdsp_command(chip, count & 0xff); snd_sb16_playback_prepare() 287 snd_sbdsp_command(chip, count >> 8); snd_sb16_playback_prepare() 288 snd_sbdsp_command(chip, SB_DSP_DMA16_OFF); snd_sb16_playback_prepare() 291 snd_sbdsp_command(chip, SB_DSP4_OUT8_AI); snd_sb16_playback_prepare() 292 snd_sbdsp_command(chip, format); snd_sb16_playback_prepare() 293 snd_sbdsp_command(chip, count & 0xff); snd_sb16_playback_prepare() 294 snd_sbdsp_command(chip, count >> 8); snd_sb16_playback_prepare() 295 snd_sbdsp_command(chip, SB_DSP_DMA8_OFF); snd_sb16_playback_prepare() 297 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_sb16_playback_prepare() 304 struct snd_sb *chip = snd_pcm_substream_chip(substream); snd_sb16_playback_trigger() local 307 spin_lock(&chip->reg_lock); snd_sb16_playback_trigger() 311 chip->mode |= SB_RATE_LOCK_PLAYBACK; snd_sb16_playback_trigger() 312 snd_sbdsp_command(chip, chip->mode & SB_MODE_PLAYBACK_16 ? SB_DSP_DMA16_ON : SB_DSP_DMA8_ON); snd_sb16_playback_trigger() 316 snd_sbdsp_command(chip, chip->mode & SB_MODE_PLAYBACK_16 ? SB_DSP_DMA16_OFF : SB_DSP_DMA8_OFF); snd_sb16_playback_trigger() 318 if (chip->mode & SB_RATE_LOCK_CAPTURE) snd_sb16_playback_trigger() 319 snd_sbdsp_command(chip, chip->mode & SB_MODE_CAPTURE_16 ? SB_DSP_DMA16_ON : SB_DSP_DMA8_ON); snd_sb16_playback_trigger() 320 chip->mode &= ~SB_RATE_LOCK_PLAYBACK; snd_sb16_playback_trigger() 325 spin_unlock(&chip->reg_lock); snd_sb16_playback_trigger() 332 struct snd_sb *chip = snd_pcm_substream_chip(substream); snd_sb16_capture_prepare() local 337 snd_sb16_csp_capture_prepare(chip, runtime); snd_sb16_capture_prepare() 343 snd_sb16_setup_rate(chip, runtime->rate, SNDRV_PCM_STREAM_CAPTURE); snd_sb16_capture_prepare() 344 size = chip->c_dma_size = snd_pcm_lib_buffer_bytes(substream); snd_sb16_capture_prepare() 345 dma = (chip->mode & SB_MODE_CAPTURE_8) ? chip->dma8 : chip->dma16; snd_sb16_capture_prepare() 349 spin_lock_irqsave(&chip->reg_lock, flags); snd_sb16_capture_prepare() 350 if (chip->mode & SB_MODE_CAPTURE_16) { snd_sb16_capture_prepare() 353 snd_sbdsp_command(chip, SB_DSP4_IN16_AI); snd_sb16_capture_prepare() 354 snd_sbdsp_command(chip, format); snd_sb16_capture_prepare() 355 snd_sbdsp_command(chip, count & 0xff); snd_sb16_capture_prepare() 356 snd_sbdsp_command(chip, count >> 8); snd_sb16_capture_prepare() 357 snd_sbdsp_command(chip, SB_DSP_DMA16_OFF); snd_sb16_capture_prepare() 360 snd_sbdsp_command(chip, SB_DSP4_IN8_AI); snd_sb16_capture_prepare() 361 snd_sbdsp_command(chip, format); snd_sb16_capture_prepare() 362 snd_sbdsp_command(chip, count & 0xff); snd_sb16_capture_prepare() 363 snd_sbdsp_command(chip, count >> 8); snd_sb16_capture_prepare() 364 snd_sbdsp_command(chip, SB_DSP_DMA8_OFF); snd_sb16_capture_prepare() 366 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_sb16_capture_prepare() 373 struct snd_sb *chip = snd_pcm_substream_chip(substream); snd_sb16_capture_trigger() local 376 spin_lock(&chip->reg_lock); snd_sb16_capture_trigger() 380 chip->mode |= SB_RATE_LOCK_CAPTURE; snd_sb16_capture_trigger() 381 snd_sbdsp_command(chip, chip->mode & SB_MODE_CAPTURE_16 ? SB_DSP_DMA16_ON : SB_DSP_DMA8_ON); snd_sb16_capture_trigger() 385 snd_sbdsp_command(chip, chip->mode & SB_MODE_CAPTURE_16 ? SB_DSP_DMA16_OFF : SB_DSP_DMA8_OFF); snd_sb16_capture_trigger() 387 if (chip->mode & SB_RATE_LOCK_PLAYBACK) snd_sb16_capture_trigger() 388 snd_sbdsp_command(chip, chip->mode & SB_MODE_PLAYBACK_16 ? SB_DSP_DMA16_ON : SB_DSP_DMA8_ON); snd_sb16_capture_trigger() 389 chip->mode &= ~SB_RATE_LOCK_CAPTURE; snd_sb16_capture_trigger() 394 spin_unlock(&chip->reg_lock); snd_sb16_capture_trigger() 400 struct snd_sb *chip = dev_id; snd_sb16dsp_interrupt() local 404 spin_lock(&chip->mixer_lock); snd_sb16dsp_interrupt() 405 status = snd_sbmixer_read(chip, SB_DSP4_IRQSTATUS); snd_sb16dsp_interrupt() 406 spin_unlock(&chip->mixer_lock); snd_sb16dsp_interrupt() 407 if ((status & SB_IRQTYPE_MPUIN) && chip->rmidi_callback) snd_sb16dsp_interrupt() 408 chip->rmidi_callback(irq, chip->rmidi->private_data); snd_sb16dsp_interrupt() 411 if (chip->mode & SB_MODE_PLAYBACK_8) { snd_sb16dsp_interrupt() 412 snd_pcm_period_elapsed(chip->playback_substream); snd_sb16dsp_interrupt() 413 snd_sb16_csp_update(chip); snd_sb16dsp_interrupt() 416 if (chip->mode & SB_MODE_CAPTURE_8) { snd_sb16dsp_interrupt() 417 snd_pcm_period_elapsed(chip->capture_substream); snd_sb16dsp_interrupt() 420 spin_lock(&chip->reg_lock); snd_sb16dsp_interrupt() 422 snd_sbdsp_command(chip, SB_DSP_DMA8_OFF); snd_sb16dsp_interrupt() 423 snd_sb_ack_8bit(chip); snd_sb16dsp_interrupt() 424 spin_unlock(&chip->reg_lock); snd_sb16dsp_interrupt() 428 if (chip->mode & SB_MODE_PLAYBACK_16) { snd_sb16dsp_interrupt() 429 snd_pcm_period_elapsed(chip->playback_substream); snd_sb16dsp_interrupt() 430 snd_sb16_csp_update(chip); snd_sb16dsp_interrupt() 433 if (chip->mode & SB_MODE_CAPTURE_16) { snd_sb16dsp_interrupt() 434 snd_pcm_period_elapsed(chip->capture_substream); snd_sb16dsp_interrupt() 437 spin_lock(&chip->reg_lock); snd_sb16dsp_interrupt() 439 snd_sbdsp_command(chip, SB_DSP_DMA16_OFF); snd_sb16dsp_interrupt() 440 snd_sb_ack_16bit(chip); snd_sb16dsp_interrupt() 441 spin_unlock(&chip->reg_lock); snd_sb16dsp_interrupt() 452 struct snd_sb *chip = snd_pcm_substream_chip(substream); snd_sb16_playback_pointer() local 456 dma = (chip->mode & SB_MODE_PLAYBACK_8) ? chip->dma8 : chip->dma16; snd_sb16_playback_pointer() 457 ptr = snd_dma_pointer(dma, chip->p_dma_size); snd_sb16_playback_pointer() 463 struct snd_sb *chip = snd_pcm_substream_chip(substream); snd_sb16_capture_pointer() local 467 dma = (chip->mode & SB_MODE_CAPTURE_8) ? chip->dma8 : chip->dma16; snd_sb16_capture_pointer() 468 ptr = snd_dma_pointer(dma, chip->c_dma_size); snd_sb16_capture_pointer() 519 struct snd_sb *chip = snd_pcm_substream_chip(substream); snd_sb16_playback_open() local 522 spin_lock_irqsave(&chip->open_lock, flags); snd_sb16_playback_open() 523 if (chip->mode & SB_MODE_PLAYBACK) { snd_sb16_playback_open() 524 spin_unlock_irqrestore(&chip->open_lock, flags); snd_sb16_playback_open() 530 if (chip->force_mode16 & SB_MODE_CAPTURE_16) snd_sb16_playback_open() 533 if (chip->dma16 >= 0 && !(chip->mode & SB_MODE_CAPTURE_16)) { snd_sb16_playback_open() 534 chip->mode |= SB_MODE_PLAYBACK_16; snd_sb16_playback_open() 537 if (chip->dma16 <= 3) { snd_sb16_playback_open() 541 snd_sb16_csp_playback_open(chip, runtime); snd_sb16_playback_open() 547 if (chip->dma8 >= 0 && !(chip->mode & SB_MODE_CAPTURE_8)) { snd_sb16_playback_open() 548 chip->mode |= SB_MODE_PLAYBACK_8; snd_sb16_playback_open() 550 if (chip->dma16 < 0) { snd_sb16_playback_open() 552 chip->mode |= SB_MODE_PLAYBACK_16; snd_sb16_playback_open() 560 spin_unlock_irqrestore(&chip->open_lock, flags); snd_sb16_playback_open() 564 if (chip->hardware == SB_HW_ALS100) snd_sb16_playback_open() 566 if (chip->hardware == SB_HW_CS5530) { snd_sb16_playback_open() 571 if (chip->mode & SB_RATE_LOCK) snd_sb16_playback_open() 572 runtime->hw.rate_min = runtime->hw.rate_max = chip->locked_rate; snd_sb16_playback_open() 573 chip->playback_substream = substream; snd_sb16_playback_open() 574 spin_unlock_irqrestore(&chip->open_lock, flags); snd_sb16_playback_open() 581 struct snd_sb *chip = snd_pcm_substream_chip(substream); snd_sb16_playback_close() local 583 snd_sb16_csp_playback_close(chip); snd_sb16_playback_close() 584 spin_lock_irqsave(&chip->open_lock, flags); snd_sb16_playback_close() 585 chip->playback_substream = NULL; snd_sb16_playback_close() 586 chip->mode &= ~SB_MODE_PLAYBACK; snd_sb16_playback_close() 587 spin_unlock_irqrestore(&chip->open_lock, flags); snd_sb16_playback_close() 594 struct snd_sb *chip = snd_pcm_substream_chip(substream); snd_sb16_capture_open() local 597 spin_lock_irqsave(&chip->open_lock, flags); snd_sb16_capture_open() 598 if (chip->mode & SB_MODE_CAPTURE) { snd_sb16_capture_open() 599 spin_unlock_irqrestore(&chip->open_lock, flags); snd_sb16_capture_open() 605 if (chip->force_mode16 & SB_MODE_PLAYBACK_16) snd_sb16_capture_open() 608 if (chip->dma16 >= 0 && !(chip->mode & SB_MODE_PLAYBACK_16)) { snd_sb16_capture_open() 609 chip->mode |= SB_MODE_CAPTURE_16; snd_sb16_capture_open() 612 if (chip->dma16 <= 3) { snd_sb16_capture_open() 616 snd_sb16_csp_capture_open(chip, runtime); snd_sb16_capture_open() 622 if (chip->dma8 >= 0 && !(chip->mode & SB_MODE_PLAYBACK_8)) { snd_sb16_capture_open() 623 chip->mode |= SB_MODE_CAPTURE_8; snd_sb16_capture_open() 625 if (chip->dma16 < 0) { snd_sb16_capture_open() 627 chip->mode |= SB_MODE_CAPTURE_16; snd_sb16_capture_open() 635 spin_unlock_irqrestore(&chip->open_lock, flags); snd_sb16_capture_open() 639 if (chip->hardware == SB_HW_ALS100) snd_sb16_capture_open() 641 if (chip->hardware == SB_HW_CS5530) { snd_sb16_capture_open() 646 if (chip->mode & SB_RATE_LOCK) snd_sb16_capture_open() 647 runtime->hw.rate_min = runtime->hw.rate_max = chip->locked_rate; snd_sb16_capture_open() 648 chip->capture_substream = substream; snd_sb16_capture_open() 649 spin_unlock_irqrestore(&chip->open_lock, flags); snd_sb16_capture_open() 656 struct snd_sb *chip = snd_pcm_substream_chip(substream); snd_sb16_capture_close() local 658 snd_sb16_csp_capture_close(chip); snd_sb16_capture_close() 659 spin_lock_irqsave(&chip->open_lock, flags); snd_sb16_capture_close() 660 chip->capture_substream = NULL; snd_sb16_capture_close() 661 chip->mode &= ~SB_MODE_CAPTURE; snd_sb16_capture_close() 662 spin_unlock_irqrestore(&chip->open_lock, flags); snd_sb16_capture_close() 670 static int snd_sb16_set_dma_mode(struct snd_sb *chip, int what) snd_sb16_set_dma_mode() argument 672 if (chip->dma8 < 0 || chip->dma16 < 0) { snd_sb16_set_dma_mode() 678 chip->force_mode16 = 0; snd_sb16_set_dma_mode() 680 chip->force_mode16 = SB_MODE_PLAYBACK_16; snd_sb16_set_dma_mode() 682 chip->force_mode16 = SB_MODE_CAPTURE_16; snd_sb16_set_dma_mode() 689 static int snd_sb16_get_dma_mode(struct snd_sb *chip) snd_sb16_get_dma_mode() argument 691 if (chip->dma8 < 0 || chip->dma16 < 0) snd_sb16_get_dma_mode() 693 switch (chip->force_mode16) { snd_sb16_get_dma_mode() 714 struct snd_sb *chip = snd_kcontrol_chip(kcontrol); snd_sb16_dma_control_get() local 717 spin_lock_irqsave(&chip->reg_lock, flags); snd_sb16_dma_control_get() 718 ucontrol->value.enumerated.item[0] = snd_sb16_get_dma_mode(chip); snd_sb16_dma_control_get() 719 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_sb16_dma_control_get() 725 struct snd_sb *chip = snd_kcontrol_chip(kcontrol); snd_sb16_dma_control_put() local 732 spin_lock_irqsave(&chip->reg_lock, flags); snd_sb16_dma_control_put() 733 oval = snd_sb16_get_dma_mode(chip); snd_sb16_dma_control_put() 735 snd_sb16_set_dma_mode(chip, nval); snd_sb16_dma_control_put() 736 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_sb16_dma_control_put() 752 int snd_sb16dsp_configure(struct snd_sb * chip) snd_sb16dsp_configure() argument 759 // printk(KERN_DEBUG "codec->irq=%i, codec->dma8=%i, codec->dma16=%i\n", chip->irq, chip->dma8, chip->dma16); snd_sb16dsp_configure() 760 spin_lock_irqsave(&chip->mixer_lock, flags); snd_sb16dsp_configure() 761 mpureg = snd_sbmixer_read(chip, SB_DSP4_MPUSETUP) & ~0x06; snd_sb16dsp_configure() 762 spin_unlock_irqrestore(&chip->mixer_lock, flags); snd_sb16dsp_configure() 763 switch (chip->irq) { snd_sb16dsp_configure() 780 if (chip->dma8 >= 0) { snd_sb16dsp_configure() 781 switch (chip->dma8) { snd_sb16dsp_configure() 795 if (chip->dma16 >= 0 && chip->dma16 != chip->dma8) { snd_sb16dsp_configure() 796 switch (chip->dma16) { snd_sb16dsp_configure() 810 switch (chip->mpu_port) { snd_sb16dsp_configure() 820 spin_lock_irqsave(&chip->mixer_lock, flags); snd_sb16dsp_configure() 822 snd_sbmixer_write(chip, SB_DSP4_IRQSETUP, irqreg); snd_sb16dsp_configure() 823 realirq = snd_sbmixer_read(chip, SB_DSP4_IRQSETUP); snd_sb16dsp_configure() 825 snd_sbmixer_write(chip, SB_DSP4_DMASETUP, dmareg); snd_sb16dsp_configure() 826 realdma = snd_sbmixer_read(chip, SB_DSP4_DMASETUP); snd_sb16dsp_configure() 828 snd_sbmixer_write(chip, SB_DSP4_MPUSETUP, mpureg); snd_sb16dsp_configure() 829 realmpureg = snd_sbmixer_read(chip, SB_DSP4_MPUSETUP); snd_sb16dsp_configure() 831 spin_unlock_irqrestore(&chip->mixer_lock, flags); snd_sb16dsp_configure() 833 snd_printk(KERN_ERR "SB16 [0x%lx]: unable to set DMA & IRQ (PnP device?)\n", chip->port); snd_sb16dsp_configure() 834 snd_printk(KERN_ERR "SB16 [0x%lx]: wanted: irqreg=0x%x, dmareg=0x%x, mpureg = 0x%x\n", chip->port, realirq, realdma, realmpureg); snd_sb16dsp_configure() 835 snd_printk(KERN_ERR "SB16 [0x%lx]: got: irqreg=0x%x, dmareg=0x%x, mpureg = 0x%x\n", chip->port, irqreg, dmareg, mpureg); snd_sb16dsp_configure() 863 int snd_sb16dsp_pcm(struct snd_sb *chip, int device) snd_sb16dsp_pcm() argument 865 struct snd_card *card = chip->card; snd_sb16dsp_pcm() 871 sprintf(pcm->name, "DSP v%i.%i", chip->version >> 8, chip->version & 0xff); snd_sb16dsp_pcm() 873 pcm->private_data = chip; snd_sb16dsp_pcm() 874 chip->pcm = pcm; snd_sb16dsp_pcm() 879 if (chip->dma16 >= 0 && chip->dma8 != chip->dma16) snd_sb16dsp_pcm() 880 snd_ctl_add(card, snd_ctl_new1(&snd_sb16_dma_control, chip)); snd_sb16dsp_pcm()
H A D	sb8_midi.c	35 irqreturn_t snd_sb8dsp_midi_interrupt(struct snd_sb *chip) snd_sb8dsp_midi_interrupt() argument 41 if (!chip) snd_sb8dsp_midi_interrupt() 44 rmidi = chip->rmidi; snd_sb8dsp_midi_interrupt() 46 inb(SBP(chip, DATA_AVAIL)); /* ack interrupt */ snd_sb8dsp_midi_interrupt() 50 spin_lock(&chip->midi_input_lock); snd_sb8dsp_midi_interrupt() 52 if (inb(SBP(chip, DATA_AVAIL)) & 0x80) { snd_sb8dsp_midi_interrupt() 53 byte = inb(SBP(chip, READ)); snd_sb8dsp_midi_interrupt() 54 if (chip->open & SB_OPEN_MIDI_INPUT_TRIGGER) { snd_sb8dsp_midi_interrupt() 55 snd_rawmidi_receive(chip->midi_substream_input, &byte, 1); snd_sb8dsp_midi_interrupt() 59 spin_unlock(&chip->midi_input_lock); snd_sb8dsp_midi_interrupt() 66 struct snd_sb *chip; snd_sb8dsp_midi_input_open() local 69 chip = substream->rmidi->private_data; snd_sb8dsp_midi_input_open() 70 valid_open_flags = chip->hardware >= SB_HW_20 snd_sb8dsp_midi_input_open() 72 spin_lock_irqsave(&chip->open_lock, flags); snd_sb8dsp_midi_input_open() 73 if (chip->open & ~valid_open_flags) { snd_sb8dsp_midi_input_open() 74 spin_unlock_irqrestore(&chip->open_lock, flags); snd_sb8dsp_midi_input_open() 77 chip->open |= SB_OPEN_MIDI_INPUT; snd_sb8dsp_midi_input_open() 78 chip->midi_substream_input = substream; snd_sb8dsp_midi_input_open() 79 if (!(chip->open & SB_OPEN_MIDI_OUTPUT)) { snd_sb8dsp_midi_input_open() 80 spin_unlock_irqrestore(&chip->open_lock, flags); snd_sb8dsp_midi_input_open() 81 snd_sbdsp_reset(chip); /* reset DSP */ snd_sb8dsp_midi_input_open() 82 if (chip->hardware >= SB_HW_20) snd_sb8dsp_midi_input_open() 83 snd_sbdsp_command(chip, SB_DSP_MIDI_UART_IRQ); snd_sb8dsp_midi_input_open() 85 spin_unlock_irqrestore(&chip->open_lock, flags); snd_sb8dsp_midi_input_open() 93 struct snd_sb *chip; snd_sb8dsp_midi_output_open() local 96 chip = substream->rmidi->private_data; snd_sb8dsp_midi_output_open() 97 valid_open_flags = chip->hardware >= SB_HW_20 snd_sb8dsp_midi_output_open() 99 spin_lock_irqsave(&chip->open_lock, flags); snd_sb8dsp_midi_output_open() 100 if (chip->open & ~valid_open_flags) { snd_sb8dsp_midi_output_open() 101 spin_unlock_irqrestore(&chip->open_lock, flags); snd_sb8dsp_midi_output_open() 104 chip->open |= SB_OPEN_MIDI_OUTPUT; snd_sb8dsp_midi_output_open() 105 chip->midi_substream_output = substream; snd_sb8dsp_midi_output_open() 106 if (!(chip->open & SB_OPEN_MIDI_INPUT)) { snd_sb8dsp_midi_output_open() 107 spin_unlock_irqrestore(&chip->open_lock, flags); snd_sb8dsp_midi_output_open() 108 snd_sbdsp_reset(chip); /* reset DSP */ snd_sb8dsp_midi_output_open() 109 if (chip->hardware >= SB_HW_20) snd_sb8dsp_midi_output_open() 110 snd_sbdsp_command(chip, SB_DSP_MIDI_UART_IRQ); snd_sb8dsp_midi_output_open() 112 spin_unlock_irqrestore(&chip->open_lock, flags); snd_sb8dsp_midi_output_open() 120 struct snd_sb *chip; snd_sb8dsp_midi_input_close() local 122 chip = substream->rmidi->private_data; snd_sb8dsp_midi_input_close() 123 spin_lock_irqsave(&chip->open_lock, flags); snd_sb8dsp_midi_input_close() 124 chip->open &= ~(SB_OPEN_MIDI_INPUT | SB_OPEN_MIDI_INPUT_TRIGGER); snd_sb8dsp_midi_input_close() 125 chip->midi_substream_input = NULL; snd_sb8dsp_midi_input_close() 126 if (!(chip->open & SB_OPEN_MIDI_OUTPUT)) { snd_sb8dsp_midi_input_close() 127 spin_unlock_irqrestore(&chip->open_lock, flags); snd_sb8dsp_midi_input_close() 128 snd_sbdsp_reset(chip); /* reset DSP */ snd_sb8dsp_midi_input_close() 130 spin_unlock_irqrestore(&chip->open_lock, flags); snd_sb8dsp_midi_input_close() 138 struct snd_sb *chip; snd_sb8dsp_midi_output_close() local 140 chip = substream->rmidi->private_data; snd_sb8dsp_midi_output_close() 141 spin_lock_irqsave(&chip->open_lock, flags); snd_sb8dsp_midi_output_close() 142 chip->open &= ~(SB_OPEN_MIDI_OUTPUT | SB_OPEN_MIDI_OUTPUT_TRIGGER); snd_sb8dsp_midi_output_close() 143 chip->midi_substream_output = NULL; snd_sb8dsp_midi_output_close() 144 if (!(chip->open & SB_OPEN_MIDI_INPUT)) { snd_sb8dsp_midi_output_close() 145 spin_unlock_irqrestore(&chip->open_lock, flags); snd_sb8dsp_midi_output_close() 146 snd_sbdsp_reset(chip); /* reset DSP */ snd_sb8dsp_midi_output_close() 148 spin_unlock_irqrestore(&chip->open_lock, flags); snd_sb8dsp_midi_output_close() 156 struct snd_sb *chip; snd_sb8dsp_midi_input_trigger() local 158 chip = substream->rmidi->private_data; snd_sb8dsp_midi_input_trigger() 159 spin_lock_irqsave(&chip->open_lock, flags); snd_sb8dsp_midi_input_trigger() 161 if (!(chip->open & SB_OPEN_MIDI_INPUT_TRIGGER)) { snd_sb8dsp_midi_input_trigger() 162 if (chip->hardware < SB_HW_20) snd_sb8dsp_midi_input_trigger() 163 snd_sbdsp_command(chip, SB_DSP_MIDI_INPUT_IRQ); snd_sb8dsp_midi_input_trigger() 164 chip->open |= SB_OPEN_MIDI_INPUT_TRIGGER; snd_sb8dsp_midi_input_trigger() 167 if (chip->open & SB_OPEN_MIDI_INPUT_TRIGGER) { snd_sb8dsp_midi_input_trigger() 168 if (chip->hardware < SB_HW_20) snd_sb8dsp_midi_input_trigger() 169 snd_sbdsp_command(chip, SB_DSP_MIDI_INPUT_IRQ); snd_sb8dsp_midi_input_trigger() 170 chip->open &= ~SB_OPEN_MIDI_INPUT_TRIGGER; snd_sb8dsp_midi_input_trigger() 173 spin_unlock_irqrestore(&chip->open_lock, flags); snd_sb8dsp_midi_input_trigger() 179 struct snd_sb *chip; snd_sb8dsp_midi_output_write() local 184 chip = substream->rmidi->private_data; snd_sb8dsp_midi_output_write() 186 spin_lock_irqsave(&chip->open_lock, flags); snd_sb8dsp_midi_output_write() 188 chip->open &= ~SB_OPEN_MIDI_OUTPUT_TRIGGER; snd_sb8dsp_midi_output_write() 189 del_timer(&chip->midi_timer); snd_sb8dsp_midi_output_write() 190 spin_unlock_irqrestore(&chip->open_lock, flags); snd_sb8dsp_midi_output_write() 193 if (chip->hardware >= SB_HW_20) { snd_sb8dsp_midi_output_write() 195 while ((inb(SBP(chip, STATUS)) & 0x80) != 0 && --timeout > 0) snd_sb8dsp_midi_output_write() 199 spin_unlock_irqrestore(&chip->open_lock, flags); snd_sb8dsp_midi_output_write() 202 outb(byte, SBP(chip, WRITE)); snd_sb8dsp_midi_output_write() 204 snd_sbdsp_command(chip, SB_DSP_MIDI_OUTPUT); snd_sb8dsp_midi_output_write() 205 snd_sbdsp_command(chip, byte); snd_sb8dsp_midi_output_write() 208 spin_unlock_irqrestore(&chip->open_lock, flags); snd_sb8dsp_midi_output_write() 215 struct snd_sb * chip = substream->rmidi->private_data; snd_sb8dsp_midi_output_timer() local 218 spin_lock_irqsave(&chip->open_lock, flags); snd_sb8dsp_midi_output_timer() 219 mod_timer(&chip->midi_timer, 1 + jiffies); snd_sb8dsp_midi_output_timer() 220 spin_unlock_irqrestore(&chip->open_lock, flags); snd_sb8dsp_midi_output_timer() 227 struct snd_sb *chip; snd_sb8dsp_midi_output_trigger() local 229 chip = substream->rmidi->private_data; snd_sb8dsp_midi_output_trigger() 230 spin_lock_irqsave(&chip->open_lock, flags); snd_sb8dsp_midi_output_trigger() 232 if (!(chip->open & SB_OPEN_MIDI_OUTPUT_TRIGGER)) { snd_sb8dsp_midi_output_trigger() 233 setup_timer(&chip->midi_timer, snd_sb8dsp_midi_output_trigger() 236 mod_timer(&chip->midi_timer, 1 + jiffies); snd_sb8dsp_midi_output_trigger() 237 chip->open |= SB_OPEN_MIDI_OUTPUT_TRIGGER; snd_sb8dsp_midi_output_trigger() 240 if (chip->open & SB_OPEN_MIDI_OUTPUT_TRIGGER) { snd_sb8dsp_midi_output_trigger() 241 chip->open &= ~SB_OPEN_MIDI_OUTPUT_TRIGGER; snd_sb8dsp_midi_output_trigger() 244 spin_unlock_irqrestore(&chip->open_lock, flags); snd_sb8dsp_midi_output_trigger() 264 int snd_sb8dsp_midi(struct snd_sb *chip, int device) snd_sb8dsp_midi() argument 269 if ((err = snd_rawmidi_new(chip->card, "SB8 MIDI", device, 1, 1, &rmidi)) < 0) snd_sb8dsp_midi() 275 if (chip->hardware >= SB_HW_20) snd_sb8dsp_midi() 277 rmidi->private_data = chip; snd_sb8dsp_midi() 278 chip->rmidi = rmidi; snd_sb8dsp_midi()
H A D	sb8_main.c	107 struct snd_sb *chip = snd_pcm_substream_chip(substream); snd_sb8_playback_prepare() local 115 switch (chip->hardware) { snd_sb8_playback_prepare() 118 if (chip->mode & SB_MODE_CAPTURE_16) snd_sb8_playback_prepare() 121 chip->mode |= SB_MODE_PLAYBACK_16; snd_sb8_playback_prepare() 123 chip->playback_format = SB_DSP_LO_OUTPUT_AUTO; snd_sb8_playback_prepare() 130 chip->playback_format = SB_DSP_HI_OUTPUT_AUTO; snd_sb8_playback_prepare() 136 chip->playback_format = SB_DSP_HI_OUTPUT_AUTO; snd_sb8_playback_prepare() 141 chip->playback_format = SB_DSP_LO_OUTPUT_AUTO; snd_sb8_playback_prepare() 144 chip->playback_format = SB_DSP_OUTPUT; snd_sb8_playback_prepare() 149 if (chip->mode & SB_MODE_PLAYBACK_16) { snd_sb8_playback_prepare() 151 dma = chip->dma16; snd_sb8_playback_prepare() 154 chip->mode |= SB_MODE_PLAYBACK_8; snd_sb8_playback_prepare() 155 dma = chip->dma8; snd_sb8_playback_prepare() 157 size = chip->p_dma_size = snd_pcm_lib_buffer_bytes(substream); snd_sb8_playback_prepare() 158 count = chip->p_period_size = snd_pcm_lib_period_bytes(substream); snd_sb8_playback_prepare() 159 spin_lock_irqsave(&chip->reg_lock, flags); snd_sb8_playback_prepare() 160 snd_sbdsp_command(chip, SB_DSP_SPEAKER_ON); snd_sb8_playback_prepare() 161 if (chip->hardware == SB_HW_JAZZ16) snd_sb8_playback_prepare() 162 snd_sbdsp_command(chip, format); snd_sb8_playback_prepare() 165 spin_lock(&chip->mixer_lock); snd_sb8_playback_prepare() 166 mixreg = snd_sbmixer_read(chip, SB_DSP_STEREO_SW); snd_sb8_playback_prepare() 167 snd_sbmixer_write(chip, SB_DSP_STEREO_SW, mixreg | 0x02); snd_sb8_playback_prepare() 168 spin_unlock(&chip->mixer_lock); snd_sb8_playback_prepare() 171 snd_sbdsp_command(chip, SB_DSP_DMA8_EXIT); snd_sb8_playback_prepare() 175 snd_sbdsp_command(chip, SB_DSP_OUTPUT); snd_sb8_playback_prepare() 176 snd_sbdsp_command(chip, 0); snd_sb8_playback_prepare() 177 snd_sbdsp_command(chip, 0); snd_sb8_playback_prepare() 179 snd_sbdsp_command(chip, SB_DSP_SAMPLE_RATE); snd_sb8_playback_prepare() 181 snd_sbdsp_command(chip, 256 - runtime->rate_den / 2); snd_sb8_playback_prepare() 182 spin_lock(&chip->mixer_lock); snd_sb8_playback_prepare() 184 mixreg = snd_sbmixer_read(chip, SB_DSP_PLAYBACK_FILT); snd_sb8_playback_prepare() 185 snd_sbmixer_write(chip, SB_DSP_PLAYBACK_FILT, mixreg | 0x20); snd_sb8_playback_prepare() 186 spin_unlock(&chip->mixer_lock); snd_sb8_playback_prepare() 188 chip->force_mode16 = mixreg; snd_sb8_playback_prepare() 190 snd_sbdsp_command(chip, 256 - runtime->rate_den); snd_sb8_playback_prepare() 192 if (chip->playback_format != SB_DSP_OUTPUT) { snd_sb8_playback_prepare() 193 if (chip->mode & SB_MODE_PLAYBACK_16) snd_sb8_playback_prepare() 196 snd_sbdsp_command(chip, SB_DSP_BLOCK_SIZE); snd_sb8_playback_prepare() 197 snd_sbdsp_command(chip, count & 0xff); snd_sb8_playback_prepare() 198 snd_sbdsp_command(chip, count >> 8); snd_sb8_playback_prepare() 200 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_sb8_playback_prepare() 210 struct snd_sb *chip = snd_pcm_substream_chip(substream); snd_sb8_playback_trigger() local 213 spin_lock_irqsave(&chip->reg_lock, flags); snd_sb8_playback_trigger() 216 snd_sbdsp_command(chip, chip->playback_format); snd_sb8_playback_trigger() 217 if (chip->playback_format == SB_DSP_OUTPUT) { snd_sb8_playback_trigger() 218 count = chip->p_period_size - 1; snd_sb8_playback_trigger() 219 snd_sbdsp_command(chip, count & 0xff); snd_sb8_playback_trigger() 220 snd_sbdsp_command(chip, count >> 8); snd_sb8_playback_trigger() 224 if (chip->playback_format == SB_DSP_HI_OUTPUT_AUTO) { snd_sb8_playback_trigger() 226 snd_sbdsp_reset(chip); snd_sb8_playback_trigger() 228 spin_lock(&chip->mixer_lock); snd_sb8_playback_trigger() 230 snd_sbmixer_write(chip, SB_DSP_STEREO_SW, chip->force_mode16 & ~0x02); snd_sb8_playback_trigger() 231 spin_unlock(&chip->mixer_lock); snd_sb8_playback_trigger() 234 snd_sbdsp_command(chip, SB_DSP_DMA8_OFF); snd_sb8_playback_trigger() 236 snd_sbdsp_command(chip, SB_DSP_SPEAKER_OFF); snd_sb8_playback_trigger() 238 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_sb8_playback_trigger() 257 struct snd_sb *chip = snd_pcm_substream_chip(substream); snd_sb8_capture_prepare() local 265 switch (chip->hardware) { snd_sb8_capture_prepare() 268 if (chip->mode & SB_MODE_PLAYBACK_16) snd_sb8_capture_prepare() 271 chip->mode |= SB_MODE_CAPTURE_16; snd_sb8_capture_prepare() 273 chip->capture_format = SB_DSP_LO_INPUT_AUTO; snd_sb8_capture_prepare() 280 chip->capture_format = SB_DSP_HI_INPUT_AUTO; snd_sb8_capture_prepare() 283 chip->capture_format = (rate > 23000) ? SB_DSP_HI_INPUT_AUTO : SB_DSP_LO_INPUT_AUTO; snd_sb8_capture_prepare() 287 chip->capture_format = SB_DSP_HI_INPUT_AUTO; snd_sb8_capture_prepare() 292 chip->capture_format = SB_DSP_LO_INPUT_AUTO; snd_sb8_capture_prepare() 295 chip->capture_format = SB_DSP_INPUT; snd_sb8_capture_prepare() 300 if (chip->mode & SB_MODE_CAPTURE_16) { snd_sb8_capture_prepare() 302 dma = chip->dma16; snd_sb8_capture_prepare() 305 chip->mode |= SB_MODE_CAPTURE_8; snd_sb8_capture_prepare() 306 dma = chip->dma8; snd_sb8_capture_prepare() 308 size = chip->c_dma_size = snd_pcm_lib_buffer_bytes(substream); snd_sb8_capture_prepare() 309 count = chip->c_period_size = snd_pcm_lib_period_bytes(substream); snd_sb8_capture_prepare() 310 spin_lock_irqsave(&chip->reg_lock, flags); snd_sb8_capture_prepare() 311 snd_sbdsp_command(chip, SB_DSP_SPEAKER_OFF); snd_sb8_capture_prepare() 312 if (chip->hardware == SB_HW_JAZZ16) snd_sb8_capture_prepare() 313 snd_sbdsp_command(chip, format); snd_sb8_capture_prepare() 315 snd_sbdsp_command(chip, SB_DSP_STEREO_8BIT); snd_sb8_capture_prepare() 316 snd_sbdsp_command(chip, SB_DSP_SAMPLE_RATE); snd_sb8_capture_prepare() 318 snd_sbdsp_command(chip, 256 - runtime->rate_den / 2); snd_sb8_capture_prepare() 319 spin_lock(&chip->mixer_lock); snd_sb8_capture_prepare() 321 mixreg = snd_sbmixer_read(chip, SB_DSP_CAPTURE_FILT); snd_sb8_capture_prepare() 322 snd_sbmixer_write(chip, SB_DSP_CAPTURE_FILT, mixreg | 0x20); snd_sb8_capture_prepare() 323 spin_unlock(&chip->mixer_lock); snd_sb8_capture_prepare() 325 chip->force_mode16 = mixreg; snd_sb8_capture_prepare() 327 snd_sbdsp_command(chip, 256 - runtime->rate_den); snd_sb8_capture_prepare() 329 if (chip->capture_format != SB_DSP_INPUT) { snd_sb8_capture_prepare() 330 if (chip->mode & SB_MODE_PLAYBACK_16) snd_sb8_capture_prepare() 333 snd_sbdsp_command(chip, SB_DSP_BLOCK_SIZE); snd_sb8_capture_prepare() 334 snd_sbdsp_command(chip, count & 0xff); snd_sb8_capture_prepare() 335 snd_sbdsp_command(chip, count >> 8); snd_sb8_capture_prepare() 337 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_sb8_capture_prepare() 347 struct snd_sb *chip = snd_pcm_substream_chip(substream); snd_sb8_capture_trigger() local 350 spin_lock_irqsave(&chip->reg_lock, flags); snd_sb8_capture_trigger() 353 snd_sbdsp_command(chip, chip->capture_format); snd_sb8_capture_trigger() 354 if (chip->capture_format == SB_DSP_INPUT) { snd_sb8_capture_trigger() 355 count = chip->c_period_size - 1; snd_sb8_capture_trigger() 356 snd_sbdsp_command(chip, count & 0xff); snd_sb8_capture_trigger() 357 snd_sbdsp_command(chip, count >> 8); snd_sb8_capture_trigger() 361 if (chip->capture_format == SB_DSP_HI_INPUT_AUTO) { snd_sb8_capture_trigger() 363 snd_sbdsp_reset(chip); snd_sb8_capture_trigger() 366 spin_lock(&chip->mixer_lock); snd_sb8_capture_trigger() 367 snd_sbmixer_write(chip, SB_DSP_CAPTURE_FILT, chip->force_mode16); snd_sb8_capture_trigger() 368 spin_unlock(&chip->mixer_lock); snd_sb8_capture_trigger() 370 snd_sbdsp_command(chip, SB_DSP_MONO_8BIT); snd_sb8_capture_trigger() 373 snd_sbdsp_command(chip, SB_DSP_DMA8_OFF); snd_sb8_capture_trigger() 375 snd_sbdsp_command(chip, SB_DSP_SPEAKER_OFF); snd_sb8_capture_trigger() 377 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_sb8_capture_trigger() 381 irqreturn_t snd_sb8dsp_interrupt(struct snd_sb *chip) snd_sb8dsp_interrupt() argument 386 snd_sb_ack_8bit(chip); snd_sb8dsp_interrupt() 387 switch (chip->mode) { snd_sb8dsp_interrupt() 389 if (chip->hardware != SB_HW_JAZZ16) snd_sb8dsp_interrupt() 393 substream = chip->playback_substream; snd_sb8dsp_interrupt() 395 if (chip->playback_format == SB_DSP_OUTPUT) snd_sb8dsp_interrupt() 400 if (chip->hardware != SB_HW_JAZZ16) snd_sb8dsp_interrupt() 404 substream = chip->capture_substream; snd_sb8dsp_interrupt() 406 if (chip->capture_format == SB_DSP_INPUT) snd_sb8dsp_interrupt() 416 struct snd_sb *chip = snd_pcm_substream_chip(substream); snd_sb8_playback_pointer() local 420 if (chip->mode & SB_MODE_PLAYBACK_8) snd_sb8_playback_pointer() 421 dma = chip->dma8; snd_sb8_playback_pointer() 422 else if (chip->mode & SB_MODE_PLAYBACK_16) snd_sb8_playback_pointer() 423 dma = chip->dma16; snd_sb8_playback_pointer() 426 ptr = snd_dma_pointer(dma, chip->p_dma_size); snd_sb8_playback_pointer() 432 struct snd_sb *chip = snd_pcm_substream_chip(substream); snd_sb8_capture_pointer() local 436 if (chip->mode & SB_MODE_CAPTURE_8) snd_sb8_capture_pointer() 437 dma = chip->dma8; snd_sb8_capture_pointer() 438 else if (chip->mode & SB_MODE_CAPTURE_16) snd_sb8_capture_pointer() 439 dma = chip->dma16; snd_sb8_capture_pointer() 442 ptr = snd_dma_pointer(dma, chip->c_dma_size); snd_sb8_capture_pointer() 494 struct snd_sb *chip = snd_pcm_substream_chip(substream); snd_sb8_open() local 498 spin_lock_irqsave(&chip->open_lock, flags); snd_sb8_open() 499 if (chip->open) { snd_sb8_open() 500 spin_unlock_irqrestore(&chip->open_lock, flags); snd_sb8_open() 503 chip->open |= SB_OPEN_PCM; snd_sb8_open() 504 spin_unlock_irqrestore(&chip->open_lock, flags); snd_sb8_open() 506 chip->playback_substream = substream; snd_sb8_open() 509 chip->capture_substream = substream; snd_sb8_open() 512 switch (chip->hardware) { snd_sb8_open() 514 if (chip->dma16 == 5 || chip->dma16 == 7) snd_sb8_open() 543 if (chip->dma8 > 3 || chip->dma16 >= 0) { snd_sb8_open() 557 struct snd_sb *chip = snd_pcm_substream_chip(substream); snd_sb8_close() local 559 chip->playback_substream = NULL; snd_sb8_close() 560 chip->capture_substream = NULL; snd_sb8_close() 561 spin_lock_irqsave(&chip->open_lock, flags); snd_sb8_close() 562 chip->open &= ~SB_OPEN_PCM; snd_sb8_close() 564 chip->mode &= ~SB_MODE_PLAYBACK; snd_sb8_close() 566 chip->mode &= ~SB_MODE_CAPTURE; snd_sb8_close() 567 spin_unlock_irqrestore(&chip->open_lock, flags); snd_sb8_close() 597 int snd_sb8dsp_pcm(struct snd_sb *chip, int device) snd_sb8dsp_pcm() argument 599 struct snd_card *card = chip->card; snd_sb8dsp_pcm() 606 sprintf(pcm->name, "DSP v%i.%i", chip->version >> 8, chip->version & 0xff); snd_sb8dsp_pcm() 608 pcm->private_data = chip; snd_sb8dsp_pcm() 613 if (chip->dma8 > 3 || chip->dma16 >= 0) snd_sb8dsp_pcm()
H A D	sb_common.c	44 int snd_sbdsp_command(struct snd_sb *chip, unsigned char val) snd_sbdsp_command() argument 51 if ((inb(SBP(chip, STATUS)) & 0x80) == 0) { snd_sbdsp_command() 52 outb(val, SBP(chip, COMMAND)); snd_sbdsp_command() 55 snd_printd("%s [0x%lx]: timeout (0x%x)\n", __func__, chip->port, val); snd_sbdsp_command() 59 int snd_sbdsp_get_byte(struct snd_sb *chip) snd_sbdsp_get_byte() argument 64 if (inb(SBP(chip, DATA_AVAIL)) & 0x80) { snd_sbdsp_get_byte() 65 val = inb(SBP(chip, READ)); snd_sbdsp_get_byte() 72 snd_printd("%s [0x%lx]: timeout\n", __func__, chip->port); snd_sbdsp_get_byte() 76 int snd_sbdsp_reset(struct snd_sb *chip) snd_sbdsp_reset() argument 80 outb(1, SBP(chip, RESET)); snd_sbdsp_reset() 82 outb(0, SBP(chip, RESET)); snd_sbdsp_reset() 85 if (inb(SBP(chip, DATA_AVAIL)) & 0x80) { snd_sbdsp_reset() 86 if (inb(SBP(chip, READ)) == 0xaa) snd_sbdsp_reset() 91 snd_printdd("%s [0x%lx] failed...\n", __func__, chip->port); snd_sbdsp_reset() 95 static int snd_sbdsp_version(struct snd_sb * chip) snd_sbdsp_version() argument 99 snd_sbdsp_command(chip, SB_DSP_GET_VERSION); snd_sbdsp_version() 100 result = (short) snd_sbdsp_get_byte(chip) << 8; snd_sbdsp_version() 101 result |= (short) snd_sbdsp_get_byte(chip); snd_sbdsp_version() 105 static int snd_sbdsp_probe(struct snd_sb * chip) snd_sbdsp_probe() argument 116 spin_lock_irqsave(&chip->reg_lock, flags); snd_sbdsp_probe() 117 if (snd_sbdsp_reset(chip) < 0) { snd_sbdsp_probe() 118 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_sbdsp_probe() 121 version = snd_sbdsp_version(chip); snd_sbdsp_probe() 123 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_sbdsp_probe() 126 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_sbdsp_probe() 129 snd_printdd("SB [0x%lx]: DSP chip found, version = %i.%i\n", snd_sbdsp_probe() 130 chip->port, major, minor); snd_sbdsp_probe() 132 switch (chip->hardware) { snd_sbdsp_probe() 136 chip->hardware = SB_HW_10; snd_sbdsp_probe() 141 chip->hardware = SB_HW_201; snd_sbdsp_probe() 144 chip->hardware = SB_HW_20; snd_sbdsp_probe() 149 chip->hardware = SB_HW_PRO; snd_sbdsp_probe() 153 chip->hardware = SB_HW_16; snd_sbdsp_probe() 157 snd_printk(KERN_INFO "SB [0x%lx]: unknown DSP chip version %i.%i\n", snd_sbdsp_probe() 158 chip->port, major, minor); snd_sbdsp_probe() 180 sprintf(chip->name, "Sound Blaster %s", str); snd_sbdsp_probe() 181 chip->version = (major << 8) | minor; snd_sbdsp_probe() 185 static int snd_sbdsp_free(struct snd_sb *chip) snd_sbdsp_free() argument 187 release_and_free_resource(chip->res_port); snd_sbdsp_free() 188 if (chip->irq >= 0) snd_sbdsp_free() 189 free_irq(chip->irq, (void *) chip); snd_sbdsp_free() 191 if (chip->dma8 >= 0) { snd_sbdsp_free() 192 disable_dma(chip->dma8); snd_sbdsp_free() 193 free_dma(chip->dma8); snd_sbdsp_free() 195 if (chip->dma16 >= 0 && chip->dma16 != chip->dma8) { snd_sbdsp_free() 196 disable_dma(chip->dma16); snd_sbdsp_free() 197 free_dma(chip->dma16); snd_sbdsp_free() 200 kfree(chip); snd_sbdsp_free() 206 struct snd_sb *chip = device->device_data; snd_sbdsp_dev_free() local 207 return snd_sbdsp_free(chip); snd_sbdsp_dev_free() 219 struct snd_sb *chip; snd_sbdsp_create() local 228 chip = kzalloc(sizeof(*chip), GFP_KERNEL); snd_sbdsp_create() 229 if (chip == NULL) snd_sbdsp_create() 231 spin_lock_init(&chip->reg_lock); snd_sbdsp_create() 232 spin_lock_init(&chip->open_lock); snd_sbdsp_create() 233 spin_lock_init(&chip->midi_input_lock); snd_sbdsp_create() 234 spin_lock_init(&chip->mixer_lock); snd_sbdsp_create() 235 chip->irq = -1; snd_sbdsp_create() 236 chip->dma8 = -1; snd_sbdsp_create() 237 chip->dma16 = -1; snd_sbdsp_create() 238 chip->port = port; snd_sbdsp_create() 244 "SoundBlaster", (void *) chip)) { snd_sbdsp_create() 246 snd_sbdsp_free(chip); snd_sbdsp_create() 249 chip->irq = irq; snd_sbdsp_create() 254 if ((chip->res_port = request_region(port, 16, "SoundBlaster")) == NULL) { snd_sbdsp_create() 256 snd_sbdsp_free(chip); snd_sbdsp_create() 263 snd_sbdsp_free(chip); snd_sbdsp_create() 266 chip->dma8 = dma8; snd_sbdsp_create() 273 snd_sbdsp_free(chip); snd_sbdsp_create() 277 chip->dma16 = dma16; snd_sbdsp_create() 281 chip->card = card; snd_sbdsp_create() 282 chip->hardware = hardware; snd_sbdsp_create() 283 if ((err = snd_sbdsp_probe(chip)) < 0) { snd_sbdsp_create() 284 snd_sbdsp_free(chip); snd_sbdsp_create() 287 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) { snd_sbdsp_create() 288 snd_sbdsp_free(chip); snd_sbdsp_create() 291 *r_chip = chip; snd_sbdsp_create()
/linux-4.1.27/drivers/gpio/
H A D	gpio-ml-ioh.c	109 struct ioh_gpio *chip = container_of(gpio, struct ioh_gpio, gpio); ioh_gpio_set() local 112 spin_lock_irqsave(&chip->spinlock, flags); ioh_gpio_set() 113 reg_val = ioread32(&chip->reg->regs[chip->ch].po); ioh_gpio_set() 119 iowrite32(reg_val, &chip->reg->regs[chip->ch].po); ioh_gpio_set() 120 spin_unlock_irqrestore(&chip->spinlock, flags); ioh_gpio_set() 125 struct ioh_gpio *chip = container_of(gpio, struct ioh_gpio, gpio); ioh_gpio_get() local 127 return ioread32(&chip->reg->regs[chip->ch].pi) & (1 << nr); ioh_gpio_get() 133 struct ioh_gpio *chip = container_of(gpio, struct ioh_gpio, gpio); ioh_gpio_direction_output() local 138 spin_lock_irqsave(&chip->spinlock, flags); ioh_gpio_direction_output() 139 pm = ioread32(&chip->reg->regs[chip->ch].pm) & ioh_gpio_direction_output() 140 ((1 << num_ports[chip->ch]) - 1); ioh_gpio_direction_output() 142 iowrite32(pm, &chip->reg->regs[chip->ch].pm); ioh_gpio_direction_output() 144 reg_val = ioread32(&chip->reg->regs[chip->ch].po); ioh_gpio_direction_output() 149 iowrite32(reg_val, &chip->reg->regs[chip->ch].po); ioh_gpio_direction_output() 151 spin_unlock_irqrestore(&chip->spinlock, flags); ioh_gpio_direction_output() 158 struct ioh_gpio *chip = container_of(gpio, struct ioh_gpio, gpio); ioh_gpio_direction_input() local 162 spin_lock_irqsave(&chip->spinlock, flags); ioh_gpio_direction_input() 163 pm = ioread32(&chip->reg->regs[chip->ch].pm) & ioh_gpio_direction_input() 164 ((1 << num_ports[chip->ch]) - 1); ioh_gpio_direction_input() 166 iowrite32(pm, &chip->reg->regs[chip->ch].pm); ioh_gpio_direction_input() 167 spin_unlock_irqrestore(&chip->spinlock, flags); ioh_gpio_direction_input() 176 static void ioh_gpio_save_reg_conf(struct ioh_gpio *chip) ioh_gpio_save_reg_conf() argument 180 for (i = 0; i < 8; i ++, chip++) { ioh_gpio_save_reg_conf() 181 chip->ioh_gpio_reg.po_reg = ioh_gpio_save_reg_conf() 182 ioread32(&chip->reg->regs[chip->ch].po); ioh_gpio_save_reg_conf() 183 chip->ioh_gpio_reg.pm_reg = ioh_gpio_save_reg_conf() 184 ioread32(&chip->reg->regs[chip->ch].pm); ioh_gpio_save_reg_conf() 185 chip->ioh_gpio_reg.ien_reg = ioh_gpio_save_reg_conf() 186 ioread32(&chip->reg->regs[chip->ch].ien); ioh_gpio_save_reg_conf() 187 chip->ioh_gpio_reg.imask_reg = ioh_gpio_save_reg_conf() 188 ioread32(&chip->reg->regs[chip->ch].imask); ioh_gpio_save_reg_conf() 189 chip->ioh_gpio_reg.im0_reg = ioh_gpio_save_reg_conf() 190 ioread32(&chip->reg->regs[chip->ch].im_0); ioh_gpio_save_reg_conf() 191 chip->ioh_gpio_reg.im1_reg = ioh_gpio_save_reg_conf() 192 ioread32(&chip->reg->regs[chip->ch].im_1); ioh_gpio_save_reg_conf() 194 chip->ioh_gpio_reg.use_sel_reg = ioh_gpio_save_reg_conf() 195 ioread32(&chip->reg->ioh_sel_reg[i]); ioh_gpio_save_reg_conf() 202 static void ioh_gpio_restore_reg_conf(struct ioh_gpio *chip) ioh_gpio_restore_reg_conf() argument 206 for (i = 0; i < 8; i ++, chip++) { ioh_gpio_restore_reg_conf() 207 iowrite32(chip->ioh_gpio_reg.po_reg, ioh_gpio_restore_reg_conf() 208 &chip->reg->regs[chip->ch].po); ioh_gpio_restore_reg_conf() 209 iowrite32(chip->ioh_gpio_reg.pm_reg, ioh_gpio_restore_reg_conf() 210 &chip->reg->regs[chip->ch].pm); ioh_gpio_restore_reg_conf() 211 iowrite32(chip->ioh_gpio_reg.ien_reg, ioh_gpio_restore_reg_conf() 212 &chip->reg->regs[chip->ch].ien); ioh_gpio_restore_reg_conf() 213 iowrite32(chip->ioh_gpio_reg.imask_reg, ioh_gpio_restore_reg_conf() 214 &chip->reg->regs[chip->ch].imask); ioh_gpio_restore_reg_conf() 215 iowrite32(chip->ioh_gpio_reg.im0_reg, ioh_gpio_restore_reg_conf() 216 &chip->reg->regs[chip->ch].im_0); ioh_gpio_restore_reg_conf() 217 iowrite32(chip->ioh_gpio_reg.im1_reg, ioh_gpio_restore_reg_conf() 218 &chip->reg->regs[chip->ch].im_1); ioh_gpio_restore_reg_conf() 220 iowrite32(chip->ioh_gpio_reg.use_sel_reg, ioh_gpio_restore_reg_conf() 221 &chip->reg->ioh_sel_reg[i]); ioh_gpio_restore_reg_conf() 228 struct ioh_gpio *chip = container_of(gpio, struct ioh_gpio, gpio); ioh_gpio_to_irq() local 229 return chip->irq_base + offset; ioh_gpio_to_irq() 232 static void ioh_gpio_setup(struct ioh_gpio *chip, int num_port) ioh_gpio_setup() argument 234 struct gpio_chip *gpio = &chip->gpio; ioh_gpio_setup() 236 gpio->label = dev_name(chip->dev); ioh_gpio_setup() 260 struct ioh_gpio *chip = gc->private; ioh_irq_type() local 262 ch = irq - chip->irq_base; ioh_irq_type() 263 if (irq <= chip->irq_base + 7) { ioh_irq_type() 264 im_reg = &chip->reg->regs[chip->ch].im_0; ioh_irq_type() 267 im_reg = &chip->reg->regs[chip->ch].im_1; ioh_irq_type() 270 dev_dbg(chip->dev, "%s:irq=%d type=%d ch=%d pos=%d type=%d\n", ioh_irq_type() 273 spin_lock_irqsave(&chip->spinlock, flags); ioh_irq_type() 294 dev_warn(chip->dev, "%s: unknown type(%dd)", ioh_irq_type() 304 iowrite32(BIT(ch), &chip->reg->regs[chip->ch].iclr); ioh_irq_type() 307 iowrite32(BIT(ch), &chip->reg->regs[chip->ch].imaskclr); ioh_irq_type() 310 ien = ioread32(&chip->reg->regs[chip->ch].ien); ioh_irq_type() 311 iowrite32(ien | BIT(ch), &chip->reg->regs[chip->ch].ien); ioh_irq_type() 313 spin_unlock_irqrestore(&chip->spinlock, flags); ioh_irq_type() 321 struct ioh_gpio *chip = gc->private; ioh_irq_unmask() local 323 iowrite32(1 << (d->irq - chip->irq_base), ioh_irq_unmask() 324 &chip->reg->regs[chip->ch].imaskclr); ioh_irq_unmask() 330 struct ioh_gpio *chip = gc->private; ioh_irq_mask() local 332 iowrite32(1 << (d->irq - chip->irq_base), ioh_irq_mask() 333 &chip->reg->regs[chip->ch].imask); ioh_irq_mask() 339 struct ioh_gpio *chip = gc->private; ioh_irq_disable() local 343 spin_lock_irqsave(&chip->spinlock, flags); ioh_irq_disable() 344 ien = ioread32(&chip->reg->regs[chip->ch].ien); ioh_irq_disable() 345 ien &= ~(1 << (d->irq - chip->irq_base)); ioh_irq_disable() 346 iowrite32(ien, &chip->reg->regs[chip->ch].ien); ioh_irq_disable() 347 spin_unlock_irqrestore(&chip->spinlock, flags); ioh_irq_disable() 353 struct ioh_gpio *chip = gc->private; ioh_irq_enable() local 357 spin_lock_irqsave(&chip->spinlock, flags); ioh_irq_enable() 358 ien = ioread32(&chip->reg->regs[chip->ch].ien); ioh_irq_enable() 359 ien |= 1 << (d->irq - chip->irq_base); ioh_irq_enable() 360 iowrite32(ien, &chip->reg->regs[chip->ch].ien); ioh_irq_enable() 361 spin_unlock_irqrestore(&chip->spinlock, flags); ioh_irq_enable() 366 struct ioh_gpio *chip = dev_id; ioh_gpio_handler() local 371 for (i = 0; i < 8; i++, chip++) { ioh_gpio_handler() 372 reg_val = ioread32(&chip->reg->regs[i].istatus); ioh_gpio_handler() 375 dev_dbg(chip->dev, ioh_gpio_handler() 379 &chip->reg->regs[chip->ch].iclr); ioh_gpio_handler() 380 generic_handle_irq(chip->irq_base + j); ioh_gpio_handler() 388 static void ioh_gpio_alloc_generic_chip(struct ioh_gpio *chip, ioh_gpio_alloc_generic_chip() argument 394 gc = irq_alloc_generic_chip("ioh_gpio", 1, irq_start, chip->base, ioh_gpio_alloc_generic_chip() 396 gc->private = chip; ioh_gpio_alloc_generic_chip() 399 ct->chip.irq_mask = ioh_irq_mask; ioh_gpio_alloc_generic_chip() 400 ct->chip.irq_unmask = ioh_irq_unmask; ioh_gpio_alloc_generic_chip() 401 ct->chip.irq_set_type = ioh_irq_type; ioh_gpio_alloc_generic_chip() 402 ct->chip.irq_disable = ioh_irq_disable; ioh_gpio_alloc_generic_chip() 403 ct->chip.irq_enable = ioh_irq_enable; ioh_gpio_alloc_generic_chip() 414 struct ioh_gpio *chip; ioh_gpio_probe() local 438 chip_save = kzalloc(sizeof(*chip) * 8, GFP_KERNEL); ioh_gpio_probe() 445 chip = chip_save; ioh_gpio_probe() 446 for (i = 0; i < 8; i++, chip++) { ioh_gpio_probe() 447 chip->dev = &pdev->dev; ioh_gpio_probe() 448 chip->base = base; ioh_gpio_probe() 449 chip->reg = chip->base; ioh_gpio_probe() 450 chip->ch = i; ioh_gpio_probe() 451 spin_lock_init(&chip->spinlock); ioh_gpio_probe() 452 ioh_gpio_setup(chip, num_ports[i]); ioh_gpio_probe() 453 ret = gpiochip_add(&chip->gpio); ioh_gpio_probe() 460 chip = chip_save; ioh_gpio_probe() 461 for (j = 0; j < 8; j++, chip++) { ioh_gpio_probe() 467 chip->irq_base = -1; ioh_gpio_probe() 471 chip->irq_base = irq_base; ioh_gpio_probe() 472 ioh_gpio_alloc_generic_chip(chip, irq_base, num_ports[j]); ioh_gpio_probe() 475 chip = chip_save; ioh_gpio_probe() 477 IRQF_SHARED, KBUILD_MODNAME, chip); ioh_gpio_probe() 484 pci_set_drvdata(pdev, chip); ioh_gpio_probe() 489 chip = chip_save; ioh_gpio_probe() 492 chip--; ioh_gpio_probe() 493 irq_free_descs(chip->irq_base, num_ports[j]); ioh_gpio_probe() 496 chip = chip_save; ioh_gpio_probe() 499 chip--; ioh_gpio_probe() 500 gpiochip_remove(&chip->gpio); ioh_gpio_probe() 522 struct ioh_gpio *chip = pci_get_drvdata(pdev); ioh_gpio_remove() local 525 chip_save = chip; ioh_gpio_remove() 527 free_irq(pdev->irq, chip); ioh_gpio_remove() 529 for (i = 0; i < 8; i++, chip++) { ioh_gpio_remove() 530 irq_free_descs(chip->irq_base, num_ports[i]); ioh_gpio_remove() 531 gpiochip_remove(&chip->gpio); ioh_gpio_remove() 534 chip = chip_save; ioh_gpio_remove() 535 pci_iounmap(pdev, chip->base); ioh_gpio_remove() 538 kfree(chip); ioh_gpio_remove() 545 struct ioh_gpio *chip = pci_get_drvdata(pdev); ioh_gpio_suspend() local 548 spin_lock_irqsave(&chip->spinlock, flags); ioh_gpio_suspend() 549 ioh_gpio_save_reg_conf(chip); ioh_gpio_suspend() 550 spin_unlock_irqrestore(&chip->spinlock, flags); ioh_gpio_suspend() 569 struct ioh_gpio *chip = pci_get_drvdata(pdev); ioh_gpio_resume() local 582 spin_lock_irqsave(&chip->spinlock, flags); ioh_gpio_resume() 583 iowrite32(0x01, &chip->reg->srst); ioh_gpio_resume() 584 iowrite32(0x00, &chip->reg->srst); ioh_gpio_resume() 585 ioh_gpio_restore_reg_conf(chip); ioh_gpio_resume() 586 spin_unlock_irqrestore(&chip->spinlock, flags); ioh_gpio_resume()
H A D	gpio-sx150x.c	34 /* The chip models of sx150x */ 187 static inline bool offset_is_oscio(struct sx150x_chip *chip, unsigned offset) offset_is_oscio() argument 189 return (chip->dev_cfg->ngpios == offset); offset_is_oscio() 220 static s32 sx150x_write_cfg(struct sx150x_chip *chip, sx150x_write_cfg() argument 229 err = sx150x_i2c_read(chip->client, reg, &data); sx150x_write_cfg() 235 return sx150x_i2c_write(chip->client, reg, data); sx150x_write_cfg() 238 static int sx150x_get_io(struct sx150x_chip *chip, unsigned offset) sx150x_get_io() argument 240 u8 reg = chip->dev_cfg->reg_data; sx150x_get_io() 247 err = sx150x_i2c_read(chip->client, reg, &data); sx150x_get_io() 254 static void sx150x_set_oscio(struct sx150x_chip *chip, int val) sx150x_set_oscio() argument 256 sx150x_i2c_write(chip->client, sx150x_set_oscio() 257 chip->dev_cfg->pri.x789.reg_clock, sx150x_set_oscio() 261 static void sx150x_set_io(struct sx150x_chip *chip, unsigned offset, int val) sx150x_set_io() argument 263 sx150x_write_cfg(chip, sx150x_set_io() 266 chip->dev_cfg->reg_data, sx150x_set_io() 270 static int sx150x_io_input(struct sx150x_chip *chip, unsigned offset) sx150x_io_input() argument 272 return sx150x_write_cfg(chip, sx150x_io_input() 275 chip->dev_cfg->reg_dir, sx150x_io_input() 279 static int sx150x_io_output(struct sx150x_chip *chip, unsigned offset, int val) sx150x_io_output() argument 283 err = sx150x_write_cfg(chip, sx150x_io_output() 286 chip->dev_cfg->reg_data, sx150x_io_output() 289 err = sx150x_write_cfg(chip, sx150x_io_output() 292 chip->dev_cfg->reg_dir, sx150x_io_output() 299 struct sx150x_chip *chip; sx150x_gpio_get() local 302 chip = container_of(gc, struct sx150x_chip, gpio_chip); sx150x_gpio_get() 304 if (!offset_is_oscio(chip, offset)) { sx150x_gpio_get() 305 mutex_lock(&chip->lock); sx150x_gpio_get() 306 status = sx150x_get_io(chip, offset); sx150x_gpio_get() 307 mutex_unlock(&chip->lock); sx150x_gpio_get() 315 struct sx150x_chip *chip; sx150x_gpio_set() local 317 chip = container_of(gc, struct sx150x_chip, gpio_chip); sx150x_gpio_set() 319 mutex_lock(&chip->lock); sx150x_gpio_set() 320 if (offset_is_oscio(chip, offset)) sx150x_gpio_set() 321 sx150x_set_oscio(chip, val); sx150x_gpio_set() 323 sx150x_set_io(chip, offset, val); sx150x_gpio_set() 324 mutex_unlock(&chip->lock); sx150x_gpio_set() 329 struct sx150x_chip *chip; sx150x_gpio_direction_input() local 332 chip = container_of(gc, struct sx150x_chip, gpio_chip); sx150x_gpio_direction_input() 334 if (!offset_is_oscio(chip, offset)) { sx150x_gpio_direction_input() 335 mutex_lock(&chip->lock); sx150x_gpio_direction_input() 336 status = sx150x_io_input(chip, offset); sx150x_gpio_direction_input() 337 mutex_unlock(&chip->lock); sx150x_gpio_direction_input() 346 struct sx150x_chip *chip; sx150x_gpio_direction_output() local 349 chip = container_of(gc, struct sx150x_chip, gpio_chip); sx150x_gpio_direction_output() 351 if (!offset_is_oscio(chip, offset)) { sx150x_gpio_direction_output() 352 mutex_lock(&chip->lock); sx150x_gpio_direction_output() 353 status = sx150x_io_output(chip, offset, val); sx150x_gpio_direction_output() 354 mutex_unlock(&chip->lock); sx150x_gpio_direction_output() 361 struct sx150x_chip *chip = irq_data_get_irq_chip_data(d); sx150x_irq_mask() local 364 chip->irq_masked |= (1 << n); sx150x_irq_mask() 365 chip->irq_update = n; sx150x_irq_mask() 370 struct sx150x_chip *chip = irq_data_get_irq_chip_data(d); sx150x_irq_unmask() local 373 chip->irq_masked &= ~(1 << n); sx150x_irq_unmask() 374 chip->irq_update = n; sx150x_irq_unmask() 379 struct sx150x_chip *chip = irq_data_get_irq_chip_data(d); sx150x_irq_set_type() local 392 chip->irq_sense &= ~(3UL << (n * 2)); sx150x_irq_set_type() 393 chip->irq_sense |= val << (n * 2); sx150x_irq_set_type() 394 chip->irq_update = n; sx150x_irq_set_type() 400 struct sx150x_chip *chip = (struct sx150x_chip *)dev_id; sx150x_irq_thread_fn() local 408 for (i = (chip->dev_cfg->ngpios / 8) - 1; i >= 0; --i) { sx150x_irq_thread_fn() 409 err = sx150x_i2c_read(chip->client, sx150x_irq_thread_fn() 410 chip->dev_cfg->reg_irq_src - i, sx150x_irq_thread_fn() 415 sx150x_i2c_write(chip->client, sx150x_irq_thread_fn() 416 chip->dev_cfg->reg_irq_src - i, sx150x_irq_thread_fn() 421 chip->gpio_chip.irqdomain, sx150x_irq_thread_fn() 434 struct sx150x_chip *chip = irq_data_get_irq_chip_data(d); sx150x_irq_bus_lock() local 436 mutex_lock(&chip->lock); sx150x_irq_bus_lock() 441 struct sx150x_chip *chip = irq_data_get_irq_chip_data(d); sx150x_irq_bus_sync_unlock() local 444 if (chip->irq_update == NO_UPDATE_PENDING) sx150x_irq_bus_sync_unlock() 447 n = chip->irq_update; sx150x_irq_bus_sync_unlock() 448 chip->irq_update = NO_UPDATE_PENDING; sx150x_irq_bus_sync_unlock() 451 if (chip->dev_sense == chip->irq_sense && sx150x_irq_bus_sync_unlock() 452 chip->dev_masked == chip->irq_masked) sx150x_irq_bus_sync_unlock() 455 chip->dev_sense = chip->irq_sense; sx150x_irq_bus_sync_unlock() 456 chip->dev_masked = chip->irq_masked; sx150x_irq_bus_sync_unlock() 458 if (chip->irq_masked & (1 << n)) { sx150x_irq_bus_sync_unlock() 459 sx150x_write_cfg(chip, n, 1, chip->dev_cfg->reg_irq_mask, 1); sx150x_irq_bus_sync_unlock() 460 sx150x_write_cfg(chip, n, 2, chip->dev_cfg->reg_sense, 0); sx150x_irq_bus_sync_unlock() 462 sx150x_write_cfg(chip, n, 1, chip->dev_cfg->reg_irq_mask, 0); sx150x_irq_bus_sync_unlock() 463 sx150x_write_cfg(chip, n, 2, chip->dev_cfg->reg_sense, sx150x_irq_bus_sync_unlock() 464 chip->irq_sense >> (n * 2)); sx150x_irq_bus_sync_unlock() 467 mutex_unlock(&chip->lock); sx150x_irq_bus_sync_unlock() 470 static void sx150x_init_chip(struct sx150x_chip *chip, sx150x_init_chip() argument 475 mutex_init(&chip->lock); sx150x_init_chip() 477 chip->client = client; sx150x_init_chip() 478 chip->dev_cfg = &sx150x_devices[driver_data]; sx150x_init_chip() 479 chip->gpio_chip.dev = &client->dev; sx150x_init_chip() 480 chip->gpio_chip.label = client->name; sx150x_init_chip() 481 chip->gpio_chip.direction_input = sx150x_gpio_direction_input; sx150x_init_chip() 482 chip->gpio_chip.direction_output = sx150x_gpio_direction_output; sx150x_init_chip() 483 chip->gpio_chip.get = sx150x_gpio_get; sx150x_init_chip() 484 chip->gpio_chip.set = sx150x_gpio_set; sx150x_init_chip() 485 chip->gpio_chip.base = pdata->gpio_base; sx150x_init_chip() 486 chip->gpio_chip.can_sleep = true; sx150x_init_chip() 487 chip->gpio_chip.ngpio = chip->dev_cfg->ngpios; sx150x_init_chip() 489 chip->gpio_chip.of_node = client->dev.of_node; sx150x_init_chip() 490 chip->gpio_chip.of_gpio_n_cells = 2; sx150x_init_chip() 493 ++chip->gpio_chip.ngpio; sx150x_init_chip() 495 chip->irq_chip.name = client->name; sx150x_init_chip() 496 chip->irq_chip.irq_mask = sx150x_irq_mask; sx150x_init_chip() 497 chip->irq_chip.irq_unmask = sx150x_irq_unmask; sx150x_init_chip() 498 chip->irq_chip.irq_set_type = sx150x_irq_set_type; sx150x_init_chip() 499 chip->irq_chip.irq_bus_lock = sx150x_irq_bus_lock; sx150x_init_chip() 500 chip->irq_chip.irq_bus_sync_unlock = sx150x_irq_bus_sync_unlock; sx150x_init_chip() 501 chip->irq_summary = -1; sx150x_init_chip() 502 chip->irq_base = -1; sx150x_init_chip() 503 chip->irq_masked = ~0; sx150x_init_chip() 504 chip->irq_sense = 0; sx150x_init_chip() 505 chip->dev_masked = ~0; sx150x_init_chip() 506 chip->dev_sense = 0; sx150x_init_chip() 507 chip->irq_update = NO_UPDATE_PENDING; sx150x_init_chip() 510 static int sx150x_init_io(struct sx150x_chip *chip, u8 base, u16 cfg) sx150x_init_io() argument 515 for (n = 0; err >= 0 && n < (chip->dev_cfg->ngpios / 8); ++n) sx150x_init_io() 516 err = sx150x_i2c_write(chip->client, base - n, cfg >> (n * 8)); sx150x_init_io() 520 static int sx150x_reset(struct sx150x_chip *chip) sx150x_reset() argument 524 err = i2c_smbus_write_byte_data(chip->client, sx150x_reset() 525 chip->dev_cfg->pri.x789.reg_reset, sx150x_reset() 530 err = i2c_smbus_write_byte_data(chip->client, sx150x_reset() 531 chip->dev_cfg->pri.x789.reg_reset, sx150x_reset() 536 static int sx150x_init_hw(struct sx150x_chip *chip, sx150x_init_hw() argument 542 err = sx150x_reset(chip); sx150x_init_hw() 547 if (chip->dev_cfg->model == SX150X_789) sx150x_init_hw() 548 err = sx150x_i2c_write(chip->client, sx150x_init_hw() 549 chip->dev_cfg->pri.x789.reg_misc, sx150x_init_hw() 552 err = sx150x_i2c_write(chip->client, sx150x_init_hw() 553 chip->dev_cfg->pri.x456.reg_advance, sx150x_init_hw() 558 err = sx150x_init_io(chip, chip->dev_cfg->reg_pullup, sx150x_init_hw() 563 err = sx150x_init_io(chip, chip->dev_cfg->reg_pulldn, sx150x_init_hw() 568 if (chip->dev_cfg->model == SX150X_789) { sx150x_init_hw() 569 err = sx150x_init_io(chip, sx150x_init_hw() 570 chip->dev_cfg->pri.x789.reg_drain, sx150x_init_hw() 575 err = sx150x_init_io(chip, sx150x_init_hw() 576 chip->dev_cfg->pri.x789.reg_polarity, sx150x_init_hw() 582 err = sx150x_init_io(chip, sx150x_init_hw() 583 chip->dev_cfg->pri.x456.reg_pld_mode, sx150x_init_hw() 591 sx150x_set_oscio(chip, 0); sx150x_init_hw() 596 static int sx150x_install_irq_chip(struct sx150x_chip *chip, sx150x_install_irq_chip() argument 602 chip->irq_summary = irq_summary; sx150x_install_irq_chip() 603 chip->irq_base = irq_base; sx150x_install_irq_chip() 605 /* Add gpio chip to irq subsystem */ sx150x_install_irq_chip() 606 err = gpiochip_irqchip_add(&chip->gpio_chip, sx150x_install_irq_chip() 607 &chip->irq_chip, chip->irq_base, sx150x_install_irq_chip() 610 dev_err(&chip->client->dev, sx150x_install_irq_chip() 615 err = devm_request_threaded_irq(&chip->client->dev, sx150x_install_irq_chip() 618 chip->irq_chip.name, chip); sx150x_install_irq_chip() 620 chip->irq_summary = -1; sx150x_install_irq_chip() 621 chip->irq_base = -1; sx150x_install_irq_chip() 633 struct sx150x_chip *chip; sx150x_probe() local 643 chip = devm_kzalloc(&client->dev, sx150x_probe() 645 if (!chip) sx150x_probe() 648 sx150x_init_chip(chip, client, id->driver_data, pdata); sx150x_probe() 649 rc = sx150x_init_hw(chip, pdata); sx150x_probe() 653 rc = gpiochip_add(&chip->gpio_chip); sx150x_probe() 658 rc = sx150x_install_irq_chip(chip, sx150x_probe() 665 i2c_set_clientdata(client, chip); sx150x_probe() 669 gpiochip_remove(&chip->gpio_chip); sx150x_probe() 675 struct sx150x_chip *chip; sx150x_remove() local 677 chip = i2c_get_clientdata(client); sx150x_remove() 678 gpiochip_remove(&chip->gpio_chip); sx150x_remove()
H A D	gpio-pch.c	112 struct pch_gpio *chip = container_of(gpio, struct pch_gpio, gpio); pch_gpio_set() local 115 spin_lock_irqsave(&chip->spinlock, flags); pch_gpio_set() 116 reg_val = ioread32(&chip->reg->po); pch_gpio_set() 122 iowrite32(reg_val, &chip->reg->po); pch_gpio_set() 123 spin_unlock_irqrestore(&chip->spinlock, flags); pch_gpio_set() 128 struct pch_gpio *chip = container_of(gpio, struct pch_gpio, gpio); pch_gpio_get() local 130 return ioread32(&chip->reg->pi) & (1 << nr); pch_gpio_get() 136 struct pch_gpio *chip = container_of(gpio, struct pch_gpio, gpio); pch_gpio_direction_output() local 141 spin_lock_irqsave(&chip->spinlock, flags); pch_gpio_direction_output() 143 reg_val = ioread32(&chip->reg->po); pch_gpio_direction_output() 148 iowrite32(reg_val, &chip->reg->po); pch_gpio_direction_output() 150 pm = ioread32(&chip->reg->pm) & ((1 << gpio_pins[chip->ioh]) - 1); pch_gpio_direction_output() 152 iowrite32(pm, &chip->reg->pm); pch_gpio_direction_output() 154 spin_unlock_irqrestore(&chip->spinlock, flags); pch_gpio_direction_output() 161 struct pch_gpio *chip = container_of(gpio, struct pch_gpio, gpio); pch_gpio_direction_input() local 165 spin_lock_irqsave(&chip->spinlock, flags); pch_gpio_direction_input() 166 pm = ioread32(&chip->reg->pm) & ((1 << gpio_pins[chip->ioh]) - 1); pch_gpio_direction_input() 168 iowrite32(pm, &chip->reg->pm); pch_gpio_direction_input() 169 spin_unlock_irqrestore(&chip->spinlock, flags); pch_gpio_direction_input() 178 static void pch_gpio_save_reg_conf(struct pch_gpio *chip) pch_gpio_save_reg_conf() argument 180 chip->pch_gpio_reg.ien_reg = ioread32(&chip->reg->ien); pch_gpio_save_reg_conf() 181 chip->pch_gpio_reg.imask_reg = ioread32(&chip->reg->imask); pch_gpio_save_reg_conf() 182 chip->pch_gpio_reg.po_reg = ioread32(&chip->reg->po); pch_gpio_save_reg_conf() 183 chip->pch_gpio_reg.pm_reg = ioread32(&chip->reg->pm); pch_gpio_save_reg_conf() 184 chip->pch_gpio_reg.im0_reg = ioread32(&chip->reg->im0); pch_gpio_save_reg_conf() 185 if (chip->ioh == INTEL_EG20T_PCH) pch_gpio_save_reg_conf() 186 chip->pch_gpio_reg.im1_reg = ioread32(&chip->reg->im1); pch_gpio_save_reg_conf() 187 if (chip->ioh == OKISEMI_ML7223n_IOH) pch_gpio_save_reg_conf() 188 chip->pch_gpio_reg.gpio_use_sel_reg =\ pch_gpio_save_reg_conf() 189 ioread32(&chip->reg->gpio_use_sel); pch_gpio_save_reg_conf() 195 static void pch_gpio_restore_reg_conf(struct pch_gpio *chip) pch_gpio_restore_reg_conf() argument 197 iowrite32(chip->pch_gpio_reg.ien_reg, &chip->reg->ien); pch_gpio_restore_reg_conf() 198 iowrite32(chip->pch_gpio_reg.imask_reg, &chip->reg->imask); pch_gpio_restore_reg_conf() 200 iowrite32(chip->pch_gpio_reg.po_reg, &chip->reg->po); pch_gpio_restore_reg_conf() 202 iowrite32(chip->pch_gpio_reg.pm_reg, &chip->reg->pm); pch_gpio_restore_reg_conf() 203 iowrite32(chip->pch_gpio_reg.im0_reg, &chip->reg->im0); pch_gpio_restore_reg_conf() 204 if (chip->ioh == INTEL_EG20T_PCH) pch_gpio_restore_reg_conf() 205 iowrite32(chip->pch_gpio_reg.im1_reg, &chip->reg->im1); pch_gpio_restore_reg_conf() 206 if (chip->ioh == OKISEMI_ML7223n_IOH) pch_gpio_restore_reg_conf() 207 iowrite32(chip->pch_gpio_reg.gpio_use_sel_reg, pch_gpio_restore_reg_conf() 208 &chip->reg->gpio_use_sel); pch_gpio_restore_reg_conf() 214 struct pch_gpio *chip = container_of(gpio, struct pch_gpio, gpio); pch_gpio_to_irq() local 215 return chip->irq_base + offset; pch_gpio_to_irq() 218 static void pch_gpio_setup(struct pch_gpio *chip) pch_gpio_setup() argument 220 struct gpio_chip *gpio = &chip->gpio; pch_gpio_setup() 222 gpio->label = dev_name(chip->dev); pch_gpio_setup() 223 gpio->dev = chip->dev; pch_gpio_setup() 231 gpio->ngpio = gpio_pins[chip->ioh]; pch_gpio_setup() 239 struct pch_gpio *chip = gc->private; pch_irq_type() local 245 ch = irq - chip->irq_base; pch_irq_type() 246 if (irq <= chip->irq_base + 7) { pch_irq_type() 247 im_reg = &chip->reg->im0; pch_irq_type() 250 im_reg = &chip->reg->im1; pch_irq_type() 253 dev_dbg(chip->dev, "%s:irq=%d type=%d ch=%d pos=%d\n", pch_irq_type() 256 spin_lock_irqsave(&chip->spinlock, flags); pch_irq_type() 289 spin_unlock_irqrestore(&chip->spinlock, flags); pch_irq_type() 296 struct pch_gpio *chip = gc->private; pch_irq_unmask() local 298 iowrite32(1 << (d->irq - chip->irq_base), &chip->reg->imaskclr); pch_irq_unmask() 304 struct pch_gpio *chip = gc->private; pch_irq_mask() local 306 iowrite32(1 << (d->irq - chip->irq_base), &chip->reg->imask); pch_irq_mask() 312 struct pch_gpio *chip = gc->private; pch_irq_ack() local 314 iowrite32(1 << (d->irq - chip->irq_base), &chip->reg->iclr); pch_irq_ack() 319 struct pch_gpio *chip = dev_id; pch_gpio_handler() local 320 u32 reg_val = ioread32(&chip->reg->istatus); pch_gpio_handler() 323 for (i = 0; i < gpio_pins[chip->ioh]; i++) { pch_gpio_handler() 325 dev_dbg(chip->dev, "%s:[%d]:irq=%d status=0x%x\n", pch_gpio_handler() 327 generic_handle_irq(chip->irq_base + i); pch_gpio_handler() 334 static void pch_gpio_alloc_generic_chip(struct pch_gpio *chip, pch_gpio_alloc_generic_chip() argument 340 gc = irq_alloc_generic_chip("pch_gpio", 1, irq_start, chip->base, pch_gpio_alloc_generic_chip() 342 gc->private = chip; pch_gpio_alloc_generic_chip() 345 ct->chip.irq_ack = pch_irq_ack; pch_gpio_alloc_generic_chip() 346 ct->chip.irq_mask = pch_irq_mask; pch_gpio_alloc_generic_chip() 347 ct->chip.irq_unmask = pch_irq_unmask; pch_gpio_alloc_generic_chip() 348 ct->chip.irq_set_type = pch_irq_type; pch_gpio_alloc_generic_chip() 358 struct pch_gpio *chip; pch_gpio_probe() local 362 chip = kzalloc(sizeof(*chip), GFP_KERNEL); pch_gpio_probe() 363 if (chip == NULL) pch_gpio_probe() 366 chip->dev = &pdev->dev; pch_gpio_probe() 379 chip->base = pci_iomap(pdev, 1, 0); pch_gpio_probe() 380 if (!chip->base) { pch_gpio_probe() 387 chip->ioh = INTEL_EG20T_PCH; pch_gpio_probe() 389 chip->ioh = OKISEMI_ML7223m_IOH; pch_gpio_probe() 391 chip->ioh = OKISEMI_ML7223n_IOH; pch_gpio_probe() 393 chip->reg = chip->base; pch_gpio_probe() 394 pci_set_drvdata(pdev, chip); pch_gpio_probe() 395 spin_lock_init(&chip->spinlock); pch_gpio_probe() 396 pch_gpio_setup(chip); pch_gpio_probe() 397 ret = gpiochip_add(&chip->gpio); pch_gpio_probe() 403 irq_base = irq_alloc_descs(-1, 0, gpio_pins[chip->ioh], NUMA_NO_NODE); pch_gpio_probe() 406 chip->irq_base = -1; pch_gpio_probe() 409 chip->irq_base = irq_base; pch_gpio_probe() 412 msk = (1 << gpio_pins[chip->ioh]) - 1; pch_gpio_probe() 413 iowrite32(msk, &chip->reg->imask); pch_gpio_probe() 414 iowrite32(msk, &chip->reg->ien); pch_gpio_probe() 417 IRQF_SHARED, KBUILD_MODNAME, chip); pch_gpio_probe() 424 pch_gpio_alloc_generic_chip(chip, irq_base, gpio_pins[chip->ioh]); pch_gpio_probe() 430 irq_free_descs(irq_base, gpio_pins[chip->ioh]); pch_gpio_probe() 431 gpiochip_remove(&chip->gpio); pch_gpio_probe() 434 pci_iounmap(pdev, chip->base); pch_gpio_probe() 443 kfree(chip); pch_gpio_probe() 450 struct pch_gpio *chip = pci_get_drvdata(pdev); pch_gpio_remove() local 452 if (chip->irq_base != -1) { pch_gpio_remove() 453 free_irq(pdev->irq, chip); pch_gpio_remove() 455 irq_free_descs(chip->irq_base, gpio_pins[chip->ioh]); pch_gpio_remove() 458 gpiochip_remove(&chip->gpio); pch_gpio_remove() 459 pci_iounmap(pdev, chip->base); pch_gpio_remove() 462 kfree(chip); pch_gpio_remove() 469 struct pch_gpio *chip = pci_get_drvdata(pdev); pch_gpio_suspend() local 472 spin_lock_irqsave(&chip->spinlock, flags); pch_gpio_suspend() 473 pch_gpio_save_reg_conf(chip); pch_gpio_suspend() 474 spin_unlock_irqrestore(&chip->spinlock, flags); pch_gpio_suspend() 493 struct pch_gpio *chip = pci_get_drvdata(pdev); pch_gpio_resume() local 506 spin_lock_irqsave(&chip->spinlock, flags); pch_gpio_resume() 507 iowrite32(0x01, &chip->reg->reset); pch_gpio_resume() 508 iowrite32(0x00, &chip->reg->reset); pch_gpio_resume() 509 pch_gpio_restore_reg_conf(chip); pch_gpio_resume() 510 spin_unlock_irqrestore(&chip->spinlock, flags); pch_gpio_resume()
H A D	gpio-pl061.c	68 struct pl061_gpio *chip = container_of(gc, struct pl061_gpio, gc); pl061_gpio_request() local 71 if (chip->uses_pinctrl) pl061_gpio_request() 78 struct pl061_gpio *chip = container_of(gc, struct pl061_gpio, gc); pl061_gpio_free() local 81 if (chip->uses_pinctrl) pl061_gpio_free() 87 struct pl061_gpio *chip = container_of(gc, struct pl061_gpio, gc); pl061_direction_input() local 94 spin_lock_irqsave(&chip->lock, flags); pl061_direction_input() 95 gpiodir = readb(chip->base + GPIODIR); pl061_direction_input() 97 writeb(gpiodir, chip->base + GPIODIR); pl061_direction_input() 98 spin_unlock_irqrestore(&chip->lock, flags); pl061_direction_input() 106 struct pl061_gpio *chip = container_of(gc, struct pl061_gpio, gc); pl061_direction_output() local 113 spin_lock_irqsave(&chip->lock, flags); pl061_direction_output() 114 writeb(!!value << offset, chip->base + (BIT(offset + 2))); pl061_direction_output() 115 gpiodir = readb(chip->base + GPIODIR); pl061_direction_output() 117 writeb(gpiodir, chip->base + GPIODIR); pl061_direction_output() 123 writeb(!!value << offset, chip->base + (BIT(offset + 2))); pl061_direction_output() 124 spin_unlock_irqrestore(&chip->lock, flags); pl061_direction_output() 131 struct pl061_gpio *chip = container_of(gc, struct pl061_gpio, gc); pl061_get_value() local 133 return !!readb(chip->base + (BIT(offset + 2))); pl061_get_value() 138 struct pl061_gpio *chip = container_of(gc, struct pl061_gpio, gc); pl061_set_value() local 140 writeb(!!value << offset, chip->base + (BIT(offset + 2))); pl061_set_value() 146 struct pl061_gpio *chip = container_of(gc, struct pl061_gpio, gc); pl061_irq_type() local 155 spin_lock_irqsave(&chip->lock, flags); pl061_irq_type() 157 gpioiev = readb(chip->base + GPIOIEV); pl061_irq_type() 158 gpiois = readb(chip->base + GPIOIS); pl061_irq_type() 159 gpioibe = readb(chip->base + GPIOIBE); pl061_irq_type() 181 writeb(gpiois, chip->base + GPIOIS); pl061_irq_type() 182 writeb(gpioibe, chip->base + GPIOIBE); pl061_irq_type() 183 writeb(gpioiev, chip->base + GPIOIEV); pl061_irq_type() 185 spin_unlock_irqrestore(&chip->lock, flags); pl061_irq_type() 195 struct pl061_gpio *chip = container_of(gc, struct pl061_gpio, gc); pl061_irq_handler() local 200 pending = readb(chip->base + GPIOMIS); pl061_irq_handler() 201 writeb(pending, chip->base + GPIOIC); pl061_irq_handler() 214 struct pl061_gpio *chip = container_of(gc, struct pl061_gpio, gc); pl061_irq_mask() local 218 spin_lock(&chip->lock); pl061_irq_mask() 219 gpioie = readb(chip->base + GPIOIE) & ~mask; pl061_irq_mask() 220 writeb(gpioie, chip->base + GPIOIE); pl061_irq_mask() 221 spin_unlock(&chip->lock); pl061_irq_mask() 227 struct pl061_gpio *chip = container_of(gc, struct pl061_gpio, gc); pl061_irq_unmask() local 231 spin_lock(&chip->lock); pl061_irq_unmask() 232 gpioie = readb(chip->base + GPIOIE) | mask; pl061_irq_unmask() 233 writeb(gpioie, chip->base + GPIOIE); pl061_irq_unmask() 234 spin_unlock(&chip->lock); pl061_irq_unmask() 248 struct pl061_gpio *chip; pl061_probe() local 251 chip = devm_kzalloc(dev, sizeof(*chip), GFP_KERNEL); pl061_probe() 252 if (chip == NULL) pl061_probe() 256 chip->gc.base = pdata->gpio_base; pl061_probe() 263 chip->gc.base = -1; pl061_probe() 267 chip->base = devm_ioremap_resource(dev, &adev->res); pl061_probe() 268 if (IS_ERR(chip->base)) pl061_probe() 269 return PTR_ERR(chip->base); pl061_probe() 271 spin_lock_init(&chip->lock); pl061_probe() 273 chip->uses_pinctrl = true; pl061_probe() 275 chip->gc.request = pl061_gpio_request; pl061_probe() 276 chip->gc.free = pl061_gpio_free; pl061_probe() 277 chip->gc.direction_input = pl061_direction_input; pl061_probe() 278 chip->gc.direction_output = pl061_direction_output; pl061_probe() 279 chip->gc.get = pl061_get_value; pl061_probe() 280 chip->gc.set = pl061_set_value; pl061_probe() 281 chip->gc.ngpio = PL061_GPIO_NR; pl061_probe() 282 chip->gc.label = dev_name(dev); pl061_probe() 283 chip->gc.dev = dev; pl061_probe() 284 chip->gc.owner = THIS_MODULE; pl061_probe() 286 ret = gpiochip_add(&chip->gc); pl061_probe() 293 writeb(0, chip->base + GPIOIE); /* disable irqs */ pl061_probe() 300 ret = gpiochip_irqchip_add(&chip->gc, &pl061_irqchip, pl061_probe() 307 gpiochip_set_chained_irqchip(&chip->gc, &pl061_irqchip, pl061_probe() 313 pl061_direction_output(&chip->gc, i, pl061_probe() 316 pl061_direction_input(&chip->gc, i); pl061_probe() 320 amba_set_drvdata(adev, chip); pl061_probe() 321 dev_info(&adev->dev, "PL061 GPIO chip @%pa registered\n", pl061_probe() 330 struct pl061_gpio *chip = dev_get_drvdata(dev); pl061_suspend() local 333 chip->csave_regs.gpio_data = 0; pl061_suspend() 334 chip->csave_regs.gpio_dir = readb(chip->base + GPIODIR); pl061_suspend() 335 chip->csave_regs.gpio_is = readb(chip->base + GPIOIS); pl061_suspend() 336 chip->csave_regs.gpio_ibe = readb(chip->base + GPIOIBE); pl061_suspend() 337 chip->csave_regs.gpio_iev = readb(chip->base + GPIOIEV); pl061_suspend() 338 chip->csave_regs.gpio_ie = readb(chip->base + GPIOIE); pl061_suspend() 341 if (chip->csave_regs.gpio_dir & (BIT(offset))) pl061_suspend() 342 chip->csave_regs.gpio_data |= pl061_suspend() 343 pl061_get_value(&chip->gc, offset) << offset; pl061_suspend() 351 struct pl061_gpio *chip = dev_get_drvdata(dev); pl061_resume() local 355 if (chip->csave_regs.gpio_dir & (BIT(offset))) pl061_resume() 356 pl061_direction_output(&chip->gc, offset, pl061_resume() 357 chip->csave_regs.gpio_data & pl061_resume() 360 pl061_direction_input(&chip->gc, offset); pl061_resume() 363 writeb(chip->csave_regs.gpio_is, chip->base + GPIOIS); pl061_resume() 364 writeb(chip->csave_regs.gpio_ibe, chip->base + GPIOIBE); pl061_resume() 365 writeb(chip->csave_regs.gpio_iev, chip->base + GPIOIEV); pl061_resume() 366 writeb(chip->csave_regs.gpio_ie, chip->base + GPIOIE); pl061_resume()
H A D	gpio-octeon.c	38 struct gpio_chip chip; member in struct:octeon_gpio 42 static int octeon_gpio_dir_in(struct gpio_chip *chip, unsigned offset) octeon_gpio_dir_in() argument 44 struct octeon_gpio *gpio = container_of(chip, struct octeon_gpio, chip); octeon_gpio_dir_in() 50 static void octeon_gpio_set(struct gpio_chip *chip, unsigned offset, int value) octeon_gpio_set() argument 52 struct octeon_gpio *gpio = container_of(chip, struct octeon_gpio, chip); octeon_gpio_set() 58 static int octeon_gpio_dir_out(struct gpio_chip *chip, unsigned offset, octeon_gpio_dir_out() argument 61 struct octeon_gpio *gpio = container_of(chip, struct octeon_gpio, chip); octeon_gpio_dir_out() 64 octeon_gpio_set(chip, offset, value); octeon_gpio_dir_out() 73 static int octeon_gpio_get(struct gpio_chip *chip, unsigned offset) octeon_gpio_get() argument 75 struct octeon_gpio *gpio = container_of(chip, struct octeon_gpio, chip); octeon_gpio_get() 84 struct gpio_chip *chip; octeon_gpio_probe() local 91 chip = &gpio->chip; octeon_gpio_probe() 109 pdev->dev.platform_data = chip; octeon_gpio_probe() 110 chip->label = "octeon-gpio"; octeon_gpio_probe() 111 chip->dev = &pdev->dev; octeon_gpio_probe() 112 chip->owner = THIS_MODULE; octeon_gpio_probe() 113 chip->base = 0; octeon_gpio_probe() 114 chip->can_sleep = false; octeon_gpio_probe() 115 chip->ngpio = 20; octeon_gpio_probe() 116 chip->direction_input = octeon_gpio_dir_in; octeon_gpio_probe() 117 chip->get = octeon_gpio_get; octeon_gpio_probe() 118 chip->direction_output = octeon_gpio_dir_out; octeon_gpio_probe() 119 chip->set = octeon_gpio_set; octeon_gpio_probe() 120 err = gpiochip_add(chip); octeon_gpio_probe() 131 struct gpio_chip *chip = pdev->dev.platform_data; octeon_gpio_remove() local 132 gpiochip_remove(chip); octeon_gpio_remove()
H A D	gpio-74x164.c	34 static int __gen_74x164_write_config(struct gen_74x164_chip *chip) __gen_74x164_write_config() argument 36 struct spi_device *spi = to_spi_device(chip->gpio_chip.dev); __gen_74x164_write_config() 41 msg_buf = kzalloc(chip->registers * sizeof(struct spi_transfer), __gen_74x164_write_config() 56 for (i = chip->registers - 1; i >= 0; i--) { __gen_74x164_write_config() 57 msg_buf[i].tx_buf = chip->buffer + i; __gen_74x164_write_config() 71 struct gen_74x164_chip *chip = gpio_to_74x164_chip(gc); gen_74x164_get_value() local 76 mutex_lock(&chip->lock); gen_74x164_get_value() 77 ret = (chip->buffer[bank] >> pin) & 0x1; gen_74x164_get_value() 78 mutex_unlock(&chip->lock); gen_74x164_get_value() 86 struct gen_74x164_chip *chip = gpio_to_74x164_chip(gc); gen_74x164_set_value() local 90 mutex_lock(&chip->lock); gen_74x164_set_value() 92 chip->buffer[bank] |= (1 << pin); gen_74x164_set_value() 94 chip->buffer[bank] &= ~(1 << pin); gen_74x164_set_value() 96 __gen_74x164_write_config(chip); gen_74x164_set_value() 97 mutex_unlock(&chip->lock); gen_74x164_set_value() 109 struct gen_74x164_chip *chip; gen_74x164_probe() local 121 chip = devm_kzalloc(&spi->dev, sizeof(*chip), GFP_KERNEL); gen_74x164_probe() 122 if (!chip) gen_74x164_probe() 125 spi_set_drvdata(spi, chip); gen_74x164_probe() 127 chip->gpio_chip.label = spi->modalias; gen_74x164_probe() 128 chip->gpio_chip.direction_output = gen_74x164_direction_output; gen_74x164_probe() 129 chip->gpio_chip.get = gen_74x164_get_value; gen_74x164_probe() 130 chip->gpio_chip.set = gen_74x164_set_value; gen_74x164_probe() 131 chip->gpio_chip.base = -1; gen_74x164_probe() 134 &chip->registers)) { gen_74x164_probe() 140 chip->gpio_chip.ngpio = GEN_74X164_NUMBER_GPIOS * chip->registers; gen_74x164_probe() 141 chip->buffer = devm_kzalloc(&spi->dev, chip->registers, GFP_KERNEL); gen_74x164_probe() 142 if (!chip->buffer) gen_74x164_probe() 145 chip->gpio_chip.can_sleep = true; gen_74x164_probe() 146 chip->gpio_chip.dev = &spi->dev; gen_74x164_probe() 147 chip->gpio_chip.owner = THIS_MODULE; gen_74x164_probe() 149 mutex_init(&chip->lock); gen_74x164_probe() 151 ret = __gen_74x164_write_config(chip); gen_74x164_probe() 157 ret = gpiochip_add(&chip->gpio_chip); gen_74x164_probe() 162 mutex_destroy(&chip->lock); gen_74x164_probe() 169 struct gen_74x164_chip *chip = spi_get_drvdata(spi); gen_74x164_remove() local 171 gpiochip_remove(&chip->gpio_chip); gen_74x164_remove() 172 mutex_destroy(&chip->lock); gen_74x164_remove()
H A D	gpio-pca953x.c	79 #define NBANK(chip) (chip->gpio_chip.ngpio / BANK_SZ) 106 static int pca953x_read_single(struct pca953x_chip *chip, int reg, u32 *val, pca953x_read_single() argument 110 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); pca953x_read_single() 113 ret = i2c_smbus_read_byte_data(chip->client, pca953x_read_single() 118 dev_err(&chip->client->dev, "failed reading register\n"); pca953x_read_single() 125 static int pca953x_write_single(struct pca953x_chip *chip, int reg, u32 val, pca953x_write_single() argument 129 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); pca953x_write_single() 132 ret = i2c_smbus_write_byte_data(chip->client, pca953x_write_single() 136 dev_err(&chip->client->dev, "failed writing register\n"); pca953x_write_single() 143 static int pca953x_write_regs(struct pca953x_chip *chip, int reg, u8 *val) pca953x_write_regs() argument 147 if (chip->gpio_chip.ngpio <= 8) pca953x_write_regs() 148 ret = i2c_smbus_write_byte_data(chip->client, reg, *val); pca953x_write_regs() 149 else if (chip->gpio_chip.ngpio >= 24) { pca953x_write_regs() 150 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); pca953x_write_regs() 151 ret = i2c_smbus_write_i2c_block_data(chip->client, pca953x_write_regs() 153 NBANK(chip), val); pca953x_write_regs() 155 switch (chip->chip_type) { pca953x_write_regs() 157 ret = i2c_smbus_write_word_data(chip->client, pca953x_write_regs() 161 ret = i2c_smbus_write_byte_data(chip->client, reg << 1, pca953x_write_regs() 165 ret = i2c_smbus_write_byte_data(chip->client, pca953x_write_regs() 173 dev_err(&chip->client->dev, "failed writing register\n"); pca953x_write_regs() 180 static int pca953x_read_regs(struct pca953x_chip *chip, int reg, u8 *val) pca953x_read_regs() argument 184 if (chip->gpio_chip.ngpio <= 8) { pca953x_read_regs() 185 ret = i2c_smbus_read_byte_data(chip->client, reg); pca953x_read_regs() 187 } else if (chip->gpio_chip.ngpio >= 24) { pca953x_read_regs() 188 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); pca953x_read_regs() 190 ret = i2c_smbus_read_i2c_block_data(chip->client, pca953x_read_regs() 192 NBANK(chip), val); pca953x_read_regs() 194 ret = i2c_smbus_read_word_data(chip->client, reg << 1); pca953x_read_regs() 199 dev_err(&chip->client->dev, "failed reading register\n"); pca953x_read_regs() 208 struct pca953x_chip *chip = to_pca(gc); pca953x_gpio_direction_input() local 212 mutex_lock(&chip->i2c_lock); pca953x_gpio_direction_input() 213 reg_val = chip->reg_direction[off / BANK_SZ] | (1u << (off % BANK_SZ)); pca953x_gpio_direction_input() 215 switch (chip->chip_type) { pca953x_gpio_direction_input() 223 ret = pca953x_write_single(chip, offset, reg_val, off); pca953x_gpio_direction_input() 227 chip->reg_direction[off / BANK_SZ] = reg_val; pca953x_gpio_direction_input() 230 mutex_unlock(&chip->i2c_lock); pca953x_gpio_direction_input() 237 struct pca953x_chip *chip = to_pca(gc); pca953x_gpio_direction_output() local 241 mutex_lock(&chip->i2c_lock); pca953x_gpio_direction_output() 244 reg_val = chip->reg_output[off / BANK_SZ] pca953x_gpio_direction_output() 247 reg_val = chip->reg_output[off / BANK_SZ] pca953x_gpio_direction_output() 250 switch (chip->chip_type) { pca953x_gpio_direction_output() 258 ret = pca953x_write_single(chip, offset, reg_val, off); pca953x_gpio_direction_output() 262 chip->reg_output[off / BANK_SZ] = reg_val; pca953x_gpio_direction_output() 265 reg_val = chip->reg_direction[off / BANK_SZ] & ~(1u << (off % BANK_SZ)); pca953x_gpio_direction_output() 266 switch (chip->chip_type) { pca953x_gpio_direction_output() 274 ret = pca953x_write_single(chip, offset, reg_val, off); pca953x_gpio_direction_output() 278 chip->reg_direction[off / BANK_SZ] = reg_val; pca953x_gpio_direction_output() 281 mutex_unlock(&chip->i2c_lock); pca953x_gpio_direction_output() 287 struct pca953x_chip *chip = to_pca(gc); pca953x_gpio_get_value() local 291 mutex_lock(&chip->i2c_lock); pca953x_gpio_get_value() 292 switch (chip->chip_type) { pca953x_gpio_get_value() 300 ret = pca953x_read_single(chip, offset, &reg_val, off); pca953x_gpio_get_value() 301 mutex_unlock(&chip->i2c_lock); pca953x_gpio_get_value() 315 struct pca953x_chip *chip = to_pca(gc); pca953x_gpio_set_value() local 319 mutex_lock(&chip->i2c_lock); pca953x_gpio_set_value() 321 reg_val = chip->reg_output[off / BANK_SZ] pca953x_gpio_set_value() 324 reg_val = chip->reg_output[off / BANK_SZ] pca953x_gpio_set_value() 327 switch (chip->chip_type) { pca953x_gpio_set_value() 335 ret = pca953x_write_single(chip, offset, reg_val, off); pca953x_gpio_set_value() 339 chip->reg_output[off / BANK_SZ] = reg_val; pca953x_gpio_set_value() 341 mutex_unlock(&chip->i2c_lock); pca953x_gpio_set_value() 344 static void pca953x_setup_gpio(struct pca953x_chip *chip, int gpios) pca953x_setup_gpio() argument 348 gc = &chip->gpio_chip; pca953x_setup_gpio() 356 gc->base = chip->gpio_start; pca953x_setup_gpio() 358 gc->label = chip->client->name; pca953x_setup_gpio() 359 gc->dev = &chip->client->dev; pca953x_setup_gpio() 361 gc->names = chip->names; pca953x_setup_gpio() 368 struct pca953x_chip *chip = to_pca(gc); pca953x_irq_mask() local 370 chip->irq_mask[d->hwirq / BANK_SZ] &= ~(1 << (d->hwirq % BANK_SZ)); pca953x_irq_mask() 376 struct pca953x_chip *chip = to_pca(gc); pca953x_irq_unmask() local 378 chip->irq_mask[d->hwirq / BANK_SZ] |= 1 << (d->hwirq % BANK_SZ); pca953x_irq_unmask() 384 struct pca953x_chip *chip = to_pca(gc); pca953x_irq_bus_lock() local 386 mutex_lock(&chip->irq_lock); pca953x_irq_bus_lock() 392 struct pca953x_chip *chip = to_pca(gc); pca953x_irq_bus_sync_unlock() local 397 for (i = 0; i < NBANK(chip); i++) { pca953x_irq_bus_sync_unlock() 398 new_irqs = chip->irq_trig_fall[i] | chip->irq_trig_raise[i]; pca953x_irq_bus_sync_unlock() 399 new_irqs &= ~chip->reg_direction[i]; pca953x_irq_bus_sync_unlock() 403 pca953x_gpio_direction_input(&chip->gpio_chip, pca953x_irq_bus_sync_unlock() 409 mutex_unlock(&chip->irq_lock); pca953x_irq_bus_sync_unlock() 415 struct pca953x_chip *chip = to_pca(gc); pca953x_irq_set_type() local 420 dev_err(&chip->client->dev, "irq %d: unsupported type %d\n", pca953x_irq_set_type() 426 chip->irq_trig_fall[bank_nb] |= mask; pca953x_irq_set_type() 428 chip->irq_trig_fall[bank_nb] &= ~mask; pca953x_irq_set_type() 431 chip->irq_trig_raise[bank_nb] |= mask; pca953x_irq_set_type() 433 chip->irq_trig_raise[bank_nb] &= ~mask; pca953x_irq_set_type() 447 static u8 pca953x_irq_pending(struct pca953x_chip *chip, u8 *pending) pca953x_irq_pending() argument 455 switch (chip->chip_type) { pca953x_irq_pending() 463 ret = pca953x_read_regs(chip, offset, cur_stat); pca953x_irq_pending() 468 for (i = 0; i < NBANK(chip); i++) pca953x_irq_pending() 469 cur_stat[i] &= chip->reg_direction[i]; pca953x_irq_pending() 471 memcpy(old_stat, chip->irq_stat, NBANK(chip)); pca953x_irq_pending() 473 for (i = 0; i < NBANK(chip); i++) { pca953x_irq_pending() 474 trigger[i] = (cur_stat[i] ^ old_stat[i]) & chip->irq_mask[i]; pca953x_irq_pending() 481 memcpy(chip->irq_stat, cur_stat, NBANK(chip)); pca953x_irq_pending() 483 for (i = 0; i < NBANK(chip); i++) { pca953x_irq_pending() 484 pending[i] = (old_stat[i] & chip->irq_trig_fall[i]) | pca953x_irq_pending() 485 (cur_stat[i] & chip->irq_trig_raise[i]); pca953x_irq_pending() 495 struct pca953x_chip *chip = devid; pca953x_irq_handler() local 501 if (!pca953x_irq_pending(chip, pending)) pca953x_irq_handler() 504 for (i = 0; i < NBANK(chip); i++) { pca953x_irq_handler() 507 handle_nested_irq(irq_find_mapping(chip->gpio_chip.irqdomain, pca953x_irq_handler() 517 static int pca953x_irq_setup(struct pca953x_chip *chip, pca953x_irq_setup() argument 521 struct i2c_client *client = chip->client; pca953x_irq_setup() 527 switch (chip->chip_type) { pca953x_irq_setup() 535 ret = pca953x_read_regs(chip, offset, chip->irq_stat); pca953x_irq_setup() 544 for (i = 0; i < NBANK(chip); i++) pca953x_irq_setup() 545 chip->irq_stat[i] &= chip->reg_direction[i]; pca953x_irq_setup() 546 mutex_init(&chip->irq_lock); pca953x_irq_setup() 554 dev_name(&client->dev), chip); pca953x_irq_setup() 561 ret = gpiochip_irqchip_add(&chip->gpio_chip, pca953x_irq_setup() 577 static int pca953x_irq_setup(struct pca953x_chip *chip, pca953x_irq_setup() argument 581 struct i2c_client *client = chip->client; pca953x_irq_setup() 590 static int device_pca953x_init(struct pca953x_chip *chip, u32 invert) device_pca953x_init() argument 595 ret = pca953x_read_regs(chip, PCA953X_OUTPUT, chip->reg_output); device_pca953x_init() 599 ret = pca953x_read_regs(chip, PCA953X_DIRECTION, device_pca953x_init() 600 chip->reg_direction); device_pca953x_init() 606 memset(val, 0xFF, NBANK(chip)); device_pca953x_init() 608 memset(val, 0, NBANK(chip)); device_pca953x_init() 610 ret = pca953x_write_regs(chip, PCA953X_INVERT, val); device_pca953x_init() 615 static int device_pca957x_init(struct pca953x_chip *chip, u32 invert) device_pca957x_init() argument 620 ret = pca953x_read_regs(chip, PCA957X_OUT, chip->reg_output); device_pca957x_init() 623 ret = pca953x_read_regs(chip, PCA957X_CFG, chip->reg_direction); device_pca957x_init() 629 memset(val, 0xFF, NBANK(chip)); device_pca957x_init() 631 memset(val, 0, NBANK(chip)); device_pca957x_init() 632 pca953x_write_regs(chip, PCA957X_INVRT, val); device_pca957x_init() 635 memset(val, 0x02, NBANK(chip)); device_pca957x_init() 636 pca953x_write_regs(chip, PCA957X_BKEN, val); device_pca957x_init() 647 struct pca953x_chip *chip; pca953x_probe() local 652 chip = devm_kzalloc(&client->dev, pca953x_probe() 654 if (chip == NULL) pca953x_probe() 660 chip->gpio_start = pdata->gpio_base; pca953x_probe() 662 chip->names = pdata->names; pca953x_probe() 664 chip->gpio_start = -1; pca953x_probe() 668 chip->client = client; pca953x_probe() 670 chip->chip_type = id->driver_data & (PCA953X_TYPE | PCA957X_TYPE); pca953x_probe() 672 mutex_init(&chip->i2c_lock); pca953x_probe() 675 * we can't share this chip with another i2c master. pca953x_probe() 677 pca953x_setup_gpio(chip, id->driver_data & PCA_GPIO_MASK); pca953x_probe() 679 if (chip->chip_type == PCA953X_TYPE) pca953x_probe() 680 ret = device_pca953x_init(chip, invert); pca953x_probe() 682 ret = device_pca957x_init(chip, invert); pca953x_probe() 686 ret = gpiochip_add(&chip->gpio_chip); pca953x_probe() 690 ret = pca953x_irq_setup(chip, id, irq_base); pca953x_probe() 695 ret = pdata->setup(client, chip->gpio_chip.base, pca953x_probe() 696 chip->gpio_chip.ngpio, pdata->context); pca953x_probe() 701 i2c_set_clientdata(client, chip); pca953x_probe() 708 struct pca953x_chip *chip = i2c_get_clientdata(client); pca953x_remove() local 712 ret = pdata->teardown(client, chip->gpio_chip.base, pca953x_remove() 713 chip->gpio_chip.ngpio, pdata->context); pca953x_remove() 721 gpiochip_remove(&chip->gpio_chip); pca953x_remove()
H A D	gpio-xilinx.c	43 * @mmchip: OF GPIO chip for memory mapped banks 57 static inline int xgpio_index(struct xgpio_instance *chip, int gpio) xgpio_index() argument 59 if (gpio >= chip->gpio_width[0]) xgpio_index() 65 static inline int xgpio_regoffset(struct xgpio_instance *chip, int gpio) xgpio_regoffset() argument 67 if (xgpio_index(chip, gpio)) xgpio_regoffset() 73 static inline int xgpio_offset(struct xgpio_instance *chip, int gpio) xgpio_offset() argument 75 if (xgpio_index(chip, gpio)) xgpio_offset() 76 return gpio - chip->gpio_width[0]; xgpio_offset() 95 struct xgpio_instance *chip = xgpio_get() local 100 xgpio_regoffset(chip, gpio)); xgpio_get() 102 return !!(val & BIT(xgpio_offset(chip, gpio))); xgpio_get() 118 struct xgpio_instance *chip = xgpio_set() local 120 int index = xgpio_index(chip, gpio); xgpio_set() 121 int offset = xgpio_offset(chip, gpio); xgpio_set() 123 spin_lock_irqsave(&chip->gpio_lock[index], flags); xgpio_set() 127 chip->gpio_state[index] |= BIT(offset); xgpio_set() 129 chip->gpio_state[index] &= ~BIT(offset); xgpio_set() 132 xgpio_regoffset(chip, gpio), chip->gpio_state[index]); xgpio_set() 134 spin_unlock_irqrestore(&chip->gpio_lock[index], flags); xgpio_set() 150 struct xgpio_instance *chip = xgpio_dir_in() local 152 int index = xgpio_index(chip, gpio); xgpio_dir_in() 153 int offset = xgpio_offset(chip, gpio); xgpio_dir_in() 155 spin_lock_irqsave(&chip->gpio_lock[index], flags); xgpio_dir_in() 158 chip->gpio_dir[index] |= BIT(offset); xgpio_dir_in() 160 xgpio_regoffset(chip, gpio), chip->gpio_dir[index]); xgpio_dir_in() 162 spin_unlock_irqrestore(&chip->gpio_lock[index], flags); xgpio_dir_in() 176 * If all GPIO signals of GPIO chip is configured as input then it returns 183 struct xgpio_instance *chip = xgpio_dir_out() local 185 int index = xgpio_index(chip, gpio); xgpio_dir_out() 186 int offset = xgpio_offset(chip, gpio); xgpio_dir_out() 188 spin_lock_irqsave(&chip->gpio_lock[index], flags); xgpio_dir_out() 192 chip->gpio_state[index] |= BIT(offset); xgpio_dir_out() 194 chip->gpio_state[index] &= ~BIT(offset); xgpio_dir_out() 196 xgpio_regoffset(chip, gpio), chip->gpio_state[index]); xgpio_dir_out() 199 chip->gpio_dir[index] &= ~BIT(offset); xgpio_dir_out() 201 xgpio_regoffset(chip, gpio), chip->gpio_dir[index]); xgpio_dir_out() 203 spin_unlock_irqrestore(&chip->gpio_lock[index], flags); xgpio_dir_out() 210 * @mm_gc: Pointer to memory mapped GPIO chip structure 214 struct xgpio_instance *chip = xgpio_save_regs() local 217 xgpio_writereg(mm_gc->regs + XGPIO_DATA_OFFSET, chip->gpio_state[0]); xgpio_save_regs() 218 xgpio_writereg(mm_gc->regs + XGPIO_TRI_OFFSET, chip->gpio_dir[0]); xgpio_save_regs() 220 if (!chip->gpio_width[1]) xgpio_save_regs() 224 chip->gpio_state[1]); xgpio_save_regs() 226 chip->gpio_dir[1]); xgpio_save_regs() 237 struct xgpio_instance *chip = platform_get_drvdata(pdev); xgpio_remove() local 239 of_mm_gpiochip_remove(&chip->mmchip); xgpio_remove() 254 struct xgpio_instance *chip; xgpio_probe() local 259 chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL); xgpio_probe() 260 if (!chip) xgpio_probe() 263 platform_set_drvdata(pdev, chip); xgpio_probe() 266 of_property_read_u32(np, "xlnx,dout-default", &chip->gpio_state[0]); xgpio_probe() 269 if (of_property_read_u32(np, "xlnx,tri-default", &chip->gpio_dir[0])) xgpio_probe() 270 chip->gpio_dir[0] = 0xFFFFFFFF; xgpio_probe() 276 if (of_property_read_u32(np, "xlnx,gpio-width", &chip->gpio_width[0])) xgpio_probe() 277 chip->gpio_width[0] = 32; xgpio_probe() 279 spin_lock_init(&chip->gpio_lock[0]); xgpio_probe() 287 &chip->gpio_state[1]); xgpio_probe() 291 &chip->gpio_dir[1])) xgpio_probe() 292 chip->gpio_dir[1] = 0xFFFFFFFF; xgpio_probe() 299 &chip->gpio_width[1])) xgpio_probe() 300 chip->gpio_width[1] = 32; xgpio_probe() 302 spin_lock_init(&chip->gpio_lock[1]); xgpio_probe() 305 chip->mmchip.gc.ngpio = chip->gpio_width[0] + chip->gpio_width[1]; xgpio_probe() 306 chip->mmchip.gc.dev = &pdev->dev; xgpio_probe() 307 chip->mmchip.gc.direction_input = xgpio_dir_in; xgpio_probe() 308 chip->mmchip.gc.direction_output = xgpio_dir_out; xgpio_probe() 309 chip->mmchip.gc.get = xgpio_get; xgpio_probe() 310 chip->mmchip.gc.set = xgpio_set; xgpio_probe() 312 chip->mmchip.save_regs = xgpio_save_regs; xgpio_probe() 315 status = of_mm_gpiochip_add(np, &chip->mmchip); xgpio_probe()
H A D	gpio-sta2x11.c	61 static inline struct gsta_regs __iomem *__regs(struct gsta_gpio *chip, int nr) __regs() argument 63 return chip->regs[nr / GSTA_GPIO_PER_BLOCK]; __regs() 77 struct gsta_gpio *chip = container_of(gpio, struct gsta_gpio, gpio); gsta_gpio_set() local 78 struct gsta_regs __iomem *regs = __regs(chip, nr); gsta_gpio_set() 89 struct gsta_gpio *chip = container_of(gpio, struct gsta_gpio, gpio); gsta_gpio_get() local 90 struct gsta_regs __iomem *regs = __regs(chip, nr); gsta_gpio_get() 99 struct gsta_gpio *chip = container_of(gpio, struct gsta_gpio, gpio); gsta_gpio_direction_output() local 100 struct gsta_regs __iomem *regs = __regs(chip, nr); gsta_gpio_direction_output() 114 struct gsta_gpio *chip = container_of(gpio, struct gsta_gpio, gpio); gsta_gpio_direction_input() local 115 struct gsta_regs __iomem *regs = __regs(chip, nr); gsta_gpio_direction_input() 124 struct gsta_gpio *chip = container_of(gpio, struct gsta_gpio, gpio); gsta_gpio_to_irq() local 125 return chip->irq_base + offset; gsta_gpio_to_irq() 128 static void gsta_gpio_setup(struct gsta_gpio *chip) /* called from probe */ gsta_gpio_setup() argument 130 struct gpio_chip *gpio = &chip->gpio; gsta_gpio_setup() 140 gpio->label = dev_name(chip->dev); gsta_gpio_setup() 166 static void gsta_set_config(struct gsta_gpio *chip, int nr, unsigned cfg) gsta_set_config() argument 168 struct gsta_regs __iomem *regs = __regs(chip, nr); gsta_set_config() 174 pr_info("%s: %p %i %i\n", __func__, chip, nr, cfg); gsta_set_config() 180 spin_lock_irqsave(&chip->lock, flags); gsta_set_config() 188 spin_unlock_irqrestore(&chip->lock, flags); gsta_set_config() 222 spin_unlock_irqrestore(&chip->lock, flags); gsta_set_config() 224 pr_err("%s: chip %p, pin %i, cfg %i is invalid\n", gsta_set_config() 225 __func__, chip, nr, cfg); gsta_set_config() 235 struct gsta_gpio *chip = gc->private; gsta_irq_disable() local 236 int nr = data->irq - chip->irq_base; gsta_irq_disable() 237 struct gsta_regs __iomem *regs = __regs(chip, nr); gsta_irq_disable() 242 spin_lock_irqsave(&chip->lock, flags); gsta_irq_disable() 243 if (chip->irq_type[nr] & IRQ_TYPE_EDGE_RISING) { gsta_irq_disable() 247 if (chip->irq_type[nr] & IRQ_TYPE_EDGE_FALLING) { gsta_irq_disable() 251 spin_unlock_irqrestore(&chip->lock, flags); gsta_irq_disable() 258 struct gsta_gpio *chip = gc->private; gsta_irq_enable() local 259 int nr = data->irq - chip->irq_base; gsta_irq_enable() 260 struct gsta_regs __iomem *regs = __regs(chip, nr); gsta_irq_enable() 266 type = chip->irq_type[nr]; gsta_irq_enable() 268 spin_lock_irqsave(&chip->lock, flags); gsta_irq_enable() 279 spin_unlock_irqrestore(&chip->lock, flags); gsta_irq_enable() 286 struct gsta_gpio *chip = gc->private; gsta_irq_type() local 287 int nr = d->irq - chip->irq_base; gsta_irq_type() 295 chip->irq_type[nr] = type; /* used for enable/disable */ gsta_irq_type() 303 struct gsta_gpio *chip = dev_id; gsta_gpio_handler() local 310 regs = chip->regs[i]; gsta_gpio_handler() 311 base = chip->irq_base + i * GSTA_GPIO_PER_BLOCK; gsta_gpio_handler() 323 static void gsta_alloc_irq_chip(struct gsta_gpio *chip) gsta_alloc_irq_chip() argument 328 gc = irq_alloc_generic_chip(KBUILD_MODNAME, 1, chip->irq_base, gsta_alloc_irq_chip() 329 chip->reg_base, handle_simple_irq); gsta_alloc_irq_chip() 330 gc->private = chip; gsta_alloc_irq_chip() 333 ct->chip.irq_set_type = gsta_irq_type; gsta_alloc_irq_chip() 334 ct->chip.irq_disable = gsta_irq_disable; gsta_alloc_irq_chip() 335 ct->chip.irq_enable = gsta_irq_enable; gsta_alloc_irq_chip() 346 i = chip->irq_base + j; gsta_alloc_irq_chip() 347 irq_set_chip_and_handler(i, &ct->chip, ct->handler); gsta_alloc_irq_chip() 361 struct gsta_gpio *chip; gsta_probe() local 373 chip = devm_kzalloc(&dev->dev, sizeof(*chip), GFP_KERNEL); gsta_probe() 374 if (!chip) gsta_probe() 376 chip->dev = &dev->dev; gsta_probe() 377 chip->reg_base = devm_ioremap_resource(&dev->dev, res); gsta_probe() 378 if (IS_ERR(chip->reg_base)) gsta_probe() 379 return PTR_ERR(chip->reg_base); gsta_probe() 382 chip->regs[i] = chip->reg_base + i * 4096; gsta_probe() 384 writel(0, &chip->regs[i]->rimsc); gsta_probe() 385 writel(0, &chip->regs[i]->fimsc); gsta_probe() 386 writel(~0, &chip->regs[i]->ic); gsta_probe() 388 spin_lock_init(&chip->lock); gsta_probe() 389 gsta_gpio_setup(chip); gsta_probe() 392 gsta_set_config(chip, i, gpio_pdata->pinconfig[i]); gsta_probe() 401 chip->irq_base = err; gsta_probe() 402 gsta_alloc_irq_chip(chip); gsta_probe() 405 IRQF_SHARED, KBUILD_MODNAME, chip); gsta_probe() 412 err = gpiochip_add(&chip->gpio); gsta_probe() 419 platform_set_drvdata(dev, chip); gsta_probe() 423 free_irq(pdev->irq, chip); gsta_probe() 425 irq_free_descs(chip->irq_base, GSTA_NR_GPIO); gsta_probe()
H A D	gpio-kempld.c	34 struct gpio_chip chip; member in struct:kempld_gpio_data 66 static int kempld_gpio_get(struct gpio_chip *chip, unsigned offset) kempld_gpio_get() argument 69 = container_of(chip, struct kempld_gpio_data, chip); kempld_gpio_get() 75 static void kempld_gpio_set(struct gpio_chip *chip, unsigned offset, int value) kempld_gpio_set() argument 78 = container_of(chip, struct kempld_gpio_data, chip); kempld_gpio_set() 86 static int kempld_gpio_direction_input(struct gpio_chip *chip, unsigned offset) kempld_gpio_direction_input() argument 89 = container_of(chip, struct kempld_gpio_data, chip); kempld_gpio_direction_input() 99 static int kempld_gpio_direction_output(struct gpio_chip *chip, unsigned offset, kempld_gpio_direction_output() argument 103 = container_of(chip, struct kempld_gpio_data, chip); kempld_gpio_direction_output() 114 static int kempld_gpio_get_direction(struct gpio_chip *chip, unsigned offset) kempld_gpio_get_direction() argument 117 = container_of(chip, struct kempld_gpio_data, chip); kempld_gpio_get_direction() 149 struct gpio_chip *chip; kempld_gpio_probe() local 166 chip = &gpio->chip; kempld_gpio_probe() 167 chip->label = "gpio-kempld"; kempld_gpio_probe() 168 chip->owner = THIS_MODULE; kempld_gpio_probe() 169 chip->dev = dev; kempld_gpio_probe() 170 chip->can_sleep = true; kempld_gpio_probe() 172 chip->base = pdata->gpio_base; kempld_gpio_probe() 174 chip->base = -1; kempld_gpio_probe() 175 chip->direction_input = kempld_gpio_direction_input; kempld_gpio_probe() 176 chip->direction_output = kempld_gpio_direction_output; kempld_gpio_probe() 177 chip->get_direction = kempld_gpio_get_direction; kempld_gpio_probe() 178 chip->get = kempld_gpio_get; kempld_gpio_probe() 179 chip->set = kempld_gpio_set; kempld_gpio_probe() 180 chip->ngpio = kempld_gpio_pincount(pld); kempld_gpio_probe() 181 if (chip->ngpio == 0) { kempld_gpio_probe() 186 ret = gpiochip_add(chip); kempld_gpio_probe() 188 dev_err(dev, "Could not register GPIO chip\n"); kempld_gpio_probe() 193 chip->ngpio); kempld_gpio_probe() 202 gpiochip_remove(&gpio->chip); kempld_gpio_remove()
H A D	gpio-cs5535.c	46 struct gpio_chip chip; member in struct:cs5535_gpio_chip 59 static void errata_outl(struct cs5535_gpio_chip *chip, u32 val, errata_outl() argument 62 unsigned long addr = chip->base + 0x80 + reg; errata_outl() 82 static void __cs5535_gpio_set(struct cs5535_gpio_chip *chip, unsigned offset, __cs5535_gpio_set() argument 87 outl(1 << offset, chip->base + reg); __cs5535_gpio_set() 90 errata_outl(chip, 1 << (offset - 16), reg); __cs5535_gpio_set() 95 struct cs5535_gpio_chip *chip = &cs5535_gpio_chip; cs5535_gpio_set() local 98 spin_lock_irqsave(&chip->lock, flags); cs5535_gpio_set() 99 __cs5535_gpio_set(chip, offset, reg); cs5535_gpio_set() 100 spin_unlock_irqrestore(&chip->lock, flags); cs5535_gpio_set() 104 static void __cs5535_gpio_clear(struct cs5535_gpio_chip *chip, unsigned offset, __cs5535_gpio_clear() argument 109 outl(1 << (offset + 16), chip->base + reg); __cs5535_gpio_clear() 112 errata_outl(chip, 1 << offset, reg); __cs5535_gpio_clear() 117 struct cs5535_gpio_chip *chip = &cs5535_gpio_chip; cs5535_gpio_clear() local 120 spin_lock_irqsave(&chip->lock, flags); cs5535_gpio_clear() 121 __cs5535_gpio_clear(chip, offset, reg); cs5535_gpio_clear() 122 spin_unlock_irqrestore(&chip->lock, flags); cs5535_gpio_clear() 128 struct cs5535_gpio_chip *chip = &cs5535_gpio_chip; cs5535_gpio_isset() local 132 spin_lock_irqsave(&chip->lock, flags); cs5535_gpio_isset() 135 val = inl(chip->base + reg); cs5535_gpio_isset() 138 val = inl(chip->base + 0x80 + reg); cs5535_gpio_isset() 141 spin_unlock_irqrestore(&chip->lock, flags); cs5535_gpio_isset() 166 struct cs5535_gpio_chip *chip = &cs5535_gpio_chip; cs5535_gpio_setup_event() local 180 spin_lock_irqsave(&chip->lock, flags); cs5535_gpio_setup_event() 181 val = inl(chip->base + offset); cs5535_gpio_setup_event() 193 outl(val, chip->base + offset); cs5535_gpio_setup_event() 194 spin_unlock_irqrestore(&chip->lock, flags); cs5535_gpio_setup_event() 204 struct cs5535_gpio_chip *chip = chip_gpio_request() local 205 container_of(c, struct cs5535_gpio_chip, chip); chip_gpio_request() 208 spin_lock_irqsave(&chip->lock, flags); chip_gpio_request() 212 dev_info(&chip->pdev->dev, chip_gpio_request() 214 spin_unlock_irqrestore(&chip->lock, flags); chip_gpio_request() 219 __cs5535_gpio_clear(chip, offset, GPIO_OUTPUT_AUX1); chip_gpio_request() 220 __cs5535_gpio_clear(chip, offset, GPIO_OUTPUT_AUX2); chip_gpio_request() 223 __cs5535_gpio_clear(chip, offset, GPIO_INPUT_AUX1); chip_gpio_request() 225 spin_unlock_irqrestore(&chip->lock, flags); chip_gpio_request() 230 static int chip_gpio_get(struct gpio_chip *chip, unsigned offset) chip_gpio_get() argument 235 static void chip_gpio_set(struct gpio_chip *chip, unsigned offset, int val) chip_gpio_set() argument 245 struct cs5535_gpio_chip *chip = chip_direction_input() local 246 container_of(c, struct cs5535_gpio_chip, chip); chip_direction_input() 249 spin_lock_irqsave(&chip->lock, flags); chip_direction_input() 250 __cs5535_gpio_set(chip, offset, GPIO_INPUT_ENABLE); chip_direction_input() 251 __cs5535_gpio_clear(chip, offset, GPIO_OUTPUT_ENABLE); chip_direction_input() 252 spin_unlock_irqrestore(&chip->lock, flags); chip_direction_input() 259 struct cs5535_gpio_chip *chip = chip_direction_output() local 260 container_of(c, struct cs5535_gpio_chip, chip); chip_direction_output() 263 spin_lock_irqsave(&chip->lock, flags); chip_direction_output() 265 __cs5535_gpio_set(chip, offset, GPIO_INPUT_ENABLE); chip_direction_output() 266 __cs5535_gpio_set(chip, offset, GPIO_OUTPUT_ENABLE); chip_direction_output() 268 __cs5535_gpio_set(chip, offset, GPIO_OUTPUT_VAL); chip_direction_output() 270 __cs5535_gpio_clear(chip, offset, GPIO_OUTPUT_VAL); chip_direction_output() 272 spin_unlock_irqrestore(&chip->lock, flags); chip_direction_output() 289 .chip = { 350 err = gpiochip_add(&cs5535_gpio_chip.chip); cs5535_gpio_probe() 362 gpiochip_remove(&cs5535_gpio_chip.chip); cs5535_gpio_remove()
H A D	gpio-stp-xway.c	103 struct xway_stp *chip = xway_stp_set() local 107 chip->shadow |= BIT(gpio); xway_stp_set() 109 chip->shadow &= ~BIT(gpio); xway_stp_set() 110 xway_stp_w32(chip->virt, chip->shadow, XWAY_STP_CPU0); xway_stp_set() 111 xway_stp_w32_mask(chip->virt, 0, XWAY_STP_CON_SWU, XWAY_STP_CON0); xway_stp_set() 138 struct xway_stp *chip = xway_stp_request() local 141 if ((gpio < 8) && (chip->reserved & BIT(gpio))) { xway_stp_request() 153 static int xway_stp_hw_init(struct xway_stp *chip) xway_stp_hw_init() argument 156 xway_stp_w32(chip->virt, 0, XWAY_STP_AR); xway_stp_hw_init() 157 xway_stp_w32(chip->virt, 0, XWAY_STP_CPU0); xway_stp_hw_init() 158 xway_stp_w32(chip->virt, 0, XWAY_STP_CPU1); xway_stp_hw_init() 159 xway_stp_w32(chip->virt, XWAY_STP_CON_SWU, XWAY_STP_CON0); xway_stp_hw_init() 160 xway_stp_w32(chip->virt, 0, XWAY_STP_CON1); xway_stp_hw_init() 163 xway_stp_w32_mask(chip->virt, XWAY_STP_EDGE_MASK, xway_stp_hw_init() 164 chip->edge, XWAY_STP_CON0); xway_stp_hw_init() 167 xway_stp_w32_mask(chip->virt, XWAY_STP_GROUP_MASK, xway_stp_hw_init() 168 chip->groups, XWAY_STP_CON1); xway_stp_hw_init() 171 xway_stp_w32_mask(chip->virt, xway_stp_hw_init() 173 chip->dsl << XWAY_STP_ADSL_SHIFT, xway_stp_hw_init() 177 xway_stp_w32_mask(chip->virt, xway_stp_hw_init() 179 chip->phy1 << XWAY_STP_PHY1_SHIFT, xway_stp_hw_init() 181 xway_stp_w32_mask(chip->virt, xway_stp_hw_init() 183 chip->phy2 << XWAY_STP_PHY2_SHIFT, xway_stp_hw_init() 187 chip->reserved = (chip->phy2 << 5) | (chip->phy1 << 2) | chip->dsl; xway_stp_hw_init() 193 if (chip->reserved) xway_stp_hw_init() 194 xway_stp_w32_mask(chip->virt, XWAY_STP_UPD_MASK, xway_stp_hw_init() 204 struct xway_stp *chip; xway_stp_probe() local 208 chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL); xway_stp_probe() 209 if (!chip) xway_stp_probe() 213 chip->virt = devm_ioremap_resource(&pdev->dev, res); xway_stp_probe() 214 if (IS_ERR(chip->virt)) xway_stp_probe() 215 return PTR_ERR(chip->virt); xway_stp_probe() 217 chip->gc.dev = &pdev->dev; xway_stp_probe() 218 chip->gc.label = "stp-xway"; xway_stp_probe() 219 chip->gc.direction_output = xway_stp_dir_out; xway_stp_probe() 220 chip->gc.set = xway_stp_set; xway_stp_probe() 221 chip->gc.request = xway_stp_request; xway_stp_probe() 222 chip->gc.base = -1; xway_stp_probe() 223 chip->gc.owner = THIS_MODULE; xway_stp_probe() 228 chip->shadow = be32_to_cpu(*shadow); xway_stp_probe() 233 chip->groups = be32_to_cpu(*groups) & XWAY_STP_GROUP_MASK; xway_stp_probe() 235 chip->groups = XWAY_STP_GROUP0; xway_stp_probe() 236 chip->gc.ngpio = fls(chip->groups) * 8; xway_stp_probe() 241 chip->dsl = be32_to_cpu(*dsl) & XWAY_STP_ADSL_MASK; xway_stp_probe() 249 chip->phy1 = be32_to_cpu(*phy) & XWAY_STP_PHY_MASK; xway_stp_probe() 252 chip->phy2 = be32_to_cpu(*phy) & XWAY_STP_PHY_MASK; xway_stp_probe() 257 chip->edge = XWAY_STP_FALLING; xway_stp_probe() 266 ret = xway_stp_hw_init(chip); xway_stp_probe() 268 ret = gpiochip_add(&chip->gc); xway_stp_probe()
H A D	gpiolib.h	36 void acpi_gpiochip_add(struct gpio_chip *chip); 37 void acpi_gpiochip_remove(struct gpio_chip *chip); 39 void acpi_gpiochip_request_interrupts(struct gpio_chip *chip); 40 void acpi_gpiochip_free_interrupts(struct gpio_chip *chip); 48 static inline void acpi_gpiochip_add(struct gpio_chip *chip) { } acpi_gpiochip_remove() argument 49 static inline void acpi_gpiochip_remove(struct gpio_chip *chip) { } acpi_gpiochip_remove() argument 52 acpi_gpiochip_request_interrupts(struct gpio_chip *chip) { } acpi_gpiochip_request_interrupts() argument 55 acpi_gpiochip_free_interrupts(struct gpio_chip *chip) { } acpi_gpiochip_free_interrupts() argument 73 struct gpio_desc *gpiochip_get_desc(struct gpio_chip *chip, u16 hwnum); 79 struct gpio_chip *chip; member in struct:gpio_desc 109 * Return the GPIO number of the passed descriptor relative to its chip 113 return desc - &desc->chip->desc[0]; gpio_chip_hwgpio() 137 /* With chip prefix */ 139 #define chip_emerg(chip, fmt, ...) \ 140 pr_emerg("GPIO chip %s: " fmt, chip->label, ##__VA_ARGS__) 141 #define chip_crit(chip, fmt, ...) \ 142 pr_crit("GPIO chip %s: " fmt, chip->label, ##__VA_ARGS__) 143 #define chip_err(chip, fmt, ...) \ 144 pr_err("GPIO chip %s: " fmt, chip->label, ##__VA_ARGS__) 145 #define chip_warn(chip, fmt, ...) \ 146 pr_warn("GPIO chip %s: " fmt, chip->label, ##__VA_ARGS__) 147 #define chip_info(chip, fmt, ...) \ 148 pr_info("GPIO chip %s: " fmt, chip->label, ##__VA_ARGS__) 149 #define chip_dbg(chip, fmt, ...) \ 150 pr_debug("GPIO chip %s: " fmt, chip->label, ##__VA_ARGS__) 154 int gpiochip_export(struct gpio_chip *chip); 155 void gpiochip_unexport(struct gpio_chip *chip); 159 static inline int gpiochip_export(struct gpio_chip *chip) gpiochip_export() argument 164 static inline void gpiochip_unexport(struct gpio_chip *chip) gpiochip_unexport() argument
H A D	gpio-max732x.c	166 static int max732x_writeb(struct max732x_chip *chip, int group_a, uint8_t val) max732x_writeb() argument 171 client = group_a ? chip->client_group_a : chip->client_group_b; max732x_writeb() 181 static int max732x_readb(struct max732x_chip *chip, int group_a, uint8_t *val) max732x_readb() argument 186 client = group_a ? chip->client_group_a : chip->client_group_b; max732x_readb() 197 static inline int is_group_a(struct max732x_chip *chip, unsigned off) is_group_a() argument 199 return (1u << off) & chip->mask_group_a; is_group_a() 204 struct max732x_chip *chip = to_max732x(gc); max732x_gpio_get_value() local 208 ret = max732x_readb(chip, is_group_a(chip, off), &reg_val); max732x_gpio_get_value() 218 struct max732x_chip *chip = to_max732x(gc); max732x_gpio_set_mask() local 222 mutex_lock(&chip->lock); max732x_gpio_set_mask() 224 reg_out = (off > 7) ? chip->reg_out[1] : chip->reg_out[0]; max732x_gpio_set_mask() 227 ret = max732x_writeb(chip, is_group_a(chip, off), reg_out); max732x_gpio_set_mask() 233 chip->reg_out[1] = reg_out; max732x_gpio_set_mask() 235 chip->reg_out[0] = reg_out; max732x_gpio_set_mask() 237 mutex_unlock(&chip->lock); max732x_gpio_set_mask() 262 struct max732x_chip *chip = to_max732x(gc); max732x_gpio_direction_input() local 265 if ((mask & chip->dir_input) == 0) { max732x_gpio_direction_input() 266 dev_dbg(&chip->client->dev, "%s port %d is output only\n", max732x_gpio_direction_input() 267 chip->client->name, off); max732x_gpio_direction_input() 275 if ((mask & chip->dir_output)) max732x_gpio_direction_input() 284 struct max732x_chip *chip = to_max732x(gc); max732x_gpio_direction_output() local 287 if ((mask & chip->dir_output) == 0) { max732x_gpio_direction_output() 288 dev_dbg(&chip->client->dev, "%s port %d is input only\n", max732x_gpio_direction_output() 289 chip->client->name, off); max732x_gpio_direction_output() 298 static int max732x_writew(struct max732x_chip *chip, uint16_t val) max732x_writew() argument 304 ret = i2c_master_send(chip->client_group_a, (char *)&val, 2); max732x_writew() 306 dev_err(&chip->client_group_a->dev, "failed writing\n"); max732x_writew() 313 static int max732x_readw(struct max732x_chip *chip, uint16_t *val) max732x_readw() argument 317 ret = i2c_master_recv(chip->client_group_a, (char *)val, 2); max732x_readw() 319 dev_err(&chip->client_group_a->dev, "failed reading\n"); max732x_readw() 327 static void max732x_irq_update_mask(struct max732x_chip *chip) max732x_irq_update_mask() argument 331 if (chip->irq_mask == chip->irq_mask_cur) max732x_irq_update_mask() 334 chip->irq_mask = chip->irq_mask_cur; max732x_irq_update_mask() 336 if (chip->irq_features == INT_NO_MASK) max732x_irq_update_mask() 339 mutex_lock(&chip->lock); max732x_irq_update_mask() 341 switch (chip->irq_features) { max732x_irq_update_mask() 343 msg = (chip->irq_mask << 8) | chip->reg_out[0]; max732x_irq_update_mask() 344 max732x_writew(chip, msg); max732x_irq_update_mask() 348 msg = chip->irq_mask | chip->reg_out[0]; max732x_irq_update_mask() 349 max732x_writeb(chip, 1, (uint8_t)msg); max732x_irq_update_mask() 353 mutex_unlock(&chip->lock); max732x_irq_update_mask() 359 struct max732x_chip *chip = to_max732x(gc); max732x_irq_mask() local 361 chip->irq_mask_cur &= ~(1 << d->hwirq); max732x_irq_mask() 367 struct max732x_chip *chip = to_max732x(gc); max732x_irq_unmask() local 369 chip->irq_mask_cur |= 1 << d->hwirq; max732x_irq_unmask() 375 struct max732x_chip *chip = to_max732x(gc); max732x_irq_bus_lock() local 377 mutex_lock(&chip->irq_lock); max732x_irq_bus_lock() 378 chip->irq_mask_cur = chip->irq_mask; max732x_irq_bus_lock() 384 struct max732x_chip *chip = to_max732x(gc); max732x_irq_bus_sync_unlock() local 388 max732x_irq_update_mask(chip); max732x_irq_bus_sync_unlock() 390 new_irqs = chip->irq_trig_fall | chip->irq_trig_raise; max732x_irq_bus_sync_unlock() 393 max732x_gpio_direction_input(&chip->gpio_chip, level); max732x_irq_bus_sync_unlock() 397 mutex_unlock(&chip->irq_lock); max732x_irq_bus_sync_unlock() 403 struct max732x_chip *chip = to_max732x(gc); max732x_irq_set_type() local 407 if (!(mask & chip->dir_input)) { max732x_irq_set_type() 408 dev_dbg(&chip->client->dev, "%s port %d is output only\n", max732x_irq_set_type() 409 chip->client->name, off); max732x_irq_set_type() 414 dev_err(&chip->client->dev, "irq %d: unsupported type %d\n", max732x_irq_set_type() 420 chip->irq_trig_fall |= mask; max732x_irq_set_type() 422 chip->irq_trig_fall &= ~mask; max732x_irq_set_type() 425 chip->irq_trig_raise |= mask; max732x_irq_set_type() 427 chip->irq_trig_raise &= ~mask; max732x_irq_set_type() 441 static uint8_t max732x_irq_pending(struct max732x_chip *chip) max732x_irq_pending() argument 450 ret = max732x_readw(chip, &status); max732x_irq_pending() 455 trigger &= chip->irq_mask; max732x_irq_pending() 461 cur_stat &= chip->irq_mask; max732x_irq_pending() 465 pending = (old_stat & chip->irq_trig_fall) | max732x_irq_pending() 466 (cur_stat & chip->irq_trig_raise); max732x_irq_pending() 474 struct max732x_chip *chip = devid; max732x_irq_handler() local 478 pending = max732x_irq_pending(chip); max732x_irq_handler() 485 handle_nested_irq(irq_find_mapping(chip->gpio_chip.irqdomain, max732x_irq_handler() 494 static int max732x_irq_setup(struct max732x_chip *chip, max732x_irq_setup() argument 497 struct i2c_client *client = chip->client; max732x_irq_setup() 507 chip->irq_features = has_irq; max732x_irq_setup() 508 mutex_init(&chip->irq_lock); max732x_irq_setup() 515 dev_name(&client->dev), chip); max732x_irq_setup() 521 ret = gpiochip_irqchip_add(&chip->gpio_chip, max732x_irq_setup() 531 gpiochip_set_chained_irqchip(&chip->gpio_chip, max732x_irq_setup() 541 static int max732x_irq_setup(struct max732x_chip *chip, max732x_irq_setup() argument 544 struct i2c_client *client = chip->client; max732x_irq_setup() 555 static int max732x_setup_gpio(struct max732x_chip *chip, max732x_setup_gpio() argument 559 struct gpio_chip *gc = &chip->gpio_chip; max732x_setup_gpio() 568 chip->dir_output |= mask; max732x_setup_gpio() 571 chip->dir_input |= mask; max732x_setup_gpio() 574 chip->dir_output |= mask; max732x_setup_gpio() 575 chip->dir_input |= mask; max732x_setup_gpio() 582 chip->mask_group_a |= mask; max732x_setup_gpio() 586 if (chip->dir_input) max732x_setup_gpio() 588 if (chip->dir_output) { max732x_setup_gpio() 598 gc->label = chip->client->name; max732x_setup_gpio() 622 struct max732x_chip *chip; max732x_probe() local 638 chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL); max732x_probe() 639 if (chip == NULL) max732x_probe() 641 chip->client = client; max732x_probe() 643 nr_port = max732x_setup_gpio(chip, id, pdata->gpio_base); max732x_probe() 644 chip->gpio_chip.dev = &client->dev; max732x_probe() 651 chip->client_group_a = client; max732x_probe() 654 chip->client_group_b = chip->client_dummy = c; max732x_probe() 658 chip->client_group_b = client; max732x_probe() 661 chip->client_group_a = chip->client_dummy = c; max732x_probe() 671 if (nr_port > 8 && !chip->client_dummy) { max732x_probe() 678 mutex_init(&chip->lock); max732x_probe() 680 max732x_readb(chip, is_group_a(chip, 0), &chip->reg_out[0]); max732x_probe() 682 max732x_readb(chip, is_group_a(chip, 8), &chip->reg_out[1]); max732x_probe() 684 ret = gpiochip_add(&chip->gpio_chip); max732x_probe() 688 ret = max732x_irq_setup(chip, id); max732x_probe() 690 gpiochip_remove(&chip->gpio_chip); max732x_probe() 695 ret = pdata->setup(client, chip->gpio_chip.base, max732x_probe() 696 chip->gpio_chip.ngpio, pdata->context); max732x_probe() 701 i2c_set_clientdata(client, chip); max732x_probe() 705 if (chip->client_dummy) max732x_probe() 706 i2c_unregister_device(chip->client_dummy); max732x_probe() 713 struct max732x_chip *chip = i2c_get_clientdata(client); max732x_remove() local 718 ret = pdata->teardown(client, chip->gpio_chip.base, max732x_remove() 719 chip->gpio_chip.ngpio, pdata->context); max732x_remove() 727 gpiochip_remove(&chip->gpio_chip); max732x_remove() 730 if (chip->client_dummy) max732x_remove() 731 i2c_unregister_device(chip->client_dummy); max732x_remove()
H A D	gpio-mpc5200.c	74 struct mpc52xx_gpiochip *chip = container_of(mm_gc, __mpc52xx_wkup_gpio_set() local 79 chip->shadow_dvo |= 1 << (7 - gpio); __mpc52xx_wkup_gpio_set() 81 chip->shadow_dvo &= ~(1 << (7 - gpio)); __mpc52xx_wkup_gpio_set() 83 out_8(&regs->wkup_dvo, chip->shadow_dvo); __mpc52xx_wkup_gpio_set() 103 struct mpc52xx_gpiochip *chip = container_of(mm_gc, mpc52xx_wkup_gpio_dir_in() local 111 chip->shadow_ddr &= ~(1 << (7 - gpio)); mpc52xx_wkup_gpio_dir_in() 112 out_8(&regs->wkup_ddr, chip->shadow_ddr); mpc52xx_wkup_gpio_dir_in() 115 chip->shadow_gpioe |= 1 << (7 - gpio); mpc52xx_wkup_gpio_dir_in() 116 out_8(&regs->wkup_gpioe, chip->shadow_gpioe); mpc52xx_wkup_gpio_dir_in() 128 struct mpc52xx_gpiochip *chip = container_of(mm_gc, mpc52xx_wkup_gpio_dir_out() local 137 chip->shadow_ddr |= 1 << (7 - gpio); mpc52xx_wkup_gpio_dir_out() 138 out_8(&regs->wkup_ddr, chip->shadow_ddr); mpc52xx_wkup_gpio_dir_out() 141 chip->shadow_gpioe |= 1 << (7 - gpio); mpc52xx_wkup_gpio_dir_out() 142 out_8(&regs->wkup_gpioe, chip->shadow_gpioe); mpc52xx_wkup_gpio_dir_out() 153 struct mpc52xx_gpiochip *chip; mpc52xx_wkup_gpiochip_probe() local 158 chip = devm_kzalloc(&ofdev->dev, sizeof(*chip), GFP_KERNEL); mpc52xx_wkup_gpiochip_probe() 159 if (!chip) mpc52xx_wkup_gpiochip_probe() 162 platform_set_drvdata(ofdev, chip); mpc52xx_wkup_gpiochip_probe() 164 gc = &chip->mmchip.gc; mpc52xx_wkup_gpiochip_probe() 172 ret = of_mm_gpiochip_add(ofdev->dev.of_node, &chip->mmchip); mpc52xx_wkup_gpiochip_probe() 176 regs = chip->mmchip.regs; mpc52xx_wkup_gpiochip_probe() 177 chip->shadow_gpioe = in_8(&regs->wkup_gpioe); mpc52xx_wkup_gpiochip_probe() 178 chip->shadow_ddr = in_8(&regs->wkup_ddr); mpc52xx_wkup_gpiochip_probe() 179 chip->shadow_dvo = in_8(&regs->wkup_dvo); mpc52xx_wkup_gpiochip_probe() 186 struct mpc52xx_gpiochip *chip = platform_get_drvdata(ofdev); mpc52xx_gpiochip_remove() local 188 of_mm_gpiochip_remove(&chip->mmchip); mpc52xx_gpiochip_remove() 239 struct mpc52xx_gpiochip *chip = container_of(mm_gc, __mpc52xx_simple_gpio_set() local 244 chip->shadow_dvo |= 1 << (31 - gpio); __mpc52xx_simple_gpio_set() 246 chip->shadow_dvo &= ~(1 << (31 - gpio)); __mpc52xx_simple_gpio_set() 247 out_be32(&regs->simple_dvo, chip->shadow_dvo); __mpc52xx_simple_gpio_set() 267 struct mpc52xx_gpiochip *chip = container_of(mm_gc, mpc52xx_simple_gpio_dir_in() local 275 chip->shadow_ddr &= ~(1 << (31 - gpio)); mpc52xx_simple_gpio_dir_in() 276 out_be32(&regs->simple_ddr, chip->shadow_ddr); mpc52xx_simple_gpio_dir_in() 279 chip->shadow_gpioe |= 1 << (31 - gpio); mpc52xx_simple_gpio_dir_in() 280 out_be32(&regs->simple_gpioe, chip->shadow_gpioe); mpc52xx_simple_gpio_dir_in() 291 struct mpc52xx_gpiochip *chip = container_of(mm_gc, mpc52xx_simple_gpio_dir_out() local 302 chip->shadow_ddr |= 1 << (31 - gpio); mpc52xx_simple_gpio_dir_out() 303 out_be32(&regs->simple_ddr, chip->shadow_ddr); mpc52xx_simple_gpio_dir_out() 306 chip->shadow_gpioe |= 1 << (31 - gpio); mpc52xx_simple_gpio_dir_out() 307 out_be32(&regs->simple_gpioe, chip->shadow_gpioe); mpc52xx_simple_gpio_dir_out() 318 struct mpc52xx_gpiochip *chip; mpc52xx_simple_gpiochip_probe() local 323 chip = devm_kzalloc(&ofdev->dev, sizeof(*chip), GFP_KERNEL); mpc52xx_simple_gpiochip_probe() 324 if (!chip) mpc52xx_simple_gpiochip_probe() 327 platform_set_drvdata(ofdev, chip); mpc52xx_simple_gpiochip_probe() 329 gc = &chip->mmchip.gc; mpc52xx_simple_gpiochip_probe() 337 ret = of_mm_gpiochip_add(ofdev->dev.of_node, &chip->mmchip); mpc52xx_simple_gpiochip_probe() 341 regs = chip->mmchip.regs; mpc52xx_simple_gpiochip_probe() 342 chip->shadow_gpioe = in_be32(&regs->simple_gpioe); mpc52xx_simple_gpiochip_probe() 343 chip->shadow_ddr = in_be32(&regs->simple_ddr); mpc52xx_simple_gpiochip_probe() 344 chip->shadow_dvo = in_be32(&regs->simple_dvo); mpc52xx_simple_gpiochip_probe()
H A D	gpio-samsung.c	43 int samsung_gpio_setpull_updown(struct samsung_gpio_chip *chip, samsung_gpio_setpull_updown() argument 46 void __iomem *reg = chip->base + 0x08; samsung_gpio_setpull_updown() 58 samsung_gpio_pull_t samsung_gpio_getpull_updown(struct samsung_gpio_chip *chip, samsung_gpio_getpull_updown() argument 61 void __iomem *reg = chip->base + 0x08; samsung_gpio_getpull_updown() 71 int s3c2443_gpio_setpull(struct samsung_gpio_chip *chip, s3c2443_gpio_setpull() argument 85 return samsung_gpio_setpull_updown(chip, off, pull); s3c2443_gpio_setpull() 88 samsung_gpio_pull_t s3c2443_gpio_getpull(struct samsung_gpio_chip *chip, s3c2443_gpio_getpull() argument 93 pull = samsung_gpio_getpull_updown(chip, off); s3c2443_gpio_getpull() 111 static int s3c24xx_gpio_setpull_1(struct samsung_gpio_chip *chip, s3c24xx_gpio_setpull_1() argument 115 void __iomem *reg = chip->base + 0x08; s3c24xx_gpio_setpull_1() 129 static samsung_gpio_pull_t s3c24xx_gpio_getpull_1(struct samsung_gpio_chip *chip, s3c24xx_gpio_getpull_1() argument 133 void __iomem *reg = chip->base + 0x08; s3c24xx_gpio_getpull_1() 140 samsung_gpio_pull_t s3c24xx_gpio_getpull_1up(struct samsung_gpio_chip *chip, s3c24xx_gpio_getpull_1up() argument 143 return s3c24xx_gpio_getpull_1(chip, off, S3C_GPIO_PULL_UP); s3c24xx_gpio_getpull_1up() 146 int s3c24xx_gpio_setpull_1up(struct samsung_gpio_chip *chip, s3c24xx_gpio_setpull_1up() argument 149 return s3c24xx_gpio_setpull_1(chip, off, pull, S3C_GPIO_PULL_UP); s3c24xx_gpio_setpull_1up() 152 samsung_gpio_pull_t s3c24xx_gpio_getpull_1down(struct samsung_gpio_chip *chip, s3c24xx_gpio_getpull_1down() argument 155 return s3c24xx_gpio_getpull_1(chip, off, S3C_GPIO_PULL_DOWN); s3c24xx_gpio_getpull_1down() 158 int s3c24xx_gpio_setpull_1down(struct samsung_gpio_chip *chip, s3c24xx_gpio_setpull_1down() argument 161 return s3c24xx_gpio_setpull_1(chip, off, pull, S3C_GPIO_PULL_DOWN); s3c24xx_gpio_setpull_1down() 166 * @chip: The gpio chip that is being configured. 178 static int samsung_gpio_setcfg_2bit(struct samsung_gpio_chip *chip, samsung_gpio_setcfg_2bit() argument 181 void __iomem *reg = chip->base; samsung_gpio_setcfg_2bit() 203 * @chip: The gpio chip that is being configured. 211 static unsigned int samsung_gpio_getcfg_2bit(struct samsung_gpio_chip *chip, samsung_gpio_getcfg_2bit() argument 216 con = __raw_readl(chip->base); samsung_gpio_getcfg_2bit() 226 * @chip: The gpio chip that is being configured. 241 static int samsung_gpio_setcfg_4bit(struct samsung_gpio_chip *chip, samsung_gpio_setcfg_4bit() argument 244 void __iomem *reg = chip->base; samsung_gpio_setcfg_4bit() 248 if (off < 8 && chip->chip.ngpio > 8) samsung_gpio_setcfg_4bit() 266 * @chip: The gpio chip that is being configured. 276 static unsigned samsung_gpio_getcfg_4bit(struct samsung_gpio_chip *chip, samsung_gpio_getcfg_4bit() argument 279 void __iomem *reg = chip->base; samsung_gpio_getcfg_4bit() 283 if (off < 8 && chip->chip.ngpio > 8) samsung_gpio_getcfg_4bit() 297 * @chip: The gpio chip that is being configured. 306 static int s3c24xx_gpio_setcfg_abank(struct samsung_gpio_chip *chip, s3c24xx_gpio_setcfg_abank() argument 309 void __iomem *reg = chip->base; s3c24xx_gpio_setcfg_abank() 334 * @chip: The gpio chip that is being configured. 344 static unsigned s3c24xx_gpio_getcfg_abank(struct samsung_gpio_chip *chip, s3c24xx_gpio_getcfg_abank() argument 349 con = __raw_readl(chip->base); s3c24xx_gpio_getcfg_abank() 422 * chip is as following: 431 static int samsung_gpiolib_2bit_input(struct gpio_chip *chip, unsigned offset) samsung_gpiolib_2bit_input() argument 433 struct samsung_gpio_chip *ourchip = to_samsung_gpio(chip); samsung_gpiolib_2bit_input() 449 static int samsung_gpiolib_2bit_output(struct gpio_chip *chip, samsung_gpiolib_2bit_output() argument 452 struct samsung_gpio_chip *ourchip = to_samsung_gpio(chip); samsung_gpiolib_2bit_output() 493 static int samsung_gpiolib_4bit_input(struct gpio_chip *chip, samsung_gpiolib_4bit_input() argument 496 struct samsung_gpio_chip *ourchip = to_samsung_gpio(chip); samsung_gpiolib_4bit_input() 512 static int samsung_gpiolib_4bit_output(struct gpio_chip *chip, samsung_gpiolib_4bit_output() argument 515 struct samsung_gpio_chip *ourchip = to_samsung_gpio(chip); samsung_gpiolib_4bit_output() 562 static int samsung_gpiolib_4bit2_input(struct gpio_chip *chip, samsung_gpiolib_4bit2_input() argument 565 struct samsung_gpio_chip *ourchip = to_samsung_gpio(chip); samsung_gpiolib_4bit2_input() 584 static int samsung_gpiolib_4bit2_output(struct gpio_chip *chip, samsung_gpiolib_4bit2_output() argument 587 struct samsung_gpio_chip *ourchip = to_samsung_gpio(chip); samsung_gpiolib_4bit2_output() 622 static int s3c24xx_gpiolib_banka_input(struct gpio_chip *chip, unsigned offset) s3c24xx_gpiolib_banka_input() argument 627 static int s3c24xx_gpiolib_banka_output(struct gpio_chip *chip, s3c24xx_gpiolib_banka_output() argument 630 struct samsung_gpio_chip *ourchip = to_samsung_gpio(chip); s3c24xx_gpiolib_banka_output() 657 static void samsung_gpiolib_set(struct gpio_chip *chip, samsung_gpiolib_set() argument 660 struct samsung_gpio_chip *ourchip = to_samsung_gpio(chip); samsung_gpiolib_set() 676 static int samsung_gpiolib_get(struct gpio_chip *chip, unsigned offset) samsung_gpiolib_get() argument 678 struct samsung_gpio_chip *ourchip = to_samsung_gpio(chip); samsung_gpiolib_get() 703 static __init void s3c_gpiolib_track(struct samsung_gpio_chip *chip) s3c_gpiolib_track() argument 708 gpn = chip->chip.base; s3c_gpiolib_track() 709 for (i = 0; i < chip->chip.ngpio; i++, gpn++) { s3c_gpiolib_track() 711 s3c_gpios[gpn] = chip; s3c_gpiolib_track() 718 * @chip: The chip to register 720 * This is a wrapper to gpiochip_add() that takes our specific gpio chip 726 static void __init samsung_gpiolib_add(struct samsung_gpio_chip *chip) samsung_gpiolib_add() argument 728 struct gpio_chip *gc = &chip->chip; samsung_gpiolib_add() 731 BUG_ON(!chip->base); samsung_gpiolib_add() 735 spin_lock_init(&chip->lock); samsung_gpiolib_add() 747 if (chip->pm != NULL) { samsung_gpiolib_add() 748 if (!chip->pm->save || !chip->pm->resume) samsung_gpiolib_add() 758 s3c_gpiolib_track(chip); samsung_gpiolib_add() 761 static void __init s3c24xx_gpiolib_add_chips(struct samsung_gpio_chip *chip, s3c24xx_gpiolib_add_chips() argument 765 struct gpio_chip *gc = &chip->chip; s3c24xx_gpiolib_add_chips() 767 for (i = 0 ; i < nr_chips; i++, chip++) { s3c24xx_gpiolib_add_chips() 769 if (chip->chip.base >= S3C_GPIO_END) s3c24xx_gpiolib_add_chips() 772 if (!chip->config) s3c24xx_gpiolib_add_chips() 773 chip->config = &s3c24xx_gpiocfg_default; s3c24xx_gpiolib_add_chips() 774 if (!chip->pm) s3c24xx_gpiolib_add_chips() 775 chip->pm = __gpio_pm(&samsung_gpio_pm_2bit); s3c24xx_gpiolib_add_chips() 776 if ((base != NULL) && (chip->base == NULL)) s3c24xx_gpiolib_add_chips() 777 chip->base = base + ((i) * 0x10); s3c24xx_gpiolib_add_chips() 784 samsung_gpiolib_add(chip); s3c24xx_gpiolib_add_chips() 788 static void __init samsung_gpiolib_add_2bit_chips(struct samsung_gpio_chip *chip, samsung_gpiolib_add_2bit_chips() argument 794 for (i = 0 ; i < nr_chips; i++, chip++) { samsung_gpiolib_add_2bit_chips() 795 chip->chip.direction_input = samsung_gpiolib_2bit_input; samsung_gpiolib_add_2bit_chips() 796 chip->chip.direction_output = samsung_gpiolib_2bit_output; samsung_gpiolib_add_2bit_chips() 798 if (!chip->config) samsung_gpiolib_add_2bit_chips() 799 chip->config = &samsung_gpio_cfgs[7]; samsung_gpiolib_add_2bit_chips() 800 if (!chip->pm) samsung_gpiolib_add_2bit_chips() 801 chip->pm = __gpio_pm(&samsung_gpio_pm_2bit); samsung_gpiolib_add_2bit_chips() 802 if ((base != NULL) && (chip->base == NULL)) samsung_gpiolib_add_2bit_chips() 803 chip->base = base + ((i) * offset); samsung_gpiolib_add_2bit_chips() 805 samsung_gpiolib_add(chip); samsung_gpiolib_add_2bit_chips() 811 * @chip: The gpio chip that is being configured. 825 static void __init samsung_gpiolib_add_4bit_chips(struct samsung_gpio_chip *chip, samsung_gpiolib_add_4bit_chips() argument 830 for (i = 0 ; i < nr_chips; i++, chip++) { samsung_gpiolib_add_4bit_chips() 831 chip->chip.direction_input = samsung_gpiolib_4bit_input; samsung_gpiolib_add_4bit_chips() 832 chip->chip.direction_output = samsung_gpiolib_4bit_output; samsung_gpiolib_add_4bit_chips() 834 if (!chip->config) samsung_gpiolib_add_4bit_chips() 835 chip->config = &samsung_gpio_cfgs[2]; samsung_gpiolib_add_4bit_chips() 836 if (!chip->pm) samsung_gpiolib_add_4bit_chips() 837 chip->pm = __gpio_pm(&samsung_gpio_pm_4bit); samsung_gpiolib_add_4bit_chips() 838 if ((base != NULL) && (chip->base == NULL)) samsung_gpiolib_add_4bit_chips() 839 chip->base = base + ((i) * 0x20); samsung_gpiolib_add_4bit_chips() 841 chip->bitmap_gpio_int = 0; samsung_gpiolib_add_4bit_chips() 843 samsung_gpiolib_add(chip); samsung_gpiolib_add_4bit_chips() 847 static void __init samsung_gpiolib_add_4bit2_chips(struct samsung_gpio_chip *chip, samsung_gpiolib_add_4bit2_chips() argument 850 for (; nr_chips > 0; nr_chips--, chip++) { samsung_gpiolib_add_4bit2_chips() 851 chip->chip.direction_input = samsung_gpiolib_4bit2_input; samsung_gpiolib_add_4bit2_chips() 852 chip->chip.direction_output = samsung_gpiolib_4bit2_output; samsung_gpiolib_add_4bit2_chips() 854 if (!chip->config) samsung_gpiolib_add_4bit2_chips() 855 chip->config = &samsung_gpio_cfgs[2]; samsung_gpiolib_add_4bit2_chips() 856 if (!chip->pm) samsung_gpiolib_add_4bit2_chips() 857 chip->pm = __gpio_pm(&samsung_gpio_pm_4bit); samsung_gpiolib_add_4bit2_chips() 859 samsung_gpiolib_add(chip); samsung_gpiolib_add_4bit2_chips() 863 int samsung_gpiolib_to_irq(struct gpio_chip *chip, unsigned int offset) samsung_gpiolib_to_irq() argument 865 struct samsung_gpio_chip *samsung_chip = container_of(chip, struct samsung_gpio_chip, chip); samsung_gpiolib_to_irq() 871 static int s3c24xx_gpiolib_fbank_to_irq(struct gpio_chip *chip, unsigned offset) s3c24xx_gpiolib_fbank_to_irq() argument 888 static int s3c64xx_gpiolib_mbank_to_irq(struct gpio_chip *chip, unsigned pin) s3c64xx_gpiolib_mbank_to_irq() argument 893 static int s3c64xx_gpiolib_lbank_to_irq(struct gpio_chip *chip, unsigned pin) s3c64xx_gpiolib_lbank_to_irq() argument 903 .chip = { 912 .chip = { 919 .chip = { 926 .chip = { 933 .chip = { 940 .chip = { 949 .chip = { 957 .chip = { 967 .chip = { 975 .chip = { 983 .chip = { 991 .chip = { 1030 .chip = { 1036 .chip = { 1042 .chip = { 1048 .chip = { 1055 .chip = { 1062 .chip = { 1070 .chip = { 1084 .chip = { 1092 .chip = { 1100 .chip = { 1115 .chip = { 1122 .chip = { 1129 .chip = { 1136 .chip = { 1143 .chip = { 1150 .chip = { 1159 .chip = { 1206 struct samsung_gpio_chip *chip = samsung_gpiolib_getchip(pin); s3c_gpio_cfgpin() local 1211 if (!chip) s3c_gpio_cfgpin() 1214 offset = pin - chip->chip.base; s3c_gpio_cfgpin() 1216 samsung_gpio_lock(chip, flags); s3c_gpio_cfgpin() 1217 ret = samsung_gpio_do_setcfg(chip, offset, config); s3c_gpio_cfgpin() 1218 samsung_gpio_unlock(chip, flags); s3c_gpio_cfgpin() 1257 struct samsung_gpio_chip *chip = samsung_gpiolib_getchip(pin); s3c_gpio_getcfg() local 1262 if (chip) { s3c_gpio_getcfg() 1263 offset = pin - chip->chip.base; s3c_gpio_getcfg() 1265 samsung_gpio_lock(chip, flags); s3c_gpio_getcfg() 1266 ret = samsung_gpio_do_getcfg(chip, offset); s3c_gpio_getcfg() 1267 samsung_gpio_unlock(chip, flags); s3c_gpio_getcfg() 1276 struct samsung_gpio_chip *chip = samsung_gpiolib_getchip(pin); s3c_gpio_setpull() local 1280 if (!chip) s3c_gpio_setpull() 1283 offset = pin - chip->chip.base; s3c_gpio_setpull() 1285 samsung_gpio_lock(chip, flags); s3c_gpio_setpull() 1286 ret = samsung_gpio_do_setpull(chip, offset, pull); s3c_gpio_setpull() 1287 samsung_gpio_unlock(chip, flags); s3c_gpio_setpull() 1295 struct samsung_gpio_chip *chip = samsung_gpiolib_getchip(pin); s3c_gpio_getpull() local 1300 if (chip) { s3c_gpio_getpull() 1301 offset = pin - chip->chip.base; s3c_gpio_getpull() 1303 samsung_gpio_lock(chip, flags); s3c_gpio_getpull() 1304 pup = samsung_gpio_do_getpull(chip, offset); s3c_gpio_getpull() 1305 samsung_gpio_unlock(chip, flags); s3c_gpio_getpull()
H A D	gpio-spear-spics.c	28 * It provides control for spi chip select lines so that any chipselect 34 * struct spear_spics - represents spi chip select control 43 * @chip: gpio_chip abstraction 54 struct gpio_chip chip; member in struct:spear_spics 58 static int spics_get_value(struct gpio_chip *chip, unsigned offset) spics_get_value() argument 63 static void spics_set_value(struct gpio_chip *chip, unsigned offset, int value) spics_set_value() argument 65 struct spear_spics *spics = container_of(chip, struct spear_spics, spics_set_value() 66 chip); spics_set_value() 69 /* select chip select from register */ spics_set_value() 77 /* toggle chip select line */ spics_set_value() 83 static int spics_direction_input(struct gpio_chip *chip, unsigned offset) spics_direction_input() argument 88 static int spics_direction_output(struct gpio_chip *chip, unsigned offset, spics_direction_output() argument 91 spics_set_value(chip, offset, value); spics_direction_output() 95 static int spics_request(struct gpio_chip *chip, unsigned offset) spics_request() argument 97 struct spear_spics *spics = container_of(chip, struct spear_spics, spics_request() 98 chip); spics_request() 111 static void spics_free(struct gpio_chip *chip, unsigned offset) spics_free() argument 113 struct spear_spics *spics = container_of(chip, struct spear_spics, spics_free() 114 chip); spics_free() 158 spics->chip.ngpio = NUM_OF_GPIO; spics_gpio_probe() 159 spics->chip.base = -1; spics_gpio_probe() 160 spics->chip.request = spics_request; spics_gpio_probe() 161 spics->chip.free = spics_free; spics_gpio_probe() 162 spics->chip.direction_input = spics_direction_input; spics_gpio_probe() 163 spics->chip.direction_output = spics_direction_output; spics_gpio_probe() 164 spics->chip.get = spics_get_value; spics_gpio_probe() 165 spics->chip.set = spics_set_value; spics_gpio_probe() 166 spics->chip.label = dev_name(&pdev->dev); spics_gpio_probe() 167 spics->chip.dev = &pdev->dev; spics_gpio_probe() 168 spics->chip.owner = THIS_MODULE; spics_gpio_probe() 171 ret = gpiochip_add(&spics->chip); spics_gpio_probe() 173 dev_err(&pdev->dev, "unable to add gpio chip\n"); spics_gpio_probe()
/linux-4.1.27/sound/usb/
H A D	power.h	5 int snd_usb_autoresume(struct snd_usb_audio *chip); 6 void snd_usb_autosuspend(struct snd_usb_audio *chip); 8 static inline int snd_usb_autoresume(struct snd_usb_audio *chip) snd_usb_autoresume() argument 12 static inline void snd_usb_autosuspend(struct snd_usb_audio *chip) snd_usb_autosuspend() argument
H A D	stream.h	4 int snd_usb_parse_audio_interface(struct snd_usb_audio *chip, 7 int snd_usb_add_audio_stream(struct snd_usb_audio *chip,
H A D	proc.h	4 void snd_usb_audio_create_proc(struct snd_usb_audio *chip);
H A D	clock.h	4 int snd_usb_init_sample_rate(struct snd_usb_audio *chip, int iface, 8 int snd_usb_clock_find_source(struct snd_usb_audio *chip, int entity_id,
H A D	card.c	132 static int snd_usb_create_stream(struct snd_usb_audio *chip, int ctrlif, int interface) snd_usb_create_stream() argument 134 struct usb_device *dev = chip->dev; snd_usb_create_stream() 152 if ((chip->usb_id == USB_ID(0x18d1, 0x2d04) || snd_usb_create_stream() 153 chip->usb_id == USB_ID(0x18d1, 0x2d05)) && snd_usb_create_stream() 174 int err = snd_usbmidi_create(chip->card, iface, snd_usb_create_stream() 175 &chip->midi_list, NULL); snd_usb_create_stream() 202 if (! snd_usb_parse_audio_interface(chip, interface)) { snd_usb_create_stream() 214 static int snd_usb_create_streams(struct snd_usb_audio *chip, int ctrlif) snd_usb_create_streams() argument 216 struct usb_device *dev = chip->dev; snd_usb_create_streams() 256 snd_usb_create_stream(chip, ctrlif, h1->baInterfaceNr[i]); snd_usb_create_streams() 289 snd_usb_create_stream(chip, ctrlif, intf); snd_usb_create_streams() 300 * free the chip instance 306 static int snd_usb_audio_free(struct snd_usb_audio *chip) snd_usb_audio_free() argument 310 list_for_each_entry_safe(ep, n, &chip->ep_list, list) snd_usb_audio_free() 313 mutex_destroy(&chip->mutex); snd_usb_audio_free() 314 kfree(chip); snd_usb_audio_free() 320 struct snd_usb_audio *chip = device->device_data; snd_usb_audio_dev_free() local 321 return snd_usb_audio_free(chip); snd_usb_audio_dev_free() 325 * create a chip instance and set its names. 333 struct snd_usb_audio *chip; snd_usb_audio_create() local 361 chip = kzalloc(sizeof(*chip), GFP_KERNEL); snd_usb_audio_create() 362 if (! chip) { snd_usb_audio_create() 367 mutex_init(&chip->mutex); snd_usb_audio_create() 368 init_waitqueue_head(&chip->shutdown_wait); snd_usb_audio_create() 369 chip->index = idx; snd_usb_audio_create() 370 chip->dev = dev; snd_usb_audio_create() 371 chip->card = card; snd_usb_audio_create() 372 chip->setup = device_setup[idx]; snd_usb_audio_create() 373 chip->autoclock = autoclock; snd_usb_audio_create() 374 chip->probing = 1; snd_usb_audio_create() 375 atomic_set(&chip->usage_count, 0); snd_usb_audio_create() 376 atomic_set(&chip->shutdown, 0); snd_usb_audio_create() 378 chip->usb_id = USB_ID(le16_to_cpu(dev->descriptor.idVendor), snd_usb_audio_create() 380 INIT_LIST_HEAD(&chip->pcm_list); snd_usb_audio_create() 381 INIT_LIST_HEAD(&chip->ep_list); snd_usb_audio_create() 382 INIT_LIST_HEAD(&chip->midi_list); snd_usb_audio_create() 383 INIT_LIST_HEAD(&chip->mixer_list); snd_usb_audio_create() 385 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) { snd_usb_audio_create() 386 snd_usb_audio_free(chip); snd_usb_audio_create() 393 USB_ID_VENDOR(chip->usb_id), USB_ID_PRODUCT(chip->usb_id)); snd_usb_audio_create() 405 USB_ID_VENDOR(chip->usb_id), snd_usb_audio_create() 406 USB_ID_PRODUCT(chip->usb_id)); snd_usb_audio_create() 452 snd_usb_audio_create_proc(chip); snd_usb_audio_create() 454 *rchip = chip; snd_usb_audio_create() 474 struct snd_usb_audio *chip; usb_audio_probe() local 496 chip = NULL; usb_audio_probe() 505 chip = usb_chip[i]; usb_audio_probe() 506 chip->probing = 1; usb_audio_probe() 510 if (! chip) { usb_audio_probe() 519 &chip); usb_audio_probe() 522 chip->pm_intf = intf; usb_audio_probe() 525 if (!chip) { usb_audio_probe() 537 if (!chip->ctrl_intf) usb_audio_probe() 538 chip->ctrl_intf = alts; usb_audio_probe() 540 chip->txfr_quirk = 0; usb_audio_probe() 544 err = snd_usb_create_quirk(chip, intf, &usb_audio_driver, quirk); usb_audio_probe() 551 err = snd_usb_create_streams(chip, ifnum); usb_audio_probe() 554 err = snd_usb_create_mixer(chip, ifnum, ignore_ctl_error); usb_audio_probe() 560 err = snd_card_register(chip->card); usb_audio_probe() 564 usb_chip[chip->index] = chip; usb_audio_probe() 565 chip->num_interfaces++; usb_audio_probe() 566 chip->probing = 0; usb_audio_probe() 567 usb_set_intfdata(intf, chip); usb_audio_probe() 572 if (chip) { usb_audio_probe() 573 if (!chip->num_interfaces) usb_audio_probe() 574 snd_card_free(chip->card); usb_audio_probe() 575 chip->probing = 0; usb_audio_probe() 587 struct snd_usb_audio *chip = usb_get_intfdata(intf); usb_audio_disconnect() local 591 if (chip == (void *)-1L) usb_audio_disconnect() 594 card = chip->card; usb_audio_disconnect() 597 if (atomic_inc_return(&chip->shutdown) == 1) { usb_audio_disconnect() 605 wait_event(chip->shutdown_wait, usb_audio_disconnect() 606 !atomic_read(&chip->usage_count)); usb_audio_disconnect() 609 list_for_each_entry(as, &chip->pcm_list, list) { usb_audio_disconnect() 613 list_for_each_entry(ep, &chip->ep_list, list) { usb_audio_disconnect() 617 list_for_each(p, &chip->midi_list) { usb_audio_disconnect() 621 list_for_each_entry(mixer, &chip->mixer_list, list) { usb_audio_disconnect() 626 chip->num_interfaces--; usb_audio_disconnect() 627 if (chip->num_interfaces <= 0) { usb_audio_disconnect() 628 usb_chip[chip->index] = NULL; usb_audio_disconnect() 637 int snd_usb_lock_shutdown(struct snd_usb_audio *chip) snd_usb_lock_shutdown() argument 641 atomic_inc(&chip->usage_count); snd_usb_lock_shutdown() 642 if (atomic_read(&chip->shutdown)) { snd_usb_lock_shutdown() 646 err = snd_usb_autoresume(chip); snd_usb_lock_shutdown() 652 if (atomic_dec_and_test(&chip->usage_count)) snd_usb_lock_shutdown() 653 wake_up(&chip->shutdown_wait); snd_usb_lock_shutdown() 658 void snd_usb_unlock_shutdown(struct snd_usb_audio *chip) snd_usb_unlock_shutdown() argument 660 snd_usb_autosuspend(chip); snd_usb_unlock_shutdown() 661 if (atomic_dec_and_test(&chip->usage_count)) snd_usb_unlock_shutdown() 662 wake_up(&chip->shutdown_wait); snd_usb_unlock_shutdown() 667 int snd_usb_autoresume(struct snd_usb_audio *chip) snd_usb_autoresume() argument 669 if (atomic_read(&chip->shutdown)) snd_usb_autoresume() 671 if (chip->probing) snd_usb_autoresume() 673 if (atomic_inc_return(&chip->active) == 1) snd_usb_autoresume() 674 return usb_autopm_get_interface(chip->pm_intf); snd_usb_autoresume() 678 void snd_usb_autosuspend(struct snd_usb_audio *chip) snd_usb_autosuspend() argument 680 if (chip->probing) snd_usb_autosuspend() 682 if (atomic_read(&chip->shutdown)) snd_usb_autosuspend() 684 if (atomic_dec_and_test(&chip->active)) snd_usb_autosuspend() 685 usb_autopm_put_interface(chip->pm_intf); snd_usb_autosuspend() 690 struct snd_usb_audio *chip = usb_get_intfdata(intf); usb_audio_suspend() local 695 if (chip == (void *)-1L) usb_audio_suspend() 699 snd_power_change_state(chip->card, SNDRV_CTL_POWER_D3hot); usb_audio_suspend() 700 if (!chip->num_suspended_intf++) { usb_audio_suspend() 701 list_for_each_entry(as, &chip->pcm_list, list) { usb_audio_suspend() 706 list_for_each(p, &chip->midi_list) { usb_audio_suspend() 715 if (!chip->num_suspended_intf++) usb_audio_suspend() 716 chip->autosuspended = 1; usb_audio_suspend() 719 if (chip->num_suspended_intf == 1) usb_audio_suspend() 720 list_for_each_entry(mixer, &chip->mixer_list, list) usb_audio_suspend() 728 struct snd_usb_audio *chip = usb_get_intfdata(intf); __usb_audio_resume() local 733 if (chip == (void *)-1L) __usb_audio_resume() 735 if (--chip->num_suspended_intf) __usb_audio_resume() 738 atomic_inc(&chip->active); /* avoid autopm */ __usb_audio_resume() 743 list_for_each_entry(mixer, &chip->mixer_list, list) { __usb_audio_resume() 749 list_for_each(p, &chip->midi_list) { __usb_audio_resume() 753 if (!chip->autosuspended) __usb_audio_resume() 754 snd_power_change_state(chip->card, SNDRV_CTL_POWER_D0); __usb_audio_resume() 755 chip->autosuspended = 0; __usb_audio_resume() 758 atomic_dec(&chip->active); /* allow autopm after this point */ __usb_audio_resume()
/linux-4.1.27/sound/sparc/
H A D	cs4231.c	128 #define CS4231U(chip, x) ((chip)->port + ((c_d_c_CS4231##x) << 2)) 174 #define APC_CHIP_RESET 0x01 /* Reset the chip */ 277 static void snd_cs4231_ready(struct snd_cs4231 *chip) snd_cs4231_ready() argument 282 int val = __cs4231_readb(chip, CS4231U(chip, REGSEL)); snd_cs4231_ready() 289 static void snd_cs4231_dout(struct snd_cs4231 *chip, unsigned char reg, snd_cs4231_dout() argument 292 snd_cs4231_ready(chip); snd_cs4231_dout() 294 if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT) snd_cs4231_dout() 299 __cs4231_writeb(chip, chip->mce_bit | reg, CS4231U(chip, REGSEL)); snd_cs4231_dout() 301 __cs4231_writeb(chip, value, CS4231U(chip, REG)); snd_cs4231_dout() 305 static inline void snd_cs4231_outm(struct snd_cs4231 *chip, unsigned char reg, snd_cs4231_outm() argument 308 unsigned char tmp = (chip->image[reg] & mask) | value; snd_cs4231_outm() 310 chip->image[reg] = tmp; snd_cs4231_outm() 311 if (!chip->calibrate_mute) snd_cs4231_outm() 312 snd_cs4231_dout(chip, reg, tmp); snd_cs4231_outm() 315 static void snd_cs4231_out(struct snd_cs4231 *chip, unsigned char reg, snd_cs4231_out() argument 318 snd_cs4231_dout(chip, reg, value); snd_cs4231_out() 319 chip->image[reg] = value; snd_cs4231_out() 323 static unsigned char snd_cs4231_in(struct snd_cs4231 *chip, unsigned char reg) snd_cs4231_in() argument 325 snd_cs4231_ready(chip); snd_cs4231_in() 327 if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT) snd_cs4231_in() 331 __cs4231_writeb(chip, chip->mce_bit | reg, CS4231U(chip, REGSEL)); snd_cs4231_in() 333 return __cs4231_readb(chip, CS4231U(chip, REG)); snd_cs4231_in() 340 static void snd_cs4231_busy_wait(struct snd_cs4231 *chip) snd_cs4231_busy_wait() argument 344 /* looks like this sequence is proper for CS4231A chip (GUS MAX) */ snd_cs4231_busy_wait() 346 __cs4231_readb(chip, CS4231U(chip, REGSEL)); snd_cs4231_busy_wait() 350 int val = __cs4231_readb(chip, CS4231U(chip, REGSEL)); snd_cs4231_busy_wait() 357 static void snd_cs4231_mce_up(struct snd_cs4231 *chip) snd_cs4231_mce_up() argument 362 spin_lock_irqsave(&chip->lock, flags); snd_cs4231_mce_up() 363 snd_cs4231_ready(chip); snd_cs4231_mce_up() 365 if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT) snd_cs4231_mce_up() 368 chip->mce_bit |= CS4231_MCE; snd_cs4231_mce_up() 369 timeout = __cs4231_readb(chip, CS4231U(chip, REGSEL)); snd_cs4231_mce_up() 373 chip->port); snd_cs4231_mce_up() 375 __cs4231_writeb(chip, chip->mce_bit | (timeout & 0x1f), snd_cs4231_mce_up() 376 CS4231U(chip, REGSEL)); snd_cs4231_mce_up() 377 spin_unlock_irqrestore(&chip->lock, flags); snd_cs4231_mce_up() 380 static void snd_cs4231_mce_down(struct snd_cs4231 *chip) snd_cs4231_mce_down() argument 385 snd_cs4231_busy_wait(chip); snd_cs4231_mce_down() 386 spin_lock_irqsave(&chip->lock, flags); snd_cs4231_mce_down() 388 if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT) snd_cs4231_mce_down() 390 CS4231U(chip, REGSEL)); snd_cs4231_mce_down() 392 chip->mce_bit &= ~CS4231_MCE; snd_cs4231_mce_down() 393 reg = __cs4231_readb(chip, CS4231U(chip, REGSEL)); snd_cs4231_mce_down() 394 __cs4231_writeb(chip, chip->mce_bit | (reg & 0x1f), snd_cs4231_mce_down() 395 CS4231U(chip, REGSEL)); snd_cs4231_mce_down() 398 "- codec still busy\n", chip->port); snd_cs4231_mce_down() 400 spin_unlock_irqrestore(&chip->lock, flags); snd_cs4231_mce_down() 409 spin_unlock_irqrestore(&chip->lock, flags); snd_cs4231_mce_down() 411 spin_lock_irqsave(&chip->lock, flags); snd_cs4231_mce_down() 412 reg = snd_cs4231_in(chip, CS4231_TEST_INIT); snd_cs4231_mce_down() 415 spin_unlock_irqrestore(&chip->lock, flags); snd_cs4231_mce_down() 445 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); cs4231_dma_trigger() local 449 dma_cont = &chip->p_dma; cs4231_dma_trigger() 454 chip->playback_substream, cs4231_dma_trigger() 455 &chip->p_periods_sent); cs4231_dma_trigger() 461 dma_cont = &chip->c_dma; cs4231_dma_trigger() 466 chip->capture_substream, cs4231_dma_trigger() 467 &chip->c_periods_sent); cs4231_dma_trigger() 476 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); snd_cs4231_trigger() local 488 if (s == chip->playback_substream) { snd_pcm_group_for_each_entry() 491 } else if (s == chip->capture_substream) { snd_pcm_group_for_each_entry() 497 spin_lock_irqsave(&chip->lock, flags); 500 chip->image[CS4231_IFACE_CTRL] |= what; 503 chip->image[CS4231_IFACE_CTRL] &= ~what; 505 snd_cs4231_out(chip, CS4231_IFACE_CTRL, 506 chip->image[CS4231_IFACE_CTRL]); 507 spin_unlock_irqrestore(&chip->lock, flags); 533 static unsigned char snd_cs4231_get_format(struct snd_cs4231 *chip, int format, snd_cs4231_get_format() argument 561 static void snd_cs4231_calibrate_mute(struct snd_cs4231 *chip, int mute) snd_cs4231_calibrate_mute() argument 566 spin_lock_irqsave(&chip->lock, flags); snd_cs4231_calibrate_mute() 567 if (chip->calibrate_mute == mute) { snd_cs4231_calibrate_mute() 568 spin_unlock_irqrestore(&chip->lock, flags); snd_cs4231_calibrate_mute() 572 snd_cs4231_dout(chip, CS4231_LEFT_INPUT, snd_cs4231_calibrate_mute() 573 chip->image[CS4231_LEFT_INPUT]); snd_cs4231_calibrate_mute() 574 snd_cs4231_dout(chip, CS4231_RIGHT_INPUT, snd_cs4231_calibrate_mute() 575 chip->image[CS4231_RIGHT_INPUT]); snd_cs4231_calibrate_mute() 576 snd_cs4231_dout(chip, CS4231_LOOPBACK, snd_cs4231_calibrate_mute() 577 chip->image[CS4231_LOOPBACK]); snd_cs4231_calibrate_mute() 579 snd_cs4231_dout(chip, CS4231_AUX1_LEFT_INPUT, snd_cs4231_calibrate_mute() 580 mute ? 0x80 : chip->image[CS4231_AUX1_LEFT_INPUT]); snd_cs4231_calibrate_mute() 581 snd_cs4231_dout(chip, CS4231_AUX1_RIGHT_INPUT, snd_cs4231_calibrate_mute() 582 mute ? 0x80 : chip->image[CS4231_AUX1_RIGHT_INPUT]); snd_cs4231_calibrate_mute() 583 snd_cs4231_dout(chip, CS4231_AUX2_LEFT_INPUT, snd_cs4231_calibrate_mute() 584 mute ? 0x80 : chip->image[CS4231_AUX2_LEFT_INPUT]); snd_cs4231_calibrate_mute() 585 snd_cs4231_dout(chip, CS4231_AUX2_RIGHT_INPUT, snd_cs4231_calibrate_mute() 586 mute ? 0x80 : chip->image[CS4231_AUX2_RIGHT_INPUT]); snd_cs4231_calibrate_mute() 587 snd_cs4231_dout(chip, CS4231_LEFT_OUTPUT, snd_cs4231_calibrate_mute() 588 mute ? 0x80 : chip->image[CS4231_LEFT_OUTPUT]); snd_cs4231_calibrate_mute() 589 snd_cs4231_dout(chip, CS4231_RIGHT_OUTPUT, snd_cs4231_calibrate_mute() 590 mute ? 0x80 : chip->image[CS4231_RIGHT_OUTPUT]); snd_cs4231_calibrate_mute() 591 snd_cs4231_dout(chip, CS4231_LEFT_LINE_IN, snd_cs4231_calibrate_mute() 592 mute ? 0x80 : chip->image[CS4231_LEFT_LINE_IN]); snd_cs4231_calibrate_mute() 593 snd_cs4231_dout(chip, CS4231_RIGHT_LINE_IN, snd_cs4231_calibrate_mute() 594 mute ? 0x80 : chip->image[CS4231_RIGHT_LINE_IN]); snd_cs4231_calibrate_mute() 595 snd_cs4231_dout(chip, CS4231_MONO_CTRL, snd_cs4231_calibrate_mute() 596 mute ? 0xc0 : chip->image[CS4231_MONO_CTRL]); snd_cs4231_calibrate_mute() 597 chip->calibrate_mute = mute; snd_cs4231_calibrate_mute() 598 spin_unlock_irqrestore(&chip->lock, flags); snd_cs4231_calibrate_mute() 601 static void snd_cs4231_playback_format(struct snd_cs4231 *chip, snd_cs4231_playback_format() argument 607 mutex_lock(&chip->mce_mutex); snd_cs4231_playback_format() 608 snd_cs4231_calibrate_mute(chip, 1); snd_cs4231_playback_format() 610 snd_cs4231_mce_up(chip); snd_cs4231_playback_format() 612 spin_lock_irqsave(&chip->lock, flags); snd_cs4231_playback_format() 613 snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT, snd_cs4231_playback_format() 614 (chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE) ? snd_cs4231_playback_format() 615 (pdfr & 0xf0) | (chip->image[CS4231_REC_FORMAT] & 0x0f) : snd_cs4231_playback_format() 617 spin_unlock_irqrestore(&chip->lock, flags); snd_cs4231_playback_format() 619 snd_cs4231_mce_down(chip); snd_cs4231_playback_format() 621 snd_cs4231_calibrate_mute(chip, 0); snd_cs4231_playback_format() 622 mutex_unlock(&chip->mce_mutex); snd_cs4231_playback_format() 625 static void snd_cs4231_capture_format(struct snd_cs4231 *chip, snd_cs4231_capture_format() argument 631 mutex_lock(&chip->mce_mutex); snd_cs4231_capture_format() 632 snd_cs4231_calibrate_mute(chip, 1); snd_cs4231_capture_format() 634 snd_cs4231_mce_up(chip); snd_cs4231_capture_format() 636 spin_lock_irqsave(&chip->lock, flags); snd_cs4231_capture_format() 637 if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE)) { snd_cs4231_capture_format() 638 snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT, snd_cs4231_capture_format() 639 ((chip->image[CS4231_PLAYBK_FORMAT]) & 0xf0) | snd_cs4231_capture_format() 641 spin_unlock_irqrestore(&chip->lock, flags); snd_cs4231_capture_format() 642 snd_cs4231_mce_down(chip); snd_cs4231_capture_format() 643 snd_cs4231_mce_up(chip); snd_cs4231_capture_format() 644 spin_lock_irqsave(&chip->lock, flags); snd_cs4231_capture_format() 646 snd_cs4231_out(chip, CS4231_REC_FORMAT, cdfr); snd_cs4231_capture_format() 647 spin_unlock_irqrestore(&chip->lock, flags); snd_cs4231_capture_format() 649 snd_cs4231_mce_down(chip); snd_cs4231_capture_format() 651 snd_cs4231_calibrate_mute(chip, 0); snd_cs4231_capture_format() 652 mutex_unlock(&chip->mce_mutex); snd_cs4231_capture_format() 661 struct snd_cs4231 *chip = snd_timer_chip(timer); snd_cs4231_timer_resolution() local 663 return chip->image[CS4231_PLAYBK_FORMAT] & 1 ? 9969 : 9920; snd_cs4231_timer_resolution() 670 struct snd_cs4231 *chip = snd_timer_chip(timer); snd_cs4231_timer_start() local 672 spin_lock_irqsave(&chip->lock, flags); snd_cs4231_timer_start() 674 if ((chip->image[CS4231_ALT_FEATURE_1] & CS4231_TIMER_ENABLE) == 0 || snd_cs4231_timer_start() 675 (unsigned char)(ticks >> 8) != chip->image[CS4231_TIMER_HIGH] || snd_cs4231_timer_start() 676 (unsigned char)ticks != chip->image[CS4231_TIMER_LOW]) { snd_cs4231_timer_start() 677 snd_cs4231_out(chip, CS4231_TIMER_HIGH, snd_cs4231_timer_start() 678 chip->image[CS4231_TIMER_HIGH] = snd_cs4231_timer_start() 680 snd_cs4231_out(chip, CS4231_TIMER_LOW, snd_cs4231_timer_start() 681 chip->image[CS4231_TIMER_LOW] = snd_cs4231_timer_start() 683 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, snd_cs4231_timer_start() 684 chip->image[CS4231_ALT_FEATURE_1] | snd_cs4231_timer_start() 687 spin_unlock_irqrestore(&chip->lock, flags); snd_cs4231_timer_start() 695 struct snd_cs4231 *chip = snd_timer_chip(timer); snd_cs4231_timer_stop() local 697 spin_lock_irqsave(&chip->lock, flags); snd_cs4231_timer_stop() 698 chip->image[CS4231_ALT_FEATURE_1] &= ~CS4231_TIMER_ENABLE; snd_cs4231_timer_stop() 699 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, snd_cs4231_timer_stop() 700 chip->image[CS4231_ALT_FEATURE_1]); snd_cs4231_timer_stop() 701 spin_unlock_irqrestore(&chip->lock, flags); snd_cs4231_timer_stop() 706 static void snd_cs4231_init(struct snd_cs4231 *chip) snd_cs4231_init() argument 710 snd_cs4231_mce_down(chip); snd_cs4231_init() 715 snd_cs4231_mce_up(chip); snd_cs4231_init() 716 spin_lock_irqsave(&chip->lock, flags); snd_cs4231_init() 717 chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE | snd_cs4231_init() 722 chip->image[CS4231_IFACE_CTRL] |= CS4231_AUTOCALIB; snd_cs4231_init() 723 snd_cs4231_out(chip, CS4231_IFACE_CTRL, chip->image[CS4231_IFACE_CTRL]); snd_cs4231_init() 724 spin_unlock_irqrestore(&chip->lock, flags); snd_cs4231_init() 725 snd_cs4231_mce_down(chip); snd_cs4231_init() 731 snd_cs4231_mce_up(chip); snd_cs4231_init() 732 spin_lock_irqsave(&chip->lock, flags); snd_cs4231_init() 733 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, snd_cs4231_init() 734 chip->image[CS4231_ALT_FEATURE_1]); snd_cs4231_init() 735 spin_unlock_irqrestore(&chip->lock, flags); snd_cs4231_init() 736 snd_cs4231_mce_down(chip); snd_cs4231_init() 740 chip->image[CS4231_ALT_FEATURE_1]); snd_cs4231_init() 743 spin_lock_irqsave(&chip->lock, flags); snd_cs4231_init() 744 snd_cs4231_out(chip, CS4231_ALT_FEATURE_2, snd_cs4231_init() 745 chip->image[CS4231_ALT_FEATURE_2]); snd_cs4231_init() 746 spin_unlock_irqrestore(&chip->lock, flags); snd_cs4231_init() 748 snd_cs4231_mce_up(chip); snd_cs4231_init() 749 spin_lock_irqsave(&chip->lock, flags); snd_cs4231_init() 750 snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT, snd_cs4231_init() 751 chip->image[CS4231_PLAYBK_FORMAT]); snd_cs4231_init() 752 spin_unlock_irqrestore(&chip->lock, flags); snd_cs4231_init() 753 snd_cs4231_mce_down(chip); snd_cs4231_init() 759 snd_cs4231_mce_up(chip); snd_cs4231_init() 760 spin_lock_irqsave(&chip->lock, flags); snd_cs4231_init() 761 snd_cs4231_out(chip, CS4231_REC_FORMAT, chip->image[CS4231_REC_FORMAT]); snd_cs4231_init() 762 spin_unlock_irqrestore(&chip->lock, flags); snd_cs4231_init() 763 snd_cs4231_mce_down(chip); snd_cs4231_init() 770 static int snd_cs4231_open(struct snd_cs4231 *chip, unsigned int mode) snd_cs4231_open() argument 774 mutex_lock(&chip->open_mutex); snd_cs4231_open() 775 if ((chip->mode & mode)) { snd_cs4231_open() 776 mutex_unlock(&chip->open_mutex); snd_cs4231_open() 779 if (chip->mode & CS4231_MODE_OPEN) { snd_cs4231_open() 780 chip->mode |= mode; snd_cs4231_open() 781 mutex_unlock(&chip->open_mutex); snd_cs4231_open() 785 spin_lock_irqsave(&chip->lock, flags); snd_cs4231_open() 786 snd_cs4231_out(chip, CS4231_IRQ_STATUS, CS4231_PLAYBACK_IRQ | snd_cs4231_open() 789 snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0); snd_cs4231_open() 790 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */ snd_cs4231_open() 791 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */ snd_cs4231_open() 793 snd_cs4231_out(chip, CS4231_IRQ_STATUS, CS4231_PLAYBACK_IRQ | snd_cs4231_open() 796 snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0); snd_cs4231_open() 798 spin_unlock_irqrestore(&chip->lock, flags); snd_cs4231_open() 800 chip->mode = mode; snd_cs4231_open() 801 mutex_unlock(&chip->open_mutex); snd_cs4231_open() 805 static void snd_cs4231_close(struct snd_cs4231 *chip, unsigned int mode) snd_cs4231_close() argument 809 mutex_lock(&chip->open_mutex); snd_cs4231_close() 810 chip->mode &= ~mode; snd_cs4231_close() 811 if (chip->mode & CS4231_MODE_OPEN) { snd_cs4231_close() 812 mutex_unlock(&chip->open_mutex); snd_cs4231_close() 815 snd_cs4231_calibrate_mute(chip, 1); snd_cs4231_close() 818 spin_lock_irqsave(&chip->lock, flags); snd_cs4231_close() 819 snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0); snd_cs4231_close() 820 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */ snd_cs4231_close() 821 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */ snd_cs4231_close() 825 if (chip->image[CS4231_IFACE_CTRL] & snd_cs4231_close() 828 spin_unlock_irqrestore(&chip->lock, flags); snd_cs4231_close() 829 snd_cs4231_mce_up(chip); snd_cs4231_close() 830 spin_lock_irqsave(&chip->lock, flags); snd_cs4231_close() 831 chip->image[CS4231_IFACE_CTRL] &= snd_cs4231_close() 834 snd_cs4231_out(chip, CS4231_IFACE_CTRL, snd_cs4231_close() 835 chip->image[CS4231_IFACE_CTRL]); snd_cs4231_close() 836 spin_unlock_irqrestore(&chip->lock, flags); snd_cs4231_close() 837 snd_cs4231_mce_down(chip); snd_cs4231_close() 838 spin_lock_irqsave(&chip->lock, flags); snd_cs4231_close() 842 snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0); snd_cs4231_close() 843 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */ snd_cs4231_close() 844 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */ snd_cs4231_close() 845 spin_unlock_irqrestore(&chip->lock, flags); snd_cs4231_close() 847 snd_cs4231_calibrate_mute(chip, 0); snd_cs4231_close() 849 chip->mode = 0; snd_cs4231_close() 850 mutex_unlock(&chip->open_mutex); snd_cs4231_close() 859 struct snd_cs4231 *chip = snd_timer_chip(timer); snd_cs4231_timer_open() local 860 snd_cs4231_open(chip, CS4231_MODE_TIMER); snd_cs4231_timer_open() 866 struct snd_cs4231 *chip = snd_timer_chip(timer); snd_cs4231_timer_close() local 867 snd_cs4231_close(chip, CS4231_MODE_TIMER); snd_cs4231_timer_close() 889 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); snd_cs4231_playback_hw_params() local 897 new_pdfr = snd_cs4231_get_format(chip, params_format(hw_params), snd_cs4231_playback_hw_params() 900 snd_cs4231_playback_format(chip, hw_params, new_pdfr); snd_cs4231_playback_hw_params() 907 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); snd_cs4231_playback_prepare() local 912 spin_lock_irqsave(&chip->lock, flags); snd_cs4231_playback_prepare() 914 chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE | snd_cs4231_playback_prepare() 922 chip->p_periods_sent = 0; snd_cs4231_playback_prepare() 925 spin_unlock_irqrestore(&chip->lock, flags); snd_cs4231_playback_prepare() 933 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); snd_cs4231_capture_hw_params() local 941 new_cdfr = snd_cs4231_get_format(chip, params_format(hw_params), snd_cs4231_capture_hw_params() 944 snd_cs4231_capture_format(chip, hw_params, new_cdfr); snd_cs4231_capture_hw_params() 951 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); snd_cs4231_capture_prepare() local 954 spin_lock_irqsave(&chip->lock, flags); snd_cs4231_capture_prepare() 955 chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_RECORD_ENABLE | snd_cs4231_capture_prepare() 959 chip->c_periods_sent = 0; snd_cs4231_capture_prepare() 960 spin_unlock_irqrestore(&chip->lock, flags); snd_cs4231_capture_prepare() 965 static void snd_cs4231_overrange(struct snd_cs4231 *chip) snd_cs4231_overrange() argument 970 spin_lock_irqsave(&chip->lock, flags); snd_cs4231_overrange() 971 res = snd_cs4231_in(chip, CS4231_TEST_INIT); snd_cs4231_overrange() 972 spin_unlock_irqrestore(&chip->lock, flags); snd_cs4231_overrange() 976 chip->capture_substream->runtime->overrange++; snd_cs4231_overrange() 979 static void snd_cs4231_play_callback(struct snd_cs4231 *chip) snd_cs4231_play_callback() argument 981 if (chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE) { snd_cs4231_play_callback() 982 snd_pcm_period_elapsed(chip->playback_substream); snd_cs4231_play_callback() 983 snd_cs4231_advance_dma(&chip->p_dma, chip->playback_substream, snd_cs4231_play_callback() 984 &chip->p_periods_sent); snd_cs4231_play_callback() 988 static void snd_cs4231_capture_callback(struct snd_cs4231 *chip) snd_cs4231_capture_callback() argument 990 if (chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE) { snd_cs4231_capture_callback() 991 snd_pcm_period_elapsed(chip->capture_substream); snd_cs4231_capture_callback() 992 snd_cs4231_advance_dma(&chip->c_dma, chip->capture_substream, snd_cs4231_capture_callback() 993 &chip->c_periods_sent); snd_cs4231_capture_callback() 1000 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); snd_cs4231_playback_pointer() local 1001 struct cs4231_dma_control *dma_cont = &chip->p_dma; snd_cs4231_playback_pointer() 1004 if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE)) snd_cs4231_playback_pointer() 1016 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); snd_cs4231_capture_pointer() local 1017 struct cs4231_dma_control *dma_cont = &chip->c_dma; snd_cs4231_capture_pointer() 1020 if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE)) snd_cs4231_capture_pointer() 1029 static int snd_cs4231_probe(struct snd_cs4231 *chip) snd_cs4231_probe() argument 1039 if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT) snd_cs4231_probe() 1042 spin_lock_irqsave(&chip->lock, flags); snd_cs4231_probe() 1043 snd_cs4231_out(chip, CS4231_MISC_INFO, CS4231_MODE2); snd_cs4231_probe() 1044 id = snd_cs4231_in(chip, CS4231_MISC_INFO) & 0x0f; snd_cs4231_probe() 1045 vers = snd_cs4231_in(chip, CS4231_VERSION); snd_cs4231_probe() 1046 spin_unlock_irqrestore(&chip->lock, flags); snd_cs4231_probe() 1051 snd_printdd("cs4231: port = %p, id = 0x%x\n", chip->port, id); snd_cs4231_probe() 1055 spin_lock_irqsave(&chip->lock, flags); snd_cs4231_probe() 1058 __cs4231_readb(chip, CS4231U(chip, STATUS)); snd_cs4231_probe() 1059 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); snd_cs4231_probe() 1062 spin_unlock_irqrestore(&chip->lock, flags); snd_cs4231_probe() 1064 chip->image[CS4231_MISC_INFO] = CS4231_MODE2; snd_cs4231_probe() 1065 chip->image[CS4231_IFACE_CTRL] = snd_cs4231_probe() 1066 chip->image[CS4231_IFACE_CTRL] & ~CS4231_SINGLE_DMA; snd_cs4231_probe() 1067 chip->image[CS4231_ALT_FEATURE_1] = 0x80; snd_cs4231_probe() 1068 chip->image[CS4231_ALT_FEATURE_2] = 0x01; snd_cs4231_probe() 1070 chip->image[CS4231_ALT_FEATURE_2] |= 0x02; snd_cs4231_probe() 1072 ptr = (unsigned char *) &chip->image; snd_cs4231_probe() 1074 snd_cs4231_mce_down(chip); snd_cs4231_probe() 1076 spin_lock_irqsave(&chip->lock, flags); snd_cs4231_probe() 1079 snd_cs4231_out(chip, i, *ptr++); snd_cs4231_probe() 1081 spin_unlock_irqrestore(&chip->lock, flags); snd_cs4231_probe() 1083 snd_cs4231_mce_up(chip); snd_cs4231_probe() 1085 snd_cs4231_mce_down(chip); snd_cs4231_probe() 1142 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); snd_cs4231_playback_open() local 1148 err = snd_cs4231_open(chip, CS4231_MODE_PLAY); snd_cs4231_playback_open() 1153 chip->playback_substream = substream; snd_cs4231_playback_open() 1154 chip->p_periods_sent = 0; snd_cs4231_playback_open() 1163 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); snd_cs4231_capture_open() local 1169 err = snd_cs4231_open(chip, CS4231_MODE_RECORD); snd_cs4231_capture_open() 1174 chip->capture_substream = substream; snd_cs4231_capture_open() 1175 chip->c_periods_sent = 0; snd_cs4231_capture_open() 1184 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); snd_cs4231_playback_close() local 1186 snd_cs4231_close(chip, CS4231_MODE_PLAY); snd_cs4231_playback_close() 1187 chip->playback_substream = NULL; snd_cs4231_playback_close() 1194 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); snd_cs4231_capture_close() local 1196 snd_cs4231_close(chip, CS4231_MODE_RECORD); snd_cs4231_capture_close() 1197 chip->capture_substream = NULL; snd_cs4231_capture_close() 1230 struct snd_cs4231 *chip = card->private_data; snd_cs4231_pcm() local 1244 pcm->private_data = chip; snd_cs4231_pcm() 1249 &chip->op->dev, snd_cs4231_pcm() 1252 chip->pcm = pcm; snd_cs4231_pcm() 1259 struct snd_cs4231 *chip = card->private_data; snd_cs4231_timer() local 1274 timer->private_data = chip; snd_cs4231_timer() 1276 chip->timer = timer; snd_cs4231_timer() 1298 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol); snd_cs4231_get_mux() local 1301 spin_lock_irqsave(&chip->lock, flags); snd_cs4231_get_mux() 1303 (chip->image[CS4231_LEFT_INPUT] & CS4231_MIXS_ALL) >> 6; snd_cs4231_get_mux() 1305 (chip->image[CS4231_RIGHT_INPUT] & CS4231_MIXS_ALL) >> 6; snd_cs4231_get_mux() 1306 spin_unlock_irqrestore(&chip->lock, flags); snd_cs4231_get_mux() 1314 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol); snd_cs4231_put_mux() local 1325 spin_lock_irqsave(&chip->lock, flags); snd_cs4231_put_mux() 1327 left = (chip->image[CS4231_LEFT_INPUT] & ~CS4231_MIXS_ALL) | left; snd_cs4231_put_mux() 1328 right = (chip->image[CS4231_RIGHT_INPUT] & ~CS4231_MIXS_ALL) | right; snd_cs4231_put_mux() 1329 change = left != chip->image[CS4231_LEFT_INPUT] || snd_cs4231_put_mux() 1330 right != chip->image[CS4231_RIGHT_INPUT]; snd_cs4231_put_mux() 1331 snd_cs4231_out(chip, CS4231_LEFT_INPUT, left); snd_cs4231_put_mux() 1332 snd_cs4231_out(chip, CS4231_RIGHT_INPUT, right); snd_cs4231_put_mux() 1334 spin_unlock_irqrestore(&chip->lock, flags); snd_cs4231_put_mux() 1356 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol); snd_cs4231_get_single() local 1363 spin_lock_irqsave(&chip->lock, flags); snd_cs4231_get_single() 1365 ucontrol->value.integer.value[0] = (chip->image[reg] >> shift) & mask; snd_cs4231_get_single() 1367 spin_unlock_irqrestore(&chip->lock, flags); snd_cs4231_get_single() 1379 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol); snd_cs4231_put_single() local 1393 spin_lock_irqsave(&chip->lock, flags); snd_cs4231_put_single() 1395 val = (chip->image[reg] & ~(mask << shift)) | val; snd_cs4231_put_single() 1396 change = val != chip->image[reg]; snd_cs4231_put_single() 1397 snd_cs4231_out(chip, reg, val); snd_cs4231_put_single() 1399 spin_unlock_irqrestore(&chip->lock, flags); snd_cs4231_put_single() 1421 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol); snd_cs4231_get_double() local 1430 spin_lock_irqsave(&chip->lock, flags); snd_cs4231_get_double() 1433 (chip->image[left_reg] >> shift_left) & mask; snd_cs4231_get_double() 1435 (chip->image[right_reg] >> shift_right) & mask; snd_cs4231_get_double() 1437 spin_unlock_irqrestore(&chip->lock, flags); snd_cs4231_get_double() 1452 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol); snd_cs4231_put_double() local 1472 spin_lock_irqsave(&chip->lock, flags); snd_cs4231_put_double() 1474 val1 = (chip->image[left_reg] & ~(mask << shift_left)) | val1; snd_cs4231_put_double() 1475 val2 = (chip->image[right_reg] & ~(mask << shift_right)) | val2; snd_cs4231_put_double() 1476 change = val1 != chip->image[left_reg]; snd_cs4231_put_double() 1477 change |= val2 != chip->image[right_reg]; snd_cs4231_put_double() 1478 snd_cs4231_out(chip, left_reg, val1); snd_cs4231_put_double() 1479 snd_cs4231_out(chip, right_reg, val2); snd_cs4231_put_double() 1481 spin_unlock_irqrestore(&chip->lock, flags); snd_cs4231_put_double() 1541 struct snd_cs4231 *chip = card->private_data; snd_cs4231_mixer() local 1544 if (snd_BUG_ON(!chip || !chip->pcm)) snd_cs4231_mixer() 1547 strcpy(card->mixername, chip->pcm->name); snd_cs4231_mixer() 1551 snd_ctl_new1(&snd_cs4231_controls[idx], chip)); snd_cs4231_mixer() 1564 struct snd_cs4231 *chip; cs4231_attach_begin() local 1585 chip = card->private_data; cs4231_attach_begin() 1586 chip->card = card; cs4231_attach_begin() 1594 struct snd_cs4231 *chip = card->private_data; cs4231_attach_finish() local 1613 dev_set_drvdata(&chip->op->dev, chip); cs4231_attach_finish() 1630 struct snd_cs4231 *chip = dev_id; snd_cs4231_sbus_interrupt() local 1633 if (!(__cs4231_readb(chip, CS4231U(chip, STATUS)) & CS4231_GLOBALIRQ)) snd_cs4231_sbus_interrupt() 1637 csr = sbus_readl(chip->port + APCCSR); snd_cs4231_sbus_interrupt() 1639 sbus_writel(csr, chip->port + APCCSR); snd_cs4231_sbus_interrupt() 1645 snd_cs4231_play_callback(chip); snd_cs4231_sbus_interrupt() 1651 snd_cs4231_capture_callback(chip); snd_cs4231_sbus_interrupt() 1653 status = snd_cs4231_in(chip, CS4231_IRQ_STATUS); snd_cs4231_sbus_interrupt() 1656 if (chip->timer) snd_cs4231_sbus_interrupt() 1657 snd_timer_interrupt(chip->timer, chip->timer->sticks); snd_cs4231_sbus_interrupt() 1661 snd_cs4231_overrange(chip); snd_cs4231_sbus_interrupt() 1664 spin_lock_irqsave(&chip->lock, flags); snd_cs4231_sbus_interrupt() 1665 snd_cs4231_outm(chip, CS4231_IRQ_STATUS, ~CS4231_ALL_IRQS | ~status, 0); snd_cs4231_sbus_interrupt() 1666 spin_unlock_irqrestore(&chip->lock, flags); snd_cs4231_sbus_interrupt() 1772 static int snd_cs4231_sbus_free(struct snd_cs4231 *chip) snd_cs4231_sbus_free() argument 1774 struct platform_device *op = chip->op; snd_cs4231_sbus_free() 1776 if (chip->irq[0]) snd_cs4231_sbus_free() 1777 free_irq(chip->irq[0], chip); snd_cs4231_sbus_free() 1779 if (chip->port) snd_cs4231_sbus_free() 1780 of_iounmap(&op->resource[0], chip->port, chip->regs_size); snd_cs4231_sbus_free() 1800 struct snd_cs4231 *chip = card->private_data; snd_cs4231_sbus_create() local 1803 spin_lock_init(&chip->lock); snd_cs4231_sbus_create() 1804 spin_lock_init(&chip->c_dma.sbus_info.lock); snd_cs4231_sbus_create() 1805 spin_lock_init(&chip->p_dma.sbus_info.lock); snd_cs4231_sbus_create() 1806 mutex_init(&chip->mce_mutex); snd_cs4231_sbus_create() 1807 mutex_init(&chip->open_mutex); snd_cs4231_sbus_create() 1808 chip->op = op; snd_cs4231_sbus_create() 1809 chip->regs_size = resource_size(&op->resource[0]); snd_cs4231_sbus_create() 1810 memcpy(&chip->image, &snd_cs4231_original_image, snd_cs4231_sbus_create() 1813 chip->port = of_ioremap(&op->resource[0], 0, snd_cs4231_sbus_create() 1814 chip->regs_size, "cs4231"); snd_cs4231_sbus_create() 1815 if (!chip->port) { snd_cs4231_sbus_create() 1816 snd_printdd("cs4231-%d: Unable to map chip registers.\n", dev); snd_cs4231_sbus_create() 1820 chip->c_dma.sbus_info.regs = chip->port; snd_cs4231_sbus_create() 1821 chip->p_dma.sbus_info.regs = chip->port; snd_cs4231_sbus_create() 1822 chip->c_dma.sbus_info.dir = APC_RECORD; snd_cs4231_sbus_create() 1823 chip->p_dma.sbus_info.dir = APC_PLAY; snd_cs4231_sbus_create() 1825 chip->p_dma.prepare = sbus_dma_prepare; snd_cs4231_sbus_create() 1826 chip->p_dma.enable = sbus_dma_enable; snd_cs4231_sbus_create() 1827 chip->p_dma.request = sbus_dma_request; snd_cs4231_sbus_create() 1828 chip->p_dma.address = sbus_dma_addr; snd_cs4231_sbus_create() 1830 chip->c_dma.prepare = sbus_dma_prepare; snd_cs4231_sbus_create() 1831 chip->c_dma.enable = sbus_dma_enable; snd_cs4231_sbus_create() 1832 chip->c_dma.request = sbus_dma_request; snd_cs4231_sbus_create() 1833 chip->c_dma.address = sbus_dma_addr; snd_cs4231_sbus_create() 1836 IRQF_SHARED, "cs4231", chip)) { snd_cs4231_sbus_create() 1839 snd_cs4231_sbus_free(chip); snd_cs4231_sbus_create() 1842 chip->irq[0] = op->archdata.irqs[0]; snd_cs4231_sbus_create() 1844 if (snd_cs4231_probe(chip) < 0) { snd_cs4231_sbus_create() 1845 snd_cs4231_sbus_free(chip); snd_cs4231_sbus_create() 1848 snd_cs4231_init(chip); snd_cs4231_sbus_create() 1851 chip, &snd_cs4231_sbus_dev_ops)) < 0) { snd_cs4231_sbus_create() 1852 snd_cs4231_sbus_free(chip); snd_cs4231_sbus_create() 1890 struct snd_cs4231 *chip = cookie; snd_cs4231_ebus_play_callback() local 1892 snd_cs4231_play_callback(chip); snd_cs4231_ebus_play_callback() 1898 struct snd_cs4231 *chip = cookie; snd_cs4231_ebus_capture_callback() local 1900 snd_cs4231_capture_callback(chip); snd_cs4231_ebus_capture_callback() 1932 static int snd_cs4231_ebus_free(struct snd_cs4231 *chip) snd_cs4231_ebus_free() argument 1934 struct platform_device *op = chip->op; snd_cs4231_ebus_free() 1936 if (chip->c_dma.ebus_info.regs) { snd_cs4231_ebus_free() 1937 ebus_dma_unregister(&chip->c_dma.ebus_info); snd_cs4231_ebus_free() 1938 of_iounmap(&op->resource[2], chip->c_dma.ebus_info.regs, 0x10); snd_cs4231_ebus_free() 1940 if (chip->p_dma.ebus_info.regs) { snd_cs4231_ebus_free() 1941 ebus_dma_unregister(&chip->p_dma.ebus_info); snd_cs4231_ebus_free() 1942 of_iounmap(&op->resource[1], chip->p_dma.ebus_info.regs, 0x10); snd_cs4231_ebus_free() 1945 if (chip->port) snd_cs4231_ebus_free() 1946 of_iounmap(&op->resource[0], chip->port, 0x10); snd_cs4231_ebus_free() 1966 struct snd_cs4231 *chip = card->private_data; snd_cs4231_ebus_create() local 1969 spin_lock_init(&chip->lock); snd_cs4231_ebus_create() 1970 spin_lock_init(&chip->c_dma.ebus_info.lock); snd_cs4231_ebus_create() 1971 spin_lock_init(&chip->p_dma.ebus_info.lock); snd_cs4231_ebus_create() 1972 mutex_init(&chip->mce_mutex); snd_cs4231_ebus_create() 1973 mutex_init(&chip->open_mutex); snd_cs4231_ebus_create() 1974 chip->flags |= CS4231_FLAG_EBUS; snd_cs4231_ebus_create() 1975 chip->op = op; snd_cs4231_ebus_create() 1976 memcpy(&chip->image, &snd_cs4231_original_image, snd_cs4231_ebus_create() 1978 strcpy(chip->c_dma.ebus_info.name, "cs4231(capture)"); snd_cs4231_ebus_create() 1979 chip->c_dma.ebus_info.flags = EBUS_DMA_FLAG_USE_EBDMA_HANDLER; snd_cs4231_ebus_create() 1980 chip->c_dma.ebus_info.callback = snd_cs4231_ebus_capture_callback; snd_cs4231_ebus_create() 1981 chip->c_dma.ebus_info.client_cookie = chip; snd_cs4231_ebus_create() 1982 chip->c_dma.ebus_info.irq = op->archdata.irqs[0]; snd_cs4231_ebus_create() 1983 strcpy(chip->p_dma.ebus_info.name, "cs4231(play)"); snd_cs4231_ebus_create() 1984 chip->p_dma.ebus_info.flags = EBUS_DMA_FLAG_USE_EBDMA_HANDLER; snd_cs4231_ebus_create() 1985 chip->p_dma.ebus_info.callback = snd_cs4231_ebus_play_callback; snd_cs4231_ebus_create() 1986 chip->p_dma.ebus_info.client_cookie = chip; snd_cs4231_ebus_create() 1987 chip->p_dma.ebus_info.irq = op->archdata.irqs[1]; snd_cs4231_ebus_create() 1989 chip->p_dma.prepare = _ebus_dma_prepare; snd_cs4231_ebus_create() 1990 chip->p_dma.enable = _ebus_dma_enable; snd_cs4231_ebus_create() 1991 chip->p_dma.request = _ebus_dma_request; snd_cs4231_ebus_create() 1992 chip->p_dma.address = _ebus_dma_addr; snd_cs4231_ebus_create() 1994 chip->c_dma.prepare = _ebus_dma_prepare; snd_cs4231_ebus_create() 1995 chip->c_dma.enable = _ebus_dma_enable; snd_cs4231_ebus_create() 1996 chip->c_dma.request = _ebus_dma_request; snd_cs4231_ebus_create() 1997 chip->c_dma.address = _ebus_dma_addr; snd_cs4231_ebus_create() 1999 chip->port = of_ioremap(&op->resource[0], 0, 0x10, "cs4231"); snd_cs4231_ebus_create() 2000 chip->p_dma.ebus_info.regs = snd_cs4231_ebus_create() 2002 chip->c_dma.ebus_info.regs = snd_cs4231_ebus_create() 2004 if (!chip->port || !chip->p_dma.ebus_info.regs || snd_cs4231_ebus_create() 2005 !chip->c_dma.ebus_info.regs) { snd_cs4231_ebus_create() 2006 snd_cs4231_ebus_free(chip); snd_cs4231_ebus_create() 2007 snd_printdd("cs4231-%d: Unable to map chip registers.\n", dev); snd_cs4231_ebus_create() 2011 if (ebus_dma_register(&chip->c_dma.ebus_info)) { snd_cs4231_ebus_create() 2012 snd_cs4231_ebus_free(chip); snd_cs4231_ebus_create() 2017 if (ebus_dma_irq_enable(&chip->c_dma.ebus_info, 1)) { snd_cs4231_ebus_create() 2018 snd_cs4231_ebus_free(chip); snd_cs4231_ebus_create() 2024 if (ebus_dma_register(&chip->p_dma.ebus_info)) { snd_cs4231_ebus_create() 2025 snd_cs4231_ebus_free(chip); snd_cs4231_ebus_create() 2030 if (ebus_dma_irq_enable(&chip->p_dma.ebus_info, 1)) { snd_cs4231_ebus_create() 2031 snd_cs4231_ebus_free(chip); snd_cs4231_ebus_create() 2036 if (snd_cs4231_probe(chip) < 0) { snd_cs4231_ebus_create() 2037 snd_cs4231_ebus_free(chip); snd_cs4231_ebus_create() 2040 snd_cs4231_init(chip); snd_cs4231_ebus_create() 2043 chip, &snd_cs4231_ebus_dev_ops)) < 0) { snd_cs4231_ebus_create() 2044 snd_cs4231_ebus_free(chip); snd_cs4231_ebus_create() 2091 struct snd_cs4231 *chip = dev_get_drvdata(&op->dev); cs4231_remove() local 2093 snd_card_free(chip->card); cs4231_remove()
/linux-4.1.27/sound/pcmcia/pdaudiocf/
H A D	pdaudiocf_core.c	33 struct snd_pdacf *chip = private_data; pdacf_ak4117_read() local 38 spin_lock_irqsave(&chip->ak4117_lock, flags); pdacf_ak4117_read() 40 while (pdacf_reg_read(chip, PDAUDIOCF_REG_SCR) & PDAUDIOCF_AK_SBP) { pdacf_ak4117_read() 43 spin_unlock_irqrestore(&chip->ak4117_lock, flags); pdacf_ak4117_read() 48 pdacf_reg_write(chip, PDAUDIOCF_REG_AK_IFR, (u16)reg << 8); pdacf_ak4117_read() 50 while (pdacf_reg_read(chip, PDAUDIOCF_REG_SCR) & PDAUDIOCF_AK_SBP) { pdacf_ak4117_read() 53 spin_unlock_irqrestore(&chip->ak4117_lock, flags); pdacf_ak4117_read() 58 res = (unsigned char)pdacf_reg_read(chip, PDAUDIOCF_REG_AK_IFR); pdacf_ak4117_read() 59 spin_unlock_irqrestore(&chip->ak4117_lock, flags); pdacf_ak4117_read() 65 struct snd_pdacf *chip = private_data; pdacf_ak4117_write() local 69 spin_lock_irqsave(&chip->ak4117_lock, flags); pdacf_ak4117_write() 71 while (inw(chip->port + PDAUDIOCF_REG_SCR) & PDAUDIOCF_AK_SBP) { pdacf_ak4117_write() 74 spin_unlock_irqrestore(&chip->ak4117_lock, flags); pdacf_ak4117_write() 79 outw((u16)reg << 8 | val | (1<<13), chip->port + PDAUDIOCF_REG_AK_IFR); pdacf_ak4117_write() 80 spin_unlock_irqrestore(&chip->ak4117_lock, flags); pdacf_ak4117_write() 84 void pdacf_dump(struct snd_pdacf *chip) 86 printk(KERN_DEBUG "PDAUDIOCF DUMP (0x%lx):\n", chip->port); 88 inw(chip->port + PDAUDIOCF_REG_WDP)); 90 inw(chip->port + PDAUDIOCF_REG_RDP)); 92 inw(chip->port + PDAUDIOCF_REG_TCR)); 94 inw(chip->port + PDAUDIOCF_REG_SCR)); 96 inw(chip->port + PDAUDIOCF_REG_ISR)); 98 inw(chip->port + PDAUDIOCF_REG_IER)); 100 inw(chip->port + PDAUDIOCF_REG_AK_IFR)); 104 static int pdacf_reset(struct snd_pdacf *chip, int powerdown) pdacf_reset() argument 108 val = pdacf_reg_read(chip, PDAUDIOCF_REG_SCR); pdacf_reset() 111 pdacf_reg_write(chip, PDAUDIOCF_REG_SCR, val); pdacf_reset() 114 pdacf_reg_write(chip, PDAUDIOCF_REG_SCR, val); pdacf_reset() 117 pdacf_reg_write(chip, PDAUDIOCF_REG_SCR, val); pdacf_reset() 121 pdacf_reg_write(chip, PDAUDIOCF_REG_SCR, val); pdacf_reset() 127 void pdacf_reinit(struct snd_pdacf *chip, int resume) pdacf_reinit() argument 129 pdacf_reset(chip, 0); pdacf_reinit() 131 pdacf_reg_write(chip, PDAUDIOCF_REG_SCR, chip->suspend_reg_scr); pdacf_reinit() 132 snd_ak4117_reinit(chip->ak4117); pdacf_reinit() 133 pdacf_reg_write(chip, PDAUDIOCF_REG_TCR, chip->regmap[PDAUDIOCF_REG_TCR>>1]); pdacf_reinit() 134 pdacf_reg_write(chip, PDAUDIOCF_REG_IER, chip->regmap[PDAUDIOCF_REG_IER>>1]); pdacf_reinit() 140 struct snd_pdacf *chip = entry->private_data; pdacf_proc_read() local 144 tmp = pdacf_reg_read(chip, PDAUDIOCF_REG_SCR); pdacf_proc_read() 149 static void pdacf_proc_init(struct snd_pdacf *chip) pdacf_proc_init() argument 153 if (! snd_card_proc_new(chip->card, "pdaudiocf", &entry)) pdacf_proc_init() 154 snd_info_set_text_ops(entry, chip, pdacf_proc_read); pdacf_proc_init() 159 struct snd_pdacf *chip; snd_pdacf_create() local 161 chip = kzalloc(sizeof(*chip), GFP_KERNEL); snd_pdacf_create() 162 if (chip == NULL) snd_pdacf_create() 164 chip->card = card; snd_pdacf_create() 165 mutex_init(&chip->reg_lock); snd_pdacf_create() 166 spin_lock_init(&chip->ak4117_lock); snd_pdacf_create() 167 card->private_data = chip; snd_pdacf_create() 169 pdacf_proc_init(chip); snd_pdacf_create() 170 return chip; snd_pdacf_create() 175 struct snd_pdacf *chip = ak4117->change_callback_private; snd_pdacf_ak4117_change() local 180 mutex_lock(&chip->reg_lock); snd_pdacf_ak4117_change() 181 val = chip->regmap[PDAUDIOCF_REG_SCR>>1]; snd_pdacf_ak4117_change() 186 pdacf_reg_write(chip, PDAUDIOCF_REG_SCR, val); snd_pdacf_ak4117_change() 187 mutex_unlock(&chip->reg_lock); snd_pdacf_ak4117_change() 190 int snd_pdacf_ak4117_create(struct snd_pdacf *chip) snd_pdacf_ak4117_create() argument 206 err = pdacf_reset(chip, 0); snd_pdacf_ak4117_create() 209 err = snd_ak4117_create(chip->card, pdacf_ak4117_read, pdacf_ak4117_write, pgm, chip, &chip->ak4117); snd_pdacf_ak4117_create() 213 val = pdacf_reg_read(chip, PDAUDIOCF_REG_TCR); snd_pdacf_ak4117_create() 220 pdacf_reg_write(chip, PDAUDIOCF_REG_TCR, val); snd_pdacf_ak4117_create() 223 val = pdacf_reg_read(chip, PDAUDIOCF_REG_SCR); snd_pdacf_ak4117_create() 227 pdacf_reg_write(chip, PDAUDIOCF_REG_SCR, val); snd_pdacf_ak4117_create() 230 val = pdacf_reg_read(chip, PDAUDIOCF_REG_IER); snd_pdacf_ak4117_create() 235 pdacf_reg_write(chip, PDAUDIOCF_REG_IER, val); snd_pdacf_ak4117_create() 237 chip->ak4117->change_callback_private = chip; snd_pdacf_ak4117_create() 238 chip->ak4117->change_callback = snd_pdacf_ak4117_change; snd_pdacf_ak4117_create() 241 snd_pdacf_ak4117_change(chip->ak4117, AK4117_UNLCK, 0); snd_pdacf_ak4117_create() 246 void snd_pdacf_powerdown(struct snd_pdacf *chip) snd_pdacf_powerdown() argument 250 val = pdacf_reg_read(chip, PDAUDIOCF_REG_SCR); snd_pdacf_powerdown() 251 chip->suspend_reg_scr = val; snd_pdacf_powerdown() 253 pdacf_reg_write(chip, PDAUDIOCF_REG_SCR, val); snd_pdacf_powerdown() 254 /* disable interrupts, but use direct write to preserve old register value in chip->regmap */ snd_pdacf_powerdown() 255 val = inw(chip->port + PDAUDIOCF_REG_IER); snd_pdacf_powerdown() 257 outw(val, chip->port + PDAUDIOCF_REG_IER); snd_pdacf_powerdown() 258 pdacf_reset(chip, 1); snd_pdacf_powerdown() 263 int snd_pdacf_suspend(struct snd_pdacf *chip) snd_pdacf_suspend() argument 267 snd_power_change_state(chip->card, SNDRV_CTL_POWER_D3hot); snd_pdacf_suspend() 268 snd_pcm_suspend_all(chip->pcm); snd_pdacf_suspend() 269 /* disable interrupts, but use direct write to preserve old register value in chip->regmap */ snd_pdacf_suspend() 270 val = inw(chip->port + PDAUDIOCF_REG_IER); snd_pdacf_suspend() 272 outw(val, chip->port + PDAUDIOCF_REG_IER); snd_pdacf_suspend() 273 chip->chip_status |= PDAUDIOCF_STAT_IS_SUSPENDED; /* ignore interrupts from now */ snd_pdacf_suspend() 274 snd_pdacf_powerdown(chip); snd_pdacf_suspend() 278 static inline int check_signal(struct snd_pdacf *chip) check_signal() argument 280 return (chip->ak4117->rcs0 & AK4117_UNLCK) == 0; check_signal() 283 int snd_pdacf_resume(struct snd_pdacf *chip) snd_pdacf_resume() argument 287 pdacf_reinit(chip, 1); snd_pdacf_resume() 290 (snd_ak4117_external_rate(chip->ak4117) <= 0 || !check_signal(chip))) snd_pdacf_resume() 292 chip->chip_status &= ~PDAUDIOCF_STAT_IS_SUSPENDED; snd_pdacf_resume() 293 snd_power_change_state(chip->card, SNDRV_CTL_POWER_D0); snd_pdacf_resume()
H A D	pdaudiocf_irq.c	31 struct snd_pdacf *chip = dev; pdacf_interrupt() local 35 if ((chip->chip_status & (PDAUDIOCF_STAT_IS_STALE| pdacf_interrupt() 40 stat = inw(chip->port + PDAUDIOCF_REG_ISR); pdacf_interrupt() 44 if (chip->pcm_substream) pdacf_interrupt() 50 snd_ak4117_check_rate_and_errors(chip->ak4117, 0); pdacf_interrupt() 208 static void pdacf_transfer(struct snd_pdacf *chip, unsigned int size, unsigned int off) pdacf_transfer() argument 210 unsigned long rdp_port = chip->port + PDAUDIOCF_REG_MD; pdacf_transfer() 211 unsigned int xor = chip->pcm_xor; pdacf_transfer() 213 if (chip->pcm_sample == 3) { pdacf_transfer() 214 if (chip->pcm_little) { pdacf_transfer() 215 if (chip->pcm_channels == 1) { pdacf_transfer() 216 pdacf_transfer_mono24le((char *)chip->pcm_area + (off * 3), xor, size, rdp_port); pdacf_transfer() 218 pdacf_transfer_stereo24le((char *)chip->pcm_area + (off * 6), xor, size, rdp_port); pdacf_transfer() 221 if (chip->pcm_channels == 1) { pdacf_transfer() 222 pdacf_transfer_mono24be((char *)chip->pcm_area + (off * 3), xor, size, rdp_port); pdacf_transfer() 224 pdacf_transfer_stereo24be((char *)chip->pcm_area + (off * 6), xor, size, rdp_port); pdacf_transfer() 229 if (chip->pcm_swab == 0) { pdacf_transfer() 230 if (chip->pcm_channels == 1) { pdacf_transfer() 231 if (chip->pcm_frame == 2) { pdacf_transfer() 232 pdacf_transfer_mono16((u16 *)chip->pcm_area + off, xor, size, rdp_port); pdacf_transfer() 234 pdacf_transfer_mono32((u32 *)chip->pcm_area + off, xor, size, rdp_port); pdacf_transfer() 237 if (chip->pcm_frame == 2) { pdacf_transfer() 238 pdacf_transfer_stereo16((u16 *)chip->pcm_area + (off * 2), xor, size, rdp_port); pdacf_transfer() 240 pdacf_transfer_stereo32((u32 *)chip->pcm_area + (off * 2), xor, size, rdp_port); pdacf_transfer() 244 if (chip->pcm_channels == 1) { pdacf_transfer() 245 if (chip->pcm_frame == 2) { pdacf_transfer() 246 pdacf_transfer_mono16sw((u16 *)chip->pcm_area + off, xor, size, rdp_port); pdacf_transfer() 248 pdacf_transfer_mono32sw((u32 *)chip->pcm_area + off, xor, size, rdp_port); pdacf_transfer() 251 if (chip->pcm_frame == 2) { pdacf_transfer() 252 pdacf_transfer_stereo16sw((u16 *)chip->pcm_area + (off * 2), xor, size, rdp_port); pdacf_transfer() 254 pdacf_transfer_stereo32sw((u32 *)chip->pcm_area + (off * 2), xor, size, rdp_port); pdacf_transfer() 262 struct snd_pdacf *chip = dev; pdacf_threaded_irq() local 265 if ((chip->chip_status & (PDAUDIOCF_STAT_IS_STALE|PDAUDIOCF_STAT_IS_CONFIGURED)) != PDAUDIOCF_STAT_IS_CONFIGURED) pdacf_threaded_irq() 268 if (chip->pcm_substream == NULL || chip->pcm_substream->runtime == NULL || !snd_pcm_running(chip->pcm_substream)) pdacf_threaded_irq() 271 rdp = inw(chip->port + PDAUDIOCF_REG_RDP); pdacf_threaded_irq() 272 wdp = inw(chip->port + PDAUDIOCF_REG_WDP); pdacf_threaded_irq() 279 size /= chip->pcm_frame; pdacf_threaded_irq() 284 chip->pcm_hwptr += size; pdacf_threaded_irq() 285 chip->pcm_hwptr %= chip->pcm_size; pdacf_threaded_irq() 286 chip->pcm_tdone += size; pdacf_threaded_irq() 287 if (chip->pcm_frame == 2) { pdacf_threaded_irq() 288 unsigned long rdp_port = chip->port + PDAUDIOCF_REG_MD; pdacf_threaded_irq() 294 unsigned long rdp_port = chip->port + PDAUDIOCF_REG_MD; pdacf_threaded_irq() 302 off = chip->pcm_hwptr + chip->pcm_tdone; pdacf_threaded_irq() 303 off %= chip->pcm_size; pdacf_threaded_irq() 304 chip->pcm_tdone += size; pdacf_threaded_irq() 306 cont = chip->pcm_size - off; pdacf_threaded_irq() 309 pdacf_transfer(chip, cont, off); pdacf_threaded_irq() 311 off %= chip->pcm_size; pdacf_threaded_irq() 315 mutex_lock(&chip->reg_lock); pdacf_threaded_irq() 316 while (chip->pcm_tdone >= chip->pcm_period) { pdacf_threaded_irq() 317 chip->pcm_hwptr += chip->pcm_period; pdacf_threaded_irq() 318 chip->pcm_hwptr %= chip->pcm_size; pdacf_threaded_irq() 319 chip->pcm_tdone -= chip->pcm_period; pdacf_threaded_irq() 320 mutex_unlock(&chip->reg_lock); pdacf_threaded_irq() 321 snd_pcm_period_elapsed(chip->pcm_substream); pdacf_threaded_irq() 322 mutex_lock(&chip->reg_lock); pdacf_threaded_irq() 324 mutex_unlock(&chip->reg_lock); pdacf_threaded_irq()
H A D	pdaudiocf_pcm.c	32 static int pdacf_pcm_clear_sram(struct snd_pdacf *chip) pdacf_pcm_clear_sram() argument 36 while (inw(chip->port + PDAUDIOCF_REG_RDP) != inw(chip->port + PDAUDIOCF_REG_WDP)) { pdacf_pcm_clear_sram() 39 inw(chip->port + PDAUDIOCF_REG_MD); pdacf_pcm_clear_sram() 49 struct snd_pdacf *chip = snd_pcm_substream_chip(subs); pdacf_pcm_trigger() local 54 if (chip->chip_status & PDAUDIOCF_STAT_IS_STALE) pdacf_pcm_trigger() 59 chip->pcm_hwptr = 0; pdacf_pcm_trigger() 60 chip->pcm_tdone = 0; pdacf_pcm_trigger() 67 rate = snd_ak4117_check_rate_and_errors(chip->ak4117, AK4117_CHECK_NO_STAT|AK4117_CHECK_NO_RATE); pdacf_pcm_trigger() 80 mutex_lock(&chip->reg_lock); pdacf_pcm_trigger() 81 chip->pcm_running += inc; pdacf_pcm_trigger() 82 tmp = pdacf_reg_read(chip, PDAUDIOCF_REG_SCR); pdacf_pcm_trigger() 83 if (chip->pcm_running) { pdacf_pcm_trigger() 84 if ((chip->ak4117->rcs0 & AK4117_UNLCK) || runtime->rate != rate) { pdacf_pcm_trigger() 85 chip->pcm_running -= inc; pdacf_pcm_trigger() 92 pdacf_reg_write(chip, PDAUDIOCF_REG_SCR, tmp); pdacf_pcm_trigger() 94 mutex_unlock(&chip->reg_lock); pdacf_pcm_trigger() 95 snd_ak4117_check_rate_and_errors(chip->ak4117, AK4117_CHECK_NO_RATE); pdacf_pcm_trigger() 122 struct snd_pdacf *chip = snd_pcm_substream_chip(subs); pdacf_pcm_prepare() local 126 if (chip->chip_status & PDAUDIOCF_STAT_IS_STALE) pdacf_pcm_prepare() 129 chip->pcm_channels = runtime->channels; pdacf_pcm_prepare() 131 chip->pcm_little = snd_pcm_format_little_endian(runtime->format) > 0; pdacf_pcm_prepare() 133 chip->pcm_swab = snd_pcm_format_big_endian(runtime->format) > 0; pdacf_pcm_prepare() 135 chip->pcm_swab = chip->pcm_little; pdacf_pcm_prepare() 139 chip->pcm_xor = 0x80008000; pdacf_pcm_prepare() 141 if (pdacf_pcm_clear_sram(chip) < 0) pdacf_pcm_prepare() 144 val = nval = pdacf_reg_read(chip, PDAUDIOCF_REG_SCR); pdacf_pcm_prepare() 155 chip->pcm_sample = 4; pdacf_pcm_prepare() 160 chip->pcm_frame = 2; pdacf_pcm_prepare() 161 chip->pcm_sample = 2; pdacf_pcm_prepare() 165 chip->pcm_sample = 3; pdacf_pcm_prepare() 169 chip->pcm_frame = 3; pdacf_pcm_prepare() 170 chip->pcm_xor &= 0xffff0000; pdacf_pcm_prepare() 175 snd_ak4117_reg_write(chip->ak4117, AK4117_REG_IO, AK4117_DIF2|AK4117_DIF1|AK4117_DIF0, aval); pdacf_pcm_prepare() 176 pdacf_reg_write(chip, PDAUDIOCF_REG_SCR, nval); pdacf_pcm_prepare() 179 val = pdacf_reg_read(chip, PDAUDIOCF_REG_IER); pdacf_pcm_prepare() 182 pdacf_reg_write(chip, PDAUDIOCF_REG_IER, val); pdacf_pcm_prepare() 184 chip->pcm_size = runtime->buffer_size; pdacf_pcm_prepare() 185 chip->pcm_period = runtime->period_size; pdacf_pcm_prepare() 186 chip->pcm_area = runtime->dma_area; pdacf_pcm_prepare() 230 struct snd_pdacf *chip = snd_pcm_substream_chip(subs); pdacf_pcm_capture_open() local 232 if (chip->chip_status & PDAUDIOCF_STAT_IS_STALE) pdacf_pcm_capture_open() 236 runtime->private_data = chip; pdacf_pcm_capture_open() 237 chip->pcm_substream = subs; pdacf_pcm_capture_open() 247 struct snd_pdacf *chip = snd_pcm_substream_chip(subs); pdacf_pcm_capture_close() local 249 if (!chip) pdacf_pcm_capture_close() 251 pdacf_reinit(chip, 0); pdacf_pcm_capture_close() 252 chip->pcm_substream = NULL; pdacf_pcm_capture_close() 262 struct snd_pdacf *chip = snd_pcm_substream_chip(subs); pdacf_pcm_capture_pointer() local 263 return chip->pcm_hwptr; pdacf_pcm_capture_pointer() 286 int snd_pdacf_pcm_new(struct snd_pdacf *chip) snd_pdacf_pcm_new() argument 291 err = snd_pcm_new(chip->card, "PDAudioCF", 0, 0, 1, &pcm); snd_pdacf_pcm_new() 297 pcm->private_data = chip; snd_pdacf_pcm_new() 300 strcpy(pcm->name, chip->card->shortname); snd_pdacf_pcm_new() 301 chip->pcm = pcm; snd_pdacf_pcm_new() 303 err = snd_ak4117_build(chip->ak4117, pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream); snd_pdacf_pcm_new()
/linux-4.1.27/sound/isa/ad1816a/
H A D	ad1816a_lib.c	2 ad1816a.c - lowlevel code for Analog Devices AD1816A chip. 32 static inline int snd_ad1816a_busy_wait(struct snd_ad1816a *chip) snd_ad1816a_busy_wait() argument 40 snd_printk(KERN_WARNING "chip busy.\n"); snd_ad1816a_busy_wait() 44 static inline unsigned char snd_ad1816a_in(struct snd_ad1816a *chip, unsigned char reg) snd_ad1816a_in() argument 46 snd_ad1816a_busy_wait(chip); snd_ad1816a_in() 50 static inline void snd_ad1816a_out(struct snd_ad1816a *chip, unsigned char reg, snd_ad1816a_out() argument 53 snd_ad1816a_busy_wait(chip); snd_ad1816a_out() 57 static inline void snd_ad1816a_out_mask(struct snd_ad1816a *chip, unsigned char reg, snd_ad1816a_out_mask() argument 60 snd_ad1816a_out(chip, reg, snd_ad1816a_out_mask() 61 (value & mask) | (snd_ad1816a_in(chip, reg) & ~mask)); snd_ad1816a_out_mask() 64 static unsigned short snd_ad1816a_read(struct snd_ad1816a *chip, unsigned char reg) snd_ad1816a_read() argument 66 snd_ad1816a_out(chip, AD1816A_INDIR_ADDR, reg & 0x3f); snd_ad1816a_read() 67 return snd_ad1816a_in(chip, AD1816A_INDIR_DATA_LOW) | snd_ad1816a_read() 68 (snd_ad1816a_in(chip, AD1816A_INDIR_DATA_HIGH) << 8); snd_ad1816a_read() 71 static void snd_ad1816a_write(struct snd_ad1816a *chip, unsigned char reg, snd_ad1816a_write() argument 74 snd_ad1816a_out(chip, AD1816A_INDIR_ADDR, reg & 0x3f); snd_ad1816a_write() 75 snd_ad1816a_out(chip, AD1816A_INDIR_DATA_LOW, value & 0xff); snd_ad1816a_write() 76 snd_ad1816a_out(chip, AD1816A_INDIR_DATA_HIGH, (value >> 8) & 0xff); snd_ad1816a_write() 79 static void snd_ad1816a_write_mask(struct snd_ad1816a *chip, unsigned char reg, snd_ad1816a_write_mask() argument 82 snd_ad1816a_write(chip, reg, snd_ad1816a_write_mask() 83 (value & mask) | (snd_ad1816a_read(chip, reg) & ~mask)); snd_ad1816a_write_mask() 87 static unsigned char snd_ad1816a_get_format(struct snd_ad1816a *chip, snd_ad1816a_get_format() argument 108 static int snd_ad1816a_open(struct snd_ad1816a *chip, unsigned int mode) snd_ad1816a_open() argument 112 spin_lock_irqsave(&chip->lock, flags); snd_ad1816a_open() 114 if (chip->mode & mode) { snd_ad1816a_open() 115 spin_unlock_irqrestore(&chip->lock, flags); snd_ad1816a_open() 121 snd_ad1816a_out_mask(chip, AD1816A_INTERRUPT_STATUS, snd_ad1816a_open() 123 snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE, snd_ad1816a_open() 127 snd_ad1816a_out_mask(chip, AD1816A_INTERRUPT_STATUS, snd_ad1816a_open() 129 snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE, snd_ad1816a_open() 133 snd_ad1816a_out_mask(chip, AD1816A_INTERRUPT_STATUS, snd_ad1816a_open() 135 snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE, snd_ad1816a_open() 138 chip->mode |= mode; snd_ad1816a_open() 140 spin_unlock_irqrestore(&chip->lock, flags); snd_ad1816a_open() 144 static void snd_ad1816a_close(struct snd_ad1816a *chip, unsigned int mode) snd_ad1816a_close() argument 148 spin_lock_irqsave(&chip->lock, flags); snd_ad1816a_close() 152 snd_ad1816a_out_mask(chip, AD1816A_INTERRUPT_STATUS, snd_ad1816a_close() 154 snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE, snd_ad1816a_close() 158 snd_ad1816a_out_mask(chip, AD1816A_INTERRUPT_STATUS, snd_ad1816a_close() 160 snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE, snd_ad1816a_close() 164 snd_ad1816a_out_mask(chip, AD1816A_INTERRUPT_STATUS, snd_ad1816a_close() 166 snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE, snd_ad1816a_close() 169 if (!((chip->mode &= ~mode) & AD1816A_MODE_OPEN)) snd_ad1816a_close() 170 chip->mode = 0; snd_ad1816a_close() 172 spin_unlock_irqrestore(&chip->lock, flags); snd_ad1816a_close() 176 static int snd_ad1816a_trigger(struct snd_ad1816a *chip, unsigned char what, snd_ad1816a_trigger() argument 184 spin_lock(&chip->lock); snd_ad1816a_trigger() 191 snd_ad1816a_out_mask(chip, AD1816A_PLAYBACK_CONFIG, snd_ad1816a_trigger() 194 snd_ad1816a_out_mask(chip, AD1816A_CAPTURE_CONFIG, snd_ad1816a_trigger() 196 spin_unlock(&chip->lock); snd_ad1816a_trigger() 208 struct snd_ad1816a *chip = snd_pcm_substream_chip(substream); snd_ad1816a_playback_trigger() local 209 return snd_ad1816a_trigger(chip, AD1816A_PLAYBACK_ENABLE, snd_ad1816a_playback_trigger() 215 struct snd_ad1816a *chip = snd_pcm_substream_chip(substream); snd_ad1816a_capture_trigger() local 216 return snd_ad1816a_trigger(chip, AD1816A_CAPTURE_ENABLE, snd_ad1816a_capture_trigger() 233 struct snd_ad1816a *chip = snd_pcm_substream_chip(substream); snd_ad1816a_playback_prepare() local 238 spin_lock_irqsave(&chip->lock, flags); snd_ad1816a_playback_prepare() 240 chip->p_dma_size = size = snd_pcm_lib_buffer_bytes(substream); snd_ad1816a_playback_prepare() 241 snd_ad1816a_out_mask(chip, AD1816A_PLAYBACK_CONFIG, snd_ad1816a_playback_prepare() 244 snd_dma_program(chip->dma1, runtime->dma_addr, size, snd_ad1816a_playback_prepare() 248 if (chip->clock_freq) snd_ad1816a_playback_prepare() 249 rate = (rate * 33000) / chip->clock_freq; snd_ad1816a_playback_prepare() 250 snd_ad1816a_write(chip, AD1816A_PLAYBACK_SAMPLE_RATE, rate); snd_ad1816a_playback_prepare() 251 snd_ad1816a_out_mask(chip, AD1816A_PLAYBACK_CONFIG, snd_ad1816a_playback_prepare() 253 snd_ad1816a_get_format(chip, runtime->format, snd_ad1816a_playback_prepare() 256 snd_ad1816a_write(chip, AD1816A_PLAYBACK_BASE_COUNT, snd_ad1816a_playback_prepare() 259 spin_unlock_irqrestore(&chip->lock, flags); snd_ad1816a_playback_prepare() 265 struct snd_ad1816a *chip = snd_pcm_substream_chip(substream); snd_ad1816a_capture_prepare() local 270 spin_lock_irqsave(&chip->lock, flags); snd_ad1816a_capture_prepare() 272 chip->c_dma_size = size = snd_pcm_lib_buffer_bytes(substream); snd_ad1816a_capture_prepare() 273 snd_ad1816a_out_mask(chip, AD1816A_CAPTURE_CONFIG, snd_ad1816a_capture_prepare() 276 snd_dma_program(chip->dma2, runtime->dma_addr, size, snd_ad1816a_capture_prepare() 280 if (chip->clock_freq) snd_ad1816a_capture_prepare() 281 rate = (rate * 33000) / chip->clock_freq; snd_ad1816a_capture_prepare() 282 snd_ad1816a_write(chip, AD1816A_CAPTURE_SAMPLE_RATE, rate); snd_ad1816a_capture_prepare() 283 snd_ad1816a_out_mask(chip, AD1816A_CAPTURE_CONFIG, snd_ad1816a_capture_prepare() 285 snd_ad1816a_get_format(chip, runtime->format, snd_ad1816a_capture_prepare() 288 snd_ad1816a_write(chip, AD1816A_CAPTURE_BASE_COUNT, snd_ad1816a_capture_prepare() 291 spin_unlock_irqrestore(&chip->lock, flags); snd_ad1816a_capture_prepare() 298 struct snd_ad1816a *chip = snd_pcm_substream_chip(substream); snd_ad1816a_playback_pointer() local 300 if (!(chip->mode & AD1816A_MODE_PLAYBACK)) snd_ad1816a_playback_pointer() 302 ptr = snd_dma_pointer(chip->dma1, chip->p_dma_size); snd_ad1816a_playback_pointer() 308 struct snd_ad1816a *chip = snd_pcm_substream_chip(substream); snd_ad1816a_capture_pointer() local 310 if (!(chip->mode & AD1816A_MODE_CAPTURE)) snd_ad1816a_capture_pointer() 312 ptr = snd_dma_pointer(chip->dma2, chip->c_dma_size); snd_ad1816a_capture_pointer() 319 struct snd_ad1816a *chip = dev_id; snd_ad1816a_interrupt() local 322 spin_lock(&chip->lock); snd_ad1816a_interrupt() 323 status = snd_ad1816a_in(chip, AD1816A_INTERRUPT_STATUS); snd_ad1816a_interrupt() 324 spin_unlock(&chip->lock); snd_ad1816a_interrupt() 326 if ((status & AD1816A_PLAYBACK_IRQ_PENDING) && chip->playback_substream) snd_ad1816a_interrupt() 327 snd_pcm_period_elapsed(chip->playback_substream); snd_ad1816a_interrupt() 329 if ((status & AD1816A_CAPTURE_IRQ_PENDING) && chip->capture_substream) snd_ad1816a_interrupt() 330 snd_pcm_period_elapsed(chip->capture_substream); snd_ad1816a_interrupt() 332 if ((status & AD1816A_TIMER_IRQ_PENDING) && chip->timer) snd_ad1816a_interrupt() 333 snd_timer_interrupt(chip->timer, chip->timer->sticks); snd_ad1816a_interrupt() 335 spin_lock(&chip->lock); snd_ad1816a_interrupt() 336 snd_ad1816a_out(chip, AD1816A_INTERRUPT_STATUS, 0x00); snd_ad1816a_interrupt() 337 spin_unlock(&chip->lock); snd_ad1816a_interrupt() 382 struct snd_ad1816a *chip = snd_timer_chip(timer); snd_ad1816a_timer_close() local 383 snd_ad1816a_close(chip, AD1816A_MODE_TIMER); snd_ad1816a_timer_close() 389 struct snd_ad1816a *chip = snd_timer_chip(timer); snd_ad1816a_timer_open() local 390 snd_ad1816a_open(chip, AD1816A_MODE_TIMER); snd_ad1816a_timer_open() 406 struct snd_ad1816a *chip = snd_timer_chip(timer); snd_ad1816a_timer_start() local 407 spin_lock_irqsave(&chip->lock, flags); snd_ad1816a_timer_start() 408 bits = snd_ad1816a_read(chip, AD1816A_INTERRUPT_ENABLE); snd_ad1816a_timer_start() 411 snd_ad1816a_write(chip, AD1816A_TIMER_BASE_COUNT, snd_ad1816a_timer_start() 414 snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE, snd_ad1816a_timer_start() 417 spin_unlock_irqrestore(&chip->lock, flags); snd_ad1816a_timer_start() 424 struct snd_ad1816a *chip = snd_timer_chip(timer); snd_ad1816a_timer_stop() local 425 spin_lock_irqsave(&chip->lock, flags); snd_ad1816a_timer_stop() 427 snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE, snd_ad1816a_timer_stop() 430 spin_unlock_irqrestore(&chip->lock, flags); snd_ad1816a_timer_stop() 447 struct snd_ad1816a *chip = snd_pcm_substream_chip(substream); snd_ad1816a_playback_open() local 451 if ((error = snd_ad1816a_open(chip, AD1816A_MODE_PLAYBACK)) < 0) snd_ad1816a_playback_open() 454 snd_pcm_limit_isa_dma_size(chip->dma1, &runtime->hw.buffer_bytes_max); snd_ad1816a_playback_open() 455 snd_pcm_limit_isa_dma_size(chip->dma1, &runtime->hw.period_bytes_max); snd_ad1816a_playback_open() 456 chip->playback_substream = substream; snd_ad1816a_playback_open() 462 struct snd_ad1816a *chip = snd_pcm_substream_chip(substream); snd_ad1816a_capture_open() local 466 if ((error = snd_ad1816a_open(chip, AD1816A_MODE_CAPTURE)) < 0) snd_ad1816a_capture_open() 469 snd_pcm_limit_isa_dma_size(chip->dma2, &runtime->hw.buffer_bytes_max); snd_ad1816a_capture_open() 470 snd_pcm_limit_isa_dma_size(chip->dma2, &runtime->hw.period_bytes_max); snd_ad1816a_capture_open() 471 chip->capture_substream = substream; snd_ad1816a_capture_open() 477 struct snd_ad1816a *chip = snd_pcm_substream_chip(substream); snd_ad1816a_playback_close() local 479 chip->playback_substream = NULL; snd_ad1816a_playback_close() 480 snd_ad1816a_close(chip, AD1816A_MODE_PLAYBACK); snd_ad1816a_playback_close() 486 struct snd_ad1816a *chip = snd_pcm_substream_chip(substream); snd_ad1816a_capture_close() local 488 chip->capture_substream = NULL; snd_ad1816a_capture_close() 489 snd_ad1816a_close(chip, AD1816A_MODE_CAPTURE); snd_ad1816a_capture_close() 494 static void snd_ad1816a_init(struct snd_ad1816a *chip) snd_ad1816a_init() argument 498 spin_lock_irqsave(&chip->lock, flags); snd_ad1816a_init() 500 snd_ad1816a_out(chip, AD1816A_INTERRUPT_STATUS, 0x00); snd_ad1816a_init() 501 snd_ad1816a_out_mask(chip, AD1816A_PLAYBACK_CONFIG, snd_ad1816a_init() 503 snd_ad1816a_out_mask(chip, AD1816A_CAPTURE_CONFIG, snd_ad1816a_init() 505 snd_ad1816a_write(chip, AD1816A_INTERRUPT_ENABLE, 0x0000); snd_ad1816a_init() 506 snd_ad1816a_write_mask(chip, AD1816A_CHIP_CONFIG, snd_ad1816a_init() 508 snd_ad1816a_write(chip, AD1816A_DSP_CONFIG, 0x0000); snd_ad1816a_init() 509 snd_ad1816a_write(chip, AD1816A_POWERDOWN_CTRL, 0x0000); snd_ad1816a_init() 511 spin_unlock_irqrestore(&chip->lock, flags); snd_ad1816a_init() 515 void snd_ad1816a_suspend(struct snd_ad1816a *chip) snd_ad1816a_suspend() argument 520 snd_pcm_suspend_all(chip->pcm); snd_ad1816a_suspend() 521 spin_lock_irqsave(&chip->lock, flags); snd_ad1816a_suspend() 523 chip->image[reg] = snd_ad1816a_read(chip, reg); snd_ad1816a_suspend() 524 spin_unlock_irqrestore(&chip->lock, flags); snd_ad1816a_suspend() 527 void snd_ad1816a_resume(struct snd_ad1816a *chip) snd_ad1816a_resume() argument 532 snd_ad1816a_init(chip); snd_ad1816a_resume() 533 spin_lock_irqsave(&chip->lock, flags); snd_ad1816a_resume() 535 snd_ad1816a_write(chip, reg, chip->image[reg]); snd_ad1816a_resume() 536 spin_unlock_irqrestore(&chip->lock, flags); snd_ad1816a_resume() 540 static int snd_ad1816a_probe(struct snd_ad1816a *chip) snd_ad1816a_probe() argument 544 spin_lock_irqsave(&chip->lock, flags); snd_ad1816a_probe() 546 switch (chip->version = snd_ad1816a_read(chip, AD1816A_VERSION_ID)) { snd_ad1816a_probe() 548 chip->hardware = AD1816A_HW_AD1815; snd_ad1816a_probe() 551 chip->hardware = AD1816A_HW_AD18MAX10; snd_ad1816a_probe() 554 chip->hardware = AD1816A_HW_AD1816A; snd_ad1816a_probe() 557 chip->hardware = AD1816A_HW_AUTO; snd_ad1816a_probe() 560 spin_unlock_irqrestore(&chip->lock, flags); snd_ad1816a_probe() 564 static int snd_ad1816a_free(struct snd_ad1816a *chip) snd_ad1816a_free() argument 566 release_and_free_resource(chip->res_port); snd_ad1816a_free() 567 if (chip->irq >= 0) snd_ad1816a_free() 568 free_irq(chip->irq, (void *) chip); snd_ad1816a_free() 569 if (chip->dma1 >= 0) { snd_ad1816a_free() 570 snd_dma_disable(chip->dma1); snd_ad1816a_free() 571 free_dma(chip->dma1); snd_ad1816a_free() 573 if (chip->dma2 >= 0) { snd_ad1816a_free() 574 snd_dma_disable(chip->dma2); snd_ad1816a_free() 575 free_dma(chip->dma2); snd_ad1816a_free() 582 struct snd_ad1816a *chip = device->device_data; snd_ad1816a_dev_free() local 583 return snd_ad1816a_free(chip); snd_ad1816a_dev_free() 586 static const char *snd_ad1816a_chip_id(struct snd_ad1816a *chip) snd_ad1816a_chip_id() argument 588 switch (chip->hardware) { snd_ad1816a_chip_id() 593 snd_printk(KERN_WARNING "Unknown chip version %d:%d.\n", snd_ad1816a_chip_id() 594 chip->version, chip->hardware); snd_ad1816a_chip_id() 601 struct snd_ad1816a *chip) snd_ad1816a_create() 608 chip->irq = -1; snd_ad1816a_create() 609 chip->dma1 = -1; snd_ad1816a_create() 610 chip->dma2 = -1; snd_ad1816a_create() 612 if ((chip->res_port = request_region(port, 16, "AD1816A")) == NULL) { snd_ad1816a_create() 614 snd_ad1816a_free(chip); snd_ad1816a_create() 617 if (request_irq(irq, snd_ad1816a_interrupt, 0, "AD1816A", (void *) chip)) { snd_ad1816a_create() 619 snd_ad1816a_free(chip); snd_ad1816a_create() 622 chip->irq = irq; snd_ad1816a_create() 625 snd_ad1816a_free(chip); snd_ad1816a_create() 628 chip->dma1 = dma1; snd_ad1816a_create() 631 snd_ad1816a_free(chip); snd_ad1816a_create() 634 chip->dma2 = dma2; snd_ad1816a_create() 636 chip->card = card; snd_ad1816a_create() 637 chip->port = port; snd_ad1816a_create() 638 spin_lock_init(&chip->lock); snd_ad1816a_create() 640 if ((error = snd_ad1816a_probe(chip))) { snd_ad1816a_create() 641 snd_ad1816a_free(chip); snd_ad1816a_create() 645 snd_ad1816a_init(chip); snd_ad1816a_create() 648 if ((error = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) { snd_ad1816a_create() 649 snd_ad1816a_free(chip); snd_ad1816a_create() 678 int snd_ad1816a_pcm(struct snd_ad1816a *chip, int device) snd_ad1816a_pcm() argument 683 if ((error = snd_pcm_new(chip->card, "AD1816A", device, 1, 1, &pcm))) snd_ad1816a_pcm() 689 pcm->private_data = chip; snd_ad1816a_pcm() 690 pcm->info_flags = (chip->dma1 == chip->dma2 ) ? SNDRV_PCM_INFO_JOINT_DUPLEX : 0; snd_ad1816a_pcm() 692 strcpy(pcm->name, snd_ad1816a_chip_id(chip)); snd_ad1816a_pcm() 693 snd_ad1816a_init(chip); snd_ad1816a_pcm() 697 64*1024, chip->dma1 > 3 || chip->dma2 > 3 ? 128*1024 : 64*1024); snd_ad1816a_pcm() 699 chip->pcm = pcm; snd_ad1816a_pcm() 703 int snd_ad1816a_timer(struct snd_ad1816a *chip, int device) snd_ad1816a_timer() argument 711 tid.card = chip->card->number; snd_ad1816a_timer() 714 if ((error = snd_timer_new(chip->card, "AD1816A", &tid, &timer)) < 0) snd_ad1816a_timer() 716 strcpy(timer->name, snd_ad1816a_chip_id(chip)); snd_ad1816a_timer() 717 timer->private_data = chip; snd_ad1816a_timer() 718 chip->timer = timer; snd_ad1816a_timer() 739 struct snd_ad1816a *chip = snd_kcontrol_chip(kcontrol); snd_ad1816a_get_mux() local 743 spin_lock_irqsave(&chip->lock, flags); snd_ad1816a_get_mux() 744 val = snd_ad1816a_read(chip, AD1816A_ADC_SOURCE_SEL); snd_ad1816a_get_mux() 745 spin_unlock_irqrestore(&chip->lock, flags); snd_ad1816a_get_mux() 753 struct snd_ad1816a *chip = snd_kcontrol_chip(kcontrol); snd_ad1816a_put_mux() local 763 spin_lock_irqsave(&chip->lock, flags); snd_ad1816a_put_mux() 764 change = snd_ad1816a_read(chip, AD1816A_ADC_SOURCE_SEL) != val; snd_ad1816a_put_mux() 765 snd_ad1816a_write(chip, AD1816A_ADC_SOURCE_SEL, val); snd_ad1816a_put_mux() 766 spin_unlock_irqrestore(&chip->lock, flags); snd_ad1816a_put_mux() 795 struct snd_ad1816a *chip = snd_kcontrol_chip(kcontrol); snd_ad1816a_get_single() local 802 spin_lock_irqsave(&chip->lock, flags); snd_ad1816a_get_single() 803 ucontrol->value.integer.value[0] = (snd_ad1816a_read(chip, reg) >> shift) & mask; snd_ad1816a_get_single() 804 spin_unlock_irqrestore(&chip->lock, flags); snd_ad1816a_get_single() 812 struct snd_ad1816a *chip = snd_kcontrol_chip(kcontrol); snd_ad1816a_put_single() local 825 spin_lock_irqsave(&chip->lock, flags); snd_ad1816a_put_single() 826 old_val = snd_ad1816a_read(chip, reg); snd_ad1816a_put_single() 829 snd_ad1816a_write(chip, reg, val); snd_ad1816a_put_single() 830 spin_unlock_irqrestore(&chip->lock, flags); snd_ad1816a_put_single() 860 struct snd_ad1816a *chip = snd_kcontrol_chip(kcontrol); snd_ad1816a_get_double() local 869 spin_lock_irqsave(&chip->lock, flags); snd_ad1816a_get_double() 870 val = snd_ad1816a_read(chip, reg); snd_ad1816a_get_double() 873 spin_unlock_irqrestore(&chip->lock, flags); snd_ad1816a_get_double() 883 struct snd_ad1816a *chip = snd_kcontrol_chip(kcontrol); snd_ad1816a_put_double() local 901 spin_lock_irqsave(&chip->lock, flags); snd_ad1816a_put_double() 902 old_val = snd_ad1816a_read(chip, reg); snd_ad1816a_put_double() 905 snd_ad1816a_write(chip, reg, val1); snd_ad1816a_put_double() 906 spin_unlock_irqrestore(&chip->lock, flags); snd_ad1816a_put_double() 962 int snd_ad1816a_mixer(struct snd_ad1816a *chip) snd_ad1816a_mixer() argument 968 if (snd_BUG_ON(!chip || !chip->card)) snd_ad1816a_mixer() 971 card = chip->card; snd_ad1816a_mixer() 973 strcpy(card->mixername, snd_ad1816a_chip_id(chip)); snd_ad1816a_mixer() 976 if ((err = snd_ctl_add(card, snd_ctl_new1(&snd_ad1816a_controls[idx], chip))) < 0) snd_ad1816a_mixer() 599 snd_ad1816a_create(struct snd_card *card, unsigned long port, int irq, int dma1, int dma2, struct snd_ad1816a *chip) snd_ad1816a_create() argument
/linux-4.1.27/sound/ppc/
H A D	pmac.c	64 static int snd_pmac_dbdma_alloc(struct snd_pmac *chip, struct pmac_dbdma *rec, int size) snd_pmac_dbdma_alloc() argument 68 rec->space = dma_alloc_coherent(&chip->pdev->dev, rsize, snd_pmac_dbdma_alloc() 80 static void snd_pmac_dbdma_free(struct snd_pmac *chip, struct pmac_dbdma *rec) snd_pmac_dbdma_free() argument 85 dma_free_coherent(&chip->pdev->dev, rsize, rec->space, rec->dma_base); snd_pmac_dbdma_free() 98 unsigned int snd_pmac_rate_index(struct snd_pmac *chip, struct pmac_stream *rec, unsigned int rate) snd_pmac_rate_index() argument 103 if (rate > chip->freq_table[0]) snd_pmac_rate_index() 106 for (i = 0; i < chip->num_freqs; i++, ok >>= 1) { snd_pmac_rate_index() 109 if (rate >= chip->freq_table[i]) snd_pmac_rate_index() 145 static struct pmac_stream *snd_pmac_get_stream(struct snd_pmac *chip, int stream) snd_pmac_get_stream() argument 149 return &chip->playback; snd_pmac_get_stream() 151 return &chip->capture; snd_pmac_get_stream() 170 * set the format and rate to the chip. 173 static void snd_pmac_pcm_set_format(struct snd_pmac *chip) snd_pmac_pcm_set_format() argument 176 out_le32(&chip->awacs->control, chip->control_mask | (chip->rate_index << 8)); snd_pmac_pcm_set_format() 177 out_le32(&chip->awacs->byteswap, chip->format == SNDRV_PCM_FORMAT_S16_LE ? 1 : 0); snd_pmac_pcm_set_format() 178 if (chip->set_format) snd_pmac_pcm_set_format() 179 chip->set_format(chip); snd_pmac_pcm_set_format() 211 static int snd_pmac_pcm_prepare(struct snd_pmac *chip, struct pmac_stream *rec, struct snd_pcm_substream *subs) snd_pmac_pcm_prepare() argument 224 rate_index = snd_pmac_rate_index(chip, rec, runtime->rate); snd_pmac_pcm_prepare() 227 astr = snd_pmac_get_stream(chip, another_stream(rec->stream)); snd_pmac_pcm_prepare() 232 chip->rate_index = rate_index; snd_pmac_pcm_prepare() 233 chip->format = runtime->format; snd_pmac_pcm_prepare() 241 spin_lock_irq(&chip->reg_lock); snd_pmac_pcm_prepare() 243 chip->extra_dma.cmds->command = cpu_to_le16(DBDMA_STOP); snd_pmac_pcm_prepare() 244 snd_pmac_dma_set_command(rec, &chip->extra_dma); snd_pmac_pcm_prepare() 246 spin_unlock_irq(&chip->reg_lock); snd_pmac_pcm_prepare() 248 spin_lock_irq(&chip->reg_lock); snd_pmac_pcm_prepare() 266 spin_unlock_irq(&chip->reg_lock); snd_pmac_pcm_prepare() 275 static int snd_pmac_pcm_trigger(struct snd_pmac *chip, struct pmac_stream *rec, snd_pmac_pcm_trigger() argument 288 spin_lock(&chip->reg_lock); snd_pmac_pcm_trigger() 289 snd_pmac_beep_stop(chip); snd_pmac_pcm_trigger() 290 snd_pmac_pcm_set_format(chip); snd_pmac_pcm_trigger() 297 spin_unlock(&chip->reg_lock); snd_pmac_pcm_trigger() 302 spin_lock(&chip->reg_lock); snd_pmac_pcm_trigger() 308 spin_unlock(&chip->reg_lock); snd_pmac_pcm_trigger() 322 static snd_pcm_uframes_t snd_pmac_pcm_pointer(struct snd_pmac *chip, snd_pmac_pcm_pointer() argument 349 struct snd_pmac *chip = snd_pcm_substream_chip(subs); snd_pmac_playback_prepare() local 350 return snd_pmac_pcm_prepare(chip, &chip->playback, subs); snd_pmac_playback_prepare() 356 struct snd_pmac *chip = snd_pcm_substream_chip(subs); snd_pmac_playback_trigger() local 357 return snd_pmac_pcm_trigger(chip, &chip->playback, subs, cmd); snd_pmac_playback_trigger() 362 struct snd_pmac *chip = snd_pcm_substream_chip(subs); snd_pmac_playback_pointer() local 363 return snd_pmac_pcm_pointer(chip, &chip->playback, subs); snd_pmac_playback_pointer() 373 struct snd_pmac *chip = snd_pcm_substream_chip(subs); snd_pmac_capture_prepare() local 374 return snd_pmac_pcm_prepare(chip, &chip->capture, subs); snd_pmac_capture_prepare() 380 struct snd_pmac *chip = snd_pcm_substream_chip(subs); snd_pmac_capture_trigger() local 381 return snd_pmac_pcm_trigger(chip, &chip->capture, subs, cmd); snd_pmac_capture_trigger() 386 struct snd_pmac *chip = snd_pcm_substream_chip(subs); snd_pmac_capture_pointer() local 387 return snd_pmac_pcm_pointer(chip, &chip->capture, subs); snd_pmac_capture_pointer() 463 static void snd_pmac_pcm_update(struct snd_pmac *chip, struct pmac_stream *rec) snd_pmac_pcm_update() argument 469 spin_lock(&chip->reg_lock); snd_pmac_pcm_update() 500 spin_unlock(&chip->reg_lock); snd_pmac_pcm_update() 502 spin_lock(&chip->reg_lock); snd_pmac_pcm_update() 505 spin_unlock(&chip->reg_lock); snd_pmac_pcm_update() 556 struct snd_pmac *chip = rule->private; 557 struct pmac_stream *rec = snd_pmac_get_stream(chip, rule->deps[0]); 563 for (i = chip->num_freqs - 1; i >= 0; i--) { 565 freq_table[num_freqs++] = chip->freq_table[i]; 575 struct snd_pmac *chip = rule->private; 576 struct pmac_stream *rec = snd_pmac_get_stream(chip, rule->deps[0]); 585 static int snd_pmac_pcm_open(struct snd_pmac *chip, struct pmac_stream *rec, snd_pmac_pcm_open() argument 593 for (i = 0; i < chip->num_freqs; i++) snd_pmac_pcm_open() 594 if (chip->freqs_ok & (1 << i)) snd_pmac_pcm_open() 596 snd_pcm_rate_to_rate_bit(chip->freq_table[i]); snd_pmac_pcm_open() 599 for (i = 0; i < chip->num_freqs; i++) { snd_pmac_pcm_open() 600 if (chip->freqs_ok & (1 << i)) { snd_pmac_pcm_open() 601 runtime->hw.rate_max = chip->freq_table[i]; snd_pmac_pcm_open() 605 for (i = chip->num_freqs - 1; i >= 0; i--) { snd_pmac_pcm_open() 606 if (chip->freqs_ok & (1 << i)) { snd_pmac_pcm_open() 607 runtime->hw.rate_min = chip->freq_table[i]; snd_pmac_pcm_open() 611 runtime->hw.formats = chip->formats_ok; snd_pmac_pcm_open() 612 if (chip->can_capture) { snd_pmac_pcm_open() 613 if (! chip->can_duplex) snd_pmac_pcm_open() 622 snd_pmac_hw_rule_rate, chip, rec->stream, -1); snd_pmac_pcm_open() 624 snd_pmac_hw_rule_format, chip, rec->stream, -1); snd_pmac_pcm_open() 634 static int snd_pmac_pcm_close(struct snd_pmac *chip, struct pmac_stream *rec, snd_pmac_pcm_close() argument 641 astr = snd_pmac_get_stream(chip, another_stream(rec->stream)); snd_pmac_pcm_close() 646 astr->cur_freqs = chip->freqs_ok; snd_pmac_pcm_close() 647 astr->cur_formats = chip->formats_ok; snd_pmac_pcm_close() 654 struct snd_pmac *chip = snd_pcm_substream_chip(subs); snd_pmac_playback_open() local 657 return snd_pmac_pcm_open(chip, &chip->playback, subs); snd_pmac_playback_open() 662 struct snd_pmac *chip = snd_pcm_substream_chip(subs); snd_pmac_capture_open() local 665 return snd_pmac_pcm_open(chip, &chip->capture, subs); snd_pmac_capture_open() 670 struct snd_pmac *chip = snd_pcm_substream_chip(subs); snd_pmac_playback_close() local 672 return snd_pmac_pcm_close(chip, &chip->playback, subs); snd_pmac_playback_close() 677 struct snd_pmac *chip = snd_pcm_substream_chip(subs); snd_pmac_capture_close() local 679 return snd_pmac_pcm_close(chip, &chip->capture, subs); snd_pmac_capture_close() 707 int snd_pmac_pcm_new(struct snd_pmac *chip) snd_pmac_pcm_new() argument 713 if (! chip->can_capture) snd_pmac_pcm_new() 715 err = snd_pcm_new(chip->card, chip->card->driver, 0, 1, num_captures, &pcm); snd_pmac_pcm_new() 720 if (chip->can_capture) snd_pmac_pcm_new() 723 pcm->private_data = chip; snd_pmac_pcm_new() 725 strcpy(pcm->name, chip->card->shortname); snd_pmac_pcm_new() 726 chip->pcm = pcm; snd_pmac_pcm_new() 728 chip->formats_ok = SNDRV_PCM_FMTBIT_S16_BE; snd_pmac_pcm_new() 729 if (chip->can_byte_swap) snd_pmac_pcm_new() 730 chip->formats_ok |= SNDRV_PCM_FMTBIT_S16_LE; snd_pmac_pcm_new() 732 chip->playback.cur_formats = chip->formats_ok; snd_pmac_pcm_new() 733 chip->capture.cur_formats = chip->formats_ok; snd_pmac_pcm_new() 734 chip->playback.cur_freqs = chip->freqs_ok; snd_pmac_pcm_new() 735 chip->capture.cur_freqs = chip->freqs_ok; snd_pmac_pcm_new() 739 &chip->pdev->dev, snd_pmac_pcm_new() 746 static void snd_pmac_dbdma_reset(struct snd_pmac *chip) snd_pmac_dbdma_reset() argument 748 out_le32(&chip->playback.dma->control, (RUN|PAUSE|FLUSH|WAKE|DEAD) << 16); snd_pmac_dbdma_reset() 749 snd_pmac_wait_ack(&chip->playback); snd_pmac_dbdma_reset() 750 out_le32(&chip->capture.dma->control, (RUN|PAUSE|FLUSH|WAKE|DEAD) << 16); snd_pmac_dbdma_reset() 751 snd_pmac_wait_ack(&chip->capture); snd_pmac_dbdma_reset() 758 void snd_pmac_beep_dma_start(struct snd_pmac *chip, int bytes, unsigned long addr, int speed) snd_pmac_beep_dma_start() argument 760 struct pmac_stream *rec = &chip->playback; snd_pmac_beep_dma_start() 763 chip->extra_dma.cmds->req_count = cpu_to_le16(bytes); snd_pmac_beep_dma_start() 764 chip->extra_dma.cmds->xfer_status = cpu_to_le16(0); snd_pmac_beep_dma_start() 765 chip->extra_dma.cmds->cmd_dep = cpu_to_le32(chip->extra_dma.addr); snd_pmac_beep_dma_start() 766 chip->extra_dma.cmds->phy_addr = cpu_to_le32(addr); snd_pmac_beep_dma_start() 767 chip->extra_dma.cmds->command = cpu_to_le16(OUTPUT_MORE + BR_ALWAYS); snd_pmac_beep_dma_start() 768 out_le32(&chip->awacs->control, snd_pmac_beep_dma_start() 769 (in_le32(&chip->awacs->control) & ~0x1f00) snd_pmac_beep_dma_start() 771 out_le32(&chip->awacs->byteswap, 0); snd_pmac_beep_dma_start() 772 snd_pmac_dma_set_command(rec, &chip->extra_dma); snd_pmac_beep_dma_start() 776 void snd_pmac_beep_dma_stop(struct snd_pmac *chip) snd_pmac_beep_dma_stop() argument 778 snd_pmac_dma_stop(&chip->playback); snd_pmac_beep_dma_stop() 779 chip->extra_dma.cmds->command = cpu_to_le16(DBDMA_STOP); snd_pmac_beep_dma_stop() 780 snd_pmac_pcm_set_format(chip); /* reset format */ snd_pmac_beep_dma_stop() 790 struct snd_pmac *chip = devid; snd_pmac_tx_intr() local 791 snd_pmac_pcm_update(chip, &chip->playback); snd_pmac_tx_intr() 799 struct snd_pmac *chip = devid; snd_pmac_rx_intr() local 800 snd_pmac_pcm_update(chip, &chip->capture); snd_pmac_rx_intr() 808 struct snd_pmac *chip = devid; snd_pmac_ctrl_intr() local 809 int ctrl = in_le32(&chip->awacs->control); snd_pmac_ctrl_intr() 814 if (chip->update_automute) snd_pmac_ctrl_intr() 815 chip->update_automute(chip, 1); snd_pmac_ctrl_intr() 818 int err = (in_le32(&chip->awacs->codec_stat) & MASK_ERRCODE) >> 16; snd_pmac_ctrl_intr() 819 if (err && chip->model <= PMAC_SCREAMER) snd_pmac_ctrl_intr() 823 out_le32(&chip->awacs->control, ctrl); snd_pmac_ctrl_intr() 831 static void snd_pmac_sound_feature(struct snd_pmac *chip, int enable) snd_pmac_sound_feature() argument 834 ppc_md.feature_call(PMAC_FTR_SOUND_CHIP_ENABLE, chip->node, 0, enable); snd_pmac_sound_feature() 841 static int snd_pmac_free(struct snd_pmac *chip) snd_pmac_free() argument 844 if (chip->initialized) { snd_pmac_free() 845 snd_pmac_dbdma_reset(chip); snd_pmac_free() 847 out_le32(&chip->awacs->control, in_le32(&chip->awacs->control) & 0xfff); snd_pmac_free() 850 if (chip->node) snd_pmac_free() 851 snd_pmac_sound_feature(chip, 0); snd_pmac_free() 854 if (chip->mixer_free) snd_pmac_free() 855 chip->mixer_free(chip); snd_pmac_free() 857 snd_pmac_detach_beep(chip); snd_pmac_free() 860 if (chip->irq >= 0) snd_pmac_free() 861 free_irq(chip->irq, (void*)chip); snd_pmac_free() 862 if (chip->tx_irq >= 0) snd_pmac_free() 863 free_irq(chip->tx_irq, (void*)chip); snd_pmac_free() 864 if (chip->rx_irq >= 0) snd_pmac_free() 865 free_irq(chip->rx_irq, (void*)chip); snd_pmac_free() 866 snd_pmac_dbdma_free(chip, &chip->playback.cmd); snd_pmac_free() 867 snd_pmac_dbdma_free(chip, &chip->capture.cmd); snd_pmac_free() 868 snd_pmac_dbdma_free(chip, &chip->extra_dma); snd_pmac_free() 869 snd_pmac_dbdma_free(chip, &emergency_dbdma); snd_pmac_free() 870 iounmap(chip->macio_base); snd_pmac_free() 871 iounmap(chip->latch_base); snd_pmac_free() 872 iounmap(chip->awacs); snd_pmac_free() 873 iounmap(chip->playback.dma); snd_pmac_free() 874 iounmap(chip->capture.dma); snd_pmac_free() 876 if (chip->node) { snd_pmac_free() 879 if (chip->requested & (1 << i)) snd_pmac_free() 880 release_mem_region(chip->rsrc[i].start, snd_pmac_free() 881 resource_size(&chip->rsrc[i])); snd_pmac_free() 885 pci_dev_put(chip->pdev); snd_pmac_free() 886 of_node_put(chip->node); snd_pmac_free() 887 kfree(chip); snd_pmac_free() 897 struct snd_pmac *chip = device->device_data; snd_pmac_dev_free() local 898 return snd_pmac_free(chip); snd_pmac_dev_free() 906 static void detect_byte_swap(struct snd_pmac *chip) detect_byte_swap() argument 911 for (mio = chip->node->parent; mio; mio = mio->parent) { detect_byte_swap() 914 chip->can_byte_swap = 0; detect_byte_swap() 922 chip->can_byte_swap = 0 ; detect_byte_swap() 925 chip->can_duplex = 0; detect_byte_swap() 930 * detect a sound chip 932 static int snd_pmac_detect(struct snd_pmac *chip) snd_pmac_detect() argument 943 chip->subframe = 0; snd_pmac_detect() 944 chip->revision = 0; snd_pmac_detect() 945 chip->freqs_ok = 0xff; /* all ok */ snd_pmac_detect() 946 chip->model = PMAC_AWACS; snd_pmac_detect() 947 chip->can_byte_swap = 1; snd_pmac_detect() 948 chip->can_duplex = 1; snd_pmac_detect() 949 chip->can_capture = 1; snd_pmac_detect() 950 chip->num_freqs = ARRAY_SIZE(awacs_freqs); snd_pmac_detect() 951 chip->freq_table = awacs_freqs; snd_pmac_detect() 952 chip->pdev = NULL; snd_pmac_detect() 954 chip->control_mask = MASK_IEPC | MASK_IEE | 0x11; /* default */ snd_pmac_detect() 959 chip->is_pbook_3400 = 1; snd_pmac_detect() 962 chip->is_pbook_G3 = 1; snd_pmac_detect() 963 chip->node = of_find_node_by_name(NULL, "awacs"); snd_pmac_detect() 964 sound = of_node_get(chip->node); snd_pmac_detect() 970 if (!chip->node) snd_pmac_detect() 971 chip->node = of_find_node_by_name(NULL, "davbus"); snd_pmac_detect() 976 if (! chip->node) { snd_pmac_detect() 977 chip->node = of_find_node_by_name(NULL, "i2s-a"); snd_pmac_detect() 978 if (chip->node && chip->node->parent && snd_pmac_detect() 979 chip->node->parent->parent) { snd_pmac_detect() 980 if (of_device_is_compatible(chip->node->parent->parent, snd_pmac_detect() 982 chip->is_k2 = 1; snd_pmac_detect() 985 if (! chip->node) snd_pmac_detect() 990 if (sound->parent == chip->node) snd_pmac_detect() 994 of_node_put(chip->node); snd_pmac_detect() 995 chip->node = NULL; snd_pmac_detect() 1000 chip->subframe = *prop; snd_pmac_detect() 1009 of_node_put(chip->node); snd_pmac_detect() 1010 chip->node = NULL; snd_pmac_detect() 1015 chip->model = PMAC_SCREAMER; snd_pmac_detect() 1016 // chip->can_byte_swap = 0; /* FIXME: check this */ snd_pmac_detect() 1019 chip->model = PMAC_BURGUNDY; snd_pmac_detect() 1020 chip->control_mask = MASK_IEPC | 0x11; /* disable IEE */ snd_pmac_detect() 1023 chip->model = PMAC_DACA; snd_pmac_detect() 1024 chip->can_capture = 0; /* no capture */ snd_pmac_detect() 1025 chip->can_duplex = 0; snd_pmac_detect() 1026 // chip->can_byte_swap = 0; /* FIXME: check this */ snd_pmac_detect() 1027 chip->control_mask = MASK_IEPC | 0x11; /* disable IEE */ snd_pmac_detect() 1030 chip->model = PMAC_TUMBLER; snd_pmac_detect() 1031 chip->can_capture = of_machine_is_compatible("PowerMac4,2") snd_pmac_detect() 1037 chip->can_duplex = 0; snd_pmac_detect() 1038 // chip->can_byte_swap = 0; /* FIXME: check this */ snd_pmac_detect() 1039 chip->num_freqs = ARRAY_SIZE(tumbler_freqs); snd_pmac_detect() 1040 chip->freq_table = tumbler_freqs; snd_pmac_detect() 1041 chip->control_mask = MASK_IEPC | 0x11; /* disable IEE */ snd_pmac_detect() 1044 chip->model = PMAC_SNAPPER; snd_pmac_detect() 1045 // chip->can_byte_swap = 0; /* FIXME: check this */ snd_pmac_detect() 1046 chip->num_freqs = ARRAY_SIZE(tumbler_freqs); snd_pmac_detect() 1047 chip->freq_table = tumbler_freqs; snd_pmac_detect() 1048 chip->control_mask = MASK_IEPC | 0x11; /* disable IEE */ snd_pmac_detect() 1052 chip->device_id = *prop; snd_pmac_detect() 1054 chip->has_iic = (dn != NULL); snd_pmac_detect() 1060 macio = macio_find(chip->node, macio_unknown); snd_pmac_detect() 1069 chip->pdev = pdev; for_each_pci_dev() 1074 if (chip->pdev == NULL) 1078 detect_byte_swap(chip); 1087 chip->freqs_ok = 0; 1093 for (i = 0; i < chip->num_freqs; ++i) { 1094 if (r == chip->freq_table[i]) { 1095 chip->freqs_ok |= (1 << i); 1102 chip->freqs_ok = 1; 1116 struct snd_pmac *chip = snd_kcontrol_chip(kcontrol); pmac_auto_mute_get() local 1117 ucontrol->value.integer.value[0] = chip->auto_mute; pmac_auto_mute_get() 1124 struct snd_pmac *chip = snd_kcontrol_chip(kcontrol); pmac_auto_mute_put() local 1125 if (ucontrol->value.integer.value[0] != chip->auto_mute) { pmac_auto_mute_put() 1126 chip->auto_mute = !!ucontrol->value.integer.value[0]; pmac_auto_mute_put() 1127 if (chip->update_automute) pmac_auto_mute_put() 1128 chip->update_automute(chip, 1); pmac_auto_mute_put() 1137 struct snd_pmac *chip = snd_kcontrol_chip(kcontrol); pmac_hp_detect_get() local 1138 if (chip->detect_headphone) pmac_hp_detect_get() 1139 ucontrol->value.integer.value[0] = chip->detect_headphone(chip); pmac_hp_detect_get() 1160 int snd_pmac_add_automute(struct snd_pmac *chip) snd_pmac_add_automute() argument 1163 chip->auto_mute = 1; snd_pmac_add_automute() 1164 err = snd_ctl_add(chip->card, snd_ctl_new1(&auto_mute_controls[0], chip)); snd_pmac_add_automute() 1169 chip->hp_detect_ctl = snd_ctl_new1(&auto_mute_controls[1], chip); snd_pmac_add_automute() 1170 return snd_ctl_add(chip->card, chip->hp_detect_ctl); snd_pmac_add_automute() 1175 * create and detect a pmac chip record 1179 struct snd_pmac *chip; snd_pmac_new() local 1190 chip = kzalloc(sizeof(*chip), GFP_KERNEL); snd_pmac_new() 1191 if (chip == NULL) snd_pmac_new() 1193 chip->card = card; snd_pmac_new() 1195 spin_lock_init(&chip->reg_lock); snd_pmac_new() 1196 chip->irq = chip->tx_irq = chip->rx_irq = -1; snd_pmac_new() 1198 chip->playback.stream = SNDRV_PCM_STREAM_PLAYBACK; snd_pmac_new() 1199 chip->capture.stream = SNDRV_PCM_STREAM_CAPTURE; snd_pmac_new() 1201 if ((err = snd_pmac_detect(chip)) < 0) snd_pmac_new() 1204 if (snd_pmac_dbdma_alloc(chip, &chip->playback.cmd, PMAC_MAX_FRAGS + 1) < 0 || snd_pmac_new() 1205 snd_pmac_dbdma_alloc(chip, &chip->capture.cmd, PMAC_MAX_FRAGS + 1) < 0 || snd_pmac_new() 1206 snd_pmac_dbdma_alloc(chip, &chip->extra_dma, 2) < 0 || snd_pmac_new() 1207 snd_pmac_dbdma_alloc(chip, &emergency_dbdma, 2) < 0) { snd_pmac_new() 1212 np = chip->node; snd_pmac_new() 1213 chip->requested = 0; snd_pmac_new() 1214 if (chip->is_k2) { snd_pmac_new() 1219 &chip->rsrc[i])) { snd_pmac_new() 1225 if (request_mem_region(chip->rsrc[i].start, snd_pmac_new() 1226 resource_size(&chip->rsrc[i]), snd_pmac_new() 1230 i, rnames[i], &chip->rsrc[i]); snd_pmac_new() 1234 chip->requested |= (1 << i); snd_pmac_new() 1236 ctrl_addr = chip->rsrc[0].start; snd_pmac_new() 1237 txdma_addr = chip->rsrc[1].start; snd_pmac_new() 1244 &chip->rsrc[i])) { snd_pmac_new() 1250 if (request_mem_region(chip->rsrc[i].start, snd_pmac_new() 1251 resource_size(&chip->rsrc[i]), snd_pmac_new() 1255 i, rnames[i], &chip->rsrc[i]); snd_pmac_new() 1259 chip->requested |= (1 << i); snd_pmac_new() 1261 ctrl_addr = chip->rsrc[0].start; snd_pmac_new() 1262 txdma_addr = chip->rsrc[1].start; snd_pmac_new() 1263 rxdma_addr = chip->rsrc[2].start; snd_pmac_new() 1266 chip->awacs = ioremap(ctrl_addr, 0x1000); snd_pmac_new() 1267 chip->playback.dma = ioremap(txdma_addr, 0x100); snd_pmac_new() 1268 chip->capture.dma = ioremap(rxdma_addr, 0x100); snd_pmac_new() 1269 if (chip->model <= PMAC_BURGUNDY) { snd_pmac_new() 1272 "PMac", (void*)chip)) { snd_pmac_new() 1278 chip->irq = irq; snd_pmac_new() 1281 if (request_irq(irq, snd_pmac_tx_intr, 0, "PMac Output", (void*)chip)){ snd_pmac_new() 1286 chip->tx_irq = irq; snd_pmac_new() 1288 if (request_irq(irq, snd_pmac_rx_intr, 0, "PMac Input", (void*)chip)) { snd_pmac_new() 1293 chip->rx_irq = irq; snd_pmac_new() 1295 snd_pmac_sound_feature(chip, 1); snd_pmac_new() 1298 if (chip->model <= PMAC_BURGUNDY) snd_pmac_new() 1299 out_le32(&chip->awacs->control, chip->control_mask); snd_pmac_new() 1304 if (chip->is_pbook_3400) { snd_pmac_new() 1312 chip->latch_base = ioremap (0xf301a000, 0x1000); snd_pmac_new() 1313 in_8(chip->latch_base + 0x190); snd_pmac_new() 1314 } else if (chip->is_pbook_G3) { snd_pmac_new() 1316 for (mio = chip->node->parent; mio; mio = mio->parent) { snd_pmac_new() 1320 chip->macio_base = snd_pmac_new() 1333 if (chip->macio_base) snd_pmac_new() 1334 out_8(chip->macio_base + 0x37, 3); snd_pmac_new() 1338 snd_pmac_dbdma_reset(chip); snd_pmac_new() 1340 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) snd_pmac_new() 1343 *chip_return = chip; snd_pmac_new() 1347 snd_pmac_free(chip); snd_pmac_new() 1362 void snd_pmac_suspend(struct snd_pmac *chip) snd_pmac_suspend() argument 1366 snd_power_change_state(chip->card, SNDRV_CTL_POWER_D3hot); snd_pmac_suspend() 1367 if (chip->suspend) snd_pmac_suspend() 1368 chip->suspend(chip); snd_pmac_suspend() 1369 snd_pcm_suspend_all(chip->pcm); snd_pmac_suspend() 1370 spin_lock_irqsave(&chip->reg_lock, flags); snd_pmac_suspend() 1371 snd_pmac_beep_stop(chip); snd_pmac_suspend() 1372 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_pmac_suspend() 1373 if (chip->irq >= 0) snd_pmac_suspend() 1374 disable_irq(chip->irq); snd_pmac_suspend() 1375 if (chip->tx_irq >= 0) snd_pmac_suspend() 1376 disable_irq(chip->tx_irq); snd_pmac_suspend() 1377 if (chip->rx_irq >= 0) snd_pmac_suspend() 1378 disable_irq(chip->rx_irq); snd_pmac_suspend() 1379 snd_pmac_sound_feature(chip, 0); snd_pmac_suspend() 1382 void snd_pmac_resume(struct snd_pmac *chip) snd_pmac_resume() argument 1384 snd_pmac_sound_feature(chip, 1); snd_pmac_resume() 1385 if (chip->resume) snd_pmac_resume() 1386 chip->resume(chip); snd_pmac_resume() 1388 if (chip->macio_base && chip->is_pbook_G3) snd_pmac_resume() 1389 out_8(chip->macio_base + 0x37, 3); snd_pmac_resume() 1390 else if (chip->is_pbook_3400) snd_pmac_resume() 1391 in_8(chip->latch_base + 0x190); snd_pmac_resume() 1393 snd_pmac_pcm_set_format(chip); snd_pmac_resume() 1395 if (chip->irq >= 0) snd_pmac_resume() 1396 enable_irq(chip->irq); snd_pmac_resume() 1397 if (chip->tx_irq >= 0) snd_pmac_resume() 1398 enable_irq(chip->tx_irq); snd_pmac_resume() 1399 if (chip->rx_irq >= 0) snd_pmac_resume() 1400 enable_irq(chip->rx_irq); snd_pmac_resume() 1402 snd_power_change_state(chip->card, SNDRV_CTL_POWER_D0); snd_pmac_resume()
H A D	awacs.c	48 static void snd_pmac_screamer_wait(struct snd_pmac *chip) snd_pmac_screamer_wait() argument 51 while (!(in_le32(&chip->awacs->codec_stat) & MASK_VALID)) { snd_pmac_screamer_wait() 64 snd_pmac_awacs_write(struct snd_pmac *chip, int val) snd_pmac_awacs_write() argument 68 if (chip->model == PMAC_SCREAMER) snd_pmac_awacs_write() 69 snd_pmac_screamer_wait(chip); snd_pmac_awacs_write() 70 out_le32(&chip->awacs->codec_ctrl, val | (chip->subframe << 22)); snd_pmac_awacs_write() 71 while (in_le32(&chip->awacs->codec_ctrl) & MASK_NEWECMD) { snd_pmac_awacs_write() 80 snd_pmac_awacs_write_reg(struct snd_pmac *chip, int reg, int val) snd_pmac_awacs_write_reg() argument 82 snd_pmac_awacs_write(chip, val | (reg << 12)); snd_pmac_awacs_write_reg() 83 chip->awacs_reg[reg] = val; snd_pmac_awacs_write_reg() 87 snd_pmac_awacs_write_noreg(struct snd_pmac *chip, int reg, int val) snd_pmac_awacs_write_noreg() argument 89 snd_pmac_awacs_write(chip, val | (reg << 12)); snd_pmac_awacs_write_noreg() 93 /* Recalibrate chip */ screamer_recalibrate() 94 static void screamer_recalibrate(struct snd_pmac *chip) screamer_recalibrate() argument 96 if (chip->model != PMAC_SCREAMER) screamer_recalibrate() 102 snd_pmac_awacs_write_noreg(chip, 1, chip->awacs_reg[1]); screamer_recalibrate() 103 if (chip->manufacturer == 0x1) screamer_recalibrate() 106 snd_pmac_awacs_write_noreg(chip, 1, screamer_recalibrate() 107 chip->awacs_reg[1] | MASK_RECALIBRATE | screamer_recalibrate() 109 snd_pmac_awacs_write_noreg(chip, 1, chip->awacs_reg[1]); screamer_recalibrate() 110 snd_pmac_awacs_write_noreg(chip, 6, chip->awacs_reg[6]); screamer_recalibrate() 114 #define screamer_recalibrate(chip) /* NOP */ 121 static void snd_pmac_awacs_set_format(struct snd_pmac *chip) snd_pmac_awacs_set_format() argument 123 chip->awacs_reg[1] &= ~MASK_SAMPLERATE; snd_pmac_awacs_set_format() 124 chip->awacs_reg[1] |= chip->rate_index << 3; snd_pmac_awacs_set_format() 125 snd_pmac_awacs_write_reg(chip, 1, chip->awacs_reg[1]); snd_pmac_awacs_set_format() 148 struct snd_pmac *chip = snd_kcontrol_chip(kcontrol); snd_pmac_awacs_get_volume() local 155 spin_lock_irqsave(&chip->reg_lock, flags); snd_pmac_awacs_get_volume() 156 vol[0] = (chip->awacs_reg[reg] >> lshift) & 0xf; snd_pmac_awacs_get_volume() 157 vol[1] = chip->awacs_reg[reg] & 0xf; snd_pmac_awacs_get_volume() 158 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_pmac_awacs_get_volume() 171 struct snd_pmac *chip = snd_kcontrol_chip(kcontrol); snd_pmac_awacs_put_volume() local 189 spin_lock_irqsave(&chip->reg_lock, flags); snd_pmac_awacs_put_volume() 190 oldval = chip->awacs_reg[reg]; snd_pmac_awacs_put_volume() 195 snd_pmac_awacs_write_reg(chip, reg, val); snd_pmac_awacs_put_volume() 196 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_pmac_awacs_put_volume() 214 struct snd_pmac *chip = snd_kcontrol_chip(kcontrol); snd_pmac_awacs_get_switch() local 221 spin_lock_irqsave(&chip->reg_lock, flags); snd_pmac_awacs_get_switch() 222 val = (chip->awacs_reg[reg] >> shift) & 1; snd_pmac_awacs_get_switch() 223 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_pmac_awacs_get_switch() 233 struct snd_pmac *chip = snd_kcontrol_chip(kcontrol); snd_pmac_awacs_put_switch() local 241 spin_lock_irqsave(&chip->reg_lock, flags); snd_pmac_awacs_put_switch() 242 val = chip->awacs_reg[reg] & ~mask; snd_pmac_awacs_put_switch() 245 changed = chip->awacs_reg[reg] != val; snd_pmac_awacs_put_switch() 247 snd_pmac_awacs_write_reg(chip, reg, val); snd_pmac_awacs_put_switch() 248 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_pmac_awacs_put_switch() 319 static void awacs_amp_free(struct snd_pmac *chip) awacs_amp_free() argument 321 struct awacs_amp *amp = chip->mixer_data; awacs_amp_free() 325 chip->mixer_data = NULL; awacs_amp_free() 326 chip->mixer_free = NULL; awacs_amp_free() 346 struct snd_pmac *chip = snd_kcontrol_chip(kcontrol); snd_pmac_awacs_get_volume_amp() local 348 struct awacs_amp *amp = chip->mixer_data; snd_pmac_awacs_get_volume_amp() 358 struct snd_pmac *chip = snd_kcontrol_chip(kcontrol); snd_pmac_awacs_put_volume_amp() local 361 struct awacs_amp *amp = chip->mixer_data; snd_pmac_awacs_put_volume_amp() 373 struct snd_pmac *chip = snd_kcontrol_chip(kcontrol); snd_pmac_awacs_get_switch_amp() local 375 struct awacs_amp *amp = chip->mixer_data; snd_pmac_awacs_get_switch_amp() 387 struct snd_pmac *chip = snd_kcontrol_chip(kcontrol); snd_pmac_awacs_put_switch_amp() local 390 struct awacs_amp *amp = chip->mixer_data; snd_pmac_awacs_put_switch_amp() 412 struct snd_pmac *chip = snd_kcontrol_chip(kcontrol); snd_pmac_awacs_get_tone_amp() local 414 struct awacs_amp *amp = chip->mixer_data; snd_pmac_awacs_get_tone_amp() 423 struct snd_pmac *chip = snd_kcontrol_chip(kcontrol); snd_pmac_awacs_put_tone_amp() local 425 struct awacs_amp *amp = chip->mixer_data; snd_pmac_awacs_put_tone_amp() 452 struct snd_pmac *chip = snd_kcontrol_chip(kcontrol); snd_pmac_awacs_get_master_amp() local 453 struct awacs_amp *amp = chip->mixer_data; snd_pmac_awacs_get_master_amp() 462 struct snd_pmac *chip = snd_kcontrol_chip(kcontrol); snd_pmac_awacs_put_master_amp() local 463 struct awacs_amp *amp = chip->mixer_data; snd_pmac_awacs_put_master_amp() 554 struct snd_pmac *chip = snd_kcontrol_chip(kcontrol); snd_pmac_screamer_mic_boost_get() local 558 spin_lock_irqsave(&chip->reg_lock, flags); snd_pmac_screamer_mic_boost_get() 559 if (chip->awacs_reg[6] & MASK_MIC_BOOST) snd_pmac_screamer_mic_boost_get() 561 if (chip->awacs_reg[0] & MASK_GAINLINE) snd_pmac_screamer_mic_boost_get() 563 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_pmac_screamer_mic_boost_get() 571 struct snd_pmac *chip = snd_kcontrol_chip(kcontrol); snd_pmac_screamer_mic_boost_put() local 576 spin_lock_irqsave(&chip->reg_lock, flags); snd_pmac_screamer_mic_boost_put() 577 val0 = chip->awacs_reg[0] & ~MASK_GAINLINE; snd_pmac_screamer_mic_boost_put() 578 val6 = chip->awacs_reg[6] & ~MASK_MIC_BOOST; snd_pmac_screamer_mic_boost_put() 583 if (val0 != chip->awacs_reg[0]) { snd_pmac_screamer_mic_boost_put() 584 snd_pmac_awacs_write_reg(chip, 0, val0); snd_pmac_screamer_mic_boost_put() 587 if (val6 != chip->awacs_reg[6]) { snd_pmac_screamer_mic_boost_put() 588 snd_pmac_awacs_write_reg(chip, 6, val6); snd_pmac_screamer_mic_boost_put() 591 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_pmac_screamer_mic_boost_put() 715 static int build_mixers(struct snd_pmac *chip, int nums, build_mixers() argument 721 err = snd_ctl_add(chip->card, snd_ctl_new1(&mixers[i], chip)); build_mixers() 732 static void awacs_restore_all_regs(struct snd_pmac *chip) awacs_restore_all_regs() argument 734 snd_pmac_awacs_write_noreg(chip, 0, chip->awacs_reg[0]); awacs_restore_all_regs() 735 snd_pmac_awacs_write_noreg(chip, 1, chip->awacs_reg[1]); awacs_restore_all_regs() 736 snd_pmac_awacs_write_noreg(chip, 2, chip->awacs_reg[2]); awacs_restore_all_regs() 737 snd_pmac_awacs_write_noreg(chip, 4, chip->awacs_reg[4]); awacs_restore_all_regs() 738 if (chip->model == PMAC_SCREAMER) { awacs_restore_all_regs() 739 snd_pmac_awacs_write_noreg(chip, 5, chip->awacs_reg[5]); awacs_restore_all_regs() 740 snd_pmac_awacs_write_noreg(chip, 6, chip->awacs_reg[6]); awacs_restore_all_regs() 741 snd_pmac_awacs_write_noreg(chip, 7, chip->awacs_reg[7]); awacs_restore_all_regs() 746 static void snd_pmac_awacs_suspend(struct snd_pmac *chip) snd_pmac_awacs_suspend() argument 748 snd_pmac_awacs_write_noreg(chip, 1, (chip->awacs_reg[1] snd_pmac_awacs_suspend() 752 static void snd_pmac_awacs_resume(struct snd_pmac *chip) snd_pmac_awacs_resume() argument 757 snd_pmac_awacs_write_reg(chip, 1, snd_pmac_awacs_resume() 758 chip->awacs_reg[1] & ~MASK_PAROUT); snd_pmac_awacs_resume() 762 awacs_restore_all_regs(chip); snd_pmac_awacs_resume() 763 if (chip->model == PMAC_SCREAMER) { snd_pmac_awacs_resume() 766 snd_pmac_awacs_write_noreg(chip, 6, chip->awacs_reg[6]); snd_pmac_awacs_resume() 768 screamer_recalibrate(chip); snd_pmac_awacs_resume() 770 if (chip->mixer_data) { snd_pmac_awacs_resume() 771 struct awacs_amp *amp = chip->mixer_data; snd_pmac_awacs_resume() 800 static int snd_pmac_awacs_detect_headphone(struct snd_pmac *chip) snd_pmac_awacs_detect_headphone() argument 802 return (in_le32(&chip->awacs->codec_stat) & chip->hp_stat_mask) ? 1 : 0; snd_pmac_awacs_detect_headphone() 819 static void snd_pmac_awacs_update_automute(struct snd_pmac *chip, int do_notify) snd_pmac_awacs_update_automute() argument 821 if (chip->auto_mute) { snd_pmac_awacs_update_automute() 823 if (chip->mixer_data) { snd_pmac_awacs_update_automute() 824 struct awacs_amp *amp = chip->mixer_data; snd_pmac_awacs_update_automute() 826 if (snd_pmac_awacs_detect_headphone(chip)) { snd_pmac_awacs_update_automute() 838 int reg = chip->awacs_reg[1] snd_pmac_awacs_update_automute() 847 if (snd_pmac_awacs_detect_headphone(chip)) snd_pmac_awacs_update_automute() 855 if (do_notify && reg == chip->awacs_reg[1]) snd_pmac_awacs_update_automute() 857 snd_pmac_awacs_write_reg(chip, 1, reg); snd_pmac_awacs_update_automute() 860 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, snd_pmac_awacs_update_automute() 861 &chip->master_sw_ctl->id); snd_pmac_awacs_update_automute() 862 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, snd_pmac_awacs_update_automute() 863 &chip->speaker_sw_ctl->id); snd_pmac_awacs_update_automute() 864 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, snd_pmac_awacs_update_automute() 865 &chip->hp_detect_ctl->id); snd_pmac_awacs_update_automute() 873 * initialize chip 876 snd_pmac_awacs_init(struct snd_pmac *chip) snd_pmac_awacs_init() argument 894 chip->awacs_reg[0] = MASK_MUX_CD | 0xff | MASK_GAINLINE; snd_pmac_awacs_init() 895 chip->awacs_reg[1] = MASK_CMUTE | MASK_AMUTE; snd_pmac_awacs_init() 897 if (chip->has_iic || chip->device_id == 0x5 || snd_pmac_awacs_init() 898 /* chip->_device_id == 0x8 || */ snd_pmac_awacs_init() 899 chip->device_id == 0xb) snd_pmac_awacs_init() 900 chip->awacs_reg[1] |= MASK_PAROUT; snd_pmac_awacs_init() 906 chip->awacs_reg[2] = vol; snd_pmac_awacs_init() 907 chip->awacs_reg[4] = vol; snd_pmac_awacs_init() 908 if (chip->model == PMAC_SCREAMER) { snd_pmac_awacs_init() 910 chip->awacs_reg[5] = vol; snd_pmac_awacs_init() 912 chip->awacs_reg[6] = MASK_MIC_BOOST; snd_pmac_awacs_init() 913 chip->awacs_reg[7] = 0; snd_pmac_awacs_init() 916 awacs_restore_all_regs(chip); snd_pmac_awacs_init() 917 chip->manufacturer = (in_le32(&chip->awacs->codec_stat) >> 8) & 0xf; snd_pmac_awacs_init() 918 screamer_recalibrate(chip); snd_pmac_awacs_init() 920 chip->revision = (in_le32(&chip->awacs->codec_stat) >> 12) & 0xf; snd_pmac_awacs_init() 922 if (chip->revision == 3 && chip->has_iic && CHECK_CUDA_AMP()) { snd_pmac_awacs_init() 926 chip->mixer_data = amp; snd_pmac_awacs_init() 927 chip->mixer_free = awacs_amp_free; snd_pmac_awacs_init() 936 if (chip->hp_stat_mask == 0) { snd_pmac_awacs_init() 938 switch (chip->model) { snd_pmac_awacs_init() 940 chip->hp_stat_mask = pm7500 || pm5500 ? MASK_HDPCONN snd_pmac_awacs_init() 944 switch (chip->device_id) { snd_pmac_awacs_init() 947 chip->hp_stat_mask = imac snd_pmac_awacs_init() 955 chip->hp_stat_mask = MASK_LOCONN; snd_pmac_awacs_init() 958 chip->hp_stat_mask = MASK_HDPCONN; snd_pmac_awacs_init() 971 strcpy(chip->card->mixername, "PowerMac AWACS"); snd_pmac_awacs_init() 973 err = build_mixers(chip, ARRAY_SIZE(snd_pmac_awacs_mixers), snd_pmac_awacs_init() 979 else if (chip->model == PMAC_SCREAMER || pm5500) snd_pmac_awacs_init() 980 err = build_mixers(chip, ARRAY_SIZE(snd_pmac_screamer_mixers2), snd_pmac_awacs_init() 983 err = build_mixers(chip, ARRAY_SIZE(snd_pmac_awacs_mixers2), snd_pmac_awacs_init() 988 err = build_mixers(chip, snd_pmac_awacs_init() 995 err = build_mixers(chip, snd_pmac_awacs_init() 999 err = snd_ctl_add(chip->card, snd_pmac_awacs_init() 1001 chip))); snd_pmac_awacs_init() 1003 err = build_mixers(chip, snd_pmac_awacs_init() 1007 err = snd_ctl_add(chip->card, snd_pmac_awacs_init() 1009 chip))); snd_pmac_awacs_init() 1012 err = build_mixers(chip, snd_pmac_awacs_init() 1016 err = build_mixers(chip, snd_pmac_awacs_init() 1020 err = build_mixers(chip, snd_pmac_awacs_init() 1025 chip->master_sw_ctl = snd_ctl_new1((pm7500 || imac || g4agp || lombard) snd_pmac_awacs_init() 1029 : &snd_pmac_awacs_master_sw, chip); snd_pmac_awacs_init() 1030 err = snd_ctl_add(chip->card, chip->master_sw_ctl); snd_pmac_awacs_init() 1034 if (chip->mixer_data) { snd_pmac_awacs_init() 1041 err = build_mixers(chip, ARRAY_SIZE(snd_pmac_awacs_amp_vol), snd_pmac_awacs_init() 1046 chip->master_sw_ctl = snd_ctl_new1(&snd_pmac_awacs_amp_hp_sw, snd_pmac_awacs_init() 1047 chip); snd_pmac_awacs_init() 1048 err = snd_ctl_add(chip->card, chip->master_sw_ctl); snd_pmac_awacs_init() 1051 chip->speaker_sw_ctl = snd_ctl_new1(&snd_pmac_awacs_amp_spk_sw, snd_pmac_awacs_init() 1052 chip); snd_pmac_awacs_init() 1053 err = snd_ctl_add(chip->card, chip->speaker_sw_ctl); snd_pmac_awacs_init() 1060 err = snd_ctl_add(chip->card, snd_pmac_awacs_init() 1062 chip))); snd_pmac_awacs_init() 1065 chip->speaker_sw_ctl = snd_ctl_new1(imac1 snd_pmac_awacs_init() 1069 : &snd_pmac_awacs_speaker_sw, chip); snd_pmac_awacs_init() 1070 err = snd_ctl_add(chip->card, chip->speaker_sw_ctl); snd_pmac_awacs_init() 1079 chip->master_sw_ctl); snd_pmac_awacs_init() 1083 chip->speaker_sw_ctl); snd_pmac_awacs_init() 1086 err = snd_ctl_add(chip->card, vmaster_sw); snd_pmac_awacs_init() 1097 err = snd_ctl_add(chip->card, vmaster_vol); snd_pmac_awacs_init() 1103 err = build_mixers(chip, snd_pmac_awacs_init() 1107 err = build_mixers(chip, snd_pmac_awacs_init() 1110 else if (chip->model == PMAC_SCREAMER) snd_pmac_awacs_init() 1111 err = build_mixers(chip, snd_pmac_awacs_init() 1115 err = build_mixers(chip, snd_pmac_awacs_init() 1119 err = build_mixers(chip, ARRAY_SIZE(snd_pmac_awacs_mic_boost), snd_pmac_awacs_init() 1127 chip->set_format = snd_pmac_awacs_set_format; snd_pmac_awacs_init() 1129 chip->suspend = snd_pmac_awacs_suspend; snd_pmac_awacs_init() 1130 chip->resume = snd_pmac_awacs_resume; snd_pmac_awacs_init() 1133 err = snd_pmac_add_automute(chip); snd_pmac_awacs_init() 1136 chip->detect_headphone = snd_pmac_awacs_detect_headphone; snd_pmac_awacs_init() 1137 chip->update_automute = snd_pmac_awacs_update_automute; snd_pmac_awacs_init() 1138 snd_pmac_awacs_update_automute(chip, 0); /* update the status only */ snd_pmac_awacs_init() 1140 if (chip->model == PMAC_SCREAMER) { snd_pmac_awacs_init() 1141 snd_pmac_awacs_write_noreg(chip, 6, chip->awacs_reg[6]); snd_pmac_awacs_init() 1142 snd_pmac_awacs_write_noreg(chip, 0, chip->awacs_reg[0]); snd_pmac_awacs_init()
H A D	burgundy.c	32 snd_pmac_burgundy_busy_wait(struct snd_pmac *chip) snd_pmac_burgundy_busy_wait() argument 35 while ((in_le32(&chip->awacs->codec_ctrl) & MASK_NEWECMD) && timeout--) snd_pmac_burgundy_busy_wait() 42 snd_pmac_burgundy_extend_wait(struct snd_pmac *chip) snd_pmac_burgundy_extend_wait() argument 46 while (!(in_le32(&chip->awacs->codec_stat) & MASK_EXTEND) && timeout--) snd_pmac_burgundy_extend_wait() 51 while ((in_le32(&chip->awacs->codec_stat) & MASK_EXTEND) && timeout--) snd_pmac_burgundy_extend_wait() 58 snd_pmac_burgundy_wcw(struct snd_pmac *chip, unsigned addr, unsigned val) snd_pmac_burgundy_wcw() argument 60 out_le32(&chip->awacs->codec_ctrl, addr + 0x200c00 + (val & 0xff)); snd_pmac_burgundy_wcw() 61 snd_pmac_burgundy_busy_wait(chip); snd_pmac_burgundy_wcw() 62 out_le32(&chip->awacs->codec_ctrl, addr + 0x200d00 +((val>>8) & 0xff)); snd_pmac_burgundy_wcw() 63 snd_pmac_burgundy_busy_wait(chip); snd_pmac_burgundy_wcw() 64 out_le32(&chip->awacs->codec_ctrl, addr + 0x200e00 +((val>>16) & 0xff)); snd_pmac_burgundy_wcw() 65 snd_pmac_burgundy_busy_wait(chip); snd_pmac_burgundy_wcw() 66 out_le32(&chip->awacs->codec_ctrl, addr + 0x200f00 +((val>>24) & 0xff)); snd_pmac_burgundy_wcw() 67 snd_pmac_burgundy_busy_wait(chip); snd_pmac_burgundy_wcw() 71 snd_pmac_burgundy_rcw(struct snd_pmac *chip, unsigned addr) snd_pmac_burgundy_rcw() argument 76 spin_lock_irqsave(&chip->reg_lock, flags); snd_pmac_burgundy_rcw() 78 out_le32(&chip->awacs->codec_ctrl, addr + 0x100000); snd_pmac_burgundy_rcw() 79 snd_pmac_burgundy_busy_wait(chip); snd_pmac_burgundy_rcw() 80 snd_pmac_burgundy_extend_wait(chip); snd_pmac_burgundy_rcw() 81 val += (in_le32(&chip->awacs->codec_stat) >> 4) & 0xff; snd_pmac_burgundy_rcw() 83 out_le32(&chip->awacs->codec_ctrl, addr + 0x100100); snd_pmac_burgundy_rcw() 84 snd_pmac_burgundy_busy_wait(chip); snd_pmac_burgundy_rcw() 85 snd_pmac_burgundy_extend_wait(chip); snd_pmac_burgundy_rcw() 86 val += ((in_le32(&chip->awacs->codec_stat)>>4) & 0xff) <<8; snd_pmac_burgundy_rcw() 88 out_le32(&chip->awacs->codec_ctrl, addr + 0x100200); snd_pmac_burgundy_rcw() 89 snd_pmac_burgundy_busy_wait(chip); snd_pmac_burgundy_rcw() 90 snd_pmac_burgundy_extend_wait(chip); snd_pmac_burgundy_rcw() 91 val += ((in_le32(&chip->awacs->codec_stat)>>4) & 0xff) <<16; snd_pmac_burgundy_rcw() 93 out_le32(&chip->awacs->codec_ctrl, addr + 0x100300); snd_pmac_burgundy_rcw() 94 snd_pmac_burgundy_busy_wait(chip); snd_pmac_burgundy_rcw() 95 snd_pmac_burgundy_extend_wait(chip); snd_pmac_burgundy_rcw() 96 val += ((in_le32(&chip->awacs->codec_stat)>>4) & 0xff) <<24; snd_pmac_burgundy_rcw() 98 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_pmac_burgundy_rcw() 104 snd_pmac_burgundy_wcb(struct snd_pmac *chip, unsigned int addr, snd_pmac_burgundy_wcb() argument 107 out_le32(&chip->awacs->codec_ctrl, addr + 0x300000 + (val & 0xff)); snd_pmac_burgundy_wcb() 108 snd_pmac_burgundy_busy_wait(chip); snd_pmac_burgundy_wcb() 112 snd_pmac_burgundy_rcb(struct snd_pmac *chip, unsigned int addr) snd_pmac_burgundy_rcb() argument 117 spin_lock_irqsave(&chip->reg_lock, flags); snd_pmac_burgundy_rcb() 119 out_le32(&chip->awacs->codec_ctrl, addr + 0x100000); snd_pmac_burgundy_rcb() 120 snd_pmac_burgundy_busy_wait(chip); snd_pmac_burgundy_rcb() 121 snd_pmac_burgundy_extend_wait(chip); snd_pmac_burgundy_rcb() 122 val += (in_le32(&chip->awacs->codec_stat) >> 4) & 0xff; snd_pmac_burgundy_rcb() 124 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_pmac_burgundy_rcb() 136 snd_pmac_burgundy_write_volume(struct snd_pmac *chip, unsigned int address, snd_pmac_burgundy_write_volume() argument 151 snd_pmac_burgundy_wcw(chip, address, hardvolume); snd_pmac_burgundy_write_volume() 155 snd_pmac_burgundy_read_volume(struct snd_pmac *chip, unsigned int address, snd_pmac_burgundy_read_volume() argument 160 wvolume = snd_pmac_burgundy_rcw(chip, address); snd_pmac_burgundy_read_volume() 187 struct snd_pmac *chip = snd_kcontrol_chip(kcontrol); snd_pmac_burgundy_get_volume() local 190 snd_pmac_burgundy_read_volume(chip, addr, snd_pmac_burgundy_get_volume() 198 struct snd_pmac *chip = snd_kcontrol_chip(kcontrol); snd_pmac_burgundy_put_volume() local 203 snd_pmac_burgundy_write_volume(chip, addr, snd_pmac_burgundy_put_volume() 205 snd_pmac_burgundy_read_volume(chip, addr, nvoices, shift); snd_pmac_burgundy_put_volume() 221 snd_pmac_burgundy_write_volume_2b(struct snd_pmac *chip, unsigned int address, snd_pmac_burgundy_write_volume_2b() argument 230 snd_pmac_burgundy_wcb(chip, address + off, lvolume); snd_pmac_burgundy_write_volume_2b() 231 snd_pmac_burgundy_wcb(chip, address + off + 0x500, rvolume); snd_pmac_burgundy_write_volume_2b() 235 snd_pmac_burgundy_read_volume_2b(struct snd_pmac *chip, unsigned int address, snd_pmac_burgundy_read_volume_2b() argument 238 volume[0] = snd_pmac_burgundy_rcb(chip, address + off); snd_pmac_burgundy_read_volume_2b() 243 volume[1] = snd_pmac_burgundy_rcb(chip, address + off + 0x100); snd_pmac_burgundy_read_volume_2b() 263 struct snd_pmac *chip = snd_kcontrol_chip(kcontrol); snd_pmac_burgundy_get_volume_2b() local 266 snd_pmac_burgundy_read_volume_2b(chip, addr, snd_pmac_burgundy_get_volume_2b() 274 struct snd_pmac *chip = snd_kcontrol_chip(kcontrol); snd_pmac_burgundy_put_volume_2b() local 279 snd_pmac_burgundy_write_volume_2b(chip, addr, snd_pmac_burgundy_put_volume_2b() 281 snd_pmac_burgundy_read_volume_2b(chip, addr, nvoices, off); snd_pmac_burgundy_put_volume_2b() 310 struct snd_pmac *chip = snd_kcontrol_chip(kcontrol); snd_pmac_burgundy_get_gain() local 316 oval = snd_pmac_burgundy_rcb(chip, addr); snd_pmac_burgundy_get_gain() 328 struct snd_pmac *chip = snd_kcontrol_chip(kcontrol); snd_pmac_burgundy_put_gain() local 334 oval = snd_pmac_burgundy_rcb(chip, addr); snd_pmac_burgundy_put_gain() 344 snd_pmac_burgundy_wcb(chip, addr, val); snd_pmac_burgundy_put_gain() 372 struct snd_pmac *chip = snd_kcontrol_chip(kcontrol); snd_pmac_burgundy_get_switch_w() local 377 int val = snd_pmac_burgundy_rcw(chip, addr); snd_pmac_burgundy_get_switch_w() 387 struct snd_pmac *chip = snd_kcontrol_chip(kcontrol); snd_pmac_burgundy_put_switch_w() local 393 oval = snd_pmac_burgundy_rcw(chip, addr); snd_pmac_burgundy_put_switch_w() 399 snd_pmac_burgundy_wcw(chip, addr, val); snd_pmac_burgundy_put_switch_w() 428 struct snd_pmac *chip = snd_kcontrol_chip(kcontrol); snd_pmac_burgundy_get_switch_b() local 433 int val = snd_pmac_burgundy_rcb(chip, addr); snd_pmac_burgundy_get_switch_b() 443 struct snd_pmac *chip = snd_kcontrol_chip(kcontrol); snd_pmac_burgundy_put_switch_b() local 449 oval = snd_pmac_burgundy_rcb(chip, addr); snd_pmac_burgundy_put_switch_b() 455 snd_pmac_burgundy_wcb(chip, addr, val); snd_pmac_burgundy_put_switch_b() 576 static int snd_pmac_burgundy_detect_headphone(struct snd_pmac *chip) snd_pmac_burgundy_detect_headphone() argument 578 return (in_le32(&chip->awacs->codec_stat) & chip->hp_stat_mask) ? 1 : 0; snd_pmac_burgundy_detect_headphone() 581 static void snd_pmac_burgundy_update_automute(struct snd_pmac *chip, int do_notify) snd_pmac_burgundy_update_automute() argument 583 if (chip->auto_mute) { snd_pmac_burgundy_update_automute() 586 reg = oreg = snd_pmac_burgundy_rcb(chip, snd_pmac_burgundy_update_automute() 592 if (snd_pmac_burgundy_detect_headphone(chip)) snd_pmac_burgundy_update_automute() 602 snd_pmac_burgundy_wcb(chip, snd_pmac_burgundy_update_automute() 605 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, snd_pmac_burgundy_update_automute() 606 &chip->master_sw_ctl->id); snd_pmac_burgundy_update_automute() 607 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, snd_pmac_burgundy_update_automute() 608 &chip->speaker_sw_ctl->id); snd_pmac_burgundy_update_automute() 609 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, snd_pmac_burgundy_update_automute() 610 &chip->hp_detect_ctl->id); snd_pmac_burgundy_update_automute() 620 int snd_pmac_burgundy_init(struct snd_pmac *chip) snd_pmac_burgundy_init() argument 625 /* Checks to see the chip is alive and kicking */ snd_pmac_burgundy_init() 626 if ((in_le32(&chip->awacs->codec_ctrl) & MASK_ERRCODE) == 0xf0000) { snd_pmac_burgundy_init() 631 snd_pmac_burgundy_wcw(chip, MASK_ADDR_BURGUNDY_OUTPUTENABLES, snd_pmac_burgundy_init() 633 snd_pmac_burgundy_wcb(chip, MASK_ADDR_BURGUNDY_MORE_OUTPUTENABLES, snd_pmac_burgundy_init() 635 snd_pmac_burgundy_wcw(chip, MASK_ADDR_BURGUNDY_OUTPUTSELECTS, snd_pmac_burgundy_init() 638 snd_pmac_burgundy_wcb(chip, MASK_ADDR_BURGUNDY_INPSEL21, snd_pmac_burgundy_init() 640 snd_pmac_burgundy_wcb(chip, MASK_ADDR_BURGUNDY_INPSEL3, snd_pmac_burgundy_init() 643 snd_pmac_burgundy_wcb(chip, MASK_ADDR_BURGUNDY_GAINCD, snd_pmac_burgundy_init() 645 snd_pmac_burgundy_wcb(chip, MASK_ADDR_BURGUNDY_GAINLINE, snd_pmac_burgundy_init() 647 snd_pmac_burgundy_wcb(chip, MASK_ADDR_BURGUNDY_GAINMIC, snd_pmac_burgundy_init() 649 snd_pmac_burgundy_wcb(chip, MASK_ADDR_BURGUNDY_GAINMODEM, snd_pmac_burgundy_init() 652 snd_pmac_burgundy_wcb(chip, MASK_ADDR_BURGUNDY_ATTENSPEAKER, snd_pmac_burgundy_init() 654 snd_pmac_burgundy_wcb(chip, MASK_ADDR_BURGUNDY_ATTENLINEOUT, snd_pmac_burgundy_init() 656 snd_pmac_burgundy_wcb(chip, MASK_ADDR_BURGUNDY_ATTENHP, snd_pmac_burgundy_init() 659 snd_pmac_burgundy_wcw(chip, MASK_ADDR_BURGUNDY_MASTER_VOLUME, snd_pmac_burgundy_init() 661 snd_pmac_burgundy_wcw(chip, MASK_ADDR_BURGUNDY_VOLCD, snd_pmac_burgundy_init() 663 snd_pmac_burgundy_wcw(chip, MASK_ADDR_BURGUNDY_VOLLINE, snd_pmac_burgundy_init() 665 snd_pmac_burgundy_wcw(chip, MASK_ADDR_BURGUNDY_VOLMIC, snd_pmac_burgundy_init() 668 if (chip->hp_stat_mask == 0) { snd_pmac_burgundy_init() 671 chip->hp_stat_mask = BURGUNDY_HPDETECT_IMAC_UPPER snd_pmac_burgundy_init() 675 chip->hp_stat_mask = BURGUNDY_HPDETECT_PMAC_BACK; snd_pmac_burgundy_init() 680 strcpy(chip->card->mixername, "PowerMac Burgundy"); snd_pmac_burgundy_init() 683 err = snd_ctl_add(chip->card, snd_pmac_burgundy_init() 684 snd_ctl_new1(&snd_pmac_burgundy_mixers[i], chip)); snd_pmac_burgundy_init() 690 err = snd_ctl_add(chip->card, snd_pmac_burgundy_init() 692 : &snd_pmac_burgundy_mixers_pmac[i], chip)); snd_pmac_burgundy_init() 696 chip->master_sw_ctl = snd_ctl_new1(imac snd_pmac_burgundy_init() 698 : &snd_pmac_burgundy_master_sw_pmac, chip); snd_pmac_burgundy_init() 699 err = snd_ctl_add(chip->card, chip->master_sw_ctl); snd_pmac_burgundy_init() 702 chip->master_sw_ctl = snd_ctl_new1(imac snd_pmac_burgundy_init() 704 : &snd_pmac_burgundy_line_sw_pmac, chip); snd_pmac_burgundy_init() 705 err = snd_ctl_add(chip->card, chip->master_sw_ctl); snd_pmac_burgundy_init() 709 chip->master_sw_ctl = snd_ctl_new1( snd_pmac_burgundy_init() 710 &snd_pmac_burgundy_hp_sw_imac, chip); snd_pmac_burgundy_init() 711 err = snd_ctl_add(chip->card, chip->master_sw_ctl); snd_pmac_burgundy_init() 715 chip->speaker_sw_ctl = snd_ctl_new1(imac snd_pmac_burgundy_init() 717 : &snd_pmac_burgundy_speaker_sw_pmac, chip); snd_pmac_burgundy_init() 718 err = snd_ctl_add(chip->card, chip->speaker_sw_ctl); snd_pmac_burgundy_init() 722 err = snd_pmac_add_automute(chip); snd_pmac_burgundy_init() 726 chip->detect_headphone = snd_pmac_burgundy_detect_headphone; snd_pmac_burgundy_init() 727 chip->update_automute = snd_pmac_burgundy_update_automute; snd_pmac_burgundy_init() 728 snd_pmac_burgundy_update_automute(chip, 0); /* update the status only */ snd_pmac_burgundy_init()
H A D	beep.c	46 void snd_pmac_beep_stop(struct snd_pmac *chip) snd_pmac_beep_stop() argument 48 struct pmac_beep *beep = chip->beep; snd_pmac_beep_stop() 51 snd_pmac_beep_dma_stop(chip); snd_pmac_beep_stop() 102 struct snd_pmac *chip; snd_pmac_beep_event() local 120 chip = input_get_drvdata(dev); snd_pmac_beep_event() 121 if (! chip || (beep = chip->beep) == NULL) snd_pmac_beep_event() 125 spin_lock_irqsave(&chip->reg_lock, flags); snd_pmac_beep_event() 127 snd_pmac_beep_stop(chip); snd_pmac_beep_event() 128 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_pmac_beep_event() 132 beep_speed = snd_pmac_rate_index(chip, &chip->playback, BEEP_SRATE); snd_pmac_beep_event() 133 srate = chip->freq_table[beep_speed]; snd_pmac_beep_event() 138 spin_lock_irqsave(&chip->reg_lock, flags); snd_pmac_beep_event() 139 if (chip->playback.running || chip->capture.running || beep->running) { snd_pmac_beep_event() 140 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_pmac_beep_event() 144 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_pmac_beep_event() 164 spin_lock_irqsave(&chip->reg_lock, flags); snd_pmac_beep_event() 165 snd_pmac_beep_dma_start(chip, beep->nsamples * 4, beep->addr, beep_speed); snd_pmac_beep_event() 166 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_pmac_beep_event() 187 struct snd_pmac *chip = snd_kcontrol_chip(kcontrol); snd_pmac_get_beep() local 188 if (snd_BUG_ON(!chip->beep)) snd_pmac_get_beep() 190 ucontrol->value.integer.value[0] = chip->beep->volume; snd_pmac_get_beep() 197 struct snd_pmac *chip = snd_kcontrol_chip(kcontrol); snd_pmac_put_beep() local 199 if (snd_BUG_ON(!chip->beep)) snd_pmac_put_beep() 201 oval = chip->beep->volume; snd_pmac_put_beep() 205 chip->beep->volume = nval; snd_pmac_put_beep() 206 return oval != chip->beep->volume; snd_pmac_put_beep() 218 int snd_pmac_attach_beep(struct snd_pmac *chip) snd_pmac_attach_beep() argument 229 dmabuf = dma_alloc_coherent(&chip->pdev->dev, BEEP_BUFLEN * 4, snd_pmac_attach_beep() 246 input_dev->dev.parent = &chip->pdev->dev; snd_pmac_attach_beep() 247 input_set_drvdata(input_dev, chip); snd_pmac_attach_beep() 254 beep_ctl = snd_ctl_new1(&snd_pmac_beep_mixer, chip); snd_pmac_attach_beep() 255 err = snd_ctl_add(chip->card, beep_ctl); snd_pmac_attach_beep() 259 chip->beep = beep; snd_pmac_attach_beep() 267 fail2: snd_ctl_remove(chip->card, beep_ctl); snd_pmac_attach_beep() 270 dma_free_coherent(&chip->pdev->dev, BEEP_BUFLEN * 4, snd_pmac_attach_beep() 276 void snd_pmac_detach_beep(struct snd_pmac *chip) snd_pmac_detach_beep() argument 278 if (chip->beep) { snd_pmac_detach_beep() 279 input_unregister_device(chip->beep->dev); snd_pmac_detach_beep() 280 dma_free_coherent(&chip->pdev->dev, BEEP_BUFLEN * 4, snd_pmac_detach_beep() 281 chip->beep->buf, chip->beep->addr); snd_pmac_detach_beep() 282 kfree(chip->beep); snd_pmac_detach_beep() 283 chip->beep = NULL; snd_pmac_detach_beep()
/linux-4.1.27/drivers/char/tpm/
H A D	tpm-chip.c	14 * TPM chip management routines. 40 * tpm_chip_find_get - return tpm_chip for a given chip number 41 * @chip_num the device number for the chip 45 struct tpm_chip *pos, *chip = NULL; tpm_chip_find_get() local 53 chip = pos; tpm_chip_find_get() 58 return chip; tpm_chip_find_get() 62 * tpm_dev_release() - free chip memory and the device number 63 * @dev: the character device for the TPM chip 69 struct tpm_chip *chip = container_of(dev, struct tpm_chip, dev); tpm_dev_release() local 72 clear_bit(chip->dev_num, dev_mask); tpm_dev_release() 74 kfree(chip); tpm_dev_release() 79 * @dev: device to which the chip is associated 90 struct tpm_chip *chip; tpmm_chip_alloc() local 92 chip = kzalloc(sizeof(*chip), GFP_KERNEL); tpmm_chip_alloc() 93 if (chip == NULL) tpmm_chip_alloc() 96 mutex_init(&chip->tpm_mutex); tpmm_chip_alloc() 97 INIT_LIST_HEAD(&chip->list); tpmm_chip_alloc() 99 chip->ops = ops; tpmm_chip_alloc() 102 chip->dev_num = find_first_zero_bit(dev_mask, TPM_NUM_DEVICES); tpmm_chip_alloc() 105 if (chip->dev_num >= TPM_NUM_DEVICES) { tpmm_chip_alloc() 107 kfree(chip); tpmm_chip_alloc() 111 set_bit(chip->dev_num, dev_mask); tpmm_chip_alloc() 113 scnprintf(chip->devname, sizeof(chip->devname), "tpm%d", chip->dev_num); tpmm_chip_alloc() 115 chip->pdev = dev; tpmm_chip_alloc() 117 dev_set_drvdata(dev, chip); tpmm_chip_alloc() 119 chip->dev.class = tpm_class; tpmm_chip_alloc() 120 chip->dev.release = tpm_dev_release; tpmm_chip_alloc() 121 chip->dev.parent = chip->pdev; tpmm_chip_alloc() 123 if (chip->dev_num == 0) tpmm_chip_alloc() 124 chip->dev.devt = MKDEV(MISC_MAJOR, TPM_MINOR); tpmm_chip_alloc() 126 chip->dev.devt = MKDEV(MAJOR(tpm_devt), chip->dev_num); tpmm_chip_alloc() 128 dev_set_name(&chip->dev, "%s", chip->devname); tpmm_chip_alloc() 130 device_initialize(&chip->dev); tpmm_chip_alloc() 132 cdev_init(&chip->cdev, &tpm_fops); tpmm_chip_alloc() 133 chip->cdev.owner = chip->pdev->driver->owner; tpmm_chip_alloc() 134 chip->cdev.kobj.parent = &chip->dev.kobj; tpmm_chip_alloc() 136 return chip; tpmm_chip_alloc() 140 static int tpm_dev_add_device(struct tpm_chip *chip) tpm_dev_add_device() argument 144 rc = cdev_add(&chip->cdev, chip->dev.devt, 1); tpm_dev_add_device() 146 dev_err(&chip->dev, tpm_dev_add_device() 148 chip->devname, MAJOR(chip->dev.devt), tpm_dev_add_device() 149 MINOR(chip->dev.devt), rc); tpm_dev_add_device() 151 device_unregister(&chip->dev); tpm_dev_add_device() 155 rc = device_add(&chip->dev); tpm_dev_add_device() 157 dev_err(&chip->dev, tpm_dev_add_device() 159 chip->devname, MAJOR(chip->dev.devt), tpm_dev_add_device() 160 MINOR(chip->dev.devt), rc); tpm_dev_add_device() 168 static void tpm_dev_del_device(struct tpm_chip *chip) tpm_dev_del_device() argument 170 cdev_del(&chip->cdev); tpm_dev_del_device() 171 device_unregister(&chip->dev); tpm_dev_del_device() 174 static int tpm1_chip_register(struct tpm_chip *chip) tpm1_chip_register() argument 178 if (chip->flags & TPM_CHIP_FLAG_TPM2) tpm1_chip_register() 181 rc = tpm_sysfs_add_device(chip); tpm1_chip_register() 185 rc = tpm_add_ppi(chip); tpm1_chip_register() 187 tpm_sysfs_del_device(chip); tpm1_chip_register() 191 chip->bios_dir = tpm_bios_log_setup(chip->devname); tpm1_chip_register() 196 static void tpm1_chip_unregister(struct tpm_chip *chip) tpm1_chip_unregister() argument 198 if (chip->flags & TPM_CHIP_FLAG_TPM2) tpm1_chip_unregister() 201 if (chip->bios_dir) tpm1_chip_unregister() 202 tpm_bios_log_teardown(chip->bios_dir); tpm1_chip_unregister() 204 tpm_remove_ppi(chip); tpm1_chip_unregister() 206 tpm_sysfs_del_device(chip); tpm1_chip_unregister() 210 * tpm_chip_register() - create a character device for the TPM chip 211 * @chip: TPM chip to use. 213 * Creates a character device for the TPM chip and adds sysfs attributes for 214 * the device. As the last step this function adds the chip to the list of TPM 217 * This function should be only called after the chip initialization is 220 int tpm_chip_register(struct tpm_chip *chip) tpm_chip_register() argument 224 rc = tpm1_chip_register(chip); tpm_chip_register() 228 rc = tpm_dev_add_device(chip); tpm_chip_register() 232 /* Make the chip available. */ tpm_chip_register() 234 list_add_rcu(&chip->list, &tpm_chip_list); tpm_chip_register() 237 chip->flags |= TPM_CHIP_FLAG_REGISTERED; tpm_chip_register() 241 tpm1_chip_unregister(chip); tpm_chip_register() 248 * @chip: TPM chip to use. 250 * Takes the chip first away from the list of available TPM chips and then 253 * NOTE: This function should be only called before deinitializing chip 256 void tpm_chip_unregister(struct tpm_chip *chip) tpm_chip_unregister() argument 258 if (!(chip->flags & TPM_CHIP_FLAG_REGISTERED)) tpm_chip_unregister() 262 list_del_rcu(&chip->list); tpm_chip_unregister() 266 tpm1_chip_unregister(chip); tpm_chip_unregister() 267 tpm_dev_del_device(chip); tpm_chip_unregister()
H A D	tpm_tis.c	81 /* Some timeout values are needed before it is known whether the chip is 160 static int wait_startup(struct tpm_chip *chip, int l) wait_startup() argument 162 unsigned long stop = jiffies + chip->vendor.timeout_a; wait_startup() 164 if (ioread8(chip->vendor.iobase + TPM_ACCESS(l)) & wait_startup() 172 static int check_locality(struct tpm_chip *chip, int l) check_locality() argument 174 if ((ioread8(chip->vendor.iobase + TPM_ACCESS(l)) & check_locality() 177 return chip->vendor.locality = l; check_locality() 182 static void release_locality(struct tpm_chip *chip, int l, int force) release_locality() argument 184 if (force || (ioread8(chip->vendor.iobase + TPM_ACCESS(l)) & release_locality() 188 chip->vendor.iobase + TPM_ACCESS(l)); release_locality() 191 static int request_locality(struct tpm_chip *chip, int l) request_locality() argument 196 if (check_locality(chip, l) >= 0) request_locality() 200 chip->vendor.iobase + TPM_ACCESS(l)); request_locality() 202 stop = jiffies + chip->vendor.timeout_a; request_locality() 204 if (chip->vendor.irq) { request_locality() 209 rc = wait_event_interruptible_timeout(chip->vendor.int_queue, request_locality() 211 (chip, l) >= 0), request_locality() 222 if (check_locality(chip, l) >= 0) request_locality() 231 static u8 tpm_tis_status(struct tpm_chip *chip) tpm_tis_status() argument 233 return ioread8(chip->vendor.iobase + tpm_tis_status() 234 TPM_STS(chip->vendor.locality)); tpm_tis_status() 237 static void tpm_tis_ready(struct tpm_chip *chip) tpm_tis_ready() argument 241 chip->vendor.iobase + TPM_STS(chip->vendor.locality)); tpm_tis_ready() 244 static int get_burstcount(struct tpm_chip *chip) get_burstcount() argument 251 stop = jiffies + chip->vendor.timeout_d; get_burstcount() 253 burstcnt = ioread8(chip->vendor.iobase + get_burstcount() 254 TPM_STS(chip->vendor.locality) + 1); get_burstcount() 255 burstcnt += ioread8(chip->vendor.iobase + get_burstcount() 256 TPM_STS(chip->vendor.locality) + get_burstcount() 265 static int recv_data(struct tpm_chip *chip, u8 *buf, size_t count) recv_data() argument 269 wait_for_tpm_stat(chip, recv_data() 271 chip->vendor.timeout_c, recv_data() 272 &chip->vendor.read_queue, true) recv_data() 274 burstcnt = get_burstcount(chip); recv_data() 276 buf[size++] = ioread8(chip->vendor.iobase + recv_data() 277 TPM_DATA_FIFO(chip->vendor. recv_data() 283 static int tpm_tis_recv(struct tpm_chip *chip, u8 *buf, size_t count) tpm_tis_recv() argument 295 recv_data(chip, buf, TPM_HEADER_SIZE)) < TPM_HEADER_SIZE) { tpm_tis_recv() 296 dev_err(chip->pdev, "Unable to read header\n"); tpm_tis_recv() 307 recv_data(chip, &buf[TPM_HEADER_SIZE], tpm_tis_recv() 309 dev_err(chip->pdev, "Unable to read remainder of result\n"); tpm_tis_recv() 314 wait_for_tpm_stat(chip, TPM_STS_VALID, chip->vendor.timeout_c, tpm_tis_recv() 315 &chip->vendor.int_queue, false); tpm_tis_recv() 316 status = tpm_tis_status(chip); tpm_tis_recv() 318 dev_err(chip->pdev, "Error left over data\n"); tpm_tis_recv() 324 tpm_tis_ready(chip); tpm_tis_recv() 325 release_locality(chip, chip->vendor.locality, 0); tpm_tis_recv() 338 static int tpm_tis_send_data(struct tpm_chip *chip, u8 *buf, size_t len) tpm_tis_send_data() argument 343 if (request_locality(chip, 0) < 0) tpm_tis_send_data() 346 status = tpm_tis_status(chip); tpm_tis_send_data() 348 tpm_tis_ready(chip); tpm_tis_send_data() 350 (chip, TPM_STS_COMMAND_READY, chip->vendor.timeout_b, tpm_tis_send_data() 351 &chip->vendor.int_queue, false) < 0) { tpm_tis_send_data() 358 burstcnt = get_burstcount(chip); tpm_tis_send_data() 360 iowrite8(buf[count], chip->vendor.iobase + tpm_tis_send_data() 361 TPM_DATA_FIFO(chip->vendor.locality)); tpm_tis_send_data() 365 wait_for_tpm_stat(chip, TPM_STS_VALID, chip->vendor.timeout_c, tpm_tis_send_data() 366 &chip->vendor.int_queue, false); tpm_tis_send_data() 367 status = tpm_tis_status(chip); tpm_tis_send_data() 376 chip->vendor.iobase + TPM_DATA_FIFO(chip->vendor.locality)); tpm_tis_send_data() 377 wait_for_tpm_stat(chip, TPM_STS_VALID, chip->vendor.timeout_c, tpm_tis_send_data() 378 &chip->vendor.int_queue, false); tpm_tis_send_data() 379 status = tpm_tis_status(chip); tpm_tis_send_data() 388 tpm_tis_ready(chip); tpm_tis_send_data() 389 release_locality(chip, chip->vendor.locality, 0); tpm_tis_send_data() 393 static void disable_interrupts(struct tpm_chip *chip) disable_interrupts() argument 398 ioread32(chip->vendor.iobase + disable_interrupts() 399 TPM_INT_ENABLE(chip->vendor.locality)); disable_interrupts() 402 chip->vendor.iobase + disable_interrupts() 403 TPM_INT_ENABLE(chip->vendor.locality)); disable_interrupts() 404 free_irq(chip->vendor.irq, chip); disable_interrupts() 405 chip->vendor.irq = 0; disable_interrupts() 413 static int tpm_tis_send_main(struct tpm_chip *chip, u8 *buf, size_t len) tpm_tis_send_main() argument 419 rc = tpm_tis_send_data(chip, buf, len); tpm_tis_send_main() 425 chip->vendor.iobase + TPM_STS(chip->vendor.locality)); tpm_tis_send_main() 427 if (chip->vendor.irq) { tpm_tis_send_main() 430 if (chip->flags & TPM_CHIP_FLAG_TPM2) tpm_tis_send_main() 431 dur = tpm2_calc_ordinal_duration(chip, ordinal); tpm_tis_send_main() 433 dur = tpm_calc_ordinal_duration(chip, ordinal); tpm_tis_send_main() 436 (chip, TPM_STS_DATA_AVAIL | TPM_STS_VALID, dur, tpm_tis_send_main() 437 &chip->vendor.read_queue, false) < 0) { tpm_tis_send_main() 444 tpm_tis_ready(chip); tpm_tis_send_main() 445 release_locality(chip, chip->vendor.locality, 0); tpm_tis_send_main() 449 static int tpm_tis_send(struct tpm_chip *chip, u8 *buf, size_t len) tpm_tis_send() argument 452 struct priv_data *priv = chip->vendor.priv; tpm_tis_send() 454 if (!chip->vendor.irq || priv->irq_tested) tpm_tis_send() 455 return tpm_tis_send_main(chip, buf, len); tpm_tis_send() 458 irq = chip->vendor.irq; tpm_tis_send() 459 chip->vendor.irq = 0; tpm_tis_send() 460 rc = tpm_tis_send_main(chip, buf, len); tpm_tis_send() 461 chip->vendor.irq = irq; tpm_tis_send() 465 disable_interrupts(chip); tpm_tis_send() 466 dev_err(chip->pdev, tpm_tis_send() 484 static bool tpm_tis_update_timeouts(struct tpm_chip *chip, tpm_tis_update_timeouts() argument 490 did_vid = ioread32(chip->vendor.iobase + TPM_DID_VID(0)); tpm_tis_update_timeouts() 508 static int probe_itpm(struct tpm_chip *chip) probe_itpm() argument 517 u16 vendor = ioread16(chip->vendor.iobase + TPM_DID_VID(0)); probe_itpm() 525 rc = tpm_tis_send_data(chip, cmd_getticks, len); probe_itpm() 529 tpm_tis_ready(chip); probe_itpm() 530 release_locality(chip, chip->vendor.locality, 0); probe_itpm() 534 rc = tpm_tis_send_data(chip, cmd_getticks, len); probe_itpm() 536 dev_info(chip->pdev, "Detected an iTPM.\n"); probe_itpm() 543 tpm_tis_ready(chip); probe_itpm() 544 release_locality(chip, chip->vendor.locality, 0); probe_itpm() 549 static bool tpm_tis_req_canceled(struct tpm_chip *chip, u8 status) tpm_tis_req_canceled() argument 551 switch (chip->vendor.manufacturer_id) { tpm_tis_req_canceled() 575 struct tpm_chip *chip = dev_id; tis_int_probe() local 578 interrupt = ioread32(chip->vendor.iobase + tis_int_probe() 579 TPM_INT_STATUS(chip->vendor.locality)); tis_int_probe() 584 chip->vendor.probed_irq = irq; tis_int_probe() 588 chip->vendor.iobase + tis_int_probe() 589 TPM_INT_STATUS(chip->vendor.locality)); tis_int_probe() 595 struct tpm_chip *chip = dev_id; tis_int_handler() local 599 interrupt = ioread32(chip->vendor.iobase + tis_int_handler() 600 TPM_INT_STATUS(chip->vendor.locality)); tis_int_handler() 605 ((struct priv_data *)chip->vendor.priv)->irq_tested = true; tis_int_handler() 607 wake_up_interruptible(&chip->vendor.read_queue); tis_int_handler() 610 if (check_locality(chip, i) >= 0) tis_int_handler() 615 wake_up_interruptible(&chip->vendor.int_queue); tis_int_handler() 619 chip->vendor.iobase + tis_int_handler() 620 TPM_INT_STATUS(chip->vendor.locality)); tis_int_handler() 621 ioread32(chip->vendor.iobase + TPM_INT_STATUS(chip->vendor.locality)); tis_int_handler() 629 static void tpm_tis_remove(struct tpm_chip *chip) tpm_tis_remove() argument 631 if (chip->flags & TPM_CHIP_FLAG_TPM2) tpm_tis_remove() 632 tpm2_shutdown(chip, TPM2_SU_CLEAR); tpm_tis_remove() 635 ioread32(chip->vendor.iobase + tpm_tis_remove() 636 TPM_INT_ENABLE(chip->vendor. tpm_tis_remove() 638 chip->vendor.iobase + tpm_tis_remove() 639 TPM_INT_ENABLE(chip->vendor.locality)); tpm_tis_remove() 640 release_locality(chip, chip->vendor.locality, 1); tpm_tis_remove() 648 struct tpm_chip *chip; tpm_tis_init() local 655 chip = tpmm_chip_alloc(dev, &tpm_tis); tpm_tis_init() 656 if (IS_ERR(chip)) tpm_tis_init() 657 return PTR_ERR(chip); tpm_tis_init() 659 chip->vendor.priv = priv; tpm_tis_init() 661 chip->acpi_dev_handle = acpi_dev_handle; tpm_tis_init() 664 chip->vendor.iobase = devm_ioremap(dev, tpm_info->start, tpm_info->len); tpm_tis_init() 665 if (!chip->vendor.iobase) tpm_tis_init() 669 chip->vendor.timeout_a = TIS_TIMEOUT_A_MAX; tpm_tis_init() 670 chip->vendor.timeout_b = TIS_TIMEOUT_B_MAX; tpm_tis_init() 671 chip->vendor.timeout_c = TIS_TIMEOUT_C_MAX; tpm_tis_init() 672 chip->vendor.timeout_d = TIS_TIMEOUT_D_MAX; tpm_tis_init() 674 if (wait_startup(chip, 0) != 0) { tpm_tis_init() 679 if (request_locality(chip, 0) != 0) { tpm_tis_init() 684 rc = tpm2_probe(chip); tpm_tis_init() 688 vendor = ioread32(chip->vendor.iobase + TPM_DID_VID(0)); tpm_tis_init() 689 chip->vendor.manufacturer_id = vendor; tpm_tis_init() 692 (chip->flags & TPM_CHIP_FLAG_TPM2) ? "2.0" : "1.2", tpm_tis_init() 693 vendor >> 16, ioread8(chip->vendor.iobase + TPM_RID(0))); tpm_tis_init() 696 probe = probe_itpm(chip); tpm_tis_init() 710 ioread32(chip->vendor.iobase + tpm_tis_init() 711 TPM_INTF_CAPS(chip->vendor.locality)); tpm_tis_init() 734 init_waitqueue_head(&chip->vendor.read_queue); tpm_tis_init() 735 init_waitqueue_head(&chip->vendor.int_queue); tpm_tis_init() 738 ioread32(chip->vendor.iobase + tpm_tis_init() 739 TPM_INT_ENABLE(chip->vendor.locality)); tpm_tis_init() 746 chip->vendor.iobase + tpm_tis_init() 747 TPM_INT_ENABLE(chip->vendor.locality)); tpm_tis_init() 749 chip->vendor.irq = tpm_info->irq; tpm_tis_init() 750 if (interrupts && !chip->vendor.irq) { tpm_tis_init() 752 ioread8(chip->vendor.iobase + tpm_tis_init() 753 TPM_INT_VECTOR(chip->vendor.locality)); tpm_tis_init() 761 for (i = irq_s; i <= irq_e && chip->vendor.irq == 0; i++) { tpm_tis_init() 762 iowrite8(i, chip->vendor.iobase + tpm_tis_init() 763 TPM_INT_VECTOR(chip->vendor.locality)); tpm_tis_init() 766 chip->devname, chip) != 0) { tpm_tis_init() 767 dev_info(chip->pdev, tpm_tis_init() 775 (chip->vendor.iobase + tpm_tis_init() 776 TPM_INT_STATUS(chip->vendor.locality)), tpm_tis_init() 777 chip->vendor.iobase + tpm_tis_init() 778 TPM_INT_STATUS(chip->vendor.locality)); tpm_tis_init() 782 chip->vendor.iobase + tpm_tis_init() 783 TPM_INT_ENABLE(chip->vendor.locality)); tpm_tis_init() 785 chip->vendor.probed_irq = 0; tpm_tis_init() 788 if (chip->flags & TPM_CHIP_FLAG_TPM2) tpm_tis_init() 789 tpm2_gen_interrupt(chip); tpm_tis_init() 791 tpm_gen_interrupt(chip); tpm_tis_init() 793 chip->vendor.irq = chip->vendor.probed_irq; tpm_tis_init() 799 (chip->vendor.iobase + tpm_tis_init() 800 TPM_INT_STATUS(chip->vendor.locality)), tpm_tis_init() 801 chip->vendor.iobase + tpm_tis_init() 802 TPM_INT_STATUS(chip->vendor.locality)); tpm_tis_init() 806 chip->vendor.iobase + tpm_tis_init() 807 TPM_INT_ENABLE(chip->vendor.locality)); tpm_tis_init() 810 if (chip->vendor.irq) { tpm_tis_init() 811 iowrite8(chip->vendor.irq, tpm_tis_init() 812 chip->vendor.iobase + tpm_tis_init() 813 TPM_INT_VECTOR(chip->vendor.locality)); tpm_tis_init() 815 (dev, chip->vendor.irq, tis_int_handler, IRQF_SHARED, tpm_tis_init() 816 chip->devname, chip) != 0) { tpm_tis_init() 817 dev_info(chip->pdev, tpm_tis_init() 819 chip->vendor.irq); tpm_tis_init() 820 chip->vendor.irq = 0; tpm_tis_init() 824 (chip->vendor.iobase + tpm_tis_init() 825 TPM_INT_STATUS(chip->vendor.locality)), tpm_tis_init() 826 chip->vendor.iobase + tpm_tis_init() 827 TPM_INT_STATUS(chip->vendor.locality)); tpm_tis_init() 831 chip->vendor.iobase + tpm_tis_init() 832 TPM_INT_ENABLE(chip->vendor.locality)); tpm_tis_init() 836 if (chip->flags & TPM_CHIP_FLAG_TPM2) { tpm_tis_init() 837 chip->vendor.timeout_a = msecs_to_jiffies(TPM2_TIMEOUT_A); tpm_tis_init() 838 chip->vendor.timeout_b = msecs_to_jiffies(TPM2_TIMEOUT_B); tpm_tis_init() 839 chip->vendor.timeout_c = msecs_to_jiffies(TPM2_TIMEOUT_C); tpm_tis_init() 840 chip->vendor.timeout_d = msecs_to_jiffies(TPM2_TIMEOUT_D); tpm_tis_init() 841 chip->vendor.duration[TPM_SHORT] = tpm_tis_init() 843 chip->vendor.duration[TPM_MEDIUM] = tpm_tis_init() 845 chip->vendor.duration[TPM_LONG] = tpm_tis_init() 848 rc = tpm2_do_selftest(chip); tpm_tis_init() 851 rc = tpm2_startup(chip, TPM2_SU_CLEAR); tpm_tis_init() 853 rc = tpm2_do_selftest(chip); tpm_tis_init() 863 if (tpm_get_timeouts(chip)) { tpm_tis_init() 869 if (tpm_do_selftest(chip)) { tpm_tis_init() 876 return tpm_chip_register(chip); tpm_tis_init() 878 tpm_tis_remove(chip); tpm_tis_init() 883 static void tpm_tis_reenable_interrupts(struct tpm_chip *chip) tpm_tis_reenable_interrupts() argument 889 iowrite8(chip->vendor.irq, chip->vendor.iobase + tpm_tis_reenable_interrupts() 890 TPM_INT_VECTOR(chip->vendor.locality)); tpm_tis_reenable_interrupts() 893 ioread32(chip->vendor.iobase + tpm_tis_reenable_interrupts() 894 TPM_INT_ENABLE(chip->vendor.locality)); tpm_tis_reenable_interrupts() 901 chip->vendor.iobase + TPM_INT_ENABLE(chip->vendor.locality)); tpm_tis_reenable_interrupts() 906 struct tpm_chip *chip = dev_get_drvdata(dev); tpm_tis_resume() local 909 if (chip->vendor.irq) tpm_tis_resume() 910 tpm_tis_reenable_interrupts(chip); tpm_tis_resume() 919 if (!(chip->flags & TPM_CHIP_FLAG_TPM2)) tpm_tis_resume() 920 tpm_do_selftest(chip); tpm_tis_resume() 971 struct tpm_chip *chip = pnp_get_drvdata(dev); tpm_tis_pnp_remove() local 973 tpm_chip_unregister(chip); tpm_tis_pnp_remove() 974 tpm_tis_remove(chip); tpm_tis_pnp_remove() 1037 struct tpm_chip *chip = dev_get_drvdata(&dev->dev); tpm_tis_acpi_remove() local 1039 tpm_chip_unregister(chip); tpm_tis_acpi_remove() 1040 tpm_tis_remove(chip); tpm_tis_acpi_remove() 1123 struct tpm_chip *chip; cleanup_tis() local 1135 chip = dev_get_drvdata(&pdev->dev); cleanup_tis() 1136 tpm_chip_unregister(chip); cleanup_tis() 1137 tpm_tis_remove(chip); cleanup_tis()
H A D	tpm_atmel.c	38 static int tpm_atml_recv(struct tpm_chip *chip, u8 *buf, size_t count) tpm_atml_recv() argument 50 status = ioread8(chip->vendor.iobase + 1); tpm_atml_recv() 52 dev_err(chip->pdev, "error reading header\n"); tpm_atml_recv() 55 *buf++ = ioread8(chip->vendor.iobase); tpm_atml_recv() 63 dev_err(chip->pdev, tpm_atml_recv() 66 status = ioread8(chip->vendor.iobase + 1); tpm_atml_recv() 68 dev_err(chip->pdev, "error reading data\n"); tpm_atml_recv() 77 status = ioread8(chip->vendor.iobase + 1); tpm_atml_recv() 79 dev_err(chip->pdev, "error reading data\n"); tpm_atml_recv() 82 *buf++ = ioread8(chip->vendor.iobase); tpm_atml_recv() 86 status = ioread8(chip->vendor.iobase + 1); tpm_atml_recv() 89 dev_err(chip->pdev, "data available is stuck\n"); tpm_atml_recv() 96 static int tpm_atml_send(struct tpm_chip *chip, u8 *buf, size_t count) tpm_atml_send() argument 100 dev_dbg(chip->pdev, "tpm_atml_send:\n"); tpm_atml_send() 102 dev_dbg(chip->pdev, "%d 0x%x(%d)\n", i, buf[i], buf[i]); tpm_atml_send() 103 iowrite8(buf[i], chip->vendor.iobase); tpm_atml_send() 109 static void tpm_atml_cancel(struct tpm_chip *chip) tpm_atml_cancel() argument 111 iowrite8(ATML_STATUS_ABORT, chip->vendor.iobase + 1); tpm_atml_cancel() 114 static u8 tpm_atml_status(struct tpm_chip *chip) tpm_atml_status() argument 116 return ioread8(chip->vendor.iobase + 1); tpm_atml_status() 119 static bool tpm_atml_req_canceled(struct tpm_chip *chip, u8 status) tpm_atml_req_canceled() argument 138 struct tpm_chip *chip = dev_get_drvdata(&pdev->dev); atml_plat_remove() local 140 if (chip) { atml_plat_remove() 141 tpm_chip_unregister(chip); atml_plat_remove() 142 if (chip->vendor.have_region) atml_plat_remove() 143 atmel_release_region(chip->vendor.base, atml_plat_remove() 144 chip->vendor.region_size); atml_plat_remove() 145 atmel_put_base_addr(chip->vendor.iobase); atml_plat_remove() 165 struct tpm_chip *chip; init_atmel() local 186 chip = tpmm_chip_alloc(&pdev->dev, &tpm_atmel); init_atmel() 187 if (IS_ERR(chip)) { init_atmel() 188 rc = PTR_ERR(chip); init_atmel() 192 chip->vendor.iobase = iobase; init_atmel() 193 chip->vendor.base = base; init_atmel() 194 chip->vendor.have_region = have_region; init_atmel() 195 chip->vendor.region_size = region_size; init_atmel() 197 rc = tpm_chip_register(chip); init_atmel()
H A D	tpm_nsc.c	70 static int wait_for_stat(struct tpm_chip *chip, u8 mask, u8 val, u8 * data) wait_for_stat() argument 75 *data = inb(chip->vendor.base + NSC_STATUS); wait_for_stat() 83 *data = inb(chip->vendor.base + 1); wait_for_stat() 92 static int nsc_wait_for_ready(struct tpm_chip *chip) nsc_wait_for_ready() argument 98 status = inb(chip->vendor.base + NSC_STATUS); nsc_wait_for_ready() 100 status = inb(chip->vendor.base + NSC_DATA); nsc_wait_for_ready() 108 status = inb(chip->vendor.base + NSC_STATUS); nsc_wait_for_ready() 110 status = inb(chip->vendor.base + NSC_DATA); nsc_wait_for_ready() 116 dev_info(chip->pdev, "wait for ready failed\n"); nsc_wait_for_ready() 121 static int tpm_nsc_recv(struct tpm_chip *chip, u8 * buf, size_t count) tpm_nsc_recv() argument 131 if (wait_for_stat(chip, NSC_STATUS_F0, NSC_STATUS_F0, &data) < 0) { tpm_nsc_recv() 132 dev_err(chip->pdev, "F0 timeout\n"); tpm_nsc_recv() 136 inb(chip->vendor.base + NSC_DATA)) != NSC_COMMAND_NORMAL) { tpm_nsc_recv() 137 dev_err(chip->pdev, "not in normal mode (0x%x)\n", tpm_nsc_recv() 145 (chip, NSC_STATUS_OBF, NSC_STATUS_OBF, &data) < 0) { tpm_nsc_recv() 146 dev_err(chip->pdev, tpm_nsc_recv() 152 *p = inb(chip->vendor.base + NSC_DATA); tpm_nsc_recv() 156 (wait_for_stat(chip, NSC_STATUS_F0, NSC_STATUS_F0, &data) < 0)) { tpm_nsc_recv() 157 dev_err(chip->pdev, "F0 not set\n"); tpm_nsc_recv() 160 if ((data = inb(chip->vendor.base + NSC_DATA)) != NSC_COMMAND_EOC) { tpm_nsc_recv() 161 dev_err(chip->pdev, tpm_nsc_recv() 175 static int tpm_nsc_send(struct tpm_chip *chip, u8 * buf, size_t count) tpm_nsc_send() argument 181 * If we hit the chip with back to back commands it locks up tpm_nsc_send() 186 outb(NSC_COMMAND_CANCEL, chip->vendor.base + NSC_COMMAND); tpm_nsc_send() 188 if (nsc_wait_for_ready(chip) != 0) tpm_nsc_send() 191 if (wait_for_stat(chip, NSC_STATUS_IBF, 0, &data) < 0) { tpm_nsc_send() 192 dev_err(chip->pdev, "IBF timeout\n"); tpm_nsc_send() 196 outb(NSC_COMMAND_NORMAL, chip->vendor.base + NSC_COMMAND); tpm_nsc_send() 197 if (wait_for_stat(chip, NSC_STATUS_IBR, NSC_STATUS_IBR, &data) < 0) { tpm_nsc_send() 198 dev_err(chip->pdev, "IBR timeout\n"); tpm_nsc_send() 203 if (wait_for_stat(chip, NSC_STATUS_IBF, 0, &data) < 0) { tpm_nsc_send() 204 dev_err(chip->pdev, tpm_nsc_send() 208 outb(buf[i], chip->vendor.base + NSC_DATA); tpm_nsc_send() 211 if (wait_for_stat(chip, NSC_STATUS_IBF, 0, &data) < 0) { tpm_nsc_send() 212 dev_err(chip->pdev, "IBF timeout\n"); tpm_nsc_send() 215 outb(NSC_COMMAND_EOC, chip->vendor.base + NSC_COMMAND); tpm_nsc_send() 220 static void tpm_nsc_cancel(struct tpm_chip *chip) tpm_nsc_cancel() argument 222 outb(NSC_COMMAND_CANCEL, chip->vendor.base + NSC_COMMAND); tpm_nsc_cancel() 225 static u8 tpm_nsc_status(struct tpm_chip *chip) tpm_nsc_status() argument 227 return inb(chip->vendor.base + NSC_STATUS); tpm_nsc_status() 230 static bool tpm_nsc_req_canceled(struct tpm_chip *chip, u8 status) tpm_nsc_req_canceled() argument 249 struct tpm_chip *chip = dev_get_drvdata(dev); tpm_nsc_remove() local 251 tpm_chip_unregister(chip); tpm_nsc_remove() 252 release_region(chip->vendor.base, 2); tpm_nsc_remove() 269 struct tpm_chip *chip; init_nsc() local 309 chip = tpmm_chip_alloc(&pdev->dev, &tpm_nsc); init_nsc() 310 if (IS_ERR(chip)) { init_nsc() 315 rc = tpm_chip_register(chip); init_nsc() 352 chip->vendor.base = base; init_nsc()
H A D	xen-tpmfront.c	23 struct tpm_chip *chip; member in struct:tpm_private 40 static u8 vtpm_status(struct tpm_chip *chip) vtpm_status() argument 42 struct tpm_private *priv = TPM_VPRIV(chip); vtpm_status() 56 static bool vtpm_req_canceled(struct tpm_chip *chip, u8 status) vtpm_req_canceled() argument 61 static void vtpm_cancel(struct tpm_chip *chip) vtpm_cancel() argument 63 struct tpm_private *priv = TPM_VPRIV(chip); vtpm_cancel() 74 static int vtpm_send(struct tpm_chip *chip, u8 *buf, size_t count) vtpm_send() argument 76 struct tpm_private *priv = TPM_VPRIV(chip); vtpm_send() 90 if (wait_for_tpm_stat(chip, VTPM_STATUS_IDLE, chip->vendor.timeout_c, vtpm_send() 91 &chip->vendor.read_queue, true) < 0) { vtpm_send() 92 vtpm_cancel(chip); vtpm_send() 104 duration = tpm_calc_ordinal_duration(chip, ordinal); vtpm_send() 106 if (wait_for_tpm_stat(chip, VTPM_STATUS_IDLE, duration, vtpm_send() 107 &chip->vendor.read_queue, true) < 0) { vtpm_send() 109 vtpm_cancel(chip); vtpm_send() 116 static int vtpm_recv(struct tpm_chip *chip, u8 *buf, size_t count) vtpm_recv() argument 118 struct tpm_private *priv = TPM_VPRIV(chip); vtpm_recv() 127 if (wait_for_tpm_stat(chip, VTPM_STATUS_RESULT, chip->vendor.timeout_c, vtpm_recv() 128 &chip->vendor.read_queue, true) < 0) { vtpm_recv() 129 vtpm_cancel(chip); vtpm_recv() 164 wake_up_interruptible(&priv->chip->vendor.read_queue); tpmif_interrupt() 176 struct tpm_chip *chip; setup_chip() local 178 chip = tpmm_chip_alloc(dev, &tpm_vtpm); setup_chip() 179 if (IS_ERR(chip)) setup_chip() 180 return PTR_ERR(chip); setup_chip() 182 init_waitqueue_head(&chip->vendor.read_queue); setup_chip() 184 priv->chip = chip; setup_chip() 185 TPM_VPRIV(chip) = priv; setup_chip() 220 priv->chip->vendor.irq = rv; setup_ring() 280 if (priv->chip && priv->chip->vendor.irq) ring_free() 281 unbind_from_irqhandler(priv->chip->vendor.irq, priv); ring_free() 290 struct tpm_chip *chip; tpmfront_probe() local 307 chip = dev_get_drvdata(&dev->dev); tpmfront_probe() 308 tpm_chip_unregister(chip); tpmfront_probe() 313 tpm_get_timeouts(priv->chip); tpmfront_probe() 315 return tpm_chip_register(priv->chip); tpmfront_probe() 320 struct tpm_chip *chip = dev_get_drvdata(&dev->dev); tpmfront_remove() local 321 struct tpm_private *priv = TPM_VPRIV(chip); tpmfront_remove() 322 tpm_chip_unregister(chip); tpmfront_remove() 324 TPM_VPRIV(chip) = NULL; tpmfront_remove()
/linux-4.1.27/sound/pci/ymfpci/
H A D	ymfpci_main.c	46 static void snd_ymfpci_irq_wait(struct snd_ymfpci *chip); 48 static inline u8 snd_ymfpci_readb(struct snd_ymfpci *chip, u32 offset) snd_ymfpci_readb() argument 50 return readb(chip->reg_area_virt + offset); snd_ymfpci_readb() 53 static inline void snd_ymfpci_writeb(struct snd_ymfpci *chip, u32 offset, u8 val) snd_ymfpci_writeb() argument 55 writeb(val, chip->reg_area_virt + offset); snd_ymfpci_writeb() 58 static inline u16 snd_ymfpci_readw(struct snd_ymfpci *chip, u32 offset) snd_ymfpci_readw() argument 60 return readw(chip->reg_area_virt + offset); snd_ymfpci_readw() 63 static inline void snd_ymfpci_writew(struct snd_ymfpci *chip, u32 offset, u16 val) snd_ymfpci_writew() argument 65 writew(val, chip->reg_area_virt + offset); snd_ymfpci_writew() 68 static inline u32 snd_ymfpci_readl(struct snd_ymfpci *chip, u32 offset) snd_ymfpci_readl() argument 70 return readl(chip->reg_area_virt + offset); snd_ymfpci_readl() 73 static inline void snd_ymfpci_writel(struct snd_ymfpci *chip, u32 offset, u32 val) snd_ymfpci_writel() argument 75 writel(val, chip->reg_area_virt + offset); snd_ymfpci_writel() 78 static int snd_ymfpci_codec_ready(struct snd_ymfpci *chip, int secondary) snd_ymfpci_codec_ready() argument 85 if ((snd_ymfpci_readw(chip, reg) & 0x8000) == 0) snd_ymfpci_codec_ready() 89 dev_err(chip->card->dev, snd_ymfpci_codec_ready() 91 secondary, snd_ymfpci_readw(chip, reg)); snd_ymfpci_codec_ready() 97 struct snd_ymfpci *chip = ac97->private_data; snd_ymfpci_codec_write() local 100 snd_ymfpci_codec_ready(chip, 0); snd_ymfpci_codec_write() 102 snd_ymfpci_writel(chip, YDSXGR_AC97CMDDATA, cmd); snd_ymfpci_codec_write() 107 struct snd_ymfpci *chip = ac97->private_data; snd_ymfpci_codec_read() local 109 if (snd_ymfpci_codec_ready(chip, 0)) snd_ymfpci_codec_read() 111 snd_ymfpci_writew(chip, YDSXGR_AC97CMDADR, YDSXG_AC97READCMD | reg); snd_ymfpci_codec_read() 112 if (snd_ymfpci_codec_ready(chip, 0)) snd_ymfpci_codec_read() 114 if (chip->device_id == PCI_DEVICE_ID_YAMAHA_744 && chip->rev < 2) { snd_ymfpci_codec_read() 117 snd_ymfpci_readw(chip, YDSXGR_PRISTATUSDATA); snd_ymfpci_codec_read() 119 return snd_ymfpci_readw(chip, YDSXGR_PRISTATUSDATA); snd_ymfpci_codec_read() 179 static void snd_ymfpci_hw_start(struct snd_ymfpci *chip) snd_ymfpci_hw_start() argument 183 spin_lock_irqsave(&chip->reg_lock, flags); snd_ymfpci_hw_start() 184 if (chip->start_count++ > 0) snd_ymfpci_hw_start() 186 snd_ymfpci_writel(chip, YDSXGR_MODE, snd_ymfpci_hw_start() 187 snd_ymfpci_readl(chip, YDSXGR_MODE) | 3); snd_ymfpci_hw_start() 188 chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT) & 1; snd_ymfpci_hw_start() 190 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_ymfpci_hw_start() 193 static void snd_ymfpci_hw_stop(struct snd_ymfpci *chip) snd_ymfpci_hw_stop() argument 198 spin_lock_irqsave(&chip->reg_lock, flags); snd_ymfpci_hw_stop() 199 if (--chip->start_count > 0) snd_ymfpci_hw_stop() 201 snd_ymfpci_writel(chip, YDSXGR_MODE, snd_ymfpci_hw_stop() 202 snd_ymfpci_readl(chip, YDSXGR_MODE) & ~3); snd_ymfpci_hw_stop() 204 if ((snd_ymfpci_readl(chip, YDSXGR_STATUS) & 2) == 0) snd_ymfpci_hw_stop() 207 if (atomic_read(&chip->interrupt_sleep_count)) { snd_ymfpci_hw_stop() 208 atomic_set(&chip->interrupt_sleep_count, 0); snd_ymfpci_hw_stop() 209 wake_up(&chip->interrupt_sleep); snd_ymfpci_hw_stop() 212 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_ymfpci_hw_stop() 219 static int voice_alloc(struct snd_ymfpci *chip, voice_alloc() argument 228 voice = &chip->voices[idx]; voice_alloc() 229 voice2 = pair ? &chip->voices[idx+1] : NULL; voice_alloc() 248 snd_ymfpci_hw_start(chip); voice_alloc() 250 snd_ymfpci_hw_start(chip); voice_alloc() 257 static int snd_ymfpci_voice_alloc(struct snd_ymfpci *chip, snd_ymfpci_voice_alloc() argument 269 spin_lock_irqsave(&chip->voice_lock, flags); snd_ymfpci_voice_alloc() 271 result = voice_alloc(chip, type, pair, rvoice); snd_ymfpci_voice_alloc() 277 spin_unlock_irqrestore(&chip->voice_lock, flags); snd_ymfpci_voice_alloc() 281 static int snd_ymfpci_voice_free(struct snd_ymfpci *chip, struct snd_ymfpci_voice *pvoice) snd_ymfpci_voice_free() argument 287 snd_ymfpci_hw_stop(chip); snd_ymfpci_voice_free() 288 spin_lock_irqsave(&chip->voice_lock, flags); snd_ymfpci_voice_free() 289 if (pvoice->number == chip->src441_used) { snd_ymfpci_voice_free() 290 chip->src441_used = -1; snd_ymfpci_voice_free() 296 spin_unlock_irqrestore(&chip->voice_lock, flags); snd_ymfpci_voice_free() 304 static void snd_ymfpci_pcm_interrupt(struct snd_ymfpci *chip, struct snd_ymfpci_voice *voice) snd_ymfpci_pcm_interrupt() argument 313 spin_lock(&chip->reg_lock); snd_ymfpci_pcm_interrupt() 315 pos = le32_to_cpu(voice->bank[chip->active_bank].start); snd_ymfpci_pcm_interrupt() 324 dev_dbg(chip->card->dev, snd_ymfpci_pcm_interrupt() 326 chip->active_bank, snd_ymfpci_pcm_interrupt() 327 voice->bank[chip->active_bank].start); snd_ymfpci_pcm_interrupt() 330 spin_unlock(&chip->reg_lock); snd_ymfpci_pcm_interrupt() 332 spin_lock(&chip->reg_lock); snd_ymfpci_pcm_interrupt() 337 unsigned int next_bank = 1 - chip->active_bank; snd_ymfpci_pcm_interrupt() 342 volume = cpu_to_le32(chip->pcm_mixer[subs].left << 15); snd_ymfpci_pcm_interrupt() 348 volume = cpu_to_le32(chip->pcm_mixer[subs].right << 15); snd_ymfpci_pcm_interrupt() 355 spin_unlock(&chip->reg_lock); snd_ymfpci_pcm_interrupt() 362 struct snd_ymfpci *chip = ypcm->chip; snd_ymfpci_pcm_capture_interrupt() local 365 spin_lock(&chip->reg_lock); snd_ymfpci_pcm_capture_interrupt() 367 pos = le32_to_cpu(chip->bank_capture[ypcm->capture_bank_number][chip->active_bank]->start) >> ypcm->shift; snd_ymfpci_pcm_capture_interrupt() 377 dev_dbg(chip->card->dev, snd_ymfpci_pcm_capture_interrupt() 379 chip->active_bank, snd_ymfpci_pcm_capture_interrupt() 380 voice->bank[chip->active_bank].start); snd_ymfpci_pcm_capture_interrupt() 382 spin_unlock(&chip->reg_lock); snd_ymfpci_pcm_capture_interrupt() 384 spin_lock(&chip->reg_lock); snd_ymfpci_pcm_capture_interrupt() 387 spin_unlock(&chip->reg_lock); snd_ymfpci_pcm_capture_interrupt() 393 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); snd_ymfpci_playback_trigger() local 398 spin_lock(&chip->reg_lock); snd_ymfpci_playback_trigger() 407 chip->ctrl_playback[ypcm->voices[0]->number + 1] = cpu_to_le32(ypcm->voices[0]->bank_addr); snd_ymfpci_playback_trigger() 409 chip->ctrl_playback[ypcm->voices[1]->number + 1] = cpu_to_le32(ypcm->voices[1]->bank_addr); snd_ymfpci_playback_trigger() 413 if (substream->pcm == chip->pcm && !ypcm->use_441_slot) { snd_ymfpci_playback_trigger() 414 kctl = chip->pcm_mixer[substream->number].ctl; snd_ymfpci_playback_trigger() 420 chip->ctrl_playback[ypcm->voices[0]->number + 1] = 0; snd_ymfpci_playback_trigger() 422 chip->ctrl_playback[ypcm->voices[1]->number + 1] = 0; snd_ymfpci_playback_trigger() 430 spin_unlock(&chip->reg_lock); snd_ymfpci_playback_trigger() 432 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO, &kctl->id); snd_ymfpci_playback_trigger() 438 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); snd_ymfpci_capture_trigger() local 443 spin_lock(&chip->reg_lock); snd_ymfpci_capture_trigger() 448 tmp = snd_ymfpci_readl(chip, YDSXGR_MAPOFREC) | (1 << ypcm->capture_bank_number); snd_ymfpci_capture_trigger() 449 snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, tmp); snd_ymfpci_capture_trigger() 455 tmp = snd_ymfpci_readl(chip, YDSXGR_MAPOFREC) & ~(1 << ypcm->capture_bank_number); snd_ymfpci_capture_trigger() 456 snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, tmp); snd_ymfpci_capture_trigger() 463 spin_unlock(&chip->reg_lock); snd_ymfpci_capture_trigger() 472 snd_ymfpci_voice_free(ypcm->chip, ypcm->voices[1]); snd_ymfpci_pcm_voice_alloc() 481 snd_ymfpci_voice_free(ypcm->chip, ypcm->voices[0]); snd_ymfpci_pcm_voice_alloc() 485 err = snd_ymfpci_voice_alloc(ypcm->chip, YMFPCI_PCM, voices > 1, &ypcm->voices[0]); snd_ymfpci_pcm_voice_alloc() 491 ypcm->voices[1] = &ypcm->chip->voices[ypcm->voices[0]->number + 1]; snd_ymfpci_pcm_voice_alloc() 522 vol_left = cpu_to_le32(ypcm->chip->pcm_mixer snd_ymfpci_pcm_init_voice() 524 vol_right = cpu_to_le32(ypcm->chip->pcm_mixer snd_ymfpci_pcm_init_voice() 530 spin_lock_irqsave(&ypcm->chip->voice_lock, flags); snd_ymfpci_pcm_init_voice() 534 else if (ypcm->chip->device_id == PCI_DEVICE_ID_YAMAHA_754 && snd_ymfpci_pcm_init_voice() 536 voiceidx == 0 && (ypcm->chip->src441_used == -1 || snd_ymfpci_pcm_init_voice() 537 ypcm->chip->src441_used == voice->number)) { snd_ymfpci_pcm_init_voice() 538 ypcm->chip->src441_used = voice->number; snd_ymfpci_pcm_init_voice() 542 if (ypcm->chip->src441_used == voice->number && snd_ymfpci_pcm_init_voice() 544 ypcm->chip->src441_used = -1; snd_ymfpci_pcm_init_voice() 549 spin_unlock_irqrestore(&ypcm->chip->voice_lock, flags); snd_ymfpci_pcm_init_voice() 602 static int snd_ymfpci_ac3_init(struct snd_ymfpci *chip) snd_ymfpci_ac3_init() argument 604 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci), snd_ymfpci_ac3_init() 605 4096, &chip->ac3_tmp_base) < 0) snd_ymfpci_ac3_init() 608 chip->bank_effect[3][0]->base = snd_ymfpci_ac3_init() 609 chip->bank_effect[3][1]->base = cpu_to_le32(chip->ac3_tmp_base.addr); snd_ymfpci_ac3_init() 610 chip->bank_effect[3][0]->loop_end = snd_ymfpci_ac3_init() 611 chip->bank_effect[3][1]->loop_end = cpu_to_le32(1024); snd_ymfpci_ac3_init() 612 chip->bank_effect[4][0]->base = snd_ymfpci_ac3_init() 613 chip->bank_effect[4][1]->base = cpu_to_le32(chip->ac3_tmp_base.addr + 2048); snd_ymfpci_ac3_init() 614 chip->bank_effect[4][0]->loop_end = snd_ymfpci_ac3_init() 615 chip->bank_effect[4][1]->loop_end = cpu_to_le32(1024); snd_ymfpci_ac3_init() 617 spin_lock_irq(&chip->reg_lock); snd_ymfpci_ac3_init() 618 snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT, snd_ymfpci_ac3_init() 619 snd_ymfpci_readl(chip, YDSXGR_MAPOFEFFECT) | 3 << 3); snd_ymfpci_ac3_init() 620 spin_unlock_irq(&chip->reg_lock); snd_ymfpci_ac3_init() 624 static int snd_ymfpci_ac3_done(struct snd_ymfpci *chip) snd_ymfpci_ac3_done() argument 626 spin_lock_irq(&chip->reg_lock); snd_ymfpci_ac3_done() 627 snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT, snd_ymfpci_ac3_done() 628 snd_ymfpci_readl(chip, YDSXGR_MAPOFEFFECT) & ~(3 << 3)); snd_ymfpci_ac3_done() 629 spin_unlock_irq(&chip->reg_lock); snd_ymfpci_ac3_done() 630 // snd_ymfpci_irq_wait(chip); snd_ymfpci_ac3_done() 631 if (chip->ac3_tmp_base.area) { snd_ymfpci_ac3_done() 632 snd_dma_free_pages(&chip->ac3_tmp_base); snd_ymfpci_ac3_done() 633 chip->ac3_tmp_base.area = NULL; snd_ymfpci_ac3_done() 654 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); snd_ymfpci_playback_hw_free() local 663 snd_ymfpci_irq_wait(chip); snd_ymfpci_playback_hw_free() 666 snd_ymfpci_voice_free(chip, ypcm->voices[1]); snd_ymfpci_playback_hw_free() 670 snd_ymfpci_voice_free(chip, ypcm->voices[0]); snd_ymfpci_playback_hw_free() 678 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); snd_ymfpci_playback_prepare() local 690 substream->pcm == chip->pcm); snd_ymfpci_playback_prepare() 692 if (substream->pcm == chip->pcm && !ypcm->use_441_slot) { snd_ymfpci_playback_prepare() 693 kctl = chip->pcm_mixer[substream->number].ctl; snd_ymfpci_playback_prepare() 695 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO, &kctl->id); snd_ymfpci_playback_prepare() 708 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); snd_ymfpci_capture_hw_free() local 711 snd_ymfpci_irq_wait(chip); snd_ymfpci_capture_hw_free() 717 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); snd_ymfpci_capture_prepare() local 741 snd_ymfpci_writel(chip, YDSXGR_RECFORMAT, format); snd_ymfpci_capture_prepare() 742 snd_ymfpci_writel(chip, YDSXGR_RECSLOTSR, rate); snd_ymfpci_capture_prepare() 745 snd_ymfpci_writel(chip, YDSXGR_ADCFORMAT, format); snd_ymfpci_capture_prepare() 746 snd_ymfpci_writel(chip, YDSXGR_ADCSLOTSR, rate); snd_ymfpci_capture_prepare() 750 bank = chip->bank_capture[ypcm->capture_bank_number][nbank]; snd_ymfpci_capture_prepare() 761 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); snd_ymfpci_playback_pointer() local 768 return le32_to_cpu(voice->bank[chip->active_bank].start); snd_ymfpci_playback_pointer() 773 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); snd_ymfpci_capture_pointer() local 779 return le32_to_cpu(chip->bank_capture[ypcm->capture_bank_number][chip->active_bank]->start) >> ypcm->shift; snd_ymfpci_capture_pointer() 782 static void snd_ymfpci_irq_wait(struct snd_ymfpci *chip) snd_ymfpci_irq_wait() argument 788 if ((snd_ymfpci_readl(chip, YDSXGR_MODE) & 3) == 0) snd_ymfpci_irq_wait() 791 add_wait_queue(&chip->interrupt_sleep, &wait); snd_ymfpci_irq_wait() 792 atomic_inc(&chip->interrupt_sleep_count); snd_ymfpci_irq_wait() 794 remove_wait_queue(&chip->interrupt_sleep, &wait); snd_ymfpci_irq_wait() 800 struct snd_ymfpci *chip = dev_id; snd_ymfpci_interrupt() local 804 status = snd_ymfpci_readl(chip, YDSXGR_STATUS); snd_ymfpci_interrupt() 806 chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT) & 1; snd_ymfpci_interrupt() 807 spin_lock(&chip->voice_lock); snd_ymfpci_interrupt() 809 voice = &chip->voices[nvoice]; snd_ymfpci_interrupt() 811 voice->interrupt(chip, voice); snd_ymfpci_interrupt() 814 if (chip->capture_substream[nvoice]) snd_ymfpci_interrupt() 815 snd_ymfpci_pcm_capture_interrupt(chip->capture_substream[nvoice]); snd_ymfpci_interrupt() 819 if (chip->effect_substream[nvoice]) snd_ymfpci_interrupt() 820 snd_ymfpci_pcm_effect_interrupt(chip->effect_substream[nvoice]); snd_ymfpci_interrupt() 823 spin_unlock(&chip->voice_lock); snd_ymfpci_interrupt() 824 spin_lock(&chip->reg_lock); snd_ymfpci_interrupt() 825 snd_ymfpci_writel(chip, YDSXGR_STATUS, 0x80000000); snd_ymfpci_interrupt() 826 mode = snd_ymfpci_readl(chip, YDSXGR_MODE) | 2; snd_ymfpci_interrupt() 827 snd_ymfpci_writel(chip, YDSXGR_MODE, mode); snd_ymfpci_interrupt() 828 spin_unlock(&chip->reg_lock); snd_ymfpci_interrupt() 830 if (atomic_read(&chip->interrupt_sleep_count)) { snd_ymfpci_interrupt() 831 atomic_set(&chip->interrupt_sleep_count, 0); snd_ymfpci_interrupt() 832 wake_up(&chip->interrupt_sleep); snd_ymfpci_interrupt() 836 status = snd_ymfpci_readw(chip, YDSXGR_INTFLAG); snd_ymfpci_interrupt() 838 if (chip->timer) snd_ymfpci_interrupt() 839 snd_timer_interrupt(chip->timer, chip->timer_ticks); snd_ymfpci_interrupt() 841 snd_ymfpci_writew(chip, YDSXGR_INTFLAG, status); snd_ymfpci_interrupt() 843 if (chip->rawmidi) snd_ymfpci_interrupt() 844 snd_mpu401_uart_interrupt(irq, chip->rawmidi->private_data); snd_ymfpci_interrupt() 899 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); snd_ymfpci_playback_open_1() local 918 ypcm->chip = chip; snd_ymfpci_playback_open_1() 927 static void ymfpci_open_extension(struct snd_ymfpci *chip) ymfpci_open_extension() argument 929 if (! chip->rear_opened) { ymfpci_open_extension() 930 if (! chip->spdif_opened) /* set AC3 */ ymfpci_open_extension() 931 snd_ymfpci_writel(chip, YDSXGR_MODE, ymfpci_open_extension() 932 snd_ymfpci_readl(chip, YDSXGR_MODE) | (1 << 30)); ymfpci_open_extension() 934 snd_ymfpci_writew(chip, YDSXGR_SECCONFIG, ymfpci_open_extension() 935 (snd_ymfpci_readw(chip, YDSXGR_SECCONFIG) & ~0x0330) | 0x0010); ymfpci_open_extension() 940 static void ymfpci_close_extension(struct snd_ymfpci *chip) ymfpci_close_extension() argument 942 if (! chip->rear_opened) { ymfpci_close_extension() 943 if (! chip->spdif_opened) ymfpci_close_extension() 944 snd_ymfpci_writel(chip, YDSXGR_MODE, ymfpci_close_extension() 945 snd_ymfpci_readl(chip, YDSXGR_MODE) & ~(1 << 30)); ymfpci_close_extension() 946 snd_ymfpci_writew(chip, YDSXGR_SECCONFIG, ymfpci_close_extension() 947 (snd_ymfpci_readw(chip, YDSXGR_SECCONFIG) & ~0x0330) & ~0x0010); ymfpci_close_extension() 953 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); snd_ymfpci_playback_open() local 962 ypcm->output_rear = chip->mode_dup4ch ? 1 : 0; snd_ymfpci_playback_open() 964 spin_lock_irq(&chip->reg_lock); snd_ymfpci_playback_open() 966 ymfpci_open_extension(chip); snd_ymfpci_playback_open() 967 chip->rear_opened++; snd_ymfpci_playback_open() 969 spin_unlock_irq(&chip->reg_lock); snd_ymfpci_playback_open() 975 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); snd_ymfpci_playback_spdif_open() local 986 spin_lock_irq(&chip->reg_lock); snd_ymfpci_playback_spdif_open() 987 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL, snd_ymfpci_playback_spdif_open() 988 snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) | 2); snd_ymfpci_playback_spdif_open() 989 ymfpci_open_extension(chip); snd_ymfpci_playback_spdif_open() 990 chip->spdif_pcm_bits = chip->spdif_bits; snd_ymfpci_playback_spdif_open() 991 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_pcm_bits); snd_ymfpci_playback_spdif_open() 992 chip->spdif_opened++; snd_ymfpci_playback_spdif_open() 993 spin_unlock_irq(&chip->reg_lock); snd_ymfpci_playback_spdif_open() 995 chip->spdif_pcm_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE; snd_ymfpci_playback_spdif_open() 996 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE | snd_ymfpci_playback_spdif_open() 997 SNDRV_CTL_EVENT_MASK_INFO, &chip->spdif_pcm_ctl->id); snd_ymfpci_playback_spdif_open() 1003 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); snd_ymfpci_playback_4ch_open() local 1014 spin_lock_irq(&chip->reg_lock); snd_ymfpci_playback_4ch_open() 1015 ymfpci_open_extension(chip); snd_ymfpci_playback_4ch_open() 1016 chip->rear_opened++; snd_ymfpci_playback_4ch_open() 1017 spin_unlock_irq(&chip->reg_lock); snd_ymfpci_playback_4ch_open() 1024 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); snd_ymfpci_capture_open() local 1043 ypcm->chip = chip; snd_ymfpci_capture_open() 1047 chip->capture_substream[capture_bank_number] = substream; snd_ymfpci_capture_open() 1050 snd_ymfpci_hw_start(chip); snd_ymfpci_capture_open() 1071 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); snd_ymfpci_playback_close() local 1074 spin_lock_irq(&chip->reg_lock); snd_ymfpci_playback_close() 1075 if (ypcm->output_rear && chip->rear_opened > 0) { snd_ymfpci_playback_close() 1076 chip->rear_opened--; snd_ymfpci_playback_close() 1077 ymfpci_close_extension(chip); snd_ymfpci_playback_close() 1079 spin_unlock_irq(&chip->reg_lock); snd_ymfpci_playback_close() 1085 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); snd_ymfpci_playback_spdif_close() local 1087 spin_lock_irq(&chip->reg_lock); snd_ymfpci_playback_spdif_close() 1088 chip->spdif_opened = 0; snd_ymfpci_playback_spdif_close() 1089 ymfpci_close_extension(chip); snd_ymfpci_playback_spdif_close() 1090 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL, snd_ymfpci_playback_spdif_close() 1091 snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & ~2); snd_ymfpci_playback_spdif_close() 1092 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits); snd_ymfpci_playback_spdif_close() 1093 spin_unlock_irq(&chip->reg_lock); snd_ymfpci_playback_spdif_close() 1094 chip->spdif_pcm_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE; snd_ymfpci_playback_spdif_close() 1095 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE | snd_ymfpci_playback_spdif_close() 1096 SNDRV_CTL_EVENT_MASK_INFO, &chip->spdif_pcm_ctl->id); snd_ymfpci_playback_spdif_close() 1102 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); snd_ymfpci_playback_4ch_close() local 1104 spin_lock_irq(&chip->reg_lock); snd_ymfpci_playback_4ch_close() 1105 if (chip->rear_opened > 0) { snd_ymfpci_playback_4ch_close() 1106 chip->rear_opened--; snd_ymfpci_playback_4ch_close() 1107 ymfpci_close_extension(chip); snd_ymfpci_playback_4ch_close() 1109 spin_unlock_irq(&chip->reg_lock); snd_ymfpci_playback_4ch_close() 1115 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); snd_ymfpci_capture_close() local 1120 chip->capture_substream[ypcm->capture_bank_number] = NULL; snd_ymfpci_capture_close() 1121 snd_ymfpci_hw_stop(chip); snd_ymfpci_capture_close() 1148 int snd_ymfpci_pcm(struct snd_ymfpci *chip, int device) snd_ymfpci_pcm() argument 1153 if ((err = snd_pcm_new(chip->card, "YMFPCI", device, 32, 1, &pcm)) < 0) snd_ymfpci_pcm() 1155 pcm->private_data = chip; snd_ymfpci_pcm() 1163 chip->pcm = pcm; snd_ymfpci_pcm() 1166 snd_dma_pci_data(chip->pci), 64*1024, 256*1024); snd_ymfpci_pcm() 1183 int snd_ymfpci_pcm2(struct snd_ymfpci *chip, int device) snd_ymfpci_pcm2() argument 1188 if ((err = snd_pcm_new(chip->card, "YMFPCI - PCM2", device, 0, 1, &pcm)) < 0) snd_ymfpci_pcm2() 1190 pcm->private_data = chip; snd_ymfpci_pcm2() 1197 chip->device_id == PCI_DEVICE_ID_YAMAHA_754 ? "Direct Recording" : "AC'97"); snd_ymfpci_pcm2() 1198 chip->pcm2 = pcm; snd_ymfpci_pcm2() 1201 snd_dma_pci_data(chip->pci), 64*1024, 256*1024); snd_ymfpci_pcm2() 1217 int snd_ymfpci_pcm_spdif(struct snd_ymfpci *chip, int device) snd_ymfpci_pcm_spdif() argument 1222 if ((err = snd_pcm_new(chip->card, "YMFPCI - IEC958", device, 1, 0, &pcm)) < 0) snd_ymfpci_pcm_spdif() 1224 pcm->private_data = chip; snd_ymfpci_pcm_spdif() 1231 chip->pcm_spdif = pcm; snd_ymfpci_pcm_spdif() 1234 snd_dma_pci_data(chip->pci), 64*1024, 256*1024); snd_ymfpci_pcm_spdif() 1258 int snd_ymfpci_pcm_4ch(struct snd_ymfpci *chip, int device) snd_ymfpci_pcm_4ch() argument 1263 if ((err = snd_pcm_new(chip->card, "YMFPCI - Rear", device, 1, 0, &pcm)) < 0) snd_ymfpci_pcm_4ch() 1265 pcm->private_data = chip; snd_ymfpci_pcm_4ch() 1272 chip->pcm_4ch = pcm; snd_ymfpci_pcm_4ch() 1275 snd_dma_pci_data(chip->pci), 64*1024, 256*1024); snd_ymfpci_pcm_4ch() 1291 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); snd_ymfpci_spdif_default_get() local 1293 spin_lock_irq(&chip->reg_lock); snd_ymfpci_spdif_default_get() 1294 ucontrol->value.iec958.status[0] = (chip->spdif_bits >> 0) & 0xff; snd_ymfpci_spdif_default_get() 1295 ucontrol->value.iec958.status[1] = (chip->spdif_bits >> 8) & 0xff; snd_ymfpci_spdif_default_get() 1297 spin_unlock_irq(&chip->reg_lock); snd_ymfpci_spdif_default_get() 1304 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); snd_ymfpci_spdif_default_put() local 1310 spin_lock_irq(&chip->reg_lock); snd_ymfpci_spdif_default_put() 1311 change = chip->spdif_bits != val; snd_ymfpci_spdif_default_put() 1312 chip->spdif_bits = val; snd_ymfpci_spdif_default_put() 1313 if ((snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & 1) && chip->pcm_spdif == NULL) snd_ymfpci_spdif_default_put() 1314 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits); snd_ymfpci_spdif_default_put() 1315 spin_unlock_irq(&chip->reg_lock); snd_ymfpci_spdif_default_put() 1338 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); snd_ymfpci_spdif_mask_get() local 1340 spin_lock_irq(&chip->reg_lock); snd_ymfpci_spdif_mask_get() 1343 spin_unlock_irq(&chip->reg_lock); snd_ymfpci_spdif_mask_get() 1366 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); snd_ymfpci_spdif_stream_get() local 1368 spin_lock_irq(&chip->reg_lock); snd_ymfpci_spdif_stream_get() 1369 ucontrol->value.iec958.status[0] = (chip->spdif_pcm_bits >> 0) & 0xff; snd_ymfpci_spdif_stream_get() 1370 ucontrol->value.iec958.status[1] = (chip->spdif_pcm_bits >> 8) & 0xff; snd_ymfpci_spdif_stream_get() 1372 spin_unlock_irq(&chip->reg_lock); snd_ymfpci_spdif_stream_get() 1379 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); snd_ymfpci_spdif_stream_put() local 1385 spin_lock_irq(&chip->reg_lock); snd_ymfpci_spdif_stream_put() 1386 change = chip->spdif_pcm_bits != val; snd_ymfpci_spdif_stream_put() 1387 chip->spdif_pcm_bits = val; snd_ymfpci_spdif_stream_put() 1388 if ((snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & 2)) snd_ymfpci_spdif_stream_put() 1389 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_pcm_bits); snd_ymfpci_spdif_stream_put() 1390 spin_unlock_irq(&chip->reg_lock); snd_ymfpci_spdif_stream_put() 1413 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); snd_ymfpci_drec_source_get() local 1416 spin_lock_irq(&chip->reg_lock); snd_ymfpci_drec_source_get() 1417 reg = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL); snd_ymfpci_drec_source_get() 1418 spin_unlock_irq(&chip->reg_lock); snd_ymfpci_drec_source_get() 1428 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); snd_ymfpci_drec_source_put() local 1431 spin_lock_irq(&chip->reg_lock); snd_ymfpci_drec_source_put() 1432 old_reg = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL); snd_ymfpci_drec_source_put() 1437 snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, reg); snd_ymfpci_drec_source_put() 1438 spin_unlock_irq(&chip->reg_lock); snd_ymfpci_drec_source_put() 1466 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); snd_ymfpci_get_single() local 1477 (snd_ymfpci_readl(chip, reg) >> shift) & mask; snd_ymfpci_get_single() 1484 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); snd_ymfpci_put_single() local 1498 spin_lock_irq(&chip->reg_lock); snd_ymfpci_put_single() 1499 oval = snd_ymfpci_readl(chip, reg); snd_ymfpci_put_single() 1502 snd_ymfpci_writel(chip, reg, val); snd_ymfpci_put_single() 1503 spin_unlock_irq(&chip->reg_lock); snd_ymfpci_put_single() 1532 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); snd_ymfpci_get_double() local 1539 spin_lock_irq(&chip->reg_lock); snd_ymfpci_get_double() 1540 val = snd_ymfpci_readl(chip, reg); snd_ymfpci_get_double() 1541 spin_unlock_irq(&chip->reg_lock); snd_ymfpci_get_double() 1549 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); snd_ymfpci_put_double() local 1561 spin_lock_irq(&chip->reg_lock); snd_ymfpci_put_double() 1562 oval = snd_ymfpci_readl(chip, reg); snd_ymfpci_put_double() 1565 snd_ymfpci_writel(chip, reg, val1); snd_ymfpci_put_double() 1566 spin_unlock_irq(&chip->reg_lock); snd_ymfpci_put_double() 1573 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); snd_ymfpci_put_nativedacvol() local 1581 spin_lock_irq(&chip->reg_lock); snd_ymfpci_put_nativedacvol() 1582 oval = snd_ymfpci_readl(chip, reg); snd_ymfpci_put_nativedacvol() 1584 snd_ymfpci_writel(chip, reg, value); snd_ymfpci_put_nativedacvol() 1585 snd_ymfpci_writel(chip, reg2, value); snd_ymfpci_put_nativedacvol() 1586 spin_unlock_irq(&chip->reg_lock); snd_ymfpci_put_nativedacvol() 1597 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); snd_ymfpci_get_dup4ch() local 1598 ucontrol->value.integer.value[0] = chip->mode_dup4ch; snd_ymfpci_get_dup4ch() 1604 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); snd_ymfpci_put_dup4ch() local 1606 change = (ucontrol->value.integer.value[0] != chip->mode_dup4ch); snd_ymfpci_put_dup4ch() 1608 chip->mode_dup4ch = !!ucontrol->value.integer.value[0]; snd_ymfpci_put_dup4ch() 1655 static int snd_ymfpci_get_gpio_out(struct snd_ymfpci *chip, int pin) snd_ymfpci_get_gpio_out() argument 1660 spin_lock_irqsave(&chip->reg_lock, flags); snd_ymfpci_get_gpio_out() 1661 reg = snd_ymfpci_readw(chip, YDSXGR_GPIOFUNCENABLE); snd_ymfpci_get_gpio_out() 1664 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg); snd_ymfpci_get_gpio_out() 1666 mode = snd_ymfpci_readw(chip, YDSXGR_GPIOTYPECONFIG); snd_ymfpci_get_gpio_out() 1668 snd_ymfpci_writew(chip, YDSXGR_GPIOTYPECONFIG, mode); snd_ymfpci_get_gpio_out() 1669 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg | (1 << (pin + 8))); snd_ymfpci_get_gpio_out() 1670 mode = snd_ymfpci_readw(chip, YDSXGR_GPIOINSTATUS); snd_ymfpci_get_gpio_out() 1671 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_ymfpci_get_gpio_out() 1675 static int snd_ymfpci_set_gpio_out(struct snd_ymfpci *chip, int pin, int enable) snd_ymfpci_set_gpio_out() argument 1680 spin_lock_irqsave(&chip->reg_lock, flags); snd_ymfpci_set_gpio_out() 1681 reg = snd_ymfpci_readw(chip, YDSXGR_GPIOFUNCENABLE); snd_ymfpci_set_gpio_out() 1684 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg); snd_ymfpci_set_gpio_out() 1685 snd_ymfpci_writew(chip, YDSXGR_GPIOOUTCTRL, enable << pin); snd_ymfpci_set_gpio_out() 1686 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg | (1 << (pin + 8))); snd_ymfpci_set_gpio_out() 1687 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_ymfpci_set_gpio_out() 1696 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); snd_ymfpci_gpio_sw_get() local 1698 ucontrol->value.integer.value[0] = snd_ymfpci_get_gpio_out(chip, pin); snd_ymfpci_gpio_sw_get() 1704 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); snd_ymfpci_gpio_sw_put() local 1707 if (snd_ymfpci_get_gpio_out(chip, pin) != ucontrol->value.integer.value[0]) { snd_ymfpci_gpio_sw_put() 1708 snd_ymfpci_set_gpio_out(chip, pin, !!ucontrol->value.integer.value[0]); snd_ymfpci_gpio_sw_put() 1709 ucontrol->value.integer.value[0] = snd_ymfpci_get_gpio_out(chip, pin); snd_ymfpci_gpio_sw_put() 1741 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); snd_ymfpci_pcm_vol_get() local 1744 ucontrol->value.integer.value[0] = chip->pcm_mixer[subs].left; snd_ymfpci_pcm_vol_get() 1745 ucontrol->value.integer.value[1] = chip->pcm_mixer[subs].right; snd_ymfpci_pcm_vol_get() 1752 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); snd_ymfpci_pcm_vol_put() local 1757 if (ucontrol->value.integer.value[0] != chip->pcm_mixer[subs].left || snd_ymfpci_pcm_vol_put() 1758 ucontrol->value.integer.value[1] != chip->pcm_mixer[subs].right) { snd_ymfpci_pcm_vol_put() 1759 chip->pcm_mixer[subs].left = ucontrol->value.integer.value[0]; snd_ymfpci_pcm_vol_put() 1760 chip->pcm_mixer[subs].right = ucontrol->value.integer.value[1]; snd_ymfpci_pcm_vol_put() 1761 if (chip->pcm_mixer[subs].left > 0x8000) snd_ymfpci_pcm_vol_put() 1762 chip->pcm_mixer[subs].left = 0x8000; snd_ymfpci_pcm_vol_put() 1763 if (chip->pcm_mixer[subs].right > 0x8000) snd_ymfpci_pcm_vol_put() 1764 chip->pcm_mixer[subs].right = 0x8000; snd_ymfpci_pcm_vol_put() 1767 spin_lock_irqsave(&chip->voice_lock, flags); snd_ymfpci_pcm_vol_put() 1773 spin_unlock_irqrestore(&chip->voice_lock, flags); snd_ymfpci_pcm_vol_put() 1796 struct snd_ymfpci *chip = bus->private_data; snd_ymfpci_mixer_free_ac97_bus() local 1797 chip->ac97_bus = NULL; snd_ymfpci_mixer_free_ac97_bus() 1802 struct snd_ymfpci *chip = ac97->private_data; snd_ymfpci_mixer_free_ac97() local 1803 chip->ac97 = NULL; snd_ymfpci_mixer_free_ac97() 1806 int snd_ymfpci_mixer(struct snd_ymfpci *chip, int rear_switch) snd_ymfpci_mixer() argument 1818 if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus)) < 0) snd_ymfpci_mixer() 1820 chip->ac97_bus->private_free = snd_ymfpci_mixer_free_ac97_bus; snd_ymfpci_mixer() 1821 chip->ac97_bus->no_vra = 1; /* YMFPCI doesn't need VRA */ snd_ymfpci_mixer() 1824 ac97.private_data = chip; snd_ymfpci_mixer() 1826 if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97)) < 0) snd_ymfpci_mixer() 1830 snd_ac97_update_bits(chip->ac97, AC97_EXTENDED_STATUS, snd_ymfpci_mixer() 1834 if ((err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_ymfpci_controls[idx], chip))) < 0) snd_ymfpci_mixer() 1837 if (chip->ac97->ext_id & AC97_EI_SDAC) { snd_ymfpci_mixer() 1838 kctl = snd_ctl_new1(&snd_ymfpci_dup4ch, chip); snd_ymfpci_mixer() 1839 err = snd_ctl_add(chip->card, kctl); snd_ymfpci_mixer() 1845 if (snd_BUG_ON(!chip->pcm_spdif)) snd_ymfpci_mixer() 1847 if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_default, chip))) < 0) snd_ymfpci_mixer() 1849 kctl->id.device = chip->pcm_spdif->device; snd_ymfpci_mixer() 1850 if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_mask, chip))) < 0) snd_ymfpci_mixer() 1852 kctl->id.device = chip->pcm_spdif->device; snd_ymfpci_mixer() 1853 if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_stream, chip))) < 0) snd_ymfpci_mixer() 1855 kctl->id.device = chip->pcm_spdif->device; snd_ymfpci_mixer() 1856 chip->spdif_pcm_ctl = kctl; snd_ymfpci_mixer() 1859 if (chip->device_id == PCI_DEVICE_ID_YAMAHA_754 && snd_ymfpci_mixer() 1860 (err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_drec_source, chip))) < 0) snd_ymfpci_mixer() 1867 if ((err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_ymfpci_rear_shared, chip))) < 0) snd_ymfpci_mixer() 1872 substream = chip->pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream; snd_ymfpci_mixer() 1874 kctl = snd_ctl_new1(&snd_ymfpci_pcm_volume, chip); snd_ymfpci_mixer() 1877 kctl->id.device = chip->pcm->device; snd_ymfpci_mixer() 1880 if ((err = snd_ctl_add(chip->card, kctl)) < 0) snd_ymfpci_mixer() 1882 chip->pcm_mixer[idx].left = 0x8000; snd_ymfpci_mixer() 1883 chip->pcm_mixer[idx].right = 0x8000; snd_ymfpci_mixer() 1884 chip->pcm_mixer[idx].ctl = kctl; snd_ymfpci_mixer() 1898 struct snd_ymfpci *chip; snd_ymfpci_timer_start() local 1902 chip = snd_timer_chip(timer); snd_ymfpci_timer_start() 1903 spin_lock_irqsave(&chip->reg_lock, flags); snd_ymfpci_timer_start() 1905 chip->timer_ticks = timer->sticks; snd_ymfpci_timer_start() 1912 chip->timer_ticks = 2; snd_ymfpci_timer_start() 1915 snd_ymfpci_writew(chip, YDSXGR_TIMERCOUNT, count); snd_ymfpci_timer_start() 1916 snd_ymfpci_writeb(chip, YDSXGR_TIMERCTRL, 0x03); snd_ymfpci_timer_start() 1917 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_ymfpci_timer_start() 1923 struct snd_ymfpci *chip; snd_ymfpci_timer_stop() local 1926 chip = snd_timer_chip(timer); snd_ymfpci_timer_stop() 1927 spin_lock_irqsave(&chip->reg_lock, flags); snd_ymfpci_timer_stop() 1928 snd_ymfpci_writeb(chip, YDSXGR_TIMERCTRL, 0x00); snd_ymfpci_timer_stop() 1929 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_ymfpci_timer_stop() 1950 int snd_ymfpci_timer(struct snd_ymfpci *chip, int device) snd_ymfpci_timer() argument 1958 tid.card = chip->card->number; snd_ymfpci_timer() 1961 if ((err = snd_timer_new(chip->card, "YMFPCI", &tid, &timer)) >= 0) { snd_ymfpci_timer() 1963 timer->private_data = chip; snd_ymfpci_timer() 1966 chip->timer = timer; snd_ymfpci_timer() 1978 struct snd_ymfpci *chip = entry->private_data; snd_ymfpci_proc_read() local 1983 snd_iprintf(buffer, "%04x: %04x\n", i, snd_ymfpci_readl(chip, i)); snd_ymfpci_proc_read() 1986 static int snd_ymfpci_proc_init(struct snd_card *card, struct snd_ymfpci *chip) snd_ymfpci_proc_init() argument 1991 snd_info_set_text_ops(entry, chip, snd_ymfpci_proc_read); snd_ymfpci_proc_init() 2017 static void snd_ymfpci_enable_dsp(struct snd_ymfpci *chip) snd_ymfpci_enable_dsp() argument 2019 snd_ymfpci_writel(chip, YDSXGR_CONFIG, 0x00000001); snd_ymfpci_enable_dsp() 2022 static void snd_ymfpci_disable_dsp(struct snd_ymfpci *chip) snd_ymfpci_disable_dsp() argument 2027 val = snd_ymfpci_readl(chip, YDSXGR_CONFIG); snd_ymfpci_disable_dsp() 2029 snd_ymfpci_writel(chip, YDSXGR_CONFIG, 0x00000000); snd_ymfpci_disable_dsp() 2031 val = snd_ymfpci_readl(chip, YDSXGR_STATUS); snd_ymfpci_disable_dsp() 2037 static int snd_ymfpci_request_firmware(struct snd_ymfpci *chip) snd_ymfpci_request_firmware() argument 2042 err = request_firmware(&chip->dsp_microcode, "yamaha/ds1_dsp.fw", snd_ymfpci_request_firmware() 2043 &chip->pci->dev); snd_ymfpci_request_firmware() 2045 if (chip->dsp_microcode->size != YDSXG_DSPLENGTH) { snd_ymfpci_request_firmware() 2046 dev_err(chip->card->dev, snd_ymfpci_request_firmware() 2053 is_1e = chip->device_id == PCI_DEVICE_ID_YAMAHA_724F || snd_ymfpci_request_firmware() 2054 chip->device_id == PCI_DEVICE_ID_YAMAHA_740C || snd_ymfpci_request_firmware() 2055 chip->device_id == PCI_DEVICE_ID_YAMAHA_744 || snd_ymfpci_request_firmware() 2056 chip->device_id == PCI_DEVICE_ID_YAMAHA_754; snd_ymfpci_request_firmware() 2058 err = request_firmware(&chip->controller_microcode, name, snd_ymfpci_request_firmware() 2059 &chip->pci->dev); snd_ymfpci_request_firmware() 2061 if (chip->controller_microcode->size != YDSXG_CTRLLENGTH) { snd_ymfpci_request_firmware() 2062 dev_err(chip->card->dev, snd_ymfpci_request_firmware() 2076 static void snd_ymfpci_download_image(struct snd_ymfpci *chip) snd_ymfpci_download_image() argument 2082 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0x00000000); snd_ymfpci_download_image() 2083 snd_ymfpci_disable_dsp(chip); snd_ymfpci_download_image() 2084 snd_ymfpci_writel(chip, YDSXGR_MODE, 0x00010000); snd_ymfpci_download_image() 2085 snd_ymfpci_writel(chip, YDSXGR_MODE, 0x00000000); snd_ymfpci_download_image() 2086 snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, 0x00000000); snd_ymfpci_download_image() 2087 snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT, 0x00000000); snd_ymfpci_download_image() 2088 snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, 0x00000000); snd_ymfpci_download_image() 2089 snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, 0x00000000); snd_ymfpci_download_image() 2090 snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, 0x00000000); snd_ymfpci_download_image() 2091 ctrl = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL); snd_ymfpci_download_image() 2092 snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, ctrl & ~0x0007); snd_ymfpci_download_image() 2095 inst = (const __le32 *)chip->dsp_microcode->data; snd_ymfpci_download_image() 2097 snd_ymfpci_writel(chip, YDSXGR_DSPINSTRAM + (i << 2), snd_ymfpci_download_image() 2101 inst = (const __le32 *)chip->controller_microcode->data; snd_ymfpci_download_image() 2103 snd_ymfpci_writel(chip, YDSXGR_CTRLINSTRAM + (i << 2), snd_ymfpci_download_image() 2106 snd_ymfpci_enable_dsp(chip); snd_ymfpci_download_image() 2109 static int snd_ymfpci_memalloc(struct snd_ymfpci *chip) snd_ymfpci_memalloc() argument 2117 chip->bank_size_playback = snd_ymfpci_readl(chip, YDSXGR_PLAYCTRLSIZE) << 2; snd_ymfpci_memalloc() 2118 chip->bank_size_capture = snd_ymfpci_readl(chip, YDSXGR_RECCTRLSIZE) << 2; snd_ymfpci_memalloc() 2119 chip->bank_size_effect = snd_ymfpci_readl(chip, YDSXGR_EFFCTRLSIZE) << 2; snd_ymfpci_memalloc() 2120 chip->work_size = YDSXG_DEFAULT_WORK_SIZE; snd_ymfpci_memalloc() 2123 ALIGN(chip->bank_size_playback * 2 * YDSXG_PLAYBACK_VOICES, 0x100) + snd_ymfpci_memalloc() 2124 ALIGN(chip->bank_size_capture * 2 * YDSXG_CAPTURE_VOICES, 0x100) + snd_ymfpci_memalloc() 2125 ALIGN(chip->bank_size_effect * 2 * YDSXG_EFFECT_VOICES, 0x100) + snd_ymfpci_memalloc() 2126 chip->work_size; snd_ymfpci_memalloc() 2129 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci), snd_ymfpci_memalloc() 2130 size, &chip->work_ptr) < 0) snd_ymfpci_memalloc() 2132 ptr = chip->work_ptr.area; snd_ymfpci_memalloc() 2133 ptr_addr = chip->work_ptr.addr; snd_ymfpci_memalloc() 2136 chip->bank_base_playback = ptr; snd_ymfpci_memalloc() 2137 chip->bank_base_playback_addr = ptr_addr; snd_ymfpci_memalloc() 2138 chip->ctrl_playback = (u32 *)ptr; snd_ymfpci_memalloc() 2139 chip->ctrl_playback[0] = cpu_to_le32(YDSXG_PLAYBACK_VOICES); snd_ymfpci_memalloc() 2143 chip->voices[voice].number = voice; snd_ymfpci_memalloc() 2144 chip->voices[voice].bank = (struct snd_ymfpci_playback_bank *)ptr; snd_ymfpci_memalloc() 2145 chip->voices[voice].bank_addr = ptr_addr; snd_ymfpci_memalloc() 2147 chip->bank_playback[voice][bank] = (struct snd_ymfpci_playback_bank *)ptr; snd_ymfpci_memalloc() 2148 ptr += chip->bank_size_playback; snd_ymfpci_memalloc() 2149 ptr_addr += chip->bank_size_playback; snd_ymfpci_memalloc() 2154 chip->bank_base_capture = ptr; snd_ymfpci_memalloc() 2155 chip->bank_base_capture_addr = ptr_addr; snd_ymfpci_memalloc() 2158 chip->bank_capture[voice][bank] = (struct snd_ymfpci_capture_bank *)ptr; snd_ymfpci_memalloc() 2159 ptr += chip->bank_size_capture; snd_ymfpci_memalloc() 2160 ptr_addr += chip->bank_size_capture; snd_ymfpci_memalloc() 2164 chip->bank_base_effect = ptr; snd_ymfpci_memalloc() 2165 chip->bank_base_effect_addr = ptr_addr; snd_ymfpci_memalloc() 2168 chip->bank_effect[voice][bank] = (struct snd_ymfpci_effect_bank *)ptr; snd_ymfpci_memalloc() 2169 ptr += chip->bank_size_effect; snd_ymfpci_memalloc() 2170 ptr_addr += chip->bank_size_effect; snd_ymfpci_memalloc() 2174 chip->work_base = ptr; snd_ymfpci_memalloc() 2175 chip->work_base_addr = ptr_addr; snd_ymfpci_memalloc() 2177 snd_BUG_ON(ptr + chip->work_size != snd_ymfpci_memalloc() 2178 chip->work_ptr.area + chip->work_ptr.bytes); snd_ymfpci_memalloc() 2180 snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, chip->bank_base_playback_addr); snd_ymfpci_memalloc() 2181 snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, chip->bank_base_capture_addr); snd_ymfpci_memalloc() 2182 snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, chip->bank_base_effect_addr); snd_ymfpci_memalloc() 2183 snd_ymfpci_writel(chip, YDSXGR_WORKBASE, chip->work_base_addr); snd_ymfpci_memalloc() 2184 snd_ymfpci_writel(chip, YDSXGR_WORKSIZE, chip->work_size >> 2); snd_ymfpci_memalloc() 2187 chip->spdif_bits = chip->spdif_pcm_bits = SNDRV_PCM_DEFAULT_CON_SPDIF & 0xffff; snd_ymfpci_memalloc() 2188 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL, 0); snd_ymfpci_memalloc() 2189 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits); snd_ymfpci_memalloc() 2192 snd_ymfpci_writew(chip, YDSXGR_SPDIFINCTRL, 0); snd_ymfpci_memalloc() 2196 snd_ymfpci_writel(chip, reg, 0); snd_ymfpci_memalloc() 2197 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0x3fff3fff); snd_ymfpci_memalloc() 2198 snd_ymfpci_writel(chip, YDSXGR_BUF441OUTVOL, 0x3fff3fff); snd_ymfpci_memalloc() 2199 snd_ymfpci_writel(chip, YDSXGR_ZVOUTVOL, 0x3fff3fff); snd_ymfpci_memalloc() 2200 snd_ymfpci_writel(chip, YDSXGR_SPDIFOUTVOL, 0x3fff3fff); snd_ymfpci_memalloc() 2201 snd_ymfpci_writel(chip, YDSXGR_NATIVEADCINVOL, 0x3fff3fff); snd_ymfpci_memalloc() 2202 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACINVOL, 0x3fff3fff); snd_ymfpci_memalloc() 2203 snd_ymfpci_writel(chip, YDSXGR_PRIADCLOOPVOL, 0x3fff3fff); snd_ymfpci_memalloc() 2204 snd_ymfpci_writel(chip, YDSXGR_LEGACYOUTVOL, 0x3fff3fff); snd_ymfpci_memalloc() 2209 static int snd_ymfpci_free(struct snd_ymfpci *chip) snd_ymfpci_free() argument 2213 if (snd_BUG_ON(!chip)) snd_ymfpci_free() 2216 if (chip->res_reg_area) { /* don't touch busy hardware */ snd_ymfpci_free() 2217 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0); snd_ymfpci_free() 2218 snd_ymfpci_writel(chip, YDSXGR_BUF441OUTVOL, 0); snd_ymfpci_free() 2219 snd_ymfpci_writel(chip, YDSXGR_LEGACYOUTVOL, 0); snd_ymfpci_free() 2220 snd_ymfpci_writel(chip, YDSXGR_STATUS, ~0); snd_ymfpci_free() 2221 snd_ymfpci_disable_dsp(chip); snd_ymfpci_free() 2222 snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, 0); snd_ymfpci_free() 2223 snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, 0); snd_ymfpci_free() 2224 snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, 0); snd_ymfpci_free() 2225 snd_ymfpci_writel(chip, YDSXGR_WORKBASE, 0); snd_ymfpci_free() 2226 snd_ymfpci_writel(chip, YDSXGR_WORKSIZE, 0); snd_ymfpci_free() 2227 ctrl = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL); snd_ymfpci_free() 2228 snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, ctrl & ~0x0007); snd_ymfpci_free() 2231 snd_ymfpci_ac3_done(chip); snd_ymfpci_free() 2236 * the chip again unless reboot. ACPI bug? snd_ymfpci_free() 2238 pci_set_power_state(chip->pci, PCI_D3hot); snd_ymfpci_free() 2242 kfree(chip->saved_regs); snd_ymfpci_free() 2244 if (chip->irq >= 0) snd_ymfpci_free() 2245 free_irq(chip->irq, chip); snd_ymfpci_free() 2246 release_and_free_resource(chip->mpu_res); snd_ymfpci_free() 2247 release_and_free_resource(chip->fm_res); snd_ymfpci_free() 2248 snd_ymfpci_free_gameport(chip); snd_ymfpci_free() 2249 iounmap(chip->reg_area_virt); snd_ymfpci_free() 2250 if (chip->work_ptr.area) snd_ymfpci_free() 2251 snd_dma_free_pages(&chip->work_ptr); snd_ymfpci_free() 2253 release_and_free_resource(chip->res_reg_area); snd_ymfpci_free() 2255 pci_write_config_word(chip->pci, 0x40, chip->old_legacy_ctrl); snd_ymfpci_free() 2257 pci_disable_device(chip->pci); snd_ymfpci_free() 2258 release_firmware(chip->dsp_microcode); snd_ymfpci_free() 2259 release_firmware(chip->controller_microcode); snd_ymfpci_free() 2260 kfree(chip); snd_ymfpci_free() 2266 struct snd_ymfpci *chip = device->device_data; snd_ymfpci_dev_free() local 2267 return snd_ymfpci_free(chip); snd_ymfpci_dev_free() 2303 struct snd_ymfpci *chip = card->private_data; snd_ymfpci_suspend() local 2307 snd_pcm_suspend_all(chip->pcm); snd_ymfpci_suspend() 2308 snd_pcm_suspend_all(chip->pcm2); snd_ymfpci_suspend() 2309 snd_pcm_suspend_all(chip->pcm_spdif); snd_ymfpci_suspend() 2310 snd_pcm_suspend_all(chip->pcm_4ch); snd_ymfpci_suspend() 2311 snd_ac97_suspend(chip->ac97); snd_ymfpci_suspend() 2313 chip->saved_regs[i] = snd_ymfpci_readl(chip, saved_regs_index[i]); snd_ymfpci_suspend() 2314 chip->saved_ydsxgr_mode = snd_ymfpci_readl(chip, YDSXGR_MODE); snd_ymfpci_suspend() 2315 pci_read_config_word(chip->pci, PCIR_DSXG_LEGACY, snd_ymfpci_suspend() 2316 &chip->saved_dsxg_legacy); snd_ymfpci_suspend() 2317 pci_read_config_word(chip->pci, PCIR_DSXG_ELEGACY, snd_ymfpci_suspend() 2318 &chip->saved_dsxg_elegacy); snd_ymfpci_suspend() 2319 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0); snd_ymfpci_suspend() 2320 snd_ymfpci_writel(chip, YDSXGR_BUF441OUTVOL, 0); snd_ymfpci_suspend() 2321 snd_ymfpci_disable_dsp(chip); snd_ymfpci_suspend() 2329 struct snd_ymfpci *chip = card->private_data; snd_ymfpci_resume() local 2333 snd_ymfpci_codec_ready(chip, 0); snd_ymfpci_resume() 2334 snd_ymfpci_download_image(chip); snd_ymfpci_resume() 2338 snd_ymfpci_writel(chip, saved_regs_index[i], chip->saved_regs[i]); snd_ymfpci_resume() 2340 snd_ac97_resume(chip->ac97); snd_ymfpci_resume() 2342 pci_write_config_word(chip->pci, PCIR_DSXG_LEGACY, snd_ymfpci_resume() 2343 chip->saved_dsxg_legacy); snd_ymfpci_resume() 2344 pci_write_config_word(chip->pci, PCIR_DSXG_ELEGACY, snd_ymfpci_resume() 2345 chip->saved_dsxg_elegacy); snd_ymfpci_resume() 2348 if (chip->start_count > 0) { snd_ymfpci_resume() 2349 spin_lock_irq(&chip->reg_lock); snd_ymfpci_resume() 2350 snd_ymfpci_writel(chip, YDSXGR_MODE, chip->saved_ydsxgr_mode); snd_ymfpci_resume() 2351 chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT); snd_ymfpci_resume() 2352 spin_unlock_irq(&chip->reg_lock); snd_ymfpci_resume() 2366 struct snd_ymfpci *chip; snd_ymfpci_create() local 2378 chip = kzalloc(sizeof(*chip), GFP_KERNEL); snd_ymfpci_create() 2379 if (chip == NULL) { snd_ymfpci_create() 2383 chip->old_legacy_ctrl = old_legacy_ctrl; snd_ymfpci_create() 2384 spin_lock_init(&chip->reg_lock); snd_ymfpci_create() 2385 spin_lock_init(&chip->voice_lock); snd_ymfpci_create() 2386 init_waitqueue_head(&chip->interrupt_sleep); snd_ymfpci_create() 2387 atomic_set(&chip->interrupt_sleep_count, 0); snd_ymfpci_create() 2388 chip->card = card; snd_ymfpci_create() 2389 chip->pci = pci; snd_ymfpci_create() 2390 chip->irq = -1; snd_ymfpci_create() 2391 chip->device_id = pci->device; snd_ymfpci_create() 2392 chip->rev = pci->revision; snd_ymfpci_create() 2393 chip->reg_area_phys = pci_resource_start(pci, 0); snd_ymfpci_create() 2394 chip->reg_area_virt = ioremap_nocache(chip->reg_area_phys, 0x8000); snd_ymfpci_create() 2396 chip->src441_used = -1; snd_ymfpci_create() 2398 if ((chip->res_reg_area = request_mem_region(chip->reg_area_phys, 0x8000, "YMFPCI")) == NULL) { snd_ymfpci_create() 2399 dev_err(chip->card->dev, snd_ymfpci_create() 2401 chip->reg_area_phys, chip->reg_area_phys + 0x8000 - 1); snd_ymfpci_create() 2402 snd_ymfpci_free(chip); snd_ymfpci_create() 2406 KBUILD_MODNAME, chip)) { snd_ymfpci_create() 2407 dev_err(chip->card->dev, "unable to grab IRQ %d\n", pci->irq); snd_ymfpci_create() 2408 snd_ymfpci_free(chip); snd_ymfpci_create() 2411 chip->irq = pci->irq; snd_ymfpci_create() 2414 if (snd_ymfpci_codec_ready(chip, 0) < 0) { snd_ymfpci_create() 2415 snd_ymfpci_free(chip); snd_ymfpci_create() 2419 err = snd_ymfpci_request_firmware(chip); snd_ymfpci_create() 2421 dev_err(chip->card->dev, "firmware request failed: %d\n", err); snd_ymfpci_create() 2422 snd_ymfpci_free(chip); snd_ymfpci_create() 2425 snd_ymfpci_download_image(chip); snd_ymfpci_create() 2429 if (snd_ymfpci_memalloc(chip) < 0) { snd_ymfpci_create() 2430 snd_ymfpci_free(chip); snd_ymfpci_create() 2434 if ((err = snd_ymfpci_ac3_init(chip)) < 0) { snd_ymfpci_create() 2435 snd_ymfpci_free(chip); snd_ymfpci_create() 2440 chip->saved_regs = kmalloc(YDSXGR_NUM_SAVED_REGS * sizeof(u32), snd_ymfpci_create() 2442 if (chip->saved_regs == NULL) { snd_ymfpci_create() 2443 snd_ymfpci_free(chip); snd_ymfpci_create() 2448 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) { snd_ymfpci_create() 2449 snd_ymfpci_free(chip); snd_ymfpci_create() 2453 snd_ymfpci_proc_init(card, chip); snd_ymfpci_create() 2455 *rchip = chip; snd_ymfpci_create()
/linux-4.1.27/drivers/net/wireless/zd1211rw/
H A D	zd_chip.c	34 void zd_chip_init(struct zd_chip *chip, zd_chip_init() argument 38 memset(chip, 0, sizeof(*chip)); zd_chip_init() 39 mutex_init(&chip->mutex); zd_chip_init() 40 zd_usb_init(&chip->usb, hw, intf); zd_chip_init() 41 zd_rf_init(&chip->rf); zd_chip_init() 44 void zd_chip_clear(struct zd_chip *chip) zd_chip_clear() argument 46 ZD_ASSERT(!mutex_is_locked(&chip->mutex)); zd_chip_clear() 47 zd_usb_clear(&chip->usb); zd_chip_clear() 48 zd_rf_clear(&chip->rf); zd_chip_clear() 49 mutex_destroy(&chip->mutex); zd_chip_clear() 50 ZD_MEMCLEAR(chip, sizeof(*chip)); zd_chip_clear() 53 static int scnprint_mac_oui(struct zd_chip *chip, char *buffer, size_t size) scnprint_mac_oui() argument 55 u8 *addr = zd_mac_get_perm_addr(zd_chip_to_mac(chip)); scnprint_mac_oui() 61 static int scnprint_id(struct zd_chip *chip, char *buffer, size_t size) scnprint_id() argument 65 i = scnprintf(buffer, size, "zd1211%s chip ", scnprint_id() 66 zd_chip_is_zd1211b(chip) ? "b" : ""); scnprint_id() 67 i += zd_usb_scnprint_id(&chip->usb, buffer+i, size-i); scnprint_id() 69 i += scnprint_mac_oui(chip, buffer+i, size-i); scnprint_id() 71 i += zd_rf_scnprint_id(&chip->rf, buffer+i, size-i); scnprint_id() 72 i += scnprintf(buffer+i, size-i, " pa%1x %c%c%c%c%c", chip->pa_type, scnprint_id() 73 chip->patch_cck_gain ? 'g' : '-', scnprint_id() 74 chip->patch_cr157 ? '7' : '-', scnprint_id() 75 chip->patch_6m_band_edge ? '6' : '-', scnprint_id() 76 chip->new_phy_layout ? 'N' : '-', scnprint_id() 77 chip->al2230s_bit ? 'S' : '-'); scnprint_id() 81 static void print_id(struct zd_chip *chip) print_id() argument 85 scnprint_id(chip, buffer, sizeof(buffer)); print_id() 87 dev_info(zd_chip_dev(chip), "%s\n", buffer); print_id() 105 int zd_ioread32v_locked(struct zd_chip *chip, u32 *values, const zd_addr_t *addr, zd_ioread32v_locked() argument 129 r = zd_ioread16v_locked(chip, v16, a16, count16); zd_ioread32v_locked() 131 dev_dbg_f(zd_chip_dev(chip), zd_ioread32v_locked() 144 static int _zd_iowrite32v_async_locked(struct zd_chip *chip, _zd_iowrite32v_async_locked() argument 154 ZD_ASSERT(mutex_is_locked(&chip->mutex)); _zd_iowrite32v_async_locked() 173 r = zd_usb_iowrite16v_async(&chip->usb, ioreqs16, count16); _zd_iowrite32v_async_locked() 176 dev_dbg_f(zd_chip_dev(chip), _zd_iowrite32v_async_locked() 183 int _zd_iowrite32v_locked(struct zd_chip *chip, const struct zd_ioreq32 *ioreqs, _zd_iowrite32v_locked() argument 188 zd_usb_iowrite16v_async_start(&chip->usb); _zd_iowrite32v_locked() 189 r = _zd_iowrite32v_async_locked(chip, ioreqs, count); _zd_iowrite32v_locked() 191 zd_usb_iowrite16v_async_end(&chip->usb, 0); _zd_iowrite32v_locked() 194 return zd_usb_iowrite16v_async_end(&chip->usb, 50 /* ms */); _zd_iowrite32v_locked() 197 int zd_iowrite16a_locked(struct zd_chip *chip, zd_iowrite16a_locked() argument 203 ZD_ASSERT(mutex_is_locked(&chip->mutex)); zd_iowrite16a_locked() 204 zd_usb_iowrite16v_async_start(&chip->usb); zd_iowrite16a_locked() 218 r = zd_usb_iowrite16v_async(&chip->usb, &ioreqs[i], j); zd_iowrite16a_locked() 220 zd_usb_iowrite16v_async_end(&chip->usb, 0); zd_iowrite16a_locked() 221 dev_dbg_f(zd_chip_dev(chip), zd_iowrite16a_locked() 228 return zd_usb_iowrite16v_async_end(&chip->usb, 50 /* ms */); zd_iowrite16a_locked() 235 int zd_iowrite32a_locked(struct zd_chip *chip, zd_iowrite32a_locked() argument 241 zd_usb_iowrite16v_async_start(&chip->usb); zd_iowrite32a_locked() 255 r = _zd_iowrite32v_async_locked(chip, &ioreqs[i], j); zd_iowrite32a_locked() 257 zd_usb_iowrite16v_async_end(&chip->usb, 0); zd_iowrite32a_locked() 258 dev_dbg_f(zd_chip_dev(chip), zd_iowrite32a_locked() 265 return zd_usb_iowrite16v_async_end(&chip->usb, 50 /* ms */); zd_iowrite32a_locked() 268 int zd_ioread16(struct zd_chip *chip, zd_addr_t addr, u16 *value) zd_ioread16() argument 272 mutex_lock(&chip->mutex); zd_ioread16() 273 r = zd_ioread16_locked(chip, value, addr); zd_ioread16() 274 mutex_unlock(&chip->mutex); zd_ioread16() 278 int zd_ioread32(struct zd_chip *chip, zd_addr_t addr, u32 *value) zd_ioread32() argument 282 mutex_lock(&chip->mutex); zd_ioread32() 283 r = zd_ioread32_locked(chip, value, addr); zd_ioread32() 284 mutex_unlock(&chip->mutex); zd_ioread32() 288 int zd_iowrite16(struct zd_chip *chip, zd_addr_t addr, u16 value) zd_iowrite16() argument 292 mutex_lock(&chip->mutex); zd_iowrite16() 293 r = zd_iowrite16_locked(chip, value, addr); zd_iowrite16() 294 mutex_unlock(&chip->mutex); zd_iowrite16() 298 int zd_iowrite32(struct zd_chip *chip, zd_addr_t addr, u32 value) zd_iowrite32() argument 302 mutex_lock(&chip->mutex); zd_iowrite32() 303 r = zd_iowrite32_locked(chip, value, addr); zd_iowrite32() 304 mutex_unlock(&chip->mutex); zd_iowrite32() 308 int zd_ioread32v(struct zd_chip *chip, const zd_addr_t *addresses, zd_ioread32v() argument 313 mutex_lock(&chip->mutex); zd_ioread32v() 314 r = zd_ioread32v_locked(chip, values, addresses, count); zd_ioread32v() 315 mutex_unlock(&chip->mutex); zd_ioread32v() 319 int zd_iowrite32a(struct zd_chip *chip, const struct zd_ioreq32 *ioreqs, zd_iowrite32a() argument 324 mutex_lock(&chip->mutex); zd_iowrite32a() 325 r = zd_iowrite32a_locked(chip, ioreqs, count); zd_iowrite32a() 326 mutex_unlock(&chip->mutex); zd_iowrite32a() 330 static int read_pod(struct zd_chip *chip, u8 *rf_type) read_pod() argument 335 ZD_ASSERT(mutex_is_locked(&chip->mutex)); read_pod() 336 r = zd_ioread32_locked(chip, &value, E2P_POD); read_pod() 339 dev_dbg_f(zd_chip_dev(chip), "E2P_POD %#010x\n", value); read_pod() 343 chip->pa_type = (value >> 16) & 0x0f; read_pod() 344 chip->patch_cck_gain = (value >> 8) & 0x1; read_pod() 345 chip->patch_cr157 = (value >> 13) & 0x1; read_pod() 346 chip->patch_6m_band_edge = (value >> 21) & 0x1; read_pod() 347 chip->new_phy_layout = (value >> 31) & 0x1; read_pod() 348 chip->al2230s_bit = (value >> 7) & 0x1; read_pod() 349 chip->link_led = ((value >> 4) & 1) ? LED1 : LED2; read_pod() 350 chip->supports_tx_led = 1; read_pod() 353 chip->supports_tx_led = 0; read_pod() 356 dev_dbg_f(zd_chip_dev(chip), read_pod() 360 chip->pa_type, chip->patch_cck_gain, read_pod() 361 chip->patch_cr157, chip->patch_6m_band_edge, read_pod() 362 chip->new_phy_layout, read_pod() 363 chip->link_led == LED1 ? 1 : 2, read_pod() 364 chip->supports_tx_led); read_pod() 368 chip->pa_type = 0; read_pod() 369 chip->patch_cck_gain = 0; read_pod() 370 chip->patch_cr157 = 0; read_pod() 371 chip->patch_6m_band_edge = 0; read_pod() 372 chip->new_phy_layout = 0; read_pod() 376 static int zd_write_mac_addr_common(struct zd_chip *chip, const u8 *mac_addr, zd_write_mac_addr_common() argument 390 dev_dbg_f(zd_chip_dev(chip), "%s addr %pM\n", type, mac_addr); zd_write_mac_addr_common() 392 dev_dbg_f(zd_chip_dev(chip), "set NULL %s\n", type); zd_write_mac_addr_common() 395 mutex_lock(&chip->mutex); zd_write_mac_addr_common() 396 r = zd_iowrite32a_locked(chip, reqs, ARRAY_SIZE(reqs)); zd_write_mac_addr_common() 397 mutex_unlock(&chip->mutex); zd_write_mac_addr_common() 404 int zd_write_mac_addr(struct zd_chip *chip, const u8 *mac_addr) zd_write_mac_addr() argument 411 return zd_write_mac_addr_common(chip, mac_addr, reqs, "mac"); zd_write_mac_addr() 414 int zd_write_bssid(struct zd_chip *chip, const u8 *bssid) zd_write_bssid() argument 421 return zd_write_mac_addr_common(chip, bssid, reqs, "bssid"); zd_write_bssid() 424 int zd_read_regdomain(struct zd_chip *chip, u8 *regdomain) zd_read_regdomain() argument 429 mutex_lock(&chip->mutex); zd_read_regdomain() 430 r = zd_ioread32_locked(chip, &value, E2P_SUBID); zd_read_regdomain() 431 mutex_unlock(&chip->mutex); zd_read_regdomain() 436 dev_dbg_f(zd_chip_dev(chip), "regdomain: %#04x\n", *regdomain); zd_read_regdomain() 441 static int read_values(struct zd_chip *chip, u8 *values, size_t count, read_values() argument 448 ZD_ASSERT(mutex_is_locked(&chip->mutex)); read_values() 450 r = zd_ioread32_locked(chip, &v, read_values() 468 static int read_pwr_cal_values(struct zd_chip *chip) read_pwr_cal_values() argument 470 return read_values(chip, chip->pwr_cal_values, read_pwr_cal_values() 475 static int read_pwr_int_values(struct zd_chip *chip) read_pwr_int_values() argument 477 return read_values(chip, chip->pwr_int_values, read_pwr_int_values() 482 static int read_ofdm_cal_values(struct zd_chip *chip) read_ofdm_cal_values() argument 493 r = read_values(chip, chip->ofdm_cal_values[i], read_ofdm_cal_values() 501 static int read_cal_int_tables(struct zd_chip *chip) read_cal_int_tables() argument 505 r = read_pwr_cal_values(chip); read_cal_int_tables() 508 r = read_pwr_int_values(chip); read_cal_int_tables() 511 r = read_ofdm_cal_values(chip); read_cal_int_tables() 518 int zd_chip_lock_phy_regs(struct zd_chip *chip) zd_chip_lock_phy_regs() argument 523 ZD_ASSERT(mutex_is_locked(&chip->mutex)); zd_chip_lock_phy_regs() 524 r = zd_ioread32_locked(chip, &tmp, CR_REG1); zd_chip_lock_phy_regs() 526 dev_err(zd_chip_dev(chip), "error ioread32(CR_REG1): %d\n", r); zd_chip_lock_phy_regs() 532 r = zd_iowrite32_locked(chip, tmp, CR_REG1); zd_chip_lock_phy_regs() 534 dev_err(zd_chip_dev(chip), "error iowrite32(CR_REG1): %d\n", r); zd_chip_lock_phy_regs() 538 int zd_chip_unlock_phy_regs(struct zd_chip *chip) zd_chip_unlock_phy_regs() argument 543 ZD_ASSERT(mutex_is_locked(&chip->mutex)); zd_chip_unlock_phy_regs() 544 r = zd_ioread32_locked(chip, &tmp, CR_REG1); zd_chip_unlock_phy_regs() 546 dev_err(zd_chip_dev(chip), zd_chip_unlock_phy_regs() 553 r = zd_iowrite32_locked(chip, tmp, CR_REG1); zd_chip_unlock_phy_regs() 555 dev_err(zd_chip_dev(chip), "error iowrite32(CR_REG1): %d\n", r); zd_chip_unlock_phy_regs() 560 static int patch_cr157(struct zd_chip *chip) patch_cr157() argument 565 if (!chip->patch_cr157) patch_cr157() 568 r = zd_ioread16_locked(chip, &value, E2P_PHY_REG); patch_cr157() 572 dev_dbg_f(zd_chip_dev(chip), "patching value %x\n", value >> 8); patch_cr157() 573 return zd_iowrite32_locked(chip, value >> 8, ZD_CR157); patch_cr157() 581 static int patch_6m_band_edge(struct zd_chip *chip, u8 channel) patch_6m_band_edge() argument 583 ZD_ASSERT(mutex_is_locked(&chip->mutex)); patch_6m_band_edge() 584 if (!chip->patch_6m_band_edge) patch_6m_band_edge() 587 return zd_rf_patch_6m_band_edge(&chip->rf, channel); patch_6m_band_edge() 592 int zd_chip_generic_patch_6m_band(struct zd_chip *chip, int channel) zd_chip_generic_patch_6m_band() argument 603 dev_dbg_f(zd_chip_dev(chip), "patching for channel %d\n", channel); zd_chip_generic_patch_6m_band() 604 return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs)); zd_chip_generic_patch_6m_band() 607 static int zd1211_hw_reset_phy(struct zd_chip *chip) zd1211_hw_reset_phy() argument 677 dev_dbg_f(zd_chip_dev(chip), "\n"); zd1211_hw_reset_phy() 679 r = zd_chip_lock_phy_regs(chip); zd1211_hw_reset_phy() 683 r = zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs)); zd1211_hw_reset_phy() 687 r = patch_cr157(chip); zd1211_hw_reset_phy() 689 t = zd_chip_unlock_phy_regs(chip); zd1211_hw_reset_phy() 696 static int zd1211b_hw_reset_phy(struct zd_chip *chip) zd1211b_hw_reset_phy() argument 759 dev_dbg_f(zd_chip_dev(chip), "\n"); zd1211b_hw_reset_phy() 761 r = zd_chip_lock_phy_regs(chip); zd1211b_hw_reset_phy() 765 r = zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs)); zd1211b_hw_reset_phy() 766 t = zd_chip_unlock_phy_regs(chip); zd1211b_hw_reset_phy() 773 static int hw_reset_phy(struct zd_chip *chip) hw_reset_phy() argument 775 return zd_chip_is_zd1211b(chip) ? zd1211b_hw_reset_phy(chip) : hw_reset_phy() 776 zd1211_hw_reset_phy(chip); hw_reset_phy() 779 static int zd1211_hw_init_hmac(struct zd_chip *chip) zd1211_hw_init_hmac() argument 786 dev_dbg_f(zd_chip_dev(chip), "\n"); zd1211_hw_init_hmac() 787 ZD_ASSERT(mutex_is_locked(&chip->mutex)); zd1211_hw_init_hmac() 788 return zd_iowrite32a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs)); zd1211_hw_init_hmac() 791 static int zd1211b_hw_init_hmac(struct zd_chip *chip) zd1211b_hw_init_hmac() argument 805 dev_dbg_f(zd_chip_dev(chip), "\n"); zd1211b_hw_init_hmac() 806 ZD_ASSERT(mutex_is_locked(&chip->mutex)); zd1211b_hw_init_hmac() 807 return zd_iowrite32a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs)); zd1211b_hw_init_hmac() 810 static int hw_init_hmac(struct zd_chip *chip) hw_init_hmac() argument 836 ZD_ASSERT(mutex_is_locked(&chip->mutex)); hw_init_hmac() 837 r = zd_iowrite32a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs)); hw_init_hmac() 841 return zd_chip_is_zd1211b(chip) ? hw_init_hmac() 842 zd1211b_hw_init_hmac(chip) : zd1211_hw_init_hmac(chip); hw_init_hmac() 851 static int get_aw_pt_bi(struct zd_chip *chip, struct aw_pt_bi *s) get_aw_pt_bi() argument 858 r = zd_ioread32v_locked(chip, values, (const zd_addr_t *)aw_pt_bi_addr, get_aw_pt_bi() 871 static int set_aw_pt_bi(struct zd_chip *chip, struct aw_pt_bi *s) set_aw_pt_bi() argument 890 return zd_iowrite32a_locked(chip, reqs, ARRAY_SIZE(reqs)); set_aw_pt_bi() 894 static int set_beacon_interval(struct zd_chip *chip, u16 interval, set_beacon_interval() argument 901 ZD_ASSERT(mutex_is_locked(&chip->mutex)); set_beacon_interval() 923 r = zd_iowrite32_locked(chip, b_interval, CR_BCN_INTERVAL); set_beacon_interval() 926 r = get_aw_pt_bi(chip, &s); set_beacon_interval() 929 return set_aw_pt_bi(chip, &s); set_beacon_interval() 932 int zd_set_beacon_interval(struct zd_chip *chip, u16 interval, u8 dtim_period, zd_set_beacon_interval() argument 937 mutex_lock(&chip->mutex); zd_set_beacon_interval() 938 r = set_beacon_interval(chip, interval, dtim_period, type); zd_set_beacon_interval() 939 mutex_unlock(&chip->mutex); zd_set_beacon_interval() 943 static int hw_init(struct zd_chip *chip) hw_init() argument 947 dev_dbg_f(zd_chip_dev(chip), "\n"); hw_init() 948 ZD_ASSERT(mutex_is_locked(&chip->mutex)); hw_init() 949 r = hw_reset_phy(chip); hw_init() 953 r = hw_init_hmac(chip); hw_init() 957 return set_beacon_interval(chip, 100, 0, NL80211_IFTYPE_UNSPECIFIED); hw_init() 960 static zd_addr_t fw_reg_addr(struct zd_chip *chip, u16 offset) fw_reg_addr() argument 962 return (zd_addr_t)((u16)chip->fw_regs_base + offset); fw_reg_addr() 966 static int dump_cr(struct zd_chip *chip, const zd_addr_t addr, dump_cr() argument 972 r = zd_ioread32_locked(chip, &value, addr); dump_cr() 974 dev_dbg_f(zd_chip_dev(chip), dump_cr() 979 dev_dbg_f(zd_chip_dev(chip), "%s %#010x\n", dump_cr() 984 static int test_init(struct zd_chip *chip) test_init() argument 988 r = dump_cr(chip, CR_AFTER_PNP, "CR_AFTER_PNP"); test_init() 991 r = dump_cr(chip, CR_GPI_EN, "CR_GPI_EN"); test_init() 994 return dump_cr(chip, CR_INTERRUPT, "CR_INTERRUPT"); test_init() 997 static void dump_fw_registers(struct zd_chip *chip) dump_fw_registers() argument 1000 fw_reg_addr(chip, FW_REG_FIRMWARE_VER), dump_fw_registers() 1001 fw_reg_addr(chip, FW_REG_USB_SPEED), dump_fw_registers() 1002 fw_reg_addr(chip, FW_REG_FIX_TX_RATE), dump_fw_registers() 1003 fw_reg_addr(chip, FW_REG_LED_LINK_STATUS), dump_fw_registers() 1009 r = zd_ioread16v_locked(chip, values, (const zd_addr_t*)addr, dump_fw_registers() 1012 dev_dbg_f(zd_chip_dev(chip), "error %d zd_ioread16v_locked\n", dump_fw_registers() 1017 dev_dbg_f(zd_chip_dev(chip), "FW_FIRMWARE_VER %#06hx\n", values[0]); dump_fw_registers() 1018 dev_dbg_f(zd_chip_dev(chip), "FW_USB_SPEED %#06hx\n", values[1]); dump_fw_registers() 1019 dev_dbg_f(zd_chip_dev(chip), "FW_FIX_TX_RATE %#06hx\n", values[2]); dump_fw_registers() 1020 dev_dbg_f(zd_chip_dev(chip), "FW_LINK_STATUS %#06hx\n", values[3]); dump_fw_registers() 1024 static int print_fw_version(struct zd_chip *chip) print_fw_version() argument 1026 struct wiphy *wiphy = zd_chip_to_mac(chip)->hw->wiphy; print_fw_version() 1030 r = zd_ioread16_locked(chip, &version, print_fw_version() 1031 fw_reg_addr(chip, FW_REG_FIRMWARE_VER)); print_fw_version() 1035 dev_info(zd_chip_dev(chip),"firmware version %04hx\n", version); print_fw_version() 1043 static int set_mandatory_rates(struct zd_chip *chip, int gmode) set_mandatory_rates() argument 1046 ZD_ASSERT(mutex_is_locked(&chip->mutex)); set_mandatory_rates() 1057 return zd_iowrite32_locked(chip, rates, CR_MANDATORY_RATE_TBL); set_mandatory_rates() 1060 int zd_chip_set_rts_cts_rate_locked(struct zd_chip *chip, zd_chip_set_rts_cts_rate_locked() argument 1065 dev_dbg_f(zd_chip_dev(chip), "preamble=%x\n", preamble); zd_chip_set_rts_cts_rate_locked() 1075 return zd_iowrite32_locked(chip, value, CR_RTS_CTS_RATE); zd_chip_set_rts_cts_rate_locked() 1078 int zd_chip_enable_hwint(struct zd_chip *chip) zd_chip_enable_hwint() argument 1082 mutex_lock(&chip->mutex); zd_chip_enable_hwint() 1083 r = zd_iowrite32_locked(chip, HWINT_ENABLED, CR_INTERRUPT); zd_chip_enable_hwint() 1084 mutex_unlock(&chip->mutex); zd_chip_enable_hwint() 1088 static int disable_hwint(struct zd_chip *chip) disable_hwint() argument 1090 return zd_iowrite32_locked(chip, HWINT_DISABLED, CR_INTERRUPT); disable_hwint() 1093 int zd_chip_disable_hwint(struct zd_chip *chip) zd_chip_disable_hwint() argument 1097 mutex_lock(&chip->mutex); zd_chip_disable_hwint() 1098 r = disable_hwint(chip); zd_chip_disable_hwint() 1099 mutex_unlock(&chip->mutex); zd_chip_disable_hwint() 1103 static int read_fw_regs_offset(struct zd_chip *chip) read_fw_regs_offset() argument 1107 ZD_ASSERT(mutex_is_locked(&chip->mutex)); read_fw_regs_offset() 1108 r = zd_ioread16_locked(chip, (u16*)&chip->fw_regs_base, read_fw_regs_offset() 1112 dev_dbg_f(zd_chip_dev(chip), "fw_regs_base: %#06hx\n", read_fw_regs_offset() 1113 (u16)chip->fw_regs_base); read_fw_regs_offset() 1119 int zd_chip_read_mac_addr_fw(struct zd_chip *chip, u8 *addr) zd_chip_read_mac_addr_fw() argument 1121 dev_dbg_f(zd_chip_dev(chip), "\n"); zd_chip_read_mac_addr_fw() 1122 return zd_usb_read_fw(&chip->usb, E2P_MAC_ADDR_P1, addr, zd_chip_read_mac_addr_fw() 1126 int zd_chip_init_hw(struct zd_chip *chip) zd_chip_init_hw() argument 1131 dev_dbg_f(zd_chip_dev(chip), "\n"); zd_chip_init_hw() 1133 mutex_lock(&chip->mutex); zd_chip_init_hw() 1136 r = test_init(chip); zd_chip_init_hw() 1140 r = zd_iowrite32_locked(chip, 1, CR_AFTER_PNP); zd_chip_init_hw() 1144 r = read_fw_regs_offset(chip); zd_chip_init_hw() 1150 r = zd_iowrite32_locked(chip, 0, CR_GPI_EN); zd_chip_init_hw() 1153 r = zd_iowrite32_locked(chip, CWIN_SIZE, CR_CWMIN_CWMAX); zd_chip_init_hw() 1160 r = set_mandatory_rates(chip, 1); zd_chip_init_hw() 1165 r = disable_hwint(chip); zd_chip_init_hw() 1168 r = read_pod(chip, &rf_type); zd_chip_init_hw() 1171 r = hw_init(chip); zd_chip_init_hw() 1174 r = zd_rf_init_hw(&chip->rf, rf_type); zd_chip_init_hw() 1178 r = print_fw_version(chip); zd_chip_init_hw() 1183 dump_fw_registers(chip); zd_chip_init_hw() 1184 r = test_init(chip); zd_chip_init_hw() 1189 r = read_cal_int_tables(chip); zd_chip_init_hw() 1193 print_id(chip); zd_chip_init_hw() 1195 mutex_unlock(&chip->mutex); zd_chip_init_hw() 1199 static int update_pwr_int(struct zd_chip *chip, u8 channel) update_pwr_int() argument 1201 u8 value = chip->pwr_int_values[channel - 1]; update_pwr_int() 1202 return zd_iowrite16_locked(chip, value, ZD_CR31); update_pwr_int() 1205 static int update_pwr_cal(struct zd_chip *chip, u8 channel) update_pwr_cal() argument 1207 u8 value = chip->pwr_cal_values[channel-1]; update_pwr_cal() 1208 return zd_iowrite16_locked(chip, value, ZD_CR68); update_pwr_cal() 1211 static int update_ofdm_cal(struct zd_chip *chip, u8 channel) update_ofdm_cal() argument 1216 ioreqs[0].value = chip->ofdm_cal_values[OFDM_36M_INDEX][channel-1]; update_ofdm_cal() 1218 ioreqs[1].value = chip->ofdm_cal_values[OFDM_48M_INDEX][channel-1]; update_ofdm_cal() 1220 ioreqs[2].value = chip->ofdm_cal_values[OFDM_54M_INDEX][channel-1]; update_ofdm_cal() 1222 return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs)); update_ofdm_cal() 1225 static int update_channel_integration_and_calibration(struct zd_chip *chip, update_channel_integration_and_calibration() argument 1230 if (!zd_rf_should_update_pwr_int(&chip->rf)) update_channel_integration_and_calibration() 1233 r = update_pwr_int(chip, channel); update_channel_integration_and_calibration() 1236 if (zd_chip_is_zd1211b(chip)) { update_channel_integration_and_calibration() 1243 r = update_ofdm_cal(chip, channel); update_channel_integration_and_calibration() 1246 r = update_pwr_cal(chip, channel); update_channel_integration_and_calibration() 1249 r = zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs)); update_channel_integration_and_calibration() 1258 static int patch_cck_gain(struct zd_chip *chip) patch_cck_gain() argument 1263 if (!chip->patch_cck_gain || !zd_rf_should_patch_cck_gain(&chip->rf)) patch_cck_gain() 1266 ZD_ASSERT(mutex_is_locked(&chip->mutex)); patch_cck_gain() 1267 r = zd_ioread32_locked(chip, &value, E2P_PHY_REG); patch_cck_gain() 1270 dev_dbg_f(zd_chip_dev(chip), "patching value %x\n", value & 0xff); patch_cck_gain() 1271 return zd_iowrite16_locked(chip, value & 0xff, ZD_CR47); patch_cck_gain() 1274 int zd_chip_set_channel(struct zd_chip *chip, u8 channel) zd_chip_set_channel() argument 1278 mutex_lock(&chip->mutex); zd_chip_set_channel() 1279 r = zd_chip_lock_phy_regs(chip); zd_chip_set_channel() 1282 r = zd_rf_set_channel(&chip->rf, channel); zd_chip_set_channel() 1285 r = update_channel_integration_and_calibration(chip, channel); zd_chip_set_channel() 1288 r = patch_cck_gain(chip); zd_chip_set_channel() 1291 r = patch_6m_band_edge(chip, channel); zd_chip_set_channel() 1294 r = zd_iowrite32_locked(chip, 0, CR_CONFIG_PHILIPS); zd_chip_set_channel() 1296 t = zd_chip_unlock_phy_regs(chip); zd_chip_set_channel() 1300 mutex_unlock(&chip->mutex); zd_chip_set_channel() 1304 u8 zd_chip_get_channel(struct zd_chip *chip) zd_chip_get_channel() argument 1308 mutex_lock(&chip->mutex); zd_chip_get_channel() 1309 channel = chip->rf.channel; zd_chip_get_channel() 1310 mutex_unlock(&chip->mutex); zd_chip_get_channel() 1314 int zd_chip_control_leds(struct zd_chip *chip, enum led_status status) zd_chip_control_leds() argument 1317 fw_reg_addr(chip, FW_REG_LED_LINK_STATUS), zd_chip_control_leds() 1324 [0] = { fw_reg_addr(chip, FW_REG_LED_LINK_STATUS) }, zd_chip_control_leds() 1329 mutex_lock(&chip->mutex); zd_chip_control_leds() 1330 r = zd_ioread16v_locked(chip, v, (const zd_addr_t *)a, ARRAY_SIZE(a)); zd_chip_control_leds() 1334 other_led = chip->link_led == LED1 ? LED2 : LED1; zd_chip_control_leds() 1345 ioreqs[1].value &= ~chip->link_led; zd_chip_control_leds() 1347 ioreqs[1].value |= chip->link_led; zd_chip_control_leds() 1353 ioreqs[1].value |= chip->link_led; zd_chip_control_leds() 1361 r = zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs)); zd_chip_control_leds() 1367 mutex_unlock(&chip->mutex); zd_chip_control_leds() 1371 int zd_chip_set_basic_rates(struct zd_chip *chip, u16 cr_rates) zd_chip_set_basic_rates() argument 1378 mutex_lock(&chip->mutex); zd_chip_set_basic_rates() 1379 r = zd_iowrite32_locked(chip, cr_rates, CR_BASIC_RATE_TBL); zd_chip_set_basic_rates() 1380 mutex_unlock(&chip->mutex); zd_chip_set_basic_rates() 1424 int zd_chip_switch_radio_on(struct zd_chip *chip) zd_chip_switch_radio_on() argument 1428 mutex_lock(&chip->mutex); zd_chip_switch_radio_on() 1429 r = zd_switch_radio_on(&chip->rf); zd_chip_switch_radio_on() 1430 mutex_unlock(&chip->mutex); zd_chip_switch_radio_on() 1434 int zd_chip_switch_radio_off(struct zd_chip *chip) zd_chip_switch_radio_off() argument 1438 mutex_lock(&chip->mutex); zd_chip_switch_radio_off() 1439 r = zd_switch_radio_off(&chip->rf); zd_chip_switch_radio_off() 1440 mutex_unlock(&chip->mutex); zd_chip_switch_radio_off() 1444 int zd_chip_enable_int(struct zd_chip *chip) zd_chip_enable_int() argument 1448 mutex_lock(&chip->mutex); zd_chip_enable_int() 1449 r = zd_usb_enable_int(&chip->usb); zd_chip_enable_int() 1450 mutex_unlock(&chip->mutex); zd_chip_enable_int() 1454 void zd_chip_disable_int(struct zd_chip *chip) zd_chip_disable_int() argument 1456 mutex_lock(&chip->mutex); zd_chip_disable_int() 1457 zd_usb_disable_int(&chip->usb); zd_chip_disable_int() 1458 mutex_unlock(&chip->mutex); zd_chip_disable_int() 1461 cancel_work_sync(&zd_chip_to_mac(chip)->process_intr); zd_chip_disable_int() 1464 int zd_chip_enable_rxtx(struct zd_chip *chip) zd_chip_enable_rxtx() argument 1468 mutex_lock(&chip->mutex); zd_chip_enable_rxtx() 1469 zd_usb_enable_tx(&chip->usb); zd_chip_enable_rxtx() 1470 r = zd_usb_enable_rx(&chip->usb); zd_chip_enable_rxtx() 1471 zd_tx_watchdog_enable(&chip->usb); zd_chip_enable_rxtx() 1472 mutex_unlock(&chip->mutex); zd_chip_enable_rxtx() 1476 void zd_chip_disable_rxtx(struct zd_chip *chip) zd_chip_disable_rxtx() argument 1478 mutex_lock(&chip->mutex); zd_chip_disable_rxtx() 1479 zd_tx_watchdog_disable(&chip->usb); zd_chip_disable_rxtx() 1480 zd_usb_disable_rx(&chip->usb); zd_chip_disable_rxtx() 1481 zd_usb_disable_tx(&chip->usb); zd_chip_disable_rxtx() 1482 mutex_unlock(&chip->mutex); zd_chip_disable_rxtx() 1485 int zd_rfwritev_locked(struct zd_chip *chip, zd_rfwritev_locked() argument 1492 r = zd_rfwrite_locked(chip, values[i], bits); zd_rfwritev_locked() 1504 int zd_rfwrite_cr_locked(struct zd_chip *chip, u32 value) zd_rfwrite_cr_locked() argument 1511 ZD_ASSERT(mutex_is_locked(&chip->mutex)); zd_rfwrite_cr_locked() 1512 return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs)); zd_rfwrite_cr_locked() 1515 int zd_rfwritev_cr_locked(struct zd_chip *chip, zd_rfwritev_cr_locked() argument 1522 r = zd_rfwrite_cr_locked(chip, values[i]); zd_rfwritev_cr_locked() 1530 int zd_chip_set_multicast_hash(struct zd_chip *chip, zd_chip_set_multicast_hash() argument 1538 return zd_iowrite32a(chip, ioreqs, ARRAY_SIZE(ioreqs)); zd_chip_set_multicast_hash() 1541 u64 zd_chip_get_tsf(struct zd_chip *chip) zd_chip_get_tsf() argument 1549 mutex_lock(&chip->mutex); zd_chip_get_tsf() 1550 r = zd_ioread32v_locked(chip, values, (const zd_addr_t *)aw_pt_bi_addr, zd_chip_get_tsf() 1552 mutex_unlock(&chip->mutex); zd_chip_get_tsf()
H A D	zd_rf_al7230b.c	74 static int zd1211b_al7230b_finalize(struct zd_chip *chip) zd1211b_al7230b_finalize() argument 85 r = zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs)); zd1211b_al7230b_finalize() 89 if (chip->new_phy_layout) { zd1211b_al7230b_finalize() 91 r = zd_iowrite16_locked(chip, 0xe5, ZD_CR9); zd1211b_al7230b_finalize() 96 return zd_iowrite16_locked(chip, 0x04, ZD_CR203); zd1211b_al7230b_finalize() 102 struct zd_chip *chip = zd_rf_to_chip(rf); zd1211_al7230b_init_hw() local 170 r = zd_iowrite16a_locked(chip, ioreqs_1, ARRAY_SIZE(ioreqs_1)); zd1211_al7230b_init_hw() 174 r = zd_rfwritev_cr_locked(chip, chan_rv[0], ARRAY_SIZE(chan_rv[0])); zd1211_al7230b_init_hw() 178 r = zd_rfwritev_cr_locked(chip, std_rv, ARRAY_SIZE(std_rv)); zd1211_al7230b_init_hw() 182 r = zd_rfwritev_cr_locked(chip, rv_init1, ARRAY_SIZE(rv_init1)); zd1211_al7230b_init_hw() 186 r = zd_iowrite16a_locked(chip, ioreqs_2, ARRAY_SIZE(ioreqs_2)); zd1211_al7230b_init_hw() 190 r = zd_rfwritev_cr_locked(chip, rv_init2, ARRAY_SIZE(rv_init2)); zd1211_al7230b_init_hw() 194 r = zd_iowrite16_locked(chip, 0x06, ZD_CR203); zd1211_al7230b_init_hw() 197 r = zd_iowrite16_locked(chip, 0x80, ZD_CR240); zd1211_al7230b_init_hw() 207 struct zd_chip *chip = zd_rf_to_chip(rf); zd1211b_al7230b_init_hw() local 285 r = zd_iowrite16a_locked(chip, ioreqs_1, ARRAY_SIZE(ioreqs_1)); zd1211b_al7230b_init_hw() 289 if (chip->new_phy_layout) zd1211b_al7230b_init_hw() 290 r = zd_iowrite16a_locked(chip, ioreqs_new_phy, zd1211b_al7230b_init_hw() 293 r = zd_iowrite16a_locked(chip, ioreqs_old_phy, zd1211b_al7230b_init_hw() 298 r = zd_iowrite16a_locked(chip, ioreqs_2, ARRAY_SIZE(ioreqs_2)); zd1211b_al7230b_init_hw() 302 r = zd_rfwritev_cr_locked(chip, chan_rv[0], ARRAY_SIZE(chan_rv[0])); zd1211b_al7230b_init_hw() 306 r = zd_rfwritev_cr_locked(chip, std_rv, ARRAY_SIZE(std_rv)); zd1211b_al7230b_init_hw() 310 r = zd_rfwritev_cr_locked(chip, rv_init1, ARRAY_SIZE(rv_init1)); zd1211b_al7230b_init_hw() 314 r = zd_iowrite16a_locked(chip, ioreqs_3, ARRAY_SIZE(ioreqs_3)); zd1211b_al7230b_init_hw() 318 r = zd_rfwritev_cr_locked(chip, rv_init2, ARRAY_SIZE(rv_init2)); zd1211b_al7230b_init_hw() 322 return zd1211b_al7230b_finalize(chip); zd1211b_al7230b_init_hw() 329 struct zd_chip *chip = zd_rf_to_chip(rf); zd1211_al7230b_set_channel() local 337 r = zd_iowrite16_locked(chip, 0x57, ZD_CR240); zd1211_al7230b_set_channel() 342 r = zd_iowrite16_locked(chip, 0x2f, ZD_CR251); zd1211_al7230b_set_channel() 346 r = zd_rfwritev_cr_locked(chip, std_rv, ARRAY_SIZE(std_rv)); zd1211_al7230b_set_channel() 350 r = zd_rfwrite_cr_locked(chip, 0x3c9000); zd1211_al7230b_set_channel() 353 r = zd_rfwrite_cr_locked(chip, 0xf15d58); zd1211_al7230b_set_channel() 357 r = zd_iowrite16a_locked(chip, ioreqs_sw, ARRAY_SIZE(ioreqs_sw)); zd1211_al7230b_set_channel() 361 r = zd_rfwritev_cr_locked(chip, rv, 2); zd1211_al7230b_set_channel() 365 r = zd_rfwrite_cr_locked(chip, 0x3c9000); zd1211_al7230b_set_channel() 369 return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs)); zd1211_al7230b_set_channel() 376 struct zd_chip *chip = zd_rf_to_chip(rf); zd1211b_al7230b_set_channel() local 378 r = zd_iowrite16_locked(chip, 0x57, ZD_CR240); zd1211b_al7230b_set_channel() 381 r = zd_iowrite16_locked(chip, 0xe4, ZD_CR9); zd1211b_al7230b_set_channel() 386 r = zd_iowrite16_locked(chip, 0x2f, ZD_CR251); zd1211b_al7230b_set_channel() 389 r = zd_rfwritev_cr_locked(chip, std_rv, ARRAY_SIZE(std_rv)); zd1211b_al7230b_set_channel() 393 r = zd_rfwrite_cr_locked(chip, 0x3c9000); zd1211b_al7230b_set_channel() 396 r = zd_rfwrite_cr_locked(chip, 0xf15d58); zd1211b_al7230b_set_channel() 400 r = zd_iowrite16a_locked(chip, ioreqs_sw, ARRAY_SIZE(ioreqs_sw)); zd1211b_al7230b_set_channel() 404 r = zd_rfwritev_cr_locked(chip, rv, 2); zd1211b_al7230b_set_channel() 408 r = zd_rfwrite_cr_locked(chip, 0x3c9000); zd1211b_al7230b_set_channel() 412 r = zd_iowrite16_locked(chip, 0x7f, ZD_CR251); zd1211b_al7230b_set_channel() 416 return zd1211b_al7230b_finalize(chip); zd1211b_al7230b_set_channel() 421 struct zd_chip *chip = zd_rf_to_chip(rf); zd1211_al7230b_switch_radio_on() local 427 return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs)); zd1211_al7230b_switch_radio_on() 432 struct zd_chip *chip = zd_rf_to_chip(rf); zd1211b_al7230b_switch_radio_on() local 438 return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs)); zd1211b_al7230b_switch_radio_on() 443 struct zd_chip *chip = zd_rf_to_chip(rf); al7230b_switch_radio_off() local 449 return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs)); al7230b_switch_radio_off() 456 struct zd_chip *chip = zd_rf_to_chip(rf); zd1211b_al7230b_patch_6m() local 470 dev_dbg_f(zd_chip_dev(chip), "patching for channel %d\n", channel); zd1211b_al7230b_patch_6m() 471 return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs)); zd1211b_al7230b_patch_6m() 476 struct zd_chip *chip = zd_rf_to_chip(rf); zd_rf_init_al7230b() local 478 if (zd_chip_is_zd1211b(chip)) { zd_rf_init_al7230b()
/linux-4.1.27/sound/pci/hda/
H A D	hda_controller.c	55 static void azx_stream_start(struct azx *chip, struct azx_dev *azx_dev) azx_stream_start() argument 63 azx_writel(chip, INTCTL, azx_stream_start() 64 azx_readl(chip, INTCTL) | (1 << azx_dev->index)); azx_stream_start() 66 azx_sd_writeb(chip, azx_dev, SD_CTL, azx_stream_start() 67 azx_sd_readb(chip, azx_dev, SD_CTL) | azx_stream_start() 72 static void azx_stream_clear(struct azx *chip, struct azx_dev *azx_dev) azx_stream_clear() argument 74 azx_sd_writeb(chip, azx_dev, SD_CTL, azx_stream_clear() 75 azx_sd_readb(chip, azx_dev, SD_CTL) & azx_stream_clear() 77 azx_sd_writeb(chip, azx_dev, SD_STS, SD_INT_MASK); /* to be sure */ azx_stream_clear() 81 void azx_stream_stop(struct azx *chip, struct azx_dev *azx_dev) azx_stream_stop() argument 83 azx_stream_clear(chip, azx_dev); azx_stream_stop() 85 azx_writel(chip, INTCTL, azx_stream_stop() 86 azx_readl(chip, INTCTL) & ~(1 << azx_dev->index)); azx_stream_stop() 91 static void azx_stream_reset(struct azx *chip, struct azx_dev *azx_dev) azx_stream_reset() argument 96 azx_stream_clear(chip, azx_dev); azx_stream_reset() 98 azx_sd_writeb(chip, azx_dev, SD_CTL, azx_stream_reset() 99 azx_sd_readb(chip, azx_dev, SD_CTL) | azx_stream_reset() 103 while (!((val = azx_sd_readb(chip, azx_dev, SD_CTL)) & azx_stream_reset() 107 azx_sd_writeb(chip, azx_dev, SD_CTL, val); azx_stream_reset() 112 while (((val = azx_sd_readb(chip, azx_dev, SD_CTL)) & azx_stream_reset() 123 static int azx_setup_controller(struct azx *chip, struct azx_dev *azx_dev) azx_setup_controller() argument 127 azx_stream_clear(chip, azx_dev); azx_setup_controller() 129 val = azx_sd_readl(chip, azx_dev, SD_CTL); azx_setup_controller() 132 if (!azx_snoop(chip)) azx_setup_controller() 134 azx_sd_writel(chip, azx_dev, SD_CTL, val); azx_setup_controller() 137 azx_sd_writel(chip, azx_dev, SD_CBL, azx_dev->bufsize); azx_setup_controller() 141 azx_sd_writew(chip, azx_dev, SD_FORMAT, azx_dev->format_val); azx_setup_controller() 144 azx_sd_writew(chip, azx_dev, SD_LVI, azx_dev->frags - 1); azx_setup_controller() 148 azx_sd_writel(chip, azx_dev, SD_BDLPL, (u32)azx_dev->bdl.addr); azx_setup_controller() 150 azx_sd_writel(chip, azx_dev, SD_BDLPU, azx_setup_controller() 154 if (chip->get_position[0] != azx_get_pos_lpib || azx_setup_controller() 155 chip->get_position[1] != azx_get_pos_lpib) { azx_setup_controller() 156 if (!(azx_readl(chip, DPLBASE) & AZX_DPLBASE_ENABLE)) azx_setup_controller() 157 azx_writel(chip, DPLBASE, azx_setup_controller() 158 (u32)chip->posbuf.addr | AZX_DPLBASE_ENABLE); azx_setup_controller() 162 azx_sd_writel(chip, azx_dev, SD_CTL, azx_setup_controller() 163 azx_sd_readl(chip, azx_dev, SD_CTL) | SD_INT_MASK); azx_setup_controller() 170 azx_assign_device(struct azx *chip, struct snd_pcm_substream *substream) azx_assign_device() argument 179 dev = chip->playback_index_offset; azx_assign_device() 180 nums = chip->playback_streams; azx_assign_device() 182 dev = chip->capture_index_offset; azx_assign_device() 183 nums = chip->capture_streams; azx_assign_device() 186 struct azx_dev *azx_dev = &chip->azx_dev[dev]; azx_assign_device() 196 (chip->driver_caps & AZX_DCAPS_REVERSE_ASSIGN)) azx_assign_device() 221 struct azx *chip = apcm->chip; azx_cc_read() local 223 return azx_readl(chip, WALLCLK); azx_cc_read() 290 static int setup_bdle(struct azx *chip, setup_bdle() argument 311 if (chip->driver_caps & AZX_DCAPS_4K_BDLE_BOUNDARY) { setup_bdle() 333 static int azx_setup_periods(struct azx *chip, azx_setup_periods() argument 342 azx_sd_writel(chip, azx_dev, SD_BDLPL, 0); azx_setup_periods() 343 azx_sd_writel(chip, azx_dev, SD_BDLPU, 0); azx_setup_periods() 353 if (chip->bdl_pos_adj) azx_setup_periods() 354 pos_adj = chip->bdl_pos_adj[chip->dev_index]; azx_setup_periods() 366 dev_warn(chip->card->dev,"Too big adjustment %d\n", azx_setup_periods() 370 ofs = setup_bdle(chip, snd_pcm_get_dma_buf(substream), azx_setup_periods() 381 ofs = setup_bdle(chip, snd_pcm_get_dma_buf(substream), azx_setup_periods() 385 ofs = setup_bdle(chip, snd_pcm_get_dma_buf(substream), azx_setup_periods() 395 dev_err(chip->card->dev, "Too many BDL entries: buffer=%d, period=%d\n", azx_setup_periods() 408 struct azx *chip = apcm->chip; azx_pcm_close() local 412 mutex_lock(&chip->open_mutex); azx_pcm_close() 413 spin_lock_irqsave(&chip->reg_lock, flags); azx_pcm_close() 416 spin_unlock_irqrestore(&chip->reg_lock, flags); azx_pcm_close() 421 mutex_unlock(&chip->open_mutex); azx_pcm_close() 430 struct azx *chip = apcm->chip; azx_pcm_hw_params() local 439 ret = chip->ops->substream_alloc_pages(chip, substream, azx_pcm_hw_params() 450 struct azx *chip = apcm->chip; azx_pcm_hw_free() local 457 azx_sd_writel(chip, azx_dev, SD_BDLPL, 0); azx_pcm_hw_free() 458 azx_sd_writel(chip, azx_dev, SD_BDLPU, 0); azx_pcm_hw_free() 459 azx_sd_writel(chip, azx_dev, SD_CTL, 0); azx_pcm_hw_free() 467 err = chip->ops->substream_free_pages(chip, substream); azx_pcm_hw_free() 476 struct azx *chip = apcm->chip; azx_pcm_prepare() local 492 azx_stream_reset(chip, azx_dev); azx_pcm_prepare() 500 dev_err(chip->card->dev, azx_pcm_prepare() 510 dev_dbg(chip->card->dev, "azx_pcm_prepare: bufsize=0x%x, format=0x%x\n", azx_pcm_prepare() 521 err = azx_setup_periods(chip, substream, azx_dev); azx_pcm_prepare() 538 azx_setup_controller(chip, azx_dev); azx_pcm_prepare() 541 azx_sd_readw(chip, azx_dev, SD_FIFOSIZE) + 1; azx_pcm_prepare() 547 if ((chip->driver_caps & AZX_DCAPS_CTX_WORKAROUND) && azx_pcm_prepare() 548 stream_tag > chip->capture_streams) azx_pcm_prepare() 549 stream_tag -= chip->capture_streams; azx_pcm_prepare() 563 struct azx *chip = apcm->chip; azx_pcm_trigger() local 570 trace_azx_pcm_trigger(chip, azx_dev, cmd); azx_pcm_trigger() 600 spin_lock(&chip->reg_lock); 603 if (chip->driver_caps & AZX_DCAPS_OLD_SSYNC) 604 azx_writel(chip, OLD_SSYNC, 605 azx_readl(chip, OLD_SSYNC) | sbits); 607 azx_writel(chip, SSYNC, azx_readl(chip, SSYNC) | sbits); 614 azx_dev->start_wallclk = azx_readl(chip, WALLCLK); snd_pcm_group_for_each_entry() 618 azx_stream_start(chip, azx_dev); snd_pcm_group_for_each_entry() 620 azx_stream_stop(chip, azx_dev); snd_pcm_group_for_each_entry() 624 spin_unlock(&chip->reg_lock); 633 if (!(azx_sd_readb(chip, azx_dev, SD_STS) & snd_pcm_group_for_each_entry() 649 if (azx_sd_readb(chip, azx_dev, SD_CTL) & snd_pcm_group_for_each_entry() 658 spin_lock(&chip->reg_lock); 660 if (chip->driver_caps & AZX_DCAPS_OLD_SSYNC) 661 azx_writel(chip, OLD_SSYNC, 662 azx_readl(chip, OLD_SSYNC) & ~sbits); 664 azx_writel(chip, SSYNC, azx_readl(chip, SSYNC) & ~sbits); 684 spin_unlock(&chip->reg_lock); 688 unsigned int azx_get_pos_lpib(struct azx *chip, struct azx_dev *azx_dev) azx_get_pos_lpib() argument 690 return azx_sd_readl(chip, azx_dev, SD_LPIB); azx_get_pos_lpib() 694 unsigned int azx_get_pos_posbuf(struct azx *chip, struct azx_dev *azx_dev) azx_get_pos_posbuf() argument 700 unsigned int azx_get_position(struct azx *chip, azx_get_position() argument 708 if (chip->get_position[stream]) azx_get_position() 709 pos = chip->get_position[stream](chip, azx_dev); azx_get_position() 711 pos = azx_get_pos_posbuf(chip, azx_dev); azx_get_position() 720 if (chip->get_delay[stream]) azx_get_position() 721 delay += chip->get_delay[stream](chip, azx_dev, pos); azx_get_position() 728 trace_azx_get_position(chip, azx_dev, pos, delay); azx_get_position() 736 struct azx *chip = apcm->chip; azx_pcm_pointer() local 739 azx_get_position(chip, azx_dev)); azx_pcm_pointer() 802 struct azx *chip = apcm->chip; azx_pcm_open() local 810 mutex_lock(&chip->open_mutex); azx_pcm_open() 811 azx_dev = azx_assign_device(chip, substream); azx_pcm_open() 829 if (chip->align_buffer_size) azx_pcm_open() 877 spin_lock_irqsave(&chip->reg_lock, flags); azx_pcm_open() 880 spin_unlock_irqrestore(&chip->reg_lock, flags); azx_pcm_open() 884 mutex_unlock(&chip->open_mutex); azx_pcm_open() 890 mutex_unlock(&chip->open_mutex); azx_pcm_open() 899 struct azx *chip = apcm->chip; azx_pcm_mmap() local 900 if (chip->ops->pcm_mmap_prepare) azx_pcm_mmap() 901 chip->ops->pcm_mmap_prepare(substream, area); azx_pcm_mmap() 934 struct azx *chip = bus->private_data; azx_attach_pcm_stream() local 941 list_for_each_entry(apcm, &chip->pcm_list, list) { azx_attach_pcm_stream() 943 dev_err(chip->card->dev, "PCM %d already exists\n", azx_attach_pcm_stream() 948 err = snd_pcm_new(chip->card, cpcm->name, pcm_dev, azx_attach_pcm_stream() 958 apcm->chip = chip; azx_attach_pcm_stream() 966 list_add_tail(&apcm->list, &chip->pcm_list); azx_attach_pcm_stream() 977 chip->card->dev, azx_attach_pcm_stream() 985 static int azx_alloc_cmd_io(struct azx *chip) azx_alloc_cmd_io() argument 988 return chip->ops->dma_alloc_pages(chip, SNDRV_DMA_TYPE_DEV, azx_alloc_cmd_io() 989 PAGE_SIZE, &chip->rb); azx_alloc_cmd_io() 992 static void azx_init_cmd_io(struct azx *chip) azx_init_cmd_io() argument 996 spin_lock_irq(&chip->reg_lock); azx_init_cmd_io() 998 chip->corb.addr = chip->rb.addr; azx_init_cmd_io() 999 chip->corb.buf = (u32 *)chip->rb.area; azx_init_cmd_io() 1000 azx_writel(chip, CORBLBASE, (u32)chip->corb.addr); azx_init_cmd_io() 1001 azx_writel(chip, CORBUBASE, upper_32_bits(chip->corb.addr)); azx_init_cmd_io() 1004 azx_writeb(chip, CORBSIZE, 0x02); azx_init_cmd_io() 1006 azx_writew(chip, CORBWP, 0); azx_init_cmd_io() 1009 azx_writew(chip, CORBRP, AZX_CORBRP_RST); azx_init_cmd_io() 1010 if (!(chip->driver_caps & AZX_DCAPS_CORBRP_SELF_CLEAR)) { azx_init_cmd_io() 1012 if ((azx_readw(chip, CORBRP) & AZX_CORBRP_RST) == AZX_CORBRP_RST) azx_init_cmd_io() 1017 dev_err(chip->card->dev, "CORB reset timeout#1, CORBRP = %d\n", azx_init_cmd_io() 1018 azx_readw(chip, CORBRP)); azx_init_cmd_io() 1020 azx_writew(chip, CORBRP, 0); azx_init_cmd_io() 1022 if (azx_readw(chip, CORBRP) == 0) azx_init_cmd_io() 1027 dev_err(chip->card->dev, "CORB reset timeout#2, CORBRP = %d\n", azx_init_cmd_io() 1028 azx_readw(chip, CORBRP)); azx_init_cmd_io() 1032 azx_writeb(chip, CORBCTL, AZX_CORBCTL_RUN); azx_init_cmd_io() 1035 chip->rirb.addr = chip->rb.addr + 2048; azx_init_cmd_io() 1036 chip->rirb.buf = (u32 *)(chip->rb.area + 2048); azx_init_cmd_io() 1037 chip->rirb.wp = chip->rirb.rp = 0; azx_init_cmd_io() 1038 memset(chip->rirb.cmds, 0, sizeof(chip->rirb.cmds)); azx_init_cmd_io() 1039 azx_writel(chip, RIRBLBASE, (u32)chip->rirb.addr); azx_init_cmd_io() 1040 azx_writel(chip, RIRBUBASE, upper_32_bits(chip->rirb.addr)); azx_init_cmd_io() 1043 azx_writeb(chip, RIRBSIZE, 0x02); azx_init_cmd_io() 1045 azx_writew(chip, RIRBWP, AZX_RIRBWP_RST); azx_init_cmd_io() 1047 if (chip->driver_caps & AZX_DCAPS_CTX_WORKAROUND) azx_init_cmd_io() 1048 azx_writew(chip, RINTCNT, 0xc0); azx_init_cmd_io() 1050 azx_writew(chip, RINTCNT, 1); azx_init_cmd_io() 1052 azx_writeb(chip, RIRBCTL, AZX_RBCTL_DMA_EN | AZX_RBCTL_IRQ_EN); azx_init_cmd_io() 1053 spin_unlock_irq(&chip->reg_lock); azx_init_cmd_io() 1056 static void azx_free_cmd_io(struct azx *chip) azx_free_cmd_io() argument 1058 spin_lock_irq(&chip->reg_lock); azx_free_cmd_io() 1060 azx_writeb(chip, RIRBCTL, 0); azx_free_cmd_io() 1061 azx_writeb(chip, CORBCTL, 0); azx_free_cmd_io() 1062 spin_unlock_irq(&chip->reg_lock); azx_free_cmd_io() 1080 struct azx *chip = bus->private_data; azx_corb_send_cmd() local 1084 spin_lock_irq(&chip->reg_lock); azx_corb_send_cmd() 1087 wp = azx_readw(chip, CORBWP); azx_corb_send_cmd() 1090 spin_unlock_irq(&chip->reg_lock); azx_corb_send_cmd() 1096 rp = azx_readw(chip, CORBRP); azx_corb_send_cmd() 1099 spin_unlock_irq(&chip->reg_lock); azx_corb_send_cmd() 1103 chip->rirb.cmds[addr]++; azx_corb_send_cmd() 1104 chip->corb.buf[wp] = cpu_to_le32(val); azx_corb_send_cmd() 1105 azx_writew(chip, CORBWP, wp); azx_corb_send_cmd() 1107 spin_unlock_irq(&chip->reg_lock); azx_corb_send_cmd() 1115 static void azx_update_rirb(struct azx *chip) azx_update_rirb() argument 1121 wp = azx_readw(chip, RIRBWP); azx_update_rirb() 1127 if (wp == chip->rirb.wp) azx_update_rirb() 1129 chip->rirb.wp = wp; azx_update_rirb() 1131 while (chip->rirb.rp != wp) { azx_update_rirb() 1132 chip->rirb.rp++; azx_update_rirb() 1133 chip->rirb.rp %= AZX_MAX_RIRB_ENTRIES; azx_update_rirb() 1135 rp = chip->rirb.rp << 1; /* an RIRB entry is 8-bytes */ azx_update_rirb() 1136 res_ex = le32_to_cpu(chip->rirb.buf[rp + 1]); azx_update_rirb() 1137 res = le32_to_cpu(chip->rirb.buf[rp]); azx_update_rirb() 1139 if ((addr >= AZX_MAX_CODECS) || !(chip->codec_mask & (1 << addr))) { azx_update_rirb() 1140 dev_err(chip->card->dev, "spurious response %#x:%#x, rp = %d, wp = %d", azx_update_rirb() 1142 chip->rirb.rp, wp); azx_update_rirb() 1145 snd_hda_queue_unsol_event(chip->bus, res, res_ex); azx_update_rirb() 1146 else if (chip->rirb.cmds[addr]) { azx_update_rirb() 1147 chip->rirb.res[addr] = res; azx_update_rirb() 1149 chip->rirb.cmds[addr]--; azx_update_rirb() 1151 dev_err(chip->card->dev, "spurious response %#x:%#x, last cmd=%#08x\n", azx_update_rirb() 1153 chip->last_cmd[addr]); azx_update_rirb() 1162 struct azx *chip = bus->private_data; azx_rirb_get_response() local 1171 if (chip->polling_mode || do_poll) { azx_rirb_get_response() 1172 spin_lock_irq(&chip->reg_lock); azx_rirb_get_response() 1173 azx_update_rirb(chip); azx_rirb_get_response() 1174 spin_unlock_irq(&chip->reg_lock); azx_rirb_get_response() 1176 if (!chip->rirb.cmds[addr]) { azx_rirb_get_response() 1181 chip->poll_count = 0; azx_rirb_get_response() 1182 return chip->rirb.res[addr]; /* the last value */ azx_rirb_get_response() 1197 if (!chip->polling_mode && chip->poll_count < 2) { azx_rirb_get_response() 1198 dev_dbg(chip->card->dev, azx_rirb_get_response() 1200 chip->last_cmd[addr]); azx_rirb_get_response() 1202 chip->poll_count++; azx_rirb_get_response() 1207 if (!chip->polling_mode) { azx_rirb_get_response() 1208 dev_warn(chip->card->dev, azx_rirb_get_response() 1210 chip->last_cmd[addr]); azx_rirb_get_response() 1211 chip->polling_mode = 1; azx_rirb_get_response() 1215 if (chip->msi) { azx_rirb_get_response() 1216 dev_warn(chip->card->dev, azx_rirb_get_response() 1218 chip->last_cmd[addr]); azx_rirb_get_response() 1219 if (chip->ops->disable_msi_reset_irq(chip) && azx_rirb_get_response() 1220 chip->ops->disable_msi_reset_irq(chip) < 0) { azx_rirb_get_response() 1227 if (chip->probing) { azx_rirb_get_response() 1244 dev_err(chip->card->dev, azx_rirb_get_response() 1246 chip->last_cmd[addr]); azx_rirb_get_response() 1247 chip->single_cmd = 1; azx_rirb_get_response() 1250 azx_free_cmd_io(chip); azx_rirb_get_response() 1252 azx_writel(chip, GCTL, azx_readl(chip, GCTL) & ~AZX_GCTL_UNSOL); azx_rirb_get_response() 1267 static int azx_single_wait_for_response(struct azx *chip, unsigned int addr) azx_single_wait_for_response() argument 1273 if (azx_readw(chip, IRS) & AZX_IRS_VALID) { azx_single_wait_for_response() 1275 chip->rirb.res[addr] = azx_readl(chip, IR); azx_single_wait_for_response() 1281 dev_dbg(chip->card->dev, "get_response timeout: IRS=0x%x\n", azx_single_wait_for_response() 1282 azx_readw(chip, IRS)); azx_single_wait_for_response() 1283 chip->rirb.res[addr] = -1; azx_single_wait_for_response() 1290 struct azx *chip = bus->private_data; azx_single_send_cmd() local 1297 if (!((azx_readw(chip, IRS) & AZX_IRS_BUSY))) { azx_single_send_cmd() 1299 azx_writew(chip, IRS, azx_readw(chip, IRS) | azx_single_send_cmd() 1301 azx_writel(chip, IC, val); azx_single_send_cmd() 1302 azx_writew(chip, IRS, azx_readw(chip, IRS) | azx_single_send_cmd() 1304 return azx_single_wait_for_response(chip, addr); azx_single_send_cmd() 1309 dev_dbg(chip->card->dev, azx_single_send_cmd() 1311 azx_readw(chip, IRS), val); azx_single_send_cmd() 1319 struct azx *chip = bus->private_data; azx_single_get_response() local 1320 return chip->rirb.res[addr]; azx_single_get_response() 1327 * current setting of chip->single_cmd. 1333 struct azx *chip = bus->private_data; azx_send_cmd() local 1335 if (chip->disabled) azx_send_cmd() 1337 chip->last_cmd[azx_command_addr(val)] = val; azx_send_cmd() 1338 if (chip->single_cmd) azx_send_cmd() 1348 struct azx *chip = bus->private_data; azx_get_response() local 1349 if (chip->disabled) azx_get_response() 1351 if (chip->single_cmd) azx_get_response() 1364 azx_get_dsp_loader_dev(struct azx *chip) azx_get_dsp_loader_dev() argument 1366 return &chip->azx_dev[chip->playback_index_offset]; azx_get_dsp_loader_dev() 1374 struct azx *chip = bus->private_data; azx_load_dsp_prepare() local 1378 azx_dev = azx_get_dsp_loader_dev(chip); azx_load_dsp_prepare() 1381 spin_lock_irq(&chip->reg_lock); azx_load_dsp_prepare() 1383 spin_unlock_irq(&chip->reg_lock); azx_load_dsp_prepare() 1388 chip->saved_azx_dev = *azx_dev; azx_load_dsp_prepare() 1390 spin_unlock_irq(&chip->reg_lock); azx_load_dsp_prepare() 1392 err = chip->ops->dma_alloc_pages(chip, SNDRV_DMA_TYPE_DEV_SG, azx_load_dsp_prepare() 1401 azx_stream_reset(chip, azx_dev); azx_load_dsp_prepare() 1404 azx_sd_writel(chip, azx_dev, SD_BDLPL, 0); azx_load_dsp_prepare() 1405 azx_sd_writel(chip, azx_dev, SD_BDLPU, 0); azx_load_dsp_prepare() 1409 err = setup_bdle(chip, bufp, azx_dev, &bdl, 0, byte_size, 0); azx_load_dsp_prepare() 1413 azx_setup_controller(chip, azx_dev); azx_load_dsp_prepare() 1418 chip->ops->dma_free_pages(chip, bufp); azx_load_dsp_prepare() 1420 spin_lock_irq(&chip->reg_lock); azx_load_dsp_prepare() 1422 *azx_dev = chip->saved_azx_dev; azx_load_dsp_prepare() 1424 spin_unlock_irq(&chip->reg_lock); azx_load_dsp_prepare() 1432 struct azx *chip = bus->private_data; azx_load_dsp_trigger() local 1433 struct azx_dev *azx_dev = azx_get_dsp_loader_dev(chip); azx_load_dsp_trigger() 1436 azx_stream_start(chip, azx_dev); azx_load_dsp_trigger() 1438 azx_stream_stop(chip, azx_dev); azx_load_dsp_trigger() 1445 struct azx *chip = bus->private_data; azx_load_dsp_cleanup() local 1446 struct azx_dev *azx_dev = azx_get_dsp_loader_dev(chip); azx_load_dsp_cleanup() 1453 azx_sd_writel(chip, azx_dev, SD_BDLPL, 0); azx_load_dsp_cleanup() 1454 azx_sd_writel(chip, azx_dev, SD_BDLPU, 0); azx_load_dsp_cleanup() 1455 azx_sd_writel(chip, azx_dev, SD_CTL, 0); azx_load_dsp_cleanup() 1460 chip->ops->dma_free_pages(chip, dmab); azx_load_dsp_cleanup() 1463 spin_lock_irq(&chip->reg_lock); azx_load_dsp_cleanup() 1465 *azx_dev = chip->saved_azx_dev; azx_load_dsp_cleanup() 1467 spin_unlock_irq(&chip->reg_lock); azx_load_dsp_cleanup() 1472 int azx_alloc_stream_pages(struct azx *chip) azx_alloc_stream_pages() argument 1476 for (i = 0; i < chip->num_streams; i++) { azx_alloc_stream_pages() 1477 dsp_lock_init(&chip->azx_dev[i]); azx_alloc_stream_pages() 1479 err = chip->ops->dma_alloc_pages(chip, SNDRV_DMA_TYPE_DEV, azx_alloc_stream_pages() 1481 &chip->azx_dev[i].bdl); azx_alloc_stream_pages() 1486 err = chip->ops->dma_alloc_pages(chip, SNDRV_DMA_TYPE_DEV, azx_alloc_stream_pages() 1487 chip->num_streams * 8, &chip->posbuf); azx_alloc_stream_pages() 1492 err = azx_alloc_cmd_io(chip); azx_alloc_stream_pages() 1499 void azx_free_stream_pages(struct azx *chip) azx_free_stream_pages() argument 1502 if (chip->azx_dev) { azx_free_stream_pages() 1503 for (i = 0; i < chip->num_streams; i++) azx_free_stream_pages() 1504 if (chip->azx_dev[i].bdl.area) azx_free_stream_pages() 1505 chip->ops->dma_free_pages( azx_free_stream_pages() 1506 chip, &chip->azx_dev[i].bdl); azx_free_stream_pages() 1508 if (chip->rb.area) azx_free_stream_pages() 1509 chip->ops->dma_free_pages(chip, &chip->rb); azx_free_stream_pages() 1510 if (chip->posbuf.area) azx_free_stream_pages() 1511 chip->ops->dma_free_pages(chip, &chip->posbuf); azx_free_stream_pages() 1520 void azx_enter_link_reset(struct azx *chip) azx_enter_link_reset() argument 1525 azx_writel(chip, GCTL, azx_readl(chip, GCTL) & ~AZX_GCTL_RESET); azx_enter_link_reset() 1528 while ((azx_readb(chip, GCTL) & AZX_GCTL_RESET) && azx_enter_link_reset() 1535 static void azx_exit_link_reset(struct azx *chip) azx_exit_link_reset() argument 1539 azx_writeb(chip, GCTL, azx_readb(chip, GCTL) | AZX_GCTL_RESET); azx_exit_link_reset() 1542 while (!azx_readb(chip, GCTL) && azx_exit_link_reset() 1548 static int azx_reset(struct azx *chip, bool full_reset) azx_reset() argument 1554 azx_writew(chip, STATESTS, STATESTS_INT_MASK); azx_reset() 1557 azx_enter_link_reset(chip); azx_reset() 1565 azx_exit_link_reset(chip); azx_reset() 1572 if (!azx_readb(chip, GCTL)) { azx_reset() 1573 dev_dbg(chip->card->dev, "azx_reset: controller not ready!\n"); azx_reset() 1578 if (!chip->single_cmd) azx_reset() 1579 azx_writel(chip, GCTL, azx_readl(chip, GCTL) | azx_reset() 1583 if (!chip->codec_mask) { azx_reset() 1584 chip->codec_mask = azx_readw(chip, STATESTS); azx_reset() 1585 dev_dbg(chip->card->dev, "codec_mask = 0x%x\n", azx_reset() 1586 chip->codec_mask); azx_reset() 1593 static void azx_int_enable(struct azx *chip) azx_int_enable() argument 1596 azx_writel(chip, INTCTL, azx_readl(chip, INTCTL) | azx_int_enable() 1601 static void azx_int_disable(struct azx *chip) azx_int_disable() argument 1606 for (i = 0; i < chip->num_streams; i++) { azx_int_disable() 1607 struct azx_dev *azx_dev = &chip->azx_dev[i]; azx_int_disable() 1608 azx_sd_writeb(chip, azx_dev, SD_CTL, azx_int_disable() 1609 azx_sd_readb(chip, azx_dev, SD_CTL) & azx_int_disable() 1614 azx_writeb(chip, INTCTL, 0); azx_int_disable() 1617 azx_writel(chip, INTCTL, azx_readl(chip, INTCTL) & azx_int_disable() 1622 static void azx_int_clear(struct azx *chip) azx_int_clear() argument 1627 for (i = 0; i < chip->num_streams; i++) { azx_int_clear() 1628 struct azx_dev *azx_dev = &chip->azx_dev[i]; azx_int_clear() 1629 azx_sd_writeb(chip, azx_dev, SD_STS, SD_INT_MASK); azx_int_clear() 1633 azx_writew(chip, STATESTS, STATESTS_INT_MASK); azx_int_clear() 1636 azx_writeb(chip, RIRBSTS, RIRB_INT_MASK); azx_int_clear() 1639 azx_writel(chip, INTSTS, AZX_INT_CTRL_EN | AZX_INT_ALL_STREAM); azx_int_clear() 1645 void azx_init_chip(struct azx *chip, bool full_reset) azx_init_chip() argument 1647 if (chip->initialized) azx_init_chip() 1651 azx_reset(chip, full_reset); azx_init_chip() 1654 azx_int_clear(chip); azx_init_chip() 1655 azx_int_enable(chip); azx_init_chip() 1658 if (!chip->single_cmd) azx_init_chip() 1659 azx_init_cmd_io(chip); azx_init_chip() 1662 azx_writel(chip, DPLBASE, (u32)chip->posbuf.addr); azx_init_chip() 1663 azx_writel(chip, DPUBASE, upper_32_bits(chip->posbuf.addr)); azx_init_chip() 1665 chip->initialized = 1; azx_init_chip() 1669 void azx_stop_chip(struct azx *chip) azx_stop_chip() argument 1671 if (!chip->initialized) azx_stop_chip() 1675 azx_int_disable(chip); azx_stop_chip() 1676 azx_int_clear(chip); azx_stop_chip() 1679 azx_free_cmd_io(chip); azx_stop_chip() 1682 azx_writel(chip, DPLBASE, 0); azx_stop_chip() 1683 azx_writel(chip, DPUBASE, 0); azx_stop_chip() 1685 chip->initialized = 0; azx_stop_chip() 1694 struct azx *chip = dev_id; azx_interrupt() local 1701 if (azx_has_pm_runtime(chip)) azx_interrupt() 1702 if (!pm_runtime_active(chip->card->dev)) azx_interrupt() 1706 spin_lock(&chip->reg_lock); azx_interrupt() 1708 if (chip->disabled) { azx_interrupt() 1709 spin_unlock(&chip->reg_lock); azx_interrupt() 1713 status = azx_readl(chip, INTSTS); azx_interrupt() 1715 spin_unlock(&chip->reg_lock); azx_interrupt() 1719 for (i = 0; i < chip->num_streams; i++) { azx_interrupt() 1720 azx_dev = &chip->azx_dev[i]; azx_interrupt() 1722 sd_status = azx_sd_readb(chip, azx_dev, SD_STS); azx_interrupt() 1723 azx_sd_writeb(chip, azx_dev, SD_STS, SD_INT_MASK); azx_interrupt() 1728 if (!chip->ops->position_check || azx_interrupt() 1729 chip->ops->position_check(chip, azx_dev)) { azx_interrupt() 1730 spin_unlock(&chip->reg_lock); azx_interrupt() 1732 spin_lock(&chip->reg_lock); azx_interrupt() 1738 status = azx_readb(chip, RIRBSTS); azx_interrupt() 1741 if (chip->driver_caps & AZX_DCAPS_RIRB_PRE_DELAY) azx_interrupt() 1743 azx_update_rirb(chip); azx_interrupt() 1745 azx_writeb(chip, RIRBSTS, RIRB_INT_MASK); azx_interrupt() 1748 spin_unlock(&chip->reg_lock); azx_interrupt() 1761 static int probe_codec(struct azx *chip, int addr) probe_codec() argument 1767 mutex_lock(&chip->bus->core.cmd_mutex); probe_codec() 1768 chip->probing = 1; probe_codec() 1769 azx_send_cmd(chip->bus, cmd); probe_codec() 1770 res = azx_get_response(chip->bus, addr); probe_codec() 1771 chip->probing = 0; probe_codec() 1772 mutex_unlock(&chip->bus->core.cmd_mutex); probe_codec() 1775 dev_dbg(chip->card->dev, "codec #%d probed OK\n", addr); probe_codec() 1781 struct azx *chip = bus->private_data; azx_bus_reset() local 1784 azx_stop_chip(chip); azx_bus_reset() 1785 azx_init_chip(chip, true); azx_bus_reset() 1786 if (chip->initialized) azx_bus_reset() 1787 snd_hda_bus_reset(chip->bus); azx_bus_reset() 1791 static int get_jackpoll_interval(struct azx *chip) get_jackpoll_interval() argument 1796 if (!chip->jackpoll_ms) get_jackpoll_interval() 1799 i = chip->jackpoll_ms[chip->dev_index]; get_jackpoll_interval() 1807 dev_warn(chip->card->dev, get_jackpoll_interval() 1825 int azx_bus_create(struct azx *chip, const char *model) azx_bus_create() argument 1830 err = snd_hda_bus_new(chip->card, &bus); azx_bus_create() 1834 chip->bus = bus; azx_bus_create() 1835 bus->private_data = chip; azx_bus_create() 1836 bus->pci = chip->pci; azx_bus_create() 1840 if (chip->driver_caps & AZX_DCAPS_RIRB_DELAY) { azx_bus_create() 1841 dev_dbg(chip->card->dev, "Enable delay in RIRB handling\n"); azx_bus_create() 1849 if (chip->driver_caps & AZX_DCAPS_SYNC_WRITE) { azx_bus_create() 1850 dev_dbg(chip->card->dev, "Enable sync_write for stable communication\n"); azx_bus_create() 1860 int azx_probe_codecs(struct azx *chip, unsigned int max_slots) azx_probe_codecs() argument 1862 struct hda_bus *bus = chip->bus; azx_probe_codecs() 1871 if ((chip->codec_mask & (1 << c)) & chip->codec_probe_mask) { azx_probe_codecs() 1872 if (probe_codec(chip, c) < 0) { azx_probe_codecs() 1876 dev_warn(chip->card->dev, azx_probe_codecs() 1878 chip->codec_mask &= ~(1 << c); azx_probe_codecs() 1880 * codec often screws up the controller chip, azx_probe_codecs() 1883 * better to reset the controller chip to azx_probe_codecs() 1886 azx_stop_chip(chip); azx_probe_codecs() 1887 azx_init_chip(chip, true); azx_probe_codecs() 1894 if ((chip->codec_mask & (1 << c)) & chip->codec_probe_mask) { azx_probe_codecs() 1899 codec->jackpoll_interval = get_jackpoll_interval(chip); azx_probe_codecs() 1900 codec->beep_mode = chip->beep_mode; azx_probe_codecs() 1905 dev_err(chip->card->dev, "no codecs initialized\n"); azx_probe_codecs() 1913 int azx_codec_configure(struct azx *chip) azx_codec_configure() argument 1916 list_for_each_codec(codec, chip->bus) { azx_codec_configure() 1924 static bool is_input_stream(struct azx *chip, unsigned char index) is_input_stream() argument 1926 return (index >= chip->capture_index_offset && is_input_stream() 1927 index < chip->capture_index_offset + chip->capture_streams); is_input_stream() 1931 int azx_init_stream(struct azx *chip) azx_init_stream() argument 1941 for (i = 0; i < chip->num_streams; i++) { azx_init_stream() 1942 struct azx_dev *azx_dev = &chip->azx_dev[i]; azx_init_stream() 1943 azx_dev->posbuf = (u32 __iomem *)(chip->posbuf.area + i * 8); azx_init_stream() 1945 azx_dev->sd_addr = chip->remap_addr + (0x20 * i + 0x80); azx_init_stream() 1956 if (chip->driver_caps & AZX_DCAPS_SEPARATE_STREAM_TAG) azx_init_stream() 1958 is_input_stream(chip, i) ? azx_init_stream()
H A D	hda_tegra.c	70 struct azx chip; member in struct:hda_tegra 90 static int dma_alloc_pages(struct azx *chip, int type, size_t size, dma_alloc_pages() argument 93 return snd_dma_alloc_pages(type, chip->card->dev, size, buf); dma_alloc_pages() 96 static void dma_free_pages(struct azx *chip, struct snd_dma_buffer *buf) dma_free_pages() argument 101 static int substream_alloc_pages(struct azx *chip, substream_alloc_pages() argument 113 static int substream_free_pages(struct azx *chip, substream_free_pages() argument 251 struct azx *chip = card->private_data; hda_tegra_suspend() local 252 struct hda_tegra *hda = container_of(chip, struct hda_tegra, chip); hda_tegra_suspend() 256 azx_stop_chip(chip); hda_tegra_suspend() 257 azx_enter_link_reset(chip); hda_tegra_suspend() 266 struct azx *chip = card->private_data; hda_tegra_resume() local 267 struct hda_tegra *hda = container_of(chip, struct hda_tegra, chip); hda_tegra_resume() 273 azx_init_chip(chip, 1); hda_tegra_resume() 291 struct azx *chip = device->device_data; hda_tegra_dev_free() local 293 if (chip->initialized) { hda_tegra_dev_free() 294 for (i = 0; i < chip->num_streams; i++) hda_tegra_dev_free() 295 azx_stream_stop(chip, &chip->azx_dev[i]); hda_tegra_dev_free() 296 azx_stop_chip(chip); hda_tegra_dev_free() 299 azx_free_stream_pages(chip); hda_tegra_dev_free() 304 static int hda_tegra_init_chip(struct azx *chip, struct platform_device *pdev) hda_tegra_init_chip() argument 306 struct hda_tegra *hda = container_of(chip, struct hda_tegra, chip); hda_tegra_init_chip() 326 chip->remap_addr = hda->regs + HDA_BAR0; hda_tegra_init_chip() 327 chip->addr = res->start + HDA_BAR0; hda_tegra_init_chip() 338 static int hda_tegra_first_init(struct azx *chip, struct platform_device *pdev) hda_tegra_first_init() argument 340 struct snd_card *card = chip->card; hda_tegra_first_init() 345 err = hda_tegra_init_chip(chip, pdev); hda_tegra_first_init() 349 err = devm_request_irq(chip->card->dev, irq_id, azx_interrupt, hda_tegra_first_init() 350 IRQF_SHARED, KBUILD_MODNAME, chip); hda_tegra_first_init() 352 dev_err(chip->card->dev, hda_tegra_first_init() 357 chip->irq = irq_id; hda_tegra_first_init() 359 synchronize_irq(chip->irq); hda_tegra_first_init() 361 gcap = azx_readw(chip, GCAP); hda_tegra_first_init() 367 chip->capture_streams = (gcap >> 8) & 0x0f; hda_tegra_first_init() 368 chip->playback_streams = (gcap >> 12) & 0x0f; hda_tegra_first_init() 369 if (!chip->playback_streams && !chip->capture_streams) { hda_tegra_first_init() 371 chip->playback_streams = NUM_PLAYBACK_SD; hda_tegra_first_init() 372 chip->capture_streams = NUM_CAPTURE_SD; hda_tegra_first_init() 374 chip->capture_index_offset = 0; hda_tegra_first_init() 375 chip->playback_index_offset = chip->capture_streams; hda_tegra_first_init() 376 chip->num_streams = chip->playback_streams + chip->capture_streams; hda_tegra_first_init() 377 chip->azx_dev = devm_kcalloc(card->dev, chip->num_streams, hda_tegra_first_init() 378 sizeof(*chip->azx_dev), GFP_KERNEL); hda_tegra_first_init() 379 if (!chip->azx_dev) hda_tegra_first_init() 382 err = azx_alloc_stream_pages(chip); hda_tegra_first_init() 387 azx_init_stream(chip); hda_tegra_first_init() 389 /* initialize chip */ hda_tegra_first_init() 390 azx_init_chip(chip, 1); hda_tegra_first_init() 393 if (!chip->codec_mask) { hda_tegra_first_init() 402 card->shortname, chip->addr, chip->irq); hda_tegra_first_init() 418 struct azx *chip; hda_tegra_create() local 421 chip = &hda->chip; hda_tegra_create() 423 spin_lock_init(&chip->reg_lock); hda_tegra_create() 424 mutex_init(&chip->open_mutex); hda_tegra_create() 425 chip->card = card; hda_tegra_create() 426 chip->ops = hda_ops; hda_tegra_create() 427 chip->irq = -1; hda_tegra_create() 428 chip->driver_caps = driver_caps; hda_tegra_create() 429 chip->driver_type = driver_caps & 0xff; hda_tegra_create() 430 chip->dev_index = 0; hda_tegra_create() 431 INIT_LIST_HEAD(&chip->pcm_list); hda_tegra_create() 433 chip->codec_probe_mask = -1; hda_tegra_create() 435 chip->single_cmd = false; hda_tegra_create() 436 chip->snoop = true; hda_tegra_create() 438 err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops); hda_tegra_create() 456 struct azx *chip; hda_tegra_probe() local 465 chip = &hda->chip; hda_tegra_probe() 477 card->private_data = chip; hda_tegra_probe() 481 err = hda_tegra_first_init(chip, pdev); hda_tegra_probe() 486 err = azx_bus_create(chip, NULL); hda_tegra_probe() 490 err = azx_probe_codecs(chip, 0); hda_tegra_probe() 494 err = azx_codec_configure(chip); hda_tegra_probe() 498 err = snd_card_register(chip->card); hda_tegra_probe() 502 chip->running = 1; hda_tegra_probe() 503 snd_hda_set_power_save(chip->bus, power_save * 1000); hda_tegra_probe() 520 struct azx *chip; hda_tegra_shutdown() local 524 chip = card->private_data; hda_tegra_shutdown() 525 if (chip && chip->running) hda_tegra_shutdown() 526 azx_stop_chip(chip); hda_tegra_shutdown()
H A D	hda_intel.c	273 #define azx_get_snoop_type(chip) \ 274 (((chip)->driver_caps & AZX_DCAPS_SNOOP_MASK) >> 10) 343 #define use_vga_switcheroo(chip) ((chip)->use_vga_switcheroo) 345 #define use_vga_switcheroo(chip) 0 373 static void __mark_pages_wc(struct azx *chip, struct snd_dma_buffer *dmab, bool on) __mark_pages_wc() argument 377 if (azx_snoop(chip)) __mark_pages_wc() 385 if (chip->driver_type == AZX_DRIVER_CMEDIA) __mark_pages_wc() 402 static inline void mark_pages_wc(struct azx *chip, struct snd_dma_buffer *buf, mark_pages_wc() argument 405 __mark_pages_wc(chip, buf, on); mark_pages_wc() 407 static inline void mark_runtime_wc(struct azx *chip, struct azx_dev *azx_dev, mark_runtime_wc() argument 411 __mark_pages_wc(chip, snd_pcm_get_dma_buf(substream), on); mark_runtime_wc() 417 static inline void mark_pages_wc(struct azx *chip, struct snd_dma_buffer *buf, mark_pages_wc() argument 421 static inline void mark_runtime_wc(struct azx *chip, struct azx_dev *azx_dev, mark_runtime_wc() argument 427 static int azx_acquire_irq(struct azx *chip, int do_disconnect); 444 static void azx_init_pci(struct azx *chip) azx_init_pci() argument 446 int snoop_type = azx_get_snoop_type(chip); azx_init_pci() 454 if (!(chip->driver_caps & AZX_DCAPS_NO_TCSEL)) { azx_init_pci() 455 dev_dbg(chip->card->dev, "Clearing TCSEL\n"); azx_init_pci() 456 update_pci_byte(chip->pci, AZX_PCIREG_TCSEL, 0x07, 0); azx_init_pci() 463 dev_dbg(chip->card->dev, "Setting ATI snoop: %d\n", azx_init_pci() 464 azx_snoop(chip)); azx_init_pci() 465 update_pci_byte(chip->pci, azx_init_pci() 467 azx_snoop(chip) ? ATI_SB450_HDAUDIO_ENABLE_SNOOP : 0); azx_init_pci() 472 dev_dbg(chip->card->dev, "Setting Nvidia snoop: %d\n", azx_init_pci() 473 azx_snoop(chip)); azx_init_pci() 474 update_pci_byte(chip->pci, azx_init_pci() 477 update_pci_byte(chip->pci, azx_init_pci() 480 update_pci_byte(chip->pci, azx_init_pci() 488 pci_read_config_word(chip->pci, INTEL_SCH_HDA_DEVC, &snoop); azx_init_pci() 489 if ((!azx_snoop(chip) && !(snoop & INTEL_SCH_HDA_DEVC_NOSNOOP)) || azx_init_pci() 490 (azx_snoop(chip) && (snoop & INTEL_SCH_HDA_DEVC_NOSNOOP))) { azx_init_pci() 492 if (!azx_snoop(chip)) azx_init_pci() 494 pci_write_config_word(chip->pci, INTEL_SCH_HDA_DEVC, snoop); azx_init_pci() 495 pci_read_config_word(chip->pci, azx_init_pci() 498 dev_dbg(chip->card->dev, "SCH snoop: %s\n", azx_init_pci() 505 static int azx_get_delay_from_lpib(struct azx *chip, struct azx_dev *azx_dev, azx_get_delay_from_lpib() argument 510 unsigned int lpib_pos = azx_get_pos_lpib(chip, azx_dev); azx_get_delay_from_lpib() 525 dev_info(chip->card->dev, azx_get_delay_from_lpib() 529 chip->driver_caps &= ~AZX_DCAPS_COUNT_LPIB_DELAY; azx_get_delay_from_lpib() 530 chip->get_delay[stream] = NULL; azx_get_delay_from_lpib() 536 static int azx_position_ok(struct azx *chip, struct azx_dev *azx_dev); 539 static int azx_position_check(struct azx *chip, struct azx_dev *azx_dev) azx_position_check() argument 541 struct hda_intel *hda = container_of(chip, struct hda_intel, chip); azx_position_check() 544 ok = azx_position_ok(chip, azx_dev); azx_position_check() 565 static int azx_position_ok(struct azx *chip, struct azx_dev *azx_dev) azx_position_ok() argument 572 wallclk = azx_readl(chip, WALLCLK) - azx_dev->start_wallclk; azx_position_ok() 576 if (chip->get_position[stream]) azx_position_ok() 577 pos = chip->get_position[stream](chip, azx_dev); azx_position_ok() 579 pos = azx_get_pos_posbuf(chip, azx_dev); azx_position_ok() 581 dev_info(chip->card->dev, azx_position_ok() 583 chip->get_position[stream] = azx_get_pos_lpib; azx_position_ok() 584 pos = azx_get_pos_lpib(chip, azx_dev); azx_position_ok() 585 chip->get_delay[stream] = NULL; azx_position_ok() 587 chip->get_position[stream] = azx_get_pos_posbuf; azx_position_ok() 588 if (chip->driver_caps & AZX_DCAPS_COUNT_LPIB_DELAY) azx_position_ok() 589 chip->get_delay[stream] = azx_get_delay_from_lpib; azx_position_ok() 602 return chip->bdl_pos_adj[chip->dev_index] ? 0 : -1; azx_position_ok() 613 struct azx *chip = &hda->chip; azx_irq_pending_work() local 617 dev_info(chip->card->dev, azx_irq_pending_work() 619 chip->card->number); azx_irq_pending_work() 625 spin_lock_irq(&chip->reg_lock); azx_irq_pending_work() 626 for (i = 0; i < chip->num_streams; i++) { azx_irq_pending_work() 627 struct azx_dev *azx_dev = &chip->azx_dev[i]; azx_irq_pending_work() 632 ok = azx_position_ok(chip, azx_dev); azx_irq_pending_work() 635 spin_unlock(&chip->reg_lock); azx_irq_pending_work() 637 spin_lock(&chip->reg_lock); azx_irq_pending_work() 643 spin_unlock_irq(&chip->reg_lock); azx_irq_pending_work() 651 static void azx_clear_irq_pending(struct azx *chip) azx_clear_irq_pending() argument 655 spin_lock_irq(&chip->reg_lock); azx_clear_irq_pending() 656 for (i = 0; i < chip->num_streams; i++) azx_clear_irq_pending() 657 chip->azx_dev[i].irq_pending = 0; azx_clear_irq_pending() 658 spin_unlock_irq(&chip->reg_lock); azx_clear_irq_pending() 661 static int azx_acquire_irq(struct azx *chip, int do_disconnect) azx_acquire_irq() argument 663 if (request_irq(chip->pci->irq, azx_interrupt, azx_acquire_irq() 664 chip->msi ? 0 : IRQF_SHARED, azx_acquire_irq() 665 KBUILD_MODNAME, chip)) { azx_acquire_irq() 666 dev_err(chip->card->dev, azx_acquire_irq() 668 chip->pci->irq); azx_acquire_irq() 670 snd_card_disconnect(chip->card); azx_acquire_irq() 673 chip->irq = chip->pci->irq; azx_acquire_irq() 674 pci_intx(chip->pci, !chip->msi); azx_acquire_irq() 679 static unsigned int azx_via_get_position(struct azx *chip, azx_via_get_position() argument 686 link_pos = azx_sd_readl(chip, azx_dev, SD_LPIB); azx_via_get_position() 702 fifo_size = readw(chip->remap_addr + VIA_IN_STREAM0_FIFO_SIZE_OFFSET); azx_via_get_position() 738 static void azx_add_card_list(struct azx *chip) azx_add_card_list() argument 740 struct hda_intel *hda = container_of(chip, struct hda_intel, chip); azx_add_card_list() 746 static void azx_del_card_list(struct azx *chip) azx_del_card_list() argument 748 struct hda_intel *hda = container_of(chip, struct hda_intel, chip); azx_del_card_list() 758 struct azx *chip; param_set_xint() local 767 chip = &hda->chip; param_set_xint() 768 if (!chip->bus || chip->disabled) param_set_xint() 770 snd_hda_set_power_save(chip->bus, power_save * 1000); param_set_xint() 776 #define azx_add_card_list(chip) /* NOP */ 777 #define azx_del_card_list(chip) /* NOP */ 787 struct azx *chip; azx_suspend() local 793 chip = card->private_data; azx_suspend() 794 hda = container_of(chip, struct hda_intel, chip); azx_suspend() 795 if (chip->disabled || hda->init_failed) azx_suspend() 799 azx_clear_irq_pending(chip); azx_suspend() 800 azx_stop_chip(chip); azx_suspend() 801 azx_enter_link_reset(chip); azx_suspend() 802 if (chip->irq >= 0) { azx_suspend() 803 free_irq(chip->irq, chip); azx_suspend() 804 chip->irq = -1; azx_suspend() 807 if (chip->msi) azx_suspend() 808 pci_disable_msi(chip->pci); azx_suspend() 809 if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) azx_suspend() 818 struct azx *chip; azx_resume() local 824 chip = card->private_data; azx_resume() 825 hda = container_of(chip, struct hda_intel, chip); azx_resume() 826 if (chip->disabled || hda->init_failed) azx_resume() 829 if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) { azx_resume() 833 if (chip->msi) azx_resume() 835 chip->msi = 0; azx_resume() 836 if (azx_acquire_irq(chip, 1) < 0) azx_resume() 838 azx_init_pci(chip); azx_resume() 840 azx_init_chip(chip, true); azx_resume() 881 struct azx *chip; azx_runtime_suspend() local 887 chip = card->private_data; azx_runtime_suspend() 888 hda = container_of(chip, struct hda_intel, chip); azx_runtime_suspend() 889 if (chip->disabled || hda->init_failed) azx_runtime_suspend() 892 if (!azx_has_pm_runtime(chip)) azx_runtime_suspend() 896 azx_writew(chip, WAKEEN, azx_readw(chip, WAKEEN) | azx_runtime_suspend() 899 azx_stop_chip(chip); azx_runtime_suspend() 900 azx_enter_link_reset(chip); azx_runtime_suspend() 901 azx_clear_irq_pending(chip); azx_runtime_suspend() 902 if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) azx_runtime_suspend() 911 struct azx *chip; azx_runtime_resume() local 920 chip = card->private_data; azx_runtime_resume() 921 hda = container_of(chip, struct hda_intel, chip); azx_runtime_resume() 922 if (chip->disabled || hda->init_failed) azx_runtime_resume() 925 if (!azx_has_pm_runtime(chip)) azx_runtime_resume() 928 if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) { azx_runtime_resume() 934 status = azx_readw(chip, STATESTS); azx_runtime_resume() 936 azx_init_pci(chip); azx_runtime_resume() 937 azx_init_chip(chip, true); azx_runtime_resume() 939 bus = chip->bus; azx_runtime_resume() 948 azx_writew(chip, WAKEEN, azx_readw(chip, WAKEEN) & azx_runtime_resume() 957 struct azx *chip; azx_runtime_idle() local 963 chip = card->private_data; azx_runtime_idle() 964 hda = container_of(chip, struct hda_intel, chip); azx_runtime_idle() 965 if (chip->disabled || hda->init_failed) azx_runtime_idle() 968 if (!power_save_controller || !azx_has_pm_runtime(chip) || azx_runtime_idle() 969 chip->bus->core.codec_powered) azx_runtime_idle() 990 static int azx_probe_continue(struct azx *chip); 999 struct azx *chip = card->private_data; azx_vs_set_state() local 1000 struct hda_intel *hda = container_of(chip, struct hda_intel, chip); azx_vs_set_state() 1008 if (chip->disabled == disabled) azx_vs_set_state() 1011 if (!chip->bus) { azx_vs_set_state() 1012 chip->disabled = disabled; azx_vs_set_state() 1014 dev_info(chip->card->dev, azx_vs_set_state() 1016 if (azx_probe_continue(chip) < 0) { azx_vs_set_state() 1017 dev_err(chip->card->dev, "initialization error\n"); azx_vs_set_state() 1022 dev_info(chip->card->dev, "%s via VGA-switcheroo\n", azx_vs_set_state() 1031 chip->disabled = true; azx_vs_set_state() 1032 if (snd_hda_lock_devices(chip->bus)) azx_vs_set_state() 1033 dev_warn(chip->card->dev, azx_vs_set_state() 1036 snd_hda_unlock_devices(chip->bus); azx_vs_set_state() 1038 chip->disabled = false; azx_vs_set_state() 1047 struct azx *chip = card->private_data; azx_vs_can_switch() local 1048 struct hda_intel *hda = container_of(chip, struct hda_intel, chip); azx_vs_can_switch() 1053 if (chip->disabled || !chip->bus) azx_vs_can_switch() 1055 if (snd_hda_lock_devices(chip->bus)) azx_vs_can_switch() 1057 snd_hda_unlock_devices(chip->bus); azx_vs_can_switch() 1061 static void init_vga_switcheroo(struct azx *chip) init_vga_switcheroo() argument 1063 struct hda_intel *hda = container_of(chip, struct hda_intel, chip); init_vga_switcheroo() 1064 struct pci_dev *p = get_bound_vga(chip->pci); init_vga_switcheroo() 1066 dev_info(chip->card->dev, init_vga_switcheroo() 1078 static int register_vga_switcheroo(struct azx *chip) register_vga_switcheroo() argument 1080 struct hda_intel *hda = container_of(chip, struct hda_intel, chip); register_vga_switcheroo() 1088 err = vga_switcheroo_register_audio_client(chip->pci, &azx_vs_ops, register_vga_switcheroo() 1090 chip->bus != NULL); register_vga_switcheroo() 1096 vga_switcheroo_init_domain_pm_optimus_hdmi_audio(chip->card->dev, register_vga_switcheroo() 1101 #define init_vga_switcheroo(chip) /* NOP */ 1102 #define register_vga_switcheroo(chip) 0 1109 static int azx_free(struct azx *chip) azx_free() argument 1111 struct pci_dev *pci = chip->pci; azx_free() 1112 struct hda_intel *hda = container_of(chip, struct hda_intel, chip); azx_free() 1115 if (azx_has_pm_runtime(chip) && chip->running) azx_free() 1118 azx_del_card_list(chip); azx_free() 1124 if (chip->disabled && chip->bus) azx_free() 1125 snd_hda_unlock_devices(chip->bus); azx_free() 1127 vga_switcheroo_unregister_client(chip->pci); azx_free() 1130 if (chip->initialized) { azx_free() 1131 azx_clear_irq_pending(chip); azx_free() 1132 for (i = 0; i < chip->num_streams; i++) azx_free() 1133 azx_stream_stop(chip, &chip->azx_dev[i]); azx_free() 1134 azx_stop_chip(chip); azx_free() 1137 if (chip->irq >= 0) azx_free() 1138 free_irq(chip->irq, (void*)chip); azx_free() 1139 if (chip->msi) azx_free() 1140 pci_disable_msi(chip->pci); azx_free() 1141 iounmap(chip->remap_addr); azx_free() 1143 azx_free_stream_pages(chip); azx_free() 1144 if (chip->region_requested) azx_free() 1145 pci_release_regions(chip->pci); azx_free() 1146 pci_disable_device(chip->pci); azx_free() 1147 kfree(chip->azx_dev); azx_free() 1149 release_firmware(chip->fw); azx_free() 1151 if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) { azx_free() 1227 static int check_position_fix(struct azx *chip, int fix) check_position_fix() argument 1240 q = snd_pci_quirk_lookup(chip->pci, position_fix_list); check_position_fix() 1242 dev_info(chip->card->dev, check_position_fix() 1249 if (chip->driver_caps & AZX_DCAPS_POSFIX_VIA) { check_position_fix() 1250 dev_dbg(chip->card->dev, "Using VIACOMBO position fix\n"); check_position_fix() 1253 if (chip->driver_caps & AZX_DCAPS_POSFIX_LPIB) { check_position_fix() 1254 dev_dbg(chip->card->dev, "Using LPIB position fix\n"); check_position_fix() 1260 static void assign_position_fix(struct azx *chip, int fix) assign_position_fix() argument 1270 chip->get_position[0] = chip->get_position[1] = callbacks[fix]; assign_position_fix() 1274 chip->get_position[1] = NULL; assign_position_fix() 1277 (chip->driver_caps & AZX_DCAPS_COUNT_LPIB_DELAY)) { assign_position_fix() 1278 chip->get_delay[0] = chip->get_delay[1] = assign_position_fix() 1308 static void check_probe_mask(struct azx *chip, int dev) check_probe_mask() argument 1312 chip->codec_probe_mask = probe_mask[dev]; check_probe_mask() 1313 if (chip->codec_probe_mask == -1) { check_probe_mask() 1314 q = snd_pci_quirk_lookup(chip->pci, probe_mask_list); check_probe_mask() 1316 dev_info(chip->card->dev, check_probe_mask() 1319 chip->codec_probe_mask = q->value; check_probe_mask() 1324 if (chip->codec_probe_mask != -1 && check_probe_mask() 1325 (chip->codec_probe_mask & AZX_FORCE_CODEC_MASK)) { check_probe_mask() 1326 chip->codec_mask = chip->codec_probe_mask & 0xff; check_probe_mask() 1327 dev_info(chip->card->dev, "codec_mask forced to 0x%x\n", check_probe_mask() 1328 chip->codec_mask); check_probe_mask() 1349 static void check_msi(struct azx *chip) check_msi() argument 1354 chip->msi = !!enable_msi; check_msi() 1357 chip->msi = 1; /* enable MSI as default */ check_msi() 1358 q = snd_pci_quirk_lookup(chip->pci, msi_black_list); check_msi() 1360 dev_info(chip->card->dev, check_msi() 1363 chip->msi = q->value; check_msi() 1368 if (chip->driver_caps & AZX_DCAPS_NO_MSI) { check_msi() 1369 dev_info(chip->card->dev, "Disabling MSI\n"); check_msi() 1370 chip->msi = 0; check_msi() 1375 static void azx_check_snoop_available(struct azx *chip) azx_check_snoop_available() argument 1380 dev_info(chip->card->dev, "Force to %s mode by module option\n", azx_check_snoop_available() 1382 chip->snoop = snoop; azx_check_snoop_available() 1387 if (azx_get_snoop_type(chip) == AZX_SNOOP_TYPE_NONE && azx_check_snoop_available() 1388 chip->driver_type == AZX_DRIVER_VIA) { azx_check_snoop_available() 1393 pci_read_config_byte(chip->pci, 0x42, &val); azx_check_snoop_available() 1394 if (!(val & 0x80) && chip->pci->revision == 0x30) azx_check_snoop_available() 1398 if (chip->driver_caps & AZX_DCAPS_SNOOP_OFF) azx_check_snoop_available() 1401 chip->snoop = snoop; azx_check_snoop_available() 1403 dev_info(chip->card->dev, "Force to non-snoop mode\n"); azx_check_snoop_available() 1409 azx_probe_continue(&hda->chip); azx_probe_work() 1424 struct azx *chip; azx_create() local 1439 chip = &hda->chip; azx_create() 1440 spin_lock_init(&chip->reg_lock); azx_create() 1441 mutex_init(&chip->open_mutex); azx_create() 1442 chip->card = card; azx_create() 1443 chip->pci = pci; azx_create() 1444 chip->ops = hda_ops; azx_create() 1445 chip->irq = -1; azx_create() 1446 chip->driver_caps = driver_caps; azx_create() 1447 chip->driver_type = driver_caps & 0xff; azx_create() 1448 check_msi(chip); azx_create() 1449 chip->dev_index = dev; azx_create() 1450 chip->jackpoll_ms = jackpoll_ms; azx_create() 1451 INIT_LIST_HEAD(&chip->pcm_list); azx_create() 1454 init_vga_switcheroo(chip); azx_create() 1457 assign_position_fix(chip, check_position_fix(chip, position_fix[dev])); azx_create() 1459 check_probe_mask(chip, dev); azx_create() 1461 chip->single_cmd = single_cmd; azx_create() 1462 azx_check_snoop_available(chip); azx_create() 1465 switch (chip->driver_type) { azx_create() 1475 chip->bdl_pos_adj = bdl_pos_adj; azx_create() 1477 err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops); azx_create() 1480 azx_free(chip); azx_create() 1487 *rchip = chip; azx_create() 1492 static int azx_first_init(struct azx *chip) azx_first_init() argument 1494 int dev = chip->dev_index; azx_first_init() 1495 struct pci_dev *pci = chip->pci; azx_first_init() 1496 struct snd_card *card = chip->card; azx_first_init() 1503 if (chip->driver_type == AZX_DRIVER_ULI) { azx_first_init() 1514 chip->region_requested = 1; azx_first_init() 1516 chip->addr = pci_resource_start(pci, 0); azx_first_init() 1517 chip->remap_addr = pci_ioremap_bar(pci, 0); azx_first_init() 1518 if (chip->remap_addr == NULL) { azx_first_init() 1523 if (chip->msi) { azx_first_init() 1524 if (chip->driver_caps & AZX_DCAPS_NO_MSI64) { azx_first_init() 1529 chip->msi = 0; azx_first_init() 1532 if (azx_acquire_irq(chip, 0) < 0) azx_first_init() 1536 synchronize_irq(chip->irq); azx_first_init() 1538 gcap = azx_readw(chip, GCAP); azx_first_init() 1542 if (chip->pci->vendor == PCI_VENDOR_ID_AMD) azx_first_init() 1546 if (chip->pci->vendor == PCI_VENDOR_ID_ATI) { azx_first_init() 1560 if (chip->driver_caps & AZX_DCAPS_NO_64BIT) { azx_first_init() 1567 chip->align_buffer_size = !!align_buffer_size; azx_first_init() 1569 if (chip->driver_caps & AZX_DCAPS_NO_ALIGN_BUFSIZE) azx_first_init() 1570 chip->align_buffer_size = 0; azx_first_init() 1572 chip->align_buffer_size = 1; azx_first_init() 1588 chip->capture_streams = (gcap >> 8) & 0x0f; azx_first_init() 1589 chip->playback_streams = (gcap >> 12) & 0x0f; azx_first_init() 1590 if (!chip->playback_streams && !chip->capture_streams) { azx_first_init() 1593 switch (chip->driver_type) { azx_first_init() 1595 chip->playback_streams = ULI_NUM_PLAYBACK; azx_first_init() 1596 chip->capture_streams = ULI_NUM_CAPTURE; azx_first_init() 1600 chip->playback_streams = ATIHDMI_NUM_PLAYBACK; azx_first_init() 1601 chip->capture_streams = ATIHDMI_NUM_CAPTURE; azx_first_init() 1605 chip->playback_streams = ICH6_NUM_PLAYBACK; azx_first_init() 1606 chip->capture_streams = ICH6_NUM_CAPTURE; azx_first_init() 1610 chip->capture_index_offset = 0; azx_first_init() 1611 chip->playback_index_offset = chip->capture_streams; azx_first_init() 1612 chip->num_streams = chip->playback_streams + chip->capture_streams; azx_first_init() 1613 chip->azx_dev = kcalloc(chip->num_streams, sizeof(*chip->azx_dev), azx_first_init() 1615 if (!chip->azx_dev) azx_first_init() 1618 err = azx_alloc_stream_pages(chip); azx_first_init() 1623 azx_init_stream(chip); azx_first_init() 1625 /* initialize chip */ azx_first_init() 1626 azx_init_pci(chip); azx_first_init() 1628 if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) { azx_first_init() 1631 hda = container_of(chip, struct hda_intel, chip); azx_first_init() 1635 azx_init_chip(chip, (probe_only[dev] & 2) == 0); azx_first_init() 1638 if (!chip->codec_mask) { azx_first_init() 1644 strlcpy(card->shortname, driver_short_names[chip->driver_type], azx_first_init() 1648 card->shortname, chip->addr, chip->irq); azx_first_init() 1658 struct azx *chip = card->private_data; azx_firmware_cb() local 1659 struct pci_dev *pci = chip->pci; azx_firmware_cb() 1666 chip->fw = fw; azx_firmware_cb() 1667 if (!chip->disabled) { azx_firmware_cb() 1669 if (azx_probe_continue(chip)) azx_firmware_cb() 1715 static int disable_msi_reset_irq(struct azx *chip) disable_msi_reset_irq() argument 1719 free_irq(chip->irq, chip); disable_msi_reset_irq() 1720 chip->irq = -1; disable_msi_reset_irq() 1721 pci_disable_msi(chip->pci); disable_msi_reset_irq() 1722 chip->msi = 0; disable_msi_reset_irq() 1723 err = azx_acquire_irq(chip, 1); disable_msi_reset_irq() 1731 static int dma_alloc_pages(struct azx *chip, dma_alloc_pages() argument 1739 chip->card->dev, dma_alloc_pages() 1743 mark_pages_wc(chip, buf, true); dma_alloc_pages() 1747 static void dma_free_pages(struct azx *chip, struct snd_dma_buffer *buf) dma_free_pages() argument 1749 mark_pages_wc(chip, buf, false); dma_free_pages() 1753 static int substream_alloc_pages(struct azx *chip, substream_alloc_pages() argument 1760 mark_runtime_wc(chip, azx_dev, substream, false); substream_alloc_pages() 1767 mark_runtime_wc(chip, azx_dev, substream, true); substream_alloc_pages() 1771 static int substream_free_pages(struct azx *chip, substream_free_pages() argument 1775 mark_runtime_wc(chip, azx_dev, substream, false); substream_free_pages() 1784 struct azx *chip = apcm->chip; pcm_mmap_prepare() local 1785 if (!azx_snoop(chip) && chip->driver_type != AZX_DRIVER_CMEDIA) pcm_mmap_prepare() 1812 struct azx *chip; azx_probe() local 1831 &pci_hda_ops, &chip); azx_probe() 1834 card->private_data = chip; azx_probe() 1835 hda = container_of(chip, struct hda_intel, chip); azx_probe() 1839 err = register_vga_switcheroo(chip); azx_probe() 1848 chip->disabled = true; azx_probe() 1851 schedule_probe = !chip->disabled; azx_probe() 1867 if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) azx_probe() 1875 if (chip->disabled) azx_probe() 1890 static int azx_probe_continue(struct azx *chip) azx_probe_continue() argument 1892 struct hda_intel *hda = container_of(chip, struct hda_intel, chip); azx_probe_continue() 1893 struct pci_dev *pci = chip->pci; azx_probe_continue() 1894 int dev = chip->dev_index; azx_probe_continue() 1898 if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) { azx_probe_continue() 1914 dev_err(chip->card->dev, azx_probe_continue() 1924 err = azx_first_init(chip); azx_probe_continue() 1929 chip->beep_mode = beep_mode[dev]; azx_probe_continue() 1933 err = azx_bus_create(chip, model[dev]); azx_probe_continue() 1937 err = azx_probe_codecs(chip, azx_max_codecs[chip->driver_type]); azx_probe_continue() 1942 if (chip->fw) { azx_probe_continue() 1943 err = snd_hda_load_patch(chip->bus, chip->fw->size, azx_probe_continue() 1944 chip->fw->data); azx_probe_continue() 1948 release_firmware(chip->fw); /* no longer needed */ azx_probe_continue() 1949 chip->fw = NULL; azx_probe_continue() 1954 err = azx_codec_configure(chip); azx_probe_continue() 1959 err = snd_card_register(chip->card); azx_probe_continue() 1963 chip->running = 1; azx_probe_continue() 1964 azx_add_card_list(chip); azx_probe_continue() 1965 snd_hda_set_power_save(chip->bus, power_save * 1000); azx_probe_continue() 1966 if (azx_has_pm_runtime(chip) || hda->use_vga_switcheroo) azx_probe_continue() 1979 struct azx *chip; azx_remove() local 1984 chip = card->private_data; azx_remove() 1985 hda = container_of(chip, struct hda_intel, chip); azx_remove() 1995 struct azx *chip; azx_shutdown() local 1999 chip = card->private_data; azx_shutdown() 2000 if (chip && chip->running) azx_shutdown() 2001 azx_stop_chip(chip); azx_shutdown() 2220 /* this entry seems still valid -- i.e. without emu20kx chip */
/linux-4.1.27/drivers/misc/
H A D	pch_phub.c	153 static void pch_phub_read_modify_write_reg(struct pch_phub_reg *chip, pch_phub_read_modify_write_reg() argument 157 void __iomem *reg_addr = chip->pch_phub_base_address + reg_addr_offset; pch_phub_read_modify_write_reg() 166 struct pch_phub_reg *chip = pci_get_drvdata(pdev); pch_phub_save_reg_conf() local 168 void __iomem *p = chip->pch_phub_base_address; pch_phub_save_reg_conf() 170 chip->phub_id_reg = ioread32(p + PCH_PHUB_ID_REG); pch_phub_save_reg_conf() 171 chip->q_pri_val_reg = ioread32(p + PCH_PHUB_QUEUE_PRI_VAL_REG); pch_phub_save_reg_conf() 172 chip->rc_q_maxsize_reg = ioread32(p + PCH_PHUB_RC_QUEUE_MAXSIZE_REG); pch_phub_save_reg_conf() 173 chip->bri_q_maxsize_reg = ioread32(p + PCH_PHUB_BRI_QUEUE_MAXSIZE_REG); pch_phub_save_reg_conf() 174 chip->comp_resp_timeout_reg = pch_phub_save_reg_conf() 176 chip->bus_slave_control_reg = pch_phub_save_reg_conf() 178 chip->deadlock_avoid_type_reg = pch_phub_save_reg_conf() 180 chip->intpin_reg_wpermit_reg0 = pch_phub_save_reg_conf() 182 chip->intpin_reg_wpermit_reg1 = pch_phub_save_reg_conf() 184 chip->intpin_reg_wpermit_reg2 = pch_phub_save_reg_conf() 186 chip->intpin_reg_wpermit_reg3 = pch_phub_save_reg_conf() 189 "chip->phub_id_reg=%x, " pch_phub_save_reg_conf() 190 "chip->q_pri_val_reg=%x, " pch_phub_save_reg_conf() 191 "chip->rc_q_maxsize_reg=%x, " pch_phub_save_reg_conf() 192 "chip->bri_q_maxsize_reg=%x, " pch_phub_save_reg_conf() 193 "chip->comp_resp_timeout_reg=%x, " pch_phub_save_reg_conf() 194 "chip->bus_slave_control_reg=%x, " pch_phub_save_reg_conf() 195 "chip->deadlock_avoid_type_reg=%x, " pch_phub_save_reg_conf() 196 "chip->intpin_reg_wpermit_reg0=%x, " pch_phub_save_reg_conf() 197 "chip->intpin_reg_wpermit_reg1=%x, " pch_phub_save_reg_conf() 198 "chip->intpin_reg_wpermit_reg2=%x, " pch_phub_save_reg_conf() 199 "chip->intpin_reg_wpermit_reg3=%x\n", __func__, pch_phub_save_reg_conf() 200 chip->phub_id_reg, pch_phub_save_reg_conf() 201 chip->q_pri_val_reg, pch_phub_save_reg_conf() 202 chip->rc_q_maxsize_reg, pch_phub_save_reg_conf() 203 chip->bri_q_maxsize_reg, pch_phub_save_reg_conf() 204 chip->comp_resp_timeout_reg, pch_phub_save_reg_conf() 205 chip->bus_slave_control_reg, pch_phub_save_reg_conf() 206 chip->deadlock_avoid_type_reg, pch_phub_save_reg_conf() 207 chip->intpin_reg_wpermit_reg0, pch_phub_save_reg_conf() 208 chip->intpin_reg_wpermit_reg1, pch_phub_save_reg_conf() 209 chip->intpin_reg_wpermit_reg2, pch_phub_save_reg_conf() 210 chip->intpin_reg_wpermit_reg3); pch_phub_save_reg_conf() 212 chip->int_reduce_control_reg[i] = pch_phub_save_reg_conf() 215 "chip->int_reduce_control_reg[%d]=%x\n", pch_phub_save_reg_conf() 216 __func__, i, chip->int_reduce_control_reg[i]); pch_phub_save_reg_conf() 218 chip->clkcfg_reg = ioread32(p + CLKCFG_REG_OFFSET); pch_phub_save_reg_conf() 219 if ((chip->ioh_type == 2) || (chip->ioh_type == 4)) pch_phub_save_reg_conf() 220 chip->funcsel_reg = ioread32(p + FUNCSEL_REG_OFFSET); pch_phub_save_reg_conf() 227 struct pch_phub_reg *chip = pci_get_drvdata(pdev); pch_phub_restore_reg_conf() local 229 p = chip->pch_phub_base_address; pch_phub_restore_reg_conf() 231 iowrite32(chip->phub_id_reg, p + PCH_PHUB_ID_REG); pch_phub_restore_reg_conf() 232 iowrite32(chip->q_pri_val_reg, p + PCH_PHUB_QUEUE_PRI_VAL_REG); pch_phub_restore_reg_conf() 233 iowrite32(chip->rc_q_maxsize_reg, p + PCH_PHUB_RC_QUEUE_MAXSIZE_REG); pch_phub_restore_reg_conf() 234 iowrite32(chip->bri_q_maxsize_reg, p + PCH_PHUB_BRI_QUEUE_MAXSIZE_REG); pch_phub_restore_reg_conf() 235 iowrite32(chip->comp_resp_timeout_reg, pch_phub_restore_reg_conf() 237 iowrite32(chip->bus_slave_control_reg, pch_phub_restore_reg_conf() 239 iowrite32(chip->deadlock_avoid_type_reg, pch_phub_restore_reg_conf() 241 iowrite32(chip->intpin_reg_wpermit_reg0, pch_phub_restore_reg_conf() 243 iowrite32(chip->intpin_reg_wpermit_reg1, pch_phub_restore_reg_conf() 245 iowrite32(chip->intpin_reg_wpermit_reg2, pch_phub_restore_reg_conf() 247 iowrite32(chip->intpin_reg_wpermit_reg3, pch_phub_restore_reg_conf() 250 "chip->phub_id_reg=%x, " pch_phub_restore_reg_conf() 251 "chip->q_pri_val_reg=%x, " pch_phub_restore_reg_conf() 252 "chip->rc_q_maxsize_reg=%x, " pch_phub_restore_reg_conf() 253 "chip->bri_q_maxsize_reg=%x, " pch_phub_restore_reg_conf() 254 "chip->comp_resp_timeout_reg=%x, " pch_phub_restore_reg_conf() 255 "chip->bus_slave_control_reg=%x, " pch_phub_restore_reg_conf() 256 "chip->deadlock_avoid_type_reg=%x, " pch_phub_restore_reg_conf() 257 "chip->intpin_reg_wpermit_reg0=%x, " pch_phub_restore_reg_conf() 258 "chip->intpin_reg_wpermit_reg1=%x, " pch_phub_restore_reg_conf() 259 "chip->intpin_reg_wpermit_reg2=%x, " pch_phub_restore_reg_conf() 260 "chip->intpin_reg_wpermit_reg3=%x\n", __func__, pch_phub_restore_reg_conf() 261 chip->phub_id_reg, pch_phub_restore_reg_conf() 262 chip->q_pri_val_reg, pch_phub_restore_reg_conf() 263 chip->rc_q_maxsize_reg, pch_phub_restore_reg_conf() 264 chip->bri_q_maxsize_reg, pch_phub_restore_reg_conf() 265 chip->comp_resp_timeout_reg, pch_phub_restore_reg_conf() 266 chip->bus_slave_control_reg, pch_phub_restore_reg_conf() 267 chip->deadlock_avoid_type_reg, pch_phub_restore_reg_conf() 268 chip->intpin_reg_wpermit_reg0, pch_phub_restore_reg_conf() 269 chip->intpin_reg_wpermit_reg1, pch_phub_restore_reg_conf() 270 chip->intpin_reg_wpermit_reg2, pch_phub_restore_reg_conf() 271 chip->intpin_reg_wpermit_reg3); pch_phub_restore_reg_conf() 273 iowrite32(chip->int_reduce_control_reg[i], pch_phub_restore_reg_conf() 276 "chip->int_reduce_control_reg[%d]=%x\n", pch_phub_restore_reg_conf() 277 __func__, i, chip->int_reduce_control_reg[i]); pch_phub_restore_reg_conf() 280 iowrite32(chip->clkcfg_reg, p + CLKCFG_REG_OFFSET); pch_phub_restore_reg_conf() 281 if ((chip->ioh_type == 2) || (chip->ioh_type == 4)) pch_phub_restore_reg_conf() 282 iowrite32(chip->funcsel_reg, p + FUNCSEL_REG_OFFSET); pch_phub_restore_reg_conf() 291 static void pch_phub_read_serial_rom(struct pch_phub_reg *chip, pch_phub_read_serial_rom() argument 294 void __iomem *mem_addr = chip->pch_phub_extrom_base_address + pch_phub_read_serial_rom() 305 static int pch_phub_write_serial_rom(struct pch_phub_reg *chip, pch_phub_write_serial_rom() argument 308 void __iomem *mem_addr = chip->pch_phub_extrom_base_address + pch_phub_write_serial_rom() 318 chip->pch_phub_extrom_base_address + PHUB_CONTROL); pch_phub_write_serial_rom() 324 while (ioread8(chip->pch_phub_extrom_base_address + pch_phub_write_serial_rom() 333 chip->pch_phub_extrom_base_address + PHUB_CONTROL); pch_phub_write_serial_rom() 343 static void pch_phub_read_serial_rom_val(struct pch_phub_reg *chip, pch_phub_read_serial_rom_val() argument 348 mem_addr = chip->pch_mac_start_address + pch_phub_read_serial_rom_val() 351 pch_phub_read_serial_rom(chip, mem_addr, data); pch_phub_read_serial_rom_val() 359 static int pch_phub_write_serial_rom_val(struct pch_phub_reg *chip, pch_phub_write_serial_rom_val() argument 365 mem_addr = chip->pch_mac_start_address + pch_phub_write_serial_rom_val() 368 retval = pch_phub_write_serial_rom(chip, mem_addr, data); pch_phub_write_serial_rom_val() 376 static int pch_phub_gbe_serial_rom_conf(struct pch_phub_reg *chip) pch_phub_gbe_serial_rom_conf() argument 380 retval = pch_phub_write_serial_rom(chip, 0x0b, 0xbc); pch_phub_gbe_serial_rom_conf() 381 retval |= pch_phub_write_serial_rom(chip, 0x0a, 0x10); pch_phub_gbe_serial_rom_conf() 382 retval |= pch_phub_write_serial_rom(chip, 0x09, 0x01); pch_phub_gbe_serial_rom_conf() 383 retval |= pch_phub_write_serial_rom(chip, 0x08, 0x02); pch_phub_gbe_serial_rom_conf() 385 retval |= pch_phub_write_serial_rom(chip, 0x0f, 0x00); pch_phub_gbe_serial_rom_conf() 386 retval |= pch_phub_write_serial_rom(chip, 0x0e, 0x00); pch_phub_gbe_serial_rom_conf() 387 retval |= pch_phub_write_serial_rom(chip, 0x0d, 0x00); pch_phub_gbe_serial_rom_conf() 388 retval |= pch_phub_write_serial_rom(chip, 0x0c, 0x80); pch_phub_gbe_serial_rom_conf() 390 retval |= pch_phub_write_serial_rom(chip, 0x13, 0xbc); pch_phub_gbe_serial_rom_conf() 391 retval |= pch_phub_write_serial_rom(chip, 0x12, 0x10); pch_phub_gbe_serial_rom_conf() 392 retval |= pch_phub_write_serial_rom(chip, 0x11, 0x01); pch_phub_gbe_serial_rom_conf() 393 retval |= pch_phub_write_serial_rom(chip, 0x10, 0x18); pch_phub_gbe_serial_rom_conf() 395 retval |= pch_phub_write_serial_rom(chip, 0x1b, 0xbc); pch_phub_gbe_serial_rom_conf() 396 retval |= pch_phub_write_serial_rom(chip, 0x1a, 0x10); pch_phub_gbe_serial_rom_conf() 397 retval |= pch_phub_write_serial_rom(chip, 0x19, 0x01); pch_phub_gbe_serial_rom_conf() 398 retval |= pch_phub_write_serial_rom(chip, 0x18, 0x19); pch_phub_gbe_serial_rom_conf() 400 retval |= pch_phub_write_serial_rom(chip, 0x23, 0xbc); pch_phub_gbe_serial_rom_conf() 401 retval |= pch_phub_write_serial_rom(chip, 0x22, 0x10); pch_phub_gbe_serial_rom_conf() 402 retval |= pch_phub_write_serial_rom(chip, 0x21, 0x01); pch_phub_gbe_serial_rom_conf() 403 retval |= pch_phub_write_serial_rom(chip, 0x20, 0x3a); pch_phub_gbe_serial_rom_conf() 405 retval |= pch_phub_write_serial_rom(chip, 0x27, 0x01); pch_phub_gbe_serial_rom_conf() 406 retval |= pch_phub_write_serial_rom(chip, 0x26, 0x00); pch_phub_gbe_serial_rom_conf() 407 retval |= pch_phub_write_serial_rom(chip, 0x25, 0x00); pch_phub_gbe_serial_rom_conf() 408 retval |= pch_phub_write_serial_rom(chip, 0x24, 0x00); pch_phub_gbe_serial_rom_conf() 416 static int pch_phub_gbe_serial_rom_conf_mp(struct pch_phub_reg *chip) pch_phub_gbe_serial_rom_conf_mp() argument 422 retval = pch_phub_write_serial_rom(chip, 0x03 + offset_addr, 0xbc); pch_phub_gbe_serial_rom_conf_mp() 423 retval |= pch_phub_write_serial_rom(chip, 0x02 + offset_addr, 0x00); pch_phub_gbe_serial_rom_conf_mp() 424 retval |= pch_phub_write_serial_rom(chip, 0x01 + offset_addr, 0x40); pch_phub_gbe_serial_rom_conf_mp() 425 retval |= pch_phub_write_serial_rom(chip, 0x00 + offset_addr, 0x02); pch_phub_gbe_serial_rom_conf_mp() 427 retval |= pch_phub_write_serial_rom(chip, 0x07 + offset_addr, 0x00); pch_phub_gbe_serial_rom_conf_mp() 428 retval |= pch_phub_write_serial_rom(chip, 0x06 + offset_addr, 0x00); pch_phub_gbe_serial_rom_conf_mp() 429 retval |= pch_phub_write_serial_rom(chip, 0x05 + offset_addr, 0x00); pch_phub_gbe_serial_rom_conf_mp() 430 retval |= pch_phub_write_serial_rom(chip, 0x04 + offset_addr, 0x80); pch_phub_gbe_serial_rom_conf_mp() 432 retval |= pch_phub_write_serial_rom(chip, 0x0b + offset_addr, 0xbc); pch_phub_gbe_serial_rom_conf_mp() 433 retval |= pch_phub_write_serial_rom(chip, 0x0a + offset_addr, 0x00); pch_phub_gbe_serial_rom_conf_mp() 434 retval |= pch_phub_write_serial_rom(chip, 0x09 + offset_addr, 0x40); pch_phub_gbe_serial_rom_conf_mp() 435 retval |= pch_phub_write_serial_rom(chip, 0x08 + offset_addr, 0x18); pch_phub_gbe_serial_rom_conf_mp() 437 retval |= pch_phub_write_serial_rom(chip, 0x13 + offset_addr, 0xbc); pch_phub_gbe_serial_rom_conf_mp() 438 retval |= pch_phub_write_serial_rom(chip, 0x12 + offset_addr, 0x00); pch_phub_gbe_serial_rom_conf_mp() 439 retval |= pch_phub_write_serial_rom(chip, 0x11 + offset_addr, 0x40); pch_phub_gbe_serial_rom_conf_mp() 440 retval |= pch_phub_write_serial_rom(chip, 0x10 + offset_addr, 0x19); pch_phub_gbe_serial_rom_conf_mp() 442 retval |= pch_phub_write_serial_rom(chip, 0x1b + offset_addr, 0xbc); pch_phub_gbe_serial_rom_conf_mp() 443 retval |= pch_phub_write_serial_rom(chip, 0x1a + offset_addr, 0x00); pch_phub_gbe_serial_rom_conf_mp() 444 retval |= pch_phub_write_serial_rom(chip, 0x19 + offset_addr, 0x40); pch_phub_gbe_serial_rom_conf_mp() 445 retval |= pch_phub_write_serial_rom(chip, 0x18 + offset_addr, 0x3a); pch_phub_gbe_serial_rom_conf_mp() 447 retval |= pch_phub_write_serial_rom(chip, 0x1f + offset_addr, 0x01); pch_phub_gbe_serial_rom_conf_mp() 448 retval |= pch_phub_write_serial_rom(chip, 0x1e + offset_addr, 0x00); pch_phub_gbe_serial_rom_conf_mp() 449 retval |= pch_phub_write_serial_rom(chip, 0x1d + offset_addr, 0x00); pch_phub_gbe_serial_rom_conf_mp() 450 retval |= pch_phub_write_serial_rom(chip, 0x1c + offset_addr, 0x00); pch_phub_gbe_serial_rom_conf_mp() 460 static void pch_phub_read_gbe_mac_addr(struct pch_phub_reg *chip, u8 *data) pch_phub_read_gbe_mac_addr() argument 464 pch_phub_read_serial_rom_val(chip, i, &data[i]); pch_phub_read_gbe_mac_addr() 472 static int pch_phub_write_gbe_mac_addr(struct pch_phub_reg *chip, u8 *data) pch_phub_write_gbe_mac_addr() argument 477 if ((chip->ioh_type == 1) || (chip->ioh_type == 5)) /* EG20T or ML7831*/ pch_phub_write_gbe_mac_addr() 478 retval = pch_phub_gbe_serial_rom_conf(chip); pch_phub_write_gbe_mac_addr() 480 retval = pch_phub_gbe_serial_rom_conf_mp(chip); pch_phub_write_gbe_mac_addr() 485 retval = pch_phub_write_serial_rom_val(chip, i, data[i]); pch_phub_write_gbe_mac_addr() 506 struct pch_phub_reg *chip = pch_phub_bin_read() local 516 chip->pch_phub_extrom_base_address = pci_map_rom(chip->pdev, &rom_size); pch_phub_bin_read() 517 if (!chip->pch_phub_extrom_base_address) pch_phub_bin_read() 520 pch_phub_read_serial_rom(chip, chip->pch_opt_rom_start_address, pch_phub_bin_read() 523 pch_phub_read_serial_rom(chip, chip->pch_opt_rom_start_address + 1, pch_phub_bin_read() 527 pch_phub_read_serial_rom(chip, pch_phub_bin_read() 528 chip->pch_opt_rom_start_address + 2, pch_phub_bin_read() 541 pch_phub_read_serial_rom(chip, pch_phub_bin_read() 542 chip->pch_opt_rom_start_address + addr_offset + off, pch_phub_bin_read() 550 pci_unmap_rom(chip->pdev, chip->pch_phub_extrom_base_address); pch_phub_bin_read() 555 pci_unmap_rom(chip->pdev, chip->pch_phub_extrom_base_address); pch_phub_bin_read() 570 struct pch_phub_reg *chip = pch_phub_bin_write() local 586 chip->pch_phub_extrom_base_address = pci_map_rom(chip->pdev, &rom_size); pch_phub_bin_write() 587 if (!chip->pch_phub_extrom_base_address) { pch_phub_bin_write() 596 ret = pch_phub_write_serial_rom(chip, pch_phub_bin_write() 597 chip->pch_opt_rom_start_address + addr_offset + off, pch_phub_bin_write() 606 pci_unmap_rom(chip->pdev, chip->pch_phub_extrom_base_address); pch_phub_bin_write() 611 pci_unmap_rom(chip->pdev, chip->pch_phub_extrom_base_address); pch_phub_bin_write() 622 struct pch_phub_reg *chip = dev_get_drvdata(dev); show_pch_mac() local 625 chip->pch_phub_extrom_base_address = pci_map_rom(chip->pdev, &rom_size); show_pch_mac() 626 if (!chip->pch_phub_extrom_base_address) show_pch_mac() 629 pch_phub_read_gbe_mac_addr(chip, mac); show_pch_mac() 630 pci_unmap_rom(chip->pdev, chip->pch_phub_extrom_base_address); show_pch_mac() 640 struct pch_phub_reg *chip = dev_get_drvdata(dev); store_pch_mac() local 646 chip->pch_phub_extrom_base_address = pci_map_rom(chip->pdev, &rom_size); store_pch_mac() 647 if (!chip->pch_phub_extrom_base_address) store_pch_mac() 650 ret = pch_phub_write_gbe_mac_addr(chip, mac); store_pch_mac() 651 pci_unmap_rom(chip->pdev, chip->pch_phub_extrom_base_address); store_pch_mac() 674 struct pch_phub_reg *chip; pch_phub_probe() local 676 chip = kzalloc(sizeof(struct pch_phub_reg), GFP_KERNEL); pch_phub_probe() 677 if (chip == NULL) pch_phub_probe() 698 chip->pch_phub_base_address = pci_iomap(pdev, 1, 0); pch_phub_probe() 701 if (chip->pch_phub_base_address == NULL) { pch_phub_probe() 708 chip->pch_phub_base_address); pch_phub_probe() 710 chip->pdev = pdev; /* Save pci device struct */ pch_phub_probe() 724 pch_phub_read_modify_write_reg(chip, pch_phub_probe() 732 pch_phub_read_modify_write_reg(chip, pch_phub_probe() 739 iowrite32(0x000affaa, chip->pch_phub_base_address + 0x14); pch_phub_probe() 741 iowrite32(0x25, chip->pch_phub_base_address + 0x44); pch_phub_probe() 742 chip->pch_opt_rom_start_address = PCH_PHUB_ROM_START_ADDR_EG20T; pch_phub_probe() 743 chip->pch_mac_start_address = PCH_PHUB_MAC_START_ADDR_EG20T; pch_phub_probe() 754 iowrite32(0x000affa0, chip->pch_phub_base_address + 0x14); pch_phub_probe() 755 chip->pch_opt_rom_start_address =\ pch_phub_probe() 761 iowrite32(0x000a0000, chip->pch_phub_base_address + 0x14); pch_phub_probe() 763 iowrite32(0x25, chip->pch_phub_base_address + 0x140); pch_phub_probe() 764 chip->pch_opt_rom_start_address =\ pch_phub_probe() 766 chip->pch_mac_start_address = PCH_PHUB_MAC_START_ADDR_ML7223; pch_phub_probe() 780 iowrite32(0x0000ffa0, chip->pch_phub_base_address + 0x14); pch_phub_probe() 781 chip->pch_opt_rom_start_address =\ pch_phub_probe() 783 chip->pch_mac_start_address = PCH_PHUB_MAC_START_ADDR_ML7223; pch_phub_probe() 795 iowrite32(0x000affaa, chip->pch_phub_base_address + 0x14); pch_phub_probe() 797 iowrite32(0x25, chip->pch_phub_base_address + 0x44); pch_phub_probe() 798 chip->pch_opt_rom_start_address = PCH_PHUB_ROM_START_ADDR_EG20T; pch_phub_probe() 799 chip->pch_mac_start_address = PCH_PHUB_MAC_START_ADDR_EG20T; pch_phub_probe() 802 chip->ioh_type = id->driver_data; pch_phub_probe() 803 pci_set_drvdata(pdev, chip); pch_phub_probe() 810 pci_iounmap(pdev, chip->pch_phub_base_address); pch_phub_probe() 816 kfree(chip); pch_phub_probe() 823 struct pch_phub_reg *chip = pci_get_drvdata(pdev); pch_phub_remove() local 827 pci_iounmap(pdev, chip->pch_phub_base_address); pch_phub_remove() 830 kfree(chip); pch_phub_remove()
H A D	bh1770glc.c	177 * Supported stand alone rates in ms from chip data sheet 187 * Supported stand alone rates in ms from chip data sheet 193 * interrupt control functions are called while keeping chip->mutex 196 static inline int bh1770_lux_interrupt_control(struct bh1770_chip *chip, bh1770_lux_interrupt_control() argument 199 chip->int_mode_lux = lux; bh1770_lux_interrupt_control() 201 return i2c_smbus_write_byte_data(chip->client, bh1770_lux_interrupt_control() 203 (lux << 1) | chip->int_mode_prox); bh1770_lux_interrupt_control() 206 static inline int bh1770_prox_interrupt_control(struct bh1770_chip *chip, bh1770_prox_interrupt_control() argument 209 chip->int_mode_prox = ps; bh1770_prox_interrupt_control() 210 return i2c_smbus_write_byte_data(chip->client, bh1770_prox_interrupt_control() 212 (chip->int_mode_lux << 1) | (ps << 0)); bh1770_prox_interrupt_control() 215 /* chip->mutex is always kept here */ bh1770_lux_rate() 216 static int bh1770_lux_rate(struct bh1770_chip *chip, int rate_index) bh1770_lux_rate() argument 218 /* sysfs may call this when the chip is powered off */ bh1770_lux_rate() 219 if (pm_runtime_suspended(&chip->client->dev)) bh1770_lux_rate() 223 if (chip->prox_enable_count) bh1770_lux_rate() 226 return i2c_smbus_write_byte_data(chip->client, bh1770_lux_rate() 231 static int bh1770_prox_rate(struct bh1770_chip *chip, int mode) bh1770_prox_rate() argument 236 chip->prox_rate_threshold : chip->prox_rate; bh1770_prox_rate() 238 return i2c_smbus_write_byte_data(chip->client, bh1770_prox_rate() 243 /* InfraredLED is controlled by the chip during proximity scanning */ bh1770_led_cfg() 244 static inline int bh1770_led_cfg(struct bh1770_chip *chip) bh1770_led_cfg() argument 247 return i2c_smbus_write_byte_data(chip->client, bh1770_led_cfg() 251 chip->prox_led); bh1770_led_cfg() 260 static inline u8 bh1770_psraw_to_adjusted(struct bh1770_chip *chip, u8 psraw) bh1770_psraw_to_adjusted() argument 263 adjusted = (u16)(((u32)(psraw + chip->prox_const) * chip->prox_coef) / bh1770_psraw_to_adjusted() 270 static inline u8 bh1770_psadjusted_to_raw(struct bh1770_chip *chip, u8 ps) bh1770_psadjusted_to_raw() argument 274 raw = (((u32)ps * BH1770_COEF_SCALER) / chip->prox_coef); bh1770_psadjusted_to_raw() 275 if (raw > chip->prox_const) bh1770_psadjusted_to_raw() 276 raw = raw - chip->prox_const; bh1770_psadjusted_to_raw() 288 static int bh1770_prox_set_threshold(struct bh1770_chip *chip) bh1770_prox_set_threshold() argument 292 /* sysfs may call this when the chip is powered off */ bh1770_prox_set_threshold() 293 if (pm_runtime_suspended(&chip->client->dev)) bh1770_prox_set_threshold() 296 tmp = bh1770_psadjusted_to_raw(chip, chip->prox_threshold); bh1770_prox_set_threshold() 297 chip->prox_threshold_hw = tmp; bh1770_prox_set_threshold() 299 return i2c_smbus_write_byte_data(chip->client, BH1770_PS_TH_LED1, bh1770_prox_set_threshold() 303 static inline u16 bh1770_lux_raw_to_adjusted(struct bh1770_chip *chip, u16 raw) bh1770_lux_raw_to_adjusted() argument 306 lux = ((u32)raw * chip->lux_corr) / BH1770_LUX_CORR_SCALE; bh1770_lux_raw_to_adjusted() 310 static inline u16 bh1770_lux_adjusted_to_raw(struct bh1770_chip *chip, bh1770_lux_adjusted_to_raw() argument 313 return (u32)adjusted * BH1770_LUX_CORR_SCALE / chip->lux_corr; bh1770_lux_adjusted_to_raw() 316 /* chip->mutex is kept when this is called */ bh1770_lux_update_thresholds() 317 static int bh1770_lux_update_thresholds(struct bh1770_chip *chip, bh1770_lux_update_thresholds() argument 323 /* sysfs may call this when the chip is powered off */ bh1770_lux_update_thresholds() 324 if (pm_runtime_suspended(&chip->client->dev)) bh1770_lux_update_thresholds() 333 threshold_hi = bh1770_lux_adjusted_to_raw(chip, threshold_hi); bh1770_lux_update_thresholds() 336 threshold_lo = bh1770_lux_adjusted_to_raw(chip, threshold_lo); bh1770_lux_update_thresholds() 338 if (chip->lux_thres_hi_onchip == threshold_hi && bh1770_lux_update_thresholds() 339 chip->lux_thres_lo_onchip == threshold_lo) bh1770_lux_update_thresholds() 342 chip->lux_thres_hi_onchip = threshold_hi; bh1770_lux_update_thresholds() 343 chip->lux_thres_lo_onchip = threshold_lo; bh1770_lux_update_thresholds() 350 ret = i2c_smbus_write_i2c_block_data(chip->client, bh1770_lux_update_thresholds() 357 static int bh1770_lux_get_result(struct bh1770_chip *chip) bh1770_lux_get_result() argument 362 ret = i2c_smbus_read_byte_data(chip->client, BH1770_ALS_DATA_0); bh1770_lux_get_result() 367 ret = i2c_smbus_read_byte_data(chip->client, BH1770_ALS_DATA_1); bh1770_lux_get_result() 371 chip->lux_data_raw = data | ((ret & 0xff) << 8); bh1770_lux_get_result() 376 /* Calculate correction value which contains chip and device specific parts */ bh1770_get_corr_value() 377 static u32 bh1770_get_corr_value(struct bh1770_chip *chip) bh1770_get_corr_value() argument 381 tmp = (BH1770_LUX_CORR_SCALE * chip->lux_ga) / BH1770_LUX_GA_SCALE; bh1770_get_corr_value() 382 /* Impact of chip factor correction */ bh1770_get_corr_value() 383 tmp = (tmp * chip->lux_cf) / BH1770_LUX_CF_SCALE; bh1770_get_corr_value() 385 tmp = (tmp * chip->lux_calib) / BH1770_CALIB_SCALER; bh1770_get_corr_value() 389 static int bh1770_lux_read_result(struct bh1770_chip *chip) bh1770_lux_read_result() argument 391 bh1770_lux_get_result(chip); bh1770_lux_read_result() 392 return bh1770_lux_raw_to_adjusted(chip, chip->lux_data_raw); bh1770_lux_read_result() 399 static int bh1770_chip_on(struct bh1770_chip *chip) bh1770_chip_on() argument 401 int ret = regulator_bulk_enable(ARRAY_SIZE(chip->regs), bh1770_chip_on() 402 chip->regs); bh1770_chip_on() 408 /* Reset the chip */ bh1770_chip_on() 409 i2c_smbus_write_byte_data(chip->client, BH1770_ALS_CONTROL, bh1770_chip_on() 418 chip->lux_data_raw = 0; bh1770_chip_on() 419 chip->prox_data = 0; bh1770_chip_on() 420 ret = i2c_smbus_write_byte_data(chip->client, bh1770_chip_on() 424 chip->lux_thres_hi_onchip = BH1770_LUX_RANGE; bh1770_chip_on() 425 chip->lux_thres_lo_onchip = 0; bh1770_chip_on() 430 static void bh1770_chip_off(struct bh1770_chip *chip) bh1770_chip_off() argument 432 i2c_smbus_write_byte_data(chip->client, bh1770_chip_off() 434 i2c_smbus_write_byte_data(chip->client, bh1770_chip_off() 436 i2c_smbus_write_byte_data(chip->client, bh1770_chip_off() 438 regulator_bulk_disable(ARRAY_SIZE(chip->regs), chip->regs); bh1770_chip_off() 441 /* chip->mutex is kept when this is called */ bh1770_prox_mode_control() 442 static int bh1770_prox_mode_control(struct bh1770_chip *chip) bh1770_prox_mode_control() argument 444 if (chip->prox_enable_count) { bh1770_prox_mode_control() 445 chip->prox_force_update = true; /* Force immediate update */ bh1770_prox_mode_control() 447 bh1770_lux_rate(chip, chip->lux_rate_index); bh1770_prox_mode_control() 448 bh1770_prox_set_threshold(chip); bh1770_prox_mode_control() 449 bh1770_led_cfg(chip); bh1770_prox_mode_control() 450 bh1770_prox_rate(chip, PROX_BELOW_THRESHOLD); bh1770_prox_mode_control() 451 bh1770_prox_interrupt_control(chip, BH1770_ENABLE); bh1770_prox_mode_control() 452 i2c_smbus_write_byte_data(chip->client, bh1770_prox_mode_control() 455 chip->prox_data = 0; bh1770_prox_mode_control() 456 bh1770_lux_rate(chip, chip->lux_rate_index); bh1770_prox_mode_control() 457 bh1770_prox_interrupt_control(chip, BH1770_DISABLE); bh1770_prox_mode_control() 458 i2c_smbus_write_byte_data(chip->client, bh1770_prox_mode_control() 464 /* chip->mutex is kept when this is called */ bh1770_prox_read_result() 465 static int bh1770_prox_read_result(struct bh1770_chip *chip) bh1770_prox_read_result() argument 471 ret = i2c_smbus_read_byte_data(chip->client, BH1770_PS_DATA_LED1); bh1770_prox_read_result() 475 if (ret > chip->prox_threshold_hw) bh1770_prox_read_result() 485 if (chip->lux_data_raw > PROX_IGNORE_LUX_LIMIT) bh1770_prox_read_result() 488 chip->prox_data = bh1770_psraw_to_adjusted(chip, ret); bh1770_prox_read_result() 491 if (chip->prox_data >= chip->prox_abs_thres || bh1770_prox_read_result() 492 chip->prox_force_update) bh1770_prox_read_result() 493 chip->prox_persistence_counter = chip->prox_persistence; bh1770_prox_read_result() 495 chip->prox_force_update = false; bh1770_prox_read_result() 499 if (chip->prox_persistence_counter < chip->prox_persistence) { bh1770_prox_read_result() 500 chip->prox_persistence_counter++; bh1770_prox_read_result() 507 chip->prox_persistence_counter = 0; bh1770_prox_read_result() 509 chip->prox_data = 0; bh1770_prox_read_result() 515 bh1770_prox_rate(chip, mode); bh1770_prox_read_result() 516 sysfs_notify(&chip->client->dev.kobj, NULL, "prox0_raw"); bh1770_prox_read_result() 522 static int bh1770_detect(struct bh1770_chip *chip) bh1770_detect() argument 524 struct i2c_client *client = chip->client; bh1770_detect() 538 chip->revision = (part & BH1770_REV_MASK) >> BH1770_REV_SHIFT; bh1770_detect() 539 chip->prox_coef = BH1770_COEF_SCALER; bh1770_detect() 540 chip->prox_const = 0; bh1770_detect() 541 chip->lux_cf = BH1770_NEUTRAL_CF; bh1770_detect() 545 snprintf(chip->chipname, sizeof(chip->chipname), "BH1770GLC"); bh1770_detect() 551 snprintf(chip->chipname, sizeof(chip->chipname), "SFH7770"); bh1770_detect() 553 chip->prox_coef = 819; /* 0.8 * BH1770_COEF_SCALER */ bh1770_detect() 554 chip->prox_const = 40; bh1770_detect() 576 struct bh1770_chip *chip = bh1770_prox_work() local 579 mutex_lock(&chip->mutex); bh1770_prox_work() 580 bh1770_prox_read_result(chip); bh1770_prox_work() 581 mutex_unlock(&chip->mutex); bh1770_prox_work() 587 struct bh1770_chip *chip = data; bh1770_irq() local 591 mutex_lock(&chip->mutex); bh1770_irq() 592 status = i2c_smbus_read_byte_data(chip->client, BH1770_ALS_PS_STATUS); bh1770_irq() 595 i2c_smbus_read_byte_data(chip->client, BH1770_INTERRUPT); bh1770_irq() 602 bh1770_lux_get_result(chip); bh1770_irq() 603 if (unlikely(chip->lux_wait_result)) { bh1770_irq() 604 chip->lux_wait_result = false; bh1770_irq() 605 wake_up(&chip->wait); bh1770_irq() 606 bh1770_lux_update_thresholds(chip, bh1770_irq() 607 chip->lux_threshold_hi, bh1770_irq() 608 chip->lux_threshold_lo); bh1770_irq() 613 i2c_smbus_write_byte_data(chip->client, BH1770_INTERRUPT, bh1770_irq() 617 sysfs_notify(&chip->client->dev.kobj, NULL, "lux0_input"); bh1770_irq() 619 if (chip->int_mode_prox && (status & BH1770_INT_LEDS_INT)) { bh1770_irq() 620 rate = prox_rates_ms[chip->prox_rate_threshold]; bh1770_irq() 621 bh1770_prox_read_result(chip); bh1770_irq() 625 i2c_smbus_write_byte_data(chip->client, BH1770_INTERRUPT, bh1770_irq() 626 (chip->int_mode_lux << 1) | bh1770_irq() 627 (chip->int_mode_prox << 0)); bh1770_irq() 628 mutex_unlock(&chip->mutex); bh1770_irq() 639 cancel_delayed_work_sync(&chip->prox_work); bh1770_irq() 640 schedule_delayed_work(&chip->prox_work, bh1770_irq() 650 struct bh1770_chip *chip = dev_get_drvdata(dev); bh1770_power_state_store() local 658 mutex_lock(&chip->mutex); bh1770_power_state_store() 662 ret = bh1770_lux_rate(chip, chip->lux_rate_index); bh1770_power_state_store() 668 ret = bh1770_lux_interrupt_control(chip, BH1770_ENABLE); bh1770_power_state_store() 675 bh1770_lux_update_thresholds(chip, BH1770_LUX_DEF_THRES, bh1770_power_state_store() 678 chip->lux_wait_result = true; bh1770_power_state_store() 679 bh1770_prox_mode_control(chip); bh1770_power_state_store() 685 mutex_unlock(&chip->mutex); bh1770_power_state_store() 698 struct bh1770_chip *chip = dev_get_drvdata(dev); bh1770_lux_result_show() local 705 timeout = wait_event_interruptible_timeout(chip->wait, bh1770_lux_result_show() 706 !chip->lux_wait_result, bh1770_lux_result_show() 711 mutex_lock(&chip->mutex); bh1770_lux_result_show() 712 ret = sprintf(buf, "%d\n", bh1770_lux_read_result(chip)); bh1770_lux_result_show() 713 mutex_unlock(&chip->mutex); bh1770_lux_result_show() 728 struct bh1770_chip *chip = dev_get_drvdata(dev); bh1770_prox_enable_store() local 736 mutex_lock(&chip->mutex); bh1770_prox_enable_store() 738 if (!chip->prox_enable_count) bh1770_prox_enable_store() 739 chip->prox_data = 0; bh1770_prox_enable_store() 742 chip->prox_enable_count++; bh1770_prox_enable_store() 743 else if (chip->prox_enable_count > 0) bh1770_prox_enable_store() 744 chip->prox_enable_count--; bh1770_prox_enable_store() 748 /* Run control only when chip is powered on */ bh1770_prox_enable_store() 750 bh1770_prox_mode_control(chip); bh1770_prox_enable_store() 752 mutex_unlock(&chip->mutex); bh1770_prox_enable_store() 759 struct bh1770_chip *chip = dev_get_drvdata(dev); bh1770_prox_enable_show() local 762 mutex_lock(&chip->mutex); bh1770_prox_enable_show() 763 len = sprintf(buf, "%d\n", chip->prox_enable_count); bh1770_prox_enable_show() 764 mutex_unlock(&chip->mutex); bh1770_prox_enable_show() 771 struct bh1770_chip *chip = dev_get_drvdata(dev); bh1770_prox_result_show() local 774 mutex_lock(&chip->mutex); bh1770_prox_result_show() 775 if (chip->prox_enable_count && !pm_runtime_suspended(dev)) bh1770_prox_result_show() 776 ret = sprintf(buf, "%d\n", chip->prox_data); bh1770_prox_result_show() 779 mutex_unlock(&chip->mutex); bh1770_prox_result_show() 803 struct bh1770_chip *chip = dev_get_drvdata(dev); bh1770_get_prox_rate_above() local 804 return sprintf(buf, "%d\n", prox_rates_hz[chip->prox_rate_threshold]); bh1770_get_prox_rate_above() 810 struct bh1770_chip *chip = dev_get_drvdata(dev); bh1770_get_prox_rate_below() local 811 return sprintf(buf, "%d\n", prox_rates_hz[chip->prox_rate]); bh1770_get_prox_rate_below() 828 struct bh1770_chip *chip = dev_get_drvdata(dev); bh1770_set_prox_rate_above() local 836 mutex_lock(&chip->mutex); bh1770_set_prox_rate_above() 837 chip->prox_rate_threshold = bh1770_prox_rate_validate(value); bh1770_set_prox_rate_above() 838 mutex_unlock(&chip->mutex); bh1770_set_prox_rate_above() 846 struct bh1770_chip *chip = dev_get_drvdata(dev); bh1770_set_prox_rate_below() local 854 mutex_lock(&chip->mutex); bh1770_set_prox_rate_below() 855 chip->prox_rate = bh1770_prox_rate_validate(value); bh1770_set_prox_rate_below() 856 mutex_unlock(&chip->mutex); bh1770_set_prox_rate_below() 863 struct bh1770_chip *chip = dev_get_drvdata(dev); bh1770_get_prox_thres() local 864 return sprintf(buf, "%d\n", chip->prox_threshold); bh1770_get_prox_thres() 871 struct bh1770_chip *chip = dev_get_drvdata(dev); bh1770_set_prox_thres() local 882 mutex_lock(&chip->mutex); bh1770_set_prox_thres() 883 chip->prox_threshold = value; bh1770_set_prox_thres() 884 ret = bh1770_prox_set_threshold(chip); bh1770_set_prox_thres() 885 mutex_unlock(&chip->mutex); bh1770_set_prox_thres() 894 struct bh1770_chip *chip = dev_get_drvdata(dev); bh1770_prox_persistence_show() local 896 return sprintf(buf, "%u\n", chip->prox_persistence); bh1770_prox_persistence_show() 903 struct bh1770_chip *chip = dev_get_drvdata(dev); bh1770_prox_persistence_store() local 914 chip->prox_persistence = value; bh1770_prox_persistence_store() 922 struct bh1770_chip *chip = dev_get_drvdata(dev); bh1770_prox_abs_thres_show() local 923 return sprintf(buf, "%u\n", chip->prox_abs_thres); bh1770_prox_abs_thres_show() 930 struct bh1770_chip *chip = dev_get_drvdata(dev); bh1770_prox_abs_thres_store() local 941 chip->prox_abs_thres = value; bh1770_prox_abs_thres_store() 949 struct bh1770_chip *chip = dev_get_drvdata(dev); bh1770_chip_id_show() local 950 return sprintf(buf, "%s rev %d\n", chip->chipname, chip->revision); bh1770_chip_id_show() 962 struct bh1770_chip *chip = dev_get_drvdata(dev); bh1770_lux_calib_show() local 965 mutex_lock(&chip->mutex); bh1770_lux_calib_show() 966 len = sprintf(buf, "%u\n", chip->lux_calib); bh1770_lux_calib_show() 967 mutex_unlock(&chip->mutex); bh1770_lux_calib_show() 975 struct bh1770_chip *chip = dev_get_drvdata(dev); bh1770_lux_calib_store() local 985 mutex_lock(&chip->mutex); bh1770_lux_calib_store() 986 old_calib = chip->lux_calib; bh1770_lux_calib_store() 987 chip->lux_calib = value; bh1770_lux_calib_store() 988 new_corr = bh1770_get_corr_value(chip); bh1770_lux_calib_store() 990 chip->lux_calib = old_calib; bh1770_lux_calib_store() 991 mutex_unlock(&chip->mutex); bh1770_lux_calib_store() 994 chip->lux_corr = new_corr; bh1770_lux_calib_store() 996 bh1770_lux_update_thresholds(chip, chip->lux_threshold_hi, bh1770_lux_calib_store() 997 chip->lux_threshold_lo); bh1770_lux_calib_store() 999 mutex_unlock(&chip->mutex); bh1770_lux_calib_store() 1018 struct bh1770_chip *chip = dev_get_drvdata(dev); bh1770_get_lux_rate() local 1019 return sprintf(buf, "%d\n", lux_rates_hz[chip->lux_rate_index]); bh1770_get_lux_rate() 1026 struct bh1770_chip *chip = dev_get_drvdata(dev); bh1770_set_lux_rate() local 1038 mutex_lock(&chip->mutex); bh1770_set_lux_rate() 1039 chip->lux_rate_index = i; bh1770_set_lux_rate() 1040 ret = bh1770_lux_rate(chip, i); bh1770_set_lux_rate() 1041 mutex_unlock(&chip->mutex); bh1770_set_lux_rate() 1052 struct bh1770_chip *chip = dev_get_drvdata(dev); bh1770_get_lux_thresh_above() local 1053 return sprintf(buf, "%d\n", chip->lux_threshold_hi); bh1770_get_lux_thresh_above() 1059 struct bh1770_chip *chip = dev_get_drvdata(dev); bh1770_get_lux_thresh_below() local 1060 return sprintf(buf, "%d\n", chip->lux_threshold_lo); bh1770_get_lux_thresh_below() 1063 static ssize_t bh1770_set_lux_thresh(struct bh1770_chip *chip, u16 *target, bh1770_set_lux_thresh() argument 1076 mutex_lock(&chip->mutex); bh1770_set_lux_thresh() 1082 if (!chip->lux_wait_result) bh1770_set_lux_thresh() 1083 ret = bh1770_lux_update_thresholds(chip, bh1770_set_lux_thresh() 1084 chip->lux_threshold_hi, bh1770_set_lux_thresh() 1085 chip->lux_threshold_lo); bh1770_set_lux_thresh() 1086 mutex_unlock(&chip->mutex); bh1770_set_lux_thresh() 1095 struct bh1770_chip *chip = dev_get_drvdata(dev); bh1770_set_lux_thresh_above() local 1096 int ret = bh1770_set_lux_thresh(chip, &chip->lux_threshold_hi, buf); bh1770_set_lux_thresh_above() 1106 struct bh1770_chip *chip = dev_get_drvdata(dev); bh1770_set_lux_thresh_below() local 1107 int ret = bh1770_set_lux_thresh(chip, &chip->lux_threshold_lo, buf); bh1770_set_lux_thresh_below() 1185 struct bh1770_chip *chip; bh1770_probe() local 1188 chip = devm_kzalloc(&client->dev, sizeof *chip, GFP_KERNEL); bh1770_probe() 1189 if (!chip) bh1770_probe() 1192 i2c_set_clientdata(client, chip); bh1770_probe() 1193 chip->client = client; bh1770_probe() 1195 mutex_init(&chip->mutex); bh1770_probe() 1196 init_waitqueue_head(&chip->wait); bh1770_probe() 1197 INIT_DELAYED_WORK(&chip->prox_work, bh1770_prox_work); bh1770_probe() 1204 chip->pdata = client->dev.platform_data; bh1770_probe() 1205 chip->lux_calib = BH1770_LUX_NEUTRAL_CALIB_VALUE; bh1770_probe() 1206 chip->lux_rate_index = BH1770_LUX_DEFAULT_RATE; bh1770_probe() 1207 chip->lux_threshold_lo = BH1770_LUX_DEF_THRES; bh1770_probe() 1208 chip->lux_threshold_hi = BH1770_LUX_DEF_THRES; bh1770_probe() 1210 if (chip->pdata->glass_attenuation == 0) bh1770_probe() 1211 chip->lux_ga = BH1770_NEUTRAL_GA; bh1770_probe() 1213 chip->lux_ga = chip->pdata->glass_attenuation; bh1770_probe() 1215 chip->prox_threshold = BH1770_PROX_DEF_THRES; bh1770_probe() 1216 chip->prox_led = chip->pdata->led_def_curr; bh1770_probe() 1217 chip->prox_abs_thres = BH1770_PROX_DEF_ABS_THRES; bh1770_probe() 1218 chip->prox_persistence = BH1770_DEFAULT_PERSISTENCE; bh1770_probe() 1219 chip->prox_rate_threshold = BH1770_PROX_DEF_RATE_THRESH; bh1770_probe() 1220 chip->prox_rate = BH1770_PROX_DEFAULT_RATE; bh1770_probe() 1221 chip->prox_data = 0; bh1770_probe() 1223 chip->regs[0].supply = reg_vcc; bh1770_probe() 1224 chip->regs[1].supply = reg_vleds; bh1770_probe() 1227 ARRAY_SIZE(chip->regs), chip->regs); bh1770_probe() 1233 err = regulator_bulk_enable(ARRAY_SIZE(chip->regs), bh1770_probe() 1234 chip->regs); bh1770_probe() 1241 err = bh1770_detect(chip); bh1770_probe() 1245 /* Start chip */ bh1770_probe() 1246 bh1770_chip_on(chip); bh1770_probe() 1250 chip->lux_corr = bh1770_get_corr_value(chip); bh1770_probe() 1251 if (chip->lux_corr == 0) { bh1770_probe() 1257 if (chip->pdata->setup_resources) { bh1770_probe() 1258 err = chip->pdata->setup_resources(); bh1770_probe() 1265 err = sysfs_create_group(&chip->client->dev.kobj, bh1770_probe() 1268 dev_err(&chip->client->dev, "Sysfs registration failed\n"); bh1770_probe() 1281 "bh1770", chip); bh1770_probe() 1287 regulator_bulk_disable(ARRAY_SIZE(chip->regs), chip->regs); bh1770_probe() 1290 sysfs_remove_group(&chip->client->dev.kobj, bh1770_probe() 1293 if (chip->pdata->release_resources) bh1770_probe() 1294 chip->pdata->release_resources(); bh1770_probe() 1296 regulator_bulk_disable(ARRAY_SIZE(chip->regs), chip->regs); bh1770_probe() 1302 struct bh1770_chip *chip = i2c_get_clientdata(client); bh1770_remove() local 1304 free_irq(client->irq, chip); bh1770_remove() 1306 sysfs_remove_group(&chip->client->dev.kobj, bh1770_remove() 1309 if (chip->pdata->release_resources) bh1770_remove() 1310 chip->pdata->release_resources(); bh1770_remove() 1312 cancel_delayed_work_sync(&chip->prox_work); bh1770_remove() 1315 bh1770_chip_off(chip); bh1770_remove() 1327 struct bh1770_chip *chip = i2c_get_clientdata(client); bh1770_suspend() local 1329 bh1770_chip_off(chip); bh1770_suspend() 1337 struct bh1770_chip *chip = i2c_get_clientdata(client); bh1770_resume() local 1340 bh1770_chip_on(chip); bh1770_resume() 1347 ret = bh1770_lux_rate(chip, chip->lux_rate_index); bh1770_resume() 1348 ret |= bh1770_lux_interrupt_control(chip, BH1770_ENABLE); bh1770_resume() 1351 bh1770_lux_update_thresholds(chip, BH1770_LUX_DEF_THRES, bh1770_resume() 1354 chip->lux_wait_result = true; bh1770_resume() 1355 bh1770_prox_mode_control(chip); bh1770_resume() 1365 struct bh1770_chip *chip = i2c_get_clientdata(client); bh1770_runtime_suspend() local 1367 bh1770_chip_off(chip); bh1770_runtime_suspend() 1375 struct bh1770_chip *chip = i2c_get_clientdata(client); bh1770_runtime_resume() local 1377 bh1770_chip_on(chip); bh1770_runtime_resume()
H A D	apds990x.c	117 /* Reverse chip factors for threshold calculation */ 201 static int apds990x_read_byte(struct apds990x_chip *chip, u8 reg, u8 *data) apds990x_read_byte() argument 203 struct i2c_client *client = chip->client; apds990x_read_byte() 214 static int apds990x_read_word(struct apds990x_chip *chip, u8 reg, u16 *data) apds990x_read_word() argument 216 struct i2c_client *client = chip->client; apds990x_read_word() 227 static int apds990x_write_byte(struct apds990x_chip *chip, u8 reg, u8 data) apds990x_write_byte() argument 229 struct i2c_client *client = chip->client; apds990x_write_byte() 239 static int apds990x_write_word(struct apds990x_chip *chip, u8 reg, u16 data) apds990x_write_word() argument 241 struct i2c_client *client = chip->client; apds990x_write_word() 251 static int apds990x_mode_on(struct apds990x_chip *chip) apds990x_mode_on() argument 257 if (chip->prox_en) apds990x_mode_on() 260 return apds990x_write_byte(chip, APDS990X_ENABLE, reg); apds990x_mode_on() 263 static u16 apds990x_lux_to_threshold(struct apds990x_chip *chip, u32 lux) apds990x_lux_to_threshold() argument 289 lux = lux * (APDS_CALIB_SCALER / 4) / (chip->lux_calib / 4); apds990x_lux_to_threshold() 292 cpl = ((u32)chip->atime * (u32)again[chip->again_next] * apds990x_lux_to_threshold() 293 APDS_PARAM_SCALE * 64) / (chip->cf.ga * chip->cf.df); apds990x_lux_to_threshold() 301 ir = (u32)chip->lux_ir * (u32)again[chip->again_next] / apds990x_lux_to_threshold() 302 (u32)again[chip->again_meas]; apds990x_lux_to_threshold() 308 if (chip->lux_clear * APDS_PARAM_SCALE >= apds990x_lux_to_threshold() 309 chip->rcf.afactor * chip->lux_ir) apds990x_lux_to_threshold() 310 thres = (chip->rcf.cf1 * thres + chip->rcf.irf1 * ir) / apds990x_lux_to_threshold() 313 thres = (chip->rcf.cf2 * thres + chip->rcf.irf2 * ir) / apds990x_lux_to_threshold() 316 if (thres >= chip->a_max_result) apds990x_lux_to_threshold() 317 thres = chip->a_max_result - 1; apds990x_lux_to_threshold() 321 static inline int apds990x_set_atime(struct apds990x_chip *chip, u32 time_ms) apds990x_set_atime() argument 325 chip->atime = time_ms; apds990x_set_atime() 329 chip->a_max_result = (u16)(256 - reg_value) * APDS990X_TIME_TO_ADC; apds990x_set_atime() 330 return apds990x_write_byte(chip, APDS990X_ATIME, reg_value); apds990x_set_atime() 334 static int apds990x_refresh_pthres(struct apds990x_chip *chip, int data) apds990x_refresh_pthres() argument 338 /* If the chip is not in use, don't try to access it */ apds990x_refresh_pthres() 339 if (pm_runtime_suspended(&chip->client->dev)) apds990x_refresh_pthres() 342 if (data < chip->prox_thres) { apds990x_refresh_pthres() 344 hi = chip->prox_thres; apds990x_refresh_pthres() 346 lo = chip->prox_thres - APDS_PROX_HYSTERESIS; apds990x_refresh_pthres() 347 if (chip->prox_continuous_mode) apds990x_refresh_pthres() 348 hi = chip->prox_thres; apds990x_refresh_pthres() 353 ret = apds990x_write_word(chip, APDS990X_PILTL, lo); apds990x_refresh_pthres() 354 ret |= apds990x_write_word(chip, APDS990X_PIHTL, hi); apds990x_refresh_pthres() 359 static int apds990x_refresh_athres(struct apds990x_chip *chip) apds990x_refresh_athres() argument 362 /* If the chip is not in use, don't try to access it */ apds990x_refresh_athres() 363 if (pm_runtime_suspended(&chip->client->dev)) apds990x_refresh_athres() 366 ret = apds990x_write_word(chip, APDS990X_AILTL, apds990x_refresh_athres() 367 apds990x_lux_to_threshold(chip, chip->lux_thres_lo)); apds990x_refresh_athres() 368 ret |= apds990x_write_word(chip, APDS990X_AIHTL, apds990x_refresh_athres() 369 apds990x_lux_to_threshold(chip, chip->lux_thres_hi)); apds990x_refresh_athres() 375 static void apds990x_force_a_refresh(struct apds990x_chip *chip) apds990x_force_a_refresh() argument 378 apds990x_write_word(chip, APDS990X_AILTL, APDS_LUX_DEF_THRES_LO); apds990x_force_a_refresh() 379 apds990x_write_word(chip, APDS990X_AIHTL, APDS_LUX_DEF_THRES_HI); apds990x_force_a_refresh() 383 static void apds990x_force_p_refresh(struct apds990x_chip *chip) apds990x_force_p_refresh() argument 386 apds990x_write_word(chip, APDS990X_PILTL, APDS_PROX_DEF_THRES - 1); apds990x_force_p_refresh() 387 apds990x_write_word(chip, APDS990X_PIHTL, APDS_PROX_DEF_THRES); apds990x_force_p_refresh() 391 static int apds990x_calc_again(struct apds990x_chip *chip) apds990x_calc_again() argument 393 int curr_again = chip->again_meas; apds990x_calc_again() 394 int next_again = chip->again_meas; apds990x_calc_again() 398 if (chip->lux_clear == chip->a_max_result) apds990x_calc_again() 400 else if (chip->lux_clear > chip->a_max_result / 2) apds990x_calc_again() 402 else if (chip->lux_clear < APDS_LUX_GAIN_LO_LIMIT_STRICT) apds990x_calc_again() 404 else if (chip->lux_clear < APDS_LUX_GAIN_LO_LIMIT) apds990x_calc_again() 414 if (chip->lux_clear == chip->a_max_result) apds990x_calc_again() 418 chip->lux_clear < APDS_LUX_GAIN_LO_LIMIT_STRICT) apds990x_calc_again() 425 chip->again_next = next_again; apds990x_calc_again() 426 apds990x_write_byte(chip, APDS990X_CONTROL, apds990x_calc_again() 427 (chip->pdrive << 6) | apds990x_calc_again() 428 (chip->pdiode << 4) | apds990x_calc_again() 429 (chip->pgain << 2) | apds990x_calc_again() 430 (chip->again_next << 0)); apds990x_calc_again() 438 apds990x_force_a_refresh(chip); apds990x_calc_again() 440 apds990x_refresh_athres(chip); apds990x_calc_again() 446 static int apds990x_get_lux(struct apds990x_chip *chip, int clear, int ir) apds990x_get_lux() argument 455 iac1 = (chip->cf.cf1 * clear - chip->cf.irf1 * ir) / APDS_PARAM_SCALE; apds990x_get_lux() 456 iac2 = (chip->cf.cf2 * clear - chip->cf.irf2 * ir) / APDS_PARAM_SCALE; apds990x_get_lux() 461 lpc = APDS990X_LUX_OUTPUT_SCALE * (chip->cf.df * chip->cf.ga) / apds990x_get_lux() 462 (u32)(again[chip->again_meas] * (u32)chip->atime); apds990x_get_lux() 467 static int apds990x_ack_int(struct apds990x_chip *chip, u8 mode) apds990x_ack_int() argument 469 struct i2c_client *client = chip->client; apds990x_ack_int() 491 struct apds990x_chip *chip = data; apds990x_irq() local 494 apds990x_read_byte(chip, APDS990X_STATUS, &status); apds990x_irq() 495 apds990x_ack_int(chip, status); apds990x_irq() 497 mutex_lock(&chip->mutex); apds990x_irq() 498 if (!pm_runtime_suspended(&chip->client->dev)) { apds990x_irq() 500 apds990x_read_word(chip, APDS990X_CDATAL, apds990x_irq() 501 &chip->lux_clear); apds990x_irq() 502 apds990x_read_word(chip, APDS990X_IRDATAL, apds990x_irq() 503 &chip->lux_ir); apds990x_irq() 505 chip->again_meas = chip->again_next; apds990x_irq() 507 chip->lux_raw = apds990x_get_lux(chip, apds990x_irq() 508 chip->lux_clear, apds990x_irq() 509 chip->lux_ir); apds990x_irq() 511 if (apds990x_calc_again(chip) == 0) { apds990x_irq() 513 chip->lux = chip->lux_raw; apds990x_irq() 514 chip->lux_wait_fresh_res = false; apds990x_irq() 515 wake_up(&chip->wait); apds990x_irq() 516 sysfs_notify(&chip->client->dev.kobj, apds990x_irq() 521 if ((status & APDS990X_ST_PINT) && chip->prox_en) { apds990x_irq() 524 apds990x_read_word(chip, APDS990X_CDATAL, &clr_ch); apds990x_irq() 530 if (chip->again_meas == 0 && apds990x_irq() 531 clr_ch == chip->a_max_result) apds990x_irq() 532 chip->prox_data = 0; apds990x_irq() 534 apds990x_read_word(chip, apds990x_irq() 536 &chip->prox_data); apds990x_irq() 538 apds990x_refresh_pthres(chip, chip->prox_data); apds990x_irq() 539 if (chip->prox_data < chip->prox_thres) apds990x_irq() 540 chip->prox_data = 0; apds990x_irq() 541 else if (!chip->prox_continuous_mode) apds990x_irq() 542 chip->prox_data = APDS_PROX_RANGE; apds990x_irq() 543 sysfs_notify(&chip->client->dev.kobj, apds990x_irq() 547 mutex_unlock(&chip->mutex); apds990x_irq() 551 static int apds990x_configure(struct apds990x_chip *chip) apds990x_configure() argument 554 apds990x_write_byte(chip, APDS990X_ENABLE, APDS990X_EN_DISABLE_ALL); apds990x_configure() 557 apds990x_write_byte(chip, APDS990X_PTIME, APDS990X_PTIME_DEFAULT); apds990x_configure() 558 apds990x_write_byte(chip, APDS990X_WTIME, APDS990X_WTIME_DEFAULT); apds990x_configure() 559 apds990x_set_atime(chip, APDS_LUX_AVERAGING_TIME); apds990x_configure() 561 apds990x_write_byte(chip, APDS990X_CONFIG, 0); apds990x_configure() 564 apds990x_write_byte(chip, APDS990X_PERS, apds990x_configure() 565 (chip->lux_persistence << APDS990X_APERS_SHIFT) | apds990x_configure() 566 (chip->prox_persistence << APDS990X_PPERS_SHIFT)); apds990x_configure() 568 apds990x_write_byte(chip, APDS990X_PPCOUNT, chip->pdata->ppcount); apds990x_configure() 571 chip->again_meas = 1; apds990x_configure() 572 chip->again_next = 1; apds990x_configure() 573 apds990x_write_byte(chip, APDS990X_CONTROL, apds990x_configure() 574 (chip->pdrive << 6) | apds990x_configure() 575 (chip->pdiode << 4) | apds990x_configure() 576 (chip->pgain << 2) | apds990x_configure() 577 (chip->again_next << 0)); apds990x_configure() 581 static int apds990x_detect(struct apds990x_chip *chip) apds990x_detect() argument 583 struct i2c_client *client = chip->client; apds990x_detect() 587 ret = apds990x_read_byte(chip, APDS990X_ID, &id); apds990x_detect() 593 ret = apds990x_read_byte(chip, APDS990X_REV, &chip->revision); apds990x_detect() 603 snprintf(chip->chipname, sizeof(chip->chipname), "APDS-990x"); apds990x_detect() 613 static int apds990x_chip_on(struct apds990x_chip *chip) apds990x_chip_on() argument 615 int err = regulator_bulk_enable(ARRAY_SIZE(chip->regs), apds990x_chip_on() 616 chip->regs); apds990x_chip_on() 623 chip->prox_data = 0; apds990x_chip_on() 624 apds990x_configure(chip); apds990x_chip_on() 625 apds990x_mode_on(chip); apds990x_chip_on() 630 static int apds990x_chip_off(struct apds990x_chip *chip) apds990x_chip_off() argument 632 apds990x_write_byte(chip, APDS990X_ENABLE, APDS990X_EN_DISABLE_ALL); apds990x_chip_off() 633 regulator_bulk_disable(ARRAY_SIZE(chip->regs), chip->regs); apds990x_chip_off() 640 struct apds990x_chip *chip = dev_get_drvdata(dev); apds990x_lux_show() local 648 timeout = wait_event_interruptible_timeout(chip->wait, apds990x_lux_show() 649 !chip->lux_wait_fresh_res, apds990x_lux_show() 654 mutex_lock(&chip->mutex); apds990x_lux_show() 655 result = (chip->lux * chip->lux_calib) / APDS_CALIB_SCALER; apds990x_lux_show() 662 mutex_unlock(&chip->mutex); apds990x_lux_show() 688 struct apds990x_chip *chip = dev_get_drvdata(dev); apds990x_lux_calib_show() local 690 return sprintf(buf, "%u\n", chip->lux_calib); apds990x_lux_calib_show() 697 struct apds990x_chip *chip = dev_get_drvdata(dev); apds990x_lux_calib_store() local 705 chip->lux_calib = value; apds990x_lux_calib_store() 727 struct apds990x_chip *chip = dev_get_drvdata(dev); apds990x_rate_show() local 728 return sprintf(buf, "%d\n", chip->arate); apds990x_rate_show() 731 static int apds990x_set_arate(struct apds990x_chip *chip, int rate) apds990x_set_arate() argument 743 chip->lux_persistence = apersis[i]; apds990x_set_arate() 744 chip->arate = arates_hz[i]; apds990x_set_arate() 746 /* If the chip is not in use, don't try to access it */ apds990x_set_arate() 747 if (pm_runtime_suspended(&chip->client->dev)) apds990x_set_arate() 751 return apds990x_write_byte(chip, APDS990X_PERS, apds990x_set_arate() 752 (chip->lux_persistence << APDS990X_APERS_SHIFT) | apds990x_set_arate() 753 (chip->prox_persistence << APDS990X_PPERS_SHIFT)); apds990x_set_arate() 760 struct apds990x_chip *chip = dev_get_drvdata(dev); apds990x_rate_store() local 768 mutex_lock(&chip->mutex); apds990x_rate_store() 769 ret = apds990x_set_arate(chip, value); apds990x_rate_store() 770 mutex_unlock(&chip->mutex); apds990x_rate_store() 786 struct apds990x_chip *chip = dev_get_drvdata(dev); apds990x_prox_show() local 787 if (pm_runtime_suspended(dev) || !chip->prox_en) apds990x_prox_show() 790 mutex_lock(&chip->mutex); apds990x_prox_show() 791 ret = sprintf(buf, "%d\n", chip->prox_data); apds990x_prox_show() 792 mutex_unlock(&chip->mutex); apds990x_prox_show() 809 struct apds990x_chip *chip = dev_get_drvdata(dev); apds990x_prox_enable_show() local 810 return sprintf(buf, "%d\n", chip->prox_en); apds990x_prox_enable_show() 817 struct apds990x_chip *chip = dev_get_drvdata(dev); apds990x_prox_enable_store() local 825 mutex_lock(&chip->mutex); apds990x_prox_enable_store() 827 if (!chip->prox_en) apds990x_prox_enable_store() 828 chip->prox_data = 0; apds990x_prox_enable_store() 831 chip->prox_en++; apds990x_prox_enable_store() 832 else if (chip->prox_en > 0) apds990x_prox_enable_store() 833 chip->prox_en--; apds990x_prox_enable_store() 836 apds990x_mode_on(chip); apds990x_prox_enable_store() 837 mutex_unlock(&chip->mutex); apds990x_prox_enable_store() 849 struct apds990x_chip *chip = dev_get_drvdata(dev); apds990x_prox_reporting_mode_show() local 851 reporting_modes[!!chip->prox_continuous_mode]); apds990x_prox_reporting_mode_show() 858 struct apds990x_chip *chip = dev_get_drvdata(dev); apds990x_prox_reporting_mode_store() local 861 chip->prox_continuous_mode = 0; apds990x_prox_reporting_mode_store() 863 chip->prox_continuous_mode = 1; apds990x_prox_reporting_mode_store() 886 struct apds990x_chip *chip = dev_get_drvdata(dev); apds990x_lux_thresh_above_show() local 887 return sprintf(buf, "%d\n", chip->lux_thres_hi); apds990x_lux_thresh_above_show() 893 struct apds990x_chip *chip = dev_get_drvdata(dev); apds990x_lux_thresh_below_show() local 894 return sprintf(buf, "%d\n", chip->lux_thres_lo); apds990x_lux_thresh_below_show() 897 static ssize_t apds990x_set_lux_thresh(struct apds990x_chip *chip, u32 *target, apds990x_set_lux_thresh() argument 910 mutex_lock(&chip->mutex); apds990x_set_lux_thresh() 916 if (!chip->lux_wait_fresh_res) apds990x_set_lux_thresh() 917 apds990x_refresh_athres(chip); apds990x_set_lux_thresh() 918 mutex_unlock(&chip->mutex); apds990x_set_lux_thresh() 927 struct apds990x_chip *chip = dev_get_drvdata(dev); apds990x_lux_thresh_above_store() local 928 int ret = apds990x_set_lux_thresh(chip, &chip->lux_thres_hi, buf); apds990x_lux_thresh_above_store() 938 struct apds990x_chip *chip = dev_get_drvdata(dev); apds990x_lux_thresh_below_store() local 939 int ret = apds990x_set_lux_thresh(chip, &chip->lux_thres_lo, buf); apds990x_lux_thresh_below_store() 956 struct apds990x_chip *chip = dev_get_drvdata(dev); apds990x_prox_threshold_show() local 957 return sprintf(buf, "%d\n", chip->prox_thres); apds990x_prox_threshold_show() 964 struct apds990x_chip *chip = dev_get_drvdata(dev); apds990x_prox_threshold_store() local 976 mutex_lock(&chip->mutex); apds990x_prox_threshold_store() 977 chip->prox_thres = value; apds990x_prox_threshold_store() 979 apds990x_force_p_refresh(chip); apds990x_prox_threshold_store() 980 mutex_unlock(&chip->mutex); apds990x_prox_threshold_store() 999 struct apds990x_chip *chip = dev_get_drvdata(dev); apds990x_power_state_store() local 1009 mutex_lock(&chip->mutex); apds990x_power_state_store() 1010 chip->lux_wait_fresh_res = true; apds990x_power_state_store() 1011 apds990x_force_a_refresh(chip); apds990x_power_state_store() 1012 apds990x_force_p_refresh(chip); apds990x_power_state_store() 1013 mutex_unlock(&chip->mutex); apds990x_power_state_store() 1028 struct apds990x_chip *chip = dev_get_drvdata(dev); apds990x_chip_id_show() local 1029 return sprintf(buf, "%s %d\n", chip->chipname, chip->revision); apds990x_chip_id_show() 1061 struct apds990x_chip *chip; apds990x_probe() local 1064 chip = kzalloc(sizeof *chip, GFP_KERNEL); apds990x_probe() 1065 if (!chip) apds990x_probe() 1068 i2c_set_clientdata(client, chip); apds990x_probe() 1069 chip->client = client; apds990x_probe() 1071 init_waitqueue_head(&chip->wait); apds990x_probe() 1072 mutex_init(&chip->mutex); apds990x_probe() 1073 chip->pdata = client->dev.platform_data; apds990x_probe() 1075 if (chip->pdata == NULL) { apds990x_probe() 1081 if (chip->pdata->cf.ga == 0) { apds990x_probe() 1083 chip->cf.ga = 1966; /* 0.48 * APDS_PARAM_SCALE */ apds990x_probe() 1084 chip->cf.cf1 = 4096; /* 1.00 * APDS_PARAM_SCALE */ apds990x_probe() 1085 chip->cf.irf1 = 9134; /* 2.23 * APDS_PARAM_SCALE */ apds990x_probe() 1086 chip->cf.cf2 = 2867; /* 0.70 * APDS_PARAM_SCALE */ apds990x_probe() 1087 chip->cf.irf2 = 5816; /* 1.42 * APDS_PARAM_SCALE */ apds990x_probe() 1088 chip->cf.df = 52; apds990x_probe() 1090 chip->cf = chip->pdata->cf; apds990x_probe() 1093 /* precalculate inverse chip factors for threshold control */ apds990x_probe() 1094 chip->rcf.afactor = apds990x_probe() 1095 (chip->cf.irf1 - chip->cf.irf2) * APDS_PARAM_SCALE / apds990x_probe() 1096 (chip->cf.cf1 - chip->cf.cf2); apds990x_probe() 1097 chip->rcf.cf1 = APDS_PARAM_SCALE * APDS_PARAM_SCALE / apds990x_probe() 1098 chip->cf.cf1; apds990x_probe() 1099 chip->rcf.irf1 = chip->cf.irf1 * APDS_PARAM_SCALE / apds990x_probe() 1100 chip->cf.cf1; apds990x_probe() 1101 chip->rcf.cf2 = APDS_PARAM_SCALE * APDS_PARAM_SCALE / apds990x_probe() 1102 chip->cf.cf2; apds990x_probe() 1103 chip->rcf.irf2 = chip->cf.irf2 * APDS_PARAM_SCALE / apds990x_probe() 1104 chip->cf.cf2; apds990x_probe() 1107 chip->lux_thres_hi = APDS_LUX_DEF_THRES_HI; apds990x_probe() 1108 chip->lux_thres_lo = APDS_LUX_DEF_THRES_LO; apds990x_probe() 1109 chip->lux_calib = APDS_LUX_NEUTRAL_CALIB_VALUE; apds990x_probe() 1111 chip->prox_thres = APDS_PROX_DEF_THRES; apds990x_probe() 1112 chip->pdrive = chip->pdata->pdrive; apds990x_probe() 1113 chip->pdiode = APDS_PDIODE_IR; apds990x_probe() 1114 chip->pgain = APDS_PGAIN_1X; apds990x_probe() 1115 chip->prox_calib = APDS_PROX_NEUTRAL_CALIB_VALUE; apds990x_probe() 1116 chip->prox_persistence = APDS_DEFAULT_PROX_PERS; apds990x_probe() 1117 chip->prox_continuous_mode = false; apds990x_probe() 1119 chip->regs[0].supply = reg_vcc; apds990x_probe() 1120 chip->regs[1].supply = reg_vled; apds990x_probe() 1123 ARRAY_SIZE(chip->regs), chip->regs); apds990x_probe() 1129 err = regulator_bulk_enable(ARRAY_SIZE(chip->regs), chip->regs); apds990x_probe() 1137 err = apds990x_detect(chip); apds990x_probe() 1145 apds990x_configure(chip); apds990x_probe() 1146 apds990x_set_arate(chip, APDS_LUX_DEFAULT_RATE); apds990x_probe() 1147 apds990x_mode_on(chip); apds990x_probe() 1151 if (chip->pdata->setup_resources) { apds990x_probe() 1152 err = chip->pdata->setup_resources(); apds990x_probe() 1159 err = sysfs_create_group(&chip->client->dev.kobj, apds990x_probe() 1162 dev_err(&chip->client->dev, "Sysfs registration failed\n"); apds990x_probe() 1170 "apds990x", chip); apds990x_probe() 1178 sysfs_remove_group(&chip->client->dev.kobj, apds990x_probe() 1181 if (chip->pdata && chip->pdata->release_resources) apds990x_probe() 1182 chip->pdata->release_resources(); apds990x_probe() 1184 regulator_bulk_disable(ARRAY_SIZE(chip->regs), chip->regs); apds990x_probe() 1186 regulator_bulk_free(ARRAY_SIZE(chip->regs), chip->regs); apds990x_probe() 1188 kfree(chip); apds990x_probe() 1194 struct apds990x_chip *chip = i2c_get_clientdata(client); apds990x_remove() local 1196 free_irq(client->irq, chip); apds990x_remove() 1197 sysfs_remove_group(&chip->client->dev.kobj, apds990x_remove() 1200 if (chip->pdata && chip->pdata->release_resources) apds990x_remove() 1201 chip->pdata->release_resources(); apds990x_remove() 1204 apds990x_chip_off(chip); apds990x_remove() 1209 regulator_bulk_free(ARRAY_SIZE(chip->regs), chip->regs); apds990x_remove() 1211 kfree(chip); apds990x_remove() 1219 struct apds990x_chip *chip = i2c_get_clientdata(client); apds990x_suspend() local 1221 apds990x_chip_off(chip); apds990x_suspend() 1228 struct apds990x_chip *chip = i2c_get_clientdata(client); apds990x_resume() local 1234 apds990x_chip_on(chip); apds990x_resume() 1244 struct apds990x_chip *chip = i2c_get_clientdata(client); apds990x_runtime_suspend() local 1246 apds990x_chip_off(chip); apds990x_runtime_suspend() 1253 struct apds990x_chip *chip = i2c_get_clientdata(client); apds990x_runtime_resume() local 1255 apds990x_chip_on(chip); apds990x_runtime_resume()
/linux-4.1.27/drivers/rtc/
H A D	rtc-v3020.c	40 int (*map_io)(struct v3020 *chip, struct platform_device *pdev, 42 void (*unmap_io)(struct v3020 *chip); 43 unsigned char (*read_bit)(struct v3020 *chip); 44 void (*write_bit)(struct v3020 *chip, unsigned char bit); 71 static int v3020_mmio_map(struct v3020 *chip, struct platform_device *pdev, v3020_mmio_map() argument 80 chip->leftshift = pdata->leftshift; v3020_mmio_map() 81 chip->ioaddress = ioremap(pdev->resource[0].start, 1); v3020_mmio_map() 82 if (chip->ioaddress == NULL) v3020_mmio_map() 88 static void v3020_mmio_unmap(struct v3020 *chip) v3020_mmio_unmap() argument 90 iounmap(chip->ioaddress); v3020_mmio_unmap() 93 static void v3020_mmio_write_bit(struct v3020 *chip, unsigned char bit) v3020_mmio_write_bit() argument 95 writel(bit << chip->leftshift, chip->ioaddress); v3020_mmio_write_bit() 98 static unsigned char v3020_mmio_read_bit(struct v3020 *chip) v3020_mmio_read_bit() argument 100 return !!(readl(chip->ioaddress) & (1 << chip->leftshift)); v3020_mmio_read_bit() 117 static int v3020_gpio_map(struct v3020 *chip, struct platform_device *pdev, v3020_gpio_map() argument 135 chip->gpio = v3020_gpio; v3020_gpio_map() 146 static void v3020_gpio_unmap(struct v3020 *chip) v3020_gpio_unmap() argument 154 static void v3020_gpio_write_bit(struct v3020 *chip, unsigned char bit) v3020_gpio_write_bit() argument 156 gpio_direction_output(chip->gpio[V3020_IO].gpio, bit); v3020_gpio_write_bit() 157 gpio_set_value(chip->gpio[V3020_CS].gpio, 0); v3020_gpio_write_bit() 158 gpio_set_value(chip->gpio[V3020_WR].gpio, 0); v3020_gpio_write_bit() 160 gpio_set_value(chip->gpio[V3020_WR].gpio, 1); v3020_gpio_write_bit() 161 gpio_set_value(chip->gpio[V3020_CS].gpio, 1); v3020_gpio_write_bit() 164 static unsigned char v3020_gpio_read_bit(struct v3020 *chip) v3020_gpio_read_bit() argument 168 gpio_direction_input(chip->gpio[V3020_IO].gpio); v3020_gpio_read_bit() 169 gpio_set_value(chip->gpio[V3020_CS].gpio, 0); v3020_gpio_read_bit() 170 gpio_set_value(chip->gpio[V3020_RD].gpio, 0); v3020_gpio_read_bit() 172 bit = !!gpio_get_value(chip->gpio[V3020_IO].gpio); v3020_gpio_read_bit() 174 gpio_set_value(chip->gpio[V3020_RD].gpio, 1); v3020_gpio_read_bit() 175 gpio_set_value(chip->gpio[V3020_CS].gpio, 1); v3020_gpio_read_bit() 187 static void v3020_set_reg(struct v3020 *chip, unsigned char address, v3020_set_reg() argument 195 chip->ops->write_bit(chip, (tmp & 1)); v3020_set_reg() 203 chip->ops->write_bit(chip, (data & 1)); v3020_set_reg() 210 static unsigned char v3020_get_reg(struct v3020 *chip, unsigned char address) v3020_get_reg() argument 216 chip->ops->write_bit(chip, (address & 1)); v3020_get_reg() 223 if (chip->ops->read_bit(chip)) v3020_get_reg() 233 struct v3020 *chip = dev_get_drvdata(dev); v3020_read_time() local 237 v3020_set_reg(chip, V3020_CMD_CLOCK2RAM, 0); v3020_read_time() 240 tmp = v3020_get_reg(chip, V3020_SECONDS); v3020_read_time() 242 tmp = v3020_get_reg(chip, V3020_MINUTES); v3020_read_time() 244 tmp = v3020_get_reg(chip, V3020_HOURS); v3020_read_time() 246 tmp = v3020_get_reg(chip, V3020_MONTH_DAY); v3020_read_time() 248 tmp = v3020_get_reg(chip, V3020_MONTH); v3020_read_time() 250 tmp = v3020_get_reg(chip, V3020_WEEK_DAY); v3020_read_time() 252 tmp = v3020_get_reg(chip, V3020_YEAR); v3020_read_time() 270 struct v3020 *chip = dev_get_drvdata(dev); v3020_set_time() local 281 v3020_set_reg(chip, V3020_SECONDS, bin2bcd(dt->tm_sec)); v3020_set_time() 282 v3020_set_reg(chip, V3020_MINUTES, bin2bcd(dt->tm_min)); v3020_set_time() 283 v3020_set_reg(chip, V3020_HOURS, bin2bcd(dt->tm_hour)); v3020_set_time() 284 v3020_set_reg(chip, V3020_MONTH_DAY, bin2bcd(dt->tm_mday)); v3020_set_time() 285 v3020_set_reg(chip, V3020_MONTH, bin2bcd(dt->tm_mon + 1)); v3020_set_time() 286 v3020_set_reg(chip, V3020_WEEK_DAY, bin2bcd(dt->tm_wday)); v3020_set_time() 287 v3020_set_reg(chip, V3020_YEAR, bin2bcd(dt->tm_year % 100)); v3020_set_time() 290 v3020_set_reg(chip, V3020_CMD_RAM2CLOCK, 0); v3020_set_time() 307 struct v3020 *chip; rtc_probe() local 312 chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL); rtc_probe() 313 if (!chip) rtc_probe() 317 chip->ops = &v3020_gpio_ops; rtc_probe() 319 chip->ops = &v3020_mmio_ops; rtc_probe() 321 retval = chip->ops->map_io(chip, pdev, pdata); rtc_probe() 328 temp = chip->ops->read_bit(chip); rtc_probe() 330 /* Test chip by doing a write/read sequence rtc_probe() 331 * to the chip ram */ rtc_probe() 332 v3020_set_reg(chip, V3020_SECONDS, 0x33); rtc_probe() 333 if (v3020_get_reg(chip, V3020_SECONDS) != 0x33) { rtc_probe() 340 v3020_set_reg(chip, V3020_STATUS_0, 0x0); rtc_probe() 345 chip->gpio[V3020_CS].gpio, chip->gpio[V3020_WR].gpio, rtc_probe() 346 chip->gpio[V3020_RD].gpio, chip->gpio[V3020_IO].gpio); rtc_probe() 352 chip->leftshift); rtc_probe() 354 platform_set_drvdata(pdev, chip); rtc_probe() 356 chip->rtc = devm_rtc_device_register(&pdev->dev, "v3020", rtc_probe() 358 if (IS_ERR(chip->rtc)) { rtc_probe() 359 retval = PTR_ERR(chip->rtc); rtc_probe() 366 chip->ops->unmap_io(chip); rtc_probe() 373 struct v3020 *chip = platform_get_drvdata(dev); rtc_remove() local 375 chip->ops->unmap_io(chip); rtc_remove()
H A D	rtc-ds1390.c	12 * and write the RTC. The extra features provided by the chip family 52 struct ds1390 *chip = dev_get_drvdata(dev); ds1390_get_reg() local 59 chip->txrx_buf[0] = address & 0x7f; ds1390_get_reg() 61 status = spi_write_then_read(spi, chip->txrx_buf, 1, chip->txrx_buf, 1); ds1390_get_reg() 65 *data = chip->txrx_buf[1]; ds1390_get_reg() 73 struct ds1390 *chip = dev_get_drvdata(dev); ds1390_read_time() local 77 chip->txrx_buf[0] = DS1390_REG_SECONDS; ds1390_read_time() 80 status = spi_write_then_read(spi, chip->txrx_buf, 1, chip->txrx_buf, 8); ds1390_read_time() 84 /* The chip sends data in this order: ds1390_read_time() 86 dt->tm_sec = bcd2bin(chip->txrx_buf[0]); ds1390_read_time() 87 dt->tm_min = bcd2bin(chip->txrx_buf[1]); ds1390_read_time() 88 dt->tm_hour = bcd2bin(chip->txrx_buf[2]); ds1390_read_time() 89 dt->tm_wday = bcd2bin(chip->txrx_buf[3]); ds1390_read_time() 90 dt->tm_mday = bcd2bin(chip->txrx_buf[4]); ds1390_read_time() 92 dt->tm_mon = bcd2bin(chip->txrx_buf[5] & 0x7f) - 1; ds1390_read_time() 94 dt->tm_year = bcd2bin(chip->txrx_buf[6]) + ((chip->txrx_buf[5] & 0x80) ? 100 : 0); ds1390_read_time() 102 struct ds1390 *chip = dev_get_drvdata(dev); ds1390_set_time() local 105 chip->txrx_buf[0] = DS1390_REG_SECONDS | 0x80; ds1390_set_time() 106 chip->txrx_buf[1] = bin2bcd(dt->tm_sec); ds1390_set_time() 107 chip->txrx_buf[2] = bin2bcd(dt->tm_min); ds1390_set_time() 108 chip->txrx_buf[3] = bin2bcd(dt->tm_hour); ds1390_set_time() 109 chip->txrx_buf[4] = bin2bcd(dt->tm_wday); ds1390_set_time() 110 chip->txrx_buf[5] = bin2bcd(dt->tm_mday); ds1390_set_time() 111 chip->txrx_buf[6] = bin2bcd(dt->tm_mon + 1) | ds1390_set_time() 113 chip->txrx_buf[7] = bin2bcd(dt->tm_year % 100); ds1390_set_time() 116 return spi_write_then_read(spi, chip->txrx_buf, 8, NULL, 0); ds1390_set_time() 127 struct ds1390 *chip; ds1390_probe() local 134 chip = devm_kzalloc(&spi->dev, sizeof(*chip), GFP_KERNEL); ds1390_probe() 135 if (!chip) ds1390_probe() 138 spi_set_drvdata(spi, chip); ds1390_probe() 146 chip->rtc = devm_rtc_device_register(&spi->dev, "ds1390", ds1390_probe() 148 if (IS_ERR(chip->rtc)) { ds1390_probe() 150 res = PTR_ERR(chip->rtc); ds1390_probe()
H A D	rtc-sun6i.c	121 struct sun6i_rtc_dev *chip = (struct sun6i_rtc_dev *) id; sun6i_rtc_alarmirq() local 124 val = readl(chip->base + SUN6I_ALRM_IRQ_STA); sun6i_rtc_alarmirq() 128 writel(val, chip->base + SUN6I_ALRM_IRQ_STA); sun6i_rtc_alarmirq() 130 rtc_update_irq(chip->rtc, 1, RTC_AF | RTC_IRQF); sun6i_rtc_alarmirq() 138 static void sun6i_rtc_setaie(int to, struct sun6i_rtc_dev *chip) sun6i_rtc_setaie() argument 150 chip->base + SUN6I_ALRM_IRQ_STA); sun6i_rtc_setaie() 153 writel(alrm_val, chip->base + SUN6I_ALRM_EN); sun6i_rtc_setaie() 154 writel(alrm_irq_val, chip->base + SUN6I_ALRM_IRQ_EN); sun6i_rtc_setaie() 155 writel(alrm_wake_val, chip->base + SUN6I_ALARM_CONFIG); sun6i_rtc_setaie() 160 struct sun6i_rtc_dev *chip = dev_get_drvdata(dev); sun6i_rtc_gettime() local 167 date = readl(chip->base + SUN6I_RTC_YMD); sun6i_rtc_gettime() 168 time = readl(chip->base + SUN6I_RTC_HMS); sun6i_rtc_gettime() 169 } while ((date != readl(chip->base + SUN6I_RTC_YMD)) || sun6i_rtc_gettime() 170 (time != readl(chip->base + SUN6I_RTC_HMS))); sun6i_rtc_gettime() 193 struct sun6i_rtc_dev *chip = dev_get_drvdata(dev); sun6i_rtc_getalarm() local 197 alrm_en = readl(chip->base + SUN6I_ALRM_IRQ_EN); sun6i_rtc_getalarm() 198 alrm_st = readl(chip->base + SUN6I_ALRM_IRQ_STA); sun6i_rtc_getalarm() 201 rtc_time_to_tm(chip->alarm, &wkalrm->time); sun6i_rtc_getalarm() 208 struct sun6i_rtc_dev *chip = dev_get_drvdata(dev); sun6i_rtc_setalarm() local 236 sun6i_rtc_setaie(0, chip); sun6i_rtc_setalarm() 237 writel(0, chip->base + SUN6I_ALRM_COUNTER); sun6i_rtc_setalarm() 240 writel(time_gap, chip->base + SUN6I_ALRM_COUNTER); sun6i_rtc_setalarm() 241 chip->alarm = time_set; sun6i_rtc_setalarm() 243 sun6i_rtc_setaie(wkalrm->enabled, chip); sun6i_rtc_setalarm() 248 static int sun6i_rtc_wait(struct sun6i_rtc_dev *chip, int offset, sun6i_rtc_wait() argument 255 reg = readl(chip->base + offset); sun6i_rtc_wait() 268 struct sun6i_rtc_dev *chip = dev_get_drvdata(dev); sun6i_rtc_settime() local 295 if (sun6i_rtc_wait(chip, SUN6I_LOSC_CTRL, sun6i_rtc_settime() 301 writel(time, chip->base + SUN6I_RTC_HMS); sun6i_rtc_settime() 309 if (sun6i_rtc_wait(chip, SUN6I_LOSC_CTRL, sun6i_rtc_settime() 315 writel(date, chip->base + SUN6I_RTC_YMD); sun6i_rtc_settime() 323 if (sun6i_rtc_wait(chip, SUN6I_LOSC_CTRL, sun6i_rtc_settime() 334 struct sun6i_rtc_dev *chip = dev_get_drvdata(dev); sun6i_rtc_alarm_irq_enable() local 337 sun6i_rtc_setaie(enabled, chip); sun6i_rtc_alarm_irq_enable() 352 struct sun6i_rtc_dev *chip; sun6i_rtc_probe() local 356 chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL); sun6i_rtc_probe() 357 if (!chip) sun6i_rtc_probe() 360 platform_set_drvdata(pdev, chip); sun6i_rtc_probe() 361 chip->dev = &pdev->dev; sun6i_rtc_probe() 364 chip->base = devm_ioremap_resource(&pdev->dev, res); sun6i_rtc_probe() 365 if (IS_ERR(chip->base)) sun6i_rtc_probe() 366 return PTR_ERR(chip->base); sun6i_rtc_probe() 368 chip->irq = platform_get_irq(pdev, 0); sun6i_rtc_probe() 369 if (chip->irq < 0) { sun6i_rtc_probe() 371 return chip->irq; sun6i_rtc_probe() 374 ret = devm_request_irq(&pdev->dev, chip->irq, sun6i_rtc_alarmirq, sun6i_rtc_probe() 375 0, dev_name(&pdev->dev), chip); sun6i_rtc_probe() 382 writel(0, chip->base + SUN6I_ALRM_COUNTER); sun6i_rtc_probe() 385 writel(0, chip->base + SUN6I_ALRM_EN); sun6i_rtc_probe() 388 writel(0, chip->base + SUN6I_ALRM_IRQ_EN); sun6i_rtc_probe() 391 writel(0, chip->base + SUN6I_ALRM1_EN); sun6i_rtc_probe() 394 writel(0, chip->base + SUN6I_ALRM1_IRQ_EN); sun6i_rtc_probe() 398 chip->base + SUN6I_ALRM_IRQ_STA); sun6i_rtc_probe() 402 chip->base + SUN6I_ALRM1_IRQ_STA); sun6i_rtc_probe() 405 writel(0, chip->base + SUN6I_ALARM_CONFIG); sun6i_rtc_probe() 407 chip->rtc = rtc_device_register("rtc-sun6i", &pdev->dev, sun6i_rtc_probe() 409 if (IS_ERR(chip->rtc)) { sun6i_rtc_probe() 411 return PTR_ERR(chip->rtc); sun6i_rtc_probe() 421 struct sun6i_rtc_dev *chip = platform_get_drvdata(pdev); sun6i_rtc_remove() local 423 rtc_device_unregister(chip->rtc); sun6i_rtc_remove()
/linux-4.1.27/sound/usb/6fire/
H A D	chip.c	16 #include "chip.h" 50 static void usb6fire_chip_abort(struct sfire_chip *chip) usb6fire_chip_abort() argument 52 if (chip) { usb6fire_chip_abort() 53 if (chip->pcm) usb6fire_chip_abort() 54 usb6fire_pcm_abort(chip); usb6fire_chip_abort() 55 if (chip->midi) usb6fire_chip_abort() 56 usb6fire_midi_abort(chip); usb6fire_chip_abort() 57 if (chip->comm) usb6fire_chip_abort() 58 usb6fire_comm_abort(chip); usb6fire_chip_abort() 59 if (chip->control) usb6fire_chip_abort() 60 usb6fire_control_abort(chip); usb6fire_chip_abort() 61 if (chip->card) { usb6fire_chip_abort() 62 snd_card_disconnect(chip->card); usb6fire_chip_abort() 63 snd_card_free_when_closed(chip->card); usb6fire_chip_abort() 64 chip->card = NULL; usb6fire_chip_abort() 69 static void usb6fire_chip_destroy(struct sfire_chip *chip) usb6fire_chip_destroy() argument 71 if (chip) { usb6fire_chip_destroy() 72 if (chip->pcm) usb6fire_chip_destroy() 73 usb6fire_pcm_destroy(chip); usb6fire_chip_destroy() 74 if (chip->midi) usb6fire_chip_destroy() 75 usb6fire_midi_destroy(chip); usb6fire_chip_destroy() 76 if (chip->comm) usb6fire_chip_destroy() 77 usb6fire_comm_destroy(chip); usb6fire_chip_destroy() 78 if (chip->control) usb6fire_chip_destroy() 79 usb6fire_control_destroy(chip); usb6fire_chip_destroy() 80 if (chip->card) usb6fire_chip_destroy() 81 snd_card_free(chip->card); usb6fire_chip_destroy() 90 struct sfire_chip *chip = NULL; usb6fire_chip_probe() local 138 chip = card->private_data; usb6fire_chip_probe() 139 chips[regidx] = chip; usb6fire_chip_probe() 140 chip->dev = device; usb6fire_chip_probe() 141 chip->regidx = regidx; usb6fire_chip_probe() 142 chip->intf_count = 1; usb6fire_chip_probe() 143 chip->card = card; usb6fire_chip_probe() 145 ret = usb6fire_comm_init(chip); usb6fire_chip_probe() 147 usb6fire_chip_destroy(chip); usb6fire_chip_probe() 151 ret = usb6fire_midi_init(chip); usb6fire_chip_probe() 153 usb6fire_chip_destroy(chip); usb6fire_chip_probe() 157 ret = usb6fire_pcm_init(chip); usb6fire_chip_probe() 159 usb6fire_chip_destroy(chip); usb6fire_chip_probe() 163 ret = usb6fire_control_init(chip); usb6fire_chip_probe() 165 usb6fire_chip_destroy(chip); usb6fire_chip_probe() 172 usb6fire_chip_destroy(chip); usb6fire_chip_probe() 175 usb_set_intfdata(intf, chip); usb6fire_chip_probe() 181 struct sfire_chip *chip; usb6fire_chip_disconnect() local 184 chip = usb_get_intfdata(intf); usb6fire_chip_disconnect() 185 if (chip) { /* if !chip, fw upload has been performed */ usb6fire_chip_disconnect() 186 card = chip->card; usb6fire_chip_disconnect() 187 chip->intf_count--; usb6fire_chip_disconnect() 188 if (!chip->intf_count) { usb6fire_chip_disconnect() 190 devices[chip->regidx] = NULL; usb6fire_chip_disconnect() 191 chips[chip->regidx] = NULL; usb6fire_chip_disconnect() 194 chip->shutdown = true; usb6fire_chip_disconnect() 195 usb6fire_chip_abort(chip); usb6fire_chip_disconnect() 196 usb6fire_chip_destroy(chip); usb6fire_chip_disconnect()
/linux-4.1.27/sound/sh/
H A D	sh_dac_audio.c	69 static void dac_audio_start_timer(struct snd_sh_dac *chip) dac_audio_start_timer() argument 71 hrtimer_start(&chip->hrtimer, chip->wakeups_per_second, dac_audio_start_timer() 75 static void dac_audio_stop_timer(struct snd_sh_dac *chip) dac_audio_stop_timer() argument 77 hrtimer_cancel(&chip->hrtimer); dac_audio_stop_timer() 80 static void dac_audio_reset(struct snd_sh_dac *chip) dac_audio_reset() argument 82 dac_audio_stop_timer(chip); dac_audio_reset() 83 chip->buffer_begin = chip->buffer_end = chip->data_buffer; dac_audio_reset() 84 chip->processed = 0; dac_audio_reset() 85 chip->empty = 1; dac_audio_reset() 88 static void dac_audio_set_rate(struct snd_sh_dac *chip) dac_audio_set_rate() argument 90 chip->wakeups_per_second = ktime_set(0, 1000000000 / chip->rate); dac_audio_set_rate() 116 struct snd_sh_dac *chip = snd_pcm_substream_chip(substream); snd_sh_dac_pcm_open() local 121 chip->substream = substream; snd_sh_dac_pcm_open() 122 chip->buffer_begin = chip->buffer_end = chip->data_buffer; snd_sh_dac_pcm_open() 123 chip->processed = 0; snd_sh_dac_pcm_open() 124 chip->empty = 1; snd_sh_dac_pcm_open() 126 chip->pdata->start(chip->pdata); snd_sh_dac_pcm_open() 133 struct snd_sh_dac *chip = snd_pcm_substream_chip(substream); snd_sh_dac_pcm_close() local 135 chip->substream = NULL; snd_sh_dac_pcm_close() 137 dac_audio_stop_timer(chip); snd_sh_dac_pcm_close() 138 chip->pdata->stop(chip->pdata); snd_sh_dac_pcm_close() 157 struct snd_sh_dac *chip = snd_pcm_substream_chip(substream); snd_sh_dac_pcm_prepare() local 158 struct snd_pcm_runtime *runtime = chip->substream->runtime; snd_sh_dac_pcm_prepare() 160 chip->buffer_size = runtime->buffer_size; snd_sh_dac_pcm_prepare() 161 memset(chip->data_buffer, 0, chip->pdata->buffer_size); snd_sh_dac_pcm_prepare() 168 struct snd_sh_dac *chip = snd_pcm_substream_chip(substream); snd_sh_dac_pcm_trigger() local 172 dac_audio_start_timer(chip); snd_sh_dac_pcm_trigger() 175 chip->buffer_begin = chip->buffer_end = chip->data_buffer; snd_sh_dac_pcm_trigger() 176 chip->processed = 0; snd_sh_dac_pcm_trigger() 177 chip->empty = 1; snd_sh_dac_pcm_trigger() 178 dac_audio_stop_timer(chip); snd_sh_dac_pcm_trigger() 191 struct snd_sh_dac *chip = snd_pcm_substream_chip(substream); snd_sh_dac_pcm_copy() local 202 memcpy_toio(chip->data_buffer + b_pos, src, b_count); snd_sh_dac_pcm_copy() 203 chip->buffer_end = chip->data_buffer + b_pos + b_count; snd_sh_dac_pcm_copy() 205 if (chip->empty) { snd_sh_dac_pcm_copy() 206 chip->empty = 0; snd_sh_dac_pcm_copy() 207 dac_audio_start_timer(chip); snd_sh_dac_pcm_copy() 218 struct snd_sh_dac *chip = snd_pcm_substream_chip(substream); snd_sh_dac_pcm_silence() local 229 memset_io(chip->data_buffer + b_pos, 0, b_count); snd_sh_dac_pcm_silence() 230 chip->buffer_end = chip->data_buffer + b_pos + b_count; snd_sh_dac_pcm_silence() 232 if (chip->empty) { snd_sh_dac_pcm_silence() 233 chip->empty = 0; snd_sh_dac_pcm_silence() 234 dac_audio_start_timer(chip); snd_sh_dac_pcm_silence() 243 struct snd_sh_dac *chip = snd_pcm_substream_chip(substream); snd_sh_dac_pcm_pointer() local 244 int pointer = chip->buffer_begin - chip->data_buffer; snd_sh_dac_pcm_pointer() 264 static int snd_sh_dac_pcm(struct snd_sh_dac *chip, int device) snd_sh_dac_pcm() argument 270 err = snd_pcm_new(chip->card, "SH_DAC PCM", device, 1, 0, &pcm); snd_sh_dac_pcm() 274 pcm->private_data = chip; snd_sh_dac_pcm() 297 static int snd_sh_dac_free(struct snd_sh_dac *chip) snd_sh_dac_free() argument 300 kfree(chip->data_buffer); snd_sh_dac_free() 301 kfree(chip); snd_sh_dac_free() 308 struct snd_sh_dac *chip = device->device_data; snd_sh_dac_dev_free() local 310 return snd_sh_dac_free(chip); snd_sh_dac_dev_free() 315 struct snd_sh_dac *chip = container_of(handle, struct snd_sh_dac, sh_dac_audio_timer() local 317 struct snd_pcm_runtime *runtime = chip->substream->runtime; sh_dac_audio_timer() 320 if (!chip->empty) { sh_dac_audio_timer() 321 sh_dac_output(*chip->buffer_begin, chip->pdata->channel); sh_dac_audio_timer() 322 chip->buffer_begin++; sh_dac_audio_timer() 324 chip->processed++; sh_dac_audio_timer() 325 if (chip->processed >= b_ps) { sh_dac_audio_timer() 326 chip->processed -= b_ps; sh_dac_audio_timer() 327 snd_pcm_period_elapsed(chip->substream); sh_dac_audio_timer() 330 if (chip->buffer_begin == (chip->data_buffer + sh_dac_audio_timer() 331 chip->buffer_size - 1)) sh_dac_audio_timer() 332 chip->buffer_begin = chip->data_buffer; sh_dac_audio_timer() 334 if (chip->buffer_begin == chip->buffer_end) sh_dac_audio_timer() 335 chip->empty = 1; sh_dac_audio_timer() 339 if (!chip->empty) sh_dac_audio_timer() 340 hrtimer_start(&chip->hrtimer, chip->wakeups_per_second, sh_dac_audio_timer() 346 /* create -- chip-specific constructor for the cards components */ snd_sh_dac_create() 351 struct snd_sh_dac *chip; snd_sh_dac_create() local 360 chip = kzalloc(sizeof(*chip), GFP_KERNEL); snd_sh_dac_create() 361 if (chip == NULL) snd_sh_dac_create() 364 chip->card = card; snd_sh_dac_create() 366 hrtimer_init(&chip->hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); snd_sh_dac_create() 367 chip->hrtimer.function = sh_dac_audio_timer; snd_sh_dac_create() 369 dac_audio_reset(chip); snd_sh_dac_create() 370 chip->rate = 8000; snd_sh_dac_create() 371 dac_audio_set_rate(chip); snd_sh_dac_create() 373 chip->pdata = devptr->dev.platform_data; snd_sh_dac_create() 375 chip->data_buffer = kmalloc(chip->pdata->buffer_size, GFP_KERNEL); snd_sh_dac_create() 376 if (chip->data_buffer == NULL) { snd_sh_dac_create() 377 kfree(chip); snd_sh_dac_create() 381 err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops); snd_sh_dac_create() 383 snd_sh_dac_free(chip); snd_sh_dac_create() 387 *rchip = chip; snd_sh_dac_create() 395 struct snd_sh_dac *chip; snd_sh_dac_probe() local 405 err = snd_sh_dac_create(card, devptr, &chip); snd_sh_dac_probe() 409 err = snd_sh_dac_pcm(chip, 0); snd_sh_dac_probe()
/linux-4.1.27/drivers/mmc/host/
H A D	sdhci-pci-o2micro.c	24 static void o2_pci_set_baseclk(struct sdhci_pci_chip *chip, u32 value) o2_pci_set_baseclk() argument 27 pci_read_config_dword(chip->pdev, o2_pci_set_baseclk() 33 pci_write_config_dword(chip->pdev, o2_pci_set_baseclk() 37 static void o2_pci_led_enable(struct sdhci_pci_chip *chip) o2_pci_led_enable() argument 43 ret = pci_read_config_dword(chip->pdev, o2_pci_led_enable() 49 pci_write_config_dword(chip->pdev, o2_pci_led_enable() 52 ret = pci_read_config_dword(chip->pdev, o2_pci_led_enable() 58 pci_write_config_dword(chip->pdev, o2_pci_led_enable() 63 void sdhci_pci_o2_fujin2_pci_init(struct sdhci_pci_chip *chip) sdhci_pci_o2_fujin2_pci_init() argument 68 ret = pci_read_config_dword(chip->pdev, O2_SD_DEV_CTRL, &scratch_32); sdhci_pci_o2_fujin2_pci_init() 72 pci_write_config_dword(chip->pdev, O2_SD_DEV_CTRL, scratch_32); sdhci_pci_o2_fujin2_pci_init() 75 ret = pci_read_config_dword(chip->pdev, O2_SD_MISC_REG5, &scratch_32); sdhci_pci_o2_fujin2_pci_init() 80 pci_write_config_dword(chip->pdev, O2_SD_MISC_REG5, scratch_32); sdhci_pci_o2_fujin2_pci_init() 83 ret = pci_read_config_dword(chip->pdev, O2_SD_TEST_REG, &scratch_32); sdhci_pci_o2_fujin2_pci_init() 87 pci_write_config_dword(chip->pdev, O2_SD_TEST_REG, scratch_32); sdhci_pci_o2_fujin2_pci_init() 90 pci_write_config_dword(chip->pdev, O2_SD_DELAY_CTRL, 0x00002492); sdhci_pci_o2_fujin2_pci_init() 93 ret = pci_read_config_dword(chip->pdev, O2_SD_LD0_CTRL, &scratch_32); sdhci_pci_o2_fujin2_pci_init() 97 pci_write_config_dword(chip->pdev, O2_SD_LD0_CTRL, scratch_32); sdhci_pci_o2_fujin2_pci_init() 100 ret = pci_read_config_dword(chip->pdev, O2_SD_CAP_REG0, &scratch_32); sdhci_pci_o2_fujin2_pci_init() 105 pci_write_config_dword(chip->pdev, O2_SD_CAP_REG0, scratch_32); sdhci_pci_o2_fujin2_pci_init() 107 ret = pci_read_config_dword(chip->pdev, sdhci_pci_o2_fujin2_pci_init() 113 pci_write_config_dword(chip->pdev, O2_SD_TUNING_CTRL, scratch_32); sdhci_pci_o2_fujin2_pci_init() 116 ret = pci_read_config_dword(chip->pdev, sdhci_pci_o2_fujin2_pci_init() 122 pci_write_config_dword(chip->pdev, O2_SD_UHS2_L1_CTRL, scratch_32); sdhci_pci_o2_fujin2_pci_init() 125 ret = pci_read_config_dword(chip->pdev, O2_SD_FUNC_REG3, &scratch_32); sdhci_pci_o2_fujin2_pci_init() 130 pci_write_config_dword(chip->pdev, O2_SD_FUNC_REG3, scratch_32); sdhci_pci_o2_fujin2_pci_init() 133 ret = pci_read_config_dword(chip->pdev, O2_SD_CAPS, &scratch_32); sdhci_pci_o2_fujin2_pci_init() 138 pci_write_config_dword(chip->pdev, O2_SD_CAPS, scratch_32); sdhci_pci_o2_fujin2_pci_init() 140 ret = pci_read_config_dword(chip->pdev, sdhci_pci_o2_fujin2_pci_init() 146 pci_write_config_dword(chip->pdev, O2_SD_MISC_CTRL4, scratch_32); sdhci_pci_o2_fujin2_pci_init() 152 struct sdhci_pci_chip *chip; sdhci_pci_o2_probe_slot() local 156 chip = slot->chip; sdhci_pci_o2_probe_slot() 158 switch (chip->pdev->device) { sdhci_pci_o2_probe_slot() 168 if (chip->pdev->device != PCI_DEVICE_ID_O2_FUJIN2) sdhci_pci_o2_probe_slot() 184 int sdhci_pci_o2_probe(struct sdhci_pci_chip *chip) sdhci_pci_o2_probe() argument 190 switch (chip->pdev->device) { sdhci_pci_o2_probe() 196 ret = pci_read_config_byte(chip->pdev, sdhci_pci_o2_probe() 201 pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch); sdhci_pci_o2_probe() 204 pci_write_config_byte(chip->pdev, O2_SD_MULTI_VCC3V, 0x08); sdhci_pci_o2_probe() 207 ret = pci_read_config_byte(chip->pdev, sdhci_pci_o2_probe() 212 pci_write_config_byte(chip->pdev, O2_SD_CLKREQ, scratch); sdhci_pci_o2_probe() 217 ret = pci_read_config_byte(chip->pdev, O2_SD_CAPS, &scratch); sdhci_pci_o2_probe() 221 pci_write_config_byte(chip->pdev, O2_SD_CAPS, scratch); sdhci_pci_o2_probe() 222 pci_write_config_byte(chip->pdev, O2_SD_CAPS, 0x73); sdhci_pci_o2_probe() 225 pci_write_config_byte(chip->pdev, O2_SD_ADMA1, 0x39); sdhci_pci_o2_probe() 226 pci_write_config_byte(chip->pdev, O2_SD_ADMA2, 0x08); sdhci_pci_o2_probe() 229 ret = pci_read_config_byte(chip->pdev, sdhci_pci_o2_probe() 234 pci_write_config_byte(chip->pdev, O2_SD_INF_MOD, scratch); sdhci_pci_o2_probe() 237 ret = pci_read_config_byte(chip->pdev, sdhci_pci_o2_probe() 242 pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch); sdhci_pci_o2_probe() 248 ret = pci_read_config_byte(chip->pdev, sdhci_pci_o2_probe() 254 pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch); sdhci_pci_o2_probe() 257 if (chip->pdev->device == PCI_DEVICE_ID_O2_FUJIN2) { sdhci_pci_o2_probe() 258 ret = pci_read_config_dword(chip->pdev, sdhci_pci_o2_probe() 268 o2_pci_set_baseclk(chip, scratch_32); sdhci_pci_o2_probe() 269 ret = pci_read_config_dword(chip->pdev, sdhci_pci_o2_probe() 275 pci_write_config_dword(chip->pdev, sdhci_pci_o2_probe() 280 pci_write_config_byte(chip->pdev, sdhci_pci_o2_probe() 288 o2_pci_led_enable(chip); sdhci_pci_o2_probe() 291 ret = pci_read_config_dword(chip->pdev, sdhci_pci_o2_probe() 298 pci_write_config_dword(chip->pdev, sdhci_pci_o2_probe() 301 ret = pci_read_config_dword(chip->pdev, sdhci_pci_o2_probe() 306 pci_write_config_dword(chip->pdev, O2_SD_CLKREQ, scratch_32); sdhci_pci_o2_probe() 308 ret = pci_read_config_dword(chip->pdev, sdhci_pci_o2_probe() 315 pci_write_config_dword(chip->pdev, sdhci_pci_o2_probe() 319 ret = pci_read_config_dword(chip->pdev, sdhci_pci_o2_probe() 324 pci_write_config_dword(chip->pdev, sdhci_pci_o2_probe() 327 if (chip->pdev->device == PCI_DEVICE_ID_O2_FUJIN2) sdhci_pci_o2_probe() 328 sdhci_pci_o2_fujin2_pci_init(chip); sdhci_pci_o2_probe() 331 ret = pci_read_config_byte(chip->pdev, sdhci_pci_o2_probe() 336 pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch); sdhci_pci_o2_probe() 341 ret = pci_read_config_byte(chip->pdev, sdhci_pci_o2_probe() 347 pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch); sdhci_pci_o2_probe() 349 ret = pci_read_config_dword(chip->pdev, sdhci_pci_o2_probe() 356 pci_write_config_dword(chip->pdev, sdhci_pci_o2_probe() 362 pci_write_config_dword(chip->pdev, sdhci_pci_o2_probe() 365 ret = pci_read_config_dword(chip->pdev, sdhci_pci_o2_probe() 369 pci_write_config_dword(chip->pdev, sdhci_pci_o2_probe() 374 pci_write_config_byte(chip->pdev, sdhci_pci_o2_probe() 377 ret = pci_read_config_byte(chip->pdev, sdhci_pci_o2_probe() 382 pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch); sdhci_pci_o2_probe() 390 int sdhci_pci_o2_resume(struct sdhci_pci_chip *chip) sdhci_pci_o2_resume() argument 392 sdhci_pci_o2_probe(chip); sdhci_pci_o2_resume()
/linux-4.1.27/drivers/input/keyboard/
H A D	tca6416-keypad.c	57 static int tca6416_write_reg(struct tca6416_keypad_chip *chip, int reg, u16 val) tca6416_write_reg() argument 61 error = chip->io_size > 8 ? tca6416_write_reg() 62 i2c_smbus_write_word_data(chip->client, reg << 1, val) : tca6416_write_reg() 63 i2c_smbus_write_byte_data(chip->client, reg, val); tca6416_write_reg() 65 dev_err(&chip->client->dev, tca6416_write_reg() 74 static int tca6416_read_reg(struct tca6416_keypad_chip *chip, int reg, u16 *val) tca6416_read_reg() argument 78 retval = chip->io_size > 8 ? tca6416_read_reg() 79 i2c_smbus_read_word_data(chip->client, reg << 1) : tca6416_read_reg() 80 i2c_smbus_read_byte_data(chip->client, reg); tca6416_read_reg() 82 dev_err(&chip->client->dev, "%s failed, reg: %d, error: %d\n", tca6416_read_reg() 91 static void tca6416_keys_scan(struct tca6416_keypad_chip *chip) tca6416_keys_scan() argument 93 struct input_dev *input = chip->input; tca6416_keys_scan() 97 error = tca6416_read_reg(chip, TCA6416_INPUT, &reg_val); tca6416_keys_scan() 101 reg_val &= chip->pinmask; tca6416_keys_scan() 104 val = reg_val ^ chip->reg_input; tca6416_keys_scan() 105 chip->reg_input = reg_val; tca6416_keys_scan() 109 struct tca6416_button *button = &chip->buttons[pin_index]; tca6416_keys_scan() 118 if (chip->pinmask & (1 << i)) tca6416_keys_scan() 128 struct tca6416_keypad_chip *chip = dev_id; tca6416_keys_isr() local 130 tca6416_keys_scan(chip); tca6416_keys_isr() 137 struct tca6416_keypad_chip *chip = tca6416_keys_work_func() local 140 tca6416_keys_scan(chip); tca6416_keys_work_func() 141 schedule_delayed_work(&chip->dwork, msecs_to_jiffies(100)); tca6416_keys_work_func() 146 struct tca6416_keypad_chip *chip = input_get_drvdata(dev); tca6416_keys_open() local 149 tca6416_keys_scan(chip); tca6416_keys_open() 151 if (chip->use_polling) tca6416_keys_open() 152 schedule_delayed_work(&chip->dwork, msecs_to_jiffies(100)); tca6416_keys_open() 154 enable_irq(chip->irqnum); tca6416_keys_open() 161 struct tca6416_keypad_chip *chip = input_get_drvdata(dev); tca6416_keys_close() local 163 if (chip->use_polling) tca6416_keys_close() 164 cancel_delayed_work_sync(&chip->dwork); tca6416_keys_close() 166 disable_irq(chip->irqnum); tca6416_keys_close() 169 static int tca6416_setup_registers(struct tca6416_keypad_chip *chip) tca6416_setup_registers() argument 173 error = tca6416_read_reg(chip, TCA6416_OUTPUT, &chip->reg_output); tca6416_setup_registers() 177 error = tca6416_read_reg(chip, TCA6416_DIRECTION, &chip->reg_direction); tca6416_setup_registers() 182 error = tca6416_write_reg(chip, TCA6416_DIRECTION, tca6416_setup_registers() 183 chip->reg_direction | chip->pinmask); tca6416_setup_registers() 187 error = tca6416_read_reg(chip, TCA6416_DIRECTION, &chip->reg_direction); tca6416_setup_registers() 191 error = tca6416_read_reg(chip, TCA6416_INPUT, &chip->reg_input); tca6416_setup_registers() 195 chip->reg_input &= chip->pinmask; tca6416_setup_registers() 204 struct tca6416_keypad_chip *chip; tca6416_keypad_probe() local 222 chip = kzalloc(sizeof(struct tca6416_keypad_chip) + tca6416_keypad_probe() 226 if (!chip || !input) { tca6416_keypad_probe() 231 chip->client = client; tca6416_keypad_probe() 232 chip->input = input; tca6416_keypad_probe() 233 chip->io_size = id->driver_data; tca6416_keypad_probe() 234 chip->pinmask = pdata->pinmask; tca6416_keypad_probe() 235 chip->use_polling = pdata->use_polling; tca6416_keypad_probe() 237 INIT_DELAYED_WORK(&chip->dwork, tca6416_keys_work_func); tca6416_keypad_probe() 258 chip->buttons[i] = pdata->buttons[i]; tca6416_keypad_probe() 263 input_set_drvdata(input, chip); tca6416_keypad_probe() 267 * we can't share this chip with another i2c master. tca6416_keypad_probe() 269 error = tca6416_setup_registers(chip); tca6416_keypad_probe() 273 if (!chip->use_polling) { tca6416_keypad_probe() 275 chip->irqnum = gpio_to_irq(client->irq); tca6416_keypad_probe() 277 chip->irqnum = client->irq; tca6416_keypad_probe() 279 error = request_threaded_irq(chip->irqnum, NULL, tca6416_keypad_probe() 283 "tca6416-keypad", chip); tca6416_keypad_probe() 287 chip->irqnum, error); tca6416_keypad_probe() 290 disable_irq(chip->irqnum); tca6416_keypad_probe() 300 i2c_set_clientdata(client, chip); tca6416_keypad_probe() 306 if (!chip->use_polling) { tca6416_keypad_probe() 307 free_irq(chip->irqnum, chip); tca6416_keypad_probe() 308 enable_irq(chip->irqnum); tca6416_keypad_probe() 312 kfree(chip); tca6416_keypad_probe() 318 struct tca6416_keypad_chip *chip = i2c_get_clientdata(client); tca6416_keypad_remove() local 320 if (!chip->use_polling) { tca6416_keypad_remove() 321 free_irq(chip->irqnum, chip); tca6416_keypad_remove() 322 enable_irq(chip->irqnum); tca6416_keypad_remove() 325 input_unregister_device(chip->input); tca6416_keypad_remove() 326 kfree(chip); tca6416_keypad_remove() 335 struct tca6416_keypad_chip *chip = i2c_get_clientdata(client); tca6416_keypad_suspend() local 338 enable_irq_wake(chip->irqnum); tca6416_keypad_suspend() 346 struct tca6416_keypad_chip *chip = i2c_get_clientdata(client); tca6416_keypad_resume() local 349 disable_irq_wake(chip->irqnum); tca6416_keypad_resume()
/linux-4.1.27/sound/pci/cs46xx/
H A D	cs46xx_lib.c	72 static void amp_voyetra(struct snd_cs46xx *chip, int change); 88 static unsigned short snd_cs46xx_codec_read(struct snd_cs46xx *chip, snd_cs46xx_codec_read() argument 100 chip->active_ctrl(chip, 1); snd_cs46xx_codec_read() 114 snd_cs46xx_peekBA0(chip, BA0_ACSDA + offset); snd_cs46xx_codec_read() 116 tmp = snd_cs46xx_peekBA0(chip, BA0_ACCTL); snd_cs46xx_codec_read() 118 dev_warn(chip->card->dev, "ACCTL_VFRM not set 0x%x\n", tmp); snd_cs46xx_codec_read() 119 snd_cs46xx_pokeBA0(chip, BA0_ACCTL, (tmp & (~ACCTL_ESYN)) | ACCTL_VFRM ); snd_cs46xx_codec_read() 121 tmp = snd_cs46xx_peekBA0(chip, BA0_ACCTL + offset); snd_cs46xx_codec_read() 122 snd_cs46xx_pokeBA0(chip, BA0_ACCTL, tmp | ACCTL_ESYN | ACCTL_VFRM ); snd_cs46xx_codec_read() 139 snd_cs46xx_pokeBA0(chip, BA0_ACCAD, reg); snd_cs46xx_codec_read() 140 snd_cs46xx_pokeBA0(chip, BA0_ACCDA, 0); snd_cs46xx_codec_read() 142 snd_cs46xx_pokeBA0(chip, BA0_ACCTL,/* clear ACCTL_DCV */ ACCTL_CRW | snd_cs46xx_codec_read() 145 snd_cs46xx_pokeBA0(chip, BA0_ACCTL, ACCTL_DCV | ACCTL_CRW | snd_cs46xx_codec_read() 149 snd_cs46xx_pokeBA0(chip, BA0_ACCTL, ACCTL_DCV | ACCTL_TC | snd_cs46xx_codec_read() 166 if (!(snd_cs46xx_peekBA0(chip, BA0_ACCTL) & ACCTL_DCV)) snd_cs46xx_codec_read() 170 dev_err(chip->card->dev, snd_cs46xx_codec_read() 185 if (snd_cs46xx_peekBA0(chip, BA0_ACSTS + offset) & ACSTS_VSTS) snd_cs46xx_codec_read() 190 dev_err(chip->card->dev, snd_cs46xx_codec_read() 202 dev_dbg(chip->card->dev, snd_cs46xx_codec_read() 204 snd_cs46xx_peekBA0(chip, BA0_ACSDA), snd_cs46xx_codec_read() 205 snd_cs46xx_peekBA0(chip, BA0_ACCAD)); snd_cs46xx_codec_read() 208 //snd_cs46xx_peekBA0(chip, BA0_ACCAD); snd_cs46xx_codec_read() 209 result = snd_cs46xx_peekBA0(chip, BA0_ACSDA + offset); snd_cs46xx_codec_read() 211 chip->active_ctrl(chip, -1); snd_cs46xx_codec_read() 218 struct snd_cs46xx *chip = ac97->private_data; snd_cs46xx_ac97_read() local 226 val = snd_cs46xx_codec_read(chip, reg, codec_index); snd_cs46xx_ac97_read() 232 static void snd_cs46xx_codec_write(struct snd_cs46xx *chip, snd_cs46xx_codec_write() argument 243 chip->active_ctrl(chip, 1); snd_cs46xx_codec_write() 265 snd_cs46xx_pokeBA0(chip, BA0_ACCAD , reg); snd_cs46xx_codec_write() 266 snd_cs46xx_pokeBA0(chip, BA0_ACCDA , val); snd_cs46xx_codec_write() 267 snd_cs46xx_peekBA0(chip, BA0_ACCTL); snd_cs46xx_codec_write() 270 snd_cs46xx_pokeBA0(chip, BA0_ACCTL, /* clear ACCTL_DCV */ ACCTL_VFRM | snd_cs46xx_codec_write() 272 snd_cs46xx_pokeBA0(chip, BA0_ACCTL, ACCTL_DCV | ACCTL_VFRM | snd_cs46xx_codec_write() 275 snd_cs46xx_pokeBA0(chip, BA0_ACCTL, ACCTL_DCV | ACCTL_TC | snd_cs46xx_codec_write() 288 if (!(snd_cs46xx_peekBA0(chip, BA0_ACCTL) & ACCTL_DCV)) { snd_cs46xx_codec_write() 292 dev_err(chip->card->dev, snd_cs46xx_codec_write() 296 chip->active_ctrl(chip, -1); snd_cs46xx_codec_write() 303 struct snd_cs46xx *chip = ac97->private_data; snd_cs46xx_ac97_write() local 310 snd_cs46xx_codec_write(chip, reg, val, codec_index); snd_cs46xx_ac97_write() 318 int snd_cs46xx_download(struct snd_cs46xx *chip, snd_cs46xx_download() argument 329 dst = chip->region.idx[bank+1].remap_addr + offset; snd_cs46xx_download() 396 static int load_firmware(struct snd_cs46xx *chip, load_firmware() argument 408 err = request_firmware(&fw, fw_path, &chip->pci->dev); load_firmware() 482 int snd_cs46xx_clear_BA1(struct snd_cs46xx *chip, snd_cs46xx_clear_BA1() argument 492 dst = chip->region.idx[bank+1].remap_addr + offset; snd_cs46xx_clear_BA1() 515 static int load_firmware(struct snd_cs46xx *chip) load_firmware() argument 520 err = request_firmware(&fw, "cs46xx/ba1", &chip->pci->dev); load_firmware() 523 if (fw->size != sizeof(*chip->ba1)) { load_firmware() 528 chip->ba1 = vmalloc(sizeof(*chip->ba1)); load_firmware() 529 if (!chip->ba1) { load_firmware() 534 memcpy_le32(chip->ba1, fw->data, sizeof(*chip->ba1)); load_firmware() 539 size += chip->ba1->memory[i].size; load_firmware() 548 int snd_cs46xx_download_image(struct snd_cs46xx *chip) snd_cs46xx_download_image() argument 552 struct ba1_struct *ba1 = chip->ba1; snd_cs46xx_download_image() 555 err = snd_cs46xx_download(chip, snd_cs46xx_download_image() 571 static void snd_cs46xx_reset(struct snd_cs46xx *chip) snd_cs46xx_reset() argument 578 snd_cs46xx_poke(chip, BA1_SPCR, SPCR_RSTSP); snd_cs46xx_reset() 583 snd_cs46xx_poke(chip, BA1_SPCR, SPCR_DRQEN); snd_cs46xx_reset() 589 snd_cs46xx_poke(chip, BA1_DREG, DREG_REGID_TRAP_SELECT + idx); snd_cs46xx_reset() 590 snd_cs46xx_poke(chip, BA1_TWPR, 0xFFFF); snd_cs46xx_reset() 592 snd_cs46xx_poke(chip, BA1_DREG, 0); snd_cs46xx_reset() 597 snd_cs46xx_poke(chip, BA1_FRMT, 0xadf); snd_cs46xx_reset() 600 static int cs46xx_wait_for_fifo(struct snd_cs46xx * chip,int retry_timeout) cs46xx_wait_for_fifo() argument 607 status = snd_cs46xx_peekBA0(chip, BA0_SERBST); cs46xx_wait_for_fifo() 616 dev_err(chip->card->dev, cs46xx_wait_for_fifo() 624 static void snd_cs46xx_clear_serial_FIFOs(struct snd_cs46xx *chip) snd_cs46xx_clear_serial_FIFOs() argument 633 tmp = snd_cs46xx_peekBA0(chip, BA0_CLKCR1); snd_cs46xx_clear_serial_FIFOs() 635 snd_cs46xx_pokeBA0(chip, BA0_CLKCR1, tmp | CLKCR1_SWCE); snd_cs46xx_clear_serial_FIFOs() 644 snd_cs46xx_pokeBA0(chip, BA0_SERBWP, 0); snd_cs46xx_clear_serial_FIFOs() 653 if (cs46xx_wait_for_fifo(chip,1)) { snd_cs46xx_clear_serial_FIFOs() 654 dev_dbg(chip->card->dev, snd_cs46xx_clear_serial_FIFOs() 659 snd_cs46xx_pokeBA0(chip, BA0_CLKCR1, tmp); snd_cs46xx_clear_serial_FIFOs() 666 snd_cs46xx_pokeBA0(chip, BA0_SERBAD, idx); snd_cs46xx_clear_serial_FIFOs() 670 snd_cs46xx_pokeBA0(chip, BA0_SERBCM, SERBCM_WRC); snd_cs46xx_clear_serial_FIFOs() 677 snd_cs46xx_pokeBA0(chip, BA0_CLKCR1, tmp); snd_cs46xx_clear_serial_FIFOs() 680 static void snd_cs46xx_proc_start(struct snd_cs46xx *chip) snd_cs46xx_proc_start() argument 687 snd_cs46xx_poke(chip, BA1_FRMT, 0xadf); snd_cs46xx_proc_start() 692 snd_cs46xx_poke(chip, BA1_SPCR, SPCR_RUN | SPCR_RUNFR | SPCR_DRQEN); snd_cs46xx_proc_start() 699 if (!(snd_cs46xx_peek(chip, BA1_SPCR) & SPCR_RUNFR)) snd_cs46xx_proc_start() 703 if (snd_cs46xx_peek(chip, BA1_SPCR) & SPCR_RUNFR) snd_cs46xx_proc_start() 704 dev_err(chip->card->dev, "SPCR_RUNFR never reset\n"); snd_cs46xx_proc_start() 707 static void snd_cs46xx_proc_stop(struct snd_cs46xx *chip) snd_cs46xx_proc_stop() argument 713 snd_cs46xx_poke(chip, BA1_SPCR, 0); snd_cs46xx_proc_stop() 722 static void snd_cs46xx_set_play_sample_rate(struct snd_cs46xx *chip, unsigned int rate) snd_cs46xx_set_play_sample_rate() argument 761 spin_lock_irqsave(&chip->reg_lock, flags); snd_cs46xx_set_play_sample_rate() 762 snd_cs46xx_poke(chip, BA1_PSRC, snd_cs46xx_set_play_sample_rate() 764 snd_cs46xx_poke(chip, BA1_PPI, phiIncr); snd_cs46xx_set_play_sample_rate() 765 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_cs46xx_set_play_sample_rate() 768 static void snd_cs46xx_set_capture_sample_rate(struct snd_cs46xx *chip, unsigned int rate) snd_cs46xx_set_capture_sample_rate() argument 835 spin_lock_irqsave(&chip->reg_lock, flags); snd_cs46xx_set_capture_sample_rate() 836 snd_cs46xx_poke(chip, BA1_CSRC, snd_cs46xx_set_capture_sample_rate() 838 snd_cs46xx_poke(chip, BA1_CCI, coeffIncr); snd_cs46xx_set_capture_sample_rate() 839 snd_cs46xx_poke(chip, BA1_CD, snd_cs46xx_set_capture_sample_rate() 841 snd_cs46xx_poke(chip, BA1_CPI, phiIncr); snd_cs46xx_set_capture_sample_rate() 842 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_cs46xx_set_capture_sample_rate() 865 spin_lock_irqsave(&chip->reg_lock, flags); snd_cs46xx_set_capture_sample_rate() 866 snd_cs46xx_poke(chip, BA1_CFG1, frameGroupLength); snd_cs46xx_set_capture_sample_rate() 867 snd_cs46xx_poke(chip, BA1_CFG2, (0x00800000 | frameGroupLength)); snd_cs46xx_set_capture_sample_rate() 868 snd_cs46xx_poke(chip, BA1_CCST, 0x0000FFFF); snd_cs46xx_set_capture_sample_rate() 869 snd_cs46xx_poke(chip, BA1_CSPB, ((65536 * rate) / 24000)); snd_cs46xx_set_capture_sample_rate() 870 snd_cs46xx_poke(chip, (BA1_CSPB + 4), 0x0000FFFF); snd_cs46xx_set_capture_sample_rate() 871 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_cs46xx_set_capture_sample_rate() 897 struct snd_cs46xx *chip = snd_pcm_substream_chip(substream); snd_cs46xx_cp_trans_copy() local 900 chip->capt.hw_buf.area + rec->hw_data, bytes); snd_cs46xx_cp_trans_copy() 905 struct snd_cs46xx *chip = snd_pcm_substream_chip(substream); snd_cs46xx_capture_transfer() local 906 snd_pcm_indirect_capture_transfer(substream, &chip->capt.pcm_rec, snd_cs46xx_cp_trans_copy); snd_cs46xx_capture_transfer() 912 struct snd_cs46xx *chip = snd_pcm_substream_chip(substream); snd_cs46xx_playback_direct_pointer() local 920 ptr = snd_cs46xx_peek(chip, (cpcm->pcm_channel->pcm_reader_scb->address + 2) << 2); snd_cs46xx_playback_direct_pointer() 922 ptr = snd_cs46xx_peek(chip, BA1_PBA); snd_cs46xx_playback_direct_pointer() 930 struct snd_cs46xx *chip = snd_pcm_substream_chip(substream); snd_cs46xx_playback_indirect_pointer() local 937 ptr = snd_cs46xx_peek(chip, (cpcm->pcm_channel->pcm_reader_scb->address + 2) << 2); snd_cs46xx_playback_indirect_pointer() 939 ptr = snd_cs46xx_peek(chip, BA1_PBA); snd_cs46xx_playback_indirect_pointer() 947 struct snd_cs46xx *chip = snd_pcm_substream_chip(substream); snd_cs46xx_capture_direct_pointer() local 948 size_t ptr = snd_cs46xx_peek(chip, BA1_CBA) - chip->capt.hw_buf.addr; snd_cs46xx_capture_direct_pointer() 949 return ptr >> chip->capt.shift; snd_cs46xx_capture_direct_pointer() 954 struct snd_cs46xx *chip = snd_pcm_substream_chip(substream); snd_cs46xx_capture_indirect_pointer() local 955 size_t ptr = snd_cs46xx_peek(chip, BA1_CBA) - chip->capt.hw_buf.addr; snd_cs46xx_capture_indirect_pointer() 956 return snd_pcm_indirect_capture_pointer(substream, &chip->capt.pcm_rec, ptr); snd_cs46xx_capture_indirect_pointer() 962 struct snd_cs46xx *chip = snd_pcm_substream_chip(substream); snd_cs46xx_playback_trigger() local 977 snd_cs46xx_poke(chip, (cpcm->pcm_channel->pcm_reader_scb->address + snd_cs46xx_playback_trigger() 981 cs46xx_dsp_pcm_link(chip,cpcm->pcm_channel); snd_cs46xx_playback_trigger() 986 spin_lock(&chip->reg_lock); snd_cs46xx_playback_trigger() 990 tmp = snd_cs46xx_peek(chip, BA1_PCTL); snd_cs46xx_playback_trigger() 992 snd_cs46xx_poke(chip, BA1_PCTL, chip->play_ctl | tmp); snd_cs46xx_playback_trigger() 994 spin_unlock(&chip->reg_lock); snd_cs46xx_playback_trigger() 1001 snd_cs46xx_poke(chip, (cpcm->pcm_channel->pcm_reader_scb->address + snd_cs46xx_playback_trigger() 1005 cs46xx_dsp_pcm_unlink(chip,cpcm->pcm_channel); snd_cs46xx_playback_trigger() 1007 spin_lock(&chip->reg_lock); snd_cs46xx_playback_trigger() 1009 tmp = snd_cs46xx_peek(chip, BA1_PCTL); snd_cs46xx_playback_trigger() 1011 snd_cs46xx_poke(chip, BA1_PCTL, tmp); snd_cs46xx_playback_trigger() 1013 spin_unlock(&chip->reg_lock); snd_cs46xx_playback_trigger() 1027 struct snd_cs46xx *chip = snd_pcm_substream_chip(substream); snd_cs46xx_capture_trigger() local 1031 spin_lock(&chip->reg_lock); snd_cs46xx_capture_trigger() 1035 tmp = snd_cs46xx_peek(chip, BA1_CCTL); snd_cs46xx_capture_trigger() 1037 snd_cs46xx_poke(chip, BA1_CCTL, chip->capt.ctl | tmp); snd_cs46xx_capture_trigger() 1041 tmp = snd_cs46xx_peek(chip, BA1_CCTL); snd_cs46xx_capture_trigger() 1043 snd_cs46xx_poke(chip, BA1_CCTL, tmp); snd_cs46xx_capture_trigger() 1049 spin_unlock(&chip->reg_lock); snd_cs46xx_capture_trigger() 1055 static int _cs46xx_adjust_sample_rate (struct snd_cs46xx *chip, struct snd_cs46xx_pcm *cpcm, _cs46xx_adjust_sample_rate() argument 1061 cpcm->pcm_channel = cs46xx_dsp_create_pcm_channel (chip, sample_rate, _cs46xx_adjust_sample_rate() 1064 dev_err(chip->card->dev, _cs46xx_adjust_sample_rate() 1073 cs46xx_dsp_destroy_pcm_channel (chip,cpcm->pcm_channel); _cs46xx_adjust_sample_rate() 1075 if ( (cpcm->pcm_channel = cs46xx_dsp_create_pcm_channel (chip, sample_rate, cpcm, _cs46xx_adjust_sample_rate() 1078 dev_err(chip->card->dev, _cs46xx_adjust_sample_rate() 1083 if (!unlinked) cs46xx_dsp_pcm_link (chip,cpcm->pcm_channel); _cs46xx_adjust_sample_rate() 1099 struct snd_cs46xx *chip = snd_pcm_substream_chip(substream); snd_cs46xx_playback_hw_params() local 1109 mutex_lock(&chip->spos_mutex); snd_cs46xx_playback_hw_params() 1111 if (_cs46xx_adjust_sample_rate (chip,cpcm,sample_rate)) { snd_cs46xx_playback_hw_params() 1112 mutex_unlock(&chip->spos_mutex); snd_cs46xx_playback_hw_params() 1118 mutex_unlock(&chip->spos_mutex); snd_cs46xx_playback_hw_params() 1123 if (cs46xx_dsp_pcm_channel_set_period (chip,cpcm->pcm_channel,period_size)) { snd_cs46xx_playback_hw_params() 1124 mutex_unlock(&chip->spos_mutex); snd_cs46xx_playback_hw_params() 1128 dev_dbg(chip->card->dev, snd_cs46xx_playback_hw_params() 1166 mutex_unlock(&chip->spos_mutex); snd_cs46xx_playback_hw_params() 1190 mutex_unlock(&chip->spos_mutex); snd_cs46xx_playback_hw_params() 1198 /*struct snd_cs46xx *chip = snd_pcm_substream_chip(substream);*/ snd_cs46xx_playback_hw_free() 1222 struct snd_cs46xx *chip = snd_pcm_substream_chip(substream); snd_cs46xx_playback_prepare() local 1232 pfie = snd_cs46xx_peek(chip, (cpcm->pcm_channel->pcm_reader_scb->address + 1) << 2 ); snd_cs46xx_playback_prepare() 1236 pfie = snd_cs46xx_peek(chip, BA1_PFIE); snd_cs46xx_playback_prepare() 1268 tmp = snd_cs46xx_peek(chip, (cpcm->pcm_channel->pcm_reader_scb->address) << 2); snd_cs46xx_playback_prepare() 1272 snd_cs46xx_poke(chip, (cpcm->pcm_channel->pcm_reader_scb->address) << 2, tmp); snd_cs46xx_playback_prepare() 1275 snd_cs46xx_poke(chip, (cpcm->pcm_channel->pcm_reader_scb->address + 1) << 2, pfie | cpcm->pcm_channel->pcm_slot); snd_cs46xx_playback_prepare() 1277 snd_cs46xx_poke(chip, BA1_PBA, cpcm->hw_buf.addr); snd_cs46xx_playback_prepare() 1278 tmp = snd_cs46xx_peek(chip, BA1_PDTC); snd_cs46xx_playback_prepare() 1281 snd_cs46xx_poke(chip, BA1_PDTC, tmp); snd_cs46xx_playback_prepare() 1282 snd_cs46xx_poke(chip, BA1_PFIE, pfie); snd_cs46xx_playback_prepare() 1283 snd_cs46xx_set_play_sample_rate(chip, runtime->rate); snd_cs46xx_playback_prepare() 1292 struct snd_cs46xx *chip = snd_pcm_substream_chip(substream); snd_cs46xx_capture_hw_params() local 1297 cs46xx_dsp_pcm_ostream_set_period (chip, params_period_bytes(hw_params)); snd_cs46xx_capture_hw_params() 1300 if (runtime->dma_area != chip->capt.hw_buf.area) snd_cs46xx_capture_hw_params() 1302 runtime->dma_area = chip->capt.hw_buf.area; snd_cs46xx_capture_hw_params() 1303 runtime->dma_addr = chip->capt.hw_buf.addr; snd_cs46xx_capture_hw_params() 1304 runtime->dma_bytes = chip->capt.hw_buf.bytes; snd_cs46xx_capture_hw_params() 1307 if (runtime->dma_area == chip->capt.hw_buf.area) { snd_cs46xx_capture_hw_params() 1322 struct snd_cs46xx *chip = snd_pcm_substream_chip(substream); snd_cs46xx_capture_hw_free() local 1325 if (runtime->dma_area != chip->capt.hw_buf.area) snd_cs46xx_capture_hw_free() 1336 struct snd_cs46xx *chip = snd_pcm_substream_chip(substream); snd_cs46xx_capture_prepare() local 1339 snd_cs46xx_poke(chip, BA1_CBA, chip->capt.hw_buf.addr); snd_cs46xx_capture_prepare() 1340 chip->capt.shift = 2; snd_cs46xx_capture_prepare() 1341 memset(&chip->capt.pcm_rec, 0, sizeof(chip->capt.pcm_rec)); snd_cs46xx_capture_prepare() 1342 chip->capt.pcm_rec.sw_buffer_size = snd_pcm_lib_buffer_bytes(substream); snd_cs46xx_capture_prepare() 1343 chip->capt.pcm_rec.hw_buffer_size = runtime->period_size * CS46XX_FRAGS << 2; snd_cs46xx_capture_prepare() 1344 snd_cs46xx_set_capture_sample_rate(chip, runtime->rate); snd_cs46xx_capture_prepare() 1351 struct snd_cs46xx *chip = dev_id; snd_cs46xx_interrupt() local 1354 struct dsp_spos_instance * ins = chip->dsp_spos_instance; snd_cs46xx_interrupt() 1363 status1 = snd_cs46xx_peekBA0(chip, BA0_HISR); snd_cs46xx_interrupt() 1365 snd_cs46xx_pokeBA0(chip, BA0_HICR, HICR_CHGM | HICR_IEV); snd_cs46xx_interrupt() 1370 status2 = snd_cs46xx_peekBA0(chip, BA0_HSR0); snd_cs46xx_interrupt() 1376 if (chip->capt.substream) snd_cs46xx_interrupt() 1377 snd_pcm_period_elapsed(chip->capt.substream); snd_cs46xx_interrupt() 1401 if ((status1 & HISR_VC0) && chip->playback_pcm) { snd_cs46xx_interrupt() 1402 if (chip->playback_pcm->substream) snd_cs46xx_interrupt() 1403 snd_pcm_period_elapsed(chip->playback_pcm->substream); snd_cs46xx_interrupt() 1405 if ((status1 & HISR_VC1) && chip->pcm) { snd_cs46xx_interrupt() 1406 if (chip->capt.substream) snd_cs46xx_interrupt() 1407 snd_pcm_period_elapsed(chip->capt.substream); snd_cs46xx_interrupt() 1411 if ((status1 & HISR_MIDI) && chip->rmidi) { snd_cs46xx_interrupt() 1414 spin_lock(&chip->reg_lock); snd_cs46xx_interrupt() 1415 while ((snd_cs46xx_peekBA0(chip, BA0_MIDSR) & MIDSR_RBE) == 0) { snd_cs46xx_interrupt() 1416 c = snd_cs46xx_peekBA0(chip, BA0_MIDRP); snd_cs46xx_interrupt() 1417 if ((chip->midcr & MIDCR_RIE) == 0) snd_cs46xx_interrupt() 1419 snd_rawmidi_receive(chip->midi_input, &c, 1); snd_cs46xx_interrupt() 1421 while ((snd_cs46xx_peekBA0(chip, BA0_MIDSR) & MIDSR_TBF) == 0) { snd_cs46xx_interrupt() 1422 if ((chip->midcr & MIDCR_TIE) == 0) snd_cs46xx_interrupt() 1424 if (snd_rawmidi_transmit(chip->midi_output, &c, 1) != 1) { snd_cs46xx_interrupt() 1425 chip->midcr &= ~MIDCR_TIE; snd_cs46xx_interrupt() 1426 snd_cs46xx_pokeBA0(chip, BA0_MIDCR, chip->midcr); snd_cs46xx_interrupt() 1429 snd_cs46xx_pokeBA0(chip, BA0_MIDWP, c); snd_cs46xx_interrupt() 1431 spin_unlock(&chip->reg_lock); snd_cs46xx_interrupt() 1436 snd_cs46xx_pokeBA0(chip, BA0_HICR, HICR_CHGM | HICR_IEV); snd_cs46xx_interrupt() 1502 struct snd_cs46xx *chip = snd_pcm_substream_chip(substream); _cs46xx_playback_open_channel() local 1509 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci), _cs46xx_playback_open_channel() 1521 mutex_lock(&chip->spos_mutex); _cs46xx_playback_open_channel() 1530 mutex_unlock(&chip->spos_mutex); _cs46xx_playback_open_channel() 1532 chip->playback_pcm = cpcm; /* HACK */ _cs46xx_playback_open_channel() 1535 if (chip->accept_valid) _cs46xx_playback_open_channel() 1537 chip->active_ctrl(chip, 1); _cs46xx_playback_open_channel() 1563 struct snd_cs46xx *chip = snd_pcm_substream_chip(substream); snd_cs46xx_playback_open_iec958() local 1565 dev_dbg(chip->card->dev, "open raw iec958 channel\n"); snd_cs46xx_playback_open_iec958() 1567 mutex_lock(&chip->spos_mutex); snd_cs46xx_playback_open_iec958() 1568 cs46xx_iec958_pre_open (chip); snd_cs46xx_playback_open_iec958() 1569 mutex_unlock(&chip->spos_mutex); snd_cs46xx_playback_open_iec958() 1579 struct snd_cs46xx *chip = snd_pcm_substream_chip(substream); snd_cs46xx_playback_close_iec958() local 1581 dev_dbg(chip->card->dev, "close raw iec958 channel\n"); snd_cs46xx_playback_close_iec958() 1585 mutex_lock(&chip->spos_mutex); snd_cs46xx_playback_close_iec958() 1586 cs46xx_iec958_post_close (chip); snd_cs46xx_playback_close_iec958() 1587 mutex_unlock(&chip->spos_mutex); snd_cs46xx_playback_close_iec958() 1595 struct snd_cs46xx *chip = snd_pcm_substream_chip(substream); snd_cs46xx_capture_open() local 1597 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci), snd_cs46xx_capture_open() 1598 PAGE_SIZE, &chip->capt.hw_buf) < 0) snd_cs46xx_capture_open() 1600 chip->capt.substream = substream; snd_cs46xx_capture_open() 1603 if (chip->accept_valid) snd_cs46xx_capture_open() 1606 chip->active_ctrl(chip, 1); snd_cs46xx_capture_open() 1618 struct snd_cs46xx *chip = snd_pcm_substream_chip(substream); snd_cs46xx_playback_close() local 1628 mutex_lock(&chip->spos_mutex); snd_cs46xx_playback_close() 1630 cs46xx_dsp_destroy_pcm_channel(chip,cpcm->pcm_channel); snd_cs46xx_playback_close() 1633 mutex_unlock(&chip->spos_mutex); snd_cs46xx_playback_close() 1635 chip->playback_pcm = NULL; snd_cs46xx_playback_close() 1640 chip->active_ctrl(chip, -1); snd_cs46xx_playback_close() 1647 struct snd_cs46xx *chip = snd_pcm_substream_chip(substream); snd_cs46xx_capture_close() local 1649 chip->capt.substream = NULL; snd_cs46xx_capture_close() 1650 snd_dma_free_pages(&chip->capt.hw_buf); snd_cs46xx_capture_close() 1651 chip->active_ctrl(chip, -1); snd_cs46xx_capture_close() 1780 int snd_cs46xx_pcm(struct snd_cs46xx *chip, int device) snd_cs46xx_pcm() argument 1785 if ((err = snd_pcm_new(chip->card, "CS46xx", device, MAX_PLAYBACK_CHANNELS, 1, &pcm)) < 0) snd_cs46xx_pcm() 1788 pcm->private_data = chip; snd_cs46xx_pcm() 1796 chip->pcm = pcm; snd_cs46xx_pcm() 1799 snd_dma_pci_data(chip->pci), 64*1024, 256*1024); snd_cs46xx_pcm() 1806 int snd_cs46xx_pcm_rear(struct snd_cs46xx *chip, int device) snd_cs46xx_pcm_rear() argument 1811 if ((err = snd_pcm_new(chip->card, "CS46xx - Rear", device, MAX_PLAYBACK_CHANNELS, 0, &pcm)) < 0) snd_cs46xx_pcm_rear() 1814 pcm->private_data = chip; snd_cs46xx_pcm_rear() 1821 chip->pcm_rear = pcm; snd_cs46xx_pcm_rear() 1824 snd_dma_pci_data(chip->pci), 64*1024, 256*1024); snd_cs46xx_pcm_rear() 1829 int snd_cs46xx_pcm_center_lfe(struct snd_cs46xx *chip, int device) snd_cs46xx_pcm_center_lfe() argument 1834 if ((err = snd_pcm_new(chip->card, "CS46xx - Center LFE", device, MAX_PLAYBACK_CHANNELS, 0, &pcm)) < 0) snd_cs46xx_pcm_center_lfe() 1837 pcm->private_data = chip; snd_cs46xx_pcm_center_lfe() 1844 chip->pcm_center_lfe = pcm; snd_cs46xx_pcm_center_lfe() 1847 snd_dma_pci_data(chip->pci), 64*1024, 256*1024); snd_cs46xx_pcm_center_lfe() 1852 int snd_cs46xx_pcm_iec958(struct snd_cs46xx *chip, int device) snd_cs46xx_pcm_iec958() argument 1857 if ((err = snd_pcm_new(chip->card, "CS46xx - IEC958", device, 1, 0, &pcm)) < 0) snd_cs46xx_pcm_iec958() 1860 pcm->private_data = chip; snd_cs46xx_pcm_iec958() 1867 chip->pcm_rear = pcm; snd_cs46xx_pcm_iec958() 1870 snd_dma_pci_data(chip->pci), 64*1024, 256*1024); snd_cs46xx_pcm_iec958() 1881 struct snd_cs46xx *chip = bus->private_data; snd_cs46xx_mixer_free_ac97_bus() local 1883 chip->ac97_bus = NULL; snd_cs46xx_mixer_free_ac97_bus() 1888 struct snd_cs46xx *chip = ac97->private_data; snd_cs46xx_mixer_free_ac97() local 1890 if (snd_BUG_ON(ac97 != chip->ac97[CS46XX_PRIMARY_CODEC_INDEX] && snd_cs46xx_mixer_free_ac97() 1891 ac97 != chip->ac97[CS46XX_SECONDARY_CODEC_INDEX])) snd_cs46xx_mixer_free_ac97() 1894 if (ac97 == chip->ac97[CS46XX_PRIMARY_CODEC_INDEX]) { snd_cs46xx_mixer_free_ac97() 1895 chip->ac97[CS46XX_PRIMARY_CODEC_INDEX] = NULL; snd_cs46xx_mixer_free_ac97() 1896 chip->eapd_switch = NULL; snd_cs46xx_mixer_free_ac97() 1899 chip->ac97[CS46XX_SECONDARY_CODEC_INDEX] = NULL; snd_cs46xx_mixer_free_ac97() 1914 struct snd_cs46xx *chip = snd_kcontrol_chip(kcontrol); snd_cs46xx_vol_get() local 1916 unsigned int val = snd_cs46xx_peek(chip, reg); snd_cs46xx_vol_get() 1924 struct snd_cs46xx *chip = snd_kcontrol_chip(kcontrol); snd_cs46xx_vol_put() local 1928 unsigned int old = snd_cs46xx_peek(chip, reg); snd_cs46xx_vol_put() 1932 snd_cs46xx_poke(chip, reg, val); snd_cs46xx_vol_put() 1942 struct snd_cs46xx *chip = snd_kcontrol_chip(kcontrol); snd_cs46xx_vol_dac_get() local 1944 ucontrol->value.integer.value[0] = chip->dsp_spos_instance->dac_volume_left; snd_cs46xx_vol_dac_get() 1945 ucontrol->value.integer.value[1] = chip->dsp_spos_instance->dac_volume_right; snd_cs46xx_vol_dac_get() 1952 struct snd_cs46xx *chip = snd_kcontrol_chip(kcontrol); snd_cs46xx_vol_dac_put() local 1955 if (chip->dsp_spos_instance->dac_volume_right != ucontrol->value.integer.value[0] || snd_cs46xx_vol_dac_put() 1956 chip->dsp_spos_instance->dac_volume_left != ucontrol->value.integer.value[1]) { snd_cs46xx_vol_dac_put() 1957 cs46xx_dsp_set_dac_volume(chip, snd_cs46xx_vol_dac_put() 1969 struct snd_cs46xx *chip = snd_kcontrol_chip(kcontrol); 1971 ucontrol->value.integer.value[0] = chip->dsp_spos_instance->spdif_input_volume_left; 1972 ucontrol->value.integer.value[1] = chip->dsp_spos_instance->spdif_input_volume_right; 1978 struct snd_cs46xx *chip = snd_kcontrol_chip(kcontrol); 1981 if (chip->dsp_spos_instance->spdif_input_volume_left != ucontrol->value.integer.value[0] || 1982 chip->dsp_spos_instance->spdif_input_volume_right!= ucontrol->value.integer.value[1]) { 1983 cs46xx_dsp_set_iec958_volume (chip, 1998 struct snd_cs46xx *chip = snd_kcontrol_chip(kcontrol); snd_cs46xx_iec958_get() local 2002 ucontrol->value.integer.value[0] = (chip->dsp_spos_instance->spdif_status_out & DSP_SPDIF_STATUS_OUTPUT_ENABLED); snd_cs46xx_iec958_get() 2004 ucontrol->value.integer.value[0] = chip->dsp_spos_instance->spdif_status_in; snd_cs46xx_iec958_get() 2012 struct snd_cs46xx *chip = snd_kcontrol_chip(kcontrol); snd_cs46xx_iec958_put() local 2017 mutex_lock(&chip->spos_mutex); snd_cs46xx_iec958_put() 2018 change = (chip->dsp_spos_instance->spdif_status_out & DSP_SPDIF_STATUS_OUTPUT_ENABLED); snd_cs46xx_iec958_put() 2020 cs46xx_dsp_enable_spdif_out(chip); snd_cs46xx_iec958_put() 2022 cs46xx_dsp_disable_spdif_out(chip); snd_cs46xx_iec958_put() 2024 res = (change != (chip->dsp_spos_instance->spdif_status_out & DSP_SPDIF_STATUS_OUTPUT_ENABLED)); snd_cs46xx_iec958_put() 2025 mutex_unlock(&chip->spos_mutex); snd_cs46xx_iec958_put() 2028 change = chip->dsp_spos_instance->spdif_status_in; snd_cs46xx_iec958_put() 2030 cs46xx_dsp_enable_spdif_in(chip); snd_cs46xx_iec958_put() 2034 cs46xx_dsp_disable_spdif_in(chip); snd_cs46xx_iec958_put() 2036 res = (change != chip->dsp_spos_instance->spdif_status_in); snd_cs46xx_iec958_put() 2049 struct snd_cs46xx *chip = snd_kcontrol_chip(kcontrol); snd_cs46xx_adc_capture_get() local 2050 struct dsp_spos_instance * ins = chip->dsp_spos_instance; snd_cs46xx_adc_capture_get() 2063 struct snd_cs46xx *chip = snd_kcontrol_chip(kcontrol); snd_cs46xx_adc_capture_put() local 2064 struct dsp_spos_instance * ins = chip->dsp_spos_instance; snd_cs46xx_adc_capture_put() 2068 cs46xx_dsp_enable_adc_capture(chip); snd_cs46xx_adc_capture_put() 2071 cs46xx_dsp_disable_adc_capture(chip); snd_cs46xx_adc_capture_put() 2080 struct snd_cs46xx *chip = snd_kcontrol_chip(kcontrol); snd_cs46xx_pcm_capture_get() local 2081 struct dsp_spos_instance * ins = chip->dsp_spos_instance; snd_cs46xx_pcm_capture_get() 2095 struct snd_cs46xx *chip = snd_kcontrol_chip(kcontrol); snd_cs46xx_pcm_capture_put() local 2096 struct dsp_spos_instance * ins = chip->dsp_spos_instance; snd_cs46xx_pcm_capture_put() 2100 cs46xx_dsp_enable_pcm_capture(chip); snd_cs46xx_pcm_capture_put() 2103 cs46xx_dsp_disable_pcm_capture(chip); snd_cs46xx_pcm_capture_put() 2113 struct snd_cs46xx *chip = snd_kcontrol_chip(kcontrol); snd_herc_spdif_select_get() local 2115 int val1 = snd_cs46xx_peekBA0(chip, BA0_EGPIODR); snd_herc_spdif_select_get() 2131 struct snd_cs46xx *chip = snd_kcontrol_chip(kcontrol); snd_herc_spdif_select_put() local 2132 int val1 = snd_cs46xx_peekBA0(chip, BA0_EGPIODR); snd_herc_spdif_select_put() 2133 int val2 = snd_cs46xx_peekBA0(chip, BA0_EGPIOPTR); snd_herc_spdif_select_put() 2137 snd_cs46xx_pokeBA0(chip, BA0_EGPIODR, snd_herc_spdif_select_put() 2139 snd_cs46xx_pokeBA0(chip, BA0_EGPIOPTR, snd_herc_spdif_select_put() 2143 snd_cs46xx_pokeBA0(chip, BA0_EGPIODR, val1 & ~EGPIODR_GPOE0); /* disable */ snd_herc_spdif_select_put() 2144 snd_cs46xx_pokeBA0(chip, BA0_EGPIOPTR, val2 & ~EGPIOPTR_GPPT0); /* disable */ snd_herc_spdif_select_put() 2149 return (val1 != (int)snd_cs46xx_peekBA0(chip, BA0_EGPIODR)); snd_herc_spdif_select_put() 2163 struct snd_cs46xx *chip = snd_kcontrol_chip(kcontrol); snd_cs46xx_spdif_default_get() local 2164 struct dsp_spos_instance * ins = chip->dsp_spos_instance; snd_cs46xx_spdif_default_get() 2166 mutex_lock(&chip->spos_mutex); snd_cs46xx_spdif_default_get() 2171 mutex_unlock(&chip->spos_mutex); snd_cs46xx_spdif_default_get() 2179 struct snd_cs46xx * chip = snd_kcontrol_chip(kcontrol); snd_cs46xx_spdif_default_put() local 2180 struct dsp_spos_instance * ins = chip->dsp_spos_instance; snd_cs46xx_spdif_default_put() 2184 mutex_lock(&chip->spos_mutex); snd_cs46xx_spdif_default_put() 2196 cs46xx_poke_via_dsp (chip,SP_SPDOUT_CSUV,val); snd_cs46xx_spdif_default_put() 2198 mutex_unlock(&chip->spos_mutex); snd_cs46xx_spdif_default_put() 2216 struct snd_cs46xx *chip = snd_kcontrol_chip(kcontrol); snd_cs46xx_spdif_stream_get() local 2217 struct dsp_spos_instance * ins = chip->dsp_spos_instance; snd_cs46xx_spdif_stream_get() 2219 mutex_lock(&chip->spos_mutex); snd_cs46xx_spdif_stream_get() 2224 mutex_unlock(&chip->spos_mutex); snd_cs46xx_spdif_stream_get() 2232 struct snd_cs46xx * chip = snd_kcontrol_chip(kcontrol); snd_cs46xx_spdif_stream_put() local 2233 struct dsp_spos_instance * ins = chip->dsp_spos_instance; snd_cs46xx_spdif_stream_put() 2237 mutex_lock(&chip->spos_mutex); snd_cs46xx_spdif_stream_put() 2249 cs46xx_poke_via_dsp (chip,SP_SPDOUT_CSUV,val); snd_cs46xx_spdif_stream_put() 2251 mutex_unlock(&chip->spos_mutex); snd_cs46xx_spdif_stream_put() 2358 struct snd_cs46xx *chip = snd_kcontrol_chip(kcontrol); snd_cs46xx_front_dup_get() local 2360 val = snd_ac97_read(chip->ac97[CS46XX_PRIMARY_CODEC_INDEX], AC97_CSR_ACMODE); snd_cs46xx_front_dup_get() 2368 struct snd_cs46xx *chip = snd_kcontrol_chip(kcontrol); snd_cs46xx_front_dup_put() local 2369 return snd_ac97_update_bits(chip->ac97[CS46XX_PRIMARY_CODEC_INDEX], snd_cs46xx_front_dup_put() 2446 static int cs46xx_detect_codec(struct snd_cs46xx *chip, int codec) cs46xx_detect_codec() argument 2452 ac97.private_data = chip; cs46xx_detect_codec() 2455 if (chip->amplifier_ctrl == amp_voyetra) cs46xx_detect_codec() 2459 snd_cs46xx_codec_write(chip, AC97_RESET, 0, codec); cs46xx_detect_codec() 2461 if (snd_cs46xx_codec_read(chip, AC97_RESET, codec) & 0x8000) { cs46xx_detect_codec() 2462 dev_dbg(chip->card->dev, cs46xx_detect_codec() 2468 snd_cs46xx_codec_write(chip, AC97_MASTER, 0x8000, codec); cs46xx_detect_codec() 2470 if (snd_cs46xx_codec_read(chip, AC97_MASTER, codec) == 0x8000) { cs46xx_detect_codec() 2471 err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97[codec]); cs46xx_detect_codec() 2476 dev_dbg(chip->card->dev, "codec %d detection timeout\n", codec); cs46xx_detect_codec() 2480 int snd_cs46xx_mixer(struct snd_cs46xx *chip, int spdif_device) snd_cs46xx_mixer() argument 2482 struct snd_card *card = chip->card; snd_cs46xx_mixer() 2495 chip->nr_ac97_codecs = 0; snd_cs46xx_mixer() 2496 dev_dbg(chip->card->dev, "detecting primary codec\n"); snd_cs46xx_mixer() 2497 if ((err = snd_ac97_bus(card, 0, &ops, chip, &chip->ac97_bus)) < 0) snd_cs46xx_mixer() 2499 chip->ac97_bus->private_free = snd_cs46xx_mixer_free_ac97_bus; snd_cs46xx_mixer() 2501 if (cs46xx_detect_codec(chip, CS46XX_PRIMARY_CODEC_INDEX) < 0) snd_cs46xx_mixer() 2503 chip->nr_ac97_codecs = 1; snd_cs46xx_mixer() 2506 dev_dbg(chip->card->dev, "detecting seconadry codec\n"); snd_cs46xx_mixer() 2508 if (! cs46xx_detect_codec(chip, CS46XX_SECONDARY_CODEC_INDEX)) snd_cs46xx_mixer() 2509 chip->nr_ac97_codecs = 2; snd_cs46xx_mixer() 2515 kctl = snd_ctl_new1(&snd_cs46xx_controls[idx], chip); snd_cs46xx_mixer() 2526 chip->eapd_switch = snd_ctl_find_id(chip->card, &id); snd_cs46xx_mixer() 2529 if (chip->nr_ac97_codecs == 1) { snd_cs46xx_mixer() 2530 unsigned int id2 = chip->ac97[CS46XX_PRIMARY_CODEC_INDEX]->id & 0xffff; snd_cs46xx_mixer() 2532 err = snd_ctl_add(card, snd_ctl_new1(&snd_cs46xx_front_dup_ctl, chip)); snd_cs46xx_mixer() 2535 snd_ac97_write_cache(chip->ac97[CS46XX_PRIMARY_CODEC_INDEX], snd_cs46xx_mixer() 2540 if (chip->mixer_init) { snd_cs46xx_mixer() 2541 dev_dbg(chip->card->dev, "calling chip->mixer_init(chip);\n"); snd_cs46xx_mixer() 2542 chip->mixer_init(chip); snd_cs46xx_mixer() 2547 chip->amplifier_ctrl(chip, 1); snd_cs46xx_mixer() 2556 static void snd_cs46xx_midi_reset(struct snd_cs46xx *chip) snd_cs46xx_midi_reset() argument 2558 snd_cs46xx_pokeBA0(chip, BA0_MIDCR, MIDCR_MRST); snd_cs46xx_midi_reset() 2560 snd_cs46xx_pokeBA0(chip, BA0_MIDCR, chip->midcr); snd_cs46xx_midi_reset() 2565 struct snd_cs46xx *chip = substream->rmidi->private_data; snd_cs46xx_midi_input_open() local 2567 chip->active_ctrl(chip, 1); snd_cs46xx_midi_input_open() 2568 spin_lock_irq(&chip->reg_lock); snd_cs46xx_midi_input_open() 2569 chip->uartm |= CS46XX_MODE_INPUT; snd_cs46xx_midi_input_open() 2570 chip->midcr |= MIDCR_RXE; snd_cs46xx_midi_input_open() 2571 chip->midi_input = substream; snd_cs46xx_midi_input_open() 2572 if (!(chip->uartm & CS46XX_MODE_OUTPUT)) { snd_cs46xx_midi_input_open() 2573 snd_cs46xx_midi_reset(chip); snd_cs46xx_midi_input_open() 2575 snd_cs46xx_pokeBA0(chip, BA0_MIDCR, chip->midcr); snd_cs46xx_midi_input_open() 2577 spin_unlock_irq(&chip->reg_lock); snd_cs46xx_midi_input_open() 2583 struct snd_cs46xx *chip = substream->rmidi->private_data; snd_cs46xx_midi_input_close() local 2585 spin_lock_irq(&chip->reg_lock); snd_cs46xx_midi_input_close() 2586 chip->midcr &= ~(MIDCR_RXE | MIDCR_RIE); snd_cs46xx_midi_input_close() 2587 chip->midi_input = NULL; snd_cs46xx_midi_input_close() 2588 if (!(chip->uartm & CS46XX_MODE_OUTPUT)) { snd_cs46xx_midi_input_close() 2589 snd_cs46xx_midi_reset(chip); snd_cs46xx_midi_input_close() 2591 snd_cs46xx_pokeBA0(chip, BA0_MIDCR, chip->midcr); snd_cs46xx_midi_input_close() 2593 chip->uartm &= ~CS46XX_MODE_INPUT; snd_cs46xx_midi_input_close() 2594 spin_unlock_irq(&chip->reg_lock); snd_cs46xx_midi_input_close() 2595 chip->active_ctrl(chip, -1); snd_cs46xx_midi_input_close() 2601 struct snd_cs46xx *chip = substream->rmidi->private_data; snd_cs46xx_midi_output_open() local 2603 chip->active_ctrl(chip, 1); snd_cs46xx_midi_output_open() 2605 spin_lock_irq(&chip->reg_lock); snd_cs46xx_midi_output_open() 2606 chip->uartm |= CS46XX_MODE_OUTPUT; snd_cs46xx_midi_output_open() 2607 chip->midcr |= MIDCR_TXE; snd_cs46xx_midi_output_open() 2608 chip->midi_output = substream; snd_cs46xx_midi_output_open() 2609 if (!(chip->uartm & CS46XX_MODE_INPUT)) { snd_cs46xx_midi_output_open() 2610 snd_cs46xx_midi_reset(chip); snd_cs46xx_midi_output_open() 2612 snd_cs46xx_pokeBA0(chip, BA0_MIDCR, chip->midcr); snd_cs46xx_midi_output_open() 2614 spin_unlock_irq(&chip->reg_lock); snd_cs46xx_midi_output_open() 2620 struct snd_cs46xx *chip = substream->rmidi->private_data; snd_cs46xx_midi_output_close() local 2622 spin_lock_irq(&chip->reg_lock); snd_cs46xx_midi_output_close() 2623 chip->midcr &= ~(MIDCR_TXE | MIDCR_TIE); snd_cs46xx_midi_output_close() 2624 chip->midi_output = NULL; snd_cs46xx_midi_output_close() 2625 if (!(chip->uartm & CS46XX_MODE_INPUT)) { snd_cs46xx_midi_output_close() 2626 snd_cs46xx_midi_reset(chip); snd_cs46xx_midi_output_close() 2628 snd_cs46xx_pokeBA0(chip, BA0_MIDCR, chip->midcr); snd_cs46xx_midi_output_close() 2630 chip->uartm &= ~CS46XX_MODE_OUTPUT; snd_cs46xx_midi_output_close() 2631 spin_unlock_irq(&chip->reg_lock); snd_cs46xx_midi_output_close() 2632 chip->active_ctrl(chip, -1); snd_cs46xx_midi_output_close() 2639 struct snd_cs46xx *chip = substream->rmidi->private_data; snd_cs46xx_midi_input_trigger() local 2641 spin_lock_irqsave(&chip->reg_lock, flags); snd_cs46xx_midi_input_trigger() 2643 if ((chip->midcr & MIDCR_RIE) == 0) { snd_cs46xx_midi_input_trigger() 2644 chip->midcr |= MIDCR_RIE; snd_cs46xx_midi_input_trigger() 2645 snd_cs46xx_pokeBA0(chip, BA0_MIDCR, chip->midcr); snd_cs46xx_midi_input_trigger() 2648 if (chip->midcr & MIDCR_RIE) { snd_cs46xx_midi_input_trigger() 2649 chip->midcr &= ~MIDCR_RIE; snd_cs46xx_midi_input_trigger() 2650 snd_cs46xx_pokeBA0(chip, BA0_MIDCR, chip->midcr); snd_cs46xx_midi_input_trigger() 2653 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_cs46xx_midi_input_trigger() 2659 struct snd_cs46xx *chip = substream->rmidi->private_data; snd_cs46xx_midi_output_trigger() local 2662 spin_lock_irqsave(&chip->reg_lock, flags); snd_cs46xx_midi_output_trigger() 2664 if ((chip->midcr & MIDCR_TIE) == 0) { snd_cs46xx_midi_output_trigger() 2665 chip->midcr |= MIDCR_TIE; snd_cs46xx_midi_output_trigger() 2667 while ((chip->midcr & MIDCR_TIE) && snd_cs46xx_midi_output_trigger() 2668 (snd_cs46xx_peekBA0(chip, BA0_MIDSR) & MIDSR_TBF) == 0) { snd_cs46xx_midi_output_trigger() 2670 chip->midcr &= ~MIDCR_TIE; snd_cs46xx_midi_output_trigger() 2672 snd_cs46xx_pokeBA0(chip, BA0_MIDWP, byte); snd_cs46xx_midi_output_trigger() 2675 snd_cs46xx_pokeBA0(chip, BA0_MIDCR, chip->midcr); snd_cs46xx_midi_output_trigger() 2678 if (chip->midcr & MIDCR_TIE) { snd_cs46xx_midi_output_trigger() 2679 chip->midcr &= ~MIDCR_TIE; snd_cs46xx_midi_output_trigger() 2680 snd_cs46xx_pokeBA0(chip, BA0_MIDCR, chip->midcr); snd_cs46xx_midi_output_trigger() 2683 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_cs46xx_midi_output_trigger() 2700 int snd_cs46xx_midi(struct snd_cs46xx *chip, int device) snd_cs46xx_midi() argument 2705 if ((err = snd_rawmidi_new(chip->card, "CS46XX", device, 1, 1, &rmidi)) < 0) snd_cs46xx_midi() 2711 rmidi->private_data = chip; snd_cs46xx_midi() 2712 chip->rmidi = rmidi; snd_cs46xx_midi() 2725 struct snd_cs46xx *chip = gameport_get_port_data(gameport); snd_cs46xx_gameport_trigger() local 2727 if (snd_BUG_ON(!chip)) snd_cs46xx_gameport_trigger() 2729 snd_cs46xx_pokeBA0(chip, BA0_JSPT, 0xFF); //outb(gameport->io, 0xFF); snd_cs46xx_gameport_trigger() 2734 struct snd_cs46xx *chip = gameport_get_port_data(gameport); snd_cs46xx_gameport_read() local 2736 if (snd_BUG_ON(!chip)) snd_cs46xx_gameport_read() 2738 return snd_cs46xx_peekBA0(chip, BA0_JSPT); //inb(gameport->io); snd_cs46xx_gameport_read() 2743 struct snd_cs46xx *chip = gameport_get_port_data(gameport); snd_cs46xx_gameport_cooked_read() local 2746 if (snd_BUG_ON(!chip)) snd_cs46xx_gameport_cooked_read() 2749 js1 = snd_cs46xx_peekBA0(chip, BA0_JSC1); snd_cs46xx_gameport_cooked_read() 2750 js2 = snd_cs46xx_peekBA0(chip, BA0_JSC2); snd_cs46xx_gameport_cooked_read() 2751 jst = snd_cs46xx_peekBA0(chip, BA0_JSPT); snd_cs46xx_gameport_cooked_read() 2778 int snd_cs46xx_gameport(struct snd_cs46xx *chip) snd_cs46xx_gameport() argument 2782 chip->gameport = gp = gameport_allocate_port(); snd_cs46xx_gameport() 2784 dev_err(chip->card->dev, snd_cs46xx_gameport() 2790 gameport_set_phys(gp, "pci%s/gameport0", pci_name(chip->pci)); snd_cs46xx_gameport() 2791 gameport_set_dev_parent(gp, &chip->pci->dev); snd_cs46xx_gameport() 2792 gameport_set_port_data(gp, chip); snd_cs46xx_gameport() 2799 snd_cs46xx_pokeBA0(chip, BA0_JSIO, 0xFF); // ? snd_cs46xx_gameport() 2800 snd_cs46xx_pokeBA0(chip, BA0_JSCTL, JSCTL_SP_MEDIUM_SLOW); snd_cs46xx_gameport() 2807 static inline void snd_cs46xx_remove_gameport(struct snd_cs46xx *chip) snd_cs46xx_remove_gameport() argument 2809 if (chip->gameport) { snd_cs46xx_remove_gameport() 2810 gameport_unregister_port(chip->gameport); snd_cs46xx_remove_gameport() 2811 chip->gameport = NULL; snd_cs46xx_remove_gameport() 2815 int snd_cs46xx_gameport(struct snd_cs46xx *chip) { return -ENOSYS; } snd_cs46xx_remove_gameport() argument 2816 static inline void snd_cs46xx_remove_gameport(struct snd_cs46xx *chip) { } snd_cs46xx_remove_gameport() argument 2840 static int snd_cs46xx_proc_init(struct snd_card *card, struct snd_cs46xx *chip) snd_cs46xx_proc_init() argument 2846 struct snd_cs46xx_region *region = &chip->region.idx[idx]; snd_cs46xx_proc_init() 2849 entry->private_data = chip; snd_cs46xx_proc_init() 2856 cs46xx_dsp_proc_init(card, chip); snd_cs46xx_proc_init() 2861 static int snd_cs46xx_proc_done(struct snd_cs46xx *chip) snd_cs46xx_proc_done() argument 2864 cs46xx_dsp_proc_done(chip); snd_cs46xx_proc_done() 2869 #define snd_cs46xx_proc_init(card, chip) 2870 #define snd_cs46xx_proc_done(chip) 2876 static void snd_cs46xx_hw_stop(struct snd_cs46xx *chip) snd_cs46xx_hw_stop() argument 2880 tmp = snd_cs46xx_peek(chip, BA1_PFIE); snd_cs46xx_hw_stop() 2883 snd_cs46xx_poke(chip, BA1_PFIE, tmp); /* playback interrupt disable */ snd_cs46xx_hw_stop() 2885 tmp = snd_cs46xx_peek(chip, BA1_CIE); snd_cs46xx_hw_stop() 2888 snd_cs46xx_poke(chip, BA1_CIE, tmp); /* capture interrupt disable */ snd_cs46xx_hw_stop() 2893 tmp = snd_cs46xx_peek(chip, BA1_PCTL); snd_cs46xx_hw_stop() 2894 snd_cs46xx_poke(chip, BA1_PCTL, tmp & 0x0000ffff); snd_cs46xx_hw_stop() 2899 tmp = snd_cs46xx_peek(chip, BA1_CCTL); snd_cs46xx_hw_stop() 2900 snd_cs46xx_poke(chip, BA1_CCTL, tmp & 0xffff0000); snd_cs46xx_hw_stop() 2905 snd_cs46xx_reset(chip); snd_cs46xx_hw_stop() 2907 snd_cs46xx_proc_stop(chip); snd_cs46xx_hw_stop() 2912 snd_cs46xx_pokeBA0(chip, BA0_CLKCR1, 0); snd_cs46xx_hw_stop() 2918 tmp = snd_cs46xx_peekBA0(chip, BA0_CLKCR1) & ~CLKCR1_SWCE; snd_cs46xx_hw_stop() 2919 snd_cs46xx_pokeBA0(chip, BA0_CLKCR1, tmp); snd_cs46xx_hw_stop() 2923 static int snd_cs46xx_free(struct snd_cs46xx *chip) snd_cs46xx_free() argument 2927 if (snd_BUG_ON(!chip)) snd_cs46xx_free() 2930 if (chip->active_ctrl) snd_cs46xx_free() 2931 chip->active_ctrl(chip, 1); snd_cs46xx_free() 2933 snd_cs46xx_remove_gameport(chip); snd_cs46xx_free() 2935 if (chip->amplifier_ctrl) snd_cs46xx_free() 2936 chip->amplifier_ctrl(chip, -chip->amplifier); /* force to off */ snd_cs46xx_free() 2938 snd_cs46xx_proc_done(chip); snd_cs46xx_free() 2940 if (chip->region.idx[0].resource) snd_cs46xx_free() 2941 snd_cs46xx_hw_stop(chip); snd_cs46xx_free() 2943 if (chip->irq >= 0) snd_cs46xx_free() 2944 free_irq(chip->irq, chip); snd_cs46xx_free() 2946 if (chip->active_ctrl) snd_cs46xx_free() 2947 chip->active_ctrl(chip, -chip->amplifier); snd_cs46xx_free() 2950 struct snd_cs46xx_region *region = &chip->region.idx[idx]; snd_cs46xx_free() 2957 if (chip->dsp_spos_instance) { snd_cs46xx_free() 2958 cs46xx_dsp_spos_destroy(chip); snd_cs46xx_free() 2959 chip->dsp_spos_instance = NULL; snd_cs46xx_free() 2962 free_module_desc(chip->modules[idx]); snd_cs46xx_free() 2964 vfree(chip->ba1); snd_cs46xx_free() 2968 kfree(chip->saved_regs); snd_cs46xx_free() 2971 pci_disable_device(chip->pci); snd_cs46xx_free() 2972 kfree(chip); snd_cs46xx_free() 2978 struct snd_cs46xx *chip = device->device_data; snd_cs46xx_dev_free() local 2979 return snd_cs46xx_free(chip); snd_cs46xx_dev_free() 2983 * initialize chip 2985 static int snd_cs46xx_chip_init(struct snd_cs46xx *chip) snd_cs46xx_chip_init() argument 2994 snd_cs46xx_pokeBA0(chip, BA0_CLKCR1, 0); snd_cs46xx_chip_init() 2995 snd_cs46xx_pokeBA0(chip, BA0_SERMC1, 0); snd_cs46xx_chip_init() 3002 snd_cs46xx_pokeBA0(chip, BA0_SERACC, SERACC_HSP | SERACC_CHIP_TYPE_2_0 | snd_cs46xx_chip_init() 3004 /* snd_cs46xx_pokeBA0(chip, BA0_SERACC, SERACC_HSP | SERACC_CHIP_TYPE_2_0); */ /* 2.00 codec */ snd_cs46xx_chip_init() 3006 snd_cs46xx_pokeBA0(chip, BA0_SERACC, SERACC_HSP | SERACC_CHIP_TYPE_1_03); /* 1.03 codec */ snd_cs46xx_chip_init() 3015 snd_cs46xx_pokeBA0(chip, BA0_ACCTL, 0); snd_cs46xx_chip_init() 3017 snd_cs46xx_pokeBA0(chip, BA0_ACCTL2, 0); snd_cs46xx_chip_init() 3020 snd_cs46xx_pokeBA0(chip, BA0_ACCTL, ACCTL_RSTN); snd_cs46xx_chip_init() 3022 snd_cs46xx_pokeBA0(chip, BA0_ACCTL2, ACCTL_RSTN); snd_cs46xx_chip_init() 3030 snd_cs46xx_pokeBA0(chip, BA0_ACCTL, ACCTL_ESYN | ACCTL_RSTN); snd_cs46xx_chip_init() 3032 snd_cs46xx_pokeBA0(chip, BA0_ACCTL2, ACCTL_ESYN | ACCTL_RSTN); snd_cs46xx_chip_init() 3046 snd_cs46xx_pokeBA0(chip, BA0_SERMC1, SERMC1_PTC_AC97); snd_cs46xx_chip_init() 3053 snd_cs46xx_pokeBA0(chip, BA0_PLLCC, PLLCC_LPF_1050_2780_KHZ | PLLCC_CDR_73_104_MHZ); snd_cs46xx_chip_init() 3054 snd_cs46xx_pokeBA0(chip, BA0_PLLM, 0x3a); snd_cs46xx_chip_init() 3055 snd_cs46xx_pokeBA0(chip, BA0_CLKCR2, CLKCR2_PDIVS_8); snd_cs46xx_chip_init() 3060 snd_cs46xx_pokeBA0(chip, BA0_CLKCR1, CLKCR1_PLLP); snd_cs46xx_chip_init() 3070 snd_cs46xx_pokeBA0(chip, BA0_CLKCR1, CLKCR1_PLLP | CLKCR1_SWCE); snd_cs46xx_chip_init() 3075 snd_cs46xx_pokeBA0(chip, BA0_SERBCF, SERBCF_HBP); snd_cs46xx_chip_init() 3080 snd_cs46xx_clear_serial_FIFOs(chip); snd_cs46xx_chip_init() 3085 /* snd_cs46xx_pokeBA0(chip, BA0_SERBSP, 0); */ snd_cs46xx_chip_init() 3091 snd_cs46xx_pokeBA0(chip, BA0_SERC1, SERC1_SO1F_AC97 | SERC1_SO1EN); snd_cs46xx_chip_init() 3092 snd_cs46xx_pokeBA0(chip, BA0_SERC2, SERC2_SI1F_AC97 | SERC1_SO1EN); snd_cs46xx_chip_init() 3093 snd_cs46xx_pokeBA0(chip, BA0_SERMC1, SERMC1_PTC_AC97 | SERMC1_MSPE); snd_cs46xx_chip_init() 3097 snd_cs46xx_pokeBA0(chip, BA0_SERC7, SERC7_ASDI2EN); snd_cs46xx_chip_init() 3098 snd_cs46xx_pokeBA0(chip, BA0_SERC3, 0); snd_cs46xx_chip_init() 3099 snd_cs46xx_pokeBA0(chip, BA0_SERC4, 0); snd_cs46xx_chip_init() 3100 snd_cs46xx_pokeBA0(chip, BA0_SERC5, 0); snd_cs46xx_chip_init() 3101 snd_cs46xx_pokeBA0(chip, BA0_SERC6, 1); snd_cs46xx_chip_init() 3116 if (snd_cs46xx_peekBA0(chip, BA0_ACSTS) & ACSTS_CRDY) snd_cs46xx_chip_init() 3122 dev_err(chip->card->dev, snd_cs46xx_chip_init() 3124 dev_err(chip->card->dev, snd_cs46xx_chip_init() 3135 if (snd_cs46xx_peekBA0(chip, BA0_ACSTS2) & ACSTS_CRDY) snd_cs46xx_chip_init() 3142 if (!(snd_cs46xx_peekBA0(chip, BA0_ACSTS2) & ACSTS_CRDY)) snd_cs46xx_chip_init() 3143 dev_dbg(chip->card->dev, snd_cs46xx_chip_init() 3152 snd_cs46xx_pokeBA0(chip, BA0_ACCTL, ACCTL_VFRM | ACCTL_ESYN | ACCTL_RSTN); snd_cs46xx_chip_init() 3154 snd_cs46xx_pokeBA0(chip, BA0_ACCTL2, ACCTL_VFRM | ACCTL_ESYN | ACCTL_RSTN); snd_cs46xx_chip_init() 3168 if ((snd_cs46xx_peekBA0(chip, BA0_ACISV) & (ACISV_ISV3 | ACISV_ISV4)) == (ACISV_ISV3 | ACISV_ISV4)) snd_cs46xx_chip_init() 3174 dev_err(chip->card->dev, snd_cs46xx_chip_init() 3182 dev_err(chip->card->dev, "never read ISV3 & ISV4 from AC'97\n"); snd_cs46xx_chip_init() 3183 dev_err(chip->card->dev, snd_cs46xx_chip_init() 3185 dev_err(chip->card->dev, snd_cs46xx_chip_init() 3187 dev_err(chip->card->dev, snd_cs46xx_chip_init() 3199 snd_cs46xx_pokeBA0(chip, BA0_ACOSV, ACOSV_SLV3 | ACOSV_SLV4); snd_cs46xx_chip_init() 3206 /* snd_cs46xx_pokeBA0(chip, BA0_AC97_POWERDOWN, 0x300); */ snd_cs46xx_chip_init() 3212 /* tmp = snd_cs46xx_peekBA0(chip, BA0_CLKCR1) & ~CLKCR1_SWCE; */ snd_cs46xx_chip_init() 3213 /* snd_cs46xx_pokeBA0(chip, BA0_CLKCR1, tmp); */ snd_cs46xx_chip_init() 3222 static void cs46xx_enable_stream_irqs(struct snd_cs46xx *chip) cs46xx_enable_stream_irqs() argument 3226 snd_cs46xx_pokeBA0(chip, BA0_HICR, HICR_IEV | HICR_CHGM); cs46xx_enable_stream_irqs() 3228 tmp = snd_cs46xx_peek(chip, BA1_PFIE); cs46xx_enable_stream_irqs() 3230 snd_cs46xx_poke(chip, BA1_PFIE, tmp); /* playback interrupt enable */ cs46xx_enable_stream_irqs() 3232 tmp = snd_cs46xx_peek(chip, BA1_CIE); cs46xx_enable_stream_irqs() 3235 snd_cs46xx_poke(chip, BA1_CIE, tmp); /* capture interrupt enable */ cs46xx_enable_stream_irqs() 3238 int snd_cs46xx_start_dsp(struct snd_cs46xx *chip) snd_cs46xx_start_dsp() argument 3249 snd_cs46xx_reset(chip); snd_cs46xx_start_dsp() 3255 err = load_firmware(chip, &chip->modules[i], module_names[i]); snd_cs46xx_start_dsp() 3257 dev_err(chip->card->dev, "firmware load error [%s]\n", snd_cs46xx_start_dsp() 3261 err = cs46xx_dsp_load_module(chip, chip->modules[i]); snd_cs46xx_start_dsp() 3263 dev_err(chip->card->dev, "image download error [%s]\n", snd_cs46xx_start_dsp() 3269 if (cs46xx_dsp_scb_and_task_init(chip) < 0) snd_cs46xx_start_dsp() 3272 err = load_firmware(chip); snd_cs46xx_start_dsp() 3277 err = snd_cs46xx_download_image(chip); snd_cs46xx_start_dsp() 3279 dev_err(chip->card->dev, "image download error\n"); snd_cs46xx_start_dsp() 3286 tmp = snd_cs46xx_peek(chip, BA1_PCTL); snd_cs46xx_start_dsp() 3287 chip->play_ctl = tmp & 0xffff0000; snd_cs46xx_start_dsp() 3288 snd_cs46xx_poke(chip, BA1_PCTL, tmp & 0x0000ffff); snd_cs46xx_start_dsp() 3294 tmp = snd_cs46xx_peek(chip, BA1_CCTL); snd_cs46xx_start_dsp() 3295 chip->capt.ctl = tmp & 0x0000ffff; snd_cs46xx_start_dsp() 3296 snd_cs46xx_poke(chip, BA1_CCTL, tmp & 0xffff0000); snd_cs46xx_start_dsp() 3300 snd_cs46xx_set_play_sample_rate(chip, 8000); snd_cs46xx_start_dsp() 3301 snd_cs46xx_set_capture_sample_rate(chip, 8000); snd_cs46xx_start_dsp() 3303 snd_cs46xx_proc_start(chip); snd_cs46xx_start_dsp() 3305 cs46xx_enable_stream_irqs(chip); snd_cs46xx_start_dsp() 3309 snd_cs46xx_poke(chip, BA1_PVOL, 0x80008000); snd_cs46xx_start_dsp() 3310 snd_cs46xx_poke(chip, BA1_CVOL, 0x80008000); snd_cs46xx_start_dsp() 3321 static void amp_none(struct snd_cs46xx *chip, int change) amp_none() argument 3326 static int voyetra_setup_eapd_slot(struct snd_cs46xx *chip) voyetra_setup_eapd_slot() argument 3332 dev_dbg(chip->card->dev, "cs46xx_setup_eapd_slot()+\n"); voyetra_setup_eapd_slot() 3338 tmp = snd_cs46xx_peekBA0(chip, BA0_CLKCR1); voyetra_setup_eapd_slot() 3341 snd_cs46xx_pokeBA0(chip, BA0_CLKCR1, tmp | CLKCR1_SWCE); voyetra_setup_eapd_slot() 3346 * Clear PRA. The Bonzo chip will be used for GPIO not for modem voyetra_setup_eapd_slot() 3349 if(chip->nr_ac97_codecs != 2) { voyetra_setup_eapd_slot() 3350 dev_err(chip->card->dev, voyetra_setup_eapd_slot() 3355 modem_power = snd_cs46xx_codec_read (chip, voyetra_setup_eapd_slot() 3360 snd_cs46xx_codec_write(chip, voyetra_setup_eapd_slot() 3367 pin_config = snd_cs46xx_codec_read (chip, voyetra_setup_eapd_slot() 3372 snd_cs46xx_codec_write(chip, voyetra_setup_eapd_slot() 3380 logic_type = snd_cs46xx_codec_read(chip, AC97_GPIO_POLARITY, voyetra_setup_eapd_slot() 3384 snd_cs46xx_codec_write (chip, AC97_GPIO_POLARITY, logic_type, voyetra_setup_eapd_slot() 3387 valid_slots = snd_cs46xx_peekBA0(chip, BA0_ACOSV); voyetra_setup_eapd_slot() 3389 snd_cs46xx_pokeBA0(chip, BA0_ACOSV, valid_slots); voyetra_setup_eapd_slot() 3391 if ( cs46xx_wait_for_fifo(chip,1) ) { voyetra_setup_eapd_slot() 3392 dev_dbg(chip->card->dev, "FIFO is busy\n"); voyetra_setup_eapd_slot() 3407 snd_cs46xx_pokeBA0(chip, BA0_SERBWP, 0x1800); voyetra_setup_eapd_slot() 3412 if ( cs46xx_wait_for_fifo(chip,200) ) { voyetra_setup_eapd_slot() 3413 dev_dbg(chip->card->dev, voyetra_setup_eapd_slot() 3423 snd_cs46xx_pokeBA0(chip, BA0_SERBAD, idx); voyetra_setup_eapd_slot() 3428 snd_cs46xx_pokeBA0(chip, BA0_SERBCM, SERBCM_WRC); voyetra_setup_eapd_slot() 3432 cs46xx_wait_for_fifo(chip,200); voyetra_setup_eapd_slot() 3439 snd_cs46xx_pokeBA0(chip, BA0_CLKCR1, tmp); voyetra_setup_eapd_slot() 3449 static void amp_voyetra(struct snd_cs46xx *chip, int change) amp_voyetra() argument 3455 int old = chip->amplifier; amp_voyetra() 3459 chip->amplifier += change; amp_voyetra() 3460 oval = snd_cs46xx_codec_read(chip, AC97_POWERDOWN, amp_voyetra() 3463 if (chip->amplifier) { amp_voyetra() 3471 snd_cs46xx_codec_write(chip, AC97_POWERDOWN, val, amp_voyetra() 3473 if (chip->eapd_switch) amp_voyetra() 3474 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, amp_voyetra() 3475 &chip->eapd_switch->id); amp_voyetra() 3479 if (chip->amplifier && !old) { amp_voyetra() 3480 voyetra_setup_eapd_slot(chip); amp_voyetra() 3485 static void hercules_init(struct snd_cs46xx *chip) hercules_init() argument 3488 snd_cs46xx_pokeBA0(chip, BA0_EGPIODR, EGPIODR_GPOE0); hercules_init() 3489 snd_cs46xx_pokeBA0(chip, BA0_EGPIOPTR, EGPIODR_GPOE0); hercules_init() 3496 static void amp_hercules(struct snd_cs46xx *chip, int change) amp_hercules() argument 3498 int old = chip->amplifier; amp_hercules() 3499 int val1 = snd_cs46xx_peekBA0(chip, BA0_EGPIODR); amp_hercules() 3500 int val2 = snd_cs46xx_peekBA0(chip, BA0_EGPIOPTR); amp_hercules() 3502 chip->amplifier += change; amp_hercules() 3503 if (chip->amplifier && !old) { amp_hercules() 3504 dev_dbg(chip->card->dev, "Hercules amplifier ON\n"); amp_hercules() 3506 snd_cs46xx_pokeBA0(chip, BA0_EGPIODR, amp_hercules() 3508 snd_cs46xx_pokeBA0(chip, BA0_EGPIOPTR, amp_hercules() 3510 } else if (old && !chip->amplifier) { amp_hercules() 3511 dev_dbg(chip->card->dev, "Hercules amplifier OFF\n"); amp_hercules() 3512 snd_cs46xx_pokeBA0(chip, BA0_EGPIODR, val1 & ~EGPIODR_GPOE2); /* disable */ amp_hercules() 3513 snd_cs46xx_pokeBA0(chip, BA0_EGPIOPTR, val2 & ~EGPIOPTR_GPPT2); /* disable */ amp_hercules() 3517 static void voyetra_mixer_init (struct snd_cs46xx *chip) voyetra_mixer_init() argument 3519 dev_dbg(chip->card->dev, "initializing Voyetra mixer\n"); voyetra_mixer_init() 3522 snd_cs46xx_pokeBA0(chip, BA0_EGPIODR, EGPIODR_GPOE0); voyetra_mixer_init() 3523 snd_cs46xx_pokeBA0(chip, BA0_EGPIOPTR, EGPIODR_GPOE0); voyetra_mixer_init() 3526 static void hercules_mixer_init (struct snd_cs46xx *chip) hercules_mixer_init() argument 3531 struct snd_card *card = chip->card; hercules_mixer_init() 3535 hercules_init(chip); hercules_mixer_init() 3537 dev_dbg(chip->card->dev, "initializing Hercules mixer\n"); hercules_mixer_init() 3540 if (chip->in_suspend) hercules_mixer_init() 3546 kctl = snd_ctl_new1(&snd_hercules_controls[idx], chip); hercules_mixer_init() 3563 static void amp_voyetra_4294(struct snd_cs46xx *chip, int change) 3565 chip->amplifier += change; 3567 if (chip->amplifier) { 3569 snd_cs46xx_codec_write(chip, 0x4C, 3570 snd_cs46xx_codec_read(chip, 0x4C) & 0xFE7F); 3571 snd_cs46xx_codec_write(chip, 0x4E, 3572 snd_cs46xx_codec_read(chip, 0x4E) | 0x0180); 3574 snd_cs46xx_codec_write(chip, 0x54, 3575 snd_cs46xx_codec_read(chip, 0x54) & ~0x0180); 3577 snd_cs46xx_codec_write(chip, 0x54, 3578 snd_cs46xx_codec_read(chip, 0x54) | 0x0180); 3586 * whenever we need to beat on the chip. 3593 static void clkrun_hack(struct snd_cs46xx *chip, int change) clkrun_hack() argument 3597 if (!chip->acpi_port) clkrun_hack() 3600 chip->amplifier += change; clkrun_hack() 3603 nval = control = inw(chip->acpi_port + 0x10); clkrun_hack() 3606 if (! chip->amplifier) clkrun_hack() 3611 outw(nval, chip->acpi_port + 0x10); clkrun_hack() 3618 static void clkrun_init(struct snd_cs46xx *chip) clkrun_init() argument 3623 chip->acpi_port = 0; clkrun_init() 3632 chip->acpi_port = pp << 8; clkrun_init() 3777 struct snd_cs46xx *chip = card->private_data; snd_cs46xx_suspend() local 3781 chip->in_suspend = 1; snd_cs46xx_suspend() 3782 snd_pcm_suspend_all(chip->pcm); snd_cs46xx_suspend() 3783 // chip->ac97_powerdown = snd_cs46xx_codec_read(chip, AC97_POWER_CONTROL); snd_cs46xx_suspend() 3784 // chip->ac97_general_purpose = snd_cs46xx_codec_read(chip, BA0_AC97_GENERAL_PURPOSE); snd_cs46xx_suspend() 3786 snd_ac97_suspend(chip->ac97[CS46XX_PRIMARY_CODEC_INDEX]); snd_cs46xx_suspend() 3787 snd_ac97_suspend(chip->ac97[CS46XX_SECONDARY_CODEC_INDEX]); snd_cs46xx_suspend() 3791 chip->saved_regs[i] = snd_cs46xx_peekBA0(chip, saved_regs[i]); snd_cs46xx_suspend() 3793 amp_saved = chip->amplifier; snd_cs46xx_suspend() 3795 chip->amplifier_ctrl(chip, -chip->amplifier); snd_cs46xx_suspend() 3796 snd_cs46xx_hw_stop(chip); snd_cs46xx_suspend() 3798 chip->active_ctrl(chip, -chip->amplifier); snd_cs46xx_suspend() 3799 chip->amplifier = amp_saved; /* restore the status */ snd_cs46xx_suspend() 3806 struct snd_cs46xx *chip = card->private_data; snd_cs46xx_resume() local 3813 amp_saved = chip->amplifier; snd_cs46xx_resume() 3814 chip->amplifier = 0; snd_cs46xx_resume() 3815 chip->active_ctrl(chip, 1); /* force to on */ snd_cs46xx_resume() 3817 snd_cs46xx_chip_init(chip); snd_cs46xx_resume() 3819 snd_cs46xx_reset(chip); snd_cs46xx_resume() 3821 cs46xx_dsp_resume(chip); snd_cs46xx_resume() 3824 snd_cs46xx_pokeBA0(chip, saved_regs[i], chip->saved_regs[i]); snd_cs46xx_resume() 3826 snd_cs46xx_download_image(chip); snd_cs46xx_resume() 3830 snd_cs46xx_codec_write(chip, BA0_AC97_GENERAL_PURPOSE, snd_cs46xx_resume() 3831 chip->ac97_general_purpose); snd_cs46xx_resume() 3832 snd_cs46xx_codec_write(chip, AC97_POWER_CONTROL, snd_cs46xx_resume() 3833 chip->ac97_powerdown); snd_cs46xx_resume() 3835 snd_cs46xx_codec_write(chip, BA0_AC97_POWERDOWN, snd_cs46xx_resume() 3836 chip->ac97_powerdown); snd_cs46xx_resume() 3840 snd_ac97_resume(chip->ac97[CS46XX_PRIMARY_CODEC_INDEX]); snd_cs46xx_resume() 3841 snd_ac97_resume(chip->ac97[CS46XX_SECONDARY_CODEC_INDEX]); snd_cs46xx_resume() 3846 tmp = snd_cs46xx_peek(chip, BA1_CCTL); snd_cs46xx_resume() 3847 chip->capt.ctl = tmp & 0x0000ffff; snd_cs46xx_resume() 3848 snd_cs46xx_poke(chip, BA1_CCTL, tmp & 0xffff0000); snd_cs46xx_resume() 3853 snd_cs46xx_set_play_sample_rate(chip, 8000); snd_cs46xx_resume() 3854 snd_cs46xx_set_capture_sample_rate(chip, 8000); snd_cs46xx_resume() 3855 snd_cs46xx_proc_start(chip); snd_cs46xx_resume() 3857 cs46xx_enable_stream_irqs(chip); snd_cs46xx_resume() 3860 chip->amplifier_ctrl(chip, 1); /* turn amp on */ snd_cs46xx_resume() 3862 chip->active_ctrl(chip, -1); /* disable CLKRUN */ snd_cs46xx_resume() 3863 chip->amplifier = amp_saved; snd_cs46xx_resume() 3864 chip->in_suspend = 0; snd_cs46xx_resume() 3881 struct snd_cs46xx *chip; snd_cs46xx_create() local 3896 chip = kzalloc(sizeof(*chip), GFP_KERNEL); snd_cs46xx_create() 3897 if (chip == NULL) { snd_cs46xx_create() 3901 spin_lock_init(&chip->reg_lock); snd_cs46xx_create() 3903 mutex_init(&chip->spos_mutex); snd_cs46xx_create() 3905 chip->card = card; snd_cs46xx_create() 3906 chip->pci = pci; snd_cs46xx_create() 3907 chip->irq = -1; snd_cs46xx_create() 3908 chip->ba0_addr = pci_resource_start(pci, 0); snd_cs46xx_create() 3909 chip->ba1_addr = pci_resource_start(pci, 1); snd_cs46xx_create() 3910 if (chip->ba0_addr == 0 || chip->ba0_addr == (unsigned long)~0 || snd_cs46xx_create() 3911 chip->ba1_addr == 0 || chip->ba1_addr == (unsigned long)~0) { snd_cs46xx_create() 3912 dev_err(chip->card->dev, snd_cs46xx_create() 3914 chip->ba0_addr, chip->ba1_addr); snd_cs46xx_create() 3915 snd_cs46xx_free(chip); snd_cs46xx_create() 3919 region = &chip->region.name.ba0; snd_cs46xx_create() 3921 region->base = chip->ba0_addr; snd_cs46xx_create() 3924 region = &chip->region.name.data0; snd_cs46xx_create() 3926 region->base = chip->ba1_addr + BA1_SP_DMEM0; snd_cs46xx_create() 3929 region = &chip->region.name.data1; snd_cs46xx_create() 3931 region->base = chip->ba1_addr + BA1_SP_DMEM1; snd_cs46xx_create() 3934 region = &chip->region.name.pmem; snd_cs46xx_create() 3936 region->base = chip->ba1_addr + BA1_SP_PMEM; snd_cs46xx_create() 3939 region = &chip->region.name.reg; snd_cs46xx_create() 3941 region->base = chip->ba1_addr + BA1_SP_REG; snd_cs46xx_create() 3950 dev_dbg(chip->card->dev, "hack for %s enabled\n", snd_cs46xx_create() 3953 chip->amplifier_ctrl = cp->amp; snd_cs46xx_create() 3954 chip->active_ctrl = cp->active; snd_cs46xx_create() 3955 chip->mixer_init = cp->mixer_init; snd_cs46xx_create() 3958 cp->init(chip); snd_cs46xx_create() 3964 dev_info(chip->card->dev, snd_cs46xx_create() 3966 chip->amplifier_ctrl = amp_voyetra; snd_cs46xx_create() 3970 dev_info(chip->card->dev, snd_cs46xx_create() 3972 chip->active_ctrl = clkrun_hack; snd_cs46xx_create() 3973 clkrun_init(chip); snd_cs46xx_create() 3976 if (chip->amplifier_ctrl == NULL) snd_cs46xx_create() 3977 chip->amplifier_ctrl = amp_none; snd_cs46xx_create() 3978 if (chip->active_ctrl == NULL) snd_cs46xx_create() 3979 chip->active_ctrl = amp_none; snd_cs46xx_create() 3981 chip->active_ctrl(chip, 1); /* enable CLKRUN */ snd_cs46xx_create() 3986 region = &chip->region.idx[idx]; snd_cs46xx_create() 3989 dev_err(chip->card->dev, snd_cs46xx_create() 3992 snd_cs46xx_free(chip); snd_cs46xx_create() 3997 dev_err(chip->card->dev, snd_cs46xx_create() 3999 snd_cs46xx_free(chip); snd_cs46xx_create() 4005 KBUILD_MODNAME, chip)) { snd_cs46xx_create() 4006 dev_err(chip->card->dev, "unable to grab IRQ %d\n", pci->irq); snd_cs46xx_create() 4007 snd_cs46xx_free(chip); snd_cs46xx_create() 4010 chip->irq = pci->irq; snd_cs46xx_create() 4013 chip->dsp_spos_instance = cs46xx_dsp_spos_create(chip); snd_cs46xx_create() 4014 if (chip->dsp_spos_instance == NULL) { snd_cs46xx_create() 4015 snd_cs46xx_free(chip); snd_cs46xx_create() 4020 err = snd_cs46xx_chip_init(chip); snd_cs46xx_create() 4022 snd_cs46xx_free(chip); snd_cs46xx_create() 4026 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) { snd_cs46xx_create() 4027 snd_cs46xx_free(chip); snd_cs46xx_create() 4031 snd_cs46xx_proc_init(card, chip); snd_cs46xx_create() 4034 chip->saved_regs = kmalloc(sizeof(*chip->saved_regs) * snd_cs46xx_create() 4036 if (!chip->saved_regs) { snd_cs46xx_create() 4037 snd_cs46xx_free(chip); snd_cs46xx_create() 4042 chip->active_ctrl(chip, -1); /* disable CLKRUN */ snd_cs46xx_create() 4044 *rchip = chip; snd_cs46xx_create()
H A D	cs46xx_lib.h	60 static inline void snd_cs46xx_poke(struct snd_cs46xx *chip, unsigned long reg, unsigned int val) snd_cs46xx_poke() argument 70 writel(val, chip->region.idx[bank+1].remap_addr + offset); snd_cs46xx_poke() 73 static inline unsigned int snd_cs46xx_peek(struct snd_cs46xx *chip, unsigned long reg) snd_cs46xx_peek() argument 77 return readl(chip->region.idx[bank+1].remap_addr + offset); snd_cs46xx_peek() 80 static inline void snd_cs46xx_pokeBA0(struct snd_cs46xx *chip, unsigned long offset, unsigned int val) snd_cs46xx_pokeBA0() argument 82 writel(val, chip->region.name.ba0.remap_addr + offset); snd_cs46xx_pokeBA0() 85 static inline unsigned int snd_cs46xx_peekBA0(struct snd_cs46xx *chip, unsigned long offset) snd_cs46xx_peekBA0() argument 87 return readl(chip->region.name.ba0.remap_addr + offset); snd_cs46xx_peekBA0() 90 struct dsp_spos_instance *cs46xx_dsp_spos_create (struct snd_cs46xx * chip); 91 void cs46xx_dsp_spos_destroy (struct snd_cs46xx * chip); 92 int cs46xx_dsp_load_module (struct snd_cs46xx * chip, struct dsp_module_desc * module); 94 int cs46xx_dsp_resume(struct snd_cs46xx * chip); 96 struct dsp_symbol_entry *cs46xx_dsp_lookup_symbol (struct snd_cs46xx * chip, char * symbol_name, 99 int cs46xx_dsp_proc_init (struct snd_card *card, struct snd_cs46xx *chip); 100 int cs46xx_dsp_proc_done (struct snd_cs46xx *chip); 102 #define cs46xx_dsp_proc_init(card, chip) 103 #define cs46xx_dsp_proc_done(chip) 105 int cs46xx_dsp_scb_and_task_init (struct snd_cs46xx *chip); 106 int snd_cs46xx_download (struct snd_cs46xx *chip, u32 *src, unsigned long offset, 108 int snd_cs46xx_clear_BA1(struct snd_cs46xx *chip, unsigned long offset, unsigned long len); 109 int cs46xx_dsp_enable_spdif_out (struct snd_cs46xx *chip); 110 int cs46xx_dsp_enable_spdif_hw (struct snd_cs46xx *chip); 111 int cs46xx_dsp_disable_spdif_out (struct snd_cs46xx *chip); 112 int cs46xx_dsp_enable_spdif_in (struct snd_cs46xx *chip); 113 int cs46xx_dsp_disable_spdif_in (struct snd_cs46xx *chip); 114 int cs46xx_dsp_enable_pcm_capture (struct snd_cs46xx *chip); 115 int cs46xx_dsp_disable_pcm_capture (struct snd_cs46xx *chip); 116 int cs46xx_dsp_enable_adc_capture (struct snd_cs46xx *chip); 117 int cs46xx_dsp_disable_adc_capture (struct snd_cs46xx *chip); 118 int cs46xx_poke_via_dsp (struct snd_cs46xx *chip, u32 address, u32 data); 119 struct dsp_scb_descriptor * cs46xx_dsp_create_scb (struct snd_cs46xx *chip, char * name, 123 void cs46xx_dsp_proc_register_scb_desc (struct snd_cs46xx *chip, 127 #define cs46xx_dsp_proc_register_scb_desc(chip, scb) 129 struct dsp_scb_descriptor * cs46xx_dsp_create_timing_master_scb (struct snd_cs46xx *chip); 131 cs46xx_dsp_create_codec_out_scb(struct snd_cs46xx * chip, 137 cs46xx_dsp_create_codec_in_scb(struct snd_cs46xx * chip, char * codec_name, 142 void cs46xx_dsp_remove_scb (struct snd_cs46xx *chip, 145 cs46xx_dsp_create_codec_in_scb(struct snd_cs46xx * chip, char * codec_name, 151 cs46xx_dsp_create_src_task_scb(struct snd_cs46xx * chip, char * scb_name, 157 cs46xx_dsp_create_mix_only_scb(struct snd_cs46xx * chip, char * scb_name, 163 cs46xx_dsp_create_vari_decimate_scb(struct snd_cs46xx * chip, char * scb_name, 168 cs46xx_dsp_create_asynch_fg_rx_scb(struct snd_cs46xx * chip, char * scb_name, 173 cs46xx_dsp_create_spio_write_scb(struct snd_cs46xx * chip, char * scb_name, u32 dest, 177 cs46xx_dsp_create_mix_to_ostream_scb(struct snd_cs46xx * chip, char * scb_name, 182 cs46xx_dsp_create_magic_snoop_scb(struct snd_cs46xx * chip, char * scb_name, 188 cs46xx_dsp_create_pcm_channel (struct snd_cs46xx * chip, u32 sample_rate, 191 void cs46xx_dsp_destroy_pcm_channel (struct snd_cs46xx * chip, 193 int cs46xx_dsp_pcm_unlink (struct snd_cs46xx * chip, 195 int cs46xx_dsp_pcm_link (struct snd_cs46xx * chip, 198 cs46xx_add_record_source (struct snd_cs46xx *chip, struct dsp_scb_descriptor * source, 200 int cs46xx_src_unlink(struct snd_cs46xx *chip, struct dsp_scb_descriptor * src); 201 int cs46xx_src_link(struct snd_cs46xx *chip, struct dsp_scb_descriptor * src); 202 int cs46xx_iec958_pre_open (struct snd_cs46xx *chip); 203 int cs46xx_iec958_post_close (struct snd_cs46xx *chip); 204 int cs46xx_dsp_pcm_channel_set_period (struct snd_cs46xx * chip, 207 int cs46xx_dsp_pcm_ostream_set_period (struct snd_cs46xx * chip, int period_size); 208 int cs46xx_dsp_set_dac_volume (struct snd_cs46xx * chip, u16 left, u16 right); 209 int cs46xx_dsp_set_iec958_volume (struct snd_cs46xx * chip, u16 left, u16 right);
H A D	dsp_spos.c	40 static int cs46xx_dsp_async_init (struct snd_cs46xx *chip, 58 static int shadow_and_reallocate_code (struct snd_cs46xx * chip, u32 * data, u32 size, shadow_and_reallocate_code() argument 64 struct dsp_spos_instance * ins = chip->dsp_spos_instance; shadow_and_reallocate_code() 88 dev_dbg(chip->card->dev, shadow_and_reallocate_code() 95 dev_dbg(chip->card->dev, shadow_and_reallocate_code() 108 dev_dbg(chip->card->dev, shadow_and_reallocate_code() 120 dev_dbg(chip->card->dev, shadow_and_reallocate_code() 151 static int add_symbols (struct snd_cs46xx * chip, struct dsp_module_desc * module) add_symbols() argument 154 struct dsp_spos_instance * ins = chip->dsp_spos_instance; add_symbols() 165 dev_err(chip->card->dev, add_symbols() 171 if (cs46xx_dsp_lookup_symbol(chip, add_symbols() 186 dev_dbg(chip->card->dev, add_symbols() 197 add_symbol (struct snd_cs46xx * chip, char * symbol_name, u32 address, int type) add_symbol() argument 199 struct dsp_spos_instance * ins = chip->dsp_spos_instance; add_symbol() 204 dev_err(chip->card->dev, "dsp_spos: symbol table is full\n"); add_symbol() 208 if (cs46xx_dsp_lookup_symbol(chip, add_symbol() 211 dev_err(chip->card->dev, add_symbol() 234 struct dsp_spos_instance *cs46xx_dsp_spos_create (struct snd_cs46xx * chip) cs46xx_dsp_spos_create() argument 247 cs46xx_dsp_spos_destroy(chip); cs46xx_dsp_spos_create() 287 void cs46xx_dsp_spos_destroy (struct snd_cs46xx * chip) cs46xx_dsp_spos_destroy() argument 290 struct dsp_spos_instance * ins = chip->dsp_spos_instance; cs46xx_dsp_spos_destroy() 295 mutex_lock(&chip->spos_mutex); cs46xx_dsp_spos_destroy() 309 mutex_unlock(&chip->spos_mutex); cs46xx_dsp_spos_destroy() 312 static int dsp_load_parameter(struct snd_cs46xx *chip, dsp_load_parameter() argument 318 dev_dbg(chip->card->dev, dsp_load_parameter() 326 dev_dbg(chip->card->dev, dsp_load_parameter() 327 "dsp_spos: downloading parameter data to chip (%08x-%08x)\n", dsp_load_parameter() 329 if (snd_cs46xx_download (chip, parameter->data, doffset, dsize)) { dsp_load_parameter() 330 dev_err(chip->card->dev, dsp_load_parameter() 337 static int dsp_load_sample(struct snd_cs46xx *chip, dsp_load_sample() argument 343 dev_dbg(chip->card->dev, dsp_load_sample() 351 dev_dbg(chip->card->dev, dsp_load_sample() 352 "dsp_spos: downloading sample data to chip (%08x-%08x)\n", dsp_load_sample() 355 if (snd_cs46xx_download (chip,sample->data,doffset,dsize)) { dsp_load_sample() 356 dev_err(chip->card->dev, dsp_load_sample() 363 int cs46xx_dsp_load_module (struct snd_cs46xx * chip, struct dsp_module_desc * module) cs46xx_dsp_load_module() argument 365 struct dsp_spos_instance * ins = chip->dsp_spos_instance; cs46xx_dsp_load_module() 371 dev_err(chip->card->dev, cs46xx_dsp_load_module() 376 dev_dbg(chip->card->dev, cs46xx_dsp_load_module() 380 dev_dbg(chip->card->dev, "dsp_spos: clearing parameter area\n"); cs46xx_dsp_load_module() 381 snd_cs46xx_clear_BA1(chip, DSP_PARAMETER_BYTE_OFFSET, DSP_PARAMETER_BYTE_SIZE); cs46xx_dsp_load_module() 384 err = dsp_load_parameter(chip, get_segment_desc(module, cs46xx_dsp_load_module() 390 dev_dbg(chip->card->dev, "dsp_spos: clearing sample area\n"); cs46xx_dsp_load_module() 391 snd_cs46xx_clear_BA1(chip, DSP_SAMPLE_BYTE_OFFSET, DSP_SAMPLE_BYTE_SIZE); cs46xx_dsp_load_module() 394 err = dsp_load_sample(chip, get_segment_desc(module, cs46xx_dsp_load_module() 400 dev_dbg(chip->card->dev, "dsp_spos: clearing code area\n"); cs46xx_dsp_load_module() 401 snd_cs46xx_clear_BA1(chip, DSP_CODE_BYTE_OFFSET, DSP_CODE_BYTE_SIZE); cs46xx_dsp_load_module() 405 dev_dbg(chip->card->dev, cs46xx_dsp_load_module() 409 dev_err(chip->card->dev, cs46xx_dsp_load_module() 421 if (add_symbols(chip,module)) { cs46xx_dsp_load_module() 422 dev_err(chip->card->dev, cs46xx_dsp_load_module() 429 dev_dbg(chip->card->dev, cs46xx_dsp_load_module() 430 "dsp_spos: downloading code to chip (%08x-%08x)\n", cs46xx_dsp_load_module() 433 module->nfixups = shadow_and_reallocate_code(chip,code->data,code->size,module->overlay_begin_address); cs46xx_dsp_load_module() 435 if (snd_cs46xx_download (chip,(ins->code.data + ins->code.offset),doffset,dsize)) { cs46xx_dsp_load_module() 436 dev_err(chip->card->dev, cs46xx_dsp_load_module() 454 cs46xx_dsp_lookup_symbol (struct snd_cs46xx * chip, char * symbol_name, int symbol_type) cs46xx_dsp_lookup_symbol() argument 457 struct dsp_spos_instance * ins = chip->dsp_spos_instance; cs46xx_dsp_lookup_symbol() 471 dev_err(chip->card->dev, "dsp_spos: symbol <%s> type %02x not found\n", cs46xx_dsp_lookup_symbol() 481 cs46xx_dsp_lookup_symbol_addr (struct snd_cs46xx * chip, u32 address, int symbol_type) cs46xx_dsp_lookup_symbol_addr() argument 484 struct dsp_spos_instance * ins = chip->dsp_spos_instance; cs46xx_dsp_lookup_symbol_addr() 505 struct snd_cs46xx *chip = entry->private_data; cs46xx_dsp_proc_symbol_table_read() local 506 struct dsp_spos_instance * ins = chip->dsp_spos_instance; cs46xx_dsp_proc_symbol_table_read() 533 struct snd_cs46xx *chip = entry->private_data; cs46xx_dsp_proc_modules_read() local 534 struct dsp_spos_instance * ins = chip->dsp_spos_instance; cs46xx_dsp_proc_modules_read() 537 mutex_lock(&chip->spos_mutex); cs46xx_dsp_proc_modules_read() 550 mutex_unlock(&chip->spos_mutex); cs46xx_dsp_proc_modules_read() 556 struct snd_cs46xx *chip = entry->private_data; cs46xx_dsp_proc_task_tree_read() local 557 struct dsp_spos_instance * ins = chip->dsp_spos_instance; cs46xx_dsp_proc_task_tree_read() 559 void __iomem *dst = chip->region.idx[1].remap_addr + DSP_PARAMETER_BYTE_OFFSET; cs46xx_dsp_proc_task_tree_read() 561 mutex_lock(&chip->spos_mutex); cs46xx_dsp_proc_task_tree_read() 578 mutex_unlock(&chip->spos_mutex); cs46xx_dsp_proc_task_tree_read() 584 struct snd_cs46xx *chip = entry->private_data; cs46xx_dsp_proc_scb_read() local 585 struct dsp_spos_instance * ins = chip->dsp_spos_instance; cs46xx_dsp_proc_scb_read() 588 mutex_lock(&chip->spos_mutex); cs46xx_dsp_proc_scb_read() 611 mutex_unlock(&chip->spos_mutex); cs46xx_dsp_proc_scb_read() 617 struct snd_cs46xx *chip = entry->private_data; cs46xx_dsp_proc_parameter_dump_read() local 618 /*struct dsp_spos_instance * ins = chip->dsp_spos_instance; */ cs46xx_dsp_proc_parameter_dump_read() 620 void __iomem *dst = chip->region.idx[1].remap_addr + DSP_PARAMETER_BYTE_OFFSET; cs46xx_dsp_proc_parameter_dump_read() 629 if ( (symbol = cs46xx_dsp_lookup_symbol_addr (chip,i / sizeof(u32), SYMBOL_PARAMETER)) != NULL) { cs46xx_dsp_proc_parameter_dump_read() 645 struct snd_cs46xx *chip = entry->private_data; cs46xx_dsp_proc_sample_dump_read() local 647 void __iomem *dst = chip->region.idx[2].remap_addr; cs46xx_dsp_proc_sample_dump_read() 790 int cs46xx_dsp_proc_init (struct snd_card *card, struct snd_cs46xx *chip) cs46xx_dsp_proc_init() argument 793 struct dsp_spos_instance * ins = chip->dsp_spos_instance; cs46xx_dsp_proc_init() 815 entry->private_data = chip; cs46xx_dsp_proc_init() 827 entry->private_data = chip; cs46xx_dsp_proc_init() 839 entry->private_data = chip; cs46xx_dsp_proc_init() 851 entry->private_data = chip; cs46xx_dsp_proc_init() 863 entry->private_data = chip; cs46xx_dsp_proc_init() 875 entry->private_data = chip; cs46xx_dsp_proc_init() 885 mutex_lock(&chip->spos_mutex); cs46xx_dsp_proc_init() 890 cs46xx_dsp_proc_register_scb_desc (chip, (ins->scbs + i)); cs46xx_dsp_proc_init() 892 mutex_unlock(&chip->spos_mutex); cs46xx_dsp_proc_init() 897 int cs46xx_dsp_proc_done (struct snd_cs46xx *chip) cs46xx_dsp_proc_done() argument 899 struct dsp_spos_instance * ins = chip->dsp_spos_instance; cs46xx_dsp_proc_done() 920 mutex_lock(&chip->spos_mutex); cs46xx_dsp_proc_done() 925 mutex_unlock(&chip->spos_mutex); cs46xx_dsp_proc_done() 934 static void _dsp_create_task_tree (struct snd_cs46xx *chip, u32 * task_data, _dsp_create_task_tree() argument 937 void __iomem *spdst = chip->region.idx[1].remap_addr + _dsp_create_task_tree() 942 dev_dbg(chip->card->dev, "addr %p, val %08x\n", _dsp_create_task_tree() 949 static void _dsp_create_scb (struct snd_cs46xx *chip, u32 * scb_data, u32 dest) _dsp_create_scb() argument 951 void __iomem *spdst = chip->region.idx[1].remap_addr + _dsp_create_scb() 956 dev_dbg(chip->card->dev, "addr %p, val %08x\n", _dsp_create_scb() 977 static struct dsp_scb_descriptor * _map_scb (struct snd_cs46xx *chip, char * name, u32 dest) _map_scb() argument 979 struct dsp_spos_instance * ins = chip->dsp_spos_instance; _map_scb() 984 dev_err(chip->card->dev, _map_scb() 998 ins->scbs[index].scb_symbol = add_symbol (chip, name, dest, SYMBOL_PARAMETER); _map_scb() 1010 _map_task_tree (struct snd_cs46xx *chip, char * name, u32 dest, u32 size) _map_task_tree() argument 1012 struct dsp_spos_instance * ins = chip->dsp_spos_instance; _map_task_tree() 1016 dev_err(chip->card->dev, _map_task_tree() 1034 add_symbol (chip,name,dest,SYMBOL_PARAMETER); _map_task_tree() 1041 cs46xx_dsp_create_scb (struct snd_cs46xx *chip, char * name, u32 * scb_data, u32 dest) cs46xx_dsp_create_scb() argument 1052 desc = _map_scb (chip,name,dest); cs46xx_dsp_create_scb() 1055 _dsp_create_scb(chip,scb_data,dest); cs46xx_dsp_create_scb() 1057 dev_err(chip->card->dev, "dsp_spos: failed to map SCB\n"); cs46xx_dsp_create_scb() 1068 cs46xx_dsp_create_task_tree (struct snd_cs46xx *chip, char * name, u32 * task_data, cs46xx_dsp_create_task_tree() argument 1073 desc = _map_task_tree (chip,name,dest,size); cs46xx_dsp_create_task_tree() 1076 _dsp_create_task_tree(chip,task_data,dest,size); cs46xx_dsp_create_task_tree() 1078 dev_err(chip->card->dev, "dsp_spos: failed to map TASK\n"); cs46xx_dsp_create_task_tree() 1084 int cs46xx_dsp_scb_and_task_init (struct snd_cs46xx *chip) cs46xx_dsp_scb_and_task_init() argument 1086 struct dsp_spos_instance * ins = chip->dsp_spos_instance; cs46xx_dsp_scb_and_task_init() 1127 cs46xx_dsp_create_task_tree(chip, "sposCB", (u32 *)&sposcb, SPOSCB_ADDR, 0x10); cs46xx_dsp_scb_and_task_init() 1129 null_algorithm = cs46xx_dsp_lookup_symbol(chip, "NULLALGORITHM", SYMBOL_CODE); cs46xx_dsp_scb_and_task_init() 1131 dev_err(chip->card->dev, cs46xx_dsp_scb_and_task_init() 1136 fg_task_tree_header_code = cs46xx_dsp_lookup_symbol(chip, "FGTASKTREEHEADERCODE", SYMBOL_CODE); cs46xx_dsp_scb_and_task_init() 1138 dev_err(chip->card->dev, cs46xx_dsp_scb_and_task_init() 1143 task_tree_header_code = cs46xx_dsp_lookup_symbol(chip, "TASKTREEHEADERCODE", SYMBOL_CODE); cs46xx_dsp_scb_and_task_init() 1145 dev_err(chip->card->dev, cs46xx_dsp_scb_and_task_init() 1150 task_tree_thread = cs46xx_dsp_lookup_symbol(chip, "TASKTREETHREAD", SYMBOL_CODE); cs46xx_dsp_scb_and_task_init() 1152 dev_err(chip->card->dev, cs46xx_dsp_scb_and_task_init() 1157 magic_snoop_task = cs46xx_dsp_lookup_symbol(chip, "MAGICSNOOPTASK", SYMBOL_CODE); cs46xx_dsp_scb_and_task_init() 1159 dev_err(chip->card->dev, cs46xx_dsp_scb_and_task_init() 1178 ins->the_null_scb = cs46xx_dsp_create_scb(chip, "nullSCB", (u32 *)&null_scb, NULL_SCB_ADDR); cs46xx_dsp_scb_and_task_init() 1183 cs46xx_dsp_proc_register_scb_desc (chip,ins->the_null_scb); cs46xx_dsp_scb_and_task_init() 1258 cs46xx_dsp_create_task_tree(chip,"FGtaskTreeHdr",(u32 *)&fg_task_tree_hdr,FG_TASK_HEADER_ADDR,0x35); cs46xx_dsp_scb_and_task_init() 1334 cs46xx_dsp_create_task_tree(chip,"BGtaskTreeHdr",(u32 *)&bg_task_tree_hdr,BG_TREE_SCB_ADDR,0x35); cs46xx_dsp_scb_and_task_init() 1338 timing_master_scb = cs46xx_dsp_create_timing_master_scb(chip); cs46xx_dsp_scb_and_task_init() 1341 codec_out_scb = cs46xx_dsp_create_codec_out_scb(chip,"CodecOutSCB_I",0x0010,0x0000, cs46xx_dsp_scb_and_task_init() 1348 master_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"MasterMixSCB", cs46xx_dsp_scb_and_task_init() 1357 codec_in_scb = cs46xx_dsp_create_codec_in_scb(chip,"CodecInSCB",0x0010,0x00A0, cs46xx_dsp_scb_and_task_init() 1365 write_back_scb = cs46xx_dsp_create_mix_to_ostream_scb(chip,"WriteBackSCB", cs46xx_dsp_scb_and_task_init() 1378 if (!cs46xx_dsp_create_task_tree(chip, NULL, cs46xx_dsp_scb_and_task_init() 1385 vari_decimate_scb = cs46xx_dsp_create_vari_decimate_scb(chip,"VariDecimateSCB", cs46xx_dsp_scb_and_task_init() 1394 record_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"RecordMixerSCB", cs46xx_dsp_scb_and_task_init() 1403 valid_slots = snd_cs46xx_peekBA0(chip, BA0_ACOSV); cs46xx_dsp_scb_and_task_init() 1405 if (snd_BUG_ON(chip->nr_ac97_codecs != 1 && chip->nr_ac97_codecs != 2)) cs46xx_dsp_scb_and_task_init() 1408 if (chip->nr_ac97_codecs == 1) { cs46xx_dsp_scb_and_task_init() 1426 rear_codec_out_scb = cs46xx_dsp_create_codec_out_scb(chip,"CodecOutSCB_Rear",fifo_span,fifo_addr, cs46xx_dsp_scb_and_task_init() 1434 rear_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"RearMixerSCB", cs46xx_dsp_scb_and_task_init() 1442 if (chip->nr_ac97_codecs == 2) { cs46xx_dsp_scb_and_task_init() 1445 clfe_codec_out_scb = cs46xx_dsp_create_codec_out_scb(chip,"CodecOutSCB_CLFE",0x0030,0x0030, cs46xx_dsp_scb_and_task_init() 1454 ins->center_lfe_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"CLFEMixerSCB", cs46xx_dsp_scb_and_task_init() 1469 snd_cs46xx_pokeBA0(chip, BA0_ACOSV, valid_slots); cs46xx_dsp_scb_and_task_init() 1472 magic_snoop_scb = cs46xx_dsp_create_magic_snoop_scb (chip,"MagicSnoopSCB_I",OUTPUTSNOOP_SCB_ADDR, cs46xx_dsp_scb_and_task_init() 1483 if (!cs46xx_dsp_create_spio_write_scb(chip,"SPIOWriteSCB",SPIOWRITE_SCB_ADDR, cs46xx_dsp_scb_and_task_init() 1489 src_task_scb = cs46xx_dsp_create_src_task_scb(chip,"SrcTaskSCB_SPDIFI", cs46xx_dsp_scb_and_task_init() 1497 cs46xx_src_unlink(chip,src_task_scb); cs46xx_dsp_scb_and_task_init() 1503 cs46xx_dsp_async_init(chip,timing_master_scb); cs46xx_dsp_scb_and_task_init() 1507 dev_err(chip->card->dev, "dsp_spos: failed to setup SCB's in DSP\n"); cs46xx_dsp_scb_and_task_init() 1511 static int cs46xx_dsp_async_init (struct snd_cs46xx *chip, cs46xx_dsp_async_init() argument 1514 struct dsp_spos_instance * ins = chip->dsp_spos_instance; cs46xx_dsp_async_init() 1520 s16_async_codec_input_task = cs46xx_dsp_lookup_symbol(chip, "S16_ASYNCCODECINPUTTASK", SYMBOL_CODE); cs46xx_dsp_async_init() 1522 dev_err(chip->card->dev, cs46xx_dsp_async_init() 1526 spdifo_task = cs46xx_dsp_lookup_symbol(chip, "SPDIFOTASK", SYMBOL_CODE); cs46xx_dsp_async_init() 1528 dev_err(chip->card->dev, cs46xx_dsp_async_init() 1533 spdifi_task = cs46xx_dsp_lookup_symbol(chip, "SPDIFITASK", SYMBOL_CODE); cs46xx_dsp_async_init() 1535 dev_err(chip->card->dev, cs46xx_dsp_async_init() 1647 spdifo_scb_desc = cs46xx_dsp_create_scb(chip,"SPDIFOSCB",(u32 *)&spdifo_scb,SPDIFO_SCB_INST); cs46xx_dsp_async_init() 1651 spdifi_scb_desc = cs46xx_dsp_create_scb(chip,"SPDIFISCB",(u32 *)&spdifi_scb,SPDIFI_SCB_INST); cs46xx_dsp_async_init() 1654 async_codec_scb_desc = cs46xx_dsp_create_scb(chip,"AsynCodecInputSCB",(u32 *)&async_codec_input_scb, HFG_TREE_SCB); cs46xx_dsp_async_init() 1678 cs46xx_dsp_proc_register_scb_desc (chip,spdifo_scb_desc); cs46xx_dsp_async_init() 1679 cs46xx_dsp_proc_register_scb_desc (chip,spdifi_scb_desc); cs46xx_dsp_async_init() 1680 cs46xx_dsp_proc_register_scb_desc (chip,async_codec_scb_desc); cs46xx_dsp_async_init() 1683 snd_cs46xx_pokeBA0(chip, BA0_ASER_MASTER, 0x1 ); cs46xx_dsp_async_init() 1689 static void cs46xx_dsp_disable_spdif_hw (struct snd_cs46xx *chip) cs46xx_dsp_disable_spdif_hw() argument 1691 struct dsp_spos_instance * ins = chip->dsp_spos_instance; cs46xx_dsp_disable_spdif_hw() 1694 snd_cs46xx_pokeBA0(chip, BA0_ASER_FADDR, 0); cs46xx_dsp_disable_spdif_hw() 1697 cs46xx_poke_via_dsp (chip,SP_SPDOUT_CONTROL, 0); cs46xx_dsp_disable_spdif_hw() 1700 /*cs46xx_poke_via_dsp (chip,SP_SPDOUT_CSUV, ins->spdif_csuv_default);*/ cs46xx_dsp_disable_spdif_hw() 1701 cs46xx_poke_via_dsp (chip,SP_SPDOUT_CSUV, 0x0); cs46xx_dsp_disable_spdif_hw() 1704 cs46xx_poke_via_dsp (chip,SP_SPDIN_FIFOPTR, 0x0); cs46xx_dsp_disable_spdif_hw() 1710 int cs46xx_dsp_enable_spdif_hw (struct snd_cs46xx *chip) cs46xx_dsp_enable_spdif_hw() argument 1712 struct dsp_spos_instance * ins = chip->dsp_spos_instance; cs46xx_dsp_enable_spdif_hw() 1715 cs46xx_dsp_disable_spdif_hw (chip); cs46xx_dsp_enable_spdif_hw() 1719 snd_cs46xx_pokeBA0(chip, BA0_ASER_FADDR, ( 0x8000 | ((SP_SPDOUT_FIFO >> 4) << 4) )); cs46xx_dsp_enable_spdif_hw() 1722 cs46xx_poke_via_dsp (chip,SP_SPDOUT_CONTROL, 0x80000000); cs46xx_dsp_enable_spdif_hw() 1725 cs46xx_poke_via_dsp (chip,SP_SPDOUT_CSUV, ins->spdif_csuv_default); cs46xx_dsp_enable_spdif_hw() 1733 int cs46xx_dsp_enable_spdif_in (struct snd_cs46xx *chip) cs46xx_dsp_enable_spdif_in() argument 1735 struct dsp_spos_instance * ins = chip->dsp_spos_instance; cs46xx_dsp_enable_spdif_in() 1738 chip->active_ctrl(chip, 1); cs46xx_dsp_enable_spdif_in() 1739 chip->amplifier_ctrl(chip, 1); cs46xx_dsp_enable_spdif_in() 1746 mutex_lock(&chip->spos_mutex); cs46xx_dsp_enable_spdif_in() 1750 cs46xx_poke_via_dsp (chip,SP_ASER_COUNTDOWN, 0x80000005); cs46xx_dsp_enable_spdif_in() 1756 cs46xx_poke_via_dsp (chip,SP_SPDIN_CONTROL, 0x800003ff); cs46xx_dsp_enable_spdif_in() 1762 ins->asynch_rx_scb = cs46xx_dsp_create_asynch_fg_rx_scb(chip,"AsynchFGRxSCB", cs46xx_dsp_enable_spdif_in() 1769 spin_lock_irq(&chip->reg_lock); cs46xx_dsp_enable_spdif_in() 1772 /*snd_cs46xx_poke (chip, (SPDIFI_SCB_INST + 0x0c) << 2, cs46xx_dsp_enable_spdif_in() 1776 /*cs46xx_poke_via_dsp (chip,SP_SPDIN_FIFOPTR, 0x0);*/ cs46xx_dsp_enable_spdif_in() 1777 cs46xx_src_link(chip,ins->spdif_in_src); cs46xx_dsp_enable_spdif_in() 1780 cs46xx_dsp_scb_set_volume (chip,ins->spdif_in_src,0x7fff,0x7fff); cs46xx_dsp_enable_spdif_in() 1782 spin_unlock_irq(&chip->reg_lock); cs46xx_dsp_enable_spdif_in() 1786 /* cs46xx_dsp_set_src_sample_rate(chip,ins->spdif_in_src,48000); */ cs46xx_dsp_enable_spdif_in() 1790 mutex_unlock(&chip->spos_mutex); cs46xx_dsp_enable_spdif_in() 1795 int cs46xx_dsp_disable_spdif_in (struct snd_cs46xx *chip) cs46xx_dsp_disable_spdif_in() argument 1797 struct dsp_spos_instance * ins = chip->dsp_spos_instance; cs46xx_dsp_disable_spdif_in() 1804 mutex_lock(&chip->spos_mutex); cs46xx_dsp_disable_spdif_in() 1807 cs46xx_dsp_remove_scb (chip,ins->asynch_rx_scb); cs46xx_dsp_disable_spdif_in() 1810 cs46xx_src_unlink(chip,ins->spdif_in_src); cs46xx_dsp_disable_spdif_in() 1814 mutex_unlock(&chip->spos_mutex); cs46xx_dsp_disable_spdif_in() 1817 chip->active_ctrl(chip, -1); cs46xx_dsp_disable_spdif_in() 1818 chip->amplifier_ctrl(chip, -1); cs46xx_dsp_disable_spdif_in() 1823 int cs46xx_dsp_enable_pcm_capture (struct snd_cs46xx *chip) cs46xx_dsp_enable_pcm_capture() argument 1825 struct dsp_spos_instance * ins = chip->dsp_spos_instance; cs46xx_dsp_enable_pcm_capture() 1832 mutex_lock(&chip->spos_mutex); cs46xx_dsp_enable_pcm_capture() 1833 ins->pcm_input = cs46xx_add_record_source(chip,ins->ref_snoop_scb,PCMSERIALIN_PCM_SCB_ADDR, cs46xx_dsp_enable_pcm_capture() 1835 mutex_unlock(&chip->spos_mutex); cs46xx_dsp_enable_pcm_capture() 1840 int cs46xx_dsp_disable_pcm_capture (struct snd_cs46xx *chip) cs46xx_dsp_disable_pcm_capture() argument 1842 struct dsp_spos_instance * ins = chip->dsp_spos_instance; cs46xx_dsp_disable_pcm_capture() 1847 mutex_lock(&chip->spos_mutex); cs46xx_dsp_disable_pcm_capture() 1848 cs46xx_dsp_remove_scb (chip,ins->pcm_input); cs46xx_dsp_disable_pcm_capture() 1850 mutex_unlock(&chip->spos_mutex); cs46xx_dsp_disable_pcm_capture() 1855 int cs46xx_dsp_enable_adc_capture (struct snd_cs46xx *chip) cs46xx_dsp_enable_adc_capture() argument 1857 struct dsp_spos_instance * ins = chip->dsp_spos_instance; cs46xx_dsp_enable_adc_capture() 1864 mutex_lock(&chip->spos_mutex); cs46xx_dsp_enable_adc_capture() 1865 ins->adc_input = cs46xx_add_record_source(chip,ins->codec_in_scb,PCMSERIALIN_SCB_ADDR, cs46xx_dsp_enable_adc_capture() 1867 mutex_unlock(&chip->spos_mutex); cs46xx_dsp_enable_adc_capture() 1872 int cs46xx_dsp_disable_adc_capture (struct snd_cs46xx *chip) cs46xx_dsp_disable_adc_capture() argument 1874 struct dsp_spos_instance * ins = chip->dsp_spos_instance; cs46xx_dsp_disable_adc_capture() 1879 mutex_lock(&chip->spos_mutex); cs46xx_dsp_disable_adc_capture() 1880 cs46xx_dsp_remove_scb (chip,ins->adc_input); cs46xx_dsp_disable_adc_capture() 1882 mutex_unlock(&chip->spos_mutex); cs46xx_dsp_disable_adc_capture() 1887 int cs46xx_poke_via_dsp (struct snd_cs46xx *chip, u32 address, u32 data) cs46xx_poke_via_dsp() argument 1900 snd_cs46xx_poke(chip,( SPIOWRITE_SCB_ADDR << 2), temp); cs46xx_poke_via_dsp() 1901 snd_cs46xx_poke(chip,((SPIOWRITE_SCB_ADDR + 1) << 2), data); /* offset 1 <-- data1 */ cs46xx_poke_via_dsp() 1902 snd_cs46xx_poke(chip,((SPIOWRITE_SCB_ADDR + 2) << 2), data); /* offset 1 <-- data2 */ cs46xx_poke_via_dsp() 1905 snd_cs46xx_poke(chip,((SPIOWRITE_SCB_ADDR + 6) << 2), SPIOWRITE_SCB_ADDR << 0x10); cs46xx_poke_via_dsp() 1911 temp = snd_cs46xx_peek(chip,((SPIOWRITE_SCB_ADDR + 6) << 2)); cs46xx_poke_via_dsp() 1917 dev_err(chip->card->dev, cs46xx_poke_via_dsp() 1925 int cs46xx_dsp_set_dac_volume (struct snd_cs46xx * chip, u16 left, u16 right) cs46xx_dsp_set_dac_volume() argument 1927 struct dsp_spos_instance * ins = chip->dsp_spos_instance; cs46xx_dsp_set_dac_volume() 1930 mutex_lock(&chip->spos_mutex); cs46xx_dsp_set_dac_volume() 1935 cs46xx_dsp_scb_set_volume (chip,scb,left,right); cs46xx_dsp_set_dac_volume() 1942 cs46xx_dsp_scb_set_volume (chip,scb,left,right); cs46xx_dsp_set_dac_volume() 1949 mutex_unlock(&chip->spos_mutex); cs46xx_dsp_set_dac_volume() 1954 int cs46xx_dsp_set_iec958_volume (struct snd_cs46xx * chip, u16 left, u16 right) cs46xx_dsp_set_iec958_volume() argument 1956 struct dsp_spos_instance * ins = chip->dsp_spos_instance; cs46xx_dsp_set_iec958_volume() 1958 mutex_lock(&chip->spos_mutex); cs46xx_dsp_set_iec958_volume() 1961 cs46xx_dsp_scb_set_volume (chip,ins->asynch_rx_scb, cs46xx_dsp_set_iec958_volume() 1967 mutex_unlock(&chip->spos_mutex); cs46xx_dsp_set_iec958_volume() 1973 int cs46xx_dsp_resume(struct snd_cs46xx * chip) cs46xx_dsp_resume() argument 1975 struct dsp_spos_instance * ins = chip->dsp_spos_instance; cs46xx_dsp_resume() 1979 snd_cs46xx_clear_BA1(chip, DSP_PARAMETER_BYTE_OFFSET, cs46xx_dsp_resume() 1981 snd_cs46xx_clear_BA1(chip, DSP_SAMPLE_BYTE_OFFSET, cs46xx_dsp_resume() 1983 snd_cs46xx_clear_BA1(chip, DSP_CODE_BYTE_OFFSET, DSP_CODE_BYTE_SIZE); cs46xx_dsp_resume() 1991 err = dsp_load_parameter(chip, seg); cs46xx_dsp_resume() 1996 err = dsp_load_sample(chip, seg); cs46xx_dsp_resume() 2007 err = snd_cs46xx_download(chip, cs46xx_dsp_resume() 2016 _dsp_create_task_tree(chip, t->data, t->address, t->size); cs46xx_dsp_resume() 2023 _dsp_create_scb(chip, s->data, s->address); cs46xx_dsp_resume() 2030 cs46xx_dsp_spos_update_scb(chip, s); cs46xx_dsp_resume() 2032 cs46xx_dsp_scb_set_volume(chip, s, cs46xx_dsp_resume() 2036 cs46xx_dsp_enable_spdif_hw(chip); cs46xx_dsp_resume() 2037 snd_cs46xx_poke(chip, (ins->ref_snoop_scb->address + 2) << 2, cs46xx_dsp_resume() 2040 cs46xx_poke_via_dsp(chip, SP_SPDOUT_CSUV, cs46xx_dsp_resume() 2043 if (chip->dsp_spos_instance->spdif_status_in) { cs46xx_dsp_resume() 2044 cs46xx_poke_via_dsp(chip, SP_ASER_COUNTDOWN, 0x80000005); cs46xx_dsp_resume() 2045 cs46xx_poke_via_dsp(chip, SP_SPDIN_CONTROL, 0x800003ff); cs46xx_dsp_resume()
/linux-4.1.27/sound/pci/
H A D	fm801.c	76 #define fm801_writew(chip,reg,value) outw((value), chip->port + FM801_##reg) 77 #define fm801_readw(chip,reg) inw(chip->port + FM801_##reg) 79 #define fm801_writel(chip,reg,value) outl((value), chip->port + FM801_##reg) 156 * struct fm801 - describes FM801 chip 227 static bool fm801_ac97_is_ready(struct fm801 *chip, unsigned int iterations) fm801_ac97_is_ready() argument 232 if (!(fm801_readw(chip, AC97_CMD) & FM801_AC97_BUSY)) fm801_ac97_is_ready() 239 static bool fm801_ac97_is_valid(struct fm801 *chip, unsigned int iterations) fm801_ac97_is_valid() argument 244 if (fm801_readw(chip, AC97_CMD) & FM801_AC97_VALID) fm801_ac97_is_valid() 251 static int snd_fm801_update_bits(struct fm801 *chip, unsigned short reg, snd_fm801_update_bits() argument 258 spin_lock_irqsave(&chip->reg_lock, flags); snd_fm801_update_bits() 259 old = inw(chip->port + reg); snd_fm801_update_bits() 263 outw(new, chip->port + reg); snd_fm801_update_bits() 264 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_fm801_update_bits() 272 struct fm801 *chip = ac97->private_data; snd_fm801_codec_write() local 277 if (!fm801_ac97_is_ready(chip, 100)) { snd_fm801_codec_write() 278 dev_err(chip->card->dev, "AC'97 interface is busy (1)\n"); snd_fm801_codec_write() 283 fm801_writew(chip, AC97_DATA, val); snd_fm801_codec_write() 284 fm801_writew(chip, AC97_CMD, reg | (ac97->addr << FM801_AC97_ADDR_SHIFT)); snd_fm801_codec_write() 288 if (!fm801_ac97_is_ready(chip, 1000)) snd_fm801_codec_write() 289 dev_err(chip->card->dev, "AC'97 interface #%d is busy (2)\n", snd_fm801_codec_write() 295 struct fm801 *chip = ac97->private_data; snd_fm801_codec_read() local 300 if (!fm801_ac97_is_ready(chip, 100)) { snd_fm801_codec_read() 301 dev_err(chip->card->dev, "AC'97 interface is busy (1)\n"); snd_fm801_codec_read() 306 fm801_writew(chip, AC97_CMD, snd_fm801_codec_read() 308 if (!fm801_ac97_is_ready(chip, 100)) { snd_fm801_codec_read() 309 dev_err(chip->card->dev, "AC'97 interface #%d is busy (2)\n", snd_fm801_codec_read() 314 if (!fm801_ac97_is_valid(chip, 1000)) { snd_fm801_codec_read() 315 dev_err(chip->card->dev, snd_fm801_codec_read() 320 return fm801_readw(chip, AC97_DATA); snd_fm801_codec_read() 367 struct fm801 *chip = snd_pcm_substream_chip(substream); snd_fm801_playback_trigger() local 369 spin_lock(&chip->reg_lock); snd_fm801_playback_trigger() 372 chip->ply_ctrl &= ~(FM801_BUF1_LAST | snd_fm801_playback_trigger() 375 chip->ply_ctrl |= FM801_START | snd_fm801_playback_trigger() 379 chip->ply_ctrl &= ~(FM801_START | FM801_PAUSE); snd_fm801_playback_trigger() 383 chip->ply_ctrl |= FM801_PAUSE; snd_fm801_playback_trigger() 387 chip->ply_ctrl &= ~FM801_PAUSE; snd_fm801_playback_trigger() 390 spin_unlock(&chip->reg_lock); snd_fm801_playback_trigger() 394 fm801_writew(chip, PLY_CTRL, chip->ply_ctrl); snd_fm801_playback_trigger() 395 spin_unlock(&chip->reg_lock); snd_fm801_playback_trigger() 402 struct fm801 *chip = snd_pcm_substream_chip(substream); snd_fm801_capture_trigger() local 404 spin_lock(&chip->reg_lock); snd_fm801_capture_trigger() 407 chip->cap_ctrl &= ~(FM801_BUF1_LAST | snd_fm801_capture_trigger() 410 chip->cap_ctrl |= FM801_START | snd_fm801_capture_trigger() 414 chip->cap_ctrl &= ~(FM801_START | FM801_PAUSE); snd_fm801_capture_trigger() 418 chip->cap_ctrl |= FM801_PAUSE; snd_fm801_capture_trigger() 422 chip->cap_ctrl &= ~FM801_PAUSE; snd_fm801_capture_trigger() 425 spin_unlock(&chip->reg_lock); snd_fm801_capture_trigger() 429 fm801_writew(chip, CAP_CTRL, chip->cap_ctrl); snd_fm801_capture_trigger() 430 spin_unlock(&chip->reg_lock); snd_fm801_capture_trigger() 447 struct fm801 *chip = snd_pcm_substream_chip(substream); snd_fm801_playback_prepare() local 450 chip->ply_size = snd_pcm_lib_buffer_bytes(substream); snd_fm801_playback_prepare() 451 chip->ply_count = snd_pcm_lib_period_bytes(substream); snd_fm801_playback_prepare() 452 spin_lock_irq(&chip->reg_lock); snd_fm801_playback_prepare() 453 chip->ply_ctrl &= ~(FM801_START | FM801_16BIT | snd_fm801_playback_prepare() 457 chip->ply_ctrl |= FM801_16BIT; snd_fm801_playback_prepare() 459 chip->ply_ctrl |= FM801_STEREO; snd_fm801_playback_prepare() 461 chip->ply_ctrl |= FM801_CHANNELS_4; snd_fm801_playback_prepare() 463 chip->ply_ctrl |= FM801_CHANNELS_6; snd_fm801_playback_prepare() 465 chip->ply_ctrl |= snd_fm801_rate_bits(runtime->rate) << FM801_RATE_SHIFT; snd_fm801_playback_prepare() 466 chip->ply_buf = 0; snd_fm801_playback_prepare() 467 fm801_writew(chip, PLY_CTRL, chip->ply_ctrl); snd_fm801_playback_prepare() 468 fm801_writew(chip, PLY_COUNT, chip->ply_count - 1); snd_fm801_playback_prepare() 469 chip->ply_buffer = runtime->dma_addr; snd_fm801_playback_prepare() 470 chip->ply_pos = 0; snd_fm801_playback_prepare() 471 fm801_writel(chip, PLY_BUF1, chip->ply_buffer); snd_fm801_playback_prepare() 472 fm801_writel(chip, PLY_BUF2, snd_fm801_playback_prepare() 473 chip->ply_buffer + (chip->ply_count % chip->ply_size)); snd_fm801_playback_prepare() 474 spin_unlock_irq(&chip->reg_lock); snd_fm801_playback_prepare() 480 struct fm801 *chip = snd_pcm_substream_chip(substream); snd_fm801_capture_prepare() local 483 chip->cap_size = snd_pcm_lib_buffer_bytes(substream); snd_fm801_capture_prepare() 484 chip->cap_count = snd_pcm_lib_period_bytes(substream); snd_fm801_capture_prepare() 485 spin_lock_irq(&chip->reg_lock); snd_fm801_capture_prepare() 486 chip->cap_ctrl &= ~(FM801_START | FM801_16BIT | snd_fm801_capture_prepare() 489 chip->cap_ctrl |= FM801_16BIT; snd_fm801_capture_prepare() 491 chip->cap_ctrl |= FM801_STEREO; snd_fm801_capture_prepare() 492 chip->cap_ctrl |= snd_fm801_rate_bits(runtime->rate) << FM801_RATE_SHIFT; snd_fm801_capture_prepare() 493 chip->cap_buf = 0; snd_fm801_capture_prepare() 494 fm801_writew(chip, CAP_CTRL, chip->cap_ctrl); snd_fm801_capture_prepare() 495 fm801_writew(chip, CAP_COUNT, chip->cap_count - 1); snd_fm801_capture_prepare() 496 chip->cap_buffer = runtime->dma_addr; snd_fm801_capture_prepare() 497 chip->cap_pos = 0; snd_fm801_capture_prepare() 498 fm801_writel(chip, CAP_BUF1, chip->cap_buffer); snd_fm801_capture_prepare() 499 fm801_writel(chip, CAP_BUF2, snd_fm801_capture_prepare() 500 chip->cap_buffer + (chip->cap_count % chip->cap_size)); snd_fm801_capture_prepare() 501 spin_unlock_irq(&chip->reg_lock); snd_fm801_capture_prepare() 507 struct fm801 *chip = snd_pcm_substream_chip(substream); snd_fm801_playback_pointer() local 510 if (!(chip->ply_ctrl & FM801_START)) snd_fm801_playback_pointer() 512 spin_lock(&chip->reg_lock); snd_fm801_playback_pointer() 513 ptr = chip->ply_pos + (chip->ply_count - 1) - fm801_readw(chip, PLY_COUNT); snd_fm801_playback_pointer() 514 if (fm801_readw(chip, IRQ_STATUS) & FM801_IRQ_PLAYBACK) { snd_fm801_playback_pointer() 515 ptr += chip->ply_count; snd_fm801_playback_pointer() 516 ptr %= chip->ply_size; snd_fm801_playback_pointer() 518 spin_unlock(&chip->reg_lock); snd_fm801_playback_pointer() 524 struct fm801 *chip = snd_pcm_substream_chip(substream); snd_fm801_capture_pointer() local 527 if (!(chip->cap_ctrl & FM801_START)) snd_fm801_capture_pointer() 529 spin_lock(&chip->reg_lock); snd_fm801_capture_pointer() 530 ptr = chip->cap_pos + (chip->cap_count - 1) - fm801_readw(chip, CAP_COUNT); snd_fm801_capture_pointer() 531 if (fm801_readw(chip, IRQ_STATUS) & FM801_IRQ_CAPTURE) { snd_fm801_capture_pointer() 532 ptr += chip->cap_count; snd_fm801_capture_pointer() 533 ptr %= chip->cap_size; snd_fm801_capture_pointer() 535 spin_unlock(&chip->reg_lock); snd_fm801_capture_pointer() 541 struct fm801 *chip = dev_id; snd_fm801_interrupt() local 545 status = fm801_readw(chip, IRQ_STATUS); snd_fm801_interrupt() 550 fm801_writew(chip, IRQ_STATUS, status); snd_fm801_interrupt() 551 if (chip->pcm && (status & FM801_IRQ_PLAYBACK) && chip->playback_substream) { snd_fm801_interrupt() 552 spin_lock(&chip->reg_lock); snd_fm801_interrupt() 553 chip->ply_buf++; snd_fm801_interrupt() 554 chip->ply_pos += chip->ply_count; snd_fm801_interrupt() 555 chip->ply_pos %= chip->ply_size; snd_fm801_interrupt() 556 tmp = chip->ply_pos + chip->ply_count; snd_fm801_interrupt() 557 tmp %= chip->ply_size; snd_fm801_interrupt() 558 if (chip->ply_buf & 1) snd_fm801_interrupt() 559 fm801_writel(chip, PLY_BUF1, chip->ply_buffer + tmp); snd_fm801_interrupt() 561 fm801_writel(chip, PLY_BUF2, chip->ply_buffer + tmp); snd_fm801_interrupt() 562 spin_unlock(&chip->reg_lock); snd_fm801_interrupt() 563 snd_pcm_period_elapsed(chip->playback_substream); snd_fm801_interrupt() 565 if (chip->pcm && (status & FM801_IRQ_CAPTURE) && chip->capture_substream) { snd_fm801_interrupt() 566 spin_lock(&chip->reg_lock); snd_fm801_interrupt() 567 chip->cap_buf++; snd_fm801_interrupt() 568 chip->cap_pos += chip->cap_count; snd_fm801_interrupt() 569 chip->cap_pos %= chip->cap_size; snd_fm801_interrupt() 570 tmp = chip->cap_pos + chip->cap_count; snd_fm801_interrupt() 571 tmp %= chip->cap_size; snd_fm801_interrupt() 572 if (chip->cap_buf & 1) snd_fm801_interrupt() 573 fm801_writel(chip, CAP_BUF1, chip->cap_buffer + tmp); snd_fm801_interrupt() 575 fm801_writel(chip, CAP_BUF2, chip->cap_buffer + tmp); snd_fm801_interrupt() 576 spin_unlock(&chip->reg_lock); snd_fm801_interrupt() 577 snd_pcm_period_elapsed(chip->capture_substream); snd_fm801_interrupt() 579 if (chip->rmidi && (status & FM801_IRQ_MPU)) snd_fm801_interrupt() 580 snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data); snd_fm801_interrupt() 629 struct fm801 *chip = snd_pcm_substream_chip(substream); snd_fm801_playback_open() local 633 chip->playback_substream = substream; snd_fm801_playback_open() 637 if (chip->multichannel) { snd_fm801_playback_open() 650 struct fm801 *chip = snd_pcm_substream_chip(substream); snd_fm801_capture_open() local 654 chip->capture_substream = substream; snd_fm801_capture_open() 665 struct fm801 *chip = snd_pcm_substream_chip(substream); snd_fm801_playback_close() local 667 chip->playback_substream = NULL; snd_fm801_playback_close() 673 struct fm801 *chip = snd_pcm_substream_chip(substream); snd_fm801_capture_close() local 675 chip->capture_substream = NULL; snd_fm801_capture_close() 701 static int snd_fm801_pcm(struct fm801 *chip, int device) snd_fm801_pcm() argument 706 if ((err = snd_pcm_new(chip->card, "FM801", device, 1, 1, &pcm)) < 0) snd_fm801_pcm() 712 pcm->private_data = chip; snd_fm801_pcm() 715 chip->pcm = pcm; snd_fm801_pcm() 718 snd_dma_pci_data(chip->pci), snd_fm801_pcm() 719 chip->multichannel ? 128*1024 : 64*1024, 128*1024); snd_fm801_pcm() 723 chip->multichannel ? 6 : 2, 0, snd_fm801_pcm() 745 #define get_tea575x_gpio(chip) \ 746 (&snd_fm801_tea575x_gpios[((chip)->tea575x_tuner & TUNER_TYPE_MASK) - 1]) 750 struct fm801 *chip = tea->private_data; snd_fm801_tea575x_set_pins() local 751 unsigned short reg = fm801_readw(chip, GPIO_CTRL); snd_fm801_tea575x_set_pins() 752 struct snd_fm801_tea575x_gpio gpio = *get_tea575x_gpio(chip); snd_fm801_tea575x_set_pins() 763 fm801_writew(chip, GPIO_CTRL, reg); snd_fm801_tea575x_set_pins() 768 struct fm801 *chip = tea->private_data; snd_fm801_tea575x_get_pins() local 769 unsigned short reg = fm801_readw(chip, GPIO_CTRL); snd_fm801_tea575x_get_pins() 770 struct snd_fm801_tea575x_gpio gpio = *get_tea575x_gpio(chip); snd_fm801_tea575x_get_pins() 783 struct fm801 *chip = tea->private_data; snd_fm801_tea575x_set_direction() local 784 unsigned short reg = fm801_readw(chip, GPIO_CTRL); snd_fm801_tea575x_set_direction() 785 struct snd_fm801_tea575x_gpio gpio = *get_tea575x_gpio(chip); snd_fm801_tea575x_set_direction() 815 fm801_writew(chip, GPIO_CTRL, reg); snd_fm801_tea575x_set_direction() 849 struct fm801 *chip = snd_kcontrol_chip(kcontrol); snd_fm801_get_single() local 855 ucontrol->value.integer.value[0] = (inw(chip->port + reg) >> shift) & mask; snd_fm801_get_single() 864 struct fm801 *chip = snd_kcontrol_chip(kcontrol); snd_fm801_put_single() local 874 return snd_fm801_update_bits(chip, reg, mask << shift, val << shift); snd_fm801_put_single() 904 struct fm801 *chip = snd_kcontrol_chip(kcontrol); snd_fm801_get_double() local 911 spin_lock_irq(&chip->reg_lock); snd_fm801_get_double() 912 ucontrol->value.integer.value[0] = (inw(chip->port + reg) >> shift_left) & mask; snd_fm801_get_double() 913 ucontrol->value.integer.value[1] = (inw(chip->port + reg) >> shift_right) & mask; snd_fm801_get_double() 914 spin_unlock_irq(&chip->reg_lock); snd_fm801_get_double() 925 struct fm801 *chip = snd_kcontrol_chip(kcontrol); snd_fm801_put_double() local 939 return snd_fm801_update_bits(chip, reg, snd_fm801_put_double() 957 struct fm801 *chip = snd_kcontrol_chip(kcontrol); snd_fm801_get_mux() local 960 val = fm801_readw(chip, REC_SRC) & 7; snd_fm801_get_mux() 970 struct fm801 *chip = snd_kcontrol_chip(kcontrol); snd_fm801_put_mux() local 975 return snd_fm801_update_bits(chip, FM801_REC_SRC, 7, val); snd_fm801_put_mux() 1014 struct fm801 *chip = bus->private_data; snd_fm801_mixer_free_ac97_bus() local 1015 chip->ac97_bus = NULL; snd_fm801_mixer_free_ac97_bus() 1020 struct fm801 *chip = ac97->private_data; snd_fm801_mixer_free_ac97() local 1022 chip->ac97 = NULL; snd_fm801_mixer_free_ac97() 1024 chip->ac97_sec = NULL; snd_fm801_mixer_free_ac97() 1028 static int snd_fm801_mixer(struct fm801 *chip) snd_fm801_mixer() argument 1038 if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus)) < 0) snd_fm801_mixer() 1040 chip->ac97_bus->private_free = snd_fm801_mixer_free_ac97_bus; snd_fm801_mixer() 1043 ac97.private_data = chip; snd_fm801_mixer() 1045 if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97)) < 0) snd_fm801_mixer() 1047 if (chip->secondary) { snd_fm801_mixer() 1049 ac97.addr = chip->secondary_addr; snd_fm801_mixer() 1050 if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97_sec)) < 0) snd_fm801_mixer() 1054 snd_ctl_add(chip->card, snd_ctl_new1(&snd_fm801_controls[i], chip)); snd_fm801_mixer() 1055 if (chip->multichannel) { snd_fm801_mixer() 1057 snd_ctl_add(chip->card, snd_ctl_new1(&snd_fm801_controls_multi[i], chip)); snd_fm801_mixer() 1066 static int wait_for_codec(struct fm801 *chip, unsigned int codec_id, wait_for_codec() argument 1071 fm801_writew(chip, AC97_CMD, wait_for_codec() 1075 if ((fm801_readw(chip, AC97_CMD) & wait_for_codec() 1083 static int snd_fm801_chip_init(struct fm801 *chip, int resume) snd_fm801_chip_init() argument 1087 if (chip->tea575x_tuner & TUNER_ONLY) snd_fm801_chip_init() 1091 fm801_writew(chip, CODEC_CTRL, (1 << 5) | (1 << 6)); snd_fm801_chip_init() 1092 fm801_readw(chip, CODEC_CTRL); /* flush posting data */ snd_fm801_chip_init() 1094 fm801_writew(chip, CODEC_CTRL, 0); snd_fm801_chip_init() 1096 if (wait_for_codec(chip, 0, AC97_RESET, msecs_to_jiffies(750)) < 0) snd_fm801_chip_init() 1098 dev_info(chip->card->dev, snd_fm801_chip_init() 1100 chip->tea575x_tuner = 3 | TUNER_ONLY; snd_fm801_chip_init() 1104 if (chip->multichannel) { snd_fm801_chip_init() 1105 if (chip->secondary_addr) { snd_fm801_chip_init() 1106 wait_for_codec(chip, chip->secondary_addr, snd_fm801_chip_init() 1113 if (!wait_for_codec(chip, i, AC97_VENDOR_ID1, snd_fm801_chip_init() 1115 cmdw = fm801_readw(chip, AC97_DATA); snd_fm801_chip_init() 1117 chip->secondary = 1; snd_fm801_chip_init() 1118 chip->secondary_addr = i; snd_fm801_chip_init() 1127 wait_for_codec(chip, 0, AC97_VENDOR_ID1, msecs_to_jiffies(750)); snd_fm801_chip_init() 1133 fm801_writew(chip, PCM_VOL, 0x0808); snd_fm801_chip_init() 1134 fm801_writew(chip, FM_VOL, 0x9f1f); snd_fm801_chip_init() 1135 fm801_writew(chip, I2S_VOL, 0x8808); snd_fm801_chip_init() 1138 fm801_writew(chip, I2S_MODE, 0x0003); snd_fm801_chip_init() 1141 cmdw = fm801_readw(chip, IRQ_MASK); snd_fm801_chip_init() 1142 if (chip->irq < 0) snd_fm801_chip_init() 1146 fm801_writew(chip, IRQ_MASK, cmdw); snd_fm801_chip_init() 1149 fm801_writew(chip, IRQ_STATUS, snd_fm801_chip_init() 1156 static int snd_fm801_free(struct fm801 *chip) snd_fm801_free() argument 1160 if (chip->irq < 0) snd_fm801_free() 1164 cmdw = fm801_readw(chip, IRQ_MASK); snd_fm801_free() 1166 fm801_writew(chip, IRQ_MASK, cmdw); snd_fm801_free() 1170 if (!(chip->tea575x_tuner & TUNER_DISABLED)) { snd_fm801_free() 1171 snd_tea575x_exit(&chip->tea); snd_fm801_free() 1172 v4l2_device_unregister(&chip->v4l2_dev); snd_fm801_free() 1180 struct fm801 *chip = device->device_data; snd_fm801_dev_free() local 1181 return snd_fm801_free(chip); snd_fm801_dev_free() 1190 struct fm801 *chip; snd_fm801_create() local 1199 chip = devm_kzalloc(&pci->dev, sizeof(*chip), GFP_KERNEL); snd_fm801_create() 1200 if (chip == NULL) snd_fm801_create() 1202 spin_lock_init(&chip->reg_lock); snd_fm801_create() 1203 chip->card = card; snd_fm801_create() 1204 chip->pci = pci; snd_fm801_create() 1205 chip->irq = -1; snd_fm801_create() 1206 chip->tea575x_tuner = tea575x_tuner; snd_fm801_create() 1209 chip->port = pci_resource_start(pci, 0); snd_fm801_create() 1212 IRQF_SHARED, KBUILD_MODNAME, chip)) { snd_fm801_create() 1214 snd_fm801_free(chip); snd_fm801_create() 1217 chip->irq = pci->irq; snd_fm801_create() 1222 chip->multichannel = 1; snd_fm801_create() 1224 snd_fm801_chip_init(chip, 0); snd_fm801_create() 1226 tea575x_tuner = chip->tea575x_tuner; snd_fm801_create() 1228 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) { snd_fm801_create() 1229 snd_fm801_free(chip); snd_fm801_create() 1234 err = v4l2_device_register(&pci->dev, &chip->v4l2_dev); snd_fm801_create() 1236 snd_fm801_free(chip); snd_fm801_create() 1239 chip->tea.v4l2_dev = &chip->v4l2_dev; snd_fm801_create() 1240 chip->tea.radio_nr = radio_nr; snd_fm801_create() 1241 chip->tea.private_data = chip; snd_fm801_create() 1242 chip->tea.ops = &snd_fm801_tea_ops; snd_fm801_create() 1243 sprintf(chip->tea.bus_info, "PCI:%s", pci_name(pci)); snd_fm801_create() 1246 if (snd_tea575x_init(&chip->tea, THIS_MODULE)) { snd_fm801_create() 1248 snd_fm801_free(chip); snd_fm801_create() 1254 chip->tea575x_tuner = tea575x_tuner; snd_fm801_create() 1255 if (!snd_tea575x_init(&chip->tea, THIS_MODULE)) { snd_fm801_create() 1258 get_tea575x_gpio(chip)->name); snd_fm801_create() 1264 chip->tea575x_tuner = TUNER_DISABLED; snd_fm801_create() 1267 if (!(chip->tea575x_tuner & TUNER_DISABLED)) { snd_fm801_create() 1268 strlcpy(chip->tea.card, get_tea575x_gpio(chip)->name, snd_fm801_create() 1269 sizeof(chip->tea.card)); snd_fm801_create() 1273 *rchip = chip; snd_fm801_create() 1282 struct fm801 *chip; snd_card_fm801_probe() local 1297 if ((err = snd_fm801_create(card, pci, tea575x_tuner[dev], radio_nr[dev], &chip)) < 0) { snd_card_fm801_probe() 1301 card->private_data = chip; snd_card_fm801_probe() 1305 strcat(card->shortname, chip->multichannel ? "AU" : "AS"); snd_card_fm801_probe() 1307 card->shortname, chip->port, chip->irq); snd_card_fm801_probe() 1309 if (chip->tea575x_tuner & TUNER_ONLY) snd_card_fm801_probe() 1312 if ((err = snd_fm801_pcm(chip, 0)) < 0) { snd_card_fm801_probe() 1316 if ((err = snd_fm801_mixer(chip)) < 0) { snd_card_fm801_probe() 1321 chip->port + FM801_MPU401_DATA, snd_card_fm801_probe() 1324 -1, &chip->rmidi)) < 0) { snd_card_fm801_probe() 1328 if ((err = snd_opl3_create(card, chip->port + FM801_OPL3_BANK0, snd_card_fm801_probe() 1329 chip->port + FM801_OPL3_BANK1, snd_card_fm801_probe() 1365 struct fm801 *chip = card->private_data; snd_fm801_suspend() local 1369 snd_pcm_suspend_all(chip->pcm); snd_fm801_suspend() 1370 snd_ac97_suspend(chip->ac97); snd_fm801_suspend() 1371 snd_ac97_suspend(chip->ac97_sec); snd_fm801_suspend() 1373 chip->saved_regs[i] = inw(chip->port + saved_regs[i]); snd_fm801_suspend() 1381 struct fm801 *chip = card->private_data; snd_fm801_resume() local 1384 snd_fm801_chip_init(chip, 1); snd_fm801_resume() 1385 snd_ac97_resume(chip->ac97); snd_fm801_resume() 1386 snd_ac97_resume(chip->ac97_sec); snd_fm801_resume() 1388 outw(chip->saved_regs[i], chip->port + saved_regs[i]); snd_fm801_resume()
H A D	es1938.c	90 #define SLIO_REG(chip, x) ((chip)->io_port + ESSIO_REG_##x) 92 #define SLDM_REG(chip, x) ((chip)->ddma_port + ESSDM_REG_##x) 94 #define SLSB_REG(chip, x) ((chip)->sb_port + ESSSB_REG_##x) 259 static void snd_es1938_mixer_write(struct es1938 *chip, unsigned char reg, unsigned char val) snd_es1938_mixer_write() argument 262 spin_lock_irqsave(&chip->mixer_lock, flags); snd_es1938_mixer_write() 263 outb(reg, SLSB_REG(chip, MIXERADDR)); snd_es1938_mixer_write() 264 outb(val, SLSB_REG(chip, MIXERDATA)); snd_es1938_mixer_write() 265 spin_unlock_irqrestore(&chip->mixer_lock, flags); snd_es1938_mixer_write() 266 dev_dbg(chip->card->dev, "Mixer reg %02x set to %02x\n", reg, val); snd_es1938_mixer_write() 272 static int snd_es1938_mixer_read(struct es1938 *chip, unsigned char reg) snd_es1938_mixer_read() argument 276 spin_lock_irqsave(&chip->mixer_lock, flags); snd_es1938_mixer_read() 277 outb(reg, SLSB_REG(chip, MIXERADDR)); snd_es1938_mixer_read() 278 data = inb(SLSB_REG(chip, MIXERDATA)); snd_es1938_mixer_read() 279 spin_unlock_irqrestore(&chip->mixer_lock, flags); snd_es1938_mixer_read() 280 dev_dbg(chip->card->dev, "Mixer reg %02x now is %02x\n", reg, data); snd_es1938_mixer_read() 287 static int snd_es1938_mixer_bits(struct es1938 *chip, unsigned char reg, snd_es1938_mixer_bits() argument 292 spin_lock_irqsave(&chip->mixer_lock, flags); snd_es1938_mixer_bits() 293 outb(reg, SLSB_REG(chip, MIXERADDR)); snd_es1938_mixer_bits() 294 old = inb(SLSB_REG(chip, MIXERDATA)); snd_es1938_mixer_bits() 298 outb(new, SLSB_REG(chip, MIXERDATA)); snd_es1938_mixer_bits() 299 dev_dbg(chip->card->dev, snd_es1938_mixer_bits() 303 spin_unlock_irqrestore(&chip->mixer_lock, flags); snd_es1938_mixer_bits() 310 static void snd_es1938_write_cmd(struct es1938 *chip, unsigned char cmd) snd_es1938_write_cmd() argument 315 if (!(v = inb(SLSB_REG(chip, READSTATUS)) & 0x80)) { snd_es1938_write_cmd() 316 outb(cmd, SLSB_REG(chip, WRITEDATA)); snd_es1938_write_cmd() 320 dev_err(chip->card->dev, snd_es1938_write_cmd() 327 static int snd_es1938_get_byte(struct es1938 *chip) snd_es1938_get_byte() argument 332 if ((v = inb(SLSB_REG(chip, STATUS))) & 0x80) snd_es1938_get_byte() 333 return inb(SLSB_REG(chip, READDATA)); snd_es1938_get_byte() 334 dev_err(chip->card->dev, "get_byte timeout: status 0x02%x\n", v); snd_es1938_get_byte() 341 static void snd_es1938_write(struct es1938 *chip, unsigned char reg, unsigned char val) snd_es1938_write() argument 344 spin_lock_irqsave(&chip->reg_lock, flags); snd_es1938_write() 345 snd_es1938_write_cmd(chip, reg); snd_es1938_write() 346 snd_es1938_write_cmd(chip, val); snd_es1938_write() 347 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_es1938_write() 348 dev_dbg(chip->card->dev, "Reg %02x set to %02x\n", reg, val); snd_es1938_write() 354 static unsigned char snd_es1938_read(struct es1938 *chip, unsigned char reg) snd_es1938_read() argument 358 spin_lock_irqsave(&chip->reg_lock, flags); snd_es1938_read() 359 snd_es1938_write_cmd(chip, ESS_CMD_READREG); snd_es1938_read() 360 snd_es1938_write_cmd(chip, reg); snd_es1938_read() 361 val = snd_es1938_get_byte(chip); snd_es1938_read() 362 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_es1938_read() 363 dev_dbg(chip->card->dev, "Reg %02x now is %02x\n", reg, val); snd_es1938_read() 370 static int snd_es1938_bits(struct es1938 *chip, unsigned char reg, unsigned char mask, snd_es1938_bits() argument 375 spin_lock_irqsave(&chip->reg_lock, flags); snd_es1938_bits() 376 snd_es1938_write_cmd(chip, ESS_CMD_READREG); snd_es1938_bits() 377 snd_es1938_write_cmd(chip, reg); snd_es1938_bits() 378 old = snd_es1938_get_byte(chip); snd_es1938_bits() 381 snd_es1938_write_cmd(chip, reg); snd_es1938_bits() 383 snd_es1938_write_cmd(chip, new); snd_es1938_bits() 384 dev_dbg(chip->card->dev, "Reg %02x was %02x, set to %02x\n", snd_es1938_bits() 387 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_es1938_bits() 392 * Reset the chip 394 static void snd_es1938_reset(struct es1938 *chip) snd_es1938_reset() argument 398 outb(3, SLSB_REG(chip, RESET)); snd_es1938_reset() 399 inb(SLSB_REG(chip, RESET)); snd_es1938_reset() 400 outb(0, SLSB_REG(chip, RESET)); snd_es1938_reset() 402 if (inb(SLSB_REG(chip, STATUS)) & 0x80) { snd_es1938_reset() 403 if (inb(SLSB_REG(chip, READDATA)) == 0xaa) snd_es1938_reset() 407 dev_err(chip->card->dev, "ESS Solo-1 reset failed\n"); snd_es1938_reset() 410 snd_es1938_write_cmd(chip, ESS_CMD_ENABLEEXT); snd_es1938_reset() 413 snd_es1938_write(chip, ESS_CMD_DMATYPE, 2); snd_es1938_reset() 418 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2MODE, 0x32); snd_es1938_reset() 420 snd_es1938_bits(chip, ESS_CMD_IRQCONTROL, 0xf0, 0x50); snd_es1938_reset() 421 snd_es1938_bits(chip, ESS_CMD_DRQCONTROL, 0xf0, 0x50); snd_es1938_reset() 422 snd_es1938_write_cmd(chip, ESS_CMD_ENABLEAUDIO1); snd_es1938_reset() 424 snd_es1938_mixer_write(chip, 0x54, 0x8f); snd_es1938_reset() 425 snd_es1938_mixer_write(chip, 0x56, 0x95); snd_es1938_reset() 426 snd_es1938_mixer_write(chip, 0x58, 0x94); snd_es1938_reset() 427 snd_es1938_mixer_write(chip, 0x5a, 0x80); snd_es1938_reset() 433 static void snd_es1938_reset_fifo(struct es1938 *chip) snd_es1938_reset_fifo() argument 435 outb(2, SLSB_REG(chip, RESET)); snd_es1938_reset_fifo() 436 outb(0, SLSB_REG(chip, RESET)); snd_es1938_reset_fifo() 460 static void snd_es1938_rate_set(struct es1938 *chip, snd_es1938_rate_set() argument 475 snd_es1938_mixer_write(chip, 0x70, bits); snd_es1938_rate_set() 476 snd_es1938_mixer_write(chip, 0x72, div0); snd_es1938_rate_set() 478 snd_es1938_write(chip, 0xA1, bits); snd_es1938_rate_set() 479 snd_es1938_write(chip, 0xA2, div0); snd_es1938_rate_set() 487 static void snd_es1938_playback1_setdma(struct es1938 *chip) snd_es1938_playback1_setdma() argument 489 outb(0x00, SLIO_REG(chip, AUDIO2MODE)); snd_es1938_playback1_setdma() 490 outl(chip->dma2_start, SLIO_REG(chip, AUDIO2DMAADDR)); snd_es1938_playback1_setdma() 491 outw(0, SLIO_REG(chip, AUDIO2DMACOUNT)); snd_es1938_playback1_setdma() 492 outw(chip->dma2_size, SLIO_REG(chip, AUDIO2DMACOUNT)); snd_es1938_playback1_setdma() 495 static void snd_es1938_playback2_setdma(struct es1938 *chip) snd_es1938_playback2_setdma() argument 498 outb(0xc4, SLDM_REG(chip, DMACOMMAND)); snd_es1938_playback2_setdma() 500 outb(0, SLDM_REG(chip, DMACLEAR)); snd_es1938_playback2_setdma() 502 outb(1, SLDM_REG(chip, DMAMASK)); snd_es1938_playback2_setdma() 503 outb(0x18, SLDM_REG(chip, DMAMODE)); snd_es1938_playback2_setdma() 504 outl(chip->dma1_start, SLDM_REG(chip, DMAADDR)); snd_es1938_playback2_setdma() 505 outw(chip->dma1_size - 1, SLDM_REG(chip, DMACOUNT)); snd_es1938_playback2_setdma() 507 outb(0, SLDM_REG(chip, DMAMASK)); snd_es1938_playback2_setdma() 510 static void snd_es1938_capture_setdma(struct es1938 *chip) snd_es1938_capture_setdma() argument 513 outb(0xc4, SLDM_REG(chip, DMACOMMAND)); snd_es1938_capture_setdma() 515 outb(0, SLDM_REG(chip, DMACLEAR)); snd_es1938_capture_setdma() 517 outb(1, SLDM_REG(chip, DMAMASK)); snd_es1938_capture_setdma() 518 outb(0x14, SLDM_REG(chip, DMAMODE)); snd_es1938_capture_setdma() 519 outl(chip->dma1_start, SLDM_REG(chip, DMAADDR)); snd_es1938_capture_setdma() 520 chip->last_capture_dmaaddr = chip->dma1_start; snd_es1938_capture_setdma() 521 outw(chip->dma1_size - 1, SLDM_REG(chip, DMACOUNT)); snd_es1938_capture_setdma() 523 outb(0, SLDM_REG(chip, DMAMASK)); snd_es1938_capture_setdma() 534 struct es1938 *chip = snd_pcm_substream_chip(substream); snd_es1938_capture_trigger() local 540 chip->active |= ADC1; snd_es1938_capture_trigger() 545 chip->active &= ~ADC1; snd_es1938_capture_trigger() 550 snd_es1938_write(chip, ESS_CMD_DMACONTROL, val); snd_es1938_capture_trigger() 557 struct es1938 *chip = snd_pcm_substream_chip(substream); snd_es1938_playback1_trigger() local 563 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0x92); snd_es1938_playback1_trigger() 565 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0x93); snd_es1938_playback1_trigger() 569 outb(0x0a, SLIO_REG(chip, AUDIO2MODE)); snd_es1938_playback1_trigger() 570 chip->active |= DAC2; snd_es1938_playback1_trigger() 574 outb(0, SLIO_REG(chip, AUDIO2MODE)); snd_es1938_playback1_trigger() 575 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0); snd_es1938_playback1_trigger() 576 chip->active &= ~DAC2; snd_es1938_playback1_trigger() 587 struct es1938 *chip = snd_pcm_substream_chip(substream); snd_es1938_playback2_trigger() local 593 chip->active |= DAC1; snd_es1938_playback2_trigger() 598 chip->active &= ~DAC1; snd_es1938_playback2_trigger() 603 snd_es1938_write(chip, ESS_CMD_DMACONTROL, val); snd_es1938_playback2_trigger() 625 struct es1938 *chip = snd_pcm_substream_chip(substream); snd_es1938_capture_prepare() local 631 chip->dma1_size = size; snd_es1938_capture_prepare() 632 chip->dma1_start = runtime->dma_addr; snd_es1938_capture_prepare() 638 chip->dma1_shift = 2 - mono - is8; snd_es1938_capture_prepare() 640 snd_es1938_reset_fifo(chip); snd_es1938_capture_prepare() 643 snd_es1938_bits(chip, ESS_CMD_ANALOGCONTROL, 0x03, (mono ? 2 : 1)); snd_es1938_capture_prepare() 646 snd_es1938_rate_set(chip, substream, ADC1); snd_es1938_capture_prepare() 649 snd_es1938_write(chip, ESS_CMD_DMACNTRELOADL, count & 0xff); snd_es1938_capture_prepare() 650 snd_es1938_write(chip, ESS_CMD_DMACNTRELOADH, count >> 8); snd_es1938_capture_prepare() 653 snd_es1938_write(chip, ESS_CMD_SETFORMAT2, u ? 0x51 : 0x71); snd_es1938_capture_prepare() 654 snd_es1938_write(chip, ESS_CMD_SETFORMAT2, 0x90 | snd_es1938_capture_prepare() 659 // snd_es1938_reset_fifo(chip); snd_es1938_capture_prepare() 662 snd_es1938_capture_setdma(chip); snd_es1938_capture_prepare() 673 struct es1938 *chip = snd_pcm_substream_chip(substream); snd_es1938_playback1_prepare() local 679 chip->dma2_size = size; snd_es1938_playback1_prepare() 680 chip->dma2_start = runtime->dma_addr; snd_es1938_playback1_prepare() 686 chip->dma2_shift = 2 - mono - is8; snd_es1938_playback1_prepare() 688 snd_es1938_reset_fifo(chip); snd_es1938_playback1_prepare() 691 snd_es1938_rate_set(chip, substream, DAC2); snd_es1938_playback1_prepare() 695 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2TCOUNTL, count & 0xff); snd_es1938_playback1_prepare() 696 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2TCOUNTH, count >> 8); snd_es1938_playback1_prepare() 699 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL2, 0x40 | (u ? 0 : 4) | snd_es1938_playback1_prepare() 703 snd_es1938_playback1_setdma(chip); snd_es1938_playback1_prepare() 710 struct es1938 *chip = snd_pcm_substream_chip(substream); snd_es1938_playback2_prepare() local 716 chip->dma1_size = size; snd_es1938_playback2_prepare() 717 chip->dma1_start = runtime->dma_addr; snd_es1938_playback2_prepare() 723 chip->dma1_shift = 2 - mono - is8; snd_es1938_playback2_prepare() 728 snd_es1938_reset_fifo(chip); snd_es1938_playback2_prepare() 730 snd_es1938_bits(chip, ESS_CMD_ANALOGCONTROL, 0x03, (mono ? 2 : 1)); snd_es1938_playback2_prepare() 733 snd_es1938_rate_set(chip, substream, DAC1); snd_es1938_playback2_prepare() 734 snd_es1938_write(chip, ESS_CMD_DMACNTRELOADL, count & 0xff); snd_es1938_playback2_prepare() 735 snd_es1938_write(chip, ESS_CMD_DMACNTRELOADH, count >> 8); snd_es1938_playback2_prepare() 738 snd_es1938_write(chip, ESS_CMD_SETFORMAT, u ? 0x80 : 0x00); snd_es1938_playback2_prepare() 739 snd_es1938_write(chip, ESS_CMD_SETFORMAT, u ? 0x51 : 0x71); snd_es1938_playback2_prepare() 740 snd_es1938_write(chip, ESS_CMD_SETFORMAT2, snd_es1938_playback2_prepare() 745 snd_es1938_playback2_setdma(chip); snd_es1938_playback2_prepare() 772 struct es1938 *chip = snd_pcm_substream_chip(substream); snd_es1938_capture_pointer() local 777 old = inw(SLDM_REG(chip, DMACOUNT)); snd_es1938_capture_pointer() 778 while ((new = inw(SLDM_REG(chip, DMACOUNT))) != old) snd_es1938_capture_pointer() 780 ptr = chip->dma1_size - 1 - new; snd_es1938_capture_pointer() 785 ptr = inl(SLDM_REG(chip, DMAADDR)); snd_es1938_capture_pointer() 786 count = inw(SLDM_REG(chip, DMACOUNT)); snd_es1938_capture_pointer() 787 diff = chip->dma1_start + chip->dma1_size - ptr - count; snd_es1938_capture_pointer() 789 if (diff > 3 || ptr < chip->dma1_start snd_es1938_capture_pointer() 790 || ptr >= chip->dma1_start+chip->dma1_size) snd_es1938_capture_pointer() 791 ptr = chip->last_capture_dmaaddr; /* bad, use last saved */ snd_es1938_capture_pointer() 793 chip->last_capture_dmaaddr = ptr; /* good, remember it */ snd_es1938_capture_pointer() 795 ptr -= chip->dma1_start; snd_es1938_capture_pointer() 797 return ptr >> chip->dma1_shift; snd_es1938_capture_pointer() 802 struct es1938 *chip = snd_pcm_substream_chip(substream); snd_es1938_playback1_pointer() local 805 ptr = chip->dma2_size - inw(SLIO_REG(chip, AUDIO2DMACOUNT)); snd_es1938_playback1_pointer() 807 ptr = inl(SLIO_REG(chip, AUDIO2DMAADDR)) - chip->dma2_start; snd_es1938_playback1_pointer() 809 return ptr >> chip->dma2_shift; snd_es1938_playback1_pointer() 814 struct es1938 *chip = snd_pcm_substream_chip(substream); snd_es1938_playback2_pointer() local 819 old = inw(SLDM_REG(chip, DMACOUNT)); snd_es1938_playback2_pointer() 820 while ((new = inw(SLDM_REG(chip, DMACOUNT))) != old) snd_es1938_playback2_pointer() 822 ptr = chip->dma1_size - 1 - new; snd_es1938_playback2_pointer() 824 ptr = inl(SLDM_REG(chip, DMAADDR)) - chip->dma1_start; snd_es1938_playback2_pointer() 826 return ptr >> chip->dma1_shift; snd_es1938_playback2_pointer() 848 struct es1938 *chip = snd_pcm_substream_chip(substream); snd_es1938_capture_copy() local 849 pos <<= chip->dma1_shift; snd_es1938_capture_copy() 850 count <<= chip->dma1_shift; snd_es1938_capture_copy() 851 if (snd_BUG_ON(pos + count > chip->dma1_size)) snd_es1938_capture_copy() 853 if (pos + count < chip->dma1_size) { snd_es1938_capture_copy() 931 struct es1938 *chip = snd_pcm_substream_chip(substream); snd_es1938_capture_open() local 934 if (chip->playback2_substream) snd_es1938_capture_open() 936 chip->capture_substream = substream; snd_es1938_capture_open() 946 struct es1938 *chip = snd_pcm_substream_chip(substream); snd_es1938_playback_open() local 951 chip->playback1_substream = substream; snd_es1938_playback_open() 954 if (chip->capture_substream) snd_es1938_playback_open() 956 chip->playback2_substream = substream; snd_es1938_playback_open() 971 struct es1938 *chip = snd_pcm_substream_chip(substream); snd_es1938_capture_close() local 973 chip->capture_substream = NULL; snd_es1938_capture_close() 979 struct es1938 *chip = snd_pcm_substream_chip(substream); snd_es1938_playback_close() local 983 chip->playback1_substream = NULL; snd_es1938_playback_close() 986 chip->playback2_substream = NULL; snd_es1938_playback_close() 1018 static int snd_es1938_new_pcm(struct es1938 *chip, int device) snd_es1938_new_pcm() argument 1023 if ((err = snd_pcm_new(chip->card, "es-1938-1946", device, 2, 1, &pcm)) < 0) snd_es1938_new_pcm() 1028 pcm->private_data = chip; snd_es1938_new_pcm() 1033 snd_dma_pci_data(chip->pci), 64*1024, 64*1024); snd_es1938_new_pcm() 1035 chip->pcm = pcm; snd_es1938_new_pcm() 1058 struct es1938 *chip = snd_kcontrol_chip(kcontrol); snd_es1938_get_mux() local 1059 ucontrol->value.enumerated.item[0] = snd_es1938_mixer_read(chip, 0x1c) & 0x07; snd_es1938_get_mux() 1066 struct es1938 *chip = snd_kcontrol_chip(kcontrol); snd_es1938_put_mux() local 1071 return snd_es1938_mixer_bits(chip, 0x1c, 0x07, val) != val; snd_es1938_put_mux() 1079 struct es1938 *chip = snd_kcontrol_chip(kcontrol); snd_es1938_get_spatializer_enable() local 1080 unsigned char val = snd_es1938_mixer_read(chip, 0x50); snd_es1938_get_spatializer_enable() 1088 struct es1938 *chip = snd_kcontrol_chip(kcontrol); snd_es1938_put_spatializer_enable() local 1092 oval = snd_es1938_mixer_read(chip, 0x50) & 0x0c; snd_es1938_put_spatializer_enable() 1095 snd_es1938_mixer_write(chip, 0x50, nval & ~0x04); snd_es1938_put_spatializer_enable() 1096 snd_es1938_mixer_write(chip, 0x50, nval); snd_es1938_put_spatializer_enable() 1114 struct es1938 *chip = snd_kcontrol_chip(kcontrol); snd_es1938_get_hw_volume() local 1115 ucontrol->value.integer.value[0] = snd_es1938_mixer_read(chip, 0x61) & 0x3f; snd_es1938_get_hw_volume() 1116 ucontrol->value.integer.value[1] = snd_es1938_mixer_read(chip, 0x63) & 0x3f; snd_es1938_get_hw_volume() 1125 struct es1938 *chip = snd_kcontrol_chip(kcontrol); snd_es1938_get_hw_switch() local 1126 ucontrol->value.integer.value[0] = !(snd_es1938_mixer_read(chip, 0x61) & 0x40); snd_es1938_get_hw_switch() 1127 ucontrol->value.integer.value[1] = !(snd_es1938_mixer_read(chip, 0x63) & 0x40); snd_es1938_get_hw_switch() 1133 struct es1938 *chip = snd_kcontrol_chip(kcontrol); snd_es1938_hwv_free() local 1134 chip->master_volume = NULL; snd_es1938_hwv_free() 1135 chip->master_switch = NULL; snd_es1938_hwv_free() 1136 chip->hw_volume = NULL; snd_es1938_hwv_free() 1137 chip->hw_switch = NULL; snd_es1938_hwv_free() 1140 static int snd_es1938_reg_bits(struct es1938 *chip, unsigned char reg, snd_es1938_reg_bits() argument 1144 return snd_es1938_mixer_bits(chip, reg, mask, val); snd_es1938_reg_bits() 1146 return snd_es1938_bits(chip, reg, mask, val); snd_es1938_reg_bits() 1149 static int snd_es1938_reg_read(struct es1938 *chip, unsigned char reg) snd_es1938_reg_read() argument 1152 return snd_es1938_mixer_read(chip, reg); snd_es1938_reg_read() 1154 return snd_es1938_read(chip, reg); snd_es1938_reg_read() 1186 struct es1938 *chip = snd_kcontrol_chip(kcontrol); snd_es1938_get_single() local 1193 val = snd_es1938_reg_read(chip, reg); snd_es1938_get_single() 1203 struct es1938 *chip = snd_kcontrol_chip(kcontrol); snd_es1938_put_single() local 1215 return snd_es1938_reg_bits(chip, reg, mask, val) != val; snd_es1938_put_single() 1247 struct es1938 *chip = snd_kcontrol_chip(kcontrol); snd_es1938_get_double() local 1256 left = snd_es1938_reg_read(chip, left_reg); snd_es1938_get_double() 1258 right = snd_es1938_reg_read(chip, right_reg); snd_es1938_get_double() 1273 struct es1938 *chip = snd_kcontrol_chip(kcontrol); snd_es1938_put_double() local 1295 if (snd_es1938_reg_bits(chip, left_reg, mask1, val1) != val1) snd_es1938_put_double() 1297 if (snd_es1938_reg_bits(chip, right_reg, mask2, val2) != val2) snd_es1938_put_double() 1300 change = (snd_es1938_reg_bits(chip, left_reg, mask1 | mask2, snd_es1938_put_double() 1413 * initialize the chip - used by resume callback, too 1415 static void snd_es1938_chip_init(struct es1938 *chip) snd_es1938_chip_init() argument 1417 /* reset chip */ snd_es1938_chip_init() 1418 snd_es1938_reset(chip); snd_es1938_chip_init() 1423 pci_set_master(chip->pci); snd_es1938_chip_init() 1426 pci_write_config_word(chip->pci, SL_PCI_LEGACYCONTROL, 0x805f); snd_es1938_chip_init() 1429 pci_write_config_word(chip->pci, SL_PCI_DDMACONTROL, chip->ddma_port | 1); snd_es1938_chip_init() 1432 pci_write_config_dword(chip->pci, SL_PCI_CONFIG, 0); snd_es1938_chip_init() 1435 outb(0xf0, SLIO_REG(chip, IRQCONTROL)); snd_es1938_chip_init() 1438 outb(0, SLDM_REG(chip, DMACLEAR)); snd_es1938_chip_init() 1457 struct es1938 *chip = card->private_data; es1938_suspend() local 1461 snd_pcm_suspend_all(chip->pcm); es1938_suspend() 1464 for (s = saved_regs, d = chip->saved_regs; *s; s++, d++) es1938_suspend() 1465 *d = snd_es1938_reg_read(chip, *s); es1938_suspend() 1467 outb(0x00, SLIO_REG(chip, IRQCONTROL)); /* disable irqs */ es1938_suspend() 1468 if (chip->irq >= 0) { es1938_suspend() 1469 free_irq(chip->irq, chip); es1938_suspend() 1470 chip->irq = -1; es1938_suspend() 1479 struct es1938 *chip = card->private_data; es1938_resume() local 1483 IRQF_SHARED, KBUILD_MODNAME, chip)) { es1938_resume() 1489 chip->irq = pci->irq; es1938_resume() 1490 snd_es1938_chip_init(chip); es1938_resume() 1493 for (s = saved_regs, d = chip->saved_regs; *s; s++, d++) { es1938_resume() 1495 snd_es1938_mixer_write(chip, *s, *d); es1938_resume() 1497 snd_es1938_write(chip, *s, *d); es1938_resume() 1511 static int snd_es1938_create_gameport(struct es1938 *chip) snd_es1938_create_gameport() argument 1515 chip->gameport = gp = gameport_allocate_port(); snd_es1938_create_gameport() 1517 dev_err(chip->card->dev, snd_es1938_create_gameport() 1523 gameport_set_phys(gp, "pci%s/gameport0", pci_name(chip->pci)); snd_es1938_create_gameport() 1524 gameport_set_dev_parent(gp, &chip->pci->dev); snd_es1938_create_gameport() 1525 gp->io = chip->game_port; snd_es1938_create_gameport() 1532 static void snd_es1938_free_gameport(struct es1938 *chip) snd_es1938_free_gameport() argument 1534 if (chip->gameport) { snd_es1938_free_gameport() 1535 gameport_unregister_port(chip->gameport); snd_es1938_free_gameport() 1536 chip->gameport = NULL; snd_es1938_free_gameport() 1540 static inline int snd_es1938_create_gameport(struct es1938 *chip) { return -ENOSYS; } snd_es1938_free_gameport() argument 1541 static inline void snd_es1938_free_gameport(struct es1938 *chip) { } snd_es1938_free_gameport() argument 1544 static int snd_es1938_free(struct es1938 *chip) snd_es1938_free() argument 1547 outb(0x00, SLIO_REG(chip, IRQCONTROL)); snd_es1938_free() 1548 if (chip->rmidi) snd_es1938_free() 1549 snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0); snd_es1938_free() 1551 snd_es1938_free_gameport(chip); snd_es1938_free() 1553 if (chip->irq >= 0) snd_es1938_free() 1554 free_irq(chip->irq, chip); snd_es1938_free() 1555 pci_release_regions(chip->pci); snd_es1938_free() 1556 pci_disable_device(chip->pci); snd_es1938_free() 1557 kfree(chip); snd_es1938_free() 1563 struct es1938 *chip = device->device_data; snd_es1938_dev_free() local 1564 return snd_es1938_free(chip); snd_es1938_dev_free() 1571 struct es1938 *chip; snd_es1938_create() local 1591 chip = kzalloc(sizeof(*chip), GFP_KERNEL); snd_es1938_create() 1592 if (chip == NULL) { snd_es1938_create() 1596 spin_lock_init(&chip->reg_lock); snd_es1938_create() 1597 spin_lock_init(&chip->mixer_lock); snd_es1938_create() 1598 chip->card = card; snd_es1938_create() 1599 chip->pci = pci; snd_es1938_create() 1600 chip->irq = -1; snd_es1938_create() 1602 kfree(chip); snd_es1938_create() 1606 chip->io_port = pci_resource_start(pci, 0); snd_es1938_create() 1607 chip->sb_port = pci_resource_start(pci, 1); snd_es1938_create() 1608 chip->vc_port = pci_resource_start(pci, 2); snd_es1938_create() 1609 chip->mpu_port = pci_resource_start(pci, 3); snd_es1938_create() 1610 chip->game_port = pci_resource_start(pci, 4); snd_es1938_create() 1612 KBUILD_MODNAME, chip)) { snd_es1938_create() 1614 snd_es1938_free(chip); snd_es1938_create() 1617 chip->irq = pci->irq; snd_es1938_create() 1620 chip->io_port, chip->sb_port, chip->vc_port, chip->mpu_port, chip->game_port); snd_es1938_create() 1622 chip->ddma_port = chip->vc_port + 0x00; /* fix from Thomas Sailer */ snd_es1938_create() 1624 snd_es1938_chip_init(chip); snd_es1938_create() 1626 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) { snd_es1938_create() 1627 snd_es1938_free(chip); snd_es1938_create() 1631 *rchip = chip; snd_es1938_create() 1640 struct es1938 *chip = dev_id; snd_es1938_interrupt() local 1644 status = inb(SLIO_REG(chip, IRQCONTROL)); snd_es1938_interrupt() 1646 dev_dbg(chip->card->dev, snd_es1938_interrupt() 1653 dev_dbg(chip->card->dev, snd_es1938_interrupt() 1655 dev_dbg(chip->card->dev, snd_es1938_interrupt() 1657 inw(SLDM_REG(chip, DMACOUNT))); snd_es1938_interrupt() 1658 dev_dbg(chip->card->dev, snd_es1938_interrupt() 1660 inl(SLDM_REG(chip, DMAADDR))); snd_es1938_interrupt() 1661 dev_dbg(chip->card->dev, snd_es1938_interrupt() 1663 inl(SLDM_REG(chip, DMASTATUS))); snd_es1938_interrupt() 1667 audiostatus = inb(SLSB_REG(chip, STATUS)); snd_es1938_interrupt() 1668 if (chip->active & ADC1) snd_es1938_interrupt() 1669 snd_pcm_period_elapsed(chip->capture_substream); snd_es1938_interrupt() 1670 else if (chip->active & DAC1) snd_es1938_interrupt() 1671 snd_pcm_period_elapsed(chip->playback2_substream); snd_es1938_interrupt() 1677 dev_dbg(chip->card->dev, snd_es1938_interrupt() 1679 dev_dbg(chip->card->dev, snd_es1938_interrupt() 1681 inw(SLIO_REG(chip, AUDIO2DMACOUNT))); snd_es1938_interrupt() 1682 dev_dbg(chip->card->dev, snd_es1938_interrupt() 1684 inl(SLIO_REG(chip, AUDIO2DMAADDR))); snd_es1938_interrupt() 1689 snd_es1938_mixer_bits(chip, ESSSB_IREG_AUDIO2CONTROL2, 0x80, 0); snd_es1938_interrupt() 1690 if (chip->active & DAC2) snd_es1938_interrupt() 1691 snd_pcm_period_elapsed(chip->playback1_substream); snd_es1938_interrupt() 1696 int split = snd_es1938_mixer_read(chip, 0x64) & 0x80; snd_es1938_interrupt() 1698 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, &chip->hw_switch->id); snd_es1938_interrupt() 1699 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, &chip->hw_volume->id); snd_es1938_interrupt() 1701 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, snd_es1938_interrupt() 1702 &chip->master_switch->id); snd_es1938_interrupt() 1703 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, snd_es1938_interrupt() 1704 &chip->master_volume->id); snd_es1938_interrupt() 1707 snd_es1938_mixer_write(chip, 0x66, 0x00); snd_es1938_interrupt() 1715 // snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0); /* ack? */ snd_es1938_interrupt() 1716 if (chip->rmidi) { snd_es1938_interrupt() 1718 snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data); snd_es1938_interrupt() 1726 static int snd_es1938_mixer(struct es1938 *chip) snd_es1938_mixer() argument 1732 card = chip->card; snd_es1938_mixer() 1738 kctl = snd_ctl_new1(&snd_es1938_controls[idx], chip); snd_es1938_mixer() 1741 chip->master_volume = kctl; snd_es1938_mixer() 1745 chip->master_switch = kctl; snd_es1938_mixer() 1749 chip->hw_volume = kctl; snd_es1938_mixer() 1753 chip->hw_switch = kctl; snd_es1938_mixer() 1769 struct es1938 *chip; snd_es1938_probe() local 1791 if ((err = snd_es1938_create(card, pci, &chip)) < 0) { snd_es1938_probe() 1795 card->private_data = chip; snd_es1938_probe() 1801 chip->revision, snd_es1938_probe() 1802 chip->irq); snd_es1938_probe() 1804 if ((err = snd_es1938_new_pcm(chip, 0)) < 0) { snd_es1938_probe() 1808 if ((err = snd_es1938_mixer(chip)) < 0) { snd_es1938_probe() 1813 SLSB_REG(chip, FMLOWADDR), snd_es1938_probe() 1814 SLSB_REG(chip, FMHIGHADDR), snd_es1938_probe() 1817 SLSB_REG(chip, FMLOWADDR)); snd_es1938_probe() 1829 chip->mpu_port, snd_es1938_probe() 1831 -1, &chip->rmidi) < 0) { snd_es1938_probe() 1836 snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0x40); snd_es1938_probe() 1839 snd_es1938_create_gameport(chip); snd_es1938_probe()
H A D	intel8x0m.c	251 static inline u8 igetbyte(struct intel8x0m *chip, u32 offset) igetbyte() argument 253 return ioread8(chip->bmaddr + offset); igetbyte() 256 static inline u16 igetword(struct intel8x0m *chip, u32 offset) igetword() argument 258 return ioread16(chip->bmaddr + offset); igetword() 261 static inline u32 igetdword(struct intel8x0m *chip, u32 offset) igetdword() argument 263 return ioread32(chip->bmaddr + offset); igetdword() 266 static inline void iputbyte(struct intel8x0m *chip, u32 offset, u8 val) iputbyte() argument 268 iowrite8(val, chip->bmaddr + offset); iputbyte() 271 static inline void iputword(struct intel8x0m *chip, u32 offset, u16 val) iputword() argument 273 iowrite16(val, chip->bmaddr + offset); iputword() 276 static inline void iputdword(struct intel8x0m *chip, u32 offset, u32 val) iputdword() argument 278 iowrite32(val, chip->bmaddr + offset); iputdword() 285 static inline u16 iagetword(struct intel8x0m *chip, u32 offset) iagetword() argument 287 return ioread16(chip->addr + offset); iagetword() 290 static inline void iaputword(struct intel8x0m *chip, u32 offset, u16 val) iaputword() argument 292 iowrite16(val, chip->addr + offset); iaputword() 304 static unsigned int get_ich_codec_bit(struct intel8x0m *chip, unsigned int codec) get_ich_codec_bit() argument 314 static int snd_intel8x0m_codec_semaphore(struct intel8x0m *chip, unsigned int codec) snd_intel8x0m_codec_semaphore() argument 320 codec = get_ich_codec_bit(chip, codec); snd_intel8x0m_codec_semaphore() 323 if ((igetdword(chip, ICHREG(GLOB_STA)) & codec) == 0) snd_intel8x0m_codec_semaphore() 329 if (!(igetbyte(chip, ICHREG(ACC_SEMA)) & ICH_CAS)) snd_intel8x0m_codec_semaphore() 337 dev_err(chip->card->dev, snd_intel8x0m_codec_semaphore() 339 igetbyte(chip, ICHREG(ACC_SEMA)), igetdword(chip, ICHREG(GLOB_STA))); snd_intel8x0m_codec_semaphore() 340 iagetword(chip, 0); /* clear semaphore flag */ snd_intel8x0m_codec_semaphore() 349 struct intel8x0m *chip = ac97->private_data; snd_intel8x0m_codec_write() local 351 if (snd_intel8x0m_codec_semaphore(chip, ac97->num) < 0) { snd_intel8x0m_codec_write() 352 if (! chip->in_ac97_init) snd_intel8x0m_codec_write() 353 dev_err(chip->card->dev, snd_intel8x0m_codec_write() 357 iaputword(chip, reg + ac97->num * 0x80, val); snd_intel8x0m_codec_write() 363 struct intel8x0m *chip = ac97->private_data; snd_intel8x0m_codec_read() local 367 if (snd_intel8x0m_codec_semaphore(chip, ac97->num) < 0) { snd_intel8x0m_codec_read() 368 if (! chip->in_ac97_init) snd_intel8x0m_codec_read() 369 dev_err(chip->card->dev, snd_intel8x0m_codec_read() 374 res = iagetword(chip, reg + ac97->num * 0x80); snd_intel8x0m_codec_read() 375 if ((tmp = igetdword(chip, ICHREG(GLOB_STA))) & ICH_RCS) { snd_intel8x0m_codec_read() 377 iputdword(chip, ICHREG(GLOB_STA), snd_intel8x0m_codec_read() 379 if (! chip->in_ac97_init) snd_intel8x0m_codec_read() 380 dev_err(chip->card->dev, snd_intel8x0m_codec_read() 387 iagetword(chip, 0); /* clear semaphore */ snd_intel8x0m_codec_read() 395 static void snd_intel8x0m_setup_periods(struct intel8x0m *chip, struct ichdev *ichdev) snd_intel8x0m_setup_periods() argument 401 iputdword(chip, port + ICH_REG_OFF_BDBAR, ichdev->bdbar_addr); snd_intel8x0m_setup_periods() 408 ichdev->fragsize1 >> chip->pcm_pos_shift); snd_intel8x0m_setup_periods() 411 ichdev->fragsize1 >> chip->pcm_pos_shift); snd_intel8x0m_setup_periods() 420 ichdev->fragsize >> chip->pcm_pos_shift); snd_intel8x0m_setup_periods() 422 dev_dbg(chip->card->dev, "bdbar[%i] = 0x%x [0x%x]\n", snd_intel8x0m_setup_periods() 428 iputbyte(chip, port + ICH_REG_OFF_LVI, ichdev->lvi = ICH_REG_LVI_MASK); snd_intel8x0m_setup_periods() 430 iputbyte(chip, port + ICH_REG_OFF_CIV, 0); snd_intel8x0m_setup_periods() 434 dev_dbg(chip->card->dev, snd_intel8x0m_setup_periods() 440 iputbyte(chip, port + ichdev->roff_sr, ICH_FIFOE | ICH_BCIS | ICH_LVBCI); snd_intel8x0m_setup_periods() 447 static inline void snd_intel8x0m_update(struct intel8x0m *chip, struct ichdev *ichdev) snd_intel8x0m_update() argument 453 civ = igetbyte(chip, port + ICH_REG_OFF_CIV); snd_intel8x0m_update() 472 iputbyte(chip, port + ICH_REG_OFF_LVI, ichdev->lvi); snd_intel8x0m_update() 480 dev_dbg(chip->card->dev, snd_intel8x0m_update() 492 spin_unlock(&chip->reg_lock); snd_intel8x0m_update() 494 spin_lock(&chip->reg_lock); snd_intel8x0m_update() 496 iputbyte(chip, port + ichdev->roff_sr, ICH_FIFOE | ICH_BCIS | ICH_LVBCI); snd_intel8x0m_update() 501 struct intel8x0m *chip = dev_id; snd_intel8x0m_interrupt() local 506 spin_lock(&chip->reg_lock); snd_intel8x0m_interrupt() 507 status = igetdword(chip, chip->int_sta_reg); snd_intel8x0m_interrupt() 509 spin_unlock(&chip->reg_lock); snd_intel8x0m_interrupt() 512 if ((status & chip->int_sta_mask) == 0) { snd_intel8x0m_interrupt() 514 iputdword(chip, chip->int_sta_reg, status); snd_intel8x0m_interrupt() 515 spin_unlock(&chip->reg_lock); snd_intel8x0m_interrupt() 519 for (i = 0; i < chip->bdbars_count; i++) { snd_intel8x0m_interrupt() 520 ichdev = &chip->ichd[i]; snd_intel8x0m_interrupt() 522 snd_intel8x0m_update(chip, ichdev); snd_intel8x0m_interrupt() 526 iputdword(chip, chip->int_sta_reg, status & chip->int_sta_mask); snd_intel8x0m_interrupt() 527 spin_unlock(&chip->reg_lock); snd_intel8x0m_interrupt() 538 struct intel8x0m *chip = snd_pcm_substream_chip(substream); snd_intel8x0m_pcm_trigger() local 561 iputbyte(chip, port + ICH_REG_OFF_CR, val); snd_intel8x0m_pcm_trigger() 564 while (!(igetbyte(chip, port + ichdev->roff_sr) & ICH_DCH)) ; snd_intel8x0m_pcm_trigger() 566 iputbyte(chip, port + ICH_REG_OFF_CR, ICH_RESETREGS); snd_intel8x0m_pcm_trigger() 584 struct intel8x0m *chip = snd_pcm_substream_chip(substream); snd_intel8x0m_pcm_pointer() local 588 ptr1 = igetword(chip, ichdev->reg_offset + ichdev->roff_picb) << chip->pcm_pos_shift; snd_intel8x0m_pcm_pointer() 601 struct intel8x0m *chip = snd_pcm_substream_chip(substream); snd_intel8x0m_pcm_prepare() local 610 snd_intel8x0m_setup_periods(chip, ichdev); snd_intel8x0m_pcm_prepare() 659 struct intel8x0m *chip = snd_pcm_substream_chip(substream); snd_intel8x0m_playback_open() local 661 return snd_intel8x0m_pcm_open(substream, &chip->ichd[ICHD_MDMOUT]); snd_intel8x0m_playback_open() 666 struct intel8x0m *chip = snd_pcm_substream_chip(substream); snd_intel8x0m_playback_close() local 668 chip->ichd[ICHD_MDMOUT].substream = NULL; snd_intel8x0m_playback_close() 674 struct intel8x0m *chip = snd_pcm_substream_chip(substream); snd_intel8x0m_capture_open() local 676 return snd_intel8x0m_pcm_open(substream, &chip->ichd[ICHD_MDMIN]); snd_intel8x0m_capture_open() 681 struct intel8x0m *chip = snd_pcm_substream_chip(substream); snd_intel8x0m_capture_close() local 683 chip->ichd[ICHD_MDMIN].substream = NULL; snd_intel8x0m_capture_close() 720 static int snd_intel8x0m_pcm1(struct intel8x0m *chip, int device, snd_intel8x0m_pcm1() argument 731 err = snd_pcm_new(chip->card, name, device, snd_intel8x0m_pcm1() 742 pcm->private_data = chip; snd_intel8x0m_pcm1() 746 sprintf(pcm->name, "%s - %s", chip->card->shortname, rec->suffix); snd_intel8x0m_pcm1() 748 strcpy(pcm->name, chip->card->shortname); snd_intel8x0m_pcm1() 749 chip->pcm[device] = pcm; snd_intel8x0m_pcm1() 752 snd_dma_pci_data(chip->pci), snd_intel8x0m_pcm1() 769 static int snd_intel8x0m_pcm(struct intel8x0m *chip) snd_intel8x0m_pcm() argument 778 switch (chip->device_type) { snd_intel8x0m_pcm() 798 if (! chip->ichd[rec->ac97_idx].ac97) snd_intel8x0m_pcm() 801 err = snd_intel8x0m_pcm1(chip, device, rec); snd_intel8x0m_pcm() 807 chip->pcm_devs = device; snd_intel8x0m_pcm() 818 struct intel8x0m *chip = bus->private_data; snd_intel8x0m_mixer_free_ac97_bus() local 819 chip->ac97_bus = NULL; snd_intel8x0m_mixer_free_ac97_bus() 824 struct intel8x0m *chip = ac97->private_data; snd_intel8x0m_mixer_free_ac97() local 825 chip->ac97 = NULL; snd_intel8x0m_mixer_free_ac97() 829 static int snd_intel8x0m_mixer(struct intel8x0m *chip, int ac97_clock) snd_intel8x0m_mixer() argument 841 chip->in_ac97_init = 1; snd_intel8x0m_mixer() 844 ac97.private_data = chip; snd_intel8x0m_mixer() 848 glob_sta = igetdword(chip, ICHREG(GLOB_STA)); snd_intel8x0m_mixer() 850 if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &pbus)) < 0) snd_intel8x0m_mixer() 855 chip->ac97_bus = pbus; snd_intel8x0m_mixer() 857 ac97.pci = chip->pci; snd_intel8x0m_mixer() 860 dev_err(chip->card->dev, snd_intel8x0m_mixer() 866 chip->ac97 = x97; snd_intel8x0m_mixer() 867 if(ac97_is_modem(x97) && !chip->ichd[ICHD_MDMIN].ac97) { snd_intel8x0m_mixer() 868 chip->ichd[ICHD_MDMIN].ac97 = x97; snd_intel8x0m_mixer() 869 chip->ichd[ICHD_MDMOUT].ac97 = x97; snd_intel8x0m_mixer() 872 chip->in_ac97_init = 0; snd_intel8x0m_mixer() 877 if (chip->device_type != DEVICE_ALI) snd_intel8x0m_mixer() 878 iputdword(chip, ICHREG(GLOB_CNT), snd_intel8x0m_mixer() 879 igetdword(chip, ICHREG(GLOB_CNT)) & ~ICH_AC97COLD); snd_intel8x0m_mixer() 888 static int snd_intel8x0m_ich_chip_init(struct intel8x0m *chip, int probing) snd_intel8x0m_ich_chip_init() argument 896 cnt = igetdword(chip, ICHREG(GLOB_STA)); snd_intel8x0m_ich_chip_init() 897 iputdword(chip, ICHREG(GLOB_STA), cnt & status); snd_intel8x0m_ich_chip_init() 900 cnt = igetdword(chip, ICHREG(GLOB_CNT)); snd_intel8x0m_ich_chip_init() 904 iputdword(chip, ICHREG(GLOB_CNT), cnt); snd_intel8x0m_ich_chip_init() 908 if ((igetdword(chip, ICHREG(GLOB_CNT)) & ICH_AC97WARM) == 0) snd_intel8x0m_ich_chip_init() 912 dev_err(chip->card->dev, "AC'97 warm reset still in progress? [0x%x]\n", snd_intel8x0m_ich_chip_init() 913 igetdword(chip, ICHREG(GLOB_CNT))); snd_intel8x0m_ich_chip_init() 924 status = igetdword(chip, ICHREG(GLOB_STA)) & snd_intel8x0m_ich_chip_init() 932 dev_err(chip->card->dev, snd_intel8x0m_ich_chip_init() 934 igetdword(chip, ICHREG(GLOB_STA))); snd_intel8x0m_ich_chip_init() 945 status |= igetdword(chip, ICHREG(GLOB_STA)) & nstatus; snd_intel8x0m_ich_chip_init() 951 if (chip->ac97) snd_intel8x0m_ich_chip_init() 952 status |= get_ich_codec_bit(chip, chip->ac97->num); snd_intel8x0m_ich_chip_init() 956 nstatus = igetdword(chip, ICHREG(GLOB_STA)) & snd_intel8x0m_ich_chip_init() 964 if (chip->device_type == DEVICE_SIS) { snd_intel8x0m_ich_chip_init() 966 iputword(chip, 0x4c, igetword(chip, 0x4c) | 1); snd_intel8x0m_ich_chip_init() 972 static int snd_intel8x0m_chip_init(struct intel8x0m *chip, int probing) snd_intel8x0m_chip_init() argument 977 if ((err = snd_intel8x0m_ich_chip_init(chip, probing)) < 0) snd_intel8x0m_chip_init() 979 iagetword(chip, 0); /* clear semaphore flag */ snd_intel8x0m_chip_init() 982 for (i = 0; i < chip->bdbars_count; i++) snd_intel8x0m_chip_init() 983 iputbyte(chip, ICH_REG_OFF_CR + chip->ichd[i].reg_offset, 0x00); snd_intel8x0m_chip_init() 985 for (i = 0; i < chip->bdbars_count; i++) snd_intel8x0m_chip_init() 986 iputbyte(chip, ICH_REG_OFF_CR + chip->ichd[i].reg_offset, ICH_RESETREGS); snd_intel8x0m_chip_init() 988 for (i = 0; i < chip->bdbars_count; i++) snd_intel8x0m_chip_init() 989 iputdword(chip, ICH_REG_OFF_BDBAR + chip->ichd[i].reg_offset, chip->ichd[i].bdbar_addr); snd_intel8x0m_chip_init() 993 static int snd_intel8x0m_free(struct intel8x0m *chip) snd_intel8x0m_free() argument 997 if (chip->irq < 0) snd_intel8x0m_free() 1000 for (i = 0; i < chip->bdbars_count; i++) snd_intel8x0m_free() 1001 iputbyte(chip, ICH_REG_OFF_CR + chip->ichd[i].reg_offset, 0x00); snd_intel8x0m_free() 1003 for (i = 0; i < chip->bdbars_count; i++) snd_intel8x0m_free() 1004 iputbyte(chip, ICH_REG_OFF_CR + chip->ichd[i].reg_offset, ICH_RESETREGS); snd_intel8x0m_free() 1006 if (chip->irq >= 0) snd_intel8x0m_free() 1007 free_irq(chip->irq, chip); snd_intel8x0m_free() 1008 if (chip->bdbars.area) snd_intel8x0m_free() 1009 snd_dma_free_pages(&chip->bdbars); snd_intel8x0m_free() 1010 if (chip->addr) snd_intel8x0m_free() 1011 pci_iounmap(chip->pci, chip->addr); snd_intel8x0m_free() 1012 if (chip->bmaddr) snd_intel8x0m_free() 1013 pci_iounmap(chip->pci, chip->bmaddr); snd_intel8x0m_free() 1014 pci_release_regions(chip->pci); snd_intel8x0m_free() 1015 pci_disable_device(chip->pci); snd_intel8x0m_free() 1016 kfree(chip); snd_intel8x0m_free() 1027 struct intel8x0m *chip = card->private_data; intel8x0m_suspend() local 1031 for (i = 0; i < chip->pcm_devs; i++) intel8x0m_suspend() 1032 snd_pcm_suspend_all(chip->pcm[i]); intel8x0m_suspend() 1033 snd_ac97_suspend(chip->ac97); intel8x0m_suspend() 1034 if (chip->irq >= 0) { intel8x0m_suspend() 1035 free_irq(chip->irq, chip); intel8x0m_suspend() 1036 chip->irq = -1; intel8x0m_suspend() 1045 struct intel8x0m *chip = card->private_data; intel8x0m_resume() local 1048 IRQF_SHARED, KBUILD_MODNAME, chip)) { intel8x0m_resume() 1054 chip->irq = pci->irq; intel8x0m_resume() 1055 snd_intel8x0m_chip_init(chip, 0); intel8x0m_resume() 1056 snd_ac97_resume(chip->ac97); intel8x0m_resume() 1072 struct intel8x0m *chip = entry->private_data; snd_intel8x0m_proc_read() local 1076 if (chip->device_type == DEVICE_ALI) snd_intel8x0m_proc_read() 1078 tmp = igetdword(chip, ICHREG(GLOB_STA)); snd_intel8x0m_proc_read() 1080 igetdword(chip, ICHREG(GLOB_CNT))); snd_intel8x0m_proc_read() 1089 static void snd_intel8x0m_proc_init(struct intel8x0m *chip) snd_intel8x0m_proc_init() argument 1093 if (! snd_card_proc_new(chip->card, "intel8x0m", &entry)) snd_intel8x0m_proc_init() 1094 snd_info_set_text_ops(entry, chip, snd_intel8x0m_proc_read); snd_intel8x0m_proc_init() 1097 #define snd_intel8x0m_proc_init(chip) 1103 struct intel8x0m *chip = device->device_data; snd_intel8x0m_dev_free() local 1104 return snd_intel8x0m_free(chip); snd_intel8x0m_dev_free() 1117 struct intel8x0m *chip; snd_intel8x0m_create() local 1136 chip = kzalloc(sizeof(*chip), GFP_KERNEL); snd_intel8x0m_create() 1137 if (chip == NULL) { snd_intel8x0m_create() 1141 spin_lock_init(&chip->reg_lock); snd_intel8x0m_create() 1142 chip->device_type = device_type; snd_intel8x0m_create() 1143 chip->card = card; snd_intel8x0m_create() 1144 chip->pci = pci; snd_intel8x0m_create() 1145 chip->irq = -1; snd_intel8x0m_create() 1148 kfree(chip); snd_intel8x0m_create() 1155 chip->bmaddr = pci_iomap(pci, 0, 0); snd_intel8x0m_create() 1160 chip->addr = pci_iomap(pci, 2, 0); snd_intel8x0m_create() 1162 chip->addr = pci_iomap(pci, 0, 0); snd_intel8x0m_create() 1163 if (!chip->addr) { snd_intel8x0m_create() 1165 snd_intel8x0m_free(chip); snd_intel8x0m_create() 1169 chip->bmaddr = pci_iomap(pci, 3, 0); snd_intel8x0m_create() 1171 chip->bmaddr = pci_iomap(pci, 1, 0); snd_intel8x0m_create() 1172 if (!chip->bmaddr) { snd_intel8x0m_create() 1174 snd_intel8x0m_free(chip); snd_intel8x0m_create() 1180 KBUILD_MODNAME, chip)) { snd_intel8x0m_create() 1182 snd_intel8x0m_free(chip); snd_intel8x0m_create() 1185 chip->irq = pci->irq; snd_intel8x0m_create() 1187 synchronize_irq(chip->irq); snd_intel8x0m_create() 1190 chip->bdbars_count = 2; snd_intel8x0m_create() 1193 for (i = 0; i < chip->bdbars_count; i++) { snd_intel8x0m_create() 1194 ichdev = &chip->ichd[i]; snd_intel8x0m_create() 1210 chip->pcm_pos_shift = (device_type == DEVICE_SIS) ? 0 : 1; snd_intel8x0m_create() 1215 chip->bdbars_count * sizeof(u32) * ICH_MAX_FRAGS * 2, snd_intel8x0m_create() 1216 &chip->bdbars) < 0) { snd_intel8x0m_create() 1217 snd_intel8x0m_free(chip); snd_intel8x0m_create() 1223 for (i = 0; i < chip->bdbars_count; i++) { snd_intel8x0m_create() 1224 ichdev = &chip->ichd[i]; snd_intel8x0m_create() 1225 ichdev->bdbar = ((u32 *)chip->bdbars.area) + (i * ICH_MAX_FRAGS * 2); snd_intel8x0m_create() 1226 ichdev->bdbar_addr = chip->bdbars.addr + (i * sizeof(u32) * ICH_MAX_FRAGS * 2); snd_intel8x0m_create() 1229 chip->int_sta_reg = ICH_REG_GLOB_STA; snd_intel8x0m_create() 1230 chip->int_sta_mask = int_sta_masks; snd_intel8x0m_create() 1232 if ((err = snd_intel8x0m_chip_init(chip, 1)) < 0) { snd_intel8x0m_create() 1233 snd_intel8x0m_free(chip); snd_intel8x0m_create() 1237 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) { snd_intel8x0m_create() 1238 snd_intel8x0m_free(chip); snd_intel8x0m_create() 1242 *r_intel8x0m = chip; snd_intel8x0m_create() 1276 struct intel8x0m *chip; snd_intel8x0m_probe() local 1294 if ((err = snd_intel8x0m_create(card, pci, pci_id->driver_data, &chip)) < 0) { snd_intel8x0m_probe() 1298 card->private_data = chip; snd_intel8x0m_probe() 1300 if ((err = snd_intel8x0m_mixer(chip, ac97_clock)) < 0) { snd_intel8x0m_probe() 1304 if ((err = snd_intel8x0m_pcm(chip)) < 0) { snd_intel8x0m_probe() 1309 snd_intel8x0m_proc_init(chip); snd_intel8x0m_probe() 1312 card->shortname, chip->irq); snd_intel8x0m_probe()
H A D	atiixp.c	234 void (*enable_dma)(struct atiixp *chip, int on); 236 void (*enable_transfer)(struct atiixp *chip, int on); 238 void (*flush_dma)(struct atiixp *chip); 259 * ATI IXP chip 313 static int snd_atiixp_update_bits(struct atiixp *chip, unsigned int reg, snd_atiixp_update_bits() argument 316 void __iomem *addr = chip->remap_addr + reg; snd_atiixp_update_bits() 330 #define atiixp_write(chip,reg,value) \ 331 writel(value, chip->remap_addr + ATI_REG_##reg) 332 #define atiixp_read(chip,reg) \ 333 readl(chip->remap_addr + ATI_REG_##reg) 334 #define atiixp_update(chip,reg,mask,val) \ 335 snd_atiixp_update_bits(chip, ATI_REG_##reg, mask, val) 356 static int atiixp_build_dma_packets(struct atiixp *chip, struct atiixp_dma *dma, atiixp_build_dma_packets() argument 370 snd_dma_pci_data(chip->pci), atiixp_build_dma_packets() 381 spin_lock_irqsave(&chip->reg_lock, flags); atiixp_build_dma_packets() 382 writel(0, chip->remap_addr + dma->ops->llp_offset); atiixp_build_dma_packets() 383 dma->ops->enable_dma(chip, 0); atiixp_build_dma_packets() 384 dma->ops->enable_dma(chip, 1); atiixp_build_dma_packets() 385 spin_unlock_irqrestore(&chip->reg_lock, flags); atiixp_build_dma_packets() 405 chip->remap_addr + dma->ops->llp_offset); atiixp_build_dma_packets() 416 static void atiixp_clear_dma_packets(struct atiixp *chip, struct atiixp_dma *dma, atiixp_clear_dma_packets() argument 420 writel(0, chip->remap_addr + dma->ops->llp_offset); atiixp_clear_dma_packets() 429 static int snd_atiixp_acquire_codec(struct atiixp *chip) snd_atiixp_acquire_codec() argument 433 while (atiixp_read(chip, PHYS_OUT_ADDR) & ATI_REG_PHYS_OUT_ADDR_EN) { snd_atiixp_acquire_codec() 435 dev_warn(chip->card->dev, "codec acquire timeout\n"); snd_atiixp_acquire_codec() 443 static unsigned short snd_atiixp_codec_read(struct atiixp *chip, unsigned short codec, unsigned short reg) snd_atiixp_codec_read() argument 448 if (snd_atiixp_acquire_codec(chip) < 0) snd_atiixp_codec_read() 454 atiixp_write(chip, PHYS_OUT_ADDR, data); snd_atiixp_codec_read() 455 if (snd_atiixp_acquire_codec(chip) < 0) snd_atiixp_codec_read() 459 data = atiixp_read(chip, PHYS_IN_ADDR); snd_atiixp_codec_read() 466 dev_warn(chip->card->dev, "codec read timeout (reg %x)\n", reg); snd_atiixp_codec_read() 471 static void snd_atiixp_codec_write(struct atiixp *chip, unsigned short codec, snd_atiixp_codec_write() argument 476 if (snd_atiixp_acquire_codec(chip) < 0) snd_atiixp_codec_write() 481 atiixp_write(chip, PHYS_OUT_ADDR, data); snd_atiixp_codec_write() 488 struct atiixp *chip = ac97->private_data; snd_atiixp_ac97_read() local 489 return snd_atiixp_codec_read(chip, ac97->num, reg); snd_atiixp_ac97_read() 496 struct atiixp *chip = ac97->private_data; snd_atiixp_ac97_write() local 497 snd_atiixp_codec_write(chip, ac97->num, reg, val); snd_atiixp_ac97_write() 503 static int snd_atiixp_aclink_reset(struct atiixp *chip) snd_atiixp_aclink_reset() argument 508 if (atiixp_update(chip, CMD, ATI_REG_CMD_POWERDOWN, 0)) snd_atiixp_aclink_reset() 512 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SOFT_RESET, ATI_REG_CMD_AC_SOFT_RESET); snd_atiixp_aclink_reset() 513 atiixp_read(chip, CMD); snd_atiixp_aclink_reset() 515 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SOFT_RESET, 0); snd_atiixp_aclink_reset() 518 while (! (atiixp_read(chip, CMD) & ATI_REG_CMD_ACLINK_ACTIVE)) { snd_atiixp_aclink_reset() 520 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET, snd_atiixp_aclink_reset() 522 atiixp_read(chip, CMD); snd_atiixp_aclink_reset() 524 atiixp_update(chip, CMD, ATI_REG_CMD_AC_RESET, ATI_REG_CMD_AC_RESET); snd_atiixp_aclink_reset() 526 dev_err(chip->card->dev, "codec reset timeout\n"); snd_atiixp_aclink_reset() 532 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET, snd_atiixp_aclink_reset() 539 static int snd_atiixp_aclink_down(struct atiixp *chip) snd_atiixp_aclink_down() argument 541 // if (atiixp_read(chip, MODEM_MIRROR) & 0x1) /* modem running, too? */ snd_atiixp_aclink_down() 543 atiixp_update(chip, CMD, snd_atiixp_aclink_down() 553 * the IXP chip can generate interrupts for the non-existing codecs. 578 static int snd_atiixp_codec_detect(struct atiixp *chip) snd_atiixp_codec_detect() argument 582 chip->codec_not_ready_bits = 0; snd_atiixp_codec_detect() 584 ac97_codec = ac97_probing_bugs(chip->pci); snd_atiixp_codec_detect() 586 chip->codec_not_ready_bits |= snd_atiixp_codec_detect() 591 atiixp_write(chip, IER, CODEC_CHECK_BITS); snd_atiixp_codec_detect() 596 if (chip->codec_not_ready_bits) snd_atiixp_codec_detect() 599 atiixp_write(chip, IER, 0); /* disable irqs */ snd_atiixp_codec_detect() 601 if ((chip->codec_not_ready_bits & ALL_CODEC_NOT_READY) == ALL_CODEC_NOT_READY) { snd_atiixp_codec_detect() 602 dev_err(chip->card->dev, "no codec detected!\n"); snd_atiixp_codec_detect() 612 static int snd_atiixp_chip_start(struct atiixp *chip) snd_atiixp_chip_start() argument 617 reg = atiixp_read(chip, CMD); snd_atiixp_chip_start() 620 atiixp_write(chip, CMD, reg); snd_atiixp_chip_start() 622 reg = atiixp_read(chip, SPDF_CMD); snd_atiixp_chip_start() 624 atiixp_write(chip, SPDF_CMD, reg); snd_atiixp_chip_start() 627 atiixp_write(chip, ISR, 0xffffffff); snd_atiixp_chip_start() 629 atiixp_write(chip, IER, snd_atiixp_chip_start() 642 static int snd_atiixp_chip_stop(struct atiixp *chip) snd_atiixp_chip_stop() argument 645 atiixp_write(chip, ISR, atiixp_read(chip, ISR)); snd_atiixp_chip_stop() 647 atiixp_write(chip, IER, 0); snd_atiixp_chip_stop() 663 struct atiixp *chip = snd_pcm_substream_chip(substream); snd_atiixp_pcm_pointer() local 670 curptr = readl(chip->remap_addr + dma->ops->dt_cur); snd_atiixp_pcm_pointer() 678 dev_dbg(chip->card->dev, "invalid DMA pointer read 0x%x (buf=%x)\n", snd_atiixp_pcm_pointer() 679 readl(chip->remap_addr + dma->ops->dt_cur), dma->buf_addr); snd_atiixp_pcm_pointer() 686 static void snd_atiixp_xrun_dma(struct atiixp *chip, struct atiixp_dma *dma) snd_atiixp_xrun_dma() argument 690 dev_dbg(chip->card->dev, "XRUN detected (DMA %d)\n", dma->ops->type); snd_atiixp_xrun_dma() 697 static void snd_atiixp_update_dma(struct atiixp *chip, struct atiixp_dma *dma) snd_atiixp_update_dma() argument 706 static void snd_atiixp_check_bus_busy(struct atiixp *chip) snd_atiixp_check_bus_busy() argument 709 if (atiixp_read(chip, CMD) & (ATI_REG_CMD_SEND_EN | snd_atiixp_check_bus_busy() 715 atiixp_update(chip, IER, ATI_REG_IER_SET_BUS_BUSY, bus_busy); snd_atiixp_check_bus_busy() 723 struct atiixp *chip = snd_pcm_substream_chip(substream); snd_atiixp_pcm_trigger() local 731 spin_lock(&chip->reg_lock); snd_atiixp_pcm_trigger() 736 dma->ops->enable_transfer(chip, 1); snd_atiixp_pcm_trigger() 743 dma->ops->enable_transfer(chip, 0); snd_atiixp_pcm_trigger() 752 snd_atiixp_check_bus_busy(chip); snd_atiixp_pcm_trigger() 754 dma->ops->flush_dma(chip); snd_atiixp_pcm_trigger() 755 snd_atiixp_check_bus_busy(chip); snd_atiixp_pcm_trigger() 758 spin_unlock(&chip->reg_lock); snd_atiixp_pcm_trigger() 766 * every callback is supposed to be called in chip->reg_lock spinlock 770 static void atiixp_out_flush_dma(struct atiixp *chip) atiixp_out_flush_dma() argument 772 atiixp_write(chip, FIFO_FLUSH, ATI_REG_FIFO_OUT_FLUSH); atiixp_out_flush_dma() 776 static void atiixp_out_enable_dma(struct atiixp *chip, int on) atiixp_out_enable_dma() argument 779 data = atiixp_read(chip, CMD); atiixp_out_enable_dma() 783 atiixp_out_flush_dma(chip); atiixp_out_enable_dma() 787 atiixp_write(chip, CMD, data); atiixp_out_enable_dma() 791 static void atiixp_out_enable_transfer(struct atiixp *chip, int on) atiixp_out_enable_transfer() argument 793 atiixp_update(chip, CMD, ATI_REG_CMD_SEND_EN, atiixp_out_enable_transfer() 798 static void atiixp_in_enable_dma(struct atiixp *chip, int on) atiixp_in_enable_dma() argument 800 atiixp_update(chip, CMD, ATI_REG_CMD_IN_DMA_EN, atiixp_in_enable_dma() 805 static void atiixp_in_enable_transfer(struct atiixp *chip, int on) atiixp_in_enable_transfer() argument 808 unsigned int data = atiixp_read(chip, CMD); atiixp_in_enable_transfer() 813 while ((atiixp_read(chip, COUNTER) & atiixp_in_enable_transfer() 817 atiixp_write(chip, CMD, data); atiixp_in_enable_transfer() 820 atiixp_update(chip, CMD, ATI_REG_CMD_RECEIVE_EN, 0); atiixp_in_enable_transfer() 824 static void atiixp_in_flush_dma(struct atiixp *chip) atiixp_in_flush_dma() argument 826 atiixp_write(chip, FIFO_FLUSH, ATI_REG_FIFO_IN_FLUSH); atiixp_in_flush_dma() 830 static void atiixp_spdif_enable_dma(struct atiixp *chip, int on) atiixp_spdif_enable_dma() argument 832 atiixp_update(chip, CMD, ATI_REG_CMD_SPDF_DMA_EN, atiixp_spdif_enable_dma() 837 static void atiixp_spdif_enable_transfer(struct atiixp *chip, int on) atiixp_spdif_enable_transfer() argument 840 data = atiixp_read(chip, CMD); atiixp_spdif_enable_transfer() 845 atiixp_write(chip, CMD, data); atiixp_spdif_enable_transfer() 849 static void atiixp_spdif_flush_dma(struct atiixp *chip) atiixp_spdif_flush_dma() argument 854 atiixp_spdif_enable_dma(chip, 0); atiixp_spdif_flush_dma() 855 atiixp_spdif_enable_transfer(chip, 1); atiixp_spdif_flush_dma() 859 if (! (atiixp_read(chip, SPDF_DMA_DT_SIZE) & ATI_REG_DMA_FIFO_USED)) atiixp_spdif_flush_dma() 864 atiixp_spdif_enable_transfer(chip, 0); atiixp_spdif_flush_dma() 870 struct atiixp *chip = snd_pcm_substream_chip(substream); snd_atiixp_spdif_prepare() local 872 spin_lock_irq(&chip->reg_lock); snd_atiixp_spdif_prepare() 873 if (chip->spdif_over_aclink) { snd_atiixp_spdif_prepare() 876 atiixp_update(chip, CMD, ATI_REG_CMD_SPDF_CONFIG_MASK, snd_atiixp_spdif_prepare() 878 data = atiixp_read(chip, OUT_DMA_SLOT) & ~ATI_REG_OUT_DMA_SLOT_MASK; snd_atiixp_spdif_prepare() 882 atiixp_write(chip, OUT_DMA_SLOT, data); snd_atiixp_spdif_prepare() 883 atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_OUT, snd_atiixp_spdif_prepare() 887 atiixp_update(chip, CMD, ATI_REG_CMD_SPDF_CONFIG_MASK, 0); snd_atiixp_spdif_prepare() 888 atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_SPDF, 0); snd_atiixp_spdif_prepare() 890 spin_unlock_irq(&chip->reg_lock); snd_atiixp_spdif_prepare() 897 struct atiixp *chip = snd_pcm_substream_chip(substream); snd_atiixp_playback_prepare() local 900 spin_lock_irq(&chip->reg_lock); snd_atiixp_playback_prepare() 901 data = atiixp_read(chip, OUT_DMA_SLOT) & ~ATI_REG_OUT_DMA_SLOT_MASK; snd_atiixp_playback_prepare() 923 atiixp_write(chip, OUT_DMA_SLOT, data); snd_atiixp_playback_prepare() 925 atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_OUT, snd_atiixp_playback_prepare() 932 atiixp_update(chip, 6CH_REORDER, ATI_REG_6CH_REORDER_EN, snd_atiixp_playback_prepare() 935 spin_unlock_irq(&chip->reg_lock); snd_atiixp_playback_prepare() 942 struct atiixp *chip = snd_pcm_substream_chip(substream); snd_atiixp_capture_prepare() local 944 spin_lock_irq(&chip->reg_lock); snd_atiixp_capture_prepare() 945 atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_IN, snd_atiixp_capture_prepare() 948 spin_unlock_irq(&chip->reg_lock); snd_atiixp_capture_prepare() 958 struct atiixp *chip = snd_pcm_substream_chip(substream); snd_atiixp_pcm_hw_params() local 968 err = atiixp_build_dma_packets(chip, dma, substream, snd_atiixp_pcm_hw_params() 975 struct ac97_pcm *pcm = chip->pcms[dma->ac97_pcm_type]; snd_atiixp_pcm_hw_params() 995 struct atiixp *chip = snd_pcm_substream_chip(substream); snd_atiixp_pcm_hw_free() local 999 struct ac97_pcm *pcm = chip->pcms[dma->ac97_pcm_type]; snd_atiixp_pcm_hw_free() 1003 atiixp_clear_dma_packets(chip, dma, substream); snd_atiixp_pcm_hw_free() 1035 struct atiixp *chip = snd_pcm_substream_chip(substream); snd_atiixp_pcm_open() local 1048 runtime->hw.rates = chip->pcms[pcm_type]->rates; snd_atiixp_pcm_open() 1059 spin_lock_irq(&chip->reg_lock); snd_atiixp_pcm_open() 1060 dma->ops->enable_dma(chip, 1); snd_atiixp_pcm_open() 1061 spin_unlock_irq(&chip->reg_lock); snd_atiixp_pcm_open() 1070 struct atiixp *chip = snd_pcm_substream_chip(substream); snd_atiixp_pcm_close() local 1074 spin_lock_irq(&chip->reg_lock); snd_atiixp_pcm_close() 1075 dma->ops->enable_dma(chip, 0); snd_atiixp_pcm_close() 1076 spin_unlock_irq(&chip->reg_lock); snd_atiixp_pcm_close() 1086 struct atiixp *chip = snd_pcm_substream_chip(substream); snd_atiixp_playback_open() local 1089 mutex_lock(&chip->open_mutex); snd_atiixp_playback_open() 1090 err = snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_PLAYBACK], 0); snd_atiixp_playback_open() 1091 mutex_unlock(&chip->open_mutex); snd_atiixp_playback_open() 1094 substream->runtime->hw.channels_max = chip->max_channels; snd_atiixp_playback_open() 1095 if (chip->max_channels > 2) snd_atiixp_playback_open() 1104 struct atiixp *chip = snd_pcm_substream_chip(substream); snd_atiixp_playback_close() local 1106 mutex_lock(&chip->open_mutex); snd_atiixp_playback_close() 1107 err = snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_PLAYBACK]); snd_atiixp_playback_close() 1108 mutex_unlock(&chip->open_mutex); snd_atiixp_playback_close() 1114 struct atiixp *chip = snd_pcm_substream_chip(substream); snd_atiixp_capture_open() local 1115 return snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_CAPTURE], 1); snd_atiixp_capture_open() 1120 struct atiixp *chip = snd_pcm_substream_chip(substream); snd_atiixp_capture_close() local 1121 return snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_CAPTURE]); snd_atiixp_capture_close() 1126 struct atiixp *chip = snd_pcm_substream_chip(substream); snd_atiixp_spdif_open() local 1128 mutex_lock(&chip->open_mutex); snd_atiixp_spdif_open() 1129 if (chip->spdif_over_aclink) /* share DMA_PLAYBACK */ snd_atiixp_spdif_open() 1130 err = snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_PLAYBACK], 2); snd_atiixp_spdif_open() 1132 err = snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_SPDIF], -1); snd_atiixp_spdif_open() 1133 mutex_unlock(&chip->open_mutex); snd_atiixp_spdif_open() 1139 struct atiixp *chip = snd_pcm_substream_chip(substream); snd_atiixp_spdif_close() local 1141 mutex_lock(&chip->open_mutex); snd_atiixp_spdif_close() 1142 if (chip->spdif_over_aclink) snd_atiixp_spdif_close() 1143 err = snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_PLAYBACK]); snd_atiixp_spdif_close() 1145 err = snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_SPDIF]); snd_atiixp_spdif_close() 1146 mutex_unlock(&chip->open_mutex); snd_atiixp_spdif_close() 1250 static int snd_atiixp_pcm_new(struct atiixp *chip) snd_atiixp_pcm_new() argument 1254 struct snd_ac97_bus *pbus = chip->ac97_bus; snd_atiixp_pcm_new() 1258 chip->dmas[ATI_DMA_PLAYBACK].ops = &snd_atiixp_playback_dma_ops; snd_atiixp_pcm_new() 1259 chip->dmas[ATI_DMA_CAPTURE].ops = &snd_atiixp_capture_dma_ops; snd_atiixp_pcm_new() 1260 if (! chip->spdif_over_aclink) snd_atiixp_pcm_new() 1261 chip->dmas[ATI_DMA_SPDIF].ops = &snd_atiixp_spdif_dma_ops; snd_atiixp_pcm_new() 1264 if (chip->spdif_over_aclink) snd_atiixp_pcm_new() 1272 chip->pcms[i] = &pbus->pcms[i]; snd_atiixp_pcm_new() 1274 chip->max_channels = 2; snd_atiixp_pcm_new() 1277 chip->max_channels = 6; snd_atiixp_pcm_new() 1279 chip->max_channels = 4; snd_atiixp_pcm_new() 1283 err = snd_pcm_new(chip->card, "ATI IXP AC97", snd_atiixp_pcm_new() 1289 pcm->private_data = chip; snd_atiixp_pcm_new() 1291 chip->pcmdevs[ATI_PCMDEV_ANALOG] = pcm; snd_atiixp_pcm_new() 1294 snd_dma_pci_data(chip->pci), snd_atiixp_pcm_new() 1298 snd_pcm_alt_chmaps, chip->max_channels, 0, snd_atiixp_pcm_new() 1303 chip->ac97[0]->chmaps[SNDRV_PCM_STREAM_PLAYBACK] = chmap; snd_atiixp_pcm_new() 1306 if (chip->pcms[ATI_PCM_SPDIF] && ! chip->pcms[ATI_PCM_SPDIF]->rates) snd_atiixp_pcm_new() 1310 if (chip->pcms[ATI_PCM_SPDIF]) snd_atiixp_pcm_new() 1311 chip->pcms[ATI_PCM_SPDIF]->rates = SNDRV_PCM_RATE_48000; snd_atiixp_pcm_new() 1314 err = snd_pcm_new(chip->card, "ATI IXP IEC958", snd_atiixp_pcm_new() 1319 pcm->private_data = chip; snd_atiixp_pcm_new() 1320 if (chip->spdif_over_aclink) snd_atiixp_pcm_new() 1324 chip->pcmdevs[ATI_PCMDEV_DIGITAL] = pcm; snd_atiixp_pcm_new() 1327 snd_dma_pci_data(chip->pci), snd_atiixp_pcm_new() 1332 if (chip->ac97[i]) snd_atiixp_pcm_new() 1333 snd_ac97_update_bits(chip->ac97[i], snd_atiixp_pcm_new() 1348 struct atiixp *chip = dev_id; snd_atiixp_interrupt() local 1351 status = atiixp_read(chip, ISR); snd_atiixp_interrupt() 1358 snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_PLAYBACK]); snd_atiixp_interrupt() 1360 snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_PLAYBACK]); snd_atiixp_interrupt() 1362 snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_CAPTURE]); snd_atiixp_interrupt() 1364 snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_CAPTURE]); snd_atiixp_interrupt() 1365 if (! chip->spdif_over_aclink) { snd_atiixp_interrupt() 1367 snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_SPDIF]); snd_atiixp_interrupt() 1369 snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_SPDIF]); snd_atiixp_interrupt() 1376 spin_lock(&chip->reg_lock); snd_atiixp_interrupt() 1377 chip->codec_not_ready_bits |= detected; snd_atiixp_interrupt() 1378 atiixp_update(chip, IER, detected, 0); /* disable the detected irqs */ snd_atiixp_interrupt() 1379 spin_unlock(&chip->reg_lock); snd_atiixp_interrupt() 1383 atiixp_write(chip, ISR, status); snd_atiixp_interrupt() 1415 static int snd_atiixp_mixer_new(struct atiixp *chip, int clock, snd_atiixp_mixer_new() argument 1432 if (snd_atiixp_codec_detect(chip) < 0) snd_atiixp_mixer_new() 1435 if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &pbus)) < 0) snd_atiixp_mixer_new() 1438 chip->ac97_bus = pbus; snd_atiixp_mixer_new() 1442 if (chip->codec_not_ready_bits & codec_skip[i]) snd_atiixp_mixer_new() 1445 ac97.private_data = chip; snd_atiixp_mixer_new() 1446 ac97.pci = chip->pci; snd_atiixp_mixer_new() 1449 if (! chip->spdif_over_aclink) snd_atiixp_mixer_new() 1451 if ((err = snd_ac97_mixer(pbus, &ac97, &chip->ac97[i])) < 0) { snd_atiixp_mixer_new() 1452 chip->ac97[i] = NULL; /* to be sure */ snd_atiixp_mixer_new() 1453 dev_dbg(chip->card->dev, snd_atiixp_mixer_new() 1461 dev_err(chip->card->dev, "no codec available\n"); snd_atiixp_mixer_new() 1465 snd_ac97_tune_hardware(chip->ac97[0], ac97_quirks, quirk_override); snd_atiixp_mixer_new() 1478 struct atiixp *chip = card->private_data; snd_atiixp_suspend() local 1483 if (chip->pcmdevs[i]) { snd_atiixp_suspend() 1484 struct atiixp_dma *dma = &chip->dmas[i]; snd_atiixp_suspend() 1486 dma->saved_curptr = readl(chip->remap_addr + snd_atiixp_suspend() 1488 snd_pcm_suspend_all(chip->pcmdevs[i]); snd_atiixp_suspend() 1491 snd_ac97_suspend(chip->ac97[i]); snd_atiixp_suspend() 1492 snd_atiixp_aclink_down(chip); snd_atiixp_suspend() 1493 snd_atiixp_chip_stop(chip); snd_atiixp_suspend() 1500 struct atiixp *chip = card->private_data; snd_atiixp_resume() local 1503 snd_atiixp_aclink_reset(chip); snd_atiixp_resume() 1504 snd_atiixp_chip_start(chip); snd_atiixp_resume() 1507 snd_ac97_resume(chip->ac97[i]); snd_atiixp_resume() 1510 if (chip->pcmdevs[i]) { snd_atiixp_resume() 1511 struct atiixp_dma *dma = &chip->dmas[i]; snd_atiixp_resume() 1513 dma->ops->enable_dma(chip, 1); snd_atiixp_resume() 1516 chip->remap_addr + dma->ops->llp_offset); snd_atiixp_resume() 1517 writel(dma->saved_curptr, chip->remap_addr + snd_atiixp_resume() 1541 struct atiixp *chip = entry->private_data; snd_atiixp_proc_read() local 1545 snd_iprintf(buffer, "%02x: %08x\n", i, readl(chip->remap_addr + i)); snd_atiixp_proc_read() 1548 static void snd_atiixp_proc_init(struct atiixp *chip) snd_atiixp_proc_init() argument 1552 if (! snd_card_proc_new(chip->card, "atiixp", &entry)) snd_atiixp_proc_init() 1553 snd_info_set_text_ops(entry, chip, snd_atiixp_proc_read); snd_atiixp_proc_init() 1556 #define snd_atiixp_proc_init(chip) 1564 static int snd_atiixp_free(struct atiixp *chip) snd_atiixp_free() argument 1566 if (chip->irq < 0) snd_atiixp_free() 1568 snd_atiixp_chip_stop(chip); snd_atiixp_free() 1571 if (chip->irq >= 0) snd_atiixp_free() 1572 free_irq(chip->irq, chip); snd_atiixp_free() 1573 iounmap(chip->remap_addr); snd_atiixp_free() 1574 pci_release_regions(chip->pci); snd_atiixp_free() 1575 pci_disable_device(chip->pci); snd_atiixp_free() 1576 kfree(chip); snd_atiixp_free() 1582 struct atiixp *chip = device->device_data; snd_atiixp_dev_free() local 1583 return snd_atiixp_free(chip); snd_atiixp_dev_free() 1587 * constructor for chip instance 1596 struct atiixp *chip; snd_atiixp_create() local 1602 chip = kzalloc(sizeof(*chip), GFP_KERNEL); snd_atiixp_create() 1603 if (chip == NULL) { snd_atiixp_create() 1608 spin_lock_init(&chip->reg_lock); snd_atiixp_create() 1609 mutex_init(&chip->open_mutex); snd_atiixp_create() 1610 chip->card = card; snd_atiixp_create() 1611 chip->pci = pci; snd_atiixp_create() 1612 chip->irq = -1; snd_atiixp_create() 1615 kfree(chip); snd_atiixp_create() 1618 chip->addr = pci_resource_start(pci, 0); snd_atiixp_create() 1619 chip->remap_addr = pci_ioremap_bar(pci, 0); snd_atiixp_create() 1620 if (chip->remap_addr == NULL) { snd_atiixp_create() 1622 snd_atiixp_free(chip); snd_atiixp_create() 1627 KBUILD_MODNAME, chip)) { snd_atiixp_create() 1629 snd_atiixp_free(chip); snd_atiixp_create() 1632 chip->irq = pci->irq; snd_atiixp_create() 1634 synchronize_irq(chip->irq); snd_atiixp_create() 1636 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) { snd_atiixp_create() 1637 snd_atiixp_free(chip); snd_atiixp_create() 1641 *r_chip = chip; snd_atiixp_create() 1650 struct atiixp *chip; snd_atiixp_probe() local 1659 if ((err = snd_atiixp_create(card, pci, &chip)) < 0) snd_atiixp_probe() 1661 card->private_data = chip; snd_atiixp_probe() 1663 if ((err = snd_atiixp_aclink_reset(chip)) < 0) snd_atiixp_probe() 1666 chip->spdif_over_aclink = spdif_aclink; snd_atiixp_probe() 1668 if ((err = snd_atiixp_mixer_new(chip, ac97_clock, ac97_quirk)) < 0) snd_atiixp_probe() 1671 if ((err = snd_atiixp_pcm_new(chip)) < 0) snd_atiixp_probe() 1674 snd_atiixp_proc_init(chip); snd_atiixp_probe() 1676 snd_atiixp_chip_start(chip); snd_atiixp_probe() 1681 chip->ac97[0] ? snd_ac97_get_short_name(chip->ac97[0]) : "?", snd_atiixp_probe() 1682 chip->addr, chip->irq); snd_atiixp_probe()
H A D	ad1889.c	110 ad1889_readw(struct snd_ad1889 *chip, unsigned reg) ad1889_readw() argument 112 return readw(chip->iobase + reg); ad1889_readw() 116 ad1889_writew(struct snd_ad1889 *chip, unsigned reg, u16 val) ad1889_writew() argument 118 writew(val, chip->iobase + reg); ad1889_writew() 122 ad1889_readl(struct snd_ad1889 *chip, unsigned reg) ad1889_readl() argument 124 return readl(chip->iobase + reg); ad1889_readl() 128 ad1889_writel(struct snd_ad1889 *chip, unsigned reg, u32 val) ad1889_writel() argument 130 writel(val, chip->iobase + reg); ad1889_writel() 134 ad1889_unmute(struct snd_ad1889 *chip) ad1889_unmute() argument 137 st = ad1889_readw(chip, AD_DS_WADA) & ad1889_unmute() 139 ad1889_writew(chip, AD_DS_WADA, st); ad1889_unmute() 140 ad1889_readw(chip, AD_DS_WADA); ad1889_unmute() 144 ad1889_mute(struct snd_ad1889 *chip) ad1889_mute() argument 147 st = ad1889_readw(chip, AD_DS_WADA) | AD_DS_WADA_RWAM | AD_DS_WADA_LWAM; ad1889_mute() 148 ad1889_writew(chip, AD_DS_WADA, st); ad1889_mute() 149 ad1889_readw(chip, AD_DS_WADA); ad1889_mute() 153 ad1889_load_adc_buffer_address(struct snd_ad1889 *chip, u32 address) ad1889_load_adc_buffer_address() argument 155 ad1889_writel(chip, AD_DMA_ADCBA, address); ad1889_load_adc_buffer_address() 156 ad1889_writel(chip, AD_DMA_ADCCA, address); ad1889_load_adc_buffer_address() 160 ad1889_load_adc_buffer_count(struct snd_ad1889 *chip, u32 count) ad1889_load_adc_buffer_count() argument 162 ad1889_writel(chip, AD_DMA_ADCBC, count); ad1889_load_adc_buffer_count() 163 ad1889_writel(chip, AD_DMA_ADCCC, count); ad1889_load_adc_buffer_count() 167 ad1889_load_adc_interrupt_count(struct snd_ad1889 *chip, u32 count) ad1889_load_adc_interrupt_count() argument 169 ad1889_writel(chip, AD_DMA_ADCIB, count); ad1889_load_adc_interrupt_count() 170 ad1889_writel(chip, AD_DMA_ADCIC, count); ad1889_load_adc_interrupt_count() 174 ad1889_load_wave_buffer_address(struct snd_ad1889 *chip, u32 address) ad1889_load_wave_buffer_address() argument 176 ad1889_writel(chip, AD_DMA_WAVBA, address); ad1889_load_wave_buffer_address() 177 ad1889_writel(chip, AD_DMA_WAVCA, address); ad1889_load_wave_buffer_address() 181 ad1889_load_wave_buffer_count(struct snd_ad1889 *chip, u32 count) ad1889_load_wave_buffer_count() argument 183 ad1889_writel(chip, AD_DMA_WAVBC, count); ad1889_load_wave_buffer_count() 184 ad1889_writel(chip, AD_DMA_WAVCC, count); ad1889_load_wave_buffer_count() 188 ad1889_load_wave_interrupt_count(struct snd_ad1889 *chip, u32 count) ad1889_load_wave_interrupt_count() argument 190 ad1889_writel(chip, AD_DMA_WAVIB, count); ad1889_load_wave_interrupt_count() 191 ad1889_writel(chip, AD_DMA_WAVIC, count); ad1889_load_wave_interrupt_count() 195 ad1889_channel_reset(struct snd_ad1889 *chip, unsigned int channel) ad1889_channel_reset() argument 201 reg = ad1889_readw(chip, AD_DS_WSMC) & ~AD_DS_WSMC_WAEN; ad1889_channel_reset() 202 ad1889_writew(chip, AD_DS_WSMC, reg); ad1889_channel_reset() 203 chip->wave.reg = reg; ad1889_channel_reset() 206 reg = ad1889_readw(chip, AD_DMA_WAV); ad1889_channel_reset() 209 ad1889_writew(chip, AD_DMA_WAV, reg); ad1889_channel_reset() 212 ad1889_load_wave_buffer_address(chip, 0x0); ad1889_channel_reset() 213 ad1889_load_wave_buffer_count(chip, 0x0); ad1889_channel_reset() 214 ad1889_load_wave_interrupt_count(chip, 0x0); ad1889_channel_reset() 217 ad1889_readw(chip, AD_DMA_WAV); ad1889_channel_reset() 222 reg = ad1889_readw(chip, AD_DS_RAMC) & ~AD_DS_RAMC_ADEN; ad1889_channel_reset() 223 ad1889_writew(chip, AD_DS_RAMC, reg); ad1889_channel_reset() 224 chip->ramc.reg = reg; ad1889_channel_reset() 226 reg = ad1889_readw(chip, AD_DMA_ADC); ad1889_channel_reset() 229 ad1889_writew(chip, AD_DMA_ADC, reg); ad1889_channel_reset() 231 ad1889_load_adc_buffer_address(chip, 0x0); ad1889_channel_reset() 232 ad1889_load_adc_buffer_count(chip, 0x0); ad1889_channel_reset() 233 ad1889_load_adc_interrupt_count(chip, 0x0); ad1889_channel_reset() 236 ad1889_readw(chip, AD_DMA_ADC); ad1889_channel_reset() 243 struct snd_ad1889 *chip = ac97->private_data; snd_ad1889_ac97_read() local 244 return ad1889_readw(chip, AD_AC97_BASE + reg); snd_ad1889_ac97_read() 250 struct snd_ad1889 *chip = ac97->private_data; snd_ad1889_ac97_write() local 251 ad1889_writew(chip, AD_AC97_BASE + reg, val); snd_ad1889_ac97_write() 255 snd_ad1889_ac97_ready(struct snd_ad1889 *chip) snd_ad1889_ac97_ready() argument 259 while (!(ad1889_readw(chip, AD_AC97_ACIC) & AD_AC97_ACIC_ACRDY) snd_ad1889_ac97_ready() 263 dev_err(chip->card->dev, "[%s] Link is not ready.\n", snd_ad1889_ac97_ready() 267 dev_dbg(chip->card->dev, "[%s] ready after %d ms\n", __func__, 400 - retry); snd_ad1889_ac97_ready() 323 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); snd_ad1889_playback_open() local 326 chip->psubs = ss; snd_ad1889_playback_open() 335 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); snd_ad1889_capture_open() local 338 chip->csubs = ss; snd_ad1889_capture_open() 347 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); snd_ad1889_playback_close() local 348 chip->psubs = NULL; snd_ad1889_playback_close() 355 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); snd_ad1889_capture_close() local 356 chip->csubs = NULL; snd_ad1889_capture_close() 363 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); snd_ad1889_playback_prepare() local 369 ad1889_channel_reset(chip, AD_CHAN_WAV); snd_ad1889_playback_prepare() 371 reg = ad1889_readw(chip, AD_DS_WSMC); snd_ad1889_playback_prepare() 383 spin_lock_irq(&chip->lock); snd_ad1889_playback_prepare() 385 chip->wave.size = size; snd_ad1889_playback_prepare() 386 chip->wave.reg = reg; snd_ad1889_playback_prepare() 387 chip->wave.addr = rt->dma_addr; snd_ad1889_playback_prepare() 389 ad1889_writew(chip, AD_DS_WSMC, chip->wave.reg); snd_ad1889_playback_prepare() 392 ad1889_writew(chip, AD_DS_WAS, rt->rate); snd_ad1889_playback_prepare() 395 ad1889_load_wave_buffer_address(chip, chip->wave.addr); snd_ad1889_playback_prepare() 396 ad1889_load_wave_buffer_count(chip, size); snd_ad1889_playback_prepare() 397 ad1889_load_wave_interrupt_count(chip, count); snd_ad1889_playback_prepare() 400 ad1889_readw(chip, AD_DS_WSMC); snd_ad1889_playback_prepare() 402 spin_unlock_irq(&chip->lock); snd_ad1889_playback_prepare() 404 dev_dbg(chip->card->dev, snd_ad1889_playback_prepare() 406 chip->wave.addr, count, size, reg, rt->rate); snd_ad1889_playback_prepare() 413 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); snd_ad1889_capture_prepare() local 419 ad1889_channel_reset(chip, AD_CHAN_ADC); snd_ad1889_capture_prepare() 421 reg = ad1889_readw(chip, AD_DS_RAMC); snd_ad1889_capture_prepare() 433 spin_lock_irq(&chip->lock); snd_ad1889_capture_prepare() 435 chip->ramc.size = size; snd_ad1889_capture_prepare() 436 chip->ramc.reg = reg; snd_ad1889_capture_prepare() 437 chip->ramc.addr = rt->dma_addr; snd_ad1889_capture_prepare() 439 ad1889_writew(chip, AD_DS_RAMC, chip->ramc.reg); snd_ad1889_capture_prepare() 442 ad1889_load_adc_buffer_address(chip, chip->ramc.addr); snd_ad1889_capture_prepare() 443 ad1889_load_adc_buffer_count(chip, size); snd_ad1889_capture_prepare() 444 ad1889_load_adc_interrupt_count(chip, count); snd_ad1889_capture_prepare() 447 ad1889_readw(chip, AD_DS_RAMC); snd_ad1889_capture_prepare() 449 spin_unlock_irq(&chip->lock); snd_ad1889_capture_prepare() 451 dev_dbg(chip->card->dev, snd_ad1889_capture_prepare() 453 chip->ramc.addr, count, size, reg, rt->rate); snd_ad1889_capture_prepare() 465 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); snd_ad1889_playback_trigger() local 467 wsmc = ad1889_readw(chip, AD_DS_WSMC); snd_ad1889_playback_trigger() 472 ad1889_writew(chip, AD_DMA_WAV, AD_DMA_LOOP | AD_DMA_IM_CNT); snd_ad1889_playback_trigger() 475 ad1889_writel(chip, AD_DMA_CHSS, AD_DMA_CHSS_WAVS); snd_ad1889_playback_trigger() 476 ad1889_unmute(chip); snd_ad1889_playback_trigger() 479 ad1889_mute(chip); snd_ad1889_playback_trigger() 487 chip->wave.reg = wsmc; snd_ad1889_playback_trigger() 488 ad1889_writew(chip, AD_DS_WSMC, wsmc); snd_ad1889_playback_trigger() 489 ad1889_readw(chip, AD_DS_WSMC); /* flush */ snd_ad1889_playback_trigger() 491 /* reset the chip when STOP - will disable IRQs */ snd_ad1889_playback_trigger() 493 ad1889_channel_reset(chip, AD_CHAN_WAV); snd_ad1889_playback_trigger() 506 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); snd_ad1889_capture_trigger() local 508 ramc = ad1889_readw(chip, AD_DS_RAMC); snd_ad1889_capture_trigger() 513 ad1889_writew(chip, AD_DMA_ADC, AD_DMA_LOOP | AD_DMA_IM_CNT); snd_ad1889_capture_trigger() 516 ad1889_writel(chip, AD_DMA_CHSS, AD_DMA_CHSS_ADCS); snd_ad1889_capture_trigger() 525 chip->ramc.reg = ramc; snd_ad1889_capture_trigger() 526 ad1889_writew(chip, AD_DS_RAMC, ramc); snd_ad1889_capture_trigger() 527 ad1889_readw(chip, AD_DS_RAMC); /* flush */ snd_ad1889_capture_trigger() 529 /* reset the chip when STOP - will disable IRQs */ snd_ad1889_capture_trigger() 531 ad1889_channel_reset(chip, AD_CHAN_ADC); snd_ad1889_capture_trigger() 541 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); snd_ad1889_playback_pointer() local 543 if (unlikely(!(chip->wave.reg & AD_DS_WSMC_WAEN))) snd_ad1889_playback_pointer() 546 ptr = ad1889_readl(chip, AD_DMA_WAVCA); snd_ad1889_playback_pointer() 547 ptr -= chip->wave.addr; snd_ad1889_playback_pointer() 549 if (snd_BUG_ON(ptr >= chip->wave.size)) snd_ad1889_playback_pointer() 560 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); snd_ad1889_capture_pointer() local 562 if (unlikely(!(chip->ramc.reg & AD_DS_RAMC_ADEN))) snd_ad1889_capture_pointer() 565 ptr = ad1889_readl(chip, AD_DMA_ADCCA); snd_ad1889_capture_pointer() 566 ptr -= chip->ramc.addr; snd_ad1889_capture_pointer() 568 if (snd_BUG_ON(ptr >= chip->ramc.size)) snd_ad1889_capture_pointer() 600 struct snd_ad1889 *chip = dev_id; snd_ad1889_interrupt() local 602 st = ad1889_readl(chip, AD_DMA_DISR); snd_ad1889_interrupt() 605 ad1889_writel(chip, AD_DMA_DISR, st); snd_ad1889_interrupt() 613 dev_dbg(chip->card->dev, snd_ad1889_interrupt() 616 if ((st & AD_DMA_DISR_WAVI) && chip->psubs) snd_ad1889_interrupt() 617 snd_pcm_period_elapsed(chip->psubs); snd_ad1889_interrupt() 618 if ((st & AD_DMA_DISR_ADCI) && chip->csubs) snd_ad1889_interrupt() 619 snd_pcm_period_elapsed(chip->csubs); snd_ad1889_interrupt() 625 snd_ad1889_pcm_init(struct snd_ad1889 *chip, int device) snd_ad1889_pcm_init() argument 630 err = snd_pcm_new(chip->card, chip->card->driver, device, 1, 1, &pcm); snd_ad1889_pcm_init() 639 pcm->private_data = chip; snd_ad1889_pcm_init() 641 strcpy(pcm->name, chip->card->shortname); snd_ad1889_pcm_init() 643 chip->pcm = pcm; snd_ad1889_pcm_init() 644 chip->psubs = NULL; snd_ad1889_pcm_init() 645 chip->csubs = NULL; snd_ad1889_pcm_init() 648 snd_dma_pci_data(chip->pci), snd_ad1889_pcm_init() 653 dev_err(chip->card->dev, "buffer allocation error: %d\n", err); snd_ad1889_pcm_init() 663 struct snd_ad1889 *chip = entry->private_data; snd_ad1889_proc_read() local 667 reg = ad1889_readw(chip, AD_DS_WSMC); snd_ad1889_proc_read() 695 reg = ad1889_readw(chip, AD_DS_RAMC); snd_ad1889_proc_read() 726 reg = ad1889_readw(chip, AD_DS_WADA); snd_ad1889_proc_read() 730 reg = ad1889_readw(chip, AD_DS_WADA); snd_ad1889_proc_read() 735 reg = ad1889_readw(chip, AD_DS_WAS); snd_ad1889_proc_read() 737 reg = ad1889_readw(chip, AD_DS_RES); snd_ad1889_proc_read() 742 snd_ad1889_proc_init(struct snd_ad1889 *chip) snd_ad1889_proc_init() argument 746 if (!snd_card_proc_new(chip->card, chip->card->driver, &entry)) snd_ad1889_proc_init() 747 snd_info_set_text_ops(entry, chip, snd_ad1889_proc_read); snd_ad1889_proc_init() 762 snd_ad1889_ac97_xinit(struct snd_ad1889 *chip) snd_ad1889_ac97_xinit() argument 766 reg = ad1889_readw(chip, AD_AC97_ACIC); snd_ad1889_ac97_xinit() 768 ad1889_writew(chip, AD_AC97_ACIC, reg); snd_ad1889_ac97_xinit() 769 ad1889_readw(chip, AD_AC97_ACIC); /* flush posted write */ snd_ad1889_ac97_xinit() 773 ad1889_writew(chip, AD_AC97_ACIC, reg); snd_ad1889_ac97_xinit() 775 snd_ad1889_ac97_ready(chip); snd_ad1889_ac97_xinit() 778 reg = ad1889_readw(chip, AD_AC97_ACIC); snd_ad1889_ac97_xinit() 780 ad1889_writew(chip, AD_AC97_ACIC, reg); snd_ad1889_ac97_xinit() 781 ad1889_readw(chip, AD_AC97_ACIC); /* flush posted write */ snd_ad1889_ac97_xinit() 788 struct snd_ad1889 *chip = bus->private_data; snd_ad1889_ac97_bus_free() local 789 chip->ac97_bus = NULL; snd_ad1889_ac97_bus_free() 795 struct snd_ad1889 *chip = ac97->private_data; snd_ad1889_ac97_free() local 796 chip->ac97 = NULL; snd_ad1889_ac97_free() 800 snd_ad1889_ac97_init(struct snd_ad1889 *chip, const char *quirk_override) snd_ad1889_ac97_init() argument 810 snd_ad1889_ac97_xinit(chip); snd_ad1889_ac97_init() 812 err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus); snd_ad1889_ac97_init() 816 chip->ac97_bus->private_free = snd_ad1889_ac97_bus_free; snd_ad1889_ac97_init() 819 ac97.private_data = chip; snd_ad1889_ac97_init() 821 ac97.pci = chip->pci; snd_ad1889_ac97_init() 823 err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97); snd_ad1889_ac97_init() 827 snd_ac97_tune_hardware(chip->ac97, ac97_quirks, quirk_override); snd_ad1889_ac97_init() 833 snd_ad1889_free(struct snd_ad1889 *chip) snd_ad1889_free() argument 835 if (chip->irq < 0) snd_ad1889_free() 838 spin_lock_irq(&chip->lock); snd_ad1889_free() 840 ad1889_mute(chip); snd_ad1889_free() 843 ad1889_channel_reset(chip, AD_CHAN_WAV | AD_CHAN_ADC); snd_ad1889_free() 846 ad1889_writel(chip, AD_DMA_DISR, AD_DMA_DISR_PTAI | AD_DMA_DISR_PMAI); snd_ad1889_free() 847 ad1889_readl(chip, AD_DMA_DISR); /* flush, dammit! */ snd_ad1889_free() 849 spin_unlock_irq(&chip->lock); snd_ad1889_free() 851 if (chip->irq >= 0) snd_ad1889_free() 852 free_irq(chip->irq, chip); snd_ad1889_free() 855 iounmap(chip->iobase); snd_ad1889_free() 856 pci_release_regions(chip->pci); snd_ad1889_free() 857 pci_disable_device(chip->pci); snd_ad1889_free() 858 kfree(chip); snd_ad1889_free() 865 struct snd_ad1889 *chip = device->device_data; snd_ad1889_dev_free() local 866 return snd_ad1889_free(chip); snd_ad1889_dev_free() 870 snd_ad1889_init(struct snd_ad1889 *chip) snd_ad1889_init() argument 872 ad1889_writew(chip, AD_DS_CCS, AD_DS_CCS_CLKEN); /* turn on clock */ snd_ad1889_init() 873 ad1889_readw(chip, AD_DS_CCS); /* flush posted write */ snd_ad1889_init() 878 ad1889_writel(chip, AD_DMA_DISR, AD_DMA_DISR_PMAE | AD_DMA_DISR_PTAE); snd_ad1889_init() 890 struct snd_ad1889 *chip; snd_ad1889_create() local 908 /* allocate chip specific data with zero-filled memory */ snd_ad1889_create() 909 if ((chip = kzalloc(sizeof(*chip), GFP_KERNEL)) == NULL) { snd_ad1889_create() 914 chip->card = card; snd_ad1889_create() 915 card->private_data = chip; snd_ad1889_create() 916 chip->pci = pci; snd_ad1889_create() 917 chip->irq = -1; snd_ad1889_create() 923 chip->bar = pci_resource_start(pci, 0); snd_ad1889_create() 924 chip->iobase = pci_ioremap_bar(pci, 0); snd_ad1889_create() 925 if (chip->iobase == NULL) { snd_ad1889_create() 933 spin_lock_init(&chip->lock); /* only now can we call ad1889_free */ snd_ad1889_create() 936 IRQF_SHARED, KBUILD_MODNAME, chip)) { snd_ad1889_create() 938 snd_ad1889_free(chip); snd_ad1889_create() 942 chip->irq = pci->irq; snd_ad1889_create() 943 synchronize_irq(chip->irq); snd_ad1889_create() 945 /* (2) initialization of the chip hardware */ snd_ad1889_create() 946 if ((err = snd_ad1889_init(chip)) < 0) { snd_ad1889_create() 947 snd_ad1889_free(chip); snd_ad1889_create() 951 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) { snd_ad1889_create() 952 snd_ad1889_free(chip); snd_ad1889_create() 956 *rchip = chip; snd_ad1889_create() 961 kfree(chip); snd_ad1889_create() 974 struct snd_ad1889 *chip; snd_ad1889_probe() local 987 /* XXX REVISIT: we can probably allocate chip in this call */ snd_ad1889_probe() 995 err = snd_ad1889_create(card, pci, &chip); snd_ad1889_probe() 1001 card->shortname, chip->bar, chip->irq); snd_ad1889_probe() 1005 err = snd_ad1889_ac97_init(chip, ac97_quirk[devno]); snd_ad1889_probe() 1009 err = snd_ad1889_pcm_init(chip, 0); snd_ad1889_probe() 1014 snd_ad1889_proc_init(chip); snd_ad1889_probe()
H A D	atiixp_modem.c	210 void (*enable_dma)(struct atiixp_modem *chip, int on); 212 void (*enable_transfer)(struct atiixp_modem *chip, int on); 214 void (*flush_dma)(struct atiixp_modem *chip); 233 * ATI IXP chip 281 static int snd_atiixp_update_bits(struct atiixp_modem *chip, unsigned int reg, snd_atiixp_update_bits() argument 284 void __iomem *addr = chip->remap_addr + reg; snd_atiixp_update_bits() 298 #define atiixp_write(chip,reg,value) \ 299 writel(value, chip->remap_addr + ATI_REG_##reg) 300 #define atiixp_read(chip,reg) \ 301 readl(chip->remap_addr + ATI_REG_##reg) 302 #define atiixp_update(chip,reg,mask,val) \ 303 snd_atiixp_update_bits(chip, ATI_REG_##reg, mask, val) 324 static int atiixp_build_dma_packets(struct atiixp_modem *chip, atiixp_build_dma_packets() argument 338 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci), atiixp_build_dma_packets() 348 spin_lock_irqsave(&chip->reg_lock, flags); atiixp_build_dma_packets() 349 writel(0, chip->remap_addr + dma->ops->llp_offset); atiixp_build_dma_packets() 350 dma->ops->enable_dma(chip, 0); atiixp_build_dma_packets() 351 dma->ops->enable_dma(chip, 1); atiixp_build_dma_packets() 352 spin_unlock_irqrestore(&chip->reg_lock, flags); atiixp_build_dma_packets() 372 chip->remap_addr + dma->ops->llp_offset); atiixp_build_dma_packets() 383 static void atiixp_clear_dma_packets(struct atiixp_modem *chip, atiixp_clear_dma_packets() argument 388 writel(0, chip->remap_addr + dma->ops->llp_offset); atiixp_clear_dma_packets() 397 static int snd_atiixp_acquire_codec(struct atiixp_modem *chip) snd_atiixp_acquire_codec() argument 401 while (atiixp_read(chip, PHYS_OUT_ADDR) & ATI_REG_PHYS_OUT_ADDR_EN) { snd_atiixp_acquire_codec() 403 dev_warn(chip->card->dev, "codec acquire timeout\n"); snd_atiixp_acquire_codec() 411 static unsigned short snd_atiixp_codec_read(struct atiixp_modem *chip, snd_atiixp_codec_read() argument 418 if (snd_atiixp_acquire_codec(chip) < 0) snd_atiixp_codec_read() 424 atiixp_write(chip, PHYS_OUT_ADDR, data); snd_atiixp_codec_read() 425 if (snd_atiixp_acquire_codec(chip) < 0) snd_atiixp_codec_read() 429 data = atiixp_read(chip, PHYS_IN_ADDR); snd_atiixp_codec_read() 436 dev_warn(chip->card->dev, "codec read timeout (reg %x)\n", reg); snd_atiixp_codec_read() 441 static void snd_atiixp_codec_write(struct atiixp_modem *chip, snd_atiixp_codec_write() argument 447 if (snd_atiixp_acquire_codec(chip) < 0) snd_atiixp_codec_write() 452 atiixp_write(chip, PHYS_OUT_ADDR, data); snd_atiixp_codec_write() 459 struct atiixp_modem *chip = ac97->private_data; snd_atiixp_ac97_read() local 460 return snd_atiixp_codec_read(chip, ac97->num, reg); snd_atiixp_ac97_read() 467 struct atiixp_modem *chip = ac97->private_data; snd_atiixp_ac97_write() local 469 atiixp_write(chip, MODEM_OUT_GPIO, snd_atiixp_ac97_write() 473 snd_atiixp_codec_write(chip, ac97->num, reg, val); snd_atiixp_ac97_write() 479 static int snd_atiixp_aclink_reset(struct atiixp_modem *chip) snd_atiixp_aclink_reset() argument 484 if (atiixp_update(chip, CMD, ATI_REG_CMD_POWERDOWN, 0)) snd_atiixp_aclink_reset() 488 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SOFT_RESET, ATI_REG_CMD_AC_SOFT_RESET); snd_atiixp_aclink_reset() 489 atiixp_read(chip, CMD); snd_atiixp_aclink_reset() 491 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SOFT_RESET, 0); snd_atiixp_aclink_reset() 494 while (! (atiixp_read(chip, CMD) & ATI_REG_CMD_ACLINK_ACTIVE)) { snd_atiixp_aclink_reset() 496 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET, snd_atiixp_aclink_reset() 498 atiixp_read(chip, CMD); snd_atiixp_aclink_reset() 500 atiixp_update(chip, CMD, ATI_REG_CMD_AC_RESET, ATI_REG_CMD_AC_RESET); snd_atiixp_aclink_reset() 502 dev_err(chip->card->dev, "codec reset timeout\n"); snd_atiixp_aclink_reset() 508 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET, snd_atiixp_aclink_reset() 515 static int snd_atiixp_aclink_down(struct atiixp_modem *chip) snd_atiixp_aclink_down() argument 517 // if (atiixp_read(chip, MODEM_MIRROR) & 0x1) /* modem running, too? */ snd_atiixp_aclink_down() 519 atiixp_update(chip, CMD, snd_atiixp_aclink_down() 529 * the IXP chip can generate interrupts for the non-existing codecs. 540 static int snd_atiixp_codec_detect(struct atiixp_modem *chip) snd_atiixp_codec_detect() argument 544 chip->codec_not_ready_bits = 0; snd_atiixp_codec_detect() 545 atiixp_write(chip, IER, CODEC_CHECK_BITS); snd_atiixp_codec_detect() 550 if (chip->codec_not_ready_bits) snd_atiixp_codec_detect() 553 atiixp_write(chip, IER, 0); /* disable irqs */ snd_atiixp_codec_detect() 555 if ((chip->codec_not_ready_bits & ALL_CODEC_NOT_READY) == ALL_CODEC_NOT_READY) { snd_atiixp_codec_detect() 556 dev_err(chip->card->dev, "no codec detected!\n"); snd_atiixp_codec_detect() 566 static int snd_atiixp_chip_start(struct atiixp_modem *chip) snd_atiixp_chip_start() argument 571 reg = atiixp_read(chip, CMD); snd_atiixp_chip_start() 575 atiixp_write(chip, CMD, reg); snd_atiixp_chip_start() 578 atiixp_write(chip, ISR, 0xffffffff); snd_atiixp_chip_start() 580 atiixp_write(chip, IER, snd_atiixp_chip_start() 591 static int snd_atiixp_chip_stop(struct atiixp_modem *chip) snd_atiixp_chip_stop() argument 594 atiixp_write(chip, ISR, atiixp_read(chip, ISR)); snd_atiixp_chip_stop() 596 atiixp_write(chip, IER, 0); snd_atiixp_chip_stop() 612 struct atiixp_modem *chip = snd_pcm_substream_chip(substream); snd_atiixp_pcm_pointer() local 619 curptr = readl(chip->remap_addr + dma->ops->dt_cur); snd_atiixp_pcm_pointer() 627 dev_dbg(chip->card->dev, "invalid DMA pointer read 0x%x (buf=%x)\n", snd_atiixp_pcm_pointer() 628 readl(chip->remap_addr + dma->ops->dt_cur), dma->buf_addr); snd_atiixp_pcm_pointer() 635 static void snd_atiixp_xrun_dma(struct atiixp_modem *chip, snd_atiixp_xrun_dma() argument 640 dev_dbg(chip->card->dev, "XRUN detected (DMA %d)\n", dma->ops->type); snd_atiixp_xrun_dma() 647 static void snd_atiixp_update_dma(struct atiixp_modem *chip, snd_atiixp_update_dma() argument 657 static void snd_atiixp_check_bus_busy(struct atiixp_modem *chip) snd_atiixp_check_bus_busy() argument 660 if (atiixp_read(chip, CMD) & (ATI_REG_CMD_MODEM_SEND1_EN | snd_atiixp_check_bus_busy() 665 atiixp_update(chip, IER, ATI_REG_IER_MODEM_SET_BUS_BUSY, bus_busy); snd_atiixp_check_bus_busy() 673 struct atiixp_modem *chip = snd_pcm_substream_chip(substream); snd_atiixp_pcm_trigger() local 681 spin_lock(&chip->reg_lock); snd_atiixp_pcm_trigger() 684 dma->ops->enable_transfer(chip, 1); snd_atiixp_pcm_trigger() 688 dma->ops->enable_transfer(chip, 0); snd_atiixp_pcm_trigger() 696 snd_atiixp_check_bus_busy(chip); snd_atiixp_pcm_trigger() 698 dma->ops->flush_dma(chip); snd_atiixp_pcm_trigger() 699 snd_atiixp_check_bus_busy(chip); snd_atiixp_pcm_trigger() 702 spin_unlock(&chip->reg_lock); snd_atiixp_pcm_trigger() 710 * every callback is supposed to be called in chip->reg_lock spinlock 714 static void atiixp_out_flush_dma(struct atiixp_modem *chip) atiixp_out_flush_dma() argument 716 atiixp_write(chip, MODEM_FIFO_FLUSH, ATI_REG_MODEM_FIFO_OUT1_FLUSH); atiixp_out_flush_dma() 720 static void atiixp_out_enable_dma(struct atiixp_modem *chip, int on) atiixp_out_enable_dma() argument 723 data = atiixp_read(chip, CMD); atiixp_out_enable_dma() 727 atiixp_out_flush_dma(chip); atiixp_out_enable_dma() 731 atiixp_write(chip, CMD, data); atiixp_out_enable_dma() 735 static void atiixp_out_enable_transfer(struct atiixp_modem *chip, int on) atiixp_out_enable_transfer() argument 737 atiixp_update(chip, CMD, ATI_REG_CMD_MODEM_SEND1_EN, atiixp_out_enable_transfer() 742 static void atiixp_in_enable_dma(struct atiixp_modem *chip, int on) atiixp_in_enable_dma() argument 744 atiixp_update(chip, CMD, ATI_REG_CMD_MODEM_IN_DMA_EN, atiixp_in_enable_dma() 749 static void atiixp_in_enable_transfer(struct atiixp_modem *chip, int on) atiixp_in_enable_transfer() argument 752 unsigned int data = atiixp_read(chip, CMD); atiixp_in_enable_transfer() 755 atiixp_write(chip, CMD, data); atiixp_in_enable_transfer() 758 atiixp_update(chip, CMD, ATI_REG_CMD_MODEM_RECEIVE_EN, 0); atiixp_in_enable_transfer() 762 static void atiixp_in_flush_dma(struct atiixp_modem *chip) atiixp_in_flush_dma() argument 764 atiixp_write(chip, MODEM_FIFO_FLUSH, ATI_REG_MODEM_FIFO_IN_FLUSH); atiixp_in_flush_dma() 770 struct atiixp_modem *chip = snd_pcm_substream_chip(substream); snd_atiixp_playback_prepare() local 773 spin_lock_irq(&chip->reg_lock); snd_atiixp_playback_prepare() 775 data = atiixp_read(chip, MODEM_OUT_FIFO); snd_atiixp_playback_prepare() 778 atiixp_write(chip, MODEM_OUT_FIFO, data); snd_atiixp_playback_prepare() 779 spin_unlock_irq(&chip->reg_lock); snd_atiixp_playback_prepare() 795 struct atiixp_modem *chip = snd_pcm_substream_chip(substream); snd_atiixp_pcm_hw_params() local 806 err = atiixp_build_dma_packets(chip, dma, substream, snd_atiixp_pcm_hw_params() 814 if (! chip->ac97[i]) snd_atiixp_pcm_hw_params() 816 snd_ac97_write(chip->ac97[i], AC97_LINE1_RATE, params_rate(hw_params)); snd_atiixp_pcm_hw_params() 817 snd_ac97_write(chip->ac97[i], AC97_LINE1_LEVEL, 0); snd_atiixp_pcm_hw_params() 825 struct atiixp_modem *chip = snd_pcm_substream_chip(substream); snd_atiixp_pcm_hw_free() local 828 atiixp_clear_dma_packets(chip, dma, substream); snd_atiixp_pcm_hw_free() 860 struct atiixp_modem *chip = snd_pcm_substream_chip(substream); snd_atiixp_pcm_open() local 888 spin_lock_irq(&chip->reg_lock); snd_atiixp_pcm_open() 889 dma->ops->enable_dma(chip, 1); snd_atiixp_pcm_open() 890 spin_unlock_irq(&chip->reg_lock); snd_atiixp_pcm_open() 899 struct atiixp_modem *chip = snd_pcm_substream_chip(substream); snd_atiixp_pcm_close() local 903 spin_lock_irq(&chip->reg_lock); snd_atiixp_pcm_close() 904 dma->ops->enable_dma(chip, 0); snd_atiixp_pcm_close() 905 spin_unlock_irq(&chip->reg_lock); snd_atiixp_pcm_close() 915 struct atiixp_modem *chip = snd_pcm_substream_chip(substream); snd_atiixp_playback_open() local 918 mutex_lock(&chip->open_mutex); snd_atiixp_playback_open() 919 err = snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_PLAYBACK], 0); snd_atiixp_playback_open() 920 mutex_unlock(&chip->open_mutex); snd_atiixp_playback_open() 928 struct atiixp_modem *chip = snd_pcm_substream_chip(substream); snd_atiixp_playback_close() local 930 mutex_lock(&chip->open_mutex); snd_atiixp_playback_close() 931 err = snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_PLAYBACK]); snd_atiixp_playback_close() 932 mutex_unlock(&chip->open_mutex); snd_atiixp_playback_close() 938 struct atiixp_modem *chip = snd_pcm_substream_chip(substream); snd_atiixp_capture_open() local 939 return snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_CAPTURE], 1); snd_atiixp_capture_open() 944 struct atiixp_modem *chip = snd_pcm_substream_chip(substream); snd_atiixp_capture_close() local 945 return snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_CAPTURE]); snd_atiixp_capture_close() 991 static int snd_atiixp_pcm_new(struct atiixp_modem *chip) snd_atiixp_pcm_new() argument 997 chip->dmas[ATI_DMA_PLAYBACK].ops = &snd_atiixp_playback_dma_ops; snd_atiixp_pcm_new() 998 chip->dmas[ATI_DMA_CAPTURE].ops = &snd_atiixp_capture_dma_ops; snd_atiixp_pcm_new() 1001 err = snd_pcm_new(chip->card, "ATI IXP MC97", ATI_PCMDEV_ANALOG, 1, 1, &pcm); snd_atiixp_pcm_new() 1007 pcm->private_data = chip; snd_atiixp_pcm_new() 1009 chip->pcmdevs[ATI_PCMDEV_ANALOG] = pcm; snd_atiixp_pcm_new() 1012 snd_dma_pci_data(chip->pci), snd_atiixp_pcm_new() 1025 struct atiixp_modem *chip = dev_id; snd_atiixp_interrupt() local 1028 status = atiixp_read(chip, ISR); snd_atiixp_interrupt() 1035 snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_PLAYBACK]); snd_atiixp_interrupt() 1037 snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_PLAYBACK]); snd_atiixp_interrupt() 1039 snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_CAPTURE]); snd_atiixp_interrupt() 1041 snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_CAPTURE]); snd_atiixp_interrupt() 1047 spin_lock(&chip->reg_lock); snd_atiixp_interrupt() 1048 chip->codec_not_ready_bits |= detected; snd_atiixp_interrupt() 1049 atiixp_update(chip, IER, detected, 0); /* disable the detected irqs */ snd_atiixp_interrupt() 1050 spin_unlock(&chip->reg_lock); snd_atiixp_interrupt() 1054 atiixp_write(chip, ISR, status); snd_atiixp_interrupt() 1064 static int snd_atiixp_mixer_new(struct atiixp_modem *chip, int clock) snd_atiixp_mixer_new() argument 1080 if (snd_atiixp_codec_detect(chip) < 0) snd_atiixp_mixer_new() 1083 if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &pbus)) < 0) snd_atiixp_mixer_new() 1086 chip->ac97_bus = pbus; snd_atiixp_mixer_new() 1090 if (chip->codec_not_ready_bits & codec_skip[i]) snd_atiixp_mixer_new() 1093 ac97.private_data = chip; snd_atiixp_mixer_new() 1094 ac97.pci = chip->pci; snd_atiixp_mixer_new() 1097 if ((err = snd_ac97_mixer(pbus, &ac97, &chip->ac97[i])) < 0) { snd_atiixp_mixer_new() 1098 chip->ac97[i] = NULL; /* to be sure */ snd_atiixp_mixer_new() 1099 dev_dbg(chip->card->dev, snd_atiixp_mixer_new() 1107 dev_err(chip->card->dev, "no codec available\n"); snd_atiixp_mixer_new() 1111 /* snd_ac97_tune_hardware(chip->ac97, ac97_quirks); */ snd_atiixp_mixer_new() 1124 struct atiixp_modem *chip = card->private_data; snd_atiixp_suspend() local 1129 snd_pcm_suspend_all(chip->pcmdevs[i]); snd_atiixp_suspend() 1131 snd_ac97_suspend(chip->ac97[i]); snd_atiixp_suspend() 1132 snd_atiixp_aclink_down(chip); snd_atiixp_suspend() 1133 snd_atiixp_chip_stop(chip); snd_atiixp_suspend() 1140 struct atiixp_modem *chip = card->private_data; snd_atiixp_resume() local 1143 snd_atiixp_aclink_reset(chip); snd_atiixp_resume() 1144 snd_atiixp_chip_start(chip); snd_atiixp_resume() 1147 snd_ac97_resume(chip->ac97[i]); snd_atiixp_resume() 1167 struct atiixp_modem *chip = entry->private_data; snd_atiixp_proc_read() local 1171 snd_iprintf(buffer, "%02x: %08x\n", i, readl(chip->remap_addr + i)); snd_atiixp_proc_read() 1174 static void snd_atiixp_proc_init(struct atiixp_modem *chip) snd_atiixp_proc_init() argument 1178 if (! snd_card_proc_new(chip->card, "atiixp-modem", &entry)) snd_atiixp_proc_init() 1179 snd_info_set_text_ops(entry, chip, snd_atiixp_proc_read); snd_atiixp_proc_init() 1182 #define snd_atiixp_proc_init(chip) 1190 static int snd_atiixp_free(struct atiixp_modem *chip) snd_atiixp_free() argument 1192 if (chip->irq < 0) snd_atiixp_free() 1194 snd_atiixp_chip_stop(chip); snd_atiixp_free() 1197 if (chip->irq >= 0) snd_atiixp_free() 1198 free_irq(chip->irq, chip); snd_atiixp_free() 1199 iounmap(chip->remap_addr); snd_atiixp_free() 1200 pci_release_regions(chip->pci); snd_atiixp_free() 1201 pci_disable_device(chip->pci); snd_atiixp_free() 1202 kfree(chip); snd_atiixp_free() 1208 struct atiixp_modem *chip = device->device_data; snd_atiixp_dev_free() local 1209 return snd_atiixp_free(chip); snd_atiixp_dev_free() 1213 * constructor for chip instance 1222 struct atiixp_modem *chip; snd_atiixp_create() local 1228 chip = kzalloc(sizeof(*chip), GFP_KERNEL); snd_atiixp_create() 1229 if (chip == NULL) { snd_atiixp_create() 1234 spin_lock_init(&chip->reg_lock); snd_atiixp_create() 1235 mutex_init(&chip->open_mutex); snd_atiixp_create() 1236 chip->card = card; snd_atiixp_create() 1237 chip->pci = pci; snd_atiixp_create() 1238 chip->irq = -1; snd_atiixp_create() 1240 kfree(chip); snd_atiixp_create() 1244 chip->addr = pci_resource_start(pci, 0); snd_atiixp_create() 1245 chip->remap_addr = pci_ioremap_bar(pci, 0); snd_atiixp_create() 1246 if (chip->remap_addr == NULL) { snd_atiixp_create() 1248 snd_atiixp_free(chip); snd_atiixp_create() 1253 KBUILD_MODNAME, chip)) { snd_atiixp_create() 1255 snd_atiixp_free(chip); snd_atiixp_create() 1258 chip->irq = pci->irq; snd_atiixp_create() 1260 synchronize_irq(chip->irq); snd_atiixp_create() 1262 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) { snd_atiixp_create() 1263 snd_atiixp_free(chip); snd_atiixp_create() 1267 *r_chip = chip; snd_atiixp_create() 1276 struct atiixp_modem *chip; snd_atiixp_probe() local 1285 if ((err = snd_atiixp_create(card, pci, &chip)) < 0) snd_atiixp_probe() 1287 card->private_data = chip; snd_atiixp_probe() 1289 if ((err = snd_atiixp_aclink_reset(chip)) < 0) snd_atiixp_probe() 1292 if ((err = snd_atiixp_mixer_new(chip, ac97_clock)) < 0) snd_atiixp_probe() 1295 if ((err = snd_atiixp_pcm_new(chip)) < 0) snd_atiixp_probe() 1298 snd_atiixp_proc_init(chip); snd_atiixp_probe() 1300 snd_atiixp_chip_start(chip); snd_atiixp_probe() 1303 card->shortname, pci->revision, chip->addr, chip->irq); snd_atiixp_probe()
H A D	es1968.c	32 * A working Maestro setup contains the Maestro chip wired to a 452 /* chip type */ 590 static void __maestro_write(struct es1968 *chip, u16 reg, u16 data) __maestro_write() argument 592 outw(reg, chip->io_port + ESM_INDEX); __maestro_write() 593 outw(data, chip->io_port + ESM_DATA); __maestro_write() 594 chip->maestro_map[reg] = data; __maestro_write() 597 static inline void maestro_write(struct es1968 *chip, u16 reg, u16 data) maestro_write() argument 600 spin_lock_irqsave(&chip->reg_lock, flags); maestro_write() 601 __maestro_write(chip, reg, data); maestro_write() 602 spin_unlock_irqrestore(&chip->reg_lock, flags); maestro_write() 606 static u16 __maestro_read(struct es1968 *chip, u16 reg) __maestro_read() argument 609 outw(reg, chip->io_port + ESM_INDEX); __maestro_read() 610 chip->maestro_map[reg] = inw(chip->io_port + ESM_DATA); __maestro_read() 612 return chip->maestro_map[reg]; __maestro_read() 615 static inline u16 maestro_read(struct es1968 *chip, u16 reg) maestro_read() argument 619 spin_lock_irqsave(&chip->reg_lock, flags); maestro_read() 620 result = __maestro_read(chip, reg); maestro_read() 621 spin_unlock_irqrestore(&chip->reg_lock, flags); maestro_read() 626 static int snd_es1968_ac97_wait(struct es1968 *chip) snd_es1968_ac97_wait() argument 631 if (!(inb(chip->io_port + ESM_AC97_INDEX) & 1)) snd_es1968_ac97_wait() 635 dev_dbg(chip->card->dev, "ac97 timeout\n"); snd_es1968_ac97_wait() 639 static int snd_es1968_ac97_wait_poll(struct es1968 *chip) snd_es1968_ac97_wait_poll() argument 644 if (!(inb(chip->io_port + ESM_AC97_INDEX) & 1)) snd_es1968_ac97_wait_poll() 647 dev_dbg(chip->card->dev, "ac97 timeout\n"); snd_es1968_ac97_wait_poll() 653 struct es1968 *chip = ac97->private_data; snd_es1968_ac97_write() local 655 snd_es1968_ac97_wait(chip); snd_es1968_ac97_write() 658 outw(val, chip->io_port + ESM_AC97_DATA); snd_es1968_ac97_write() 660 outb(reg, chip->io_port + ESM_AC97_INDEX); snd_es1968_ac97_write() 667 struct es1968 *chip = ac97->private_data; snd_es1968_ac97_read() local 669 snd_es1968_ac97_wait(chip); snd_es1968_ac97_read() 671 outb(reg | 0x80, chip->io_port + ESM_AC97_INDEX); snd_es1968_ac97_read() 674 if (!snd_es1968_ac97_wait_poll(chip)) { snd_es1968_ac97_read() 675 data = inw(chip->io_port + ESM_AC97_DATA); snd_es1968_ac97_read() 683 static void apu_index_set(struct es1968 *chip, u16 index) apu_index_set() argument 686 __maestro_write(chip, IDR1_CRAM_POINTER, index); apu_index_set() 688 if (__maestro_read(chip, IDR1_CRAM_POINTER) == index) apu_index_set() 690 dev_dbg(chip->card->dev, "APU register select failed. (Timeout)\n"); apu_index_set() 694 static void apu_data_set(struct es1968 *chip, u16 data) apu_data_set() argument 698 if (__maestro_read(chip, IDR0_DATA_PORT) == data) apu_data_set() 700 __maestro_write(chip, IDR0_DATA_PORT, data); apu_data_set() 702 dev_dbg(chip->card->dev, "APU register set probably failed (Timeout)!\n"); apu_data_set() 706 static void __apu_set_register(struct es1968 *chip, u16 channel, u8 reg, u16 data) __apu_set_register() argument 711 chip->apu_map[channel][reg] = data; __apu_set_register() 714 apu_index_set(chip, reg); __apu_set_register() 715 apu_data_set(chip, data); __apu_set_register() 718 static void apu_set_register(struct es1968 *chip, u16 channel, u8 reg, u16 data) apu_set_register() argument 721 spin_lock_irqsave(&chip->reg_lock, flags); apu_set_register() 722 __apu_set_register(chip, channel, reg, data); apu_set_register() 723 spin_unlock_irqrestore(&chip->reg_lock, flags); apu_set_register() 726 static u16 __apu_get_register(struct es1968 *chip, u16 channel, u8 reg) __apu_get_register() argument 731 apu_index_set(chip, reg); __apu_get_register() 732 return __maestro_read(chip, IDR0_DATA_PORT); __apu_get_register() 735 static u16 apu_get_register(struct es1968 *chip, u16 channel, u8 reg) apu_get_register() argument 739 spin_lock_irqsave(&chip->reg_lock, flags); apu_get_register() 740 v = __apu_get_register(chip, channel, reg); apu_get_register() 741 spin_unlock_irqrestore(&chip->reg_lock, flags); apu_get_register() 747 static void assp_set_register(struct es1968 *chip, u32 reg, u32 value) 751 spin_lock_irqsave(&chip->reg_lock, flags); 752 outl(reg, chip->io_port + ASSP_INDEX); 753 outl(value, chip->io_port + ASSP_DATA); 754 spin_unlock_irqrestore(&chip->reg_lock, flags); 757 static u32 assp_get_register(struct es1968 *chip, u32 reg) 762 spin_lock_irqsave(&chip->reg_lock, flags); 763 outl(reg, chip->io_port + ASSP_INDEX); 764 value = inl(chip->io_port + ASSP_DATA); 765 spin_unlock_irqrestore(&chip->reg_lock, flags); 772 static void wave_set_register(struct es1968 *chip, u16 reg, u16 value) wave_set_register() argument 776 spin_lock_irqsave(&chip->reg_lock, flags); wave_set_register() 777 outw(reg, chip->io_port + WC_INDEX); wave_set_register() 778 outw(value, chip->io_port + WC_DATA); wave_set_register() 779 spin_unlock_irqrestore(&chip->reg_lock, flags); wave_set_register() 782 static u16 wave_get_register(struct es1968 *chip, u16 reg) wave_get_register() argument 787 spin_lock_irqsave(&chip->reg_lock, flags); wave_get_register() 788 outw(reg, chip->io_port + WC_INDEX); wave_get_register() 789 value = inw(chip->io_port + WC_DATA); wave_get_register() 790 spin_unlock_irqrestore(&chip->reg_lock, flags); wave_get_register() 799 static void snd_es1968_bob_stop(struct es1968 *chip) snd_es1968_bob_stop() argument 803 reg = __maestro_read(chip, 0x11); snd_es1968_bob_stop() 805 __maestro_write(chip, 0x11, reg); snd_es1968_bob_stop() 806 reg = __maestro_read(chip, 0x17); snd_es1968_bob_stop() 808 __maestro_write(chip, 0x17, reg); snd_es1968_bob_stop() 811 static void snd_es1968_bob_start(struct es1968 *chip) snd_es1968_bob_start() argument 819 if (chip->bob_freq > (ESS_SYSCLK >> (prescale + 9))) snd_es1968_bob_start() 832 if (chip->bob_freq > snd_es1968_bob_start() 843 __maestro_write(chip, 6, 0x9000 | (prescale << 5) | divide); /* set reg */ snd_es1968_bob_start() 846 __maestro_write(chip, 0x11, __maestro_read(chip, 0x11) | 1); snd_es1968_bob_start() 847 __maestro_write(chip, 0x17, __maestro_read(chip, 0x17) | 1); snd_es1968_bob_start() 851 static void snd_es1968_bob_inc(struct es1968 *chip, int freq) snd_es1968_bob_inc() argument 853 chip->bobclient++; snd_es1968_bob_inc() 854 if (chip->bobclient == 1) { snd_es1968_bob_inc() 855 chip->bob_freq = freq; snd_es1968_bob_inc() 856 snd_es1968_bob_start(chip); snd_es1968_bob_inc() 857 } else if (chip->bob_freq < freq) { snd_es1968_bob_inc() 858 snd_es1968_bob_stop(chip); snd_es1968_bob_inc() 859 chip->bob_freq = freq; snd_es1968_bob_inc() 860 snd_es1968_bob_start(chip); snd_es1968_bob_inc() 865 static void snd_es1968_bob_dec(struct es1968 *chip) snd_es1968_bob_dec() argument 867 chip->bobclient--; snd_es1968_bob_dec() 868 if (chip->bobclient <= 0) snd_es1968_bob_dec() 869 snd_es1968_bob_stop(chip); snd_es1968_bob_dec() 870 else if (chip->bob_freq > ESM_BOB_FREQ) { snd_es1968_bob_dec() 874 list_for_each_entry(es, &chip->substream_list, list) { snd_es1968_bob_dec() 878 if (max_freq != chip->bob_freq) { snd_es1968_bob_dec() 879 snd_es1968_bob_stop(chip); snd_es1968_bob_dec() 880 chip->bob_freq = max_freq; snd_es1968_bob_dec() 881 snd_es1968_bob_start(chip); snd_es1968_bob_dec() 887 snd_es1968_calc_bob_rate(struct es1968 *chip, struct esschan *es, snd_es1968_calc_bob_rate() argument 909 static u32 snd_es1968_compute_rate(struct es1968 *chip, u32 freq) snd_es1968_compute_rate() argument 911 u32 rate = (freq << 16) / chip->clock; snd_es1968_compute_rate() 921 snd_es1968_get_dma_ptr(struct es1968 *chip, struct esschan *es) snd_es1968_get_dma_ptr() argument 925 offset = apu_get_register(chip, es->apu[0], 5); snd_es1968_get_dma_ptr() 932 static void snd_es1968_apu_set_freq(struct es1968 *chip, int apu, int freq) snd_es1968_apu_set_freq() argument 934 apu_set_register(chip, apu, 2, snd_es1968_apu_set_freq() 935 (apu_get_register(chip, apu, 2) & 0x00FF) | snd_es1968_apu_set_freq() 937 apu_set_register(chip, apu, 3, freq >> 8); snd_es1968_apu_set_freq() 949 static void snd_es1968_pcm_start(struct es1968 *chip, struct esschan *es) snd_es1968_pcm_start() argument 951 spin_lock(&chip->reg_lock); snd_es1968_pcm_start() 952 __apu_set_register(chip, es->apu[0], 5, es->base[0]); snd_es1968_pcm_start() 953 snd_es1968_trigger_apu(chip, es->apu[0], es->apu_mode[0]); snd_es1968_pcm_start() 955 __apu_set_register(chip, es->apu[2], 5, es->base[2]); snd_es1968_pcm_start() 956 snd_es1968_trigger_apu(chip, es->apu[2], es->apu_mode[2]); snd_es1968_pcm_start() 959 __apu_set_register(chip, es->apu[1], 5, es->base[1]); snd_es1968_pcm_start() 960 snd_es1968_trigger_apu(chip, es->apu[1], es->apu_mode[1]); snd_es1968_pcm_start() 962 __apu_set_register(chip, es->apu[3], 5, es->base[3]); snd_es1968_pcm_start() 963 snd_es1968_trigger_apu(chip, es->apu[3], es->apu_mode[3]); snd_es1968_pcm_start() 966 spin_unlock(&chip->reg_lock); snd_es1968_pcm_start() 969 static void snd_es1968_pcm_stop(struct es1968 *chip, struct esschan *es) snd_es1968_pcm_stop() argument 971 spin_lock(&chip->reg_lock); snd_es1968_pcm_stop() 972 snd_es1968_trigger_apu(chip, es->apu[0], 0); snd_es1968_pcm_stop() 973 snd_es1968_trigger_apu(chip, es->apu[1], 0); snd_es1968_pcm_stop() 975 snd_es1968_trigger_apu(chip, es->apu[2], 0); snd_es1968_pcm_stop() 976 snd_es1968_trigger_apu(chip, es->apu[3], 0); snd_es1968_pcm_stop() 978 spin_unlock(&chip->reg_lock); snd_es1968_pcm_stop() 982 static void snd_es1968_program_wavecache(struct es1968 *chip, struct esschan *es, snd_es1968_program_wavecache() argument 995 wave_set_register(chip, es->apu[channel] << 3, tmpval); snd_es1968_program_wavecache() 1003 static void snd_es1968_playback_setup(struct es1968 *chip, struct esschan *es, snd_es1968_playback_setup() argument 1021 snd_es1968_program_wavecache(chip, es, channel, es->memory->buf.addr, 0); snd_es1968_playback_setup() 1025 pa -= chip->dma.addr; snd_es1968_playback_setup() 1043 apu_set_register(chip, apu, i, 0x0000); snd_es1968_playback_setup() 1046 apu_set_register(chip, apu, 4, ((pa >> 16) & 0xFF) << 8); snd_es1968_playback_setup() 1047 apu_set_register(chip, apu, 5, pa & 0xFFFF); snd_es1968_playback_setup() 1048 apu_set_register(chip, apu, 6, (pa + size) & 0xFFFF); snd_es1968_playback_setup() 1050 apu_set_register(chip, apu, 7, size); snd_es1968_playback_setup() 1053 apu_set_register(chip, apu, 8, 0x0000); snd_es1968_playback_setup() 1055 apu_set_register(chip, apu, 9, 0xD000); snd_es1968_playback_setup() 1058 apu_set_register(chip, apu, 11, 0x0000); snd_es1968_playback_setup() 1060 apu_set_register(chip, apu, 0, 0x400F); snd_es1968_playback_setup() 1073 apu_set_register(chip, apu, 10, snd_es1968_playback_setup() 1077 apu_set_register(chip, apu, 10, 0x8F08); snd_es1968_playback_setup() 1080 spin_lock_irqsave(&chip->reg_lock, flags); snd_es1968_playback_setup() 1082 outw(1, chip->io_port + 0x04); snd_es1968_playback_setup() 1084 outw(inw(chip->io_port + ESM_PORT_HOST_IRQ) | ESM_HIRQ_DSIE, chip->io_port + ESM_PORT_HOST_IRQ); snd_es1968_playback_setup() 1085 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_es1968_playback_setup() 1098 freq = snd_es1968_compute_rate(chip, freq); snd_es1968_playback_setup() 1101 snd_es1968_apu_set_freq(chip, es->apu[0], freq); snd_es1968_playback_setup() 1102 snd_es1968_apu_set_freq(chip, es->apu[1], freq); snd_es1968_playback_setup() 1106 static void init_capture_apu(struct es1968 *chip, struct esschan *es, int channel, init_capture_apu() argument 1115 snd_es1968_program_wavecache(chip, es, channel, pa, 1); init_capture_apu() 1118 pa -= chip->dma.addr; init_capture_apu() 1128 apu_set_register(chip, apu, i, 0x0000); init_capture_apu() 1132 apu_set_register(chip, apu, 2, 0x8); init_capture_apu() 1135 apu_set_register(chip, apu, 4, ((pa >> 16) & 0xFF) << 8); init_capture_apu() 1136 apu_set_register(chip, apu, 5, pa & 0xFFFF); init_capture_apu() 1137 apu_set_register(chip, apu, 6, (pa + bsize) & 0xFFFF); init_capture_apu() 1138 apu_set_register(chip, apu, 7, bsize); init_capture_apu() 1140 apu_set_register(chip, apu, 8, 0x00F0); init_capture_apu() 1142 apu_set_register(chip, apu, 9, 0x0000); init_capture_apu() 1144 apu_set_register(chip, apu, 10, 0x8F08); init_capture_apu() 1146 apu_set_register(chip, apu, 11, route); init_capture_apu() 1148 apu_set_register(chip, apu, 0, 0x400F); init_capture_apu() 1151 static void snd_es1968_capture_setup(struct es1968 *chip, struct esschan *es, snd_es1968_capture_setup() argument 1172 init_capture_apu(chip, es, 2, snd_es1968_capture_setup() 1176 init_capture_apu(chip, es, 0, es->memory->buf.addr, size, snd_es1968_capture_setup() 1180 init_capture_apu(chip, es, 3, snd_es1968_capture_setup() 1185 init_capture_apu(chip, es, 1, snd_es1968_capture_setup() 1197 freq = snd_es1968_compute_rate(chip, freq); snd_es1968_capture_setup() 1200 snd_es1968_apu_set_freq(chip, es->apu[0], freq); snd_es1968_capture_setup() 1201 snd_es1968_apu_set_freq(chip, es->apu[1], freq); snd_es1968_capture_setup() 1205 snd_es1968_apu_set_freq(chip, es->apu[2], freq); snd_es1968_capture_setup() 1206 snd_es1968_apu_set_freq(chip, es->apu[3], freq); snd_es1968_capture_setup() 1208 spin_lock_irqsave(&chip->reg_lock, flags); snd_es1968_capture_setup() 1210 outw(1, chip->io_port + 0x04); snd_es1968_capture_setup() 1212 outw(inw(chip->io_port + ESM_PORT_HOST_IRQ) | ESM_HIRQ_DSIE, chip->io_port + ESM_PORT_HOST_IRQ); snd_es1968_capture_setup() 1213 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_es1968_capture_setup() 1222 struct es1968 *chip = snd_pcm_substream_chip(substream); snd_es1968_pcm_prepare() local 1238 es->bob_freq = snd_es1968_calc_bob_rate(chip, es, runtime); snd_es1968_pcm_prepare() 1242 snd_es1968_playback_setup(chip, es, runtime); snd_es1968_pcm_prepare() 1245 snd_es1968_capture_setup(chip, es, runtime); snd_es1968_pcm_prepare() 1254 struct es1968 *chip = snd_pcm_substream_chip(substream); snd_es1968_pcm_trigger() local 1257 spin_lock(&chip->substream_lock); snd_es1968_pcm_trigger() 1263 snd_es1968_bob_inc(chip, es->bob_freq); snd_es1968_pcm_trigger() 1266 snd_es1968_pcm_start(chip, es); snd_es1968_pcm_trigger() 1273 snd_es1968_pcm_stop(chip, es); snd_es1968_pcm_trigger() 1275 snd_es1968_bob_dec(chip); snd_es1968_pcm_trigger() 1278 spin_unlock(&chip->substream_lock); snd_es1968_pcm_trigger() 1284 struct es1968 *chip = snd_pcm_substream_chip(substream); snd_es1968_pcm_pointer() local 1288 ptr = snd_es1968_get_dma_ptr(chip, es) << es->wav_shift; snd_es1968_pcm_pointer() 1342 static int calc_available_memory_size(struct es1968 *chip) calc_available_memory_size() argument 1347 mutex_lock(&chip->memory_mutex); calc_available_memory_size() 1348 list_for_each_entry(buf, &chip->buf_list, list) { calc_available_memory_size() 1352 mutex_unlock(&chip->memory_mutex); calc_available_memory_size() 1359 static struct esm_memory *snd_es1968_new_memory(struct es1968 *chip, int size) snd_es1968_new_memory() argument 1364 mutex_lock(&chip->memory_mutex); snd_es1968_new_memory() 1365 list_for_each_entry(buf, &chip->buf_list, list) { snd_es1968_new_memory() 1369 mutex_unlock(&chip->memory_mutex); snd_es1968_new_memory() 1376 mutex_unlock(&chip->memory_mutex); snd_es1968_new_memory() 1388 mutex_unlock(&chip->memory_mutex); snd_es1968_new_memory() 1393 static void snd_es1968_free_memory(struct es1968 *chip, struct esm_memory *buf) snd_es1968_free_memory() argument 1397 mutex_lock(&chip->memory_mutex); snd_es1968_free_memory() 1399 if (buf->list.prev != &chip->buf_list) { snd_es1968_free_memory() 1408 if (buf->list.next != &chip->buf_list) { snd_es1968_free_memory() 1416 mutex_unlock(&chip->memory_mutex); snd_es1968_free_memory() 1419 static void snd_es1968_free_dmabuf(struct es1968 *chip) snd_es1968_free_dmabuf() argument 1423 if (! chip->dma.area) snd_es1968_free_dmabuf() 1425 snd_dma_free_pages(&chip->dma); snd_es1968_free_dmabuf() 1426 while ((p = chip->buf_list.next) != &chip->buf_list) { snd_es1968_free_dmabuf() 1434 snd_es1968_init_dmabuf(struct es1968 *chip) snd_es1968_init_dmabuf() argument 1439 chip->dma.dev.type = SNDRV_DMA_TYPE_DEV; snd_es1968_init_dmabuf() 1440 chip->dma.dev.dev = snd_dma_pci_data(chip->pci); snd_es1968_init_dmabuf() 1442 snd_dma_pci_data(chip->pci), snd_es1968_init_dmabuf() 1443 chip->total_bufsize, &chip->dma); snd_es1968_init_dmabuf() 1444 if (err < 0 || ! chip->dma.area) { snd_es1968_init_dmabuf() 1445 dev_err(chip->card->dev, snd_es1968_init_dmabuf() 1447 chip->total_bufsize); snd_es1968_init_dmabuf() 1450 if ((chip->dma.addr + chip->dma.bytes - 1) & ~((1 << 28) - 1)) { snd_es1968_init_dmabuf() 1451 snd_dma_free_pages(&chip->dma); snd_es1968_init_dmabuf() 1452 dev_err(chip->card->dev, "DMA buffer beyond 256MB.\n"); snd_es1968_init_dmabuf() 1456 INIT_LIST_HEAD(&chip->buf_list); snd_es1968_init_dmabuf() 1460 snd_es1968_free_dmabuf(chip); snd_es1968_init_dmabuf() 1463 memset(chip->dma.area, 0, ESM_MEM_ALIGN); snd_es1968_init_dmabuf() 1464 chunk->buf = chip->dma; snd_es1968_init_dmabuf() 1469 list_add(&chunk->list, &chip->buf_list); snd_es1968_init_dmabuf() 1479 struct es1968 *chip = snd_pcm_substream_chip(substream); snd_es1968_hw_params() local 1489 snd_es1968_free_memory(chip, chan->memory); snd_es1968_hw_params() 1491 chan->memory = snd_es1968_new_memory(chip, size); snd_es1968_hw_params() 1493 dev_dbg(chip->card->dev, snd_es1968_hw_params() 1504 struct es1968 *chip = snd_pcm_substream_chip(substream); snd_es1968_hw_free() local 1512 snd_es1968_free_memory(chip, chan->memory); snd_es1968_hw_free() 1522 static int snd_es1968_alloc_apu_pair(struct es1968 *chip, int type) snd_es1968_alloc_apu_pair() argument 1527 if (chip->apu[apu] == ESM_APU_FREE && snd_es1968_alloc_apu_pair() 1528 chip->apu[apu + 1] == ESM_APU_FREE) { snd_es1968_alloc_apu_pair() 1529 chip->apu[apu] = chip->apu[apu + 1] = type; snd_es1968_alloc_apu_pair() 1539 static void snd_es1968_free_apu_pair(struct es1968 *chip, int apu) snd_es1968_free_apu_pair() argument 1541 chip->apu[apu] = chip->apu[apu + 1] = ESM_APU_FREE; snd_es1968_free_apu_pair() 1551 struct es1968 *chip = snd_pcm_substream_chip(substream); snd_es1968_playback_open() local 1557 apu1 = snd_es1968_alloc_apu_pair(chip, ESM_APU_PCM_PLAY); snd_es1968_playback_open() 1563 snd_es1968_free_apu_pair(chip, apu1); snd_es1968_playback_open() 1578 calc_available_memory_size(chip); snd_es1968_playback_open() 1580 spin_lock_irq(&chip->substream_lock); snd_es1968_playback_open() 1581 list_add(&es->list, &chip->substream_list); snd_es1968_playback_open() 1582 spin_unlock_irq(&chip->substream_lock); snd_es1968_playback_open() 1590 struct es1968 *chip = snd_pcm_substream_chip(substream); snd_es1968_capture_open() local 1594 apu1 = snd_es1968_alloc_apu_pair(chip, ESM_APU_PCM_CAPTURE); snd_es1968_capture_open() 1597 apu2 = snd_es1968_alloc_apu_pair(chip, ESM_APU_PCM_RATECONV); snd_es1968_capture_open() 1599 snd_es1968_free_apu_pair(chip, apu1); snd_es1968_capture_open() 1605 snd_es1968_free_apu_pair(chip, apu1); snd_es1968_capture_open() 1606 snd_es1968_free_apu_pair(chip, apu2); snd_es1968_capture_open() 1623 if ((es->mixbuf = snd_es1968_new_memory(chip, ESM_MIXBUF_SIZE)) == NULL) { snd_es1968_capture_open() 1624 snd_es1968_free_apu_pair(chip, apu1); snd_es1968_capture_open() 1625 snd_es1968_free_apu_pair(chip, apu2); snd_es1968_capture_open() 1634 calc_available_memory_size(chip) - 1024; /* keep MIXBUF size */ snd_es1968_capture_open() 1637 spin_lock_irq(&chip->substream_lock); snd_es1968_capture_open() 1638 list_add(&es->list, &chip->substream_list); snd_es1968_capture_open() 1639 spin_unlock_irq(&chip->substream_lock); snd_es1968_capture_open() 1646 struct es1968 *chip = snd_pcm_substream_chip(substream); snd_es1968_playback_close() local 1652 spin_lock_irq(&chip->substream_lock); snd_es1968_playback_close() 1654 spin_unlock_irq(&chip->substream_lock); snd_es1968_playback_close() 1655 snd_es1968_free_apu_pair(chip, es->apu[0]); snd_es1968_playback_close() 1663 struct es1968 *chip = snd_pcm_substream_chip(substream); snd_es1968_capture_close() local 1669 spin_lock_irq(&chip->substream_lock); snd_es1968_capture_close() 1671 spin_unlock_irq(&chip->substream_lock); snd_es1968_capture_close() 1672 snd_es1968_free_memory(chip, es->mixbuf); snd_es1968_capture_close() 1673 snd_es1968_free_apu_pair(chip, es->apu[0]); snd_es1968_capture_close() 1674 snd_es1968_free_apu_pair(chip, es->apu[2]); snd_es1968_capture_close() 1708 static void es1968_measure_clock(struct es1968 *chip) es1968_measure_clock() argument 1716 if (chip->clock == 0) es1968_measure_clock() 1717 chip->clock = 48000; /* default clock value */ es1968_measure_clock() 1720 if ((apu = snd_es1968_alloc_apu_pair(chip, ESM_APU_PCM_PLAY)) < 0) { es1968_measure_clock() 1721 dev_err(chip->card->dev, "Hmm, cannot find empty APU pair!?\n"); es1968_measure_clock() 1724 if ((memory = snd_es1968_new_memory(chip, CLOCK_MEASURE_BUFSIZE)) == NULL) { es1968_measure_clock() 1725 dev_warn(chip->card->dev, es1968_measure_clock() 1727 chip->clock); es1968_measure_clock() 1728 snd_es1968_free_apu_pair(chip, apu); es1968_measure_clock() 1734 wave_set_register(chip, apu << 3, (memory->buf.addr - 0x10) & 0xfff8); es1968_measure_clock() 1736 pa = (unsigned int)((memory->buf.addr - chip->dma.addr) >> 1); es1968_measure_clock() 1741 apu_set_register(chip, apu, i, 0x0000); es1968_measure_clock() 1743 apu_set_register(chip, apu, 0, 0x400f); es1968_measure_clock() 1744 apu_set_register(chip, apu, 4, ((pa >> 16) & 0xff) << 8); es1968_measure_clock() 1745 apu_set_register(chip, apu, 5, pa & 0xffff); es1968_measure_clock() 1746 apu_set_register(chip, apu, 6, (pa + CLOCK_MEASURE_BUFSIZE/2) & 0xffff); es1968_measure_clock() 1747 apu_set_register(chip, apu, 7, CLOCK_MEASURE_BUFSIZE/2); es1968_measure_clock() 1748 apu_set_register(chip, apu, 8, 0x0000); es1968_measure_clock() 1749 apu_set_register(chip, apu, 9, 0xD000); es1968_measure_clock() 1750 apu_set_register(chip, apu, 10, 0x8F08); es1968_measure_clock() 1751 apu_set_register(chip, apu, 11, 0x0000); es1968_measure_clock() 1752 spin_lock_irq(&chip->reg_lock); es1968_measure_clock() 1753 outw(1, chip->io_port + 0x04); /* clear WP interrupts */ es1968_measure_clock() 1754 outw(inw(chip->io_port + ESM_PORT_HOST_IRQ) | ESM_HIRQ_DSIE, chip->io_port + ESM_PORT_HOST_IRQ); /* enable WP ints */ es1968_measure_clock() 1755 spin_unlock_irq(&chip->reg_lock); es1968_measure_clock() 1757 snd_es1968_apu_set_freq(chip, apu, ((unsigned int)48000 << 16) / chip->clock); /* 48000 Hz */ es1968_measure_clock() 1759 chip->in_measurement = 1; es1968_measure_clock() 1760 chip->measure_apu = apu; es1968_measure_clock() 1761 spin_lock_irq(&chip->reg_lock); es1968_measure_clock() 1762 snd_es1968_bob_inc(chip, ESM_BOB_FREQ); es1968_measure_clock() 1763 __apu_set_register(chip, apu, 5, pa & 0xffff); es1968_measure_clock() 1764 snd_es1968_trigger_apu(chip, apu, ESM_APU_16BITLINEAR); es1968_measure_clock() 1766 spin_unlock_irq(&chip->reg_lock); es1968_measure_clock() 1768 spin_lock_irq(&chip->reg_lock); es1968_measure_clock() 1769 offset = __apu_get_register(chip, apu, 5); es1968_measure_clock() 1771 snd_es1968_trigger_apu(chip, apu, 0); /* stop */ es1968_measure_clock() 1772 snd_es1968_bob_dec(chip); es1968_measure_clock() 1773 chip->in_measurement = 0; es1968_measure_clock() 1774 spin_unlock_irq(&chip->reg_lock); es1968_measure_clock() 1779 offset += chip->measure_count * (CLOCK_MEASURE_BUFSIZE/2); es1968_measure_clock() 1784 dev_err(chip->card->dev, "?? calculation error..\n"); es1968_measure_clock() 1790 chip->clock = (chip->clock * offset) / 48000; es1968_measure_clock() 1792 dev_info(chip->card->dev, "clocking to %d\n", chip->clock); es1968_measure_clock() 1794 snd_es1968_free_memory(chip, memory); es1968_measure_clock() 1795 snd_es1968_free_apu_pair(chip, apu); es1968_measure_clock() 1810 snd_es1968_pcm(struct es1968 *chip, int device) snd_es1968_pcm() argument 1816 if ((err = snd_es1968_init_dmabuf(chip)) < 0) snd_es1968_pcm() 1820 wave_set_register(chip, 0x01FC, chip->dma.addr >> 12); snd_es1968_pcm() 1821 wave_set_register(chip, 0x01FD, chip->dma.addr >> 12); snd_es1968_pcm() 1822 wave_set_register(chip, 0x01FE, chip->dma.addr >> 12); snd_es1968_pcm() 1823 wave_set_register(chip, 0x01FF, chip->dma.addr >> 12); snd_es1968_pcm() 1825 if ((err = snd_pcm_new(chip->card, "ESS Maestro", device, snd_es1968_pcm() 1826 chip->playback_streams, snd_es1968_pcm() 1827 chip->capture_streams, &pcm)) < 0) snd_es1968_pcm() 1830 pcm->private_data = chip; snd_es1968_pcm() 1840 chip->pcm = pcm; snd_es1968_pcm() 1847 static void snd_es1968_suppress_jitter(struct es1968 *chip, struct esschan *es) snd_es1968_suppress_jitter() argument 1853 cp1 = __apu_get_register(chip, 0, 5); snd_es1968_suppress_jitter() 1854 cp2 = __apu_get_register(chip, 1, 5); snd_es1968_suppress_jitter() 1858 __maestro_write(chip, IDR0_DATA_PORT, cp1); snd_es1968_suppress_jitter() 1864 static void snd_es1968_update_pcm(struct es1968 *chip, struct esschan *es) snd_es1968_update_pcm() argument 1873 hwptr = snd_es1968_get_dma_ptr(chip, es) << es->wav_shift; snd_es1968_update_pcm() 1882 spin_unlock(&chip->substream_lock); snd_es1968_update_pcm() 1884 spin_lock(&chip->substream_lock); snd_es1968_update_pcm() 1895 struct es1968 *chip = container_of(work, struct es1968, hwvol_work); es1968_update_hw_volume() local 1901 x = inb(chip->io_port + 0x1c) & 0xee; es1968_update_hw_volume() 1903 outb(0x88, chip->io_port + 0x1c); es1968_update_hw_volume() 1904 outb(0x88, chip->io_port + 0x1d); es1968_update_hw_volume() 1905 outb(0x88, chip->io_port + 0x1e); es1968_update_hw_volume() 1906 outb(0x88, chip->io_port + 0x1f); es1968_update_hw_volume() 1908 if (chip->in_suspend) es1968_update_hw_volume() 1912 if (! chip->master_switch || ! chip->master_volume) es1968_update_hw_volume() 1915 val = snd_ac97_read(chip->ac97, AC97_MASTER); es1968_update_hw_volume() 1936 if (snd_ac97_update(chip->ac97, AC97_MASTER, val)) es1968_update_hw_volume() 1937 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, es1968_update_hw_volume() 1938 &chip->master_volume->id); es1968_update_hw_volume() 1940 if (!chip->input_dev) es1968_update_hw_volume() 1962 input_report_key(chip->input_dev, val, 1); es1968_update_hw_volume() 1963 input_sync(chip->input_dev); es1968_update_hw_volume() 1964 input_report_key(chip->input_dev, val, 0); es1968_update_hw_volume() 1965 input_sync(chip->input_dev); es1968_update_hw_volume() 1975 struct es1968 *chip = dev_id; snd_es1968_interrupt() local 1978 if (!(event = inb(chip->io_port + 0x1A))) snd_es1968_interrupt() 1981 outw(inw(chip->io_port + 4) & 1, chip->io_port + 4); snd_es1968_interrupt() 1984 schedule_work(&chip->hwvol_work); snd_es1968_interrupt() 1987 outb(0xFF, chip->io_port + 0x1A); snd_es1968_interrupt() 1989 if ((event & ESM_MPU401_IRQ) && chip->rmidi) { snd_es1968_interrupt() 1990 snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data); snd_es1968_interrupt() 1995 spin_lock(&chip->substream_lock); snd_es1968_interrupt() 1996 list_for_each_entry(es, &chip->substream_list, list) { snd_es1968_interrupt() 1998 snd_es1968_update_pcm(chip, es); snd_es1968_interrupt() 2000 snd_es1968_suppress_jitter(chip, es); snd_es1968_interrupt() 2003 spin_unlock(&chip->substream_lock); snd_es1968_interrupt() 2004 if (chip->in_measurement) { snd_es1968_interrupt() 2005 unsigned int curp = __apu_get_register(chip, chip->measure_apu, 5); snd_es1968_interrupt() 2006 if (curp < chip->measure_lastpos) snd_es1968_interrupt() 2007 chip->measure_count++; snd_es1968_interrupt() 2008 chip->measure_lastpos = curp; snd_es1968_interrupt() 2020 snd_es1968_mixer(struct es1968 *chip) snd_es1968_mixer() argument 2033 if ((err = snd_ac97_bus(chip->card, 0, &ops, NULL, &pbus)) < 0) snd_es1968_mixer() 2038 ac97.private_data = chip; snd_es1968_mixer() 2039 if ((err = snd_ac97_mixer(pbus, &ac97, &chip->ac97)) < 0) snd_es1968_mixer() 2047 chip->master_switch = snd_ctl_find_id(chip->card, &elem_id); snd_es1968_mixer() 2051 chip->master_volume = snd_ctl_find_id(chip->card, &elem_id); snd_es1968_mixer() 2061 static void snd_es1968_ac97_reset(struct es1968 *chip) snd_es1968_ac97_reset() argument 2063 unsigned long ioaddr = chip->io_port; snd_es1968_ac97_reset() 2081 pci_read_config_word(chip->pci, 0x58, &w); /* something magical with gpio and bus arb. */ snd_es1968_ac97_reset() 2082 pci_read_config_dword(chip->pci, PCI_SUBSYSTEM_VENDOR_ID, &vend); snd_es1968_ac97_reset() 2112 dev_info(chip->card->dev, "trying software reset\n"); snd_es1968_ac97_reset() 2154 /* Turn on the 978 docking chip. snd_es1968_ac97_reset() 2166 static void snd_es1968_reset(struct es1968 *chip) snd_es1968_reset() argument 2170 chip->io_port + ESM_PORT_HOST_IRQ); snd_es1968_reset() 2172 outw(0x0000, chip->io_port + ESM_PORT_HOST_IRQ); snd_es1968_reset() 2177 * initialize maestro chip 2179 static void snd_es1968_chip_init(struct es1968 *chip) snd_es1968_chip_init() argument 2181 struct pci_dev *pci = chip->pci; snd_es1968_chip_init() 2183 unsigned long iobase = chip->io_port; snd_es1968_chip_init() 2252 /* Set up 978 docking control chip. */ snd_es1968_chip_init() 2261 snd_es1968_reset(chip); snd_es1968_chip_init() 2267 /* setup usual 0x34 stuff.. 0x36 may be chip specific */ snd_es1968_chip_init() 2277 snd_es1968_ac97_reset(chip); snd_es1968_chip_init() 2313 wave_set_register(chip, IDR7_WAVE_ROMRAM, snd_es1968_chip_init() 2314 (wave_get_register(chip, IDR7_WAVE_ROMRAM) & 0xFF00)); snd_es1968_chip_init() 2315 wave_set_register(chip, IDR7_WAVE_ROMRAM, snd_es1968_chip_init() 2316 wave_get_register(chip, IDR7_WAVE_ROMRAM) | 0x100); snd_es1968_chip_init() 2317 wave_set_register(chip, IDR7_WAVE_ROMRAM, snd_es1968_chip_init() 2318 wave_get_register(chip, IDR7_WAVE_ROMRAM) & ~0x200); snd_es1968_chip_init() 2319 wave_set_register(chip, IDR7_WAVE_ROMRAM, snd_es1968_chip_init() 2320 wave_get_register(chip, IDR7_WAVE_ROMRAM) | ~0x400); snd_es1968_chip_init() 2323 maestro_write(chip, IDR2_CRAM_DATA, 0x0000); snd_es1968_chip_init() 2326 maestro_write(chip, 0x08, 0xB004); snd_es1968_chip_init() 2327 maestro_write(chip, 0x09, 0x001B); snd_es1968_chip_init() 2328 maestro_write(chip, 0x0A, 0x8000); snd_es1968_chip_init() 2329 maestro_write(chip, 0x0B, 0x3F37); snd_es1968_chip_init() 2330 maestro_write(chip, 0x0C, 0x0098); snd_es1968_chip_init() 2333 maestro_write(chip, 0x0C, snd_es1968_chip_init() 2334 (maestro_read(chip, 0x0C) & ~0xF000) | 0x8000); snd_es1968_chip_init() 2336 maestro_write(chip, 0x0C, snd_es1968_chip_init() 2337 (maestro_read(chip, 0x0C) & ~0x0F00) | 0x0500); snd_es1968_chip_init() 2339 maestro_write(chip, 0x0D, 0x7632); snd_es1968_chip_init() 2364 apu_set_register(chip, i, w, 0); snd_es1968_chip_init() 2370 static void snd_es1968_start_irq(struct es1968 *chip) snd_es1968_start_irq() argument 2374 if (chip->rmidi) snd_es1968_start_irq() 2376 outb(w, chip->io_port + 0x1A); snd_es1968_start_irq() 2377 outw(w, chip->io_port + ESM_PORT_HOST_IRQ); snd_es1968_start_irq() 2387 struct es1968 *chip = card->private_data; es1968_suspend() local 2389 if (! chip->do_pm) es1968_suspend() 2392 chip->in_suspend = 1; es1968_suspend() 2393 cancel_work_sync(&chip->hwvol_work); es1968_suspend() 2395 snd_pcm_suspend_all(chip->pcm); es1968_suspend() 2396 snd_ac97_suspend(chip->ac97); es1968_suspend() 2397 snd_es1968_bob_stop(chip); es1968_suspend() 2404 struct es1968 *chip = card->private_data; es1968_resume() local 2407 if (! chip->do_pm) es1968_resume() 2410 snd_es1968_chip_init(chip); es1968_resume() 2413 if (chip->dma.addr) { es1968_resume() 2415 wave_set_register(chip, 0x01FC, chip->dma.addr >> 12); es1968_resume() 2418 snd_es1968_start_irq(chip); es1968_resume() 2421 snd_ac97_resume(chip->ac97); es1968_resume() 2423 list_for_each_entry(es, &chip->substream_list, list) { es1968_resume() 2426 snd_es1968_playback_setup(chip, es, es->substream->runtime); es1968_resume() 2429 snd_es1968_capture_setup(chip, es, es->substream->runtime); es1968_resume() 2435 if (chip->bobclient) es1968_resume() 2436 snd_es1968_bob_start(chip); es1968_resume() 2439 chip->in_suspend = 0; es1968_resume() 2451 static int snd_es1968_create_gameport(struct es1968 *chip, int dev) snd_es1968_create_gameport() argument 2464 chip->gameport = gp = gameport_allocate_port(); snd_es1968_create_gameport() 2466 dev_err(chip->card->dev, snd_es1968_create_gameport() 2472 pci_read_config_word(chip->pci, ESM_LEGACY_AUDIO_CONTROL, &val); snd_es1968_create_gameport() 2473 pci_write_config_word(chip->pci, ESM_LEGACY_AUDIO_CONTROL, val | 0x04); snd_es1968_create_gameport() 2476 gameport_set_phys(gp, "pci%s/gameport0", pci_name(chip->pci)); snd_es1968_create_gameport() 2477 gameport_set_dev_parent(gp, &chip->pci->dev); snd_es1968_create_gameport() 2486 static void snd_es1968_free_gameport(struct es1968 *chip) snd_es1968_free_gameport() argument 2488 if (chip->gameport) { snd_es1968_free_gameport() 2489 struct resource *r = gameport_get_port_data(chip->gameport); snd_es1968_free_gameport() 2491 gameport_unregister_port(chip->gameport); snd_es1968_free_gameport() 2492 chip->gameport = NULL; snd_es1968_free_gameport() 2498 static inline int snd_es1968_create_gameport(struct es1968 *chip, int dev) { return -ENOSYS; } snd_es1968_free_gameport() argument 2499 static inline void snd_es1968_free_gameport(struct es1968 *chip) { } snd_es1968_free_gameport() argument 2503 static int snd_es1968_input_register(struct es1968 *chip) snd_es1968_input_register() argument 2512 snprintf(chip->phys, sizeof(chip->phys), "pci-%s/input0", snd_es1968_input_register() 2513 pci_name(chip->pci)); snd_es1968_input_register() 2515 input_dev->name = chip->card->driver; snd_es1968_input_register() 2516 input_dev->phys = chip->phys; snd_es1968_input_register() 2518 input_dev->id.vendor = chip->pci->vendor; snd_es1968_input_register() 2519 input_dev->id.product = chip->pci->device; snd_es1968_input_register() 2520 input_dev->dev.parent = &chip->pci->dev; snd_es1968_input_register() 2533 chip->input_dev = input_dev; snd_es1968_input_register() 2556 #define get_tea575x_gpio(chip) \ 2557 (&snd_es1968_tea575x_gpios[(chip)->tea575x_tuner]) 2562 struct es1968 *chip = tea->private_data; snd_es1968_tea575x_set_pins() local 2563 struct snd_es1968_tea575x_gpio gpio = *get_tea575x_gpio(chip); snd_es1968_tea575x_set_pins() 2570 outw(val, chip->io_port + GPIO_DATA); snd_es1968_tea575x_set_pins() 2575 struct es1968 *chip = tea->private_data; snd_es1968_tea575x_get_pins() local 2576 struct snd_es1968_tea575x_gpio gpio = *get_tea575x_gpio(chip); snd_es1968_tea575x_get_pins() 2577 u16 val = inw(chip->io_port + GPIO_DATA); snd_es1968_tea575x_get_pins() 2590 struct es1968 *chip = tea->private_data; snd_es1968_tea575x_set_direction() local 2591 unsigned long io = chip->io_port + GPIO_DATA; snd_es1968_tea575x_set_direction() 2593 struct snd_es1968_tea575x_gpio gpio = *get_tea575x_gpio(chip); snd_es1968_tea575x_set_direction() 2615 static int snd_es1968_free(struct es1968 *chip) snd_es1968_free() argument 2617 cancel_work_sync(&chip->hwvol_work); snd_es1968_free() 2619 if (chip->input_dev) snd_es1968_free() 2620 input_unregister_device(chip->input_dev); snd_es1968_free() 2623 if (chip->io_port) { snd_es1968_free() 2624 if (chip->irq >= 0) snd_es1968_free() 2625 synchronize_irq(chip->irq); snd_es1968_free() 2626 outw(1, chip->io_port + 0x04); /* clear WP interrupts */ snd_es1968_free() 2627 outw(0, chip->io_port + ESM_PORT_HOST_IRQ); /* disable IRQ */ snd_es1968_free() 2631 snd_tea575x_exit(&chip->tea); snd_es1968_free() 2632 v4l2_device_unregister(&chip->v4l2_dev); snd_es1968_free() 2635 if (chip->irq >= 0) snd_es1968_free() 2636 free_irq(chip->irq, chip); snd_es1968_free() 2637 snd_es1968_free_gameport(chip); snd_es1968_free() 2638 pci_release_regions(chip->pci); snd_es1968_free() 2639 pci_disable_device(chip->pci); snd_es1968_free() 2640 kfree(chip); snd_es1968_free() 2646 struct es1968 *chip = device->device_data; snd_es1968_dev_free() local 2647 return snd_es1968_free(chip); snd_es1968_dev_free() 2651 unsigned short type; /* chip type */ 2683 struct es1968 *chip; snd_es1968_create() local 2700 chip = kzalloc(sizeof(*chip), GFP_KERNEL); snd_es1968_create() 2701 if (! chip) { snd_es1968_create() 2707 chip->type = chip_type; snd_es1968_create() 2708 spin_lock_init(&chip->reg_lock); snd_es1968_create() 2709 spin_lock_init(&chip->substream_lock); snd_es1968_create() 2710 INIT_LIST_HEAD(&chip->buf_list); snd_es1968_create() 2711 INIT_LIST_HEAD(&chip->substream_list); snd_es1968_create() 2712 mutex_init(&chip->memory_mutex); snd_es1968_create() 2713 INIT_WORK(&chip->hwvol_work, es1968_update_hw_volume); snd_es1968_create() 2714 chip->card = card; snd_es1968_create() 2715 chip->pci = pci; snd_es1968_create() 2716 chip->irq = -1; snd_es1968_create() 2717 chip->total_bufsize = total_bufsize; /* in bytes */ snd_es1968_create() 2718 chip->playback_streams = play_streams; snd_es1968_create() 2719 chip->capture_streams = capt_streams; snd_es1968_create() 2722 kfree(chip); snd_es1968_create() 2726 chip->io_port = pci_resource_start(pci, 0); snd_es1968_create() 2728 KBUILD_MODNAME, chip)) { snd_es1968_create() 2730 snd_es1968_free(chip); snd_es1968_create() 2733 chip->irq = pci->irq; snd_es1968_create() 2737 chip->maestro_map[i] = 0; snd_es1968_create() 2741 chip->apu[i] = ESM_APU_FREE; snd_es1968_create() 2749 pci_read_config_word(chip->pci, PCI_SUBSYSTEM_VENDOR_ID, &vend); snd_es1968_create() 2751 if (chip->type == pm_whitelist[i].type && snd_es1968_create() 2763 chip->do_pm = do_pm; snd_es1968_create() 2765 snd_es1968_chip_init(chip); snd_es1968_create() 2767 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) { snd_es1968_create() 2768 snd_es1968_free(chip); snd_es1968_create() 2774 if (chip->pci->subsystem_vendor != 0x125d) snd_es1968_create() 2776 err = v4l2_device_register(&pci->dev, &chip->v4l2_dev); snd_es1968_create() 2778 snd_es1968_free(chip); snd_es1968_create() 2781 chip->tea.v4l2_dev = &chip->v4l2_dev; snd_es1968_create() 2782 chip->tea.private_data = chip; snd_es1968_create() 2783 chip->tea.radio_nr = radio_nr; snd_es1968_create() 2784 chip->tea.ops = &snd_es1968_tea_ops; snd_es1968_create() 2785 sprintf(chip->tea.bus_info, "PCI:%s", pci_name(pci)); snd_es1968_create() 2787 chip->tea575x_tuner = i; snd_es1968_create() 2788 if (!snd_tea575x_init(&chip->tea, THIS_MODULE)) { snd_es1968_create() 2790 get_tea575x_gpio(chip)->name); snd_es1968_create() 2791 strlcpy(chip->tea.card, get_tea575x_gpio(chip)->name, snd_es1968_create() 2792 sizeof(chip->tea.card)); snd_es1968_create() 2799 *chip_ret = chip; snd_es1968_create() 2812 struct es1968 *chip; snd_es1968_probe() local 2839 &chip)) < 0) { snd_es1968_probe() 2843 card->private_data = chip; snd_es1968_probe() 2845 switch (chip->type) { snd_es1968_probe() 2860 if ((err = snd_es1968_pcm(chip, 0)) < 0) { snd_es1968_probe() 2865 if ((err = snd_es1968_mixer(chip)) < 0) { snd_es1968_probe() 2873 pci_read_config_word(chip->pci, PCI_SUBSYSTEM_VENDOR_ID, &vend); snd_es1968_probe() 2875 if (chip->type == mpu_blacklist[i].type && snd_es1968_probe() 2884 chip->io_port + ESM_MPU401_PORT, snd_es1968_probe() 2887 -1, &chip->rmidi)) < 0) { snd_es1968_probe() 2892 snd_es1968_create_gameport(chip, dev); snd_es1968_probe() 2895 err = snd_es1968_input_register(chip); snd_es1968_probe() 2901 snd_es1968_start_irq(chip); snd_es1968_probe() 2903 chip->clock = clock[dev]; snd_es1968_probe() 2904 if (! chip->clock) snd_es1968_probe() 2905 es1968_measure_clock(chip); snd_es1968_probe() 2908 card->shortname, chip->io_port, chip->irq); snd_es1968_probe()
H A D	als300.c	165 static void snd_als300_set_irq_flag(struct snd_als300 *chip, int cmd) snd_als300_set_irq_flag() argument 167 u32 tmp = snd_als300_gcr_read(chip->port, MISC_CONTROL); snd_als300_set_irq_flag() 172 if (((chip->revision > 5 || chip->chip_type == DEVICE_ALS300_PLUS) ^ snd_als300_set_irq_flag() 177 snd_als300_gcr_write(chip->port, MISC_CONTROL, tmp); snd_als300_set_irq_flag() 180 static int snd_als300_free(struct snd_als300 *chip) snd_als300_free() argument 182 snd_als300_set_irq_flag(chip, IRQ_DISABLE); snd_als300_free() 183 if (chip->irq >= 0) snd_als300_free() 184 free_irq(chip->irq, chip); snd_als300_free() 185 pci_release_regions(chip->pci); snd_als300_free() 186 pci_disable_device(chip->pci); snd_als300_free() 187 kfree(chip); snd_als300_free() 193 struct snd_als300 *chip = device->device_data; snd_als300_dev_free() local 194 return snd_als300_free(chip); snd_als300_dev_free() 200 struct snd_als300 *chip = dev_id; snd_als300_interrupt() local 203 status = inb(chip->port+ALS300_IRQ_STATUS); snd_als300_interrupt() 208 outb(status, chip->port+ALS300_IRQ_STATUS); snd_als300_interrupt() 210 if (chip->pcm && chip->playback_substream) { snd_als300_interrupt() 211 data = chip->playback_substream->runtime->private_data; snd_als300_interrupt() 213 snd_pcm_period_elapsed(chip->playback_substream); snd_als300_interrupt() 218 if (chip->pcm && chip->capture_substream) { snd_als300_interrupt() 219 data = chip->capture_substream->runtime->private_data; snd_als300_interrupt() 221 snd_pcm_period_elapsed(chip->capture_substream); snd_als300_interrupt() 231 struct snd_als300 *chip = dev_id; snd_als300plus_interrupt() local 234 general = inb(chip->port+ALS300P_IRQ_STATUS); snd_als300plus_interrupt() 235 mpu = inb(chip->port+MPU_IRQ_STATUS); snd_als300plus_interrupt() 236 dram = inb(chip->port+ALS300P_DRAM_IRQ_STATUS); snd_als300plus_interrupt() 243 if (chip->pcm && chip->playback_substream) { snd_als300plus_interrupt() 244 outb(IRQ_PLAYBACK, chip->port+ALS300P_IRQ_STATUS); snd_als300plus_interrupt() 245 data = chip->playback_substream->runtime->private_data; snd_als300plus_interrupt() 247 snd_pcm_period_elapsed(chip->playback_substream); snd_als300plus_interrupt() 252 if (chip->pcm && chip->capture_substream) { snd_als300plus_interrupt() 253 outb(IRQ_CAPTURE, chip->port+ALS300P_IRQ_STATUS); snd_als300plus_interrupt() 254 data = chip->capture_substream->runtime->private_data; snd_als300plus_interrupt() 256 snd_pcm_period_elapsed(chip->capture_substream); snd_als300plus_interrupt() 274 struct snd_als300 *chip = ac97->private_data; snd_als300_ac97_read() local 277 if ((inb(chip->port+AC97_STATUS) & (AC97_BUSY)) == 0) snd_als300_ac97_read() 281 outl((reg << 24) | (1 << 31), chip->port+AC97_ACCESS); snd_als300_ac97_read() 284 if ((inb(chip->port+AC97_STATUS) & (AC97_DATA_AVAIL)) != 0) snd_als300_ac97_read() 288 return inw(chip->port+AC97_READ); snd_als300_ac97_read() 295 struct snd_als300 *chip = ac97->private_data; snd_als300_ac97_write() local 298 if ((inb(chip->port+AC97_STATUS) & (AC97_BUSY)) == 0) snd_als300_ac97_write() 302 outl((reg << 24) | val, chip->port+AC97_ACCESS); snd_als300_ac97_write() 305 static int snd_als300_ac97(struct snd_als300 *chip) snd_als300_ac97() argument 315 if ((err = snd_ac97_bus(chip->card, 0, &ops, NULL, &bus)) < 0) snd_als300_ac97() 319 ac97.private_data = chip; snd_als300_ac97() 321 return snd_ac97_mixer(bus, &ac97, &chip->ac97); snd_als300_ac97() 371 struct snd_als300 *chip = snd_pcm_substream_chip(substream); snd_als300_playback_open() local 378 chip->playback_substream = substream; snd_als300_playback_open() 388 struct snd_als300 *chip = snd_pcm_substream_chip(substream); snd_als300_playback_close() local 393 chip->playback_substream = NULL; snd_als300_playback_close() 400 struct snd_als300 *chip = snd_pcm_substream_chip(substream); snd_als300_capture_open() local 407 chip->capture_substream = substream; snd_als300_capture_open() 417 struct snd_als300 *chip = snd_pcm_substream_chip(substream); snd_als300_capture_close() local 422 chip->capture_substream = NULL; snd_als300_capture_close() 442 struct snd_als300 *chip = snd_pcm_substream_chip(substream); snd_als300_playback_prepare() local 447 spin_lock_irq(&chip->reg_lock); snd_als300_playback_prepare() 448 tmp = snd_als300_gcr_read(chip->port, PLAYBACK_CONTROL); snd_als300_playback_prepare() 457 snd_als300_gcr_write(chip->port, PLAYBACK_CONTROL, tmp); snd_als300_playback_prepare() 460 snd_als300_gcr_write(chip->port, PLAYBACK_START, snd_als300_playback_prepare() 462 snd_als300_gcr_write(chip->port, PLAYBACK_END, snd_als300_playback_prepare() 464 spin_unlock_irq(&chip->reg_lock); snd_als300_playback_prepare() 471 struct snd_als300 *chip = snd_pcm_substream_chip(substream); snd_als300_capture_prepare() local 476 spin_lock_irq(&chip->reg_lock); snd_als300_capture_prepare() 477 tmp = snd_als300_gcr_read(chip->port, RECORD_CONTROL); snd_als300_capture_prepare() 488 snd_als300_gcr_write(chip->port, RECORD_CONTROL, tmp); snd_als300_capture_prepare() 489 snd_als300_gcr_write(chip->port, RECORD_START, snd_als300_capture_prepare() 491 snd_als300_gcr_write(chip->port, RECORD_END, snd_als300_capture_prepare() 493 spin_unlock_irq(&chip->reg_lock); snd_als300_capture_prepare() 499 struct snd_als300 *chip = snd_pcm_substream_chip(substream); snd_als300_trigger() local 508 spin_lock(&chip->reg_lock); snd_als300_trigger() 512 tmp = snd_als300_gcr_read(chip->port, reg); snd_als300_trigger() 514 snd_als300_gcr_write(chip->port, reg, tmp | TRANSFER_START); snd_als300_trigger() 519 tmp = snd_als300_gcr_read(chip->port, reg); snd_als300_trigger() 520 snd_als300_gcr_write(chip->port, reg, tmp & ~TRANSFER_START); snd_als300_trigger() 524 tmp = snd_als300_gcr_read(chip->port, reg); snd_als300_trigger() 525 snd_als300_gcr_write(chip->port, reg, tmp | FIFO_PAUSE); snd_als300_trigger() 529 tmp = snd_als300_gcr_read(chip->port, reg); snd_als300_trigger() 530 snd_als300_gcr_write(chip->port, reg, tmp & ~FIFO_PAUSE); snd_als300_trigger() 537 spin_unlock(&chip->reg_lock); snd_als300_trigger() 544 struct snd_als300 *chip = snd_pcm_substream_chip(substream); snd_als300_pointer() local 551 spin_lock(&chip->reg_lock); snd_als300_pointer() 552 current_ptr = (u16) snd_als300_gcr_read(chip->port, snd_als300_pointer() 554 spin_unlock(&chip->reg_lock); snd_als300_pointer() 588 static int snd_als300_new_pcm(struct snd_als300 *chip) snd_als300_new_pcm() argument 593 err = snd_pcm_new(chip->card, "ALS300", 0, 1, 1, &pcm); snd_als300_new_pcm() 596 pcm->private_data = chip; snd_als300_new_pcm() 598 chip->pcm = pcm; snd_als300_new_pcm() 608 snd_dma_pci_data(chip->pci), 64*1024, 64*1024); snd_als300_new_pcm() 612 static void snd_als300_init(struct snd_als300 *chip) snd_als300_init() argument 617 spin_lock_irqsave(&chip->reg_lock, flags); snd_als300_init() 618 chip->revision = (snd_als300_gcr_read(chip->port, MISC_CONTROL) >> 16) snd_als300_init() 621 tmp = snd_als300_gcr_read(chip->port, DRAM_WRITE_CONTROL); snd_als300_init() 622 snd_als300_gcr_write(chip->port, DRAM_WRITE_CONTROL, snd_als300_init() 627 snd_als300_set_irq_flag(chip, IRQ_ENABLE); snd_als300_init() 631 tmp = snd_als300_gcr_read(chip->port, MISC_CONTROL); snd_als300_init() 632 snd_als300_gcr_write(chip->port, MISC_CONTROL, snd_als300_init() 636 snd_als300_gcr_write(chip->port, MUS_VOC_VOL, 0); snd_als300_init() 639 tmp = snd_als300_gcr_read(chip->port, PLAYBACK_CONTROL); snd_als300_init() 640 snd_als300_gcr_write(chip->port, PLAYBACK_CONTROL, snd_als300_init() 642 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_als300_init() 649 struct snd_als300 *chip; snd_als300_create() local 669 chip = kzalloc(sizeof(*chip), GFP_KERNEL); snd_als300_create() 670 if (chip == NULL) { snd_als300_create() 675 chip->card = card; snd_als300_create() 676 chip->pci = pci; snd_als300_create() 677 chip->irq = -1; snd_als300_create() 678 chip->chip_type = chip_type; snd_als300_create() 679 spin_lock_init(&chip->reg_lock); snd_als300_create() 682 kfree(chip); snd_als300_create() 686 chip->port = pci_resource_start(pci, 0); snd_als300_create() 688 if (chip->chip_type == DEVICE_ALS300_PLUS) snd_als300_create() 694 KBUILD_MODNAME, chip)) { snd_als300_create() 696 snd_als300_free(chip); snd_als300_create() 699 chip->irq = pci->irq; snd_als300_create() 702 snd_als300_init(chip); snd_als300_create() 704 err = snd_als300_ac97(chip); snd_als300_create() 707 snd_als300_free(chip); snd_als300_create() 711 if ((err = snd_als300_new_pcm(chip)) < 0) { snd_als300_create() 713 snd_als300_free(chip); snd_als300_create() 718 chip, &ops)) < 0) { snd_als300_create() 719 snd_als300_free(chip); snd_als300_create() 723 *rchip = chip; snd_als300_create() 731 struct snd_als300 *chip = card->private_data; snd_als300_suspend() local 734 snd_pcm_suspend_all(chip->pcm); snd_als300_suspend() 735 snd_ac97_suspend(chip->ac97); snd_als300_suspend() 742 struct snd_als300 *chip = card->private_data; snd_als300_resume() local 744 snd_als300_init(chip); snd_als300_resume() 745 snd_ac97_resume(chip->ac97); snd_als300_resume() 762 struct snd_als300 *chip; snd_als300_probe() local 780 if ((err = snd_als300_create(card, pci, chip_type, &chip)) < 0) { snd_als300_probe() 784 card->private_data = chip; snd_als300_probe() 787 if (chip->chip_type == DEVICE_ALS300_PLUS) snd_als300_probe() 790 sprintf(card->shortname, "ALS300+ (Rev. %d)", chip->revision); snd_als300_probe() 793 chip->revision - 1); snd_als300_probe() 795 card->shortname, chip->port, chip->irq); snd_als300_probe()
H A D	intel8x0.c	279 /* interrupts for the whole chip by interrupt status register finish */ 466 static inline u8 igetbyte(struct intel8x0 *chip, u32 offset) igetbyte() argument 468 return ioread8(chip->bmaddr + offset); igetbyte() 471 static inline u16 igetword(struct intel8x0 *chip, u32 offset) igetword() argument 473 return ioread16(chip->bmaddr + offset); igetword() 476 static inline u32 igetdword(struct intel8x0 *chip, u32 offset) igetdword() argument 478 return ioread32(chip->bmaddr + offset); igetdword() 481 static inline void iputbyte(struct intel8x0 *chip, u32 offset, u8 val) iputbyte() argument 483 iowrite8(val, chip->bmaddr + offset); iputbyte() 486 static inline void iputword(struct intel8x0 *chip, u32 offset, u16 val) iputword() argument 488 iowrite16(val, chip->bmaddr + offset); iputword() 491 static inline void iputdword(struct intel8x0 *chip, u32 offset, u32 val) iputdword() argument 493 iowrite32(val, chip->bmaddr + offset); iputdword() 500 static inline u16 iagetword(struct intel8x0 *chip, u32 offset) iagetword() argument 502 return ioread16(chip->addr + offset); iagetword() 505 static inline void iaputword(struct intel8x0 *chip, u32 offset, u16 val) iaputword() argument 507 iowrite16(val, chip->addr + offset); iaputword() 518 static int snd_intel8x0_codec_semaphore(struct intel8x0 *chip, unsigned int codec) snd_intel8x0_codec_semaphore() argument 524 if (chip->in_sdin_init) { snd_intel8x0_codec_semaphore() 527 codec = chip->codec_isr_bits; snd_intel8x0_codec_semaphore() 529 codec = chip->codec_bit[chip->ac97_sdin[codec]]; snd_intel8x0_codec_semaphore() 533 if ((igetdword(chip, ICHREG(GLOB_STA)) & codec) == 0) snd_intel8x0_codec_semaphore() 536 if (chip->buggy_semaphore) snd_intel8x0_codec_semaphore() 542 if (!(igetbyte(chip, ICHREG(ACC_SEMA)) & ICH_CAS)) snd_intel8x0_codec_semaphore() 550 dev_err(chip->card->dev, snd_intel8x0_codec_semaphore() 552 igetbyte(chip, ICHREG(ACC_SEMA)), igetdword(chip, ICHREG(GLOB_STA))); snd_intel8x0_codec_semaphore() 553 iagetword(chip, 0); /* clear semaphore flag */ snd_intel8x0_codec_semaphore() 562 struct intel8x0 *chip = ac97->private_data; snd_intel8x0_codec_write() local 564 if (snd_intel8x0_codec_semaphore(chip, ac97->num) < 0) { snd_intel8x0_codec_write() 565 if (! chip->in_ac97_init) snd_intel8x0_codec_write() 566 dev_err(chip->card->dev, snd_intel8x0_codec_write() 570 iaputword(chip, reg + ac97->num * 0x80, val); snd_intel8x0_codec_write() 576 struct intel8x0 *chip = ac97->private_data; snd_intel8x0_codec_read() local 580 if (snd_intel8x0_codec_semaphore(chip, ac97->num) < 0) { snd_intel8x0_codec_read() 581 if (! chip->in_ac97_init) snd_intel8x0_codec_read() 582 dev_err(chip->card->dev, snd_intel8x0_codec_read() 587 res = iagetword(chip, reg + ac97->num * 0x80); snd_intel8x0_codec_read() 588 if ((tmp = igetdword(chip, ICHREG(GLOB_STA))) & ICH_RCS) { snd_intel8x0_codec_read() 590 iputdword(chip, ICHREG(GLOB_STA), tmp & snd_intel8x0_codec_read() 591 ~(chip->codec_ready_bits | ICH_GSCI)); snd_intel8x0_codec_read() 592 if (! chip->in_ac97_init) snd_intel8x0_codec_read() 593 dev_err(chip->card->dev, snd_intel8x0_codec_read() 602 static void snd_intel8x0_codec_read_test(struct intel8x0 *chip, snd_intel8x0_codec_read_test() argument 607 if (snd_intel8x0_codec_semaphore(chip, codec) >= 0) { snd_intel8x0_codec_read_test() 608 iagetword(chip, codec * 0x80); snd_intel8x0_codec_read_test() 609 if ((tmp = igetdword(chip, ICHREG(GLOB_STA))) & ICH_RCS) { snd_intel8x0_codec_read_test() 611 iputdword(chip, ICHREG(GLOB_STA), tmp & snd_intel8x0_codec_read_test() 612 ~(chip->codec_ready_bits | ICH_GSCI)); snd_intel8x0_codec_read_test() 620 static int snd_intel8x0_ali_codec_ready(struct intel8x0 *chip, int mask) snd_intel8x0_ali_codec_ready() argument 624 int val = igetbyte(chip, ICHREG(ALI_CSPSR)); snd_intel8x0_ali_codec_ready() 628 if (! chip->in_ac97_init) snd_intel8x0_ali_codec_ready() 629 dev_warn(chip->card->dev, "AC97 codec ready timeout.\n"); snd_intel8x0_ali_codec_ready() 633 static int snd_intel8x0_ali_codec_semaphore(struct intel8x0 *chip) snd_intel8x0_ali_codec_semaphore() argument 636 if (chip->buggy_semaphore) snd_intel8x0_ali_codec_semaphore() 638 while (--time && (igetdword(chip, ICHREG(ALI_CAS)) & ALI_CAS_SEM_BUSY)) snd_intel8x0_ali_codec_semaphore() 640 if (! time && ! chip->in_ac97_init) snd_intel8x0_ali_codec_semaphore() 641 dev_warn(chip->card->dev, "ali_codec_semaphore timeout\n"); snd_intel8x0_ali_codec_semaphore() 642 return snd_intel8x0_ali_codec_ready(chip, ALI_CSPSR_CODEC_READY); snd_intel8x0_ali_codec_semaphore() 647 struct intel8x0 *chip = ac97->private_data; snd_intel8x0_ali_codec_read() local 650 if (snd_intel8x0_ali_codec_semaphore(chip)) snd_intel8x0_ali_codec_read() 655 iputword(chip, ICHREG(ALI_CPR_ADDR), reg); snd_intel8x0_ali_codec_read() 656 if (snd_intel8x0_ali_codec_ready(chip, ALI_CSPSR_READ_OK)) snd_intel8x0_ali_codec_read() 658 data = igetword(chip, ICHREG(ALI_SPR)); snd_intel8x0_ali_codec_read() 666 struct intel8x0 *chip = ac97->private_data; snd_intel8x0_ali_codec_write() local 668 if (snd_intel8x0_ali_codec_semaphore(chip)) snd_intel8x0_ali_codec_write() 670 iputword(chip, ICHREG(ALI_CPR), val); snd_intel8x0_ali_codec_write() 673 iputword(chip, ICHREG(ALI_CPR_ADDR), reg); snd_intel8x0_ali_codec_write() 674 snd_intel8x0_ali_codec_ready(chip, ALI_CSPSR_WRITE_OK); snd_intel8x0_ali_codec_write() 681 static void snd_intel8x0_setup_periods(struct intel8x0 *chip, struct ichdev *ichdev) snd_intel8x0_setup_periods() argument 687 iputdword(chip, port + ICH_REG_OFF_BDBAR, ichdev->bdbar_addr); snd_intel8x0_setup_periods() 710 dev_dbg(chip->card->dev, "bdbar[%i] = 0x%x [0x%x]\n", snd_intel8x0_setup_periods() 716 iputbyte(chip, port + ICH_REG_OFF_LVI, ichdev->lvi = ICH_REG_LVI_MASK); snd_intel8x0_setup_periods() 718 iputbyte(chip, port + ICH_REG_OFF_CIV, 0); snd_intel8x0_setup_periods() 722 dev_dbg(chip->card->dev, snd_intel8x0_setup_periods() 728 iputbyte(chip, port + ichdev->roff_sr, ICH_FIFOE | ICH_BCIS | ICH_LVBCI); snd_intel8x0_setup_periods() 754 static inline void snd_intel8x0_update(struct intel8x0 *chip, struct ichdev *ichdev) snd_intel8x0_update() argument 761 spin_lock_irqsave(&chip->reg_lock, flags); snd_intel8x0_update() 762 status = igetbyte(chip, port + ichdev->roff_sr); snd_intel8x0_update() 763 civ = igetbyte(chip, port + ICH_REG_OFF_CIV); snd_intel8x0_update() 781 if (! chip->in_measurement) snd_intel8x0_update() 785 iputbyte(chip, port + ICH_REG_OFF_LVI, ichdev->lvi); snd_intel8x0_update() 791 dev_dbg(chip->card->dev, snd_intel8x0_update() 802 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_intel8x0_update() 806 iputbyte(chip, port + ichdev->roff_sr, snd_intel8x0_update() 812 struct intel8x0 *chip = dev_id; snd_intel8x0_interrupt() local 817 status = igetdword(chip, chip->int_sta_reg); snd_intel8x0_interrupt() 821 if ((status & chip->int_sta_mask) == 0) { snd_intel8x0_interrupt() 824 iputdword(chip, chip->int_sta_reg, status); snd_intel8x0_interrupt() 825 if (! chip->buggy_irq) snd_intel8x0_interrupt() 831 for (i = 0; i < chip->bdbars_count; i++) { snd_intel8x0_interrupt() 832 ichdev = &chip->ichd[i]; snd_intel8x0_interrupt() 834 snd_intel8x0_update(chip, ichdev); snd_intel8x0_interrupt() 838 iputdword(chip, chip->int_sta_reg, status & chip->int_sta_mask); snd_intel8x0_interrupt() 849 struct intel8x0 *chip = snd_pcm_substream_chip(substream); snd_intel8x0_pcm_trigger() local 875 iputbyte(chip, port + ICH_REG_OFF_CR, val); snd_intel8x0_pcm_trigger() 878 while (!(igetbyte(chip, port + ichdev->roff_sr) & ICH_DCH)) ; snd_intel8x0_pcm_trigger() 880 iputbyte(chip, port + ICH_REG_OFF_CR, ICH_RESETREGS); snd_intel8x0_pcm_trigger() 887 struct intel8x0 *chip = snd_pcm_substream_chip(substream); snd_intel8x0_ali_trigger() local 895 val = igetdword(chip, ICHREG(ALI_DMACR)); snd_intel8x0_ali_trigger() 904 fifo = igetdword(chip, fiforeg[ichdev->ali_slot / 4]); snd_intel8x0_ali_trigger() 907 iputdword(chip, fiforeg[ichdev->ali_slot / 4], fifo); snd_intel8x0_ali_trigger() 909 iputbyte(chip, port + ICH_REG_OFF_CR, ICH_IOCE); snd_intel8x0_ali_trigger() 912 iputdword(chip, ICHREG(ALI_DMACR), val | (1 << ichdev->ali_slot)); snd_intel8x0_ali_trigger() 920 iputdword(chip, ICHREG(ALI_DMACR), val | (1 << (ichdev->ali_slot + 16))); snd_intel8x0_ali_trigger() 921 iputbyte(chip, port + ICH_REG_OFF_CR, 0); snd_intel8x0_ali_trigger() 922 while (igetbyte(chip, port + ICH_REG_OFF_CR)) snd_intel8x0_ali_trigger() 927 iputbyte(chip, port + ICH_REG_OFF_CR, ICH_RESETREGS); snd_intel8x0_ali_trigger() 929 iputbyte(chip, port + ICH_REG_OFF_SR, snd_intel8x0_ali_trigger() 930 igetbyte(chip, port + ICH_REG_OFF_SR) | 0x1e); snd_intel8x0_ali_trigger() 931 iputdword(chip, ICHREG(ALI_INTERRUPTSR), snd_intel8x0_ali_trigger() 932 igetdword(chip, ICHREG(ALI_INTERRUPTSR)) & ichdev->int_sta_mask); snd_intel8x0_ali_trigger() 943 struct intel8x0 *chip = snd_pcm_substream_chip(substream); snd_intel8x0_hw_params() local 949 if (chip->fix_nocache && ichdev->page_attr_changed) { snd_intel8x0_hw_params() 956 if (chip->fix_nocache) { snd_intel8x0_hw_params() 972 if (ichdev->ichd == ICHD_PCMOUT && chip->spdif_idx < 0) snd_intel8x0_hw_params() 981 struct intel8x0 *chip = snd_pcm_substream_chip(substream); snd_intel8x0_hw_free() local 988 if (chip->fix_nocache && ichdev->page_attr_changed) { snd_intel8x0_hw_free() 995 static void snd_intel8x0_setup_pcm_out(struct intel8x0 *chip, snd_intel8x0_setup_pcm_out() argument 1001 spin_lock_irq(&chip->reg_lock); snd_intel8x0_setup_pcm_out() 1002 switch (chip->device_type) { snd_intel8x0_setup_pcm_out() 1004 cnt = igetdword(chip, ICHREG(ALI_SCR)); snd_intel8x0_setup_pcm_out() 1010 iputdword(chip, ICHREG(ALI_SCR), cnt); snd_intel8x0_setup_pcm_out() 1013 cnt = igetdword(chip, ICHREG(GLOB_CNT)); snd_intel8x0_setup_pcm_out() 1019 iputdword(chip, ICHREG(GLOB_CNT), cnt); snd_intel8x0_setup_pcm_out() 1022 cnt = igetdword(chip, ICHREG(GLOB_CNT)); snd_intel8x0_setup_pcm_out() 1030 if (chip->device_type == DEVICE_NFORCE) { snd_intel8x0_setup_pcm_out() 1035 iputdword(chip, ICHREG(GLOB_CNT), cnt & ~ICH_PCM_246_MASK); snd_intel8x0_setup_pcm_out() 1036 spin_unlock_irq(&chip->reg_lock); snd_intel8x0_setup_pcm_out() 1038 spin_lock_irq(&chip->reg_lock); snd_intel8x0_setup_pcm_out() 1040 } else if (chip->device_type == DEVICE_INTEL_ICH4) { snd_intel8x0_setup_pcm_out() 1044 iputdword(chip, ICHREG(GLOB_CNT), cnt); snd_intel8x0_setup_pcm_out() 1047 spin_unlock_irq(&chip->reg_lock); snd_intel8x0_setup_pcm_out() 1052 struct intel8x0 *chip = snd_pcm_substream_chip(substream); snd_intel8x0_pcm_prepare() local 1060 snd_intel8x0_setup_pcm_out(chip, runtime); snd_intel8x0_pcm_prepare() 1061 if (chip->device_type == DEVICE_INTEL_ICH4) snd_intel8x0_pcm_prepare() 1064 snd_intel8x0_setup_periods(chip, ichdev); snd_intel8x0_pcm_prepare() 1070 struct intel8x0 *chip = snd_pcm_substream_chip(substream); snd_intel8x0_pcm_pointer() local 1076 spin_lock(&chip->reg_lock); snd_intel8x0_pcm_pointer() 1078 civ = igetbyte(chip, ichdev->reg_offset + ICH_REG_OFF_CIV); snd_intel8x0_pcm_pointer() 1079 ptr1 = igetword(chip, ichdev->reg_offset + ichdev->roff_picb); snd_intel8x0_pcm_pointer() 1085 if (civ != igetbyte(chip, ichdev->reg_offset + ICH_REG_OFF_CIV)) snd_intel8x0_pcm_pointer() 1094 if (chip->inside_vm) snd_intel8x0_pcm_pointer() 1096 if (ptr1 == igetword(chip, ichdev->reg_offset + ichdev->roff_picb)) snd_intel8x0_pcm_pointer() 1116 spin_unlock(&chip->reg_lock); snd_intel8x0_pcm_pointer() 1175 struct intel8x0 *chip = snd_pcm_substream_chip(substream); snd_intel8x0_pcm_open() local 1183 if (chip->device_type == DEVICE_SIS) { snd_intel8x0_pcm_open() 1195 struct intel8x0 *chip = snd_pcm_substream_chip(substream); snd_intel8x0_playback_open() local 1199 err = snd_intel8x0_pcm_open(substream, &chip->ichd[ICHD_PCMOUT]); snd_intel8x0_playback_open() 1203 if (chip->multi8) { snd_intel8x0_playback_open() 1208 } else if (chip->multi6) { snd_intel8x0_playback_open() 1212 } else if (chip->multi4) { snd_intel8x0_playback_open() 1217 if (chip->dra) { snd_intel8x0_playback_open() 1220 if (chip->smp20bit) { snd_intel8x0_playback_open() 1229 struct intel8x0 *chip = snd_pcm_substream_chip(substream); snd_intel8x0_playback_close() local 1231 chip->ichd[ICHD_PCMOUT].substream = NULL; snd_intel8x0_playback_close() 1237 struct intel8x0 *chip = snd_pcm_substream_chip(substream); snd_intel8x0_capture_open() local 1239 return snd_intel8x0_pcm_open(substream, &chip->ichd[ICHD_PCMIN]); snd_intel8x0_capture_open() 1244 struct intel8x0 *chip = snd_pcm_substream_chip(substream); snd_intel8x0_capture_close() local 1246 chip->ichd[ICHD_PCMIN].substream = NULL; snd_intel8x0_capture_close() 1252 struct intel8x0 *chip = snd_pcm_substream_chip(substream); snd_intel8x0_mic_open() local 1254 return snd_intel8x0_pcm_open(substream, &chip->ichd[ICHD_MIC]); snd_intel8x0_mic_open() 1259 struct intel8x0 *chip = snd_pcm_substream_chip(substream); snd_intel8x0_mic_close() local 1261 chip->ichd[ICHD_MIC].substream = NULL; snd_intel8x0_mic_close() 1267 struct intel8x0 *chip = snd_pcm_substream_chip(substream); snd_intel8x0_mic2_open() local 1269 return snd_intel8x0_pcm_open(substream, &chip->ichd[ICHD_MIC2]); snd_intel8x0_mic2_open() 1274 struct intel8x0 *chip = snd_pcm_substream_chip(substream); snd_intel8x0_mic2_close() local 1276 chip->ichd[ICHD_MIC2].substream = NULL; snd_intel8x0_mic2_close() 1282 struct intel8x0 *chip = snd_pcm_substream_chip(substream); snd_intel8x0_capture2_open() local 1284 return snd_intel8x0_pcm_open(substream, &chip->ichd[ICHD_PCM2IN]); snd_intel8x0_capture2_open() 1289 struct intel8x0 *chip = snd_pcm_substream_chip(substream); snd_intel8x0_capture2_close() local 1291 chip->ichd[ICHD_PCM2IN].substream = NULL; snd_intel8x0_capture2_close() 1297 struct intel8x0 *chip = snd_pcm_substream_chip(substream); snd_intel8x0_spdif_open() local 1298 int idx = chip->device_type == DEVICE_NFORCE ? NVD_SPBAR : ICHD_SPBAR; snd_intel8x0_spdif_open() 1300 return snd_intel8x0_pcm_open(substream, &chip->ichd[idx]); snd_intel8x0_spdif_open() 1305 struct intel8x0 *chip = snd_pcm_substream_chip(substream); snd_intel8x0_spdif_close() local 1306 int idx = chip->device_type == DEVICE_NFORCE ? NVD_SPBAR : ICHD_SPBAR; snd_intel8x0_spdif_close() 1308 chip->ichd[idx].substream = NULL; snd_intel8x0_spdif_close() 1314 struct intel8x0 *chip = snd_pcm_substream_chip(substream); snd_intel8x0_ali_ac97spdifout_open() local 1317 spin_lock_irq(&chip->reg_lock); snd_intel8x0_ali_ac97spdifout_open() 1318 val = igetdword(chip, ICHREG(ALI_INTERFACECR)); snd_intel8x0_ali_ac97spdifout_open() 1320 iputdword(chip, ICHREG(ALI_INTERFACECR), val); snd_intel8x0_ali_ac97spdifout_open() 1322 spin_unlock_irq(&chip->reg_lock); snd_intel8x0_ali_ac97spdifout_open() 1324 return snd_intel8x0_pcm_open(substream, &chip->ichd[ALID_AC97SPDIFOUT]); snd_intel8x0_ali_ac97spdifout_open() 1329 struct intel8x0 *chip = snd_pcm_substream_chip(substream); snd_intel8x0_ali_ac97spdifout_close() local 1332 chip->ichd[ALID_AC97SPDIFOUT].substream = NULL; snd_intel8x0_ali_ac97spdifout_close() 1333 spin_lock_irq(&chip->reg_lock); snd_intel8x0_ali_ac97spdifout_close() 1334 val = igetdword(chip, ICHREG(ALI_INTERFACECR)); snd_intel8x0_ali_ac97spdifout_close() 1336 iputdword(chip, ICHREG(ALI_INTERFACECR), val); snd_intel8x0_ali_ac97spdifout_close() 1337 spin_unlock_irq(&chip->reg_lock); snd_intel8x0_ali_ac97spdifout_close() 1345 struct intel8x0 *chip = snd_pcm_substream_chip(substream); 1347 return snd_intel8x0_pcm_open(substream, &chip->ichd[ALID_SPDIFIN]); 1352 struct intel8x0 *chip = snd_pcm_substream_chip(substream); 1354 chip->ichd[ALID_SPDIFIN].substream = NULL; 1360 struct intel8x0 *chip = snd_pcm_substream_chip(substream); 1362 return snd_intel8x0_pcm_open(substream, &chip->ichd[ALID_SPDIFOUT]); 1367 struct intel8x0 *chip = snd_pcm_substream_chip(substream); 1369 chip->ichd[ALID_SPDIFOUT].substream = NULL; 1517 static int snd_intel8x0_pcm1(struct intel8x0 *chip, int device, snd_intel8x0_pcm1() argument 1528 err = snd_pcm_new(chip->card, name, device, snd_intel8x0_pcm1() 1539 pcm->private_data = chip; snd_intel8x0_pcm1() 1542 sprintf(pcm->name, "%s - %s", chip->card->shortname, rec->suffix); snd_intel8x0_pcm1() 1544 strcpy(pcm->name, chip->card->shortname); snd_intel8x0_pcm1() 1545 chip->pcm[device] = pcm; snd_intel8x0_pcm1() 1548 snd_dma_pci_data(chip->pci), snd_intel8x0_pcm1() 1555 if (chip->multi8) snd_intel8x0_pcm1() 1557 else if (chip->multi6) snd_intel8x0_pcm1() 1559 else if (chip->multi4) snd_intel8x0_pcm1() 1567 chip->ac97[0]->chmaps[SNDRV_PCM_STREAM_PLAYBACK] = chmap; snd_intel8x0_pcm1() 1665 static int snd_intel8x0_pcm(struct intel8x0 *chip) snd_intel8x0_pcm() argument 1670 switch (chip->device_type) { snd_intel8x0_pcm() 1698 if (! chip->ichd[rec->ac97_idx].pcm) snd_intel8x0_pcm() 1701 err = snd_intel8x0_pcm1(chip, device, rec); snd_intel8x0_pcm() 1707 chip->pcm_devs = device; snd_intel8x0_pcm() 1718 struct intel8x0 *chip = bus->private_data; snd_intel8x0_mixer_free_ac97_bus() local 1719 chip->ac97_bus = NULL; snd_intel8x0_mixer_free_ac97_bus() 1724 struct intel8x0 *chip = ac97->private_data; snd_intel8x0_mixer_free_ac97() local 1725 chip->ac97[ac97->num] = NULL; snd_intel8x0_mixer_free_ac97() 2205 static int snd_intel8x0_mixer(struct intel8x0 *chip, int ac97_clock, snd_intel8x0_mixer() argument 2223 chip->spdif_idx = -1; /* use PCMOUT (or disabled) */ snd_intel8x0_mixer() 2225 switch (chip->device_type) { snd_intel8x0_mixer() 2227 chip->spdif_idx = NVD_SPBAR; snd_intel8x0_mixer() 2230 chip->spdif_idx = ALID_AC97SPDIFOUT; snd_intel8x0_mixer() 2233 chip->spdif_idx = ICHD_SPBAR; snd_intel8x0_mixer() 2238 chip->in_ac97_init = 1; snd_intel8x0_mixer() 2241 ac97.private_data = chip; snd_intel8x0_mixer() 2244 if (chip->xbox) snd_intel8x0_mixer() 2246 if (chip->device_type != DEVICE_ALI) { snd_intel8x0_mixer() 2247 glob_sta = igetdword(chip, ICHREG(GLOB_STA)); snd_intel8x0_mixer() 2249 chip->in_sdin_init = 1; snd_intel8x0_mixer() 2251 for (i = 0; i < chip->max_codecs; i++) { snd_intel8x0_mixer() 2252 if (! (glob_sta & chip->codec_bit[i])) snd_intel8x0_mixer() 2254 if (chip->device_type == DEVICE_INTEL_ICH4) { snd_intel8x0_mixer() 2255 snd_intel8x0_codec_read_test(chip, codecs); snd_intel8x0_mixer() 2256 chip->ac97_sdin[codecs] = snd_intel8x0_mixer() 2257 igetbyte(chip, ICHREG(SDM)) & ICH_LDI_MASK; snd_intel8x0_mixer() 2258 if (snd_BUG_ON(chip->ac97_sdin[codecs] >= 3)) snd_intel8x0_mixer() 2259 chip->ac97_sdin[codecs] = 0; snd_intel8x0_mixer() 2261 chip->ac97_sdin[codecs] = i; snd_intel8x0_mixer() 2264 chip->in_sdin_init = 0; snd_intel8x0_mixer() 2272 unsigned int reg = igetdword(chip, ICHREG(ALI_RTSR)); snd_intel8x0_mixer() 2277 iputdword(chip, ICHREG(ALI_RTSR), reg | 0x40); snd_intel8x0_mixer() 2281 if ((err = snd_ac97_bus(chip->card, 0, ops, chip, &pbus)) < 0) snd_intel8x0_mixer() 2287 if (chip->device_type == DEVICE_ALI) snd_intel8x0_mixer() 2291 chip->ac97_bus = pbus; snd_intel8x0_mixer() 2292 chip->ncodecs = codecs; snd_intel8x0_mixer() 2294 ac97.pci = chip->pci; snd_intel8x0_mixer() 2297 if ((err = snd_ac97_mixer(pbus, &ac97, &chip->ac97[i])) < 0) { snd_intel8x0_mixer() 2299 dev_err(chip->card->dev, snd_intel8x0_mixer() 2306 snd_ac97_tune_hardware(chip->ac97[0], ac97_quirks, quirk_override); snd_intel8x0_mixer() 2308 if (chip->device_type == DEVICE_INTEL_ICH4) snd_intel8x0_mixer() 2312 if (chip->device_type != DEVICE_INTEL_ICH4) snd_intel8x0_mixer() 2314 if (chip->spdif_idx < 0) snd_intel8x0_mixer() 2319 chip->ichd[ICHD_PCMOUT].pcm = &pbus->pcms[0]; snd_intel8x0_mixer() 2320 chip->ichd[ICHD_PCMIN].pcm = &pbus->pcms[1]; snd_intel8x0_mixer() 2321 chip->ichd[ICHD_MIC].pcm = &pbus->pcms[2]; snd_intel8x0_mixer() 2322 if (chip->spdif_idx >= 0) snd_intel8x0_mixer() 2323 chip->ichd[chip->spdif_idx].pcm = &pbus->pcms[3]; snd_intel8x0_mixer() 2324 if (chip->device_type == DEVICE_INTEL_ICH4) { snd_intel8x0_mixer() 2325 chip->ichd[ICHD_PCM2IN].pcm = &pbus->pcms[4]; snd_intel8x0_mixer() 2326 chip->ichd[ICHD_MIC2].pcm = &pbus->pcms[5]; snd_intel8x0_mixer() 2329 if (chip->device_type == DEVICE_INTEL_ICH4) { snd_intel8x0_mixer() 2330 struct ac97_pcm *pcm = chip->ichd[ICHD_PCM2IN].pcm; snd_intel8x0_mixer() 2331 u8 tmp = igetbyte(chip, ICHREG(SDM)); snd_intel8x0_mixer() 2335 tmp |= chip->ac97_sdin[0] << ICH_DI1L_SHIFT; snd_intel8x0_mixer() 2338 tmp |= chip->ac97_sdin[pcm->r[0].codec[1]->num] << ICH_DI2L_SHIFT; snd_intel8x0_mixer() 2345 iputbyte(chip, ICHREG(SDM), tmp); snd_intel8x0_mixer() 2348 chip->multi4 = 1; snd_intel8x0_mixer() 2350 chip->multi6 = 1; snd_intel8x0_mixer() 2351 if (chip->ac97[0]->flags & AC97_HAS_8CH) snd_intel8x0_mixer() 2352 chip->multi8 = 1; snd_intel8x0_mixer() 2356 chip->dra = 1; snd_intel8x0_mixer() 2358 if (chip->device_type == DEVICE_INTEL_ICH4) { snd_intel8x0_mixer() 2359 if ((igetdword(chip, ICHREG(GLOB_STA)) & ICH_SAMPLE_CAP) == ICH_SAMPLE_16_20) snd_intel8x0_mixer() 2360 chip->smp20bit = 1; snd_intel8x0_mixer() 2362 if (chip->device_type == DEVICE_NFORCE && !spdif_aclink) { snd_intel8x0_mixer() 2364 chip->ichd[chip->spdif_idx].pcm->rates = SNDRV_PCM_RATE_48000; snd_intel8x0_mixer() 2366 if (chip->device_type == DEVICE_INTEL_ICH4 && !spdif_aclink) { snd_intel8x0_mixer() 2369 val = igetdword(chip, ICHREG(GLOB_CNT)) & ~ICH_PCM_SPDIF_MASK; snd_intel8x0_mixer() 2371 iputdword(chip, ICHREG(GLOB_CNT), val); snd_intel8x0_mixer() 2372 snd_ac97_update_bits(chip->ac97[0], AC97_EXTENDED_STATUS, 0x03 << 4, 0x03 << 4); snd_intel8x0_mixer() 2374 chip->in_ac97_init = 0; snd_intel8x0_mixer() 2379 if (chip->device_type != DEVICE_ALI) snd_intel8x0_mixer() 2380 iputdword(chip, ICHREG(GLOB_CNT), snd_intel8x0_mixer() 2381 igetdword(chip, ICHREG(GLOB_CNT)) & ~ICH_AC97COLD); snd_intel8x0_mixer() 2390 static void do_ali_reset(struct intel8x0 *chip) do_ali_reset() argument 2392 iputdword(chip, ICHREG(ALI_SCR), ICH_ALI_SC_RESET); do_ali_reset() 2393 iputdword(chip, ICHREG(ALI_FIFOCR1), 0x83838383); do_ali_reset() 2394 iputdword(chip, ICHREG(ALI_FIFOCR2), 0x83838383); do_ali_reset() 2395 iputdword(chip, ICHREG(ALI_FIFOCR3), 0x83838383); do_ali_reset() 2396 iputdword(chip, ICHREG(ALI_INTERFACECR), do_ali_reset() 2398 iputdword(chip, ICHREG(ALI_INTERRUPTCR), 0x00000000); do_ali_reset() 2399 iputdword(chip, ICHREG(ALI_INTERRUPTSR), 0x00000000); do_ali_reset() 2408 static int snd_intel8x0_ich_chip_cold_reset(struct intel8x0 *chip) snd_intel8x0_ich_chip_cold_reset() argument 2413 if (snd_pci_quirk_lookup(chip->pci, ich_chip_reset_mode)) snd_intel8x0_ich_chip_cold_reset() 2416 cnt = igetdword(chip, ICHREG(GLOB_CNT)); snd_intel8x0_ich_chip_cold_reset() 2422 iputdword(chip, ICHREG(GLOB_CNT), cnt & ~ICH_AC97COLD); snd_intel8x0_ich_chip_cold_reset() 2423 cnt = igetdword(chip, ICHREG(GLOB_CNT)); snd_intel8x0_ich_chip_cold_reset() 2425 iputdword(chip, ICHREG(GLOB_CNT), cnt | ICH_AC97COLD); snd_intel8x0_ich_chip_cold_reset() 2429 #define snd_intel8x0_ich_chip_can_cold_reset(chip) \ 2430 (!snd_pci_quirk_lookup(chip->pci, ich_chip_reset_mode)) 2432 #define snd_intel8x0_ich_chip_cold_reset(chip) 0 2433 #define snd_intel8x0_ich_chip_can_cold_reset(chip) (0) 2436 static int snd_intel8x0_ich_chip_reset(struct intel8x0 *chip) snd_intel8x0_ich_chip_reset() argument 2441 cnt = igetdword(chip, ICHREG(GLOB_CNT)); snd_intel8x0_ich_chip_reset() 2445 iputdword(chip, ICHREG(GLOB_CNT), cnt); snd_intel8x0_ich_chip_reset() 2448 if ((igetdword(chip, ICHREG(GLOB_CNT)) & ICH_AC97WARM) == 0) snd_intel8x0_ich_chip_reset() 2452 dev_err(chip->card->dev, "AC'97 warm reset still in progress? [0x%x]\n", snd_intel8x0_ich_chip_reset() 2453 igetdword(chip, ICHREG(GLOB_CNT))); snd_intel8x0_ich_chip_reset() 2457 static int snd_intel8x0_ich_chip_init(struct intel8x0 *chip, int probing) snd_intel8x0_ich_chip_init() argument 2467 if (chip->device_type == DEVICE_NFORCE) snd_intel8x0_ich_chip_init() 2469 cnt = igetdword(chip, ICHREG(GLOB_STA)); snd_intel8x0_ich_chip_init() 2470 iputdword(chip, ICHREG(GLOB_STA), cnt & status); snd_intel8x0_ich_chip_init() 2472 if (snd_intel8x0_ich_chip_can_cold_reset(chip)) snd_intel8x0_ich_chip_init() 2473 err = snd_intel8x0_ich_chip_cold_reset(chip); snd_intel8x0_ich_chip_init() 2475 err = snd_intel8x0_ich_chip_reset(chip); snd_intel8x0_ich_chip_init() 2486 status = igetdword(chip, ICHREG(GLOB_STA)) & snd_intel8x0_ich_chip_init() 2487 chip->codec_isr_bits; snd_intel8x0_ich_chip_init() 2494 dev_err(chip->card->dev, snd_intel8x0_ich_chip_init() 2496 igetdword(chip, ICHREG(GLOB_STA))); snd_intel8x0_ich_chip_init() 2502 while (status != chip->codec_isr_bits && snd_intel8x0_ich_chip_init() 2505 status |= igetdword(chip, ICHREG(GLOB_STA)) & snd_intel8x0_ich_chip_init() 2506 chip->codec_isr_bits; snd_intel8x0_ich_chip_init() 2513 for (i = 0; i < chip->ncodecs; i++) snd_intel8x0_ich_chip_init() 2514 if (chip->ac97[i]) snd_intel8x0_ich_chip_init() 2515 status |= chip->codec_bit[chip->ac97_sdin[i]]; snd_intel8x0_ich_chip_init() 2519 nstatus = igetdword(chip, ICHREG(GLOB_STA)) & snd_intel8x0_ich_chip_init() 2520 chip->codec_isr_bits; snd_intel8x0_ich_chip_init() 2527 if (chip->device_type == DEVICE_SIS) { snd_intel8x0_ich_chip_init() 2529 iputword(chip, 0x4c, igetword(chip, 0x4c) | 1); snd_intel8x0_ich_chip_init() 2531 if (chip->device_type == DEVICE_NFORCE && !spdif_aclink) { snd_intel8x0_ich_chip_init() 2534 pci_read_config_dword(chip->pci, 0x4c, &val); snd_intel8x0_ich_chip_init() 2536 pci_write_config_dword(chip->pci, 0x4c, val); snd_intel8x0_ich_chip_init() 2541 static int snd_intel8x0_ali_chip_init(struct intel8x0 *chip, int probing) snd_intel8x0_ali_chip_init() argument 2546 reg = igetdword(chip, ICHREG(ALI_SCR)); snd_intel8x0_ali_chip_init() 2552 iputdword(chip, ICHREG(ALI_SCR), reg); snd_intel8x0_ali_chip_init() 2555 if (! (igetdword(chip, ICHREG(ALI_INTERRUPTSR)) & ALI_INT_GPIO)) snd_intel8x0_ali_chip_init() 2559 dev_err(chip->card->dev, "AC'97 reset failed.\n"); snd_intel8x0_ali_chip_init() 2565 reg = igetdword(chip, ICHREG(ALI_RTSR)); snd_intel8x0_ali_chip_init() 2568 iputdword(chip, ICHREG(ALI_RTSR), reg | 0x80); snd_intel8x0_ali_chip_init() 2572 do_ali_reset(chip); snd_intel8x0_ali_chip_init() 2576 static int snd_intel8x0_chip_init(struct intel8x0 *chip, int probing) snd_intel8x0_chip_init() argument 2581 if (chip->device_type != DEVICE_ALI) { snd_intel8x0_chip_init() 2582 if ((err = snd_intel8x0_ich_chip_init(chip, probing)) < 0) snd_intel8x0_chip_init() 2584 iagetword(chip, 0); /* clear semaphore flag */ snd_intel8x0_chip_init() 2586 if ((err = snd_intel8x0_ali_chip_init(chip, probing)) < 0) snd_intel8x0_chip_init() 2591 for (i = 0; i < chip->bdbars_count; i++) snd_intel8x0_chip_init() 2592 iputbyte(chip, ICH_REG_OFF_CR + chip->ichd[i].reg_offset, 0x00); snd_intel8x0_chip_init() 2594 for (i = 0; i < chip->bdbars_count; i++) snd_intel8x0_chip_init() 2595 iputbyte(chip, ICH_REG_OFF_CR + chip->ichd[i].reg_offset, ICH_RESETREGS); snd_intel8x0_chip_init() 2596 for (i = 0; i < chip->bdbars_count; i++) { snd_intel8x0_chip_init() 2599 if ((igetbyte(chip, ICH_REG_OFF_CR + chip->ichd[i].reg_offset) & ICH_RESETREGS) == 0) snd_intel8x0_chip_init() 2603 dev_err(chip->card->dev, "reset of registers failed?\n"); snd_intel8x0_chip_init() 2606 for (i = 0; i < chip->bdbars_count; i++) snd_intel8x0_chip_init() 2607 iputdword(chip, ICH_REG_OFF_BDBAR + chip->ichd[i].reg_offset, snd_intel8x0_chip_init() 2608 chip->ichd[i].bdbar_addr); snd_intel8x0_chip_init() 2612 static int snd_intel8x0_free(struct intel8x0 *chip) snd_intel8x0_free() argument 2616 if (chip->irq < 0) snd_intel8x0_free() 2619 for (i = 0; i < chip->bdbars_count; i++) snd_intel8x0_free() 2620 iputbyte(chip, ICH_REG_OFF_CR + chip->ichd[i].reg_offset, 0x00); snd_intel8x0_free() 2622 for (i = 0; i < chip->bdbars_count; i++) snd_intel8x0_free() 2623 iputbyte(chip, ICH_REG_OFF_CR + chip->ichd[i].reg_offset, ICH_RESETREGS); snd_intel8x0_free() 2624 if (chip->device_type == DEVICE_NFORCE && !spdif_aclink) { snd_intel8x0_free() 2627 pci_read_config_dword(chip->pci, 0x4c, &val); snd_intel8x0_free() 2629 pci_write_config_dword(chip->pci, 0x4c, val); snd_intel8x0_free() 2634 if (chip->irq >= 0) snd_intel8x0_free() 2635 free_irq(chip->irq, chip); snd_intel8x0_free() 2636 if (chip->bdbars.area) { snd_intel8x0_free() 2637 if (chip->fix_nocache) snd_intel8x0_free() 2638 fill_nocache(chip->bdbars.area, chip->bdbars.bytes, 0); snd_intel8x0_free() 2639 snd_dma_free_pages(&chip->bdbars); snd_intel8x0_free() 2641 if (chip->addr) snd_intel8x0_free() 2642 pci_iounmap(chip->pci, chip->addr); snd_intel8x0_free() 2643 if (chip->bmaddr) snd_intel8x0_free() 2644 pci_iounmap(chip->pci, chip->bmaddr); snd_intel8x0_free() 2645 pci_release_regions(chip->pci); snd_intel8x0_free() 2646 pci_disable_device(chip->pci); snd_intel8x0_free() 2647 kfree(chip); snd_intel8x0_free() 2658 struct intel8x0 *chip = card->private_data; intel8x0_suspend() local 2662 for (i = 0; i < chip->pcm_devs; i++) intel8x0_suspend() 2663 snd_pcm_suspend_all(chip->pcm[i]); intel8x0_suspend() 2665 if (chip->fix_nocache) { intel8x0_suspend() 2666 for (i = 0; i < chip->bdbars_count; i++) { intel8x0_suspend() 2667 struct ichdev *ichdev = &chip->ichd[i]; intel8x0_suspend() 2675 for (i = 0; i < chip->ncodecs; i++) intel8x0_suspend() 2676 snd_ac97_suspend(chip->ac97[i]); intel8x0_suspend() 2677 if (chip->device_type == DEVICE_INTEL_ICH4) intel8x0_suspend() 2678 chip->sdm_saved = igetbyte(chip, ICHREG(SDM)); intel8x0_suspend() 2680 if (chip->irq >= 0) { intel8x0_suspend() 2681 free_irq(chip->irq, chip); intel8x0_suspend() 2682 chip->irq = -1; intel8x0_suspend() 2691 struct intel8x0 *chip = card->private_data; intel8x0_resume() local 2694 snd_intel8x0_chip_init(chip, 0); intel8x0_resume() 2696 IRQF_SHARED, KBUILD_MODNAME, chip)) { intel8x0_resume() 2702 chip->irq = pci->irq; intel8x0_resume() 2703 synchronize_irq(chip->irq); intel8x0_resume() 2706 if (chip->device_type == DEVICE_INTEL_ICH4 && !spdif_aclink) { intel8x0_resume() 2708 iputbyte(chip, ICHREG(SDM), chip->sdm_saved); intel8x0_resume() 2710 iputdword(chip, ICHREG(GLOB_CNT), intel8x0_resume() 2711 (igetdword(chip, ICHREG(GLOB_CNT)) & ~ICH_PCM_SPDIF_MASK) | intel8x0_resume() 2716 if (chip->fix_nocache) intel8x0_resume() 2717 fill_nocache(chip->bdbars.area, chip->bdbars.bytes, 1); intel8x0_resume() 2719 for (i = 0; i < chip->ncodecs; i++) intel8x0_resume() 2720 snd_ac97_resume(chip->ac97[i]); intel8x0_resume() 2723 if (chip->fix_nocache) { intel8x0_resume() 2724 for (i = 0; i < chip->bdbars_count; i++) { intel8x0_resume() 2725 struct ichdev *ichdev = &chip->ichd[i]; intel8x0_resume() 2735 for (i = 0; i < chip->bdbars_count; i++) { intel8x0_resume() 2736 struct ichdev *ichdev = &chip->ichd[i]; intel8x0_resume() 2741 snd_intel8x0_setup_pcm_out(chip, ichdev->substream->runtime); intel8x0_resume() 2742 iputdword(chip, port + ICH_REG_OFF_BDBAR, ichdev->bdbar_addr); intel8x0_resume() 2743 iputbyte(chip, port + ICH_REG_OFF_LVI, ichdev->lvi); intel8x0_resume() 2744 iputbyte(chip, port + ICH_REG_OFF_CIV, ichdev->civ); intel8x0_resume() 2745 iputbyte(chip, port + ichdev->roff_sr, ICH_FIFOE | ICH_BCIS | ICH_LVBCI); intel8x0_resume() 2760 static void intel8x0_measure_ac97_clock(struct intel8x0 *chip) intel8x0_measure_ac97_clock() argument 2769 if (chip->ac97_bus->clock != 48000) intel8x0_measure_ac97_clock() 2773 subs = chip->pcm[0]->streams[0].substream; intel8x0_measure_ac97_clock() 2775 dev_warn(chip->card->dev, intel8x0_measure_ac97_clock() 2779 ichdev = &chip->ichd[ICHD_PCMOUT]; intel8x0_measure_ac97_clock() 2785 if (snd_ac97_set_rate(chip->ac97[0], AC97_PCM_FRONT_DAC_RATE, 48000) < 0) { intel8x0_measure_ac97_clock() 2786 dev_err(chip->card->dev, "cannot set ac97 rate: clock = %d\n", intel8x0_measure_ac97_clock() 2787 chip->ac97_bus->clock); intel8x0_measure_ac97_clock() 2790 snd_intel8x0_setup_periods(chip, ichdev); intel8x0_measure_ac97_clock() 2792 spin_lock_irq(&chip->reg_lock); intel8x0_measure_ac97_clock() 2793 chip->in_measurement = 1; intel8x0_measure_ac97_clock() 2795 if (chip->device_type != DEVICE_ALI) intel8x0_measure_ac97_clock() 2796 iputbyte(chip, port + ICH_REG_OFF_CR, ICH_IOCE | ICH_STARTBM); intel8x0_measure_ac97_clock() 2798 iputbyte(chip, port + ICH_REG_OFF_CR, ICH_IOCE); intel8x0_measure_ac97_clock() 2799 iputdword(chip, ICHREG(ALI_DMACR), 1 << ichdev->ali_slot); intel8x0_measure_ac97_clock() 2802 spin_unlock_irq(&chip->reg_lock); intel8x0_measure_ac97_clock() 2804 spin_lock_irq(&chip->reg_lock); intel8x0_measure_ac97_clock() 2807 civ = igetbyte(chip, ichdev->reg_offset + ICH_REG_OFF_CIV); intel8x0_measure_ac97_clock() 2808 pos1 = igetword(chip, ichdev->reg_offset + ichdev->roff_picb); intel8x0_measure_ac97_clock() 2813 if (civ == igetbyte(chip, ichdev->reg_offset + ICH_REG_OFF_CIV) && intel8x0_measure_ac97_clock() 2814 pos1 == igetword(chip, ichdev->reg_offset + ichdev->roff_picb)) intel8x0_measure_ac97_clock() 2824 chip->in_measurement = 0; intel8x0_measure_ac97_clock() 2827 if (chip->device_type == DEVICE_ALI) { intel8x0_measure_ac97_clock() 2828 iputdword(chip, ICHREG(ALI_DMACR), 1 << (ichdev->ali_slot + 16)); intel8x0_measure_ac97_clock() 2829 iputbyte(chip, port + ICH_REG_OFF_CR, 0); intel8x0_measure_ac97_clock() 2830 while (igetbyte(chip, port + ICH_REG_OFF_CR)) intel8x0_measure_ac97_clock() 2833 iputbyte(chip, port + ICH_REG_OFF_CR, 0); intel8x0_measure_ac97_clock() 2834 while (!(igetbyte(chip, port + ichdev->roff_sr) & ICH_DCH)) intel8x0_measure_ac97_clock() 2837 iputbyte(chip, port + ICH_REG_OFF_CR, ICH_RESETREGS); intel8x0_measure_ac97_clock() 2838 spin_unlock_irq(&chip->reg_lock); intel8x0_measure_ac97_clock() 2841 dev_err(chip->card->dev, intel8x0_measure_ac97_clock() 2854 dev_info(chip->card->dev, intel8x0_measure_ac97_clock() 2857 dev_err(chip->card->dev, "?? calculation error..\n"); intel8x0_measure_ac97_clock() 2864 dev_info(chip->card->dev, "measured clock %ld rejected\n", pos); intel8x0_measure_ac97_clock() 2868 chip->ac97_bus->clock = 41000; intel8x0_measure_ac97_clock() 2871 chip->ac97_bus->clock = 44100; intel8x0_measure_ac97_clock() 2874 chip->ac97_bus->clock = (chip->ac97_bus->clock * 48000) / pos; intel8x0_measure_ac97_clock() 2876 dev_info(chip->card->dev, "clocking to %d\n", chip->ac97_bus->clock); intel8x0_measure_ac97_clock() 2877 snd_ac97_update_power(chip->ac97[0], AC97_PCM_FRONT_DAC_RATE, 0); intel8x0_measure_ac97_clock() 2890 static int intel8x0_in_clock_list(struct intel8x0 *chip) intel8x0_in_clock_list() argument 2892 struct pci_dev *pci = chip->pci; intel8x0_in_clock_list() 2898 dev_info(chip->card->dev, "white list rate for %04x:%04x is %i\n", intel8x0_in_clock_list() 2900 chip->ac97_bus->clock = wl->value; intel8x0_in_clock_list() 2908 struct intel8x0 *chip = entry->private_data; snd_intel8x0_proc_read() local 2912 if (chip->device_type == DEVICE_ALI) snd_intel8x0_proc_read() 2914 tmp = igetdword(chip, ICHREG(GLOB_STA)); snd_intel8x0_proc_read() 2915 snd_iprintf(buffer, "Global control : 0x%08x\n", igetdword(chip, ICHREG(GLOB_CNT))); snd_intel8x0_proc_read() 2917 if (chip->device_type == DEVICE_INTEL_ICH4) snd_intel8x0_proc_read() 2918 snd_iprintf(buffer, "SDM : 0x%08x\n", igetdword(chip, ICHREG(SDM))); snd_intel8x0_proc_read() 2920 if (tmp & chip->codec_isr_bits) { snd_intel8x0_proc_read() 2925 for (i = 0; i < chip->max_codecs; i++) snd_intel8x0_proc_read() 2926 if (tmp & chip->codec_bit[i]) snd_intel8x0_proc_read() 2931 if (chip->device_type == DEVICE_INTEL_ICH4 || snd_intel8x0_proc_read() 2932 chip->device_type == DEVICE_SIS) snd_intel8x0_proc_read() 2934 chip->ac97_sdin[0], snd_intel8x0_proc_read() 2935 chip->ac97_sdin[1], snd_intel8x0_proc_read() 2936 chip->ac97_sdin[2]); snd_intel8x0_proc_read() 2939 static void snd_intel8x0_proc_init(struct intel8x0 *chip) snd_intel8x0_proc_init() argument 2943 if (! snd_card_proc_new(chip->card, "intel8x0", &entry)) snd_intel8x0_proc_init() 2944 snd_info_set_text_ops(entry, chip, snd_intel8x0_proc_read); snd_intel8x0_proc_init() 2952 struct intel8x0 *chip = device->device_data; snd_intel8x0_dev_free() local 2953 return snd_intel8x0_free(chip); snd_intel8x0_dev_free() 3012 struct intel8x0 *chip; snd_intel8x0_create() local 3057 chip = kzalloc(sizeof(*chip), GFP_KERNEL); snd_intel8x0_create() 3058 if (chip == NULL) { snd_intel8x0_create() 3062 spin_lock_init(&chip->reg_lock); snd_intel8x0_create() 3063 chip->device_type = device_type; snd_intel8x0_create() 3064 chip->card = card; snd_intel8x0_create() 3065 chip->pci = pci; snd_intel8x0_create() 3066 chip->irq = -1; snd_intel8x0_create() 3069 chip->buggy_irq = buggy_irq; snd_intel8x0_create() 3070 chip->buggy_semaphore = buggy_semaphore; snd_intel8x0_create() 3072 chip->xbox = 1; snd_intel8x0_create() 3074 chip->inside_vm = snd_intel8x0_inside_vm(pci); snd_intel8x0_create() 3078 chip->fix_nocache = 1; /* enable workaround */ snd_intel8x0_create() 3081 kfree(chip); snd_intel8x0_create() 3088 chip->bmaddr = pci_iomap(pci, 0, 0); snd_intel8x0_create() 3093 chip->addr = pci_iomap(pci, 2, 0); snd_intel8x0_create() 3095 chip->addr = pci_iomap(pci, 0, 0); snd_intel8x0_create() 3096 if (!chip->addr) { snd_intel8x0_create() 3098 snd_intel8x0_free(chip); snd_intel8x0_create() 3102 chip->bmaddr = pci_iomap(pci, 3, 0); snd_intel8x0_create() 3104 chip->bmaddr = pci_iomap(pci, 1, 0); snd_intel8x0_create() 3107 if (!chip->bmaddr) { snd_intel8x0_create() 3109 snd_intel8x0_free(chip); snd_intel8x0_create() 3112 chip->bdbars_count = bdbars[device_type]; snd_intel8x0_create() 3126 for (i = 0; i < chip->bdbars_count; i++) { snd_intel8x0_create() 3127 ichdev = &chip->ichd[i]; snd_intel8x0_create() 3148 chip->bdbars_count * sizeof(u32) * ICH_MAX_FRAGS * 2, snd_intel8x0_create() 3149 &chip->bdbars) < 0) { snd_intel8x0_create() 3150 snd_intel8x0_free(chip); snd_intel8x0_create() 3157 if (chip->fix_nocache) snd_intel8x0_create() 3158 fill_nocache(chip->bdbars.area, chip->bdbars.bytes, 1); snd_intel8x0_create() 3160 for (i = 0; i < chip->bdbars_count; i++) { snd_intel8x0_create() 3161 ichdev = &chip->ichd[i]; snd_intel8x0_create() 3162 ichdev->bdbar = ((u32 *)chip->bdbars.area) + snd_intel8x0_create() 3164 ichdev->bdbar_addr = chip->bdbars.addr + snd_intel8x0_create() 3168 chip->int_sta_reg = device_type == DEVICE_ALI ? snd_intel8x0_create() 3170 chip->int_sta_mask = int_sta_masks; snd_intel8x0_create() 3174 switch(chip->device_type) { snd_intel8x0_create() 3177 chip->max_codecs = 3; snd_intel8x0_create() 3178 chip->codec_bit = ich_codec_bits; snd_intel8x0_create() 3179 chip->codec_ready_bits = ICH_PRI | ICH_SRI | ICH_TRI; snd_intel8x0_create() 3183 chip->max_codecs = 3; snd_intel8x0_create() 3184 chip->codec_bit = sis_codec_bits; snd_intel8x0_create() 3185 chip->codec_ready_bits = ICH_PRI | ICH_SRI | ICH_SIS_TRI; snd_intel8x0_create() 3189 chip->max_codecs = 2; snd_intel8x0_create() 3190 chip->codec_bit = ich_codec_bits; snd_intel8x0_create() 3191 chip->codec_ready_bits = ICH_PRI | ICH_SRI; snd_intel8x0_create() 3194 for (i = 0; i < chip->max_codecs; i++) snd_intel8x0_create() 3195 chip->codec_isr_bits |= chip->codec_bit[i]; snd_intel8x0_create() 3197 if ((err = snd_intel8x0_chip_init(chip, 1)) < 0) { snd_intel8x0_create() 3198 snd_intel8x0_free(chip); snd_intel8x0_create() 3204 IRQF_SHARED, KBUILD_MODNAME, chip)) { snd_intel8x0_create() 3206 snd_intel8x0_free(chip); snd_intel8x0_create() 3209 chip->irq = pci->irq; snd_intel8x0_create() 3211 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) { snd_intel8x0_create() 3212 snd_intel8x0_free(chip); snd_intel8x0_create() 3216 *r_intel8x0 = chip; snd_intel8x0_create() 3278 struct intel8x0 *chip; snd_intel8x0_probe() local 3319 &chip)) < 0) { snd_intel8x0_probe() 3323 card->private_data = chip; snd_intel8x0_probe() 3325 if ((err = snd_intel8x0_mixer(chip, ac97_clock, ac97_quirk)) < 0) { snd_intel8x0_probe() 3329 if ((err = snd_intel8x0_pcm(chip)) < 0) { snd_intel8x0_probe() 3334 snd_intel8x0_proc_init(chip); snd_intel8x0_probe() 3338 snd_ac97_get_short_name(chip->ac97[0]), chip->irq); snd_intel8x0_probe() 3342 if (intel8x0_in_clock_list(chip) == 0) snd_intel8x0_probe() 3343 intel8x0_measure_ac97_clock(chip); snd_intel8x0_probe() 3345 intel8x0_measure_ac97_clock(chip); snd_intel8x0_probe()
H A D	maestro3.c	930 static inline void snd_m3_outw(struct snd_m3 *chip, u16 value, unsigned long reg) snd_m3_outw() argument 932 outw(value, chip->iobase + reg); snd_m3_outw() 935 static inline u16 snd_m3_inw(struct snd_m3 *chip, unsigned long reg) snd_m3_inw() argument 937 return inw(chip->iobase + reg); snd_m3_inw() 940 static inline void snd_m3_outb(struct snd_m3 *chip, u8 value, unsigned long reg) snd_m3_outb() argument 942 outb(value, chip->iobase + reg); snd_m3_outb() 945 static inline u8 snd_m3_inb(struct snd_m3 *chip, unsigned long reg) snd_m3_inb() argument 947 return inb(chip->iobase + reg); snd_m3_inb() 954 static u16 snd_m3_assp_read(struct snd_m3 *chip, u16 region, u16 index) snd_m3_assp_read() argument 956 snd_m3_outw(chip, region & MEMTYPE_MASK, DSP_PORT_MEMORY_TYPE); snd_m3_assp_read() 957 snd_m3_outw(chip, index, DSP_PORT_MEMORY_INDEX); snd_m3_assp_read() 958 return snd_m3_inw(chip, DSP_PORT_MEMORY_DATA); snd_m3_assp_read() 961 static void snd_m3_assp_write(struct snd_m3 *chip, u16 region, u16 index, u16 data) snd_m3_assp_write() argument 963 snd_m3_outw(chip, region & MEMTYPE_MASK, DSP_PORT_MEMORY_TYPE); snd_m3_assp_write() 964 snd_m3_outw(chip, index, DSP_PORT_MEMORY_INDEX); snd_m3_assp_write() 965 snd_m3_outw(chip, data, DSP_PORT_MEMORY_DATA); snd_m3_assp_write() 968 static void snd_m3_assp_halt(struct snd_m3 *chip) snd_m3_assp_halt() argument 970 chip->reset_state = snd_m3_inb(chip, DSP_PORT_CONTROL_REG_B) & ~REGB_STOP_CLOCK; snd_m3_assp_halt() 972 snd_m3_outb(chip, chip->reset_state & ~REGB_ENABLE_RESET, DSP_PORT_CONTROL_REG_B); snd_m3_assp_halt() 975 static void snd_m3_assp_continue(struct snd_m3 *chip) snd_m3_assp_continue() argument 977 snd_m3_outb(chip, chip->reset_state | REGB_ENABLE_RESET, DSP_PORT_CONTROL_REG_B); snd_m3_assp_continue() 989 static int snd_m3_add_list(struct snd_m3 *chip, struct m3_list *list, u16 val) snd_m3_add_list() argument 991 snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, snd_m3_add_list() 997 static void snd_m3_remove_list(struct snd_m3 *chip, struct m3_list *list, int index) snd_m3_remove_list() argument 1003 val = snd_m3_assp_read(chip, MEMTYPE_INTERNAL_DATA, snd_m3_remove_list() 1005 snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, snd_m3_remove_list() 1010 snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, snd_m3_remove_list() 1017 static void snd_m3_inc_timer_users(struct snd_m3 *chip) snd_m3_inc_timer_users() argument 1019 chip->timer_users++; snd_m3_inc_timer_users() 1020 if (chip->timer_users != 1) snd_m3_inc_timer_users() 1023 snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, snd_m3_inc_timer_users() 1027 snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, snd_m3_inc_timer_users() 1031 snd_m3_outw(chip, snd_m3_inc_timer_users() 1032 snd_m3_inw(chip, HOST_INT_CTRL) | CLKRUN_GEN_ENABLE, snd_m3_inc_timer_users() 1036 static void snd_m3_dec_timer_users(struct snd_m3 *chip) snd_m3_dec_timer_users() argument 1038 chip->timer_users--; snd_m3_dec_timer_users() 1039 if (chip->timer_users > 0) snd_m3_dec_timer_users() 1042 snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, snd_m3_dec_timer_users() 1046 snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, snd_m3_dec_timer_users() 1050 snd_m3_outw(chip, snd_m3_dec_timer_users() 1051 snd_m3_inw(chip, HOST_INT_CTRL) & ~CLKRUN_GEN_ENABLE, snd_m3_dec_timer_users() 1060 static int snd_m3_pcm_start(struct snd_m3 *chip, struct m3_dma *s, snd_m3_pcm_start() argument 1066 snd_m3_inc_timer_users(chip); snd_m3_pcm_start() 1069 chip->dacs_active++; snd_m3_pcm_start() 1070 snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, snd_m3_pcm_start() 1072 snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, snd_m3_pcm_start() 1074 chip->dacs_active); snd_m3_pcm_start() 1077 snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, snd_m3_pcm_start() 1079 snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, snd_m3_pcm_start() 1087 static int snd_m3_pcm_stop(struct snd_m3 *chip, struct m3_dma *s, snd_m3_pcm_stop() argument 1093 snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, snd_m3_pcm_stop() 1095 snd_m3_dec_timer_users(chip); snd_m3_pcm_stop() 1098 chip->dacs_active--; snd_m3_pcm_stop() 1099 snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, snd_m3_pcm_stop() 1101 chip->dacs_active); snd_m3_pcm_stop() 1104 snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, snd_m3_pcm_stop() 1114 struct snd_m3 *chip = snd_pcm_substream_chip(subs); snd_m3_pcm_trigger() local 1121 spin_lock(&chip->reg_lock); snd_m3_pcm_trigger() 1129 err = snd_m3_pcm_start(chip, s, subs); snd_m3_pcm_trigger() 1138 err = snd_m3_pcm_stop(chip, s, subs); snd_m3_pcm_trigger() 1142 spin_unlock(&chip->reg_lock); snd_m3_pcm_trigger() 1150 snd_m3_pcm_setup1(struct snd_m3 *chip, struct m3_dma *s, struct snd_pcm_substream *subs) snd_m3_pcm_setup1() argument 1174 snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, snd_m3_pcm_setup1() 1178 snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, snd_m3_pcm_setup1() 1182 snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, snd_m3_pcm_setup1() 1186 snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, snd_m3_pcm_setup1() 1190 snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, snd_m3_pcm_setup1() 1194 snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, snd_m3_pcm_setup1() 1202 snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, snd_m3_pcm_setup1() 1206 snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, snd_m3_pcm_setup1() 1210 snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, snd_m3_pcm_setup1() 1214 snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, snd_m3_pcm_setup1() 1218 snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, snd_m3_pcm_setup1() 1222 snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, snd_m3_pcm_setup1() 1226 snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, snd_m3_pcm_setup1() 1230 snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, snd_m3_pcm_setup1() 1235 static void snd_m3_pcm_setup2(struct snd_m3 *chip, struct m3_dma *s, snd_m3_pcm_setup2() argument 1244 s->index[0] = snd_m3_add_list(chip, s->index_list[0], snd_m3_pcm_setup2() 1246 s->index[1] = snd_m3_add_list(chip, s->index_list[1], snd_m3_pcm_setup2() 1248 s->index[2] = snd_m3_add_list(chip, s->index_list[2], snd_m3_pcm_setup2() 1254 snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, snd_m3_pcm_setup2() 1258 snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, snd_m3_pcm_setup2() 1267 snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, snd_m3_pcm_setup2() 1302 snd_m3_playback_setup(struct snd_m3 *chip, struct m3_dma *s, snd_m3_playback_setup() argument 1311 snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, snd_m3_playback_setup() 1315 snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, snd_m3_playback_setup() 1320 snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, snd_m3_playback_setup() 1325 snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, snd_m3_playback_setup() 1333 snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, snd_m3_playback_setup() 1369 snd_m3_capture_setup(struct snd_m3 *chip, struct m3_dma *s, struct snd_pcm_substream *subs) snd_m3_capture_setup() argument 1377 snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, snd_m3_capture_setup() 1382 snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, snd_m3_capture_setup() 1391 snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, snd_m3_capture_setup() 1427 struct snd_m3 *chip = snd_pcm_substream_chip(subs); snd_m3_pcm_prepare() local 1441 spin_lock_irq(&chip->reg_lock); snd_m3_pcm_prepare() 1443 snd_m3_pcm_setup1(chip, s, subs); snd_m3_pcm_prepare() 1446 snd_m3_playback_setup(chip, s, subs); snd_m3_pcm_prepare() 1448 snd_m3_capture_setup(chip, s, subs); snd_m3_pcm_prepare() 1450 snd_m3_pcm_setup2(chip, s, runtime); snd_m3_pcm_prepare() 1452 spin_unlock_irq(&chip->reg_lock); snd_m3_pcm_prepare() 1461 snd_m3_get_pointer(struct snd_m3 *chip, struct m3_dma *s, struct snd_pcm_substream *subs) snd_m3_get_pointer() argument 1471 hi = snd_m3_assp_read(chip, MEMTYPE_INTERNAL_DATA, snd_m3_get_pointer() 1474 lo = snd_m3_assp_read(chip, MEMTYPE_INTERNAL_DATA, snd_m3_get_pointer() 1477 if (hi == snd_m3_assp_read(chip, MEMTYPE_INTERNAL_DATA, snd_m3_get_pointer() 1488 struct snd_m3 *chip = snd_pcm_substream_chip(subs); snd_m3_pcm_pointer() local 1495 spin_lock(&chip->reg_lock); snd_m3_pcm_pointer() 1496 ptr = snd_m3_get_pointer(chip, s, subs); snd_m3_pcm_pointer() 1497 spin_unlock(&chip->reg_lock); snd_m3_pcm_pointer() 1504 static void snd_m3_update_ptr(struct snd_m3 *chip, struct m3_dma *s) snd_m3_update_ptr() argument 1513 hwptr = snd_m3_get_pointer(chip, s, subs); snd_m3_update_ptr() 1533 spin_unlock(&chip->reg_lock); snd_m3_update_ptr() 1535 spin_lock(&chip->reg_lock); snd_m3_update_ptr() 1545 struct snd_m3 *chip = container_of(work, struct snd_m3, hwvol_work); snd_m3_update_hw_volume() local 1551 x = inb(chip->iobase + SHADOW_MIX_REG_VOICE) & 0xee; snd_m3_update_hw_volume() 1562 outb(0x88, chip->iobase + SHADOW_MIX_REG_VOICE); snd_m3_update_hw_volume() 1563 outb(0x88, chip->iobase + HW_VOL_COUNTER_VOICE); snd_m3_update_hw_volume() 1564 outb(0x88, chip->iobase + SHADOW_MIX_REG_MASTER); snd_m3_update_hw_volume() 1565 outb(0x88, chip->iobase + HW_VOL_COUNTER_MASTER); snd_m3_update_hw_volume() 1569 if (chip->in_suspend) snd_m3_update_hw_volume() 1573 if (!chip->master_switch || !chip->master_volume) snd_m3_update_hw_volume() 1576 val = snd_ac97_read(chip->ac97, AC97_MASTER); snd_m3_update_hw_volume() 1599 if (snd_ac97_update(chip->ac97, AC97_MASTER, val)) snd_m3_update_hw_volume() 1600 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, snd_m3_update_hw_volume() 1601 &chip->master_switch->id); snd_m3_update_hw_volume() 1603 if (!chip->input_dev) snd_m3_update_hw_volume() 1625 input_report_key(chip->input_dev, val, 1); snd_m3_update_hw_volume() 1626 input_sync(chip->input_dev); snd_m3_update_hw_volume() 1627 input_report_key(chip->input_dev, val, 0); snd_m3_update_hw_volume() 1628 input_sync(chip->input_dev); snd_m3_update_hw_volume() 1635 struct snd_m3 *chip = dev_id; snd_m3_interrupt() local 1639 status = inb(chip->iobase + HOST_INT_STATUS); snd_m3_interrupt() 1645 schedule_work(&chip->hwvol_work); snd_m3_interrupt() 1652 u8 ctl = inb(chip->iobase + ASSP_CONTROL_B); snd_m3_interrupt() 1654 ctl = inb(chip->iobase + ASSP_HOST_INT_STATUS); snd_m3_interrupt() 1656 outb(DSP2HOST_REQ_TIMER, chip->iobase + ASSP_HOST_INT_STATUS); snd_m3_interrupt() 1658 spin_lock(&chip->reg_lock); snd_m3_interrupt() 1659 for (i = 0; i < chip->num_substreams; i++) { snd_m3_interrupt() 1660 struct m3_dma *s = &chip->substreams[i]; snd_m3_interrupt() 1662 snd_m3_update_ptr(chip, s); snd_m3_interrupt() 1664 spin_unlock(&chip->reg_lock); snd_m3_interrupt() 1670 if ((status & MPU401_INT_PENDING) && chip->rmidi) snd_m3_interrupt() 1671 snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data, regs); snd_m3_interrupt() 1675 outb(status, chip->iobase + HOST_INT_STATUS); snd_m3_interrupt() 1731 snd_m3_substream_open(struct snd_m3 *chip, struct snd_pcm_substream *subs) snd_m3_substream_open() argument 1736 spin_lock_irq(&chip->reg_lock); snd_m3_substream_open() 1737 for (i = 0; i < chip->num_substreams; i++) { snd_m3_substream_open() 1738 s = &chip->substreams[i]; snd_m3_substream_open() 1742 spin_unlock_irq(&chip->reg_lock); snd_m3_substream_open() 1747 spin_unlock_irq(&chip->reg_lock); snd_m3_substream_open() 1754 s->index_list[0] = &chip->mixer_list; snd_m3_substream_open() 1756 s->index_list[0] = &chip->adc1_list; snd_m3_substream_open() 1757 s->index_list[1] = &chip->msrc_list; snd_m3_substream_open() 1758 s->index_list[2] = &chip->dma_list; snd_m3_substream_open() 1764 snd_m3_substream_close(struct snd_m3 *chip, struct snd_pcm_substream *subs) snd_m3_substream_close() argument 1771 spin_lock_irq(&chip->reg_lock); snd_m3_substream_close() 1773 snd_m3_pcm_stop(chip, s, s->substream); /* does this happen? */ snd_m3_substream_close() 1775 snd_m3_remove_list(chip, s->index_list[0], s->index[0]); snd_m3_substream_close() 1776 snd_m3_remove_list(chip, s->index_list[1], s->index[1]); snd_m3_substream_close() 1777 snd_m3_remove_list(chip, s->index_list[2], s->index[2]); snd_m3_substream_close() 1782 spin_unlock_irq(&chip->reg_lock); snd_m3_substream_close() 1788 struct snd_m3 *chip = snd_pcm_substream_chip(subs); snd_m3_playback_open() local 1792 if ((err = snd_m3_substream_open(chip, subs)) < 0) snd_m3_playback_open() 1803 struct snd_m3 *chip = snd_pcm_substream_chip(subs); snd_m3_playback_close() local 1805 snd_m3_substream_close(chip, subs); snd_m3_playback_close() 1812 struct snd_m3 *chip = snd_pcm_substream_chip(subs); snd_m3_capture_open() local 1816 if ((err = snd_m3_substream_open(chip, subs)) < 0) snd_m3_capture_open() 1827 struct snd_m3 *chip = snd_pcm_substream_chip(subs); snd_m3_capture_close() local 1829 snd_m3_substream_close(chip, subs); snd_m3_capture_close() 1860 snd_m3_pcm(struct snd_m3 * chip, int device) snd_m3_pcm() argument 1865 err = snd_pcm_new(chip->card, chip->card->driver, device, snd_m3_pcm() 1873 pcm->private_data = chip; snd_m3_pcm() 1875 strcpy(pcm->name, chip->card->driver); snd_m3_pcm() 1876 chip->pcm = pcm; snd_m3_pcm() 1879 snd_dma_pci_data(chip->pci), 64*1024, 64*1024); snd_m3_pcm() 1893 static int snd_m3_ac97_wait(struct snd_m3 *chip) snd_m3_ac97_wait() argument 1898 if (! (snd_m3_inb(chip, 0x30) & 1)) snd_m3_ac97_wait() 1903 dev_err(chip->card->dev, "ac97 serial bus busy\n"); snd_m3_ac97_wait() 1910 struct snd_m3 *chip = ac97->private_data; snd_m3_ac97_read() local 1913 if (snd_m3_ac97_wait(chip)) snd_m3_ac97_read() 1915 snd_m3_outb(chip, 0x80 | (reg & 0x7f), CODEC_COMMAND); snd_m3_ac97_read() 1916 if (snd_m3_ac97_wait(chip)) snd_m3_ac97_read() 1918 data = snd_m3_inw(chip, CODEC_DATA); snd_m3_ac97_read() 1926 struct snd_m3 *chip = ac97->private_data; snd_m3_ac97_write() local 1928 if (snd_m3_ac97_wait(chip)) snd_m3_ac97_write() 1930 snd_m3_outw(chip, val, CODEC_DATA); snd_m3_ac97_write() 1931 snd_m3_outb(chip, reg & 0x7f, CODEC_COMMAND); snd_m3_ac97_write() 1950 static int snd_m3_try_read_vendor(struct snd_m3 *chip) snd_m3_try_read_vendor() argument 1954 if (snd_m3_ac97_wait(chip)) snd_m3_try_read_vendor() 1957 snd_m3_outb(chip, 0x80 | (AC97_VENDOR_ID1 & 0x7f), 0x30); snd_m3_try_read_vendor() 1959 if (snd_m3_ac97_wait(chip)) snd_m3_try_read_vendor() 1962 ret = snd_m3_inw(chip, 0x32); snd_m3_try_read_vendor() 1967 static void snd_m3_ac97_reset(struct snd_m3 *chip) snd_m3_ac97_reset() argument 1971 int io = chip->iobase; snd_m3_ac97_reset() 1973 if (chip->allegro_flag) { snd_m3_ac97_reset() 1989 if (!chip->irda_workaround) snd_m3_ac97_reset() 2012 if (! snd_m3_try_read_vendor(chip)) snd_m3_ac97_reset() 2018 dev_dbg(chip->card->dev, snd_m3_ac97_reset() 2035 static int snd_m3_mixer(struct snd_m3 *chip) snd_m3_mixer() argument 2048 if ((err = snd_ac97_bus(chip->card, 0, &ops, NULL, &pbus)) < 0) snd_m3_mixer() 2052 ac97.private_data = chip; snd_m3_mixer() 2053 if ((err = snd_ac97_mixer(pbus, &ac97, &chip->ac97)) < 0) snd_m3_mixer() 2057 snd_ac97_write(chip->ac97, AC97_PCM, 0x8000 | (15 << 8) | 15); snd_m3_mixer() 2059 snd_ac97_write(chip->ac97, AC97_PCM, 0); snd_m3_mixer() 2065 chip->master_switch = snd_ctl_find_id(chip->card, &elem_id); snd_m3_mixer() 2069 chip->master_volume = snd_ctl_find_id(chip->card, &elem_id); snd_m3_mixer() 2086 static void snd_m3_assp_init(struct snd_m3 *chip) snd_m3_assp_init() argument 2093 snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, snd_m3_assp_init() 2098 snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, snd_m3_assp_init() 2102 snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, snd_m3_assp_init() 2107 data = (const u16 *)chip->assp_kernel_image->data; snd_m3_assp_init() 2108 for (i = 0 ; i * 2 < chip->assp_kernel_image->size; i++) { snd_m3_assp_init() 2109 snd_m3_assp_write(chip, MEMTYPE_INTERNAL_CODE, snd_m3_assp_init() 2120 data = (const u16 *)chip->assp_minisrc_image->data; snd_m3_assp_init() 2121 for (i = 0; i * 2 < chip->assp_minisrc_image->size; i++) { snd_m3_assp_init() 2122 snd_m3_assp_write(chip, MEMTYPE_INTERNAL_CODE, snd_m3_assp_init() 2130 snd_m3_assp_write(chip, MEMTYPE_INTERNAL_CODE, snd_m3_assp_init() 2135 snd_m3_assp_write(chip, MEMTYPE_INTERNAL_CODE, snd_m3_assp_init() 2143 snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, snd_m3_assp_init() 2151 snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, snd_m3_assp_init() 2157 snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, snd_m3_assp_init() 2159 snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, snd_m3_assp_init() 2162 chip->mixer_list.curlen = 0; snd_m3_assp_init() 2163 chip->mixer_list.mem_addr = KDATA_MIXER_XFER0; snd_m3_assp_init() 2164 chip->mixer_list.max = MAX_VIRTUAL_MIXER_CHANNELS; snd_m3_assp_init() 2165 chip->adc1_list.curlen = 0; snd_m3_assp_init() 2166 chip->adc1_list.mem_addr = KDATA_ADC1_XFER0; snd_m3_assp_init() 2167 chip->adc1_list.max = MAX_VIRTUAL_ADC1_CHANNELS; snd_m3_assp_init() 2168 chip->dma_list.curlen = 0; snd_m3_assp_init() 2169 chip->dma_list.mem_addr = KDATA_DMA_XFER0; snd_m3_assp_init() 2170 chip->dma_list.max = MAX_VIRTUAL_DMA_CHANNELS; snd_m3_assp_init() 2171 chip->msrc_list.curlen = 0; snd_m3_assp_init() 2172 chip->msrc_list.mem_addr = KDATA_INSTANCE0_MINISRC; snd_m3_assp_init() 2173 chip->msrc_list.max = MAX_INSTANCE_MINISRC; snd_m3_assp_init() 2177 static int snd_m3_assp_client_init(struct snd_m3 *chip, struct m3_dma *s, int index) snd_m3_assp_client_init() argument 2198 dev_err(chip->card->dev, snd_m3_assp_client_init() 2209 snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, snd_m3_assp_client_init() 2224 snd_m3_amp_enable(struct snd_m3 *chip, int enable) snd_m3_amp_enable() argument 2226 int io = chip->iobase; snd_m3_amp_enable() 2229 if (! chip->external_amp) snd_m3_amp_enable() 2233 polarity = polarity << chip->amp_gpio; snd_m3_amp_enable() 2234 gpo = 1 << chip->amp_gpio; snd_m3_amp_enable() 2248 snd_m3_hv_init(struct snd_m3 *chip) snd_m3_hv_init() argument 2250 unsigned long io = chip->iobase; snd_m3_hv_init() 2253 if (!chip->is_omnibook) snd_m3_hv_init() 2271 snd_m3_chip_init(struct snd_m3 *chip) snd_m3_chip_init() argument 2273 struct pci_dev *pcidev = chip->pci; snd_m3_chip_init() 2274 unsigned long io = chip->iobase; snd_m3_chip_init() 2287 n |= chip->hv_config; snd_m3_chip_init() 2293 outb(RESET_ASSP, chip->iobase + ASSP_CONTROL_B); snd_m3_chip_init() 2296 if (!chip->allegro_flag) { snd_m3_chip_init() 2303 if (chip->allegro_flag) { snd_m3_chip_init() 2309 t = inb(chip->iobase + ASSP_CONTROL_A); snd_m3_chip_init() 2313 outb(t, chip->iobase + ASSP_CONTROL_A); snd_m3_chip_init() 2315 snd_m3_assp_init(chip); /* download DSP code before starting ASSP below */ snd_m3_chip_init() 2316 outb(RUN_ASSP, chip->iobase + ASSP_CONTROL_B); snd_m3_chip_init() 2328 snd_m3_enable_ints(struct snd_m3 *chip) snd_m3_enable_ints() argument 2330 unsigned long io = chip->iobase; snd_m3_enable_ints() 2335 if (chip->hv_config & HV_CTRL_ENABLE) snd_m3_enable_ints() 2337 outb(val, chip->iobase + HOST_INT_STATUS); snd_m3_enable_ints() 2347 static int snd_m3_free(struct snd_m3 *chip) snd_m3_free() argument 2352 cancel_work_sync(&chip->hwvol_work); snd_m3_free() 2354 if (chip->input_dev) snd_m3_free() 2355 input_unregister_device(chip->input_dev); snd_m3_free() 2358 if (chip->substreams) { snd_m3_free() 2359 spin_lock_irq(&chip->reg_lock); snd_m3_free() 2360 for (i = 0; i < chip->num_substreams; i++) { snd_m3_free() 2361 s = &chip->substreams[i]; snd_m3_free() 2364 snd_m3_pcm_stop(chip, s, s->substream); snd_m3_free() 2366 spin_unlock_irq(&chip->reg_lock); snd_m3_free() 2367 kfree(chip->substreams); snd_m3_free() 2369 if (chip->iobase) { snd_m3_free() 2370 outw(0, chip->iobase + HOST_INT_CTRL); /* disable ints */ snd_m3_free() 2374 vfree(chip->suspend_mem); snd_m3_free() 2377 if (chip->irq >= 0) snd_m3_free() 2378 free_irq(chip->irq, chip); snd_m3_free() 2380 if (chip->iobase) snd_m3_free() 2381 pci_release_regions(chip->pci); snd_m3_free() 2383 release_firmware(chip->assp_kernel_image); snd_m3_free() 2384 release_firmware(chip->assp_minisrc_image); snd_m3_free() 2386 pci_disable_device(chip->pci); snd_m3_free() 2387 kfree(chip); snd_m3_free() 2399 struct snd_m3 *chip = card->private_data; m3_suspend() local 2402 if (chip->suspend_mem == NULL) m3_suspend() 2405 chip->in_suspend = 1; m3_suspend() 2406 cancel_work_sync(&chip->hwvol_work); m3_suspend() 2408 snd_pcm_suspend_all(chip->pcm); m3_suspend() 2409 snd_ac97_suspend(chip->ac97); m3_suspend() 2413 snd_m3_assp_halt(chip); m3_suspend() 2418 chip->suspend_mem[dsp_index++] = m3_suspend() 2419 snd_m3_assp_read(chip, MEMTYPE_INTERNAL_CODE, i); m3_suspend() 2421 chip->suspend_mem[dsp_index++] = m3_suspend() 2422 snd_m3_assp_read(chip, MEMTYPE_INTERNAL_DATA, i); m3_suspend() 2429 struct snd_m3 *chip = card->private_data; m3_resume() local 2432 if (chip->suspend_mem == NULL) m3_resume() 2436 snd_m3_outw(chip, 0, 0x54); m3_resume() 2437 snd_m3_outw(chip, 0, 0x56); m3_resume() 2439 snd_m3_chip_init(chip); m3_resume() 2440 snd_m3_assp_halt(chip); m3_resume() 2441 snd_m3_ac97_reset(chip); m3_resume() 2446 snd_m3_assp_write(chip, MEMTYPE_INTERNAL_CODE, i, m3_resume() 2447 chip->suspend_mem[dsp_index++]); m3_resume() 2449 snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, i, m3_resume() 2450 chip->suspend_mem[dsp_index++]); m3_resume() 2453 snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, m3_resume() 2457 snd_ac97_resume(chip->ac97); m3_resume() 2459 snd_m3_assp_continue(chip); m3_resume() 2460 snd_m3_enable_ints(chip); m3_resume() 2461 snd_m3_amp_enable(chip, 1); m3_resume() 2463 snd_m3_hv_init(chip); m3_resume() 2466 chip->in_suspend = 0; m3_resume() 2477 static int snd_m3_input_register(struct snd_m3 *chip) snd_m3_input_register() argument 2486 snprintf(chip->phys, sizeof(chip->phys), "pci-%s/input0", snd_m3_input_register() 2487 pci_name(chip->pci)); snd_m3_input_register() 2489 input_dev->name = chip->card->driver; snd_m3_input_register() 2490 input_dev->phys = chip->phys; snd_m3_input_register() 2492 input_dev->id.vendor = chip->pci->vendor; snd_m3_input_register() 2493 input_dev->id.product = chip->pci->device; snd_m3_input_register() 2494 input_dev->dev.parent = &chip->pci->dev; snd_m3_input_register() 2507 chip->input_dev = input_dev; snd_m3_input_register() 2517 struct snd_m3 *chip = device->device_data; snd_m3_dev_free() local 2518 return snd_m3_free(chip); snd_m3_dev_free() 2527 struct snd_m3 *chip; snd_m3_create() local 2548 chip = kzalloc(sizeof(*chip), GFP_KERNEL); snd_m3_create() 2549 if (chip == NULL) { snd_m3_create() 2554 spin_lock_init(&chip->reg_lock); snd_m3_create() 2561 chip->allegro_flag = 1; snd_m3_create() 2565 chip->card = card; snd_m3_create() 2566 chip->pci = pci; snd_m3_create() 2567 chip->irq = -1; snd_m3_create() 2568 INIT_WORK(&chip->hwvol_work, snd_m3_update_hw_volume); snd_m3_create() 2570 chip->external_amp = enable_amp; snd_m3_create() 2572 chip->amp_gpio = amp_gpio; snd_m3_create() 2578 chip->amp_gpio = quirk->value; snd_m3_create() 2579 } else if (chip->allegro_flag) snd_m3_create() 2580 chip->amp_gpio = GPO_EXT_AMP_ALLEGRO; snd_m3_create() 2582 chip->amp_gpio = GPO_EXT_AMP_M3; snd_m3_create() 2589 chip->irda_workaround = 1; snd_m3_create() 2593 chip->hv_config = quirk->value; snd_m3_create() 2595 chip->is_omnibook = 1; snd_m3_create() 2597 chip->num_substreams = NR_DSPS; snd_m3_create() 2598 chip->substreams = kcalloc(chip->num_substreams, sizeof(struct m3_dma), snd_m3_create() 2600 if (chip->substreams == NULL) { snd_m3_create() 2601 kfree(chip); snd_m3_create() 2606 err = request_firmware(&chip->assp_kernel_image, snd_m3_create() 2609 snd_m3_free(chip); snd_m3_create() 2613 err = request_firmware(&chip->assp_minisrc_image, snd_m3_create() 2616 snd_m3_free(chip); snd_m3_create() 2621 snd_m3_free(chip); snd_m3_create() 2624 chip->iobase = pci_resource_start(pci, 0); snd_m3_create() 2629 snd_m3_chip_init(chip); snd_m3_create() 2630 snd_m3_assp_halt(chip); snd_m3_create() 2632 snd_m3_ac97_reset(chip); snd_m3_create() 2634 snd_m3_amp_enable(chip, 1); snd_m3_create() 2636 snd_m3_hv_init(chip); snd_m3_create() 2639 KBUILD_MODNAME, chip)) { snd_m3_create() 2641 snd_m3_free(chip); snd_m3_create() 2644 chip->irq = pci->irq; snd_m3_create() 2647 chip->suspend_mem = vmalloc(sizeof(u16) * (REV_B_CODE_MEMORY_LENGTH + REV_B_DATA_MEMORY_LENGTH)); snd_m3_create() 2648 if (chip->suspend_mem == NULL) snd_m3_create() 2652 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) { snd_m3_create() 2653 snd_m3_free(chip); snd_m3_create() 2657 if ((err = snd_m3_mixer(chip)) < 0) snd_m3_create() 2660 for (i = 0; i < chip->num_substreams; i++) { snd_m3_create() 2661 struct m3_dma *s = &chip->substreams[i]; snd_m3_create() 2662 if ((err = snd_m3_assp_client_init(chip, s, i)) < 0) snd_m3_create() 2666 if ((err = snd_m3_pcm(chip, 0)) < 0) snd_m3_create() 2670 if (chip->hv_config & HV_CTRL_ENABLE) { snd_m3_create() 2671 err = snd_m3_input_register(chip); snd_m3_create() 2679 snd_m3_enable_ints(chip); snd_m3_create() 2680 snd_m3_assp_continue(chip); snd_m3_create() 2682 *chip_ret = chip; snd_m3_create() 2694 struct snd_m3 *chip; snd_m3_probe() local 2730 &chip)) < 0) { snd_m3_probe() 2734 card->private_data = chip; snd_m3_probe() 2738 card->shortname, chip->iobase, chip->irq); snd_m3_probe() 2747 err = snd_mpu401_uart_new(chip->card, 0, MPU401_HW_MPU401, snd_m3_probe() 2748 chip->iobase + MPU401_DATA_PORT, snd_m3_probe() 2750 -1, &chip->rmidi); snd_m3_probe()
H A D	cs4281.c	76 #define BA0_HISR_GPPI (1<<5) /* General Purpose Input (Primary chip) */ 77 #define BA0_HISR_GPSI (1<<4) /* General Purpose Input (Secondary chip) */ 514 static inline void snd_cs4281_pokeBA0(struct cs4281 *chip, unsigned long offset, snd_cs4281_pokeBA0() argument 517 writel(val, chip->ba0 + offset); snd_cs4281_pokeBA0() 520 static inline unsigned int snd_cs4281_peekBA0(struct cs4281 *chip, unsigned long offset) snd_cs4281_peekBA0() argument 522 return readl(chip->ba0 + offset); snd_cs4281_peekBA0() 535 struct cs4281 *chip = ac97->private_data; snd_cs4281_ac97_write() local 550 snd_cs4281_pokeBA0(chip, BA0_ACCAD, reg); snd_cs4281_ac97_write() 551 snd_cs4281_pokeBA0(chip, BA0_ACCDA, val); snd_cs4281_ac97_write() 552 snd_cs4281_pokeBA0(chip, BA0_ACCTL, BA0_ACCTL_DCV | BA0_ACCTL_VFRM | snd_cs4281_ac97_write() 563 if (!(snd_cs4281_peekBA0(chip, BA0_ACCTL) & BA0_ACCTL_DCV)) { snd_cs4281_ac97_write() 567 dev_err(chip->card->dev, snd_cs4281_ac97_write() 574 struct cs4281 *chip = ac97->private_data; snd_cs4281_ac97_read() local 590 snd_cs4281_peekBA0(chip, ac97_num ? BA0_ACSDA2 : BA0_ACSDA); snd_cs4281_ac97_read() 605 snd_cs4281_pokeBA0(chip, BA0_ACCAD, reg); snd_cs4281_ac97_read() 606 snd_cs4281_pokeBA0(chip, BA0_ACCDA, 0); snd_cs4281_ac97_read() 607 snd_cs4281_pokeBA0(chip, BA0_ACCTL, BA0_ACCTL_DCV | BA0_ACCTL_CRW | snd_cs4281_ac97_read() 624 if (!(snd_cs4281_peekBA0(chip, BA0_ACCTL) & BA0_ACCTL_DCV)) snd_cs4281_ac97_read() 628 dev_err(chip->card->dev, snd_cs4281_ac97_read() 643 if (snd_cs4281_peekBA0(chip, ac97_num ? BA0_ACSTS2 : BA0_ACSTS) & BA0_ACSTS_VSTS) snd_cs4281_ac97_read() 648 dev_err(chip->card->dev, snd_cs4281_ac97_read() 658 result = snd_cs4281_peekBA0(chip, ac97_num ? BA0_ACSDA2 : BA0_ACSDA); snd_cs4281_ac97_read() 671 struct cs4281 *chip = snd_pcm_substream_chip(substream); snd_cs4281_trigger() local 673 spin_lock(&chip->reg_lock); snd_cs4281_trigger() 685 snd_cs4281_pokeBA0(chip, dma->regDMR, dma->valDMR & ~BA0_DMR_DMA); snd_cs4281_trigger() 700 spin_unlock(&chip->reg_lock); snd_cs4281_trigger() 703 snd_cs4281_pokeBA0(chip, dma->regDMR, dma->valDMR); snd_cs4281_trigger() 704 snd_cs4281_pokeBA0(chip, dma->regFCR, dma->valFCR); snd_cs4281_trigger() 705 snd_cs4281_pokeBA0(chip, dma->regDCR, dma->valDCR); snd_cs4281_trigger() 706 spin_unlock(&chip->reg_lock); snd_cs4281_trigger() 734 static void snd_cs4281_mode(struct cs4281 *chip, struct cs4281_dma *dma, snd_cs4281_mode() argument 760 snd_cs4281_pokeBA0(chip, dma->regDBA, runtime->dma_addr); snd_cs4281_mode() 761 snd_cs4281_pokeBA0(chip, dma->regDBC, runtime->buffer_size - 1); snd_cs4281_mode() 762 rec_mono = (chip->dma[1].valDMR & BA0_DMR_MONO) == BA0_DMR_MONO; snd_cs4281_mode() 763 snd_cs4281_pokeBA0(chip, BA0_SRCSA, (chip->src_left_play_slot << 0) | snd_cs4281_mode() 764 (chip->src_right_play_slot << 8) | snd_cs4281_mode() 765 (chip->src_left_rec_slot << 16) | snd_cs4281_mode() 766 ((rec_mono ? 31 : chip->src_right_rec_slot) << 24)); snd_cs4281_mode() 770 if (dma->left_slot == chip->src_left_play_slot) { snd_cs4281_mode() 772 snd_BUG_ON(dma->right_slot != chip->src_right_play_slot); snd_cs4281_mode() 773 snd_cs4281_pokeBA0(chip, BA0_DACSR, val); snd_cs4281_mode() 776 if (dma->left_slot == chip->src_left_rec_slot) { snd_cs4281_mode() 778 snd_BUG_ON(dma->right_slot != chip->src_right_rec_slot); snd_cs4281_mode() 779 snd_cs4281_pokeBA0(chip, BA0_ADCSR, val); snd_cs4281_mode() 785 snd_cs4281_pokeBA0(chip, dma->regFCR, snd_cs4281_peekBA0(chip, dma->regFCR) & ~BA0_FCR_FEN); snd_cs4281_mode() 791 snd_cs4281_pokeBA0(chip, dma->regFCR, dma->valFCR | (capture ? BA0_FCR_PSH : 0)); snd_cs4281_mode() 794 snd_cs4281_pokeBA0(chip, dma->regFCR, dma->valFCR | BA0_FCR_FEN); snd_cs4281_mode() 796 snd_cs4281_pokeBA0(chip, dma->regFSIC, 0); snd_cs4281_mode() 814 struct cs4281 *chip = snd_pcm_substream_chip(substream); snd_cs4281_playback_prepare() local 816 spin_lock_irq(&chip->reg_lock); snd_cs4281_playback_prepare() 817 snd_cs4281_mode(chip, dma, runtime, 0, 1); snd_cs4281_playback_prepare() 818 spin_unlock_irq(&chip->reg_lock); snd_cs4281_playback_prepare() 826 struct cs4281 *chip = snd_pcm_substream_chip(substream); snd_cs4281_capture_prepare() local 828 spin_lock_irq(&chip->reg_lock); snd_cs4281_capture_prepare() 829 snd_cs4281_mode(chip, dma, runtime, 1, 1); snd_cs4281_capture_prepare() 830 spin_unlock_irq(&chip->reg_lock); snd_cs4281_capture_prepare() 838 struct cs4281 *chip = snd_pcm_substream_chip(substream); snd_cs4281_pointer() local 841 dev_dbg(chip->card->dev, snd_cs4281_pointer() 843 snd_cs4281_peekBA0(chip, dma->regDCC), runtime->buffer_size, snd_cs4281_pointer() 847 snd_cs4281_peekBA0(chip, dma->regDCC) - 1; snd_cs4281_pointer() 902 struct cs4281 *chip = snd_pcm_substream_chip(substream); snd_cs4281_playback_open() local 906 dma = &chip->dma[0]; snd_cs4281_playback_open() 921 struct cs4281 *chip = snd_pcm_substream_chip(substream); snd_cs4281_capture_open() local 925 dma = &chip->dma[1]; snd_cs4281_capture_open() 976 static int snd_cs4281_pcm(struct cs4281 *chip, int device) snd_cs4281_pcm() argument 981 err = snd_pcm_new(chip->card, "CS4281", device, 1, 1, &pcm); snd_cs4281_pcm() 988 pcm->private_data = chip; snd_cs4281_pcm() 991 chip->pcm = pcm; snd_cs4281_pcm() 994 snd_dma_pci_data(chip->pci), 64*1024, 512*1024); snd_cs4281_pcm() 1018 struct cs4281 *chip = snd_kcontrol_chip(kcontrol); snd_cs4281_get_volume() local 1023 volL = CS_VOL_MASK - (snd_cs4281_peekBA0(chip, regL) & CS_VOL_MASK); snd_cs4281_get_volume() 1024 volR = CS_VOL_MASK - (snd_cs4281_peekBA0(chip, regR) & CS_VOL_MASK); snd_cs4281_get_volume() 1034 struct cs4281 *chip = snd_kcontrol_chip(kcontrol); snd_cs4281_put_volume() local 1040 volL = CS_VOL_MASK - (snd_cs4281_peekBA0(chip, regL) & CS_VOL_MASK); snd_cs4281_put_volume() 1041 volR = CS_VOL_MASK - (snd_cs4281_peekBA0(chip, regR) & CS_VOL_MASK); snd_cs4281_put_volume() 1045 snd_cs4281_pokeBA0(chip, regL, volL); snd_cs4281_put_volume() 1050 snd_cs4281_pokeBA0(chip, regR, volR); snd_cs4281_put_volume() 1082 struct cs4281 *chip = bus->private_data; snd_cs4281_mixer_free_ac97_bus() local 1083 chip->ac97_bus = NULL; snd_cs4281_mixer_free_ac97_bus() 1088 struct cs4281 *chip = ac97->private_data; snd_cs4281_mixer_free_ac97() local 1090 chip->ac97_secondary = NULL; snd_cs4281_mixer_free_ac97() 1092 chip->ac97 = NULL; snd_cs4281_mixer_free_ac97() 1095 static int snd_cs4281_mixer(struct cs4281 *chip) snd_cs4281_mixer() argument 1097 struct snd_card *card = chip->card; snd_cs4281_mixer() 1105 if ((err = snd_ac97_bus(card, 0, &ops, chip, &chip->ac97_bus)) < 0) snd_cs4281_mixer() 1107 chip->ac97_bus->private_free = snd_cs4281_mixer_free_ac97_bus; snd_cs4281_mixer() 1110 ac97.private_data = chip; snd_cs4281_mixer() 1112 if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97)) < 0) snd_cs4281_mixer() 1114 if (chip->dual_codec) { snd_cs4281_mixer() 1116 if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97_secondary)) < 0) snd_cs4281_mixer() 1119 if ((err = snd_ctl_add(card, snd_ctl_new1(&snd_cs4281_fm_vol, chip))) < 0) snd_cs4281_mixer() 1121 if ((err = snd_ctl_add(card, snd_ctl_new1(&snd_cs4281_pcm_vol, chip))) < 0) snd_cs4281_mixer() 1134 struct cs4281 *chip = entry->private_data; snd_cs4281_proc_read() local 1137 snd_iprintf(buffer, "Spurious half IRQs : %u\n", chip->spurious_dhtc_irq); snd_cs4281_proc_read() 1138 snd_iprintf(buffer, "Spurious end IRQs : %u\n", chip->spurious_dtc_irq); snd_cs4281_proc_read() 1146 struct cs4281 *chip = entry->private_data; snd_cs4281_BA0_read() local 1148 if (copy_to_user_fromio(buf, chip->ba0 + pos, count)) snd_cs4281_BA0_read() 1158 struct cs4281 *chip = entry->private_data; snd_cs4281_BA1_read() local 1160 if (copy_to_user_fromio(buf, chip->ba1 + pos, count)) snd_cs4281_BA1_read() 1173 static void snd_cs4281_proc_init(struct cs4281 *chip) snd_cs4281_proc_init() argument 1177 if (! snd_card_proc_new(chip->card, "cs4281", &entry)) snd_cs4281_proc_init() 1178 snd_info_set_text_ops(entry, chip, snd_cs4281_proc_read); snd_cs4281_proc_init() 1179 if (! snd_card_proc_new(chip->card, "cs4281_BA0", &entry)) { snd_cs4281_proc_init() 1181 entry->private_data = chip; snd_cs4281_proc_init() 1185 if (! snd_card_proc_new(chip->card, "cs4281_BA1", &entry)) { snd_cs4281_proc_init() 1187 entry->private_data = chip; snd_cs4281_proc_init() 1201 struct cs4281 *chip = gameport_get_port_data(gameport); snd_cs4281_gameport_trigger() local 1203 if (snd_BUG_ON(!chip)) snd_cs4281_gameport_trigger() 1205 snd_cs4281_pokeBA0(chip, BA0_JSPT, 0xff); snd_cs4281_gameport_trigger() 1210 struct cs4281 *chip = gameport_get_port_data(gameport); snd_cs4281_gameport_read() local 1212 if (snd_BUG_ON(!chip)) snd_cs4281_gameport_read() 1214 return snd_cs4281_peekBA0(chip, BA0_JSPT); snd_cs4281_gameport_read() 1221 struct cs4281 *chip = gameport_get_port_data(gameport); snd_cs4281_gameport_cooked_read() local 1224 if (snd_BUG_ON(!chip)) snd_cs4281_gameport_cooked_read() 1227 js1 = snd_cs4281_peekBA0(chip, BA0_JSC1); snd_cs4281_gameport_cooked_read() 1228 js2 = snd_cs4281_peekBA0(chip, BA0_JSC2); snd_cs4281_gameport_cooked_read() 1229 jst = snd_cs4281_peekBA0(chip, BA0_JSPT); snd_cs4281_gameport_cooked_read() 1261 static int snd_cs4281_create_gameport(struct cs4281 *chip) snd_cs4281_create_gameport() argument 1265 chip->gameport = gp = gameport_allocate_port(); snd_cs4281_create_gameport() 1267 dev_err(chip->card->dev, snd_cs4281_create_gameport() 1273 gameport_set_phys(gp, "pci%s/gameport0", pci_name(chip->pci)); snd_cs4281_create_gameport() 1274 gameport_set_dev_parent(gp, &chip->pci->dev); snd_cs4281_create_gameport() 1279 gameport_set_port_data(gp, chip); snd_cs4281_create_gameport() 1281 snd_cs4281_pokeBA0(chip, BA0_JSIO, 0xFF); // ? snd_cs4281_create_gameport() 1282 snd_cs4281_pokeBA0(chip, BA0_JSCTL, JSCTL_SP_MEDIUM_SLOW); snd_cs4281_create_gameport() 1289 static void snd_cs4281_free_gameport(struct cs4281 *chip) snd_cs4281_free_gameport() argument 1291 if (chip->gameport) { snd_cs4281_free_gameport() 1292 gameport_unregister_port(chip->gameport); snd_cs4281_free_gameport() 1293 chip->gameport = NULL; snd_cs4281_free_gameport() 1297 static inline int snd_cs4281_create_gameport(struct cs4281 *chip) { return -ENOSYS; } snd_cs4281_free_gameport() argument 1298 static inline void snd_cs4281_free_gameport(struct cs4281 *chip) { } snd_cs4281_free_gameport() argument 1301 static int snd_cs4281_free(struct cs4281 *chip) snd_cs4281_free() argument 1303 snd_cs4281_free_gameport(chip); snd_cs4281_free() 1305 if (chip->irq >= 0) snd_cs4281_free() 1306 synchronize_irq(chip->irq); snd_cs4281_free() 1309 snd_cs4281_pokeBA0(chip, BA0_HIMR, 0x7fffffff); snd_cs4281_free() 1311 snd_cs4281_pokeBA0(chip, BA0_CLKCR1, 0); snd_cs4281_free() 1313 snd_cs4281_pokeBA0(chip, BA0_SSPM, 0); snd_cs4281_free() 1315 pci_set_power_state(chip->pci, PCI_D3hot); snd_cs4281_free() 1317 if (chip->irq >= 0) snd_cs4281_free() 1318 free_irq(chip->irq, chip); snd_cs4281_free() 1319 iounmap(chip->ba0); snd_cs4281_free() 1320 iounmap(chip->ba1); snd_cs4281_free() 1321 pci_release_regions(chip->pci); snd_cs4281_free() 1322 pci_disable_device(chip->pci); snd_cs4281_free() 1324 kfree(chip); snd_cs4281_free() 1330 struct cs4281 *chip = device->device_data; snd_cs4281_dev_free() local 1331 return snd_cs4281_free(chip); snd_cs4281_dev_free() 1334 static int snd_cs4281_chip_init(struct cs4281 *chip); /* defined below */ 1341 struct cs4281 *chip; snd_cs4281_create() local 1351 chip = kzalloc(sizeof(*chip), GFP_KERNEL); snd_cs4281_create() 1352 if (chip == NULL) { snd_cs4281_create() 1356 spin_lock_init(&chip->reg_lock); snd_cs4281_create() 1357 chip->card = card; snd_cs4281_create() 1358 chip->pci = pci; snd_cs4281_create() 1359 chip->irq = -1; snd_cs4281_create() 1365 chip->dual_codec = dual_codec; snd_cs4281_create() 1368 kfree(chip); snd_cs4281_create() 1372 chip->ba0_addr = pci_resource_start(pci, 0); snd_cs4281_create() 1373 chip->ba1_addr = pci_resource_start(pci, 1); snd_cs4281_create() 1375 chip->ba0 = pci_ioremap_bar(pci, 0); snd_cs4281_create() 1376 chip->ba1 = pci_ioremap_bar(pci, 1); snd_cs4281_create() 1377 if (!chip->ba0 || !chip->ba1) { snd_cs4281_create() 1378 snd_cs4281_free(chip); snd_cs4281_create() 1383 KBUILD_MODNAME, chip)) { snd_cs4281_create() 1385 snd_cs4281_free(chip); snd_cs4281_create() 1388 chip->irq = pci->irq; snd_cs4281_create() 1390 tmp = snd_cs4281_chip_init(chip); snd_cs4281_create() 1392 snd_cs4281_free(chip); snd_cs4281_create() 1396 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) { snd_cs4281_create() 1397 snd_cs4281_free(chip); snd_cs4281_create() 1401 snd_cs4281_proc_init(chip); snd_cs4281_create() 1403 *rchip = chip; snd_cs4281_create() 1407 static int snd_cs4281_chip_init(struct cs4281 *chip) snd_cs4281_chip_init() argument 1413 /* Having EPPMC.FPDN=1 prevent proper chip initialisation */ snd_cs4281_chip_init() 1414 tmp = snd_cs4281_peekBA0(chip, BA0_EPPMC); snd_cs4281_chip_init() 1416 snd_cs4281_pokeBA0(chip, BA0_EPPMC, tmp & ~BA0_EPPMC_FPDN); snd_cs4281_chip_init() 1419 tmp = snd_cs4281_peekBA0(chip, BA0_CFLR); snd_cs4281_chip_init() 1421 snd_cs4281_pokeBA0(chip, BA0_CFLR, BA0_CFLR_DEFAULT); snd_cs4281_chip_init() 1422 tmp = snd_cs4281_peekBA0(chip, BA0_CFLR); snd_cs4281_chip_init() 1424 dev_err(chip->card->dev, snd_cs4281_chip_init() 1433 snd_cs4281_pokeBA0(chip, BA0_CWPR, 0x4281); snd_cs4281_chip_init() 1435 if ((tmp = snd_cs4281_peekBA0(chip, BA0_SERC1)) != (BA0_SERC1_SO1EN | BA0_SERC1_AC97)) { snd_cs4281_chip_init() 1436 dev_err(chip->card->dev, snd_cs4281_chip_init() 1440 if ((tmp = snd_cs4281_peekBA0(chip, BA0_SERC2)) != (BA0_SERC2_SI1EN | BA0_SERC2_AC97)) { snd_cs4281_chip_init() 1441 dev_err(chip->card->dev, snd_cs4281_chip_init() 1447 snd_cs4281_pokeBA0(chip, BA0_SSPM, BA0_SSPM_MIXEN | BA0_SSPM_CSRCEN | snd_cs4281_chip_init() 1456 snd_cs4281_pokeBA0(chip, BA0_CLKCR1, 0); snd_cs4281_chip_init() 1457 snd_cs4281_pokeBA0(chip, BA0_SERMC, 0); snd_cs4281_chip_init() 1461 snd_cs4281_pokeBA0(chip, BA0_ACCTL, 0); snd_cs4281_chip_init() 1468 snd_cs4281_pokeBA0(chip, BA0_SPMC, 0); snd_cs4281_chip_init() 1470 snd_cs4281_pokeBA0(chip, BA0_SPMC, BA0_SPMC_RSTN); snd_cs4281_chip_init() 1473 if (chip->dual_codec) snd_cs4281_chip_init() 1474 snd_cs4281_pokeBA0(chip, BA0_SPMC, BA0_SPMC_RSTN | BA0_SPMC_ASDI2E); snd_cs4281_chip_init() 1479 snd_cs4281_pokeBA0(chip, BA0_SERMC, snd_cs4281_chip_init() 1480 (chip->dual_codec ? BA0_SERMC_TCID(chip->dual_codec) : BA0_SERMC_TCID(1)) | snd_cs4281_chip_init() 1486 snd_cs4281_pokeBA0(chip, BA0_CLKCR1, BA0_CLKCR1_DLLP); snd_cs4281_chip_init() 1488 snd_cs4281_pokeBA0(chip, BA0_CLKCR1, BA0_CLKCR1_SWCE | BA0_CLKCR1_DLLP); snd_cs4281_chip_init() 1499 if (snd_cs4281_peekBA0(chip, BA0_CLKCR1) & BA0_CLKCR1_DLLRDY) snd_cs4281_chip_init() 1504 dev_err(chip->card->dev, "DLLRDY not seen\n"); snd_cs4281_chip_init() 1514 snd_cs4281_pokeBA0(chip, BA0_ACCTL, BA0_ACCTL_ESYN); snd_cs4281_chip_init() 1525 if (snd_cs4281_peekBA0(chip, BA0_ACSTS) & BA0_ACSTS_CRDY) snd_cs4281_chip_init() 1530 dev_err(chip->card->dev, snd_cs4281_chip_init() 1532 snd_cs4281_peekBA0(chip, BA0_ACSTS)); snd_cs4281_chip_init() 1536 if (chip->dual_codec) { snd_cs4281_chip_init() 1539 if (snd_cs4281_peekBA0(chip, BA0_ACSTS2) & BA0_ACSTS_CRDY) snd_cs4281_chip_init() 1543 dev_info(chip->card->dev, snd_cs4281_chip_init() 1545 chip->dual_codec = 0; snd_cs4281_chip_init() 1554 snd_cs4281_pokeBA0(chip, BA0_ACCTL, BA0_ACCTL_VFRM | BA0_ACCTL_ESYN); snd_cs4281_chip_init() 1567 if ((snd_cs4281_peekBA0(chip, BA0_ACISV) & (BA0_ACISV_SLV(3) | BA0_ACISV_SLV(4))) == (BA0_ACISV_SLV(3) | BA0_ACISV_SLV(4))) snd_cs4281_chip_init() 1574 dev_err(chip->card->dev, "never read ISV3 and ISV4 from AC'97\n"); snd_cs4281_chip_init() 1583 snd_cs4281_pokeBA0(chip, BA0_ACOSV, BA0_ACOSV_SLV(3) | BA0_ACOSV_SLV(4)); snd_cs4281_chip_init() 1589 struct cs4281_dma *dma = &chip->dma[tmp]; snd_cs4281_chip_init() 1600 snd_cs4281_pokeBA0(chip, dma->regFCR, snd_cs4281_chip_init() 1607 chip->src_left_play_slot = 0; /* AC'97 left PCM playback (3) */ snd_cs4281_chip_init() 1608 chip->src_right_play_slot = 1; /* AC'97 right PCM playback (4) */ snd_cs4281_chip_init() 1609 chip->src_left_rec_slot = 10; /* AC'97 left PCM record (3) */ snd_cs4281_chip_init() 1610 chip->src_right_rec_slot = 11; /* AC'97 right PCM record (4) */ snd_cs4281_chip_init() 1613 chip->dma[0].valFCR = BA0_FCR_FEN | BA0_FCR_LS(0) | snd_cs4281_chip_init() 1616 BA0_FCR_OF(chip->dma[0].fifo_offset); snd_cs4281_chip_init() 1617 snd_cs4281_pokeBA0(chip, chip->dma[0].regFCR, chip->dma[0].valFCR); snd_cs4281_chip_init() 1618 snd_cs4281_pokeBA0(chip, BA0_SRCSA, (chip->src_left_play_slot << 0) | snd_cs4281_chip_init() 1619 (chip->src_right_play_slot << 8) | snd_cs4281_chip_init() 1620 (chip->src_left_rec_slot << 16) | snd_cs4281_chip_init() 1621 (chip->src_right_rec_slot << 24)); snd_cs4281_chip_init() 1624 snd_cs4281_pokeBA0(chip, BA0_PPLVC, 0); snd_cs4281_chip_init() 1625 snd_cs4281_pokeBA0(chip, BA0_PPRVC, 0); snd_cs4281_chip_init() 1628 snd_cs4281_pokeBA0(chip, BA0_HICR, BA0_HICR_EOI); snd_cs4281_chip_init() 1630 snd_cs4281_pokeBA0(chip, BA0_HIMR, 0x7fffffff & ~( snd_cs4281_chip_init() 1637 synchronize_irq(chip->irq); snd_cs4281_chip_init() 1646 static void snd_cs4281_midi_reset(struct cs4281 *chip) snd_cs4281_midi_reset() argument 1648 snd_cs4281_pokeBA0(chip, BA0_MIDCR, chip->midcr | BA0_MIDCR_MRST); snd_cs4281_midi_reset() 1650 snd_cs4281_pokeBA0(chip, BA0_MIDCR, chip->midcr); snd_cs4281_midi_reset() 1655 struct cs4281 *chip = substream->rmidi->private_data; snd_cs4281_midi_input_open() local 1657 spin_lock_irq(&chip->reg_lock); snd_cs4281_midi_input_open() 1658 chip->midcr |= BA0_MIDCR_RXE; snd_cs4281_midi_input_open() 1659 chip->midi_input = substream; snd_cs4281_midi_input_open() 1660 if (!(chip->uartm & CS4281_MODE_OUTPUT)) { snd_cs4281_midi_input_open() 1661 snd_cs4281_midi_reset(chip); snd_cs4281_midi_input_open() 1663 snd_cs4281_pokeBA0(chip, BA0_MIDCR, chip->midcr); snd_cs4281_midi_input_open() 1665 spin_unlock_irq(&chip->reg_lock); snd_cs4281_midi_input_open() 1671 struct cs4281 *chip = substream->rmidi->private_data; snd_cs4281_midi_input_close() local 1673 spin_lock_irq(&chip->reg_lock); snd_cs4281_midi_input_close() 1674 chip->midcr &= ~(BA0_MIDCR_RXE | BA0_MIDCR_RIE); snd_cs4281_midi_input_close() 1675 chip->midi_input = NULL; snd_cs4281_midi_input_close() 1676 if (!(chip->uartm & CS4281_MODE_OUTPUT)) { snd_cs4281_midi_input_close() 1677 snd_cs4281_midi_reset(chip); snd_cs4281_midi_input_close() 1679 snd_cs4281_pokeBA0(chip, BA0_MIDCR, chip->midcr); snd_cs4281_midi_input_close() 1681 chip->uartm &= ~CS4281_MODE_INPUT; snd_cs4281_midi_input_close() 1682 spin_unlock_irq(&chip->reg_lock); snd_cs4281_midi_input_close() 1688 struct cs4281 *chip = substream->rmidi->private_data; snd_cs4281_midi_output_open() local 1690 spin_lock_irq(&chip->reg_lock); snd_cs4281_midi_output_open() 1691 chip->uartm |= CS4281_MODE_OUTPUT; snd_cs4281_midi_output_open() 1692 chip->midcr |= BA0_MIDCR_TXE; snd_cs4281_midi_output_open() 1693 chip->midi_output = substream; snd_cs4281_midi_output_open() 1694 if (!(chip->uartm & CS4281_MODE_INPUT)) { snd_cs4281_midi_output_open() 1695 snd_cs4281_midi_reset(chip); snd_cs4281_midi_output_open() 1697 snd_cs4281_pokeBA0(chip, BA0_MIDCR, chip->midcr); snd_cs4281_midi_output_open() 1699 spin_unlock_irq(&chip->reg_lock); snd_cs4281_midi_output_open() 1705 struct cs4281 *chip = substream->rmidi->private_data; snd_cs4281_midi_output_close() local 1707 spin_lock_irq(&chip->reg_lock); snd_cs4281_midi_output_close() 1708 chip->midcr &= ~(BA0_MIDCR_TXE | BA0_MIDCR_TIE); snd_cs4281_midi_output_close() 1709 chip->midi_output = NULL; snd_cs4281_midi_output_close() 1710 if (!(chip->uartm & CS4281_MODE_INPUT)) { snd_cs4281_midi_output_close() 1711 snd_cs4281_midi_reset(chip); snd_cs4281_midi_output_close() 1713 snd_cs4281_pokeBA0(chip, BA0_MIDCR, chip->midcr); snd_cs4281_midi_output_close() 1715 chip->uartm &= ~CS4281_MODE_OUTPUT; snd_cs4281_midi_output_close() 1716 spin_unlock_irq(&chip->reg_lock); snd_cs4281_midi_output_close() 1723 struct cs4281 *chip = substream->rmidi->private_data; snd_cs4281_midi_input_trigger() local 1725 spin_lock_irqsave(&chip->reg_lock, flags); snd_cs4281_midi_input_trigger() 1727 if ((chip->midcr & BA0_MIDCR_RIE) == 0) { snd_cs4281_midi_input_trigger() 1728 chip->midcr |= BA0_MIDCR_RIE; snd_cs4281_midi_input_trigger() 1729 snd_cs4281_pokeBA0(chip, BA0_MIDCR, chip->midcr); snd_cs4281_midi_input_trigger() 1732 if (chip->midcr & BA0_MIDCR_RIE) { snd_cs4281_midi_input_trigger() 1733 chip->midcr &= ~BA0_MIDCR_RIE; snd_cs4281_midi_input_trigger() 1734 snd_cs4281_pokeBA0(chip, BA0_MIDCR, chip->midcr); snd_cs4281_midi_input_trigger() 1737 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_cs4281_midi_input_trigger() 1743 struct cs4281 *chip = substream->rmidi->private_data; snd_cs4281_midi_output_trigger() local 1746 spin_lock_irqsave(&chip->reg_lock, flags); snd_cs4281_midi_output_trigger() 1748 if ((chip->midcr & BA0_MIDCR_TIE) == 0) { snd_cs4281_midi_output_trigger() 1749 chip->midcr |= BA0_MIDCR_TIE; snd_cs4281_midi_output_trigger() 1751 while ((chip->midcr & BA0_MIDCR_TIE) && snd_cs4281_midi_output_trigger() 1752 (snd_cs4281_peekBA0(chip, BA0_MIDSR) & BA0_MIDSR_TBF) == 0) { snd_cs4281_midi_output_trigger() 1754 chip->midcr &= ~BA0_MIDCR_TIE; snd_cs4281_midi_output_trigger() 1756 snd_cs4281_pokeBA0(chip, BA0_MIDWP, byte); snd_cs4281_midi_output_trigger() 1759 snd_cs4281_pokeBA0(chip, BA0_MIDCR, chip->midcr); snd_cs4281_midi_output_trigger() 1762 if (chip->midcr & BA0_MIDCR_TIE) { snd_cs4281_midi_output_trigger() 1763 chip->midcr &= ~BA0_MIDCR_TIE; snd_cs4281_midi_output_trigger() 1764 snd_cs4281_pokeBA0(chip, BA0_MIDCR, chip->midcr); snd_cs4281_midi_output_trigger() 1767 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_cs4281_midi_output_trigger() 1784 static int snd_cs4281_midi(struct cs4281 *chip, int device) snd_cs4281_midi() argument 1789 if ((err = snd_rawmidi_new(chip->card, "CS4281", device, 1, 1, &rmidi)) < 0) snd_cs4281_midi() 1795 rmidi->private_data = chip; snd_cs4281_midi() 1796 chip->rmidi = rmidi; snd_cs4281_midi() 1806 struct cs4281 *chip = dev_id; snd_cs4281_interrupt() local 1810 if (chip == NULL) snd_cs4281_interrupt() 1812 status = snd_cs4281_peekBA0(chip, BA0_HISR); snd_cs4281_interrupt() 1814 snd_cs4281_pokeBA0(chip, BA0_HICR, BA0_HICR_EOI); snd_cs4281_interrupt() 1821 cdma = &chip->dma[dma]; snd_cs4281_interrupt() 1822 spin_lock(&chip->reg_lock); snd_cs4281_interrupt() 1824 val = snd_cs4281_peekBA0(chip, cdma->regHDSR); snd_cs4281_interrupt() 1830 chip->spurious_dhtc_irq++; snd_cs4281_interrupt() 1831 spin_unlock(&chip->reg_lock); snd_cs4281_interrupt() 1836 chip->spurious_dtc_irq++; snd_cs4281_interrupt() 1837 spin_unlock(&chip->reg_lock); snd_cs4281_interrupt() 1840 spin_unlock(&chip->reg_lock); snd_cs4281_interrupt() 1845 if ((status & BA0_HISR_MIDI) && chip->rmidi) { snd_cs4281_interrupt() 1848 spin_lock(&chip->reg_lock); snd_cs4281_interrupt() 1849 while ((snd_cs4281_peekBA0(chip, BA0_MIDSR) & BA0_MIDSR_RBE) == 0) { snd_cs4281_interrupt() 1850 c = snd_cs4281_peekBA0(chip, BA0_MIDRP); snd_cs4281_interrupt() 1851 if ((chip->midcr & BA0_MIDCR_RIE) == 0) snd_cs4281_interrupt() 1853 snd_rawmidi_receive(chip->midi_input, &c, 1); snd_cs4281_interrupt() 1855 while ((snd_cs4281_peekBA0(chip, BA0_MIDSR) & BA0_MIDSR_TBF) == 0) { snd_cs4281_interrupt() 1856 if ((chip->midcr & BA0_MIDCR_TIE) == 0) snd_cs4281_interrupt() 1858 if (snd_rawmidi_transmit(chip->midi_output, &c, 1) != 1) { snd_cs4281_interrupt() 1859 chip->midcr &= ~BA0_MIDCR_TIE; snd_cs4281_interrupt() 1860 snd_cs4281_pokeBA0(chip, BA0_MIDCR, chip->midcr); snd_cs4281_interrupt() 1863 snd_cs4281_pokeBA0(chip, BA0_MIDWP, c); snd_cs4281_interrupt() 1865 spin_unlock(&chip->reg_lock); snd_cs4281_interrupt() 1869 snd_cs4281_pokeBA0(chip, BA0_HICR, BA0_HICR_EOI); snd_cs4281_interrupt() 1882 struct cs4281 *chip = opl3->private_data; snd_cs4281_opl3_command() local 1886 port = chip->ba0 + BA0_B1AP; /* right port */ snd_cs4281_opl3_command() 1888 port = chip->ba0 + BA0_B0AP; /* left port */ snd_cs4281_opl3_command() 1906 struct cs4281 *chip; snd_cs4281_probe() local 1922 if ((err = snd_cs4281_create(card, pci, &chip, dual_codec[dev])) < 0) { snd_cs4281_probe() 1926 card->private_data = chip; snd_cs4281_probe() 1928 if ((err = snd_cs4281_mixer(chip)) < 0) { snd_cs4281_probe() 1932 if ((err = snd_cs4281_pcm(chip, 0)) < 0) { snd_cs4281_probe() 1936 if ((err = snd_cs4281_midi(chip, 0)) < 0) { snd_cs4281_probe() 1944 opl3->private_data = chip; snd_cs4281_probe() 1951 snd_cs4281_create_gameport(chip); snd_cs4281_probe() 1956 chip->ba0_addr, snd_cs4281_probe() 1957 chip->irq); snd_cs4281_probe() 2000 struct cs4281 *chip = card->private_data; cs4281_suspend() local 2005 snd_pcm_suspend_all(chip->pcm); cs4281_suspend() 2007 snd_ac97_suspend(chip->ac97); cs4281_suspend() 2008 snd_ac97_suspend(chip->ac97_secondary); cs4281_suspend() 2010 ulCLK = snd_cs4281_peekBA0(chip, BA0_CLKCR1); cs4281_suspend() 2012 snd_cs4281_pokeBA0(chip, BA0_CLKCR1, ulCLK); cs4281_suspend() 2015 snd_cs4281_pokeBA0(chip, BA0_HICR, BA0_HICR_CHGM); cs4281_suspend() 2020 chip->suspend_regs[i] = snd_cs4281_peekBA0(chip, saved_regs[i]); cs4281_suspend() 2023 snd_cs4281_pokeBA0(chip, BA0_SERMC, 0); cs4281_suspend() 2026 snd_cs4281_pokeBA0(chip, BA0_SSPM, 0); cs4281_suspend() 2029 snd_cs4281_pokeBA0(chip, BA0_CLKCR1, 0); cs4281_suspend() 2032 snd_cs4281_pokeBA0(chip, BA0_SPMC, 0); cs4281_suspend() 2034 ulCLK = snd_cs4281_peekBA0(chip, BA0_CLKCR1); cs4281_suspend() 2036 snd_cs4281_pokeBA0(chip, BA0_CLKCR1, ulCLK); cs4281_suspend() 2043 struct cs4281 *chip = card->private_data; cs4281_resume() local 2047 ulCLK = snd_cs4281_peekBA0(chip, BA0_CLKCR1); cs4281_resume() 2049 snd_cs4281_pokeBA0(chip, BA0_CLKCR1, ulCLK); cs4281_resume() 2051 snd_cs4281_chip_init(chip); cs4281_resume() 2056 snd_cs4281_pokeBA0(chip, saved_regs[i], chip->suspend_regs[i]); cs4281_resume() 2058 snd_ac97_resume(chip->ac97); cs4281_resume() 2059 snd_ac97_resume(chip->ac97_secondary); cs4281_resume() 2061 ulCLK = snd_cs4281_peekBA0(chip, BA0_CLKCR1); cs4281_resume() 2063 snd_cs4281_pokeBA0(chip, BA0_CLKCR1, ulCLK); cs4281_resume()
H A D	bt87x.c	217 static inline u32 snd_bt87x_readl(struct snd_bt87x *chip, u32 reg) snd_bt87x_readl() argument 219 return readl(chip->mmio + reg); snd_bt87x_readl() 222 static inline void snd_bt87x_writel(struct snd_bt87x *chip, u32 reg, u32 value) snd_bt87x_writel() argument 224 writel(value, chip->mmio + reg); snd_bt87x_writel() 227 static int snd_bt87x_create_risc(struct snd_bt87x *chip, struct snd_pcm_substream *substream, snd_bt87x_create_risc() argument 233 if (chip->dma_risc.area == NULL) { snd_bt87x_create_risc() 234 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci), snd_bt87x_create_risc() 235 PAGE_ALIGN(MAX_RISC_SIZE), &chip->dma_risc) < 0) snd_bt87x_create_risc() 238 risc = (u32 *)chip->dma_risc.area; snd_bt87x_create_risc() 272 *risc++ = cpu_to_le32(chip->dma_risc.addr); snd_bt87x_create_risc() 273 chip->line_bytes = period_bytes; snd_bt87x_create_risc() 274 chip->lines = periods; snd_bt87x_create_risc() 278 static void snd_bt87x_free_risc(struct snd_bt87x *chip) snd_bt87x_free_risc() argument 280 if (chip->dma_risc.area) { snd_bt87x_free_risc() 281 snd_dma_free_pages(&chip->dma_risc); snd_bt87x_free_risc() 282 chip->dma_risc.area = NULL; snd_bt87x_free_risc() 286 static void snd_bt87x_pci_error(struct snd_bt87x *chip, unsigned int status) snd_bt87x_pci_error() argument 290 pci_read_config_word(chip->pci, PCI_STATUS, &pci_status); snd_bt87x_pci_error() 294 pci_write_config_word(chip->pci, PCI_STATUS, pci_status); snd_bt87x_pci_error() 296 dev_err(chip->card->dev, snd_bt87x_pci_error() 300 dev_err(chip->card->dev, snd_bt87x_pci_error() 303 chip->pci_parity_errors++; snd_bt87x_pci_error() 304 if (chip->pci_parity_errors > 20) { snd_bt87x_pci_error() 305 dev_err(chip->card->dev, snd_bt87x_pci_error() 307 dev_err(chip->card->dev, snd_bt87x_pci_error() 309 dev_err(chip->card->dev, snd_bt87x_pci_error() 311 dev_err(chip->card->dev, snd_bt87x_pci_error() 313 chip->interrupt_mask &= ~(INT_PPERR | INT_RIPERR); snd_bt87x_pci_error() 314 snd_bt87x_writel(chip, REG_INT_MASK, chip->interrupt_mask); snd_bt87x_pci_error() 321 struct snd_bt87x *chip = dev_id; snd_bt87x_interrupt() local 324 status = snd_bt87x_readl(chip, REG_INT_STAT); snd_bt87x_interrupt() 325 irq_status = status & chip->interrupt_mask; snd_bt87x_interrupt() 328 snd_bt87x_writel(chip, REG_INT_STAT, irq_status); snd_bt87x_interrupt() 332 dev_warn(chip->card->dev, snd_bt87x_interrupt() 335 dev_err(chip->card->dev, snd_bt87x_interrupt() 338 snd_bt87x_pci_error(chip, irq_status); snd_bt87x_interrupt() 340 if ((irq_status & INT_RISCI) && (chip->reg_control & CTL_ACAP_EN)) { snd_bt87x_interrupt() 344 chip->current_line = (chip->current_line + 1) % chip->lines; snd_bt87x_interrupt() 346 current_block = chip->current_line * 16 / chip->lines; snd_bt87x_interrupt() 349 chip->current_line = (irq_block * chip->lines + 15) / 16; snd_bt87x_interrupt() 351 snd_pcm_period_elapsed(chip->substream); snd_bt87x_interrupt() 392 static int snd_bt87x_set_digital_hw(struct snd_bt87x *chip, struct snd_pcm_runtime *runtime) snd_bt87x_set_digital_hw() argument 394 chip->reg_control |= CTL_DA_IOM_DA | CTL_A_PWRDN; snd_bt87x_set_digital_hw() 396 runtime->hw.rates = snd_pcm_rate_to_rate_bit(chip->board.dig_rate); snd_bt87x_set_digital_hw() 397 runtime->hw.rate_min = chip->board.dig_rate; snd_bt87x_set_digital_hw() 398 runtime->hw.rate_max = chip->board.dig_rate; snd_bt87x_set_digital_hw() 402 static int snd_bt87x_set_analog_hw(struct snd_bt87x *chip, struct snd_pcm_runtime *runtime) snd_bt87x_set_analog_hw() argument 415 chip->reg_control &= ~(CTL_DA_IOM_DA | CTL_A_PWRDN); snd_bt87x_set_analog_hw() 423 struct snd_bt87x *chip = snd_pcm_substream_chip(substream); snd_bt87x_pcm_open() local 427 if (test_and_set_bit(0, &chip->opened)) snd_bt87x_pcm_open() 431 err = snd_bt87x_set_digital_hw(chip, runtime); snd_bt87x_pcm_open() 433 err = snd_bt87x_set_analog_hw(chip, runtime); snd_bt87x_pcm_open() 441 chip->substream = substream; snd_bt87x_pcm_open() 445 clear_bit(0, &chip->opened); snd_bt87x_pcm_open() 452 struct snd_bt87x *chip = snd_pcm_substream_chip(substream); snd_bt87x_close() local 454 spin_lock_irq(&chip->reg_lock); snd_bt87x_close() 455 chip->reg_control |= CTL_A_PWRDN; snd_bt87x_close() 456 snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control); snd_bt87x_close() 457 spin_unlock_irq(&chip->reg_lock); snd_bt87x_close() 459 chip->substream = NULL; snd_bt87x_close() 460 clear_bit(0, &chip->opened); snd_bt87x_close() 468 struct snd_bt87x *chip = snd_pcm_substream_chip(substream); snd_bt87x_hw_params() local 475 return snd_bt87x_create_risc(chip, substream, snd_bt87x_hw_params() 482 struct snd_bt87x *chip = snd_pcm_substream_chip(substream); snd_bt87x_hw_free() local 484 snd_bt87x_free_risc(chip); snd_bt87x_hw_free() 491 struct snd_bt87x *chip = snd_pcm_substream_chip(substream); snd_bt87x_prepare() local 495 spin_lock_irq(&chip->reg_lock); snd_bt87x_prepare() 496 chip->reg_control &= ~(CTL_DA_SDR_MASK | CTL_DA_SBR); snd_bt87x_prepare() 498 chip->reg_control |= decimation << CTL_DA_SDR_SHIFT; snd_bt87x_prepare() 500 chip->reg_control |= CTL_DA_SBR; snd_bt87x_prepare() 501 snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control); snd_bt87x_prepare() 502 spin_unlock_irq(&chip->reg_lock); snd_bt87x_prepare() 506 static int snd_bt87x_start(struct snd_bt87x *chip) snd_bt87x_start() argument 508 spin_lock(&chip->reg_lock); snd_bt87x_start() 509 chip->current_line = 0; snd_bt87x_start() 510 chip->reg_control |= CTL_FIFO_ENABLE | CTL_RISC_ENABLE | CTL_ACAP_EN; snd_bt87x_start() 511 snd_bt87x_writel(chip, REG_RISC_STRT_ADD, chip->dma_risc.addr); snd_bt87x_start() 512 snd_bt87x_writel(chip, REG_PACKET_LEN, snd_bt87x_start() 513 chip->line_bytes | (chip->lines << 16)); snd_bt87x_start() 514 snd_bt87x_writel(chip, REG_INT_MASK, chip->interrupt_mask); snd_bt87x_start() 515 snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control); snd_bt87x_start() 516 spin_unlock(&chip->reg_lock); snd_bt87x_start() 520 static int snd_bt87x_stop(struct snd_bt87x *chip) snd_bt87x_stop() argument 522 spin_lock(&chip->reg_lock); snd_bt87x_stop() 523 chip->reg_control &= ~(CTL_FIFO_ENABLE | CTL_RISC_ENABLE | CTL_ACAP_EN); snd_bt87x_stop() 524 snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control); snd_bt87x_stop() 525 snd_bt87x_writel(chip, REG_INT_MASK, 0); snd_bt87x_stop() 526 snd_bt87x_writel(chip, REG_INT_STAT, MY_INTERRUPTS); snd_bt87x_stop() 527 spin_unlock(&chip->reg_lock); snd_bt87x_stop() 533 struct snd_bt87x *chip = snd_pcm_substream_chip(substream); snd_bt87x_trigger() local 537 return snd_bt87x_start(chip); snd_bt87x_trigger() 539 return snd_bt87x_stop(chip); snd_bt87x_trigger() 547 struct snd_bt87x *chip = snd_pcm_substream_chip(substream); snd_bt87x_pointer() local 550 return (snd_pcm_uframes_t)bytes_to_frames(runtime, chip->current_line * chip->line_bytes); snd_bt87x_pointer() 578 struct snd_bt87x *chip = snd_kcontrol_chip(kcontrol); snd_bt87x_capture_volume_get() local 580 value->value.integer.value[0] = (chip->reg_control & CTL_A_GAIN_MASK) >> CTL_A_GAIN_SHIFT; snd_bt87x_capture_volume_get() 587 struct snd_bt87x *chip = snd_kcontrol_chip(kcontrol); snd_bt87x_capture_volume_put() local 591 spin_lock_irq(&chip->reg_lock); snd_bt87x_capture_volume_put() 592 old_control = chip->reg_control; snd_bt87x_capture_volume_put() 593 chip->reg_control = (chip->reg_control & ~CTL_A_GAIN_MASK) snd_bt87x_capture_volume_put() 595 snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control); snd_bt87x_capture_volume_put() 596 changed = old_control != chip->reg_control; snd_bt87x_capture_volume_put() 597 spin_unlock_irq(&chip->reg_lock); snd_bt87x_capture_volume_put() 614 struct snd_bt87x *chip = snd_kcontrol_chip(kcontrol); snd_bt87x_capture_boost_get() local 616 value->value.integer.value[0] = !! (chip->reg_control & CTL_A_G2X); snd_bt87x_capture_boost_get() 623 struct snd_bt87x *chip = snd_kcontrol_chip(kcontrol); snd_bt87x_capture_boost_put() local 627 spin_lock_irq(&chip->reg_lock); snd_bt87x_capture_boost_put() 628 old_control = chip->reg_control; snd_bt87x_capture_boost_put() 629 chip->reg_control = (chip->reg_control & ~CTL_A_G2X) snd_bt87x_capture_boost_put() 631 snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control); snd_bt87x_capture_boost_put() 632 changed = chip->reg_control != old_control; snd_bt87x_capture_boost_put() 633 spin_unlock_irq(&chip->reg_lock); snd_bt87x_capture_boost_put() 656 struct snd_bt87x *chip = snd_kcontrol_chip(kcontrol); snd_bt87x_capture_source_get() local 658 value->value.enumerated.item[0] = (chip->reg_control & CTL_A_SEL_MASK) >> CTL_A_SEL_SHIFT; snd_bt87x_capture_source_get() 665 struct snd_bt87x *chip = snd_kcontrol_chip(kcontrol); snd_bt87x_capture_source_put() local 669 spin_lock_irq(&chip->reg_lock); snd_bt87x_capture_source_put() 670 old_control = chip->reg_control; snd_bt87x_capture_source_put() 671 chip->reg_control = (chip->reg_control & ~CTL_A_SEL_MASK) snd_bt87x_capture_source_put() 673 snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control); snd_bt87x_capture_source_put() 674 changed = chip->reg_control != old_control; snd_bt87x_capture_source_put() 675 spin_unlock_irq(&chip->reg_lock); snd_bt87x_capture_source_put() 687 static int snd_bt87x_free(struct snd_bt87x *chip) snd_bt87x_free() argument 689 if (chip->mmio) snd_bt87x_free() 690 snd_bt87x_stop(chip); snd_bt87x_free() 691 if (chip->irq >= 0) snd_bt87x_free() 692 free_irq(chip->irq, chip); snd_bt87x_free() 693 iounmap(chip->mmio); snd_bt87x_free() 694 pci_release_regions(chip->pci); snd_bt87x_free() 695 pci_disable_device(chip->pci); snd_bt87x_free() 696 kfree(chip); snd_bt87x_free() 702 struct snd_bt87x *chip = device->device_data; snd_bt87x_dev_free() local 703 return snd_bt87x_free(chip); snd_bt87x_dev_free() 706 static int snd_bt87x_pcm(struct snd_bt87x *chip, int device, char *name) snd_bt87x_pcm() argument 711 err = snd_pcm_new(chip->card, name, device, 0, 1, &pcm); snd_bt87x_pcm() 714 pcm->private_data = chip; snd_bt87x_pcm() 719 snd_dma_pci_data(chip->pci), snd_bt87x_pcm() 728 struct snd_bt87x *chip; snd_bt87x_create() local 740 chip = kzalloc(sizeof(*chip), GFP_KERNEL); snd_bt87x_create() 741 if (!chip) { snd_bt87x_create() 745 chip->card = card; snd_bt87x_create() 746 chip->pci = pci; snd_bt87x_create() 747 chip->irq = -1; snd_bt87x_create() 748 spin_lock_init(&chip->reg_lock); snd_bt87x_create() 751 kfree(chip); snd_bt87x_create() 755 chip->mmio = pci_ioremap_bar(pci, 0); snd_bt87x_create() 756 if (!chip->mmio) { snd_bt87x_create() 762 chip->reg_control = CTL_A_PWRDN | CTL_DA_ES2 | snd_bt87x_create() 764 chip->interrupt_mask = MY_INTERRUPTS; snd_bt87x_create() 765 snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control); snd_bt87x_create() 766 snd_bt87x_writel(chip, REG_INT_MASK, 0); snd_bt87x_create() 767 snd_bt87x_writel(chip, REG_INT_STAT, MY_INTERRUPTS); snd_bt87x_create() 770 KBUILD_MODNAME, chip); snd_bt87x_create() 775 chip->irq = pci->irq; snd_bt87x_create() 777 synchronize_irq(chip->irq); snd_bt87x_create() 779 err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops); snd_bt87x_create() 783 *rchip = chip; snd_bt87x_create() 787 snd_bt87x_free(chip); snd_bt87x_create() 791 #define BT_DEVICE(chip, subvend, subdev, id) \ 793 .device = chip, \ 879 struct snd_bt87x *chip; snd_bt87x_probe() local 903 err = snd_bt87x_create(card, pci, &chip); snd_bt87x_probe() 907 memcpy(&chip->board, &snd_bt87x_boards[boardid], sizeof(chip->board)); snd_bt87x_probe() 909 if (!chip->board.no_digital) { snd_bt87x_probe() 911 chip->board.dig_rate = digital_rate[dev]; snd_bt87x_probe() 913 chip->reg_control |= chip->board.digital_fmt; snd_bt87x_probe() 915 err = snd_bt87x_pcm(chip, DEVICE_DIGITAL, "Bt87x Digital"); snd_bt87x_probe() 919 if (!chip->board.no_analog) { snd_bt87x_probe() 920 err = snd_bt87x_pcm(chip, DEVICE_ANALOG, "Bt87x Analog"); snd_bt87x_probe() 924 &snd_bt87x_capture_volume, chip)); snd_bt87x_probe() 928 &snd_bt87x_capture_boost, chip)); snd_bt87x_probe() 932 &snd_bt87x_capture_source, chip)); snd_bt87x_probe() 938 chip->board.no_analog ? "no " : "", snd_bt87x_probe() 939 chip->board.no_digital ? "no " : "", chip->board.dig_rate); snd_bt87x_probe() 945 chip->irq); snd_bt87x_probe()
H A D	via82xx_modem.c	283 struct via82xx_modem *chip = snd_pcm_substream_chip(substream); build_via_table() local 289 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci), build_via_table() 366 static inline unsigned int snd_via82xx_codec_xread(struct via82xx_modem *chip) snd_via82xx_codec_xread() argument 368 return inl(VIAREG(chip, AC97)); snd_via82xx_codec_xread() 371 static inline void snd_via82xx_codec_xwrite(struct via82xx_modem *chip, unsigned int val) snd_via82xx_codec_xwrite() argument 373 outl(val, VIAREG(chip, AC97)); snd_via82xx_codec_xwrite() 376 static int snd_via82xx_codec_ready(struct via82xx_modem *chip, int secondary) snd_via82xx_codec_ready() argument 383 if (!((val = snd_via82xx_codec_xread(chip)) & VIA_REG_AC97_BUSY)) snd_via82xx_codec_ready() 386 dev_err(chip->card->dev, "codec_ready: codec %i is not ready [0x%x]\n", snd_via82xx_codec_ready() 387 secondary, snd_via82xx_codec_xread(chip)); snd_via82xx_codec_ready() 391 static int snd_via82xx_codec_valid(struct via82xx_modem *chip, int secondary) snd_via82xx_codec_valid() argument 399 val = snd_via82xx_codec_xread(chip); snd_via82xx_codec_valid() 410 struct via82xx_modem *chip = ac97->private_data; snd_via82xx_codec_wait() local 412 err = snd_via82xx_codec_ready(chip, ac97->num); snd_via82xx_codec_wait() 421 struct via82xx_modem *chip = ac97->private_data; snd_via82xx_codec_write() local 424 outl(val, VIAREG(chip, GPI_STATUS)); snd_via82xx_codec_write() 431 snd_via82xx_codec_xwrite(chip, xval); snd_via82xx_codec_write() 432 snd_via82xx_codec_ready(chip, ac97->num); snd_via82xx_codec_write() 437 struct via82xx_modem *chip = ac97->private_data; snd_via82xx_codec_read() local 447 dev_err(chip->card->dev, snd_via82xx_codec_read() 449 ac97->num, snd_via82xx_codec_xread(chip)); snd_via82xx_codec_read() 452 snd_via82xx_codec_xwrite(chip, xval); snd_via82xx_codec_read() 454 if (snd_via82xx_codec_valid(chip, ac97->num) >= 0) { snd_via82xx_codec_read() 456 val = snd_via82xx_codec_xread(chip); snd_via82xx_codec_read() 463 static void snd_via82xx_channel_reset(struct via82xx_modem *chip, struct viadev *viadev) snd_via82xx_channel_reset() argument 485 struct via82xx_modem *chip = dev_id; snd_via82xx_interrupt() local 489 status = inl(VIAREG(chip, SGD_SHADOW)); snd_via82xx_interrupt() 490 if (! (status & chip->intr_mask)) { snd_via82xx_interrupt() 496 spin_lock(&chip->reg_lock); snd_via82xx_interrupt() 497 for (i = 0; i < chip->num_devs; i++) { snd_via82xx_interrupt() 498 struct viadev *viadev = &chip->devs[i]; snd_via82xx_interrupt() 504 spin_unlock(&chip->reg_lock); snd_via82xx_interrupt() 506 spin_lock(&chip->reg_lock); snd_via82xx_interrupt() 510 spin_unlock(&chip->reg_lock); snd_via82xx_interrupt() 523 struct via82xx_modem *chip = snd_pcm_substream_chip(substream); snd_via82xx_pcm_trigger() local 549 snd_via82xx_channel_reset(chip, viadev); snd_via82xx_pcm_trigger() 565 static inline unsigned int calc_linear_pos(struct via82xx_modem *chip, calc_linear_pos() argument 577 dev_err(chip->card->dev, calc_linear_pos() 583 dev_dbg(chip->card->dev, calc_linear_pos() 590 dev_dbg(chip->card->dev, calc_linear_pos() 603 dev_dbg(chip->card->dev, calc_linear_pos() 620 struct via82xx_modem *chip = snd_pcm_substream_chip(substream); snd_via686_pcm_pointer() local 629 spin_lock(&chip->reg_lock); snd_via686_pcm_pointer() 640 res = calc_linear_pos(chip, viadev, idx, count); snd_via686_pcm_pointer() 641 spin_unlock(&chip->reg_lock); snd_via686_pcm_pointer() 653 struct via82xx_modem *chip = snd_pcm_substream_chip(substream); snd_via82xx_hw_params() local 660 err = build_via_table(viadev, substream, chip->pci, snd_via82xx_hw_params() 666 snd_ac97_write(chip->ac97, AC97_LINE1_RATE, params_rate(hw_params)); snd_via82xx_hw_params() 667 snd_ac97_write(chip->ac97, AC97_LINE1_LEVEL, 0); snd_via82xx_hw_params() 678 struct via82xx_modem *chip = snd_pcm_substream_chip(substream); snd_via82xx_hw_free() local 681 clean_via_table(viadev, substream, chip->pci); snd_via82xx_hw_free() 690 static void snd_via82xx_set_table_ptr(struct via82xx_modem *chip, struct viadev *viadev) snd_via82xx_set_table_ptr() argument 692 snd_via82xx_codec_ready(chip, chip->ac97_secondary); snd_via82xx_set_table_ptr() 695 snd_via82xx_codec_ready(chip, chip->ac97_secondary); snd_via82xx_set_table_ptr() 703 struct via82xx_modem *chip = snd_pcm_substream_chip(substream); snd_via82xx_pcm_prepare() local 706 snd_via82xx_channel_reset(chip, viadev); snd_via82xx_pcm_prepare() 708 snd_via82xx_set_table_ptr(chip, viadev); snd_via82xx_pcm_prepare() 742 static int snd_via82xx_modem_pcm_open(struct via82xx_modem *chip, struct viadev *viadev, snd_via82xx_modem_pcm_open() argument 777 struct via82xx_modem *chip = snd_pcm_substream_chip(substream); snd_via82xx_playback_open() local 778 struct viadev *viadev = &chip->devs[chip->playback_devno + substream->number]; snd_via82xx_playback_open() 780 return snd_via82xx_modem_pcm_open(chip, viadev, substream); snd_via82xx_playback_open() 788 struct via82xx_modem *chip = snd_pcm_substream_chip(substream); snd_via82xx_capture_open() local 789 struct viadev *viadev = &chip->devs[chip->capture_devno + substream->pcm->device]; snd_via82xx_capture_open() 791 return snd_via82xx_modem_pcm_open(chip, viadev, substream); snd_via82xx_capture_open() 833 static void init_viadev(struct via82xx_modem *chip, int idx, unsigned int reg_offset, init_viadev() argument 836 chip->devs[idx].reg_offset = reg_offset; init_viadev() 837 chip->devs[idx].direction = direction; init_viadev() 838 chip->devs[idx].port = chip->port + reg_offset; init_viadev() 844 static int snd_via686_pcm_new(struct via82xx_modem *chip) snd_via686_pcm_new() argument 849 chip->playback_devno = 0; snd_via686_pcm_new() 850 chip->capture_devno = 1; snd_via686_pcm_new() 851 chip->num_devs = 2; snd_via686_pcm_new() 852 chip->intr_mask = 0x330000; /* FLAGS | EOL for MR, MW */ snd_via686_pcm_new() 854 err = snd_pcm_new(chip->card, chip->card->shortname, 0, 1, 1, &pcm); snd_via686_pcm_new() 860 pcm->private_data = chip; snd_via686_pcm_new() 861 strcpy(pcm->name, chip->card->shortname); snd_via686_pcm_new() 862 chip->pcms[0] = pcm; snd_via686_pcm_new() 863 init_viadev(chip, 0, VIA_REG_MO_STATUS, 0); snd_via686_pcm_new() 864 init_viadev(chip, 1, VIA_REG_MI_STATUS, 1); snd_via686_pcm_new() 867 snd_dma_pci_data(chip->pci), snd_via686_pcm_new() 882 struct via82xx_modem *chip = bus->private_data; snd_via82xx_mixer_free_ac97_bus() local 883 chip->ac97_bus = NULL; snd_via82xx_mixer_free_ac97_bus() 888 struct via82xx_modem *chip = ac97->private_data; snd_via82xx_mixer_free_ac97() local 889 chip->ac97 = NULL; snd_via82xx_mixer_free_ac97() 893 static int snd_via82xx_mixer_new(struct via82xx_modem *chip) snd_via82xx_mixer_new() argument 903 if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus)) < 0) snd_via82xx_mixer_new() 905 chip->ac97_bus->private_free = snd_via82xx_mixer_free_ac97_bus; snd_via82xx_mixer_new() 906 chip->ac97_bus->clock = chip->ac97_clock; snd_via82xx_mixer_new() 909 ac97.private_data = chip; snd_via82xx_mixer_new() 911 ac97.pci = chip->pci; snd_via82xx_mixer_new() 913 ac97.num = chip->ac97_secondary; snd_via82xx_mixer_new() 915 if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97)) < 0) snd_via82xx_mixer_new() 927 struct via82xx_modem *chip = entry->private_data; snd_via82xx_proc_read() local 930 snd_iprintf(buffer, "%s\n\n", chip->card->longname); snd_via82xx_proc_read() 932 snd_iprintf(buffer, "%02x: %08x\n", i, inl(chip->port + i)); snd_via82xx_proc_read() 936 static void snd_via82xx_proc_init(struct via82xx_modem *chip) snd_via82xx_proc_init() argument 940 if (! snd_card_proc_new(chip->card, "via82xx", &entry)) snd_via82xx_proc_init() 941 snd_info_set_text_ops(entry, chip, snd_via82xx_proc_read); snd_via82xx_proc_init() 948 static int snd_via82xx_chip_init(struct via82xx_modem *chip) snd_via82xx_chip_init() argument 954 pci_read_config_byte(chip->pci, VIA_MC97_CTRL, &pval); snd_via82xx_chip_init() 956 pci_write_config_byte(chip->pci, 0x44, pval|VIA_MC97_CTRL_INIT); snd_via82xx_chip_init() 960 pci_read_config_byte(chip->pci, VIA_ACLINK_STAT, &pval); snd_via82xx_chip_init() 963 pci_write_config_byte(chip->pci, VIA_ACLINK_CTRL, snd_via82xx_chip_init() 968 #if 1 /* FIXME: should we do full reset here for all chip models? */ snd_via82xx_chip_init() 969 pci_write_config_byte(chip->pci, VIA_ACLINK_CTRL, 0x00); snd_via82xx_chip_init() 973 pci_write_config_byte(chip->pci, VIA_ACLINK_CTRL, snd_via82xx_chip_init() 978 pci_write_config_byte(chip->pci, VIA_ACLINK_CTRL, VIA_ACLINK_CTRL_INIT); snd_via82xx_chip_init() 982 pci_read_config_byte(chip->pci, VIA_ACLINK_CTRL, &pval); snd_via82xx_chip_init() 985 pci_write_config_byte(chip->pci, VIA_ACLINK_CTRL, VIA_ACLINK_CTRL_INIT); snd_via82xx_chip_init() 992 pci_read_config_byte(chip->pci, VIA_ACLINK_STAT, &pval); snd_via82xx_chip_init() 998 if ((val = snd_via82xx_codec_xread(chip)) & VIA_REG_AC97_BUSY) snd_via82xx_chip_init() 999 dev_err(chip->card->dev, snd_via82xx_chip_init() 1002 snd_via82xx_codec_xwrite(chip, VIA_REG_AC97_READ | snd_via82xx_chip_init() 1006 snd_via82xx_codec_xwrite(chip, VIA_REG_AC97_READ | snd_via82xx_chip_init() 1010 if ((val = snd_via82xx_codec_xread(chip)) & VIA_REG_AC97_SECONDARY_VALID) { snd_via82xx_chip_init() 1011 chip->ac97_secondary = 1; snd_via82xx_chip_init() 1021 // pci_write_config_byte(chip->pci, VIA_FM_NMI_CTRL, 0); snd_via82xx_chip_init() 1023 outl(0, VIAREG(chip, GPI_INTR)); snd_via82xx_chip_init() 1035 struct via82xx_modem *chip = card->private_data; snd_via82xx_suspend() local 1040 snd_pcm_suspend_all(chip->pcms[i]); snd_via82xx_suspend() 1041 for (i = 0; i < chip->num_devs; i++) snd_via82xx_suspend() 1042 snd_via82xx_channel_reset(chip, &chip->devs[i]); snd_via82xx_suspend() 1043 synchronize_irq(chip->irq); snd_via82xx_suspend() 1044 snd_ac97_suspend(chip->ac97); snd_via82xx_suspend() 1051 struct via82xx_modem *chip = card->private_data; snd_via82xx_resume() local 1054 snd_via82xx_chip_init(chip); snd_via82xx_resume() 1056 snd_ac97_resume(chip->ac97); snd_via82xx_resume() 1058 for (i = 0; i < chip->num_devs; i++) snd_via82xx_resume() 1059 snd_via82xx_channel_reset(chip, &chip->devs[i]); snd_via82xx_resume() 1071 static int snd_via82xx_free(struct via82xx_modem *chip) snd_via82xx_free() argument 1075 if (chip->irq < 0) snd_via82xx_free() 1078 for (i = 0; i < chip->num_devs; i++) snd_via82xx_free() 1079 snd_via82xx_channel_reset(chip, &chip->devs[i]); snd_via82xx_free() 1082 if (chip->irq >= 0) snd_via82xx_free() 1083 free_irq(chip->irq, chip); snd_via82xx_free() 1084 pci_release_regions(chip->pci); snd_via82xx_free() 1085 pci_disable_device(chip->pci); snd_via82xx_free() 1086 kfree(chip); snd_via82xx_free() 1092 struct via82xx_modem *chip = device->device_data; snd_via82xx_dev_free() local 1093 return snd_via82xx_free(chip); snd_via82xx_dev_free() 1103 struct via82xx_modem *chip; snd_via82xx_create() local 1112 if ((chip = kzalloc(sizeof(*chip), GFP_KERNEL)) == NULL) { snd_via82xx_create() 1117 spin_lock_init(&chip->reg_lock); snd_via82xx_create() 1118 chip->card = card; snd_via82xx_create() 1119 chip->pci = pci; snd_via82xx_create() 1120 chip->irq = -1; snd_via82xx_create() 1123 kfree(chip); snd_via82xx_create() 1127 chip->port = pci_resource_start(pci, 0); snd_via82xx_create() 1129 KBUILD_MODNAME, chip)) { snd_via82xx_create() 1131 snd_via82xx_free(chip); snd_via82xx_create() 1134 chip->irq = pci->irq; snd_via82xx_create() 1136 chip->ac97_clock = ac97_clock; snd_via82xx_create() 1137 synchronize_irq(chip->irq); snd_via82xx_create() 1139 if ((err = snd_via82xx_chip_init(chip)) < 0) { snd_via82xx_create() 1140 snd_via82xx_free(chip); snd_via82xx_create() 1144 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) { snd_via82xx_create() 1145 snd_via82xx_free(chip); snd_via82xx_create() 1154 *r_via = chip; snd_via82xx_create() 1163 struct via82xx_modem *chip; snd_via82xx_probe() local 1185 ac97_clock, &chip)) < 0) snd_via82xx_probe() 1187 card->private_data = chip; snd_via82xx_probe() 1188 if ((err = snd_via82xx_mixer_new(chip)) < 0) snd_via82xx_probe() 1191 if ((err = snd_via686_pcm_new(chip)) < 0 ) snd_via82xx_probe() 1195 for (i = 0; i < chip->num_devs; i++) snd_via82xx_probe() 1196 snd_via82xx_channel_reset(chip, &chip->devs[i]); snd_via82xx_probe() 1199 card->shortname, chip->port, chip->irq); snd_via82xx_probe() 1201 snd_via82xx_proc_init(chip); snd_via82xx_probe()
/linux-4.1.27/sound/drivers/pcsp/
H A D	pcsp_lib.c	43 static u64 pcsp_timer_update(struct snd_pcsp *chip) pcsp_timer_update() argument 51 if (chip->thalf) { pcsp_timer_update() 52 outb(chip->val61, 0x61); pcsp_timer_update() 53 chip->thalf = 0; pcsp_timer_update() 54 return chip->ns_rem; pcsp_timer_update() 57 substream = chip->playback_substream; pcsp_timer_update() 63 val = runtime->dma_area[chip->playback_ptr + chip->fmt_size - 1]; pcsp_timer_update() 64 if (chip->is_signed) pcsp_timer_update() 68 if (timer_cnt && chip->enable) { pcsp_timer_update() 71 outb_p(chip->val61, 0x61); pcsp_timer_update() 73 outb(chip->val61 ^ 1, 0x61); pcsp_timer_update() 75 outb(chip->val61 ^ 2, 0x61); pcsp_timer_update() 76 chip->thalf = 1; pcsp_timer_update() 81 chip->ns_rem = PCSP_PERIOD_NS(); pcsp_timer_update() 82 ns = (chip->thalf ? PCSP_CALC_NS(timer_cnt) : chip->ns_rem); pcsp_timer_update() 83 chip->ns_rem -= ns; pcsp_timer_update() 87 static void pcsp_pointer_update(struct snd_pcsp *chip) pcsp_pointer_update() argument 95 substream = chip->playback_substream; pcsp_pointer_update() 102 spin_lock_irqsave(&chip->substream_lock, flags); pcsp_pointer_update() 103 chip->playback_ptr += PCSP_INDEX_INC() * chip->fmt_size; pcsp_pointer_update() 104 periods_elapsed = chip->playback_ptr - chip->period_ptr; pcsp_pointer_update() 109 chip->playback_ptr, period_bytes, buffer_bytes); pcsp_pointer_update() 116 chip->playback_ptr %= buffer_bytes; pcsp_pointer_update() 119 chip->period_ptr += periods_elapsed * period_bytes; pcsp_pointer_update() 120 chip->period_ptr %= buffer_bytes; pcsp_pointer_update() 122 spin_unlock_irqrestore(&chip->substream_lock, flags); pcsp_pointer_update() 130 struct snd_pcsp *chip = container_of(handle, struct snd_pcsp, timer); pcsp_do_timer() local 134 if (!atomic_read(&chip->timer_active) || !chip->playback_substream) pcsp_do_timer() 137 pointer_update = !chip->thalf; pcsp_do_timer() 138 ns = pcsp_timer_update(chip); pcsp_do_timer() 145 pcsp_pointer_update(chip); pcsp_do_timer() 152 static int pcsp_start_playing(struct snd_pcsp *chip) pcsp_start_playing() argument 157 if (atomic_read(&chip->timer_active)) { pcsp_start_playing() 163 chip->val61 = inb(0x61) | 0x03; pcsp_start_playing() 166 atomic_set(&chip->timer_active, 1); pcsp_start_playing() 167 chip->thalf = 0; pcsp_start_playing() 173 static void pcsp_stop_playing(struct snd_pcsp *chip) pcsp_stop_playing() argument 178 if (!atomic_read(&chip->timer_active)) pcsp_stop_playing() 181 atomic_set(&chip->timer_active, 0); pcsp_stop_playing() 185 outb(chip->val61 & 0xFC, 0x61); pcsp_stop_playing() 192 void pcsp_sync_stop(struct snd_pcsp *chip) pcsp_sync_stop() argument 195 pcsp_stop_playing(chip); pcsp_sync_stop() 197 hrtimer_cancel(&chip->timer); pcsp_sync_stop() 203 struct snd_pcsp *chip = snd_pcm_substream_chip(substream); snd_pcsp_playback_close() local 207 pcsp_sync_stop(chip); snd_pcsp_playback_close() 208 chip->playback_substream = NULL; snd_pcsp_playback_close() 215 struct snd_pcsp *chip = snd_pcm_substream_chip(substream); snd_pcsp_playback_hw_params() local 217 pcsp_sync_stop(chip); snd_pcsp_playback_hw_params() 227 struct snd_pcsp *chip = snd_pcm_substream_chip(substream); snd_pcsp_playback_hw_free() local 231 pcsp_sync_stop(chip); snd_pcsp_playback_hw_free() 237 struct snd_pcsp *chip = snd_pcm_substream_chip(substream); snd_pcsp_playback_prepare() local 238 pcsp_sync_stop(chip); snd_pcsp_playback_prepare() 239 chip->playback_ptr = 0; snd_pcsp_playback_prepare() 240 chip->period_ptr = 0; snd_pcsp_playback_prepare() 241 chip->fmt_size = snd_pcsp_playback_prepare() 243 chip->is_signed = snd_pcm_format_signed(substream->runtime->format); snd_pcsp_playback_prepare() 252 chip->fmt_size); snd_pcsp_playback_prepare() 259 struct snd_pcsp *chip = snd_pcm_substream_chip(substream); snd_pcsp_trigger() local 266 return pcsp_start_playing(chip); snd_pcsp_trigger() 269 pcsp_stop_playing(chip); snd_pcsp_trigger() 280 struct snd_pcsp *chip = snd_pcm_substream_chip(substream); snd_pcsp_playback_pointer() local 282 spin_lock(&chip->substream_lock); snd_pcsp_playback_pointer() 283 pos = chip->playback_ptr; snd_pcsp_playback_pointer() 284 spin_unlock(&chip->substream_lock); snd_pcsp_playback_pointer() 312 struct snd_pcsp *chip = snd_pcm_substream_chip(substream); snd_pcsp_playback_open() local 317 if (atomic_read(&chip->timer_active)) { snd_pcsp_playback_open() 322 chip->playback_substream = substream; snd_pcsp_playback_open() 337 int snd_pcsp_new_pcm(struct snd_pcsp *chip) snd_pcsp_new_pcm() argument 341 err = snd_pcm_new(chip->card, "pcspeaker", 0, 1, 0, &chip->pcm); snd_pcsp_new_pcm() 345 snd_pcm_set_ops(chip->pcm, SNDRV_PCM_STREAM_PLAYBACK, snd_pcsp_new_pcm() 348 chip->pcm->private_data = chip; snd_pcsp_new_pcm() 349 chip->pcm->info_flags = SNDRV_PCM_INFO_HALF_DUPLEX; snd_pcsp_new_pcm() 350 strcpy(chip->pcm->name, "pcsp"); snd_pcsp_new_pcm() 352 snd_pcm_lib_preallocate_pages_for_all(chip->pcm, snd_pcsp_new_pcm()
H A D	pcsp_mixer.c	26 struct snd_pcsp *chip = snd_kcontrol_chip(kcontrol); pcsp_enable_get() local 27 ucontrol->value.integer.value[0] = chip->enable; pcsp_enable_get() 34 struct snd_pcsp *chip = snd_kcontrol_chip(kcontrol); pcsp_enable_put() local 37 if (enab != chip->enable) { pcsp_enable_put() 38 chip->enable = enab; pcsp_enable_put() 47 struct snd_pcsp *chip = snd_kcontrol_chip(kcontrol); pcsp_treble_info() local 50 uinfo->value.enumerated.items = chip->max_treble + 1; pcsp_treble_info() 51 if (uinfo->value.enumerated.item > chip->max_treble) pcsp_treble_info() 52 uinfo->value.enumerated.item = chip->max_treble; pcsp_treble_info() 61 struct snd_pcsp *chip = snd_kcontrol_chip(kcontrol); pcsp_treble_get() local 62 ucontrol->value.enumerated.item[0] = chip->treble; pcsp_treble_get() 69 struct snd_pcsp *chip = snd_kcontrol_chip(kcontrol); pcsp_treble_put() local 72 if (treble != chip->treble) { pcsp_treble_put() 73 chip->treble = treble; pcsp_treble_put() 95 struct snd_pcsp *chip = snd_kcontrol_chip(kcontrol); pcsp_pcspkr_get() local 96 ucontrol->value.integer.value[0] = chip->pcspkr; pcsp_pcspkr_get() 103 struct snd_pcsp *chip = snd_kcontrol_chip(kcontrol); pcsp_pcspkr_put() local 106 if (spkr != chip->pcspkr) { pcsp_pcspkr_put() 107 chip->pcspkr = spkr; pcsp_pcspkr_put() 131 static int snd_pcsp_ctls_add(struct snd_pcsp *chip, snd_pcsp_ctls_add() argument 135 struct snd_card *card = chip->card; snd_pcsp_ctls_add() 137 err = snd_ctl_add(card, snd_ctl_new1(ctls + i, chip)); snd_pcsp_ctls_add() 144 int snd_pcsp_new_mixer(struct snd_pcsp *chip, int nopcm) snd_pcsp_new_mixer() argument 147 struct snd_card *card = chip->card; snd_pcsp_new_mixer() 150 err = snd_pcsp_ctls_add(chip, snd_pcsp_controls_pcm, snd_pcsp_new_mixer() 155 err = snd_pcsp_ctls_add(chip, snd_pcsp_controls_spkr, snd_pcsp_new_mixer()
/linux-4.1.27/drivers/video/fbdev/riva/
H A D	riva_hw.c	62 RIVA_HW_INST *chip nv3Busy() 65 return ((NV_RD32(&chip->Rop->FifoFree, 0) < chip->FifoEmptyCount) || nv3Busy() 66 NV_RD32(&chip->PGRAPH[0x000006B0/4], 0) & 0x01); nv3Busy() 70 RIVA_HW_INST *chip nv4Busy() 73 return ((NV_RD32(&chip->Rop->FifoFree, 0) < chip->FifoEmptyCount) || nv4Busy() 74 NV_RD32(&chip->PGRAPH[0x00000700/4], 0) & 0x01); nv4Busy() 78 RIVA_HW_INST *chip nv10Busy() 81 return ((NV_RD32(&chip->Rop->FifoFree, 0) < chip->FifoEmptyCount) || nv10Busy() 82 NV_RD32(&chip->PGRAPH[0x00000700/4], 0) & 0x01); nv10Busy() 87 RIVA_HW_INST *chip, vgaLockUnlock() 92 VGA_WR08(chip->PCIO, 0x3D4, 0x11); vgaLockUnlock() 93 cr11 = VGA_RD08(chip->PCIO, 0x3D5); vgaLockUnlock() 96 VGA_WR08(chip->PCIO, 0x3D5, cr11); vgaLockUnlock() 100 RIVA_HW_INST *chip, nv3LockUnlock() 104 VGA_WR08(chip->PVIO, 0x3C4, 0x06); nv3LockUnlock() 105 VGA_WR08(chip->PVIO, 0x3C5, Lock ? 0x99 : 0x57); nv3LockUnlock() 106 vgaLockUnlock(chip, Lock); nv3LockUnlock() 110 RIVA_HW_INST *chip, nv4LockUnlock() 114 VGA_WR08(chip->PCIO, 0x3D4, 0x1F); nv4LockUnlock() 115 VGA_WR08(chip->PCIO, 0x3D5, Lock ? 0x99 : 0x57); nv4LockUnlock() 116 vgaLockUnlock(chip, Lock); nv4LockUnlock() 121 RIVA_HW_INST *chip, ShowHideCursor() 126 cursor = chip->CurrentState->cursor1; ShowHideCursor() 127 chip->CurrentState->cursor1 = (chip->CurrentState->cursor1 & 0xFE) | ShowHideCursor() 129 VGA_WR08(chip->PCIO, 0x3D4, 0x31); ShowHideCursor() 130 VGA_WR08(chip->PCIO, 0x3D5, chip->CurrentState->cursor1); ShowHideCursor() 614 RIVA_HW_INST *chip nv3UpdateArbitrationSettings() 621 pll = NV_RD32(&chip->PRAMDAC0[0x00000504/4], 0); nv3UpdateArbitrationSettings() 623 MClk = (N * chip->CrystalFreqKHz / M) >> P; nv3UpdateArbitrationSettings() 628 sim_data.memory_width = (NV_RD32(&chip->PEXTDEV[0x00000000/4], 0) & 0x10) ? nv3UpdateArbitrationSettings() 803 RIVA_HW_INST *chip nv4UpdateArbitrationSettings() 810 pll = NV_RD32(&chip->PRAMDAC0[0x00000504/4], 0); nv4UpdateArbitrationSettings() 812 MClk = (N * chip->CrystalFreqKHz / M) >> P; nv4UpdateArbitrationSettings() 813 pll = NV_RD32(&chip->PRAMDAC0[0x00000500/4], 0); nv4UpdateArbitrationSettings() 815 NVClk = (N * chip->CrystalFreqKHz / M) >> P; nv4UpdateArbitrationSettings() 816 cfg1 = NV_RD32(&chip->PFB[0x00000204/4], 0); nv4UpdateArbitrationSettings() 820 sim_data.memory_width = (NV_RD32(&chip->PEXTDEV[0x00000000/4], 0) & 0x10) ? nv4UpdateArbitrationSettings() 1066 RIVA_HW_INST *chip nv10UpdateArbitrationSettings() 1073 pll = NV_RD32(&chip->PRAMDAC0[0x00000504/4], 0); nv10UpdateArbitrationSettings() 1075 MClk = (N * chip->CrystalFreqKHz / M) >> P; nv10UpdateArbitrationSettings() 1076 pll = NV_RD32(&chip->PRAMDAC0[0x00000500/4], 0); nv10UpdateArbitrationSettings() 1078 NVClk = (N * chip->CrystalFreqKHz / M) >> P; nv10UpdateArbitrationSettings() 1079 cfg1 = NV_RD32(&chip->PFB[0x00000204/4], 0); nv10UpdateArbitrationSettings() 1083 sim_data.memory_type = (NV_RD32(&chip->PFB[0x00000200/4], 0) & 0x01) ? nv10UpdateArbitrationSettings() 1085 sim_data.memory_width = (NV_RD32(&chip->PEXTDEV[0x00000000/4], 0) & 0x10) ? nv10UpdateArbitrationSettings() 1111 RIVA_HW_INST *chip nForceUpdateArbitrationSettings() 1128 pll = NV_RD32(&chip->PRAMDAC0[0x00000500/4], 0); nForceUpdateArbitrationSettings() 1130 NVClk = (N * chip->CrystalFreqKHz / M) >> P; nForceUpdateArbitrationSettings() 1175 RIVA_HW_INST *chip CalcVClock() 1187 if (chip->CrystalFreqKHz == 13500) CalcVClock() 1190 highM = 13 - (chip->Architecture == NV_ARCH_03); CalcVClock() 1195 highM = 14 - (chip->Architecture == NV_ARCH_03); CalcVClock() 1198 highP = 4 - (chip->Architecture == NV_ARCH_03); CalcVClock() 1202 if ((Freq >= 128000) && (Freq <= chip->MaxVClockFreqKHz)) CalcVClock() 1206 N = (VClk << P) * M / chip->CrystalFreqKHz; CalcVClock() 1208 Freq = (chip->CrystalFreqKHz * N / M) >> P; CalcVClock() 1235 RIVA_HW_INST *chip, CalcStateExt() 1258 if (!CalcVClock(dotClock, &VClk, &m, &n, &p, chip)) CalcStateExt() 1261 switch (chip->Architecture) CalcStateExt() 1268 chip); CalcStateExt() 1284 chip); CalcStateExt() 1296 if((chip->Chipset == NV_CHIP_IGEFORCE2) || CalcStateExt() 1297 (chip->Chipset == NV_CHIP_0x01F0)) CalcStateExt() 1303 chip); CalcStateExt() 1309 chip); CalcStateExt() 1311 state->cursor0 = 0x80 | (chip->CursorStart >> 17); CalcStateExt() 1312 state->cursor1 = (chip->CursorStart >> 11) << 2; CalcStateExt() 1313 state->cursor2 = chip->CursorStart >> 24; CalcStateExt() 1315 state->config = NV_RD32(&chip->PFB[0x00000200/4], 0); CalcStateExt() 1323 if((bpp != 8) && (chip->Architecture != NV_ARCH_03)) CalcStateExt() 1346 chip->dev[tbl##Table##dev[i][0]] = tbl##Table##dev[i][1] 1349 chip->dev[tbl##Table##dev##_8BPP[i][0]] = tbl##Table##dev##_8BPP[i][1] 1352 chip->dev[tbl##Table##dev##_15BPP[i][0]] = tbl##Table##dev##_15BPP[i][1] 1355 chip->dev[tbl##Table##dev##_16BPP[i][0]] = tbl##Table##dev##_16BPP[i][1] 1358 chip->dev[tbl##Table##dev##_32BPP[i][0]] = tbl##Table##dev##_32BPP[i][1] 1363 NV_WR32(&chip->dev[tbl##Table##dev[i][0]], 0, tbl##Table##dev[i][1]) 1366 NV_WR32(&chip->dev[tbl##Table##dev##_8BPP[i][0]], 0, tbl##Table##dev##_8BPP[i][1]) 1369 NV_WR32(&chip->dev[tbl##Table##dev##_15BPP[i][0]], 0, tbl##Table##dev##_15BPP[i][1]) 1372 NV_WR32(&chip->dev[tbl##Table##dev##_16BPP[i][0]], 0, tbl##Table##dev##_16BPP[i][1]) 1375 NV_WR32(&chip->dev[tbl##Table##dev##_32BPP[i][0]], 0, tbl##Table##dev##_32BPP[i][1]) 1379 RIVA_HW_INST *chip UpdateFifoState() 1384 switch (chip->Architecture) UpdateFifoState() 1388 chip->Tri03 = NULL; UpdateFifoState() 1389 chip->Tri05 = (RivaTexturedTriangle05 __iomem *)&(chip->FIFO[0x0000E000/4]); UpdateFifoState() 1399 chip->Tri03 = NULL; UpdateFifoState() 1400 chip->Tri05 = (RivaTexturedTriangle05 __iomem *)&(chip->FIFO[0x0000E000/4]); UpdateFifoState() 1406 RIVA_HW_INST *chip, LoadStateExt() 1417 switch (chip->Architecture) LoadStateExt() 1423 NV_WR32(chip->PFB, 0x00000200, state->config); LoadStateExt() 1433 chip->Tri03 = (RivaTexturedTriangle03 __iomem *)&(chip->FIFO[0x0000E000/4]); LoadStateExt() 1439 chip->Tri03 = NULL; LoadStateExt() 1445 chip->Tri03 = NULL; LoadStateExt() 1449 NV_WR32(&chip->PRAMIN[0x00000502 + i], 0, (i << 12) | 0x03); LoadStateExt() 1450 NV_WR32(chip->PGRAPH, 0x00000630, state->offset0); LoadStateExt() 1451 NV_WR32(chip->PGRAPH, 0x00000634, state->offset1); LoadStateExt() 1452 NV_WR32(chip->PGRAPH, 0x00000638, state->offset2); LoadStateExt() 1453 NV_WR32(chip->PGRAPH, 0x0000063C, state->offset3); LoadStateExt() 1454 NV_WR32(chip->PGRAPH, 0x00000650, state->pitch0); LoadStateExt() 1455 NV_WR32(chip->PGRAPH, 0x00000654, state->pitch1); LoadStateExt() 1456 NV_WR32(chip->PGRAPH, 0x00000658, state->pitch2); LoadStateExt() 1457 NV_WR32(chip->PGRAPH, 0x0000065C, state->pitch3); LoadStateExt() 1463 NV_WR32(chip->PFB, 0x00000200, state->config); LoadStateExt() 1472 chip->Tri03 = (RivaTexturedTriangle03 __iomem *)&(chip->FIFO[0x0000E000/4]); LoadStateExt() 1477 chip->Tri03 = (RivaTexturedTriangle03 __iomem *)&(chip->FIFO[0x0000E000/4]); LoadStateExt() 1483 chip->Tri03 = NULL; LoadStateExt() 1489 chip->Tri03 = NULL; LoadStateExt() 1492 NV_WR32(chip->PGRAPH, 0x00000640, state->offset0); LoadStateExt() 1493 NV_WR32(chip->PGRAPH, 0x00000644, state->offset1); LoadStateExt() 1494 NV_WR32(chip->PGRAPH, 0x00000648, state->offset2); LoadStateExt() 1495 NV_WR32(chip->PGRAPH, 0x0000064C, state->offset3); LoadStateExt() 1496 NV_WR32(chip->PGRAPH, 0x00000670, state->pitch0); LoadStateExt() 1497 NV_WR32(chip->PGRAPH, 0x00000674, state->pitch1); LoadStateExt() 1498 NV_WR32(chip->PGRAPH, 0x00000678, state->pitch2); LoadStateExt() 1499 NV_WR32(chip->PGRAPH, 0x0000067C, state->pitch3); LoadStateExt() 1504 if(chip->twoHeads) { LoadStateExt() 1505 VGA_WR08(chip->PCIO, 0x03D4, 0x44); LoadStateExt() 1506 VGA_WR08(chip->PCIO, 0x03D5, state->crtcOwner); LoadStateExt() 1507 chip->LockUnlock(chip, 0); LoadStateExt() 1518 chip->Tri03 = (RivaTexturedTriangle03 __iomem *)&(chip->FIFO[0x0000E000/4]); LoadStateExt() 1523 chip->Tri03 = (RivaTexturedTriangle03 __iomem *)&(chip->FIFO[0x0000E000/4]); LoadStateExt() 1529 chip->Tri03 = NULL; LoadStateExt() 1535 chip->Tri03 = NULL; LoadStateExt() 1539 if(chip->Architecture == NV_ARCH_10) { LoadStateExt() 1540 NV_WR32(chip->PGRAPH, 0x00000640, state->offset0); LoadStateExt() 1541 NV_WR32(chip->PGRAPH, 0x00000644, state->offset1); LoadStateExt() 1542 NV_WR32(chip->PGRAPH, 0x00000648, state->offset2); LoadStateExt() 1543 NV_WR32(chip->PGRAPH, 0x0000064C, state->offset3); LoadStateExt() 1544 NV_WR32(chip->PGRAPH, 0x00000670, state->pitch0); LoadStateExt() 1545 NV_WR32(chip->PGRAPH, 0x00000674, state->pitch1); LoadStateExt() 1546 NV_WR32(chip->PGRAPH, 0x00000678, state->pitch2); LoadStateExt() 1547 NV_WR32(chip->PGRAPH, 0x0000067C, state->pitch3); LoadStateExt() 1548 NV_WR32(chip->PGRAPH, 0x00000680, state->pitch3); LoadStateExt() 1550 NV_WR32(chip->PGRAPH, 0x00000820, state->offset0); LoadStateExt() 1551 NV_WR32(chip->PGRAPH, 0x00000824, state->offset1); LoadStateExt() 1552 NV_WR32(chip->PGRAPH, 0x00000828, state->offset2); LoadStateExt() 1553 NV_WR32(chip->PGRAPH, 0x0000082C, state->offset3); LoadStateExt() 1554 NV_WR32(chip->PGRAPH, 0x00000850, state->pitch0); LoadStateExt() 1555 NV_WR32(chip->PGRAPH, 0x00000854, state->pitch1); LoadStateExt() 1556 NV_WR32(chip->PGRAPH, 0x00000858, state->pitch2); LoadStateExt() 1557 NV_WR32(chip->PGRAPH, 0x0000085C, state->pitch3); LoadStateExt() 1558 NV_WR32(chip->PGRAPH, 0x00000860, state->pitch3); LoadStateExt() 1559 NV_WR32(chip->PGRAPH, 0x00000864, state->pitch3); LoadStateExt() 1560 NV_WR32(chip->PGRAPH, 0x000009A4, NV_RD32(chip->PFB, 0x00000200)); LoadStateExt() 1561 NV_WR32(chip->PGRAPH, 0x000009A8, NV_RD32(chip->PFB, 0x00000204)); LoadStateExt() 1563 if(chip->twoHeads) { LoadStateExt() 1564 NV_WR32(chip->PCRTC0, 0x00000860, state->head); LoadStateExt() 1565 NV_WR32(chip->PCRTC0, 0x00002860, state->head2); LoadStateExt() 1567 NV_WR32(chip->PRAMDAC, 0x00000404, NV_RD32(chip->PRAMDAC, 0x00000404) | (1 << 25)); LoadStateExt() 1569 NV_WR32(chip->PMC, 0x00008704, 1); LoadStateExt() 1570 NV_WR32(chip->PMC, 0x00008140, 0); LoadStateExt() 1571 NV_WR32(chip->PMC, 0x00008920, 0); LoadStateExt() 1572 NV_WR32(chip->PMC, 0x00008924, 0); LoadStateExt() 1573 NV_WR32(chip->PMC, 0x00008908, 0x01ffffff); LoadStateExt() 1574 NV_WR32(chip->PMC, 0x0000890C, 0x01ffffff); LoadStateExt() 1575 NV_WR32(chip->PMC, 0x00001588, 0); LoadStateExt() 1577 NV_WR32(chip->PFB, 0x00000240, 0); LoadStateExt() 1578 NV_WR32(chip->PFB, 0x00000250, 0); LoadStateExt() 1579 NV_WR32(chip->PFB, 0x00000260, 0); LoadStateExt() 1580 NV_WR32(chip->PFB, 0x00000270, 0); LoadStateExt() 1581 NV_WR32(chip->PFB, 0x00000280, 0); LoadStateExt() 1582 NV_WR32(chip->PFB, 0x00000290, 0); LoadStateExt() 1583 NV_WR32(chip->PFB, 0x000002A0, 0); LoadStateExt() 1584 NV_WR32(chip->PFB, 0x000002B0, 0); LoadStateExt() 1586 NV_WR32(chip->PGRAPH, 0x00000B00, NV_RD32(chip->PFB, 0x00000240)); LoadStateExt() 1587 NV_WR32(chip->PGRAPH, 0x00000B04, NV_RD32(chip->PFB, 0x00000244)); LoadStateExt() 1588 NV_WR32(chip->PGRAPH, 0x00000B08, NV_RD32(chip->PFB, 0x00000248)); LoadStateExt() 1589 NV_WR32(chip->PGRAPH, 0x00000B0C, NV_RD32(chip->PFB, 0x0000024C)); LoadStateExt() 1590 NV_WR32(chip->PGRAPH, 0x00000B10, NV_RD32(chip->PFB, 0x00000250)); LoadStateExt() 1591 NV_WR32(chip->PGRAPH, 0x00000B14, NV_RD32(chip->PFB, 0x00000254)); LoadStateExt() 1592 NV_WR32(chip->PGRAPH, 0x00000B18, NV_RD32(chip->PFB, 0x00000258)); LoadStateExt() 1593 NV_WR32(chip->PGRAPH, 0x00000B1C, NV_RD32(chip->PFB, 0x0000025C)); LoadStateExt() 1594 NV_WR32(chip->PGRAPH, 0x00000B20, NV_RD32(chip->PFB, 0x00000260)); LoadStateExt() 1595 NV_WR32(chip->PGRAPH, 0x00000B24, NV_RD32(chip->PFB, 0x00000264)); LoadStateExt() 1596 NV_WR32(chip->PGRAPH, 0x00000B28, NV_RD32(chip->PFB, 0x00000268)); LoadStateExt() 1597 NV_WR32(chip->PGRAPH, 0x00000B2C, NV_RD32(chip->PFB, 0x0000026C)); LoadStateExt() 1598 NV_WR32(chip->PGRAPH, 0x00000B30, NV_RD32(chip->PFB, 0x00000270)); LoadStateExt() 1599 NV_WR32(chip->PGRAPH, 0x00000B34, NV_RD32(chip->PFB, 0x00000274)); LoadStateExt() 1600 NV_WR32(chip->PGRAPH, 0x00000B38, NV_RD32(chip->PFB, 0x00000278)); LoadStateExt() 1601 NV_WR32(chip->PGRAPH, 0x00000B3C, NV_RD32(chip->PFB, 0x0000027C)); LoadStateExt() 1602 NV_WR32(chip->PGRAPH, 0x00000B40, NV_RD32(chip->PFB, 0x00000280)); LoadStateExt() 1603 NV_WR32(chip->PGRAPH, 0x00000B44, NV_RD32(chip->PFB, 0x00000284)); LoadStateExt() 1604 NV_WR32(chip->PGRAPH, 0x00000B48, NV_RD32(chip->PFB, 0x00000288)); LoadStateExt() 1605 NV_WR32(chip->PGRAPH, 0x00000B4C, NV_RD32(chip->PFB, 0x0000028C)); LoadStateExt() 1606 NV_WR32(chip->PGRAPH, 0x00000B50, NV_RD32(chip->PFB, 0x00000290)); LoadStateExt() 1607 NV_WR32(chip->PGRAPH, 0x00000B54, NV_RD32(chip->PFB, 0x00000294)); LoadStateExt() 1608 NV_WR32(chip->PGRAPH, 0x00000B58, NV_RD32(chip->PFB, 0x00000298)); LoadStateExt() 1609 NV_WR32(chip->PGRAPH, 0x00000B5C, NV_RD32(chip->PFB, 0x0000029C)); LoadStateExt() 1610 NV_WR32(chip->PGRAPH, 0x00000B60, NV_RD32(chip->PFB, 0x000002A0)); LoadStateExt() 1611 NV_WR32(chip->PGRAPH, 0x00000B64, NV_RD32(chip->PFB, 0x000002A4)); LoadStateExt() 1612 NV_WR32(chip->PGRAPH, 0x00000B68, NV_RD32(chip->PFB, 0x000002A8)); LoadStateExt() 1613 NV_WR32(chip->PGRAPH, 0x00000B6C, NV_RD32(chip->PFB, 0x000002AC)); LoadStateExt() 1614 NV_WR32(chip->PGRAPH, 0x00000B70, NV_RD32(chip->PFB, 0x000002B0)); LoadStateExt() 1615 NV_WR32(chip->PGRAPH, 0x00000B74, NV_RD32(chip->PFB, 0x000002B4)); LoadStateExt() 1616 NV_WR32(chip->PGRAPH, 0x00000B78, NV_RD32(chip->PFB, 0x000002B8)); LoadStateExt() 1617 NV_WR32(chip->PGRAPH, 0x00000B7C, NV_RD32(chip->PFB, 0x000002BC)); LoadStateExt() 1618 NV_WR32(chip->PGRAPH, 0x00000F40, 0x10000000); LoadStateExt() 1619 NV_WR32(chip->PGRAPH, 0x00000F44, 0x00000000); LoadStateExt() 1620 NV_WR32(chip->PGRAPH, 0x00000F50, 0x00000040); LoadStateExt() 1621 NV_WR32(chip->PGRAPH, 0x00000F54, 0x00000008); LoadStateExt() 1622 NV_WR32(chip->PGRAPH, 0x00000F50, 0x00000200); LoadStateExt() 1624 NV_WR32(chip->PGRAPH, 0x00000F54, 0x00000000); LoadStateExt() 1625 NV_WR32(chip->PGRAPH, 0x00000F50, 0x00000040); LoadStateExt() 1626 NV_WR32(chip->PGRAPH, 0x00000F54, 0x00000000); LoadStateExt() 1627 NV_WR32(chip->PGRAPH, 0x00000F50, 0x00000800); LoadStateExt() 1629 NV_WR32(chip->PGRAPH, 0x00000F54, 0x00000000); LoadStateExt() 1630 NV_WR32(chip->PGRAPH, 0x00000F40, 0x30000000); LoadStateExt() 1631 NV_WR32(chip->PGRAPH, 0x00000F44, 0x00000004); LoadStateExt() 1632 NV_WR32(chip->PGRAPH, 0x00000F50, 0x00006400); LoadStateExt() 1634 NV_WR32(chip->PGRAPH, 0x00000F54, 0x00000000); LoadStateExt() 1635 NV_WR32(chip->PGRAPH, 0x00000F50, 0x00006800); LoadStateExt() 1637 NV_WR32(chip->PGRAPH, 0x00000F54, 0x00000000); LoadStateExt() 1638 NV_WR32(chip->PGRAPH, 0x00000F50, 0x00006C00); LoadStateExt() 1640 NV_WR32(chip->PGRAPH, 0x00000F54, 0x00000000); LoadStateExt() 1641 NV_WR32(chip->PGRAPH, 0x00000F50, 0x00007000); LoadStateExt() 1643 NV_WR32(chip->PGRAPH, 0x00000F54, 0x00000000); LoadStateExt() 1644 NV_WR32(chip->PGRAPH, 0x00000F50, 0x00007400); LoadStateExt() 1646 NV_WR32(chip->PGRAPH, 0x00000F54, 0x00000000); LoadStateExt() 1647 NV_WR32(chip->PGRAPH, 0x00000F50, 0x00007800); LoadStateExt() 1649 NV_WR32(chip->PGRAPH, 0x00000F54, 0x00000000); LoadStateExt() 1650 NV_WR32(chip->PGRAPH, 0x00000F50, 0x00004400); LoadStateExt() 1652 NV_WR32(chip->PGRAPH, 0x00000F54, 0x00000000); LoadStateExt() 1653 NV_WR32(chip->PGRAPH, 0x00000F50, 0x00000000); LoadStateExt() 1655 NV_WR32(chip->PGRAPH, 0x00000F54, 0x00000000); LoadStateExt() 1656 NV_WR32(chip->PGRAPH, 0x00000F50, 0x00000040); LoadStateExt() 1658 NV_WR32(chip->PGRAPH, 0x00000F54, 0x00000000); LoadStateExt() 1660 NV_WR32(chip->PCRTC, 0x00000810, state->cursorConfig); LoadStateExt() 1662 if(chip->flatPanel) { LoadStateExt() 1663 if((chip->Chipset & 0x0ff0) == 0x0110) { LoadStateExt() 1664 NV_WR32(chip->PRAMDAC, 0x0528, state->dither); LoadStateExt() 1666 if((chip->Chipset & 0x0ff0) >= 0x0170) { LoadStateExt() 1667 NV_WR32(chip->PRAMDAC, 0x083C, state->dither); LoadStateExt() 1670 VGA_WR08(chip->PCIO, 0x03D4, 0x53); LoadStateExt() 1671 VGA_WR08(chip->PCIO, 0x03D5, 0); LoadStateExt() 1672 VGA_WR08(chip->PCIO, 0x03D4, 0x54); LoadStateExt() 1673 VGA_WR08(chip->PCIO, 0x03D5, 0); LoadStateExt() 1674 VGA_WR08(chip->PCIO, 0x03D4, 0x21); LoadStateExt() 1675 VGA_WR08(chip->PCIO, 0x03D5, 0xfa); LoadStateExt() 1678 VGA_WR08(chip->PCIO, 0x03D4, 0x41); LoadStateExt() 1679 VGA_WR08(chip->PCIO, 0x03D5, state->extra); LoadStateExt() 1682 UpdateFifoState(chip); LoadStateExt() 1686 VGA_WR08(chip->PCIO, 0x03D4, 0x19); LoadStateExt() 1687 VGA_WR08(chip->PCIO, 0x03D5, state->repaint0); LoadStateExt() 1688 VGA_WR08(chip->PCIO, 0x03D4, 0x1A); LoadStateExt() 1689 VGA_WR08(chip->PCIO, 0x03D5, state->repaint1); LoadStateExt() 1690 VGA_WR08(chip->PCIO, 0x03D4, 0x25); LoadStateExt() 1691 VGA_WR08(chip->PCIO, 0x03D5, state->screen); LoadStateExt() 1692 VGA_WR08(chip->PCIO, 0x03D4, 0x28); LoadStateExt() 1693 VGA_WR08(chip->PCIO, 0x03D5, state->pixel); LoadStateExt() 1694 VGA_WR08(chip->PCIO, 0x03D4, 0x2D); LoadStateExt() 1695 VGA_WR08(chip->PCIO, 0x03D5, state->horiz); LoadStateExt() 1696 VGA_WR08(chip->PCIO, 0x03D4, 0x1B); LoadStateExt() 1697 VGA_WR08(chip->PCIO, 0x03D5, state->arbitration0); LoadStateExt() 1698 VGA_WR08(chip->PCIO, 0x03D4, 0x20); LoadStateExt() 1699 VGA_WR08(chip->PCIO, 0x03D5, state->arbitration1); LoadStateExt() 1700 VGA_WR08(chip->PCIO, 0x03D4, 0x30); LoadStateExt() 1701 VGA_WR08(chip->PCIO, 0x03D5, state->cursor0); LoadStateExt() 1702 VGA_WR08(chip->PCIO, 0x03D4, 0x31); LoadStateExt() 1703 VGA_WR08(chip->PCIO, 0x03D5, state->cursor1); LoadStateExt() 1704 VGA_WR08(chip->PCIO, 0x03D4, 0x2F); LoadStateExt() 1705 VGA_WR08(chip->PCIO, 0x03D5, state->cursor2); LoadStateExt() 1706 VGA_WR08(chip->PCIO, 0x03D4, 0x39); LoadStateExt() 1707 VGA_WR08(chip->PCIO, 0x03D5, state->interlace); LoadStateExt() 1709 if(!chip->flatPanel) { LoadStateExt() 1710 NV_WR32(chip->PRAMDAC0, 0x00000508, state->vpll); LoadStateExt() 1711 NV_WR32(chip->PRAMDAC0, 0x0000050C, state->pllsel); LoadStateExt() 1712 if(chip->twoHeads) LoadStateExt() 1713 NV_WR32(chip->PRAMDAC0, 0x00000520, state->vpll2); LoadStateExt() 1715 NV_WR32(chip->PRAMDAC, 0x00000848 , state->scale); LoadStateExt() 1717 NV_WR32(chip->PRAMDAC, 0x00000600 , state->general); LoadStateExt() 1722 NV_WR32(chip->PCRTC, 0x00000140, 0); LoadStateExt() 1723 NV_WR32(chip->PCRTC, 0x00000100, chip->VBlankBit); LoadStateExt() 1727 NV_WR32(chip->PMC, 0x00000140, chip->EnableIRQ & 0x01); LoadStateExt() 1731 chip->CurrentState = state; LoadStateExt() 1735 chip->FifoFreeCount = 0; LoadStateExt() 1737 chip->FifoEmptyCount = NV_RD32(&chip->Rop->FifoFree, 0); LoadStateExt() 1741 RIVA_HW_INST *chip, UnloadStateExt() 1748 VGA_WR08(chip->PCIO, 0x03D4, 0x19); UnloadStateExt() 1749 state->repaint0 = VGA_RD08(chip->PCIO, 0x03D5); UnloadStateExt() 1750 VGA_WR08(chip->PCIO, 0x03D4, 0x1A); UnloadStateExt() 1751 state->repaint1 = VGA_RD08(chip->PCIO, 0x03D5); UnloadStateExt() 1752 VGA_WR08(chip->PCIO, 0x03D4, 0x25); UnloadStateExt() 1753 state->screen = VGA_RD08(chip->PCIO, 0x03D5); UnloadStateExt() 1754 VGA_WR08(chip->PCIO, 0x03D4, 0x28); UnloadStateExt() 1755 state->pixel = VGA_RD08(chip->PCIO, 0x03D5); UnloadStateExt() 1756 VGA_WR08(chip->PCIO, 0x03D4, 0x2D); UnloadStateExt() 1757 state->horiz = VGA_RD08(chip->PCIO, 0x03D5); UnloadStateExt() 1758 VGA_WR08(chip->PCIO, 0x03D4, 0x1B); UnloadStateExt() 1759 state->arbitration0 = VGA_RD08(chip->PCIO, 0x03D5); UnloadStateExt() 1760 VGA_WR08(chip->PCIO, 0x03D4, 0x20); UnloadStateExt() 1761 state->arbitration1 = VGA_RD08(chip->PCIO, 0x03D5); UnloadStateExt() 1762 VGA_WR08(chip->PCIO, 0x03D4, 0x30); UnloadStateExt() 1763 state->cursor0 = VGA_RD08(chip->PCIO, 0x03D5); UnloadStateExt() 1764 VGA_WR08(chip->PCIO, 0x03D4, 0x31); UnloadStateExt() 1765 state->cursor1 = VGA_RD08(chip->PCIO, 0x03D5); UnloadStateExt() 1766 VGA_WR08(chip->PCIO, 0x03D4, 0x2F); UnloadStateExt() 1767 state->cursor2 = VGA_RD08(chip->PCIO, 0x03D5); UnloadStateExt() 1768 VGA_WR08(chip->PCIO, 0x03D4, 0x39); UnloadStateExt() 1769 state->interlace = VGA_RD08(chip->PCIO, 0x03D5); UnloadStateExt() 1770 state->vpll = NV_RD32(chip->PRAMDAC0, 0x00000508); UnloadStateExt() 1771 state->vpll2 = NV_RD32(chip->PRAMDAC0, 0x00000520); UnloadStateExt() 1772 state->pllsel = NV_RD32(chip->PRAMDAC0, 0x0000050C); UnloadStateExt() 1773 state->general = NV_RD32(chip->PRAMDAC, 0x00000600); UnloadStateExt() 1774 state->scale = NV_RD32(chip->PRAMDAC, 0x00000848); UnloadStateExt() 1775 state->config = NV_RD32(chip->PFB, 0x00000200); UnloadStateExt() 1776 switch (chip->Architecture) UnloadStateExt() 1779 state->offset0 = NV_RD32(chip->PGRAPH, 0x00000630); UnloadStateExt() 1780 state->offset1 = NV_RD32(chip->PGRAPH, 0x00000634); UnloadStateExt() 1781 state->offset2 = NV_RD32(chip->PGRAPH, 0x00000638); UnloadStateExt() 1782 state->offset3 = NV_RD32(chip->PGRAPH, 0x0000063C); UnloadStateExt() 1783 state->pitch0 = NV_RD32(chip->PGRAPH, 0x00000650); UnloadStateExt() 1784 state->pitch1 = NV_RD32(chip->PGRAPH, 0x00000654); UnloadStateExt() 1785 state->pitch2 = NV_RD32(chip->PGRAPH, 0x00000658); UnloadStateExt() 1786 state->pitch3 = NV_RD32(chip->PGRAPH, 0x0000065C); UnloadStateExt() 1789 state->offset0 = NV_RD32(chip->PGRAPH, 0x00000640); UnloadStateExt() 1790 state->offset1 = NV_RD32(chip->PGRAPH, 0x00000644); UnloadStateExt() 1791 state->offset2 = NV_RD32(chip->PGRAPH, 0x00000648); UnloadStateExt() 1792 state->offset3 = NV_RD32(chip->PGRAPH, 0x0000064C); UnloadStateExt() 1793 state->pitch0 = NV_RD32(chip->PGRAPH, 0x00000670); UnloadStateExt() 1794 state->pitch1 = NV_RD32(chip->PGRAPH, 0x00000674); UnloadStateExt() 1795 state->pitch2 = NV_RD32(chip->PGRAPH, 0x00000678); UnloadStateExt() 1796 state->pitch3 = NV_RD32(chip->PGRAPH, 0x0000067C); UnloadStateExt() 1801 state->offset0 = NV_RD32(chip->PGRAPH, 0x00000640); UnloadStateExt() 1802 state->offset1 = NV_RD32(chip->PGRAPH, 0x00000644); UnloadStateExt() 1803 state->offset2 = NV_RD32(chip->PGRAPH, 0x00000648); UnloadStateExt() 1804 state->offset3 = NV_RD32(chip->PGRAPH, 0x0000064C); UnloadStateExt() 1805 state->pitch0 = NV_RD32(chip->PGRAPH, 0x00000670); UnloadStateExt() 1806 state->pitch1 = NV_RD32(chip->PGRAPH, 0x00000674); UnloadStateExt() 1807 state->pitch2 = NV_RD32(chip->PGRAPH, 0x00000678); UnloadStateExt() 1808 state->pitch3 = NV_RD32(chip->PGRAPH, 0x0000067C); UnloadStateExt() 1809 if(chip->twoHeads) { UnloadStateExt() 1810 state->head = NV_RD32(chip->PCRTC0, 0x00000860); UnloadStateExt() 1811 state->head2 = NV_RD32(chip->PCRTC0, 0x00002860); UnloadStateExt() 1812 VGA_WR08(chip->PCIO, 0x03D4, 0x44); UnloadStateExt() 1813 state->crtcOwner = VGA_RD08(chip->PCIO, 0x03D5); UnloadStateExt() 1815 VGA_WR08(chip->PCIO, 0x03D4, 0x41); UnloadStateExt() 1816 state->extra = VGA_RD08(chip->PCIO, 0x03D5); UnloadStateExt() 1817 state->cursorConfig = NV_RD32(chip->PCRTC, 0x00000810); UnloadStateExt() 1819 if((chip->Chipset & 0x0ff0) == 0x0110) { UnloadStateExt() 1820 state->dither = NV_RD32(chip->PRAMDAC, 0x0528); UnloadStateExt() 1822 if((chip->Chipset & 0x0ff0) >= 0x0170) { UnloadStateExt() 1823 state->dither = NV_RD32(chip->PRAMDAC, 0x083C); UnloadStateExt() 1830 RIVA_HW_INST *chip, SetStartAddress() 1834 NV_WR32(chip->PCRTC, 0x800, start); SetStartAddress() 1839 RIVA_HW_INST *chip, SetStartAddress3() 1850 chip->LockUnlock(chip, 0); SetStartAddress3() 1854 VGA_WR08(chip->PCIO, 0x3D4, 0x0D); VGA_WR08(chip->PCIO, 0x3D5, offset); SetStartAddress3() 1856 VGA_WR08(chip->PCIO, 0x3D4, 0x0C); VGA_WR08(chip->PCIO, 0x3D5, offset); SetStartAddress3() 1858 VGA_WR08(chip->PCIO, 0x3D4, 0x19); tmp = VGA_RD08(chip->PCIO, 0x3D5); SetStartAddress3() 1859 VGA_WR08(chip->PCIO, 0x3D5, (offset & 0x01F) | (tmp & ~0x1F)); SetStartAddress3() 1860 VGA_WR08(chip->PCIO, 0x3D4, 0x2D); tmp = VGA_RD08(chip->PCIO, 0x3D5); SetStartAddress3() 1861 VGA_WR08(chip->PCIO, 0x3D5, (offset & 0x60) | (tmp & ~0x60)); SetStartAddress3() 1865 offset = VGA_RD08(chip->PCIO, chip->IO + 0x0A); SetStartAddress3() 1866 VGA_WR08(chip->PCIO, 0x3C0, 0x13); SetStartAddress3() 1867 VGA_WR08(chip->PCIO, 0x3C0, pan); SetStartAddress3() 1871 RIVA_HW_INST *chip, nv3SetSurfaces2D() 1877 (RivaSurface __iomem *)&(chip->FIFO[0x0000E000/4]); nv3SetSurfaces2D() 1879 RIVA_FIFO_FREE(*chip,Tri03,5); nv3SetSurfaces2D() 1880 NV_WR32(&chip->FIFO[0x00003800], 0, 0x80000003); nv3SetSurfaces2D() 1882 NV_WR32(&chip->FIFO[0x00003800], 0, 0x80000004); nv3SetSurfaces2D() 1884 NV_WR32(&chip->FIFO[0x00003800], 0, 0x80000013); nv3SetSurfaces2D() 1888 RIVA_HW_INST *chip, nv4SetSurfaces2D() 1894 (RivaSurface __iomem *)&(chip->FIFO[0x0000E000/4]); nv4SetSurfaces2D() 1896 NV_WR32(&chip->FIFO[0x00003800], 0, 0x80000003); nv4SetSurfaces2D() 1898 NV_WR32(&chip->FIFO[0x00003800], 0, 0x80000004); nv4SetSurfaces2D() 1900 NV_WR32(&chip->FIFO[0x00003800], 0, 0x80000014); nv4SetSurfaces2D() 1904 RIVA_HW_INST *chip, nv10SetSurfaces2D() 1910 (RivaSurface __iomem *)&(chip->FIFO[0x0000E000/4]); nv10SetSurfaces2D() 1912 NV_WR32(&chip->FIFO[0x00003800], 0, 0x80000003); nv10SetSurfaces2D() 1914 NV_WR32(&chip->FIFO[0x00003800], 0, 0x80000004); nv10SetSurfaces2D() 1916 NV_WR32(&chip->FIFO[0x00003800], 0, 0x80000014); nv10SetSurfaces2D() 1920 RIVA_HW_INST *chip, nv3SetSurfaces3D() 1926 (RivaSurface __iomem *)&(chip->FIFO[0x0000E000/4]); nv3SetSurfaces3D() 1928 RIVA_FIFO_FREE(*chip,Tri03,5); nv3SetSurfaces3D() 1929 NV_WR32(&chip->FIFO[0x00003800], 0, 0x80000005); nv3SetSurfaces3D() 1931 NV_WR32(&chip->FIFO[0x00003800], 0, 0x80000006); nv3SetSurfaces3D() 1933 NV_WR32(&chip->FIFO[0x00003800], 0, 0x80000013); nv3SetSurfaces3D() 1937 RIVA_HW_INST *chip, nv4SetSurfaces3D() 1943 (RivaSurface __iomem *)&(chip->FIFO[0x0000E000/4]); nv4SetSurfaces3D() 1945 NV_WR32(&chip->FIFO[0x00003800], 0, 0x80000005); nv4SetSurfaces3D() 1947 NV_WR32(&chip->FIFO[0x00003800], 0, 0x80000006); nv4SetSurfaces3D() 1949 NV_WR32(&chip->FIFO[0x00003800], 0, 0x80000014); nv4SetSurfaces3D() 1953 RIVA_HW_INST *chip, nv10SetSurfaces3D() 1959 (RivaSurface3D __iomem *)&(chip->FIFO[0x0000E000/4]); nv10SetSurfaces3D() 1961 RIVA_FIFO_FREE(*chip,Tri03,4); nv10SetSurfaces3D() 1962 NV_WR32(&chip->FIFO[0x00003800], 0, 0x80000007); nv10SetSurfaces3D() 1965 NV_WR32(&chip->FIFO[0x00003800], 0, 0x80000014); nv10SetSurfaces3D() 1976 RIVA_HW_INST *chip nv3GetConfig() 1980 * Fill in chip configuration. nv3GetConfig() 1982 if (NV_RD32(&chip->PFB[0x00000000/4], 0) & 0x00000020) nv3GetConfig() 1984 if (((NV_RD32(chip->PMC, 0x00000000) & 0xF0) == 0x20) nv3GetConfig() 1985 && ((NV_RD32(chip->PMC, 0x00000000) & 0x0F) >= 0x02)) nv3GetConfig() 1990 chip->RamBandwidthKBytesPerSec = 800000; nv3GetConfig() 1991 switch (NV_RD32(chip->PFB, 0x00000000) & 0x03) nv3GetConfig() 1994 chip->RamAmountKBytes = 1024 * 4; nv3GetConfig() 1997 chip->RamAmountKBytes = 1024 * 2; nv3GetConfig() 2000 chip->RamAmountKBytes = 1024 * 8; nv3GetConfig() 2006 chip->RamBandwidthKBytesPerSec = 1000000; nv3GetConfig() 2007 chip->RamAmountKBytes = 1024 * 8; nv3GetConfig() 2015 chip->RamBandwidthKBytesPerSec = 1000000; nv3GetConfig() 2016 switch (NV_RD32(chip->PFB, 0x00000000) & 0x00000003) nv3GetConfig() 2019 chip->RamAmountKBytes = 1024 * 8; nv3GetConfig() 2022 chip->RamAmountKBytes = 1024 * 4; nv3GetConfig() 2025 chip->RamAmountKBytes = 1024 * 2; nv3GetConfig() 2029 chip->CrystalFreqKHz = (NV_RD32(chip->PEXTDEV, 0x00000000) & 0x00000040) ? 14318 : 13500; nv3GetConfig() 2030 chip->CURSOR = &(chip->PRAMIN[0x00008000/4 - 0x0800/4]); nv3GetConfig() 2031 chip->VBlankBit = 0x00000100; nv3GetConfig() 2032 chip->MaxVClockFreqKHz = 256000; nv3GetConfig() 2034 * Set chip functions. nv3GetConfig() 2036 chip->Busy = nv3Busy; nv3GetConfig() 2037 chip->ShowHideCursor = ShowHideCursor; nv3GetConfig() 2038 chip->LoadStateExt = LoadStateExt; nv3GetConfig() 2039 chip->UnloadStateExt = UnloadStateExt; nv3GetConfig() 2040 chip->SetStartAddress = SetStartAddress3; nv3GetConfig() 2041 chip->SetSurfaces2D = nv3SetSurfaces2D; nv3GetConfig() 2042 chip->SetSurfaces3D = nv3SetSurfaces3D; nv3GetConfig() 2043 chip->LockUnlock = nv3LockUnlock; nv3GetConfig() 2047 RIVA_HW_INST *chip nv4GetConfig() 2051 * Fill in chip configuration. nv4GetConfig() 2053 if (NV_RD32(chip->PFB, 0x00000000) & 0x00000100) nv4GetConfig() 2055 chip->RamAmountKBytes = ((NV_RD32(chip->PFB, 0x00000000) >> 12) & 0x0F) * 1024 * 2 nv4GetConfig() 2060 switch (NV_RD32(chip->PFB, 0x00000000) & 0x00000003) nv4GetConfig() 2063 chip->RamAmountKBytes = 1024 * 32; nv4GetConfig() 2066 chip->RamAmountKBytes = 1024 * 4; nv4GetConfig() 2069 chip->RamAmountKBytes = 1024 * 8; nv4GetConfig() 2073 chip->RamAmountKBytes = 1024 * 16; nv4GetConfig() 2077 switch ((NV_RD32(chip->PFB, 0x00000000) >> 3) & 0x00000003) nv4GetConfig() 2080 chip->RamBandwidthKBytesPerSec = 800000; nv4GetConfig() 2083 chip->RamBandwidthKBytesPerSec = 1000000; nv4GetConfig() 2086 chip->CrystalFreqKHz = (NV_RD32(chip->PEXTDEV, 0x00000000) & 0x00000040) ? 14318 : 13500; nv4GetConfig() 2087 chip->CURSOR = &(chip->PRAMIN[0x00010000/4 - 0x0800/4]); nv4GetConfig() 2088 chip->VBlankBit = 0x00000001; nv4GetConfig() 2089 chip->MaxVClockFreqKHz = 350000; nv4GetConfig() 2091 * Set chip functions. nv4GetConfig() 2093 chip->Busy = nv4Busy; nv4GetConfig() 2094 chip->ShowHideCursor = ShowHideCursor; nv4GetConfig() 2095 chip->LoadStateExt = LoadStateExt; nv4GetConfig() 2096 chip->UnloadStateExt = UnloadStateExt; nv4GetConfig() 2097 chip->SetStartAddress = SetStartAddress; nv4GetConfig() 2098 chip->SetSurfaces2D = nv4SetSurfaces2D; nv4GetConfig() 2099 chip->SetSurfaces3D = nv4SetSurfaces3D; nv4GetConfig() 2100 chip->LockUnlock = nv4LockUnlock; nv4GetConfig() 2104 RIVA_HW_INST *chip, nv10GetConfig() 2113 if(!(NV_RD32(chip->PMC, 0x00000004) & 0x01000001)) nv10GetConfig() 2114 NV_WR32(chip->PMC, 0x00000004, 0x01000001); nv10GetConfig() 2118 * Fill in chip configuration. nv10GetConfig() 2124 chip->RamAmountKBytes = (((amt >> 6) & 31) + 1) * 1024; nv10GetConfig() 2129 chip->RamAmountKBytes = (((amt >> 4) & 127) + 1) * 1024; nv10GetConfig() 2131 switch ((NV_RD32(chip->PFB, 0x0000020C) >> 20) & 0x000000FF) nv10GetConfig() 2134 chip->RamAmountKBytes = 1024 * 2; nv10GetConfig() 2137 chip->RamAmountKBytes = 1024 * 4; nv10GetConfig() 2140 chip->RamAmountKBytes = 1024 * 8; nv10GetConfig() 2143 chip->RamAmountKBytes = 1024 * 16; nv10GetConfig() 2146 chip->RamAmountKBytes = 1024 * 32; nv10GetConfig() 2149 chip->RamAmountKBytes = 1024 * 64; nv10GetConfig() 2152 chip->RamAmountKBytes = 1024 * 128; nv10GetConfig() 2155 chip->RamAmountKBytes = 1024 * 16; nv10GetConfig() 2159 switch ((NV_RD32(chip->PFB, 0x00000000) >> 3) & 0x00000003) nv10GetConfig() 2162 chip->RamBandwidthKBytesPerSec = 800000; nv10GetConfig() 2165 chip->RamBandwidthKBytesPerSec = 1000000; nv10GetConfig() 2168 chip->CrystalFreqKHz = (NV_RD32(chip->PEXTDEV, 0x0000) & (1 << 6)) ? nv10GetConfig() 2182 if(NV_RD32(chip->PEXTDEV, 0x0000) & (1 << 22)) nv10GetConfig() 2183 chip->CrystalFreqKHz = 27000; nv10GetConfig() 2189 chip->CursorStart = (chip->RamAmountKBytes - 128) * 1024; nv10GetConfig() 2190 chip->CURSOR = NULL; /* can't set this here */ nv10GetConfig() 2191 chip->VBlankBit = 0x00000001; nv10GetConfig() 2192 chip->MaxVClockFreqKHz = 350000; nv10GetConfig() 2194 * Set chip functions. nv10GetConfig() 2196 chip->Busy = nv10Busy; nv10GetConfig() 2197 chip->ShowHideCursor = ShowHideCursor; nv10GetConfig() 2198 chip->LoadStateExt = LoadStateExt; nv10GetConfig() 2199 chip->UnloadStateExt = UnloadStateExt; nv10GetConfig() 2200 chip->SetStartAddress = SetStartAddress; nv10GetConfig() 2201 chip->SetSurfaces2D = nv10SetSurfaces2D; nv10GetConfig() 2202 chip->SetSurfaces3D = nv10SetSurfaces3D; nv10GetConfig() 2203 chip->LockUnlock = nv4LockUnlock; nv10GetConfig() 2217 chip->twoHeads = TRUE; nv10GetConfig() 2220 chip->twoHeads = FALSE; nv10GetConfig() 2226 RIVA_HW_INST *chip, RivaGetConfig() 2233 chip->Version = RIVA_SW_VERSION; RivaGetConfig() 2237 switch (chip->Architecture) RivaGetConfig() 2240 nv3GetConfig(chip); RivaGetConfig() 2243 nv4GetConfig(chip); RivaGetConfig() 2248 nv10GetConfig(chip, chipset); RivaGetConfig() 2253 chip->Chipset = chipset; RivaGetConfig() 2257 chip->Rop = (RivaRop __iomem *)&(chip->FIFO[0x00000000/4]); RivaGetConfig() 2258 chip->Clip = (RivaClip __iomem *)&(chip->FIFO[0x00002000/4]); RivaGetConfig() 2259 chip->Patt = (RivaPattern __iomem *)&(chip->FIFO[0x00004000/4]); RivaGetConfig() 2260 chip->Pixmap = (RivaPixmap __iomem *)&(chip->FIFO[0x00006000/4]); RivaGetConfig() 2261 chip->Blt = (RivaScreenBlt __iomem *)&(chip->FIFO[0x00008000/4]); RivaGetConfig() 2262 chip->Bitmap = (RivaBitmap __iomem *)&(chip->FIFO[0x0000A000/4]); RivaGetConfig() 2263 chip->Line = (RivaLine __iomem *)&(chip->FIFO[0x0000C000/4]); RivaGetConfig() 2264 chip->Tri03 = (RivaTexturedTriangle03 __iomem *)&(chip->FIFO[0x0000E000/4]); RivaGetConfig() 85 vgaLockUnlock( RIVA_HW_INST *chip, int Lock ) vgaLockUnlock() argument 98 nv3LockUnlock( RIVA_HW_INST *chip, int Lock ) nv3LockUnlock() argument 108 nv4LockUnlock( RIVA_HW_INST *chip, int Lock ) nv4LockUnlock() argument 119 ShowHideCursor( RIVA_HW_INST *chip, int ShowHide ) ShowHideCursor() argument 1233 CalcStateExt( RIVA_HW_INST *chip, RIVA_HW_STATE *state, int bpp, int width, int hDisplaySize, int height, int dotClock ) CalcStateExt() argument 1404 LoadStateExt( RIVA_HW_INST *chip, RIVA_HW_STATE *state ) LoadStateExt() argument 1739 UnloadStateExt( RIVA_HW_INST *chip, RIVA_HW_STATE *state ) UnloadStateExt() argument 1828 SetStartAddress( RIVA_HW_INST *chip, unsigned start ) SetStartAddress() argument 1837 SetStartAddress3( RIVA_HW_INST *chip, unsigned start ) SetStartAddress3() argument 1869 nv3SetSurfaces2D( RIVA_HW_INST *chip, unsigned surf0, unsigned surf1 ) nv3SetSurfaces2D() argument 1886 nv4SetSurfaces2D( RIVA_HW_INST *chip, unsigned surf0, unsigned surf1 ) nv4SetSurfaces2D() argument 1902 nv10SetSurfaces2D( RIVA_HW_INST *chip, unsigned surf0, unsigned surf1 ) nv10SetSurfaces2D() argument 1918 nv3SetSurfaces3D( RIVA_HW_INST *chip, unsigned surf0, unsigned surf1 ) nv3SetSurfaces3D() argument 1935 nv4SetSurfaces3D( RIVA_HW_INST *chip, unsigned surf0, unsigned surf1 ) nv4SetSurfaces3D() argument 1951 nv10SetSurfaces3D( RIVA_HW_INST *chip, unsigned surf0, unsigned surf1 ) nv10SetSurfaces3D() argument 2102 nv10GetConfig( RIVA_HW_INST *chip, unsigned int chipset ) nv10GetConfig() argument 2224 RivaGetConfig( RIVA_HW_INST *chip, unsigned int chipset ) RivaGetConfig() argument
/linux-4.1.27/drivers/leds/
H A D	leds-lm355x.c	2 * Simple driver for Texas Instruments LM355x LED Flash driver chip 170 /* chip initialize */ lm355x_chip_init() 171 static int lm355x_chip_init(struct lm355x_chip_data *chip) lm355x_chip_init() argument 175 struct lm355x_platform_data *pdata = chip->pdata; lm355x_chip_init() 178 switch (chip->type) { lm355x_chip_init() 181 ret = regmap_update_bits(chip->regmap, 0xE0, 0x28, reg_val); lm355x_chip_init() 185 ret = regmap_update_bits(chip->regmap, 0xA0, 0x04, reg_val); lm355x_chip_init() 192 ret = regmap_update_bits(chip->regmap, 0x0A, 0xC4, reg_val); lm355x_chip_init() 202 dev_err(chip->dev, "%s:i2c access fail to register\n", __func__); lm355x_chip_init() 206 /* chip control */ lm355x_control() 207 static void lm355x_control(struct lm355x_chip_data *chip, lm355x_control() argument 212 struct lm355x_platform_data *pdata = chip->pdata; lm355x_control() 213 struct lm355x_reg_data *preg = chip->regs; lm355x_control() 215 ret = regmap_read(chip->regmap, preg[REG_FLAG].regno, &chip->last_flag); lm355x_control() 218 if (chip->last_flag & preg[REG_FLAG].mask) lm355x_control() 219 dev_info(chip->dev, "%s Last FLAG is 0x%x\n", lm355x_control() 220 lm355x_name[chip->type], lm355x_control() 221 chip->last_flag & preg[REG_FLAG].mask); lm355x_control() 229 regmap_update_bits(chip->regmap, preg[REG_TORCH_CTRL].regno, lm355x_control() 238 regmap_update_bits(chip->regmap, lm355x_control() 246 dev_info(chip->dev, lm355x_control() 254 regmap_update_bits(chip->regmap, preg[REG_FLASH_CTRL].regno, lm355x_control() 262 if (chip->type == CHIP_LM3554) lm355x_control() 267 regmap_update_bits(chip->regmap, lm355x_control() 275 dev_info(chip->dev, lm355x_control() 282 regmap_update_bits(chip->regmap, preg[REG_INDI_CTRL].regno, lm355x_control() 291 regmap_update_bits(chip->regmap, lm355x_control() 307 ret = regmap_update_bits(chip->regmap, preg[REG_OPMODE].regno, lm355x_control() 314 dev_err(chip->dev, "%s:i2c access fail to register\n", __func__); lm355x_control() 321 struct lm355x_chip_data *chip = lm355x_deferred_torch_brightness_set() local 324 mutex_lock(&chip->lock); lm355x_deferred_torch_brightness_set() 325 lm355x_control(chip, chip->br_torch, MODE_TORCH); lm355x_deferred_torch_brightness_set() 326 mutex_unlock(&chip->lock); lm355x_deferred_torch_brightness_set() 332 struct lm355x_chip_data *chip = lm355x_torch_brightness_set() local 335 chip->br_torch = brightness; lm355x_torch_brightness_set() 336 schedule_work(&chip->work_torch); lm355x_torch_brightness_set() 342 struct lm355x_chip_data *chip = lm355x_deferred_strobe_brightness_set() local 345 mutex_lock(&chip->lock); lm355x_deferred_strobe_brightness_set() 346 lm355x_control(chip, chip->br_flash, MODE_FLASH); lm355x_deferred_strobe_brightness_set() 347 mutex_unlock(&chip->lock); lm355x_deferred_strobe_brightness_set() 353 struct lm355x_chip_data *chip = lm355x_strobe_brightness_set() local 356 chip->br_flash = brightness; lm355x_strobe_brightness_set() 357 schedule_work(&chip->work_flash); lm355x_strobe_brightness_set() 363 struct lm355x_chip_data *chip = lm355x_deferred_indicator_brightness_set() local 366 mutex_lock(&chip->lock); lm355x_deferred_indicator_brightness_set() 367 lm355x_control(chip, chip->br_indicator, MODE_INDIC); lm355x_deferred_indicator_brightness_set() 368 mutex_unlock(&chip->lock); lm355x_deferred_indicator_brightness_set() 374 struct lm355x_chip_data *chip = lm355x_indicator_brightness_set() local 377 chip->br_indicator = brightness; lm355x_indicator_brightness_set() 378 schedule_work(&chip->work_indicator); lm355x_indicator_brightness_set() 388 struct lm355x_chip_data *chip = lm3556_indicator_pattern_store() local 398 ret = regmap_write(chip->regmap, 0x04, lm3556_indicator_pattern_store() 403 ret = regmap_write(chip->regmap, 0x05, lm3556_indicator_pattern_store() 410 dev_err(chip->dev, "%s:i2c access fail to register\n", __func__); lm3556_indicator_pattern_store() 433 struct lm355x_chip_data *chip; lm355x_probe() local 447 chip = devm_kzalloc(&client->dev, lm355x_probe() 449 if (!chip) lm355x_probe() 452 chip->dev = &client->dev; lm355x_probe() 453 chip->type = id->driver_data; lm355x_probe() 456 chip->regs = lm3554_regs; lm355x_probe() 459 chip->regs = lm3556_regs; lm355x_probe() 464 chip->pdata = pdata; lm355x_probe() 466 chip->regmap = devm_regmap_init_i2c(client, &lm355x_regmap); lm355x_probe() 467 if (IS_ERR(chip->regmap)) { lm355x_probe() 468 err = PTR_ERR(chip->regmap); lm355x_probe() 474 mutex_init(&chip->lock); lm355x_probe() 475 i2c_set_clientdata(client, chip); lm355x_probe() 477 err = lm355x_chip_init(chip); lm355x_probe() 482 INIT_WORK(&chip->work_flash, lm355x_deferred_strobe_brightness_set); lm355x_probe() 483 chip->cdev_flash.name = "flash"; lm355x_probe() 484 chip->cdev_flash.max_brightness = 16; lm355x_probe() 485 chip->cdev_flash.brightness_set = lm355x_strobe_brightness_set; lm355x_probe() 486 chip->cdev_flash.default_trigger = "flash"; lm355x_probe() 488 &client->dev, &chip->cdev_flash); lm355x_probe() 492 INIT_WORK(&chip->work_torch, lm355x_deferred_torch_brightness_set); lm355x_probe() 493 chip->cdev_torch.name = "torch"; lm355x_probe() 494 chip->cdev_torch.max_brightness = 8; lm355x_probe() 495 chip->cdev_torch.brightness_set = lm355x_torch_brightness_set; lm355x_probe() 496 chip->cdev_torch.default_trigger = "torch"; lm355x_probe() 498 &client->dev, &chip->cdev_torch); lm355x_probe() 502 INIT_WORK(&chip->work_indicator, lm355x_probe() 504 chip->cdev_indicator.name = "indicator"; lm355x_probe() 506 chip->cdev_indicator.max_brightness = 4; lm355x_probe() 508 chip->cdev_indicator.max_brightness = 8; lm355x_probe() 509 chip->cdev_indicator.brightness_set = lm355x_indicator_brightness_set; lm355x_probe() 512 chip->cdev_indicator.groups = lm355x_indicator_groups; lm355x_probe() 514 &client->dev, &chip->cdev_indicator); lm355x_probe() 523 led_classdev_unregister(&chip->cdev_torch); lm355x_probe() 525 led_classdev_unregister(&chip->cdev_flash); lm355x_probe() 532 struct lm355x_chip_data *chip = i2c_get_clientdata(client); lm355x_remove() local 533 struct lm355x_reg_data *preg = chip->regs; lm355x_remove() 535 regmap_write(chip->regmap, preg[REG_OPMODE].regno, 0); lm355x_remove() 536 led_classdev_unregister(&chip->cdev_indicator); lm355x_remove() 537 flush_work(&chip->work_indicator); lm355x_remove() 538 led_classdev_unregister(&chip->cdev_torch); lm355x_remove() 539 flush_work(&chip->work_torch); lm355x_remove() 540 led_classdev_unregister(&chip->cdev_flash); lm355x_remove() 541 flush_work(&chip->work_flash); lm355x_remove() 542 dev_info(&client->dev, "%s is removed\n", lm355x_name[chip->type]); lm355x_remove()
H A D	leds-lm3642.c	2 * Simple driver for Texas Instruments LM3642 LED Flash driver chip 95 /* chip initialize */ lm3642_chip_init() 96 static int lm3642_chip_init(struct lm3642_chip_data *chip) lm3642_chip_init() argument 99 struct lm3642_platform_data *pdata = chip->pdata; lm3642_chip_init() 102 ret = regmap_update_bits(chip->regmap, REG_ENABLE, EX_PIN_ENABLE_MASK, lm3642_chip_init() 105 dev_err(chip->dev, "Failed to update REG_ENABLE Register\n"); lm3642_chip_init() 109 /* chip control */ lm3642_control() 110 static int lm3642_control(struct lm3642_chip_data *chip, lm3642_control() argument 115 ret = regmap_read(chip->regmap, REG_FLAG, &chip->last_flag); lm3642_control() 117 dev_err(chip->dev, "Failed to read REG_FLAG Register\n"); lm3642_control() 121 if (chip->last_flag) lm3642_control() 122 dev_info(chip->dev, "Last FLAG is 0x%x\n", chip->last_flag); lm3642_control() 130 ret = regmap_update_bits(chip->regmap, REG_I_CTRL, lm3642_control() 134 if (chip->torch_pin) lm3642_control() 139 ret = regmap_update_bits(chip->regmap, REG_I_CTRL, lm3642_control() 143 if (chip->strobe_pin) lm3642_control() 148 ret = regmap_update_bits(chip->regmap, REG_I_CTRL, lm3642_control() 161 dev_err(chip->dev, "Failed to write REG_I_CTRL Register\n"); lm3642_control() 165 if (chip->tx_pin) lm3642_control() 168 ret = regmap_update_bits(chip->regmap, REG_ENABLE, lm3642_control() 184 struct lm3642_chip_data *chip = lm3642_torch_pin_store() local 194 chip->torch_pin = state; lm3642_torch_pin_store() 195 ret = regmap_update_bits(chip->regmap, REG_ENABLE, lm3642_torch_pin_store() 203 dev_err(chip->dev, "%s:i2c access fail to register\n", __func__); lm3642_torch_pin_store() 206 dev_err(chip->dev, "%s: fail to change str to int\n", __func__); lm3642_torch_pin_store() 214 struct lm3642_chip_data *chip = lm3642_deferred_torch_brightness_set() local 217 mutex_lock(&chip->lock); lm3642_deferred_torch_brightness_set() 218 lm3642_control(chip, chip->br_torch, MODES_TORCH); lm3642_deferred_torch_brightness_set() 219 mutex_unlock(&chip->lock); lm3642_deferred_torch_brightness_set() 225 struct lm3642_chip_data *chip = lm3642_torch_brightness_set() local 228 chip->br_torch = brightness; lm3642_torch_brightness_set() 229 schedule_work(&chip->work_torch); lm3642_torch_brightness_set() 241 struct lm3642_chip_data *chip = lm3642_strobe_pin_store() local 251 chip->strobe_pin = state; lm3642_strobe_pin_store() 252 ret = regmap_update_bits(chip->regmap, REG_ENABLE, lm3642_strobe_pin_store() 260 dev_err(chip->dev, "%s:i2c access fail to register\n", __func__); lm3642_strobe_pin_store() 263 dev_err(chip->dev, "%s: fail to change str to int\n", __func__); lm3642_strobe_pin_store() 271 struct lm3642_chip_data *chip = lm3642_deferred_strobe_brightness_set() local 274 mutex_lock(&chip->lock); lm3642_deferred_strobe_brightness_set() 275 lm3642_control(chip, chip->br_flash, MODES_FLASH); lm3642_deferred_strobe_brightness_set() 276 mutex_unlock(&chip->lock); lm3642_deferred_strobe_brightness_set() 282 struct lm3642_chip_data *chip = lm3642_strobe_brightness_set() local 285 chip->br_flash = brightness; lm3642_strobe_brightness_set() 286 schedule_work(&chip->work_flash); lm3642_strobe_brightness_set() 292 struct lm3642_chip_data *chip = lm3642_deferred_indicator_brightness_set() local 295 mutex_lock(&chip->lock); lm3642_deferred_indicator_brightness_set() 296 lm3642_control(chip, chip->br_indicator, MODES_INDIC); lm3642_deferred_indicator_brightness_set() 297 mutex_unlock(&chip->lock); lm3642_deferred_indicator_brightness_set() 303 struct lm3642_chip_data *chip = lm3642_indicator_brightness_set() local 306 chip->br_indicator = brightness; lm3642_indicator_brightness_set() 307 schedule_work(&chip->work_indicator); lm3642_indicator_brightness_set() 332 struct lm3642_chip_data *chip; lm3642_probe() local 346 chip = devm_kzalloc(&client->dev, lm3642_probe() 348 if (!chip) lm3642_probe() 351 chip->dev = &client->dev; lm3642_probe() 352 chip->pdata = pdata; lm3642_probe() 354 chip->tx_pin = pdata->tx_pin; lm3642_probe() 355 chip->torch_pin = pdata->torch_pin; lm3642_probe() 356 chip->strobe_pin = pdata->strobe_pin; lm3642_probe() 358 chip->regmap = devm_regmap_init_i2c(client, &lm3642_regmap); lm3642_probe() 359 if (IS_ERR(chip->regmap)) { lm3642_probe() 360 err = PTR_ERR(chip->regmap); lm3642_probe() 366 mutex_init(&chip->lock); lm3642_probe() 367 i2c_set_clientdata(client, chip); lm3642_probe() 369 err = lm3642_chip_init(chip); lm3642_probe() 374 INIT_WORK(&chip->work_flash, lm3642_deferred_strobe_brightness_set); lm3642_probe() 375 chip->cdev_flash.name = "flash"; lm3642_probe() 376 chip->cdev_flash.max_brightness = 16; lm3642_probe() 377 chip->cdev_flash.brightness_set = lm3642_strobe_brightness_set; lm3642_probe() 378 chip->cdev_flash.default_trigger = "flash"; lm3642_probe() 379 chip->cdev_flash.groups = lm3642_flash_groups, lm3642_probe() 381 &client->dev, &chip->cdev_flash); lm3642_probe() 383 dev_err(chip->dev, "failed to register flash\n"); lm3642_probe() 388 INIT_WORK(&chip->work_torch, lm3642_deferred_torch_brightness_set); lm3642_probe() 389 chip->cdev_torch.name = "torch"; lm3642_probe() 390 chip->cdev_torch.max_brightness = 8; lm3642_probe() 391 chip->cdev_torch.brightness_set = lm3642_torch_brightness_set; lm3642_probe() 392 chip->cdev_torch.default_trigger = "torch"; lm3642_probe() 393 chip->cdev_torch.groups = lm3642_torch_groups, lm3642_probe() 395 &client->dev, &chip->cdev_torch); lm3642_probe() 397 dev_err(chip->dev, "failed to register torch\n"); lm3642_probe() 402 INIT_WORK(&chip->work_indicator, lm3642_probe() 404 chip->cdev_indicator.name = "indicator"; lm3642_probe() 405 chip->cdev_indicator.max_brightness = 8; lm3642_probe() 406 chip->cdev_indicator.brightness_set = lm3642_indicator_brightness_set; lm3642_probe() 408 &client->dev, &chip->cdev_indicator); lm3642_probe() 410 dev_err(chip->dev, "failed to register indicator\n"); lm3642_probe() 418 led_classdev_unregister(&chip->cdev_torch); lm3642_probe() 420 led_classdev_unregister(&chip->cdev_flash); lm3642_probe() 427 struct lm3642_chip_data *chip = i2c_get_clientdata(client); lm3642_remove() local 429 led_classdev_unregister(&chip->cdev_indicator); lm3642_remove() 430 flush_work(&chip->work_indicator); lm3642_remove() 431 led_classdev_unregister(&chip->cdev_torch); lm3642_remove() 432 flush_work(&chip->work_torch); lm3642_remove() 433 led_classdev_unregister(&chip->cdev_flash); lm3642_remove() 434 flush_work(&chip->work_flash); lm3642_remove() 435 regmap_write(chip->regmap, REG_ENABLE, 0); lm3642_remove()
H A D	leds-lp8501.c	90 lp55xx_write(led->chip, LP8501_REG_LED_CURRENT_BASE + led->chan_nr, lp8501_set_led_current() 94 static int lp8501_post_init_device(struct lp55xx_chip *chip) lp8501_post_init_device() argument 99 ret = lp55xx_write(chip, LP8501_REG_ENABLE, LP8501_ENABLE); lp8501_post_init_device() 106 if (chip->pdata->clock_mode != LP55XX_CLOCK_EXT) lp8501_post_init_device() 109 ret = lp55xx_write(chip, LP8501_REG_CONFIG, val); lp8501_post_init_device() 114 return lp55xx_update_bits(chip, LP8501_REG_PWR_CONFIG, lp8501_post_init_device() 115 LP8501_PWR_CONFIG_M, chip->pdata->pwr_sel); lp8501_post_init_device() 118 static void lp8501_load_engine(struct lp55xx_chip *chip) lp8501_load_engine() argument 120 enum lp55xx_engine_index idx = chip->engine_idx; lp8501_load_engine() 139 lp55xx_update_bits(chip, LP8501_REG_OP_MODE, mask[idx], val[idx]); lp8501_load_engine() 143 lp55xx_write(chip, LP8501_REG_PROG_PAGE_SEL, page_sel[idx]); lp8501_load_engine() 146 static void lp8501_stop_engine(struct lp55xx_chip *chip) lp8501_stop_engine() argument 148 lp55xx_write(chip, LP8501_REG_OP_MODE, 0); lp8501_stop_engine() 152 static void lp8501_turn_off_channels(struct lp55xx_chip *chip) lp8501_turn_off_channels() argument 157 lp55xx_write(chip, LP8501_REG_LED_PWM_BASE + i, 0); lp8501_turn_off_channels() 160 static void lp8501_run_engine(struct lp55xx_chip *chip, bool start) lp8501_run_engine() argument 168 lp8501_stop_engine(chip); lp8501_run_engine() 169 lp8501_turn_off_channels(chip); lp8501_run_engine() 178 ret = lp55xx_read(chip, LP8501_REG_OP_MODE, &mode); lp8501_run_engine() 182 ret = lp55xx_read(chip, LP8501_REG_ENABLE, &exec); lp8501_run_engine() 202 lp55xx_write(chip, LP8501_REG_OP_MODE, mode); lp8501_run_engine() 205 lp55xx_update_bits(chip, LP8501_REG_ENABLE, LP8501_EXEC_M, exec); lp8501_run_engine() 208 static int lp8501_update_program_memory(struct lp55xx_chip *chip, lp8501_update_program_memory() argument 222 lp55xx_write(chip, LP8501_REG_PROG_MEM + i, 0); lp8501_update_program_memory() 246 lp55xx_write(chip, LP8501_REG_PROG_MEM + i, pattern[i]); lp8501_update_program_memory() 251 dev_err(&chip->cl->dev, "wrong pattern format\n"); lp8501_update_program_memory() 255 static void lp8501_firmware_loaded(struct lp55xx_chip *chip) lp8501_firmware_loaded() argument 257 const struct firmware *fw = chip->fw; lp8501_firmware_loaded() 260 dev_err(&chip->cl->dev, "firmware data size overflow: %zu\n", lp8501_firmware_loaded() 271 lp8501_load_engine(chip); lp8501_firmware_loaded() 272 lp8501_update_program_memory(chip, fw->data, fw->size); lp8501_firmware_loaded() 279 struct lp55xx_chip *chip = led->chip; lp8501_led_brightness_work() local 281 mutex_lock(&chip->lock); lp8501_led_brightness_work() 282 lp55xx_write(chip, LP8501_REG_LED_PWM_BASE + led->chan_nr, lp8501_led_brightness_work() 284 mutex_unlock(&chip->lock); lp8501_led_brightness_work() 309 struct lp55xx_chip *chip; lp8501_probe() local 326 chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL); lp8501_probe() 327 if (!chip) lp8501_probe() 335 chip->cl = client; lp8501_probe() 336 chip->pdata = pdata; lp8501_probe() 337 chip->cfg = &lp8501_cfg; lp8501_probe() 339 mutex_init(&chip->lock); lp8501_probe() 343 ret = lp55xx_init_device(chip); lp8501_probe() 347 dev_info(&client->dev, "%s Programmable led chip found\n", id->name); lp8501_probe() 349 ret = lp55xx_register_leds(led, chip); lp8501_probe() 353 ret = lp55xx_register_sysfs(chip); lp8501_probe() 362 lp55xx_unregister_leds(led, chip); lp8501_probe() 364 lp55xx_deinit_device(chip); lp8501_probe() 372 struct lp55xx_chip *chip = led->chip; lp8501_remove() local 374 lp8501_stop_engine(chip); lp8501_remove() 375 lp55xx_unregister_sysfs(chip); lp8501_remove() 376 lp55xx_unregister_leds(led, chip); lp8501_remove() 377 lp55xx_deinit_device(chip); lp8501_remove()
H A D	leds-lp55xx-common.c	41 static void lp55xx_reset_device(struct lp55xx_chip *chip) lp55xx_reset_device() argument 43 struct lp55xx_device_config *cfg = chip->cfg; lp55xx_reset_device() 48 lp55xx_write(chip, addr, val); lp55xx_reset_device() 51 static int lp55xx_detect_device(struct lp55xx_chip *chip) lp55xx_detect_device() argument 53 struct lp55xx_device_config *cfg = chip->cfg; lp55xx_detect_device() 58 ret = lp55xx_write(chip, addr, val); lp55xx_detect_device() 64 ret = lp55xx_read(chip, addr, &val); lp55xx_detect_device() 74 static int lp55xx_post_init_device(struct lp55xx_chip *chip) lp55xx_post_init_device() argument 76 struct lp55xx_device_config *cfg = chip->cfg; lp55xx_post_init_device() 81 return cfg->post_init_device(chip); lp55xx_post_init_device() 98 struct lp55xx_chip *chip = led->chip; lp55xx_store_current() local 107 if (!chip->cfg->set_led_current) lp55xx_store_current() 110 mutex_lock(&chip->lock); lp55xx_store_current() 111 chip->cfg->set_led_current(led, (u8)curr); lp55xx_store_current() 112 mutex_unlock(&chip->lock); lp55xx_store_current() 147 struct lp55xx_chip *chip, int chan) lp55xx_init_led() 149 struct lp55xx_platform_data *pdata = chip->pdata; lp55xx_init_led() 150 struct lp55xx_device_config *cfg = chip->cfg; lp55xx_init_led() 151 struct device *dev = &chip->cl->dev; lp55xx_init_led() 182 pdata->label ? : chip->cl->name, chan); lp55xx_init_led() 197 struct lp55xx_chip *chip = context; lp55xx_firmware_loaded() local 198 struct device *dev = &chip->cl->dev; lp55xx_firmware_loaded() 199 enum lp55xx_engine_index idx = chip->engine_idx; lp55xx_firmware_loaded() 206 /* handling firmware data is chip dependent */ lp55xx_firmware_loaded() 207 mutex_lock(&chip->lock); lp55xx_firmware_loaded() 209 chip->engines[idx - 1].mode = LP55XX_ENGINE_LOAD; lp55xx_firmware_loaded() 210 chip->fw = fw; lp55xx_firmware_loaded() 211 if (chip->cfg->firmware_cb) lp55xx_firmware_loaded() 212 chip->cfg->firmware_cb(chip); lp55xx_firmware_loaded() 214 mutex_unlock(&chip->lock); lp55xx_firmware_loaded() 218 release_firmware(chip->fw); lp55xx_firmware_loaded() 221 static int lp55xx_request_firmware(struct lp55xx_chip *chip) lp55xx_request_firmware() argument 223 const char *name = chip->cl->name; lp55xx_request_firmware() 224 struct device *dev = &chip->cl->dev; lp55xx_request_firmware() 227 GFP_KERNEL, chip, lp55xx_firmware_loaded); lp55xx_request_firmware() 235 struct lp55xx_chip *chip = led->chip; lp55xx_show_engine_select() local 237 return sprintf(buf, "%d\n", chip->engine_idx); lp55xx_show_engine_select() 245 struct lp55xx_chip *chip = led->chip; lp55xx_store_engine_select() local 258 mutex_lock(&chip->lock); lp55xx_store_engine_select() 259 chip->engine_idx = val; lp55xx_store_engine_select() 260 ret = lp55xx_request_firmware(chip); lp55xx_store_engine_select() 261 mutex_unlock(&chip->lock); lp55xx_store_engine_select() 276 static inline void lp55xx_run_engine(struct lp55xx_chip *chip, bool start) lp55xx_run_engine() argument 278 if (chip->cfg->run_engine) lp55xx_run_engine() 279 chip->cfg->run_engine(chip, start); lp55xx_run_engine() 287 struct lp55xx_chip *chip = led->chip; lp55xx_store_engine_run() local 296 lp55xx_run_engine(chip, false); lp55xx_store_engine_run() 300 mutex_lock(&chip->lock); lp55xx_store_engine_run() 301 lp55xx_run_engine(chip, true); lp55xx_store_engine_run() 302 mutex_unlock(&chip->lock); lp55xx_store_engine_run() 321 int lp55xx_write(struct lp55xx_chip *chip, u8 reg, u8 val) lp55xx_write() argument 323 return i2c_smbus_write_byte_data(chip->cl, reg, val); lp55xx_write() 327 int lp55xx_read(struct lp55xx_chip *chip, u8 reg, u8 *val) lp55xx_read() argument 331 ret = i2c_smbus_read_byte_data(chip->cl, reg); lp55xx_read() 340 int lp55xx_update_bits(struct lp55xx_chip *chip, u8 reg, u8 mask, u8 val) lp55xx_update_bits() argument 345 ret = lp55xx_read(chip, reg, &tmp); lp55xx_update_bits() 352 return lp55xx_write(chip, reg, tmp); lp55xx_update_bits() 356 bool lp55xx_is_extclk_used(struct lp55xx_chip *chip) lp55xx_is_extclk_used() argument 361 clk = devm_clk_get(&chip->cl->dev, "32k_clk"); lp55xx_is_extclk_used() 374 dev_info(&chip->cl->dev, "%dHz external clock used\n", LP55XX_CLK_32K); lp55xx_is_extclk_used() 376 chip->clk = clk; lp55xx_is_extclk_used() 380 dev_info(&chip->cl->dev, "internal clock used\n"); lp55xx_is_extclk_used() 385 int lp55xx_init_device(struct lp55xx_chip *chip) lp55xx_init_device() argument 389 struct device *dev = &chip->cl->dev; lp55xx_init_device() 392 WARN_ON(!chip); lp55xx_init_device() 394 pdata = chip->pdata; lp55xx_init_device() 395 cfg = chip->cfg; lp55xx_init_device() 415 lp55xx_reset_device(chip); lp55xx_init_device() 423 ret = lp55xx_detect_device(chip); lp55xx_init_device() 429 /* chip specific initialization */ lp55xx_init_device() 430 ret = lp55xx_post_init_device(chip); lp55xx_init_device() 439 lp55xx_deinit_device(chip); lp55xx_init_device() 445 void lp55xx_deinit_device(struct lp55xx_chip *chip) lp55xx_deinit_device() argument 447 struct lp55xx_platform_data *pdata = chip->pdata; lp55xx_deinit_device() 449 if (chip->clk) lp55xx_deinit_device() 450 clk_disable_unprepare(chip->clk); lp55xx_deinit_device() 457 int lp55xx_register_leds(struct lp55xx_led *led, struct lp55xx_chip *chip) lp55xx_register_leds() argument 459 struct lp55xx_platform_data *pdata = chip->pdata; lp55xx_register_leds() 460 struct lp55xx_device_config *cfg = chip->cfg; lp55xx_register_leds() 468 dev_err(&chip->cl->dev, "empty brightness configuration\n"); lp55xx_register_leds() 480 ret = lp55xx_init_led(each, chip, i); lp55xx_register_leds() 486 chip->num_leds++; lp55xx_register_leds() 487 each->chip = chip; lp55xx_register_leds() 497 lp55xx_unregister_leds(led, chip); lp55xx_register_leds() 502 void lp55xx_unregister_leds(struct lp55xx_led *led, struct lp55xx_chip *chip) lp55xx_unregister_leds() argument 507 for (i = 0; i < chip->num_leds; i++) { lp55xx_unregister_leds() 515 int lp55xx_register_sysfs(struct lp55xx_chip *chip) lp55xx_register_sysfs() argument 517 struct device *dev = &chip->cl->dev; lp55xx_register_sysfs() 518 struct lp55xx_device_config *cfg = chip->cfg; lp55xx_register_sysfs() 534 void lp55xx_unregister_sysfs(struct lp55xx_chip *chip) lp55xx_unregister_sysfs() argument 536 struct device *dev = &chip->cl->dev; lp55xx_unregister_sysfs() 537 struct lp55xx_device_config *cfg = chip->cfg; lp55xx_unregister_sysfs() 146 lp55xx_init_led(struct lp55xx_led *led, struct lp55xx_chip *chip, int chan) lp55xx_init_led() argument
H A D	leds-lp5521.c	2 * LP5521 LED chip driver. 130 lp55xx_write(led->chip, LP5521_REG_LED_CURRENT_BASE + led->chan_nr, lp5521_set_led_current() 134 static void lp5521_load_engine(struct lp55xx_chip *chip) lp5521_load_engine() argument 136 enum lp55xx_engine_index idx = chip->engine_idx; lp5521_load_engine() 149 lp55xx_update_bits(chip, LP5521_REG_OP_MODE, mask[idx], val[idx]); lp5521_load_engine() 154 static void lp5521_stop_all_engines(struct lp55xx_chip *chip) lp5521_stop_all_engines() argument 156 lp55xx_write(chip, LP5521_REG_OP_MODE, 0); lp5521_stop_all_engines() 160 static void lp5521_stop_engine(struct lp55xx_chip *chip) lp5521_stop_engine() argument 162 enum lp55xx_engine_index idx = chip->engine_idx; lp5521_stop_engine() 169 lp55xx_update_bits(chip, LP5521_REG_OP_MODE, mask[idx], 0); lp5521_stop_engine() 174 static void lp5521_run_engine(struct lp55xx_chip *chip, bool start) lp5521_run_engine() argument 182 lp5521_stop_engine(chip); lp5521_run_engine() 183 lp55xx_write(chip, LP5521_REG_OP_MODE, LP5521_CMD_DIRECT); lp5521_run_engine() 193 ret = lp55xx_read(chip, LP5521_REG_OP_MODE, &mode); lp5521_run_engine() 197 ret = lp55xx_read(chip, LP5521_REG_ENABLE, &exec); lp5521_run_engine() 217 lp55xx_write(chip, LP5521_REG_OP_MODE, mode); lp5521_run_engine() 220 lp55xx_update_bits(chip, LP5521_REG_ENABLE, LP5521_EXEC_M, exec); lp5521_run_engine() 224 static int lp5521_update_program_memory(struct lp55xx_chip *chip, lp5521_update_program_memory() argument 227 enum lp55xx_engine_index idx = chip->engine_idx; lp5521_update_program_memory() 261 ret = lp55xx_write(chip, addr[idx] + i, pattern[i]); lp5521_update_program_memory() 269 dev_err(&chip->cl->dev, "wrong pattern format\n"); lp5521_update_program_memory() 273 static void lp5521_firmware_loaded(struct lp55xx_chip *chip) lp5521_firmware_loaded() argument 275 const struct firmware *fw = chip->fw; lp5521_firmware_loaded() 278 dev_err(&chip->cl->dev, "firmware data size overflow: %zu\n", lp5521_firmware_loaded() 289 lp5521_load_engine(chip); lp5521_firmware_loaded() 290 lp5521_update_program_memory(chip, fw->data, fw->size); lp5521_firmware_loaded() 293 static int lp5521_post_init_device(struct lp55xx_chip *chip) lp5521_post_init_device() argument 299 * Make sure that the chip is reset by reading back the r channel lp5521_post_init_device() 304 ret = lp55xx_read(chip, LP5521_REG_R_CURRENT, &val); lp5521_post_init_device() 306 dev_err(&chip->cl->dev, "error in resetting chip\n"); lp5521_post_init_device() 310 dev_err(&chip->cl->dev, lp5521_post_init_device() 319 ret = lp55xx_write(chip, LP5521_REG_OP_MODE, LP5521_CMD_DIRECT); lp5521_post_init_device() 323 if (!lp55xx_is_extclk_used(chip)) lp5521_post_init_device() 326 ret = lp55xx_write(chip, LP5521_REG_CONFIG, val); lp5521_post_init_device() 331 lp55xx_write(chip, LP5521_REG_R_PWM, 0); lp5521_post_init_device() 332 lp55xx_write(chip, LP5521_REG_G_PWM, 0); lp5521_post_init_device() 333 lp55xx_write(chip, LP5521_REG_B_PWM, 0); lp5521_post_init_device() 336 ret = lp55xx_write(chip, LP5521_REG_ENABLE, LP5521_ENABLE_RUN_PROGRAM); lp5521_post_init_device() 345 static int lp5521_run_selftest(struct lp55xx_chip *chip, char *buf) lp5521_run_selftest() argument 347 struct lp55xx_platform_data *pdata = chip->pdata; lp5521_run_selftest() 351 ret = lp55xx_read(chip, LP5521_REG_STATUS, &status); lp5521_run_selftest() 369 struct lp55xx_chip *chip = led->chip; lp5521_led_brightness_work() local 371 mutex_lock(&chip->lock); lp5521_led_brightness_work() 372 lp55xx_write(chip, LP5521_REG_LED_PWM_BASE + led->chan_nr, lp5521_led_brightness_work() 374 mutex_unlock(&chip->lock); lp5521_led_brightness_work() 382 struct lp55xx_chip *chip = led->chip; show_engine_mode() local 383 enum lp55xx_engine_mode mode = chip->engines[nr - 1].mode; show_engine_mode() 404 struct lp55xx_chip *chip = led->chip; store_engine_mode() local 405 struct lp55xx_engine *engine = &chip->engines[nr - 1]; store_engine_mode() 407 mutex_lock(&chip->lock); store_engine_mode() 409 chip->engine_idx = nr; store_engine_mode() 412 lp5521_run_engine(chip, true); store_engine_mode() 415 lp5521_stop_engine(chip); store_engine_mode() 416 lp5521_load_engine(chip); store_engine_mode() 419 lp5521_stop_engine(chip); store_engine_mode() 423 mutex_unlock(&chip->lock); store_engine_mode() 436 struct lp55xx_chip *chip = led->chip; store_engine_load() local 439 mutex_lock(&chip->lock); store_engine_load() 441 chip->engine_idx = nr; store_engine_load() 442 lp5521_load_engine(chip); store_engine_load() 443 ret = lp5521_update_program_memory(chip, buf, len); store_engine_load() 445 mutex_unlock(&chip->lock); store_engine_load() 458 struct lp55xx_chip *chip = led->chip; lp5521_selftest() local 461 mutex_lock(&chip->lock); lp5521_selftest() 462 ret = lp5521_run_selftest(chip, buf); lp5521_selftest() 463 mutex_unlock(&chip->lock); lp5521_selftest() 515 struct lp55xx_chip *chip; lp5521_probe() local 532 chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL); lp5521_probe() 533 if (!chip) lp5521_probe() 541 chip->cl = client; lp5521_probe() 542 chip->pdata = pdata; lp5521_probe() 543 chip->cfg = &lp5521_cfg; lp5521_probe() 545 mutex_init(&chip->lock); lp5521_probe() 549 ret = lp55xx_init_device(chip); lp5521_probe() 553 dev_info(&client->dev, "%s programmable led chip found\n", id->name); lp5521_probe() 555 ret = lp55xx_register_leds(led, chip); lp5521_probe() 559 ret = lp55xx_register_sysfs(chip); lp5521_probe() 568 lp55xx_unregister_leds(led, chip); lp5521_probe() 570 lp55xx_deinit_device(chip); lp5521_probe() 578 struct lp55xx_chip *chip = led->chip; lp5521_remove() local 580 lp5521_stop_all_engines(chip); lp5521_remove() 581 lp55xx_unregister_sysfs(chip); lp5521_remove() 582 lp55xx_unregister_leds(led, chip); lp5521_remove() 583 lp55xx_deinit_device(chip); lp5521_remove() 589 { "lp5521", 0 }, /* Three channel chip */
H A D	leds-lp5562.c	127 lp55xx_write(led->chip, addr[led->chan_nr], led_current); lp5562_set_led_current() 130 static void lp5562_load_engine(struct lp55xx_chip *chip) lp5562_load_engine() argument 132 enum lp55xx_engine_index idx = chip->engine_idx; lp5562_load_engine() 145 lp55xx_update_bits(chip, LP5562_REG_OP_MODE, mask[idx], val[idx]); lp5562_load_engine() 150 static void lp5562_stop_engine(struct lp55xx_chip *chip) lp5562_stop_engine() argument 152 lp55xx_write(chip, LP5562_REG_OP_MODE, LP5562_CMD_DISABLE); lp5562_stop_engine() 156 static void lp5562_run_engine(struct lp55xx_chip *chip, bool start) lp5562_run_engine() argument 164 lp55xx_write(chip, LP5562_REG_ENABLE, LP5562_ENABLE_DEFAULT); lp5562_run_engine() 166 lp5562_stop_engine(chip); lp5562_run_engine() 167 lp55xx_write(chip, LP5562_REG_ENG_SEL, LP5562_ENG_SEL_PWM); lp5562_run_engine() 168 lp55xx_write(chip, LP5562_REG_OP_MODE, LP5562_CMD_DIRECT); lp5562_run_engine() 178 ret = lp55xx_read(chip, LP5562_REG_OP_MODE, &mode); lp5562_run_engine() 182 ret = lp55xx_read(chip, LP5562_REG_ENABLE, &exec); lp5562_run_engine() 202 lp55xx_write(chip, LP5562_REG_OP_MODE, mode); lp5562_run_engine() 205 lp55xx_update_bits(chip, LP5562_REG_ENABLE, LP5562_EXEC_M, exec); lp5562_run_engine() 209 static int lp5562_update_firmware(struct lp55xx_chip *chip, lp5562_update_firmware() argument 212 enum lp55xx_engine_index idx = chip->engine_idx; lp5562_update_firmware() 229 lp55xx_write(chip, addr[idx] + i, 0); lp5562_update_firmware() 253 lp55xx_write(chip, addr[idx] + i, pattern[i]); lp5562_update_firmware() 258 dev_err(&chip->cl->dev, "wrong pattern format\n"); lp5562_update_firmware() 262 static void lp5562_firmware_loaded(struct lp55xx_chip *chip) lp5562_firmware_loaded() argument 264 const struct firmware *fw = chip->fw; lp5562_firmware_loaded() 267 dev_err(&chip->cl->dev, "firmware data size overflow: %zu\n", lp5562_firmware_loaded() 278 lp5562_load_engine(chip); lp5562_firmware_loaded() 279 lp5562_update_firmware(chip, fw->data, fw->size); lp5562_firmware_loaded() 282 static int lp5562_post_init_device(struct lp55xx_chip *chip) lp5562_post_init_device() argument 288 ret = lp55xx_write(chip, LP5562_REG_OP_MODE, LP5562_CMD_DIRECT); lp5562_post_init_device() 295 if (!lp55xx_is_extclk_used(chip)) lp5562_post_init_device() 298 ret = lp55xx_write(chip, LP5562_REG_CONFIG, cfg); lp5562_post_init_device() 303 lp55xx_write(chip, LP5562_REG_R_PWM, 0); lp5562_post_init_device() 304 lp55xx_write(chip, LP5562_REG_G_PWM, 0); lp5562_post_init_device() 305 lp55xx_write(chip, LP5562_REG_B_PWM, 0); lp5562_post_init_device() 306 lp55xx_write(chip, LP5562_REG_W_PWM, 0); lp5562_post_init_device() 309 lp55xx_write(chip, LP5562_REG_ENG_SEL, LP5562_ENG_SEL_PWM); lp5562_post_init_device() 318 struct lp55xx_chip *chip = led->chip; lp5562_led_brightness_work() local 326 mutex_lock(&chip->lock); lp5562_led_brightness_work() 327 lp55xx_write(chip, addr[led->chan_nr], led->brightness); lp5562_led_brightness_work() 328 mutex_unlock(&chip->lock); lp5562_led_brightness_work() 331 static void lp5562_write_program_memory(struct lp55xx_chip *chip, lp5562_write_program_memory() argument 340 lp55xx_write(chip, base + i, *(rgb + i)); lp5562_write_program_memory() 342 lp55xx_write(chip, base + i, 0); lp5562_write_program_memory() 343 lp55xx_write(chip, base + i + 1, 0); lp5562_write_program_memory() 354 static int lp5562_run_predef_led_pattern(struct lp55xx_chip *chip, int mode) lp5562_run_predef_led_pattern() argument 360 lp5562_run_engine(chip, false); lp5562_run_predef_led_pattern() 364 ptn = chip->pdata->patterns + (mode - 1); lp5562_run_predef_led_pattern() 366 dev_err(&chip->cl->dev, "invalid pattern data\n"); lp5562_run_predef_led_pattern() 370 lp5562_stop_engine(chip); lp5562_run_predef_led_pattern() 373 lp55xx_write(chip, LP5562_REG_ENG_SEL, LP5562_ENG_SEL_RGB); lp5562_run_predef_led_pattern() 377 chip->engine_idx = i; lp5562_run_predef_led_pattern() 378 lp5562_load_engine(chip); lp5562_run_predef_led_pattern() 382 lp55xx_write(chip, LP5562_REG_PROG_MEM_ENG1, 0); lp5562_run_predef_led_pattern() 383 lp55xx_write(chip, LP5562_REG_PROG_MEM_ENG1 + 1, 0); lp5562_run_predef_led_pattern() 384 lp55xx_write(chip, LP5562_REG_PROG_MEM_ENG2, 0); lp5562_run_predef_led_pattern() 385 lp55xx_write(chip, LP5562_REG_PROG_MEM_ENG2 + 1, 0); lp5562_run_predef_led_pattern() 386 lp55xx_write(chip, LP5562_REG_PROG_MEM_ENG3, 0); lp5562_run_predef_led_pattern() 387 lp55xx_write(chip, LP5562_REG_PROG_MEM_ENG3 + 1, 0); lp5562_run_predef_led_pattern() 390 lp5562_write_program_memory(chip, LP5562_REG_PROG_MEM_ENG1, lp5562_run_predef_led_pattern() 392 lp5562_write_program_memory(chip, LP5562_REG_PROG_MEM_ENG2, lp5562_run_predef_led_pattern() 394 lp5562_write_program_memory(chip, LP5562_REG_PROG_MEM_ENG3, lp5562_run_predef_led_pattern() 398 lp5562_run_engine(chip, true); lp5562_run_predef_led_pattern() 408 struct lp55xx_chip *chip = led->chip; lp5562_store_pattern() local 409 struct lp55xx_predef_pattern *ptn = chip->pdata->patterns; lp5562_store_pattern() 410 int num_patterns = chip->pdata->num_patterns; lp5562_store_pattern() 421 mutex_lock(&chip->lock); lp5562_store_pattern() 422 ret = lp5562_run_predef_led_pattern(chip, mode); lp5562_store_pattern() 423 mutex_unlock(&chip->lock); lp5562_store_pattern() 436 struct lp55xx_chip *chip = led->chip; lp5562_store_engine_mux() local 451 enum lp55xx_engine_index idx = chip->engine_idx; lp5562_store_engine_mux() 473 mutex_lock(&chip->lock); lp5562_store_engine_mux() 474 lp55xx_update_bits(chip, LP5562_REG_ENG_SEL, mask, val); lp5562_store_engine_mux() 475 mutex_unlock(&chip->lock); lp5562_store_engine_mux() 516 struct lp55xx_chip *chip; lp5562_probe() local 533 chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL); lp5562_probe() 534 if (!chip) lp5562_probe() 542 chip->cl = client; lp5562_probe() 543 chip->pdata = pdata; lp5562_probe() 544 chip->cfg = &lp5562_cfg; lp5562_probe() 546 mutex_init(&chip->lock); lp5562_probe() 550 ret = lp55xx_init_device(chip); lp5562_probe() 554 ret = lp55xx_register_leds(led, chip); lp5562_probe() 558 ret = lp55xx_register_sysfs(chip); lp5562_probe() 567 lp55xx_unregister_leds(led, chip); lp5562_probe() 569 lp55xx_deinit_device(chip); lp5562_probe() 577 struct lp55xx_chip *chip = led->chip; lp5562_remove() local 579 lp5562_stop_engine(chip); lp5562_remove() 581 lp55xx_unregister_sysfs(chip); lp5562_remove() 582 lp55xx_unregister_leds(led, chip); lp5562_remove() 583 lp55xx_deinit_device(chip); lp5562_remove()
H A D	leds-lp5523.c	119 static int lp5523_init_program_engine(struct lp55xx_chip *chip); 129 lp55xx_write(led->chip, LP5523_REG_LED_CURRENT_BASE + led->chan_nr, lp5523_set_led_current() 133 static int lp5523_post_init_device(struct lp55xx_chip *chip) lp5523_post_init_device() argument 137 ret = lp55xx_write(chip, LP5523_REG_ENABLE, LP5523_ENABLE); lp5523_post_init_device() 144 ret = lp55xx_write(chip, LP5523_REG_CONFIG, lp5523_post_init_device() 152 ret = lp55xx_write(chip, LP5523_REG_ENABLE_LEDS_MSB, 0x01); lp5523_post_init_device() 156 ret = lp55xx_write(chip, LP5523_REG_ENABLE_LEDS_LSB, 0xff); lp5523_post_init_device() 160 return lp5523_init_program_engine(chip); lp5523_post_init_device() 163 static void lp5523_load_engine(struct lp55xx_chip *chip) lp5523_load_engine() argument 165 enum lp55xx_engine_index idx = chip->engine_idx; lp5523_load_engine() 178 lp55xx_update_bits(chip, LP5523_REG_OP_MODE, mask[idx], val[idx]); lp5523_load_engine() 183 static void lp5523_load_engine_and_select_page(struct lp55xx_chip *chip) lp5523_load_engine_and_select_page() argument 185 enum lp55xx_engine_index idx = chip->engine_idx; lp5523_load_engine_and_select_page() 192 lp5523_load_engine(chip); lp5523_load_engine_and_select_page() 194 lp55xx_write(chip, LP5523_REG_PROG_PAGE_SEL, page_sel[idx]); lp5523_load_engine_and_select_page() 197 static void lp5523_stop_all_engines(struct lp55xx_chip *chip) lp5523_stop_all_engines() argument 199 lp55xx_write(chip, LP5523_REG_OP_MODE, 0); lp5523_stop_all_engines() 203 static void lp5523_stop_engine(struct lp55xx_chip *chip) lp5523_stop_engine() argument 205 enum lp55xx_engine_index idx = chip->engine_idx; lp5523_stop_engine() 212 lp55xx_update_bits(chip, LP5523_REG_OP_MODE, mask[idx], 0); lp5523_stop_engine() 217 static void lp5523_turn_off_channels(struct lp55xx_chip *chip) lp5523_turn_off_channels() argument 222 lp55xx_write(chip, LP5523_REG_LED_PWM_BASE + i, 0); lp5523_turn_off_channels() 225 static void lp5523_run_engine(struct lp55xx_chip *chip, bool start) lp5523_run_engine() argument 233 lp5523_stop_engine(chip); lp5523_run_engine() 234 lp5523_turn_off_channels(chip); lp5523_run_engine() 243 ret = lp55xx_read(chip, LP5523_REG_OP_MODE, &mode); lp5523_run_engine() 247 ret = lp55xx_read(chip, LP5523_REG_ENABLE, &exec); lp5523_run_engine() 267 lp55xx_write(chip, LP5523_REG_OP_MODE, mode); lp5523_run_engine() 270 lp55xx_update_bits(chip, LP5523_REG_ENABLE, LP5523_EXEC_M, exec); lp5523_run_engine() 273 static int lp5523_init_program_engine(struct lp55xx_chip *chip) lp5523_init_program_engine() argument 287 ret = lp55xx_write(chip, LP5523_REG_CH1_PROG_START, 0x00); lp5523_init_program_engine() 291 ret = lp55xx_write(chip, LP5523_REG_CH2_PROG_START, 0x10); lp5523_init_program_engine() 295 ret = lp55xx_write(chip, LP5523_REG_CH3_PROG_START, 0x20); lp5523_init_program_engine() 301 chip->engine_idx = i; lp5523_init_program_engine() 302 lp5523_load_engine_and_select_page(chip); lp5523_init_program_engine() 305 ret = lp55xx_write(chip, LP5523_REG_PROG_MEM + j, lp5523_init_program_engine() 312 lp5523_run_engine(chip, true); lp5523_init_program_engine() 316 lp55xx_read(chip, LP5523_REG_STATUS, &status); lp5523_init_program_engine() 320 dev_err(&chip->cl->dev, lp5523_init_program_engine() 327 lp5523_stop_all_engines(chip); lp5523_init_program_engine() 331 static int lp5523_update_program_memory(struct lp55xx_chip *chip, lp5523_update_program_memory() argument 362 ret = lp55xx_write(chip, LP5523_REG_PROG_MEM + i, pattern[i]); lp5523_update_program_memory() 370 dev_err(&chip->cl->dev, "wrong pattern format\n"); lp5523_update_program_memory() 374 static void lp5523_firmware_loaded(struct lp55xx_chip *chip) lp5523_firmware_loaded() argument 376 const struct firmware *fw = chip->fw; lp5523_firmware_loaded() 379 dev_err(&chip->cl->dev, "firmware data size overflow: %zu\n", lp5523_firmware_loaded() 390 lp5523_load_engine_and_select_page(chip); lp5523_firmware_loaded() 391 lp5523_update_program_memory(chip, fw->data, fw->size); lp5523_firmware_loaded() 399 struct lp55xx_chip *chip = led->chip; show_engine_mode() local 400 enum lp55xx_engine_mode mode = chip->engines[nr - 1].mode; show_engine_mode() 421 struct lp55xx_chip *chip = led->chip; store_engine_mode() local 422 struct lp55xx_engine *engine = &chip->engines[nr - 1]; store_engine_mode() 424 mutex_lock(&chip->lock); store_engine_mode() 426 chip->engine_idx = nr; store_engine_mode() 429 lp5523_run_engine(chip, true); store_engine_mode() 432 lp5523_stop_engine(chip); store_engine_mode() 433 lp5523_load_engine(chip); store_engine_mode() 436 lp5523_stop_engine(chip); store_engine_mode() 440 mutex_unlock(&chip->lock); store_engine_mode() 488 struct lp55xx_chip *chip = led->chip; show_engine_leds() local 491 lp5523_mux_to_array(chip->engines[nr - 1].led_mux, mux); show_engine_leds() 499 static int lp5523_load_mux(struct lp55xx_chip *chip, u16 mux, int nr) lp5523_load_mux() argument 501 struct lp55xx_engine *engine = &chip->engines[nr - 1]; lp5523_load_mux() 509 lp5523_load_engine(chip); lp5523_load_mux() 511 ret = lp55xx_write(chip, LP5523_REG_PROG_PAGE_SEL, mux_page[nr]); lp5523_load_mux() 515 ret = lp55xx_write(chip, LP5523_REG_PROG_MEM , (u8)(mux >> 8)); lp5523_load_mux() 519 ret = lp55xx_write(chip, LP5523_REG_PROG_MEM + 1, (u8)(mux)); lp5523_load_mux() 532 struct lp55xx_chip *chip = led->chip; store_engine_leds() local 533 struct lp55xx_engine *engine = &chip->engines[nr - 1]; store_engine_leds() 540 mutex_lock(&chip->lock); store_engine_leds() 542 chip->engine_idx = nr; store_engine_leds() 548 if (lp5523_load_mux(chip, mux, nr)) store_engine_leds() 553 mutex_unlock(&chip->lock); store_engine_leds() 565 struct lp55xx_chip *chip = led->chip; store_engine_load() local 568 mutex_lock(&chip->lock); store_engine_load() 570 chip->engine_idx = nr; store_engine_load() 571 lp5523_load_engine_and_select_page(chip); store_engine_load() 572 ret = lp5523_update_program_memory(chip, buf, len); store_engine_load() 574 mutex_unlock(&chip->lock); store_engine_load() 587 struct lp55xx_chip *chip = led->chip; lp5523_selftest() local 588 struct lp55xx_platform_data *pdata = chip->pdata; lp5523_selftest() 592 mutex_lock(&chip->lock); lp5523_selftest() 594 ret = lp55xx_read(chip, LP5523_REG_STATUS, &status); lp5523_selftest() 605 lp55xx_write(chip, LP5523_REG_LED_TEST_CTRL, LP5523_EN_LEDTEST | 16); lp5523_selftest() 607 ret = lp55xx_read(chip, LP5523_REG_STATUS, &status); lp5523_selftest() 614 ret = lp55xx_read(chip, LP5523_REG_LED_TEST_ADC, &vdd); lp5523_selftest() 626 lp55xx_write(chip, LP5523_REG_LED_CURRENT_BASE + i, lp5523_selftest() 629 lp55xx_write(chip, LP5523_REG_LED_PWM_BASE + i, 0xff); lp5523_selftest() 632 lp55xx_write(chip, LP5523_REG_LED_TEST_CTRL, lp5523_selftest() 636 ret = lp55xx_read(chip, LP5523_REG_STATUS, &status); lp5523_selftest() 643 ret = lp55xx_read(chip, LP5523_REG_LED_TEST_ADC, &adc); lp5523_selftest() 650 lp55xx_write(chip, LP5523_REG_LED_PWM_BASE + i, 0x00); lp5523_selftest() 653 lp55xx_write(chip, LP5523_REG_LED_CURRENT_BASE + i, lp5523_selftest() 664 mutex_unlock(&chip->lock); lp5523_selftest() 673 struct lp55xx_chip *chip = led->chip; lp5523_led_brightness_work() local 675 mutex_lock(&chip->lock); lp5523_led_brightness_work() 676 lp55xx_write(chip, LP5523_REG_LED_PWM_BASE + led->chan_nr, lp5523_led_brightness_work() 678 mutex_unlock(&chip->lock); lp5523_led_brightness_work() 733 struct lp55xx_chip *chip; lp5523_probe() local 750 chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL); lp5523_probe() 751 if (!chip) lp5523_probe() 759 chip->cl = client; lp5523_probe() 760 chip->pdata = pdata; lp5523_probe() 761 chip->cfg = &lp5523_cfg; lp5523_probe() 763 mutex_init(&chip->lock); lp5523_probe() 767 ret = lp55xx_init_device(chip); lp5523_probe() 771 dev_info(&client->dev, "%s Programmable led chip found\n", id->name); lp5523_probe() 773 ret = lp55xx_register_leds(led, chip); lp5523_probe() 777 ret = lp55xx_register_sysfs(chip); lp5523_probe() 786 lp55xx_unregister_leds(led, chip); lp5523_probe() 788 lp55xx_deinit_device(chip); lp5523_probe() 796 struct lp55xx_chip *chip = led->chip; lp5523_remove() local 798 lp5523_stop_all_engines(chip); lp5523_remove() 799 lp55xx_unregister_sysfs(chip); lp5523_remove() 800 lp55xx_unregister_leds(led, chip); lp5523_remove() 801 lp55xx_deinit_device(chip); lp5523_remove()
/linux-4.1.27/sound/pcmcia/vx/
H A D	vxp_ops.c	53 struct snd_vxpocket *chip = (struct snd_vxpocket *)_chip; vxp_reg_addr() local 54 return chip->port + vxp_reg_offset[reg]; vxp_reg_addr() 61 static unsigned char vxp_inb(struct vx_core *chip, int offset) vxp_inb() argument 63 return inb(vxp_reg_addr(chip, offset)); vxp_inb() 71 static void vxp_outb(struct vx_core *chip, int offset, unsigned char val) vxp_outb() argument 73 outb(val, vxp_reg_addr(chip, offset)); vxp_outb() 80 #define vx_inb(chip,reg) vxp_inb((struct vx_core *)(chip), VX_##reg) 82 #define vx_outb(chip,reg,val) vxp_outb((struct vx_core *)(chip), VX_##reg,val) 90 static int vx_check_magic(struct vx_core *chip) vx_check_magic() argument 95 c = vx_inb(chip, CDSP); vx_check_magic() 113 struct snd_vxpocket *chip = (struct snd_vxpocket *)_chip; vxp_reset_dsp() local 116 vx_outb(chip, CDSP, chip->regCDSP | VXP_CDSP_DSP_RESET_MASK); vxp_reset_dsp() 117 vx_inb(chip, CDSP); vxp_reset_dsp() 120 chip->regCDSP &= ~VXP_CDSP_DSP_RESET_MASK; vxp_reset_dsp() 121 vx_outb(chip, CDSP, chip->regCDSP); vxp_reset_dsp() 122 vx_inb(chip, CDSP); vxp_reset_dsp() 131 struct snd_vxpocket *chip = (struct snd_vxpocket *)_chip; vxp_reset_codec() local 134 vx_outb(chip, CDSP, chip->regCDSP | VXP_CDSP_CODEC_RESET_MASK); vxp_reset_codec() 135 vx_inb(chip, CDSP); vxp_reset_codec() 138 chip->regCDSP &= ~VXP_CDSP_CODEC_RESET_MASK; vxp_reset_codec() 139 vx_outb(chip, CDSP, chip->regCDSP); vxp_reset_codec() 140 vx_inb(chip, CDSP); vxp_reset_codec() 150 struct snd_vxpocket *chip = (struct snd_vxpocket *)_chip; vxp_load_xilinx_binary() local 158 chip->regDIALOG |= VXP_DLG_XILINX_REPROG_MASK; vxp_load_xilinx_binary() 159 vx_outb(chip, DIALOG, chip->regDIALOG); vxp_load_xilinx_binary() 162 regCSUER = vx_inb(chip, CSUER); vxp_load_xilinx_binary() 163 regRUER = vx_inb(chip, RUER); vxp_load_xilinx_binary() 166 vx_outb(chip, ICR, 0); vxp_load_xilinx_binary() 174 vx_outb(chip, ICR, ICR_HF1); vxp_load_xilinx_binary() 180 vx_outb(chip, TXL, data); vxp_load_xilinx_binary() 184 c = vx_inb(chip, RXL); vxp_load_xilinx_binary() 190 vx_outb(chip, ICR, 0); vxp_load_xilinx_binary() 200 c = (int)vx_inb(chip, RXH) << 16; vxp_load_xilinx_binary() 201 c |= (int)vx_inb(chip, RXM) << 8; vxp_load_xilinx_binary() 202 c |= vx_inb(chip, RXL); vxp_load_xilinx_binary() 206 vx_outb(chip, ICR, ICR_HF0); vxp_load_xilinx_binary() 216 vx_outb(chip, CSUER, regCSUER); vxp_load_xilinx_binary() 217 vx_outb(chip, RUER, regRUER); vxp_load_xilinx_binary() 220 chip->regDIALOG |= VXP_DLG_XILINX_REPROG_MASK; vxp_load_xilinx_binary() 221 vx_outb(chip, DIALOG, chip->regDIALOG); vxp_load_xilinx_binary() 222 vx_inb(chip, DIALOG); vxp_load_xilinx_binary() 224 chip->regDIALOG &= ~VXP_DLG_XILINX_REPROG_MASK; vxp_load_xilinx_binary() 225 vx_outb(chip, DIALOG, chip->regDIALOG); vxp_load_xilinx_binary() 226 vx_inb(chip, DIALOG); vxp_load_xilinx_binary() 235 vx_outb(chip, CSUER, regCSUER); vxp_load_xilinx_binary() 236 vx_outb(chip, RUER, regRUER); vxp_load_xilinx_binary() 237 chip->regDIALOG &= ~VXP_DLG_XILINX_REPROG_MASK; vxp_load_xilinx_binary() 238 vx_outb(chip, DIALOG, chip->regDIALOG); vxp_load_xilinx_binary() 283 struct snd_vxpocket *chip = (struct snd_vxpocket *)_chip; vxp_test_and_ack() local 289 if (! (vx_inb(chip, DIALOG) & VXP_DLG_MEMIRQ_MASK)) vxp_test_and_ack() 294 vx_outb(chip, DIALOG, chip->regDIALOG | VXP_DLG_ACK_MEMIRQ_MASK); vxp_test_and_ack() 298 vx_inb(chip, DIALOG); vxp_test_and_ack() 299 vx_outb(chip, DIALOG, chip->regDIALOG & ~VXP_DLG_ACK_MEMIRQ_MASK); vxp_test_and_ack() 310 struct snd_vxpocket *chip = (struct snd_vxpocket *)_chip; vxp_validate_irq() local 314 chip->regCDSP |= VXP_CDSP_VALID_IRQ_MASK; vxp_validate_irq() 316 chip->regCDSP &= ~VXP_CDSP_VALID_IRQ_MASK; vxp_validate_irq() 317 vx_outb(chip, CDSP, chip->regCDSP); vxp_validate_irq() 326 struct snd_vxpocket *chip = (struct snd_vxpocket *)_chip; vx_setup_pseudo_dma() local 329 vx_outb(chip, ICR, do_write ? ICR_TREQ : ICR_RREQ); vx_setup_pseudo_dma() 331 vx_inb(chip, ISR); vx_setup_pseudo_dma() 332 vx_outb(chip, ISR, 0); vx_setup_pseudo_dma() 335 chip->regDIALOG |= VXP_DLG_DMA16_SEL_MASK; vx_setup_pseudo_dma() 336 chip->regDIALOG |= do_write ? VXP_DLG_DMAWRITE_SEL_MASK : VXP_DLG_DMAREAD_SEL_MASK; vx_setup_pseudo_dma() 337 vx_outb(chip, DIALOG, chip->regDIALOG); vx_setup_pseudo_dma() 346 struct snd_vxpocket *chip = (struct snd_vxpocket *)_chip; vx_release_pseudo_dma() local 349 chip->regDIALOG &= ~(VXP_DLG_DMAWRITE_SEL_MASK| vx_release_pseudo_dma() 352 vx_outb(chip, DIALOG, chip->regDIALOG); vx_release_pseudo_dma() 354 vx_outb(chip, ICR, 0); vx_release_pseudo_dma() 364 static void vxp_dma_write(struct vx_core *chip, struct snd_pcm_runtime *runtime, vxp_dma_write() argument 367 long port = vxp_reg_addr(chip, VX_DMA); vxp_dma_write() 371 vx_setup_pseudo_dma(chip, 1); vxp_dma_write() 391 vx_release_pseudo_dma(chip); vxp_dma_write() 403 static void vxp_dma_read(struct vx_core *chip, struct snd_pcm_runtime *runtime, vxp_dma_read() argument 406 struct snd_vxpocket *pchip = (struct snd_vxpocket *)chip; vxp_dma_read() 407 long port = vxp_reg_addr(chip, VX_DMA); vxp_dma_read() 413 vx_setup_pseudo_dma(chip, 0); vxp_dma_read() 431 vx_outb(chip, DIALOG, pchip->regDIALOG); vxp_dma_read() 436 vx_outb(chip, DIALOG, pchip->regDIALOG); vxp_dma_read() 438 vx_outb(chip, ICR, 0); vxp_dma_read() 445 static void vxp_write_codec_reg(struct vx_core *chip, int codec, unsigned int data) vxp_write_codec_reg() argument 451 vx_inb(chip, LOFREQ); vxp_write_codec_reg() 453 vx_inb(chip, CODEC2); vxp_write_codec_reg() 457 vx_outb(chip, DATA, ((data & 0x800000) ? VX_DATA_CODEC_MASK : 0)); vxp_write_codec_reg() 460 vx_inb(chip, HIFREQ); vxp_write_codec_reg() 468 void vx_set_mic_boost(struct vx_core *chip, int boost) vx_set_mic_boost() argument 470 struct snd_vxpocket *pchip = (struct snd_vxpocket *)chip; vx_set_mic_boost() 472 if (chip->chip_status & VX_STAT_IS_STALE) vx_set_mic_boost() 475 mutex_lock(&chip->lock); vx_set_mic_boost() 486 vx_outb(chip, CDSP, pchip->regCDSP); vx_set_mic_boost() 488 mutex_unlock(&chip->lock); vx_set_mic_boost() 510 void vx_set_mic_level(struct vx_core *chip, int level) vx_set_mic_level() argument 512 struct snd_vxpocket *pchip = (struct snd_vxpocket *)chip; vx_set_mic_level() 514 if (chip->chip_status & VX_STAT_IS_STALE) vx_set_mic_level() 517 mutex_lock(&chip->lock); vx_set_mic_level() 520 vx_outb(chip, MICRO, level); vx_set_mic_level() 522 mutex_unlock(&chip->lock); vx_set_mic_level() 531 struct snd_vxpocket *chip = (struct snd_vxpocket *)_chip; vxp_change_audio_source() local 535 chip->regCDSP |= VXP_CDSP_DATAIN_SEL_MASK; vxp_change_audio_source() 536 vx_outb(chip, CDSP, chip->regCDSP); vxp_change_audio_source() 539 chip->regCDSP &= ~VXP_CDSP_DATAIN_SEL_MASK; vxp_change_audio_source() 541 chip->regCDSP &= ~P24_CDSP_MICS_SEL_MASK; vxp_change_audio_source() 543 chip->regCDSP &= ~VXP_CDSP_MIC_SEL_MASK; vxp_change_audio_source() 544 vx_outb(chip, CDSP, chip->regCDSP); vxp_change_audio_source() 547 chip->regCDSP &= ~VXP_CDSP_DATAIN_SEL_MASK; vxp_change_audio_source() 550 chip->regCDSP &= ~P24_CDSP_MICS_SEL_MASK; vxp_change_audio_source() 551 if (chip->mic_level) vxp_change_audio_source() 552 chip->regCDSP |= P24_CDSP_MIC38_SEL_MASK; vxp_change_audio_source() 554 chip->regCDSP |= P24_CDSP_MIC20_SEL_MASK; vxp_change_audio_source() 555 vx_outb(chip, CDSP, chip->regCDSP); vxp_change_audio_source() 557 chip->regCDSP |= VXP_CDSP_MIC_SEL_MASK; vxp_change_audio_source() 558 vx_outb(chip, CDSP, chip->regCDSP); vxp_change_audio_source() 559 vx_outb(chip, MICRO, vx_compute_mic_level(chip->mic_level)); vxp_change_audio_source() 571 struct snd_vxpocket *chip = (struct snd_vxpocket *)_chip; vxp_set_clock_source() local 574 chip->regCDSP &= ~VXP_CDSP_CLOCKIN_SEL_MASK; vxp_set_clock_source() 576 chip->regCDSP |= VXP_CDSP_CLOCKIN_SEL_MASK; vxp_set_clock_source() 577 vx_outb(chip, CDSP, chip->regCDSP); vxp_set_clock_source() 586 struct snd_vxpocket *chip = (struct snd_vxpocket *)_chip; vxp_reset_board() local 588 chip->regCDSP = 0; vxp_reset_board() 589 chip->regDIALOG = 0; vxp_reset_board()
/linux-4.1.27/sound/drivers/vx/
H A D	vx_core.c	52 int snd_vx_check_reg_bit(struct vx_core *chip, int reg, int mask, int bit, int time) snd_vx_check_reg_bit() argument 64 if ((snd_vx_inb(chip, reg) & mask) == bit) snd_vx_check_reg_bit() 68 snd_printd(KERN_DEBUG "vx_check_reg_bit: timeout, reg=%s, mask=0x%x, val=0x%x\n", reg_names[reg], mask, snd_vx_inb(chip, reg)); snd_vx_check_reg_bit() 82 static int vx_send_irq_dsp(struct vx_core *chip, int num) vx_send_irq_dsp() argument 87 if (snd_vx_check_reg_bit(chip, VX_CVR, CVR_HC, 0, 200) < 0) vx_send_irq_dsp() 91 if (vx_has_new_dsp(chip)) vx_send_irq_dsp() 93 vx_outb(chip, CVR, (nirq >> 1) | CVR_HC); vx_send_irq_dsp() 103 static int vx_reset_chk(struct vx_core *chip) vx_reset_chk() argument 106 if (vx_send_irq_dsp(chip, IRQ_RESET_CHK) < 0) vx_reset_chk() 109 if (vx_check_isr(chip, ISR_CHK, 0, 200) < 0) vx_reset_chk() 122 static int vx_transfer_end(struct vx_core *chip, int cmd) vx_transfer_end() argument 126 if ((err = vx_reset_chk(chip)) < 0) vx_transfer_end() 130 if ((err = vx_send_irq_dsp(chip, cmd)) < 0) vx_transfer_end() 134 if ((err = vx_wait_isr_bit(chip, ISR_CHK)) < 0) vx_transfer_end() 138 if ((err = vx_inb(chip, ISR)) & ISR_ERR) { vx_transfer_end() 139 if ((err = vx_wait_for_rx_full(chip)) < 0) { vx_transfer_end() 143 err = vx_inb(chip, RXH) << 16; vx_transfer_end() 144 err |= vx_inb(chip, RXM) << 8; vx_transfer_end() 145 err |= vx_inb(chip, RXL); vx_transfer_end() 160 static int vx_read_status(struct vx_core *chip, struct vx_rmh *rmh) vx_read_status() argument 171 err = vx_wait_for_rx_full(chip); vx_read_status() 176 val = vx_inb(chip, RXH) << 16; vx_read_status() 177 val |= vx_inb(chip, RXM) << 8; vx_read_status() 178 val |= vx_inb(chip, RXL); vx_read_status() 213 err = vx_send_irq_dsp(chip, IRQ_MESS_WRITE_NEXT); vx_read_status() 217 err = vx_wait_for_rx_full(chip); vx_read_status() 220 rmh->Stat[i] = vx_inb(chip, RXH) << 16; vx_read_status() 221 rmh->Stat[i] |= vx_inb(chip, RXM) << 8; vx_read_status() 222 rmh->Stat[i] |= vx_inb(chip, RXL); vx_read_status() 225 return vx_transfer_end(chip, IRQ_MESS_WRITE_END); vx_read_status() 241 int vx_send_msg_nolock(struct vx_core *chip, struct vx_rmh *rmh) vx_send_msg_nolock() argument 245 if (chip->chip_status & VX_STAT_IS_STALE) vx_send_msg_nolock() 248 if ((err = vx_reset_chk(chip)) < 0) { vx_send_msg_nolock() 270 if ((err = vx_wait_isr_bit(chip, ISR_TX_EMPTY)) < 0) { vx_send_msg_nolock() 276 vx_outb(chip, TXH, (rmh->Cmd[0] >> 16) & 0xff); vx_send_msg_nolock() 277 vx_outb(chip, TXM, (rmh->Cmd[0] >> 8) & 0xff); vx_send_msg_nolock() 278 vx_outb(chip, TXL, rmh->Cmd[0] & 0xff); vx_send_msg_nolock() 281 if ((err = vx_send_irq_dsp(chip, IRQ_MESSAGE)) < 0) { vx_send_msg_nolock() 287 if ((err = vx_wait_isr_bit(chip, ISR_CHK)) < 0) vx_send_msg_nolock() 291 if (vx_inb(chip, ISR) & ISR_ERR) { vx_send_msg_nolock() 292 if ((err = vx_wait_for_rx_full(chip)) < 0) { vx_send_msg_nolock() 296 err = vx_inb(chip, RXH) << 16; vx_send_msg_nolock() 297 err |= vx_inb(chip, RXM) << 8; vx_send_msg_nolock() 298 err |= vx_inb(chip, RXL); vx_send_msg_nolock() 308 if ((err = vx_wait_isr_bit(chip, ISR_TX_READY)) < 0) { vx_send_msg_nolock() 314 vx_outb(chip, TXH, (rmh->Cmd[i] >> 16) & 0xff); vx_send_msg_nolock() 315 vx_outb(chip, TXM, (rmh->Cmd[i] >> 8) & 0xff); vx_send_msg_nolock() 316 vx_outb(chip, TXL, rmh->Cmd[i] & 0xff); vx_send_msg_nolock() 319 if ((err = vx_send_irq_dsp(chip, IRQ_MESS_READ_NEXT)) < 0) { vx_send_msg_nolock() 325 if ((err = vx_wait_isr_bit(chip, ISR_TX_READY)) < 0) { vx_send_msg_nolock() 330 err = vx_transfer_end(chip, IRQ_MESS_READ_END); vx_send_msg_nolock() 335 return vx_read_status(chip, rmh); vx_send_msg_nolock() 346 int vx_send_msg(struct vx_core *chip, struct vx_rmh *rmh) vx_send_msg() argument 350 mutex_lock(&chip->lock); vx_send_msg() 351 err = vx_send_msg_nolock(chip, rmh); vx_send_msg() 352 mutex_unlock(&chip->lock); vx_send_msg() 368 int vx_send_rih_nolock(struct vx_core *chip, int cmd) vx_send_rih_nolock() argument 372 if (chip->chip_status & VX_STAT_IS_STALE) vx_send_rih_nolock() 378 if ((err = vx_reset_chk(chip)) < 0) vx_send_rih_nolock() 381 if ((err = vx_send_irq_dsp(chip, cmd)) < 0) vx_send_rih_nolock() 384 if ((err = vx_wait_isr_bit(chip, ISR_CHK)) < 0) vx_send_rih_nolock() 387 if (vx_inb(chip, ISR) & ISR_ERR) { vx_send_rih_nolock() 388 if ((err = vx_wait_for_rx_full(chip)) < 0) vx_send_rih_nolock() 390 err = vx_inb(chip, RXH) << 16; vx_send_rih_nolock() 391 err |= vx_inb(chip, RXM) << 8; vx_send_rih_nolock() 392 err |= vx_inb(chip, RXL); vx_send_rih_nolock() 405 int vx_send_rih(struct vx_core *chip, int cmd) vx_send_rih() argument 409 mutex_lock(&chip->lock); vx_send_rih() 410 err = vx_send_rih_nolock(chip, cmd); vx_send_rih() 411 mutex_unlock(&chip->lock); vx_send_rih() 419 * @chip: VX core instance 422 int snd_vx_load_boot_image(struct vx_core *chip, const struct firmware *boot) snd_vx_load_boot_image() argument 425 int no_fillup = vx_has_new_dsp(chip); snd_vx_load_boot_image() 442 vx_reset_dsp(chip); snd_vx_load_boot_image() 451 if (vx_wait_isr_bit(chip, ISR_TX_EMPTY) < 0) { snd_vx_load_boot_image() 455 vx_outb(chip, TXH, 0); snd_vx_load_boot_image() 456 vx_outb(chip, TXM, 0); snd_vx_load_boot_image() 457 vx_outb(chip, TXL, 0); snd_vx_load_boot_image() 460 if (vx_wait_isr_bit(chip, ISR_TX_EMPTY) < 0) { snd_vx_load_boot_image() 464 vx_outb(chip, TXH, image[0]); snd_vx_load_boot_image() 465 vx_outb(chip, TXM, image[1]); snd_vx_load_boot_image() 466 vx_outb(chip, TXL, image[2]); snd_vx_load_boot_image() 479 static int vx_test_irq_src(struct vx_core *chip, unsigned int *ret) vx_test_irq_src() argument 483 vx_init_rmh(&chip->irq_rmh, CMD_TEST_IT); vx_test_irq_src() 484 mutex_lock(&chip->lock); vx_test_irq_src() 485 err = vx_send_msg_nolock(chip, &chip->irq_rmh); vx_test_irq_src() 489 *ret = chip->irq_rmh.Stat[0]; vx_test_irq_src() 490 mutex_unlock(&chip->lock); vx_test_irq_src() 500 struct vx_core *chip = dev; snd_vx_threaded_irq_handler() local 503 if (chip->chip_status & VX_STAT_IS_STALE) snd_vx_threaded_irq_handler() 506 if (vx_test_irq_src(chip, &events) < 0) snd_vx_threaded_irq_handler() 532 vx_change_frequency(chip); snd_vx_threaded_irq_handler() 535 vx_pcm_update_intr(chip, events); snd_vx_threaded_irq_handler() 547 struct vx_core *chip = dev; snd_vx_irq_handler() local 549 if (! (chip->chip_status & VX_STAT_CHIP_INIT) || snd_vx_irq_handler() 550 (chip->chip_status & VX_STAT_IS_STALE)) snd_vx_irq_handler() 552 if (! vx_test_and_ack(chip)) snd_vx_irq_handler() 561 static void vx_reset_board(struct vx_core *chip, int cold_reset) vx_reset_board() argument 563 if (snd_BUG_ON(!chip->ops->reset_board)) vx_reset_board() 567 chip->audio_source = VX_AUDIO_SRC_LINE; vx_reset_board() 569 chip->audio_source_target = chip->audio_source; vx_reset_board() 570 chip->clock_source = INTERNAL_QUARTZ; vx_reset_board() 571 chip->clock_mode = VX_CLOCK_MODE_AUTO; vx_reset_board() 572 chip->freq = 48000; vx_reset_board() 573 chip->uer_detected = VX_UER_MODE_NOT_PRESENT; vx_reset_board() 574 chip->uer_bits = SNDRV_PCM_DEFAULT_CON_SPDIF; vx_reset_board() 577 chip->ops->reset_board(chip, cold_reset); vx_reset_board() 579 vx_reset_codec(chip, cold_reset); vx_reset_board() 581 vx_set_internal_clock(chip, chip->freq); vx_reset_board() 584 vx_reset_dsp(chip); vx_reset_board() 586 if (vx_is_pcmcia(chip)) { vx_reset_board() 588 vx_test_and_ack(chip); vx_reset_board() 589 vx_validate_irq(chip, 1); vx_reset_board() 593 vx_set_iec958_status(chip, chip->uer_bits); vx_reset_board() 603 struct vx_core *chip = entry->private_data; vx_proc_read() local 610 snd_iprintf(buffer, "%s\n", chip->card->longname); vx_proc_read() 612 chip->chip_status & VX_STAT_XILINX_LOADED ? "Loaded" : "No"); vx_proc_read() 614 chip->chip_status & VX_STAT_DEVICE_INIT ? "Yes" : "No"); vx_proc_read() 616 if (chip->audio_info & VX_AUDIO_INFO_REAL_TIME) vx_proc_read() 618 if (chip->audio_info & VX_AUDIO_INFO_OFFLINE) vx_proc_read() 620 if (chip->audio_info & VX_AUDIO_INFO_MPEG1) vx_proc_read() 622 if (chip->audio_info & VX_AUDIO_INFO_MPEG2) vx_proc_read() 624 if (chip->audio_info & VX_AUDIO_INFO_LINEAR_8) vx_proc_read() 626 if (chip->audio_info & VX_AUDIO_INFO_LINEAR_16) vx_proc_read() 628 if (chip->audio_info & VX_AUDIO_INFO_LINEAR_24) vx_proc_read() 631 snd_iprintf(buffer, "Input Source: %s\n", vx_is_pcmcia(chip) ? vx_proc_read() 632 audio_src_vxp[chip->audio_source] : vx_proc_read() 633 audio_src_vx2[chip->audio_source]); vx_proc_read() 634 snd_iprintf(buffer, "Clock Mode: %s\n", clock_mode[chip->clock_mode]); vx_proc_read() 635 snd_iprintf(buffer, "Clock Source: %s\n", clock_src[chip->clock_source]); vx_proc_read() 636 snd_iprintf(buffer, "Frequency: %d\n", chip->freq); vx_proc_read() 637 snd_iprintf(buffer, "Detected Frequency: %d\n", chip->freq_detected); vx_proc_read() 638 snd_iprintf(buffer, "Detected UER type: %s\n", uer_type[chip->uer_detected]); vx_proc_read() 640 chip->ibl.min_size, chip->ibl.max_size, chip->ibl.size, vx_proc_read() 641 chip->ibl.granularity); vx_proc_read() 644 static void vx_proc_init(struct vx_core *chip) vx_proc_init() argument 648 if (! snd_card_proc_new(chip->card, "vx-status", &entry)) vx_proc_init() 649 snd_info_set_text_ops(entry, chip, vx_proc_read); vx_proc_init() 655 * @chip: VX core instance 658 int snd_vx_dsp_boot(struct vx_core *chip, const struct firmware *boot) snd_vx_dsp_boot() argument 661 int cold_reset = !(chip->chip_status & VX_STAT_DEVICE_INIT); snd_vx_dsp_boot() 663 vx_reset_board(chip, cold_reset); snd_vx_dsp_boot() 664 vx_validate_irq(chip, 0); snd_vx_dsp_boot() 666 if ((err = snd_vx_load_boot_image(chip, boot)) < 0) snd_vx_dsp_boot() 677 * @chip: VX core instance 680 int snd_vx_dsp_load(struct vx_core *chip, const struct firmware *dsp) snd_vx_dsp_load() argument 690 vx_toggle_dac_mute(chip, 1); snd_vx_dsp_load() 696 if ((err = vx_wait_isr_bit(chip, ISR_TX_EMPTY)) < 0) { snd_vx_dsp_load() 704 vx_outb(chip, TXH, *cptr++); snd_vx_dsp_load() 707 vx_outb(chip, TXM, *cptr++); snd_vx_dsp_load() 710 vx_outb(chip, TXL, *cptr++); snd_vx_dsp_load() 716 if ((err = vx_wait_isr_bit(chip, ISR_CHK)) < 0) snd_vx_dsp_load() 719 vx_toggle_dac_mute(chip, 0); snd_vx_dsp_load() 721 vx_test_and_ack(chip); snd_vx_dsp_load() 722 vx_validate_irq(chip, 1); snd_vx_dsp_load() 733 int snd_vx_suspend(struct vx_core *chip) snd_vx_suspend() argument 737 snd_power_change_state(chip->card, SNDRV_CTL_POWER_D3hot); snd_vx_suspend() 738 chip->chip_status |= VX_STAT_IN_SUSPEND; snd_vx_suspend() 739 for (i = 0; i < chip->hw->num_codecs; i++) snd_vx_suspend() 740 snd_pcm_suspend_all(chip->pcm[i]); snd_vx_suspend() 750 int snd_vx_resume(struct vx_core *chip) snd_vx_resume() argument 754 chip->chip_status &= ~VX_STAT_CHIP_INIT; snd_vx_resume() 757 if (! chip->firmware[i]) snd_vx_resume() 759 err = chip->ops->load_dsp(chip, i, chip->firmware[i]); snd_vx_resume() 766 chip->chip_status |= VX_STAT_CHIP_INIT; snd_vx_resume() 767 chip->chip_status &= ~VX_STAT_IN_SUSPEND; snd_vx_resume() 769 snd_power_change_state(chip->card, SNDRV_CTL_POWER_D0); snd_vx_resume() 781 * @extra_size: extra byte size to allocate appending to chip 792 struct vx_core *chip; snd_vx_create() local 797 chip = kzalloc(sizeof(*chip) + extra_size, GFP_KERNEL); snd_vx_create() 798 if (! chip) { snd_vx_create() 802 mutex_init(&chip->lock); snd_vx_create() 803 chip->irq = -1; snd_vx_create() 804 chip->hw = hw; snd_vx_create() 805 chip->type = hw->type; snd_vx_create() 806 chip->ops = ops; snd_vx_create() 807 mutex_init(&chip->mixer_mutex); snd_vx_create() 809 chip->card = card; snd_vx_create() 810 card->private_data = chip; snd_vx_create() 814 vx_proc_init(chip); snd_vx_create() 816 return chip; snd_vx_create()
H A D	vx_uer.c	33 static int vx_modify_board_clock(struct vx_core *chip, int sync) vx_modify_board_clock() argument 41 return vx_send_msg(chip, &rmh); vx_modify_board_clock() 47 static int vx_modify_board_inputs(struct vx_core *chip) vx_modify_board_inputs() argument 53 return vx_send_msg(chip, &rmh); vx_modify_board_inputs() 61 static int vx_read_one_cbit(struct vx_core *chip, int index) vx_read_one_cbit() argument 65 mutex_lock(&chip->lock); vx_read_one_cbit() 66 if (chip->type >= VX_TYPE_VXPOCKET) { vx_read_one_cbit() 67 vx_outb(chip, CSUER, 1); /* read */ vx_read_one_cbit() 68 vx_outb(chip, RUER, index & XX_UER_CBITS_OFFSET_MASK); vx_read_one_cbit() 69 val = (vx_inb(chip, RUER) >> 7) & 0x01; vx_read_one_cbit() 71 vx_outl(chip, CSUER, 1); /* read */ vx_read_one_cbit() 72 vx_outl(chip, RUER, index & XX_UER_CBITS_OFFSET_MASK); vx_read_one_cbit() 73 val = (vx_inl(chip, RUER) >> 7) & 0x01; vx_read_one_cbit() 75 mutex_unlock(&chip->lock); vx_read_one_cbit() 84 static void vx_write_one_cbit(struct vx_core *chip, int index, int val) vx_write_one_cbit() argument 87 mutex_lock(&chip->lock); vx_write_one_cbit() 88 if (vx_is_pcmcia(chip)) { vx_write_one_cbit() 89 vx_outb(chip, CSUER, 0); /* write */ vx_write_one_cbit() 90 vx_outb(chip, RUER, (val << 7) | (index & XX_UER_CBITS_OFFSET_MASK)); vx_write_one_cbit() 92 vx_outl(chip, CSUER, 0); /* write */ vx_write_one_cbit() 93 vx_outl(chip, RUER, (val << 7) | (index & XX_UER_CBITS_OFFSET_MASK)); vx_write_one_cbit() 95 mutex_unlock(&chip->lock); vx_write_one_cbit() 105 static int vx_read_uer_status(struct vx_core *chip, unsigned int *mode) vx_read_uer_status() argument 113 if (vx_is_pcmcia(chip)) vx_read_uer_status() 114 val = vx_inb(chip, CSUER); vx_read_uer_status() 116 val = vx_inl(chip, CSUER); vx_read_uer_status() 135 *mode = vx_read_one_cbit(chip, 0) ? vx_read_uer_status() 161 static int vx_calc_clock_from_freq(struct vx_core *chip, int freq) vx_calc_clock_from_freq() argument 190 static void vx_change_clock_source(struct vx_core *chip, int source) vx_change_clock_source() argument 193 vx_toggle_dac_mute(chip, 1); vx_change_clock_source() 194 mutex_lock(&chip->lock); vx_change_clock_source() 195 chip->ops->set_clock_source(chip, source); vx_change_clock_source() 196 chip->clock_source = source; vx_change_clock_source() 197 mutex_unlock(&chip->lock); vx_change_clock_source() 199 vx_toggle_dac_mute(chip, 0); vx_change_clock_source() 206 void vx_set_internal_clock(struct vx_core *chip, unsigned int freq) vx_set_internal_clock() argument 211 clock = vx_calc_clock_from_freq(chip, freq); vx_set_internal_clock() 213 mutex_lock(&chip->lock); vx_set_internal_clock() 214 if (vx_is_pcmcia(chip)) { vx_set_internal_clock() 215 vx_outb(chip, HIFREQ, (clock >> 8) & 0x0f); vx_set_internal_clock() 216 vx_outb(chip, LOFREQ, clock & 0xff); vx_set_internal_clock() 218 vx_outl(chip, HIFREQ, (clock >> 8) & 0x0f); vx_set_internal_clock() 219 vx_outl(chip, LOFREQ, clock & 0xff); vx_set_internal_clock() 221 mutex_unlock(&chip->lock); vx_set_internal_clock() 229 void vx_set_iec958_status(struct vx_core *chip, unsigned int bits) vx_set_iec958_status() argument 233 if (chip->chip_status & VX_STAT_IS_STALE) vx_set_iec958_status() 237 vx_write_one_cbit(chip, i, bits & (1 << i)); vx_set_iec958_status() 244 int vx_set_clock(struct vx_core *chip, unsigned int freq) vx_set_clock() argument 248 if (chip->chip_status & VX_STAT_IS_STALE) vx_set_clock() 252 vx_sync_audio_source(chip); vx_set_clock() 254 if (chip->clock_mode == VX_CLOCK_MODE_EXTERNAL || vx_set_clock() 255 (chip->clock_mode == VX_CLOCK_MODE_AUTO && vx_set_clock() 256 chip->audio_source == VX_AUDIO_SRC_DIGITAL)) { vx_set_clock() 257 if (chip->clock_source != UER_SYNC) { vx_set_clock() 258 vx_change_clock_source(chip, UER_SYNC); vx_set_clock() 262 } else if (chip->clock_mode == VX_CLOCK_MODE_INTERNAL || vx_set_clock() 263 (chip->clock_mode == VX_CLOCK_MODE_AUTO && vx_set_clock() 264 chip->audio_source != VX_AUDIO_SRC_DIGITAL)) { vx_set_clock() 265 if (chip->clock_source != INTERNAL_QUARTZ) { vx_set_clock() 266 vx_change_clock_source(chip, INTERNAL_QUARTZ); vx_set_clock() 269 if (chip->freq == freq) vx_set_clock() 271 vx_set_internal_clock(chip, freq); vx_set_clock() 273 vx_modify_board_inputs(chip); vx_set_clock() 275 if (chip->freq == freq) vx_set_clock() 277 chip->freq = freq; vx_set_clock() 278 vx_modify_board_clock(chip, 1); vx_set_clock() 286 int vx_change_frequency(struct vx_core *chip) vx_change_frequency() argument 290 if (chip->chip_status & VX_STAT_IS_STALE) vx_change_frequency() 293 if (chip->clock_source == INTERNAL_QUARTZ) vx_change_frequency() 298 freq = vx_read_uer_status(chip, &chip->uer_detected); vx_change_frequency() 306 chip->freq_detected = freq; vx_change_frequency()
H A D	vx_mixer.c	33 static void vx_write_codec_reg(struct vx_core *chip, int codec, unsigned int data) vx_write_codec_reg() argument 35 if (snd_BUG_ON(!chip->ops->write_codec)) vx_write_codec_reg() 38 if (chip->chip_status & VX_STAT_IS_STALE) vx_write_codec_reg() 41 mutex_lock(&chip->lock); vx_write_codec_reg() 42 chip->ops->write_codec(chip, codec, data); vx_write_codec_reg() 43 mutex_unlock(&chip->lock); vx_write_codec_reg() 87 static void vx_set_codec_reg(struct vx_core *chip, int codec, int reg, int val) vx_set_codec_reg() argument 94 vx_write_codec_reg(chip, codec, data.l); vx_set_codec_reg() 104 static void vx_set_analog_output_level(struct vx_core *chip, int codec, int left, int right) vx_set_analog_output_level() argument 106 left = chip->hw->output_level_max - left; vx_set_analog_output_level() 107 right = chip->hw->output_level_max - right; vx_set_analog_output_level() 109 if (chip->ops->akm_write) { vx_set_analog_output_level() 110 chip->ops->akm_write(chip, XX_CODEC_LEVEL_LEFT_REGISTER, left); vx_set_analog_output_level() 111 chip->ops->akm_write(chip, XX_CODEC_LEVEL_RIGHT_REGISTER, right); vx_set_analog_output_level() 114 vx_set_codec_reg(chip, codec, XX_CODEC_LEVEL_LEFT_REGISTER, left); vx_set_analog_output_level() 115 vx_set_codec_reg(chip, codec, XX_CODEC_LEVEL_RIGHT_REGISTER, right); vx_set_analog_output_level() 128 void vx_toggle_dac_mute(struct vx_core *chip, int mute) vx_toggle_dac_mute() argument 131 for (i = 0; i < chip->hw->num_codecs; i++) { vx_toggle_dac_mute() 132 if (chip->ops->akm_write) vx_toggle_dac_mute() 133 chip->ops->akm_write(chip, XX_CODEC_DAC_CONTROL_REGISTER, mute); /* XXX */ vx_toggle_dac_mute() 135 vx_set_codec_reg(chip, i, XX_CODEC_DAC_CONTROL_REGISTER, vx_toggle_dac_mute() 143 void vx_reset_codec(struct vx_core *chip, int cold_reset) vx_reset_codec() argument 146 int port = chip->type >= VX_TYPE_VXPOCKET ? 0x75 : 0x65; vx_reset_codec() 148 chip->ops->reset_codec(chip); vx_reset_codec() 151 if (! chip->ops->akm_write) { vx_reset_codec() 153 for (i = 0; i < chip->hw->num_codecs; i++) { vx_reset_codec() 155 vx_set_codec_reg(chip, i, XX_CODEC_DAC_CONTROL_REGISTER, DAC_ATTEN_MAX); vx_reset_codec() 157 vx_set_codec_reg(chip, i, XX_CODEC_ADC_CONTROL_REGISTER, 0x00); vx_reset_codec() 159 vx_set_codec_reg(chip, i, XX_CODEC_PORT_MODE_REGISTER, port); vx_reset_codec() 161 vx_set_codec_reg(chip, i, XX_CODEC_CLOCK_CONTROL_REGISTER, 0x00); vx_reset_codec() 166 for (i = 0; i < chip->hw->num_codecs; i++) { vx_reset_codec() 167 chip->output_level[i][0] = 0; vx_reset_codec() 168 chip->output_level[i][1] = 0; vx_reset_codec() 169 vx_set_analog_output_level(chip, i, 0, 0); vx_reset_codec() 177 static void vx_change_audio_source(struct vx_core *chip, int src) vx_change_audio_source() argument 179 if (chip->chip_status & VX_STAT_IS_STALE) vx_change_audio_source() 182 mutex_lock(&chip->lock); vx_change_audio_source() 183 chip->ops->change_audio_source(chip, src); vx_change_audio_source() 184 mutex_unlock(&chip->lock); vx_change_audio_source() 192 int vx_sync_audio_source(struct vx_core *chip) vx_sync_audio_source() argument 194 if (chip->audio_source_target == chip->audio_source || vx_sync_audio_source() 195 chip->pcm_running) vx_sync_audio_source() 197 vx_change_audio_source(chip, chip->audio_source_target); vx_sync_audio_source() 198 chip->audio_source = chip->audio_source_target; vx_sync_audio_source() 217 static int vx_adjust_audio_level(struct vx_core *chip, int audio, int capture, vx_adjust_audio_level() argument 222 if (chip->chip_status & VX_STAT_IS_STALE) vx_adjust_audio_level() 251 return vx_send_msg(chip, &rmh); vx_adjust_audio_level() 256 static int vx_read_audio_level(struct vx_core *chip, int audio, int capture, 268 err = vx_send_msg(chip, &rmh); 283 int vx_set_monitor_level(struct vx_core *chip, int audio, int level, int active) vx_set_monitor_level() argument 292 chip->audio_monitor[audio] = level; vx_set_monitor_level() 293 chip->audio_monitor_active[audio] = active; vx_set_monitor_level() 294 return vx_adjust_audio_level(chip, audio, 0, &info); /* playback only */ vx_set_monitor_level() 301 static int vx_set_audio_switch(struct vx_core *chip, int audio, int active) vx_set_audio_switch() argument 308 chip->audio_active[audio] = active; vx_set_audio_switch() 309 return vx_adjust_audio_level(chip, audio, 0, &info); /* playback only */ vx_set_audio_switch() 315 static int vx_set_audio_gain(struct vx_core *chip, int audio, int capture, int level) vx_set_audio_gain() argument 322 chip->audio_gain[capture][audio] = level; vx_set_audio_gain() 323 return vx_adjust_audio_level(chip, audio, capture, &info); vx_set_audio_gain() 329 static void vx_reset_audio_levels(struct vx_core *chip) vx_reset_audio_levels() argument 334 memset(chip->audio_gain, 0, sizeof(chip->audio_gain)); vx_reset_audio_levels() 335 memset(chip->audio_active, 0, sizeof(chip->audio_active)); vx_reset_audio_levels() 336 memset(chip->audio_monitor, 0, sizeof(chip->audio_monitor)); vx_reset_audio_levels() 337 memset(chip->audio_monitor_active, 0, sizeof(chip->audio_monitor_active)); vx_reset_audio_levels() 340 for (i = 0; i < chip->hw->num_ins * 2; i++) { vx_reset_audio_levels() 349 vx_adjust_audio_level(chip, i, c, &info); vx_reset_audio_levels() 350 chip->audio_gain[c][i] = CVAL_0DB; vx_reset_audio_levels() 351 chip->audio_monitor[i] = CVAL_0DB; vx_reset_audio_levels() 375 static int vx_get_audio_vu_meter(struct vx_core *chip, int audio, int capture, struct vx_vu_meter *info) vx_get_audio_vu_meter() argument 380 if (chip->chip_status & VX_STAT_IS_STALE) vx_get_audio_vu_meter() 392 err = vx_send_msg(chip, &rmh); vx_get_audio_vu_meter() 415 struct vx_core *chip = snd_kcontrol_chip(kcontrol); vx_output_level_info() local 419 uinfo->value.integer.max = chip->hw->output_level_max; vx_output_level_info() 425 struct vx_core *chip = snd_kcontrol_chip(kcontrol); vx_output_level_get() local 427 mutex_lock(&chip->mixer_mutex); vx_output_level_get() 428 ucontrol->value.integer.value[0] = chip->output_level[codec][0]; vx_output_level_get() 429 ucontrol->value.integer.value[1] = chip->output_level[codec][1]; vx_output_level_get() 430 mutex_unlock(&chip->mixer_mutex); vx_output_level_get() 436 struct vx_core *chip = snd_kcontrol_chip(kcontrol); vx_output_level_put() local 440 vmax = chip->hw->output_level_max; vx_output_level_put() 445 mutex_lock(&chip->mixer_mutex); vx_output_level_put() 446 if (val[0] != chip->output_level[codec][0] || vx_output_level_put() 447 val[1] != chip->output_level[codec][1]) { vx_output_level_put() 448 vx_set_analog_output_level(chip, codec, val[0], val[1]); vx_output_level_put() 449 chip->output_level[codec][0] = val[0]; vx_output_level_put() 450 chip->output_level[codec][1] = val[1]; vx_output_level_put() 451 mutex_unlock(&chip->mixer_mutex); vx_output_level_put() 454 mutex_unlock(&chip->mixer_mutex); vx_output_level_put() 480 struct vx_core *chip = snd_kcontrol_chip(kcontrol); vx_audio_src_info() local 482 if (chip->type >= VX_TYPE_VXPOCKET) vx_audio_src_info() 490 struct vx_core *chip = snd_kcontrol_chip(kcontrol); vx_audio_src_get() local 491 ucontrol->value.enumerated.item[0] = chip->audio_source_target; vx_audio_src_get() 497 struct vx_core *chip = snd_kcontrol_chip(kcontrol); vx_audio_src_put() local 499 if (chip->type >= VX_TYPE_VXPOCKET) { vx_audio_src_put() 506 mutex_lock(&chip->mixer_mutex); vx_audio_src_put() 507 if (chip->audio_source_target != ucontrol->value.enumerated.item[0]) { vx_audio_src_put() 508 chip->audio_source_target = ucontrol->value.enumerated.item[0]; vx_audio_src_put() 509 vx_sync_audio_source(chip); vx_audio_src_put() 510 mutex_unlock(&chip->mixer_mutex); vx_audio_src_put() 513 mutex_unlock(&chip->mixer_mutex); vx_audio_src_put() 539 struct vx_core *chip = snd_kcontrol_chip(kcontrol); vx_clock_mode_get() local 540 ucontrol->value.enumerated.item[0] = chip->clock_mode; vx_clock_mode_get() 546 struct vx_core *chip = snd_kcontrol_chip(kcontrol); vx_clock_mode_put() local 550 mutex_lock(&chip->mixer_mutex); vx_clock_mode_put() 551 if (chip->clock_mode != ucontrol->value.enumerated.item[0]) { vx_clock_mode_put() 552 chip->clock_mode = ucontrol->value.enumerated.item[0]; vx_clock_mode_put() 553 vx_set_clock(chip, chip->freq); vx_clock_mode_put() 554 mutex_unlock(&chip->mixer_mutex); vx_clock_mode_put() 557 mutex_unlock(&chip->mixer_mutex); vx_clock_mode_put() 583 struct vx_core *chip = snd_kcontrol_chip(kcontrol); vx_audio_gain_get() local 587 mutex_lock(&chip->mixer_mutex); vx_audio_gain_get() 588 ucontrol->value.integer.value[0] = chip->audio_gain[capture][audio]; vx_audio_gain_get() 589 ucontrol->value.integer.value[1] = chip->audio_gain[capture][audio+1]; vx_audio_gain_get() 590 mutex_unlock(&chip->mixer_mutex); vx_audio_gain_get() 596 struct vx_core *chip = snd_kcontrol_chip(kcontrol); vx_audio_gain_put() local 605 mutex_lock(&chip->mixer_mutex); vx_audio_gain_put() 606 if (val[0] != chip->audio_gain[capture][audio] || vx_audio_gain_put() 607 val[1] != chip->audio_gain[capture][audio+1]) { vx_audio_gain_put() 608 vx_set_audio_gain(chip, audio, capture, val[0]); vx_audio_gain_put() 609 vx_set_audio_gain(chip, audio+1, capture, val[1]); vx_audio_gain_put() 610 mutex_unlock(&chip->mixer_mutex); vx_audio_gain_put() 613 mutex_unlock(&chip->mixer_mutex); vx_audio_gain_put() 619 struct vx_core *chip = snd_kcontrol_chip(kcontrol); vx_audio_monitor_get() local 622 mutex_lock(&chip->mixer_mutex); vx_audio_monitor_get() 623 ucontrol->value.integer.value[0] = chip->audio_monitor[audio]; vx_audio_monitor_get() 624 ucontrol->value.integer.value[1] = chip->audio_monitor[audio+1]; vx_audio_monitor_get() 625 mutex_unlock(&chip->mixer_mutex); vx_audio_monitor_get() 631 struct vx_core *chip = snd_kcontrol_chip(kcontrol); vx_audio_monitor_put() local 640 mutex_lock(&chip->mixer_mutex); vx_audio_monitor_put() 641 if (val[0] != chip->audio_monitor[audio] || vx_audio_monitor_put() 642 val[1] != chip->audio_monitor[audio+1]) { vx_audio_monitor_put() 643 vx_set_monitor_level(chip, audio, val[0], vx_audio_monitor_put() 644 chip->audio_monitor_active[audio]); vx_audio_monitor_put() 645 vx_set_monitor_level(chip, audio+1, val[1], vx_audio_monitor_put() 646 chip->audio_monitor_active[audio+1]); vx_audio_monitor_put() 647 mutex_unlock(&chip->mixer_mutex); vx_audio_monitor_put() 650 mutex_unlock(&chip->mixer_mutex); vx_audio_monitor_put() 658 struct vx_core *chip = snd_kcontrol_chip(kcontrol); vx_audio_sw_get() local 661 mutex_lock(&chip->mixer_mutex); vx_audio_sw_get() 662 ucontrol->value.integer.value[0] = chip->audio_active[audio]; vx_audio_sw_get() 663 ucontrol->value.integer.value[1] = chip->audio_active[audio+1]; vx_audio_sw_get() 664 mutex_unlock(&chip->mixer_mutex); vx_audio_sw_get() 670 struct vx_core *chip = snd_kcontrol_chip(kcontrol); vx_audio_sw_put() local 673 mutex_lock(&chip->mixer_mutex); vx_audio_sw_put() 674 if (ucontrol->value.integer.value[0] != chip->audio_active[audio] || vx_audio_sw_put() 675 ucontrol->value.integer.value[1] != chip->audio_active[audio+1]) { vx_audio_sw_put() 676 vx_set_audio_switch(chip, audio, vx_audio_sw_put() 678 vx_set_audio_switch(chip, audio+1, vx_audio_sw_put() 680 mutex_unlock(&chip->mixer_mutex); vx_audio_sw_put() 683 mutex_unlock(&chip->mixer_mutex); vx_audio_sw_put() 689 struct vx_core *chip = snd_kcontrol_chip(kcontrol); vx_monitor_sw_get() local 692 mutex_lock(&chip->mixer_mutex); vx_monitor_sw_get() 693 ucontrol->value.integer.value[0] = chip->audio_monitor_active[audio]; vx_monitor_sw_get() 694 ucontrol->value.integer.value[1] = chip->audio_monitor_active[audio+1]; vx_monitor_sw_get() 695 mutex_unlock(&chip->mixer_mutex); vx_monitor_sw_get() 701 struct vx_core *chip = snd_kcontrol_chip(kcontrol); vx_monitor_sw_put() local 704 mutex_lock(&chip->mixer_mutex); vx_monitor_sw_put() 705 if (ucontrol->value.integer.value[0] != chip->audio_monitor_active[audio] || vx_monitor_sw_put() 706 ucontrol->value.integer.value[1] != chip->audio_monitor_active[audio+1]) { vx_monitor_sw_put() 707 vx_set_monitor_level(chip, audio, chip->audio_monitor[audio], vx_monitor_sw_put() 709 vx_set_monitor_level(chip, audio+1, chip->audio_monitor[audio+1], vx_monitor_sw_put() 711 mutex_unlock(&chip->mixer_mutex); vx_monitor_sw_put() 714 mutex_unlock(&chip->mixer_mutex); vx_monitor_sw_put() 768 struct vx_core *chip = snd_kcontrol_chip(kcontrol); vx_iec958_get() local 770 mutex_lock(&chip->mixer_mutex); vx_iec958_get() 771 ucontrol->value.iec958.status[0] = (chip->uer_bits >> 0) & 0xff; vx_iec958_get() 772 ucontrol->value.iec958.status[1] = (chip->uer_bits >> 8) & 0xff; vx_iec958_get() 773 ucontrol->value.iec958.status[2] = (chip->uer_bits >> 16) & 0xff; vx_iec958_get() 774 ucontrol->value.iec958.status[3] = (chip->uer_bits >> 24) & 0xff; vx_iec958_get() 775 mutex_unlock(&chip->mixer_mutex); vx_iec958_get() 790 struct vx_core *chip = snd_kcontrol_chip(kcontrol); vx_iec958_put() local 797 mutex_lock(&chip->mixer_mutex); vx_iec958_put() 798 if (chip->uer_bits != val) { vx_iec958_put() 799 chip->uer_bits = val; vx_iec958_put() 800 vx_set_iec958_status(chip, val); vx_iec958_put() 801 mutex_unlock(&chip->mixer_mutex); vx_iec958_put() 804 mutex_unlock(&chip->mixer_mutex); vx_iec958_put() 843 struct vx_core *chip = snd_kcontrol_chip(kcontrol); vx_vu_meter_get() local 848 vx_get_audio_vu_meter(chip, audio, capture, meter); vx_vu_meter_get() 856 struct vx_core *chip = snd_kcontrol_chip(kcontrol); vx_peak_meter_get() local 861 vx_get_audio_vu_meter(chip, audio, capture, meter); vx_peak_meter_get() 871 struct vx_core *chip = snd_kcontrol_chip(kcontrol); vx_saturation_get() local 875 vx_get_audio_vu_meter(chip, audio, 1, meter); /* capture only */ vx_saturation_get() 911 int snd_vx_mixer_new(struct vx_core *chip) snd_vx_mixer_new() argument 916 struct snd_card *card = chip->card; snd_vx_mixer_new() 922 for (i = 0; i < chip->hw->num_outs; i++) { snd_vx_mixer_new() 925 temp.tlv.p = chip->hw->output_level_db_scale; snd_vx_mixer_new() 926 if ((err = snd_ctl_add(card, snd_ctl_new1(&temp, chip))) < 0) snd_vx_mixer_new() 931 for (i = 0; i < chip->hw->num_outs; i++) { snd_vx_mixer_new() 937 if ((err = snd_ctl_add(card, snd_ctl_new1(&temp, chip))) < 0) snd_vx_mixer_new() 942 if ((err = snd_ctl_add(card, snd_ctl_new1(&temp, chip))) < 0) snd_vx_mixer_new() 947 if ((err = snd_ctl_add(card, snd_ctl_new1(&temp, chip))) < 0) snd_vx_mixer_new() 952 if ((err = snd_ctl_add(card, snd_ctl_new1(&temp, chip))) < 0) snd_vx_mixer_new() 955 for (i = 0; i < chip->hw->num_outs; i++) { snd_vx_mixer_new() 960 if ((err = snd_ctl_add(card, snd_ctl_new1(&temp, chip))) < 0) snd_vx_mixer_new() 965 if ((err = snd_ctl_add(card, snd_ctl_new1(&vx_control_audio_src, chip))) < 0) snd_vx_mixer_new() 968 if ((err = snd_ctl_add(card, snd_ctl_new1(&vx_control_clock_mode, chip))) < 0) snd_vx_mixer_new() 971 if ((err = snd_ctl_add(card, snd_ctl_new1(&vx_control_iec958_mask, chip))) < 0) snd_vx_mixer_new() 973 if ((err = snd_ctl_add(card, snd_ctl_new1(&vx_control_iec958, chip))) < 0) snd_vx_mixer_new() 978 for (i = 0; i < chip->hw->num_ins; i++) { snd_vx_mixer_new() 984 if ((err = snd_ctl_add(card, snd_ctl_new1(&temp, chip))) < 0) snd_vx_mixer_new() 992 if ((err = snd_ctl_add(card, snd_ctl_new1(&temp, chip))) < 0) snd_vx_mixer_new() 999 if ((err = snd_ctl_add(card, snd_ctl_new1(&temp, chip))) < 0) snd_vx_mixer_new() 1003 vx_reset_audio_levels(chip); snd_vx_mixer_new()
H A D	vx_pcm.c	60 static void vx_pcm_read_per_bytes(struct vx_core *chip, struct snd_pcm_runtime *runtime, vx_pcm_read_per_bytes() argument 65 *buf++ = vx_inb(chip, RXH); vx_pcm_read_per_bytes() 70 *buf++ = vx_inb(chip, RXM); vx_pcm_read_per_bytes() 75 *buf++ = vx_inb(chip, RXL); vx_pcm_read_per_bytes() 88 static void vx_set_pcx_time(struct vx_core *chip, pcx_time_t *pc_time, vx_set_pcx_time() argument 105 static int vx_set_differed_time(struct vx_core *chip, struct vx_rmh *rmh, vx_set_differed_time() argument 116 vx_set_pcx_time(chip, &pipe->pcx_time, &rmh->Cmd[1]); vx_set_differed_time() 139 static int vx_set_stream_format(struct vx_core *chip, struct vx_pipe *pipe, vx_set_stream_format() argument 149 vx_set_differed_time(chip, &rmh, pipe); vx_set_stream_format() 155 return vx_send_msg(chip, &rmh); vx_set_stream_format() 166 static int vx_set_format(struct vx_core *chip, struct vx_pipe *pipe, vx_set_format() argument 189 return vx_set_stream_format(chip, pipe, header); vx_set_format() 195 static int vx_set_ibl(struct vx_core *chip, struct vx_ibl_info *info) vx_set_ibl() argument 202 err = vx_send_msg(chip, &rmh); vx_set_ibl() 225 static int vx_get_pipe_state(struct vx_core *chip, struct vx_pipe *pipe, int *state) vx_get_pipe_state() argument 232 err = vx_send_msg(chip, &rmh); vx_get_pipe_state() 250 static int vx_query_hbuffer_size(struct vx_core *chip, struct vx_pipe *pipe) vx_query_hbuffer_size() argument 259 result = vx_send_msg(chip, &rmh); vx_query_hbuffer_size() 274 static int vx_pipe_can_start(struct vx_core *chip, struct vx_pipe *pipe) vx_pipe_can_start() argument 283 err = vx_send_msg(chip, &rmh); vx_pipe_can_start() 295 static int vx_conf_pipe(struct vx_core *chip, struct vx_pipe *pipe) vx_conf_pipe() argument 303 return vx_send_msg(chip, &rmh); vx_conf_pipe() 309 static int vx_send_irqa(struct vx_core *chip) vx_send_irqa() argument 314 return vx_send_msg(chip, &rmh); vx_send_irqa() 334 static int vx_toggle_pipe(struct vx_core *chip, struct vx_pipe *pipe, int state) vx_toggle_pipe() argument 339 if (vx_get_pipe_state(chip, pipe, &cur_state) < 0) vx_toggle_pipe() 350 err = vx_pipe_can_start(chip, pipe); vx_toggle_pipe() 360 if ((err = vx_conf_pipe(chip, pipe)) < 0) vx_toggle_pipe() 363 if ((err = vx_send_irqa(chip)) < 0) vx_toggle_pipe() 371 err = vx_get_pipe_state(chip, pipe, &cur_state); vx_toggle_pipe() 387 static int vx_stop_pipe(struct vx_core *chip, struct vx_pipe *pipe) vx_stop_pipe() argument 392 return vx_send_msg(chip, &rmh); vx_stop_pipe() 405 static int vx_alloc_pipe(struct vx_core *chip, int capture, vx_alloc_pipe() argument 421 data_mode = (chip->uer_bits & IEC958_AES0_NONAUDIO) != 0; vx_alloc_pipe() 424 err = vx_send_msg(chip, &rmh); vx_alloc_pipe() 434 vx_send_msg(chip, &rmh); vx_alloc_pipe() 455 static int vx_free_pipe(struct vx_core *chip, struct vx_pipe *pipe) vx_free_pipe() argument 461 vx_send_msg(chip, &rmh); vx_free_pipe() 473 static int vx_start_stream(struct vx_core *chip, struct vx_pipe *pipe) vx_start_stream() argument 479 vx_set_differed_time(chip, &rmh, pipe); vx_start_stream() 480 return vx_send_msg(chip, &rmh); vx_start_stream() 489 static int vx_stop_stream(struct vx_core *chip, struct vx_pipe *pipe) vx_stop_stream() argument 495 return vx_send_msg(chip, &rmh); vx_stop_stream() 529 struct vx_core *chip = snd_pcm_substream_chip(subs); vx_pcm_playback_open() local 534 if (chip->chip_status & VX_STAT_IS_STALE) vx_pcm_playback_open() 538 if (snd_BUG_ON(audio >= chip->audio_outs)) vx_pcm_playback_open() 542 pipe = chip->playback_pipes[audio]; vx_pcm_playback_open() 545 err = vx_alloc_pipe(chip, 0, audio, 2, &pipe); /* stereo playback */ vx_pcm_playback_open() 548 chip->playback_pipes[audio] = pipe; vx_pcm_playback_open() 554 chip->playback_pipes[audio] = pipe; vx_pcm_playback_open() 557 runtime->hw.period_bytes_min = chip->ibl.size; vx_pcm_playback_open() 572 struct vx_core *chip = snd_pcm_substream_chip(subs); vx_pcm_playback_close() local 581 chip->playback_pipes[pipe->number] = NULL; vx_pcm_playback_close() 582 vx_free_pipe(chip, pipe); vx_pcm_playback_close() 596 static int vx_notify_end_of_buffer(struct vx_core *chip, struct vx_pipe *pipe) vx_notify_end_of_buffer() argument 602 vx_send_rih_nolock(chip, IRQ_PAUSE_START_CONNECT); vx_notify_end_of_buffer() 605 err = vx_send_msg_nolock(chip, &rmh); vx_notify_end_of_buffer() 609 vx_send_rih_nolock(chip, IRQ_PAUSE_START_CONNECT); vx_notify_end_of_buffer() 624 static int vx_pcm_playback_transfer_chunk(struct vx_core *chip, vx_pcm_playback_transfer_chunk() argument 630 space = vx_query_hbuffer_size(chip, pipe); vx_pcm_playback_transfer_chunk() 633 vx_send_rih(chip, IRQ_CONNECT_STREAM_NEXT); vx_pcm_playback_transfer_chunk() 638 vx_send_rih(chip, IRQ_CONNECT_STREAM_NEXT); vx_pcm_playback_transfer_chunk() 646 mutex_lock(&chip->lock); vx_pcm_playback_transfer_chunk() 647 vx_pseudo_dma_write(chip, runtime, pipe, size); vx_pcm_playback_transfer_chunk() 648 err = vx_notify_end_of_buffer(chip, pipe); vx_pcm_playback_transfer_chunk() 650 vx_send_rih_nolock(chip, IRQ_CONNECT_STREAM_NEXT); vx_pcm_playback_transfer_chunk() 651 mutex_unlock(&chip->lock); vx_pcm_playback_transfer_chunk() 662 static int vx_update_pipe_position(struct vx_core *chip, vx_update_pipe_position() argument 672 err = vx_send_msg(chip, &rmh); vx_update_pipe_position() 690 static void vx_pcm_playback_transfer(struct vx_core *chip, vx_pcm_playback_transfer() argument 697 if (! pipe->prepared || (chip->chip_status & VX_STAT_IS_STALE)) vx_pcm_playback_transfer() 700 if ((err = vx_pcm_playback_transfer_chunk(chip, runtime, pipe, vx_pcm_playback_transfer() 701 chip->ibl.size)) < 0) vx_pcm_playback_transfer() 710 static void vx_pcm_playback_update(struct vx_core *chip, vx_pcm_playback_update() argument 717 if (pipe->running && ! (chip->chip_status & VX_STAT_IS_STALE)) { vx_pcm_playback_update() 718 if ((err = vx_update_pipe_position(chip, runtime, pipe)) < 0) vx_pcm_playback_update() 732 struct vx_core *chip = snd_pcm_substream_chip(subs); vx_pcm_trigger() local 736 if (chip->chip_status & VX_STAT_IS_STALE) vx_pcm_trigger() 743 vx_pcm_playback_transfer(chip, subs, pipe, 2); vx_pcm_trigger() 744 err = vx_start_stream(chip, pipe); vx_pcm_trigger() 749 err = vx_toggle_pipe(chip, pipe, 1); vx_pcm_trigger() 752 vx_stop_stream(chip, pipe); vx_pcm_trigger() 755 chip->pcm_running++; vx_pcm_trigger() 760 vx_toggle_pipe(chip, pipe, 0); vx_pcm_trigger() 761 vx_stop_pipe(chip, pipe); vx_pcm_trigger() 762 vx_stop_stream(chip, pipe); vx_pcm_trigger() 763 chip->pcm_running--; vx_pcm_trigger() 767 if ((err = vx_toggle_pipe(chip, pipe, 0)) < 0) vx_pcm_trigger() 771 if ((err = vx_toggle_pipe(chip, pipe, 1)) < 0) vx_pcm_trigger() 813 struct vx_core *chip = snd_pcm_substream_chip(subs); vx_pcm_prepare() local 819 if (chip->chip_status & VX_STAT_IS_STALE) vx_pcm_prepare() 822 data_mode = (chip->uer_bits & IEC958_AES0_NONAUDIO) != 0; vx_pcm_prepare() 830 if ((err = vx_send_msg(chip, &rmh)) < 0) vx_pcm_prepare() 836 if ((err = vx_send_msg(chip, &rmh)) < 0) vx_pcm_prepare() 841 if (chip->pcm_running && chip->freq != runtime->rate) { vx_pcm_prepare() 843 "from the current %d\n", runtime->rate, chip->freq); vx_pcm_prepare() 846 vx_set_clock(chip, runtime->rate); vx_pcm_prepare() 848 if ((err = vx_set_format(chip, pipe, runtime)) < 0) vx_pcm_prepare() 851 if (vx_is_pcmcia(chip)) { vx_pcm_prepare() 862 vx_update_pipe_position(chip, runtime, pipe); vx_pcm_prepare() 920 struct vx_core *chip = snd_pcm_substream_chip(subs); vx_pcm_capture_open() local 926 if (chip->chip_status & VX_STAT_IS_STALE) vx_pcm_capture_open() 930 if (snd_BUG_ON(audio >= chip->audio_ins)) vx_pcm_capture_open() 932 err = vx_alloc_pipe(chip, 1, audio, 2, &pipe); vx_pcm_capture_open() 936 chip->capture_pipes[audio] = pipe; vx_pcm_capture_open() 939 if (chip->audio_monitor_active[audio]) { vx_pcm_capture_open() 940 pipe_out_monitoring = chip->playback_pipes[audio]; vx_pcm_capture_open() 943 err = vx_alloc_pipe(chip, 0, audio, 2, &pipe_out_monitoring); vx_pcm_capture_open() 946 chip->playback_pipes[audio] = pipe_out_monitoring; vx_pcm_capture_open() 953 vx_set_monitor_level(chip, audio, chip->audio_monitor[audio], vx_pcm_capture_open() 954 chip->audio_monitor_active[audio]); vx_pcm_capture_open() 956 vx_set_monitor_level(chip, audio+1, chip->audio_monitor[audio+1], vx_pcm_capture_open() 957 chip->audio_monitor_active[audio+1]); vx_pcm_capture_open() 963 runtime->hw.period_bytes_min = chip->ibl.size; vx_pcm_capture_open() 978 struct vx_core *chip = snd_pcm_substream_chip(subs); vx_pcm_capture_close() local 985 chip->capture_pipes[pipe->number] = NULL; vx_pcm_capture_close() 995 vx_free_pipe(chip, pipe_out_monitoring); vx_pcm_capture_close() 996 chip->playback_pipes[pipe->number] = NULL; vx_pcm_capture_close() 1001 vx_free_pipe(chip, pipe); vx_pcm_capture_close() 1012 static void vx_pcm_capture_update(struct vx_core *chip, struct snd_pcm_substream *subs, vx_pcm_capture_update() argument 1018 if (! pipe->prepared || (chip->chip_status & VX_STAT_IS_STALE)) vx_pcm_capture_update() 1025 space = vx_query_hbuffer_size(chip, pipe); vx_pcm_capture_update() 1042 if (vx_wait_for_rx_full(chip) < 0) vx_pcm_capture_update() 1044 vx_pcm_read_per_bytes(chip, runtime, pipe); vx_pcm_capture_update() 1051 vx_pseudo_dma_read(chip, runtime, pipe, space); vx_pcm_capture_update() 1056 if (vx_wait_for_rx_full(chip) < 0) vx_pcm_capture_update() 1058 vx_pcm_read_per_bytes(chip, runtime, pipe); vx_pcm_capture_update() 1062 vx_send_rih(chip, IRQ_CONNECT_STREAM_NEXT); vx_pcm_capture_update() 1066 vx_pcm_read_per_bytes(chip, runtime, pipe); vx_pcm_capture_update() 1079 vx_send_rih(chip, IRQ_CONNECT_STREAM_NEXT); vx_pcm_capture_update() 1113 void vx_pcm_update_intr(struct vx_core *chip, unsigned int events) vx_pcm_update_intr() argument 1121 vx_init_rmh(&chip->irq_rmh, CMD_ASYNC); vx_pcm_update_intr() 1123 chip->irq_rmh.Cmd[0] |= 0x00000001; /* SEL_ASYNC_EVENTS */ vx_pcm_update_intr() 1125 chip->irq_rmh.Cmd[0] |= 0x00000002; /* SEL_END_OF_BUF_EVENTS */ vx_pcm_update_intr() 1127 if (vx_send_msg(chip, &chip->irq_rmh) < 0) { vx_pcm_update_intr() 1133 while (i < chip->irq_rmh.LgStat) { vx_pcm_update_intr() 1135 p = chip->irq_rmh.Stat[i] & MASK_FIRST_FIELD; vx_pcm_update_intr() 1136 capture = (chip->irq_rmh.Stat[i] & 0x400000) ? 1 : 0; vx_pcm_update_intr() 1137 eob = (chip->irq_rmh.Stat[i] & 0x800000) ? 1 : 0; vx_pcm_update_intr() 1144 buf = chip->irq_rmh.Stat[i]; vx_pcm_update_intr() 1149 if (snd_BUG_ON(p < 0 || p >= chip->audio_outs)) vx_pcm_update_intr() 1151 pipe = chip->playback_pipes[p]; vx_pcm_update_intr() 1153 vx_pcm_playback_update(chip, pipe->substream, pipe); vx_pcm_update_intr() 1154 vx_pcm_playback_transfer(chip, pipe->substream, pipe, buf); vx_pcm_update_intr() 1160 for (i = 0; i < chip->audio_ins; i++) { vx_pcm_update_intr() 1161 pipe = chip->capture_pipes[i]; vx_pcm_update_intr() 1163 vx_pcm_capture_update(chip, pipe->substream, pipe); vx_pcm_update_intr() 1171 static int vx_init_audio_io(struct vx_core *chip) vx_init_audio_io() argument 1177 if (vx_send_msg(chip, &rmh) < 0) { vx_init_audio_io() 1182 chip->audio_outs = rmh.Stat[0] & MASK_FIRST_FIELD; vx_init_audio_io() 1183 chip->audio_ins = (rmh.Stat[0] >> (FIELD_SIZE*2)) & MASK_FIRST_FIELD; vx_init_audio_io() 1184 chip->audio_info = rmh.Stat[1]; vx_init_audio_io() 1187 chip->playback_pipes = kcalloc(chip->audio_outs, sizeof(struct vx_pipe *), GFP_KERNEL); vx_init_audio_io() 1188 if (!chip->playback_pipes) vx_init_audio_io() 1190 chip->capture_pipes = kcalloc(chip->audio_ins, sizeof(struct vx_pipe *), GFP_KERNEL); vx_init_audio_io() 1191 if (!chip->capture_pipes) { vx_init_audio_io() 1192 kfree(chip->playback_pipes); vx_init_audio_io() 1196 preferred = chip->ibl.size; vx_init_audio_io() 1197 chip->ibl.size = 0; vx_init_audio_io() 1198 vx_set_ibl(chip, &chip->ibl); /* query the info */ vx_init_audio_io() 1200 chip->ibl.size = ((preferred + chip->ibl.granularity - 1) / vx_init_audio_io() 1201 chip->ibl.granularity) * chip->ibl.granularity; vx_init_audio_io() 1202 if (chip->ibl.size > chip->ibl.max_size) vx_init_audio_io() 1203 chip->ibl.size = chip->ibl.max_size; vx_init_audio_io() 1205 chip->ibl.size = chip->ibl.min_size; /* set to the minimum */ vx_init_audio_io() 1206 vx_set_ibl(chip, &chip->ibl); vx_init_audio_io() 1217 struct vx_core *chip = pcm->private_data; snd_vx_pcm_free() local 1218 chip->pcm[pcm->device] = NULL; snd_vx_pcm_free() 1219 kfree(chip->playback_pipes); snd_vx_pcm_free() 1220 chip->playback_pipes = NULL; snd_vx_pcm_free() 1221 kfree(chip->capture_pipes); snd_vx_pcm_free() 1222 chip->capture_pipes = NULL; snd_vx_pcm_free() 1228 int snd_vx_pcm_new(struct vx_core *chip) snd_vx_pcm_new() argument 1234 if ((err = vx_init_audio_io(chip)) < 0) snd_vx_pcm_new() 1237 for (i = 0; i < chip->hw->num_codecs; i++) { snd_vx_pcm_new() 1239 outs = chip->audio_outs > i * 2 ? 1 : 0; snd_vx_pcm_new() 1240 ins = chip->audio_ins > i * 2 ? 1 : 0; snd_vx_pcm_new() 1243 err = snd_pcm_new(chip->card, "VX PCM", i, snd_vx_pcm_new() 1252 pcm->private_data = chip; snd_vx_pcm_new() 1256 strcpy(pcm->name, chip->card->shortname); snd_vx_pcm_new() 1257 chip->pcm[i] = pcm; snd_vx_pcm_new()
/linux-4.1.27/sound/pci/lx6464es/
H A D	lx_core.c	70 static void __iomem *lx_dsp_register(struct lx6464es *chip, int port) lx_dsp_register() argument 72 void __iomem *base_address = chip->port_dsp_bar; lx_dsp_register() 76 unsigned long lx_dsp_reg_read(struct lx6464es *chip, int port) lx_dsp_reg_read() argument 78 void __iomem *address = lx_dsp_register(chip, port); lx_dsp_reg_read() 82 static void lx_dsp_reg_readbuf(struct lx6464es *chip, int port, u32 *data, lx_dsp_reg_readbuf() argument 85 u32 __iomem *address = lx_dsp_register(chip, port); lx_dsp_reg_readbuf() 94 void lx_dsp_reg_write(struct lx6464es *chip, int port, unsigned data) lx_dsp_reg_write() argument 96 void __iomem *address = lx_dsp_register(chip, port); lx_dsp_reg_write() 100 static void lx_dsp_reg_writebuf(struct lx6464es *chip, int port, lx_dsp_reg_writebuf() argument 103 u32 __iomem *address = lx_dsp_register(chip, port); lx_dsp_reg_writebuf() 127 static void __iomem *lx_plx_register(struct lx6464es *chip, int port) lx_plx_register() argument 129 void __iomem *base_address = chip->port_plx_remapped; lx_plx_register() 133 unsigned long lx_plx_reg_read(struct lx6464es *chip, int port) lx_plx_reg_read() argument 135 void __iomem *address = lx_plx_register(chip, port); lx_plx_reg_read() 139 void lx_plx_reg_write(struct lx6464es *chip, int port, u32 data) lx_plx_reg_write() argument 141 void __iomem *address = lx_plx_register(chip, port); lx_plx_reg_write() 271 static int lx_message_send_atomic(struct lx6464es *chip, struct lx_rmh *rmh) lx_message_send_atomic() argument 276 if (lx_dsp_reg_read(chip, eReg_CSM) & (Reg_CSM_MC | Reg_CSM_MR)) { lx_message_send_atomic() 277 dev_err(chip->card->dev, "PIOSendMessage eReg_CSM %x\n", reg); lx_message_send_atomic() 282 lx_dsp_reg_writebuf(chip, eReg_CRM1, rmh->cmd, rmh->cmd_len); lx_message_send_atomic() 285 lx_dsp_reg_write(chip, eReg_CSM, Reg_CSM_MC); lx_message_send_atomic() 289 if (lx_dsp_reg_read(chip, eReg_CSM) & Reg_CSM_MR) { lx_message_send_atomic() 291 reg = lx_dsp_reg_read(chip, eReg_CRM1); lx_message_send_atomic() 298 dev_warn(chip->card->dev, "TIMEOUT lx_message_send_atomic! " lx_message_send_atomic() 306 lx_dsp_reg_readbuf(chip, eReg_CRM2, rmh->stat, lx_message_send_atomic() 310 dev_err(chip->card->dev, "rmh error: %08x\n", reg); lx_message_send_atomic() 313 lx_dsp_reg_write(chip, eReg_CSM, 0); lx_message_send_atomic() 317 dev_warn(chip->card->dev, "lx_message_send: dsp timeout\n"); lx_message_send_atomic() 321 dev_warn(chip->card->dev, "lx_message_send: dsp crashed\n"); lx_message_send_atomic() 332 int lx_dsp_get_version(struct lx6464es *chip, u32 *rdsp_version) lx_dsp_get_version() argument 336 mutex_lock(&chip->msg_lock); lx_dsp_get_version() 338 lx_message_init(&chip->rmh, CMD_01_GET_SYS_CFG); lx_dsp_get_version() 339 ret = lx_message_send_atomic(chip, &chip->rmh); lx_dsp_get_version() 341 *rdsp_version = chip->rmh.stat[1]; lx_dsp_get_version() 342 mutex_unlock(&chip->msg_lock); lx_dsp_get_version() 346 int lx_dsp_get_clock_frequency(struct lx6464es *chip, u32 *rfreq) lx_dsp_get_clock_frequency() argument 353 mutex_lock(&chip->msg_lock); lx_dsp_get_clock_frequency() 355 lx_message_init(&chip->rmh, CMD_01_GET_SYS_CFG); lx_dsp_get_clock_frequency() 356 ret = lx_message_send_atomic(chip, &chip->rmh); lx_dsp_get_clock_frequency() 359 freq_raw = chip->rmh.stat[0] >> FREQ_FIELD_OFFSET; lx_dsp_get_clock_frequency() 371 mutex_unlock(&chip->msg_lock); lx_dsp_get_clock_frequency() 373 *rfreq = frequency * chip->freq_ratio; lx_dsp_get_clock_frequency() 378 int lx_dsp_get_mac(struct lx6464es *chip) lx_dsp_get_mac() argument 382 macmsb = lx_dsp_reg_read(chip, eReg_ADMACESMSB) & 0x00FFFFFF; lx_dsp_get_mac() 383 maclsb = lx_dsp_reg_read(chip, eReg_ADMACESLSB) & 0x00FFFFFF; lx_dsp_get_mac() 386 chip->mac_address[5] = ((u8 *)(&maclsb))[0]; lx_dsp_get_mac() 387 chip->mac_address[4] = ((u8 *)(&maclsb))[1]; lx_dsp_get_mac() 388 chip->mac_address[3] = ((u8 *)(&maclsb))[2]; lx_dsp_get_mac() 389 chip->mac_address[2] = ((u8 *)(&macmsb))[0]; lx_dsp_get_mac() 390 chip->mac_address[1] = ((u8 *)(&macmsb))[1]; lx_dsp_get_mac() 391 chip->mac_address[0] = ((u8 *)(&macmsb))[2]; lx_dsp_get_mac() 397 int lx_dsp_set_granularity(struct lx6464es *chip, u32 gran) lx_dsp_set_granularity() argument 401 mutex_lock(&chip->msg_lock); lx_dsp_set_granularity() 403 lx_message_init(&chip->rmh, CMD_02_SET_GRANULARITY); lx_dsp_set_granularity() 404 chip->rmh.cmd[0] |= gran; lx_dsp_set_granularity() 406 ret = lx_message_send_atomic(chip, &chip->rmh); lx_dsp_set_granularity() 407 mutex_unlock(&chip->msg_lock); lx_dsp_set_granularity() 411 int lx_dsp_read_async_events(struct lx6464es *chip, u32 *data) lx_dsp_read_async_events() argument 415 mutex_lock(&chip->msg_lock); lx_dsp_read_async_events() 417 lx_message_init(&chip->rmh, CMD_04_GET_EVENT); lx_dsp_read_async_events() 418 chip->rmh.stat_len = 9; /* we don't necessarily need the full length */ lx_dsp_read_async_events() 420 ret = lx_message_send_atomic(chip, &chip->rmh); lx_dsp_read_async_events() 423 memcpy(data, chip->rmh.stat, chip->rmh.stat_len * sizeof(u32)); lx_dsp_read_async_events() 425 mutex_unlock(&chip->msg_lock); lx_dsp_read_async_events() 435 int lx_pipe_allocate(struct lx6464es *chip, u32 pipe, int is_capture, lx_pipe_allocate() argument 441 mutex_lock(&chip->msg_lock); lx_pipe_allocate() 442 lx_message_init(&chip->rmh, CMD_06_ALLOCATE_PIPE); lx_pipe_allocate() 444 chip->rmh.cmd[0] |= pipe_cmd; lx_pipe_allocate() 445 chip->rmh.cmd[0] |= channels; lx_pipe_allocate() 447 err = lx_message_send_atomic(chip, &chip->rmh); lx_pipe_allocate() 448 mutex_unlock(&chip->msg_lock); lx_pipe_allocate() 451 dev_err(chip->card->dev, "could not allocate pipe\n"); lx_pipe_allocate() 456 int lx_pipe_release(struct lx6464es *chip, u32 pipe, int is_capture) lx_pipe_release() argument 461 mutex_lock(&chip->msg_lock); lx_pipe_release() 462 lx_message_init(&chip->rmh, CMD_07_RELEASE_PIPE); lx_pipe_release() 464 chip->rmh.cmd[0] |= pipe_cmd; lx_pipe_release() 466 err = lx_message_send_atomic(chip, &chip->rmh); lx_pipe_release() 467 mutex_unlock(&chip->msg_lock); lx_pipe_release() 472 int lx_buffer_ask(struct lx6464es *chip, u32 pipe, int is_capture, lx_buffer_ask() argument 486 mutex_lock(&chip->msg_lock); lx_buffer_ask() 487 lx_message_init(&chip->rmh, CMD_08_ASK_BUFFERS); lx_buffer_ask() 489 chip->rmh.cmd[0] |= pipe_cmd; lx_buffer_ask() 491 err = lx_message_send_atomic(chip, &chip->rmh); lx_buffer_ask() 496 u32 stat = chip->rmh.stat[i]; lx_buffer_ask() 508 dev_dbg(chip->card->dev, lx_buffer_ask() 512 for (i = 0; i != chip->rmh.stat_len; ++i) lx_buffer_ask() 513 dev_dbg(chip->card->dev, lx_buffer_ask() 515 chip->rmh.stat[i], lx_buffer_ask() 516 chip->rmh.stat[i] & MASK_DATA_SIZE); lx_buffer_ask() 520 mutex_unlock(&chip->msg_lock); lx_buffer_ask() 525 int lx_pipe_stop(struct lx6464es *chip, u32 pipe, int is_capture) lx_pipe_stop() argument 530 mutex_lock(&chip->msg_lock); lx_pipe_stop() 531 lx_message_init(&chip->rmh, CMD_09_STOP_PIPE); lx_pipe_stop() 533 chip->rmh.cmd[0] |= pipe_cmd; lx_pipe_stop() 535 err = lx_message_send_atomic(chip, &chip->rmh); lx_pipe_stop() 537 mutex_unlock(&chip->msg_lock); lx_pipe_stop() 541 static int lx_pipe_toggle_state(struct lx6464es *chip, u32 pipe, int is_capture) lx_pipe_toggle_state() argument 546 mutex_lock(&chip->msg_lock); lx_pipe_toggle_state() 547 lx_message_init(&chip->rmh, CMD_0B_TOGGLE_PIPE_STATE); lx_pipe_toggle_state() 549 chip->rmh.cmd[0] |= pipe_cmd; lx_pipe_toggle_state() 551 err = lx_message_send_atomic(chip, &chip->rmh); lx_pipe_toggle_state() 553 mutex_unlock(&chip->msg_lock); lx_pipe_toggle_state() 558 int lx_pipe_start(struct lx6464es *chip, u32 pipe, int is_capture) lx_pipe_start() argument 562 err = lx_pipe_wait_for_idle(chip, pipe, is_capture); lx_pipe_start() 566 err = lx_pipe_toggle_state(chip, pipe, is_capture); lx_pipe_start() 571 int lx_pipe_pause(struct lx6464es *chip, u32 pipe, int is_capture) lx_pipe_pause() argument 575 err = lx_pipe_wait_for_start(chip, pipe, is_capture); lx_pipe_pause() 579 err = lx_pipe_toggle_state(chip, pipe, is_capture); lx_pipe_pause() 585 int lx_pipe_sample_count(struct lx6464es *chip, u32 pipe, int is_capture, lx_pipe_sample_count() argument 591 mutex_lock(&chip->msg_lock); lx_pipe_sample_count() 592 lx_message_init(&chip->rmh, CMD_0A_GET_PIPE_SPL_COUNT); lx_pipe_sample_count() 594 chip->rmh.cmd[0] |= pipe_cmd; lx_pipe_sample_count() 595 chip->rmh.stat_len = 2; /* need all words here! */ lx_pipe_sample_count() 597 err = lx_message_send_atomic(chip, &chip->rmh); /* don't sleep! */ lx_pipe_sample_count() 600 dev_err(chip->card->dev, lx_pipe_sample_count() 603 *rsample_count = ((u64)(chip->rmh.stat[0] & MASK_SPL_COUNT_HI) lx_pipe_sample_count() 605 + chip->rmh.stat[1]; /* lo part */ lx_pipe_sample_count() 608 mutex_unlock(&chip->msg_lock); lx_pipe_sample_count() 612 int lx_pipe_state(struct lx6464es *chip, u32 pipe, int is_capture, u16 *rstate) lx_pipe_state() argument 617 mutex_lock(&chip->msg_lock); lx_pipe_state() 618 lx_message_init(&chip->rmh, CMD_0A_GET_PIPE_SPL_COUNT); lx_pipe_state() 620 chip->rmh.cmd[0] |= pipe_cmd; lx_pipe_state() 622 err = lx_message_send_atomic(chip, &chip->rmh); lx_pipe_state() 625 dev_err(chip->card->dev, "could not query pipe's state\n"); lx_pipe_state() 627 *rstate = (chip->rmh.stat[0] >> PSTATE_OFFSET) & 0x0F; lx_pipe_state() 629 mutex_unlock(&chip->msg_lock); lx_pipe_state() 633 static int lx_pipe_wait_for_state(struct lx6464es *chip, u32 pipe, lx_pipe_wait_for_state() argument 642 int err = lx_pipe_state(chip, pipe, is_capture, &current_state); lx_pipe_wait_for_state() 656 int lx_pipe_wait_for_start(struct lx6464es *chip, u32 pipe, int is_capture) lx_pipe_wait_for_start() argument 658 return lx_pipe_wait_for_state(chip, pipe, is_capture, PSTATE_RUN); lx_pipe_wait_for_start() 661 int lx_pipe_wait_for_idle(struct lx6464es *chip, u32 pipe, int is_capture) lx_pipe_wait_for_idle() argument 663 return lx_pipe_wait_for_state(chip, pipe, is_capture, PSTATE_IDLE); lx_pipe_wait_for_idle() 667 int lx_stream_set_state(struct lx6464es *chip, u32 pipe, lx_stream_set_state() argument 673 mutex_lock(&chip->msg_lock); lx_stream_set_state() 674 lx_message_init(&chip->rmh, CMD_13_SET_STREAM_STATE); lx_stream_set_state() 676 chip->rmh.cmd[0] |= pipe_cmd; lx_stream_set_state() 677 chip->rmh.cmd[0] |= state; lx_stream_set_state() 679 err = lx_message_send_atomic(chip, &chip->rmh); lx_stream_set_state() 680 mutex_unlock(&chip->msg_lock); lx_stream_set_state() 685 int lx_stream_set_format(struct lx6464es *chip, struct snd_pcm_runtime *runtime, lx_stream_set_format() argument 693 dev_err(chip->card->dev, "channel count mismatch: %d vs %d", lx_stream_set_format() 696 mutex_lock(&chip->msg_lock); lx_stream_set_format() 697 lx_message_init(&chip->rmh, CMD_0C_DEF_STREAM); lx_stream_set_format() 699 chip->rmh.cmd[0] |= pipe_cmd; lx_stream_set_format() 703 chip->rmh.cmd[0] |= (STREAM_FMT_16b << STREAM_FMT_OFFSET); lx_stream_set_format() 707 chip->rmh.cmd[0] |= (STREAM_FMT_intel << STREAM_FMT_OFFSET); lx_stream_set_format() 709 chip->rmh.cmd[0] |= channels-1; lx_stream_set_format() 711 err = lx_message_send_atomic(chip, &chip->rmh); lx_stream_set_format() 712 mutex_unlock(&chip->msg_lock); lx_stream_set_format() 717 int lx_stream_state(struct lx6464es *chip, u32 pipe, int is_capture, lx_stream_state() argument 723 mutex_lock(&chip->msg_lock); lx_stream_state() 724 lx_message_init(&chip->rmh, CMD_0E_GET_STREAM_SPL_COUNT); lx_stream_state() 726 chip->rmh.cmd[0] |= pipe_cmd; lx_stream_state() 728 err = lx_message_send_atomic(chip, &chip->rmh); lx_stream_state() 730 *rstate = (chip->rmh.stat[0] & SF_START) ? START_STATE : PAUSE_STATE; lx_stream_state() 732 mutex_unlock(&chip->msg_lock); lx_stream_state() 736 int lx_stream_sample_position(struct lx6464es *chip, u32 pipe, int is_capture, lx_stream_sample_position() argument 742 mutex_lock(&chip->msg_lock); lx_stream_sample_position() 743 lx_message_init(&chip->rmh, CMD_0E_GET_STREAM_SPL_COUNT); lx_stream_sample_position() 745 chip->rmh.cmd[0] |= pipe_cmd; lx_stream_sample_position() 747 err = lx_message_send_atomic(chip, &chip->rmh); lx_stream_sample_position() 749 *r_bytepos = ((u64) (chip->rmh.stat[0] & MASK_SPL_COUNT_HI) lx_stream_sample_position() 751 + chip->rmh.stat[1]; /* lo part */ lx_stream_sample_position() 753 mutex_unlock(&chip->msg_lock); lx_stream_sample_position() 758 int lx_buffer_give(struct lx6464es *chip, u32 pipe, int is_capture, lx_buffer_give() argument 765 mutex_lock(&chip->msg_lock); lx_buffer_give() 766 lx_message_init(&chip->rmh, CMD_0F_UPDATE_BUFFER); lx_buffer_give() 768 chip->rmh.cmd[0] |= pipe_cmd; lx_buffer_give() 769 chip->rmh.cmd[0] |= BF_NOTIFY_EOB; /* request interrupt notification */ lx_buffer_give() 773 chip->rmh.cmd[1] = buffer_size & MASK_DATA_SIZE; lx_buffer_give() 774 chip->rmh.cmd[2] = buf_address_lo; lx_buffer_give() 777 chip->rmh.cmd_len = 4; lx_buffer_give() 778 chip->rmh.cmd[3] = buf_address_hi; lx_buffer_give() 779 chip->rmh.cmd[0] |= BF_64BITS_ADR; lx_buffer_give() 782 err = lx_message_send_atomic(chip, &chip->rmh); lx_buffer_give() 785 *r_buffer_index = chip->rmh.stat[0]; lx_buffer_give() 790 dev_err(chip->card->dev, lx_buffer_give() 794 dev_err(chip->card->dev, lx_buffer_give() 798 dev_err(chip->card->dev, lx_buffer_give() 802 mutex_unlock(&chip->msg_lock); lx_buffer_give() 806 int lx_buffer_free(struct lx6464es *chip, u32 pipe, int is_capture, lx_buffer_free() argument 812 mutex_lock(&chip->msg_lock); lx_buffer_free() 813 lx_message_init(&chip->rmh, CMD_11_CANCEL_BUFFER); lx_buffer_free() 815 chip->rmh.cmd[0] |= pipe_cmd; lx_buffer_free() 816 chip->rmh.cmd[0] |= MASK_BUFFER_ID; /* ask for the current buffer: the lx_buffer_free() 819 err = lx_message_send_atomic(chip, &chip->rmh); lx_buffer_free() 822 *r_buffer_size = chip->rmh.stat[0] & MASK_DATA_SIZE; lx_buffer_free() 824 mutex_unlock(&chip->msg_lock); lx_buffer_free() 828 int lx_buffer_cancel(struct lx6464es *chip, u32 pipe, int is_capture, lx_buffer_cancel() argument 834 mutex_lock(&chip->msg_lock); lx_buffer_cancel() 835 lx_message_init(&chip->rmh, CMD_11_CANCEL_BUFFER); lx_buffer_cancel() 837 chip->rmh.cmd[0] |= pipe_cmd; lx_buffer_cancel() 838 chip->rmh.cmd[0] |= buffer_index; lx_buffer_cancel() 840 err = lx_message_send_atomic(chip, &chip->rmh); lx_buffer_cancel() 842 mutex_unlock(&chip->msg_lock); lx_buffer_cancel() 852 int lx_level_unmute(struct lx6464es *chip, int is_capture, int unmute) lx_level_unmute() argument 858 mutex_lock(&chip->msg_lock); lx_level_unmute() 859 lx_message_init(&chip->rmh, CMD_0D_SET_MUTE); lx_level_unmute() 861 chip->rmh.cmd[0] |= PIPE_INFO_TO_CMD(is_capture, 0); lx_level_unmute() 863 chip->rmh.cmd[1] = (u32)(mute_mask >> (u64)32); /* hi part */ lx_level_unmute() 864 chip->rmh.cmd[2] = (u32)(mute_mask & (u64)0xFFFFFFFF); /* lo part */ lx_level_unmute() 866 dev_dbg(chip->card->dev, lx_level_unmute() 867 "mute %x %x %x\n", chip->rmh.cmd[0], chip->rmh.cmd[1], lx_level_unmute() 868 chip->rmh.cmd[2]); lx_level_unmute() 870 err = lx_message_send_atomic(chip, &chip->rmh); lx_level_unmute() 872 mutex_unlock(&chip->msg_lock); lx_level_unmute() 895 int lx_level_peaks(struct lx6464es *chip, int is_capture, int channels, lx_level_peaks() argument 901 mutex_lock(&chip->msg_lock); lx_level_peaks() 905 lx_message_init(&chip->rmh, CMD_12_GET_PEAK); lx_level_peaks() 906 chip->rmh.cmd[0] |= PIPE_INFO_TO_CMD(is_capture, i); lx_level_peaks() 908 err = lx_message_send_atomic(chip, &chip->rmh); lx_level_peaks() 911 s0 = peak_map[chip->rmh.stat[0] & 0x0F]; lx_level_peaks() 912 s1 = peak_map[(chip->rmh.stat[0] >> 4) & 0xf]; lx_level_peaks() 913 s2 = peak_map[(chip->rmh.stat[0] >> 8) & 0xf]; lx_level_peaks() 914 s3 = peak_map[(chip->rmh.stat[0] >> 12) & 0xf]; lx_level_peaks() 926 mutex_unlock(&chip->msg_lock); lx_level_peaks() 936 static u32 lx_interrupt_test_ack(struct lx6464es *chip) lx_interrupt_test_ack() argument 938 u32 irqcs = lx_plx_reg_read(chip, ePLX_IRQCS); lx_interrupt_test_ack() 945 while ((temp = lx_plx_reg_read(chip, ePLX_L2PCIDB))) { lx_interrupt_test_ack() 948 lx_plx_reg_write(chip, ePLX_L2PCIDB, temp); lx_interrupt_test_ack() 956 static int lx_interrupt_ack(struct lx6464es *chip, u32 *r_irqsrc, lx_interrupt_ack() argument 960 u32 irqsrc = lx_interrupt_test_ack(chip); lx_interrupt_ack() 976 /* dev_dbg(chip->card->dev, "interrupt: async event pending\n"); */ lx_interrupt_ack() 983 static int lx_interrupt_handle_async_events(struct lx6464es *chip, u32 irqsrc, lx_interrupt_handle_async_events() argument 1011 err = lx_dsp_read_async_events(chip, stat); lx_interrupt_handle_async_events() 1018 dev_dbg(chip->card->dev, "interrupt: EOBI pending %llx\n", lx_interrupt_handle_async_events() 1024 dev_dbg(chip->card->dev, "interrupt: EOBO pending %llx\n", lx_interrupt_handle_async_events() 1036 static int lx_interrupt_request_new_buffer(struct lx6464es *chip, lx_interrupt_request_new_buffer() argument 1059 dev_dbg(chip->card->dev, "->lx_interrupt_request_new_buffer\n"); lx_interrupt_request_new_buffer() 1061 mutex_lock(&chip->lock); lx_interrupt_request_new_buffer() 1063 err = lx_buffer_ask(chip, 0, is_capture, &needed, &freed, size_array); lx_interrupt_request_new_buffer() 1064 dev_dbg(chip->card->dev, lx_interrupt_request_new_buffer() 1068 err = lx_buffer_give(chip, 0, is_capture, period_bytes, buf_lo, buf_hi, lx_interrupt_request_new_buffer() 1070 dev_dbg(chip->card->dev, lx_interrupt_request_new_buffer() 1075 mutex_unlock(&chip->lock); lx_interrupt_request_new_buffer() 1082 struct lx6464es *chip = dev_id; lx_interrupt() local 1087 dev_dbg(chip->card->dev, lx_interrupt() 1090 if (!lx_interrupt_ack(chip, &irqsrc, &async_pending, &async_escmd)) { lx_interrupt() 1091 dev_dbg(chip->card->dev, "IRQ_NONE\n"); lx_interrupt() 1099 dev_dbg(chip->card->dev, "interrupt: EOBI\n"); lx_interrupt() 1102 dev_dbg(chip->card->dev, "interrupt: EOBO\n"); lx_interrupt() 1105 dev_dbg(chip->card->dev, "interrupt: URUN\n"); lx_interrupt() 1108 dev_dbg(chip->card->dev, "interrupt: ORUN\n"); lx_interrupt() 1112 chip->irqsrc = irqsrc; lx_interrupt() 1122 dev_dbg(chip->card->dev, "interrupt requests escmd handling\n"); lx_interrupt() 1130 struct lx6464es *chip = dev_id; lx_threaded_irq() local 1137 err = lx_interrupt_handle_async_events(chip, chip->irqsrc, lx_threaded_irq() 1142 dev_err(chip->card->dev, "error handling async events\n"); lx_threaded_irq() 1145 struct lx_stream *lx_stream = &chip->capture_stream; lx_threaded_irq() 1147 dev_dbg(chip->card->dev, lx_threaded_irq() 1149 err = lx_interrupt_request_new_buffer(chip, lx_stream); lx_threaded_irq() 1151 dev_err(chip->card->dev, lx_threaded_irq() 1157 struct lx_stream *lx_stream = &chip->playback_stream; lx_threaded_irq() 1159 dev_dbg(chip->card->dev, lx_threaded_irq() 1161 err = lx_interrupt_request_new_buffer(chip, lx_stream); lx_threaded_irq() 1163 dev_err(chip->card->dev, lx_threaded_irq() 1172 static void lx_irq_set(struct lx6464es *chip, int enable) lx_irq_set() argument 1174 u32 reg = lx_plx_reg_read(chip, ePLX_IRQCS); lx_irq_set() 1185 lx_plx_reg_write(chip, ePLX_IRQCS, reg); lx_irq_set() 1188 void lx_irq_enable(struct lx6464es *chip) lx_irq_enable() argument 1190 dev_dbg(chip->card->dev, "->lx_irq_enable\n"); lx_irq_enable() 1191 lx_irq_set(chip, 1); lx_irq_enable() 1194 void lx_irq_disable(struct lx6464es *chip) lx_irq_disable() argument 1196 dev_dbg(chip->card->dev, "->lx_irq_disable\n"); lx_irq_disable() 1197 lx_irq_set(chip, 0); lx_irq_disable()
H A D	lx6464es.c	102 static int lx_set_granularity(struct lx6464es *chip, u32 gran); 105 static int lx_hardware_open(struct lx6464es *chip, lx_hardware_open() argument 115 dev_dbg(chip->card->dev, "allocating pipe for %d channels\n", channels); lx_hardware_open() 116 err = lx_pipe_allocate(chip, 0, is_capture, channels); lx_hardware_open() 118 dev_err(chip->card->dev, LXP "allocating pipe failed\n"); lx_hardware_open() 122 err = lx_set_granularity(chip, period_size); lx_hardware_open() 124 dev_err(chip->card->dev, "setting granularity to %ld failed\n", lx_hardware_open() 132 static int lx_hardware_start(struct lx6464es *chip, lx_hardware_start() argument 139 dev_dbg(chip->card->dev, "setting stream format\n"); lx_hardware_start() 140 err = lx_stream_set_format(chip, runtime, 0, is_capture); lx_hardware_start() 142 dev_err(chip->card->dev, "setting stream format failed\n"); lx_hardware_start() 146 dev_dbg(chip->card->dev, "starting pipe\n"); lx_hardware_start() 147 err = lx_pipe_start(chip, 0, is_capture); lx_hardware_start() 149 dev_err(chip->card->dev, "starting pipe failed\n"); lx_hardware_start() 153 dev_dbg(chip->card->dev, "waiting for pipe to start\n"); lx_hardware_start() 154 err = lx_pipe_wait_for_start(chip, 0, is_capture); lx_hardware_start() 156 dev_err(chip->card->dev, "waiting for pipe failed\n"); lx_hardware_start() 164 static int lx_hardware_stop(struct lx6464es *chip, lx_hardware_stop() argument 170 dev_dbg(chip->card->dev, "pausing pipe\n"); lx_hardware_stop() 171 err = lx_pipe_pause(chip, 0, is_capture); lx_hardware_stop() 173 dev_err(chip->card->dev, "pausing pipe failed\n"); lx_hardware_stop() 177 dev_dbg(chip->card->dev, "waiting for pipe to become idle\n"); lx_hardware_stop() 178 err = lx_pipe_wait_for_idle(chip, 0, is_capture); lx_hardware_stop() 180 dev_err(chip->card->dev, "waiting for pipe failed\n"); lx_hardware_stop() 184 dev_dbg(chip->card->dev, "stopping pipe\n"); lx_hardware_stop() 185 err = lx_pipe_stop(chip, 0, is_capture); lx_hardware_stop() 187 dev_err(chip->card->dev, "stopping pipe failed\n"); lx_hardware_stop() 195 static int lx_hardware_close(struct lx6464es *chip, lx_hardware_close() argument 201 dev_dbg(chip->card->dev, "releasing pipe\n"); lx_hardware_close() 202 err = lx_pipe_release(chip, 0, is_capture); lx_hardware_close() 204 dev_err(chip->card->dev, "releasing pipe failed\n"); lx_hardware_close() 214 struct lx6464es *chip = snd_pcm_substream_chip(substream); lx_pcm_open() local 219 dev_dbg(chip->card->dev, "->lx_pcm_open\n"); lx_pcm_open() 220 mutex_lock(&chip->setup_mutex); lx_pcm_open() 230 dev_warn(chip->card->dev, "could not constrain periods\n"); lx_pcm_open() 236 board_rate = chip->board_sample_rate; lx_pcm_open() 241 dev_warn(chip->card->dev, "could not constrain periods\n"); lx_pcm_open() 251 dev_warn(chip->card->dev, lx_pcm_open() 263 runtime->private_data = chip; lx_pcm_open() 265 mutex_unlock(&chip->setup_mutex); lx_pcm_open() 266 dev_dbg(chip->card->dev, "<-lx_pcm_open, %d\n", err); lx_pcm_open() 280 struct lx6464es *chip = snd_pcm_substream_chip(substream); lx_pcm_stream_pointer() local 284 struct lx_stream *lx_stream = is_capture ? &chip->capture_stream : lx_pcm_stream_pointer() 285 &chip->playback_stream; lx_pcm_stream_pointer() 287 dev_dbg(chip->card->dev, "->lx_pcm_stream_pointer\n"); lx_pcm_stream_pointer() 289 mutex_lock(&chip->lock); lx_pcm_stream_pointer() 291 mutex_unlock(&chip->lock); lx_pcm_stream_pointer() 293 dev_dbg(chip->card->dev, "stream_pointer at %ld\n", pos); lx_pcm_stream_pointer() 299 struct lx6464es *chip = snd_pcm_substream_chip(substream); lx_pcm_prepare() local 303 dev_dbg(chip->card->dev, "->lx_pcm_prepare\n"); lx_pcm_prepare() 305 mutex_lock(&chip->setup_mutex); lx_pcm_prepare() 307 if (chip->hardware_running[is_capture]) { lx_pcm_prepare() 308 err = lx_hardware_stop(chip, substream); lx_pcm_prepare() 310 dev_err(chip->card->dev, "failed to stop hardware. " lx_pcm_prepare() 315 err = lx_hardware_close(chip, substream); lx_pcm_prepare() 317 dev_err(chip->card->dev, "failed to close hardware. " lx_pcm_prepare() 323 dev_dbg(chip->card->dev, "opening hardware\n"); lx_pcm_prepare() 324 err = lx_hardware_open(chip, substream); lx_pcm_prepare() 326 dev_err(chip->card->dev, "failed to open hardware. " lx_pcm_prepare() 331 err = lx_hardware_start(chip, substream); lx_pcm_prepare() 333 dev_err(chip->card->dev, "failed to start hardware. " lx_pcm_prepare() 338 chip->hardware_running[is_capture] = 1; lx_pcm_prepare() 340 if (chip->board_sample_rate != substream->runtime->rate) { lx_pcm_prepare() 342 chip->board_sample_rate = substream->runtime->rate; lx_pcm_prepare() 346 mutex_unlock(&chip->setup_mutex); lx_pcm_prepare() 353 struct lx6464es *chip = snd_pcm_substream_chip(substream); lx_pcm_hw_params() local 356 dev_dbg(chip->card->dev, "->lx_pcm_hw_params\n"); lx_pcm_hw_params() 358 mutex_lock(&chip->setup_mutex); lx_pcm_hw_params() 365 chip->capture_stream.stream = substream; lx_pcm_hw_params() 367 chip->playback_stream.stream = substream; lx_pcm_hw_params() 369 mutex_unlock(&chip->setup_mutex); lx_pcm_hw_params() 387 struct lx6464es *chip = snd_pcm_substream_chip(substream); lx_pcm_hw_free() local 391 dev_dbg(chip->card->dev, "->lx_pcm_hw_free\n"); lx_pcm_hw_free() 392 mutex_lock(&chip->setup_mutex); lx_pcm_hw_free() 394 if (chip->hardware_running[is_capture]) { lx_pcm_hw_free() 395 err = lx_hardware_stop(chip, substream); lx_pcm_hw_free() 397 dev_err(chip->card->dev, "failed to stop hardware. " lx_pcm_hw_free() 402 err = lx_hardware_close(chip, substream); lx_pcm_hw_free() 404 dev_err(chip->card->dev, "failed to close hardware. " lx_pcm_hw_free() 409 chip->hardware_running[is_capture] = 0; lx_pcm_hw_free() 415 chip->capture_stream.stream = 0; lx_pcm_hw_free() 417 chip->playback_stream.stream = 0; lx_pcm_hw_free() 420 mutex_unlock(&chip->setup_mutex); lx_pcm_hw_free() 424 static void lx_trigger_start(struct lx6464es *chip, struct lx_stream *lx_stream) lx_trigger_start() argument 446 err = lx_buffer_ask(chip, 0, is_capture, &needed, &freed, lx_trigger_start() 448 dev_dbg(chip->card->dev, "starting: needed %d, freed %d\n", lx_trigger_start() 451 err = lx_buffer_give(chip, 0, is_capture, period_bytes, lx_trigger_start() 455 dev_dbg(chip->card->dev, "starting: buffer index %x on 0x%lx (%d bytes)\n", lx_trigger_start() 460 err = lx_buffer_ask(chip, 0, is_capture, &needed, &freed, size_array); lx_trigger_start() 461 dev_dbg(chip->card->dev, "starting: needed %d, freed %d\n", needed, freed); lx_trigger_start() 463 dev_dbg(chip->card->dev, "starting: starting stream\n"); lx_trigger_start() 464 err = lx_stream_start(chip, 0, is_capture); lx_trigger_start() 466 dev_err(chip->card->dev, "couldn't start stream\n"); lx_trigger_start() 473 static void lx_trigger_stop(struct lx6464es *chip, struct lx_stream *lx_stream) lx_trigger_stop() argument 478 dev_dbg(chip->card->dev, "stopping: stopping stream\n"); lx_trigger_stop() 479 err = lx_stream_stop(chip, 0, is_capture); lx_trigger_stop() 481 dev_err(chip->card->dev, "couldn't stop stream\n"); lx_trigger_stop() 487 static void lx_trigger_dispatch_stream(struct lx6464es *chip, lx_trigger_dispatch_stream() argument 492 lx_trigger_start(chip, lx_stream); lx_trigger_dispatch_stream() 496 lx_trigger_stop(chip, lx_stream); lx_trigger_dispatch_stream() 504 static int lx_pcm_trigger_dispatch(struct lx6464es *chip, lx_pcm_trigger_dispatch() argument 509 mutex_lock(&chip->lock); lx_pcm_trigger_dispatch() 524 lx_trigger_dispatch_stream(chip, &chip->capture_stream); lx_pcm_trigger_dispatch() 525 lx_trigger_dispatch_stream(chip, &chip->playback_stream); lx_pcm_trigger_dispatch() 528 mutex_unlock(&chip->lock); lx_pcm_trigger_dispatch() 535 struct lx6464es *chip = snd_pcm_substream_chip(substream); lx_pcm_trigger() local 537 struct lx_stream *stream = is_capture ? &chip->capture_stream : lx_pcm_trigger() 538 &chip->playback_stream; lx_pcm_trigger() 540 dev_dbg(chip->card->dev, "->lx_pcm_trigger\n"); lx_pcm_trigger() 542 return lx_pcm_trigger_dispatch(chip, stream, cmd); lx_pcm_trigger() 545 static int snd_lx6464es_free(struct lx6464es *chip) snd_lx6464es_free() argument 547 dev_dbg(chip->card->dev, "->snd_lx6464es_free\n"); snd_lx6464es_free() 549 lx_irq_disable(chip); snd_lx6464es_free() 551 if (chip->irq >= 0) snd_lx6464es_free() 552 free_irq(chip->irq, chip); snd_lx6464es_free() 554 iounmap(chip->port_dsp_bar); snd_lx6464es_free() 555 ioport_unmap(chip->port_plx_remapped); snd_lx6464es_free() 557 pci_release_regions(chip->pci); snd_lx6464es_free() 558 pci_disable_device(chip->pci); snd_lx6464es_free() 560 kfree(chip); snd_lx6464es_free() 571 static int lx_init_xilinx_reset(struct lx6464es *chip) lx_init_xilinx_reset() argument 574 u32 plx_reg = lx_plx_reg_read(chip, ePLX_CHIPSC); lx_init_xilinx_reset() 576 dev_dbg(chip->card->dev, "->lx_init_xilinx_reset\n"); lx_init_xilinx_reset() 581 lx_plx_reg_write(chip, ePLX_CHIPSC, plx_reg); lx_init_xilinx_reset() 584 lx_plx_reg_write(chip, ePLX_MBOX3, 0); lx_init_xilinx_reset() 588 lx_plx_reg_write(chip, ePLX_CHIPSC, plx_reg); lx_init_xilinx_reset() 594 reg_mbox3 = lx_plx_reg_read(chip, ePLX_MBOX3); lx_init_xilinx_reset() 596 dev_dbg(chip->card->dev, "xilinx reset done\n"); lx_init_xilinx_reset() 597 dev_dbg(chip->card->dev, "xilinx took %d loops\n", i); lx_init_xilinx_reset() 605 lx_dsp_reg_write(chip, eReg_CSM, 0); lx_init_xilinx_reset() 613 static int lx_init_xilinx_test(struct lx6464es *chip) lx_init_xilinx_test() argument 617 dev_dbg(chip->card->dev, "->lx_init_xilinx_test\n"); lx_init_xilinx_test() 620 lx_dsp_reg_write(chip, eReg_CSM, 0); lx_init_xilinx_test() 622 reg = lx_dsp_reg_read(chip, eReg_CSM); lx_init_xilinx_test() 625 dev_err(chip->card->dev, "Problem: Reg_CSM %x.\n", reg); lx_init_xilinx_test() 628 lx_plx_reg_write(chip, ePLX_PCICR, 1); lx_init_xilinx_test() 630 reg = lx_dsp_reg_read(chip, eReg_CSM); lx_init_xilinx_test() 632 dev_err(chip->card->dev, "Error: Reg_CSM %x.\n", reg); lx_init_xilinx_test() 637 dev_dbg(chip->card->dev, "Xilinx/MicroBlaze access test successful\n"); lx_init_xilinx_test() 643 static int lx_init_ethersound_config(struct lx6464es *chip) lx_init_ethersound_config() argument 646 u32 orig_conf_es = lx_dsp_reg_read(chip, eReg_CONFES); lx_init_ethersound_config() 654 dev_dbg(chip->card->dev, "->lx_init_ethersound\n"); lx_init_ethersound_config() 656 chip->freq_ratio = FREQ_RATIO_SINGLE_MODE; lx_init_ethersound_config() 664 lx_dsp_reg_write(chip, eReg_CONFES, conf_es); lx_init_ethersound_config() 667 if (lx_dsp_reg_read(chip, eReg_CSES) & 4) { lx_init_ethersound_config() 668 dev_dbg(chip->card->dev, "ethersound initialized after %dms\n", lx_init_ethersound_config() 674 dev_warn(chip->card->dev, lx_init_ethersound_config() 679 dev_dbg(chip->card->dev, "ethersound initialized\n"); lx_init_ethersound_config() 683 static int lx_init_get_version_features(struct lx6464es *chip) lx_init_get_version_features() argument 689 dev_dbg(chip->card->dev, "->lx_init_get_version_features\n"); lx_init_get_version_features() 691 err = lx_dsp_get_version(chip, &dsp_version); lx_init_get_version_features() 696 dev_info(chip->card->dev, "DSP version: V%02d.%02d #%d\n", lx_init_get_version_features() 708 err = lx_dsp_get_clock_frequency(chip, &freq); lx_init_get_version_features() 710 chip->board_sample_rate = freq; lx_init_get_version_features() 711 dev_dbg(chip->card->dev, "actual clock frequency %d\n", freq); lx_init_get_version_features() 713 dev_err(chip->card->dev, "DSP corrupted \n"); lx_init_get_version_features() 720 static int lx_set_granularity(struct lx6464es *chip, u32 gran) lx_set_granularity() argument 725 dev_dbg(chip->card->dev, "->lx_set_granularity\n"); lx_set_granularity() 733 if (snapped_gran == chip->pcm_granularity) lx_set_granularity() 736 err = lx_dsp_set_granularity(chip, snapped_gran); lx_set_granularity() 738 dev_warn(chip->card->dev, "could not set granularity\n"); lx_set_granularity() 743 dev_err(chip->card->dev, "snapped blocksize to %d\n", snapped_gran); lx_set_granularity() 745 dev_dbg(chip->card->dev, "set blocksize on board %d\n", snapped_gran); lx_set_granularity() 746 chip->pcm_granularity = snapped_gran; lx_set_granularity() 751 /* initialize and test the xilinx dsp chip */ lx_init_dsp() 752 static int lx_init_dsp(struct lx6464es *chip) lx_init_dsp() argument 757 dev_dbg(chip->card->dev, "->lx_init_dsp\n"); lx_init_dsp() 759 dev_dbg(chip->card->dev, "initialize board\n"); lx_init_dsp() 760 err = lx_init_xilinx_reset(chip); lx_init_dsp() 764 dev_dbg(chip->card->dev, "testing board\n"); lx_init_dsp() 765 err = lx_init_xilinx_test(chip); lx_init_dsp() 769 dev_dbg(chip->card->dev, "initialize ethersound configuration\n"); lx_init_dsp() 770 err = lx_init_ethersound_config(chip); lx_init_dsp() 774 lx_irq_enable(chip); lx_init_dsp() 779 err = lx_dsp_get_mac(chip); lx_init_dsp() 782 if (chip->mac_address[0] || chip->mac_address[1] || chip->mac_address[2] || lx_init_dsp() 783 chip->mac_address[3] || chip->mac_address[4] || chip->mac_address[5]) lx_init_dsp() 790 dev_dbg(chip->card->dev, "mac address ready read after: %dms\n", i); lx_init_dsp() 791 dev_info(chip->card->dev, lx_init_dsp() 793 chip->mac_address[0], chip->mac_address[1], chip->mac_address[2], lx_init_dsp() 794 chip->mac_address[3], chip->mac_address[4], chip->mac_address[5]); lx_init_dsp() 796 err = lx_init_get_version_features(chip); lx_init_dsp() 800 lx_set_granularity(chip, MICROBLAZE_IBL_DEFAULT); lx_init_dsp() 802 chip->playback_mute = 0; lx_init_dsp() 829 static int lx_pcm_create(struct lx6464es *chip) lx_pcm_create() argument 843 err = snd_pcm_new(chip->card, (char *)card_name, 0, lx_pcm_create() 848 pcm->private_data = chip; lx_pcm_create() 858 snd_dma_pci_data(chip->pci), lx_pcm_create() 863 chip->pcm = pcm; lx_pcm_create() 864 chip->capture_stream.is_capture = 1; lx_pcm_create() 882 struct lx6464es *chip = snd_kcontrol_chip(kcontrol); lx_control_playback_get() local 883 ucontrol->value.integer.value[0] = chip->playback_mute; lx_control_playback_get() 890 struct lx6464es *chip = snd_kcontrol_chip(kcontrol); lx_control_playback_put() local 892 int current_value = chip->playback_mute; lx_control_playback_put() 895 lx_level_unmute(chip, 0, !current_value); lx_control_playback_put() 896 chip->playback_mute = !current_value; lx_control_playback_put() 921 struct lx6464es *chip = entry->private_data; lx_proc_levels_read() local 924 err = lx_level_peaks(chip, 1, 64, levels); lx_proc_levels_read() 936 err = lx_level_peaks(chip, 0, 64, levels); lx_proc_levels_read() 949 static int lx_proc_create(struct snd_card *card, struct lx6464es *chip) lx_proc_create() argument 956 snd_info_set_text_ops(entry, chip, lx_proc_levels_read); lx_proc_create() 965 struct lx6464es *chip; snd_lx6464es_create() local 992 chip = kzalloc(sizeof(*chip), GFP_KERNEL); snd_lx6464es_create() 993 if (chip == NULL) { snd_lx6464es_create() 998 chip->card = card; snd_lx6464es_create() 999 chip->pci = pci; snd_lx6464es_create() 1000 chip->irq = -1; snd_lx6464es_create() 1003 mutex_init(&chip->lock); snd_lx6464es_create() 1004 mutex_init(&chip->msg_lock); snd_lx6464es_create() 1005 mutex_init(&chip->setup_mutex); snd_lx6464es_create() 1013 chip->port_plx = pci_resource_start(pci, 1); snd_lx6464es_create() 1014 chip->port_plx_remapped = ioport_map(chip->port_plx, snd_lx6464es_create() 1018 chip->port_dsp_bar = pci_ioremap_bar(pci, 2); snd_lx6464es_create() 1021 IRQF_SHARED, KBUILD_MODNAME, chip); snd_lx6464es_create() 1026 chip->irq = pci->irq; snd_lx6464es_create() 1028 err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops); snd_lx6464es_create() 1032 err = lx_init_dsp(chip); snd_lx6464es_create() 1038 err = lx_pcm_create(chip); snd_lx6464es_create() 1042 err = lx_proc_create(card, chip); snd_lx6464es_create() 1047 chip)); snd_lx6464es_create() 1051 *rchip = chip; snd_lx6464es_create() 1055 free_irq(pci->irq, chip); snd_lx6464es_create() 1061 kfree(chip); snd_lx6464es_create() 1074 struct lx6464es *chip; snd_lx6464es_probe() local 1091 err = snd_lx6464es_create(card, pci, &chip); snd_lx6464es_probe() 1099 chip->mac_address[3], chip->mac_address[4], chip->mac_address[5]); snd_lx6464es_probe() 1102 chip->mac_address[0], chip->mac_address[1], chip->mac_address[2], snd_lx6464es_probe() 1103 chip->mac_address[3], chip->mac_address[4], chip->mac_address[5]); snd_lx6464es_probe() 1106 card->shortname, chip->port_plx, snd_lx6464es_probe() 1107 chip->port_dsp_bar, chip->irq); snd_lx6464es_probe() 1113 dev_dbg(chip->card->dev, "initialization successful\n"); snd_lx6464es_probe()
/linux-4.1.27/sound/isa/es1688/
H A D	es1688_lib.c	3 * Routines for control of ESS ES1688/688/488 chip 39 static int snd_es1688_dsp_command(struct snd_es1688 *chip, unsigned char val) snd_es1688_dsp_command() argument 44 if ((inb(ES1688P(chip, STATUS)) & 0x80) == 0) { snd_es1688_dsp_command() 45 outb(val, ES1688P(chip, COMMAND)); snd_es1688_dsp_command() 54 static int snd_es1688_dsp_get_byte(struct snd_es1688 *chip) snd_es1688_dsp_get_byte() argument 59 if (inb(ES1688P(chip, DATA_AVAIL)) & 0x80) snd_es1688_dsp_get_byte() 60 return inb(ES1688P(chip, READ)); snd_es1688_dsp_get_byte() 61 snd_printd("es1688 get byte failed: 0x%lx = 0x%x!!!\n", ES1688P(chip, DATA_AVAIL), inb(ES1688P(chip, DATA_AVAIL))); snd_es1688_dsp_get_byte() 65 static int snd_es1688_write(struct snd_es1688 *chip, snd_es1688_write() argument 68 if (!snd_es1688_dsp_command(chip, reg)) snd_es1688_write() 70 return snd_es1688_dsp_command(chip, data); snd_es1688_write() 73 static int snd_es1688_read(struct snd_es1688 *chip, unsigned char reg) snd_es1688_read() argument 76 if (!snd_es1688_dsp_command(chip, 0xc0)) snd_es1688_read() 78 if (!snd_es1688_dsp_command(chip, reg)) snd_es1688_read() 80 return snd_es1688_dsp_get_byte(chip); snd_es1688_read() 83 void snd_es1688_mixer_write(struct snd_es1688 *chip, snd_es1688_mixer_write() argument 86 outb(reg, ES1688P(chip, MIXER_ADDR)); snd_es1688_mixer_write() 88 outb(data, ES1688P(chip, MIXER_DATA)); snd_es1688_mixer_write() 92 static unsigned char snd_es1688_mixer_read(struct snd_es1688 *chip, unsigned char reg) snd_es1688_mixer_read() argument 96 outb(reg, ES1688P(chip, MIXER_ADDR)); snd_es1688_mixer_read() 98 result = inb(ES1688P(chip, MIXER_DATA)); snd_es1688_mixer_read() 103 int snd_es1688_reset(struct snd_es1688 *chip) snd_es1688_reset() argument 107 outb(3, ES1688P(chip, RESET)); /* valid only for ESS chips, SB -> 1 */ snd_es1688_reset() 109 outb(0, ES1688P(chip, RESET)); snd_es1688_reset() 111 for (i = 0; i < 1000 && !(inb(ES1688P(chip, DATA_AVAIL)) & 0x80); i++); snd_es1688_reset() 112 if (inb(ES1688P(chip, READ)) != 0xaa) { snd_es1688_reset() 113 snd_printd("ess_reset at 0x%lx: failed!!!\n", chip->port); snd_es1688_reset() 116 snd_es1688_dsp_command(chip, 0xc6); /* enable extended mode */ snd_es1688_reset() 121 static int snd_es1688_probe(struct snd_es1688 *chip) snd_es1688_probe() argument 131 spin_lock_irqsave(&chip->reg_lock, flags); /* Some ESS1688 cards need this */ snd_es1688_probe() 132 inb(ES1688P(chip, ENABLE1)); /* ENABLE1 */ snd_es1688_probe() 133 inb(ES1688P(chip, ENABLE1)); /* ENABLE1 */ snd_es1688_probe() 134 inb(ES1688P(chip, ENABLE1)); /* ENABLE1 */ snd_es1688_probe() 135 inb(ES1688P(chip, ENABLE2)); /* ENABLE2 */ snd_es1688_probe() 136 inb(ES1688P(chip, ENABLE1)); /* ENABLE1 */ snd_es1688_probe() 137 inb(ES1688P(chip, ENABLE2)); /* ENABLE2 */ snd_es1688_probe() 138 inb(ES1688P(chip, ENABLE1)); /* ENABLE1 */ snd_es1688_probe() 139 inb(ES1688P(chip, ENABLE1)); /* ENABLE1 */ snd_es1688_probe() 140 inb(ES1688P(chip, ENABLE2)); /* ENABLE2 */ snd_es1688_probe() 141 inb(ES1688P(chip, ENABLE1)); /* ENABLE1 */ snd_es1688_probe() 142 inb(ES1688P(chip, ENABLE0)); /* ENABLE0 */ snd_es1688_probe() 144 if (snd_es1688_reset(chip) < 0) { snd_es1688_probe() 145 snd_printdd("ESS: [0x%lx] reset failed... 0x%x\n", chip->port, inb(ES1688P(chip, READ))); snd_es1688_probe() 146 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_es1688_probe() 149 snd_es1688_dsp_command(chip, 0xe7); /* return identification */ snd_es1688_probe() 152 if (inb(ES1688P(chip, DATA_AVAIL)) & 0x80) { snd_es1688_probe() 154 major = inb(ES1688P(chip, READ)); snd_es1688_probe() 156 minor = inb(ES1688P(chip, READ)); snd_es1688_probe() 161 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_es1688_probe() 163 snd_printdd("ESS: [0x%lx] found.. major = 0x%x, minor = 0x%x\n", chip->port, major, minor); snd_es1688_probe() 165 chip->version = (major << 8) | minor; snd_es1688_probe() 166 if (!chip->version) snd_es1688_probe() 170 switch (chip->version & 0xfff0) { snd_es1688_probe() 173 "but driver is in another place\n", chip->port); snd_es1688_probe() 176 hw = (chip->version & 0x0f) >= 8 ? ES1688_HW_1688 : ES1688_HW_688; snd_es1688_probe() 179 snd_printk(KERN_ERR "[0x%lx] ESS: unknown AudioDrive chip " snd_es1688_probe() 181 chip->port, chip->version); snd_es1688_probe() 185 spin_lock_irqsave(&chip->reg_lock, flags); snd_es1688_probe() 186 snd_es1688_write(chip, 0xb1, 0x10); /* disable IRQ */ snd_es1688_probe() 187 snd_es1688_write(chip, 0xb2, 0x00); /* disable DMA */ snd_es1688_probe() 188 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_es1688_probe() 191 spin_lock_irqsave(&chip->mixer_lock, flags); snd_es1688_probe() 192 snd_es1688_mixer_write(chip, 0x40, 0x01); snd_es1688_probe() 193 spin_unlock_irqrestore(&chip->mixer_lock, flags); snd_es1688_probe() 198 static int snd_es1688_init(struct snd_es1688 * chip, int enable) snd_es1688_init() argument 206 if (enable && chip->mpu_port >= 0x300 && chip->mpu_irq > 0 && chip->hardware != ES1688_HW_688) { snd_es1688_init() 207 tmp = (chip->mpu_port & 0x0f0) >> 4; snd_es1688_init() 209 switch (chip->mpu_irq) { snd_es1688_init() 233 spin_lock_irqsave(&chip->reg_lock, flags); snd_es1688_init() 234 snd_es1688_mixer_write(chip, 0x40, cfg); snd_es1688_init() 235 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_es1688_init() 237 spin_lock_irqsave(&chip->reg_lock, flags); snd_es1688_init() 238 snd_es1688_read(chip, 0xb1); snd_es1688_init() 239 snd_es1688_read(chip, 0xb2); snd_es1688_init() 240 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_es1688_init() 243 irq_bits = irqs[chip->irq & 0x0f]; snd_es1688_init() 246 "for ES1688 chip!!\n", snd_es1688_init() 247 chip->port, chip->irq); snd_es1688_init() 254 spin_lock_irqsave(&chip->reg_lock, flags); snd_es1688_init() 255 snd_es1688_write(chip, 0xb1, cfg | (irq_bits << 2)); snd_es1688_init() 256 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_es1688_init() 258 dma = chip->dma8; snd_es1688_init() 261 "for ES1688 chip!!\n", chip->port, dma); snd_es1688_init() 272 spin_lock_irqsave(&chip->reg_lock, flags); snd_es1688_init() 273 snd_es1688_write(chip, 0xb2, cfg | (dma_bits << 2)); snd_es1688_init() 274 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_es1688_init() 276 spin_lock_irqsave(&chip->reg_lock, flags); snd_es1688_init() 277 snd_es1688_write(chip, 0xb1, 0x10); /* disable IRQ */ snd_es1688_init() 278 snd_es1688_write(chip, 0xb2, 0x00); /* disable DMA */ snd_es1688_init() 279 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_es1688_init() 281 spin_lock_irqsave(&chip->reg_lock, flags); snd_es1688_init() 282 snd_es1688_read(chip, 0xb1); snd_es1688_init() 283 snd_es1688_read(chip, 0xb2); snd_es1688_init() 284 snd_es1688_reset(chip); snd_es1688_init() 285 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_es1688_init() 313 static void snd_es1688_set_rate(struct snd_es1688 *chip, struct snd_pcm_substream *substream) snd_es1688_set_rate() argument 325 snd_es1688_write(chip, 0xa1, bits); snd_es1688_set_rate() 326 snd_es1688_write(chip, 0xa2, divider); snd_es1688_set_rate() 335 static int snd_es1688_trigger(struct snd_es1688 *chip, int cmd, unsigned char value) snd_es1688_trigger() argument 344 spin_lock(&chip->reg_lock); snd_es1688_trigger() 345 chip->trigger_value = value; snd_es1688_trigger() 346 val = snd_es1688_read(chip, 0xb8); snd_es1688_trigger() 348 spin_unlock(&chip->reg_lock); snd_es1688_trigger() 354 snd_dma_pointer(chip->dma8, chip->dma_size)); snd_es1688_trigger() 356 snd_es1688_write(chip, 0xb8, (val & 0xf0) | value); snd_es1688_trigger() 357 spin_unlock(&chip->reg_lock); snd_es1688_trigger() 375 struct snd_es1688 *chip = snd_pcm_substream_chip(substream); snd_es1688_playback_prepare() local 380 chip->dma_size = size; snd_es1688_playback_prepare() 381 spin_lock_irqsave(&chip->reg_lock, flags); snd_es1688_playback_prepare() 382 snd_es1688_reset(chip); snd_es1688_playback_prepare() 383 snd_es1688_set_rate(chip, substream); snd_es1688_playback_prepare() 384 snd_es1688_write(chip, 0xb8, 4); /* auto init DMA mode */ snd_es1688_playback_prepare() 385 snd_es1688_write(chip, 0xa8, (snd_es1688_read(chip, 0xa8) & ~0x03) | (3 - runtime->channels)); snd_es1688_playback_prepare() 386 snd_es1688_write(chip, 0xb9, 2); /* demand mode (4 bytes/request) */ snd_es1688_playback_prepare() 390 snd_es1688_write(chip, 0xb6, 0x80); snd_es1688_playback_prepare() 391 snd_es1688_write(chip, 0xb7, 0x51); snd_es1688_playback_prepare() 392 snd_es1688_write(chip, 0xb7, 0xd0); snd_es1688_playback_prepare() 395 snd_es1688_write(chip, 0xb6, 0x00); snd_es1688_playback_prepare() 396 snd_es1688_write(chip, 0xb7, 0x71); snd_es1688_playback_prepare() 397 snd_es1688_write(chip, 0xb7, 0xf4); snd_es1688_playback_prepare() 402 snd_es1688_write(chip, 0xb6, 0x80); snd_es1688_playback_prepare() 403 snd_es1688_write(chip, 0xb7, 0x51); snd_es1688_playback_prepare() 404 snd_es1688_write(chip, 0xb7, 0x98); snd_es1688_playback_prepare() 407 snd_es1688_write(chip, 0xb6, 0x00); snd_es1688_playback_prepare() 408 snd_es1688_write(chip, 0xb7, 0x71); snd_es1688_playback_prepare() 409 snd_es1688_write(chip, 0xb7, 0xbc); snd_es1688_playback_prepare() 412 snd_es1688_write(chip, 0xb1, (snd_es1688_read(chip, 0xb1) & 0x0f) | 0x50); snd_es1688_playback_prepare() 413 snd_es1688_write(chip, 0xb2, (snd_es1688_read(chip, 0xb2) & 0x0f) | 0x50); snd_es1688_playback_prepare() 414 snd_es1688_dsp_command(chip, ES1688_DSP_CMD_SPKON); snd_es1688_playback_prepare() 415 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_es1688_playback_prepare() 418 snd_dma_program(chip->dma8, runtime->dma_addr, size, DMA_MODE_WRITE | DMA_AUTOINIT); snd_es1688_playback_prepare() 419 spin_lock_irqsave(&chip->reg_lock, flags); snd_es1688_playback_prepare() 420 snd_es1688_write(chip, 0xa4, (unsigned char) count); snd_es1688_playback_prepare() 421 snd_es1688_write(chip, 0xa5, (unsigned char) (count >> 8)); snd_es1688_playback_prepare() 422 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_es1688_playback_prepare() 429 struct snd_es1688 *chip = snd_pcm_substream_chip(substream); snd_es1688_playback_trigger() local 430 return snd_es1688_trigger(chip, cmd, 0x05); snd_es1688_playback_trigger() 436 struct snd_es1688 *chip = snd_pcm_substream_chip(substream); snd_es1688_capture_prepare() local 441 chip->dma_size = size; snd_es1688_capture_prepare() 442 spin_lock_irqsave(&chip->reg_lock, flags); snd_es1688_capture_prepare() 443 snd_es1688_reset(chip); snd_es1688_capture_prepare() 444 snd_es1688_set_rate(chip, substream); snd_es1688_capture_prepare() 445 snd_es1688_dsp_command(chip, ES1688_DSP_CMD_SPKOFF); snd_es1688_capture_prepare() 446 snd_es1688_write(chip, 0xb8, 0x0e); /* auto init DMA mode */ snd_es1688_capture_prepare() 447 snd_es1688_write(chip, 0xa8, (snd_es1688_read(chip, 0xa8) & ~0x03) | (3 - runtime->channels)); snd_es1688_capture_prepare() 448 snd_es1688_write(chip, 0xb9, 2); /* demand mode (4 bytes/request) */ snd_es1688_capture_prepare() 452 snd_es1688_write(chip, 0xb7, 0x51); snd_es1688_capture_prepare() 453 snd_es1688_write(chip, 0xb7, 0xd0); snd_es1688_capture_prepare() 456 snd_es1688_write(chip, 0xb7, 0x71); snd_es1688_capture_prepare() 457 snd_es1688_write(chip, 0xb7, 0xf4); snd_es1688_capture_prepare() 462 snd_es1688_write(chip, 0xb7, 0x51); snd_es1688_capture_prepare() 463 snd_es1688_write(chip, 0xb7, 0x98); snd_es1688_capture_prepare() 466 snd_es1688_write(chip, 0xb7, 0x71); snd_es1688_capture_prepare() 467 snd_es1688_write(chip, 0xb7, 0xbc); snd_es1688_capture_prepare() 470 snd_es1688_write(chip, 0xb1, (snd_es1688_read(chip, 0xb1) & 0x0f) | 0x50); snd_es1688_capture_prepare() 471 snd_es1688_write(chip, 0xb2, (snd_es1688_read(chip, 0xb2) & 0x0f) | 0x50); snd_es1688_capture_prepare() 472 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_es1688_capture_prepare() 475 snd_dma_program(chip->dma8, runtime->dma_addr, size, DMA_MODE_READ | DMA_AUTOINIT); snd_es1688_capture_prepare() 476 spin_lock_irqsave(&chip->reg_lock, flags); snd_es1688_capture_prepare() 477 snd_es1688_write(chip, 0xa4, (unsigned char) count); snd_es1688_capture_prepare() 478 snd_es1688_write(chip, 0xa5, (unsigned char) (count >> 8)); snd_es1688_capture_prepare() 479 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_es1688_capture_prepare() 486 struct snd_es1688 *chip = snd_pcm_substream_chip(substream); snd_es1688_capture_trigger() local 487 return snd_es1688_trigger(chip, cmd, 0x0f); snd_es1688_capture_trigger() 492 struct snd_es1688 *chip = dev_id; snd_es1688_interrupt() local 494 if (chip->trigger_value == 0x05) /* ok.. playback is active */ snd_es1688_interrupt() 495 snd_pcm_period_elapsed(chip->playback_substream); snd_es1688_interrupt() 496 if (chip->trigger_value == 0x0f) /* ok.. capture is active */ snd_es1688_interrupt() 497 snd_pcm_period_elapsed(chip->capture_substream); snd_es1688_interrupt() 499 inb(ES1688P(chip, DATA_AVAIL)); /* ack interrupt */ snd_es1688_interrupt() 505 struct snd_es1688 *chip = snd_pcm_substream_chip(substream); snd_es1688_playback_pointer() local 508 if (chip->trigger_value != 0x05) snd_es1688_playback_pointer() 510 ptr = snd_dma_pointer(chip->dma8, chip->dma_size); snd_es1688_playback_pointer() 516 struct snd_es1688 *chip = snd_pcm_substream_chip(substream); snd_es1688_capture_pointer() local 519 if (chip->trigger_value != 0x0f) snd_es1688_capture_pointer() 521 ptr = snd_dma_pointer(chip->dma8, chip->dma_size); snd_es1688_capture_pointer() 571 struct snd_es1688 *chip = snd_pcm_substream_chip(substream); snd_es1688_playback_open() local 574 if (chip->capture_substream != NULL) snd_es1688_playback_open() 576 chip->playback_substream = substream; snd_es1688_playback_open() 585 struct snd_es1688 *chip = snd_pcm_substream_chip(substream); snd_es1688_capture_open() local 588 if (chip->playback_substream != NULL) snd_es1688_capture_open() 590 chip->capture_substream = substream; snd_es1688_capture_open() 599 struct snd_es1688 *chip = snd_pcm_substream_chip(substream); snd_es1688_playback_close() local 601 chip->playback_substream = NULL; snd_es1688_playback_close() 607 struct snd_es1688 *chip = snd_pcm_substream_chip(substream); snd_es1688_capture_close() local 609 chip->capture_substream = NULL; snd_es1688_capture_close() 613 static int snd_es1688_free(struct snd_es1688 *chip) snd_es1688_free() argument 615 if (chip->hardware != ES1688_HW_UNDEF) snd_es1688_free() 616 snd_es1688_init(chip, 0); snd_es1688_free() 617 release_and_free_resource(chip->res_port); snd_es1688_free() 618 if (chip->irq >= 0) snd_es1688_free() 619 free_irq(chip->irq, (void *) chip); snd_es1688_free() 620 if (chip->dma8 >= 0) { snd_es1688_free() 621 disable_dma(chip->dma8); snd_es1688_free() 622 free_dma(chip->dma8); snd_es1688_free() 629 struct snd_es1688 *chip = device->device_data; snd_es1688_dev_free() local 630 return snd_es1688_free(chip); snd_es1688_dev_free() 633 static const char *snd_es1688_chip_id(struct snd_es1688 *chip) snd_es1688_chip_id() argument 636 sprintf(tmp, "ES%s688 rev %i", chip->hardware == ES1688_HW_688 ? "" : "1", chip->version & 0x0f); snd_es1688_chip_id() 641 struct snd_es1688 *chip, snd_es1688_create() 655 if (chip == NULL) snd_es1688_create() 657 chip->irq = -1; snd_es1688_create() 658 chip->dma8 = -1; snd_es1688_create() 659 chip->hardware = ES1688_HW_UNDEF; snd_es1688_create() 661 chip->res_port = request_region(port + 4, 12, "ES1688"); snd_es1688_create() 662 if (chip->res_port == NULL) { snd_es1688_create() 668 err = request_irq(irq, snd_es1688_interrupt, 0, "ES1688", (void *) chip); snd_es1688_create() 674 chip->irq = irq; snd_es1688_create() 681 chip->dma8 = dma8; snd_es1688_create() 683 spin_lock_init(&chip->reg_lock); snd_es1688_create() 684 spin_lock_init(&chip->mixer_lock); snd_es1688_create() 685 chip->port = port; snd_es1688_create() 689 chip->mpu_port = mpu_port; snd_es1688_create() 690 chip->mpu_irq = mpu_irq; snd_es1688_create() 691 chip->hardware = hardware; snd_es1688_create() 693 err = snd_es1688_probe(chip); snd_es1688_create() 697 err = snd_es1688_init(chip, 1); snd_es1688_create() 702 err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops); snd_es1688_create() 705 snd_es1688_free(chip); snd_es1688_create() 731 int snd_es1688_pcm(struct snd_card *card, struct snd_es1688 *chip, int device) snd_es1688_pcm() argument 743 pcm->private_data = chip; snd_es1688_pcm() 745 sprintf(pcm->name, snd_es1688_chip_id(chip)); snd_es1688_pcm() 746 chip->pcm = pcm; snd_es1688_pcm() 770 struct snd_es1688 *chip = snd_kcontrol_chip(kcontrol); snd_es1688_get_mux() local 771 ucontrol->value.enumerated.item[0] = snd_es1688_mixer_read(chip, ES1688_REC_DEV) & 7; snd_es1688_get_mux() 777 struct snd_es1688 *chip = snd_kcontrol_chip(kcontrol); snd_es1688_put_mux() local 784 spin_lock_irqsave(&chip->reg_lock, flags); snd_es1688_put_mux() 785 oval = snd_es1688_mixer_read(chip, ES1688_REC_DEV); snd_es1688_put_mux() 789 snd_es1688_mixer_write(chip, ES1688_REC_DEV, nval); snd_es1688_put_mux() 790 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_es1688_put_mux() 813 struct snd_es1688 *chip = snd_kcontrol_chip(kcontrol); snd_es1688_get_single() local 820 spin_lock_irqsave(&chip->reg_lock, flags); snd_es1688_get_single() 821 ucontrol->value.integer.value[0] = (snd_es1688_mixer_read(chip, reg) >> shift) & mask; snd_es1688_get_single() 822 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_es1688_get_single() 830 struct snd_es1688 *chip = snd_kcontrol_chip(kcontrol); snd_es1688_put_single() local 843 spin_lock_irqsave(&chip->reg_lock, flags); snd_es1688_put_single() 844 oval = snd_es1688_mixer_read(chip, reg); snd_es1688_put_single() 848 snd_es1688_mixer_write(chip, reg, nval); snd_es1688_put_single() 849 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_es1688_put_single() 872 struct snd_es1688 *chip = snd_kcontrol_chip(kcontrol); snd_es1688_get_double() local 882 spin_lock_irqsave(&chip->reg_lock, flags); snd_es1688_get_double() 884 left = snd_es1688_mixer_read(chip, left_reg); snd_es1688_get_double() 886 left = snd_es1688_read(chip, left_reg); snd_es1688_get_double() 889 right = snd_es1688_mixer_read(chip, right_reg); snd_es1688_get_double() 891 right = snd_es1688_read(chip, right_reg); snd_es1688_get_double() 894 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_es1688_get_double() 906 struct snd_es1688 *chip = snd_kcontrol_chip(kcontrol); snd_es1688_put_double() local 925 spin_lock_irqsave(&chip->reg_lock, flags); snd_es1688_put_double() 928 oval1 = snd_es1688_mixer_read(chip, left_reg); snd_es1688_put_double() 930 oval1 = snd_es1688_read(chip, left_reg); snd_es1688_put_double() 932 oval2 = snd_es1688_mixer_read(chip, right_reg); snd_es1688_put_double() 934 oval2 = snd_es1688_read(chip, right_reg); snd_es1688_put_double() 940 snd_es1688_mixer_write(chip, left_reg, val1); snd_es1688_put_double() 942 snd_es1688_write(chip, left_reg, val1); snd_es1688_put_double() 944 snd_es1688_mixer_write(chip, right_reg, val1); snd_es1688_put_double() 946 snd_es1688_write(chip, right_reg, val1); snd_es1688_put_double() 950 oval1 = snd_es1688_mixer_read(chip, left_reg); snd_es1688_put_double() 952 oval1 = snd_es1688_read(chip, left_reg); snd_es1688_put_double() 957 snd_es1688_mixer_write(chip, left_reg, val1); snd_es1688_put_double() 959 snd_es1688_write(chip, left_reg, val1); snd_es1688_put_double() 963 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_es1688_put_double() 1002 int snd_es1688_mixer(struct snd_card *card, struct snd_es1688 *chip) snd_es1688_mixer() argument 1008 if (snd_BUG_ON(!chip || !card)) snd_es1688_mixer() 1011 strcpy(card->mixername, snd_es1688_chip_id(chip)); snd_es1688_mixer() 1014 if ((err = snd_ctl_add(card, snd_ctl_new1(&snd_es1688_controls[idx], chip))) < 0) snd_es1688_mixer() 1021 snd_es1688_mixer_write(chip, reg, val); snd_es1688_mixer() 1023 snd_es1688_write(chip, reg, val); snd_es1688_mixer() 640 snd_es1688_create(struct snd_card *card, struct snd_es1688 *chip, unsigned long port, unsigned long mpu_port, int irq, int mpu_irq, int dma8, unsigned short hardware) snd_es1688_create() argument
/linux-4.1.27/drivers/staging/iio/light/
H A D	isl29028.c	83 static int isl29028_set_proxim_sampling(struct isl29028_chip *chip, isl29028_set_proxim_sampling() argument 94 return regmap_update_bits(chip->regmap, ISL29028_REG_CONFIGURE, isl29028_set_proxim_sampling() 98 static int isl29028_enable_proximity(struct isl29028_chip *chip, bool enable) isl29028_enable_proximity() argument 105 ret = regmap_update_bits(chip->regmap, ISL29028_REG_CONFIGURE, isl29028_enable_proximity() 111 mdelay(DIV_ROUND_UP(1000, chip->prox_sampling)); isl29028_enable_proximity() 115 static int isl29028_set_als_scale(struct isl29028_chip *chip, int lux_scale) isl29028_set_als_scale() argument 120 return regmap_update_bits(chip->regmap, ISL29028_REG_CONFIGURE, isl29028_set_als_scale() 124 static int isl29028_set_als_ir_mode(struct isl29028_chip *chip, isl29028_set_als_ir_mode() argument 131 ret = regmap_update_bits(chip->regmap, ISL29028_REG_CONFIGURE, isl29028_set_als_ir_mode() 136 ret = regmap_update_bits(chip->regmap, ISL29028_REG_CONFIGURE, isl29028_set_als_ir_mode() 141 ret = regmap_update_bits(chip->regmap, ISL29028_REG_CONFIGURE, isl29028_set_als_ir_mode() 146 return regmap_update_bits(chip->regmap, ISL29028_REG_CONFIGURE, isl29028_set_als_ir_mode() 154 ret = regmap_update_bits(chip->regmap, ISL29028_REG_CONFIGURE, isl29028_set_als_ir_mode() 164 static int isl29028_read_als_ir(struct isl29028_chip *chip, int *als_ir) isl29028_read_als_ir() argument 170 ret = regmap_read(chip->regmap, ISL29028_REG_ALSIR_L, &lsb); isl29028_read_als_ir() 172 dev_err(chip->dev, isl29028_read_als_ir() 177 ret = regmap_read(chip->regmap, ISL29028_REG_ALSIR_U, &msb); isl29028_read_als_ir() 179 dev_err(chip->dev, isl29028_read_als_ir() 188 static int isl29028_read_proxim(struct isl29028_chip *chip, int *prox) isl29028_read_proxim() argument 193 ret = regmap_read(chip->regmap, ISL29028_REG_PROX_DATA, &data); isl29028_read_proxim() 195 dev_err(chip->dev, "Error in reading register %d, error %d\n", isl29028_read_proxim() 203 static int isl29028_proxim_get(struct isl29028_chip *chip, int *prox_data) isl29028_proxim_get() argument 207 if (!chip->enable_prox) { isl29028_proxim_get() 208 ret = isl29028_enable_proximity(chip, true); isl29028_proxim_get() 211 chip->enable_prox = true; isl29028_proxim_get() 213 return isl29028_read_proxim(chip, prox_data); isl29028_proxim_get() 216 static int isl29028_als_get(struct isl29028_chip *chip, int *als_data) isl29028_als_get() argument 221 if (chip->als_ir_mode != MODE_ALS) { isl29028_als_get() 222 ret = isl29028_set_als_ir_mode(chip, MODE_ALS); isl29028_als_get() 224 dev_err(chip->dev, isl29028_als_get() 228 chip->als_ir_mode = MODE_ALS; isl29028_als_get() 231 ret = isl29028_read_als_ir(chip, &als_ir_data); isl29028_als_get() 240 if (chip->lux_scale == 125) isl29028_als_get() 249 static int isl29028_ir_get(struct isl29028_chip *chip, int *ir_data) isl29028_ir_get() argument 253 if (chip->als_ir_mode != MODE_IR) { isl29028_ir_get() 254 ret = isl29028_set_als_ir_mode(chip, MODE_IR); isl29028_ir_get() 256 dev_err(chip->dev, isl29028_ir_get() 260 chip->als_ir_mode = MODE_IR; isl29028_ir_get() 262 return isl29028_read_als_ir(chip, ir_data); isl29028_ir_get() 269 struct isl29028_chip *chip = iio_priv(indio_dev); isl29028_write_raw() local 272 mutex_lock(&chip->lock); isl29028_write_raw() 276 dev_err(chip->dev, isl29028_write_raw() 282 dev_err(chip->dev, isl29028_write_raw() 286 ret = isl29028_set_proxim_sampling(chip, val); isl29028_write_raw() 288 dev_err(chip->dev, isl29028_write_raw() 293 chip->prox_sampling = val; isl29028_write_raw() 298 dev_err(chip->dev, isl29028_write_raw() 304 dev_err(chip->dev, isl29028_write_raw() 308 ret = isl29028_set_als_scale(chip, val); isl29028_write_raw() 310 dev_err(chip->dev, isl29028_write_raw() 314 chip->lux_scale = val; isl29028_write_raw() 318 dev_err(chip->dev, "Unsupported channel type\n"); isl29028_write_raw() 321 mutex_unlock(&chip->lock); isl29028_write_raw() 328 struct isl29028_chip *chip = iio_priv(indio_dev); isl29028_read_raw() local 331 mutex_lock(&chip->lock); isl29028_read_raw() 337 ret = isl29028_als_get(chip, val); isl29028_read_raw() 340 ret = isl29028_ir_get(chip, val); isl29028_read_raw() 343 ret = isl29028_proxim_get(chip, val); isl29028_read_raw() 356 *val = chip->prox_sampling; isl29028_read_raw() 363 *val = chip->lux_scale; isl29028_read_raw() 368 dev_err(chip->dev, "mask value 0x%08lx not supported\n", mask); isl29028_read_raw() 371 mutex_unlock(&chip->lock); isl29028_read_raw() 413 static int isl29028_chip_init(struct isl29028_chip *chip) isl29028_chip_init() argument 417 chip->enable_prox = false; isl29028_chip_init() 418 chip->prox_sampling = 20; isl29028_chip_init() 419 chip->lux_scale = 2000; isl29028_chip_init() 420 chip->als_ir_mode = MODE_NONE; isl29028_chip_init() 422 ret = regmap_write(chip->regmap, ISL29028_REG_TEST1_MODE, 0x0); isl29028_chip_init() 424 dev_err(chip->dev, "%s(): write to reg %d failed, err = %d\n", isl29028_chip_init() 428 ret = regmap_write(chip->regmap, ISL29028_REG_TEST2_MODE, 0x0); isl29028_chip_init() 430 dev_err(chip->dev, "%s(): write to reg %d failed, err = %d\n", isl29028_chip_init() 435 ret = regmap_write(chip->regmap, ISL29028_REG_CONFIGURE, 0x0); isl29028_chip_init() 437 dev_err(chip->dev, "%s(): write to reg %d failed, err = %d\n", isl29028_chip_init() 442 ret = isl29028_set_proxim_sampling(chip, chip->prox_sampling); isl29028_chip_init() 444 dev_err(chip->dev, "setting the proximity, err = %d\n", isl29028_chip_init() 449 ret = isl29028_set_als_scale(chip, chip->lux_scale); isl29028_chip_init() 451 dev_err(chip->dev, isl29028_chip_init() 481 struct isl29028_chip *chip; isl29028_probe() local 485 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*chip)); isl29028_probe() 491 chip = iio_priv(indio_dev); isl29028_probe() 494 chip->dev = &client->dev; isl29028_probe() 495 mutex_init(&chip->lock); isl29028_probe() 497 chip->regmap = devm_regmap_init_i2c(client, &isl29028_regmap_config); isl29028_probe() 498 if (IS_ERR(chip->regmap)) { isl29028_probe() 499 ret = PTR_ERR(chip->regmap); isl29028_probe() 500 dev_err(chip->dev, "regmap initialization failed: %d\n", ret); isl29028_probe() 504 ret = isl29028_chip_init(chip); isl29028_probe() 506 dev_err(chip->dev, "chip initialization failed: %d\n", ret); isl29028_probe() 518 dev_err(chip->dev, "iio registration fails with error %d\n", isl29028_probe()
H A D	tsl2x7x_core.c	341 struct tsl2X7X_chip *chip = iio_priv(indio_dev); tsl2x7x_get_lux() local 346 if (mutex_trylock(&chip->als_mutex) == 0) tsl2x7x_get_lux() 347 return chip->als_cur_info.lux; /* busy, so return LAST VALUE */ tsl2x7x_get_lux() 349 if (chip->tsl2x7x_chip_status != TSL2X7X_CHIP_WORKING) { tsl2x7x_get_lux() 351 dev_err(&chip->client->dev, "%s: device is not enabled\n", tsl2x7x_get_lux() 357 ret = tsl2x7x_i2c_read(chip->client, tsl2x7x_get_lux() 360 dev_err(&chip->client->dev, tsl2x7x_get_lux() 366 dev_err(&chip->client->dev, tsl2x7x_get_lux() 368 ret = chip->als_cur_info.lux; /* return LAST VALUE */ tsl2x7x_get_lux() 373 ret = tsl2x7x_i2c_read(chip->client, tsl2x7x_get_lux() 377 dev_err(&chip->client->dev, tsl2x7x_get_lux() 384 ret = i2c_smbus_write_byte(chip->client, tsl2x7x_get_lux() 389 dev_err(&chip->client->dev, tsl2x7x_get_lux() 398 chip->als_cur_info.als_ch0 = ch0; tsl2x7x_get_lux() 399 chip->als_cur_info.als_ch1 = ch1; tsl2x7x_get_lux() 401 if ((ch0 >= chip->als_saturation) || (ch1 >= chip->als_saturation)) { tsl2x7x_get_lux() 408 ret = chip->als_cur_info.lux; tsl2x7x_get_lux() 414 p = (struct tsl2x7x_lux *) chip->tsl2x7x_device_lux; tsl2x7x_get_lux() 422 tsl2X7X_als_gainadj[chip->tsl2x7x_settings.als_gain]); tsl2x7x_get_lux() 424 tsl2X7X_als_gainadj[chip->tsl2x7x_settings.als_gain]); tsl2x7x_get_lux() 430 dev_dbg(&chip->client->dev, "ch1lux > ch0lux-return last value\n"); tsl2x7x_get_lux() 431 ret = chip->als_cur_info.lux; tsl2x7x_get_lux() 436 if (chip->als_time_scale == 0) tsl2x7x_get_lux() 439 lux = (lux + (chip->als_time_scale >> 1)) / tsl2x7x_get_lux() 440 chip->als_time_scale; tsl2x7x_get_lux() 451 lux64 = lux64 * chip->tsl2x7x_settings.als_gain_trim; tsl2x7x_get_lux() 461 chip->als_cur_info.lux = lux; tsl2x7x_get_lux() 465 mutex_unlock(&chip->als_mutex); tsl2x7x_get_lux() 472 * chip->prox_data. 482 struct tsl2X7X_chip *chip = iio_priv(indio_dev); tsl2x7x_get_prox() local 484 if (mutex_trylock(&chip->prox_mutex) == 0) { tsl2x7x_get_prox() 485 dev_err(&chip->client->dev, tsl2x7x_get_prox() 490 ret = tsl2x7x_i2c_read(chip->client, tsl2x7x_get_prox() 493 dev_err(&chip->client->dev, "i2c err=%d\n", ret); tsl2x7x_get_prox() 497 switch (chip->id) { tsl2x7x_get_prox() 517 ret = tsl2x7x_i2c_read(chip->client, tsl2x7x_get_prox() 524 chip->prox_data = tsl2x7x_get_prox() 529 mutex_unlock(&chip->prox_mutex); tsl2x7x_get_prox() 531 return chip->prox_data; tsl2x7x_get_prox() 539 * @chip: pointer to device structure. 541 static void tsl2x7x_defaults(struct tsl2X7X_chip *chip) tsl2x7x_defaults() argument 544 if (chip->pdata && chip->pdata->platform_default_settings) tsl2x7x_defaults() 545 memcpy(&(chip->tsl2x7x_settings), tsl2x7x_defaults() 546 chip->pdata->platform_default_settings, tsl2x7x_defaults() 549 memcpy(&(chip->tsl2x7x_settings), tsl2x7x_defaults() 554 if (chip->pdata && chip->pdata->platform_lux_table[0].ratio != 0) tsl2x7x_defaults() 555 memcpy(chip->tsl2x7x_device_lux, tsl2x7x_defaults() 556 chip->pdata->platform_lux_table, tsl2x7x_defaults() 557 sizeof(chip->pdata->platform_lux_table)); tsl2x7x_defaults() 559 memcpy(chip->tsl2x7x_device_lux, tsl2x7x_defaults() 560 (struct tsl2x7x_lux *)tsl2x7x_default_lux_table_group[chip->id], tsl2x7x_defaults() 572 struct tsl2X7X_chip *chip = iio_priv(indio_dev); tsl2x7x_als_calibrate() local 578 ret = i2c_smbus_write_byte(chip->client, tsl2x7x_als_calibrate() 581 dev_err(&chip->client->dev, tsl2x7x_als_calibrate() 586 reg_val = i2c_smbus_read_byte(chip->client); tsl2x7x_als_calibrate() 589 dev_err(&chip->client->dev, tsl2x7x_als_calibrate() 594 ret = i2c_smbus_write_byte(chip->client, tsl2x7x_als_calibrate() 597 dev_err(&chip->client->dev, tsl2x7x_als_calibrate() 602 reg_val = i2c_smbus_read_byte(chip->client); tsl2x7x_als_calibrate() 604 dev_err(&chip->client->dev, tsl2x7x_als_calibrate() 611 dev_err(&chip->client->dev, tsl2x7x_als_calibrate() 616 gain_trim_val = ((chip->tsl2x7x_settings.als_cal_target) tsl2x7x_als_calibrate() 617 * chip->tsl2x7x_settings.als_gain_trim) / lux_val; tsl2x7x_als_calibrate() 621 chip->tsl2x7x_settings.als_gain_trim = gain_trim_val; tsl2x7x_als_calibrate() 622 dev_info(&chip->client->dev, tsl2x7x_als_calibrate() 623 "%s als_calibrate completed\n", chip->client->name); tsl2x7x_als_calibrate() 636 struct tsl2X7X_chip *chip = iio_priv(indio_dev); tsl2x7x_chip_on() local 639 if (chip->pdata && chip->pdata->power_on) tsl2x7x_chip_on() 640 chip->pdata->power_on(indio_dev); tsl2x7x_chip_on() 643 chip->tsl2x7x_config[TSL2X7X_PRX_TIME] = tsl2x7x_chip_on() 644 chip->tsl2x7x_settings.prx_time; tsl2x7x_chip_on() 645 chip->tsl2x7x_config[TSL2X7X_WAIT_TIME] = tsl2x7x_chip_on() 646 chip->tsl2x7x_settings.wait_time; tsl2x7x_chip_on() 647 chip->tsl2x7x_config[TSL2X7X_PRX_CONFIG] = tsl2x7x_chip_on() 648 chip->tsl2x7x_settings.prox_config; tsl2x7x_chip_on() 650 chip->tsl2x7x_config[TSL2X7X_ALS_MINTHRESHLO] = tsl2x7x_chip_on() 651 (chip->tsl2x7x_settings.als_thresh_low) & 0xFF; tsl2x7x_chip_on() 652 chip->tsl2x7x_config[TSL2X7X_ALS_MINTHRESHHI] = tsl2x7x_chip_on() 653 (chip->tsl2x7x_settings.als_thresh_low >> 8) & 0xFF; tsl2x7x_chip_on() 654 chip->tsl2x7x_config[TSL2X7X_ALS_MAXTHRESHLO] = tsl2x7x_chip_on() 655 (chip->tsl2x7x_settings.als_thresh_high) & 0xFF; tsl2x7x_chip_on() 656 chip->tsl2x7x_config[TSL2X7X_ALS_MAXTHRESHHI] = tsl2x7x_chip_on() 657 (chip->tsl2x7x_settings.als_thresh_high >> 8) & 0xFF; tsl2x7x_chip_on() 658 chip->tsl2x7x_config[TSL2X7X_PERSISTENCE] = tsl2x7x_chip_on() 659 chip->tsl2x7x_settings.persistence; tsl2x7x_chip_on() 661 chip->tsl2x7x_config[TSL2X7X_PRX_COUNT] = tsl2x7x_chip_on() 662 chip->tsl2x7x_settings.prox_pulse_count; tsl2x7x_chip_on() 663 chip->tsl2x7x_config[TSL2X7X_PRX_MINTHRESHLO] = tsl2x7x_chip_on() 664 (chip->tsl2x7x_settings.prox_thres_low) & 0xFF; tsl2x7x_chip_on() 665 chip->tsl2x7x_config[TSL2X7X_PRX_MINTHRESHHI] = tsl2x7x_chip_on() 666 (chip->tsl2x7x_settings.prox_thres_low >> 8) & 0xFF; tsl2x7x_chip_on() 667 chip->tsl2x7x_config[TSL2X7X_PRX_MAXTHRESHLO] = tsl2x7x_chip_on() 668 (chip->tsl2x7x_settings.prox_thres_high) & 0xFF; tsl2x7x_chip_on() 669 chip->tsl2x7x_config[TSL2X7X_PRX_MAXTHRESHHI] = tsl2x7x_chip_on() 670 (chip->tsl2x7x_settings.prox_thres_high >> 8) & 0xFF; tsl2x7x_chip_on() 673 if (chip->tsl2x7x_chip_status == TSL2X7X_CHIP_WORKING) { tsl2x7x_chip_on() 675 dev_info(&chip->client->dev, "device is already enabled\n"); tsl2x7x_chip_on() 680 als_count = (chip->tsl2x7x_settings.als_time * 100 + 135) / 270; tsl2x7x_chip_on() 686 chip->tsl2x7x_config[TSL2X7X_ALS_TIME] = 256 - als_count; tsl2x7x_chip_on() 689 chip->tsl2x7x_config[TSL2X7X_GAIN] = tsl2x7x_chip_on() 690 (chip->tsl2x7x_settings.als_gain | tsl2x7x_chip_on() 692 | ((chip->tsl2x7x_settings.prox_gain) << 2)); tsl2x7x_chip_on() 694 /* set chip struct re scaling and saturation */ tsl2x7x_chip_on() 695 chip->als_saturation = als_count * 922; /* 90% of full scale */ tsl2x7x_chip_on() 696 chip->als_time_scale = (als_time + 25) / 50; tsl2x7x_chip_on() 701 ret = i2c_smbus_write_byte_data(chip->client, tsl2x7x_chip_on() 704 dev_err(&chip->client->dev, tsl2x7x_chip_on() 711 for (i = 0, dev_reg = chip->tsl2x7x_config; tsl2x7x_chip_on() 713 ret = i2c_smbus_write_byte_data(chip->client, tsl2x7x_chip_on() 716 dev_err(&chip->client->dev, tsl2x7x_chip_on() 729 ret = i2c_smbus_write_byte_data(chip->client, tsl2x7x_chip_on() 732 dev_err(&chip->client->dev, tsl2x7x_chip_on() 737 chip->tsl2x7x_chip_status = TSL2X7X_CHIP_WORKING; tsl2x7x_chip_on() 739 if (chip->tsl2x7x_settings.interrupts_en != 0) { tsl2x7x_chip_on() 740 dev_info(&chip->client->dev, "Setting Up Interrupt(s)\n"); tsl2x7x_chip_on() 743 if ((chip->tsl2x7x_settings.interrupts_en == 0x20) || tsl2x7x_chip_on() 744 (chip->tsl2x7x_settings.interrupts_en == 0x30)) tsl2x7x_chip_on() 747 reg_val |= chip->tsl2x7x_settings.interrupts_en; tsl2x7x_chip_on() 748 ret = i2c_smbus_write_byte_data(chip->client, tsl2x7x_chip_on() 751 dev_err(&chip->client->dev, tsl2x7x_chip_on() 756 ret = i2c_smbus_write_byte(chip->client, tsl2x7x_chip_on() 760 dev_err(&chip->client->dev, tsl2x7x_chip_on() 773 struct tsl2X7X_chip *chip = iio_priv(indio_dev); tsl2x7x_chip_off() local 776 chip->tsl2x7x_chip_status = TSL2X7X_CHIP_SUSPENDED; tsl2x7x_chip_off() 778 ret = i2c_smbus_write_byte_data(chip->client, tsl2x7x_chip_off() 781 if (chip->pdata && chip->pdata->power_off) tsl2x7x_chip_off() 782 chip->pdata->power_off(chip->client); tsl2x7x_chip_off() 800 struct tsl2X7X_chip *chip = iio_priv(indio_dev); tsl2x7x_invoke_change() local 801 int device_status = chip->tsl2x7x_chip_status; tsl2x7x_invoke_change() 803 mutex_lock(&chip->als_mutex); tsl2x7x_invoke_change() 804 mutex_lock(&chip->prox_mutex); tsl2x7x_invoke_change() 814 mutex_unlock(&chip->prox_mutex); tsl2x7x_invoke_change() 815 mutex_unlock(&chip->als_mutex); tsl2x7x_invoke_change() 862 struct tsl2X7X_chip *chip = iio_priv(indio_dev); tsl2x7x_prox_cal() local 864 u8 current_state = chip->tsl2x7x_chip_status; tsl2x7x_prox_cal() 866 if (chip->tsl2x7x_settings.prox_max_samples_cal > MAX_SAMPLES_CAL) { tsl2x7x_prox_cal() 867 dev_err(&chip->client->dev, tsl2x7x_prox_cal() 869 chip->tsl2x7x_settings.prox_max_samples_cal); tsl2x7x_prox_cal() 870 chip->tsl2x7x_settings.prox_max_samples_cal = MAX_SAMPLES_CAL; tsl2x7x_prox_cal() 877 tmp_irq_settings = chip->tsl2x7x_settings.interrupts_en; tsl2x7x_prox_cal() 878 chip->tsl2x7x_settings.interrupts_en |= TSL2X7X_CNTL_PROX_INT_ENBL; tsl2x7x_prox_cal() 884 for (i = 0; i < chip->tsl2x7x_settings.prox_max_samples_cal; i++) { tsl2x7x_prox_cal() 887 prox_history[i] = chip->prox_data; tsl2x7x_prox_cal() 888 dev_info(&chip->client->dev, "2 i=%d prox data= %d\n", tsl2x7x_prox_cal() 889 i, chip->prox_data); tsl2x7x_prox_cal() 895 chip->tsl2x7x_settings.prox_max_samples_cal, calP); tsl2x7x_prox_cal() 896 chip->tsl2x7x_settings.prox_thres_high = (calP->max << 1) - calP->mean; tsl2x7x_prox_cal() 898 dev_info(&chip->client->dev, " cal min=%d mean=%d max=%d\n", tsl2x7x_prox_cal() 900 dev_info(&chip->client->dev, tsl2x7x_prox_cal() 902 chip->client->name, chip->tsl2x7x_settings.prox_thres_high); tsl2x7x_prox_cal() 905 chip->tsl2x7x_settings.interrupts_en = tmp_irq_settings; tsl2x7x_prox_cal() 913 struct tsl2X7X_chip *chip = iio_priv(dev_to_iio_dev(dev)); tsl2x7x_power_state_show() local 915 return snprintf(buf, PAGE_SIZE, "%d\n", chip->tsl2x7x_chip_status); tsl2x7x_power_state_show() 938 struct tsl2X7X_chip *chip = iio_priv(dev_to_iio_dev(dev)); tsl2x7x_gain_available_show() local 940 switch (chip->id) { tsl2x7x_gain_available_show() 961 struct tsl2X7X_chip *chip = iio_priv(dev_to_iio_dev(dev)); tsl2x7x_als_time_show() local 964 y = (TSL2X7X_MAX_TIMER_CNT - (u8)chip->tsl2x7x_settings.als_time) + 1; tsl2x7x_als_time_show() 976 struct tsl2X7X_chip *chip = iio_priv(indio_dev); tsl2x7x_als_time_store() local 985 chip->tsl2x7x_settings.als_time = tsl2x7x_als_time_store() 988 dev_info(&chip->client->dev, "%s: als time = %d", tsl2x7x_als_time_store() 989 __func__, chip->tsl2x7x_settings.als_time); tsl2x7x_als_time_store() 1002 struct tsl2X7X_chip *chip = iio_priv(dev_to_iio_dev(dev)); tsl2x7x_als_cal_target_show() local 1005 chip->tsl2x7x_settings.als_cal_target); tsl2x7x_als_cal_target_show() 1012 struct tsl2X7X_chip *chip = iio_priv(indio_dev); tsl2x7x_als_cal_target_store() local 1019 chip->tsl2x7x_settings.als_cal_target = value; tsl2x7x_als_cal_target_store() 1030 struct tsl2X7X_chip *chip = iio_priv(dev_to_iio_dev(dev)); tsl2x7x_als_persistence_show() local 1034 y = (TSL2X7X_MAX_TIMER_CNT - (u8)chip->tsl2x7x_settings.als_time) + 1; tsl2x7x_als_persistence_show() 1036 filter_delay = z * (chip->tsl2x7x_settings.persistence & 0x0F); tsl2x7x_als_persistence_show() 1047 struct tsl2X7X_chip *chip = iio_priv(indio_dev); tsl2x7x_als_persistence_store() local 1056 y = (TSL2X7X_MAX_TIMER_CNT - (u8)chip->tsl2x7x_settings.als_time) + 1; tsl2x7x_als_persistence_store() 1062 chip->tsl2x7x_settings.persistence &= 0xF0; tsl2x7x_als_persistence_store() 1063 chip->tsl2x7x_settings.persistence |= (filter_delay & 0x0F); tsl2x7x_als_persistence_store() 1065 dev_info(&chip->client->dev, "%s: als persistence = %d", tsl2x7x_als_persistence_store() 1076 struct tsl2X7X_chip *chip = iio_priv(dev_to_iio_dev(dev)); tsl2x7x_prox_persistence_show() local 1080 y = (TSL2X7X_MAX_TIMER_CNT - (u8)chip->tsl2x7x_settings.prx_time) + 1; tsl2x7x_prox_persistence_show() 1082 filter_delay = z * ((chip->tsl2x7x_settings.persistence & 0xF0) >> 4); tsl2x7x_prox_persistence_show() 1093 struct tsl2X7X_chip *chip = iio_priv(indio_dev); tsl2x7x_prox_persistence_store() local 1102 y = (TSL2X7X_MAX_TIMER_CNT - (u8)chip->tsl2x7x_settings.prx_time) + 1; tsl2x7x_prox_persistence_store() 1108 chip->tsl2x7x_settings.persistence &= 0x0F; tsl2x7x_prox_persistence_store() 1109 chip->tsl2x7x_settings.persistence |= ((filter_delay << 4) & 0xF0); tsl2x7x_prox_persistence_store() 1111 dev_info(&chip->client->dev, "%s: prox persistence = %d", tsl2x7x_prox_persistence_store() 1139 struct tsl2X7X_chip *chip = iio_priv(dev_to_iio_dev(dev)); tsl2x7x_luxtable_show() local 1145 chip->tsl2x7x_device_lux[i].ratio, tsl2x7x_luxtable_show() 1146 chip->tsl2x7x_device_lux[i].ch0, tsl2x7x_luxtable_show() 1147 chip->tsl2x7x_device_lux[i].ch1); tsl2x7x_luxtable_show() 1148 if (chip->tsl2x7x_device_lux[i].ratio == 0) { tsl2x7x_luxtable_show() 1165 struct tsl2X7X_chip *chip = iio_priv(indio_dev); tsl2x7x_luxtable_store() local 1166 int value[ARRAY_SIZE(chip->tsl2x7x_device_lux)*3 + 1]; tsl2x7x_luxtable_store() 1178 n > ((ARRAY_SIZE(chip->tsl2x7x_device_lux) - 1) * 3)) { tsl2x7x_luxtable_store() 1188 if (chip->tsl2x7x_chip_status == TSL2X7X_CHIP_WORKING) tsl2x7x_luxtable_store() 1192 memset(chip->tsl2x7x_device_lux, 0, sizeof(chip->tsl2x7x_device_lux)); tsl2x7x_luxtable_store() 1193 memcpy(chip->tsl2x7x_device_lux, &value[1], (value[0] * 4)); tsl2x7x_luxtable_store() 1222 struct tsl2X7X_chip *chip = iio_priv(indio_dev); tsl2x7x_read_interrupt_config() local 1226 ret = !!(chip->tsl2x7x_settings.interrupts_en & 0x10); tsl2x7x_read_interrupt_config() 1228 ret = !!(chip->tsl2x7x_settings.interrupts_en & 0x20); tsl2x7x_read_interrupt_config() 1239 struct tsl2X7X_chip *chip = iio_priv(indio_dev); tsl2x7x_write_interrupt_config() local 1243 chip->tsl2x7x_settings.interrupts_en |= 0x10; tsl2x7x_write_interrupt_config() 1245 chip->tsl2x7x_settings.interrupts_en &= 0x20; tsl2x7x_write_interrupt_config() 1248 chip->tsl2x7x_settings.interrupts_en |= 0x20; tsl2x7x_write_interrupt_config() 1250 chip->tsl2x7x_settings.interrupts_en &= 0x10; tsl2x7x_write_interrupt_config() 1265 struct tsl2X7X_chip *chip = iio_priv(indio_dev); tsl2x7x_write_thresh() local 1270 chip->tsl2x7x_settings.als_thresh_high = val; tsl2x7x_write_thresh() 1273 chip->tsl2x7x_settings.als_thresh_low = val; tsl2x7x_write_thresh() 1281 chip->tsl2x7x_settings.prox_thres_high = val; tsl2x7x_write_thresh() 1284 chip->tsl2x7x_settings.prox_thres_low = val; tsl2x7x_write_thresh() 1303 struct tsl2X7X_chip *chip = iio_priv(indio_dev); tsl2x7x_read_thresh() local 1308 *val = chip->tsl2x7x_settings.als_thresh_high; tsl2x7x_read_thresh() 1311 *val = chip->tsl2x7x_settings.als_thresh_low; tsl2x7x_read_thresh() 1319 *val = chip->tsl2x7x_settings.prox_thres_high; tsl2x7x_read_thresh() 1322 *val = chip->tsl2x7x_settings.prox_thres_low; tsl2x7x_read_thresh() 1339 struct tsl2X7X_chip *chip = iio_priv(indio_dev); tsl2x7x_read_raw() local 1346 *val = chip->als_cur_info.lux; tsl2x7x_read_raw() 1358 *val = chip->als_cur_info.als_ch0; tsl2x7x_read_raw() 1360 *val = chip->als_cur_info.als_ch1; tsl2x7x_read_raw() 1365 *val = chip->prox_data; tsl2x7x_read_raw() 1375 tsl2X7X_als_gainadj[chip->tsl2x7x_settings.als_gain]; tsl2x7x_read_raw() 1378 tsl2X7X_prx_gainadj[chip->tsl2x7x_settings.prox_gain]; tsl2x7x_read_raw() 1382 *val = chip->tsl2x7x_settings.als_gain_trim; tsl2x7x_read_raw() 1399 struct tsl2X7X_chip *chip = iio_priv(indio_dev); tsl2x7x_write_raw() local 1406 chip->tsl2x7x_settings.als_gain = 0; tsl2x7x_write_raw() 1409 chip->tsl2x7x_settings.als_gain = 1; tsl2x7x_write_raw() 1412 chip->tsl2x7x_settings.als_gain = 2; tsl2x7x_write_raw() 1415 switch (chip->id) { tsl2x7x_write_raw() 1423 chip->tsl2x7x_settings.als_gain = 3; tsl2x7x_write_raw() 1426 switch (chip->id) { tsl2x7x_write_raw() 1434 chip->tsl2x7x_settings.als_gain = 3; tsl2x7x_write_raw() 1442 chip->tsl2x7x_settings.prox_gain = 0; tsl2x7x_write_raw() 1445 chip->tsl2x7x_settings.prox_gain = 1; tsl2x7x_write_raw() 1448 chip->tsl2x7x_settings.prox_gain = 2; tsl2x7x_write_raw() 1451 chip->tsl2x7x_settings.prox_gain = 3; tsl2x7x_write_raw() 1459 chip->tsl2x7x_settings.als_gain_trim = val; tsl2x7x_write_raw() 1526 struct tsl2X7X_chip *chip = iio_priv(indio_dev); tsl2x7x_event_handler() local 1531 value = i2c_smbus_read_byte_data(chip->client, tsl2x7x_event_handler() 1555 ret = i2c_smbus_write_byte(chip->client, tsl2x7x_event_handler() 1559 dev_err(&chip->client->dev, tsl2x7x_event_handler() 1865 struct tsl2X7X_chip *chip; tsl2x7x_probe() local 1867 indio_dev = devm_iio_device_alloc(&clientp->dev, sizeof(*chip)); tsl2x7x_probe() 1871 chip = iio_priv(indio_dev); tsl2x7x_probe() 1872 chip->client = clientp; tsl2x7x_probe() 1875 ret = tsl2x7x_i2c_read(chip->client, tsl2x7x_probe() 1882 dev_info(&chip->client->dev, tsl2x7x_probe() 1897 mutex_init(&chip->als_mutex); tsl2x7x_probe() 1898 mutex_init(&chip->prox_mutex); tsl2x7x_probe() 1900 chip->tsl2x7x_chip_status = TSL2X7X_CHIP_UNKNOWN; tsl2x7x_probe() 1901 chip->pdata = clientp->dev.platform_data; tsl2x7x_probe() 1902 chip->id = id->driver_data; tsl2x7x_probe() 1903 chip->chip_info = tsl2x7x_probe() 1906 indio_dev->info = chip->chip_info->info; tsl2x7x_probe() 1909 indio_dev->name = chip->client->name; tsl2x7x_probe() 1910 indio_dev->channels = chip->chip_info->channel; tsl2x7x_probe() 1911 indio_dev->num_channels = chip->chip_info->chan_table_elements; tsl2x7x_probe() 1929 tsl2x7x_defaults(chip); tsl2x7x_probe() 1930 /* Make sure the chip is on */ tsl2x7x_probe() 1948 struct tsl2X7X_chip *chip = iio_priv(indio_dev); tsl2x7x_suspend() local 1951 if (chip->tsl2x7x_chip_status == TSL2X7X_CHIP_WORKING) { tsl2x7x_suspend() 1953 chip->tsl2x7x_chip_status = TSL2X7X_CHIP_SUSPENDED; tsl2x7x_suspend() 1956 if (chip->pdata && chip->pdata->platform_power) { tsl2x7x_suspend() 1959 chip->pdata->platform_power(dev, pmm); tsl2x7x_suspend() 1968 struct tsl2X7X_chip *chip = iio_priv(indio_dev); tsl2x7x_resume() local 1971 if (chip->pdata && chip->pdata->platform_power) { tsl2x7x_resume() 1974 chip->pdata->platform_power(dev, pmm); tsl2x7x_resume() 1977 if (chip->tsl2x7x_chip_status == TSL2X7X_CHIP_SUSPENDED) tsl2x7x_resume()
/linux-4.1.27/drivers/mfd/
H A D	adp5520.c	73 struct adp5520_chip *chip = i2c_get_clientdata(client); __adp5520_ack_bits() local 77 mutex_lock(&chip->lock); __adp5520_ack_bits() 86 mutex_unlock(&chip->lock); __adp5520_ack_bits() 104 struct adp5520_chip *chip = dev_get_drvdata(dev); adp5520_set_bits() local 108 mutex_lock(&chip->lock); adp5520_set_bits() 110 ret = __adp5520_read(chip->client, reg, &reg_val); adp5520_set_bits() 114 ret = __adp5520_write(chip->client, reg, reg_val); adp5520_set_bits() 117 mutex_unlock(&chip->lock); adp5520_set_bits() 124 struct adp5520_chip *chip = dev_get_drvdata(dev); adp5520_clr_bits() local 128 mutex_lock(&chip->lock); adp5520_clr_bits() 130 ret = __adp5520_read(chip->client, reg, &reg_val); adp5520_clr_bits() 134 ret = __adp5520_write(chip->client, reg, reg_val); adp5520_clr_bits() 137 mutex_unlock(&chip->lock); adp5520_clr_bits() 145 struct adp5520_chip *chip = dev_get_drvdata(dev); adp5520_register_notifier() local 147 if (chip->irq) { adp5520_register_notifier() 148 adp5520_set_bits(chip->dev, ADP5520_INTERRUPT_ENABLE, adp5520_register_notifier() 152 return blocking_notifier_chain_register(&chip->notifier_list, adp5520_register_notifier() 163 struct adp5520_chip *chip = dev_get_drvdata(dev); adp5520_unregister_notifier() local 165 adp5520_clr_bits(chip->dev, ADP5520_INTERRUPT_ENABLE, adp5520_unregister_notifier() 169 return blocking_notifier_chain_unregister(&chip->notifier_list, nb); adp5520_unregister_notifier() 175 struct adp5520_chip *chip = data; adp5520_irq_thread() local 180 ret = __adp5520_read(chip->client, ADP5520_MODE_STATUS, &reg_val); adp5520_irq_thread() 187 blocking_notifier_call_chain(&chip->notifier_list, events, NULL); adp5520_irq_thread() 189 __adp5520_ack_bits(chip->client, ADP5520_MODE_STATUS, events); adp5520_irq_thread() 201 static int adp5520_remove_subdevs(struct adp5520_chip *chip) adp5520_remove_subdevs() argument 203 return device_for_each_child(chip->dev, NULL, __remove_subdev); adp5520_remove_subdevs() 211 struct adp5520_chip *chip; adp5520_probe() local 225 chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL); adp5520_probe() 226 if (!chip) adp5520_probe() 229 i2c_set_clientdata(client, chip); adp5520_probe() 230 chip->client = client; adp5520_probe() 232 chip->dev = &client->dev; adp5520_probe() 233 chip->irq = client->irq; adp5520_probe() 234 chip->id = id->driver_data; adp5520_probe() 235 mutex_init(&chip->lock); adp5520_probe() 237 if (chip->irq) { adp5520_probe() 238 BLOCKING_INIT_NOTIFIER_HEAD(&chip->notifier_list); adp5520_probe() 240 ret = request_threaded_irq(chip->irq, NULL, adp5520_irq_thread, adp5520_probe() 242 "adp5520", chip); adp5520_probe() 245 chip->irq); adp5520_probe() 250 ret = adp5520_write(chip->dev, ADP5520_MODE_STATUS, ADP5520_nSTNBY); adp5520_probe() 257 pdev = platform_device_register_data(chip->dev, "adp5520-keys", adp5520_probe() 258 chip->id, pdata->keys, sizeof(*pdata->keys)); adp5520_probe() 266 pdev = platform_device_register_data(chip->dev, "adp5520-gpio", adp5520_probe() 267 chip->id, pdata->gpio, sizeof(*pdata->gpio)); adp5520_probe() 275 pdev = platform_device_register_data(chip->dev, "adp5520-led", adp5520_probe() 276 chip->id, pdata->leds, sizeof(*pdata->leds)); adp5520_probe() 284 pdev = platform_device_register_data(chip->dev, adp5520_probe() 286 chip->id, adp5520_probe() 298 adp5520_remove_subdevs(chip); adp5520_probe() 301 if (chip->irq) adp5520_probe() 302 free_irq(chip->irq, chip); adp5520_probe() 309 struct adp5520_chip *chip = dev_get_drvdata(&client->dev); adp5520_remove() local 311 if (chip->irq) adp5520_remove() 312 free_irq(chip->irq, chip); adp5520_remove() 314 adp5520_remove_subdevs(chip); adp5520_remove() 315 adp5520_write(chip->dev, ADP5520_MODE_STATUS, 0); adp5520_remove() 323 struct adp5520_chip *chip = dev_get_drvdata(&client->dev); adp5520_suspend() local 325 adp5520_read(chip->dev, ADP5520_MODE_STATUS, &chip->mode); adp5520_suspend() 327 chip->mode &= ADP5520_BL_EN | ADP5520_DIM_EN | ADP5520_nSTNBY; adp5520_suspend() 328 adp5520_write(chip->dev, ADP5520_MODE_STATUS, 0); adp5520_suspend() 335 struct adp5520_chip *chip = dev_get_drvdata(&client->dev); adp5520_resume() local 337 adp5520_write(chip->dev, ADP5520_MODE_STATUS, chip->mode); adp5520_resume()
H A D	da903x.c	132 struct da903x_chip *chip = dev_get_drvdata(dev); da903x_register_notifier() local 134 chip->ops->unmask_events(chip, events); da903x_register_notifier() 135 return blocking_notifier_chain_register(&chip->notifier_list, nb); da903x_register_notifier() 142 struct da903x_chip *chip = dev_get_drvdata(dev); da903x_unregister_notifier() local 144 chip->ops->mask_events(chip, events); da903x_unregister_notifier() 145 return blocking_notifier_chain_unregister(&chip->notifier_list, nb); da903x_unregister_notifier() 175 struct da903x_chip *chip = dev_get_drvdata(dev); da903x_set_bits() local 179 mutex_lock(&chip->lock); da903x_set_bits() 181 ret = __da903x_read(chip->client, reg, &reg_val); da903x_set_bits() 187 ret = __da903x_write(chip->client, reg, reg_val); da903x_set_bits() 190 mutex_unlock(&chip->lock); da903x_set_bits() 197 struct da903x_chip *chip = dev_get_drvdata(dev); da903x_clr_bits() local 201 mutex_lock(&chip->lock); da903x_clr_bits() 203 ret = __da903x_read(chip->client, reg, &reg_val); da903x_clr_bits() 209 ret = __da903x_write(chip->client, reg, reg_val); da903x_clr_bits() 212 mutex_unlock(&chip->lock); da903x_clr_bits() 219 struct da903x_chip *chip = dev_get_drvdata(dev); da903x_update() local 223 mutex_lock(&chip->lock); da903x_update() 225 ret = __da903x_read(chip->client, reg, &reg_val); da903x_update() 231 ret = __da903x_write(chip->client, reg, reg_val); da903x_update() 234 mutex_unlock(&chip->lock); da903x_update() 241 struct da903x_chip *chip = dev_get_drvdata(dev); da903x_query_status() local 244 chip->ops->read_status(chip, &status); da903x_query_status() 249 static int da9030_init_chip(struct da903x_chip *chip) da9030_init_chip() argument 254 err = __da903x_read(chip->client, DA9030_CHIP_ID, &chip_id); da9030_init_chip() 258 err = __da903x_write(chip->client, DA9030_SYS_CTRL_A, 0xE8); da9030_init_chip() 262 dev_info(chip->dev, "DA9030 (CHIP ID: 0x%02x) detected\n", chip_id); da9030_init_chip() 266 static int da9030_unmask_events(struct da903x_chip *chip, unsigned int events) da9030_unmask_events() argument 270 chip->events_mask &= ~events; da9030_unmask_events() 272 v[0] = (chip->events_mask & 0xff); da9030_unmask_events() 273 v[1] = (chip->events_mask >> 8) & 0xff; da9030_unmask_events() 274 v[2] = (chip->events_mask >> 16) & 0xff; da9030_unmask_events() 276 return __da903x_writes(chip->client, DA9030_IRQ_MASK_A, 3, v); da9030_unmask_events() 279 static int da9030_mask_events(struct da903x_chip *chip, unsigned int events) da9030_mask_events() argument 283 chip->events_mask |= events; da9030_mask_events() 285 v[0] = (chip->events_mask & 0xff); da9030_mask_events() 286 v[1] = (chip->events_mask >> 8) & 0xff; da9030_mask_events() 287 v[2] = (chip->events_mask >> 16) & 0xff; da9030_mask_events() 289 return __da903x_writes(chip->client, DA9030_IRQ_MASK_A, 3, v); da9030_mask_events() 292 static int da9030_read_events(struct da903x_chip *chip, unsigned int *events) da9030_read_events() argument 297 ret = __da903x_reads(chip->client, DA9030_EVENT_A, 3, v); da9030_read_events() 305 static int da9030_read_status(struct da903x_chip *chip, unsigned int *status) da9030_read_status() argument 307 return __da903x_read(chip->client, DA9030_STATUS, (uint8_t *)status); da9030_read_status() 310 static int da9034_init_chip(struct da903x_chip *chip) da9034_init_chip() argument 315 err = __da903x_read(chip->client, DA9034_CHIP_ID, &chip_id); da9034_init_chip() 319 err = __da903x_write(chip->client, DA9034_SYS_CTRL_A, 0xE8); da9034_init_chip() 324 __da903x_write(chip->client, 0x10, 0x07); da9034_init_chip() 325 __da903x_write(chip->client, 0x11, 0xff); da9034_init_chip() 326 __da903x_write(chip->client, 0x12, 0xff); da9034_init_chip() 329 __da903x_write(chip->client, DA9034_SYS_CTRL_B, 0x20); da9034_init_chip() 330 __da903x_write(chip->client, DA9034_SYS_CTRL_A, 0x60); da9034_init_chip() 333 __da903x_write(chip->client, 0x90, 0x01); da9034_init_chip() 334 __da903x_write(chip->client, 0xB0, 0x08); da9034_init_chip() 337 __da903x_write(chip->client, 0x20, 0x00); da9034_init_chip() 339 dev_info(chip->dev, "DA9034 (CHIP ID: 0x%02x) detected\n", chip_id); da9034_init_chip() 343 static int da9034_unmask_events(struct da903x_chip *chip, unsigned int events) da9034_unmask_events() argument 347 chip->events_mask &= ~events; da9034_unmask_events() 349 v[0] = (chip->events_mask & 0xff); da9034_unmask_events() 350 v[1] = (chip->events_mask >> 8) & 0xff; da9034_unmask_events() 351 v[2] = (chip->events_mask >> 16) & 0xff; da9034_unmask_events() 352 v[3] = (chip->events_mask >> 24) & 0xff; da9034_unmask_events() 354 return __da903x_writes(chip->client, DA9034_IRQ_MASK_A, 4, v); da9034_unmask_events() 357 static int da9034_mask_events(struct da903x_chip *chip, unsigned int events) da9034_mask_events() argument 361 chip->events_mask |= events; da9034_mask_events() 363 v[0] = (chip->events_mask & 0xff); da9034_mask_events() 364 v[1] = (chip->events_mask >> 8) & 0xff; da9034_mask_events() 365 v[2] = (chip->events_mask >> 16) & 0xff; da9034_mask_events() 366 v[3] = (chip->events_mask >> 24) & 0xff; da9034_mask_events() 368 return __da903x_writes(chip->client, DA9034_IRQ_MASK_A, 4, v); da9034_mask_events() 371 static int da9034_read_events(struct da903x_chip *chip, unsigned int *events) da9034_read_events() argument 376 ret = __da903x_reads(chip->client, DA9034_EVENT_A, 4, v); da9034_read_events() 384 static int da9034_read_status(struct da903x_chip *chip, unsigned int *status) da9034_read_status() argument 389 ret = __da903x_reads(chip->client, DA9034_STATUS_A, 2, v); da9034_read_status() 399 struct da903x_chip *chip = da903x_irq_work() local 404 if (chip->ops->read_events(chip, &events)) da903x_irq_work() 407 events &= ~chip->events_mask; da903x_irq_work() 412 &chip->notifier_list, events, NULL); da903x_irq_work() 414 enable_irq(chip->client->irq); da903x_irq_work() 419 struct da903x_chip *chip = data; da903x_irq_handler() local 422 (void)schedule_work(&chip->irq_work); da903x_irq_handler() 457 static int da903x_remove_subdevs(struct da903x_chip *chip) da903x_remove_subdevs() argument 459 return device_for_each_child(chip->dev, NULL, __remove_subdev); da903x_remove_subdevs() 462 static int da903x_add_subdevs(struct da903x_chip *chip, da903x_add_subdevs() argument 478 pdev->dev.parent = chip->dev; da903x_add_subdevs() 490 da903x_remove_subdevs(chip); da903x_add_subdevs() 498 struct da903x_chip *chip; da903x_probe() local 502 chip = devm_kzalloc(&client->dev, sizeof(struct da903x_chip), da903x_probe() 504 if (chip == NULL) da903x_probe() 507 chip->client = client; da903x_probe() 508 chip->dev = &client->dev; da903x_probe() 509 chip->ops = &da903x_ops[id->driver_data]; da903x_probe() 511 mutex_init(&chip->lock); da903x_probe() 512 INIT_WORK(&chip->irq_work, da903x_irq_work); da903x_probe() 513 BLOCKING_INIT_NOTIFIER_HEAD(&chip->notifier_list); da903x_probe() 515 i2c_set_clientdata(client, chip); da903x_probe() 517 ret = chip->ops->init_chip(chip); da903x_probe() 522 chip->events_mask = 0xffffffff; da903x_probe() 523 chip->ops->mask_events(chip, chip->events_mask); da903x_probe() 524 chip->ops->read_events(chip, &tmp); da903x_probe() 528 "da903x", chip); da903x_probe() 535 ret = da903x_add_subdevs(chip, pdata); da903x_probe() 544 struct da903x_chip *chip = i2c_get_clientdata(client); da903x_remove() local 546 da903x_remove_subdevs(chip); da903x_remove()
H A D	pm8921-core.c	68 static int pm8xxx_read_block_irq(struct pm_irq_chip *chip, unsigned int bp, pm8xxx_read_block_irq() argument 73 spin_lock(&chip->pm_irq_lock); pm8xxx_read_block_irq() 74 rc = regmap_write(chip->regmap, SSBI_REG_ADDR_IRQ_BLK_SEL, bp); pm8xxx_read_block_irq() 80 rc = regmap_read(chip->regmap, SSBI_REG_ADDR_IRQ_IT_STATUS, ip); pm8xxx_read_block_irq() 84 spin_unlock(&chip->pm_irq_lock); pm8xxx_read_block_irq() 89 pm8xxx_config_irq(struct pm_irq_chip *chip, unsigned int bp, unsigned int cp) pm8xxx_config_irq() argument 93 spin_lock(&chip->pm_irq_lock); pm8xxx_config_irq() 94 rc = regmap_write(chip->regmap, SSBI_REG_ADDR_IRQ_BLK_SEL, bp); pm8xxx_config_irq() 101 rc = regmap_write(chip->regmap, SSBI_REG_ADDR_IRQ_CONFIG, cp); pm8xxx_config_irq() 105 spin_unlock(&chip->pm_irq_lock); pm8xxx_config_irq() 109 static int pm8xxx_irq_block_handler(struct pm_irq_chip *chip, int block) pm8xxx_irq_block_handler() argument 114 ret = pm8xxx_read_block_irq(chip, block, &bits); pm8xxx_irq_block_handler() 128 irq = irq_find_mapping(chip->irqdomain, pmirq); pm8xxx_irq_block_handler() 135 static int pm8xxx_irq_master_handler(struct pm_irq_chip *chip, int master) pm8xxx_irq_master_handler() argument 140 ret = regmap_read(chip->regmap, SSBI_REG_ADDR_IRQ_M_STATUS1 + master, pm8xxx_irq_master_handler() 154 ret |= pm8xxx_irq_block_handler(chip, block_number); pm8xxx_irq_master_handler() 161 struct pm_irq_chip *chip = irq_desc_get_handler_data(desc); pm8xxx_irq_handler() local 168 ret = regmap_read(chip->regmap, SSBI_REG_ADDR_IRQ_ROOT, &root); pm8xxx_irq_handler() 178 for (i = 0; i < chip->num_masters; i++) pm8xxx_irq_handler() 180 pm8xxx_irq_master_handler(chip, i); pm8xxx_irq_handler() 187 struct pm_irq_chip *chip = irq_data_get_irq_chip_data(d); pm8xxx_irq_mask_ack() local 193 config = chip->config[pmirq] | PM_IRQF_MASK_ALL | PM_IRQF_CLR; pm8xxx_irq_mask_ack() 194 pm8xxx_config_irq(chip, block, config); pm8xxx_irq_mask_ack() 199 struct pm_irq_chip *chip = irq_data_get_irq_chip_data(d); pm8xxx_irq_unmask() local 205 config = chip->config[pmirq]; pm8xxx_irq_unmask() 206 pm8xxx_config_irq(chip, block, config); pm8xxx_irq_unmask() 211 struct pm_irq_chip *chip = irq_data_get_irq_chip_data(d); pm8xxx_irq_set_type() local 219 chip->config[pmirq] = (irq_bit << PM_IRQF_BITS_SHIFT) pm8xxx_irq_set_type() 223 chip->config[pmirq] &= ~PM_IRQF_MASK_RE; pm8xxx_irq_set_type() 225 chip->config[pmirq] &= ~PM_IRQF_MASK_FE; pm8xxx_irq_set_type() 227 chip->config[pmirq] |= PM_IRQF_LVL_SEL; pm8xxx_irq_set_type() 230 chip->config[pmirq] &= ~PM_IRQF_MASK_RE; pm8xxx_irq_set_type() 232 chip->config[pmirq] &= ~PM_IRQF_MASK_FE; pm8xxx_irq_set_type() 235 config = chip->config[pmirq] | PM_IRQF_CLR; pm8xxx_irq_set_type() 236 return pm8xxx_config_irq(chip, block, config); pm8xxx_irq_set_type() 250 struct pm_irq_chip *chip = d->host_data; pm8xxx_irq_domain_map() local 253 irq_set_chip_data(irq, chip); pm8xxx_irq_domain_map() 289 struct pm_irq_chip *chip; pm8921_probe() local 301 /* Read PMIC chip revision */ pm8921_probe() 310 /* Read PMIC chip revision 2 */ pm8921_probe() 320 chip = devm_kzalloc(&pdev->dev, sizeof(*chip) + pm8921_probe() 321 sizeof(chip->config[0]) * nirqs, pm8921_probe() 323 if (!chip) pm8921_probe() 326 platform_set_drvdata(pdev, chip); pm8921_probe() 327 chip->regmap = regmap; pm8921_probe() 328 chip->num_irqs = nirqs; pm8921_probe() 329 chip->num_blocks = DIV_ROUND_UP(chip->num_irqs, 8); pm8921_probe() 330 chip->num_masters = DIV_ROUND_UP(chip->num_blocks, 8); pm8921_probe() 331 spin_lock_init(&chip->pm_irq_lock); pm8921_probe() 333 chip->irqdomain = irq_domain_add_linear(pdev->dev.of_node, nirqs, pm8921_probe() 335 chip); pm8921_probe() 336 if (!chip->irqdomain) pm8921_probe() 339 irq_set_handler_data(irq, chip); pm8921_probe() 347 irq_domain_remove(chip->irqdomain); pm8921_probe() 362 struct pm_irq_chip *chip = platform_get_drvdata(pdev); pm8921_remove() local 367 irq_domain_remove(chip->irqdomain); pm8921_remove()
H A D	88pm80x.c	21 /* 88pm80x chips have same definition for chip id register. */ 32 /* 88PM800 chip id number */ 34 /* 88PM805 chip id number */ 41 * pm800 and pm805. would remove it after HW chip fixes the issue. 54 struct pm80x_chip *chip; pm80x_init() local 59 chip = pm80x_init() 61 if (!chip) pm80x_init() 72 chip->client = client; pm80x_init() 73 chip->regmap = map; pm80x_init() 75 chip->irq = client->irq; pm80x_init() 77 chip->dev = &client->dev; pm80x_init() 78 dev_set_drvdata(chip->dev, chip); pm80x_init() 79 i2c_set_clientdata(chip->client, chip); pm80x_init() 81 ret = regmap_read(chip->regmap, PM80X_CHIP_ID, &val); pm80x_init() 83 dev_err(chip->dev, "Failed to read CHIP ID: %d\n", ret); pm80x_init() 89 chip->type = chip_mapping[i].type; pm80x_init() 95 dev_err(chip->dev, pm80x_init() 103 * workaround: set g_pm80x_chip to the first probed chip. if the pm80x_init() 104 * second chip is probed, just point to the companion to each pm80x_init() 106 * remove it after HW chip fixes the issue. pm80x_init() 109 g_pm80x_chip = chip; pm80x_init() 111 chip->companion = g_pm80x_chip->client; pm80x_init() 112 g_pm80x_chip->companion = chip->client; pm80x_init() 123 * would remove it after HW chip fixes the issue. pm80x_deinit() 137 struct pm80x_chip *chip = i2c_get_clientdata(client); pm80x_suspend() local 139 if (chip && chip->wu_flag) pm80x_suspend() 140 if (device_may_wakeup(chip->dev)) pm80x_suspend() 141 enable_irq_wake(chip->irq); pm80x_suspend() 149 struct pm80x_chip *chip = i2c_get_clientdata(client); pm80x_resume() local 151 if (chip && chip->wu_flag) pm80x_resume() 152 if (device_may_wakeup(chip->dev)) pm80x_resume() 153 disable_irq_wake(chip->irq); pm80x_resume()
H A D	max8925-i2c.c	54 struct max8925_chip *chip = i2c_get_clientdata(i2c); max8925_reg_read() local 58 mutex_lock(&chip->io_lock); max8925_reg_read() 60 mutex_unlock(&chip->io_lock); max8925_reg_read() 72 struct max8925_chip *chip = i2c_get_clientdata(i2c); max8925_reg_write() local 75 mutex_lock(&chip->io_lock); max8925_reg_write() 77 mutex_unlock(&chip->io_lock); max8925_reg_write() 86 struct max8925_chip *chip = i2c_get_clientdata(i2c); max8925_bulk_read() local 89 mutex_lock(&chip->io_lock); max8925_bulk_read() 91 mutex_unlock(&chip->io_lock); max8925_bulk_read() 100 struct max8925_chip *chip = i2c_get_clientdata(i2c); max8925_bulk_write() local 103 mutex_lock(&chip->io_lock); max8925_bulk_write() 105 mutex_unlock(&chip->io_lock); max8925_bulk_write() 114 struct max8925_chip *chip = i2c_get_clientdata(i2c); max8925_set_bits() local 118 mutex_lock(&chip->io_lock); max8925_set_bits() 126 mutex_unlock(&chip->io_lock); max8925_set_bits() 155 static struct max8925_chip *chip; max8925_probe() local 173 chip = devm_kzalloc(&client->dev, max8925_probe() 175 if (chip == NULL) max8925_probe() 177 chip->i2c = client; max8925_probe() 178 chip->dev = &client->dev; max8925_probe() 179 i2c_set_clientdata(client, chip); max8925_probe() 180 dev_set_drvdata(chip->dev, chip); max8925_probe() 181 mutex_init(&chip->io_lock); max8925_probe() 183 chip->rtc = i2c_new_dummy(chip->i2c->adapter, RTC_I2C_ADDR); max8925_probe() 184 if (!chip->rtc) { max8925_probe() 185 dev_err(chip->dev, "Failed to allocate I2C device for RTC\n"); max8925_probe() 188 i2c_set_clientdata(chip->rtc, chip); max8925_probe() 190 chip->adc = i2c_new_dummy(chip->i2c->adapter, ADC_I2C_ADDR); max8925_probe() 191 if (!chip->adc) { max8925_probe() 192 dev_err(chip->dev, "Failed to allocate I2C device for ADC\n"); max8925_probe() 193 i2c_unregister_device(chip->rtc); max8925_probe() 196 i2c_set_clientdata(chip->adc, chip); max8925_probe() 200 max8925_device_init(chip, pdata); max8925_probe() 207 struct max8925_chip *chip = i2c_get_clientdata(client); max8925_remove() local 209 max8925_device_exit(chip); max8925_remove() 210 i2c_unregister_device(chip->adc); max8925_remove() 211 i2c_unregister_device(chip->rtc); max8925_remove() 219 struct max8925_chip *chip = i2c_get_clientdata(client); max8925_suspend() local 221 if (device_may_wakeup(dev) && chip->wakeup_flag) max8925_suspend() 222 enable_irq_wake(chip->core_irq); max8925_suspend() 229 struct max8925_chip *chip = i2c_get_clientdata(client); max8925_resume() local 231 if (device_may_wakeup(dev) && chip->wakeup_flag) max8925_resume() 232 disable_irq_wake(chip->core_irq); max8925_resume()
H A D	88pm860x-core.c	467 struct pm860x_chip *chip = data; pm860x_irq() local 473 i2c = (chip->id == CHIP_PM8607) ? chip->client : chip->companion; pm860x_irq() 481 handle_nested_irq(chip->irq_base + i); pm860x_irq() 488 struct pm860x_chip *chip = irq_data_get_irq_chip_data(data); pm860x_irq_lock() local 490 mutex_lock(&chip->irq_lock); pm860x_irq_lock() 495 struct pm860x_chip *chip = irq_data_get_irq_chip_data(data); pm860x_irq_sync_unlock() local 502 i2c = (chip->id == CHIP_PM8607) ? chip->client : chip->companion; pm860x_irq_sync_unlock() 522 dev_err(chip->dev, "wrong IRQ\n"); pm860x_irq_sync_unlock() 534 mutex_unlock(&chip->irq_lock); pm860x_irq_sync_unlock() 574 static int device_irq_init(struct pm860x_chip *chip, device_irq_init() argument 577 struct i2c_client *i2c = (chip->id == CHIP_PM8607) ? device_irq_init() 578 chip->client : chip->companion; device_irq_init() 588 chip->irq_mode = 0; device_irq_init() 596 chip->irq_mode = 1; device_irq_init() 609 if (chip->irq_mode) { device_irq_init() 622 mutex_init(&chip->irq_lock); device_irq_init() 627 chip->irq_base = irq_alloc_descs(irq_base, 0, nr_irqs, 0); device_irq_init() 628 if (chip->irq_base < 0) { device_irq_init() 630 chip->irq_base); device_irq_init() 634 irq_domain_add_legacy(node, nr_irqs, chip->irq_base, 0, device_irq_init() 635 &pm860x_irq_domain_ops, chip); device_irq_init() 636 chip->core_irq = i2c->irq; device_irq_init() 637 if (!chip->core_irq) device_irq_init() 640 ret = request_threaded_irq(chip->core_irq, NULL, pm860x_irq, device_irq_init() 641 flags | IRQF_ONESHOT, "88pm860x", chip); device_irq_init() 643 dev_err(chip->dev, "Failed to request IRQ: %d\n", ret); device_irq_init() 644 chip->core_irq = 0; device_irq_init() 649 chip->core_irq = 0; device_irq_init() 653 static void device_irq_exit(struct pm860x_chip *chip) device_irq_exit() argument 655 if (chip->core_irq) device_irq_exit() 656 free_irq(chip->core_irq, chip); device_irq_exit() 659 int pm8606_osc_enable(struct pm860x_chip *chip, unsigned short client) pm8606_osc_enable() argument 662 struct i2c_client *i2c = (chip->id == CHIP_PM8606) ? pm8606_osc_enable() 663 chip->client : chip->companion; pm8606_osc_enable() 665 dev_dbg(chip->dev, "%s(B): client=0x%x\n", __func__, client); pm8606_osc_enable() 666 dev_dbg(chip->dev, "%s(B): vote=0x%x status=%d\n", pm8606_osc_enable() 667 __func__, chip->osc_vote, pm8606_osc_enable() 668 chip->osc_status); pm8606_osc_enable() 670 mutex_lock(&chip->osc_lock); pm8606_osc_enable() 672 chip->osc_vote |= client; pm8606_osc_enable() 674 if (chip->osc_status != PM8606_REF_GP_OSC_ON) { pm8606_osc_enable() 675 chip->osc_status = PM8606_REF_GP_OSC_UNKNOWN; pm8606_osc_enable() 686 chip->osc_status = PM8606_REF_GP_OSC_ON; pm8606_osc_enable() 688 mutex_unlock(&chip->osc_lock); pm8606_osc_enable() 690 dev_dbg(chip->dev, "%s(A): vote=0x%x status=%d ret=%d\n", pm8606_osc_enable() 691 __func__, chip->osc_vote, pm8606_osc_enable() 692 chip->osc_status, ret); pm8606_osc_enable() 695 mutex_unlock(&chip->osc_lock); pm8606_osc_enable() 700 int pm8606_osc_disable(struct pm860x_chip *chip, unsigned short client) pm8606_osc_disable() argument 703 struct i2c_client *i2c = (chip->id == CHIP_PM8606) ? pm8606_osc_disable() 704 chip->client : chip->companion; pm8606_osc_disable() 706 dev_dbg(chip->dev, "%s(B): client=0x%x\n", __func__, client); pm8606_osc_disable() 707 dev_dbg(chip->dev, "%s(B): vote=0x%x status=%d\n", pm8606_osc_disable() 708 __func__, chip->osc_vote, pm8606_osc_disable() 709 chip->osc_status); pm8606_osc_disable() 711 mutex_lock(&chip->osc_lock); pm8606_osc_disable() 713 chip->osc_vote &= ~(client); pm8606_osc_disable() 716 if ((chip->osc_status != PM8606_REF_GP_OSC_OFF) && pm8606_osc_disable() 717 (chip->osc_vote == REF_GP_NO_CLIENTS)) { pm8606_osc_disable() 718 chip->osc_status = PM8606_REF_GP_OSC_UNKNOWN; pm8606_osc_disable() 725 chip->osc_status = PM8606_REF_GP_OSC_OFF; pm8606_osc_disable() 727 mutex_unlock(&chip->osc_lock); pm8606_osc_disable() 729 dev_dbg(chip->dev, "%s(A): vote=0x%x status=%d ret=%d\n", pm8606_osc_disable() 730 __func__, chip->osc_vote, pm8606_osc_disable() 731 chip->osc_status, ret); pm8606_osc_disable() 734 mutex_unlock(&chip->osc_lock); pm8606_osc_disable() 741 struct pm860x_chip *chip = i2c_get_clientdata(i2c); device_osc_init() local 743 mutex_init(&chip->osc_lock); device_osc_init() 750 chip->osc_vote = REF_GP_NO_CLIENTS; device_osc_init() 751 chip->osc_status = PM8606_REF_GP_OSC_OFF; device_osc_init() 754 static void device_bk_init(struct pm860x_chip *chip, device_bk_init() argument 768 ret = mfd_add_devices(chip->dev, 0, bk_devs, device_bk_init() 771 dev_err(chip->dev, "Failed to add backlight subdev\n"); device_bk_init() 774 static void device_led_init(struct pm860x_chip *chip, device_led_init() argument 788 ret = mfd_add_devices(chip->dev, 0, led_devs, device_led_init() 791 dev_err(chip->dev, "Failed to add led subdev\n"); device_led_init() 796 static void device_regulator_init(struct pm860x_chip *chip, device_regulator_init() argument 867 ret = mfd_add_devices(chip->dev, 0, reg_devs, device_regulator_init() 870 dev_err(chip->dev, "Failed to add regulator subdev\n"); device_regulator_init() 875 static void device_rtc_init(struct pm860x_chip *chip, device_rtc_init() argument 887 ret = mfd_add_devices(chip->dev, 0, &rtc_devs[0], device_rtc_init() 889 chip->irq_base, NULL); device_rtc_init() 891 dev_err(chip->dev, "Failed to add rtc subdev\n"); device_rtc_init() 894 static void device_touch_init(struct pm860x_chip *chip, device_touch_init() argument 906 ret = mfd_add_devices(chip->dev, 0, &touch_devs[0], device_touch_init() 908 chip->irq_base, NULL); device_touch_init() 910 dev_err(chip->dev, "Failed to add touch subdev\n"); device_touch_init() 913 static void device_power_init(struct pm860x_chip *chip, device_power_init() argument 925 ret = mfd_add_devices(chip->dev, 0, &power_devs[0], 1, device_power_init() 926 &battery_resources[0], chip->irq_base, NULL); device_power_init() 928 dev_err(chip->dev, "Failed to add battery subdev\n"); device_power_init() 934 ret = mfd_add_devices(chip->dev, 0, &power_devs[1], 1, device_power_init() 935 &charger_resources[0], chip->irq_base, NULL); device_power_init() 937 dev_err(chip->dev, "Failed to add charger subdev\n"); device_power_init() 941 ret = mfd_add_devices(chip->dev, 0, &power_devs[2], 1, device_power_init() 942 NULL, chip->irq_base, NULL); device_power_init() 944 dev_err(chip->dev, "Failed to add preg subdev\n"); device_power_init() 953 ret = mfd_add_devices(chip->dev, 0, &power_devs[3], 1, device_power_init() 954 NULL, chip->irq_base, NULL); device_power_init() 956 dev_err(chip->dev, "Failed to add chg-manager subdev\n"); device_power_init() 960 static void device_onkey_init(struct pm860x_chip *chip, device_onkey_init() argument 967 ret = mfd_add_devices(chip->dev, 0, &onkey_devs[0], device_onkey_init() 969 chip->irq_base, NULL); device_onkey_init() 971 dev_err(chip->dev, "Failed to add onkey subdev\n"); device_onkey_init() 974 static void device_codec_init(struct pm860x_chip *chip, device_codec_init() argument 981 ret = mfd_add_devices(chip->dev, 0, &codec_devs[0], device_codec_init() 985 dev_err(chip->dev, "Failed to add codec subdev\n"); device_codec_init() 988 static void device_8607_init(struct pm860x_chip *chip, device_8607_init() argument 996 dev_err(chip->dev, "Failed to read CHIP ID: %d\n", ret); device_8607_init() 1002 dev_info(chip->dev, "Marvell 88PM8607 (ID: %02x) detected\n", device_8607_init() 1006 dev_err(chip->dev, device_8607_init() 1014 dev_err(chip->dev, "Failed to read BUCK3 register: %d\n", ret); device_8607_init() 1018 chip->buck3_double = 1; device_8607_init() 1022 dev_err(chip->dev, "Failed to read MISC1 register: %d\n", ret); device_8607_init() 1032 dev_err(chip->dev, "Failed to access MISC1:%d\n", ret); device_8607_init() 1036 ret = device_irq_init(chip, pdata); device_8607_init() 1040 device_regulator_init(chip, pdata); device_8607_init() 1041 device_rtc_init(chip, pdata); device_8607_init() 1042 device_onkey_init(chip, pdata); device_8607_init() 1043 device_touch_init(chip, pdata); device_8607_init() 1044 device_power_init(chip, pdata); device_8607_init() 1045 device_codec_init(chip, pdata); device_8607_init() 1050 static void device_8606_init(struct pm860x_chip *chip, device_8606_init() argument 1055 device_bk_init(chip, pdata); device_8606_init() 1056 device_led_init(chip, pdata); device_8606_init() 1059 static int pm860x_device_init(struct pm860x_chip *chip, pm860x_device_init() argument 1062 chip->core_irq = 0; pm860x_device_init() 1064 switch (chip->id) { pm860x_device_init() 1066 device_8606_init(chip, chip->client, pdata); pm860x_device_init() 1069 device_8607_init(chip, chip->client, pdata); pm860x_device_init() 1073 if (chip->companion) { pm860x_device_init() 1074 switch (chip->id) { pm860x_device_init() 1076 device_8606_init(chip, chip->companion, pdata); pm860x_device_init() 1079 device_8607_init(chip, chip->companion, pdata); pm860x_device_init() 1087 static void pm860x_device_exit(struct pm860x_chip *chip) pm860x_device_exit() argument 1089 device_irq_exit(chip); pm860x_device_exit() 1090 mfd_remove_devices(chip->dev); pm860x_device_exit() 1142 struct pm860x_chip *chip; pm860x_probe() local 1160 chip = devm_kzalloc(&client->dev, pm860x_probe() 1162 if (chip == NULL) pm860x_probe() 1165 chip->id = verify_addr(client); pm860x_probe() 1166 chip->regmap = devm_regmap_init_i2c(client, &pm860x_regmap_config); pm860x_probe() 1167 if (IS_ERR(chip->regmap)) { pm860x_probe() 1168 ret = PTR_ERR(chip->regmap); pm860x_probe() 1173 chip->client = client; pm860x_probe() 1174 i2c_set_clientdata(client, chip); pm860x_probe() 1175 chip->dev = &client->dev; pm860x_probe() 1176 dev_set_drvdata(chip->dev, chip); pm860x_probe() 1181 * pdata->companion_addr is only assigned if companion chip exists. pm860x_probe() 1186 chip->companion_addr = pdata->companion_addr; pm860x_probe() 1187 chip->companion = i2c_new_dummy(chip->client->adapter, pm860x_probe() 1188 chip->companion_addr); pm860x_probe() 1189 if (!chip->companion) { pm860x_probe() 1194 chip->regmap_companion = regmap_init_i2c(chip->companion, pm860x_probe() 1196 if (IS_ERR(chip->regmap_companion)) { pm860x_probe() 1197 ret = PTR_ERR(chip->regmap_companion); pm860x_probe() 1198 dev_err(&chip->companion->dev, pm860x_probe() 1200 i2c_unregister_device(chip->companion); pm860x_probe() 1203 i2c_set_clientdata(chip->companion, chip); pm860x_probe() 1206 pm860x_device_init(chip, pdata); pm860x_probe() 1212 struct pm860x_chip *chip = i2c_get_clientdata(client); pm860x_remove() local 1214 pm860x_device_exit(chip); pm860x_remove() 1215 if (chip->companion) { pm860x_remove() 1216 regmap_exit(chip->regmap_companion); pm860x_remove() 1217 i2c_unregister_device(chip->companion); pm860x_remove() 1226 struct pm860x_chip *chip = i2c_get_clientdata(client); pm860x_suspend() local 1228 if (device_may_wakeup(dev) && chip->wakeup_flag) pm860x_suspend() 1229 enable_irq_wake(chip->core_irq); pm860x_suspend() 1236 struct pm860x_chip *chip = i2c_get_clientdata(client); pm860x_resume() local 1238 if (device_may_wakeup(dev) && chip->wakeup_flag) pm860x_resume() 1239 disable_irq_wake(chip->core_irq); pm860x_resume()
H A D	88pm805.c	136 static int device_irq_init_805(struct pm80x_chip *chip) device_irq_init_805() argument 138 struct regmap *map = chip->regmap; device_irq_init_805() 142 if (!map || !chip->irq) { device_irq_init_805() 143 dev_err(chip->dev, "incorrect parameters\n"); device_irq_init_805() 167 regmap_add_irq_chip(chip->regmap, chip->irq, flags, -1, device_irq_init_805() 168 chip->regmap_irq_chip, &chip->irq_data); device_irq_init_805() 174 static void device_irq_exit_805(struct pm80x_chip *chip) device_irq_exit_805() argument 176 regmap_del_irq_chip(chip->irq, chip->irq_data); device_irq_exit_805() 190 static int device_805_init(struct pm80x_chip *chip) device_805_init() argument 193 struct regmap *map = chip->regmap; device_805_init() 196 dev_err(chip->dev, "regmap is invalid\n"); device_805_init() 200 chip->regmap_irq_chip = &pm805_irq_chip; device_805_init() 202 ret = device_irq_init_805(chip); device_805_init() 204 dev_err(chip->dev, "Failed to init pm805 irq!\n"); device_805_init() 208 ret = mfd_add_devices(chip->dev, 0, &codec_devs[0], device_805_init() 212 dev_err(chip->dev, "Failed to add codec subdev\n"); device_805_init() 215 dev_info(chip->dev, "[%s]:Added mfd codec_devs\n", __func__); device_805_init() 220 device_irq_exit_805(chip); device_805_init() 229 struct pm80x_chip *chip; pm805_probe() local 238 chip = i2c_get_clientdata(client); pm805_probe() 240 ret = device_805_init(chip); pm805_probe() 242 dev_err(chip->dev, "Failed to initialize 88pm805 devices\n"); pm805_probe() 247 pdata->plat_config(chip, pdata); pm805_probe() 257 struct pm80x_chip *chip = i2c_get_clientdata(client); pm805_remove() local 259 mfd_remove_devices(chip->dev); pm805_remove() 260 device_irq_exit_805(chip); pm805_remove()
/linux-4.1.27/drivers/dma/hsu/
H A D	pci.c	28 struct hsu_dma_chip *chip = dev; hsu_pci_irq() local 33 dmaisr = readl(chip->regs + HSU_PCI_DMAISR); hsu_pci_irq() 34 for (i = 0; i < chip->pdata->nr_channels; i++) { hsu_pci_irq() 36 ret |= hsu_dma_irq(chip, i); hsu_pci_irq() 45 struct hsu_dma_chip *chip; hsu_pci_probe() local 69 chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL); hsu_pci_probe() 70 if (!chip) hsu_pci_probe() 73 chip->dev = &pdev->dev; hsu_pci_probe() 74 chip->regs = pcim_iomap_table(pdev)[0]; hsu_pci_probe() 75 chip->length = pci_resource_len(pdev, 0); hsu_pci_probe() 76 chip->offset = HSU_PCI_CHAN_OFFSET; hsu_pci_probe() 77 chip->irq = pdev->irq; hsu_pci_probe() 81 ret = hsu_dma_probe(chip); hsu_pci_probe() 85 ret = request_irq(chip->irq, hsu_pci_irq, 0, "hsu_dma_pci", chip); hsu_pci_probe() 89 pci_set_drvdata(pdev, chip); hsu_pci_probe() 94 hsu_dma_remove(chip); hsu_pci_probe() 100 struct hsu_dma_chip *chip = pci_get_drvdata(pdev); hsu_pci_remove() local 102 free_irq(chip->irq, chip); hsu_pci_remove() 103 hsu_dma_remove(chip); hsu_pci_remove()
/linux-4.1.27/sound/pci/nm256/
H A D	nm256.c	120 #define NM_ACK_INT(chip, X) snd_nm256_writew(chip, NM_INT_REG, (X) << 1) 137 #define NM2_ACK_INT(chip, X) snd_nm256_writel(chip, NM_INT_REG, (X)) 189 struct nm256 *chip; member in struct:nm256_stream 194 u32 buf; /* offset from chip->buffer */ 280 snd_nm256_readb(struct nm256 *chip, int offset) snd_nm256_readb() argument 282 return readb(chip->cport + offset); snd_nm256_readb() 286 snd_nm256_readw(struct nm256 *chip, int offset) snd_nm256_readw() argument 288 return readw(chip->cport + offset); snd_nm256_readw() 292 snd_nm256_readl(struct nm256 *chip, int offset) snd_nm256_readl() argument 294 return readl(chip->cport + offset); snd_nm256_readl() 298 snd_nm256_writeb(struct nm256 *chip, int offset, u8 val) snd_nm256_writeb() argument 300 writeb(val, chip->cport + offset); snd_nm256_writeb() 304 snd_nm256_writew(struct nm256 *chip, int offset, u16 val) snd_nm256_writew() argument 306 writew(val, chip->cport + offset); snd_nm256_writew() 310 snd_nm256_writel(struct nm256 *chip, int offset, u32 val) snd_nm256_writel() argument 312 writel(val, chip->cport + offset); snd_nm256_writel() 316 snd_nm256_write_buffer(struct nm256 *chip, void *src, int offset, int size) snd_nm256_write_buffer() argument 318 offset -= chip->buffer_start; snd_nm256_write_buffer() 320 if (offset < 0 || offset >= chip->buffer_size) { snd_nm256_write_buffer() 321 dev_err(chip->card->dev, snd_nm256_write_buffer() 327 memcpy_toio(chip->buffer + offset, src, size); snd_nm256_write_buffer() 344 snd_nm256_load_one_coefficient(struct nm256 *chip, int stream, u32 port, int which) snd_nm256_load_one_coefficient() argument 346 u32 coeff_buf = chip->coeff_buf[stream]; snd_nm256_load_one_coefficient() 350 snd_nm256_write_buffer(chip, coefficients + offset, coeff_buf, size); snd_nm256_load_one_coefficient() 351 snd_nm256_writel(chip, port, coeff_buf); snd_nm256_load_one_coefficient() 355 snd_nm256_writel(chip, port + 4, coeff_buf + size); snd_nm256_load_one_coefficient() 359 snd_nm256_load_coefficient(struct nm256 *chip, int stream, int number) snd_nm256_load_coefficient() argument 369 if (snd_nm256_readb(chip, poffset) & 1) { snd_nm256_load_coefficient() 370 dev_dbg(chip->card->dev, snd_nm256_load_coefficient() 380 if (! chip->use_cache) { snd_nm256_load_coefficient() 381 snd_nm256_load_one_coefficient(chip, stream, addr, number); snd_nm256_load_coefficient() 384 if (! chip->coeffs_current) { snd_nm256_load_coefficient() 385 snd_nm256_write_buffer(chip, coefficients, chip->all_coeff_buf, snd_nm256_load_coefficient() 387 chip->coeffs_current = 1; snd_nm256_load_coefficient() 389 u32 base = chip->all_coeff_buf; snd_nm256_load_coefficient() 392 snd_nm256_writel(chip, addr, base + offset); snd_nm256_load_coefficient() 395 snd_nm256_writel(chip, addr + 4, base + end_offset); snd_nm256_load_coefficient() 429 snd_nm256_set_format(struct nm256 *chip, struct nm256_stream *s, snd_nm256_set_format() argument 450 snd_nm256_load_coefficient(chip, 0, rate_index); /* 0 = playback */ snd_nm256_set_format() 451 snd_nm256_writeb(chip, snd_nm256_set_format() 456 snd_nm256_load_coefficient(chip, 1, rate_index); /* 1 = record */ snd_nm256_set_format() 457 snd_nm256_writeb(chip, snd_nm256_set_format() 465 static int snd_nm256_acquire_irq(struct nm256 *chip) snd_nm256_acquire_irq() argument 467 mutex_lock(&chip->irq_mutex); snd_nm256_acquire_irq() 468 if (chip->irq < 0) { snd_nm256_acquire_irq() 469 if (request_irq(chip->pci->irq, chip->interrupt, IRQF_SHARED, snd_nm256_acquire_irq() 470 KBUILD_MODNAME, chip)) { snd_nm256_acquire_irq() 471 dev_err(chip->card->dev, snd_nm256_acquire_irq() 472 "unable to grab IRQ %d\n", chip->pci->irq); snd_nm256_acquire_irq() 473 mutex_unlock(&chip->irq_mutex); snd_nm256_acquire_irq() 476 chip->irq = chip->pci->irq; snd_nm256_acquire_irq() 478 chip->irq_acks++; snd_nm256_acquire_irq() 479 mutex_unlock(&chip->irq_mutex); snd_nm256_acquire_irq() 484 static void snd_nm256_release_irq(struct nm256 *chip) snd_nm256_release_irq() argument 486 mutex_lock(&chip->irq_mutex); snd_nm256_release_irq() 487 if (chip->irq_acks > 0) snd_nm256_release_irq() 488 chip->irq_acks--; snd_nm256_release_irq() 489 if (chip->irq_acks == 0 && chip->irq >= 0) { snd_nm256_release_irq() 490 free_irq(chip->irq, chip); snd_nm256_release_irq() 491 chip->irq = -1; snd_nm256_release_irq() 493 mutex_unlock(&chip->irq_mutex); snd_nm256_release_irq() 501 static void snd_nm256_pcm_mark(struct nm256 *chip, struct nm256_stream *s, int reg) snd_nm256_pcm_mark() argument 505 snd_nm256_writel(chip, reg, s->buf + s->cur_period * s->period_size); snd_nm256_pcm_mark() 508 #define snd_nm256_playback_mark(chip, s) snd_nm256_pcm_mark(chip, s, NM_PBUFFER_WMARK) 509 #define snd_nm256_capture_mark(chip, s) snd_nm256_pcm_mark(chip, s, NM_RBUFFER_WMARK) 512 snd_nm256_playback_start(struct nm256 *chip, struct nm256_stream *s, snd_nm256_playback_start() argument 516 snd_nm256_writel(chip, NM_PBUFFER_START, s->buf); snd_nm256_playback_start() 517 snd_nm256_writel(chip, NM_PBUFFER_END, s->buf + s->dma_size - (1 << s->shift)); snd_nm256_playback_start() 518 snd_nm256_writel(chip, NM_PBUFFER_CURRP, s->buf); snd_nm256_playback_start() 519 snd_nm256_playback_mark(chip, s); snd_nm256_playback_start() 522 snd_nm256_writeb(chip, NM_PLAYBACK_ENABLE_REG, snd_nm256_playback_start() 525 snd_nm256_writew(chip, NM_AUDIO_MUTE_REG, 0x0); snd_nm256_playback_start() 529 snd_nm256_capture_start(struct nm256 *chip, struct nm256_stream *s, snd_nm256_capture_start() argument 533 snd_nm256_writel(chip, NM_RBUFFER_START, s->buf); snd_nm256_capture_start() 534 snd_nm256_writel(chip, NM_RBUFFER_END, s->buf + s->dma_size); snd_nm256_capture_start() 535 snd_nm256_writel(chip, NM_RBUFFER_CURRP, s->buf); snd_nm256_capture_start() 536 snd_nm256_capture_mark(chip, s); snd_nm256_capture_start() 539 snd_nm256_writeb(chip, NM_RECORD_ENABLE_REG, snd_nm256_capture_start() 545 snd_nm256_playback_stop(struct nm256 *chip) snd_nm256_playback_stop() argument 548 snd_nm256_writew(chip, NM_AUDIO_MUTE_REG, snd_nm256_playback_stop() 551 snd_nm256_writeb(chip, NM_PLAYBACK_ENABLE_REG, 0); snd_nm256_playback_stop() 555 snd_nm256_capture_stop(struct nm256 *chip) snd_nm256_capture_stop() argument 558 snd_nm256_writeb(chip, NM_RECORD_ENABLE_REG, 0); snd_nm256_capture_stop() 564 struct nm256 *chip = snd_pcm_substream_chip(substream); snd_nm256_playback_trigger() local 571 spin_lock(&chip->reg_lock); snd_nm256_playback_trigger() 578 snd_nm256_playback_start(chip, s, substream); snd_nm256_playback_trigger() 587 snd_nm256_playback_stop(chip); snd_nm256_playback_trigger() 595 spin_unlock(&chip->reg_lock); snd_nm256_playback_trigger() 602 struct nm256 *chip = snd_pcm_substream_chip(substream); snd_nm256_capture_trigger() local 609 spin_lock(&chip->reg_lock); snd_nm256_capture_trigger() 614 snd_nm256_capture_start(chip, s, substream); snd_nm256_capture_trigger() 621 snd_nm256_capture_stop(chip); snd_nm256_capture_trigger() 629 spin_unlock(&chip->reg_lock); snd_nm256_capture_trigger() 639 struct nm256 *chip = snd_pcm_substream_chip(substream); snd_nm256_pcm_prepare() local 650 spin_lock_irq(&chip->reg_lock); snd_nm256_pcm_prepare() 652 snd_nm256_set_format(chip, s, substream); snd_nm256_pcm_prepare() 653 spin_unlock_irq(&chip->reg_lock); snd_nm256_pcm_prepare() 665 struct nm256 *chip = snd_pcm_substream_chip(substream); snd_nm256_playback_pointer() local 671 curp = snd_nm256_readl(chip, NM_PBUFFER_CURRP) - (unsigned long)s->buf; snd_nm256_playback_pointer() 679 struct nm256 *chip = snd_pcm_substream_chip(substream); snd_nm256_capture_pointer() local 685 curp = snd_nm256_readl(chip, NM_RBUFFER_CURRP) - (unsigned long)s->buf; snd_nm256_capture_pointer() 754 snd_nm256_playback_update(struct nm256 *chip) snd_nm256_playback_update() argument 758 s = &chip->streams[SNDRV_PCM_STREAM_PLAYBACK]; snd_nm256_playback_update() 760 spin_unlock(&chip->reg_lock); snd_nm256_playback_update() 762 spin_lock(&chip->reg_lock); snd_nm256_playback_update() 763 snd_nm256_playback_mark(chip, s); snd_nm256_playback_update() 769 snd_nm256_capture_update(struct nm256 *chip) snd_nm256_capture_update() argument 773 s = &chip->streams[SNDRV_PCM_STREAM_CAPTURE]; snd_nm256_capture_update() 775 spin_unlock(&chip->reg_lock); snd_nm256_capture_update() 777 spin_lock(&chip->reg_lock); snd_nm256_capture_update() 778 snd_nm256_capture_mark(chip, s); snd_nm256_capture_update() 836 static void snd_nm256_setup_stream(struct nm256 *chip, struct nm256_stream *s, snd_nm256_setup_stream() argument 859 struct nm256 *chip = snd_pcm_substream_chip(substream); snd_nm256_playback_open() local 861 if (snd_nm256_acquire_irq(chip) < 0) snd_nm256_playback_open() 863 snd_nm256_setup_stream(chip, &chip->streams[SNDRV_PCM_STREAM_PLAYBACK], snd_nm256_playback_open() 871 struct nm256 *chip = snd_pcm_substream_chip(substream); snd_nm256_capture_open() local 873 if (snd_nm256_acquire_irq(chip) < 0) snd_nm256_capture_open() 875 snd_nm256_setup_stream(chip, &chip->streams[SNDRV_PCM_STREAM_CAPTURE], snd_nm256_capture_open() 886 struct nm256 *chip = snd_pcm_substream_chip(substream); snd_nm256_playback_close() local 888 snd_nm256_release_irq(chip); snd_nm256_playback_close() 896 struct nm256 *chip = snd_pcm_substream_chip(substream); snd_nm256_capture_close() local 898 snd_nm256_release_irq(chip); snd_nm256_capture_close() 935 snd_nm256_pcm(struct nm256 *chip, int device) snd_nm256_pcm() argument 941 struct nm256_stream *s = &chip->streams[i]; snd_nm256_pcm() 942 s->bufptr = chip->buffer + (s->buf - chip->buffer_start); snd_nm256_pcm() 943 s->bufptr_addr = chip->buffer_addr + (s->buf - chip->buffer_start); snd_nm256_pcm() 946 err = snd_pcm_new(chip->card, chip->card->driver, device, snd_nm256_pcm() 954 pcm->private_data = chip; snd_nm256_pcm() 956 chip->pcm = pcm; snd_nm256_pcm() 966 snd_nm256_init_chip(struct nm256 *chip) snd_nm256_init_chip() argument 969 snd_nm256_writeb(chip, 0x0, 0x11); snd_nm256_init_chip() 970 snd_nm256_writew(chip, 0x214, 0); snd_nm256_init_chip() 972 //snd_nm256_playback_stop(chip); snd_nm256_init_chip() 973 //snd_nm256_capture_stop(chip); snd_nm256_init_chip() 978 snd_nm256_intr_check(struct nm256 *chip) snd_nm256_intr_check() argument 980 if (chip->badintrcount++ > 1000) { snd_nm256_intr_check() 993 if (chip->streams[SNDRV_PCM_STREAM_PLAYBACK].running) snd_nm256_intr_check() 994 snd_nm256_playback_stop(chip); snd_nm256_intr_check() 995 if (chip->streams[SNDRV_PCM_STREAM_CAPTURE].running) snd_nm256_intr_check() 996 snd_nm256_capture_stop(chip); snd_nm256_intr_check() 997 chip->badintrcount = 0; snd_nm256_intr_check() 1015 struct nm256 *chip = dev_id; snd_nm256_interrupt() local 1019 status = snd_nm256_readw(chip, NM_INT_REG); snd_nm256_interrupt() 1023 return snd_nm256_intr_check(chip); snd_nm256_interrupt() 1025 chip->badintrcount = 0; snd_nm256_interrupt() 1029 spin_lock(&chip->reg_lock); snd_nm256_interrupt() 1032 NM_ACK_INT(chip, NM_PLAYBACK_INT); snd_nm256_interrupt() 1033 snd_nm256_playback_update(chip); snd_nm256_interrupt() 1038 NM_ACK_INT(chip, NM_RECORD_INT); snd_nm256_interrupt() 1039 snd_nm256_capture_update(chip); snd_nm256_interrupt() 1044 NM_ACK_INT(chip, NM_MISC_INT_1); snd_nm256_interrupt() 1045 dev_dbg(chip->card->dev, "NM256: Got misc interrupt #1\n"); snd_nm256_interrupt() 1046 snd_nm256_writew(chip, NM_INT_REG, 0x8000); snd_nm256_interrupt() 1047 cbyte = snd_nm256_readb(chip, 0x400); snd_nm256_interrupt() 1048 snd_nm256_writeb(chip, 0x400, cbyte | 2); snd_nm256_interrupt() 1053 NM_ACK_INT(chip, NM_MISC_INT_2); snd_nm256_interrupt() 1054 dev_dbg(chip->card->dev, "NM256: Got misc interrupt #2\n"); snd_nm256_interrupt() 1055 cbyte = snd_nm256_readb(chip, 0x400); snd_nm256_interrupt() 1056 snd_nm256_writeb(chip, 0x400, cbyte & ~2); snd_nm256_interrupt() 1061 dev_dbg(chip->card->dev, snd_nm256_interrupt() 1065 NM_ACK_INT(chip, status); snd_nm256_interrupt() 1068 spin_unlock(&chip->reg_lock); snd_nm256_interrupt() 1081 struct nm256 *chip = dev_id; snd_nm256_interrupt_zx() local 1085 status = snd_nm256_readl(chip, NM_INT_REG); snd_nm256_interrupt_zx() 1089 return snd_nm256_intr_check(chip); snd_nm256_interrupt_zx() 1091 chip->badintrcount = 0; snd_nm256_interrupt_zx() 1095 spin_lock(&chip->reg_lock); snd_nm256_interrupt_zx() 1098 NM2_ACK_INT(chip, NM2_PLAYBACK_INT); snd_nm256_interrupt_zx() 1099 snd_nm256_playback_update(chip); snd_nm256_interrupt_zx() 1104 NM2_ACK_INT(chip, NM2_RECORD_INT); snd_nm256_interrupt_zx() 1105 snd_nm256_capture_update(chip); snd_nm256_interrupt_zx() 1110 NM2_ACK_INT(chip, NM2_MISC_INT_1); snd_nm256_interrupt_zx() 1111 dev_dbg(chip->card->dev, "NM256: Got misc interrupt #1\n"); snd_nm256_interrupt_zx() 1112 cbyte = snd_nm256_readb(chip, 0x400); snd_nm256_interrupt_zx() 1113 snd_nm256_writeb(chip, 0x400, cbyte | 2); snd_nm256_interrupt_zx() 1118 NM2_ACK_INT(chip, NM2_MISC_INT_2); snd_nm256_interrupt_zx() 1119 dev_dbg(chip->card->dev, "NM256: Got misc interrupt #2\n"); snd_nm256_interrupt_zx() 1120 cbyte = snd_nm256_readb(chip, 0x400); snd_nm256_interrupt_zx() 1121 snd_nm256_writeb(chip, 0x400, cbyte & ~2); snd_nm256_interrupt_zx() 1126 dev_dbg(chip->card->dev, snd_nm256_interrupt_zx() 1130 NM2_ACK_INT(chip, status); snd_nm256_interrupt_zx() 1133 spin_unlock(&chip->reg_lock); snd_nm256_interrupt_zx() 1146 snd_nm256_ac97_ready(struct nm256 *chip) snd_nm256_ac97_ready() argument 1152 testaddr = chip->mixer_status_offset; snd_nm256_ac97_ready() 1153 testb = chip->mixer_status_mask; snd_nm256_ac97_ready() 1159 if ((snd_nm256_readw(chip, testaddr) & testb) == 0) snd_nm256_ac97_ready() 1217 struct nm256 *chip = ac97->private_data; snd_nm256_ac97_read() local 1222 return chip->ac97_regs[idx]; snd_nm256_ac97_read() 1231 struct nm256 *chip = ac97->private_data; snd_nm256_ac97_write() local 1239 base = chip->mixer_base; snd_nm256_ac97_write() 1241 snd_nm256_ac97_ready(chip); snd_nm256_ac97_write() 1245 snd_nm256_writew(chip, base + reg, val); snd_nm256_ac97_write() 1247 if (snd_nm256_ac97_ready(chip)) { snd_nm256_ac97_write() 1249 chip->ac97_regs[idx] = val; snd_nm256_ac97_write() 1253 dev_dbg(chip->card->dev, "nm256: ac97 codec not ready..\n"); snd_nm256_ac97_write() 1277 struct nm256 *chip = ac97->private_data; snd_nm256_ac97_reset() local 1280 snd_nm256_writeb(chip, 0x6c0, 1); snd_nm256_ac97_reset() 1281 if (! chip->reset_workaround) { snd_nm256_ac97_reset() 1283 snd_nm256_writeb(chip, 0x6cc, 0x87); snd_nm256_ac97_reset() 1285 if (! chip->reset_workaround_2) { snd_nm256_ac97_reset() 1287 snd_nm256_writeb(chip, 0x6cc, 0x80); snd_nm256_ac97_reset() 1288 snd_nm256_writeb(chip, 0x6cc, 0x0); snd_nm256_ac97_reset() 1290 if (! chip->in_resume) { snd_nm256_ac97_reset() 1304 snd_nm256_mixer(struct nm256 *chip) snd_nm256_mixer() argument 1315 chip->ac97_regs = kcalloc(ARRAY_SIZE(nm256_ac97_init_val), snd_nm256_mixer() 1317 if (! chip->ac97_regs) snd_nm256_mixer() 1320 if ((err = snd_ac97_bus(chip->card, 0, &ops, NULL, &pbus)) < 0) snd_nm256_mixer() 1325 ac97.private_data = chip; snd_nm256_mixer() 1328 err = snd_ac97_mixer(pbus, &ac97, &chip->ac97); snd_nm256_mixer() 1331 if (! (chip->ac97->id & (0xf0000000))) { snd_nm256_mixer() 1333 sprintf(chip->card->mixername, "%s AC97", chip->card->driver); snd_nm256_mixer() 1345 snd_nm256_peek_for_sig(struct nm256 *chip) snd_nm256_peek_for_sig() argument 1350 unsigned long pointer_found = chip->buffer_end - 0x1400; snd_nm256_peek_for_sig() 1353 temp = ioremap_nocache(chip->buffer_addr + chip->buffer_end - 0x400, 16); snd_nm256_peek_for_sig() 1355 dev_err(chip->card->dev, snd_nm256_peek_for_sig() 1368 pointer < chip->buffer_size || snd_nm256_peek_for_sig() 1369 pointer > chip->buffer_end) { snd_nm256_peek_for_sig() 1370 dev_err(chip->card->dev, snd_nm256_peek_for_sig() 1376 dev_info(chip->card->dev, snd_nm256_peek_for_sig() 1383 chip->buffer_end = pointer_found; snd_nm256_peek_for_sig() 1396 struct nm256 *chip = card->private_data; nm256_suspend() local 1399 snd_pcm_suspend_all(chip->pcm); nm256_suspend() 1400 snd_ac97_suspend(chip->ac97); nm256_suspend() 1401 chip->coeffs_current = 0; nm256_suspend() 1408 struct nm256 *chip = card->private_data; nm256_resume() local 1412 chip->in_resume = 1; nm256_resume() 1414 snd_nm256_init_chip(chip); nm256_resume() 1417 snd_ac97_resume(chip->ac97); nm256_resume() 1420 struct nm256_stream *s = &chip->streams[i]; nm256_resume() 1422 spin_lock_irq(&chip->reg_lock); nm256_resume() 1423 snd_nm256_set_format(chip, s, s->substream); nm256_resume() 1424 spin_unlock_irq(&chip->reg_lock); nm256_resume() 1429 chip->in_resume = 0; nm256_resume() 1439 static int snd_nm256_free(struct nm256 *chip) snd_nm256_free() argument 1441 if (chip->streams[SNDRV_PCM_STREAM_PLAYBACK].running) snd_nm256_free() 1442 snd_nm256_playback_stop(chip); snd_nm256_free() 1443 if (chip->streams[SNDRV_PCM_STREAM_CAPTURE].running) snd_nm256_free() 1444 snd_nm256_capture_stop(chip); snd_nm256_free() 1446 if (chip->irq >= 0) snd_nm256_free() 1447 free_irq(chip->irq, chip); snd_nm256_free() 1449 iounmap(chip->cport); snd_nm256_free() 1450 iounmap(chip->buffer); snd_nm256_free() 1451 release_and_free_resource(chip->res_cport); snd_nm256_free() 1452 release_and_free_resource(chip->res_buffer); snd_nm256_free() 1454 pci_disable_device(chip->pci); snd_nm256_free() 1455 kfree(chip->ac97_regs); snd_nm256_free() 1456 kfree(chip); snd_nm256_free() 1462 struct nm256 *chip = device->device_data; snd_nm256_dev_free() local 1463 return snd_nm256_free(chip); snd_nm256_dev_free() 1470 struct nm256 *chip; snd_nm256_create() local 1482 chip = kzalloc(sizeof(*chip), GFP_KERNEL); snd_nm256_create() 1483 if (chip == NULL) { snd_nm256_create() 1488 chip->card = card; snd_nm256_create() 1489 chip->pci = pci; snd_nm256_create() 1490 chip->use_cache = use_cache; snd_nm256_create() 1491 spin_lock_init(&chip->reg_lock); snd_nm256_create() 1492 chip->irq = -1; snd_nm256_create() 1493 mutex_init(&chip->irq_mutex); snd_nm256_create() 1496 chip->streams[SNDRV_PCM_STREAM_PLAYBACK].bufsize = playback_bufsize * 1024; snd_nm256_create() 1497 chip->streams[SNDRV_PCM_STREAM_CAPTURE].bufsize = capture_bufsize * 1024; snd_nm256_create() 1506 chip->buffer_addr = pci_resource_start(pci, 0); snd_nm256_create() 1507 chip->cport_addr = pci_resource_start(pci, 1); snd_nm256_create() 1511 chip->res_cport = request_mem_region(chip->cport_addr, NM_PORT2_SIZE, snd_nm256_create() 1513 if (chip->res_cport == NULL) { snd_nm256_create() 1515 chip->cport_addr, NM_PORT2_SIZE); snd_nm256_create() 1519 chip->cport = ioremap_nocache(chip->cport_addr, NM_PORT2_SIZE); snd_nm256_create() 1520 if (chip->cport == NULL) { snd_nm256_create() 1522 chip->cport_addr); snd_nm256_create() 1529 pval = snd_nm256_readw(chip, NM_MIXER_PRESENCE); snd_nm256_create() 1544 chip->buffer_end = 2560 * 1024; snd_nm256_create() 1545 chip->interrupt = snd_nm256_interrupt; snd_nm256_create() 1546 chip->mixer_status_offset = NM_MIXER_STATUS_OFFSET; snd_nm256_create() 1547 chip->mixer_status_mask = NM_MIXER_READY_MASK; snd_nm256_create() 1550 if (snd_nm256_readb(chip, 0xa0b) != 0) snd_nm256_create() 1551 chip->buffer_end = 6144 * 1024; snd_nm256_create() 1553 chip->buffer_end = 4096 * 1024; snd_nm256_create() 1555 chip->interrupt = snd_nm256_interrupt_zx; snd_nm256_create() 1556 chip->mixer_status_offset = NM2_MIXER_STATUS_OFFSET; snd_nm256_create() 1557 chip->mixer_status_mask = NM2_MIXER_READY_MASK; snd_nm256_create() 1560 chip->buffer_size = chip->streams[SNDRV_PCM_STREAM_PLAYBACK].bufsize + snd_nm256_create() 1561 chip->streams[SNDRV_PCM_STREAM_CAPTURE].bufsize; snd_nm256_create() 1562 if (chip->use_cache) snd_nm256_create() 1563 chip->buffer_size += NM_TOTAL_COEFF_COUNT * 4; snd_nm256_create() 1565 chip->buffer_size += NM_MAX_PLAYBACK_COEF_SIZE + NM_MAX_RECORD_COEF_SIZE; snd_nm256_create() 1567 if (buffer_top >= chip->buffer_size && buffer_top < chip->buffer_end) snd_nm256_create() 1568 chip->buffer_end = buffer_top; snd_nm256_create() 1571 if ((err = snd_nm256_peek_for_sig(chip)) < 0) snd_nm256_create() 1575 chip->buffer_start = chip->buffer_end - chip->buffer_size; snd_nm256_create() 1576 chip->buffer_addr += chip->buffer_start; snd_nm256_create() 1579 chip->buffer_start, chip->buffer_end); snd_nm256_create() 1581 chip->res_buffer = request_mem_region(chip->buffer_addr, snd_nm256_create() 1582 chip->buffer_size, snd_nm256_create() 1584 if (chip->res_buffer == NULL) { snd_nm256_create() 1586 chip->buffer_addr, chip->buffer_size); snd_nm256_create() 1590 chip->buffer = ioremap_nocache(chip->buffer_addr, chip->buffer_size); snd_nm256_create() 1591 if (chip->buffer == NULL) { snd_nm256_create() 1594 chip->buffer_addr); snd_nm256_create() 1599 addr = chip->buffer_start; snd_nm256_create() 1600 chip->streams[SNDRV_PCM_STREAM_PLAYBACK].buf = addr; snd_nm256_create() 1601 addr += chip->streams[SNDRV_PCM_STREAM_PLAYBACK].bufsize; snd_nm256_create() 1602 chip->streams[SNDRV_PCM_STREAM_CAPTURE].buf = addr; snd_nm256_create() 1603 addr += chip->streams[SNDRV_PCM_STREAM_CAPTURE].bufsize; snd_nm256_create() 1604 if (chip->use_cache) { snd_nm256_create() 1605 chip->all_coeff_buf = addr; snd_nm256_create() 1607 chip->coeff_buf[SNDRV_PCM_STREAM_PLAYBACK] = addr; snd_nm256_create() 1609 chip->coeff_buf[SNDRV_PCM_STREAM_CAPTURE] = addr; snd_nm256_create() 1613 chip->mixer_base = NM_MIXER_OFFSET; snd_nm256_create() 1615 chip->coeffs_current = 0; snd_nm256_create() 1617 snd_nm256_init_chip(chip); snd_nm256_create() 1621 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) snd_nm256_create() 1624 *chip_ret = chip; snd_nm256_create() 1628 snd_nm256_free(chip); snd_nm256_create() 1650 struct nm256 *chip; snd_nm256_probe() local 1703 if ((err = snd_nm256_create(card, pci, &chip)) < 0) { snd_nm256_probe() 1707 card->private_data = chip; snd_nm256_probe() 1711 chip->reset_workaround = 1; snd_nm256_probe() 1716 chip->reset_workaround_2 = 1; snd_nm256_probe() 1719 if ((err = snd_nm256_pcm(chip, 0)) < 0 || snd_nm256_probe() 1720 (err = snd_nm256_mixer(chip)) < 0) { snd_nm256_probe() 1728 chip->buffer_addr, chip->cport_addr, chip->irq); snd_nm256_probe()
/linux-4.1.27/sound/atmel/
H A D	ac97c.c	89 #define ac97c_writel(chip, reg, val) \ 90 __raw_writel((val), (chip)->regs + AC97C_##reg) 91 #define ac97c_readl(chip, reg) \ 92 __raw_readl((chip)->regs + AC97C_##reg) 97 struct atmel_ac97c *chip = arg; atmel_ac97c_dma_playback_period_done() local 98 snd_pcm_period_elapsed(chip->playback_substream); atmel_ac97c_dma_playback_period_done() 103 struct atmel_ac97c *chip = arg; atmel_ac97c_dma_capture_period_done() local 104 snd_pcm_period_elapsed(chip->capture_substream); atmel_ac97c_dma_capture_period_done() 107 static int atmel_ac97c_prepare_dma(struct atmel_ac97c *chip, atmel_ac97c_prepare_dma() argument 121 dev_dbg(&chip->pdev->dev, "too complex transfer\n"); atmel_ac97c_prepare_dma() 126 chan = chip->dma.tx_chan; atmel_ac97c_prepare_dma() 128 chan = chip->dma.rx_chan; atmel_ac97c_prepare_dma() 136 dev_dbg(&chip->pdev->dev, "could not prepare cyclic DMA\n"); atmel_ac97c_prepare_dma() 142 set_bit(DMA_TX_READY, &chip->flags); atmel_ac97c_prepare_dma() 145 set_bit(DMA_RX_READY, &chip->flags); atmel_ac97c_prepare_dma() 148 cdesc->period_callback_param = chip; atmel_ac97c_prepare_dma() 177 struct atmel_ac97c *chip = snd_pcm_substream_chip(substream); atmel_ac97c_playback_open() local 181 chip->opened++; atmel_ac97c_playback_open() 183 if (chip->cur_rate) { atmel_ac97c_playback_open() 184 runtime->hw.rate_min = chip->cur_rate; atmel_ac97c_playback_open() 185 runtime->hw.rate_max = chip->cur_rate; atmel_ac97c_playback_open() 187 if (chip->cur_format) atmel_ac97c_playback_open() 188 runtime->hw.formats = pcm_format_to_bits(chip->cur_format); atmel_ac97c_playback_open() 190 chip->playback_substream = substream; atmel_ac97c_playback_open() 196 struct atmel_ac97c *chip = snd_pcm_substream_chip(substream); atmel_ac97c_capture_open() local 200 chip->opened++; atmel_ac97c_capture_open() 202 if (chip->cur_rate) { atmel_ac97c_capture_open() 203 runtime->hw.rate_min = chip->cur_rate; atmel_ac97c_capture_open() 204 runtime->hw.rate_max = chip->cur_rate; atmel_ac97c_capture_open() 206 if (chip->cur_format) atmel_ac97c_capture_open() 207 runtime->hw.formats = pcm_format_to_bits(chip->cur_format); atmel_ac97c_capture_open() 209 chip->capture_substream = substream; atmel_ac97c_capture_open() 215 struct atmel_ac97c *chip = snd_pcm_substream_chip(substream); atmel_ac97c_playback_close() local 218 chip->opened--; atmel_ac97c_playback_close() 219 if (!chip->opened) { atmel_ac97c_playback_close() 220 chip->cur_rate = 0; atmel_ac97c_playback_close() 221 chip->cur_format = 0; atmel_ac97c_playback_close() 225 chip->playback_substream = NULL; atmel_ac97c_playback_close() 232 struct atmel_ac97c *chip = snd_pcm_substream_chip(substream); atmel_ac97c_capture_close() local 235 chip->opened--; atmel_ac97c_capture_close() 236 if (!chip->opened) { atmel_ac97c_capture_close() 237 chip->cur_rate = 0; atmel_ac97c_capture_close() 238 chip->cur_format = 0; atmel_ac97c_capture_close() 242 chip->capture_substream = NULL; atmel_ac97c_capture_close() 250 struct atmel_ac97c *chip = snd_pcm_substream_chip(substream); atmel_ac97c_playback_hw_params() local 261 if (test_and_clear_bit(DMA_TX_READY, &chip->flags)) atmel_ac97c_playback_hw_params() 262 dw_dma_cyclic_free(chip->dma.tx_chan); atmel_ac97c_playback_hw_params() 266 chip->cur_rate = params_rate(hw_params); atmel_ac97c_playback_hw_params() 267 chip->cur_format = params_format(hw_params); atmel_ac97c_playback_hw_params() 276 struct atmel_ac97c *chip = snd_pcm_substream_chip(substream); atmel_ac97c_capture_hw_params() local 285 if (test_and_clear_bit(DMA_RX_READY, &chip->flags)) atmel_ac97c_capture_hw_params() 286 dw_dma_cyclic_free(chip->dma.rx_chan); atmel_ac97c_capture_hw_params() 290 chip->cur_rate = params_rate(hw_params); atmel_ac97c_capture_hw_params() 291 chip->cur_format = params_format(hw_params); atmel_ac97c_capture_hw_params() 299 struct atmel_ac97c *chip = snd_pcm_substream_chip(substream); atmel_ac97c_playback_hw_free() local 301 if (test_and_clear_bit(DMA_TX_READY, &chip->flags)) atmel_ac97c_playback_hw_free() 302 dw_dma_cyclic_free(chip->dma.tx_chan); atmel_ac97c_playback_hw_free() 309 struct atmel_ac97c *chip = snd_pcm_substream_chip(substream); atmel_ac97c_capture_hw_free() local 311 if (test_and_clear_bit(DMA_RX_READY, &chip->flags)) atmel_ac97c_capture_hw_free() 312 dw_dma_cyclic_free(chip->dma.rx_chan); atmel_ac97c_capture_hw_free() 319 struct atmel_ac97c *chip = snd_pcm_substream_chip(substream); atmel_ac97c_playback_prepare() local 322 unsigned long word = ac97c_readl(chip, OCA); atmel_ac97c_playback_prepare() 325 chip->playback_period = 0; atmel_ac97c_playback_prepare() 341 ac97c_writel(chip, OCA, word); atmel_ac97c_playback_prepare() 344 word = ac97c_readl(chip, CAMR); atmel_ac97c_playback_prepare() 345 if (chip->opened <= 1) atmel_ac97c_playback_prepare() 359 word = ac97c_readl(chip, OCA); atmel_ac97c_playback_prepare() 361 ac97c_writel(chip, OCA, word); atmel_ac97c_playback_prepare() 368 ac97c_writel(chip, CAMR, word); atmel_ac97c_playback_prepare() 371 word = ac97c_readl(chip, IMR); atmel_ac97c_playback_prepare() 373 ac97c_writel(chip, IER, word); atmel_ac97c_playback_prepare() 377 word = ac97c_readl(chip, MR); atmel_ac97c_playback_prepare() 379 ac97c_writel(chip, MR, word); atmel_ac97c_playback_prepare() 381 word = ac97c_readl(chip, MR); atmel_ac97c_playback_prepare() 383 ac97c_writel(chip, MR, word); atmel_ac97c_playback_prepare() 386 retval = snd_ac97_set_rate(chip->ac97, AC97_PCM_FRONT_DAC_RATE, atmel_ac97c_playback_prepare() 389 dev_dbg(&chip->pdev->dev, "could not set rate %d Hz\n", atmel_ac97c_playback_prepare() 393 if (!test_bit(DMA_TX_READY, &chip->flags)) atmel_ac97c_playback_prepare() 394 retval = atmel_ac97c_prepare_dma(chip, substream, atmel_ac97c_playback_prepare() 398 writel(runtime->dma_addr, chip->regs + ATMEL_PDC_TPR); atmel_ac97c_playback_prepare() 399 writel(block_size / 2, chip->regs + ATMEL_PDC_TCR); atmel_ac97c_playback_prepare() 401 chip->regs + ATMEL_PDC_TNPR); atmel_ac97c_playback_prepare() 402 writel(block_size / 2, chip->regs + ATMEL_PDC_TNCR); atmel_ac97c_playback_prepare() 410 struct atmel_ac97c *chip = snd_pcm_substream_chip(substream); atmel_ac97c_capture_prepare() local 413 unsigned long word = ac97c_readl(chip, ICA); atmel_ac97c_capture_prepare() 416 chip->capture_period = 0; atmel_ac97c_capture_prepare() 432 ac97c_writel(chip, ICA, word); atmel_ac97c_capture_prepare() 435 word = ac97c_readl(chip, CAMR); atmel_ac97c_capture_prepare() 436 if (chip->opened <= 1) atmel_ac97c_capture_prepare() 450 word = ac97c_readl(chip, ICA); atmel_ac97c_capture_prepare() 452 ac97c_writel(chip, ICA, word); atmel_ac97c_capture_prepare() 459 ac97c_writel(chip, CAMR, word); atmel_ac97c_capture_prepare() 462 word = ac97c_readl(chip, IMR); atmel_ac97c_capture_prepare() 464 ac97c_writel(chip, IER, word); atmel_ac97c_capture_prepare() 468 word = ac97c_readl(chip, MR); atmel_ac97c_capture_prepare() 470 ac97c_writel(chip, MR, word); atmel_ac97c_capture_prepare() 472 word = ac97c_readl(chip, MR); atmel_ac97c_capture_prepare() 474 ac97c_writel(chip, MR, word); atmel_ac97c_capture_prepare() 477 retval = snd_ac97_set_rate(chip->ac97, AC97_PCM_LR_ADC_RATE, atmel_ac97c_capture_prepare() 480 dev_dbg(&chip->pdev->dev, "could not set rate %d Hz\n", atmel_ac97c_capture_prepare() 484 if (!test_bit(DMA_RX_READY, &chip->flags)) atmel_ac97c_capture_prepare() 485 retval = atmel_ac97c_prepare_dma(chip, substream, atmel_ac97c_capture_prepare() 489 writel(runtime->dma_addr, chip->regs + ATMEL_PDC_RPR); atmel_ac97c_capture_prepare() 490 writel(block_size / 2, chip->regs + ATMEL_PDC_RCR); atmel_ac97c_capture_prepare() 492 chip->regs + ATMEL_PDC_RNPR); atmel_ac97c_capture_prepare() 493 writel(block_size / 2, chip->regs + ATMEL_PDC_RNCR); atmel_ac97c_capture_prepare() 502 struct atmel_ac97c *chip = snd_pcm_substream_chip(substream); atmel_ac97c_playback_trigger() local 506 camr = ac97c_readl(chip, CAMR); atmel_ac97c_playback_trigger() 513 retval = dw_dma_cyclic_start(chip->dma.tx_chan); atmel_ac97c_playback_trigger() 525 dw_dma_cyclic_stop(chip->dma.tx_chan); atmel_ac97c_playback_trigger() 528 if (chip->opened <= 1) atmel_ac97c_playback_trigger() 536 ac97c_writel(chip, CAMR, camr); atmel_ac97c_playback_trigger() 538 writel(ptcr, chip->regs + ATMEL_PDC_PTCR); atmel_ac97c_playback_trigger() 546 struct atmel_ac97c *chip = snd_pcm_substream_chip(substream); atmel_ac97c_capture_trigger() local 550 camr = ac97c_readl(chip, CAMR); atmel_ac97c_capture_trigger() 551 ptcr = readl(chip->regs + ATMEL_PDC_PTSR); atmel_ac97c_capture_trigger() 558 retval = dw_dma_cyclic_start(chip->dma.rx_chan); atmel_ac97c_capture_trigger() 570 dw_dma_cyclic_stop(chip->dma.rx_chan); atmel_ac97c_capture_trigger() 573 if (chip->opened <= 1) atmel_ac97c_capture_trigger() 581 ac97c_writel(chip, CAMR, camr); atmel_ac97c_capture_trigger() 583 writel(ptcr, chip->regs + ATMEL_PDC_PTCR); atmel_ac97c_capture_trigger() 591 struct atmel_ac97c *chip = snd_pcm_substream_chip(substream); atmel_ac97c_playback_pointer() local 597 bytes = dw_dma_get_src_addr(chip->dma.tx_chan); atmel_ac97c_playback_pointer() 599 bytes = readl(chip->regs + ATMEL_PDC_TPR); atmel_ac97c_playback_pointer() 611 struct atmel_ac97c *chip = snd_pcm_substream_chip(substream); atmel_ac97c_capture_pointer() local 617 bytes = dw_dma_get_dst_addr(chip->dma.rx_chan); atmel_ac97c_capture_pointer() 619 bytes = readl(chip->regs + ATMEL_PDC_RPR); atmel_ac97c_capture_pointer() 652 struct atmel_ac97c *chip = (struct atmel_ac97c *)dev; atmel_ac97c_interrupt() local 654 u32 sr = ac97c_readl(chip, SR); atmel_ac97c_interrupt() 655 u32 casr = ac97c_readl(chip, CASR); atmel_ac97c_interrupt() 656 u32 cosr = ac97c_readl(chip, COSR); atmel_ac97c_interrupt() 657 u32 camr = ac97c_readl(chip, CAMR); atmel_ac97c_interrupt() 662 dev_dbg(&chip->pdev->dev, "channel A event%s%s%s%s%s%s\n", atmel_ac97c_interrupt() 671 runtime = chip->playback_substream->runtime; atmel_ac97c_interrupt() 674 chip->playback_period++; atmel_ac97c_interrupt() 676 if (chip->playback_period == runtime->periods) atmel_ac97c_interrupt() 677 chip->playback_period = 0; atmel_ac97c_interrupt() 678 next_period = chip->playback_period + 1; atmel_ac97c_interrupt() 685 chip->regs + ATMEL_PDC_TNPR); atmel_ac97c_interrupt() 687 chip->regs + ATMEL_PDC_TNCR); atmel_ac97c_interrupt() 690 chip->playback_substream); atmel_ac97c_interrupt() 693 runtime = chip->capture_substream->runtime; atmel_ac97c_interrupt() 696 chip->capture_period++; atmel_ac97c_interrupt() 698 if (chip->capture_period == runtime->periods) atmel_ac97c_interrupt() 699 chip->capture_period = 0; atmel_ac97c_interrupt() 700 next_period = chip->capture_period + 1; atmel_ac97c_interrupt() 707 chip->regs + ATMEL_PDC_RNPR); atmel_ac97c_interrupt() 709 chip->regs + ATMEL_PDC_RNCR); atmel_ac97c_interrupt() 710 snd_pcm_period_elapsed(chip->capture_substream); atmel_ac97c_interrupt() 717 dev_info(&chip->pdev->dev, "codec channel event%s%s%s%s%s\n", atmel_ac97c_interrupt() 727 dev_err(&chip->pdev->dev, "spurious interrupt sr 0x%08x " atmel_ac97c_interrupt() 762 static int atmel_ac97c_pcm_new(struct atmel_ac97c *chip) atmel_ac97c_pcm_new() argument 768 capture = test_bit(DMA_RX_CHAN_PRESENT, &chip->flags); atmel_ac97c_pcm_new() 769 playback = test_bit(DMA_TX_CHAN_PRESENT, &chip->flags); atmel_ac97c_pcm_new() 772 err = snd_ac97_pcm_assign(chip->ac97_bus, atmel_ac97c_pcm_new() 778 retval = snd_pcm_new(chip->card, chip->card->shortname, atmel_ac97c_pcm_new() 791 &chip->pdev->dev, hw.periods_min * hw.period_bytes_min, atmel_ac97c_pcm_new() 796 pcm->private_data = chip; atmel_ac97c_pcm_new() 798 strcpy(pcm->name, chip->card->shortname); atmel_ac97c_pcm_new() 799 chip->pcm = pcm; atmel_ac97c_pcm_new() 804 static int atmel_ac97c_mixer_new(struct atmel_ac97c *chip) atmel_ac97c_mixer_new() argument 808 template.private_data = chip; atmel_ac97c_mixer_new() 809 return snd_ac97_mixer(chip->ac97_bus, &template, &chip->ac97); atmel_ac97c_mixer_new() 815 struct atmel_ac97c *chip = get_chip(ac97); atmel_ac97c_write() local 822 if (ac97c_readl(chip, COSR) & AC97C_CSR_TXRDY) { atmel_ac97c_write() 823 ac97c_writel(chip, COTHR, word); atmel_ac97c_write() 829 dev_dbg(&chip->pdev->dev, "codec write timeout\n"); atmel_ac97c_write() 835 struct atmel_ac97c *chip = get_chip(ac97); atmel_ac97c_read() local 842 if ((ac97c_readl(chip, COSR) & AC97C_CSR_RXRDY) != 0) atmel_ac97c_read() 843 ac97c_readl(chip, CORHR); atmel_ac97c_read() 849 if ((ac97c_readl(chip, COSR) & AC97C_CSR_TXRDY) != 0) { atmel_ac97c_read() 850 ac97c_writel(chip, COTHR, word); atmel_ac97c_read() 862 if ((ac97c_readl(chip, COSR) & AC97C_CSR_RXRDY) != 0) { atmel_ac97c_read() 863 unsigned short val = ac97c_readl(chip, CORHR); atmel_ac97c_read() 874 dev_dbg(&chip->pdev->dev, "codec read timeout\n"); atmel_ac97c_read() 889 static void atmel_ac97c_reset(struct atmel_ac97c *chip) atmel_ac97c_reset() argument 891 ac97c_writel(chip, MR, 0); atmel_ac97c_reset() 892 ac97c_writel(chip, MR, AC97C_MR_ENA); atmel_ac97c_reset() 893 ac97c_writel(chip, CAMR, 0); atmel_ac97c_reset() 894 ac97c_writel(chip, COMR, 0); atmel_ac97c_reset() 896 if (gpio_is_valid(chip->reset_pin)) { atmel_ac97c_reset() 897 gpio_set_value(chip->reset_pin, 0); atmel_ac97c_reset() 900 gpio_set_value(chip->reset_pin, 1); atmel_ac97c_reset() 902 ac97c_writel(chip, MR, AC97C_MR_WRST | AC97C_MR_ENA); atmel_ac97c_reset() 904 ac97c_writel(chip, MR, AC97C_MR_ENA); atmel_ac97c_reset() 944 struct atmel_ac97c *chip; atmel_ac97c_probe() local 994 chip = get_chip(card); atmel_ac97c_probe() 996 retval = request_irq(irq, atmel_ac97c_interrupt, 0, "AC97C", chip); atmel_ac97c_probe() 1001 chip->irq = irq; atmel_ac97c_probe() 1003 spin_lock_init(&chip->lock); atmel_ac97c_probe() 1009 chip->card = card; atmel_ac97c_probe() 1010 chip->pclk = pclk; atmel_ac97c_probe() 1011 chip->pdev = pdev; atmel_ac97c_probe() 1012 chip->regs = ioremap(regs->start, resource_size(regs)); atmel_ac97c_probe() 1014 if (!chip->regs) { atmel_ac97c_probe() 1023 chip->reset_pin = -ENODEV; atmel_ac97c_probe() 1026 chip->reset_pin = pdata->reset_pin; atmel_ac97c_probe() 1029 chip->reset_pin = -EINVAL; atmel_ac97c_probe() 1032 atmel_ac97c_reset(chip); atmel_ac97c_probe() 1035 ac97c_writel(chip, COMR, AC97C_CSR_OVRUN); atmel_ac97c_probe() 1036 ac97c_writel(chip, IER, ac97c_readl(chip, IMR) | AC97C_SR_COEVT); atmel_ac97c_probe() 1038 retval = snd_ac97_bus(card, 0, &ops, chip, &chip->ac97_bus); atmel_ac97c_probe() 1044 retval = atmel_ac97c_mixer_new(chip); atmel_ac97c_probe() 1057 chip->dma.rx_chan = dma_request_channel(mask, filter, atmel_ac97c_probe() 1059 if (chip->dma.rx_chan) { atmel_ac97c_probe() 1071 dmaengine_slave_config(chip->dma.rx_chan, atmel_ac97c_probe() 1075 dev_info(&chip->pdev->dev, "using %s for DMA RX\n", atmel_ac97c_probe() 1076 dev_name(&chip->dma.rx_chan->dev->device)); atmel_ac97c_probe() 1077 set_bit(DMA_RX_CHAN_PRESENT, &chip->flags); atmel_ac97c_probe() 1086 chip->dma.tx_chan = dma_request_channel(mask, filter, atmel_ac97c_probe() 1088 if (chip->dma.tx_chan) { atmel_ac97c_probe() 1100 dmaengine_slave_config(chip->dma.tx_chan, atmel_ac97c_probe() 1104 dev_info(&chip->pdev->dev, "using %s for DMA TX\n", atmel_ac97c_probe() 1105 dev_name(&chip->dma.tx_chan->dev->device)); atmel_ac97c_probe() 1106 set_bit(DMA_TX_CHAN_PRESENT, &chip->flags); atmel_ac97c_probe() 1109 if (!test_bit(DMA_RX_CHAN_PRESENT, &chip->flags) && atmel_ac97c_probe() 1110 !test_bit(DMA_TX_CHAN_PRESENT, &chip->flags)) { atmel_ac97c_probe() 1118 set_bit(DMA_RX_CHAN_PRESENT, &chip->flags); atmel_ac97c_probe() 1119 set_bit(DMA_TX_CHAN_PRESENT, &chip->flags); atmel_ac97c_probe() 1122 retval = atmel_ac97c_pcm_new(chip); atmel_ac97c_probe() 1137 chip->regs, irq); atmel_ac97c_probe() 1143 if (test_bit(DMA_RX_CHAN_PRESENT, &chip->flags)) atmel_ac97c_probe() 1144 dma_release_channel(chip->dma.rx_chan); atmel_ac97c_probe() 1145 if (test_bit(DMA_TX_CHAN_PRESENT, &chip->flags)) atmel_ac97c_probe() 1146 dma_release_channel(chip->dma.tx_chan); atmel_ac97c_probe() 1147 clear_bit(DMA_RX_CHAN_PRESENT, &chip->flags); atmel_ac97c_probe() 1148 clear_bit(DMA_TX_CHAN_PRESENT, &chip->flags); atmel_ac97c_probe() 1149 chip->dma.rx_chan = NULL; atmel_ac97c_probe() 1150 chip->dma.tx_chan = NULL; atmel_ac97c_probe() 1153 if (gpio_is_valid(chip->reset_pin)) atmel_ac97c_probe() 1154 gpio_free(chip->reset_pin); atmel_ac97c_probe() 1156 iounmap(chip->regs); atmel_ac97c_probe() 1158 free_irq(irq, chip); atmel_ac97c_probe() 1171 struct atmel_ac97c *chip = card->private_data; atmel_ac97c_suspend() local 1174 if (test_bit(DMA_RX_READY, &chip->flags)) atmel_ac97c_suspend() 1175 dw_dma_cyclic_stop(chip->dma.rx_chan); atmel_ac97c_suspend() 1176 if (test_bit(DMA_TX_READY, &chip->flags)) atmel_ac97c_suspend() 1177 dw_dma_cyclic_stop(chip->dma.tx_chan); atmel_ac97c_suspend() 1179 clk_disable_unprepare(chip->pclk); atmel_ac97c_suspend() 1187 struct atmel_ac97c *chip = card->private_data; atmel_ac97c_resume() local 1189 clk_prepare_enable(chip->pclk); atmel_ac97c_resume() 1191 if (test_bit(DMA_RX_READY, &chip->flags)) atmel_ac97c_resume() 1192 dw_dma_cyclic_start(chip->dma.rx_chan); atmel_ac97c_resume() 1193 if (test_bit(DMA_TX_READY, &chip->flags)) atmel_ac97c_resume() 1194 dw_dma_cyclic_start(chip->dma.tx_chan); atmel_ac97c_resume() 1208 struct atmel_ac97c *chip = get_chip(card); atmel_ac97c_remove() local 1210 if (gpio_is_valid(chip->reset_pin)) atmel_ac97c_remove() 1211 gpio_free(chip->reset_pin); atmel_ac97c_remove() 1213 ac97c_writel(chip, CAMR, 0); atmel_ac97c_remove() 1214 ac97c_writel(chip, COMR, 0); atmel_ac97c_remove() 1215 ac97c_writel(chip, MR, 0); atmel_ac97c_remove() 1217 clk_disable_unprepare(chip->pclk); atmel_ac97c_remove() 1218 clk_put(chip->pclk); atmel_ac97c_remove() 1219 iounmap(chip->regs); atmel_ac97c_remove() 1220 free_irq(chip->irq, chip); atmel_ac97c_remove() 1223 if (test_bit(DMA_RX_CHAN_PRESENT, &chip->flags)) atmel_ac97c_remove() 1224 dma_release_channel(chip->dma.rx_chan); atmel_ac97c_remove() 1225 if (test_bit(DMA_TX_CHAN_PRESENT, &chip->flags)) atmel_ac97c_remove() 1226 dma_release_channel(chip->dma.tx_chan); atmel_ac97c_remove() 1227 clear_bit(DMA_RX_CHAN_PRESENT, &chip->flags); atmel_ac97c_remove() 1228 clear_bit(DMA_TX_CHAN_PRESENT, &chip->flags); atmel_ac97c_remove() 1229 chip->dma.rx_chan = NULL; atmel_ac97c_remove() 1230 chip->dma.tx_chan = NULL; atmel_ac97c_remove()
/linux-4.1.27/sound/isa/
H A D	es18xx.c	33 * - The chip has one half duplex pcm (with very limited full duplex support). 103 unsigned long port; /* port of ESS chip */ 104 unsigned long ctrl_port; /* Control port of ESS chip */ 108 int irq; /* IRQ number of ESS chip */ 111 unsigned short version; /* version of ESS chip */ 177 static int snd_es18xx_dsp_command(struct snd_es18xx *chip, unsigned char val) snd_es18xx_dsp_command() argument 182 if ((inb(chip->port + 0x0C) & 0x80) == 0) { snd_es18xx_dsp_command() 183 outb(val, chip->port + 0x0C); snd_es18xx_dsp_command() 190 static int snd_es18xx_dsp_get_byte(struct snd_es18xx *chip) snd_es18xx_dsp_get_byte() argument 195 if (inb(chip->port + 0x0C) & 0x40) snd_es18xx_dsp_get_byte() 196 return inb(chip->port + 0x0A); snd_es18xx_dsp_get_byte() 198 chip->port + 0x0A, inb(chip->port + 0x0A)); snd_es18xx_dsp_get_byte() 204 static int snd_es18xx_write(struct snd_es18xx *chip, snd_es18xx_write() argument 210 spin_lock_irqsave(&chip->reg_lock, flags); snd_es18xx_write() 211 ret = snd_es18xx_dsp_command(chip, reg); snd_es18xx_write() 214 ret = snd_es18xx_dsp_command(chip, data); snd_es18xx_write() 216 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_es18xx_write() 223 static int snd_es18xx_read(struct snd_es18xx *chip, unsigned char reg) snd_es18xx_read() argument 227 spin_lock_irqsave(&chip->reg_lock, flags); snd_es18xx_read() 228 ret = snd_es18xx_dsp_command(chip, 0xC0); snd_es18xx_read() 231 ret = snd_es18xx_dsp_command(chip, reg); snd_es18xx_read() 234 data = snd_es18xx_dsp_get_byte(chip); snd_es18xx_read() 240 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_es18xx_read() 245 static int snd_es18xx_bits(struct snd_es18xx *chip, unsigned char reg, snd_es18xx_bits() argument 251 spin_lock_irqsave(&chip->reg_lock, flags); snd_es18xx_bits() 252 ret = snd_es18xx_dsp_command(chip, 0xC0); snd_es18xx_bits() 255 ret = snd_es18xx_dsp_command(chip, reg); snd_es18xx_bits() 258 ret = snd_es18xx_dsp_get_byte(chip); snd_es18xx_bits() 265 ret = snd_es18xx_dsp_command(chip, reg); snd_es18xx_bits() 269 ret = snd_es18xx_dsp_command(chip, new); snd_es18xx_bits() 279 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_es18xx_bits() 283 static inline void snd_es18xx_mixer_write(struct snd_es18xx *chip, snd_es18xx_mixer_write() argument 287 spin_lock_irqsave(&chip->mixer_lock, flags); snd_es18xx_mixer_write() 288 outb(reg, chip->port + 0x04); snd_es18xx_mixer_write() 289 outb(data, chip->port + 0x05); snd_es18xx_mixer_write() 290 spin_unlock_irqrestore(&chip->mixer_lock, flags); snd_es18xx_mixer_write() 296 static inline int snd_es18xx_mixer_read(struct snd_es18xx *chip, unsigned char reg) snd_es18xx_mixer_read() argument 300 spin_lock_irqsave(&chip->mixer_lock, flags); snd_es18xx_mixer_read() 301 outb(reg, chip->port + 0x04); snd_es18xx_mixer_read() 302 data = inb(chip->port + 0x05); snd_es18xx_mixer_read() 303 spin_unlock_irqrestore(&chip->mixer_lock, flags); snd_es18xx_mixer_read() 311 static inline int snd_es18xx_mixer_bits(struct snd_es18xx *chip, unsigned char reg, snd_es18xx_mixer_bits() argument 316 spin_lock_irqsave(&chip->mixer_lock, flags); snd_es18xx_mixer_bits() 317 outb(reg, chip->port + 0x04); snd_es18xx_mixer_bits() 318 old = inb(chip->port + 0x05); snd_es18xx_mixer_bits() 322 outb(new, chip->port + 0x05); snd_es18xx_mixer_bits() 328 spin_unlock_irqrestore(&chip->mixer_lock, flags); snd_es18xx_mixer_bits() 332 static inline int snd_es18xx_mixer_writable(struct snd_es18xx *chip, unsigned char reg, snd_es18xx_mixer_writable() argument 337 spin_lock_irqsave(&chip->mixer_lock, flags); snd_es18xx_mixer_writable() 338 outb(reg, chip->port + 0x04); snd_es18xx_mixer_writable() 339 old = inb(chip->port + 0x05); snd_es18xx_mixer_writable() 341 outb(expected, chip->port + 0x05); snd_es18xx_mixer_writable() 342 new = inb(chip->port + 0x05); snd_es18xx_mixer_writable() 343 spin_unlock_irqrestore(&chip->mixer_lock, flags); snd_es18xx_mixer_writable() 352 static int snd_es18xx_reset(struct snd_es18xx *chip) snd_es18xx_reset() argument 355 outb(0x03, chip->port + 0x06); snd_es18xx_reset() 356 inb(chip->port + 0x06); snd_es18xx_reset() 357 outb(0x00, chip->port + 0x06); snd_es18xx_reset() 358 for(i = 0; i < MILLISECOND && !(inb(chip->port + 0x0E) & 0x80); i++); snd_es18xx_reset() 359 if (inb(chip->port + 0x0A) != 0xAA) snd_es18xx_reset() 364 static int snd_es18xx_reset_fifo(struct snd_es18xx *chip) snd_es18xx_reset_fifo() argument 366 outb(0x02, chip->port + 0x06); snd_es18xx_reset_fifo() 367 inb(chip->port + 0x06); snd_es18xx_reset_fifo() 368 outb(0x00, chip->port + 0x06); snd_es18xx_reset_fifo() 413 static void snd_es18xx_rate_set(struct snd_es18xx *chip, snd_es18xx_rate_set() argument 419 if (chip->caps & ES18XX_NEW_RATE) { snd_es18xx_rate_set() 434 if ((chip->caps & ES18XX_PCM2) && mode == DAC2) { snd_es18xx_rate_set() 435 snd_es18xx_mixer_write(chip, 0x70, bits); snd_es18xx_rate_set() 440 snd_es18xx_write(chip, 0xA2, div0); snd_es18xx_rate_set() 441 snd_es18xx_mixer_write(chip, 0x72, div0); snd_es18xx_rate_set() 443 snd_es18xx_write(chip, 0xA1, bits); snd_es18xx_rate_set() 444 snd_es18xx_write(chip, 0xA2, div0); snd_es18xx_rate_set() 451 struct snd_es18xx *chip = snd_pcm_substream_chip(substream); snd_es18xx_playback_hw_params() local 460 if (substream->number == 0 && (chip->caps & ES18XX_PCM2)) { snd_es18xx_playback_hw_params() 461 if ((chip->caps & ES18XX_DUPLEX_MONO) && snd_es18xx_playback_hw_params() 462 (chip->capture_a_substream) && snd_es18xx_playback_hw_params() 467 chip->dma2_shift = shift; snd_es18xx_playback_hw_params() 469 chip->dma1_shift = shift; snd_es18xx_playback_hw_params() 481 static int snd_es18xx_playback1_prepare(struct snd_es18xx *chip, snd_es18xx_playback1_prepare() argument 488 snd_es18xx_rate_set(chip, substream, DAC2); snd_es18xx_playback1_prepare() 492 snd_es18xx_mixer_write(chip, 0x74, count & 0xff); snd_es18xx_playback1_prepare() 493 snd_es18xx_mixer_write(chip, 0x76, count >> 8); snd_es18xx_playback1_prepare() 496 snd_es18xx_mixer_bits(chip, 0x7A, 0x07, snd_es18xx_playback1_prepare() 502 snd_dma_program(chip->dma2, runtime->dma_addr, size, DMA_MODE_WRITE | DMA_AUTOINIT); snd_es18xx_playback1_prepare() 507 static int snd_es18xx_playback1_trigger(struct snd_es18xx *chip, snd_es18xx_playback1_trigger() argument 514 if (chip->active & DAC2) snd_es18xx_playback1_trigger() 516 chip->active |= DAC2; snd_es18xx_playback1_trigger() 518 if (chip->dma2 >= 4) snd_es18xx_playback1_trigger() 519 snd_es18xx_mixer_write(chip, 0x78, 0xb3); snd_es18xx_playback1_trigger() 521 snd_es18xx_mixer_write(chip, 0x78, 0x93); snd_es18xx_playback1_trigger() 525 if (chip->caps & ES18XX_PCM2) snd_es18xx_playback1_trigger() 527 snd_es18xx_mixer_write(chip, 0x7C, chip->audio2_vol); snd_es18xx_playback1_trigger() 530 snd_es18xx_dsp_command(chip, 0xD1); snd_es18xx_playback1_trigger() 535 if (!(chip->active & DAC2)) snd_es18xx_playback1_trigger() 537 chip->active &= ~DAC2; snd_es18xx_playback1_trigger() 539 snd_es18xx_mixer_write(chip, 0x78, 0x00); snd_es18xx_playback1_trigger() 542 if (chip->caps & ES18XX_PCM2) snd_es18xx_playback1_trigger() 544 snd_es18xx_mixer_write(chip, 0x7C, 0); snd_es18xx_playback1_trigger() 547 snd_es18xx_dsp_command(chip, 0xD3); snd_es18xx_playback1_trigger() 560 struct snd_es18xx *chip = snd_pcm_substream_chip(substream); snd_es18xx_capture_hw_params() local 564 if ((chip->caps & ES18XX_DUPLEX_MONO) && snd_es18xx_capture_hw_params() 565 chip->playback_a_substream && snd_es18xx_capture_hw_params() 574 chip->dma1_shift = shift; snd_es18xx_capture_hw_params() 582 struct snd_es18xx *chip = snd_pcm_substream_chip(substream); snd_es18xx_capture_prepare() local 587 snd_es18xx_reset_fifo(chip); snd_es18xx_capture_prepare() 590 snd_es18xx_bits(chip, 0xA8, 0x03, runtime->channels == 1 ? 0x02 : 0x01); snd_es18xx_capture_prepare() 592 snd_es18xx_rate_set(chip, substream, ADC1); snd_es18xx_capture_prepare() 596 snd_es18xx_write(chip, 0xA4, count & 0xff); snd_es18xx_capture_prepare() 597 snd_es18xx_write(chip, 0xA5, count >> 8); snd_es18xx_capture_prepare() 604 snd_es18xx_write(chip, 0xB7, snd_es18xx_capture_prepare() 606 snd_es18xx_write(chip, 0xB7, 0x90 | snd_es18xx_capture_prepare() 612 snd_dma_program(chip->dma1, runtime->dma_addr, size, DMA_MODE_READ | DMA_AUTOINIT); snd_es18xx_capture_prepare() 620 struct snd_es18xx *chip = snd_pcm_substream_chip(substream); snd_es18xx_capture_trigger() local 625 if (chip->active & ADC1) snd_es18xx_capture_trigger() 627 chip->active |= ADC1; snd_es18xx_capture_trigger() 629 snd_es18xx_write(chip, 0xB8, 0x0f); snd_es18xx_capture_trigger() 633 if (!(chip->active & ADC1)) snd_es18xx_capture_trigger() 635 chip->active &= ~ADC1; snd_es18xx_capture_trigger() 637 snd_es18xx_write(chip, 0xB8, 0x00); snd_es18xx_capture_trigger() 646 static int snd_es18xx_playback2_prepare(struct snd_es18xx *chip, snd_es18xx_playback2_prepare() argument 653 snd_es18xx_reset_fifo(chip); snd_es18xx_playback2_prepare() 656 snd_es18xx_bits(chip, 0xA8, 0x03, runtime->channels == 1 ? 0x02 : 0x01); snd_es18xx_playback2_prepare() 658 snd_es18xx_rate_set(chip, substream, DAC1); snd_es18xx_playback2_prepare() 662 snd_es18xx_write(chip, 0xA4, count & 0xff); snd_es18xx_playback2_prepare() 663 snd_es18xx_write(chip, 0xA5, count >> 8); snd_es18xx_playback2_prepare() 666 snd_es18xx_write(chip, 0xB6, snd_es18xx_playback2_prepare() 668 snd_es18xx_write(chip, 0xB7, snd_es18xx_playback2_prepare() 670 snd_es18xx_write(chip, 0xB7, 0x90 | snd_es18xx_playback2_prepare() 676 snd_dma_program(chip->dma1, runtime->dma_addr, size, DMA_MODE_WRITE | DMA_AUTOINIT); snd_es18xx_playback2_prepare() 681 static int snd_es18xx_playback2_trigger(struct snd_es18xx *chip, snd_es18xx_playback2_trigger() argument 688 if (chip->active & DAC1) snd_es18xx_playback2_trigger() 690 chip->active |= DAC1; snd_es18xx_playback2_trigger() 692 snd_es18xx_write(chip, 0xB8, 0x05); snd_es18xx_playback2_trigger() 697 snd_es18xx_dsp_command(chip, 0xD1); snd_es18xx_playback2_trigger() 702 if (!(chip->active & DAC1)) snd_es18xx_playback2_trigger() 704 chip->active &= ~DAC1; snd_es18xx_playback2_trigger() 706 snd_es18xx_write(chip, 0xB8, 0x00); snd_es18xx_playback2_trigger() 711 snd_es18xx_dsp_command(chip, 0xD3); snd_es18xx_playback2_trigger() 723 struct snd_es18xx *chip = snd_pcm_substream_chip(substream); snd_es18xx_playback_prepare() local 724 if (substream->number == 0 && (chip->caps & ES18XX_PCM2)) snd_es18xx_playback_prepare() 725 return snd_es18xx_playback1_prepare(chip, substream); snd_es18xx_playback_prepare() 727 return snd_es18xx_playback2_prepare(chip, substream); snd_es18xx_playback_prepare() 733 struct snd_es18xx *chip = snd_pcm_substream_chip(substream); snd_es18xx_playback_trigger() local 734 if (substream->number == 0 && (chip->caps & ES18XX_PCM2)) snd_es18xx_playback_trigger() 735 return snd_es18xx_playback1_trigger(chip, substream, cmd); snd_es18xx_playback_trigger() 737 return snd_es18xx_playback2_trigger(chip, substream, cmd); snd_es18xx_playback_trigger() 743 struct snd_es18xx *chip = card->private_data; snd_es18xx_interrupt() local 746 if (chip->caps & ES18XX_CONTROL) { snd_es18xx_interrupt() 748 status = inb(chip->ctrl_port + 6); snd_es18xx_interrupt() 751 status = snd_es18xx_mixer_read(chip, 0x7f) >> 4; snd_es18xx_interrupt() 756 if (inb(chip->port + 0x0C) & 0x01) snd_es18xx_interrupt() 758 if (snd_es18xx_mixer_read(chip, 0x7A) & 0x80) snd_es18xx_interrupt() 760 if ((chip->caps & ES18XX_HWV) && snd_es18xx_interrupt() 761 snd_es18xx_mixer_read(chip, 0x64) & 0x10) snd_es18xx_interrupt() 768 if (chip->active & DAC2) snd_es18xx_interrupt() 769 snd_pcm_period_elapsed(chip->playback_a_substream); snd_es18xx_interrupt() 771 snd_es18xx_mixer_bits(chip, 0x7A, 0x80, 0x00); snd_es18xx_interrupt() 775 if (chip->active & ADC1) snd_es18xx_interrupt() 776 snd_pcm_period_elapsed(chip->capture_a_substream); snd_es18xx_interrupt() 778 else if (chip->active & DAC1) snd_es18xx_interrupt() 779 snd_pcm_period_elapsed(chip->playback_b_substream); snd_es18xx_interrupt() 781 inb(chip->port + 0x0E); snd_es18xx_interrupt() 785 if ((status & MPU_IRQ) && chip->rmidi) snd_es18xx_interrupt() 786 snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data); snd_es18xx_interrupt() 791 if (chip->caps & ES18XX_HWV) { snd_es18xx_interrupt() 792 split = snd_es18xx_mixer_read(chip, 0x64) & 0x80; snd_es18xx_interrupt() 794 &chip->hw_switch->id); snd_es18xx_interrupt() 796 &chip->hw_volume->id); snd_es18xx_interrupt() 800 &chip->master_switch->id); snd_es18xx_interrupt() 802 &chip->master_volume->id); snd_es18xx_interrupt() 805 snd_es18xx_mixer_write(chip, 0x66, 0x00); snd_es18xx_interrupt() 812 struct snd_es18xx *chip = snd_pcm_substream_chip(substream); snd_es18xx_playback_pointer() local 816 if (substream->number == 0 && (chip->caps & ES18XX_PCM2)) { snd_es18xx_playback_pointer() 817 if (!(chip->active & DAC2)) snd_es18xx_playback_pointer() 819 pos = snd_dma_pointer(chip->dma2, size); snd_es18xx_playback_pointer() 820 return pos >> chip->dma2_shift; snd_es18xx_playback_pointer() 822 if (!(chip->active & DAC1)) snd_es18xx_playback_pointer() 824 pos = snd_dma_pointer(chip->dma1, size); snd_es18xx_playback_pointer() 825 return pos >> chip->dma1_shift; snd_es18xx_playback_pointer() 831 struct snd_es18xx *chip = snd_pcm_substream_chip(substream); snd_es18xx_capture_pointer() local 835 if (!(chip->active & ADC1)) snd_es18xx_capture_pointer() 837 pos = snd_dma_pointer(chip->dma1, size); snd_es18xx_capture_pointer() 838 return pos >> chip->dma1_shift; snd_es18xx_capture_pointer() 884 struct snd_es18xx *chip = snd_pcm_substream_chip(substream); snd_es18xx_playback_open() local 886 if (substream->number == 0 && (chip->caps & ES18XX_PCM2)) { snd_es18xx_playback_open() 887 if ((chip->caps & ES18XX_DUPLEX_MONO) && snd_es18xx_playback_open() 888 chip->capture_a_substream && snd_es18xx_playback_open() 889 chip->capture_a_substream->runtime->channels != 1) snd_es18xx_playback_open() 891 chip->playback_a_substream = substream; snd_es18xx_playback_open() 893 if (chip->capture_a_substream) snd_es18xx_playback_open() 895 chip->playback_b_substream = substream; snd_es18xx_playback_open() 902 (chip->caps & ES18XX_NEW_RATE) ? &new_hw_constraints_clocks : &old_hw_constraints_clocks); snd_es18xx_playback_open() 909 struct snd_es18xx *chip = snd_pcm_substream_chip(substream); snd_es18xx_capture_open() local 911 if (chip->playback_b_substream) snd_es18xx_capture_open() 913 if ((chip->caps & ES18XX_DUPLEX_MONO) && snd_es18xx_capture_open() 914 chip->playback_a_substream && snd_es18xx_capture_open() 915 chip->playback_a_substream->runtime->channels != 1) snd_es18xx_capture_open() 917 chip->capture_a_substream = substream; snd_es18xx_capture_open() 920 (chip->caps & ES18XX_NEW_RATE) ? &new_hw_constraints_clocks : &old_hw_constraints_clocks); snd_es18xx_capture_open() 926 struct snd_es18xx *chip = snd_pcm_substream_chip(substream); snd_es18xx_playback_close() local 928 if (substream->number == 0 && (chip->caps & ES18XX_PCM2)) snd_es18xx_playback_close() 929 chip->playback_a_substream = NULL; snd_es18xx_playback_close() 931 chip->playback_b_substream = NULL; snd_es18xx_playback_close() 939 struct snd_es18xx *chip = snd_pcm_substream_chip(substream); snd_es18xx_capture_close() local 941 chip->capture_a_substream = NULL; snd_es18xx_capture_close() 975 struct snd_es18xx *chip = snd_kcontrol_chip(kcontrol); snd_es18xx_info_mux() local 977 switch (chip->version) { snd_es18xx_info_mux() 995 struct snd_es18xx *chip = snd_kcontrol_chip(kcontrol); snd_es18xx_get_mux() local 996 int muxSource = snd_es18xx_mixer_read(chip, 0x1c) & 0x07; snd_es18xx_get_mux() 997 if (!(chip->version == 0x1869 || chip->version == 0x1879)) { snd_es18xx_get_mux() 1000 (chip->version == 0x1887 || chip->version == 0x1888) && snd_es18xx_get_mux() 1001 (snd_es18xx_mixer_read(chip, 0x7a) & 0x08) snd_es18xx_get_mux() 1012 struct snd_es18xx *chip = snd_kcontrol_chip(kcontrol); snd_es18xx_put_mux() local 1016 switch (chip->version) { snd_es18xx_put_mux() 1023 retVal = snd_es18xx_mixer_bits(chip, 0x7a, 0x08, 0x08) != 0x08; snd_es18xx_put_mux() 1026 retVal = snd_es18xx_mixer_bits(chip, 0x7a, 0x08, 0x00) != 0x00; snd_es18xx_put_mux() 1043 return (snd_es18xx_mixer_bits(chip, 0x1c, 0x07, val) != val) || retVal; snd_es18xx_put_mux() 1050 struct snd_es18xx *chip = snd_kcontrol_chip(kcontrol); snd_es18xx_get_spatializer_enable() local 1051 unsigned char val = snd_es18xx_mixer_read(chip, 0x50); snd_es18xx_get_spatializer_enable() 1058 struct snd_es18xx *chip = snd_kcontrol_chip(kcontrol); snd_es18xx_put_spatializer_enable() local 1062 oval = snd_es18xx_mixer_read(chip, 0x50) & 0x0c; snd_es18xx_put_spatializer_enable() 1065 snd_es18xx_mixer_write(chip, 0x50, nval & ~0x04); snd_es18xx_put_spatializer_enable() 1066 snd_es18xx_mixer_write(chip, 0x50, nval); snd_es18xx_put_spatializer_enable() 1082 struct snd_es18xx *chip = snd_kcontrol_chip(kcontrol); snd_es18xx_get_hw_volume() local 1083 ucontrol->value.integer.value[0] = snd_es18xx_mixer_read(chip, 0x61) & 0x3f; snd_es18xx_get_hw_volume() 1084 ucontrol->value.integer.value[1] = snd_es18xx_mixer_read(chip, 0x63) & 0x3f; snd_es18xx_get_hw_volume() 1092 struct snd_es18xx *chip = snd_kcontrol_chip(kcontrol); snd_es18xx_get_hw_switch() local 1093 ucontrol->value.integer.value[0] = !(snd_es18xx_mixer_read(chip, 0x61) & 0x40); snd_es18xx_get_hw_switch() 1094 ucontrol->value.integer.value[1] = !(snd_es18xx_mixer_read(chip, 0x63) & 0x40); snd_es18xx_get_hw_switch() 1100 struct snd_es18xx *chip = snd_kcontrol_chip(kcontrol); snd_es18xx_hwv_free() local 1101 chip->master_volume = NULL; snd_es18xx_hwv_free() 1102 chip->master_switch = NULL; snd_es18xx_hwv_free() 1103 chip->hw_volume = NULL; snd_es18xx_hwv_free() 1104 chip->hw_switch = NULL; snd_es18xx_hwv_free() 1107 static int snd_es18xx_reg_bits(struct snd_es18xx *chip, unsigned char reg, snd_es18xx_reg_bits() argument 1111 return snd_es18xx_mixer_bits(chip, reg, mask, val); snd_es18xx_reg_bits() 1113 return snd_es18xx_bits(chip, reg, mask, val); snd_es18xx_reg_bits() 1116 static int snd_es18xx_reg_read(struct snd_es18xx *chip, unsigned char reg) snd_es18xx_reg_read() argument 1119 return snd_es18xx_mixer_read(chip, reg); snd_es18xx_reg_read() 1121 return snd_es18xx_read(chip, reg); snd_es18xx_reg_read() 1146 struct snd_es18xx *chip = snd_kcontrol_chip(kcontrol); snd_es18xx_get_single() local 1155 val = inb(chip->port + ES18XX_PM); snd_es18xx_get_single() 1157 val = snd_es18xx_reg_read(chip, reg); snd_es18xx_get_single() 1166 struct snd_es18xx *chip = snd_kcontrol_chip(kcontrol); snd_es18xx_put_single() local 1180 unsigned char cur = inb(chip->port + ES18XX_PM); snd_es18xx_put_single() 1184 outb((cur & ~mask) | val, chip->port + ES18XX_PM); snd_es18xx_put_single() 1188 return snd_es18xx_reg_bits(chip, reg, mask, val) != val; snd_es18xx_put_single() 1210 struct snd_es18xx *chip = snd_kcontrol_chip(kcontrol); snd_es18xx_get_double() local 1219 left = snd_es18xx_reg_read(chip, left_reg); snd_es18xx_get_double() 1221 right = snd_es18xx_reg_read(chip, right_reg); snd_es18xx_get_double() 1235 struct snd_es18xx *chip = snd_kcontrol_chip(kcontrol); snd_es18xx_put_double() local 1257 if (snd_es18xx_reg_bits(chip, left_reg, mask1, val1) != val1) snd_es18xx_put_double() 1259 if (snd_es18xx_reg_bits(chip, right_reg, mask2, val2) != val2) snd_es18xx_put_double() 1262 change = (snd_es18xx_reg_bits(chip, left_reg, mask1 | mask2, snd_es18xx_put_double() 1373 static int snd_es18xx_config_read(struct snd_es18xx *chip, unsigned char reg) snd_es18xx_config_read() argument 1377 outb(reg, chip->ctrl_port); snd_es18xx_config_read() 1378 data = inb(chip->ctrl_port + 1); snd_es18xx_config_read() 1382 static void snd_es18xx_config_write(struct snd_es18xx *chip, snd_es18xx_config_write() argument 1387 outb(reg, chip->ctrl_port); snd_es18xx_config_write() 1388 outb(data, chip->ctrl_port + 1); snd_es18xx_config_write() 1394 static int snd_es18xx_initialize(struct snd_es18xx *chip, snd_es18xx_initialize() argument 1401 snd_es18xx_dsp_command(chip, 0xC6); snd_es18xx_initialize() 1403 snd_es18xx_mixer_write(chip, 0x00, 0x00); snd_es18xx_initialize() 1406 snd_es18xx_write(chip, 0xB9, 2); snd_es18xx_initialize() 1407 if (chip->caps & ES18XX_CONTROL) { snd_es18xx_initialize() 1409 snd_es18xx_config_write(chip, 0x27, chip->irq); snd_es18xx_initialize() 1412 snd_es18xx_config_write(chip, 0x62, fm_port >> 8); snd_es18xx_initialize() 1413 snd_es18xx_config_write(chip, 0x63, fm_port & 0xff); snd_es18xx_initialize() 1417 snd_es18xx_config_write(chip, 0x64, mpu_port >> 8); snd_es18xx_initialize() 1418 snd_es18xx_config_write(chip, 0x65, mpu_port & 0xff); snd_es18xx_initialize() 1420 snd_es18xx_config_write(chip, 0x28, chip->irq); snd_es18xx_initialize() 1423 snd_es18xx_config_write(chip, 0x70, chip->irq); snd_es18xx_initialize() 1425 snd_es18xx_config_write(chip, 0x72, chip->irq); snd_es18xx_initialize() 1427 snd_es18xx_config_write(chip, 0x74, chip->dma1); snd_es18xx_initialize() 1429 snd_es18xx_config_write(chip, 0x75, chip->dma2); snd_es18xx_initialize() 1432 snd_es18xx_write(chip, 0xB1, 0x50); snd_es18xx_initialize() 1434 snd_es18xx_mixer_write(chip, 0x7A, 0x40); snd_es18xx_initialize() 1436 snd_es18xx_write(chip, 0xB2, 0x50); snd_es18xx_initialize() 1438 snd_es18xx_mixer_write(chip, 0x64, 0x42); snd_es18xx_initialize() 1440 snd_es18xx_mixer_bits(chip, 0x48, 0x10, 0x10); snd_es18xx_initialize() 1444 switch (chip->irq) { snd_es18xx_initialize() 1459 snd_printk(KERN_ERR "invalid irq %d\n", chip->irq); snd_es18xx_initialize() 1462 switch (chip->dma1) { snd_es18xx_initialize() 1473 snd_printk(KERN_ERR "invalid dma1 %d\n", chip->dma1); snd_es18xx_initialize() 1476 switch (chip->dma2) { snd_es18xx_initialize() 1490 snd_printk(KERN_ERR "invalid dma2 %d\n", chip->dma2); snd_es18xx_initialize() 1495 snd_es18xx_write(chip, 0xB1, 0x50 | (irqmask << 2)); snd_es18xx_initialize() 1497 snd_es18xx_write(chip, 0xB2, 0x50 | (dma1mask << 2)); snd_es18xx_initialize() 1499 snd_es18xx_mixer_bits(chip, 0x7d, 0x07, 0x04 | dma2mask); snd_es18xx_initialize() 1502 snd_es18xx_mixer_write(chip, 0x7A, 0x68); snd_es18xx_initialize() 1504 snd_es18xx_mixer_write(chip, 0x64, 0x06); snd_es18xx_initialize() 1509 snd_es18xx_mixer_write(chip, 0x40, snd_es18xx_initialize() 1512 snd_es18xx_mixer_write(chip, 0x7f, ((irqmask + 1) << 1) | 0x01); snd_es18xx_initialize() 1514 if (chip->caps & ES18XX_NEW_RATE) { snd_es18xx_initialize() 1518 snd_es18xx_mixer_write(chip, 0x71, 0x32); snd_es18xx_initialize() 1520 if (!(chip->caps & ES18XX_PCM2)) { snd_es18xx_initialize() 1522 snd_es18xx_write(chip, 0xB7, 0x80); snd_es18xx_initialize() 1524 if (chip->caps & ES18XX_SPATIALIZER) { snd_es18xx_initialize() 1526 snd_es18xx_mixer_write(chip, 0x54, 0x8f); snd_es18xx_initialize() 1527 snd_es18xx_mixer_write(chip, 0x56, 0x95); snd_es18xx_initialize() 1528 snd_es18xx_mixer_write(chip, 0x58, 0x94); snd_es18xx_initialize() 1529 snd_es18xx_mixer_write(chip, 0x5a, 0x80); snd_es18xx_initialize() 1532 switch (chip->version) { snd_es18xx_initialize() 1536 //snd_es18xx_mixer_bits(chip, 0x71, 0x40, 0x40); snd_es18xx_initialize() 1539 snd_es18xx_config_write(chip, 0x29, snd_es18xx_config_read(chip, 0x29) | 0x40); snd_es18xx_initialize() 1543 if (chip->caps & ES18XX_MUTEREC) snd_es18xx_initialize() 1545 if (chip->caps & ES18XX_RECMIX) snd_es18xx_initialize() 1546 snd_es18xx_mixer_write(chip, 0x1c, 0x05 | mask); snd_es18xx_initialize() 1548 snd_es18xx_mixer_write(chip, 0x1c, 0x00 | mask); snd_es18xx_initialize() 1549 snd_es18xx_write(chip, 0xb4, 0x00); snd_es18xx_initialize() 1553 snd_es18xx_dsp_command(chip, 0xD1); snd_es18xx_initialize() 1559 static int snd_es18xx_identify(struct snd_es18xx *chip) snd_es18xx_identify() argument 1564 if (snd_es18xx_reset(chip) < 0) { snd_es18xx_identify() 1565 snd_printk(KERN_ERR "reset at 0x%lx failed!!!\n", chip->port); snd_es18xx_identify() 1569 snd_es18xx_dsp_command(chip, 0xe7); snd_es18xx_identify() 1570 hi = snd_es18xx_dsp_get_byte(chip); snd_es18xx_identify() 1574 lo = snd_es18xx_dsp_get_byte(chip); snd_es18xx_identify() 1579 chip->version = 0x488; snd_es18xx_identify() 1586 chip->version = 0x688; snd_es18xx_identify() 1590 outb(0x40, chip->port + 0x04); snd_es18xx_identify() 1592 hi = inb(chip->port + 0x05); snd_es18xx_identify() 1594 lo = inb(chip->port + 0x05); snd_es18xx_identify() 1596 chip->version = hi << 8 | lo; snd_es18xx_identify() 1597 chip->ctrl_port = inb(chip->port + 0x05) << 8; snd_es18xx_identify() 1599 chip->ctrl_port += inb(chip->port + 0x05); snd_es18xx_identify() 1601 if ((chip->res_ctrl_port = request_region(chip->ctrl_port, 8, "ES18xx - CTRL")) == NULL) { snd_es18xx_identify() 1602 snd_printk(KERN_ERR PFX "unable go grab port 0x%lx\n", chip->ctrl_port); snd_es18xx_identify() 1610 if (snd_es18xx_mixer_writable(chip, 0x64, 0x04)) { snd_es18xx_identify() 1612 if (snd_es18xx_mixer_writable(chip, 0x70, 0x7f)) { snd_es18xx_identify() 1614 if (snd_es18xx_mixer_writable(chip, 0x64, 0x20)) { snd_es18xx_identify() 1615 chip->version = 0x1887; snd_es18xx_identify() 1617 chip->version = 0x1888; snd_es18xx_identify() 1620 chip->version = 0x1788; snd_es18xx_identify() 1624 chip->version = 0x1688; snd_es18xx_identify() 1628 static int snd_es18xx_probe(struct snd_es18xx *chip, snd_es18xx_probe() argument 1632 if (snd_es18xx_identify(chip) < 0) { snd_es18xx_probe() 1633 snd_printk(KERN_ERR PFX "[0x%lx] ESS chip not found\n", chip->port); snd_es18xx_probe() 1637 switch (chip->version) { snd_es18xx_probe() 1639 chip->caps = ES18XX_DUPLEX_MONO | ES18XX_DUPLEX_SAME | ES18XX_CONTROL | ES18XX_GPO_2BIT; snd_es18xx_probe() 1642 chip->caps = ES18XX_PCM2 | ES18XX_SPATIALIZER | ES18XX_RECMIX | ES18XX_NEW_RATE | ES18XX_AUXB | ES18XX_MONO | ES18XX_MUTEREC | ES18XX_CONTROL | ES18XX_HWV | ES18XX_GPO_2BIT; snd_es18xx_probe() 1645 chip->caps = ES18XX_DUPLEX_MONO | ES18XX_DUPLEX_SAME | ES18XX_I2S | ES18XX_CONTROL; snd_es18xx_probe() 1648 chip->caps = ES18XX_PCM2 | ES18XX_SPATIALIZER | ES18XX_RECMIX | ES18XX_NEW_RATE | ES18XX_AUXB | ES18XX_I2S | ES18XX_CONTROL | ES18XX_HWV; snd_es18xx_probe() 1652 chip->caps = ES18XX_PCM2 | ES18XX_RECMIX | ES18XX_AUXB | ES18XX_DUPLEX_SAME | ES18XX_GPO_2BIT; snd_es18xx_probe() 1655 snd_printk(KERN_ERR "[0x%lx] unsupported chip ES%x\n", snd_es18xx_probe() 1656 chip->port, chip->version); snd_es18xx_probe() 1660 snd_printd("[0x%lx] ESS%x chip found\n", chip->port, chip->version); snd_es18xx_probe() 1662 if (chip->dma1 == chip->dma2) snd_es18xx_probe() 1663 chip->caps &= ~(ES18XX_PCM2 | ES18XX_DUPLEX_SAME); snd_es18xx_probe() 1665 return snd_es18xx_initialize(chip, mpu_port, fm_port); snd_es18xx_probe() 1692 struct snd_es18xx *chip = card->private_data; snd_es18xx_pcm() local 1697 sprintf(str, "ES%x", chip->version); snd_es18xx_pcm() 1698 if (chip->caps & ES18XX_PCM2) snd_es18xx_pcm() 1709 pcm->private_data = chip; snd_es18xx_pcm() 1711 if (chip->caps & ES18XX_DUPLEX_SAME) snd_es18xx_pcm() 1713 if (! (chip->caps & ES18XX_PCM2)) snd_es18xx_pcm() 1715 sprintf(pcm->name, "ESS AudioDrive ES%x", chip->version); snd_es18xx_pcm() 1716 chip->pcm = pcm; snd_es18xx_pcm() 1721 chip->dma1 > 3 || chip->dma2 > 3 ? 128*1024 : 64*1024); snd_es18xx_pcm() 1729 struct snd_es18xx *chip = card->private_data; snd_es18xx_suspend() local 1733 snd_pcm_suspend_all(chip->pcm); snd_es18xx_suspend() 1736 chip->pm_reg = (unsigned char)snd_es18xx_read(chip, ES18XX_PM); snd_es18xx_suspend() 1737 chip->pm_reg |= (ES18XX_PM_FM | ES18XX_PM_SUS); snd_es18xx_suspend() 1738 snd_es18xx_write(chip, ES18XX_PM, chip->pm_reg); snd_es18xx_suspend() 1739 snd_es18xx_write(chip, ES18XX_PM, chip->pm_reg ^= ES18XX_PM_SUS); snd_es18xx_suspend() 1746 struct snd_es18xx *chip = card->private_data; snd_es18xx_resume() local 1749 snd_es18xx_write(chip, ES18XX_PM, chip->pm_reg ^= ES18XX_PM_FM); snd_es18xx_resume() 1758 struct snd_es18xx *chip = card->private_data; snd_es18xx_free() local 1760 release_and_free_resource(chip->res_port); snd_es18xx_free() 1761 release_and_free_resource(chip->res_ctrl_port); snd_es18xx_free() 1762 release_and_free_resource(chip->res_mpu_port); snd_es18xx_free() 1763 if (chip->irq >= 0) snd_es18xx_free() 1764 free_irq(chip->irq, (void *) card); snd_es18xx_free() 1765 if (chip->dma1 >= 0) { snd_es18xx_free() 1766 disable_dma(chip->dma1); snd_es18xx_free() 1767 free_dma(chip->dma1); snd_es18xx_free() 1769 if (chip->dma2 >= 0 && chip->dma1 != chip->dma2) { snd_es18xx_free() 1770 disable_dma(chip->dma2); snd_es18xx_free() 1771 free_dma(chip->dma2); snd_es18xx_free() 1787 struct snd_es18xx *chip = card->private_data; snd_es18xx_new_device() local 1793 spin_lock_init(&chip->reg_lock); snd_es18xx_new_device() 1794 spin_lock_init(&chip->mixer_lock); snd_es18xx_new_device() 1795 chip->port = port; snd_es18xx_new_device() 1796 chip->irq = -1; snd_es18xx_new_device() 1797 chip->dma1 = -1; snd_es18xx_new_device() 1798 chip->dma2 = -1; snd_es18xx_new_device() 1799 chip->audio2_vol = 0x00; snd_es18xx_new_device() 1800 chip->active = 0; snd_es18xx_new_device() 1802 chip->res_port = request_region(port, 16, "ES18xx"); snd_es18xx_new_device() 1803 if (chip->res_port == NULL) { snd_es18xx_new_device() 1815 chip->irq = irq; snd_es18xx_new_device() 1822 chip->dma1 = dma1; snd_es18xx_new_device() 1829 chip->dma2 = dma2; snd_es18xx_new_device() 1831 if (snd_es18xx_probe(chip, mpu_port, fm_port) < 0) { snd_es18xx_new_device() 1835 err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops); snd_es18xx_new_device() 1845 struct snd_es18xx *chip = card->private_data; snd_es18xx_mixer() local 1849 strcpy(card->mixername, chip->pcm->name); snd_es18xx_mixer() 1853 kctl = snd_ctl_new1(&snd_es18xx_base_controls[idx], chip); snd_es18xx_mixer() 1854 if (chip->caps & ES18XX_HWV) { snd_es18xx_mixer() 1857 chip->master_volume = kctl; snd_es18xx_mixer() 1861 chip->master_switch = kctl; snd_es18xx_mixer() 1869 if (chip->caps & ES18XX_PCM2) { snd_es18xx_mixer() 1871 if ((err = snd_ctl_add(card, snd_ctl_new1(&snd_es18xx_pcm2_controls[idx], chip))) < 0) snd_es18xx_mixer() 1876 if ((err = snd_ctl_add(card, snd_ctl_new1(&snd_es18xx_pcm1_controls[idx], chip))) < 0) snd_es18xx_mixer() 1881 if (chip->caps & ES18XX_RECMIX) { snd_es18xx_mixer() 1883 if ((err = snd_ctl_add(card, snd_ctl_new1(&snd_es18xx_recmix_controls[idx], chip))) < 0) snd_es18xx_mixer() 1887 switch (chip->version) { snd_es18xx_mixer() 1889 if ((err = snd_ctl_add(card, snd_ctl_new1(&snd_es18xx_micpre1_control, chip))) < 0) snd_es18xx_mixer() 1894 if ((err = snd_ctl_add(card, snd_ctl_new1(&snd_es18xx_micpre2_control, chip))) < 0) snd_es18xx_mixer() 1898 if (chip->caps & ES18XX_SPATIALIZER) { snd_es18xx_mixer() 1900 if ((err = snd_ctl_add(card, snd_ctl_new1(&snd_es18xx_spatializer_controls[idx], chip))) < 0) snd_es18xx_mixer() 1904 if (chip->caps & ES18XX_HWV) { snd_es18xx_mixer() 1907 kctl = snd_ctl_new1(&snd_es18xx_hw_volume_controls[idx], chip); snd_es18xx_mixer() 1909 chip->hw_volume = kctl; snd_es18xx_mixer() 1911 chip->hw_switch = kctl; snd_es18xx_mixer() 1920 if (chip->version != 0x1868) { snd_es18xx_mixer() 1922 chip)); snd_es18xx_mixer() 1926 if (chip->version == 0x1869) { snd_es18xx_mixer() 1930 chip)); snd_es18xx_mixer() 1934 } else if (chip->version == 0x1878) { snd_es18xx_mixer() 1936 chip)); snd_es18xx_mixer() 1939 } else if (chip->version == 0x1879) { snd_es18xx_mixer() 1943 chip)); snd_es18xx_mixer() 1948 if (chip->caps & ES18XX_GPO_2BIT) { snd_es18xx_mixer() 1952 chip)); snd_es18xx_mixer() 2056 static int snd_audiodrive_pnp(int dev, struct snd_es18xx *chip, snd_audiodrive_pnp() argument 2059 chip->dev = pdev; snd_audiodrive_pnp() 2060 if (snd_audiodrive_pnp_init_main(dev, chip->dev) < 0) snd_audiodrive_pnp() 2086 static int snd_audiodrive_pnpc(int dev, struct snd_es18xx *chip, snd_audiodrive_pnpc() argument 2090 chip->dev = pnp_request_card_device(card, id->devs[0].id, NULL); snd_audiodrive_pnpc() 2091 if (chip->dev == NULL) snd_audiodrive_pnpc() 2094 chip->devc = pnp_request_card_device(card, id->devs[1].id, NULL); snd_audiodrive_pnpc() 2095 if (chip->devc == NULL) snd_audiodrive_pnpc() 2099 if (pnp_activate_dev(chip->devc) < 0) { snd_audiodrive_pnpc() 2104 (unsigned long long)pnp_port_start(chip->devc, 0)); snd_audiodrive_pnpc() 2105 if (snd_audiodrive_pnp_init_main(dev, chip->dev) < 0) snd_audiodrive_pnpc() 2127 struct snd_es18xx *chip = card->private_data; snd_audiodrive_probe() local 2137 sprintf(card->driver, "ES%x", chip->version); snd_audiodrive_probe() 2139 sprintf(card->shortname, "ESS AudioDrive ES%x", chip->version); snd_audiodrive_probe() 2143 chip->port, snd_audiodrive_probe() 2148 chip->port, snd_audiodrive_probe() 2175 -1, &chip->rmidi); snd_audiodrive_probe()
/linux-4.1.27/drivers/staging/iio/addac/
H A D	adt7316.c	175 * struct adt7316_chip_info - chip specific information 188 u8 id; /* chip id */ 211 * struct adt7316_chip_info - chip specific information 224 struct adt7316_chip_info *chip = iio_priv(dev_info); adt7316_show_enabled() local 226 return sprintf(buf, "%d\n", !!(chip->config1 & ADT7316_EN)); adt7316_show_enabled() 229 static ssize_t _adt7316_store_enabled(struct adt7316_chip_info *chip, _adt7316_store_enabled() argument 236 config1 = chip->config1 | ADT7316_EN; _adt7316_store_enabled() 238 config1 = chip->config1 & ~ADT7316_EN; _adt7316_store_enabled() 240 ret = chip->bus.write(chip->bus.client, ADT7316_CONFIG1, config1); _adt7316_store_enabled() 244 chip->config1 = config1; _adt7316_store_enabled() 256 struct adt7316_chip_info *chip = iio_priv(dev_info); adt7316_store_enabled() local 264 if (_adt7316_store_enabled(chip, enable) < 0) adt7316_store_enabled() 280 struct adt7316_chip_info *chip = iio_priv(dev_info); adt7316_show_select_ex_temp() local 282 if ((chip->id & ID_FAMILY_MASK) != ID_ADT75XX) adt7316_show_select_ex_temp() 285 return sprintf(buf, "%d\n", !!(chip->config1 & ADT7516_SEL_EX_TEMP)); adt7316_show_select_ex_temp() 294 struct adt7316_chip_info *chip = iio_priv(dev_info); adt7316_store_select_ex_temp() local 298 if ((chip->id & ID_FAMILY_MASK) != ID_ADT75XX) adt7316_store_select_ex_temp() 301 config1 = chip->config1 & (~ADT7516_SEL_EX_TEMP); adt7316_store_select_ex_temp() 305 ret = chip->bus.write(chip->bus.client, ADT7316_CONFIG1, config1); adt7316_store_select_ex_temp() 309 chip->config1 = config1; adt7316_store_select_ex_temp() 324 struct adt7316_chip_info *chip = iio_priv(dev_info); adt7316_show_mode() local 326 if (chip->config2 & ADT7316_AD_SINGLE_CH_MODE) adt7316_show_mode() 338 struct adt7316_chip_info *chip = iio_priv(dev_info); adt7316_store_mode() local 342 config2 = chip->config2 & (~ADT7316_AD_SINGLE_CH_MODE); adt7316_store_mode() 346 ret = chip->bus.write(chip->bus.client, ADT7316_CONFIG2, config2); adt7316_store_mode() 350 chip->config2 = config2; adt7316_store_mode() 374 struct adt7316_chip_info *chip = iio_priv(dev_info); adt7316_show_ad_channel() local 376 if (!(chip->config2 & ADT7316_AD_SINGLE_CH_MODE)) adt7316_show_ad_channel() 379 switch (chip->config2 & ADT7516_AD_SINGLE_CH_MASK) { adt7316_show_ad_channel() 385 if (((chip->id & ID_FAMILY_MASK) == ID_ADT75XX) && adt7316_show_ad_channel() 386 (chip->config1 & ADT7516_SEL_AIN1_2_EX_TEMP_MASK) == 0) adt7316_show_ad_channel() 391 if ((chip->config1 & ADT7516_SEL_AIN1_2_EX_TEMP_MASK) == 0) adt7316_show_ad_channel() 396 if (chip->config1 & ADT7516_SEL_AIN3) adt7316_show_ad_channel() 413 struct adt7316_chip_info *chip = iio_priv(dev_info); adt7316_store_ad_channel() local 418 if (!(chip->config2 & ADT7316_AD_SINGLE_CH_MODE)) adt7316_store_ad_channel() 425 if ((chip->id & ID_FAMILY_MASK) == ID_ADT75XX) { adt7316_store_ad_channel() 429 config2 = chip->config2 & (~ADT7516_AD_SINGLE_CH_MASK); adt7316_store_ad_channel() 434 config2 = chip->config2 & (~ADT7316_AD_SINGLE_CH_MASK); adt7316_store_ad_channel() 440 ret = chip->bus.write(chip->bus.client, ADT7316_CONFIG2, config2); adt7316_store_ad_channel() 444 chip->config2 = config2; adt7316_store_ad_channel() 459 struct adt7316_chip_info *chip = iio_priv(dev_info); adt7316_show_all_ad_channels() local 461 if (!(chip->config2 & ADT7316_AD_SINGLE_CH_MODE)) adt7316_show_all_ad_channels() 464 if ((chip->id & ID_FAMILY_MASK) == ID_ADT75XX) adt7316_show_all_ad_channels() 481 struct adt7316_chip_info *chip = iio_priv(dev_info); adt7316_show_disable_averaging() local 484 !!(chip->config2 & ADT7316_DISABLE_AVERAGING)); adt7316_show_disable_averaging() 493 struct adt7316_chip_info *chip = iio_priv(dev_info); adt7316_store_disable_averaging() local 497 config2 = chip->config2 & (~ADT7316_DISABLE_AVERAGING); adt7316_store_disable_averaging() 501 ret = chip->bus.write(chip->bus.client, ADT7316_CONFIG2, config2); adt7316_store_disable_averaging() 505 chip->config2 = config2; adt7316_store_disable_averaging() 520 struct adt7316_chip_info *chip = iio_priv(dev_info); adt7316_show_enable_smbus_timeout() local 523 !!(chip->config2 & ADT7316_EN_SMBUS_TIMEOUT)); adt7316_show_enable_smbus_timeout() 532 struct adt7316_chip_info *chip = iio_priv(dev_info); adt7316_store_enable_smbus_timeout() local 536 config2 = chip->config2 & (~ADT7316_EN_SMBUS_TIMEOUT); adt7316_store_enable_smbus_timeout() 540 ret = chip->bus.write(chip->bus.client, ADT7316_CONFIG2, config2); adt7316_store_enable_smbus_timeout() 544 chip->config2 = config2; adt7316_store_enable_smbus_timeout() 559 struct adt7316_chip_info *chip = iio_priv(dev_info); adt7316_show_powerdown() local 561 return sprintf(buf, "%d\n", !!(chip->config1 & ADT7316_PD)); adt7316_show_powerdown() 570 struct adt7316_chip_info *chip = iio_priv(dev_info); adt7316_store_powerdown() local 574 config1 = chip->config1 & (~ADT7316_PD); adt7316_store_powerdown() 578 ret = chip->bus.write(chip->bus.client, ADT7316_CONFIG1, config1); adt7316_store_powerdown() 582 chip->config1 = config1; adt7316_store_powerdown() 597 struct adt7316_chip_info *chip = iio_priv(dev_info); adt7316_show_fast_ad_clock() local 599 return sprintf(buf, "%d\n", !!(chip->config3 & ADT7316_ADCLK_22_5)); adt7316_show_fast_ad_clock() 608 struct adt7316_chip_info *chip = iio_priv(dev_info); adt7316_store_fast_ad_clock() local 612 config3 = chip->config3 & (~ADT7316_ADCLK_22_5); adt7316_store_fast_ad_clock() 616 ret = chip->bus.write(chip->bus.client, ADT7316_CONFIG3, config3); adt7316_store_fast_ad_clock() 620 chip->config3 = config3; adt7316_store_fast_ad_clock() 635 struct adt7316_chip_info *chip = iio_priv(dev_info); adt7316_show_da_high_resolution() local 637 if (chip->config3 & ADT7316_DA_HIGH_RESOLUTION) { adt7316_show_da_high_resolution() 638 if (chip->id == ID_ADT7316 || chip->id == ID_ADT7516) adt7316_show_da_high_resolution() 640 else if (chip->id == ID_ADT7317 || chip->id == ID_ADT7517) adt7316_show_da_high_resolution() 653 struct adt7316_chip_info *chip = iio_priv(dev_info); adt7316_store_da_high_resolution() local 657 chip->dac_bits = 8; adt7316_store_da_high_resolution() 660 config3 = chip->config3 | ADT7316_DA_HIGH_RESOLUTION; adt7316_store_da_high_resolution() 661 if (chip->id == ID_ADT7316 || chip->id == ID_ADT7516) adt7316_store_da_high_resolution() 662 chip->dac_bits = 12; adt7316_store_da_high_resolution() 663 else if (chip->id == ID_ADT7317 || chip->id == ID_ADT7517) adt7316_store_da_high_resolution() 664 chip->dac_bits = 10; adt7316_store_da_high_resolution() 666 config3 = chip->config3 & (~ADT7316_DA_HIGH_RESOLUTION); adt7316_store_da_high_resolution() 668 ret = chip->bus.write(chip->bus.client, ADT7316_CONFIG3, config3); adt7316_store_da_high_resolution() 672 chip->config3 = config3; adt7316_store_da_high_resolution() 687 struct adt7316_chip_info *chip = iio_priv(dev_info); adt7316_show_AIN_internal_Vref() local 689 if ((chip->id & ID_FAMILY_MASK) != ID_ADT75XX) adt7316_show_AIN_internal_Vref() 693 !!(chip->config3 & ADT7516_AIN_IN_VREF)); adt7316_show_AIN_internal_Vref() 702 struct adt7316_chip_info *chip = iio_priv(dev_info); adt7316_store_AIN_internal_Vref() local 706 if ((chip->id & ID_FAMILY_MASK) != ID_ADT75XX) adt7316_store_AIN_internal_Vref() 710 config3 = chip->config3 & (~ADT7516_AIN_IN_VREF); adt7316_store_AIN_internal_Vref() 712 config3 = chip->config3 | ADT7516_AIN_IN_VREF; adt7316_store_AIN_internal_Vref() 714 ret = chip->bus.write(chip->bus.client, ADT7316_CONFIG3, config3); adt7316_store_AIN_internal_Vref() 718 chip->config3 = config3; adt7316_store_AIN_internal_Vref() 734 struct adt7316_chip_info *chip = iio_priv(dev_info); adt7316_show_enable_prop_DACA() local 737 !!(chip->config3 & ADT7316_EN_IN_TEMP_PROP_DACA)); adt7316_show_enable_prop_DACA() 746 struct adt7316_chip_info *chip = iio_priv(dev_info); adt7316_store_enable_prop_DACA() local 750 config3 = chip->config3 & (~ADT7316_EN_IN_TEMP_PROP_DACA); adt7316_store_enable_prop_DACA() 754 ret = chip->bus.write(chip->bus.client, ADT7316_CONFIG3, config3); adt7316_store_enable_prop_DACA() 758 chip->config3 = config3; adt7316_store_enable_prop_DACA() 773 struct adt7316_chip_info *chip = iio_priv(dev_info); adt7316_show_enable_prop_DACB() local 776 !!(chip->config3 & ADT7316_EN_EX_TEMP_PROP_DACB)); adt7316_show_enable_prop_DACB() 785 struct adt7316_chip_info *chip = iio_priv(dev_info); adt7316_store_enable_prop_DACB() local 789 config3 = chip->config3 & (~ADT7316_EN_EX_TEMP_PROP_DACB); adt7316_store_enable_prop_DACB() 793 ret = chip->bus.write(chip->bus.client, ADT7316_CONFIG3, config3); adt7316_store_enable_prop_DACB() 797 chip->config3 = config3; adt7316_store_enable_prop_DACB() 812 struct adt7316_chip_info *chip = iio_priv(dev_info); adt7316_show_DAC_2Vref_ch_mask() local 815 chip->dac_config & ADT7316_DA_2VREF_CH_MASK); adt7316_show_DAC_2Vref_ch_mask() 824 struct adt7316_chip_info *chip = iio_priv(dev_info); adt7316_store_DAC_2Vref_ch_mask() local 833 dac_config = chip->dac_config & (~ADT7316_DA_2VREF_CH_MASK); adt7316_store_DAC_2Vref_ch_mask() 836 ret = chip->bus.write(chip->bus.client, ADT7316_DAC_CONFIG, dac_config); adt7316_store_DAC_2Vref_ch_mask() 840 chip->dac_config = dac_config; adt7316_store_DAC_2Vref_ch_mask() 855 struct adt7316_chip_info *chip = iio_priv(dev_info); adt7316_show_DAC_update_mode() local 857 if (!(chip->config3 & ADT7316_DA_EN_VIA_DAC_LDCA)) adt7316_show_DAC_update_mode() 860 switch (chip->dac_config & ADT7316_DA_EN_MODE_MASK) { adt7316_show_DAC_update_mode() 881 struct adt7316_chip_info *chip = iio_priv(dev_info); adt7316_store_DAC_update_mode() local 886 if (!(chip->config3 & ADT7316_DA_EN_VIA_DAC_LDCA)) adt7316_store_DAC_update_mode() 893 dac_config = chip->dac_config & (~ADT7316_DA_EN_MODE_MASK); adt7316_store_DAC_update_mode() 896 ret = chip->bus.write(chip->bus.client, ADT7316_DAC_CONFIG, dac_config); adt7316_store_DAC_update_mode() 900 chip->dac_config = dac_config; adt7316_store_DAC_update_mode() 915 struct adt7316_chip_info *chip = iio_priv(dev_info); adt7316_show_all_DAC_update_modes() local 917 if (chip->config3 & ADT7316_DA_EN_VIA_DAC_LDCA) adt7316_show_all_DAC_update_modes() 936 struct adt7316_chip_info *chip = iio_priv(dev_info); adt7316_store_update_DAC() local 941 if (chip->config3 & ADT7316_DA_EN_VIA_DAC_LDCA) { adt7316_store_update_DAC() 942 if ((chip->dac_config & ADT7316_DA_EN_MODE_MASK) != adt7316_store_update_DAC() 950 ldac_config = chip->ldac_config & (~ADT7316_LDAC_EN_DA_MASK); adt7316_store_update_DAC() 953 ret = chip->bus.write(chip->bus.client, ADT7316_LDAC_CONFIG, adt7316_store_update_DAC() 958 gpio_set_value(chip->ldac_pin, 0); adt7316_store_update_DAC() 959 gpio_set_value(chip->ldac_pin, 1); adt7316_store_update_DAC() 975 struct adt7316_chip_info *chip = iio_priv(dev_info); adt7316_show_DA_AB_Vref_bypass() local 977 if ((chip->id & ID_FAMILY_MASK) == ID_ADT75XX) adt7316_show_DA_AB_Vref_bypass() 981 !!(chip->dac_config & ADT7316_VREF_BYPASS_DAC_AB)); adt7316_show_DA_AB_Vref_bypass() 990 struct adt7316_chip_info *chip = iio_priv(dev_info); adt7316_store_DA_AB_Vref_bypass() local 994 if ((chip->id & ID_FAMILY_MASK) == ID_ADT75XX) adt7316_store_DA_AB_Vref_bypass() 997 dac_config = chip->dac_config & (~ADT7316_VREF_BYPASS_DAC_AB); adt7316_store_DA_AB_Vref_bypass() 1001 ret = chip->bus.write(chip->bus.client, ADT7316_DAC_CONFIG, dac_config); adt7316_store_DA_AB_Vref_bypass() 1005 chip->dac_config = dac_config; adt7316_store_DA_AB_Vref_bypass() 1020 struct adt7316_chip_info *chip = iio_priv(dev_info); adt7316_show_DA_CD_Vref_bypass() local 1022 if ((chip->id & ID_FAMILY_MASK) == ID_ADT75XX) adt7316_show_DA_CD_Vref_bypass() 1026 !!(chip->dac_config & ADT7316_VREF_BYPASS_DAC_CD)); adt7316_show_DA_CD_Vref_bypass() 1035 struct adt7316_chip_info *chip = iio_priv(dev_info); adt7316_store_DA_CD_Vref_bypass() local 1039 if ((chip->id & ID_FAMILY_MASK) == ID_ADT75XX) adt7316_store_DA_CD_Vref_bypass() 1042 dac_config = chip->dac_config & (~ADT7316_VREF_BYPASS_DAC_CD); adt7316_store_DA_CD_Vref_bypass() 1046 ret = chip->bus.write(chip->bus.client, ADT7316_DAC_CONFIG, dac_config); adt7316_store_DA_CD_Vref_bypass() 1050 chip->dac_config = dac_config; adt7316_store_DA_CD_Vref_bypass() 1065 struct adt7316_chip_info *chip = iio_priv(dev_info); adt7316_show_DAC_internal_Vref() local 1067 if ((chip->id & ID_FAMILY_MASK) == ID_ADT75XX) adt7316_show_DAC_internal_Vref() 1069 (chip->dac_config & ADT7516_DAC_IN_VREF_MASK) >> adt7316_show_DAC_internal_Vref() 1073 !!(chip->dac_config & ADT7316_DAC_IN_VREF)); adt7316_show_DAC_internal_Vref() 1082 struct adt7316_chip_info *chip = iio_priv(dev_info); adt7316_store_DAC_internal_Vref() local 1087 if ((chip->id & ID_FAMILY_MASK) == ID_ADT75XX) { adt7316_store_DAC_internal_Vref() 1092 ldac_config = chip->ldac_config & (~ADT7516_DAC_IN_VREF_MASK); adt7316_store_DAC_internal_Vref() 1102 ldac_config = chip->ldac_config & (~ADT7316_DAC_IN_VREF); adt7316_store_DAC_internal_Vref() 1104 ldac_config = chip->ldac_config | ADT7316_DAC_IN_VREF; adt7316_store_DAC_internal_Vref() 1107 ret = chip->bus.write(chip->bus.client, ADT7316_LDAC_CONFIG, adt7316_store_DAC_internal_Vref() 1112 chip->ldac_config = ldac_config; adt7316_store_DAC_internal_Vref() 1122 static ssize_t adt7316_show_ad(struct adt7316_chip_info *chip, adt7316_show_ad() argument 1130 if ((chip->config2 & ADT7316_AD_SINGLE_CH_MODE) && adt7316_show_ad() 1131 channel != (chip->config2 & ADT7516_AD_SINGLE_CH_MASK)) adt7316_show_ad() 1136 ret = chip->bus.read(chip->bus.client, adt7316_show_ad() 1141 ret = chip->bus.read(chip->bus.client, adt7316_show_ad() 1150 ret = chip->bus.read(chip->bus.client, adt7316_show_ad() 1155 ret = chip->bus.read(chip->bus.client, adt7316_show_ad() 1165 ret = chip->bus.read(chip->bus.client, adt7316_show_ad() 1170 ret = chip->bus.read(chip->bus.client, adt7316_show_ad() 1180 if ((chip->id & ID_FAMILY_MASK) == ID_ADT75XX) adt7316_show_ad() 1202 struct adt7316_chip_info *chip = iio_priv(dev_info); adt7316_show_VDD() local 1204 return adt7316_show_ad(chip, ADT7316_AD_SINGLE_CH_VDD, buf); adt7316_show_VDD() 1213 struct adt7316_chip_info *chip = iio_priv(dev_info); adt7316_show_in_temp() local 1215 return adt7316_show_ad(chip, ADT7316_AD_SINGLE_CH_IN, buf); adt7316_show_in_temp() 1225 struct adt7316_chip_info *chip = iio_priv(dev_info); adt7316_show_ex_temp_AIN1() local 1227 return adt7316_show_ad(chip, ADT7316_AD_SINGLE_CH_EX, buf); adt7316_show_ex_temp_AIN1() 1239 struct adt7316_chip_info *chip = iio_priv(dev_info); adt7316_show_AIN2() local 1241 return adt7316_show_ad(chip, ADT7516_AD_SINGLE_CH_AIN2, buf); adt7316_show_AIN2() 1250 struct adt7316_chip_info *chip = iio_priv(dev_info); adt7316_show_AIN3() local 1252 return adt7316_show_ad(chip, ADT7516_AD_SINGLE_CH_AIN3, buf); adt7316_show_AIN3() 1261 struct adt7316_chip_info *chip = iio_priv(dev_info); adt7316_show_AIN4() local 1263 return adt7316_show_ad(chip, ADT7516_AD_SINGLE_CH_AIN4, buf); adt7316_show_AIN4() 1267 static ssize_t adt7316_show_temp_offset(struct adt7316_chip_info *chip, adt7316_show_temp_offset() argument 1274 ret = chip->bus.read(chip->bus.client, offset_addr, &val); adt7316_show_temp_offset() 1285 static ssize_t adt7316_store_temp_offset(struct adt7316_chip_info *chip, adt7316_store_temp_offset() argument 1301 ret = chip->bus.write(chip->bus.client, offset_addr, val); adt7316_store_temp_offset() 1313 struct adt7316_chip_info *chip = iio_priv(dev_info); adt7316_show_in_temp_offset() local 1315 return adt7316_show_temp_offset(chip, ADT7316_IN_TEMP_OFFSET, buf); adt7316_show_in_temp_offset() 1324 struct adt7316_chip_info *chip = iio_priv(dev_info); adt7316_store_in_temp_offset() local 1326 return adt7316_store_temp_offset(chip, ADT7316_IN_TEMP_OFFSET, buf, adt7316_store_in_temp_offset() 1339 struct adt7316_chip_info *chip = iio_priv(dev_info); adt7316_show_ex_temp_offset() local 1341 return adt7316_show_temp_offset(chip, ADT7316_EX_TEMP_OFFSET, buf); adt7316_show_ex_temp_offset() 1350 struct adt7316_chip_info *chip = iio_priv(dev_info); adt7316_store_ex_temp_offset() local 1352 return adt7316_store_temp_offset(chip, ADT7316_EX_TEMP_OFFSET, buf, adt7316_store_ex_temp_offset() 1365 struct adt7316_chip_info *chip = iio_priv(dev_info); adt7316_show_in_analog_temp_offset() local 1367 return adt7316_show_temp_offset(chip, adt7316_show_in_analog_temp_offset() 1377 struct adt7316_chip_info *chip = iio_priv(dev_info); adt7316_store_in_analog_temp_offset() local 1379 return adt7316_store_temp_offset(chip, adt7316_store_in_analog_temp_offset() 1392 struct adt7316_chip_info *chip = iio_priv(dev_info); adt7316_show_ex_analog_temp_offset() local 1394 return adt7316_show_temp_offset(chip, adt7316_show_ex_analog_temp_offset() 1404 struct adt7316_chip_info *chip = iio_priv(dev_info); adt7316_store_ex_analog_temp_offset() local 1406 return adt7316_store_temp_offset(chip, adt7316_store_ex_analog_temp_offset() 1414 static ssize_t adt7316_show_DAC(struct adt7316_chip_info *chip, adt7316_show_DAC() argument 1423 (chip->config3 & ADT7316_EN_IN_TEMP_PROP_DACA)) || adt7316_show_DAC() 1425 (chip->config3 & ADT7316_EN_EX_TEMP_PROP_DACB))) adt7316_show_DAC() 1428 offset = chip->dac_bits - 8; adt7316_show_DAC() 1430 if (chip->dac_bits > 8) { adt7316_show_DAC() 1431 ret = chip->bus.read(chip->bus.client, adt7316_show_DAC() 1437 ret = chip->bus.read(chip->bus.client, adt7316_show_DAC() 1447 static ssize_t adt7316_store_DAC(struct adt7316_chip_info *chip, adt7316_store_DAC() argument 1456 (chip->config3 & ADT7316_EN_IN_TEMP_PROP_DACA)) || adt7316_store_DAC() 1458 (chip->config3 & ADT7316_EN_EX_TEMP_PROP_DACB))) adt7316_store_DAC() 1461 offset = chip->dac_bits - 8; adt7316_store_DAC() 1464 if (ret || data >= (1 << chip->dac_bits)) adt7316_store_DAC() 1467 if (chip->dac_bits > 8) { adt7316_store_DAC() 1469 ret = chip->bus.write(chip->bus.client, adt7316_store_DAC() 1476 ret = chip->bus.write(chip->bus.client, adt7316_store_DAC() 1489 struct adt7316_chip_info *chip = iio_priv(dev_info); adt7316_show_DAC_A() local 1491 return adt7316_show_DAC(chip, 0, buf); adt7316_show_DAC_A() 1500 struct adt7316_chip_info *chip = iio_priv(dev_info); adt7316_store_DAC_A() local 1502 return adt7316_store_DAC(chip, 0, buf, len); adt7316_store_DAC_A() 1513 struct adt7316_chip_info *chip = iio_priv(dev_info); adt7316_show_DAC_B() local 1515 return adt7316_show_DAC(chip, 1, buf); adt7316_show_DAC_B() 1524 struct adt7316_chip_info *chip = iio_priv(dev_info); adt7316_store_DAC_B() local 1526 return adt7316_store_DAC(chip, 1, buf, len); adt7316_store_DAC_B() 1537 struct adt7316_chip_info *chip = iio_priv(dev_info); adt7316_show_DAC_C() local 1539 return adt7316_show_DAC(chip, 2, buf); adt7316_show_DAC_C() 1548 struct adt7316_chip_info *chip = iio_priv(dev_info); adt7316_store_DAC_C() local 1550 return adt7316_store_DAC(chip, 2, buf, len); adt7316_store_DAC_C() 1561 struct adt7316_chip_info *chip = iio_priv(dev_info); adt7316_show_DAC_D() local 1563 return adt7316_show_DAC(chip, 3, buf); adt7316_show_DAC_D() 1572 struct adt7316_chip_info *chip = iio_priv(dev_info); adt7316_store_DAC_D() local 1574 return adt7316_store_DAC(chip, 3, buf, len); adt7316_store_DAC_D() 1585 struct adt7316_chip_info *chip = iio_priv(dev_info); adt7316_show_device_id() local 1589 ret = chip->bus.read(chip->bus.client, ADT7316_DEVICE_ID, &id); adt7316_show_device_id() 1603 struct adt7316_chip_info *chip = iio_priv(dev_info); adt7316_show_manufactorer_id() local 1607 ret = chip->bus.read(chip->bus.client, ADT7316_MANUFACTURE_ID, &id); adt7316_show_manufactorer_id() 1622 struct adt7316_chip_info *chip = iio_priv(dev_info); adt7316_show_device_rev() local 1626 ret = chip->bus.read(chip->bus.client, ADT7316_DEVICE_REV, &rev); adt7316_show_device_rev() 1640 struct adt7316_chip_info *chip = iio_priv(dev_info); adt7316_show_bus_type() local 1644 ret = chip->bus.read(chip->bus.client, ADT7316_SPI_LOCK_STAT, &stat); adt7316_show_bus_type() 1748 struct adt7316_chip_info *chip = iio_priv(indio_dev); adt7316_event_handler() local 1753 ret = chip->bus.read(chip->bus.client, ADT7316_INT_STAT1, &stat1); adt7316_event_handler() 1755 if ((chip->id & ID_FAMILY_MASK) != ID_ADT75XX) adt7316_event_handler() 1802 ret = chip->bus.read(chip->bus.client, ADT7316_INT_STAT2, &stat2); adt7316_event_handler() 1824 struct adt7316_chip_info *chip = iio_priv(dev_info); adt7316_show_int_mask() local 1826 return sprintf(buf, "0x%x\n", chip->int_mask); adt7316_show_int_mask() 1838 struct adt7316_chip_info *chip = iio_priv(dev_info); adt7316_set_int_mask() local 1852 ret = chip->bus.write(chip->bus.client, ADT7316_INT_MASK2, mask); adt7316_set_int_mask() 1854 chip->int_mask &= ~ADT7316_VDD_INT_MASK; adt7316_set_int_mask() 1855 chip->int_mask |= data & ADT7316_VDD_INT_MASK; adt7316_set_int_mask() 1859 if ((chip->id & ID_FAMILY_MASK) == ID_ADT73XX) adt7316_set_int_mask() 1866 ret = chip->bus.write(chip->bus.client, ADT7316_INT_MASK1, mask); adt7316_set_int_mask() 1868 chip->int_mask = mask; adt7316_set_int_mask() 1878 struct adt7316_chip_info *chip = iio_priv(dev_info); adt7316_show_ad_bound() local 1883 if ((chip->id & ID_FAMILY_MASK) == ID_ADT73XX && adt7316_show_ad_bound() 1887 ret = chip->bus.read(chip->bus.client, this_attr->address, &val); adt7316_show_ad_bound() 1893 if (!((chip->id & ID_FAMILY_MASK) == ID_ADT75XX && adt7316_show_ad_bound() 1894 (chip->config1 & ADT7516_SEL_AIN1_2_EX_TEMP_MASK) == 0)) { adt7316_show_ad_bound() 1909 struct adt7316_chip_info *chip = iio_priv(dev_info); adt7316_set_ad_bound() local 1914 if ((chip->id & ID_FAMILY_MASK) == ID_ADT73XX && adt7316_set_ad_bound() 1922 if ((chip->id & ID_FAMILY_MASK) == ID_ADT75XX && adt7316_set_ad_bound() 1923 (chip->config1 & ADT7516_SEL_AIN1_2_EX_TEMP_MASK) == 0) { adt7316_set_ad_bound() 1936 ret = chip->bus.write(chip->bus.client, this_attr->address, val); adt7316_set_ad_bound() 1948 struct adt7316_chip_info *chip = iio_priv(dev_info); adt7316_show_int_enabled() local 1950 return sprintf(buf, "%d\n", !!(chip->config1 & ADT7316_INT_EN)); adt7316_show_int_enabled() 1959 struct adt7316_chip_info *chip = iio_priv(dev_info); adt7316_set_int_enabled() local 1963 config1 = chip->config1 & (~ADT7316_INT_EN); adt7316_set_int_enabled() 1967 ret = chip->bus.write(chip->bus.client, ADT7316_CONFIG1, config1); adt7316_set_int_enabled() 1971 chip->config1 = config1; adt7316_set_int_enabled() 2075 struct adt7316_chip_info *chip = iio_priv(dev_info); adt7316_disable() local 2077 return _adt7316_store_enabled(chip, 0); adt7316_disable() 2083 struct adt7316_chip_info *chip = iio_priv(dev_info); adt7316_enable() local 2085 return _adt7316_store_enabled(chip, 1); adt7316_enable() 2110 struct adt7316_chip_info *chip; adt7316_probe() local 2115 indio_dev = devm_iio_device_alloc(dev, sizeof(*chip)); adt7316_probe() 2118 chip = iio_priv(indio_dev); adt7316_probe() 2122 chip->bus = *bus; adt7316_probe() 2125 chip->id = ID_ADT7316 + (name[6] - '6'); adt7316_probe() 2127 chip->id = ID_ADT7516 + (name[6] - '6'); adt7316_probe() 2131 chip->ldac_pin = adt7316_platform_data[1]; adt7316_probe() 2132 if (chip->ldac_pin) { adt7316_probe() 2133 chip->config3 |= ADT7316_DA_EN_VIA_DAC_LDCA; adt7316_probe() 2134 if ((chip->id & ID_FAMILY_MASK) == ID_ADT75XX) adt7316_probe() 2135 chip->config1 |= ADT7516_SEL_AIN3; adt7316_probe() 2137 chip->int_mask = ADT7316_TEMP_INT_MASK | ADT7316_VDD_INT_MASK; adt7316_probe() 2138 if ((chip->id & ID_FAMILY_MASK) == ID_ADT75XX) adt7316_probe() 2139 chip->int_mask |= ADT7516_AIN_INT_MASK; adt7316_probe() 2142 if ((chip->id & ID_FAMILY_MASK) == ID_ADT75XX) adt7316_probe() 2149 if (chip->bus.irq > 0) { adt7316_probe() 2151 chip->bus.irq_flags = adt7316_platform_data[0]; adt7316_probe() 2153 ret = devm_request_threaded_irq(dev, chip->bus.irq, adt7316_probe() 2156 chip->bus.irq_flags | adt7316_probe() 2163 if (chip->bus.irq_flags & IRQF_TRIGGER_HIGH) adt7316_probe() 2164 chip->config1 |= ADT7316_INT_POLARITY; adt7316_probe() 2167 ret = chip->bus.write(chip->bus.client, ADT7316_CONFIG1, chip->config1); adt7316_probe() 2171 ret = chip->bus.write(chip->bus.client, ADT7316_CONFIG3, chip->config3); adt7316_probe()
/linux-4.1.27/arch/mn10300/proc-mn103e010/
H A D	Makefile	2 # Makefile for the MN103E010 processor chip specific code
/linux-4.1.27/sound/usb/hiface/
H A D	Makefile	1 snd-usb-hiface-objs := chip.o pcm.o
/linux-4.1.27/drivers/bcma/
H A D	driver_gpio.c	22 static inline struct bcma_drv_cc *bcma_gpio_get_cc(struct gpio_chip *chip) bcma_gpio_get_cc() argument 24 return container_of(chip, struct bcma_drv_cc, gpio); bcma_gpio_get_cc() 27 static int bcma_gpio_get_value(struct gpio_chip *chip, unsigned gpio) bcma_gpio_get_value() argument 29 struct bcma_drv_cc *cc = bcma_gpio_get_cc(chip); bcma_gpio_get_value() 34 static void bcma_gpio_set_value(struct gpio_chip *chip, unsigned gpio, bcma_gpio_set_value() argument 37 struct bcma_drv_cc *cc = bcma_gpio_get_cc(chip); bcma_gpio_set_value() 42 static int bcma_gpio_direction_input(struct gpio_chip *chip, unsigned gpio) bcma_gpio_direction_input() argument 44 struct bcma_drv_cc *cc = bcma_gpio_get_cc(chip); bcma_gpio_direction_input() 50 static int bcma_gpio_direction_output(struct gpio_chip *chip, unsigned gpio, bcma_gpio_direction_output() argument 53 struct bcma_drv_cc *cc = bcma_gpio_get_cc(chip); bcma_gpio_direction_output() 60 static int bcma_gpio_request(struct gpio_chip *chip, unsigned gpio) bcma_gpio_request() argument 62 struct bcma_drv_cc *cc = bcma_gpio_get_cc(chip); bcma_gpio_request() 73 static void bcma_gpio_free(struct gpio_chip *chip, unsigned gpio) bcma_gpio_free() argument 75 struct bcma_drv_cc *cc = bcma_gpio_get_cc(chip); bcma_gpio_free() 82 static int bcma_gpio_to_irq(struct gpio_chip *chip, unsigned gpio) bcma_gpio_to_irq() argument 84 struct bcma_drv_cc *cc = bcma_gpio_get_cc(chip); bcma_gpio_to_irq() 137 struct gpio_chip *chip = &cc->gpio; bcma_gpio_irq_domain_init() local 143 cc->irq_domain = irq_domain_add_linear(NULL, chip->ngpio, bcma_gpio_irq_domain_init() 149 for (gpio = 0; gpio < chip->ngpio; gpio++) { bcma_gpio_irq_domain_init() 169 for (gpio = 0; gpio < chip->ngpio; gpio++) { bcma_gpio_irq_domain_init() 181 struct gpio_chip *chip = &cc->gpio; bcma_gpio_irq_domain_exit() local 189 for (gpio = 0; gpio < chip->ngpio; gpio++) { bcma_gpio_irq_domain_exit() 210 struct gpio_chip *chip = &cc->gpio; bcma_gpio_init() local 213 chip->label = "bcma_gpio"; bcma_gpio_init() 214 chip->owner = THIS_MODULE; bcma_gpio_init() 215 chip->request = bcma_gpio_request; bcma_gpio_init() 216 chip->free = bcma_gpio_free; bcma_gpio_init() 217 chip->get = bcma_gpio_get_value; bcma_gpio_init() 218 chip->set = bcma_gpio_set_value; bcma_gpio_init() 219 chip->direction_input = bcma_gpio_direction_input; bcma_gpio_init() 220 chip->direction_output = bcma_gpio_direction_output; bcma_gpio_init() 222 chip->to_irq = bcma_gpio_to_irq; bcma_gpio_init() 226 chip->of_node = cc->core->dev.of_node; bcma_gpio_init() 231 chip->ngpio = 32; bcma_gpio_init() 234 chip->ngpio = 16; bcma_gpio_init() 240 * relative (per chip) numbers. bcma_gpio_init() 244 chip->base = bus->num * BCMA_GPIO_MAX_PINS; bcma_gpio_init() 246 chip->base = -1; bcma_gpio_init() 253 err = gpiochip_add(chip); bcma_gpio_init()
/linux-4.1.27/drivers/mtd/nand/
H A D	plat_nand.c	22 struct nand_chip chip; member in struct:plat_nand_data 46 if (pdata->chip.nr_chips < 1) { plat_nand_probe() 62 data->chip.priv = &data; plat_nand_probe() 63 data->mtd.priv = &data->chip; plat_nand_probe() 67 data->chip.IO_ADDR_R = data->io_base; plat_nand_probe() 68 data->chip.IO_ADDR_W = data->io_base; plat_nand_probe() 69 data->chip.cmd_ctrl = pdata->ctrl.cmd_ctrl; plat_nand_probe() 70 data->chip.dev_ready = pdata->ctrl.dev_ready; plat_nand_probe() 71 data->chip.select_chip = pdata->ctrl.select_chip; plat_nand_probe() 72 data->chip.write_buf = pdata->ctrl.write_buf; plat_nand_probe() 73 data->chip.read_buf = pdata->ctrl.read_buf; plat_nand_probe() 74 data->chip.read_byte = pdata->ctrl.read_byte; plat_nand_probe() 75 data->chip.chip_delay = pdata->chip.chip_delay; plat_nand_probe() 76 data->chip.options |= pdata->chip.options; plat_nand_probe() 77 data->chip.bbt_options |= pdata->chip.bbt_options; plat_nand_probe() 79 data->chip.ecc.hwctl = pdata->ctrl.hwcontrol; plat_nand_probe() 80 data->chip.ecc.layout = pdata->chip.ecclayout; plat_nand_probe() 81 data->chip.ecc.mode = NAND_ECC_SOFT; plat_nand_probe() 93 if (nand_scan(&data->mtd, pdata->chip.nr_chips)) { plat_nand_probe() 98 part_types = pdata->chip.part_probe_types ? : part_probe_types; plat_nand_probe() 102 pdata->chip.partitions, plat_nand_probe() 103 pdata->chip.nr_partitions); plat_nand_probe()
H A D	nand_base.c	110 struct nand_chip *chip = mtd->priv; check_offs_len() local 114 if (ofs & ((1ULL << chip->phys_erase_shift) - 1)) { check_offs_len() 120 if (len & ((1ULL << chip->phys_erase_shift) - 1)) { check_offs_len() 129 * nand_release_device - [GENERIC] release chip 132 * Release chip lock and wake up anyone waiting on the device. 136 struct nand_chip *chip = mtd->priv; nand_release_device() local 138 /* Release the controller and the chip */ nand_release_device() 139 spin_lock(&chip->controller->lock); nand_release_device() 140 chip->controller->active = NULL; nand_release_device() 141 chip->state = FL_READY; nand_release_device() 142 wake_up(&chip->controller->wq); nand_release_device() 143 spin_unlock(&chip->controller->lock); nand_release_device() 147 * nand_read_byte - [DEFAULT] read one byte from the chip 154 struct nand_chip *chip = mtd->priv; nand_read_byte() local 155 return readb(chip->IO_ADDR_R); nand_read_byte() 159 * nand_read_byte16 - [DEFAULT] read one byte endianness aware from the chip 167 struct nand_chip *chip = mtd->priv; nand_read_byte16() local 168 return (uint8_t) cpu_to_le16(readw(chip->IO_ADDR_R)); nand_read_byte16() 172 * nand_read_word - [DEFAULT] read one word from the chip 179 struct nand_chip *chip = mtd->priv; nand_read_word() local 180 return readw(chip->IO_ADDR_R); nand_read_word() 188 * Default select function for 1 chip devices. 192 struct nand_chip *chip = mtd->priv; nand_select_chip() local 196 chip->cmd_ctrl(mtd, NAND_CMD_NONE, 0 | NAND_CTRL_CHANGE); nand_select_chip() 207 * nand_write_byte - [DEFAULT] write single byte to chip 215 struct nand_chip *chip = mtd->priv; nand_write_byte() local 217 chip->write_buf(mtd, &byte, 1); nand_write_byte() 221 * nand_write_byte16 - [DEFAULT] write single byte to a chip with width 16 225 * Default function to write a byte to I/O[7:0] on a 16-bit wide chip. 229 struct nand_chip *chip = mtd->priv; nand_write_byte16() local 248 chip->write_buf(mtd, (uint8_t *)&word, 2); nand_write_byte16() 252 * nand_write_buf - [DEFAULT] write buffer to chip 261 struct nand_chip *chip = mtd->priv; nand_write_buf() local 263 iowrite8_rep(chip->IO_ADDR_W, buf, len); nand_write_buf() 267 * nand_read_buf - [DEFAULT] read chip data into buffer 276 struct nand_chip *chip = mtd->priv; nand_read_buf() local 278 ioread8_rep(chip->IO_ADDR_R, buf, len); nand_read_buf() 282 * nand_write_buf16 - [DEFAULT] write buffer to chip 291 struct nand_chip *chip = mtd->priv; nand_write_buf16() local 294 iowrite16_rep(chip->IO_ADDR_W, p, len >> 1); nand_write_buf16() 298 * nand_read_buf16 - [DEFAULT] read chip data into buffer 307 struct nand_chip *chip = mtd->priv; nand_read_buf16() local 310 ioread16_rep(chip->IO_ADDR_R, p, len >> 1); nand_read_buf16() 314 * nand_block_bad - [DEFAULT] Read bad block marker from the chip 317 * @getchip: 0, if the chip is already selected 324 struct nand_chip *chip = mtd->priv; nand_block_bad() local 327 if (chip->bbt_options & NAND_BBT_SCANLASTPAGE) nand_block_bad() 330 page = (int)(ofs >> chip->page_shift) & chip->pagemask; nand_block_bad() 333 chipnr = (int)(ofs >> chip->chip_shift); nand_block_bad() 338 chip->select_chip(mtd, chipnr); nand_block_bad() 342 if (chip->options & NAND_BUSWIDTH_16) { nand_block_bad() 343 chip->cmdfunc(mtd, NAND_CMD_READOOB, nand_block_bad() 344 chip->badblockpos & 0xFE, page); nand_block_bad() 345 bad = cpu_to_le16(chip->read_word(mtd)); nand_block_bad() 346 if (chip->badblockpos & 0x1) nand_block_bad() 351 chip->cmdfunc(mtd, NAND_CMD_READOOB, chip->badblockpos, nand_block_bad() 353 bad = chip->read_byte(mtd); nand_block_bad() 356 if (likely(chip->badblockbits == 8)) nand_block_bad() 359 res = hweight8(bad) < chip->badblockbits; nand_block_bad() 361 page = (int)(ofs >> chip->page_shift) & chip->pagemask; nand_block_bad() 363 } while (!res && i < 2 && (chip->bbt_options & NAND_BBT_SCAN2NDPAGE)); nand_block_bad() 366 chip->select_chip(mtd, -1); nand_block_bad() 384 struct nand_chip *chip = mtd->priv; nand_default_block_markbad() local 391 ops.ooboffs = chip->badblockpos; nand_default_block_markbad() 392 if (chip->options & NAND_BUSWIDTH_16) { nand_default_block_markbad() 401 if (chip->bbt_options & NAND_BBT_SCANLASTPAGE) nand_default_block_markbad() 410 } while ((chip->bbt_options & NAND_BBT_SCAN2NDPAGE) && i < 2); nand_default_block_markbad() 422 * specify how to write bad block markers to OOB (chip->block_markbad). 434 struct nand_chip *chip = mtd->priv; nand_block_markbad_lowlevel() local 437 if (!(chip->bbt_options & NAND_BBT_NO_OOB_BBM)) { nand_block_markbad_lowlevel() 444 einfo.len = 1ULL << chip->phys_erase_shift; nand_block_markbad_lowlevel() 449 ret = chip->block_markbad(mtd, ofs); nand_block_markbad_lowlevel() 454 if (chip->bbt) { nand_block_markbad_lowlevel() 467 * nand_check_wp - [GENERIC] check if the chip is write protected 475 struct nand_chip *chip = mtd->priv; nand_check_wp() local 478 if (chip->options & NAND_BROKEN_XD) nand_check_wp() 482 chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1); nand_check_wp() 483 return (chip->read_byte(mtd) & NAND_STATUS_WP) ? 0 : 1; nand_check_wp() 495 struct nand_chip *chip = mtd->priv; nand_block_isreserved() local 497 if (!chip->bbt) nand_block_isreserved() 507 * @getchip: 0, if the chip is already selected 516 struct nand_chip *chip = mtd->priv; nand_block_checkbad() local 518 if (!chip->bbt) nand_block_checkbad() 519 return chip->block_bad(mtd, ofs, getchip); nand_block_checkbad() 535 struct nand_chip *chip = mtd->priv; panic_nand_wait_ready() local 540 if (chip->dev_ready(mtd)) panic_nand_wait_ready() 550 struct nand_chip *chip = mtd->priv; nand_wait_ready() local 560 if (chip->dev_ready(mtd)) nand_wait_ready() 577 register struct nand_chip *chip = mtd->priv; nand_wait_status_ready() local 581 if ((chip->read_byte(mtd) & NAND_STATUS_READY)) nand_wait_status_ready() 600 register struct nand_chip *chip = mtd->priv; nand_command() local 618 chip->cmd_ctrl(mtd, readcmd, ctrl); nand_command() 621 chip->cmd_ctrl(mtd, command, ctrl); nand_command() 628 if (chip->options & NAND_BUSWIDTH_16 && nand_command() 631 chip->cmd_ctrl(mtd, column, ctrl); nand_command() 635 chip->cmd_ctrl(mtd, page_addr, ctrl); nand_command() 637 chip->cmd_ctrl(mtd, page_addr >> 8, ctrl); nand_command() 639 if (chip->chipsize > (32 << 20)) nand_command() 640 chip->cmd_ctrl(mtd, page_addr >> 16, ctrl); nand_command() 642 chip->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE); nand_command() 658 if (chip->dev_ready) nand_command() 660 udelay(chip->chip_delay); nand_command() 661 chip->cmd_ctrl(mtd, NAND_CMD_STATUS, nand_command() 663 chip->cmd_ctrl(mtd, nand_command() 675 if (!chip->dev_ready) { nand_command() 676 udelay(chip->chip_delay); nand_command() 703 register struct nand_chip *chip = mtd->priv; nand_command_lp() local 712 chip->cmd_ctrl(mtd, command, NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE); nand_command_lp() 720 if (chip->options & NAND_BUSWIDTH_16 && nand_command_lp() 723 chip->cmd_ctrl(mtd, column, ctrl); nand_command_lp() 725 chip->cmd_ctrl(mtd, column >> 8, ctrl); nand_command_lp() 728 chip->cmd_ctrl(mtd, page_addr, ctrl); nand_command_lp() 729 chip->cmd_ctrl(mtd, page_addr >> 8, nand_command_lp() 732 if (chip->chipsize > (128 << 20)) nand_command_lp() 733 chip->cmd_ctrl(mtd, page_addr >> 16, nand_command_lp() 737 chip->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE); nand_command_lp() 755 if (chip->dev_ready) nand_command_lp() 757 udelay(chip->chip_delay); nand_command_lp() 758 chip->cmd_ctrl(mtd, NAND_CMD_STATUS, nand_command_lp() 760 chip->cmd_ctrl(mtd, NAND_CMD_NONE, nand_command_lp() 768 chip->cmd_ctrl(mtd, NAND_CMD_RNDOUTSTART, nand_command_lp() 770 chip->cmd_ctrl(mtd, NAND_CMD_NONE, nand_command_lp() 775 chip->cmd_ctrl(mtd, NAND_CMD_READSTART, nand_command_lp() 777 chip->cmd_ctrl(mtd, NAND_CMD_NONE, nand_command_lp() 786 if (!chip->dev_ready) { nand_command_lp() 787 udelay(chip->chip_delay); nand_command_lp() 802 * panic_nand_get_device - [GENERIC] Get chip for selected access 803 * @chip: the nand chip descriptor 809 static void panic_nand_get_device(struct nand_chip *chip, panic_nand_get_device() argument 813 chip->controller->active = chip; panic_nand_get_device() 814 chip->state = new_state; panic_nand_get_device() 818 * nand_get_device - [GENERIC] Get chip for selected access 827 struct nand_chip *chip = mtd->priv; nand_get_device() local 828 spinlock_t *lock = &chip->controller->lock; nand_get_device() 829 wait_queue_head_t *wq = &chip->controller->wq; nand_get_device() 835 if (!chip->controller->active) nand_get_device() 836 chip->controller->active = chip; nand_get_device() 838 if (chip->controller->active == chip && chip->state == FL_READY) { nand_get_device() 839 chip->state = new_state; nand_get_device() 844 if (chip->controller->active->state == FL_PM_SUSPENDED) { nand_get_device() 845 chip->state = FL_PM_SUSPENDED; nand_get_device() 861 * @chip: NAND chip structure 868 static void panic_nand_wait(struct mtd_info *mtd, struct nand_chip *chip, panic_nand_wait() argument 873 if (chip->dev_ready) { panic_nand_wait() 874 if (chip->dev_ready(mtd)) panic_nand_wait() 877 if (chip->read_byte(mtd) & NAND_STATUS_READY) panic_nand_wait() 887 * @chip: NAND chip structure 893 static int nand_wait(struct mtd_info *mtd, struct nand_chip *chip) nand_wait() argument 896 int status, state = chip->state; nand_wait() 907 chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1); nand_wait() 910 panic_nand_wait(mtd, chip, timeo); nand_wait() 914 if (chip->dev_ready) { nand_wait() 915 if (chip->dev_ready(mtd)) nand_wait() 918 if (chip->read_byte(mtd) & NAND_STATUS_READY) nand_wait() 926 status = (int)chip->read_byte(mtd); nand_wait() 949 struct nand_chip *chip = mtd->priv; __nand_unlock() local 952 page = ofs >> chip->page_shift; __nand_unlock() 953 chip->cmdfunc(mtd, NAND_CMD_UNLOCK1, -1, page & chip->pagemask); __nand_unlock() 956 page = (ofs + len) >> chip->page_shift; __nand_unlock() 957 chip->cmdfunc(mtd, NAND_CMD_UNLOCK2, -1, __nand_unlock() 958 (page | invert) & chip->pagemask); __nand_unlock() 961 status = chip->waitfunc(mtd, chip); __nand_unlock() 984 struct nand_chip *chip = mtd->priv; nand_unlock() local 998 /* Shift to get chip number */ nand_unlock() 999 chipnr = ofs >> chip->chip_shift; nand_unlock() 1001 chip->select_chip(mtd, chipnr); nand_unlock() 1004 * Reset the chip. nand_unlock() 1006 * we must reset the chip nand_unlock() 1010 chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1); nand_unlock() 1023 chip->select_chip(mtd, -1); nand_unlock() 1047 struct nand_chip *chip = mtd->priv; nand_lock() local 1057 /* Shift to get chip number */ nand_lock() 1058 chipnr = ofs >> chip->chip_shift; nand_lock() 1060 chip->select_chip(mtd, chipnr); nand_lock() 1063 * Reset the chip. nand_lock() 1065 * we must reset the chip nand_lock() 1069 chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1); nand_lock() 1081 page = ofs >> chip->page_shift; nand_lock() 1082 chip->cmdfunc(mtd, NAND_CMD_LOCK, -1, page & chip->pagemask); nand_lock() 1085 status = chip->waitfunc(mtd, chip); nand_lock() 1097 chip->select_chip(mtd, -1); nand_lock() 1107 * @chip: nand chip info structure 1109 * @oob_required: caller requires OOB data read to chip->oob_poi 1114 static int nand_read_page_raw(struct mtd_info *mtd, struct nand_chip *chip, nand_read_page_raw() argument 1117 chip->read_buf(mtd, buf, mtd->writesize); nand_read_page_raw() 1119 chip->read_buf(mtd, chip->oob_poi, mtd->oobsize); nand_read_page_raw() 1126 * @chip: nand chip info structure 1128 * @oob_required: caller requires OOB data read to chip->oob_poi 1134 struct nand_chip *chip, uint8_t *buf, nand_read_page_raw_syndrome() 1137 int eccsize = chip->ecc.size; nand_read_page_raw_syndrome() 1138 int eccbytes = chip->ecc.bytes; nand_read_page_raw_syndrome() 1139 uint8_t *oob = chip->oob_poi; nand_read_page_raw_syndrome() 1142 for (steps = chip->ecc.steps; steps > 0; steps--) { nand_read_page_raw_syndrome() 1143 chip->read_buf(mtd, buf, eccsize); nand_read_page_raw_syndrome() 1146 if (chip->ecc.prepad) { nand_read_page_raw_syndrome() 1147 chip->read_buf(mtd, oob, chip->ecc.prepad); nand_read_page_raw_syndrome() 1148 oob += chip->ecc.prepad; nand_read_page_raw_syndrome() 1151 chip->read_buf(mtd, oob, eccbytes); nand_read_page_raw_syndrome() 1154 if (chip->ecc.postpad) { nand_read_page_raw_syndrome() 1155 chip->read_buf(mtd, oob, chip->ecc.postpad); nand_read_page_raw_syndrome() 1156 oob += chip->ecc.postpad; nand_read_page_raw_syndrome() 1160 size = mtd->oobsize - (oob - chip->oob_poi); nand_read_page_raw_syndrome() 1162 chip->read_buf(mtd, oob, size); nand_read_page_raw_syndrome() 1170 * @chip: nand chip info structure 1172 * @oob_required: caller requires OOB data read to chip->oob_poi 1175 static int nand_read_page_swecc(struct mtd_info *mtd, struct nand_chip *chip, nand_read_page_swecc() argument 1178 int i, eccsize = chip->ecc.size; nand_read_page_swecc() 1179 int eccbytes = chip->ecc.bytes; nand_read_page_swecc() 1180 int eccsteps = chip->ecc.steps; nand_read_page_swecc() 1182 uint8_t *ecc_calc = chip->buffers->ecccalc; nand_read_page_swecc() 1183 uint8_t *ecc_code = chip->buffers->ecccode; nand_read_page_swecc() 1184 uint32_t *eccpos = chip->ecc.layout->eccpos; nand_read_page_swecc() 1187 chip->ecc.read_page_raw(mtd, chip, buf, 1, page); nand_read_page_swecc() 1190 chip->ecc.calculate(mtd, p, &ecc_calc[i]); nand_read_page_swecc() 1192 for (i = 0; i < chip->ecc.total; i++) nand_read_page_swecc() 1193 ecc_code[i] = chip->oob_poi[eccpos[i]]; nand_read_page_swecc() 1195 eccsteps = chip->ecc.steps; nand_read_page_swecc() 1201 stat = chip->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]); nand_read_page_swecc() 1215 * @chip: nand chip info structure 1221 static int nand_read_subpage(struct mtd_info *mtd, struct nand_chip *chip, nand_read_subpage() argument 1226 uint32_t *eccpos = chip->ecc.layout->eccpos; nand_read_subpage() 1230 int busw = (chip->options & NAND_BUSWIDTH_16) ? 2 : 1; nand_read_subpage() 1235 start_step = data_offs / chip->ecc.size; nand_read_subpage() 1236 end_step = (data_offs + readlen - 1) / chip->ecc.size; nand_read_subpage() 1238 index = start_step * chip->ecc.bytes; nand_read_subpage() 1241 datafrag_len = num_steps * chip->ecc.size; nand_read_subpage() 1242 eccfrag_len = num_steps * chip->ecc.bytes; nand_read_subpage() 1244 data_col_addr = start_step * chip->ecc.size; nand_read_subpage() 1247 chip->cmdfunc(mtd, NAND_CMD_RNDOUT, data_col_addr, -1); nand_read_subpage() 1250 chip->read_buf(mtd, p, datafrag_len); nand_read_subpage() 1253 for (i = 0; i < eccfrag_len ; i += chip->ecc.bytes, p += chip->ecc.size) nand_read_subpage() 1254 chip->ecc.calculate(mtd, p, &chip->buffers->ecccalc[i]); nand_read_subpage() 1267 chip->cmdfunc(mtd, NAND_CMD_RNDOUT, mtd->writesize, -1); nand_read_subpage() 1268 chip->read_buf(mtd, chip->oob_poi, mtd->oobsize); nand_read_subpage() 1278 if (eccpos[index + (num_steps * chip->ecc.bytes)] & (busw - 1)) nand_read_subpage() 1281 chip->cmdfunc(mtd, NAND_CMD_RNDOUT, nand_read_subpage() 1283 chip->read_buf(mtd, &chip->oob_poi[aligned_pos], aligned_len); nand_read_subpage() 1287 chip->buffers->ecccode[i] = chip->oob_poi[eccpos[i + index]]; nand_read_subpage() 1290 for (i = 0; i < eccfrag_len ; i += chip->ecc.bytes, p += chip->ecc.size) { nand_read_subpage() 1293 stat = chip->ecc.correct(mtd, p, nand_read_subpage() 1294 &chip->buffers->ecccode[i], &chip->buffers->ecccalc[i]); nand_read_subpage() 1308 * @chip: nand chip info structure 1310 * @oob_required: caller requires OOB data read to chip->oob_poi 1315 static int nand_read_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip, nand_read_page_hwecc() argument 1318 int i, eccsize = chip->ecc.size; nand_read_page_hwecc() 1319 int eccbytes = chip->ecc.bytes; nand_read_page_hwecc() 1320 int eccsteps = chip->ecc.steps; nand_read_page_hwecc() 1322 uint8_t *ecc_calc = chip->buffers->ecccalc; nand_read_page_hwecc() 1323 uint8_t *ecc_code = chip->buffers->ecccode; nand_read_page_hwecc() 1324 uint32_t *eccpos = chip->ecc.layout->eccpos; nand_read_page_hwecc() 1328 chip->ecc.hwctl(mtd, NAND_ECC_READ); nand_read_page_hwecc() 1329 chip->read_buf(mtd, p, eccsize); nand_read_page_hwecc() 1330 chip->ecc.calculate(mtd, p, &ecc_calc[i]); nand_read_page_hwecc() 1332 chip->read_buf(mtd, chip->oob_poi, mtd->oobsize); nand_read_page_hwecc() 1334 for (i = 0; i < chip->ecc.total; i++) nand_read_page_hwecc() 1335 ecc_code[i] = chip->oob_poi[eccpos[i]]; nand_read_page_hwecc() 1337 eccsteps = chip->ecc.steps; nand_read_page_hwecc() 1343 stat = chip->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]); nand_read_page_hwecc() 1357 * @chip: nand chip info structure 1359 * @oob_required: caller requires OOB data read to chip->oob_poi 1369 struct nand_chip *chip, uint8_t *buf, int oob_required, int page) nand_read_page_hwecc_oob_first() 1371 int i, eccsize = chip->ecc.size; nand_read_page_hwecc_oob_first() 1372 int eccbytes = chip->ecc.bytes; nand_read_page_hwecc_oob_first() 1373 int eccsteps = chip->ecc.steps; nand_read_page_hwecc_oob_first() 1375 uint8_t *ecc_code = chip->buffers->ecccode; nand_read_page_hwecc_oob_first() 1376 uint32_t *eccpos = chip->ecc.layout->eccpos; nand_read_page_hwecc_oob_first() 1377 uint8_t *ecc_calc = chip->buffers->ecccalc; nand_read_page_hwecc_oob_first() 1381 chip->cmdfunc(mtd, NAND_CMD_READOOB, 0, page); nand_read_page_hwecc_oob_first() 1382 chip->read_buf(mtd, chip->oob_poi, mtd->oobsize); nand_read_page_hwecc_oob_first() 1383 chip->cmdfunc(mtd, NAND_CMD_READ0, 0, page); nand_read_page_hwecc_oob_first() 1385 for (i = 0; i < chip->ecc.total; i++) nand_read_page_hwecc_oob_first() 1386 ecc_code[i] = chip->oob_poi[eccpos[i]]; nand_read_page_hwecc_oob_first() 1391 chip->ecc.hwctl(mtd, NAND_ECC_READ); nand_read_page_hwecc_oob_first() 1392 chip->read_buf(mtd, p, eccsize); nand_read_page_hwecc_oob_first() 1393 chip->ecc.calculate(mtd, p, &ecc_calc[i]); nand_read_page_hwecc_oob_first() 1395 stat = chip->ecc.correct(mtd, p, &ecc_code[i], NULL); nand_read_page_hwecc_oob_first() 1409 * @chip: nand chip info structure 1411 * @oob_required: caller requires OOB data read to chip->oob_poi 1417 static int nand_read_page_syndrome(struct mtd_info *mtd, struct nand_chip *chip, nand_read_page_syndrome() argument 1420 int i, eccsize = chip->ecc.size; nand_read_page_syndrome() 1421 int eccbytes = chip->ecc.bytes; nand_read_page_syndrome() 1422 int eccsteps = chip->ecc.steps; nand_read_page_syndrome() 1424 uint8_t *oob = chip->oob_poi; nand_read_page_syndrome() 1430 chip->ecc.hwctl(mtd, NAND_ECC_READ); nand_read_page_syndrome() 1431 chip->read_buf(mtd, p, eccsize); nand_read_page_syndrome() 1433 if (chip->ecc.prepad) { nand_read_page_syndrome() 1434 chip->read_buf(mtd, oob, chip->ecc.prepad); nand_read_page_syndrome() 1435 oob += chip->ecc.prepad; nand_read_page_syndrome() 1438 chip->ecc.hwctl(mtd, NAND_ECC_READSYN); nand_read_page_syndrome() 1439 chip->read_buf(mtd, oob, eccbytes); nand_read_page_syndrome() 1440 stat = chip->ecc.correct(mtd, p, oob, NULL); nand_read_page_syndrome() 1451 if (chip->ecc.postpad) { nand_read_page_syndrome() 1452 chip->read_buf(mtd, oob, chip->ecc.postpad); nand_read_page_syndrome() 1453 oob += chip->ecc.postpad; nand_read_page_syndrome() 1458 i = mtd->oobsize - (oob - chip->oob_poi); nand_read_page_syndrome() 1460 chip->read_buf(mtd, oob, i); nand_read_page_syndrome() 1467 * @chip: nand chip structure 1472 static uint8_t *nand_transfer_oob(struct nand_chip *chip, uint8_t *oob, nand_transfer_oob() argument 1479 memcpy(oob, chip->oob_poi + ops->ooboffs, len); nand_transfer_oob() 1483 struct nand_oobfree *free = chip->ecc.layout->oobfree; nand_transfer_oob() 1502 memcpy(oob, chip->oob_poi + boffs, bytes); nand_transfer_oob() 1524 struct nand_chip *chip = mtd->priv; nand_setup_read_retry() local 1528 if (retry_mode >= chip->read_retries) nand_setup_read_retry() 1531 if (!chip->setup_read_retry) nand_setup_read_retry() 1534 return chip->setup_read_retry(mtd, retry_mode); nand_setup_read_retry() 1543 * Internal function. Called with chip held. 1549 struct nand_chip *chip = mtd->priv; nand_do_read_ops() local 1562 chipnr = (int)(from >> chip->chip_shift); nand_do_read_ops() 1563 chip->select_chip(mtd, chipnr); nand_do_read_ops() 1565 realpage = (int)(from >> chip->page_shift); nand_do_read_ops() 1566 page = realpage & chip->pagemask; nand_do_read_ops() 1582 else if (chip->options & NAND_USE_BOUNCE_BUFFER) nand_do_read_ops() 1588 if (realpage != chip->pagebuf || oob) { nand_do_read_ops() 1589 bufpoi = use_bufpoi ? chip->buffers->databuf : buf; nand_do_read_ops() 1596 chip->cmdfunc(mtd, NAND_CMD_READ0, 0x00, page); nand_do_read_ops() 1603 ret = chip->ecc.read_page_raw(mtd, chip, bufpoi, nand_do_read_ops() 1606 else if (!aligned && NAND_HAS_SUBPAGE_READ(chip) && nand_do_read_ops() 1608 ret = chip->ecc.read_subpage(mtd, chip, nand_do_read_ops() 1612 ret = chip->ecc.read_page(mtd, chip, bufpoi, nand_do_read_ops() 1617 chip->pagebuf = -1; nand_do_read_ops() 1625 if (!NAND_HAS_SUBPAGE_READ(chip) && !oob && nand_do_read_ops() 1628 chip->pagebuf = realpage; nand_do_read_ops() 1629 chip->pagebuf_bitflips = ret; nand_do_read_ops() 1632 chip->pagebuf = -1; nand_do_read_ops() 1634 memcpy(buf, chip->buffers->databuf + col, bytes); nand_do_read_ops() 1641 oob = nand_transfer_oob(chip, nand_do_read_ops() 1647 if (chip->options & NAND_NEED_READRDY) { nand_do_read_ops() 1649 if (!chip->dev_ready) nand_do_read_ops() 1650 udelay(chip->chip_delay); nand_do_read_ops() 1656 if (retry_mode + 1 < chip->read_retries) { nand_do_read_ops() 1674 memcpy(buf, chip->buffers->databuf + col, bytes); nand_do_read_ops() 1677 chip->pagebuf_bitflips); nand_do_read_ops() 1698 page = realpage & chip->pagemask; nand_do_read_ops() 1699 /* Check, if we cross a chip boundary */ nand_do_read_ops() 1702 chip->select_chip(mtd, -1); nand_do_read_ops() 1703 chip->select_chip(mtd, chipnr); nand_do_read_ops() 1706 chip->select_chip(mtd, -1); nand_do_read_ops() 1729 * Get hold of the chip and call nand_do_read. 1751 * @chip: nand chip info structure 1754 static int nand_read_oob_std(struct mtd_info *mtd, struct nand_chip *chip, nand_read_oob_std() argument 1757 chip->cmdfunc(mtd, NAND_CMD_READOOB, 0, page); nand_read_oob_std() 1758 chip->read_buf(mtd, chip->oob_poi, mtd->oobsize); nand_read_oob_std() 1766 * @chip: nand chip info structure 1769 static int nand_read_oob_syndrome(struct mtd_info *mtd, struct nand_chip *chip, nand_read_oob_syndrome() argument 1773 int chunk = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad; nand_read_oob_syndrome() 1774 int eccsize = chip->ecc.size; nand_read_oob_syndrome() 1775 uint8_t *bufpoi = chip->oob_poi; nand_read_oob_syndrome() 1778 chip->cmdfunc(mtd, NAND_CMD_READ0, chip->ecc.size, page); nand_read_oob_syndrome() 1779 for (i = 0; i < chip->ecc.steps; i++) { nand_read_oob_syndrome() 1783 chip->cmdfunc(mtd, NAND_CMD_RNDOUT, pos, -1); nand_read_oob_syndrome() 1785 chip->cmdfunc(mtd, NAND_CMD_READ0, pos, page); nand_read_oob_syndrome() 1789 chip->read_buf(mtd, bufpoi, toread); nand_read_oob_syndrome() 1794 chip->read_buf(mtd, bufpoi, length); nand_read_oob_syndrome() 1802 * @chip: nand chip info structure 1805 static int nand_write_oob_std(struct mtd_info *mtd, struct nand_chip *chip, nand_write_oob_std() argument 1809 const uint8_t *buf = chip->oob_poi; nand_write_oob_std() 1812 chip->cmdfunc(mtd, NAND_CMD_SEQIN, mtd->writesize, page); nand_write_oob_std() 1813 chip->write_buf(mtd, buf, length); nand_write_oob_std() 1815 chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1); nand_write_oob_std() 1817 status = chip->waitfunc(mtd, chip); nand_write_oob_std() 1826 * @chip: nand chip info structure 1830 struct nand_chip *chip, int page) nand_write_oob_syndrome() 1832 int chunk = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad; nand_write_oob_syndrome() 1833 int eccsize = chip->ecc.size, length = mtd->oobsize; nand_write_oob_syndrome() 1834 int i, len, pos, status = 0, sndcmd = 0, steps = chip->ecc.steps; nand_write_oob_syndrome() 1835 const uint8_t *bufpoi = chip->oob_poi; nand_write_oob_syndrome() 1842 if (!chip->ecc.prepad && !chip->ecc.postpad) { nand_write_oob_syndrome() 1848 chip->cmdfunc(mtd, NAND_CMD_SEQIN, pos, page); nand_write_oob_syndrome() 1857 chip->write_buf(mtd, (uint8_t *)&fill, nand_write_oob_syndrome() 1863 chip->cmdfunc(mtd, NAND_CMD_RNDIN, pos, -1); nand_write_oob_syndrome() 1868 chip->write_buf(mtd, bufpoi, len); nand_write_oob_syndrome() 1873 chip->write_buf(mtd, bufpoi, length); nand_write_oob_syndrome() 1875 chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1); nand_write_oob_syndrome() 1876 status = chip->waitfunc(mtd, chip); nand_write_oob_syndrome() 1893 struct nand_chip *chip = mtd->priv; nand_do_read_oob() local 1906 len = chip->ecc.layout->oobavail; nand_do_read_oob() 1918 ops->ooboffs + readlen > ((mtd->size >> chip->page_shift) - nand_do_read_oob() 1919 (from >> chip->page_shift)) * len)) { nand_do_read_oob() 1925 chipnr = (int)(from >> chip->chip_shift); nand_do_read_oob() 1926 chip->select_chip(mtd, chipnr); nand_do_read_oob() 1929 realpage = (int)(from >> chip->page_shift); nand_do_read_oob() 1930 page = realpage & chip->pagemask; nand_do_read_oob() 1934 ret = chip->ecc.read_oob_raw(mtd, chip, page); nand_do_read_oob() 1936 ret = chip->ecc.read_oob(mtd, chip, page); nand_do_read_oob() 1942 buf = nand_transfer_oob(chip, buf, ops, len); nand_do_read_oob() 1944 if (chip->options & NAND_NEED_READRDY) { nand_do_read_oob() 1946 if (!chip->dev_ready) nand_do_read_oob() 1947 udelay(chip->chip_delay); nand_do_read_oob() 1959 page = realpage & chip->pagemask; nand_do_read_oob() 1960 /* Check, if we cross a chip boundary */ nand_do_read_oob() 1963 chip->select_chip(mtd, -1); nand_do_read_oob() 1964 chip->select_chip(mtd, chipnr); nand_do_read_oob() 1967 chip->select_chip(mtd, -1); nand_do_read_oob() 2028 * @chip: nand chip info structure 2030 * @oob_required: must write chip->oob_poi to OOB 2034 static int nand_write_page_raw(struct mtd_info *mtd, struct nand_chip *chip, nand_write_page_raw() argument 2037 chip->write_buf(mtd, buf, mtd->writesize); nand_write_page_raw() 2039 chip->write_buf(mtd, chip->oob_poi, mtd->oobsize); nand_write_page_raw() 2047 * @chip: nand chip info structure 2049 * @oob_required: must write chip->oob_poi to OOB 2054 struct nand_chip *chip, nand_write_page_raw_syndrome() 2057 int eccsize = chip->ecc.size; nand_write_page_raw_syndrome() 2058 int eccbytes = chip->ecc.bytes; nand_write_page_raw_syndrome() 2059 uint8_t *oob = chip->oob_poi; nand_write_page_raw_syndrome() 2062 for (steps = chip->ecc.steps; steps > 0; steps--) { nand_write_page_raw_syndrome() 2063 chip->write_buf(mtd, buf, eccsize); nand_write_page_raw_syndrome() 2066 if (chip->ecc.prepad) { nand_write_page_raw_syndrome() 2067 chip->write_buf(mtd, oob, chip->ecc.prepad); nand_write_page_raw_syndrome() 2068 oob += chip->ecc.prepad; nand_write_page_raw_syndrome() 2071 chip->write_buf(mtd, oob, eccbytes); nand_write_page_raw_syndrome() 2074 if (chip->ecc.postpad) { nand_write_page_raw_syndrome() 2075 chip->write_buf(mtd, oob, chip->ecc.postpad); nand_write_page_raw_syndrome() 2076 oob += chip->ecc.postpad; nand_write_page_raw_syndrome() 2080 size = mtd->oobsize - (oob - chip->oob_poi); nand_write_page_raw_syndrome() 2082 chip->write_buf(mtd, oob, size); nand_write_page_raw_syndrome() 2089 * @chip: nand chip info structure 2091 * @oob_required: must write chip->oob_poi to OOB 2093 static int nand_write_page_swecc(struct mtd_info *mtd, struct nand_chip *chip, nand_write_page_swecc() argument 2096 int i, eccsize = chip->ecc.size; nand_write_page_swecc() 2097 int eccbytes = chip->ecc.bytes; nand_write_page_swecc() 2098 int eccsteps = chip->ecc.steps; nand_write_page_swecc() 2099 uint8_t *ecc_calc = chip->buffers->ecccalc; nand_write_page_swecc() 2101 uint32_t *eccpos = chip->ecc.layout->eccpos; nand_write_page_swecc() 2105 chip->ecc.calculate(mtd, p, &ecc_calc[i]); nand_write_page_swecc() 2107 for (i = 0; i < chip->ecc.total; i++) nand_write_page_swecc() 2108 chip->oob_poi[eccpos[i]] = ecc_calc[i]; nand_write_page_swecc() 2110 return chip->ecc.write_page_raw(mtd, chip, buf, 1); nand_write_page_swecc() 2116 * @chip: nand chip info structure 2118 * @oob_required: must write chip->oob_poi to OOB 2120 static int nand_write_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip, nand_write_page_hwecc() argument 2123 int i, eccsize = chip->ecc.size; nand_write_page_hwecc() 2124 int eccbytes = chip->ecc.bytes; nand_write_page_hwecc() 2125 int eccsteps = chip->ecc.steps; nand_write_page_hwecc() 2126 uint8_t *ecc_calc = chip->buffers->ecccalc; nand_write_page_hwecc() 2128 uint32_t *eccpos = chip->ecc.layout->eccpos; nand_write_page_hwecc() 2131 chip->ecc.hwctl(mtd, NAND_ECC_WRITE); nand_write_page_hwecc() 2132 chip->write_buf(mtd, p, eccsize); nand_write_page_hwecc() 2133 chip->ecc.calculate(mtd, p, &ecc_calc[i]); nand_write_page_hwecc() 2136 for (i = 0; i < chip->ecc.total; i++) nand_write_page_hwecc() 2137 chip->oob_poi[eccpos[i]] = ecc_calc[i]; nand_write_page_hwecc() 2139 chip->write_buf(mtd, chip->oob_poi, mtd->oobsize); nand_write_page_hwecc() 2148 * @chip: nand chip info structure 2152 * @oob_required: must write chip->oob_poi to OOB 2155 struct nand_chip *chip, uint32_t offset, nand_write_subpage_hwecc() 2159 uint8_t *oob_buf = chip->oob_poi; nand_write_subpage_hwecc() 2160 uint8_t *ecc_calc = chip->buffers->ecccalc; nand_write_subpage_hwecc() 2161 int ecc_size = chip->ecc.size; nand_write_subpage_hwecc() 2162 int ecc_bytes = chip->ecc.bytes; nand_write_subpage_hwecc() 2163 int ecc_steps = chip->ecc.steps; nand_write_subpage_hwecc() 2164 uint32_t *eccpos = chip->ecc.layout->eccpos; nand_write_subpage_hwecc() 2172 chip->ecc.hwctl(mtd, NAND_ECC_WRITE); nand_write_subpage_hwecc() 2175 chip->write_buf(mtd, buf, ecc_size); nand_write_subpage_hwecc() 2181 chip->ecc.calculate(mtd, buf, ecc_calc); nand_write_subpage_hwecc() 2193 /* copy calculated ECC for whole page to chip->buffer->oob */ nand_write_subpage_hwecc() 2195 ecc_calc = chip->buffers->ecccalc; nand_write_subpage_hwecc() 2196 for (i = 0; i < chip->ecc.total; i++) nand_write_subpage_hwecc() 2197 chip->oob_poi[eccpos[i]] = ecc_calc[i]; nand_write_subpage_hwecc() 2200 chip->write_buf(mtd, chip->oob_poi, mtd->oobsize); nand_write_subpage_hwecc() 2209 * @chip: nand chip info structure 2211 * @oob_required: must write chip->oob_poi to OOB 2217 struct nand_chip *chip, nand_write_page_syndrome() 2220 int i, eccsize = chip->ecc.size; nand_write_page_syndrome() 2221 int eccbytes = chip->ecc.bytes; nand_write_page_syndrome() 2222 int eccsteps = chip->ecc.steps; nand_write_page_syndrome() 2224 uint8_t *oob = chip->oob_poi; nand_write_page_syndrome() 2228 chip->ecc.hwctl(mtd, NAND_ECC_WRITE); nand_write_page_syndrome() 2229 chip->write_buf(mtd, p, eccsize); nand_write_page_syndrome() 2231 if (chip->ecc.prepad) { nand_write_page_syndrome() 2232 chip->write_buf(mtd, oob, chip->ecc.prepad); nand_write_page_syndrome() 2233 oob += chip->ecc.prepad; nand_write_page_syndrome() 2236 chip->ecc.calculate(mtd, p, oob); nand_write_page_syndrome() 2237 chip->write_buf(mtd, oob, eccbytes); nand_write_page_syndrome() 2240 if (chip->ecc.postpad) { nand_write_page_syndrome() 2241 chip->write_buf(mtd, oob, chip->ecc.postpad); nand_write_page_syndrome() 2242 oob += chip->ecc.postpad; nand_write_page_syndrome() 2247 i = mtd->oobsize - (oob - chip->oob_poi); nand_write_page_syndrome() 2249 chip->write_buf(mtd, oob, i); nand_write_page_syndrome() 2257 * @chip: NAND chip descriptor 2261 * @oob_required: must write chip->oob_poi to OOB 2266 static int nand_write_page(struct mtd_info *mtd, struct nand_chip *chip, nand_write_page() argument 2272 if (!(chip->options & NAND_NO_SUBPAGE_WRITE) && nand_write_page() 2273 chip->ecc.write_subpage) nand_write_page() 2278 chip->cmdfunc(mtd, NAND_CMD_SEQIN, 0x00, page); nand_write_page() 2281 status = chip->ecc.write_page_raw(mtd, chip, buf, nand_write_page() 2284 status = chip->ecc.write_subpage(mtd, chip, offset, data_len, nand_write_page() 2287 status = chip->ecc.write_page(mtd, chip, buf, oob_required); nand_write_page() 2298 if (!cached || !NAND_HAS_CACHEPROG(chip)) { nand_write_page() 2300 chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1); nand_write_page() 2301 status = chip->waitfunc(mtd, chip); nand_write_page() 2306 if ((status & NAND_STATUS_FAIL) && (chip->errstat)) nand_write_page() 2307 status = chip->errstat(mtd, chip, FL_WRITING, status, nand_write_page() 2313 chip->cmdfunc(mtd, NAND_CMD_CACHEDPROG, -1, -1); nand_write_page() 2314 status = chip->waitfunc(mtd, chip); nand_write_page() 2330 struct nand_chip *chip = mtd->priv; nand_fill_oob() local 2336 memset(chip->oob_poi, 0xff, mtd->oobsize); nand_fill_oob() 2342 memcpy(chip->oob_poi + ops->ooboffs, oob, len); nand_fill_oob() 2346 struct nand_oobfree *free = chip->ecc.layout->oobfree; nand_fill_oob() 2365 memcpy(chip->oob_poi + boffs, oob, bytes); nand_fill_oob() 2376 #define NOTALIGNED(x) ((x & (chip->subpagesize - 1)) != 0) 2390 struct nand_chip *chip = mtd->priv; nand_do_write_ops() local 2415 chipnr = (int)(to >> chip->chip_shift); nand_do_write_ops() 2416 chip->select_chip(mtd, chipnr); nand_do_write_ops() 2424 realpage = (int)(to >> chip->page_shift); nand_do_write_ops() 2425 page = realpage & chip->pagemask; nand_do_write_ops() 2426 blockmask = (1 << (chip->phys_erase_shift - chip->page_shift)) - 1; nand_do_write_ops() 2429 if (to <= ((loff_t)chip->pagebuf << chip->page_shift) && nand_do_write_ops() 2430 ((loff_t)chip->pagebuf << chip->page_shift) < (to + ops->len)) nand_do_write_ops() 2431 chip->pagebuf = -1; nand_do_write_ops() 2448 else if (chip->options & NAND_USE_BOUNCE_BUFFER) nand_do_write_ops() 2460 chip->pagebuf = -1; nand_do_write_ops() 2461 memset(chip->buffers->databuf, 0xff, mtd->writesize); nand_do_write_ops() 2462 memcpy(&chip->buffers->databuf[column], buf, bytes); nand_do_write_ops() 2463 wbuf = chip->buffers->databuf; nand_do_write_ops() 2472 memset(chip->oob_poi, 0xff, mtd->oobsize); nand_do_write_ops() 2474 ret = chip->write_page(mtd, chip, column, bytes, wbuf, nand_do_write_ops() 2488 page = realpage & chip->pagemask; nand_do_write_ops() 2489 /* Check, if we cross a chip boundary */ nand_do_write_ops() 2492 chip->select_chip(mtd, -1); nand_do_write_ops() 2493 chip->select_chip(mtd, chipnr); nand_do_write_ops() 2502 chip->select_chip(mtd, -1); nand_do_write_ops() 2520 struct nand_chip *chip = mtd->priv; panic_nand_write() local 2525 panic_nand_wait(mtd, chip, 400); panic_nand_write() 2528 panic_nand_get_device(chip, mtd, FL_WRITING); panic_nand_write() 2580 struct nand_chip *chip = mtd->priv; nand_do_write_oob() local 2586 len = chip->ecc.layout->oobavail; nand_do_write_oob() 2606 ((mtd->size >> chip->page_shift) - nand_do_write_oob() 2607 (to >> chip->page_shift)) * len)) { nand_do_write_oob() 2613 chipnr = (int)(to >> chip->chip_shift); nand_do_write_oob() 2614 chip->select_chip(mtd, chipnr); nand_do_write_oob() 2617 page = (int)(to >> chip->page_shift); nand_do_write_oob() 2620 * Reset the chip. Some chips (like the Toshiba TC5832DC found in one nand_do_write_oob() 2625 chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1); nand_do_write_oob() 2629 chip->select_chip(mtd, -1); nand_do_write_oob() 2634 if (page == chip->pagebuf) nand_do_write_oob() 2635 chip->pagebuf = -1; nand_do_write_oob() 2640 status = chip->ecc.write_oob_raw(mtd, chip, page & chip->pagemask); nand_do_write_oob() 2642 status = chip->ecc.write_oob(mtd, chip, page & chip->pagemask); nand_do_write_oob() 2644 chip->select_chip(mtd, -1); nand_do_write_oob() 2705 struct nand_chip *chip = mtd->priv; single_erase() local 2707 chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page); single_erase() 2708 chip->cmdfunc(mtd, NAND_CMD_ERASE2, -1, -1); single_erase() 2710 return chip->waitfunc(mtd, chip); single_erase() 2737 struct nand_chip *chip = mtd->priv; nand_erase_nand() local 2751 page = (int)(instr->addr >> chip->page_shift); nand_erase_nand() 2752 chipnr = (int)(instr->addr >> chip->chip_shift); nand_erase_nand() 2755 pages_per_block = 1 << (chip->phys_erase_shift - chip->page_shift); nand_erase_nand() 2758 chip->select_chip(mtd, chipnr); nand_erase_nand() 2776 chip->page_shift, 0, allowbbt)) { nand_erase_nand() 2787 if (page <= chip->pagebuf && chip->pagebuf < nand_erase_nand() 2789 chip->pagebuf = -1; nand_erase_nand() 2791 status = chip->erase(mtd, page & chip->pagemask); nand_erase_nand() 2797 if ((status & NAND_STATUS_FAIL) && (chip->errstat)) nand_erase_nand() 2798 status = chip->errstat(mtd, chip, FL_ERASING, nand_erase_nand() 2807 ((loff_t)page << chip->page_shift); nand_erase_nand() 2812 len -= (1ULL << chip->phys_erase_shift); nand_erase_nand() 2815 /* Check, if we cross a chip boundary */ nand_erase_nand() 2816 if (len && !(page & chip->pagemask)) { nand_erase_nand() 2818 chip->select_chip(mtd, -1); nand_erase_nand() 2819 chip->select_chip(mtd, chipnr); nand_erase_nand() 2829 chip->select_chip(mtd, -1); nand_erase_nand() 2844 * Sync is actually a wait for chip ready function. 2889 * @chip: nand chip info structure 2893 static int nand_onfi_set_features(struct mtd_info *mtd, struct nand_chip *chip, nand_onfi_set_features() argument 2899 if (!chip->onfi_version || nand_onfi_set_features() 2900 !(le16_to_cpu(chip->onfi_params.opt_cmd) nand_onfi_set_features() 2904 chip->cmdfunc(mtd, NAND_CMD_SET_FEATURES, addr, -1); nand_onfi_set_features() 2906 chip->write_byte(mtd, subfeature_param[i]); nand_onfi_set_features() 2908 status = chip->waitfunc(mtd, chip); nand_onfi_set_features() 2917 * @chip: nand chip info structure 2921 static int nand_onfi_get_features(struct mtd_info *mtd, struct nand_chip *chip, nand_onfi_get_features() argument 2926 if (!chip->onfi_version || nand_onfi_get_features() 2927 !(le16_to_cpu(chip->onfi_params.opt_cmd) nand_onfi_get_features() 2934 chip->cmdfunc(mtd, NAND_CMD_GET_FEATURES, addr, -1); nand_onfi_get_features() 2936 *subfeature_param++ = chip->read_byte(mtd); nand_onfi_get_features() 2955 struct nand_chip *chip = mtd->priv; nand_resume() local 2957 if (chip->state == FL_PM_SUSPENDED) nand_resume() 2960 pr_err("%s called for a chip which is not in suspended state\n", nand_resume() 2975 static void nand_set_defaults(struct nand_chip *chip, int busw) nand_set_defaults() argument 2978 if (!chip->chip_delay) nand_set_defaults() 2979 chip->chip_delay = 20; nand_set_defaults() 2982 if (chip->cmdfunc == NULL) nand_set_defaults() 2983 chip->cmdfunc = nand_command; nand_set_defaults() 2986 if (chip->waitfunc == NULL) nand_set_defaults() 2987 chip->waitfunc = nand_wait; nand_set_defaults() 2989 if (!chip->select_chip) nand_set_defaults() 2990 chip->select_chip = nand_select_chip; nand_set_defaults() 2993 if (!chip->onfi_set_features) nand_set_defaults() 2994 chip->onfi_set_features = nand_onfi_set_features; nand_set_defaults() 2995 if (!chip->onfi_get_features) nand_set_defaults() 2996 chip->onfi_get_features = nand_onfi_get_features; nand_set_defaults() 2999 if (!chip->read_byte || chip->read_byte == nand_read_byte) nand_set_defaults() 3000 chip->read_byte = busw ? nand_read_byte16 : nand_read_byte; nand_set_defaults() 3001 if (!chip->read_word) nand_set_defaults() 3002 chip->read_word = nand_read_word; nand_set_defaults() 3003 if (!chip->block_bad) nand_set_defaults() 3004 chip->block_bad = nand_block_bad; nand_set_defaults() 3005 if (!chip->block_markbad) nand_set_defaults() 3006 chip->block_markbad = nand_default_block_markbad; nand_set_defaults() 3007 if (!chip->write_buf || chip->write_buf == nand_write_buf) nand_set_defaults() 3008 chip->write_buf = busw ? nand_write_buf16 : nand_write_buf; nand_set_defaults() 3009 if (!chip->write_byte || chip->write_byte == nand_write_byte) nand_set_defaults() 3010 chip->write_byte = busw ? nand_write_byte16 : nand_write_byte; nand_set_defaults() 3011 if (!chip->read_buf || chip->read_buf == nand_read_buf) nand_set_defaults() 3012 chip->read_buf = busw ? nand_read_buf16 : nand_read_buf; nand_set_defaults() 3013 if (!chip->scan_bbt) nand_set_defaults() 3014 chip->scan_bbt = nand_default_bbt; nand_set_defaults() 3016 if (!chip->controller) { nand_set_defaults() 3017 chip->controller = &chip->hwcontrol; nand_set_defaults() 3018 spin_lock_init(&chip->controller->lock); nand_set_defaults() 3019 init_waitqueue_head(&chip->controller->wq); nand_set_defaults() 3056 struct nand_chip *chip, struct nand_onfi_params *p) nand_flash_detect_ext_param_page() 3072 chip->cmdfunc(mtd, NAND_CMD_PARAM, 0, -1); nand_flash_detect_ext_param_page() 3075 chip->cmdfunc(mtd, NAND_CMD_RNDOUT, nand_flash_detect_ext_param_page() 3079 chip->read_buf(mtd, (uint8_t *)ep, len); nand_flash_detect_ext_param_page() 3116 chip->ecc_strength_ds = ecc->ecc_bits; nand_flash_detect_ext_param_page() 3117 chip->ecc_step_ds = 1 << ecc->codeword_size; nand_flash_detect_ext_param_page() 3127 struct nand_chip *chip = mtd->priv; nand_setup_read_retry_micron() local 3130 return chip->onfi_set_features(mtd, chip, ONFI_FEATURE_ADDR_READ_RETRY, nand_setup_read_retry_micron() 3135 * Configure chip properties from Micron vendor-specific ONFI table 3137 static void nand_onfi_detect_micron(struct nand_chip *chip, nand_onfi_detect_micron() argument 3145 chip->read_retries = micron->read_retry_options; nand_onfi_detect_micron() 3146 chip->setup_read_retry = nand_setup_read_retry_micron; nand_onfi_detect_micron() 3150 * Check if the NAND chip is ONFI compliant, returns 1 if it is, 0 otherwise. 3152 static int nand_flash_detect_onfi(struct mtd_info *mtd, struct nand_chip *chip, nand_flash_detect_onfi() argument 3155 struct nand_onfi_params *p = &chip->onfi_params; nand_flash_detect_onfi() 3159 /* Try ONFI for unknown chip or LP */ nand_flash_detect_onfi() 3160 chip->cmdfunc(mtd, NAND_CMD_READID, 0x20, -1); nand_flash_detect_onfi() 3161 if (chip->read_byte(mtd) != 'O' || chip->read_byte(mtd) != 'N' || nand_flash_detect_onfi() 3162 chip->read_byte(mtd) != 'F' || chip->read_byte(mtd) != 'I') nand_flash_detect_onfi() 3165 chip->cmdfunc(mtd, NAND_CMD_PARAM, 0, -1); nand_flash_detect_onfi() 3168 ((uint8_t *)p)[j] = chip->read_byte(mtd); nand_flash_detect_onfi() 3183 chip->onfi_version = 23; nand_flash_detect_onfi() 3185 chip->onfi_version = 22; nand_flash_detect_onfi() 3187 chip->onfi_version = 21; nand_flash_detect_onfi() 3189 chip->onfi_version = 20; nand_flash_detect_onfi() 3191 chip->onfi_version = 10; nand_flash_detect_onfi() 3193 if (!chip->onfi_version) { nand_flash_detect_onfi() 3216 chip->chipsize = 1 << (fls(le32_to_cpu(p->blocks_per_lun)) - 1); nand_flash_detect_onfi() 3217 chip->chipsize *= (uint64_t)mtd->erasesize * p->lun_count; nand_flash_detect_onfi() 3218 chip->bits_per_cell = p->bits_per_cell; nand_flash_detect_onfi() 3220 if (onfi_feature(chip) & ONFI_FEATURE_16_BIT_BUS) nand_flash_detect_onfi() 3226 chip->ecc_strength_ds = p->ecc_bits; nand_flash_detect_onfi() 3227 chip->ecc_step_ds = 512; nand_flash_detect_onfi() 3228 } else if (chip->onfi_version >= 21 && nand_flash_detect_onfi() 3229 (onfi_feature(chip) & ONFI_FEATURE_EXT_PARAM_PAGE)) { nand_flash_detect_onfi() 3234 * by the chip->cmdfunc. So try to update the chip->cmdfunc nand_flash_detect_onfi() 3237 if (mtd->writesize > 512 && chip->cmdfunc == nand_command) nand_flash_detect_onfi() 3238 chip->cmdfunc = nand_command_lp; nand_flash_detect_onfi() 3241 if (nand_flash_detect_ext_param_page(mtd, chip, p)) nand_flash_detect_onfi() 3248 nand_onfi_detect_micron(chip, p); nand_flash_detect_onfi() 3254 * Check if the NAND chip is JEDEC compliant, returns 1 if it is, 0 otherwise. 3256 static int nand_flash_detect_jedec(struct mtd_info *mtd, struct nand_chip *chip, nand_flash_detect_jedec() argument 3259 struct nand_jedec_params *p = &chip->jedec_params; nand_flash_detect_jedec() 3264 /* Try JEDEC for unknown chip or LP */ nand_flash_detect_jedec() 3265 chip->cmdfunc(mtd, NAND_CMD_READID, 0x40, -1); nand_flash_detect_jedec() 3266 if (chip->read_byte(mtd) != 'J' || chip->read_byte(mtd) != 'E' || nand_flash_detect_jedec() 3267 chip->read_byte(mtd) != 'D' || chip->read_byte(mtd) != 'E' || nand_flash_detect_jedec() 3268 chip->read_byte(mtd) != 'C') nand_flash_detect_jedec() 3271 chip->cmdfunc(mtd, NAND_CMD_PARAM, 0x40, -1); nand_flash_detect_jedec() 3274 ((uint8_t *)p)[j] = chip->read_byte(mtd); nand_flash_detect_jedec() 3289 chip->jedec_version = 10; nand_flash_detect_jedec() 3291 chip->jedec_version = 1; /* vendor specific version */ nand_flash_detect_jedec() 3293 if (!chip->jedec_version) { nand_flash_detect_jedec() 3312 chip->chipsize = 1 << (fls(le32_to_cpu(p->blocks_per_lun)) - 1); nand_flash_detect_jedec() 3313 chip->chipsize *= (uint64_t)mtd->erasesize * p->lun_count; nand_flash_detect_jedec() 3314 chip->bits_per_cell = p->bits_per_cell; nand_flash_detect_jedec() 3316 if (jedec_feature(chip) & JEDEC_FEATURE_16_BIT_BUS) nand_flash_detect_jedec() 3325 chip->ecc_strength_ds = ecc->ecc_bits; nand_flash_detect_jedec() 3326 chip->ecc_step_ds = 1 << ecc->codeword_size; nand_flash_detect_jedec() 3405 * chip. The rest of the parameters must be decoded according to generic or 3408 static void nand_decode_ext_id(struct mtd_info *mtd, struct nand_chip *chip, nand_decode_ext_id() argument 3413 chip->bits_per_cell = nand_get_bits_per_cell(id_data[2]); nand_decode_ext_id() 3429 !nand_is_slc(chip) && id_data[5] != 0x00) { nand_decode_ext_id() 3464 !nand_is_slc(chip)) { nand_decode_ext_id() 3527 nand_is_slc(chip) && nand_decode_ext_id() 3537 * Old devices have chip data hardcoded in the device ID table. nand_decode_id 3539 * the chip. 3541 static void nand_decode_id(struct mtd_info *mtd, struct nand_chip *chip, nand_decode_id() argument 3553 chip->bits_per_cell = 1; nand_decode_id() 3575 struct nand_chip *chip, u8 id_data[8]) nand_decode_bbm_options() 3580 if (mtd->writesize > 512 || (chip->options & NAND_BUSWIDTH_16)) nand_decode_bbm_options() 3581 chip->badblockpos = NAND_LARGE_BADBLOCK_POS; nand_decode_bbm_options() 3583 chip->badblockpos = NAND_SMALL_BADBLOCK_POS; nand_decode_bbm_options() 3591 if (!nand_is_slc(chip) && nand_decode_bbm_options() 3594 chip->bbt_options |= NAND_BBT_SCANLASTPAGE; nand_decode_bbm_options() 3595 else if ((nand_is_slc(chip) && nand_decode_bbm_options() 3603 chip->bbt_options |= NAND_BBT_SCAN2NDPAGE; nand_decode_bbm_options() 3611 static bool find_full_id_nand(struct mtd_info *mtd, struct nand_chip *chip, find_full_id_nand() argument 3619 chip->bits_per_cell = nand_get_bits_per_cell(id_data[2]); find_full_id_nand() 3620 chip->chipsize = (uint64_t)type->chipsize << 20; find_full_id_nand() 3621 chip->options |= type->options; find_full_id_nand() 3622 chip->ecc_strength_ds = NAND_ECC_STRENGTH(type); find_full_id_nand() 3623 chip->ecc_step_ds = NAND_ECC_STEP(type); find_full_id_nand() 3624 chip->onfi_timing_mode_default = find_full_id_nand() 3641 struct nand_chip *chip, nand_get_flash_type() 3650 chip->select_chip(mtd, 0); nand_get_flash_type() 3653 * Reset the chip, required by some chips (e.g. Micron MT29FxGxxxxx) nand_get_flash_type() 3656 chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1); nand_get_flash_type() 3659 chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1); nand_get_flash_type() 3662 *maf_id = chip->read_byte(mtd); nand_get_flash_type() 3663 *dev_id = chip->read_byte(mtd); nand_get_flash_type() 3672 chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1); nand_get_flash_type() 3676 id_data[i] = chip->read_byte(mtd); nand_get_flash_type() 3689 if (find_full_id_nand(mtd, chip, type, id_data, &busw)) nand_get_flash_type() 3696 chip->onfi_version = 0; nand_get_flash_type() 3698 /* Check if the chip is ONFI compliant */ nand_get_flash_type() 3699 if (nand_flash_detect_onfi(mtd, chip, &busw)) nand_get_flash_type() 3702 /* Check if the chip is JEDEC compliant */ nand_get_flash_type() 3703 if (nand_flash_detect_jedec(mtd, chip, &busw)) nand_get_flash_type() 3713 chip->chipsize = (uint64_t)type->chipsize << 20; nand_get_flash_type() 3715 if (!type->pagesize && chip->init_size) { nand_get_flash_type() 3717 busw = chip->init_size(mtd, chip, id_data); nand_get_flash_type() 3720 nand_decode_ext_id(mtd, chip, id_data, &busw); nand_get_flash_type() 3722 nand_decode_id(mtd, chip, type, id_data, &busw); nand_get_flash_type() 3724 /* Get chip options */ nand_get_flash_type() 3725 chip->options |= type->options; nand_get_flash_type() 3728 * Check if chip is not a Samsung device. Do not clear the nand_get_flash_type() 3732 chip->options &= ~NAND_SAMSUNG_LP_OPTIONS; nand_get_flash_type() 3741 if (chip->options & NAND_BUSWIDTH_AUTO) { nand_get_flash_type() 3742 WARN_ON(chip->options & NAND_BUSWIDTH_16); nand_get_flash_type() 3743 chip->options |= busw; nand_get_flash_type() 3744 nand_set_defaults(chip, busw); nand_get_flash_type() 3745 } else if (busw != (chip->options & NAND_BUSWIDTH_16)) { nand_get_flash_type() 3748 * chip correct! nand_get_flash_type() 3754 (chip->options & NAND_BUSWIDTH_16) ? 16 : 8, nand_get_flash_type() 3759 nand_decode_bbm_options(mtd, chip, id_data); nand_get_flash_type() 3762 chip->page_shift = ffs(mtd->writesize) - 1; nand_get_flash_type() 3763 /* Convert chipsize to number of pages per chip -1 */ nand_get_flash_type() 3764 chip->pagemask = (chip->chipsize >> chip->page_shift) - 1; nand_get_flash_type() 3766 chip->bbt_erase_shift = chip->phys_erase_shift = nand_get_flash_type() 3768 if (chip->chipsize & 0xffffffff) nand_get_flash_type() 3769 chip->chip_shift = ffs((unsigned)chip->chipsize) - 1; nand_get_flash_type() 3771 chip->chip_shift = ffs((unsigned)(chip->chipsize >> 32)); nand_get_flash_type() 3772 chip->chip_shift += 32 - 1; nand_get_flash_type() 3775 chip->badblockbits = 8; nand_get_flash_type() 3776 chip->erase = single_erase; nand_get_flash_type() 3779 if (mtd->writesize > 512 && chip->cmdfunc == nand_command) nand_get_flash_type() 3780 chip->cmdfunc = nand_command_lp; nand_get_flash_type() 3785 if (chip->onfi_version) nand_get_flash_type() 3787 chip->onfi_params.model); nand_get_flash_type() 3788 else if (chip->jedec_version) nand_get_flash_type() 3790 chip->jedec_params.model); nand_get_flash_type() 3796 (int)(chip->chipsize >> 20), nand_is_slc(chip) ? "SLC" : "MLC", nand_get_flash_type() 3816 struct nand_chip *chip = mtd->priv; nand_scan_ident() local 3820 nand_set_defaults(chip, chip->options & NAND_BUSWIDTH_16); nand_scan_ident() 3823 type = nand_get_flash_type(mtd, chip, &nand_maf_id, nand_scan_ident() 3827 if (!(chip->options & NAND_SCAN_SILENT_NODEV)) nand_scan_ident() 3829 chip->select_chip(mtd, -1); nand_scan_ident() 3833 chip->select_chip(mtd, -1); nand_scan_ident() 3835 /* Check for a chip array */ nand_scan_ident() 3837 chip->select_chip(mtd, i); nand_scan_ident() 3839 chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1); nand_scan_ident() 3841 chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1); nand_scan_ident() 3843 if (nand_maf_id != chip->read_byte(mtd) || nand_scan_ident() 3844 nand_dev_id != chip->read_byte(mtd)) { nand_scan_ident() 3845 chip->select_chip(mtd, -1); nand_scan_ident() 3848 chip->select_chip(mtd, -1); nand_scan_ident() 3854 chip->numchips = i; nand_scan_ident() 3855 mtd->size = i * chip->chipsize; nand_scan_ident() 3862 * Check if the chip configuration meet the datasheet requirements. 3877 struct nand_chip *chip = mtd->priv; nand_ecc_strength_good() local 3878 struct nand_ecc_ctrl *ecc = &chip->ecc; nand_ecc_strength_good() 3881 if (ecc->size == 0 || chip->ecc_step_ds == 0) nand_ecc_strength_good() 3890 ds_corr = (mtd->writesize * chip->ecc_strength_ds) / chip->ecc_step_ds; nand_ecc_strength_good() 3892 return corr >= ds_corr && ecc->strength >= chip->ecc_strength_ds; nand_ecc_strength_good() 3906 struct nand_chip *chip = mtd->priv; nand_scan_tail() local 3907 struct nand_ecc_ctrl *ecc = &chip->ecc; nand_scan_tail() 3911 BUG_ON((chip->bbt_options & NAND_BBT_NO_OOB_BBM) && nand_scan_tail() 3912 !(chip->bbt_options & NAND_BBT_USE_FLASH)); nand_scan_tail() 3914 if (!(chip->options & NAND_OWN_BUFFERS)) { nand_scan_tail() 3923 chip->buffers = nbuf; nand_scan_tail() 3925 if (!chip->buffers) nand_scan_tail() 3930 chip->oob_poi = chip->buffers->databuf + mtd->writesize; nand_scan_tail() 3956 if (!chip->write_page) nand_scan_tail() 3957 chip->write_page = nand_write_page; nand_scan_tail() 4114 pr_warn("WARNING: %s: the ECC used on your system is too weak compared to the one required by the NAND chip\n", nand_scan_tail() 4129 if (!(chip->options & NAND_NO_SUBPAGE_WRITE) && nand_is_slc(chip)) { nand_scan_tail() 4141 chip->subpagesize = mtd->writesize >> mtd->subpage_sft; nand_scan_tail() 4144 chip->state = FL_READY; nand_scan_tail() 4147 chip->pagebuf = -1; nand_scan_tail() 4153 if (chip->page_shift > 9) nand_scan_tail() 4154 chip->options |= NAND_SUBPAGE_READ; nand_scan_tail() 4162 mtd->type = nand_is_slc(chip) ? MTD_NANDFLASH : MTD_MLCNANDFLASH; nand_scan_tail() 4163 mtd->flags = (chip->options & NAND_ROM) ? MTD_CAP_ROM : nand_scan_tail() 4197 if (chip->options & NAND_SKIP_BBTSCAN) nand_scan_tail() 4201 return chip->scan_bbt(mtd); nand_scan_tail() 4223 * The flash ID is read and the mtd/chip structures are filled with the 4250 struct nand_chip *chip = mtd->priv; nand_release() local 4252 if (chip->ecc.mode == NAND_ECC_SOFT_BCH) nand_release() 4253 nand_bch_free((struct nand_bch_control *)chip->ecc.priv); nand_release() 4258 kfree(chip->bbt); nand_release() 4259 if (!(chip->options & NAND_OWN_BUFFERS)) nand_release() 4260 kfree(chip->buffers); nand_release() 4263 if (chip->badblock_pattern && chip->badblock_pattern->options nand_release() 4265 kfree(chip->badblock_pattern); nand_release() 1133 nand_read_page_raw_syndrome(struct mtd_info *mtd, struct nand_chip *chip, uint8_t *buf, int oob_required, int page) nand_read_page_raw_syndrome() argument 1368 nand_read_page_hwecc_oob_first(struct mtd_info *mtd, struct nand_chip *chip, uint8_t *buf, int oob_required, int page) nand_read_page_hwecc_oob_first() argument 1829 nand_write_oob_syndrome(struct mtd_info *mtd, struct nand_chip *chip, int page) nand_write_oob_syndrome() argument 2053 nand_write_page_raw_syndrome(struct mtd_info *mtd, struct nand_chip *chip, const uint8_t *buf, int oob_required) nand_write_page_raw_syndrome() argument 2154 nand_write_subpage_hwecc(struct mtd_info *mtd, struct nand_chip *chip, uint32_t offset, uint32_t data_len, const uint8_t *buf, int oob_required) nand_write_subpage_hwecc() argument 2216 nand_write_page_syndrome(struct mtd_info *mtd, struct nand_chip *chip, const uint8_t *buf, int oob_required) nand_write_page_syndrome() argument 3055 nand_flash_detect_ext_param_page(struct mtd_info *mtd, struct nand_chip *chip, struct nand_onfi_params *p) nand_flash_detect_ext_param_page() argument 3574 nand_decode_bbm_options(struct mtd_info *mtd, struct nand_chip *chip, u8 id_data[8]) nand_decode_bbm_options() argument 3640 nand_get_flash_type(struct mtd_info *mtd, struct nand_chip *chip, int *maf_id, int *dev_id, struct nand_flash_dev *type) nand_get_flash_type() argument
/linux-4.1.27/drivers/misc/cb710/
H A D	core.c	70 struct cb710_chip *chip = data; cb710_irq_handler() local 71 struct cb710_slot *slot = &chip->slot[0]; cb710_irq_handler() 75 spin_lock(&chip->irq_lock); /* incl. smp_rmb() */ cb710_irq_handler() 77 for (nr = chip->slots; nr; ++slot, --nr) { cb710_irq_handler() 83 spin_unlock(&chip->irq_lock); cb710_irq_handler() 92 struct cb710_chip *chip = cb710_slot_to_chip(slot); cb710_release_slot() local 95 atomic_dec(&chip->slot_refs_count); cb710_release_slot() 99 static int cb710_register_slot(struct cb710_chip *chip, cb710_register_slot() argument 102 int nr = chip->slots; cb710_register_slot() 103 struct cb710_slot *slot = &chip->slot[nr]; cb710_register_slot() 106 dev_dbg(cb710_chip_dev(chip), cb710_register_slot() 108 name, chip->platform_id, nr, slot_mask, io_offset); cb710_register_slot() 112 ++chip->slots; cb710_register_slot() 115 slot->iobase = chip->iobase + io_offset; cb710_register_slot() 117 slot->pdev.id = chip->platform_id; cb710_register_slot() 118 slot->pdev.dev.parent = &chip->pdev->dev; cb710_register_slot() 124 atomic_inc(&chip->slot_refs_count); cb710_register_slot() 133 --chip->slots; cb710_register_slot() 137 chip->slot_mask |= slot_mask; cb710_register_slot() 142 static void cb710_unregister_slot(struct cb710_chip *chip, cb710_unregister_slot() argument 145 int nr = chip->slots - 1; cb710_unregister_slot() 147 if (!(chip->slot_mask & slot_mask)) cb710_unregister_slot() 150 platform_device_unregister(&chip->slot[nr].pdev); cb710_unregister_slot() 154 BUG_ON(chip->slot[nr].irq_handler != NULL); cb710_unregister_slot() 157 --chip->slots; cb710_unregister_slot() 158 chip->slot_mask &= ~slot_mask; cb710_unregister_slot() 164 struct cb710_chip *chip = cb710_slot_to_chip(slot); cb710_set_irq_handler() local 167 spin_lock_irqsave(&chip->irq_lock, flags); cb710_set_irq_handler() 169 spin_unlock_irqrestore(&chip->irq_lock, flags); cb710_set_irq_handler() 177 struct cb710_chip *chip = pci_get_drvdata(pdev); cb710_suspend() local 179 devm_free_irq(&pdev->dev, pdev->irq, chip); cb710_suspend() 189 struct cb710_chip *chip = pci_get_drvdata(pdev); cb710_resume() local 199 cb710_irq_handler, IRQF_SHARED, KBUILD_MODNAME, chip); cb710_resume() 207 struct cb710_chip *chip; cb710_probe() local 235 chip = devm_kzalloc(&pdev->dev, cb710_probe() 236 sizeof(*chip) + n * sizeof(*chip->slot), GFP_KERNEL); cb710_probe() 237 if (!chip) cb710_probe() 248 spin_lock_init(&chip->irq_lock); cb710_probe() 249 chip->pdev = pdev; cb710_probe() 250 chip->iobase = pcim_iomap_table(pdev)[0]; cb710_probe() 252 pci_set_drvdata(pdev, chip); cb710_probe() 255 cb710_irq_handler, IRQF_SHARED, KBUILD_MODNAME, chip); cb710_probe() 264 err = ida_get_new(&cb710_ida, &chip->platform_id); cb710_probe() 273 chip->platform_id, chip->iobase, pdev->irq); cb710_probe() 276 err = cb710_register_slot(chip, cb710_probe() 283 err = cb710_register_slot(chip, cb710_probe() 290 err = cb710_register_slot(chip, cb710_probe() 298 cb710_unregister_slot(chip, CB710_SLOT_MS); cb710_probe() 300 cb710_unregister_slot(chip, CB710_SLOT_MMC); cb710_probe() 303 BUG_ON(atomic_read(&chip->slot_refs_count) != 0); cb710_probe() 310 struct cb710_chip *chip = pci_get_drvdata(pdev); cb710_remove_one() local 313 cb710_unregister_slot(chip, CB710_SLOT_SM); cb710_remove_one() 314 cb710_unregister_slot(chip, CB710_SLOT_MS); cb710_remove_one() 315 cb710_unregister_slot(chip, CB710_SLOT_MMC); cb710_remove_one() 317 BUG_ON(atomic_read(&chip->slot_refs_count) != 0); cb710_remove_one() 321 ida_remove(&cb710_ida, chip->platform_id); cb710_remove_one()
/linux-4.1.27/sound/isa/msnd/
H A D	msnd_pinnacle.c	83 static void set_default_audio_parameters(struct snd_msnd *chip) set_default_audio_parameters() argument 85 chip->play_sample_size = DEFSAMPLESIZE; set_default_audio_parameters() 86 chip->play_sample_rate = DEFSAMPLERATE; set_default_audio_parameters() 87 chip->play_channels = DEFCHANNELS; set_default_audio_parameters() 88 chip->capture_sample_size = DEFSAMPLESIZE; set_default_audio_parameters() 89 chip->capture_sample_rate = DEFSAMPLERATE; set_default_audio_parameters() 90 chip->capture_channels = DEFCHANNELS; set_default_audio_parameters() 93 static void snd_msnd_eval_dsp_msg(struct snd_msnd *chip, u16 wMessage) snd_msnd_eval_dsp_msg() argument 97 if (chip->banksPlayed < 3) snd_msnd_eval_dsp_msg() 101 if (chip->last_playbank == LOBYTE(wMessage)) { snd_msnd_eval_dsp_msg() 102 snd_printdd("chip.last_playbank == LOBYTE(wMessage)\n"); snd_msnd_eval_dsp_msg() 105 chip->banksPlayed++; snd_msnd_eval_dsp_msg() 107 if (test_bit(F_WRITING, &chip->flags)) snd_msnd_eval_dsp_msg() 108 snd_msnd_DAPQ(chip, 0); snd_msnd_eval_dsp_msg() 110 chip->last_playbank = LOBYTE(wMessage); snd_msnd_eval_dsp_msg() 111 chip->playDMAPos += chip->play_period_bytes; snd_msnd_eval_dsp_msg() 112 if (chip->playDMAPos > chip->playLimit) snd_msnd_eval_dsp_msg() 113 chip->playDMAPos = 0; snd_msnd_eval_dsp_msg() 114 snd_pcm_period_elapsed(chip->playback_substream); snd_msnd_eval_dsp_msg() 119 if (chip->last_recbank == LOBYTE(wMessage)) snd_msnd_eval_dsp_msg() 121 chip->last_recbank = LOBYTE(wMessage); snd_msnd_eval_dsp_msg() 122 chip->captureDMAPos += chip->capturePeriodBytes; snd_msnd_eval_dsp_msg() 123 if (chip->captureDMAPos > (chip->captureLimit)) snd_msnd_eval_dsp_msg() 124 chip->captureDMAPos = 0; snd_msnd_eval_dsp_msg() 126 if (test_bit(F_READING, &chip->flags)) snd_msnd_eval_dsp_msg() 127 snd_msnd_DARQ(chip, chip->last_recbank); snd_msnd_eval_dsp_msg() 129 snd_pcm_period_elapsed(chip->capture_substream); snd_msnd_eval_dsp_msg() 139 chip->banksPlayed); snd_msnd_eval_dsp_msg() 140 if (chip->banksPlayed > 2) snd_msnd_eval_dsp_msg() 141 clear_bit(F_WRITING, &chip->flags); snd_msnd_eval_dsp_msg() 146 clear_bit(F_READING, &chip->flags); snd_msnd_eval_dsp_msg() 158 if (chip->msndmidi_mpu) snd_msnd_eval_dsp_msg() 159 snd_msndmidi_input_read(chip->msndmidi_mpu); snd_msnd_eval_dsp_msg() 171 struct snd_msnd *chip = dev_id; snd_msnd_interrupt() local 172 void *pwDSPQData = chip->mappedbase + DSPQ_DATA_BUFF; snd_msnd_interrupt() 175 /* inb(chip->io + HP_RXL); */ snd_msnd_interrupt() 178 while (readw(chip->DSPQ + JQS_wTail) != readw(chip->DSPQ + JQS_wHead)) { snd_msnd_interrupt() 181 snd_msnd_eval_dsp_msg(chip, snd_msnd_interrupt() 182 readw(pwDSPQData + 2 * readw(chip->DSPQ + JQS_wHead))); snd_msnd_interrupt() 184 wTmp = readw(chip->DSPQ + JQS_wHead) + 1; snd_msnd_interrupt() 185 if (wTmp > readw(chip->DSPQ + JQS_wSize)) snd_msnd_interrupt() 186 writew(0, chip->DSPQ + JQS_wHead); snd_msnd_interrupt() 188 writew(wTmp, chip->DSPQ + JQS_wHead); snd_msnd_interrupt() 191 inb(chip->io + HP_RXL); snd_msnd_interrupt() 220 struct snd_msnd *chip = card->private_data; snd_msnd_probe() local 228 if (!request_region(chip->io, DSP_NUMIO, "probing")) { snd_msnd_probe() 233 if (snd_msnd_reset_dsp(chip->io, &info) < 0) { snd_msnd_probe() 234 release_region(chip->io, DSP_NUMIO); snd_msnd_probe() 244 chip->io, chip->io + DSP_NUMIO - 1, snd_msnd_probe() 245 chip->irq, snd_msnd_probe() 246 chip->base, chip->base + 0x7fff); snd_msnd_probe() 305 chip->io, chip->io + DSP_NUMIO - 1, snd_msnd_probe() 306 chip->irq, snd_msnd_probe() 307 chip->base, chip->base + 0x7fff); snd_msnd_probe() 310 release_region(chip->io, DSP_NUMIO); snd_msnd_probe() 314 static int snd_msnd_init_sma(struct snd_msnd *chip) snd_msnd_init_sma() argument 321 outb(chip->memid, chip->io + HP_MEMM); snd_msnd_init_sma() 323 outb(HPBLKSEL_0, chip->io + HP_BLKS); snd_msnd_init_sma() 325 chip->SMA = chip->mappedbase + SMA_STRUCT_START; snd_msnd_init_sma() 328 mastVolLeft = readw(chip->SMA + SMA_wCurrMastVolLeft); snd_msnd_init_sma() 329 mastVolRight = readw(chip->SMA + SMA_wCurrMastVolRight); snd_msnd_init_sma() 332 memset_io(chip->mappedbase, 0, 0x8000); snd_msnd_init_sma() 335 spin_lock_irqsave(&chip->lock, flags); snd_msnd_init_sma() 336 outb(HPBLKSEL_1, chip->io + HP_BLKS); snd_msnd_init_sma() 337 memset_io(chip->mappedbase, 0, 0x8000); snd_msnd_init_sma() 338 outb(HPBLKSEL_0, chip->io + HP_BLKS); snd_msnd_init_sma() 339 spin_unlock_irqrestore(&chip->lock, flags); snd_msnd_init_sma() 342 chip->DAPQ = chip->mappedbase + DAPQ_OFFSET; snd_msnd_init_sma() 343 snd_msnd_init_queue(chip->DAPQ, DAPQ_DATA_BUFF, DAPQ_BUFF_SIZE); snd_msnd_init_sma() 346 chip->DARQ = chip->mappedbase + DARQ_OFFSET; snd_msnd_init_sma() 347 snd_msnd_init_queue(chip->DARQ, DARQ_DATA_BUFF, DARQ_BUFF_SIZE); snd_msnd_init_sma() 350 chip->MODQ = chip->mappedbase + MODQ_OFFSET; snd_msnd_init_sma() 351 snd_msnd_init_queue(chip->MODQ, MODQ_DATA_BUFF, MODQ_BUFF_SIZE); snd_msnd_init_sma() 354 chip->MIDQ = chip->mappedbase + MIDQ_OFFSET; snd_msnd_init_sma() 355 snd_msnd_init_queue(chip->MIDQ, MIDQ_DATA_BUFF, MIDQ_BUFF_SIZE); snd_msnd_init_sma() 358 chip->DSPQ = chip->mappedbase + DSPQ_OFFSET; snd_msnd_init_sma() 359 snd_msnd_init_queue(chip->DSPQ, DSPQ_DATA_BUFF, DSPQ_BUFF_SIZE); snd_msnd_init_sma() 363 writew(1, chip->SMA + SMA_wCurrPlayFormat); snd_msnd_init_sma() 364 writew(chip->play_sample_size, chip->SMA + SMA_wCurrPlaySampleSize); snd_msnd_init_sma() 365 writew(chip->play_channels, chip->SMA + SMA_wCurrPlayChannels); snd_msnd_init_sma() 366 writew(chip->play_sample_rate, chip->SMA + SMA_wCurrPlaySampleRate); snd_msnd_init_sma() 368 writew(chip->play_sample_rate, chip->SMA + SMA_wCalFreqAtoD); snd_msnd_init_sma() 369 writew(mastVolLeft, chip->SMA + SMA_wCurrMastVolLeft); snd_msnd_init_sma() 370 writew(mastVolRight, chip->SMA + SMA_wCurrMastVolRight); snd_msnd_init_sma() 372 writel(0x00010000, chip->SMA + SMA_dwCurrPlayPitch); snd_msnd_init_sma() 373 writel(0x00000001, chip->SMA + SMA_dwCurrPlayRate); snd_msnd_init_sma() 375 writew(0x303, chip->SMA + SMA_wCurrInputTagBits); snd_msnd_init_sma() 385 struct snd_msnd *chip = card->private_data; upload_dsp_code() local 389 outb(HPBLKSEL_0, chip->io + HP_BLKS); upload_dsp_code() 402 memcpy_toio(chip->mappedbase, perm_fw->data, perm_fw->size); upload_dsp_code() 403 if (snd_msnd_upload_host(chip, init_fw->data, init_fw->size) < 0) { upload_dsp_code() 419 static void reset_proteus(struct snd_msnd *chip) reset_proteus() argument 421 outb(HPPRORESET_ON, chip->io + HP_PROR); reset_proteus() 423 outb(HPPRORESET_OFF, chip->io + HP_PROR); reset_proteus() 430 struct snd_msnd *chip = card->private_data; snd_msnd_initialize() local 434 outb(HPWAITSTATE_0, chip->io + HP_WAIT); snd_msnd_initialize() 435 outb(HPBITMODE_16, chip->io + HP_BITM); snd_msnd_initialize() 437 reset_proteus(chip); snd_msnd_initialize() 439 err = snd_msnd_init_sma(chip); snd_msnd_initialize() 445 err = snd_msnd_reset_dsp(chip->io, NULL); snd_msnd_initialize() 457 while (readw(chip->mappedbase)) { snd_msnd_initialize() 465 snd_msndmix_setup(chip); snd_msnd_initialize() 471 struct snd_msnd *chip = card->private_data; snd_msnd_dsp_full_reset() local 474 if (test_bit(F_RESETTING, &chip->flags) || ++chip->nresets > 10) snd_msnd_dsp_full_reset() 477 set_bit(F_RESETTING, &chip->flags); snd_msnd_dsp_full_reset() 478 snd_msnd_dsp_halt(chip, NULL); /* Unconditionally halt */ snd_msnd_dsp_full_reset() 483 snd_msndmix_force_recsrc(chip, 0); snd_msnd_dsp_full_reset() 484 clear_bit(F_RESETTING, &chip->flags); snd_msnd_dsp_full_reset() 494 static int snd_msnd_send_dsp_cmd_chk(struct snd_msnd *chip, u8 cmd) snd_msnd_send_dsp_cmd_chk() argument 496 if (snd_msnd_send_dsp_cmd(chip, cmd) == 0) snd_msnd_send_dsp_cmd_chk() 498 snd_msnd_dsp_full_reset(chip->card); snd_msnd_send_dsp_cmd_chk() 499 return snd_msnd_send_dsp_cmd(chip, cmd); snd_msnd_send_dsp_cmd_chk() 502 static int snd_msnd_calibrate_adc(struct snd_msnd *chip, u16 srate) snd_msnd_calibrate_adc() argument 505 writew(srate, chip->SMA + SMA_wCalFreqAtoD); snd_msnd_calibrate_adc() 506 if (chip->calibrate_signal == 0) snd_msnd_calibrate_adc() 507 writew(readw(chip->SMA + SMA_wCurrHostStatusFlags) snd_msnd_calibrate_adc() 508 | 0x0001, chip->SMA + SMA_wCurrHostStatusFlags); snd_msnd_calibrate_adc() 510 writew(readw(chip->SMA + SMA_wCurrHostStatusFlags) snd_msnd_calibrate_adc() 511 & ~0x0001, chip->SMA + SMA_wCurrHostStatusFlags); snd_msnd_calibrate_adc() 512 if (snd_msnd_send_word(chip, 0, 0, HDEXAR_CAL_A_TO_D) == 0 && snd_msnd_calibrate_adc() 513 snd_msnd_send_dsp_cmd_chk(chip, HDEX_AUX_REQ) == 0) { snd_msnd_calibrate_adc() 542 struct snd_msnd *chip = card->private_data; snd_msnd_attach() local 548 err = request_irq(chip->irq, snd_msnd_interrupt, 0, card->shortname, snd_msnd_attach() 549 chip); snd_msnd_attach() 551 printk(KERN_ERR LOGNAME ": Couldn't grab IRQ %d\n", chip->irq); snd_msnd_attach() 554 if (request_region(chip->io, DSP_NUMIO, card->shortname) == NULL) { snd_msnd_attach() 555 free_irq(chip->irq, chip); snd_msnd_attach() 559 if (!request_mem_region(chip->base, BUFFSIZE, card->shortname)) { snd_msnd_attach() 562 chip->base, chip->base + BUFFSIZE - 1); snd_msnd_attach() 563 release_region(chip->io, DSP_NUMIO); snd_msnd_attach() 564 free_irq(chip->irq, chip); snd_msnd_attach() 567 chip->mappedbase = ioremap_nocache(chip->base, 0x8000); snd_msnd_attach() 568 if (!chip->mappedbase) { snd_msnd_attach() 571 chip->base, chip->base + BUFFSIZE - 1); snd_msnd_attach() 581 err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops); snd_msnd_attach() 606 &chip->rmidi); snd_msnd_attach() 612 mpu = chip->rmidi->private_data; snd_msnd_attach() 616 mpu->private_data = chip; snd_msnd_attach() 619 disable_irq(chip->irq); snd_msnd_attach() 620 snd_msnd_calibrate_adc(chip, chip->play_sample_rate); snd_msnd_attach() 621 snd_msndmix_force_recsrc(chip, 0); snd_msnd_attach() 630 iounmap(chip->mappedbase); snd_msnd_attach() 631 release_mem_region(chip->base, BUFFSIZE); snd_msnd_attach() 632 release_region(chip->io, DSP_NUMIO); snd_msnd_attach() 633 free_irq(chip->irq, chip); snd_msnd_attach() 640 struct snd_msnd *chip = card->private_data; snd_msnd_unload() local 642 iounmap(chip->mappedbase); snd_msnd_unload() 643 release_mem_region(chip->base, BUFFSIZE); snd_msnd_unload() 644 release_region(chip->io, DSP_NUMIO); snd_msnd_unload() 645 free_irq(chip->irq, chip); snd_msnd_unload() 896 struct snd_msnd *chip; snd_msnd_isa_probe() local 912 chip = card->private_data; snd_msnd_isa_probe() 913 chip->card = card; snd_msnd_isa_probe() 918 chip->irqid = HPIRQ_5; break; snd_msnd_isa_probe() 920 chip->irqid = HPIRQ_7; break; snd_msnd_isa_probe() 922 chip->irqid = HPIRQ_9; break; snd_msnd_isa_probe() 924 chip->irqid = HPIRQ_10; break; snd_msnd_isa_probe() 926 chip->irqid = HPIRQ_11; break; snd_msnd_isa_probe() 928 chip->irqid = HPIRQ_12; break; snd_msnd_isa_probe() 933 chip->memid = HPMEM_B000; break; snd_msnd_isa_probe() 935 chip->memid = HPMEM_C800; break; snd_msnd_isa_probe() 937 chip->memid = HPMEM_D000; break; snd_msnd_isa_probe() 939 chip->memid = HPMEM_D800; break; snd_msnd_isa_probe() 941 chip->memid = HPMEM_E000; break; snd_msnd_isa_probe() 943 chip->memid = HPMEM_E800; break; snd_msnd_isa_probe() 1016 set_default_audio_parameters(chip); snd_msnd_isa_probe() 1018 chip->type = msndClassic; snd_msnd_isa_probe() 1020 chip->type = msndPinnacle; snd_msnd_isa_probe() 1022 chip->io = io[idx]; snd_msnd_isa_probe() 1023 chip->irq = irq[idx]; snd_msnd_isa_probe() 1024 chip->base = mem[idx]; snd_msnd_isa_probe() 1026 chip->calibrate_signal = calibrate_signal ? 1 : 0; snd_msnd_isa_probe() 1027 chip->recsrc = 0; snd_msnd_isa_probe() 1028 chip->dspq_data_buff = DSPQ_DATA_BUFF; snd_msnd_isa_probe() 1029 chip->dspq_buff_size = DSPQ_BUFF_SIZE; snd_msnd_isa_probe() 1031 clear_bit(F_DISABLE_WRITE_NDELAY, &chip->flags); snd_msnd_isa_probe() 1033 set_bit(F_DISABLE_WRITE_NDELAY, &chip->flags); snd_msnd_isa_probe() 1036 set_bit(F_HAVEDIGITAL, &chip->flags); snd_msnd_isa_probe() 1038 spin_lock_init(&chip->lock); snd_msnd_isa_probe() 1088 struct snd_msnd *chip; snd_msnd_pnp_detect() local 1129 chip = card->private_data; snd_msnd_pnp_detect() 1130 chip->card = card; snd_msnd_pnp_detect() 1141 set_default_audio_parameters(chip); snd_msnd_pnp_detect() 1143 chip->type = msndClassic; snd_msnd_pnp_detect() 1145 chip->type = msndPinnacle; snd_msnd_pnp_detect() 1147 chip->io = io[idx]; snd_msnd_pnp_detect() 1148 chip->irq = irq[idx]; snd_msnd_pnp_detect() 1149 chip->base = mem[idx]; snd_msnd_pnp_detect() 1151 chip->calibrate_signal = calibrate_signal ? 1 : 0; snd_msnd_pnp_detect() 1152 chip->recsrc = 0; snd_msnd_pnp_detect() 1153 chip->dspq_data_buff = DSPQ_DATA_BUFF; snd_msnd_pnp_detect() 1154 chip->dspq_buff_size = DSPQ_BUFF_SIZE; snd_msnd_pnp_detect() 1156 clear_bit(F_DISABLE_WRITE_NDELAY, &chip->flags); snd_msnd_pnp_detect() 1158 set_bit(F_DISABLE_WRITE_NDELAY, &chip->flags); snd_msnd_pnp_detect() 1161 set_bit(F_HAVEDIGITAL, &chip->flags); snd_msnd_pnp_detect() 1163 spin_lock_init(&chip->lock); snd_msnd_pnp_detect()
H A D	msnd.c	207 static inline long get_play_delay_jiffies(struct snd_msnd *chip, long size) get_play_delay_jiffies() argument 209 long tmp = (size * HZ * chip->play_sample_size) / 8; get_play_delay_jiffies() 210 return tmp / (chip->play_sample_rate * chip->play_channels); get_play_delay_jiffies() 213 static void snd_msnd_dsp_write_flush(struct snd_msnd *chip) snd_msnd_dsp_write_flush() argument 215 if (!(chip->mode & FMODE_WRITE) || !test_bit(F_WRITING, &chip->flags)) snd_msnd_dsp_write_flush() 217 set_bit(F_WRITEFLUSH, &chip->flags); snd_msnd_dsp_write_flush() 219 &chip->writeflush, snd_msnd_dsp_write_flush() 220 get_play_delay_jiffies(&chip, chip->DAPF.len));*/ snd_msnd_dsp_write_flush() 221 clear_bit(F_WRITEFLUSH, &chip->flags); snd_msnd_dsp_write_flush() 224 get_play_delay_jiffies(chip, chip->play_period_bytes)); snd_msnd_dsp_write_flush() 225 clear_bit(F_WRITING, &chip->flags); snd_msnd_dsp_write_flush() 228 void snd_msnd_dsp_halt(struct snd_msnd *chip, struct file *file) snd_msnd_dsp_halt() argument 230 if ((file ? file->f_mode : chip->mode) & FMODE_READ) { snd_msnd_dsp_halt() 231 clear_bit(F_READING, &chip->flags); snd_msnd_dsp_halt() 232 snd_msnd_send_dsp_cmd(chip, HDEX_RECORD_STOP); snd_msnd_dsp_halt() 233 snd_msnd_disable_irq(chip); snd_msnd_dsp_halt() 237 chip->mode &= ~FMODE_READ; snd_msnd_dsp_halt() 239 clear_bit(F_AUDIO_READ_INUSE, &chip->flags); snd_msnd_dsp_halt() 241 if ((file ? file->f_mode : chip->mode) & FMODE_WRITE) { snd_msnd_dsp_halt() 242 if (test_bit(F_WRITING, &chip->flags)) { snd_msnd_dsp_halt() 243 snd_msnd_dsp_write_flush(chip); snd_msnd_dsp_halt() 244 snd_msnd_send_dsp_cmd(chip, HDEX_PLAY_STOP); snd_msnd_dsp_halt() 246 snd_msnd_disable_irq(chip); snd_msnd_dsp_halt() 250 chip->mode &= ~FMODE_WRITE; snd_msnd_dsp_halt() 252 clear_bit(F_AUDIO_WRITE_INUSE, &chip->flags); snd_msnd_dsp_halt() 258 int snd_msnd_DARQ(struct snd_msnd *chip, int bank) snd_msnd_DARQ() argument 265 wTmp = readw(chip->DARQ + JQS_wTail) + PCTODSP_OFFSET(DAQDS__size); snd_msnd_DARQ() 266 if (wTmp > readw(chip->DARQ + JQS_wSize)) snd_msnd_DARQ() 268 while (wTmp == readw(chip->DARQ + JQS_wHead) && timeout--) snd_msnd_DARQ() 271 if (chip->capturePeriods == 2) { snd_msnd_DARQ() 272 void *pDAQ = chip->mappedbase + DARQ_DATA_BUFF + snd_msnd_DARQ() 274 unsigned short offset = 0x3000 + chip->capturePeriodBytes; snd_msnd_DARQ() 281 writew(wTmp, chip->DARQ + JQS_wTail); snd_msnd_DARQ() 285 DAQD = bank * DAQDS__size + chip->mappedbase + DARQ_DATA_BUFF; snd_msnd_DARQ() 292 outb(HPBLKSEL_1, chip->io + HP_BLKS); snd_msnd_DARQ() 293 n = msnd_fifo_write(&chip->DARF, snd_msnd_DARQ() 294 (char *)(chip->base + bank * DAR_BUFF_SIZE), snd_msnd_DARQ() 297 outb(HPBLKSEL_0, chip->io + HP_BLKS); snd_msnd_DARQ() 300 outb(HPBLKSEL_0, chip->io + HP_BLKS); snd_msnd_DARQ() 307 int snd_msnd_DAPQ(struct snd_msnd *chip, int start) snd_msnd_DAPQ() argument 314 spin_lock_irqsave(&chip->lock, flags); not necessary */ snd_msnd_DAPQ() 316 DAPQ_tail = readw(chip->DAPQ + JQS_wTail); snd_msnd_DAPQ() 317 while (DAPQ_tail != readw(chip->DAPQ + JQS_wHead) || start) { snd_msnd_DAPQ() 326 DAQD = bank_num * DAQDS__size + chip->mappedbase + snd_msnd_DAPQ() 330 writew(chip->play_period_bytes, DAQD + DAQDS_wSize); snd_msnd_DAPQ() 333 else if (chip->playPeriods == 2) { snd_msnd_DAPQ() 334 unsigned short offset = chip->play_period_bytes; snd_msnd_DAPQ() 351 writew(DAPQ_tail, chip->DAPQ + JQS_wTail); snd_msnd_DAPQ() 353 snd_msnd_send_dsp_cmd(chip, HDEX_PLAY_START); snd_msnd_DAPQ() 362 /* spin_unlock_irqrestore(&chip->lock, flags); not necessary */ snd_msnd_DAPQ() 367 static void snd_msnd_play_reset_queue(struct snd_msnd *chip, snd_msnd_play_reset_queue() argument 372 void *pDAQ = chip->mappedbase + DAPQ_DATA_BUFF; snd_msnd_play_reset_queue() 374 chip->last_playbank = -1; snd_msnd_play_reset_queue() 375 chip->playLimit = pcm_count * (pcm_periods - 1); snd_msnd_play_reset_queue() 376 chip->playPeriods = pcm_periods; snd_msnd_play_reset_queue() 377 writew(PCTODSP_OFFSET(0 * DAQDS__size), chip->DAPQ + JQS_wHead); snd_msnd_play_reset_queue() 378 writew(PCTODSP_OFFSET(0 * DAQDS__size), chip->DAPQ + JQS_wTail); snd_msnd_play_reset_queue() 380 chip->play_period_bytes = pcm_count; snd_msnd_play_reset_queue() 387 writew(chip->play_sample_size, pDAQ + DAQDS_wSampleSize); snd_msnd_play_reset_queue() 388 writew(chip->play_channels, pDAQ + DAQDS_wChannels); snd_msnd_play_reset_queue() 389 writew(chip->play_sample_rate, pDAQ + DAQDS_wSampleRate); snd_msnd_play_reset_queue() 395 static void snd_msnd_capture_reset_queue(struct snd_msnd *chip, snd_msnd_capture_reset_queue() argument 403 /* snd_msnd_init_queue(chip->DARQ, DARQ_DATA_BUFF, DARQ_BUFF_SIZE); */ snd_msnd_capture_reset_queue() 405 chip->last_recbank = 2; snd_msnd_capture_reset_queue() 406 chip->captureLimit = pcm_count * (pcm_periods - 1); snd_msnd_capture_reset_queue() 407 chip->capturePeriods = pcm_periods; snd_msnd_capture_reset_queue() 408 writew(PCTODSP_OFFSET(0 * DAQDS__size), chip->DARQ + JQS_wHead); snd_msnd_capture_reset_queue() 409 writew(PCTODSP_OFFSET(chip->last_recbank * DAQDS__size), snd_msnd_capture_reset_queue() 410 chip->DARQ + JQS_wTail); snd_msnd_capture_reset_queue() 413 spin_lock_irqsave(&chip->lock, flags); snd_msnd_capture_reset_queue() 414 outb(HPBLKSEL_1, chip->io + HP_BLKS); snd_msnd_capture_reset_queue() 415 memset_io(chip->mappedbase, 0, DAR_BUFF_SIZE * 3); snd_msnd_capture_reset_queue() 416 outb(HPBLKSEL_0, chip->io + HP_BLKS); snd_msnd_capture_reset_queue() 417 spin_unlock_irqrestore(&chip->lock, flags); snd_msnd_capture_reset_queue() 420 chip->capturePeriodBytes = pcm_count; snd_msnd_capture_reset_queue() 423 pDAQ = chip->mappedbase + DARQ_DATA_BUFF; snd_msnd_capture_reset_queue() 431 writew(chip->capture_sample_size, pDAQ + DAQDS_wSampleSize); snd_msnd_capture_reset_queue() 432 writew(chip->capture_channels, pDAQ + DAQDS_wChannels); snd_msnd_capture_reset_queue() 433 writew(chip->capture_sample_rate, pDAQ + DAQDS_wSampleRate); snd_msnd_capture_reset_queue() 481 struct snd_msnd *chip = snd_pcm_substream_chip(substream); snd_msnd_playback_open() local 483 set_bit(F_AUDIO_WRITE_INUSE, &chip->flags); snd_msnd_playback_open() 484 clear_bit(F_WRITING, &chip->flags); snd_msnd_playback_open() 485 snd_msnd_enable_irq(chip); snd_msnd_playback_open() 487 runtime->dma_area = chip->mappedbase; snd_msnd_playback_open() 490 chip->playback_substream = substream; snd_msnd_playback_open() 497 struct snd_msnd *chip = snd_pcm_substream_chip(substream); snd_msnd_playback_close() local 499 snd_msnd_disable_irq(chip); snd_msnd_playback_close() 500 clear_bit(F_AUDIO_WRITE_INUSE, &chip->flags); snd_msnd_playback_close() 509 struct snd_msnd *chip = snd_pcm_substream_chip(substream); snd_msnd_playback_hw_params() local 510 void *pDAQ = chip->mappedbase + DAPQ_DATA_BUFF; snd_msnd_playback_hw_params() 512 chip->play_sample_size = snd_pcm_format_width(params_format(params)); snd_msnd_playback_hw_params() 513 chip->play_channels = params_channels(params); snd_msnd_playback_hw_params() 514 chip->play_sample_rate = params_rate(params); snd_msnd_playback_hw_params() 517 writew(chip->play_sample_size, pDAQ + DAQDS_wSampleSize); snd_msnd_playback_hw_params() 518 writew(chip->play_channels, pDAQ + DAQDS_wChannels); snd_msnd_playback_hw_params() 519 writew(chip->play_sample_rate, pDAQ + DAQDS_wSampleRate); snd_msnd_playback_hw_params() 522 * snd_msnd_calibrate_adc(chip->play_sample_rate); snd_msnd_playback_hw_params() 530 struct snd_msnd *chip = snd_pcm_substream_chip(substream); snd_msnd_playback_prepare() local 535 snd_msnd_play_reset_queue(chip, pcm_periods, pcm_count); snd_msnd_playback_prepare() 536 chip->playDMAPos = 0; snd_msnd_playback_prepare() 543 struct snd_msnd *chip = snd_pcm_substream_chip(substream); snd_msnd_playback_trigger() local 548 chip->banksPlayed = 0; snd_msnd_playback_trigger() 549 set_bit(F_WRITING, &chip->flags); snd_msnd_playback_trigger() 550 snd_msnd_DAPQ(chip, 1); snd_msnd_playback_trigger() 554 clear_bit(F_WRITING, &chip->flags); snd_msnd_playback_trigger() 555 snd_msnd_send_dsp_cmd(chip, HDEX_PLAY_STOP); snd_msnd_playback_trigger() 568 struct snd_msnd *chip = snd_pcm_substream_chip(substream); snd_msnd_playback_pointer() local 570 return bytes_to_frames(substream->runtime, chip->playDMAPos); snd_msnd_playback_pointer() 587 struct snd_msnd *chip = snd_pcm_substream_chip(substream); snd_msnd_capture_open() local 589 set_bit(F_AUDIO_READ_INUSE, &chip->flags); snd_msnd_capture_open() 590 snd_msnd_enable_irq(chip); snd_msnd_capture_open() 591 runtime->dma_area = chip->mappedbase + 0x3000; snd_msnd_capture_open() 594 chip->capture_substream = substream; snd_msnd_capture_open() 601 struct snd_msnd *chip = snd_pcm_substream_chip(substream); snd_msnd_capture_close() local 603 snd_msnd_disable_irq(chip); snd_msnd_capture_close() 604 clear_bit(F_AUDIO_READ_INUSE, &chip->flags); snd_msnd_capture_close() 610 struct snd_msnd *chip = snd_pcm_substream_chip(substream); snd_msnd_capture_prepare() local 615 snd_msnd_capture_reset_queue(chip, pcm_periods, pcm_count); snd_msnd_capture_prepare() 616 chip->captureDMAPos = 0; snd_msnd_capture_prepare() 623 struct snd_msnd *chip = snd_pcm_substream_chip(substream); snd_msnd_capture_trigger() local 626 chip->last_recbank = -1; snd_msnd_capture_trigger() 627 set_bit(F_READING, &chip->flags); snd_msnd_capture_trigger() 628 if (snd_msnd_send_dsp_cmd(chip, HDEX_RECORD_START) == 0) snd_msnd_capture_trigger() 631 clear_bit(F_READING, &chip->flags); snd_msnd_capture_trigger() 633 clear_bit(F_READING, &chip->flags); snd_msnd_capture_trigger() 634 snd_msnd_send_dsp_cmd(chip, HDEX_RECORD_STOP); snd_msnd_capture_trigger() 645 struct snd_msnd *chip = snd_pcm_substream_chip(substream); snd_msnd_capture_pointer() local 647 return bytes_to_frames(runtime, chip->captureDMAPos); snd_msnd_capture_pointer() 655 struct snd_msnd *chip = snd_pcm_substream_chip(substream); snd_msnd_capture_hw_params() local 656 void *pDAQ = chip->mappedbase + DARQ_DATA_BUFF; snd_msnd_capture_hw_params() 658 chip->capture_sample_size = snd_pcm_format_width(params_format(params)); snd_msnd_capture_hw_params() 659 chip->capture_channels = params_channels(params); snd_msnd_capture_hw_params() 660 chip->capture_sample_rate = params_rate(params); snd_msnd_capture_hw_params() 663 writew(chip->capture_sample_size, pDAQ + DAQDS_wSampleSize); snd_msnd_capture_hw_params() 664 writew(chip->capture_channels, pDAQ + DAQDS_wChannels); snd_msnd_capture_hw_params() 665 writew(chip->capture_sample_rate, pDAQ + DAQDS_wSampleRate); snd_msnd_capture_hw_params() 684 struct snd_msnd *chip = card->private_data; snd_msnd_pcm() local 695 pcm->private_data = chip; snd_msnd_pcm()
/linux-4.1.27/drivers/iio/light/
H A D	tsl2563.c	140 static int tsl2563_set_power(struct tsl2563_chip *chip, int on) tsl2563_set_power() argument 142 struct i2c_client *client = chip->client; tsl2563_set_power() 154 static int tsl2563_get_power(struct tsl2563_chip *chip) tsl2563_get_power() argument 156 struct i2c_client *client = chip->client; tsl2563_get_power() 166 static int tsl2563_configure(struct tsl2563_chip *chip) tsl2563_configure() argument 170 ret = i2c_smbus_write_byte_data(chip->client, tsl2563_configure() 172 chip->gainlevel->gaintime); tsl2563_configure() 175 ret = i2c_smbus_write_byte_data(chip->client, tsl2563_configure() 177 chip->high_thres & 0xFF); tsl2563_configure() 180 ret = i2c_smbus_write_byte_data(chip->client, tsl2563_configure() 182 (chip->high_thres >> 8) & 0xFF); tsl2563_configure() 185 ret = i2c_smbus_write_byte_data(chip->client, tsl2563_configure() 187 chip->low_thres & 0xFF); tsl2563_configure() 190 ret = i2c_smbus_write_byte_data(chip->client, tsl2563_configure() 192 (chip->low_thres >> 8) & 0xFF); tsl2563_configure() 203 struct tsl2563_chip *chip = tsl2563_poweroff_work() local 205 tsl2563_set_power(chip, 0); tsl2563_poweroff_work() 208 static int tsl2563_detect(struct tsl2563_chip *chip) tsl2563_detect() argument 212 ret = tsl2563_set_power(chip, 1); tsl2563_detect() 216 ret = tsl2563_get_power(chip); tsl2563_detect() 223 static int tsl2563_read_id(struct tsl2563_chip *chip, u8 *id) tsl2563_read_id() argument 225 struct i2c_client *client = chip->client; tsl2563_read_id() 271 static void tsl2563_wait_adc(struct tsl2563_chip *chip) tsl2563_wait_adc() argument 275 switch (chip->gainlevel->gaintime & TSL2563_TIMING_MASK) { tsl2563_wait_adc() 292 static int tsl2563_adjust_gainlevel(struct tsl2563_chip *chip, u16 adc) tsl2563_adjust_gainlevel() argument 294 struct i2c_client *client = chip->client; tsl2563_adjust_gainlevel() 296 if (adc > chip->gainlevel->max || adc < chip->gainlevel->min) { tsl2563_adjust_gainlevel() 298 (adc > chip->gainlevel->max) ? tsl2563_adjust_gainlevel() 299 chip->gainlevel++ : chip->gainlevel--; tsl2563_adjust_gainlevel() 303 chip->gainlevel->gaintime); tsl2563_adjust_gainlevel() 305 tsl2563_wait_adc(chip); tsl2563_adjust_gainlevel() 306 tsl2563_wait_adc(chip); tsl2563_adjust_gainlevel() 313 static int tsl2563_get_adc(struct tsl2563_chip *chip) tsl2563_get_adc() argument 315 struct i2c_client *client = chip->client; tsl2563_get_adc() 320 if (chip->suspended) tsl2563_get_adc() 323 if (!chip->int_enabled) { tsl2563_get_adc() 324 cancel_delayed_work(&chip->poweroff_work); tsl2563_get_adc() 326 if (!tsl2563_get_power(chip)) { tsl2563_get_adc() 327 ret = tsl2563_set_power(chip, 1); tsl2563_get_adc() 330 ret = tsl2563_configure(chip); tsl2563_get_adc() 333 tsl2563_wait_adc(chip); tsl2563_get_adc() 350 retry = tsl2563_adjust_gainlevel(chip, adc0); tsl2563_get_adc() 353 chip->data0 = normalize_adc(adc0, chip->gainlevel->gaintime); tsl2563_get_adc() 354 chip->data1 = normalize_adc(adc1, chip->gainlevel->gaintime); tsl2563_get_adc() 356 if (!chip->int_enabled) tsl2563_get_adc() 357 schedule_delayed_work(&chip->poweroff_work, 5 * HZ); tsl2563_get_adc() 461 struct tsl2563_chip *chip = iio_priv(indio_dev); tsl2563_write_raw() local 466 chip->calib0 = calib_from_sysfs(val); tsl2563_write_raw() 468 chip->calib1 = calib_from_sysfs(val); tsl2563_write_raw() 483 struct tsl2563_chip *chip = iio_priv(indio_dev); tsl2563_read_raw() local 485 mutex_lock(&chip->lock); tsl2563_read_raw() 491 ret = tsl2563_get_adc(chip); tsl2563_read_raw() 494 calib0 = calib_adc(chip->data0, chip->calib0) * tsl2563_read_raw() 495 chip->cover_comp_gain; tsl2563_read_raw() 496 calib1 = calib_adc(chip->data1, chip->calib1) * tsl2563_read_raw() 497 chip->cover_comp_gain; tsl2563_read_raw() 502 ret = tsl2563_get_adc(chip); tsl2563_read_raw() 506 *val = chip->data0; tsl2563_read_raw() 508 *val = chip->data1; tsl2563_read_raw() 518 *val = calib_to_sysfs(chip->calib0); tsl2563_read_raw() 520 *val = calib_to_sysfs(chip->calib1); tsl2563_read_raw() 529 mutex_unlock(&chip->lock); tsl2563_read_raw() 575 struct tsl2563_chip *chip = iio_priv(indio_dev); tsl2563_read_thresh() local 579 *val = chip->high_thres; tsl2563_read_thresh() 582 *val = chip->low_thres; tsl2563_read_thresh() 596 struct tsl2563_chip *chip = iio_priv(indio_dev); tsl2563_write_thresh() local 604 mutex_lock(&chip->lock); tsl2563_write_thresh() 605 ret = i2c_smbus_write_byte_data(chip->client, TSL2563_CMD | address, tsl2563_write_thresh() 609 ret = i2c_smbus_write_byte_data(chip->client, tsl2563_write_thresh() 613 chip->high_thres = val; tsl2563_write_thresh() 615 chip->low_thres = val; tsl2563_write_thresh() 618 mutex_unlock(&chip->lock); tsl2563_write_thresh() 626 struct tsl2563_chip *chip = iio_priv(dev_info); tsl2563_event_handler() local 636 i2c_smbus_write_byte(chip->client, TSL2563_CMD | TSL2563_CLEARINT); tsl2563_event_handler() 644 struct tsl2563_chip *chip = iio_priv(indio_dev); tsl2563_write_interrupt_config() local 647 mutex_lock(&chip->lock); tsl2563_write_interrupt_config() 648 if (state && !(chip->intr & 0x30)) { tsl2563_write_interrupt_config() 649 chip->intr &= ~0x30; tsl2563_write_interrupt_config() 650 chip->intr |= 0x10; tsl2563_write_interrupt_config() 651 /* ensure the chip is actually on */ tsl2563_write_interrupt_config() 652 cancel_delayed_work(&chip->poweroff_work); tsl2563_write_interrupt_config() 653 if (!tsl2563_get_power(chip)) { tsl2563_write_interrupt_config() 654 ret = tsl2563_set_power(chip, 1); tsl2563_write_interrupt_config() 657 ret = tsl2563_configure(chip); tsl2563_write_interrupt_config() 661 ret = i2c_smbus_write_byte_data(chip->client, tsl2563_write_interrupt_config() 663 chip->intr); tsl2563_write_interrupt_config() 664 chip->int_enabled = true; tsl2563_write_interrupt_config() 667 if (!state && (chip->intr & 0x30)) { tsl2563_write_interrupt_config() 668 chip->intr &= ~0x30; tsl2563_write_interrupt_config() 669 ret = i2c_smbus_write_byte_data(chip->client, tsl2563_write_interrupt_config() 671 chip->intr); tsl2563_write_interrupt_config() 672 chip->int_enabled = false; tsl2563_write_interrupt_config() 674 schedule_delayed_work(&chip->poweroff_work, 5 * HZ); tsl2563_write_interrupt_config() 677 mutex_unlock(&chip->lock); tsl2563_write_interrupt_config() 686 struct tsl2563_chip *chip = iio_priv(indio_dev); tsl2563_read_interrupt_config() local 689 mutex_lock(&chip->lock); tsl2563_read_interrupt_config() 690 ret = i2c_smbus_read_byte_data(chip->client, tsl2563_read_interrupt_config() 692 mutex_unlock(&chip->lock); tsl2563_read_interrupt_config() 719 struct tsl2563_chip *chip; tsl2563_probe() local 725 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*chip)); tsl2563_probe() 729 chip = iio_priv(indio_dev); tsl2563_probe() 731 i2c_set_clientdata(client, chip); tsl2563_probe() 732 chip->client = client; tsl2563_probe() 734 err = tsl2563_detect(chip); tsl2563_probe() 740 err = tsl2563_read_id(chip, &id); tsl2563_probe() 746 mutex_init(&chip->lock); tsl2563_probe() 749 chip->low_thres = 0x0; tsl2563_probe() 750 chip->high_thres = 0xffff; tsl2563_probe() 751 chip->gainlevel = tsl2563_gainlevel_table; tsl2563_probe() 752 chip->intr = TSL2563_INT_PERSIST(4); tsl2563_probe() 753 chip->calib0 = calib_from_sysfs(CALIB_BASE_SYSFS); tsl2563_probe() 754 chip->calib1 = calib_from_sysfs(CALIB_BASE_SYSFS); tsl2563_probe() 757 chip->cover_comp_gain = pdata->cover_comp_gain; tsl2563_probe() 760 &chip->cover_comp_gain); tsl2563_probe() 762 chip->cover_comp_gain = 1; tsl2563_probe() 789 err = tsl2563_configure(chip); tsl2563_probe() 795 INIT_DELAYED_WORK(&chip->poweroff_work, tsl2563_poweroff_work); tsl2563_probe() 798 schedule_delayed_work(&chip->poweroff_work, 5 * HZ); tsl2563_probe() 809 cancel_delayed_work(&chip->poweroff_work); tsl2563_probe() 816 struct tsl2563_chip *chip = i2c_get_clientdata(client); tsl2563_remove() local 817 struct iio_dev *indio_dev = iio_priv_to_dev(chip); tsl2563_remove() 820 if (!chip->int_enabled) tsl2563_remove() 821 cancel_delayed_work(&chip->poweroff_work); tsl2563_remove() 823 chip->intr &= ~0x30; tsl2563_remove() 824 i2c_smbus_write_byte_data(chip->client, TSL2563_CMD | TSL2563_REG_INT, tsl2563_remove() 825 chip->intr); tsl2563_remove() 827 tsl2563_set_power(chip, 0); tsl2563_remove() 835 struct tsl2563_chip *chip = i2c_get_clientdata(to_i2c_client(dev)); tsl2563_suspend() local 838 mutex_lock(&chip->lock); tsl2563_suspend() 840 ret = tsl2563_set_power(chip, 0); tsl2563_suspend() 844 chip->suspended = true; tsl2563_suspend() 847 mutex_unlock(&chip->lock); tsl2563_suspend() 853 struct tsl2563_chip *chip = i2c_get_clientdata(to_i2c_client(dev)); tsl2563_resume() local 856 mutex_lock(&chip->lock); tsl2563_resume() 858 ret = tsl2563_set_power(chip, 1); tsl2563_resume() 862 ret = tsl2563_configure(chip); tsl2563_resume() 866 chip->suspended = false; tsl2563_resume() 869 mutex_unlock(&chip->lock); tsl2563_resume()
H A D	cm3232.c	81 * @chip: pointer of struct cm3232_chip. 87 static int cm3232_reg_init(struct cm3232_chip *chip) cm3232_reg_init() argument 89 struct i2c_client *client = chip->client; cm3232_reg_init() 92 chip->als_info = &cm3232_als_info_default; cm3232_reg_init() 97 dev_err(&chip->client->dev, "Error reading addr_id\n"); cm3232_reg_init() 101 if ((ret & 0xFF) != chip->als_info->hw_id) cm3232_reg_init() 105 chip->regs_cmd = CM3232_CMD_ALS_DISABLE | CM3232_CMD_ALS_RESET; cm3232_reg_init() 107 chip->regs_cmd); cm3232_reg_init() 109 dev_err(&chip->client->dev, "Error writing reg_cmd\n"); cm3232_reg_init() 114 chip->regs_cmd = chip->als_info->regs_cmd_default; cm3232_reg_init() 118 chip->regs_cmd); cm3232_reg_init() 120 dev_err(&chip->client->dev, "Error writing reg_cmd\n"); cm3232_reg_init() 127 * @chip: pointer of struct cm3232_chip 135 static int cm3232_read_als_it(struct cm3232_chip *chip, int *val, int *val2) cm3232_read_als_it() argument 140 als_it = chip->regs_cmd; cm3232_read_als_it() 156 * @chip: pointer of struct cm3232_chip. 164 static int cm3232_write_als_it(struct cm3232_chip *chip, int val, int val2) cm3232_write_als_it() argument 166 struct i2c_client *client = chip->client; cm3232_write_als_it() 178 cmd = chip->regs_cmd & ~CM3232_CMD_ALS_IT_MASK; cm3232_write_als_it() 185 chip->regs_cmd = cmd; cm3232_write_als_it() 194 * @chip: pointer of struct cm3232_chip. 201 static int cm3232_get_lux(struct cm3232_chip *chip) cm3232_get_lux() argument 203 struct i2c_client *client = chip->client; cm3232_get_lux() 204 struct cm3232_als_info *als_info = chip->als_info; cm3232_get_lux() 211 ret = cm3232_read_als_it(chip, &val, &val2); cm3232_get_lux() 225 chip->regs_als = (u16)ret; cm3232_get_lux() 226 lux *= chip->regs_als; cm3232_get_lux() 241 struct cm3232_chip *chip = iio_priv(indio_dev); cm3232_read_raw() local 242 struct cm3232_als_info *als_info = chip->als_info; cm3232_read_raw() 247 ret = cm3232_get_lux(chip); cm3232_read_raw() 256 return cm3232_read_als_it(chip, val, val2); cm3232_read_raw() 266 struct cm3232_chip *chip = iio_priv(indio_dev); cm3232_write_raw() local 267 struct cm3232_als_info *als_info = chip->als_info; cm3232_write_raw() 274 return cm3232_write_als_it(chip, val, val2); cm3232_write_raw() 334 struct cm3232_chip *chip; cm3232_probe() local 338 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*chip)); cm3232_probe() 342 chip = iio_priv(indio_dev); cm3232_probe() 344 chip->client = client; cm3232_probe() 353 ret = cm3232_reg_init(chip); cm3232_probe() 385 struct cm3232_chip *chip = iio_priv(indio_dev); cm3232_suspend() local 386 struct i2c_client *client = chip->client; cm3232_suspend() 389 chip->regs_cmd |= CM3232_CMD_ALS_DISABLE; cm3232_suspend() 391 chip->regs_cmd); cm3232_suspend() 399 struct cm3232_chip *chip = iio_priv(indio_dev); cm3232_resume() local 400 struct i2c_client *client = chip->client; cm3232_resume() 403 chip->regs_cmd &= ~CM3232_CMD_ALS_DISABLE; cm3232_resume() 405 chip->regs_cmd | CM3232_CMD_ALS_RESET); cm3232_resume()
/linux-4.1.27/sound/pci/pcxhr/
H A D	pcxhr_mixer.c	52 static int pcxhr_update_analog_audio_level(struct snd_pcxhr *chip, pcxhr_update_analog_audio_level() argument 61 rmh.cmd[2] = chip->analog_capture_volume[channel]; pcxhr_update_analog_audio_level() 64 if (chip->analog_playback_active[channel]) pcxhr_update_analog_audio_level() 65 vol = chip->analog_playback_volume[channel]; pcxhr_update_analog_audio_level() 71 rmh.cmd[1] = 1 << ((2 * chip->chip_idx) + channel); /* audio mask */ pcxhr_update_analog_audio_level() 73 err = pcxhr_send_msg(chip->mgr, &rmh); pcxhr_update_analog_audio_level() 75 dev_dbg(chip->card->dev, pcxhr_update_analog_audio_level() 78 chip->chip_idx, is_capture, err); pcxhr_update_analog_audio_level() 90 struct snd_pcxhr *chip = snd_kcontrol_chip(kcontrol); pcxhr_analog_vol_info() local 95 if (chip->mgr->is_hr_stereo) { pcxhr_analog_vol_info() 107 if (chip->mgr->is_hr_stereo) { pcxhr_analog_vol_info() 125 struct snd_pcxhr *chip = snd_kcontrol_chip(kcontrol); pcxhr_analog_vol_get() local 126 mutex_lock(&chip->mgr->mixer_mutex); pcxhr_analog_vol_get() 128 ucontrol->value.integer.value[0] = chip->analog_playback_volume[0]; pcxhr_analog_vol_get() 129 ucontrol->value.integer.value[1] = chip->analog_playback_volume[1]; pcxhr_analog_vol_get() 131 ucontrol->value.integer.value[0] = chip->analog_capture_volume[0]; pcxhr_analog_vol_get() 132 ucontrol->value.integer.value[1] = chip->analog_capture_volume[1]; pcxhr_analog_vol_get() 134 mutex_unlock(&chip->mgr->mixer_mutex); pcxhr_analog_vol_get() 141 struct snd_pcxhr *chip = snd_kcontrol_chip(kcontrol); pcxhr_analog_vol_put() local 145 mutex_lock(&chip->mgr->mixer_mutex); pcxhr_analog_vol_put() 150 &chip->analog_capture_volume[i] : pcxhr_analog_vol_put() 151 &chip->analog_playback_volume[i]; pcxhr_analog_vol_put() 153 if (chip->mgr->is_hr_stereo) { pcxhr_analog_vol_put() 163 if (chip->mgr->is_hr_stereo) { pcxhr_analog_vol_put() 176 if (chip->mgr->is_hr_stereo) pcxhr_analog_vol_put() 177 hr222_update_analog_audio_level(chip, pcxhr_analog_vol_put() 180 pcxhr_update_analog_audio_level(chip, pcxhr_analog_vol_put() 184 mutex_unlock(&chip->mgr->mixer_mutex); pcxhr_analog_vol_put() 206 struct snd_pcxhr *chip = snd_kcontrol_chip(kcontrol); pcxhr_audio_sw_get() local 208 mutex_lock(&chip->mgr->mixer_mutex); pcxhr_audio_sw_get() 209 ucontrol->value.integer.value[0] = chip->analog_playback_active[0]; pcxhr_audio_sw_get() 210 ucontrol->value.integer.value[1] = chip->analog_playback_active[1]; pcxhr_audio_sw_get() 211 mutex_unlock(&chip->mgr->mixer_mutex); pcxhr_audio_sw_get() 218 struct snd_pcxhr *chip = snd_kcontrol_chip(kcontrol); pcxhr_audio_sw_put() local 220 mutex_lock(&chip->mgr->mixer_mutex); pcxhr_audio_sw_put() 222 if (chip->analog_playback_active[i] != pcxhr_audio_sw_put() 224 chip->analog_playback_active[i] = pcxhr_audio_sw_put() 228 if (chip->mgr->is_hr_stereo) pcxhr_audio_sw_put() 229 hr222_update_analog_audio_level(chip, 0, i); pcxhr_audio_sw_put() 231 pcxhr_update_analog_audio_level(chip, 0, i); pcxhr_audio_sw_put() 234 mutex_unlock(&chip->mgr->mixer_mutex); pcxhr_audio_sw_put() 259 static int pcxhr_update_playback_stream_level(struct snd_pcxhr* chip, int idx) pcxhr_update_playback_stream_level() argument 263 struct pcxhr_pipe *pipe = &chip->playback_pipe; pcxhr_update_playback_stream_level() 266 if (chip->digital_playback_active[idx][0]) pcxhr_update_playback_stream_level() 267 left = chip->digital_playback_volume[idx][0]; pcxhr_update_playback_stream_level() 270 if (chip->digital_playback_active[idx][1]) pcxhr_update_playback_stream_level() 271 right = chip->digital_playback_volume[idx][1]; pcxhr_update_playback_stream_level() 286 err = pcxhr_send_msg(chip->mgr, &rmh); pcxhr_update_playback_stream_level() 288 dev_dbg(chip->card->dev, "error update_playback_stream_level " pcxhr_update_playback_stream_level() 289 "card(%d) err(%x)\n", chip->chip_idx, err); pcxhr_update_playback_stream_level() 302 static int pcxhr_update_audio_pipe_level(struct snd_pcxhr *chip, pcxhr_update_audio_pipe_level() argument 310 pipe = &chip->capture_pipe[0]; pcxhr_update_audio_pipe_level() 312 pipe = &chip->playback_pipe; pcxhr_update_audio_pipe_level() 324 rmh.cmd[2] = chip->digital_capture_volume[channel]; pcxhr_update_audio_pipe_level() 331 rmh.cmd[2] = chip->monitoring_volume[channel] << 10; pcxhr_update_audio_pipe_level() 332 if (chip->monitoring_active[channel] == 0) pcxhr_update_audio_pipe_level() 337 err = pcxhr_send_msg(chip->mgr, &rmh); pcxhr_update_audio_pipe_level() 339 dev_dbg(chip->card->dev, pcxhr_update_audio_pipe_level() 341 chip->chip_idx, err); pcxhr_update_audio_pipe_level() 363 struct snd_pcxhr *chip = snd_kcontrol_chip(kcontrol); pcxhr_pcm_vol_get() local 368 mutex_lock(&chip->mgr->mixer_mutex); pcxhr_pcm_vol_get() 370 stored_volume = chip->digital_capture_volume; pcxhr_pcm_vol_get() 372 stored_volume = chip->digital_playback_volume[idx]; pcxhr_pcm_vol_get() 375 mutex_unlock(&chip->mgr->mixer_mutex); pcxhr_pcm_vol_get() 382 struct snd_pcxhr *chip = snd_kcontrol_chip(kcontrol); pcxhr_pcm_vol_put() local 389 mutex_lock(&chip->mgr->mixer_mutex); pcxhr_pcm_vol_put() 391 stored_volume = chip->digital_capture_volume; pcxhr_pcm_vol_put() 393 stored_volume = chip->digital_playback_volume[idx]; pcxhr_pcm_vol_put() 403 pcxhr_update_audio_pipe_level(chip, 1, i); pcxhr_pcm_vol_put() 407 pcxhr_update_playback_stream_level(chip, idx); pcxhr_pcm_vol_put() 408 mutex_unlock(&chip->mgr->mixer_mutex); pcxhr_pcm_vol_put() 429 struct snd_pcxhr *chip = snd_kcontrol_chip(kcontrol); pcxhr_pcm_sw_get() local 432 mutex_lock(&chip->mgr->mixer_mutex); pcxhr_pcm_sw_get() 433 ucontrol->value.integer.value[0] = chip->digital_playback_active[idx][0]; pcxhr_pcm_sw_get() 434 ucontrol->value.integer.value[1] = chip->digital_playback_active[idx][1]; pcxhr_pcm_sw_get() 435 mutex_unlock(&chip->mgr->mixer_mutex); pcxhr_pcm_sw_get() 442 struct snd_pcxhr *chip = snd_kcontrol_chip(kcontrol); pcxhr_pcm_sw_put() local 447 mutex_lock(&chip->mgr->mixer_mutex); pcxhr_pcm_sw_put() 450 if (chip->digital_playback_active[j][i] != pcxhr_pcm_sw_put() 452 chip->digital_playback_active[j][i] = pcxhr_pcm_sw_put() 458 pcxhr_update_playback_stream_level(chip, idx); pcxhr_pcm_sw_put() 459 mutex_unlock(&chip->mgr->mixer_mutex); pcxhr_pcm_sw_put() 480 struct snd_pcxhr *chip = snd_kcontrol_chip(kcontrol); pcxhr_monitor_vol_get() local 481 mutex_lock(&chip->mgr->mixer_mutex); pcxhr_monitor_vol_get() 482 ucontrol->value.integer.value[0] = chip->monitoring_volume[0]; pcxhr_monitor_vol_get() 483 ucontrol->value.integer.value[1] = chip->monitoring_volume[1]; pcxhr_monitor_vol_get() 484 mutex_unlock(&chip->mgr->mixer_mutex); pcxhr_monitor_vol_get() 491 struct snd_pcxhr *chip = snd_kcontrol_chip(kcontrol); pcxhr_monitor_vol_put() local 495 mutex_lock(&chip->mgr->mixer_mutex); pcxhr_monitor_vol_put() 497 if (chip->monitoring_volume[i] != pcxhr_monitor_vol_put() 499 chip->monitoring_volume[i] = pcxhr_monitor_vol_put() 501 if (chip->monitoring_active[i]) pcxhr_monitor_vol_put() 504 pcxhr_update_audio_pipe_level(chip, 0, i); pcxhr_monitor_vol_put() 508 mutex_unlock(&chip->mgr->mixer_mutex); pcxhr_monitor_vol_put() 530 struct snd_pcxhr *chip = snd_kcontrol_chip(kcontrol); pcxhr_monitor_sw_get() local 531 mutex_lock(&chip->mgr->mixer_mutex); pcxhr_monitor_sw_get() 532 ucontrol->value.integer.value[0] = chip->monitoring_active[0]; pcxhr_monitor_sw_get() 533 ucontrol->value.integer.value[1] = chip->monitoring_active[1]; pcxhr_monitor_sw_get() 534 mutex_unlock(&chip->mgr->mixer_mutex); pcxhr_monitor_sw_get() 541 struct snd_pcxhr *chip = snd_kcontrol_chip(kcontrol); pcxhr_monitor_sw_put() local 545 mutex_lock(&chip->mgr->mixer_mutex); pcxhr_monitor_sw_put() 547 if (chip->monitoring_active[i] != pcxhr_monitor_sw_put() 549 chip->monitoring_active[i] = pcxhr_monitor_sw_put() 556 pcxhr_update_audio_pipe_level(chip, 0, 0); pcxhr_monitor_sw_put() 559 pcxhr_update_audio_pipe_level(chip, 0, 1); pcxhr_monitor_sw_put() 561 mutex_unlock(&chip->mgr->mixer_mutex); pcxhr_monitor_sw_put() 584 static int pcxhr_set_audio_source(struct snd_pcxhr* chip) pcxhr_set_audio_source() argument 591 switch (chip->chip_idx) { pcxhr_set_audio_source() 598 if (chip->audio_capture_source != 0) { pcxhr_set_audio_source() 604 pcxhr_write_io_num_reg_cont(chip->mgr, mask, reg, &changed); pcxhr_set_audio_source() 608 rmh.cmd[0] |= (1 << chip->chip_idx); pcxhr_set_audio_source() 609 err = pcxhr_send_msg(chip->mgr, &rmh); pcxhr_set_audio_source() 613 if (chip->mgr->board_aes_in_192k) { pcxhr_set_audio_source() 617 for (i = 0; (i < 4) && (i < chip->mgr->capture_chips); i++) { pcxhr_set_audio_source() 618 if (chip->mgr->chip[i]->audio_capture_source == 2) pcxhr_set_audio_source() 626 err = pcxhr_send_msg(chip->mgr, &rmh); pcxhr_set_audio_source() 629 if (chip->audio_capture_source == 2) pcxhr_set_audio_source() 638 err = pcxhr_send_msg(chip->mgr, &rmh); pcxhr_set_audio_source() 643 err = pcxhr_send_msg(chip->mgr, &rmh); pcxhr_set_audio_source() 655 struct snd_pcxhr *chip = snd_kcontrol_chip(kcontrol); pcxhr_audio_src_info() local 658 if (chip->mgr->board_has_aes1) { pcxhr_audio_src_info() 660 if (chip->mgr->board_has_mic) pcxhr_audio_src_info() 669 struct snd_pcxhr *chip = snd_kcontrol_chip(kcontrol); pcxhr_audio_src_get() local 670 ucontrol->value.enumerated.item[0] = chip->audio_capture_source; pcxhr_audio_src_get() 677 struct snd_pcxhr *chip = snd_kcontrol_chip(kcontrol); pcxhr_audio_src_put() local 680 if (chip->mgr->board_has_aes1) { pcxhr_audio_src_put() 682 if (chip->mgr->board_has_mic) pcxhr_audio_src_put() 687 mutex_lock(&chip->mgr->mixer_mutex); pcxhr_audio_src_put() 688 if (chip->audio_capture_source != ucontrol->value.enumerated.item[0]) { pcxhr_audio_src_put() 689 chip->audio_capture_source = ucontrol->value.enumerated.item[0]; pcxhr_audio_src_put() 690 if (chip->mgr->is_hr_stereo) pcxhr_audio_src_put() 691 hr222_set_audio_source(chip); pcxhr_audio_src_put() 693 pcxhr_set_audio_source(chip); pcxhr_audio_src_put() 696 mutex_unlock(&chip->mgr->mixer_mutex); pcxhr_audio_src_put() 864 static int pcxhr_iec958_capture_byte(struct snd_pcxhr *chip, pcxhr_iec958_capture_byte() argument 873 switch (chip->chip_idx) { pcxhr_iec958_capture_byte() 881 if (chip->mgr->board_aes_in_192k) { pcxhr_iec958_capture_byte() 901 /* size and code the chip id for the fpga */ pcxhr_iec958_capture_byte() 903 /* chip signature + map for spi read */ pcxhr_iec958_capture_byte() 906 err = pcxhr_send_msg(chip->mgr, &rmh); pcxhr_iec958_capture_byte() 910 if (chip->mgr->board_aes_in_192k) { pcxhr_iec958_capture_byte() 921 dev_dbg(chip->card->dev, "read iec958 AES %d byte %d = 0x%x\n", pcxhr_iec958_capture_byte() 922 chip->chip_idx, aes_idx, temp); pcxhr_iec958_capture_byte() 930 struct snd_pcxhr *chip = snd_kcontrol_chip(kcontrol); pcxhr_iec958_get() local 934 mutex_lock(&chip->mgr->mixer_mutex); pcxhr_iec958_get() 937 aes_bits = chip->aes_bits[i]; pcxhr_iec958_get() 939 if (chip->mgr->is_hr_stereo) pcxhr_iec958_get() 940 err = hr222_iec958_capture_byte(chip, i, pcxhr_iec958_get() 943 err = pcxhr_iec958_capture_byte(chip, i, pcxhr_iec958_get() 950 mutex_unlock(&chip->mgr->mixer_mutex); pcxhr_iec958_get() 963 static int pcxhr_iec958_update_byte(struct snd_pcxhr *chip, pcxhr_iec958_update_byte() argument 968 unsigned char old_bits = chip->aes_bits[aes_idx]; pcxhr_iec958_update_byte() 973 cmd = chip->chip_idx & 0x03; /* chip index 0..3 */ pcxhr_iec958_update_byte() 974 if (chip->chip_idx > 3) pcxhr_iec958_update_byte() 983 dev_dbg(chip->card->dev, pcxhr_iec958_update_byte() 985 chip->chip_idx, aes_idx, i, cmd); pcxhr_iec958_update_byte() 986 err = pcxhr_send_msg(chip->mgr, &rmh); pcxhr_iec958_update_byte() 993 chip->aes_bits[aes_idx] = aes_bits; pcxhr_iec958_update_byte() 1000 struct snd_pcxhr *chip = snd_kcontrol_chip(kcontrol); pcxhr_iec958_put() local 1004 mutex_lock(&chip->mgr->mixer_mutex); pcxhr_iec958_put() 1006 if (ucontrol->value.iec958.status[i] != chip->aes_bits[i]) { pcxhr_iec958_put() 1007 if (chip->mgr->is_hr_stereo) pcxhr_iec958_put() 1008 hr222_iec958_update_byte(chip, i, pcxhr_iec958_put() 1011 pcxhr_iec958_update_byte(chip, i, pcxhr_iec958_put() 1016 mutex_unlock(&chip->mgr->mixer_mutex); pcxhr_iec958_put() 1052 static void pcxhr_init_audio_levels(struct snd_pcxhr *chip) pcxhr_init_audio_levels() argument 1057 if (chip->nb_streams_play) { pcxhr_init_audio_levels() 1061 chip->digital_playback_active[j][i] = 1; pcxhr_init_audio_levels() 1062 chip->digital_playback_volume[j][i] = pcxhr_init_audio_levels() 1068 chip->aes_bits[0] = (IEC958_AES0_PROFESSIONAL | pcxhr_init_audio_levels() 1074 chip->analog_playback_active[i] = 1; pcxhr_init_audio_levels() 1075 if (chip->mgr->is_hr_stereo) pcxhr_init_audio_levels() 1076 chip->analog_playback_volume[i] = pcxhr_init_audio_levels() 1079 chip->analog_playback_volume[i] = pcxhr_init_audio_levels() 1081 pcxhr_update_analog_audio_level(chip, 0, i); pcxhr_init_audio_levels() 1085 if (chip->mgr->is_hr_stereo) pcxhr_init_audio_levels() 1086 hr222_update_analog_audio_level(chip, 0, i); pcxhr_init_audio_levels() 1088 if (chip->nb_streams_capt) { pcxhr_init_audio_levels() 1090 chip->digital_capture_volume[i] = pcxhr_init_audio_levels() 1092 chip->analog_capture_active = 1; pcxhr_init_audio_levels() 1097 if (chip->mgr->is_hr_stereo) pcxhr_init_audio_levels() 1098 chip->analog_capture_volume[i] = pcxhr_init_audio_levels() 1101 chip->analog_capture_volume[i] = pcxhr_init_audio_levels() 1103 pcxhr_update_analog_audio_level(chip, 1, i); pcxhr_init_audio_levels() 1107 if (chip->mgr->is_hr_stereo) pcxhr_init_audio_levels() 1108 hr222_update_analog_audio_level(chip, 1, i); pcxhr_init_audio_levels() 1118 struct snd_pcxhr *chip; pcxhr_create_mixer() local 1125 chip = mgr->chip[i]; pcxhr_create_mixer() 1127 if (chip->nb_streams_play) { pcxhr_create_mixer() 1136 err = snd_ctl_add(chip->card, pcxhr_create_mixer() 1137 snd_ctl_new1(&temp, chip)); pcxhr_create_mixer() 1142 err = snd_ctl_add(chip->card, pcxhr_create_mixer() 1144 chip)); pcxhr_create_mixer() 1152 err = snd_ctl_add(chip->card, pcxhr_create_mixer() 1153 snd_ctl_new1(&temp, chip)); pcxhr_create_mixer() 1157 err = snd_ctl_add(chip->card, pcxhr_create_mixer() 1158 snd_ctl_new1(&pcxhr_control_pcm_switch, chip)); pcxhr_create_mixer() 1163 err = snd_ctl_add(chip->card, pcxhr_create_mixer() 1165 chip)); pcxhr_create_mixer() 1169 err = snd_ctl_add(chip->card, pcxhr_create_mixer() 1171 chip)); pcxhr_create_mixer() 1175 if (chip->nb_streams_capt) { pcxhr_create_mixer() 1185 err = snd_ctl_add(chip->card, pcxhr_create_mixer() 1186 snd_ctl_new1(&temp, chip)); pcxhr_create_mixer() 1195 err = snd_ctl_add(chip->card, pcxhr_create_mixer() 1196 snd_ctl_new1(&temp, chip)); pcxhr_create_mixer() 1201 err = snd_ctl_add(chip->card, pcxhr_create_mixer() 1202 snd_ctl_new1(&pcxhr_control_audio_src, chip)); pcxhr_create_mixer() 1207 err = snd_ctl_add(chip->card, pcxhr_create_mixer() 1209 chip)); pcxhr_create_mixer() 1213 err = snd_ctl_add(chip->card, pcxhr_create_mixer() 1215 chip)); pcxhr_create_mixer() 1220 err = hr222_add_mic_controls(chip); pcxhr_create_mixer() 1226 if (chip->nb_streams_capt > 0 && chip->nb_streams_play > 0) { pcxhr_create_mixer() 1228 err = snd_ctl_add(chip->card, pcxhr_create_mixer() 1229 snd_ctl_new1(&pcxhr_control_monitor_vol, chip)); pcxhr_create_mixer() 1233 err = snd_ctl_add(chip->card, pcxhr_create_mixer() 1234 snd_ctl_new1(&pcxhr_control_monitor_sw, chip)); pcxhr_create_mixer() 1241 err = snd_ctl_add(chip->card, pcxhr_create_mixer() 1248 err = snd_ctl_add(chip->card, pcxhr_create_mixer() 1255 pcxhr_init_audio_levels(chip); pcxhr_create_mixer()
/linux-4.1.27/drivers/regulator/
H A D	da9211-regulator.c	97 struct da9211 *chip = rdev_get_drvdata(rdev); da9211_buck_get_mode() local 101 ret = regmap_read(chip->regmap, DA9211_REG_BUCKA_CONF+id, &data); da9211_buck_get_mode() 124 struct da9211 *chip = rdev_get_drvdata(rdev); da9211_buck_set_mode() local 139 return regmap_update_bits(chip->regmap, DA9211_REG_BUCKA_CONF+id, da9211_buck_set_mode() 147 struct da9211 *chip = rdev_get_drvdata(rdev); da9211_set_current_limit() local 151 switch (chip->chip_id) { da9211_set_current_limit() 168 return regmap_update_bits(chip->regmap, da9211_set_current_limit() 180 struct da9211 *chip = rdev_get_drvdata(rdev); da9211_get_current_limit() local 185 switch (chip->chip_id) { da9211_get_current_limit() 196 ret = regmap_read(chip->regmap, DA9211_REG_BUCK_ILIM, &data); da9211_get_current_limit() 299 struct da9211 *chip = data; da9211_irq_handler() local 302 err = regmap_read(chip->regmap, DA9211_REG_EVENT_B, &reg_val); da9211_irq_handler() 307 regulator_notifier_call_chain(chip->rdev[0], da9211_irq_handler() 310 err = regmap_write(chip->regmap, DA9211_REG_EVENT_B, da9211_irq_handler() 319 regulator_notifier_call_chain(chip->rdev[1], da9211_irq_handler() 322 err = regmap_write(chip->regmap, DA9211_REG_EVENT_B, da9211_irq_handler() 333 dev_err(chip->dev, "I2C error : %d\n", err); da9211_irq_handler() 337 static int da9211_regulator_init(struct da9211 *chip) da9211_regulator_init() argument 343 ret = regmap_read(chip->regmap, DA9211_REG_CONFIG_E, &data); da9211_regulator_init() 345 dev_err(chip->dev, "Failed to read CONFIG_E reg: %d\n", ret); da9211_regulator_init() 353 if ((chip->pdata->num_buck == 2 && data == 0x40) da9211_regulator_init() 354 || (chip->pdata->num_buck == 1 && data == 0x00)) { da9211_regulator_init() 356 chip->num_regulator = 1; da9211_regulator_init() 358 chip->num_regulator = 2; da9211_regulator_init() 360 dev_err(chip->dev, "Configuration is mismatched\n"); da9211_regulator_init() 364 for (i = 0; i < chip->num_regulator; i++) { da9211_regulator_init() 365 config.init_data = chip->pdata->init_data[i]; da9211_regulator_init() 366 config.dev = chip->dev; da9211_regulator_init() 367 config.driver_data = chip; da9211_regulator_init() 368 config.regmap = chip->regmap; da9211_regulator_init() 369 config.of_node = chip->pdata->reg_node[i]; da9211_regulator_init() 371 if (gpio_is_valid(chip->pdata->gpio_ren[i])) { da9211_regulator_init() 372 config.ena_gpio = chip->pdata->gpio_ren[i]; da9211_regulator_init() 379 chip->rdev[i] = devm_regulator_register(chip->dev, da9211_regulator_init() 381 if (IS_ERR(chip->rdev[i])) { da9211_regulator_init() 382 dev_err(chip->dev, da9211_regulator_init() 384 return PTR_ERR(chip->rdev[i]); da9211_regulator_init() 387 if (chip->chip_irq != 0) { da9211_regulator_init() 388 ret = regmap_update_bits(chip->regmap, da9211_regulator_init() 391 dev_err(chip->dev, da9211_regulator_init() 407 struct da9211 *chip; da9211_i2c_probe() local 411 chip = devm_kzalloc(&i2c->dev, sizeof(struct da9211), GFP_KERNEL); da9211_i2c_probe() 412 if (!chip) da9211_i2c_probe() 415 chip->dev = &i2c->dev; da9211_i2c_probe() 416 chip->regmap = devm_regmap_init_i2c(i2c, &da9211_regmap_config); da9211_i2c_probe() 417 if (IS_ERR(chip->regmap)) { da9211_i2c_probe() 418 error = PTR_ERR(chip->regmap); da9211_i2c_probe() 419 dev_err(chip->dev, "Failed to allocate register map: %d\n", da9211_i2c_probe() 424 i2c_set_clientdata(i2c, chip); da9211_i2c_probe() 426 chip->pdata = i2c->dev.platform_data; da9211_i2c_probe() 428 ret = regmap_read(chip->regmap, DA9211_REG_DEVICE_ID, &data); da9211_i2c_probe() 430 dev_err(chip->dev, "Failed to read DEVICE_ID reg: %d\n", ret); da9211_i2c_probe() 436 chip->chip_id = DA9211; da9211_i2c_probe() 439 chip->chip_id = DA9213; da9211_i2c_probe() 442 dev_err(chip->dev, "Unsupported device id = 0x%x.\n", data); da9211_i2c_probe() 446 if (!chip->pdata) da9211_i2c_probe() 447 chip->pdata = da9211_parse_regulators_dt(chip->dev); da9211_i2c_probe() 449 if (IS_ERR(chip->pdata)) { da9211_i2c_probe() 450 dev_err(chip->dev, "No regulators defined for the platform\n"); da9211_i2c_probe() 451 return PTR_ERR(chip->pdata); da9211_i2c_probe() 454 chip->chip_irq = i2c->irq; da9211_i2c_probe() 456 if (chip->chip_irq != 0) { da9211_i2c_probe() 457 ret = devm_request_threaded_irq(chip->dev, chip->chip_irq, NULL, da9211_i2c_probe() 460 "da9211", chip); da9211_i2c_probe() 462 dev_err(chip->dev, "Failed to request IRQ: %d\n", da9211_i2c_probe() 463 chip->chip_irq); da9211_i2c_probe() 467 dev_warn(chip->dev, "No IRQ configured\n"); da9211_i2c_probe() 470 ret = da9211_regulator_init(chip); da9211_i2c_probe() 473 dev_err(chip->dev, "Failed to initialize regulator: %d\n", ret); da9211_i2c_probe()
H A D	ad5398.c	31 static int ad5398_calc_current(struct ad5398_chip_info *chip, ad5398_calc_current() argument 34 unsigned range_uA = chip->max_uA - chip->min_uA; ad5398_calc_current() 36 return chip->min_uA + (selector * range_uA / chip->current_level); ad5398_calc_current() 69 struct ad5398_chip_info *chip = rdev_get_drvdata(rdev); ad5398_get_current_limit() local 70 struct i2c_client *client = chip->client; ad5398_get_current_limit() 78 ret = (data & chip->current_mask) >> chip->current_offset; ad5398_get_current_limit() 80 return ad5398_calc_current(chip, ret); ad5398_get_current_limit() 85 struct ad5398_chip_info *chip = rdev_get_drvdata(rdev); ad5398_set_current_limit() local 86 struct i2c_client *client = chip->client; ad5398_set_current_limit() 87 unsigned range_uA = chip->max_uA - chip->min_uA; ad5398_set_current_limit() 92 if (min_uA < chip->min_uA) ad5398_set_current_limit() 93 min_uA = chip->min_uA; ad5398_set_current_limit() 94 if (max_uA > chip->max_uA) ad5398_set_current_limit() 95 max_uA = chip->max_uA; ad5398_set_current_limit() 97 if (min_uA > chip->max_uA || max_uA < chip->min_uA) ad5398_set_current_limit() 100 selector = DIV_ROUND_UP((min_uA - chip->min_uA) * chip->current_level, ad5398_set_current_limit() 102 if (ad5398_calc_current(chip, selector) > max_uA) ad5398_set_current_limit() 106 ad5398_calc_current(chip, selector)); ad5398_set_current_limit() 108 /* read chip enable bit */ ad5398_set_current_limit() 114 selector = (selector << chip->current_offset) & chip->current_mask; ad5398_set_current_limit() 125 struct ad5398_chip_info *chip = rdev_get_drvdata(rdev); ad5398_is_enabled() local 126 struct i2c_client *client = chip->client; ad5398_is_enabled() 142 struct ad5398_chip_info *chip = rdev_get_drvdata(rdev); ad5398_enable() local 143 struct i2c_client *client = chip->client; ad5398_enable() 163 struct ad5398_chip_info *chip = rdev_get_drvdata(rdev); ad5398_disable() local 164 struct i2c_client *client = chip->client; ad5398_disable() 219 struct ad5398_chip_info *chip; ad5398_probe() local 226 chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL); ad5398_probe() 227 if (!chip) ad5398_probe() 232 config.driver_data = chip; ad5398_probe() 234 chip->client = client; ad5398_probe() 236 chip->min_uA = df->min_uA; ad5398_probe() 237 chip->max_uA = df->max_uA; ad5398_probe() 238 chip->current_level = 1 << df->current_bits; ad5398_probe() 239 chip->current_offset = df->current_offset; ad5398_probe() 240 chip->current_mask = (chip->current_level - 1) << chip->current_offset; ad5398_probe() 242 chip->rdev = devm_regulator_register(&client->dev, &ad5398_reg, ad5398_probe() 244 if (IS_ERR(chip->rdev)) { ad5398_probe() 247 return PTR_ERR(chip->rdev); ad5398_probe() 250 i2c_set_clientdata(client, chip); ad5398_probe()
/linux-4.1.27/drivers/power/
H A D	max17040_battery.c	60 struct max17040_chip *chip = power_supply_get_drvdata(psy); max17040_get_property() local 64 val->intval = chip->status; max17040_get_property() 67 val->intval = chip->online; max17040_get_property() 70 val->intval = chip->vcell; max17040_get_property() 73 val->intval = chip->soc; max17040_get_property() 113 struct max17040_chip *chip = i2c_get_clientdata(client); max17040_get_vcell() local 120 chip->vcell = (msb << 4) + (lsb >> 4); max17040_get_vcell() 125 struct max17040_chip *chip = i2c_get_clientdata(client); max17040_get_soc() local 132 chip->soc = msb; max17040_get_soc() 148 struct max17040_chip *chip = i2c_get_clientdata(client); max17040_get_online() local 150 if (chip->pdata && chip->pdata->battery_online) max17040_get_online() 151 chip->online = chip->pdata->battery_online(); max17040_get_online() 153 chip->online = 1; max17040_get_online() 158 struct max17040_chip *chip = i2c_get_clientdata(client); max17040_get_status() local 160 if (!chip->pdata || !chip->pdata->charger_online max17040_get_status() 161 || !chip->pdata->charger_enable) { max17040_get_status() 162 chip->status = POWER_SUPPLY_STATUS_UNKNOWN; max17040_get_status() 166 if (chip->pdata->charger_online()) { max17040_get_status() 167 if (chip->pdata->charger_enable()) max17040_get_status() 168 chip->status = POWER_SUPPLY_STATUS_CHARGING; max17040_get_status() 170 chip->status = POWER_SUPPLY_STATUS_NOT_CHARGING; max17040_get_status() 172 chip->status = POWER_SUPPLY_STATUS_DISCHARGING; max17040_get_status() 175 if (chip->soc > MAX17040_BATTERY_FULL) max17040_get_status() 176 chip->status = POWER_SUPPLY_STATUS_FULL; max17040_get_status() 181 struct max17040_chip *chip; max17040_work() local 183 chip = container_of(work, struct max17040_chip, work.work); max17040_work() 185 max17040_get_vcell(chip->client); max17040_work() 186 max17040_get_soc(chip->client); max17040_work() 187 max17040_get_online(chip->client); max17040_work() 188 max17040_get_status(chip->client); max17040_work() 190 queue_delayed_work(system_power_efficient_wq, &chip->work, max17040_work() 214 struct max17040_chip *chip; max17040_probe() local 219 chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL); max17040_probe() 220 if (!chip) max17040_probe() 223 chip->client = client; max17040_probe() 224 chip->pdata = client->dev.platform_data; max17040_probe() 226 i2c_set_clientdata(client, chip); max17040_probe() 227 psy_cfg.drv_data = chip; max17040_probe() 229 chip->battery = power_supply_register(&client->dev, max17040_probe() 231 if (IS_ERR(chip->battery)) { max17040_probe() 233 return PTR_ERR(chip->battery); max17040_probe() 239 INIT_DEFERRABLE_WORK(&chip->work, max17040_work); max17040_probe() 240 queue_delayed_work(system_power_efficient_wq, &chip->work, max17040_probe() 248 struct max17040_chip *chip = i2c_get_clientdata(client); max17040_remove() local 250 power_supply_unregister(chip->battery); max17040_remove() 251 cancel_delayed_work(&chip->work); max17040_remove() 260 struct max17040_chip *chip = i2c_get_clientdata(client); max17040_suspend() local 262 cancel_delayed_work(&chip->work); max17040_suspend() 269 struct max17040_chip *chip = i2c_get_clientdata(client); max17040_resume() local 271 queue_delayed_work(system_power_efficient_wq, &chip->work, max17040_resume()
H A D	max17042_battery.c	96 struct max17042_chip *chip = power_supply_get_drvdata(psy); max17042_get_property() local 97 struct regmap *map = chip->regmap; max17042_get_property() 101 if (!chip->init_complete) max17042_get_property() 131 if (chip->chip_type == MAXIM_DEVICE_TYPE_MAX17042) max17042_get_property() 199 if (chip->pdata->enable_current_sense) { max17042_get_property() 211 val->intval *= 1562500 / chip->pdata->r_sns; max17042_get_property() 217 if (chip->pdata->enable_current_sense) { max17042_get_property() 229 val->intval *= 1562500 / chip->pdata->r_sns; max17042_get_property() 268 static inline void max10742_unlock_model(struct max17042_chip *chip) max10742_unlock_model() argument 270 struct regmap *map = chip->regmap; max10742_unlock_model() 276 static inline void max10742_lock_model(struct max17042_chip *chip) max10742_lock_model() argument 278 struct regmap *map = chip->regmap; max10742_lock_model() 284 static inline void max17042_write_model_data(struct max17042_chip *chip, max17042_write_model_data() argument 287 struct regmap *map = chip->regmap; max17042_write_model_data() 292 chip->pdata->config_data->cell_char_tbl[i]); max17042_write_model_data() 295 static inline void max17042_read_model_data(struct max17042_chip *chip, max17042_read_model_data() argument 298 struct regmap *map = chip->regmap; max17042_read_model_data() 305 static inline int max17042_model_data_compare(struct max17042_chip *chip, max17042_model_data_compare() argument 311 dev_err(&chip->client->dev, "%s compare failed\n", __func__); max17042_model_data_compare() 313 dev_info(&chip->client->dev, "0x%x, 0x%x", max17042_model_data_compare() 315 dev_info(&chip->client->dev, "\n"); max17042_model_data_compare() 321 static int max17042_init_model(struct max17042_chip *chip) max17042_init_model() argument 324 int table_size = ARRAY_SIZE(chip->pdata->config_data->cell_char_tbl); max17042_init_model() 331 max10742_unlock_model(chip); max17042_init_model() 332 max17042_write_model_data(chip, MAX17042_MODELChrTbl, max17042_init_model() 334 max17042_read_model_data(chip, MAX17042_MODELChrTbl, temp_data, max17042_init_model() 338 chip, max17042_init_model() 339 chip->pdata->config_data->cell_char_tbl, max17042_init_model() 343 max10742_lock_model(chip); max17042_init_model() 349 static int max17042_verify_model_lock(struct max17042_chip *chip) max17042_verify_model_lock() argument 352 int table_size = ARRAY_SIZE(chip->pdata->config_data->cell_char_tbl); max17042_verify_model_lock() 360 max17042_read_model_data(chip, MAX17042_MODELChrTbl, temp_data, max17042_verify_model_lock() 370 static void max17042_write_config_regs(struct max17042_chip *chip) max17042_write_config_regs() argument 372 struct max17042_config_data *config = chip->pdata->config_data; max17042_write_config_regs() 373 struct regmap *map = chip->regmap; max17042_write_config_regs() 380 if (chip->chip_type == MAXIM_DEVICE_TYPE_MAX17047 || max17042_write_config_regs() 381 chip->chip_type == MAXIM_DEVICE_TYPE_MAX17050) max17042_write_config_regs() 386 static void max17042_write_custom_regs(struct max17042_chip *chip) max17042_write_custom_regs() argument 388 struct max17042_config_data *config = chip->pdata->config_data; max17042_write_custom_regs() 389 struct regmap *map = chip->regmap; max17042_write_custom_regs() 394 if (chip->chip_type == MAXIM_DEVICE_TYPE_MAX17042) { max17042_write_custom_regs() 410 static void max17042_update_capacity_regs(struct max17042_chip *chip) max17042_update_capacity_regs() argument 412 struct max17042_config_data *config = chip->pdata->config_data; max17042_update_capacity_regs() 413 struct regmap *map = chip->regmap; max17042_update_capacity_regs() 422 static void max17042_reset_vfsoc0_reg(struct max17042_chip *chip) max17042_reset_vfsoc0_reg() argument 425 struct regmap *map = chip->regmap; max17042_reset_vfsoc0_reg() 433 static void max17042_load_new_capacity_params(struct max17042_chip *chip) max17042_load_new_capacity_params() argument 438 struct max17042_config_data *config = chip->pdata->config_data; max17042_load_new_capacity_params() 439 struct regmap *map = chip->regmap; max17042_load_new_capacity_params() 474 static inline void max17042_override_por_values(struct max17042_chip *chip) max17042_override_por_values() argument 476 struct regmap *map = chip->regmap; max17042_override_por_values() 477 struct max17042_config_data *config = chip->pdata->config_data; max17042_override_por_values() 503 if (chip->chip_type == MAXIM_DEVICE_TYPE_MAX17042) max17042_override_por_values() 510 if (chip->chip_type == MAXIM_DEVICE_TYPE_MAX17042) max17042_override_por_values() 519 if (chip->chip_type) { max17042_override_por_values() 527 static int max17042_init_chip(struct max17042_chip *chip) max17042_init_chip() argument 529 struct regmap *map = chip->regmap; max17042_init_chip() 532 max17042_override_por_values(chip); max17042_init_chip() 539 max17042_write_config_regs(chip); max17042_init_chip() 542 ret = max17042_init_model(chip); max17042_init_chip() 544 dev_err(&chip->client->dev, "%s init failed\n", max17042_init_chip() 549 ret = max17042_verify_model_lock(chip); max17042_init_chip() 551 dev_err(&chip->client->dev, "%s lock verify failed\n", max17042_init_chip() 556 max17042_write_custom_regs(chip); max17042_init_chip() 559 max17042_update_capacity_regs(chip); max17042_init_chip() 567 max17042_reset_vfsoc0_reg(chip); max17042_init_chip() 570 max17042_load_new_capacity_params(chip); max17042_init_chip() 577 static void max17042_set_soc_threshold(struct max17042_chip *chip, u16 off) max17042_set_soc_threshold() argument 579 struct regmap *map = chip->regmap; max17042_set_soc_threshold() 594 struct max17042_chip *chip = dev; max17042_thread_handler() local 597 regmap_read(chip->regmap, MAX17042_STATUS, &val); max17042_thread_handler() 600 dev_info(&chip->client->dev, "SOC threshold INTR\n"); max17042_thread_handler() 601 max17042_set_soc_threshold(chip, 1); max17042_thread_handler() 604 power_supply_changed(chip->battery); max17042_thread_handler() 610 struct max17042_chip *chip = container_of(work, max17042_init_worker() local 615 if (chip->pdata->enable_por_init && chip->pdata->config_data) { max17042_init_worker() 616 ret = max17042_init_chip(chip); max17042_init_worker() 621 chip->init_complete = 1; max17042_init_worker() 686 struct max17042_chip *chip; max17042_probe() local 694 chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL); max17042_probe() 695 if (!chip) max17042_probe() 698 chip->client = client; max17042_probe() 699 chip->regmap = devm_regmap_init_i2c(client, &max17042_regmap_config); max17042_probe() 700 if (IS_ERR(chip->regmap)) { max17042_probe() 705 chip->pdata = max17042_get_pdata(&client->dev); max17042_probe() 706 if (!chip->pdata) { max17042_probe() 711 i2c_set_clientdata(client, chip); max17042_probe() 712 chip->chip_type = id->driver_data; max17042_probe() 713 psy_cfg.drv_data = chip; max17042_probe() 717 if (!chip->pdata->enable_current_sense) max17042_probe() 720 if (chip->pdata->r_sns == 0) max17042_probe() 721 chip->pdata->r_sns = MAX17042_DEFAULT_SNS_RESISTOR; max17042_probe() 723 if (chip->pdata->init_data) max17042_probe() 724 for (i = 0; i < chip->pdata->num_init_data; i++) max17042_probe() 725 regmap_write(chip->regmap, max17042_probe() 726 chip->pdata->init_data[i].addr, max17042_probe() 727 chip->pdata->init_data[i].data); max17042_probe() 729 if (!chip->pdata->enable_current_sense) { max17042_probe() 730 regmap_write(chip->regmap, MAX17042_CGAIN, 0x0000); max17042_probe() 731 regmap_write(chip->regmap, MAX17042_MiscCFG, 0x0003); max17042_probe() 732 regmap_write(chip->regmap, MAX17042_LearnCFG, 0x0007); max17042_probe() 735 chip->battery = power_supply_register(&client->dev, max17042_desc, max17042_probe() 737 if (IS_ERR(chip->battery)) { max17042_probe() 739 return PTR_ERR(chip->battery); max17042_probe() 746 chip->battery->desc->name, chip); max17042_probe() 748 regmap_update_bits(chip->regmap, MAX17042_CONFIG, max17042_probe() 751 max17042_set_soc_threshold(chip, 1); max17042_probe() 759 regmap_read(chip->regmap, MAX17042_STATUS, &val); max17042_probe() 761 INIT_WORK(&chip->work, max17042_init_worker); max17042_probe() 762 schedule_work(&chip->work); max17042_probe() 764 chip->init_complete = 1; max17042_probe() 772 struct max17042_chip *chip = i2c_get_clientdata(client); max17042_remove() local 775 free_irq(client->irq, chip); max17042_remove() 776 power_supply_unregister(chip->battery); max17042_remove() 783 struct max17042_chip *chip = dev_get_drvdata(dev); max17042_suspend() local 789 if (chip->client->irq) { max17042_suspend() 790 disable_irq(chip->client->irq); max17042_suspend() 791 enable_irq_wake(chip->client->irq); max17042_suspend() 799 struct max17042_chip *chip = dev_get_drvdata(dev); max17042_resume() local 801 if (chip->client->irq) { max17042_resume() 802 disable_irq_wake(chip->client->irq); max17042_resume() 803 enable_irq(chip->client->irq); max17042_resume() 805 max17042_set_soc_threshold(chip, 1); max17042_resume()
/linux-4.1.27/arch/arm/plat-samsung/
H A D	pm-gpio.c	33 static void samsung_gpio_pm_1bit_save(struct samsung_gpio_chip *chip) samsung_gpio_pm_1bit_save() argument 35 chip->pm_save[0] = __raw_readl(chip->base + OFFS_CON); samsung_gpio_pm_1bit_save() 36 chip->pm_save[1] = __raw_readl(chip->base + OFFS_DAT); samsung_gpio_pm_1bit_save() 39 static void samsung_gpio_pm_1bit_resume(struct samsung_gpio_chip *chip) samsung_gpio_pm_1bit_resume() argument 41 void __iomem *base = chip->base; samsung_gpio_pm_1bit_resume() 44 u32 gps_gpcon = chip->pm_save[0]; samsung_gpio_pm_1bit_resume() 45 u32 gps_gpdat = chip->pm_save[1]; samsung_gpio_pm_1bit_resume() 62 chip->chip.label, old_gpcon, gps_gpcon, old_gpdat, gps_gpdat); samsung_gpio_pm_1bit_resume() 70 static void samsung_gpio_pm_2bit_save(struct samsung_gpio_chip *chip) samsung_gpio_pm_2bit_save() argument 72 chip->pm_save[0] = __raw_readl(chip->base + OFFS_CON); samsung_gpio_pm_2bit_save() 73 chip->pm_save[1] = __raw_readl(chip->base + OFFS_DAT); samsung_gpio_pm_2bit_save() 74 chip->pm_save[2] = __raw_readl(chip->base + OFFS_UP); samsung_gpio_pm_2bit_save() 101 * @chip: The chip information to resume. 126 static void samsung_gpio_pm_2bit_resume(struct samsung_gpio_chip *chip) samsung_gpio_pm_2bit_resume() argument 128 void __iomem *base = chip->base; samsung_gpio_pm_2bit_resume() 131 u32 gps_gpcon = chip->pm_save[0]; samsung_gpio_pm_2bit_resume() 132 u32 gps_gpdat = chip->pm_save[1]; samsung_gpio_pm_2bit_resume() 138 __raw_writel(chip->pm_save[2], base + OFFS_UP); samsung_gpio_pm_2bit_resume() 189 chip->chip.label, old_gpcon, gps_gpcon, old_gpdat, gps_gpdat); samsung_gpio_pm_2bit_resume() 198 static void samsung_gpio_pm_4bit_save(struct samsung_gpio_chip *chip) samsung_gpio_pm_4bit_save() argument 200 chip->pm_save[1] = __raw_readl(chip->base + OFFS_CON); samsung_gpio_pm_4bit_save() 201 chip->pm_save[2] = __raw_readl(chip->base + OFFS_DAT); samsung_gpio_pm_4bit_save() 202 chip->pm_save[3] = __raw_readl(chip->base + OFFS_UP); samsung_gpio_pm_4bit_save() 204 if (chip->chip.ngpio > 8) samsung_gpio_pm_4bit_save() 205 chip->pm_save[0] = __raw_readl(chip->base - 4); samsung_gpio_pm_4bit_save() 247 static void samsung_gpio_pm_4bit_con(struct samsung_gpio_chip *chip, int index) samsung_gpio_pm_4bit_con() argument 249 void __iomem *con = chip->base + (index * 4); samsung_gpio_pm_4bit_con() 251 u32 gps_gpcon = chip->pm_save[index + 1]; samsung_gpio_pm_4bit_con() 262 static void samsung_gpio_pm_4bit_resume(struct samsung_gpio_chip *chip) samsung_gpio_pm_4bit_resume() argument 264 void __iomem *base = chip->base; samsung_gpio_pm_4bit_resume() 267 u32 gps_gpdat = chip->pm_save[2]; samsung_gpio_pm_4bit_resume() 274 samsung_gpio_pm_4bit_con(chip, 0); samsung_gpio_pm_4bit_resume() 275 if (chip->chip.ngpio > 8) { samsung_gpio_pm_4bit_resume() 277 samsung_gpio_pm_4bit_con(chip, -1); samsung_gpio_pm_4bit_resume() 282 __raw_writel(chip->pm_save[2], base + OFFS_DAT); samsung_gpio_pm_4bit_resume() 283 __raw_writel(chip->pm_save[1], base + OFFS_CON); samsung_gpio_pm_4bit_resume() 284 if (chip->chip.ngpio > 8) samsung_gpio_pm_4bit_resume() 285 __raw_writel(chip->pm_save[0], base - 4); samsung_gpio_pm_4bit_resume() 287 __raw_writel(chip->pm_save[2], base + OFFS_DAT); samsung_gpio_pm_4bit_resume() 288 __raw_writel(chip->pm_save[3], base + OFFS_UP); samsung_gpio_pm_4bit_resume() 290 if (chip->chip.ngpio > 8) { samsung_gpio_pm_4bit_resume() 292 chip->chip.label, old_gpcon[0], old_gpcon[1], samsung_gpio_pm_4bit_resume() 298 chip->chip.label, old_gpcon[1], samsung_gpio_pm_4bit_resume() 310 * samsung_pm_save_gpio() - save gpio chip data for suspend 311 * @ourchip: The chip for suspend. 318 S3C_PMDBG("%s: no pm for %s\n", __func__, ourchip->chip.label); samsung_pm_save_gpio() 344 ourchip->chip.label, samsung_pm_save_gpios() 350 gpio_nr += ourchip->chip.ngpio; samsung_pm_save_gpios() 356 * samsung_pm_resume_gpio() - restore gpio chip data after suspend 357 * @ourchip: The suspended chip. 364 S3C_PMDBG("%s: no pm for %s\n", __func__, ourchip->chip.label); samsung_pm_resume_gpio() 383 gpio_nr += ourchip->chip.ngpio; samsung_pm_restore_gpios()
/linux-4.1.27/sound/isa/cs423x/
H A D	cs4236_lib.c	35 * D4-D0: chip id 122 static void snd_cs4236_ctrl_out(struct snd_wss *chip, snd_cs4236_ctrl_out() argument 125 outb(reg, chip->cport + 3); snd_cs4236_ctrl_out() 126 outb(chip->cimage[reg] = val, chip->cport + 4); snd_cs4236_ctrl_out() 129 static unsigned char snd_cs4236_ctrl_in(struct snd_wss *chip, unsigned char reg) snd_cs4236_ctrl_in() argument 131 outb(reg, chip->cport + 3); snd_cs4236_ctrl_in() 132 return inb(chip->cport + 4); snd_cs4236_ctrl_in() 182 static void snd_cs4236_playback_format(struct snd_wss *chip, snd_cs4236_playback_format() argument 189 spin_lock_irqsave(&chip->reg_lock, flags); snd_cs4236_playback_format() 191 snd_wss_out(chip, CS4231_ALT_FEATURE_1, snd_cs4236_playback_format() 192 chip->image[CS4231_ALT_FEATURE_1] | 0x10); snd_cs4236_playback_format() 193 snd_wss_out(chip, CS4231_PLAYBK_FORMAT, pdfr & 0xf0); snd_cs4236_playback_format() 194 snd_wss_out(chip, CS4231_ALT_FEATURE_1, snd_cs4236_playback_format() 195 chip->image[CS4231_ALT_FEATURE_1] & ~0x10); snd_cs4236_playback_format() 196 snd_cs4236_ext_out(chip, CS4236_DAC_RATE, rate); snd_cs4236_playback_format() 197 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_cs4236_playback_format() 200 static void snd_cs4236_capture_format(struct snd_wss *chip, snd_cs4236_capture_format() argument 207 spin_lock_irqsave(&chip->reg_lock, flags); snd_cs4236_capture_format() 209 snd_wss_out(chip, CS4231_ALT_FEATURE_1, snd_cs4236_capture_format() 210 chip->image[CS4231_ALT_FEATURE_1] | 0x20); snd_cs4236_capture_format() 211 snd_wss_out(chip, CS4231_REC_FORMAT, cdfr & 0xf0); snd_cs4236_capture_format() 212 snd_wss_out(chip, CS4231_ALT_FEATURE_1, snd_cs4236_capture_format() 213 chip->image[CS4231_ALT_FEATURE_1] & ~0x20); snd_cs4236_capture_format() 214 snd_cs4236_ext_out(chip, CS4236_ADC_RATE, rate); snd_cs4236_capture_format() 215 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_cs4236_capture_format() 220 static void snd_cs4236_suspend(struct snd_wss *chip) snd_cs4236_suspend() argument 225 spin_lock_irqsave(&chip->reg_lock, flags); snd_cs4236_suspend() 227 chip->image[reg] = snd_wss_in(chip, reg); snd_cs4236_suspend() 229 chip->eimage[reg] = snd_cs4236_ext_in(chip, CS4236_I23VAL(reg)); snd_cs4236_suspend() 231 chip->cimage[reg] = snd_cs4236_ctrl_in(chip, reg); snd_cs4236_suspend() 232 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_cs4236_suspend() 235 static void snd_cs4236_resume(struct snd_wss *chip) snd_cs4236_resume() argument 240 snd_wss_mce_up(chip); snd_cs4236_resume() 241 spin_lock_irqsave(&chip->reg_lock, flags); snd_cs4236_resume() 250 snd_wss_out(chip, reg, chip->image[reg]); snd_cs4236_resume() 255 snd_cs4236_ext_out(chip, CS4236_I23VAL(reg), chip->eimage[reg]); snd_cs4236_resume() 261 snd_cs4236_ctrl_out(chip, reg, chip->cimage[reg]); snd_cs4236_resume() 264 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_cs4236_resume() 265 snd_wss_mce_down(chip); snd_cs4236_resume() 270 * This function does no fail if the chip is not CS4236B or compatible. 281 struct snd_wss *chip; snd_cs4236_create() local 291 irq, dma1, dma2, hardware, hwshare, &chip); snd_cs4236_create() 295 if ((chip->hardware & WSS_HW_CS4236B_MASK) == 0) { snd_cs4236_create() 296 snd_printd("chip is not CS4236+, hardware=0x%x\n", snd_cs4236_create() 297 chip->hardware); snd_cs4236_create() 298 *rchip = chip; snd_cs4236_create() 306 idx, inb(chip->cport + idx)); snd_cs4236_create() 309 idx, snd_cs4236_ctrl_in(chip, idx)); snd_cs4236_create() 315 snd_device_free(card, chip); snd_cs4236_create() 318 ver1 = snd_cs4236_ctrl_in(chip, 1); snd_cs4236_create() 319 ver2 = snd_cs4236_ext_in(chip, CS4236_VERSION); snd_cs4236_create() 323 snd_printk(KERN_ERR "CS4236+ chip detected, but " snd_cs4236_create() 325 snd_device_free(card, chip); snd_cs4236_create() 328 snd_cs4236_ctrl_out(chip, 0, 0x00); snd_cs4236_create() 329 snd_cs4236_ctrl_out(chip, 2, 0xff); snd_cs4236_create() 330 snd_cs4236_ctrl_out(chip, 3, 0x00); snd_cs4236_create() 331 snd_cs4236_ctrl_out(chip, 4, 0x80); snd_cs4236_create() 334 snd_cs4236_ctrl_out(chip, 5, reg); snd_cs4236_create() 335 snd_cs4236_ctrl_out(chip, 6, IEC958_AES1_CON_PCM_CODER >> 2); snd_cs4236_create() 336 snd_cs4236_ctrl_out(chip, 7, 0x00); snd_cs4236_create() 343 snd_cs4236_ctrl_out(chip, 8, 0x8c); snd_cs4236_create() 344 chip->rate_constraint = snd_cs4236_xrate; snd_cs4236_create() 345 chip->set_playback_format = snd_cs4236_playback_format; snd_cs4236_create() 346 chip->set_capture_format = snd_cs4236_capture_format; snd_cs4236_create() 348 chip->suspend = snd_cs4236_suspend; snd_cs4236_create() 349 chip->resume = snd_cs4236_resume; snd_cs4236_create() 354 snd_cs4236_ext_out(chip, CS4236_I23VAL(reg), snd_cs4236_create() 358 snd_wss_out(chip, CS4231_LEFT_INPUT, 0x40); snd_cs4236_create() 359 snd_wss_out(chip, CS4231_RIGHT_INPUT, 0x40); snd_cs4236_create() 360 snd_wss_out(chip, CS4231_AUX1_LEFT_INPUT, 0xff); snd_cs4236_create() 361 snd_wss_out(chip, CS4231_AUX1_RIGHT_INPUT, 0xff); snd_cs4236_create() 362 snd_wss_out(chip, CS4231_AUX2_LEFT_INPUT, 0xdf); snd_cs4236_create() 363 snd_wss_out(chip, CS4231_AUX2_RIGHT_INPUT, 0xdf); snd_cs4236_create() 364 snd_wss_out(chip, CS4231_RIGHT_LINE_IN, 0xff); snd_cs4236_create() 365 snd_wss_out(chip, CS4231_LEFT_LINE_IN, 0xff); snd_cs4236_create() 366 snd_wss_out(chip, CS4231_RIGHT_LINE_IN, 0xff); snd_cs4236_create() 367 switch (chip->hardware) { snd_cs4236_create() 370 snd_wss_out(chip, CS4235_LEFT_MASTER, 0xff); snd_cs4236_create() 371 snd_wss_out(chip, CS4235_RIGHT_MASTER, 0xff); snd_cs4236_create() 375 *rchip = chip; snd_cs4236_create() 379 int snd_cs4236_pcm(struct snd_wss *chip, int device) snd_cs4236_pcm() argument 383 err = snd_wss_pcm(chip, device); snd_cs4236_pcm() 386 chip->pcm->info_flags &= ~SNDRV_PCM_INFO_JOINT_DUPLEX; snd_cs4236_pcm() 421 struct snd_wss *chip = snd_kcontrol_chip(kcontrol); snd_cs4236_get_single() local 428 spin_lock_irqsave(&chip->reg_lock, flags); snd_cs4236_get_single() 429 ucontrol->value.integer.value[0] = (chip->eimage[CS4236_REG(reg)] >> shift) & mask; snd_cs4236_get_single() 430 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_cs4236_get_single() 438 struct snd_wss *chip = snd_kcontrol_chip(kcontrol); snd_cs4236_put_single() local 451 spin_lock_irqsave(&chip->reg_lock, flags); snd_cs4236_put_single() 452 val = (chip->eimage[CS4236_REG(reg)] & ~(mask << shift)) | val; snd_cs4236_put_single() 453 change = val != chip->eimage[CS4236_REG(reg)]; snd_cs4236_put_single() 454 snd_cs4236_ext_out(chip, reg, val); snd_cs4236_put_single() 455 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_cs4236_put_single() 467 struct snd_wss *chip = snd_kcontrol_chip(kcontrol); snd_cs4236_get_singlec() local 474 spin_lock_irqsave(&chip->reg_lock, flags); snd_cs4236_get_singlec() 475 ucontrol->value.integer.value[0] = (chip->cimage[reg] >> shift) & mask; snd_cs4236_get_singlec() 476 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_cs4236_get_singlec() 484 struct snd_wss *chip = snd_kcontrol_chip(kcontrol); snd_cs4236_put_singlec() local 497 spin_lock_irqsave(&chip->reg_lock, flags); snd_cs4236_put_singlec() 498 val = (chip->cimage[reg] & ~(mask << shift)) | val; snd_cs4236_put_singlec() 499 change = val != chip->cimage[reg]; snd_cs4236_put_singlec() 500 snd_cs4236_ctrl_out(chip, reg, val); snd_cs4236_put_singlec() 501 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_cs4236_put_singlec() 534 struct snd_wss *chip = snd_kcontrol_chip(kcontrol); snd_cs4236_get_double() local 543 spin_lock_irqsave(&chip->reg_lock, flags); snd_cs4236_get_double() 544 ucontrol->value.integer.value[0] = (chip->eimage[CS4236_REG(left_reg)] >> shift_left) & mask; snd_cs4236_get_double() 545 ucontrol->value.integer.value[1] = (chip->eimage[CS4236_REG(right_reg)] >> shift_right) & mask; snd_cs4236_get_double() 546 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_cs4236_get_double() 556 struct snd_wss *chip = snd_kcontrol_chip(kcontrol); snd_cs4236_put_double() local 575 spin_lock_irqsave(&chip->reg_lock, flags); snd_cs4236_put_double() 577 val1 = (chip->eimage[CS4236_REG(left_reg)] & ~(mask << shift_left)) | val1; snd_cs4236_put_double() 578 val2 = (chip->eimage[CS4236_REG(right_reg)] & ~(mask << shift_right)) | val2; snd_cs4236_put_double() 579 change = val1 != chip->eimage[CS4236_REG(left_reg)] || val2 != chip->eimage[CS4236_REG(right_reg)]; snd_cs4236_put_double() 580 snd_cs4236_ext_out(chip, left_reg, val1); snd_cs4236_put_double() 581 snd_cs4236_ext_out(chip, right_reg, val2); snd_cs4236_put_double() 583 val1 = (chip->eimage[CS4236_REG(left_reg)] & ~((mask << shift_left) | (mask << shift_right))) | val1 | val2; snd_cs4236_put_double() 584 change = val1 != chip->eimage[CS4236_REG(left_reg)]; snd_cs4236_put_double() 585 snd_cs4236_ext_out(chip, left_reg, val1); snd_cs4236_put_double() 587 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_cs4236_put_double() 610 struct snd_wss *chip = snd_kcontrol_chip(kcontrol); snd_cs4236_get_double1() local 619 spin_lock_irqsave(&chip->reg_lock, flags); snd_cs4236_get_double1() 620 ucontrol->value.integer.value[0] = (chip->image[left_reg] >> shift_left) & mask; snd_cs4236_get_double1() 621 ucontrol->value.integer.value[1] = (chip->eimage[CS4236_REG(right_reg)] >> shift_right) & mask; snd_cs4236_get_double1() 622 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_cs4236_get_double1() 632 struct snd_wss *chip = snd_kcontrol_chip(kcontrol); snd_cs4236_put_double1() local 651 spin_lock_irqsave(&chip->reg_lock, flags); snd_cs4236_put_double1() 652 val1 = (chip->image[left_reg] & ~(mask << shift_left)) | val1; snd_cs4236_put_double1() 653 val2 = (chip->eimage[CS4236_REG(right_reg)] & ~(mask << shift_right)) | val2; snd_cs4236_put_double1() 654 change = val1 != chip->image[left_reg] || val2 != chip->eimage[CS4236_REG(right_reg)]; snd_cs4236_put_double1() 655 snd_wss_out(chip, left_reg, val1); snd_cs4236_put_double1() 656 snd_cs4236_ext_out(chip, right_reg, val2); snd_cs4236_put_double1() 657 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_cs4236_put_double1() 676 struct snd_wss *chip = snd_kcontrol_chip(kcontrol); snd_cs4236_get_master_digital() local 679 spin_lock_irqsave(&chip->reg_lock, flags); snd_cs4236_get_master_digital() 680 ucontrol->value.integer.value[0] = snd_cs4236_mixer_master_digital_invert_volume(chip->eimage[CS4236_REG(CS4236_LEFT_MASTER)] & 0x7f); snd_cs4236_get_master_digital() 681 ucontrol->value.integer.value[1] = snd_cs4236_mixer_master_digital_invert_volume(chip->eimage[CS4236_REG(CS4236_RIGHT_MASTER)] & 0x7f); snd_cs4236_get_master_digital() 682 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_cs4236_get_master_digital() 688 struct snd_wss *chip = snd_kcontrol_chip(kcontrol); snd_cs4236_put_master_digital() local 695 spin_lock_irqsave(&chip->reg_lock, flags); snd_cs4236_put_master_digital() 696 val1 = (chip->eimage[CS4236_REG(CS4236_LEFT_MASTER)] & ~0x7f) | val1; snd_cs4236_put_master_digital() 697 val2 = (chip->eimage[CS4236_REG(CS4236_RIGHT_MASTER)] & ~0x7f) | val2; snd_cs4236_put_master_digital() 698 change = val1 != chip->eimage[CS4236_REG(CS4236_LEFT_MASTER)] || val2 != chip->eimage[CS4236_REG(CS4236_RIGHT_MASTER)]; snd_cs4236_put_master_digital() 699 snd_cs4236_ext_out(chip, CS4236_LEFT_MASTER, val1); snd_cs4236_put_master_digital() 700 snd_cs4236_ext_out(chip, CS4236_RIGHT_MASTER, val2); snd_cs4236_put_master_digital() 701 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_cs4236_put_master_digital() 737 struct snd_wss *chip = snd_kcontrol_chip(kcontrol); snd_cs4235_get_output_accu() local 740 spin_lock_irqsave(&chip->reg_lock, flags); snd_cs4235_get_output_accu() 741 ucontrol->value.integer.value[0] = snd_cs4235_mixer_output_accu_get_volume(chip->image[CS4235_LEFT_MASTER]); snd_cs4235_get_output_accu() 742 ucontrol->value.integer.value[1] = snd_cs4235_mixer_output_accu_get_volume(chip->image[CS4235_RIGHT_MASTER]); snd_cs4235_get_output_accu() 743 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_cs4235_get_output_accu() 749 struct snd_wss *chip = snd_kcontrol_chip(kcontrol); snd_cs4235_put_output_accu() local 756 spin_lock_irqsave(&chip->reg_lock, flags); snd_cs4235_put_output_accu() 757 val1 = (chip->image[CS4235_LEFT_MASTER] & ~(3 << 5)) | val1; snd_cs4235_put_output_accu() 758 val2 = (chip->image[CS4235_RIGHT_MASTER] & ~(3 << 5)) | val2; snd_cs4235_put_output_accu() 759 change = val1 != chip->image[CS4235_LEFT_MASTER] || val2 != chip->image[CS4235_RIGHT_MASTER]; snd_cs4235_put_output_accu() 760 snd_wss_out(chip, CS4235_LEFT_MASTER, val1); snd_cs4235_put_output_accu() 761 snd_wss_out(chip, CS4235_RIGHT_MASTER, val2); snd_cs4235_put_output_accu() 762 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_cs4235_put_output_accu() 947 struct snd_wss *chip = snd_kcontrol_chip(kcontrol); snd_cs4236_get_iec958_switch() local 950 spin_lock_irqsave(&chip->reg_lock, flags); snd_cs4236_get_iec958_switch() 951 ucontrol->value.integer.value[0] = chip->image[CS4231_ALT_FEATURE_1] & 0x02 ? 1 : 0; snd_cs4236_get_iec958_switch() 955 snd_wss_in(chip, CS4231_ALT_FEATURE_1), snd_cs4236_get_iec958_switch() 956 snd_cs4236_ctrl_in(chip, 3), snd_cs4236_get_iec958_switch() 957 snd_cs4236_ctrl_in(chip, 4), snd_cs4236_get_iec958_switch() 958 snd_cs4236_ctrl_in(chip, 5), snd_cs4236_get_iec958_switch() 959 snd_cs4236_ctrl_in(chip, 6), snd_cs4236_get_iec958_switch() 960 snd_cs4236_ctrl_in(chip, 8)); snd_cs4236_get_iec958_switch() 962 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_cs4236_get_iec958_switch() 968 struct snd_wss *chip = snd_kcontrol_chip(kcontrol); snd_cs4236_put_iec958_switch() local 975 mutex_lock(&chip->mce_mutex); snd_cs4236_put_iec958_switch() 976 snd_wss_mce_up(chip); snd_cs4236_put_iec958_switch() 977 spin_lock_irqsave(&chip->reg_lock, flags); snd_cs4236_put_iec958_switch() 978 val = (chip->image[CS4231_ALT_FEATURE_1] & ~0x0e) | (0<<2) | (enable << 1); snd_cs4236_put_iec958_switch() 979 change = val != chip->image[CS4231_ALT_FEATURE_1]; snd_cs4236_put_iec958_switch() 980 snd_wss_out(chip, CS4231_ALT_FEATURE_1, val); snd_cs4236_put_iec958_switch() 981 val = snd_cs4236_ctrl_in(chip, 4) | 0xc0; snd_cs4236_put_iec958_switch() 982 snd_cs4236_ctrl_out(chip, 4, val); snd_cs4236_put_iec958_switch() 985 snd_cs4236_ctrl_out(chip, 4, val); snd_cs4236_put_iec958_switch() 986 spin_unlock_irqrestore(&chip->reg_lock, flags); snd_cs4236_put_iec958_switch() 987 snd_wss_mce_down(chip); snd_cs4236_put_iec958_switch() 988 mutex_unlock(&chip->mce_mutex); snd_cs4236_put_iec958_switch() 993 snd_wss_in(chip, CS4231_ALT_FEATURE_1), snd_cs4236_put_iec958_switch() 994 snd_cs4236_ctrl_in(chip, 3), snd_cs4236_put_iec958_switch() 995 snd_cs4236_ctrl_in(chip, 4), snd_cs4236_put_iec958_switch() 996 snd_cs4236_ctrl_in(chip, 5), snd_cs4236_put_iec958_switch() 997 snd_cs4236_ctrl_in(chip, 6), snd_cs4236_put_iec958_switch() 998 snd_cs4236_ctrl_in(chip, 8)); snd_cs4236_put_iec958_switch() 1032 int snd_cs4236_mixer(struct snd_wss *chip) snd_cs4236_mixer() argument 1039 if (snd_BUG_ON(!chip || !chip->card)) snd_cs4236_mixer() 1041 card = chip->card; snd_cs4236_mixer() 1042 strcpy(card->mixername, snd_wss_chip_id(chip)); snd_cs4236_mixer() 1044 if (chip->hardware == WSS_HW_CS4235 || snd_cs4236_mixer() 1045 chip->hardware == WSS_HW_CS4239) { snd_cs4236_mixer() 1047 if ((err = snd_ctl_add(card, snd_ctl_new1(&snd_cs4235_controls[idx], chip))) < 0) snd_cs4236_mixer() 1052 if ((err = snd_ctl_add(card, snd_ctl_new1(&snd_cs4236_controls[idx], chip))) < 0) snd_cs4236_mixer() 1056 switch (chip->hardware) { snd_cs4236_mixer() 1075 if ((err = snd_ctl_add(card, snd_ctl_new1(kcontrol, chip))) < 0) snd_cs4236_mixer() 1078 if (chip->hardware == WSS_HW_CS4237B || snd_cs4236_mixer() 1079 chip->hardware == WSS_HW_CS4238B) { snd_cs4236_mixer() 1081 if ((err = snd_ctl_add(card, snd_ctl_new1(&snd_cs4236_iec958_controls[idx], chip))) < 0) snd_cs4236_mixer()
/linux-4.1.27/drivers/staging/iio/adc/
H A D	ad7816.c	43 * struct ad7816_chip_info - chip specific information 59 static int ad7816_spi_read(struct ad7816_chip_info *chip, u16 *data) ad7816_spi_read() argument 61 struct spi_device *spi_dev = chip->spi_dev; ad7816_spi_read() 64 gpio_set_value(chip->rdwr_pin, 1); ad7816_spi_read() 65 gpio_set_value(chip->rdwr_pin, 0); ad7816_spi_read() 66 ret = spi_write(spi_dev, &chip->channel_id, sizeof(chip->channel_id)); ad7816_spi_read() 71 gpio_set_value(chip->rdwr_pin, 1); ad7816_spi_read() 74 if (chip->mode == AD7816_PD) { /* operating mode 2 */ ad7816_spi_read() 75 gpio_set_value(chip->convert_pin, 1); ad7816_spi_read() 76 gpio_set_value(chip->convert_pin, 0); ad7816_spi_read() 78 gpio_set_value(chip->convert_pin, 0); ad7816_spi_read() 79 gpio_set_value(chip->convert_pin, 1); ad7816_spi_read() 82 while (gpio_get_value(chip->busy_pin)) ad7816_spi_read() 85 gpio_set_value(chip->rdwr_pin, 0); ad7816_spi_read() 86 gpio_set_value(chip->rdwr_pin, 1); ad7816_spi_read() 98 static int ad7816_spi_write(struct ad7816_chip_info *chip, u8 data) ad7816_spi_write() argument 100 struct spi_device *spi_dev = chip->spi_dev; ad7816_spi_write() 103 gpio_set_value(chip->rdwr_pin, 1); ad7816_spi_write() 104 gpio_set_value(chip->rdwr_pin, 0); ad7816_spi_write() 117 struct ad7816_chip_info *chip = iio_priv(indio_dev); ad7816_show_mode() local 119 if (chip->mode) ad7816_show_mode() 130 struct ad7816_chip_info *chip = iio_priv(indio_dev); ad7816_store_mode() local 133 gpio_set_value(chip->rdwr_pin, 1); ad7816_store_mode() 134 chip->mode = AD7816_FULL; ad7816_store_mode() 136 gpio_set_value(chip->rdwr_pin, 0); ad7816_store_mode() 137 chip->mode = AD7816_PD; ad7816_store_mode() 163 struct ad7816_chip_info *chip = iio_priv(indio_dev); ad7816_show_channel() local 165 return sprintf(buf, "%d\n", chip->channel_id); ad7816_show_channel() 174 struct ad7816_chip_info *chip = iio_priv(indio_dev); ad7816_store_channel() local 183 dev_err(&chip->spi_dev->dev, "Invalid channel id %lu for %s.\n", ad7816_store_channel() 187 dev_err(&chip->spi_dev->dev, ad7816_store_channel() 191 dev_err(&chip->spi_dev->dev, ad7816_store_channel() 196 chip->channel_id = data; ad7816_store_channel() 212 struct ad7816_chip_info *chip = iio_priv(indio_dev); ad7816_show_value() local 217 ret = ad7816_spi_read(chip, &data); ad7816_show_value() 223 if (chip->channel_id == 0) { ad7816_show_value() 267 struct ad7816_chip_info *chip = iio_priv(indio_dev); ad7816_show_oti() local 270 if (chip->channel_id > AD7816_CS_MAX) { ad7816_show_oti() 271 dev_err(dev, "Invalid oti channel id %d.\n", chip->channel_id); ad7816_show_oti() 273 } else if (chip->channel_id == 0) { ad7816_show_oti() 275 (chip->oti_data[chip->channel_id] - ad7816_show_oti() 279 return sprintf(buf, "%u\n", chip->oti_data[chip->channel_id]); ad7816_show_oti() 288 struct ad7816_chip_info *chip = iio_priv(indio_dev); ad7816_set_oti() local 297 if (chip->channel_id > AD7816_CS_MAX) { ad7816_set_oti() 298 dev_err(dev, "Invalid oti channel id %d.\n", chip->channel_id); ad7816_set_oti() 300 } else if (chip->channel_id == 0) { ad7816_set_oti() 314 ret = ad7816_spi_write(chip, data); ad7816_set_oti() 318 chip->oti_data[chip->channel_id] = data; ad7816_set_oti() 348 struct ad7816_chip_info *chip; ad7816_probe() local 359 indio_dev = devm_iio_device_alloc(&spi_dev->dev, sizeof(*chip)); ad7816_probe() 362 chip = iio_priv(indio_dev); ad7816_probe() 366 chip->spi_dev = spi_dev; ad7816_probe() 368 chip->oti_data[i] = 203; ad7816_probe() 369 chip->rdwr_pin = pins[0]; ad7816_probe() 370 chip->convert_pin = pins[1]; ad7816_probe() 371 chip->busy_pin = pins[2]; ad7816_probe() 373 ret = devm_gpio_request(&spi_dev->dev, chip->rdwr_pin, ad7816_probe() 377 chip->rdwr_pin); ad7816_probe() 380 gpio_direction_input(chip->rdwr_pin); ad7816_probe() 381 ret = devm_gpio_request(&spi_dev->dev, chip->convert_pin, ad7816_probe() 385 chip->convert_pin); ad7816_probe() 388 gpio_direction_input(chip->convert_pin); ad7816_probe() 389 ret = devm_gpio_request(&spi_dev->dev, chip->busy_pin, ad7816_probe() 393 chip->busy_pin); ad7816_probe() 396 gpio_direction_input(chip->busy_pin); ad7816_probe()
/linux-4.1.27/drivers/mtd/lpddr/
H A D	lpddr_cmds.c	44 static int get_chip(struct map_info *map, struct flchip *chip, int mode); 45 static int chip_ready(struct map_info *map, struct flchip *chip, int mode); 46 static void put_chip(struct map_info *map, struct flchip *chip); 52 struct flchip *chip; lpddr_cmdset() local 89 chip = &lpddr->chips[0]; lpddr_cmdset() 95 *chip = lpddr->chips[i]; lpddr_cmdset() 96 chip->start += j << lpddr->chipshift; lpddr_cmdset() 97 chip->oldstate = chip->state = FL_READY; lpddr_cmdset() 98 chip->priv = &shared[i]; lpddr_cmdset() 101 init_waitqueue_head(&chip->wq); lpddr_cmdset() 102 mutex_init(&chip->mutex); lpddr_cmdset() 103 chip++; lpddr_cmdset() 111 static int wait_for_ready(struct map_info *map, struct flchip *chip, wait_for_ready() argument 116 flstate_t chip_state = chip->state; wait_for_ready() 138 mutex_unlock(&chip->mutex); wait_for_ready() 153 mutex_lock(&chip->mutex); wait_for_ready() 155 while (chip->state != chip_state) { wait_for_ready() 159 add_wait_queue(&chip->wq, &wait); wait_for_ready() 160 mutex_unlock(&chip->mutex); wait_for_ready() 162 remove_wait_queue(&chip->wq, &wait); wait_for_ready() 163 mutex_lock(&chip->mutex); wait_for_ready() 165 if (chip->erase_suspended || chip->write_suspended) { wait_for_ready() 168 chip->erase_suspended = chip->write_suspended = 0; wait_for_ready() 180 chip->state = FL_READY; wait_for_ready() 184 static int get_chip(struct map_info *map, struct flchip *chip, int mode) get_chip() argument 190 if (chip->priv && (mode == FL_WRITING || mode == FL_ERASING) get_chip() 191 && chip->state != FL_SYNCING) { get_chip() 194 * operations which are global to the real chip and not per get_chip() 210 struct flchip_shared *shared = chip->priv; get_chip() 214 if (contender && contender != chip) { get_chip() 218 * Let's fight over it in the context of the chip get_chip() 228 mutex_unlock(&chip->mutex); get_chip() 230 mutex_lock(&chip->mutex); get_chip() 242 /* We should not own chip if it is already in FL_SYNCING get_chip() 244 if (chip->state == FL_SYNCING) { get_chip() 252 /* Check if we have suspended erase on this chip. get_chip() 258 add_wait_queue(&chip->wq, &wait); get_chip() 259 mutex_unlock(&chip->mutex); get_chip() 261 remove_wait_queue(&chip->wq, &wait); get_chip() 262 mutex_lock(&chip->mutex); get_chip() 267 shared->writing = chip; get_chip() 269 shared->erasing = chip; get_chip() 273 ret = chip_ready(map, chip, mode); get_chip() 280 static int chip_ready(struct map_info *map, struct flchip *chip, int mode) chip_ready() argument 286 /* Prevent setting state FL_SYNCING for chip in suspended state. */ chip_ready() 287 if (FL_SYNCING == mode && FL_READY != chip->oldstate) chip_ready() 290 switch (chip->state) { chip_ready() 302 chip->oldstate = FL_ERASING; chip_ready() 303 chip->state = FL_ERASE_SUSPENDING; chip_ready() 304 ret = wait_for_ready(map, chip, 0); chip_ready() 308 put_chip(map, chip); chip_ready() 313 chip->erase_suspended = 1; chip_ready() 314 chip->state = FL_READY; chip_ready() 319 if (mode == FL_READY && chip->oldstate == FL_READY) chip_ready() 325 add_wait_queue(&chip->wq, &wait); chip_ready() 326 mutex_unlock(&chip->mutex); chip_ready() 328 remove_wait_queue(&chip->wq, &wait); chip_ready() 329 mutex_lock(&chip->mutex); chip_ready() 334 static void put_chip(struct map_info *map, struct flchip *chip) put_chip() argument 336 if (chip->priv) { put_chip() 337 struct flchip_shared *shared = chip->priv; put_chip() 339 if (shared->writing == chip && chip->oldstate == FL_READY) { put_chip() 342 if (shared->writing && shared->writing != chip) { put_chip() 347 mutex_unlock(&chip->mutex); put_chip() 349 mutex_lock(&chip->mutex); put_chip() 351 wake_up(&chip->wq); put_chip() 356 } else if (shared->erasing == chip && shared->writing != chip) { put_chip() 365 wake_up(&chip->wq); put_chip() 371 switch (chip->oldstate) { put_chip() 377 chip->oldstate = FL_READY; put_chip() 378 chip->state = FL_ERASING; put_chip() 384 map->name, chip->oldstate); put_chip() 386 wake_up(&chip->wq); put_chip() 389 static int do_write_buffer(struct map_info *map, struct flchip *chip, do_write_buffer() argument 402 mutex_lock(&chip->mutex); do_write_buffer() 403 ret = get_chip(map, chip, FL_WRITING); do_write_buffer() 405 mutex_unlock(&chip->mutex); do_write_buffer() 457 chip->state = FL_WRITING; do_write_buffer() 458 ret = wait_for_ready(map, chip, (1<<lpddr->qinfo->ProgBufferTime)); do_write_buffer() 465 out: put_chip(map, chip); do_write_buffer() 466 mutex_unlock(&chip->mutex); do_write_buffer() 475 struct flchip *chip = &lpddr->chips[chipnum]; do_erase_oneblock() local 478 mutex_lock(&chip->mutex); do_erase_oneblock() 479 ret = get_chip(map, chip, FL_ERASING); do_erase_oneblock() 481 mutex_unlock(&chip->mutex); do_erase_oneblock() 485 chip->state = FL_ERASING; do_erase_oneblock() 486 ret = wait_for_ready(map, chip, (1<<lpddr->qinfo->BlockEraseTime)*1000); do_erase_oneblock() 492 out: put_chip(map, chip); do_erase_oneblock() 493 mutex_unlock(&chip->mutex); do_erase_oneblock() 503 struct flchip *chip = &lpddr->chips[chipnum]; lpddr_read() local 506 mutex_lock(&chip->mutex); lpddr_read() 507 ret = get_chip(map, chip, FL_READY); lpddr_read() 509 mutex_unlock(&chip->mutex); lpddr_read() 516 put_chip(map, chip); lpddr_read() 517 mutex_unlock(&chip->mutex); lpddr_read() 528 struct flchip *chip = &lpddr->chips[chipnum]; lpddr_point() local 534 /* ofs: offset within the first chip that the first read should start */ lpddr_point() 536 *mtdbuf = (void *)map->virt + chip->start + ofs; lpddr_point() 546 last_end = chip->start; lpddr_point() 547 else if (chip->start != last_end) lpddr_point() 554 /* get the chip */ lpddr_point() 555 mutex_lock(&chip->mutex); lpddr_point() 556 ret = get_chip(map, chip, FL_POINT); lpddr_point() 557 mutex_unlock(&chip->mutex); lpddr_point() 561 chip->state = FL_POINT; lpddr_point() 562 chip->ref_point_counter++; lpddr_point() 569 chip = &lpddr->chips[chipnum]; lpddr_point() 581 /* ofs: offset within the first chip that the first read should start */ lpddr_unpoint() 586 struct flchip *chip; lpddr_unpoint() local 588 chip = &lpddr->chips[chipnum]; lpddr_unpoint() 597 mutex_lock(&chip->mutex); lpddr_unpoint() 598 if (chip->state == FL_POINT) { lpddr_unpoint() 599 chip->ref_point_counter--; lpddr_unpoint() 600 if (chip->ref_point_counter == 0) lpddr_unpoint() 601 chip->state = FL_READY; lpddr_unpoint() 608 put_chip(map, chip); lpddr_unpoint() 609 mutex_unlock(&chip->mutex); lpddr_unpoint() 669 /* Be nice and reschedule with the chip in a usable lpddr_writev() 710 struct flchip *chip = &lpddr->chips[chipnum]; do_xxlock() local 712 mutex_lock(&chip->mutex); do_xxlock() 713 ret = get_chip(map, chip, FL_LOCKING); do_xxlock() 715 mutex_unlock(&chip->mutex); do_xxlock() 721 chip->state = FL_LOCKING; do_xxlock() 724 chip->state = FL_UNLOCKING; do_xxlock() 728 ret = wait_for_ready(map, chip, 1); do_xxlock() 734 out: put_chip(map, chip); do_xxlock() 735 mutex_unlock(&chip->mutex); do_xxlock()
/linux-4.1.27/drivers/media/usb/usbtv/
H A D	usbtv-audio.c	53 struct usbtv *chip = snd_pcm_substream_chip(substream); snd_usbtv_pcm_open() local 56 chip->snd_substream = substream; snd_usbtv_pcm_open() 64 struct usbtv *chip = snd_pcm_substream_chip(substream); snd_usbtv_pcm_close() local 66 if (atomic_read(&chip->snd_stream)) { snd_usbtv_pcm_close() 67 atomic_set(&chip->snd_stream, 0); snd_usbtv_pcm_close() 68 schedule_work(&chip->snd_trigger); snd_usbtv_pcm_close() 78 struct usbtv *chip = snd_pcm_substream_chip(substream); snd_usbtv_hw_params() local 84 dev_warn(chip->dev, "pcm audio buffer allocation failure %i\n", snd_usbtv_hw_params() 100 struct usbtv *chip = snd_pcm_substream_chip(substream); snd_usbtv_prepare() local 102 chip->snd_buffer_pos = 0; snd_usbtv_prepare() 103 chip->snd_period_pos = 0; snd_usbtv_prepare() 110 struct usbtv *chip = urb->context; usbtv_audio_urb_received() local 111 struct snd_pcm_substream *substream = chip->snd_substream; usbtv_audio_urb_received() 127 dev_warn(chip->dev, "unknown audio urb status %i\n", usbtv_audio_urb_received() 131 if (!atomic_read(&chip->snd_stream)) usbtv_audio_urb_received() 137 buffer_pos = chip->snd_buffer_pos; usbtv_audio_urb_received() 138 period_pos = chip->snd_period_pos; usbtv_audio_urb_received() 170 chip->snd_buffer_pos = buffer_pos; usbtv_audio_urb_received() 171 chip->snd_period_pos = period_pos; usbtv_audio_urb_received() 181 static int usbtv_audio_start(struct usbtv *chip) usbtv_audio_start() argument 209 chip->snd_bulk_urb = usb_alloc_urb(0, GFP_KERNEL); usbtv_audio_start() 210 if (chip->snd_bulk_urb == NULL) usbtv_audio_start() 213 pipe = usb_rcvbulkpipe(chip->udev, USBTV_AUDIO_ENDP); usbtv_audio_start() 215 chip->snd_bulk_urb->transfer_buffer = kzalloc( usbtv_audio_start() 217 if (chip->snd_bulk_urb->transfer_buffer == NULL) usbtv_audio_start() 220 usb_fill_bulk_urb(chip->snd_bulk_urb, chip->udev, pipe, usbtv_audio_start() 221 chip->snd_bulk_urb->transfer_buffer, USBTV_AUDIO_URBSIZE, usbtv_audio_start() 222 usbtv_audio_urb_received, chip); usbtv_audio_start() 225 usbtv_set_regs(chip, setup, ARRAY_SIZE(setup)); usbtv_audio_start() 227 usb_clear_halt(chip->udev, pipe); usbtv_audio_start() 228 usb_submit_urb(chip->snd_bulk_urb, GFP_ATOMIC); usbtv_audio_start() 233 usb_free_urb(chip->snd_bulk_urb); usbtv_audio_start() 234 chip->snd_bulk_urb = NULL; usbtv_audio_start() 240 static int usbtv_audio_stop(struct usbtv *chip) usbtv_audio_stop() argument 253 if (chip->snd_bulk_urb) { usbtv_audio_stop() 254 usb_kill_urb(chip->snd_bulk_urb); usbtv_audio_stop() 255 kfree(chip->snd_bulk_urb->transfer_buffer); usbtv_audio_stop() 256 usb_free_urb(chip->snd_bulk_urb); usbtv_audio_stop() 257 chip->snd_bulk_urb = NULL; usbtv_audio_stop() 260 usbtv_set_regs(chip, setup, ARRAY_SIZE(setup)); usbtv_audio_stop() 279 struct usbtv *chip = container_of(work, struct usbtv, snd_trigger); snd_usbtv_trigger() local 281 if (atomic_read(&chip->snd_stream)) snd_usbtv_trigger() 282 usbtv_audio_start(chip); snd_usbtv_trigger() 284 usbtv_audio_stop(chip); snd_usbtv_trigger() 289 struct usbtv *chip = snd_pcm_substream_chip(substream); snd_usbtv_card_trigger() local 295 atomic_set(&chip->snd_stream, 1); snd_usbtv_card_trigger() 300 atomic_set(&chip->snd_stream, 0); snd_usbtv_card_trigger() 306 schedule_work(&chip->snd_trigger); snd_usbtv_card_trigger() 313 struct usbtv *chip = snd_pcm_substream_chip(substream); snd_usbtv_pointer() local 315 return chip->snd_buffer_pos; snd_usbtv_pointer()
/linux-4.1.27/arch/mips/jz4740/
H A D	gpio.c	75 #define CHIP_TO_REG(chip, reg) (gpio_chip_to_jz_gpio_chip(chip)->base + (reg)) 207 static int jz_gpio_get_value(struct gpio_chip *chip, unsigned gpio) jz_gpio_get_value() argument 209 return !!(readl(CHIP_TO_REG(chip, JZ_REG_GPIO_PIN)) & BIT(gpio)); jz_gpio_get_value() 212 static void jz_gpio_set_value(struct gpio_chip *chip, unsigned gpio, int value) jz_gpio_set_value() argument 214 uint32_t __iomem *reg = CHIP_TO_REG(chip, JZ_REG_GPIO_DATA_SET); jz_gpio_set_value() 219 static int jz_gpio_direction_output(struct gpio_chip *chip, unsigned gpio, jz_gpio_direction_output() argument 222 writel(BIT(gpio), CHIP_TO_REG(chip, JZ_REG_GPIO_DIRECTION_SET)); jz_gpio_direction_output() 223 jz_gpio_set_value(chip, gpio, value); jz_gpio_direction_output() 228 static int jz_gpio_direction_input(struct gpio_chip *chip, unsigned gpio) jz_gpio_direction_input() argument 230 writel(BIT(gpio), CHIP_TO_REG(chip, JZ_REG_GPIO_DIRECTION_CLEAR)); jz_gpio_direction_input() 280 static void jz_gpio_check_trigger_both(struct jz_gpio_chip *chip, unsigned int irq) jz_gpio_check_trigger_both() argument 286 if (!(chip->edge_trigger_both & mask)) jz_gpio_check_trigger_both() 289 reg = chip->base; jz_gpio_check_trigger_both() 291 value = readl(chip->base + JZ_REG_GPIO_PIN); jz_gpio_check_trigger_both() 304 struct jz_gpio_chip *chip = irq_desc_get_handler_data(desc); jz_gpio_irq_demux_handler() local 306 flag = readl(chip->base + JZ_REG_GPIO_FLAG); jz_gpio_irq_demux_handler() 310 gpio_irq = chip->irq_base + __fls(flag); jz_gpio_irq_demux_handler() 312 jz_gpio_check_trigger_both(chip, gpio_irq); jz_gpio_irq_demux_handler() 319 struct jz_gpio_chip *chip = irq_to_jz_gpio_chip(data); jz_gpio_set_irq_bit() local 320 writel(IRQ_TO_BIT(data->irq), chip->base + reg); jz_gpio_set_irq_bit() 325 struct jz_gpio_chip *chip = irq_to_jz_gpio_chip(data); jz_gpio_irq_unmask() local 327 jz_gpio_check_trigger_both(chip, data->irq); jz_gpio_irq_unmask() 350 struct jz_gpio_chip *chip = irq_to_jz_gpio_chip(data); jz_gpio_irq_set_type() local 354 uint32_t value = readl(chip->base + JZ_REG_GPIO_PIN); jz_gpio_irq_set_type() 359 chip->edge_trigger_both |= IRQ_TO_BIT(irq); jz_gpio_irq_set_type() 361 chip->edge_trigger_both &= ~IRQ_TO_BIT(irq); jz_gpio_irq_set_type() 390 struct jz_gpio_chip *chip = irq_to_jz_gpio_chip(data); jz_gpio_irq_set_wake() local 393 irq_set_irq_wake(chip->irq, on); jz_gpio_irq_set_wake() 419 static void jz4740_gpio_chip_init(struct jz_gpio_chip *chip, unsigned int id) jz4740_gpio_chip_init() argument 424 chip->base = ioremap(JZ4740_GPIO_BASE_ADDR + (id * 0x100), 0x100); jz4740_gpio_chip_init() 426 chip->irq = JZ4740_IRQ_INTC_GPIO(id); jz4740_gpio_chip_init() 427 irq_set_handler_data(chip->irq, chip); jz4740_gpio_chip_init() 428 irq_set_chained_handler(chip->irq, jz_gpio_irq_demux_handler); jz4740_gpio_chip_init() 430 gc = irq_alloc_generic_chip(chip->gpio_chip.label, 1, chip->irq_base, jz4740_gpio_chip_init() 431 chip->base, handle_level_irq); jz4740_gpio_chip_init() 433 gc->wake_enabled = IRQ_MSK(chip->gpio_chip.ngpio); jz4740_gpio_chip_init() 434 gc->private = chip; jz4740_gpio_chip_init() 441 ct->chip.name = "GPIO"; jz4740_gpio_chip_init() 442 ct->chip.irq_mask = irq_gc_mask_disable_reg; jz4740_gpio_chip_init() 443 ct->chip.irq_unmask = jz_gpio_irq_unmask; jz4740_gpio_chip_init() 444 ct->chip.irq_ack = irq_gc_ack_set_bit; jz4740_gpio_chip_init() 445 ct->chip.irq_suspend = jz4740_irq_suspend; jz4740_gpio_chip_init() 446 ct->chip.irq_resume = jz4740_irq_resume; jz4740_gpio_chip_init() 447 ct->chip.irq_startup = jz_gpio_irq_startup; jz4740_gpio_chip_init() 448 ct->chip.irq_shutdown = jz_gpio_irq_shutdown; jz4740_gpio_chip_init() 449 ct->chip.irq_set_type = jz_gpio_irq_set_type; jz4740_gpio_chip_init() 450 ct->chip.irq_set_wake = jz_gpio_irq_set_wake; jz4740_gpio_chip_init() 451 ct->chip.flags = IRQCHIP_SET_TYPE_MASKED; jz4740_gpio_chip_init() 453 irq_setup_generic_chip(gc, IRQ_MSK(chip->gpio_chip.ngpio), jz4740_gpio_chip_init() 456 gpiochip_add(&chip->gpio_chip); jz4740_gpio_chip_init() 474 static inline void gpio_seq_reg(struct seq_file *s, struct jz_gpio_chip *chip, gpio_seq_reg() argument 477 seq_printf(s, "\t%s: %08x\n", name, readl(chip->base + reg)); gpio_seq_reg() 482 struct jz_gpio_chip *chip = jz4740_gpio_chips; gpio_regs_show() local 485 for (i = 0; i < ARRAY_SIZE(jz4740_gpio_chips); ++i, ++chip) { gpio_regs_show() 487 gpio_seq_reg(s, chip, "Pin", JZ_REG_GPIO_PIN); gpio_regs_show() 488 gpio_seq_reg(s, chip, "Data", JZ_REG_GPIO_DATA); gpio_regs_show() 489 gpio_seq_reg(s, chip, "Mask", JZ_REG_GPIO_MASK); gpio_regs_show() 490 gpio_seq_reg(s, chip, "Pull", JZ_REG_GPIO_PULL); gpio_regs_show() 491 gpio_seq_reg(s, chip, "Func", JZ_REG_GPIO_FUNC); gpio_regs_show() 492 gpio_seq_reg(s, chip, "Select", JZ_REG_GPIO_SELECT); gpio_regs_show() 493 gpio_seq_reg(s, chip, "Direction", JZ_REG_GPIO_DIRECTION); gpio_regs_show() 494 gpio_seq_reg(s, chip, "Trigger", JZ_REG_GPIO_TRIGGER); gpio_regs_show() 495 gpio_seq_reg(s, chip, "Flag", JZ_REG_GPIO_FLAG); gpio_regs_show()
/linux-4.1.27/kernel/irq/
H A D	Makefile	2 obj-y := irqdesc.o handle.o manage.o spurious.o resend.o chip.o dummychip.o devres.o 3 obj-$(CONFIG_GENERIC_IRQ_CHIP) += generic-chip.o
/linux-4.1.27/drivers/pinctrl/bcm/
H A D	pinctrl-cygnus-gpio.c	76 * @gc: GPIO chip 122 static inline void cygnus_set_bit(struct cygnus_gpio *chip, unsigned int reg, cygnus_set_bit() argument 129 val = readl(chip->base + offset); cygnus_set_bit() 134 writel(val, chip->base + offset); cygnus_set_bit() 137 static inline bool cygnus_get_bit(struct cygnus_gpio *chip, unsigned int reg, cygnus_get_bit() argument 143 return !!(readl(chip->base + offset) & BIT(shift)); cygnus_get_bit() 149 struct cygnus_gpio *chip = to_cygnus_gpio(gc); cygnus_gpio_irq_handler() local 156 for (i = 0; i < chip->num_banks; i++) { cygnus_gpio_irq_handler() 157 unsigned long val = readl(chip->base + (i * GPIO_BANK_SIZE) + cygnus_gpio_irq_handler() 168 writel(BIT(bit), chip->base + (i * GPIO_BANK_SIZE) + cygnus_gpio_irq_handler() 182 struct cygnus_gpio *chip = to_cygnus_gpio(gc); cygnus_gpio_irq_ack() local 189 writel(val, chip->base + offset); cygnus_gpio_irq_ack() 195 * @d: IRQ chip data 201 struct cygnus_gpio *chip = to_cygnus_gpio(gc); cygnus_gpio_irq_set_mask() local 204 cygnus_set_bit(chip, CYGNUS_GPIO_INT_MSK_OFFSET, gpio, unmask); cygnus_gpio_irq_set_mask() 210 struct cygnus_gpio *chip = to_cygnus_gpio(gc); cygnus_gpio_irq_mask() local 213 spin_lock_irqsave(&chip->lock, flags); cygnus_gpio_irq_mask() 215 spin_unlock_irqrestore(&chip->lock, flags); cygnus_gpio_irq_mask() 221 struct cygnus_gpio *chip = to_cygnus_gpio(gc); cygnus_gpio_irq_unmask() local 224 spin_lock_irqsave(&chip->lock, flags); cygnus_gpio_irq_unmask() 226 spin_unlock_irqrestore(&chip->lock, flags); cygnus_gpio_irq_unmask() 232 struct cygnus_gpio *chip = to_cygnus_gpio(gc); cygnus_gpio_irq_set_type() local 261 dev_err(chip->dev, "invalid GPIO IRQ type 0x%x\n", cygnus_gpio_irq_set_type() 266 spin_lock_irqsave(&chip->lock, flags); cygnus_gpio_irq_set_type() 267 cygnus_set_bit(chip, CYGNUS_GPIO_IN_TYPE_OFFSET, gpio, cygnus_gpio_irq_set_type() 269 cygnus_set_bit(chip, CYGNUS_GPIO_INT_DE_OFFSET, gpio, dual_edge); cygnus_gpio_irq_set_type() 270 cygnus_set_bit(chip, CYGNUS_GPIO_INT_EDGE_OFFSET, gpio, cygnus_gpio_irq_set_type() 272 spin_unlock_irqrestore(&chip->lock, flags); cygnus_gpio_irq_set_type() 274 dev_dbg(chip->dev, cygnus_gpio_irq_set_type() 294 struct cygnus_gpio *chip = to_cygnus_gpio(gc); cygnus_gpio_request() local 298 if (!chip->pinmux_is_supported) cygnus_gpio_request() 306 struct cygnus_gpio *chip = to_cygnus_gpio(gc); cygnus_gpio_free() local 309 if (!chip->pinmux_is_supported) cygnus_gpio_free() 317 struct cygnus_gpio *chip = to_cygnus_gpio(gc); cygnus_gpio_direction_input() local 320 spin_lock_irqsave(&chip->lock, flags); cygnus_gpio_direction_input() 321 cygnus_set_bit(chip, CYGNUS_GPIO_OUT_EN_OFFSET, gpio, false); cygnus_gpio_direction_input() 322 spin_unlock_irqrestore(&chip->lock, flags); cygnus_gpio_direction_input() 324 dev_dbg(chip->dev, "gpio:%u set input\n", gpio); cygnus_gpio_direction_input() 332 struct cygnus_gpio *chip = to_cygnus_gpio(gc); cygnus_gpio_direction_output() local 335 spin_lock_irqsave(&chip->lock, flags); cygnus_gpio_direction_output() 336 cygnus_set_bit(chip, CYGNUS_GPIO_OUT_EN_OFFSET, gpio, true); cygnus_gpio_direction_output() 337 cygnus_set_bit(chip, CYGNUS_GPIO_DATA_OUT_OFFSET, gpio, !!(val)); cygnus_gpio_direction_output() 338 spin_unlock_irqrestore(&chip->lock, flags); cygnus_gpio_direction_output() 340 dev_dbg(chip->dev, "gpio:%u set output, value:%d\n", gpio, val); cygnus_gpio_direction_output() 347 struct cygnus_gpio *chip = to_cygnus_gpio(gc); cygnus_gpio_set() local 350 spin_lock_irqsave(&chip->lock, flags); cygnus_gpio_set() 351 cygnus_set_bit(chip, CYGNUS_GPIO_DATA_OUT_OFFSET, gpio, !!(val)); cygnus_gpio_set() 352 spin_unlock_irqrestore(&chip->lock, flags); cygnus_gpio_set() 354 dev_dbg(chip->dev, "gpio:%u set, value:%d\n", gpio, val); cygnus_gpio_set() 359 struct cygnus_gpio *chip = to_cygnus_gpio(gc); cygnus_gpio_get() local 364 return !!(readl(chip->base + offset) & BIT(shift)); cygnus_gpio_get() 389 static int cygnus_gpio_set_pull(struct cygnus_gpio *chip, unsigned gpio, cygnus_gpio_set_pull() argument 394 spin_lock_irqsave(&chip->lock, flags); cygnus_gpio_set_pull() 397 cygnus_set_bit(chip, CYGNUS_GPIO_RES_EN_OFFSET, gpio, false); cygnus_gpio_set_pull() 399 cygnus_set_bit(chip, CYGNUS_GPIO_PAD_RES_OFFSET, gpio, cygnus_gpio_set_pull() 401 cygnus_set_bit(chip, CYGNUS_GPIO_RES_EN_OFFSET, gpio, true); cygnus_gpio_set_pull() 404 spin_unlock_irqrestore(&chip->lock, flags); cygnus_gpio_set_pull() 406 dev_dbg(chip->dev, "gpio:%u set pullup:%d\n", gpio, pull_up); cygnus_gpio_set_pull() 411 static void cygnus_gpio_get_pull(struct cygnus_gpio *chip, unsigned gpio, cygnus_gpio_get_pull() argument 416 spin_lock_irqsave(&chip->lock, flags); cygnus_gpio_get_pull() 417 *disable = !cygnus_get_bit(chip, CYGNUS_GPIO_RES_EN_OFFSET, gpio); cygnus_gpio_get_pull() 418 *pull_up = cygnus_get_bit(chip, CYGNUS_GPIO_PAD_RES_OFFSET, gpio); cygnus_gpio_get_pull() 419 spin_unlock_irqrestore(&chip->lock, flags); cygnus_gpio_get_pull() 422 static int cygnus_gpio_set_strength(struct cygnus_gpio *chip, unsigned gpio, cygnus_gpio_set_strength() argument 434 if (chip->io_ctrl) { cygnus_gpio_set_strength() 435 base = chip->io_ctrl; cygnus_gpio_set_strength() 438 base = chip->base; cygnus_gpio_set_strength() 445 dev_dbg(chip->dev, "gpio:%u set drive strength:%d mA\n", gpio, cygnus_gpio_set_strength() 448 spin_lock_irqsave(&chip->lock, flags); cygnus_gpio_set_strength() 457 spin_unlock_irqrestore(&chip->lock, flags); cygnus_gpio_set_strength() 462 static int cygnus_gpio_get_strength(struct cygnus_gpio *chip, unsigned gpio, cygnus_gpio_get_strength() argument 470 if (chip->io_ctrl) { cygnus_gpio_get_strength() 471 base = chip->io_ctrl; cygnus_gpio_get_strength() 474 base = chip->base; cygnus_gpio_get_strength() 481 spin_lock_irqsave(&chip->lock, flags); cygnus_gpio_get_strength() 492 spin_unlock_irqrestore(&chip->lock, flags); cygnus_gpio_get_strength() 500 struct cygnus_gpio *chip = pinctrl_dev_get_drvdata(pctldev); cygnus_pin_config_get() local 509 cygnus_gpio_get_pull(chip, gpio, &disable, &pull_up); cygnus_pin_config_get() 516 cygnus_gpio_get_pull(chip, gpio, &disable, &pull_up); cygnus_pin_config_get() 523 cygnus_gpio_get_pull(chip, gpio, &disable, &pull_up); cygnus_pin_config_get() 530 ret = cygnus_gpio_get_strength(chip, gpio, &arg); cygnus_pin_config_get() 548 struct cygnus_gpio *chip = pinctrl_dev_get_drvdata(pctldev); cygnus_pin_config_set() local 560 ret = cygnus_gpio_set_pull(chip, gpio, true, false); cygnus_pin_config_set() 566 ret = cygnus_gpio_set_pull(chip, gpio, false, true); cygnus_pin_config_set() 572 ret = cygnus_gpio_set_pull(chip, gpio, false, false); cygnus_pin_config_set() 578 ret = cygnus_gpio_set_strength(chip, gpio, arg); cygnus_pin_config_set() 584 dev_err(chip->dev, "invalid configuration\n"); cygnus_pin_config_set() 675 static int cygnus_gpio_pinmux_add_range(struct cygnus_gpio *chip) cygnus_gpio_pinmux_add_range() argument 677 struct device_node *node = chip->dev->of_node; cygnus_gpio_pinmux_add_range() 680 struct gpio_chip *gc = &chip->gc; cygnus_gpio_pinmux_add_range() 692 dev_err(chip->dev, "failed to get pinmux device\n"); cygnus_gpio_pinmux_add_range() 703 dev_err(chip->dev, "unable to add GPIO pin range\n"); cygnus_gpio_pinmux_add_range() 708 chip->pinmux_is_supported = true; cygnus_gpio_pinmux_add_range() 727 static int cygnus_gpio_register_pinconf(struct cygnus_gpio *chip) cygnus_gpio_register_pinconf() argument 729 struct pinctrl_desc *pctldesc = &chip->pctldesc; cygnus_gpio_register_pinconf() 731 struct gpio_chip *gc = &chip->gc; cygnus_gpio_register_pinconf() 734 pins = devm_kcalloc(chip->dev, gc->ngpio, sizeof(*pins), GFP_KERNEL); cygnus_gpio_register_pinconf() 740 pins[i].name = devm_kasprintf(chip->dev, GFP_KERNEL, cygnus_gpio_register_pinconf() 746 pctldesc->name = dev_name(chip->dev); cygnus_gpio_register_pinconf() 752 chip->pctl = pinctrl_register(pctldesc, chip->dev, chip); cygnus_gpio_register_pinconf() 753 if (!chip->pctl) { cygnus_gpio_register_pinconf() 754 dev_err(chip->dev, "unable to register pinctrl device\n"); cygnus_gpio_register_pinconf() 761 static void cygnus_gpio_unregister_pinconf(struct cygnus_gpio *chip) cygnus_gpio_unregister_pinconf() argument 763 if (chip->pctl) cygnus_gpio_unregister_pinconf() 764 pinctrl_unregister(chip->pctl); cygnus_gpio_unregister_pinconf() 802 struct cygnus_gpio *chip; cygnus_gpio_probe() local 815 chip = devm_kzalloc(dev, sizeof(*chip), GFP_KERNEL); cygnus_gpio_probe() 816 if (!chip) cygnus_gpio_probe() 819 chip->dev = dev; cygnus_gpio_probe() 820 platform_set_drvdata(pdev, chip); cygnus_gpio_probe() 823 chip->base = devm_ioremap_resource(dev, res); cygnus_gpio_probe() 824 if (IS_ERR(chip->base)) { cygnus_gpio_probe() 826 return PTR_ERR(chip->base); cygnus_gpio_probe() 831 chip->io_ctrl = devm_ioremap_resource(dev, res); cygnus_gpio_probe() 832 if (IS_ERR(chip->io_ctrl)) { cygnus_gpio_probe() 834 return PTR_ERR(chip->io_ctrl); cygnus_gpio_probe() 838 spin_lock_init(&chip->lock); cygnus_gpio_probe() 840 gc = &chip->gc; cygnus_gpio_probe() 843 chip->num_banks = (ngpios + NGPIOS_PER_BANK - 1) / NGPIOS_PER_BANK; cygnus_gpio_probe() 856 dev_err(dev, "unable to add GPIO chip\n"); cygnus_gpio_probe() 860 ret = cygnus_gpio_pinmux_add_range(chip); cygnus_gpio_probe() 866 ret = cygnus_gpio_register_pinconf(chip); cygnus_gpio_probe() 889 cygnus_gpio_unregister_pinconf(chip); cygnus_gpio_probe()
/linux-4.1.27/drivers/net/ethernet/tile/
H A D	Makefile	2 # Makefile for the TILE on-chip networking support.
/linux-4.1.27/drivers/sh/intc/
H A D	Makefile	1 obj-y := access.o chip.o core.o handle.o irqdomain.o virq.o
/linux-4.1.27/drivers/char/tpm/st33zp24/
H A D	st33zp24.c	77 struct tpm_chip *chip; member in struct:st33zp24_dev 101 * @param: chip, the tpm_chip description as specified in driver/char/tpm/tpm.h 103 static void st33zp24_cancel(struct tpm_chip *chip) st33zp24_cancel() argument 108 tpm_dev = (struct st33zp24_dev *)TPM_VPRIV(chip); st33zp24_cancel() 116 * @param: chip, the tpm chip description 119 static u8 st33zp24_status(struct tpm_chip *chip) st33zp24_status() argument 124 tpm_dev = (struct st33zp24_dev *)TPM_VPRIV(chip); st33zp24_status() 132 * @param: chip, the tpm chip description 135 static int check_locality(struct tpm_chip *chip) check_locality() argument 141 tpm_dev = (struct st33zp24_dev *)TPM_VPRIV(chip); check_locality() 147 return chip->vendor.locality; check_locality() 154 * @param: chip, the chip description 157 static int request_locality(struct tpm_chip *chip) request_locality() argument 164 if (check_locality(chip) == chip->vendor.locality) request_locality() 165 return chip->vendor.locality; request_locality() 167 tpm_dev = (struct st33zp24_dev *)TPM_VPRIV(chip); request_locality() 174 stop = jiffies + chip->vendor.timeout_a; request_locality() 178 if (check_locality(chip) >= 0) request_locality() 179 return chip->vendor.locality; request_locality() 189 * @param: chip, the tpm chip description. 191 static void release_locality(struct tpm_chip *chip) release_locality() argument 196 tpm_dev = (struct st33zp24_dev *)TPM_VPRIV(chip); release_locality() 204 * @param: chip, the chip description 207 static int get_burstcount(struct tpm_chip *chip) get_burstcount() argument 214 tpm_dev = (struct st33zp24_dev *)TPM_VPRIV(chip); get_burstcount() 216 stop = jiffies + chip->vendor.timeout_d; get_burstcount() 240 * @param: chip, chip description 247 static bool wait_for_tpm_stat_cond(struct tpm_chip *chip, u8 mask, wait_for_tpm_stat_cond() argument 250 u8 status = chip->ops->status(chip); wait_for_tpm_stat_cond() 255 if (check_cancel && chip->ops->req_canceled(chip, status)) { wait_for_tpm_stat_cond() 264 * @param: chip, the tpm chip description 271 static int wait_for_stat(struct tpm_chip *chip, u8 mask, unsigned long timeout, wait_for_stat() argument 282 tpm_dev = (struct st33zp24_dev *)TPM_VPRIV(chip); wait_for_stat() 285 status = st33zp24_status(chip); wait_for_stat() 291 if (chip->vendor.irq) { wait_for_stat() 294 enable_irq(chip->vendor.irq); wait_for_stat() 308 condition = wait_for_tpm_stat_cond(chip, mask, wait_for_stat() 317 disable_irq_nosync(chip->vendor.irq); wait_for_stat() 322 status = chip->ops->status(chip); wait_for_stat() 333 * @param: chip, the tpm chip description 338 static int recv_data(struct tpm_chip *chip, u8 *buf, size_t count) recv_data() argument 343 tpm_dev = (struct st33zp24_dev *)TPM_VPRIV(chip); recv_data() 346 wait_for_stat(chip, recv_data() 348 chip->vendor.timeout_c, recv_data() 349 &chip->vendor.read_queue, true) == 0) { recv_data() 350 burstcnt = get_burstcount(chip); recv_data() 366 * @param: irq, the tpm chip description 367 * @param: dev_id, the description of the chip 372 struct tpm_chip *chip = dev_id; tpm_ioserirq_handler() local 375 tpm_dev = (struct st33zp24_dev *)TPM_VPRIV(chip); tpm_ioserirq_handler() 378 wake_up_interruptible(&chip->vendor.read_queue); tpm_ioserirq_handler() 379 disable_irq_nosync(chip->vendor.irq); tpm_ioserirq_handler() 387 * @param: chip, the tpm_chip description as specified in driver/char/tpm/tpm.h 393 static int st33zp24_send(struct tpm_chip *chip, unsigned char *buf, st33zp24_send() argument 402 if (!chip) st33zp24_send() 407 tpm_dev = (struct st33zp24_dev *)TPM_VPRIV(chip); st33zp24_send() 409 ret = request_locality(chip); st33zp24_send() 413 status = st33zp24_status(chip); st33zp24_send() 415 st33zp24_cancel(chip); st33zp24_send() 417 (chip, TPM_STS_COMMAND_READY, chip->vendor.timeout_b, st33zp24_send() 418 &chip->vendor.read_queue, false) < 0) { st33zp24_send() 425 burstcnt = get_burstcount(chip); st33zp24_send() 437 status = st33zp24_status(chip); st33zp24_send() 448 status = st33zp24_status(chip); st33zp24_send() 459 if (chip->vendor.irq) { st33zp24_send() 462 ret = wait_for_stat(chip, TPM_STS_DATA_AVAIL | TPM_STS_VALID, st33zp24_send() 463 tpm_calc_ordinal_duration(chip, ordinal), st33zp24_send() 464 &chip->vendor.read_queue, false); st33zp24_send() 471 st33zp24_cancel(chip); st33zp24_send() 472 release_locality(chip); st33zp24_send() 478 * @param: chip, the tpm_chip description as specified in driver/char/tpm/tpm.h. 484 static int st33zp24_recv(struct tpm_chip *chip, unsigned char *buf, st33zp24_recv() argument 490 if (!chip) st33zp24_recv() 498 size = recv_data(chip, buf, TPM_HEADER_SIZE); st33zp24_recv() 500 dev_err(&chip->dev, "Unable to read header\n"); st33zp24_recv() 510 size += recv_data(chip, &buf[TPM_HEADER_SIZE], st33zp24_recv() 513 dev_err(&chip->dev, "Unable to read remainder of result\n"); st33zp24_recv() 518 st33zp24_cancel(chip); st33zp24_recv() 519 release_locality(chip); st33zp24_recv() 525 * @param: chip, the tpm_chip description as specified in driver/char/tpm/tpm.h. 529 static bool st33zp24_req_canceled(struct tpm_chip *chip, u8 status) st33zp24_req_canceled() argument 556 struct tpm_chip *chip; st33zp24_probe() local 559 chip = tpmm_chip_alloc(dev, &st33zp24_tpm); st33zp24_probe() 560 if (IS_ERR(chip)) st33zp24_probe() 561 return PTR_ERR(chip); st33zp24_probe() 568 TPM_VPRIV(chip) = tpm_dev; st33zp24_probe() 572 chip->vendor.timeout_a = msecs_to_jiffies(TIS_SHORT_TIMEOUT); st33zp24_probe() 573 chip->vendor.timeout_b = msecs_to_jiffies(TIS_LONG_TIMEOUT); st33zp24_probe() 574 chip->vendor.timeout_c = msecs_to_jiffies(TIS_SHORT_TIMEOUT); st33zp24_probe() 575 chip->vendor.timeout_d = msecs_to_jiffies(TIS_SHORT_TIMEOUT); st33zp24_probe() 577 chip->vendor.locality = LOCALITY0; st33zp24_probe() 581 init_waitqueue_head(&chip->vendor.read_queue); st33zp24_probe() 584 if (request_locality(chip) != LOCALITY0) { st33zp24_probe() 592 chip); st33zp24_probe() 594 dev_err(&chip->dev, "TPM SERIRQ signals %d not available\n", st33zp24_probe() 614 chip->vendor.irq = irq; st33zp24_probe() 616 disable_irq_nosync(chip->vendor.irq); st33zp24_probe() 618 tpm_gen_interrupt(chip); st33zp24_probe() 621 tpm_get_timeouts(chip); st33zp24_probe() 622 tpm_do_selftest(chip); st33zp24_probe() 624 return tpm_chip_register(chip); st33zp24_probe() 626 dev_info(&chip->dev, "TPM initialization fail\n"); st33zp24_probe() 636 int st33zp24_remove(struct tpm_chip *chip) st33zp24_remove() argument 638 tpm_chip_unregister(chip); st33zp24_remove() 652 struct tpm_chip *chip = dev_get_drvdata(dev); st33zp24_pm_suspend() local 656 tpm_dev = (struct st33zp24_dev *)TPM_VPRIV(chip); st33zp24_pm_suspend() 674 struct tpm_chip *chip = dev_get_drvdata(dev); st33zp24_pm_resume() local 678 tpm_dev = (struct st33zp24_dev *)TPM_VPRIV(chip); st33zp24_pm_resume() 682 ret = wait_for_stat(chip, st33zp24_pm_resume() 683 TPM_STS_VALID, chip->vendor.timeout_b, st33zp24_pm_resume() 684 &chip->vendor.read_queue, false); st33zp24_pm_resume() 688 tpm_do_selftest(chip); st33zp24_pm_resume()
/linux-4.1.27/drivers/pinctrl/sh-pfc/
H A D	gpio.c	51 static void gpio_get_data_reg(struct sh_pfc_chip *chip, unsigned int offset, gpio_get_data_reg() argument 55 int idx = sh_pfc_get_pin_index(chip->pfc, offset); gpio_get_data_reg() 56 struct sh_pfc_gpio_pin *gpio_pin = &chip->pins[idx]; gpio_get_data_reg() 58 *reg = &chip->regs[gpio_pin->dreg]; gpio_get_data_reg() 62 static u32 gpio_read_data_reg(struct sh_pfc_chip *chip, gpio_read_data_reg() argument 66 void __iomem *mem = address - chip->mem->phys + chip->mem->virt; gpio_read_data_reg() 71 static void gpio_write_data_reg(struct sh_pfc_chip *chip, gpio_write_data_reg() argument 75 void __iomem *mem = address - chip->mem->phys + chip->mem->virt; gpio_write_data_reg() 80 static void gpio_setup_data_reg(struct sh_pfc_chip *chip, unsigned idx) gpio_setup_data_reg() argument 82 struct sh_pfc *pfc = chip->pfc; gpio_setup_data_reg() 83 struct sh_pfc_gpio_pin *gpio_pin = &chip->pins[idx]; gpio_setup_data_reg() 102 static int gpio_setup_data_regs(struct sh_pfc_chip *chip) gpio_setup_data_regs() argument 104 struct sh_pfc *pfc = chip->pfc; gpio_setup_data_regs() 114 chip->regs = devm_kzalloc(pfc->dev, i * sizeof(*chip->regs), gpio_setup_data_regs() 116 if (chip->regs == NULL) gpio_setup_data_regs() 120 chip->regs[i].info = dreg; gpio_setup_data_regs() 121 chip->regs[i].shadow = gpio_read_data_reg(chip, dreg); gpio_setup_data_regs() 128 gpio_setup_data_reg(chip, i); gpio_setup_data_regs() 154 static void gpio_pin_set_value(struct sh_pfc_chip *chip, unsigned offset, gpio_pin_set_value() argument 161 gpio_get_data_reg(chip, offset, &reg, &bit); gpio_pin_set_value() 170 gpio_write_data_reg(chip, reg->info, reg->shadow); gpio_pin_set_value() 188 struct sh_pfc_chip *chip = gpio_to_pfc_chip(gc); gpio_pin_get() local 193 gpio_get_data_reg(chip, offset, &reg, &bit); gpio_pin_get() 197 return (gpio_read_data_reg(chip, reg->info) >> pos) & 1; gpio_pin_get() 228 static int gpio_pin_setup(struct sh_pfc_chip *chip) gpio_pin_setup() argument 230 struct sh_pfc *pfc = chip->pfc; gpio_pin_setup() 231 struct gpio_chip *gc = &chip->gpio_chip; gpio_pin_setup() 234 chip->pins = devm_kzalloc(pfc->dev, pfc->info->nr_pins * gpio_pin_setup() 235 sizeof(*chip->pins), GFP_KERNEL); gpio_pin_setup() 236 if (chip->pins == NULL) gpio_pin_setup() 239 ret = gpio_setup_data_regs(chip); gpio_pin_setup() 293 static int gpio_function_setup(struct sh_pfc_chip *chip) gpio_function_setup() argument 295 struct sh_pfc *pfc = chip->pfc; gpio_function_setup() 296 struct gpio_chip *gc = &chip->gpio_chip; gpio_function_setup() 317 struct sh_pfc_chip *chip; sh_pfc_add_gpiochip() local 320 chip = devm_kzalloc(pfc->dev, sizeof(*chip), GFP_KERNEL); sh_pfc_add_gpiochip() 321 if (unlikely(!chip)) sh_pfc_add_gpiochip() 324 chip->mem = mem; sh_pfc_add_gpiochip() 325 chip->pfc = pfc; sh_pfc_add_gpiochip() 327 ret = setup(chip); sh_pfc_add_gpiochip() 331 ret = gpiochip_add(&chip->gpio_chip); sh_pfc_add_gpiochip() 336 chip->gpio_chip.label, chip->gpio_chip.base, sh_pfc_add_gpiochip() 337 chip->gpio_chip.base + chip->gpio_chip.ngpio - 1); sh_pfc_add_gpiochip() 339 return chip; sh_pfc_add_gpiochip() 344 struct sh_pfc_chip *chip; sh_pfc_register_gpiochip() local 375 /* Register the real GPIOs chip. */ sh_pfc_register_gpiochip() 376 chip = sh_pfc_add_gpiochip(pfc, gpio_pin_setup, &pfc->windows[i]); sh_pfc_register_gpiochip() 377 if (IS_ERR(chip)) sh_pfc_register_gpiochip() 378 return PTR_ERR(chip); sh_pfc_register_gpiochip() 380 pfc->gpio = chip; sh_pfc_register_gpiochip() 392 ret = gpiochip_add_pin_range(&chip->gpio_chip, sh_pfc_register_gpiochip() 400 /* Register the function GPIOs chip. */ sh_pfc_register_gpiochip() 404 chip = sh_pfc_add_gpiochip(pfc, gpio_function_setup, NULL); sh_pfc_register_gpiochip() 405 if (IS_ERR(chip)) sh_pfc_register_gpiochip() 406 return PTR_ERR(chip); sh_pfc_register_gpiochip() 408 pfc->func = chip; sh_pfc_register_gpiochip()
/linux-4.1.27/drivers/pwm/
H A D	core.c	72 static void free_pwms(struct pwm_chip *chip) free_pwms() argument 76 for (i = 0; i < chip->npwm; i++) { free_pwms() 77 struct pwm_device *pwm = &chip->pwms[i]; free_pwms() 81 bitmap_clear(allocated_pwms, chip->base, chip->npwm); free_pwms() 83 kfree(chip->pwms); free_pwms() 84 chip->pwms = NULL; free_pwms() 89 struct pwm_chip *chip; pwmchip_find_by_name() local 96 list_for_each_entry(chip, &pwm_chips, list) { pwmchip_find_by_name() 97 const char *chip_name = dev_name(chip->dev); pwmchip_find_by_name() 101 return chip; pwmchip_find_by_name() 117 if (!try_module_get(pwm->chip->ops->owner)) pwm_device_request() 120 if (pwm->chip->ops->request) { pwm_device_request() 121 err = pwm->chip->ops->request(pwm->chip, pwm); pwm_device_request() 123 module_put(pwm->chip->ops->owner); pwm_device_request() 180 static void of_pwmchip_add(struct pwm_chip *chip) of_pwmchip_add() argument 182 if (!chip->dev || !chip->dev->of_node) of_pwmchip_add() 185 if (!chip->of_xlate) { of_pwmchip_add() 186 chip->of_xlate = of_pwm_simple_xlate; of_pwmchip_add() 187 chip->of_pwm_n_cells = 2; of_pwmchip_add() 190 of_node_get(chip->dev->of_node); of_pwmchip_add() 193 static void of_pwmchip_remove(struct pwm_chip *chip) of_pwmchip_remove() argument 195 if (chip->dev) of_pwmchip_remove() 196 of_node_put(chip->dev->of_node); of_pwmchip_remove() 200 * pwm_set_chip_data() - set private chip data for a PWM 202 * @data: pointer to chip-specific data 216 * pwm_get_chip_data() - get private chip data for a PWM 226 * pwmchip_add() - register a new PWM chip 227 * @chip: the PWM chip to add 229 * Register a new PWM chip. If chip->base < 0 then a dynamically assigned base 232 int pwmchip_add(struct pwm_chip *chip) pwmchip_add() argument 238 if (!chip || !chip->dev || !chip->ops || !chip->ops->config || pwmchip_add() 239 !chip->ops->enable || !chip->ops->disable || !chip->npwm) pwmchip_add() 244 ret = alloc_pwms(chip->base, chip->npwm); pwmchip_add() 248 chip->pwms = kzalloc(chip->npwm * sizeof(*pwm), GFP_KERNEL); pwmchip_add() 249 if (!chip->pwms) { pwmchip_add() 254 chip->base = ret; pwmchip_add() 256 for (i = 0; i < chip->npwm; i++) { pwmchip_add() 257 pwm = &chip->pwms[i]; pwmchip_add() 259 pwm->chip = chip; pwmchip_add() 260 pwm->pwm = chip->base + i; pwmchip_add() 266 bitmap_set(allocated_pwms, chip->base, chip->npwm); pwmchip_add() 268 INIT_LIST_HEAD(&chip->list); pwmchip_add() 269 list_add(&chip->list, &pwm_chips); pwmchip_add() 274 of_pwmchip_add(chip); pwmchip_add() 276 pwmchip_sysfs_export(chip); pwmchip_add() 285 * pwmchip_remove() - remove a PWM chip 286 * @chip: the PWM chip to remove 288 * Removes a PWM chip. This function may return busy if the PWM chip provides 291 int pwmchip_remove(struct pwm_chip *chip) pwmchip_remove() argument 298 for (i = 0; i < chip->npwm; i++) { pwmchip_remove() 299 struct pwm_device *pwm = &chip->pwms[i]; pwmchip_remove() 307 list_del_init(&chip->list); pwmchip_remove() 310 of_pwmchip_remove(chip); pwmchip_remove() 312 free_pwms(chip); pwmchip_remove() 314 pwmchip_sysfs_unexport(chip); pwmchip_remove() 357 * pwm_request_from_chip() - request a PWM device relative to a PWM chip 358 * @chip: PWM chip 359 * @index: per-chip index of the PWM to request 362 * Returns the PWM at the given index of the given PWM chip. A negative error 363 * code is returned if the index is not valid for the specified PWM chip or 366 struct pwm_device *pwm_request_from_chip(struct pwm_chip *chip, pwm_request_from_chip() argument 373 if (!chip || index >= chip->npwm) pwm_request_from_chip() 377 pwm = &chip->pwms[index]; pwm_request_from_chip() 413 err = pwm->chip->ops->config(pwm->chip, pwm, duty_ns, period_ns); pwm_config() 435 if (!pwm || !pwm->chip->ops) pwm_set_polarity() 438 if (!pwm->chip->ops->set_polarity) pwm_set_polarity() 444 err = pwm->chip->ops->set_polarity(pwm->chip, pwm, polarity); pwm_set_polarity() 461 return pwm->chip->ops->enable(pwm->chip, pwm); pwm_enable() 474 pwm->chip->ops->disable(pwm->chip, pwm); pwm_disable() 480 struct pwm_chip *chip; of_node_to_pwmchip() local 484 list_for_each_entry(chip, &pwm_chips, list) of_node_to_pwmchip() 485 if (chip->dev && chip->dev->of_node == np) { of_node_to_pwmchip() 487 return chip; of_node_to_pwmchip() 534 pr_debug("%s(): PWM chip not found\n", __func__); of_pwm_get() 594 * a device tree, a PWM chip and a relative index is looked up via a table 597 * Once a PWM chip has been found the specified PWM device will be requested 604 struct pwm_chip *chip = NULL; pwm_get() local 620 * If a match is found, the provider PWM chip is looked up by name pwm_get() 621 * and a PWM device is requested using the PWM device per-chip index. pwm_get() 665 chip = pwmchip_find_by_name(chosen->provider); pwm_get() 666 if (!chip) pwm_get() 669 pwm = pwm_request_from_chip(chip, chosen->index, con_id ?: dev_id); pwm_get() 698 if (pwm->chip->ops->free) pwm_put() 699 pwm->chip->ops->free(pwm->chip, pwm); pwm_put() 703 module_put(pwm->chip->ops->owner); pwm_put() 805 return pwm->chip->can_sleep; pwm_can_sleep() 810 static void pwm_dbg_show(struct pwm_chip *chip, struct seq_file *s) pwm_dbg_show() argument 814 for (i = 0; i < chip->npwm; i++) { pwm_dbg_show() 815 struct pwm_device *pwm = &chip->pwms[i]; pwm_dbg_show() 851 struct pwm_chip *chip = list_entry(v, struct pwm_chip, list); pwm_seq_show() local 854 chip->dev->bus ? chip->dev->bus->name : "no-bus", pwm_seq_show() 855 dev_name(chip->dev), chip->npwm, pwm_seq_show() 856 (chip->npwm != 1) ? "s" : ""); pwm_seq_show() 858 if (chip->ops->dbg_show) pwm_seq_show() 859 chip->ops->dbg_show(chip, s); pwm_seq_show() 861 pwm_dbg_show(chip, s); pwm_seq_show()
H A D	pwm-atmel-hlcdc.c	41 struct pwm_chip chip; member in struct:atmel_hlcdc_pwm 47 static inline struct atmel_hlcdc_pwm *to_atmel_hlcdc_pwm(struct pwm_chip *chip) to_atmel_hlcdc_pwm() argument 49 return container_of(chip, struct atmel_hlcdc_pwm, chip); to_atmel_hlcdc_pwm() 56 struct atmel_hlcdc_pwm *chip = to_atmel_hlcdc_pwm(c); atmel_hlcdc_pwm_config() local 57 struct atmel_hlcdc *hlcdc = chip->hlcdc; atmel_hlcdc_pwm_config() 65 if (!chip->errata || !chip->errata->slow_clk_erratum) { atmel_hlcdc_pwm_config() 75 if ((chip->errata && chip->errata->slow_clk_erratum) || atmel_hlcdc_pwm_config() 88 if (!pres && chip->errata && chip->errata->div1_clk_erratum) atmel_hlcdc_pwm_config() 100 if (new_clk != chip->cur_clk) { atmel_hlcdc_pwm_config() 108 clk_disable_unprepare(chip->cur_clk); atmel_hlcdc_pwm_config() 109 chip->cur_clk = new_clk; atmel_hlcdc_pwm_config() 143 struct atmel_hlcdc_pwm *chip = to_atmel_hlcdc_pwm(c); atmel_hlcdc_pwm_set_polarity() local 144 struct atmel_hlcdc *hlcdc = chip->hlcdc; atmel_hlcdc_pwm_set_polarity() 156 struct atmel_hlcdc_pwm *chip = to_atmel_hlcdc_pwm(c); atmel_hlcdc_pwm_enable() local 157 struct atmel_hlcdc *hlcdc = chip->hlcdc; atmel_hlcdc_pwm_enable() 182 struct atmel_hlcdc_pwm *chip = to_atmel_hlcdc_pwm(c); atmel_hlcdc_pwm_disable() local 183 struct atmel_hlcdc *hlcdc = chip->hlcdc; atmel_hlcdc_pwm_disable() 239 struct atmel_hlcdc_pwm *chip; atmel_hlcdc_pwm_probe() local 245 chip = devm_kzalloc(dev, sizeof(*chip), GFP_KERNEL); atmel_hlcdc_pwm_probe() 246 if (!chip) atmel_hlcdc_pwm_probe() 255 chip->errata = match->data; atmel_hlcdc_pwm_probe() 257 chip->hlcdc = hlcdc; atmel_hlcdc_pwm_probe() 258 chip->chip.ops = &atmel_hlcdc_pwm_ops; atmel_hlcdc_pwm_probe() 259 chip->chip.dev = dev; atmel_hlcdc_pwm_probe() 260 chip->chip.base = -1; atmel_hlcdc_pwm_probe() 261 chip->chip.npwm = 1; atmel_hlcdc_pwm_probe() 262 chip->chip.of_xlate = of_pwm_xlate_with_flags; atmel_hlcdc_pwm_probe() 263 chip->chip.of_pwm_n_cells = 3; atmel_hlcdc_pwm_probe() 264 chip->chip.can_sleep = 1; atmel_hlcdc_pwm_probe() 266 ret = pwmchip_add(&chip->chip); atmel_hlcdc_pwm_probe() 272 platform_set_drvdata(pdev, chip); atmel_hlcdc_pwm_probe() 279 struct atmel_hlcdc_pwm *chip = platform_get_drvdata(pdev); atmel_hlcdc_pwm_remove() local 282 ret = pwmchip_remove(&chip->chip); atmel_hlcdc_pwm_remove() 286 clk_disable_unprepare(chip->hlcdc->periph_clk); atmel_hlcdc_pwm_remove()
H A D	pwm-vt8500.c	59 struct pwm_chip chip; member in struct:vt8500_chip 64 #define to_vt8500_chip(chip) container_of(chip, struct vt8500_chip, chip) 76 dev_warn(vt8500->chip.dev, "Waiting for status bits 0x%x to clear timed out\n", pwm_busy_wait() 80 static int vt8500_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, vt8500_pwm_config() argument 83 struct vt8500_chip *vt8500 = to_vt8500_chip(chip); vt8500_pwm_config() 91 dev_err(chip->dev, "failed to enable clock\n"); vt8500_pwm_config() 134 static int vt8500_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm) vt8500_pwm_enable() argument 136 struct vt8500_chip *vt8500 = to_vt8500_chip(chip); vt8500_pwm_enable() 142 dev_err(chip->dev, "failed to enable clock\n"); vt8500_pwm_enable() 154 static void vt8500_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm) vt8500_pwm_disable() argument 156 struct vt8500_chip *vt8500 = to_vt8500_chip(chip); vt8500_pwm_disable() 167 static int vt8500_pwm_set_polarity(struct pwm_chip *chip, vt8500_pwm_set_polarity() argument 171 struct vt8500_chip *vt8500 = to_vt8500_chip(chip); vt8500_pwm_set_polarity() 203 struct vt8500_chip *chip; vt8500_pwm_probe() local 213 chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL); vt8500_pwm_probe() 214 if (chip == NULL) vt8500_pwm_probe() 217 chip->chip.dev = &pdev->dev; vt8500_pwm_probe() 218 chip->chip.ops = &vt8500_pwm_ops; vt8500_pwm_probe() 219 chip->chip.of_xlate = of_pwm_xlate_with_flags; vt8500_pwm_probe() 220 chip->chip.of_pwm_n_cells = 3; vt8500_pwm_probe() 221 chip->chip.base = -1; vt8500_pwm_probe() 222 chip->chip.npwm = VT8500_NR_PWMS; vt8500_pwm_probe() 224 chip->clk = devm_clk_get(&pdev->dev, NULL); vt8500_pwm_probe() 225 if (IS_ERR(chip->clk)) { vt8500_pwm_probe() 227 return PTR_ERR(chip->clk); vt8500_pwm_probe() 231 chip->base = devm_ioremap_resource(&pdev->dev, r); vt8500_pwm_probe() 232 if (IS_ERR(chip->base)) vt8500_pwm_probe() 233 return PTR_ERR(chip->base); vt8500_pwm_probe() 235 ret = clk_prepare(chip->clk); vt8500_pwm_probe() 241 ret = pwmchip_add(&chip->chip); vt8500_pwm_probe() 243 dev_err(&pdev->dev, "failed to add PWM chip\n"); vt8500_pwm_probe() 247 platform_set_drvdata(pdev, chip); vt8500_pwm_probe() 253 struct vt8500_chip *chip; vt8500_pwm_remove() local 255 chip = platform_get_drvdata(pdev); vt8500_pwm_remove() 256 if (chip == NULL) vt8500_pwm_remove() 259 clk_unprepare(chip->clk); vt8500_pwm_remove() 261 return pwmchip_remove(&chip->chip); vt8500_pwm_remove()
H A D	pwm-ab8500.c	24 struct pwm_chip chip; member in struct:ab8500_pwm_chip 27 static int ab8500_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, ab8500_pwm_config() argument 45 reg = AB8500_PWM_OUT_CTRL1_REG + ((chip->base - 1) * 2); ab8500_pwm_config() 47 ret = abx500_set_register_interruptible(chip->dev, AB8500_MISC, ab8500_pwm_config() 51 ret = abx500_set_register_interruptible(chip->dev, AB8500_MISC, ab8500_pwm_config() 57 static int ab8500_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm) ab8500_pwm_enable() argument 61 ret = abx500_mask_and_set_register_interruptible(chip->dev, ab8500_pwm_enable() 63 1 << (chip->base - 1), 1 << (chip->base - 1)); ab8500_pwm_enable() 65 dev_err(chip->dev, "%s: Failed to enable PWM, Error %d\n", ab8500_pwm_enable() 70 static void ab8500_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm) ab8500_pwm_disable() argument 74 ret = abx500_mask_and_set_register_interruptible(chip->dev, ab8500_pwm_disable() 76 1 << (chip->base - 1), 0); ab8500_pwm_disable() 78 dev_err(chip->dev, "%s: Failed to disable PWM, Error %d\n", ab8500_pwm_disable() 102 ab8500->chip.dev = &pdev->dev; ab8500_pwm_probe() 103 ab8500->chip.ops = &ab8500_pwm_ops; ab8500_pwm_probe() 104 ab8500->chip.base = pdev->id; ab8500_pwm_probe() 105 ab8500->chip.npwm = 1; ab8500_pwm_probe() 107 err = pwmchip_add(&ab8500->chip); ab8500_pwm_probe() 122 err = pwmchip_remove(&ab8500->chip); ab8500_pwm_remove()
/linux-4.1.27/include/linux/irqchip/
H A D	chained_irq.h	24 * Entry/exit functions for chained handlers where the primary IRQ chip 27 static inline void chained_irq_enter(struct irq_chip *chip, chained_irq_enter() argument 31 if (chip->irq_eoi) chained_irq_enter() 34 if (chip->irq_mask_ack) { chained_irq_enter() 35 chip->irq_mask_ack(&desc->irq_data); chained_irq_enter() 37 chip->irq_mask(&desc->irq_data); chained_irq_enter() 38 if (chip->irq_ack) chained_irq_enter() 39 chip->irq_ack(&desc->irq_data); chained_irq_enter() 43 static inline void chained_irq_exit(struct irq_chip *chip, chained_irq_exit() argument 46 if (chip->irq_eoi) chained_irq_exit() 47 chip->irq_eoi(&desc->irq_data); chained_irq_exit() 49 chip->irq_unmask(&desc->irq_data); chained_irq_exit()
/linux-4.1.27/sound/i2c/other/
H A D	ak4113.c	41 static void ak4113_init_regs(struct ak4113 *chip); 57 static void snd_ak4113_free(struct ak4113 *chip) snd_ak4113_free() argument 59 atomic_inc(&chip->wq_processing); /* don't schedule new work */ snd_ak4113_free() 60 cancel_delayed_work_sync(&chip->work); snd_ak4113_free() 61 kfree(chip); snd_ak4113_free() 66 struct ak4113 *chip = device->device_data; snd_ak4113_dev_free() local 67 snd_ak4113_free(chip); snd_ak4113_dev_free() 75 struct ak4113 *chip; snd_ak4113_create() local 82 chip = kzalloc(sizeof(*chip), GFP_KERNEL); snd_ak4113_create() 83 if (chip == NULL) snd_ak4113_create() 85 spin_lock_init(&chip->lock); snd_ak4113_create() 86 chip->card = card; snd_ak4113_create() 87 chip->read = read; snd_ak4113_create() 88 chip->write = write; snd_ak4113_create() 89 chip->private_data = private_data; snd_ak4113_create() 90 INIT_DELAYED_WORK(&chip->work, ak4113_stats); snd_ak4113_create() 91 atomic_set(&chip->wq_processing, 0); snd_ak4113_create() 92 mutex_init(&chip->reinit_mutex); snd_ak4113_create() 95 chip->regmap[reg] = pgm[reg]; snd_ak4113_create() 96 ak4113_init_regs(chip); snd_ak4113_create() 98 chip->rcs0 = reg_read(chip, AK4113_REG_RCS0) & ~(AK4113_QINT | snd_ak4113_create() 100 chip->rcs1 = reg_read(chip, AK4113_REG_RCS1); snd_ak4113_create() 101 chip->rcs2 = reg_read(chip, AK4113_REG_RCS2); snd_ak4113_create() 102 err = snd_device_new(card, SNDRV_DEV_CODEC, chip, &ops); snd_ak4113_create() 107 *r_ak4113 = chip; snd_ak4113_create() 111 snd_ak4113_free(chip); snd_ak4113_create() 116 void snd_ak4113_reg_write(struct ak4113 *chip, unsigned char reg, snd_ak4113_reg_write() argument 121 reg_write(chip, reg, (chip->regmap[reg] & ~mask) | val); snd_ak4113_reg_write() 125 static void ak4113_init_regs(struct ak4113 *chip) ak4113_init_regs() argument 127 unsigned char old = chip->regmap[AK4113_REG_PWRDN], reg; ak4113_init_regs() 129 /* bring the chip to reset state and powerdown state */ ak4113_init_regs() 130 reg_write(chip, AK4113_REG_PWRDN, old & ~(AK4113_RST|AK4113_PWN)); ak4113_init_regs() 133 reg_write(chip, AK4113_REG_PWRDN, (old | AK4113_RST) & ~AK4113_PWN); ak4113_init_regs() 136 reg_write(chip, reg, chip->regmap[reg]); ak4113_init_regs() 138 reg_write(chip, AK4113_REG_PWRDN, old | AK4113_RST | AK4113_PWN); ak4113_init_regs() 141 void snd_ak4113_reinit(struct ak4113 *chip) snd_ak4113_reinit() argument 143 if (atomic_inc_return(&chip->wq_processing) == 1) snd_ak4113_reinit() 144 cancel_delayed_work_sync(&chip->work); snd_ak4113_reinit() 145 mutex_lock(&chip->reinit_mutex); snd_ak4113_reinit() 146 ak4113_init_regs(chip); snd_ak4113_reinit() 147 mutex_unlock(&chip->reinit_mutex); snd_ak4113_reinit() 149 if (atomic_dec_and_test(&chip->wq_processing)) snd_ak4113_reinit() 150 schedule_delayed_work(&chip->work, HZ / 10); snd_ak4113_reinit() 201 struct ak4113 *chip = snd_kcontrol_chip(kcontrol); snd_ak4113_in_error_get() local 204 spin_lock_irq(&chip->lock); snd_ak4113_in_error_get() 205 ptr = (long *)(((char *)chip) + kcontrol->private_value); snd_ak4113_in_error_get() 208 spin_unlock_irq(&chip->lock); snd_ak4113_in_error_get() 217 struct ak4113 *chip = snd_kcontrol_chip(kcontrol); snd_ak4113_in_bit_get() local 223 ((reg_read(chip, reg) & (1 << bit)) ? 1 : 0) ^ inv; snd_ak4113_in_bit_get() 240 struct ak4113 *chip = snd_kcontrol_chip(kcontrol); snd_ak4113_rx_get() local 243 (AK4113_IPS(chip->regmap[AK4113_REG_IO1])); snd_ak4113_rx_get() 250 struct ak4113 *chip = snd_kcontrol_chip(kcontrol); snd_ak4113_rx_put() local 254 spin_lock_irq(&chip->lock); snd_ak4113_rx_put() 255 old_val = chip->regmap[AK4113_REG_IO1]; snd_ak4113_rx_put() 258 reg_write(chip, AK4113_REG_IO1, snd_ak4113_rx_put() 261 spin_unlock_irq(&chip->lock); snd_ak4113_rx_put() 278 struct ak4113 *chip = snd_kcontrol_chip(kcontrol); snd_ak4113_rate_get() local 280 ucontrol->value.integer.value[0] = external_rate(reg_read(chip, snd_ak4113_rate_get() 296 struct ak4113 *chip = snd_kcontrol_chip(kcontrol); snd_ak4113_spdif_get() local 300 ucontrol->value.iec958.status[i] = reg_read(chip, snd_ak4113_spdif_get() 333 struct ak4113 *chip = snd_kcontrol_chip(kcontrol); snd_ak4113_spdif_pget() local 338 tmp = reg_read(chip, AK4113_REG_Pc0) | snd_ak4113_spdif_pget() 339 (reg_read(chip, AK4113_REG_Pc1) << 8); snd_ak4113_spdif_pget() 341 tmp = reg_read(chip, AK4113_REG_Pd0) | snd_ak4113_spdif_pget() 342 (reg_read(chip, AK4113_REG_Pd1) << 8); snd_ak4113_spdif_pget() 358 struct ak4113 *chip = snd_kcontrol_chip(kcontrol); snd_ak4113_spdif_qget() local 362 ucontrol->value.bytes.data[i] = reg_read(chip, snd_ak4113_spdif_qget() 634 struct ak4113 *chip = container_of(work, struct ak4113, work.work); ak4113_stats() local 636 if (atomic_inc_return(&chip->wq_processing) == 1) ak4113_stats() 637 snd_ak4113_check_rate_and_errors(chip, chip->check_flags); ak4113_stats() 639 if (atomic_dec_and_test(&chip->wq_processing)) ak4113_stats() 640 schedule_delayed_work(&chip->work, HZ / 10); ak4113_stats() 644 void snd_ak4113_suspend(struct ak4113 *chip) snd_ak4113_suspend() argument 646 atomic_inc(&chip->wq_processing); /* don't schedule new work */ snd_ak4113_suspend() 647 cancel_delayed_work_sync(&chip->work); snd_ak4113_suspend() 651 void snd_ak4113_resume(struct ak4113 *chip) snd_ak4113_resume() argument 653 atomic_dec(&chip->wq_processing); snd_ak4113_resume() 654 snd_ak4113_reinit(chip); snd_ak4113_resume()
H A D	ak4114.c	40 static void ak4114_init_regs(struct ak4114 *chip); 67 static void snd_ak4114_free(struct ak4114 *chip) snd_ak4114_free() argument 69 atomic_inc(&chip->wq_processing); /* don't schedule new work */ snd_ak4114_free() 70 cancel_delayed_work_sync(&chip->work); snd_ak4114_free() 71 kfree(chip); snd_ak4114_free() 76 struct ak4114 *chip = device->device_data; snd_ak4114_dev_free() local 77 snd_ak4114_free(chip); snd_ak4114_dev_free() 86 struct ak4114 *chip; snd_ak4114_create() local 93 chip = kzalloc(sizeof(*chip), GFP_KERNEL); snd_ak4114_create() 94 if (chip == NULL) snd_ak4114_create() 96 spin_lock_init(&chip->lock); snd_ak4114_create() 97 chip->card = card; snd_ak4114_create() 98 chip->read = read; snd_ak4114_create() 99 chip->write = write; snd_ak4114_create() 100 chip->private_data = private_data; snd_ak4114_create() 101 INIT_DELAYED_WORK(&chip->work, ak4114_stats); snd_ak4114_create() 102 atomic_set(&chip->wq_processing, 0); snd_ak4114_create() 103 mutex_init(&chip->reinit_mutex); snd_ak4114_create() 106 chip->regmap[reg] = pgm[reg]; snd_ak4114_create() 108 chip->txcsb[reg] = txcsb[reg]; snd_ak4114_create() 110 ak4114_init_regs(chip); snd_ak4114_create() 112 chip->rcs0 = reg_read(chip, AK4114_REG_RCS0) & ~(AK4114_QINT | AK4114_CINT); snd_ak4114_create() 113 chip->rcs1 = reg_read(chip, AK4114_REG_RCS1); snd_ak4114_create() 115 if ((err = snd_device_new(card, SNDRV_DEV_CODEC, chip, &ops)) < 0) snd_ak4114_create() 119 *r_ak4114 = chip; snd_ak4114_create() 123 snd_ak4114_free(chip); snd_ak4114_create() 128 void snd_ak4114_reg_write(struct ak4114 *chip, unsigned char reg, unsigned char mask, unsigned char val) snd_ak4114_reg_write() argument 131 reg_write(chip, reg, (chip->regmap[reg] & ~mask) | val); snd_ak4114_reg_write() 133 reg_write(chip, reg, snd_ak4114_reg_write() 134 (chip->txcsb[reg-AK4114_REG_TXCSB0] & ~mask) | val); snd_ak4114_reg_write() 138 static void ak4114_init_regs(struct ak4114 *chip) ak4114_init_regs() argument 140 unsigned char old = chip->regmap[AK4114_REG_PWRDN], reg; ak4114_init_regs() 142 /* bring the chip to reset state and powerdown state */ ak4114_init_regs() 143 reg_write(chip, AK4114_REG_PWRDN, old & ~(AK4114_RST|AK4114_PWN)); ak4114_init_regs() 146 reg_write(chip, AK4114_REG_PWRDN, (old | AK4114_RST) & ~AK4114_PWN); ak4114_init_regs() 149 reg_write(chip, reg, chip->regmap[reg]); ak4114_init_regs() 151 reg_write(chip, reg + AK4114_REG_TXCSB0, chip->txcsb[reg]); ak4114_init_regs() 153 reg_write(chip, AK4114_REG_PWRDN, old | AK4114_RST | AK4114_PWN); ak4114_init_regs() 156 void snd_ak4114_reinit(struct ak4114 *chip) snd_ak4114_reinit() argument 158 if (atomic_inc_return(&chip->wq_processing) == 1) snd_ak4114_reinit() 159 cancel_delayed_work_sync(&chip->work); snd_ak4114_reinit() 160 mutex_lock(&chip->reinit_mutex); snd_ak4114_reinit() 161 ak4114_init_regs(chip); snd_ak4114_reinit() 162 mutex_unlock(&chip->reinit_mutex); snd_ak4114_reinit() 164 if (atomic_dec_and_test(&chip->wq_processing)) snd_ak4114_reinit() 165 schedule_delayed_work(&chip->work, HZ / 10); snd_ak4114_reinit() 196 struct ak4114 *chip = snd_kcontrol_chip(kcontrol); snd_ak4114_in_error_get() local 199 spin_lock_irq(&chip->lock); snd_ak4114_in_error_get() 200 ptr = (long *)(((char *)chip) + kcontrol->private_value); snd_ak4114_in_error_get() 203 spin_unlock_irq(&chip->lock); snd_ak4114_in_error_get() 212 struct ak4114 *chip = snd_kcontrol_chip(kcontrol); snd_ak4114_in_bit_get() local 217 ucontrol->value.integer.value[0] = ((reg_read(chip, reg) & (1 << bit)) ? 1 : 0) ^ inv; snd_ak4114_in_bit_get() 234 struct ak4114 *chip = snd_kcontrol_chip(kcontrol); snd_ak4114_rate_get() local 236 ucontrol->value.integer.value[0] = external_rate(reg_read(chip, AK4114_REG_RCS1)); snd_ak4114_rate_get() 250 struct ak4114 *chip = snd_kcontrol_chip(kcontrol); snd_ak4114_spdif_get() local 254 ucontrol->value.iec958.status[i] = reg_read(chip, AK4114_REG_RXCSB0 + i); snd_ak4114_spdif_get() 261 struct ak4114 *chip = snd_kcontrol_chip(kcontrol); snd_ak4114_spdif_playback_get() local 265 ucontrol->value.iec958.status[i] = chip->txcsb[i]; snd_ak4114_spdif_playback_get() 272 struct ak4114 *chip = snd_kcontrol_chip(kcontrol); snd_ak4114_spdif_playback_put() local 276 reg_write(chip, AK4114_REG_TXCSB0 + i, ucontrol->value.iec958.status[i]); snd_ak4114_spdif_playback_put() 306 struct ak4114 *chip = snd_kcontrol_chip(kcontrol); snd_ak4114_spdif_pget() local 311 tmp = reg_read(chip, AK4114_REG_Pc0) | (reg_read(chip, AK4114_REG_Pc1) << 8); snd_ak4114_spdif_pget() 313 tmp = reg_read(chip, AK4114_REG_Pd0) | (reg_read(chip, AK4114_REG_Pd1) << 8); snd_ak4114_spdif_pget() 328 struct ak4114 *chip = snd_kcontrol_chip(kcontrol); snd_ak4114_spdif_qget() local 332 ucontrol->value.bytes.data[i] = reg_read(chip, AK4114_REG_QSUB_ADDR + i); snd_ak4114_spdif_qget() 620 struct ak4114 *chip = container_of(work, struct ak4114, work.work); ak4114_stats() local 622 if (atomic_inc_return(&chip->wq_processing) == 1) ak4114_stats() 623 snd_ak4114_check_rate_and_errors(chip, chip->check_flags); ak4114_stats() 624 if (atomic_dec_and_test(&chip->wq_processing)) ak4114_stats() 625 schedule_delayed_work(&chip->work, HZ / 10); ak4114_stats() 629 void snd_ak4114_suspend(struct ak4114 *chip) snd_ak4114_suspend() argument 631 atomic_inc(&chip->wq_processing); /* don't schedule new work */ snd_ak4114_suspend() 632 cancel_delayed_work_sync(&chip->work); snd_ak4114_suspend() 636 void snd_ak4114_resume(struct ak4114 *chip) snd_ak4114_resume() argument 638 atomic_dec(&chip->wq_processing); snd_ak4114_resume() 639 snd_ak4114_reinit(chip); snd_ak4114_resume()
/linux-4.1.27/drivers/iio/adc/
H A D	ad7291.c	90 static int ad7291_i2c_read(struct ad7291_chip_info *chip, u8 reg, u16 *data) ad7291_i2c_read() argument 92 struct i2c_client *client = chip->client; ad7291_i2c_read() 106 static int ad7291_i2c_write(struct ad7291_chip_info *chip, u8 reg, u16 data) ad7291_i2c_write() argument 108 return i2c_smbus_write_word_swapped(chip->client, reg, data); ad7291_i2c_write() 114 struct ad7291_chip_info *chip = iio_priv(private); ad7291_event_handler() local 120 if (ad7291_i2c_read(chip, AD7291_T_ALERT_STATUS, &t_status)) ad7291_event_handler() 123 if (ad7291_i2c_read(chip, AD7291_VOLTAGE_ALERT_STATUS, &v_status)) ad7291_event_handler() 129 command = chip->command | AD7291_ALERT_CLEAR; ad7291_event_handler() 130 ad7291_i2c_write(chip, AD7291_COMMAND, command); ad7291_event_handler() 132 command = chip->command & ~AD7291_ALERT_CLEAR; ad7291_event_handler() 133 ad7291_i2c_write(chip, AD7291_COMMAND, command); ad7291_event_handler() 209 struct ad7291_chip_info *chip = iio_priv(indio_dev); ad7291_read_event_value() local 213 ret = ad7291_i2c_read(chip, ad7291_threshold_reg(chan, dir, info), ad7291_read_event_value() 234 struct ad7291_chip_info *chip = iio_priv(indio_dev); ad7291_write_event_value() local 244 return ad7291_i2c_write(chip, ad7291_threshold_reg(chan, dir, info), ad7291_write_event_value() 253 struct ad7291_chip_info *chip = iio_priv(indio_dev); ad7291_read_event_config() local 261 return !!(chip->c_mask & BIT(15 - chan->channel)); ad7291_read_event_config() 278 struct ad7291_chip_info *chip = iio_priv(indio_dev); ad7291_write_event_config() local 282 mutex_lock(&chip->state_lock); ad7291_write_event_config() 283 regval = chip->command; ad7291_write_event_config() 294 if ((!state) && (chip->c_mask & mask)) ad7291_write_event_config() 295 chip->c_mask &= ~mask; ad7291_write_event_config() 296 else if (state && (!(chip->c_mask & mask))) ad7291_write_event_config() 297 chip->c_mask |= mask; ad7291_write_event_config() 302 regval |= chip->c_mask; ad7291_write_event_config() 303 if (chip->c_mask) /* Enable autocycle? */ ad7291_write_event_config() 306 ret = ad7291_i2c_write(chip, AD7291_COMMAND, regval); ad7291_write_event_config() 310 chip->command = regval; ad7291_write_event_config() 317 mutex_unlock(&chip->state_lock); ad7291_write_event_config() 328 struct ad7291_chip_info *chip = iio_priv(indio_dev); ad7291_read_raw() local 335 mutex_lock(&chip->state_lock); ad7291_read_raw() 337 if (chip->command & AD7291_AUTOCYCLE) { ad7291_read_raw() 338 mutex_unlock(&chip->state_lock); ad7291_read_raw() 342 regval = chip->command & (~AD7291_VOLTAGE_MASK); ad7291_read_raw() 344 ret = ad7291_i2c_write(chip, AD7291_COMMAND, regval); ad7291_read_raw() 346 mutex_unlock(&chip->state_lock); ad7291_read_raw() 350 ret = i2c_smbus_read_word_swapped(chip->client, ad7291_read_raw() 353 mutex_unlock(&chip->state_lock); ad7291_read_raw() 357 mutex_unlock(&chip->state_lock); ad7291_read_raw() 361 ret = i2c_smbus_read_word_swapped(chip->client, ad7291_read_raw() 371 ret = i2c_smbus_read_word_swapped(chip->client, ad7291_read_raw() 380 if (chip->reg) { ad7291_read_raw() 383 vref = regulator_get_voltage(chip->reg); ad7291_read_raw() 471 struct ad7291_chip_info *chip; ad7291_probe() local 475 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*chip)); ad7291_probe() 478 chip = iio_priv(indio_dev); ad7291_probe() 481 chip->reg = devm_regulator_get(&client->dev, "vref"); ad7291_probe() 482 if (IS_ERR(chip->reg)) ad7291_probe() 483 return PTR_ERR(chip->reg); ad7291_probe() 485 ret = regulator_enable(chip->reg); ad7291_probe() 490 mutex_init(&chip->state_lock); ad7291_probe() 494 chip->client = client; ad7291_probe() 496 chip->command = AD7291_NOISE_DELAY | ad7291_probe() 501 chip->command |= AD7291_EXT_REF; ad7291_probe() 511 ret = ad7291_i2c_write(chip, AD7291_COMMAND, AD7291_RESET); ad7291_probe() 517 ret = ad7291_i2c_write(chip, AD7291_COMMAND, chip->command); ad7291_probe() 544 if (chip->reg) ad7291_probe() 545 regulator_disable(chip->reg); ad7291_probe() 553 struct ad7291_chip_info *chip = iio_priv(indio_dev); ad7291_remove() local 560 if (chip->reg) ad7291_remove() 561 regulator_disable(chip->reg); ad7291_remove()
/linux-4.1.27/drivers/ssb/
H A D	driver_gpio.c	25 static struct ssb_bus *ssb_gpio_get_bus(struct gpio_chip *chip) ssb_gpio_get_bus() argument 27 return container_of(chip, struct ssb_bus, gpio); ssb_gpio_get_bus() 31 static int ssb_gpio_to_irq(struct gpio_chip *chip, unsigned gpio) ssb_gpio_to_irq() argument 33 struct ssb_bus *bus = ssb_gpio_get_bus(chip); ssb_gpio_to_irq() 46 static int ssb_gpio_chipco_get_value(struct gpio_chip *chip, unsigned gpio) ssb_gpio_chipco_get_value() argument 48 struct ssb_bus *bus = ssb_gpio_get_bus(chip); ssb_gpio_chipco_get_value() 53 static void ssb_gpio_chipco_set_value(struct gpio_chip *chip, unsigned gpio, ssb_gpio_chipco_set_value() argument 56 struct ssb_bus *bus = ssb_gpio_get_bus(chip); ssb_gpio_chipco_set_value() 61 static int ssb_gpio_chipco_direction_input(struct gpio_chip *chip, ssb_gpio_chipco_direction_input() argument 64 struct ssb_bus *bus = ssb_gpio_get_bus(chip); ssb_gpio_chipco_direction_input() 70 static int ssb_gpio_chipco_direction_output(struct gpio_chip *chip, ssb_gpio_chipco_direction_output() argument 73 struct ssb_bus *bus = ssb_gpio_get_bus(chip); ssb_gpio_chipco_direction_output() 80 static int ssb_gpio_chipco_request(struct gpio_chip *chip, unsigned gpio) ssb_gpio_chipco_request() argument 82 struct ssb_bus *bus = ssb_gpio_get_bus(chip); ssb_gpio_chipco_request() 93 static void ssb_gpio_chipco_free(struct gpio_chip *chip, unsigned gpio) ssb_gpio_chipco_free() argument 95 struct ssb_bus *bus = ssb_gpio_get_bus(chip); ssb_gpio_chipco_free() 149 struct gpio_chip *chip = &bus->gpio; ssb_gpio_irq_chipco_domain_init() local 155 bus->irq_domain = irq_domain_add_linear(NULL, chip->ngpio, ssb_gpio_irq_chipco_domain_init() 161 for (gpio = 0; gpio < chip->ngpio; gpio++) { ssb_gpio_irq_chipco_domain_init() 181 for (gpio = 0; gpio < chip->ngpio; gpio++) { ssb_gpio_irq_chipco_domain_init() 194 struct gpio_chip *chip = &bus->gpio; ssb_gpio_irq_chipco_domain_exit() local 202 for (gpio = 0; gpio < chip->ngpio; gpio++) { ssb_gpio_irq_chipco_domain_exit() 222 struct gpio_chip *chip = &bus->gpio; ssb_gpio_chipco_init() local 225 chip->label = "ssb_chipco_gpio"; ssb_gpio_chipco_init() 226 chip->owner = THIS_MODULE; ssb_gpio_chipco_init() 227 chip->request = ssb_gpio_chipco_request; ssb_gpio_chipco_init() 228 chip->free = ssb_gpio_chipco_free; ssb_gpio_chipco_init() 229 chip->get = ssb_gpio_chipco_get_value; ssb_gpio_chipco_init() 230 chip->set = ssb_gpio_chipco_set_value; ssb_gpio_chipco_init() 231 chip->direction_input = ssb_gpio_chipco_direction_input; ssb_gpio_chipco_init() 232 chip->direction_output = ssb_gpio_chipco_direction_output; ssb_gpio_chipco_init() 234 chip->to_irq = ssb_gpio_to_irq; ssb_gpio_chipco_init() 236 chip->ngpio = 16; ssb_gpio_chipco_init() 241 chip->base = 0; ssb_gpio_chipco_init() 243 chip->base = -1; ssb_gpio_chipco_init() 249 err = gpiochip_add(chip); ssb_gpio_chipco_init() 264 static int ssb_gpio_extif_get_value(struct gpio_chip *chip, unsigned gpio) ssb_gpio_extif_get_value() argument 266 struct ssb_bus *bus = ssb_gpio_get_bus(chip); ssb_gpio_extif_get_value() 271 static void ssb_gpio_extif_set_value(struct gpio_chip *chip, unsigned gpio, ssb_gpio_extif_set_value() argument 274 struct ssb_bus *bus = ssb_gpio_get_bus(chip); ssb_gpio_extif_set_value() 279 static int ssb_gpio_extif_direction_input(struct gpio_chip *chip, ssb_gpio_extif_direction_input() argument 282 struct ssb_bus *bus = ssb_gpio_get_bus(chip); ssb_gpio_extif_direction_input() 288 static int ssb_gpio_extif_direction_output(struct gpio_chip *chip, ssb_gpio_extif_direction_output() argument 291 struct ssb_bus *bus = ssb_gpio_get_bus(chip); ssb_gpio_extif_direction_output() 346 struct gpio_chip *chip = &bus->gpio; ssb_gpio_irq_extif_domain_init() local 352 bus->irq_domain = irq_domain_add_linear(NULL, chip->ngpio, ssb_gpio_irq_extif_domain_init() 358 for (gpio = 0; gpio < chip->ngpio; gpio++) { ssb_gpio_irq_extif_domain_init() 377 for (gpio = 0; gpio < chip->ngpio; gpio++) { ssb_gpio_irq_extif_domain_init() 390 struct gpio_chip *chip = &bus->gpio; ssb_gpio_irq_extif_domain_exit() local 397 for (gpio = 0; gpio < chip->ngpio; gpio++) { ssb_gpio_irq_extif_domain_exit() 417 struct gpio_chip *chip = &bus->gpio; ssb_gpio_extif_init() local 420 chip->label = "ssb_extif_gpio"; ssb_gpio_extif_init() 421 chip->owner = THIS_MODULE; ssb_gpio_extif_init() 422 chip->get = ssb_gpio_extif_get_value; ssb_gpio_extif_init() 423 chip->set = ssb_gpio_extif_set_value; ssb_gpio_extif_init() 424 chip->direction_input = ssb_gpio_extif_direction_input; ssb_gpio_extif_init() 425 chip->direction_output = ssb_gpio_extif_direction_output; ssb_gpio_extif_init() 427 chip->to_irq = ssb_gpio_to_irq; ssb_gpio_extif_init() 429 chip->ngpio = 5; ssb_gpio_extif_init() 434 chip->base = 0; ssb_gpio_extif_init() 436 chip->base = -1; ssb_gpio_extif_init() 442 err = gpiochip_add(chip); ssb_gpio_extif_init()
/linux-4.1.27/include/sound/
H A D	vx_core.h	89 unsigned char (*in8)(struct vx_core *chip, int reg); 90 unsigned int (*in32)(struct vx_core *chip, int reg); 91 void (*out8)(struct vx_core *chip, int reg, unsigned char val); 92 void (*out32)(struct vx_core *chip, int reg, unsigned int val); 94 int (*test_and_ack)(struct vx_core *chip); 95 void (*validate_irq)(struct vx_core *chip, int enable); 97 void (*write_codec)(struct vx_core *chip, int codec, unsigned int data); 98 void (*akm_write)(struct vx_core *chip, int reg, unsigned int data); 99 void (*reset_codec)(struct vx_core *chip); 100 void (*change_audio_source)(struct vx_core *chip, int src); 102 /* chip init */ 103 int (*load_dsp)(struct vx_core *chip, int idx, const struct firmware *fw); 104 void (*reset_dsp)(struct vx_core *chip); 105 void (*reset_board)(struct vx_core *chip, int cold_reset); 106 int (*add_controls)(struct vx_core *chip); 108 void (*dma_write)(struct vx_core *chip, struct snd_pcm_runtime *runtime, 110 void (*dma_read)(struct vx_core *chip, struct snd_pcm_runtime *runtime, 141 /* chip status */ 211 int snd_vx_setup_firmware(struct vx_core *chip); 212 int snd_vx_load_boot_image(struct vx_core *chip, const struct firmware *dsp); 213 int snd_vx_dsp_boot(struct vx_core *chip, const struct firmware *dsp); 214 int snd_vx_dsp_load(struct vx_core *chip, const struct firmware *dsp); 216 void snd_vx_free_firmware(struct vx_core *chip); 227 static inline int vx_test_and_ack(struct vx_core *chip) vx_test_and_ack() argument 229 return chip->ops->test_and_ack(chip); vx_test_and_ack() 232 static inline void vx_validate_irq(struct vx_core *chip, int enable) vx_validate_irq() argument 234 chip->ops->validate_irq(chip, enable); vx_validate_irq() 237 static inline unsigned char snd_vx_inb(struct vx_core *chip, int reg) snd_vx_inb() argument 239 return chip->ops->in8(chip, reg); snd_vx_inb() 242 static inline unsigned int snd_vx_inl(struct vx_core *chip, int reg) snd_vx_inl() argument 244 return chip->ops->in32(chip, reg); snd_vx_inl() 247 static inline void snd_vx_outb(struct vx_core *chip, int reg, unsigned char val) snd_vx_outb() argument 249 chip->ops->out8(chip, reg, val); snd_vx_outb() 252 static inline void snd_vx_outl(struct vx_core *chip, int reg, unsigned int val) snd_vx_outl() argument 254 chip->ops->out32(chip, reg, val); snd_vx_outl() 257 #define vx_inb(chip,reg) snd_vx_inb(chip, VX_##reg) 258 #define vx_outb(chip,reg,val) snd_vx_outb(chip, VX_##reg,val) 259 #define vx_inl(chip,reg) snd_vx_inl(chip, VX_##reg) 260 #define vx_outl(chip,reg,val) snd_vx_outl(chip, VX_##reg,val) 262 static inline void vx_reset_dsp(struct vx_core *chip) vx_reset_dsp() argument 264 chip->ops->reset_dsp(chip); vx_reset_dsp() 267 int vx_send_msg(struct vx_core *chip, struct vx_rmh *rmh); 268 int vx_send_msg_nolock(struct vx_core *chip, struct vx_rmh *rmh); 269 int vx_send_rih(struct vx_core *chip, int cmd); 270 int vx_send_rih_nolock(struct vx_core *chip, int cmd); 272 void vx_reset_codec(struct vx_core *chip, int cold_reset); 279 int snd_vx_check_reg_bit(struct vx_core *chip, int reg, int mask, int bit, int time); 280 #define vx_check_isr(chip,mask,bit,time) snd_vx_check_reg_bit(chip, VX_ISR, mask, bit, time) 281 #define vx_wait_isr_bit(chip,bit) vx_check_isr(chip, bit, bit, 200) 282 #define vx_wait_for_rx_full(chip) vx_wait_isr_bit(chip, ISR_RX_FULL) 288 static inline void vx_pseudo_dma_write(struct vx_core *chip, struct snd_pcm_runtime *runtime, vx_pseudo_dma_write() argument 291 chip->ops->dma_write(chip, runtime, pipe, count); vx_pseudo_dma_write() 294 static inline void vx_pseudo_dma_read(struct vx_core *chip, struct snd_pcm_runtime *runtime, vx_pseudo_dma_read() argument 297 chip->ops->dma_read(chip, runtime, pipe, count); vx_pseudo_dma_read() 312 int snd_vx_pcm_new(struct vx_core *chip); 313 void vx_pcm_update_intr(struct vx_core *chip, unsigned int events); 318 int snd_vx_mixer_new(struct vx_core *chip); 319 void vx_toggle_dac_mute(struct vx_core *chip, int mute); 320 int vx_sync_audio_source(struct vx_core *chip); 321 int vx_set_monitor_level(struct vx_core *chip, int audio, int level, int active); 326 void vx_set_iec958_status(struct vx_core *chip, unsigned int bits); 327 int vx_set_clock(struct vx_core *chip, unsigned int freq); 328 void vx_set_internal_clock(struct vx_core *chip, unsigned int freq); 329 int vx_change_frequency(struct vx_core *chip); 342 #define vx_has_new_dsp(chip) ((chip)->type != VX_TYPE_BOARD) 343 #define vx_is_pcmcia(chip) ((chip)->type >= VX_TYPE_VXPOCKET)
/linux-4.1.27/drivers/ptp/
H A D	ptp_pch.c	149 static inline void pch_eth_enable_set(struct pch_dev *chip) pch_eth_enable_set() argument 153 val = ioread32(&chip->regs->ts_sel) | (PCH_ECS_ETH); pch_eth_enable_set() 154 iowrite32(val, (&chip->regs->ts_sel)); pch_eth_enable_set() 184 static inline void pch_block_reset(struct pch_dev *chip) pch_block_reset() argument 188 val = ioread32(&chip->regs->control) | PCH_TSC_RESET; pch_block_reset() 189 iowrite32(val, (&chip->regs->control)); pch_block_reset() 191 iowrite32(val, (&chip->regs->control)); pch_block_reset() 196 struct pch_dev *chip = pci_get_drvdata(pdev); pch_ch_control_read() local 199 val = ioread32(&chip->regs->ch_control); pch_ch_control_read() 207 struct pch_dev *chip = pci_get_drvdata(pdev); pch_ch_control_write() local 209 iowrite32(val, (&chip->regs->ch_control)); pch_ch_control_write() 215 struct pch_dev *chip = pci_get_drvdata(pdev); pch_ch_event_read() local 218 val = ioread32(&chip->regs->ch_event); pch_ch_event_read() 226 struct pch_dev *chip = pci_get_drvdata(pdev); pch_ch_event_write() local 228 iowrite32(val, (&chip->regs->ch_event)); pch_ch_event_write() 234 struct pch_dev *chip = pci_get_drvdata(pdev); pch_src_uuid_lo_read() local 237 val = ioread32(&chip->regs->src_uuid_lo); pch_src_uuid_lo_read() 245 struct pch_dev *chip = pci_get_drvdata(pdev); pch_src_uuid_hi_read() local 248 val = ioread32(&chip->regs->src_uuid_hi); pch_src_uuid_hi_read() 256 struct pch_dev *chip = pci_get_drvdata(pdev); pch_rx_snap_read() local 260 lo = ioread32(&chip->regs->rx_snap_lo); pch_rx_snap_read() 261 hi = ioread32(&chip->regs->rx_snap_hi); pch_rx_snap_read() 273 struct pch_dev *chip = pci_get_drvdata(pdev); pch_tx_snap_read() local 277 lo = ioread32(&chip->regs->tx_snap_lo); pch_tx_snap_read() 278 hi = ioread32(&chip->regs->tx_snap_hi); pch_tx_snap_read() 290 static void pch_set_system_time_count(struct pch_dev *chip) pch_set_system_time_count() argument 292 iowrite32(0x01, &chip->regs->stl_max_set_en); pch_set_system_time_count() 293 iowrite32(0xFFFFFFFF, &chip->regs->stl_max_set); pch_set_system_time_count() 294 iowrite32(0x00, &chip->regs->stl_max_set_en); pch_set_system_time_count() 297 static void pch_reset(struct pch_dev *chip) pch_reset() argument 300 pch_block_reset(chip); pch_reset() 303 pch_set_system_time_count(chip); pch_reset() 315 struct pch_dev *chip = pci_get_drvdata(pdev); pch_set_station_address() local 318 if ((chip->regs == NULL) || addr == (u8 *)NULL) { pch_set_station_address() 352 iowrite32(val, &chip->regs->ts_st[i]); pch_set_station_address() 563 struct pch_dev *chip = pci_get_drvdata(pdev); pch_remove() local 565 ptp_clock_unregister(chip->ptp_clock); pch_remove() 568 free_irq(pdev->irq, chip); pch_remove() 571 if (chip->regs != NULL) { pch_remove() 572 iounmap(chip->regs); pch_remove() 573 chip->regs = NULL; pch_remove() 576 if (chip->mem_base != 0) { pch_remove() 577 release_mem_region(chip->mem_base, chip->mem_size); pch_remove() 578 chip->mem_base = 0; pch_remove() 581 kfree(chip); pch_remove() 590 struct pch_dev *chip; pch_probe() local 592 chip = kzalloc(sizeof(struct pch_dev), GFP_KERNEL); pch_probe() 593 if (chip == NULL) pch_probe() 603 chip->mem_base = pci_resource_start(pdev, IO_MEM_BAR); pch_probe() 604 if (!chip->mem_base) { pch_probe() 611 chip->mem_size = pci_resource_len(pdev, IO_MEM_BAR); pch_probe() 614 if (!request_mem_region(chip->mem_base, chip->mem_size, "1588_regs")) { pch_probe() 622 chip->regs = ioremap(chip->mem_base, chip->mem_size); pch_probe() 624 if (!chip->regs) { pch_probe() 630 chip->caps = ptp_pch_caps; pch_probe() 631 chip->ptp_clock = ptp_clock_register(&chip->caps, &pdev->dev); pch_probe() 632 if (IS_ERR(chip->ptp_clock)) { pch_probe() 633 ret = PTR_ERR(chip->ptp_clock); pch_probe() 637 spin_lock_init(&chip->register_lock); pch_probe() 639 ret = request_irq(pdev->irq, &isr, IRQF_SHARED, KBUILD_MODNAME, chip); pch_probe() 646 chip->irq = pdev->irq; pch_probe() 647 chip->pdev = pdev; pch_probe() 648 pci_set_drvdata(pdev, chip); pch_probe() 650 spin_lock_irqsave(&chip->register_lock, flags); pch_probe() 652 pch_reset(chip); pch_probe() 654 iowrite32(DEFAULT_ADDEND, &chip->regs->addend); pch_probe() 655 iowrite32(1, &chip->regs->trgt_lo); pch_probe() 656 iowrite32(0, &chip->regs->trgt_hi); pch_probe() 657 iowrite32(PCH_TSE_TTIPEND, &chip->regs->event); pch_probe() 659 pch_eth_enable_set(chip); pch_probe() 669 spin_unlock_irqrestore(&chip->register_lock, flags); pch_probe() 673 ptp_clock_unregister(chip->ptp_clock); pch_probe() 675 iounmap(chip->regs); pch_probe() 676 chip->regs = NULL; pch_probe() 679 release_mem_region(chip->mem_base, chip->mem_size); pch_probe() 682 chip->mem_base = 0; pch_probe() 688 kfree(chip); pch_probe()
/linux-4.1.27/sound/mips/
H A D	sgio2audio.c	93 /* definition of the chip-specific record */ 118 struct snd_sgio2audio *chip = priv; read_ad1843_reg() local 122 spin_lock_irqsave(&chip->ad1843_lock, flags); read_ad1843_reg() 132 spin_unlock_irqrestore(&chip->ad1843_lock, flags); read_ad1843_reg() 141 struct snd_sgio2audio *chip = priv; write_ad1843_reg() local 145 spin_lock_irqsave(&chip->ad1843_lock, flags); write_ad1843_reg() 154 spin_unlock_irqrestore(&chip->ad1843_lock, flags); write_ad1843_reg() 161 struct snd_sgio2audio *chip = snd_kcontrol_chip(kcontrol); sgio2audio_gain_info() local 166 uinfo->value.integer.max = ad1843_get_gain_max(&chip->ad1843, sgio2audio_gain_info() 174 struct snd_sgio2audio *chip = snd_kcontrol_chip(kcontrol); sgio2audio_gain_get() local 177 vol = ad1843_get_gain(&chip->ad1843, (int)kcontrol->private_value); sgio2audio_gain_get() 188 struct snd_sgio2audio *chip = snd_kcontrol_chip(kcontrol); sgio2audio_gain_put() local 191 oldvol = ad1843_get_gain(&chip->ad1843, kcontrol->private_value); sgio2audio_gain_put() 195 newvol = ad1843_set_gain(&chip->ad1843, kcontrol->private_value, sgio2audio_gain_put() 213 struct snd_sgio2audio *chip = snd_kcontrol_chip(kcontrol); sgio2audio_source_get() local 215 ucontrol->value.enumerated.item[0] = ad1843_get_recsrc(&chip->ad1843); sgio2audio_source_get() 222 struct snd_sgio2audio *chip = snd_kcontrol_chip(kcontrol); sgio2audio_source_put() local 225 oldsrc = ad1843_get_recsrc(&chip->ad1843); sgio2audio_source_put() 226 newsrc = ad1843_set_recsrc(&chip->ad1843, sgio2audio_source_put() 313 static int snd_sgio2audio_new_mixer(struct snd_sgio2audio *chip) snd_sgio2audio_new_mixer() argument 317 err = snd_ctl_add(chip->card, snd_sgio2audio_new_mixer() 318 snd_ctl_new1(&sgio2audio_ctrl_pcm0, chip)); snd_sgio2audio_new_mixer() 322 err = snd_ctl_add(chip->card, snd_sgio2audio_new_mixer() 323 snd_ctl_new1(&sgio2audio_ctrl_pcm1, chip)); snd_sgio2audio_new_mixer() 327 err = snd_ctl_add(chip->card, snd_sgio2audio_new_mixer() 328 snd_ctl_new1(&sgio2audio_ctrl_reclevel, chip)); snd_sgio2audio_new_mixer() 332 err = snd_ctl_add(chip->card, snd_sgio2audio_new_mixer() 333 snd_ctl_new1(&sgio2audio_ctrl_recsource, chip)); snd_sgio2audio_new_mixer() 336 err = snd_ctl_add(chip->card, snd_sgio2audio_new_mixer() 337 snd_ctl_new1(&sgio2audio_ctrl_line, chip)); snd_sgio2audio_new_mixer() 341 err = snd_ctl_add(chip->card, snd_sgio2audio_new_mixer() 342 snd_ctl_new1(&sgio2audio_ctrl_cd, chip)); snd_sgio2audio_new_mixer() 346 err = snd_ctl_add(chip->card, snd_sgio2audio_new_mixer() 347 snd_ctl_new1(&sgio2audio_ctrl_mic, chip)); snd_sgio2audio_new_mixer() 358 static int snd_sgio2audio_dma_pull_frag(struct snd_sgio2audio *chip, snd_sgio2audio_dma_pull_frag() argument 369 struct snd_pcm_runtime *runtime = chip->channel[ch].substream->runtime; snd_sgio2audio_dma_pull_frag() 371 spin_lock_irqsave(&chip->channel[ch].lock, flags); snd_sgio2audio_dma_pull_frag() 373 src_base = (unsigned long) chip->ring_base | (ch << CHANNEL_RING_SHIFT); snd_sgio2audio_dma_pull_frag() 376 dst_pos = chip->channel[ch].pos; snd_sgio2audio_dma_pull_frag() 380 chip->channel[ch].size += (count >> 3); /* in frames */ snd_sgio2audio_dma_pull_frag() 381 ret = chip->channel[ch].size >= runtime->period_size; snd_sgio2audio_dma_pull_frag() 382 chip->channel[ch].size %= runtime->period_size; snd_sgio2audio_dma_pull_frag() 398 chip->channel[ch].pos = dst_pos; snd_sgio2audio_dma_pull_frag() 400 spin_unlock_irqrestore(&chip->channel[ch].lock, flags); snd_sgio2audio_dma_pull_frag() 406 static int snd_sgio2audio_dma_push_frag(struct snd_sgio2audio *chip, snd_sgio2audio_dma_push_frag() argument 417 struct snd_pcm_runtime *runtime = chip->channel[ch].substream->runtime; snd_sgio2audio_dma_push_frag() 419 spin_lock_irqsave(&chip->channel[ch].lock, flags); snd_sgio2audio_dma_push_frag() 421 dst_base = (unsigned long)chip->ring_base | (ch << CHANNEL_RING_SHIFT); snd_sgio2audio_dma_push_frag() 424 src_pos = chip->channel[ch].pos; snd_sgio2audio_dma_push_frag() 428 chip->channel[ch].size += (count >> 3); /* in frames */ snd_sgio2audio_dma_push_frag() 429 ret = chip->channel[ch].size >= runtime->period_size; snd_sgio2audio_dma_push_frag() 430 chip->channel[ch].size %= runtime->period_size; snd_sgio2audio_dma_push_frag() 448 chip->channel[ch].pos = src_pos; snd_sgio2audio_dma_push_frag() 450 spin_unlock_irqrestore(&chip->channel[ch].lock, flags); snd_sgio2audio_dma_push_frag() 456 struct snd_sgio2audio *chip = snd_pcm_substream_chip(substream); snd_sgio2audio_dma_start() local 467 snd_sgio2audio_dma_push_frag(chip, ch, CHANNEL_RING_SIZE - 32); snd_sgio2audio_dma_start() 487 struct snd_sgio2audio *chip; snd_sgio2audio_dma_in_isr() local 491 chip = snd_pcm_substream_chip(substream); snd_sgio2audio_dma_in_isr() 497 if (snd_sgio2audio_dma_pull_frag(chip, ch, count)) snd_sgio2audio_dma_in_isr() 507 struct snd_sgio2audio *chip; snd_sgio2audio_dma_out_isr() local 511 chip = snd_pcm_substream_chip(substream); snd_sgio2audio_dma_out_isr() 516 if (snd_sgio2audio_dma_push_frag(chip, ch, count)) snd_sgio2audio_dma_out_isr() 556 struct snd_sgio2audio *chip = snd_pcm_substream_chip(substream); snd_sgio2audio_playback1_open() local 560 runtime->private_data = &chip->channel[1]; snd_sgio2audio_playback1_open() 566 struct snd_sgio2audio *chip = snd_pcm_substream_chip(substream); snd_sgio2audio_playback2_open() local 570 runtime->private_data = &chip->channel[2]; snd_sgio2audio_playback2_open() 577 struct snd_sgio2audio *chip = snd_pcm_substream_chip(substream); snd_sgio2audio_capture_open() local 581 runtime->private_data = &chip->channel[0]; snd_sgio2audio_capture_open() 612 struct snd_sgio2audio *chip = snd_pcm_substream_chip(substream); snd_sgio2audio_pcm_prepare() local 618 spin_lock_irqsave(&chip->channel[ch].lock, flags); snd_sgio2audio_pcm_prepare() 621 chip->channel[ch].pos = 0; snd_sgio2audio_pcm_prepare() 622 chip->channel[ch].size = 0; snd_sgio2audio_pcm_prepare() 623 chip->channel[ch].substream = substream; snd_sgio2audio_pcm_prepare() 629 ad1843_setup_dac(&chip->ad1843, snd_sgio2audio_pcm_prepare() 636 ad1843_setup_adc(&chip->ad1843, snd_sgio2audio_pcm_prepare() 642 spin_unlock_irqrestore(&chip->channel[ch].lock, flags); snd_sgio2audio_pcm_prepare() 669 struct snd_sgio2audio *chip = snd_pcm_substream_chip(substream); snd_sgio2audio_pcm_pointer() local 674 chip->channel[chan->idx].pos); snd_sgio2audio_pcm_pointer() 722 static int snd_sgio2audio_new_pcm(struct snd_sgio2audio *chip) snd_sgio2audio_new_pcm() argument 728 err = snd_pcm_new(chip->card, "SGI O2 Audio", 0, 1, 1, &pcm); snd_sgio2audio_new_pcm() 732 pcm->private_data = chip; snd_sgio2audio_new_pcm() 742 err = snd_pcm_new(chip->card, "SGI O2 Audio", 1, 1, 0, &pcm); snd_sgio2audio_new_pcm() 746 pcm->private_data = chip; snd_sgio2audio_new_pcm() 797 static int snd_sgio2audio_free(struct snd_sgio2audio *chip) snd_sgio2audio_free() argument 809 &chip->channel[snd_sgio2_isr_table[i].idx]); snd_sgio2audio_free() 812 chip->ring_base, chip->ring_base_dma); snd_sgio2audio_free() 815 kfree(chip); snd_sgio2audio_free() 821 struct snd_sgio2audio *chip = device->device_data; snd_sgio2audio_dev_free() local 823 return snd_sgio2audio_free(chip); snd_sgio2audio_dev_free() 833 struct snd_sgio2audio *chip; snd_sgio2audio_create() local 843 chip = kzalloc(sizeof(struct snd_sgio2audio), GFP_KERNEL); snd_sgio2audio_create() 844 if (chip == NULL) snd_sgio2audio_create() 847 chip->card = card; snd_sgio2audio_create() 849 chip->ring_base = dma_alloc_coherent(NULL, MACEISA_RINGBUFFERS_SIZE, snd_sgio2audio_create() 850 &chip->ring_base_dma, GFP_USER); snd_sgio2audio_create() 851 if (chip->ring_base == NULL) { snd_sgio2audio_create() 854 kfree(chip); snd_sgio2audio_create() 858 spin_lock_init(&chip->ad1843_lock); snd_sgio2audio_create() 862 spin_lock_init(&chip->channel[i].lock); snd_sgio2audio_create() 863 chip->channel[i].idx = i; snd_sgio2audio_create() 872 &chip->channel[snd_sgio2_isr_table[i].idx])) { snd_sgio2audio_create() 873 snd_sgio2audio_free(chip); snd_sgio2audio_create() 887 writeq(chip->ring_base_dma, &mace->perif.ctrl.ringbase); snd_sgio2audio_create() 890 chip->ad1843.read = read_ad1843_reg; snd_sgio2audio_create() 891 chip->ad1843.write = write_ad1843_reg; snd_sgio2audio_create() 892 chip->ad1843.chip = chip; snd_sgio2audio_create() 895 err = ad1843_init(&chip->ad1843); snd_sgio2audio_create() 897 snd_sgio2audio_free(chip); snd_sgio2audio_create() 901 err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops); snd_sgio2audio_create() 903 snd_sgio2audio_free(chip); snd_sgio2audio_create() 906 *rchip = chip; snd_sgio2audio_create() 913 struct snd_sgio2audio *chip; snd_sgio2audio_probe() local 920 err = snd_sgio2audio_create(card, &chip); snd_sgio2audio_probe() 926 err = snd_sgio2audio_new_pcm(chip); snd_sgio2audio_probe() 931 err = snd_sgio2audio_new_mixer(chip); snd_sgio2audio_probe()
/linux-4.1.27/arch/mips/include/asm/sibyte/
H A D	sb1250_defs.h	46 * for chip features only present in certain chip revisions. 48 * SIBYTE_HDR_FEATURES may be defined to be the mask value chip/revision 56 * Generate defines only for that revision of chip. 58 * #if SIBYTE_HDR_FEATURE(chip,pass) 61 * that particular chip type are enabled in SIBYTE_HDR_FEATURES. 65 * Note that there is no implied ordering between chip types. 67 * Note also that 'chip' and 'pass' must textually exactly 72 * #if SIBYTE_HDR_FEATURE_UP_TO(chip,pass) 75 * and earlier revisions of the named chip type. 77 * #if SIBYTE_HDR_FEATURE_EXACT(chip,pass) 80 * revision of the named chip type. (Note that this CANNOT 82 * particular chip/revision. It will be true any time this 83 * chip/revision is included in SIBYTE_HDR_FEATURES.) 85 * #if SIBYTE_HDR_FEATURE_CHIP(chip) 87 * True if header features for (any revision of) that chip type 89 * #defines for features specific to a given chip type.) 92 * chip type, but can be renumbered at will. Note that they MUST fit 94 * CPP conditionals. Bit positions within chip types DO indicate 110 /* Bit mask for chip/revision. (use _ALL for all revisions of a chip). */ 111 #define SIBYTE_HDR_FMASK(chip, pass) \ 112 (SIBYTE_HDR_FMASK_ ## chip ## _ ## pass) 113 #define SIBYTE_HDR_FMASK_ALLREVS(chip) \ 114 (SIBYTE_HDR_FMASK_ ## chip ## _ALL) 133 /* Bit mask for revisions of chip exclusively before the named revision. */ 134 #define SIBYTE_HDR_FMASK_BEFORE(chip, pass) \ 135 ((SIBYTE_HDR_FMASK(chip, pass) - 1) & SIBYTE_HDR_FMASK_ALLREVS(chip)) 137 /* Bit mask for revisions of chip exclusively after the named revision. */ 138 #define SIBYTE_HDR_FMASK_AFTER(chip, pass) \ 139 (~(SIBYTE_HDR_FMASK(chip, pass) \ 140 | (SIBYTE_HDR_FMASK(chip, pass) - 1)) & SIBYTE_HDR_FMASK_ALLREVS(chip)) 143 /* True if header features enabled for (any revision of) that chip type. */ 144 #define SIBYTE_HDR_FEATURE_CHIP(chip) \ 145 (!! (SIBYTE_HDR_FMASK_ALLREVS(chip) & SIBYTE_HDR_FEATURES)) 154 #define SIBYTE_HDR_FEATURE(chip, pass) \ 155 (!! ((SIBYTE_HDR_FMASK(chip, pass) \ 156 | SIBYTE_HDR_FMASK_AFTER(chip, pass)) & SIBYTE_HDR_FEATURES)) 159 #define SIBYTE_HDR_FEATURE_EXACT(chip, pass) \ 160 (!! (SIBYTE_HDR_FMASK(chip, pass) & SIBYTE_HDR_FEATURES)) 163 #define SIBYTE_HDR_FEATURE_UP_TO(chip, pass) \ 164 (!! ((SIBYTE_HDR_FMASK(chip, pass) \ 165 | SIBYTE_HDR_FMASK_BEFORE(chip, pass)) & SIBYTE_HDR_FEATURES)) 249 * Macros to read/write on-chip registers
/linux-4.1.27/sound/spi/
H A D	at73c213.c	87 snd_at73c213_write_reg(struct snd_at73c213 *chip, u8 reg, u8 val) snd_at73c213_write_reg() argument 98 chip->spi_wbuffer[0] = reg; snd_at73c213_write_reg() 99 chip->spi_wbuffer[1] = val; snd_at73c213_write_reg() 101 msg_xfer.tx_buf = chip->spi_wbuffer; snd_at73c213_write_reg() 102 msg_xfer.rx_buf = chip->spi_rbuffer; snd_at73c213_write_reg() 105 retval = spi_sync(chip->spi, &msg); snd_at73c213_write_reg() 108 chip->reg_image[reg] = val; snd_at73c213_write_reg() 118 .rate_min = 8000, /* Replaced by chip->bitrate later. */ 119 .rate_max = 50000, /* Replaced by chip->bitrate later. */ 132 static int snd_at73c213_set_bitrate(struct snd_at73c213 *chip) snd_at73c213_set_bitrate() argument 134 unsigned long ssc_rate = clk_get_rate(chip->ssc->clk); snd_at73c213_set_bitrate() 176 status = clk_round_rate(chip->board->dac_clk, dac_rate_new); snd_at73c213_set_bitrate() 191 status = clk_set_rate(chip->board->dac_clk, status); snd_at73c213_set_bitrate() 196 ssc_writel(chip->ssc->regs, CMR, ssc_div/2); snd_at73c213_set_bitrate() 199 chip->bitrate = ssc_rate / (ssc_div * 16 * 2); snd_at73c213_set_bitrate() 201 dev_info(&chip->spi->dev, snd_at73c213_set_bitrate() 203 chip->bitrate, ssc_div); snd_at73c213_set_bitrate() 210 struct snd_at73c213 *chip = snd_pcm_substream_chip(substream); snd_at73c213_pcm_open() local 219 snd_at73c213_playback_hw.rate_min = chip->bitrate; snd_at73c213_pcm_open() 220 snd_at73c213_playback_hw.rate_max = chip->bitrate; snd_at73c213_pcm_open() 222 chip->substream = substream; snd_at73c213_pcm_open() 229 struct snd_at73c213 *chip = snd_pcm_substream_chip(substream); snd_at73c213_pcm_close() local 230 chip->substream = NULL; snd_at73c213_pcm_close() 237 struct snd_at73c213 *chip = snd_pcm_substream_chip(substream); snd_at73c213_pcm_hw_params() local 241 val = ssc_readl(chip->ssc->regs, TFMR); snd_at73c213_pcm_hw_params() 243 ssc_writel(chip->ssc->regs, TFMR, val); snd_at73c213_pcm_hw_params() 256 struct snd_at73c213 *chip = snd_pcm_substream_chip(substream); snd_at73c213_pcm_prepare() local 262 chip->period = 0; snd_at73c213_pcm_prepare() 264 ssc_writel(chip->ssc->regs, PDC_TPR, snd_at73c213_pcm_prepare() 266 ssc_writel(chip->ssc->regs, PDC_TCR, snd_at73c213_pcm_prepare() 268 ssc_writel(chip->ssc->regs, PDC_TNPR, snd_at73c213_pcm_prepare() 270 ssc_writel(chip->ssc->regs, PDC_TNCR, snd_at73c213_pcm_prepare() 279 struct snd_at73c213 *chip = snd_pcm_substream_chip(substream); snd_at73c213_pcm_trigger() local 282 spin_lock(&chip->lock); snd_at73c213_pcm_trigger() 286 ssc_writel(chip->ssc->regs, IER, SSC_BIT(IER_ENDTX)); snd_at73c213_pcm_trigger() 287 ssc_writel(chip->ssc->regs, PDC_PTCR, SSC_BIT(PDC_PTCR_TXTEN)); snd_at73c213_pcm_trigger() 290 ssc_writel(chip->ssc->regs, PDC_PTCR, SSC_BIT(PDC_PTCR_TXTDIS)); snd_at73c213_pcm_trigger() 291 ssc_writel(chip->ssc->regs, IDR, SSC_BIT(IDR_ENDTX)); snd_at73c213_pcm_trigger() 294 dev_dbg(&chip->spi->dev, "spurious command %x\n", cmd); snd_at73c213_pcm_trigger() 299 spin_unlock(&chip->lock); snd_at73c213_pcm_trigger() 307 struct snd_at73c213 *chip = snd_pcm_substream_chip(substream); snd_at73c213_pcm_pointer() local 312 bytes = ssc_readl(chip->ssc->regs, PDC_TPR) snd_at73c213_pcm_pointer() 333 static int snd_at73c213_pcm_new(struct snd_at73c213 *chip, int device) snd_at73c213_pcm_new() argument 338 retval = snd_pcm_new(chip->card, chip->card->shortname, snd_at73c213_pcm_new() 343 pcm->private_data = chip; snd_at73c213_pcm_new() 346 chip->pcm = pcm; snd_at73c213_pcm_new() 350 retval = snd_pcm_lib_preallocate_pages_for_all(chip->pcm, snd_at73c213_pcm_new() 351 SNDRV_DMA_TYPE_DEV, &chip->ssc->pdev->dev, snd_at73c213_pcm_new() 359 struct snd_at73c213 *chip = dev_id; snd_at73c213_interrupt() local 360 struct snd_pcm_runtime *runtime = chip->substream->runtime; snd_at73c213_interrupt() 367 spin_lock(&chip->lock); snd_at73c213_interrupt() 370 status = ssc_readl(chip->ssc->regs, IMR); snd_at73c213_interrupt() 373 chip->period++; snd_at73c213_interrupt() 374 if (chip->period == runtime->periods) snd_at73c213_interrupt() 375 chip->period = 0; snd_at73c213_interrupt() 376 next_period = chip->period + 1; snd_at73c213_interrupt() 382 ssc_writel(chip->ssc->regs, PDC_TNPR, snd_at73c213_interrupt() 384 ssc_writel(chip->ssc->regs, PDC_TNCR, snd_at73c213_interrupt() 389 ssc_readl(chip->ssc->regs, IMR); snd_at73c213_interrupt() 390 spin_unlock(&chip->lock); snd_at73c213_interrupt() 393 snd_pcm_period_elapsed(chip->substream); snd_at73c213_interrupt() 404 struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol); snd_at73c213_mono_get() local 410 mutex_lock(&chip->mixer_lock); snd_at73c213_mono_get() 413 (chip->reg_image[reg] >> shift) & mask; snd_at73c213_mono_get() 419 mutex_unlock(&chip->mixer_lock); snd_at73c213_mono_get() 427 struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol); snd_at73c213_mono_put() local 440 mutex_lock(&chip->mixer_lock); snd_at73c213_mono_put() 442 val = (chip->reg_image[reg] & ~(mask << shift)) | val; snd_at73c213_mono_put() 443 change = val != chip->reg_image[reg]; snd_at73c213_mono_put() 444 retval = snd_at73c213_write_reg(chip, reg, val); snd_at73c213_mono_put() 446 mutex_unlock(&chip->mixer_lock); snd_at73c213_mono_put() 474 struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol); snd_at73c213_stereo_get() local 482 mutex_lock(&chip->mixer_lock); snd_at73c213_stereo_get() 485 (chip->reg_image[left_reg] >> shift_left) & mask; snd_at73c213_stereo_get() 487 (chip->reg_image[right_reg] >> shift_right) & mask; snd_at73c213_stereo_get() 496 mutex_unlock(&chip->mixer_lock); snd_at73c213_stereo_get() 504 struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol); snd_at73c213_stereo_put() local 523 mutex_lock(&chip->mixer_lock); snd_at73c213_stereo_put() 525 val1 = (chip->reg_image[left_reg] & ~(mask << shift_left)) | val1; snd_at73c213_stereo_put() 526 val2 = (chip->reg_image[right_reg] & ~(mask << shift_right)) | val2; snd_at73c213_stereo_put() 527 change = val1 != chip->reg_image[left_reg] snd_at73c213_stereo_put() 528 || val2 != chip->reg_image[right_reg]; snd_at73c213_stereo_put() 529 retval = snd_at73c213_write_reg(chip, left_reg, val1); snd_at73c213_stereo_put() 531 mutex_unlock(&chip->mixer_lock); snd_at73c213_stereo_put() 534 retval = snd_at73c213_write_reg(chip, right_reg, val2); snd_at73c213_stereo_put() 536 mutex_unlock(&chip->mixer_lock); snd_at73c213_stereo_put() 540 mutex_unlock(&chip->mixer_lock); snd_at73c213_stereo_put() 553 struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol); snd_at73c213_mono_switch_get() local 558 mutex_lock(&chip->mixer_lock); snd_at73c213_mono_switch_get() 561 (chip->reg_image[reg] >> shift) & 0x01; snd_at73c213_mono_switch_get() 567 mutex_unlock(&chip->mixer_lock); snd_at73c213_mono_switch_get() 575 struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol); snd_at73c213_mono_switch_put() local 592 mutex_lock(&chip->mixer_lock); snd_at73c213_mono_switch_put() 594 val |= (chip->reg_image[reg] & ~(mask << shift)); snd_at73c213_mono_switch_put() 595 change = val != chip->reg_image[reg]; snd_at73c213_mono_switch_put() 597 retval = snd_at73c213_write_reg(chip, reg, val); snd_at73c213_mono_switch_put() 599 mutex_unlock(&chip->mixer_lock); snd_at73c213_mono_switch_put() 712 static int snd_at73c213_mixer(struct snd_at73c213 *chip) snd_at73c213_mixer() argument 717 if (chip == NULL || chip->pcm == NULL) snd_at73c213_mixer() 720 card = chip->card; snd_at73c213_mixer() 722 strcpy(card->mixername, chip->pcm->name); snd_at73c213_mixer() 727 chip)); snd_at73c213_mixer() 747 static int snd_at73c213_ssc_init(struct snd_at73c213 *chip) snd_at73c213_ssc_init() argument 755 ssc_writel(chip->ssc->regs, TCMR, snd_at73c213_ssc_init() 767 ssc_writel(chip->ssc->regs, TFMR, snd_at73c213_ssc_init() 777 static int snd_at73c213_chip_init(struct snd_at73c213 *chip) snd_at73c213_chip_init() argument 782 retval = snd_at73c213_set_bitrate(chip); snd_at73c213_chip_init() 787 clk_enable(chip->board->dac_clk); snd_at73c213_chip_init() 790 retval = snd_at73c213_write_reg(chip, DAC_RST, 0x04); snd_at73c213_chip_init() 794 retval = snd_at73c213_write_reg(chip, DAC_RST, 0x03); snd_at73c213_chip_init() 799 retval = snd_at73c213_write_reg(chip, DAC_PRECH, 0xff); snd_at73c213_chip_init() 802 retval = snd_at73c213_write_reg(chip, PA_CTRL, (1<<PA_CTRL_APAPRECH)); snd_at73c213_chip_init() 805 retval = snd_at73c213_write_reg(chip, DAC_CTRL, snd_at73c213_chip_init() 813 retval = snd_at73c213_write_reg(chip, PA_CTRL, snd_at73c213_chip_init() 821 retval = snd_at73c213_write_reg(chip, DAC_PRECH, (1<<DAC_PRECH_ONMSTR)); snd_at73c213_chip_init() 831 retval = snd_at73c213_write_reg(chip, DAC_CTRL, dac_ctrl); snd_at73c213_chip_init() 836 retval = snd_at73c213_write_reg(chip, DAC_LMPG, 0x3f); snd_at73c213_chip_init() 839 retval = snd_at73c213_write_reg(chip, DAC_RMPG, 0x3f); snd_at73c213_chip_init() 842 retval = snd_at73c213_write_reg(chip, DAC_LLOG, 0x3f); snd_at73c213_chip_init() 845 retval = snd_at73c213_write_reg(chip, DAC_RLOG, 0x3f); snd_at73c213_chip_init() 848 retval = snd_at73c213_write_reg(chip, DAC_LLIG, 0x11); snd_at73c213_chip_init() 851 retval = snd_at73c213_write_reg(chip, DAC_RLIG, 0x11); snd_at73c213_chip_init() 854 retval = snd_at73c213_write_reg(chip, DAC_AUXG, 0x11); snd_at73c213_chip_init() 859 ssc_writel(chip->ssc->regs, CR, SSC_BIT(CR_TXEN)); snd_at73c213_chip_init() 864 clk_disable(chip->board->dac_clk); snd_at73c213_chip_init() 871 struct snd_at73c213 *chip = device->device_data; snd_at73c213_dev_free() local 873 ssc_writel(chip->ssc->regs, CR, SSC_BIT(CR_TXDIS)); snd_at73c213_dev_free() 874 if (chip->irq >= 0) { snd_at73c213_dev_free() 875 free_irq(chip->irq, chip); snd_at73c213_dev_free() 876 chip->irq = -1; snd_at73c213_dev_free() 888 struct snd_at73c213 *chip = get_chip(card); snd_at73c213_dev_init() local 891 irq = chip->ssc->irq; snd_at73c213_dev_init() 895 spin_lock_init(&chip->lock); snd_at73c213_dev_init() 896 mutex_init(&chip->mixer_lock); snd_at73c213_dev_init() 897 chip->card = card; snd_at73c213_dev_init() 898 chip->irq = -1; snd_at73c213_dev_init() 900 retval = request_irq(irq, snd_at73c213_interrupt, 0, "at73c213", chip); snd_at73c213_dev_init() 902 dev_dbg(&chip->spi->dev, "unable to request irq %d\n", irq); snd_at73c213_dev_init() 905 chip->irq = irq; snd_at73c213_dev_init() 907 memcpy(&chip->reg_image, &snd_at73c213_original_image, snd_at73c213_dev_init() 910 retval = snd_at73c213_ssc_init(chip); snd_at73c213_dev_init() 914 retval = snd_at73c213_chip_init(chip); snd_at73c213_dev_init() 918 retval = snd_at73c213_pcm_new(chip, 0); snd_at73c213_dev_init() 922 retval = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops); snd_at73c213_dev_init() 926 retval = snd_at73c213_mixer(chip); snd_at73c213_dev_init() 933 snd_device_free(card, chip); snd_at73c213_dev_init() 935 free_irq(chip->irq, chip); snd_at73c213_dev_init() 936 chip->irq = -1; snd_at73c213_dev_init() 944 struct snd_at73c213 *chip; snd_at73c213_probe() local 972 chip = card->private_data; snd_at73c213_probe() 973 chip->spi = spi; snd_at73c213_probe() 974 chip->board = board; snd_at73c213_probe() 976 chip->ssc = ssc_request(board->ssc_id); snd_at73c213_probe() 977 if (IS_ERR(chip->ssc)) { snd_at73c213_probe() 980 retval = PTR_ERR(chip->ssc); snd_at73c213_probe() 990 sprintf(card->longname, "%s on irq %d", card->shortname, chip->irq); snd_at73c213_probe() 1001 ssc_free(chip->ssc); snd_at73c213_probe() 1011 struct snd_at73c213 *chip = card->private_data; snd_at73c213_remove() local 1015 ssc_writel(chip->ssc->regs, CR, SSC_BIT(CR_TXDIS)); snd_at73c213_remove() 1018 retval = snd_at73c213_write_reg(chip, DAC_LMPG, 0x3f); snd_at73c213_remove() 1021 retval = snd_at73c213_write_reg(chip, DAC_RMPG, 0x3f); snd_at73c213_remove() 1024 retval = snd_at73c213_write_reg(chip, DAC_LLOG, 0x3f); snd_at73c213_remove() 1027 retval = snd_at73c213_write_reg(chip, DAC_RLOG, 0x3f); snd_at73c213_remove() 1030 retval = snd_at73c213_write_reg(chip, DAC_LLIG, 0x11); snd_at73c213_remove() 1033 retval = snd_at73c213_write_reg(chip, DAC_RLIG, 0x11); snd_at73c213_remove() 1036 retval = snd_at73c213_write_reg(chip, DAC_AUXG, 0x11); snd_at73c213_remove() 1041 retval = snd_at73c213_write_reg(chip, PA_CTRL, snd_at73c213_remove() 1042 chip->reg_image[PA_CTRL] | 0x0f); snd_at73c213_remove() 1046 retval = snd_at73c213_write_reg(chip, PA_CTRL, snd_at73c213_remove() 1052 retval = snd_at73c213_write_reg(chip, DAC_CTRL, 0x0c); snd_at73c213_remove() 1056 retval = snd_at73c213_write_reg(chip, DAC_CTRL, 0x00); snd_at73c213_remove() 1061 retval = snd_at73c213_write_reg(chip, DAC_PRECH, 0x00); snd_at73c213_remove() 1067 clk_disable(chip->board->dac_clk); snd_at73c213_remove() 1069 ssc_free(chip->ssc); snd_at73c213_remove() 1080 struct snd_at73c213 *chip = card->private_data; snd_at73c213_suspend() local 1082 ssc_writel(chip->ssc->regs, CR, SSC_BIT(CR_TXDIS)); snd_at73c213_suspend() 1083 clk_disable(chip->board->dac_clk); snd_at73c213_suspend() 1091 struct snd_at73c213 *chip = card->private_data; snd_at73c213_resume() local 1093 clk_enable(chip->board->dac_clk); snd_at73c213_resume() 1094 ssc_writel(chip->ssc->regs, CR, SSC_BIT(CR_TXEN)); snd_at73c213_resume()
/linux-4.1.27/drivers/dma/dw/
H A D	pci.c	26 struct dw_dma_chip *chip; dw_pci_probe() local 51 chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL); dw_pci_probe() 52 if (!chip) dw_pci_probe() 55 chip->dev = &pdev->dev; dw_pci_probe() 56 chip->regs = pcim_iomap_table(pdev)[0]; dw_pci_probe() 57 chip->irq = pdev->irq; dw_pci_probe() 59 ret = dw_dma_probe(chip, pdata); dw_pci_probe() 63 pci_set_drvdata(pdev, chip); dw_pci_probe() 70 struct dw_dma_chip *chip = pci_get_drvdata(pdev); dw_pci_remove() local 73 ret = dw_dma_remove(chip); dw_pci_remove() 83 struct dw_dma_chip *chip = pci_get_drvdata(pci); dw_pci_suspend_late() local 85 return dw_dma_disable(chip); dw_pci_suspend_late() 91 struct dw_dma_chip *chip = pci_get_drvdata(pci); dw_pci_resume_early() local 93 return dw_dma_enable(chip); dw_pci_resume_early()
/linux-4.1.27/drivers/hwmon/
H A D	ad7314.c	44 static int ad7314_spi_read(struct ad7314_data *chip) ad7314_spi_read() argument 48 ret = spi_read(chip->spi_dev, (u8 *)&chip->rx, sizeof(chip->rx)); ad7314_spi_read() 50 dev_err(&chip->spi_dev->dev, "SPI read error\n"); ad7314_spi_read() 54 return be16_to_cpu(chip->rx); ad7314_spi_read() 61 struct ad7314_data *chip = dev_get_drvdata(dev); ad7314_show_temperature() local 65 ret = ad7314_spi_read(chip); ad7314_show_temperature() 68 switch (spi_get_device_id(chip->spi_dev)->driver_data) { ad7314_show_temperature() 114 struct ad7314_data *chip; ad7314_probe() local 116 chip = devm_kzalloc(&spi_dev->dev, sizeof(*chip), GFP_KERNEL); ad7314_probe() 117 if (chip == NULL) ad7314_probe() 120 spi_set_drvdata(spi_dev, chip); ad7314_probe() 126 chip->hwmon_dev = hwmon_device_register(&spi_dev->dev); ad7314_probe() 127 if (IS_ERR(chip->hwmon_dev)) { ad7314_probe() 128 ret = PTR_ERR(chip->hwmon_dev); ad7314_probe() 131 chip->spi_dev = spi_dev; ad7314_probe() 141 struct ad7314_data *chip = spi_get_drvdata(spi_dev); ad7314_remove() local 143 hwmon_device_unregister(chip->hwmon_dev); ad7314_remove()
/linux-4.1.27/drivers/media/pci/cx88/
H A D	cx88-alsa.c	50 printk(KERN_INFO "%s/1: " fmt, chip->core->name , ## arg);\ 55 printk(KERN_DEBUG "%s/1: " fmt, chip->core->name , ## arg);\ 138 static int _cx88_start_audio_dma(snd_cx88_card_t *chip) _cx88_start_audio_dma() argument 140 struct cx88_audio_buffer *buf = chip->buf; _cx88_start_audio_dma() 141 struct cx88_core *core=chip->core; _cx88_start_audio_dma() 148 cx88_sram_channel_setup(chip->core, audio_ch, buf->bpl, buf->risc.dma); _cx88_start_audio_dma() 155 atomic_set(&chip->count, 0); _cx88_start_audio_dma() 159 chip->num_periods, buf->bpl * chip->num_periods); _cx88_start_audio_dma() 169 cx_set(MO_PCI_INTMSK, chip->core->pci_irqmask | PCI_INT_AUDINT); _cx88_start_audio_dma() 176 cx88_sram_channel_dump(chip->core, audio_ch); _cx88_start_audio_dma() 184 static int _cx88_stop_audio_dma(snd_cx88_card_t *chip) _cx88_stop_audio_dma() argument 186 struct cx88_core *core=chip->core; _cx88_stop_audio_dma() 198 cx88_sram_channel_dump(chip->core, &cx88_sram_channels[SRAM_CH25]); _cx88_stop_audio_dma() 224 static void cx8801_aud_irq(snd_cx88_card_t *chip) cx8801_aud_irq() argument 226 struct cx88_core *core = chip->core; cx8801_aud_irq() 251 atomic_set(&chip->count, cx_read(MO_AUDD_GPCNT)); cx8801_aud_irq() 252 snd_pcm_period_elapsed(chip->substream); cx8801_aud_irq() 262 snd_cx88_card_t *chip = dev_id; cx8801_irq() local 263 struct cx88_core *core = chip->core; cx8801_irq() 280 cx8801_aud_irq(chip); cx8801_irq() 294 static int cx88_alsa_dma_init(struct cx88_audio_dev *chip, int nr_pages) cx88_alsa_dma_init() argument 296 struct cx88_audio_buffer *buf = chip->buf; cx88_alsa_dma_init() 371 static int dsp_buffer_free(snd_cx88_card_t *chip) dsp_buffer_free() argument 373 struct cx88_riscmem *risc = &chip->buf->risc; dsp_buffer_free() 375 BUG_ON(!chip->dma_size); dsp_buffer_free() 378 cx88_alsa_dma_unmap(chip); dsp_buffer_free() 379 cx88_alsa_dma_free(chip->buf); dsp_buffer_free() 381 pci_free_consistent(chip->pci, risc->size, risc->cpu, risc->dma); dsp_buffer_free() 382 kfree(chip->buf); dsp_buffer_free() 384 chip->buf = NULL; dsp_buffer_free() 423 snd_cx88_card_t *chip = snd_pcm_substream_chip(substream); snd_cx88_pcm_open() local 427 if (!chip) { snd_cx88_pcm_open() 437 chip->substream = substream; snd_cx88_pcm_open() 468 snd_cx88_card_t *chip = snd_pcm_substream_chip(substream); snd_cx88_hw_params() local 474 dsp_buffer_free(chip); snd_cx88_hw_params() 478 chip->period_size = params_period_bytes(hw_params); snd_cx88_hw_params() 479 chip->num_periods = params_periods(hw_params); snd_cx88_hw_params() 480 chip->dma_size = chip->period_size * params_periods(hw_params); snd_cx88_hw_params() 482 BUG_ON(!chip->dma_size); snd_cx88_hw_params() 483 BUG_ON(chip->num_periods & (chip->num_periods-1)); snd_cx88_hw_params() 489 chip->buf = buf; snd_cx88_hw_params() 490 buf->bpl = chip->period_size; snd_cx88_hw_params() 492 ret = cx88_alsa_dma_init(chip, snd_cx88_hw_params() 493 (PAGE_ALIGN(chip->dma_size) >> PAGE_SHIFT)); snd_cx88_hw_params() 497 ret = cx88_alsa_dma_map(chip); snd_cx88_hw_params() 501 ret = cx88_risc_databuffer(chip->pci, &buf->risc, buf->sglist, snd_cx88_hw_params() 502 chip->period_size, chip->num_periods, 1); snd_cx88_hw_params() 510 substream->runtime->dma_area = chip->buf->vaddr; snd_cx88_hw_params() 511 substream->runtime->dma_bytes = chip->dma_size; snd_cx88_hw_params() 526 snd_cx88_card_t *chip = snd_pcm_substream_chip(substream); snd_cx88_hw_free() local 529 dsp_buffer_free(chip); snd_cx88_hw_free() 549 snd_cx88_card_t *chip = snd_pcm_substream_chip(substream); snd_cx88_card_trigger() local 553 spin_lock(&chip->reg_lock); snd_cx88_card_trigger() 557 err=_cx88_start_audio_dma(chip); snd_cx88_card_trigger() 560 err=_cx88_stop_audio_dma(chip); snd_cx88_card_trigger() 567 spin_unlock(&chip->reg_lock); snd_cx88_card_trigger() 577 snd_cx88_card_t *chip = snd_pcm_substream_chip(substream); snd_cx88_pointer() local 581 count = atomic_read(&chip->count); snd_cx88_pointer() 617 static int snd_cx88_pcm(snd_cx88_card_t *chip, int device, const char *name) snd_cx88_pcm() argument 622 err = snd_pcm_new(chip->card, name, device, 0, 1, &pcm); snd_cx88_pcm() 625 pcm->private_data = chip; snd_cx88_pcm() 649 snd_cx88_card_t *chip = snd_kcontrol_chip(kcontrol); snd_cx88_volume_get() local 650 struct cx88_core *core=chip->core; snd_cx88_volume_get() 664 snd_cx88_card_t *chip = snd_kcontrol_chip(kcontrol); snd_cx88_wm8775_volume_put() local 665 struct cx88_core *core = chip->core; snd_cx88_wm8775_volume_put() 686 snd_cx88_card_t *chip = snd_kcontrol_chip(kcontrol); snd_cx88_volume_put() local 687 struct cx88_core *core=chip->core; snd_cx88_volume_put() 705 spin_lock_irq(&chip->reg_lock); snd_cx88_volume_put() 715 spin_unlock_irq(&chip->reg_lock); snd_cx88_volume_put() 736 snd_cx88_card_t *chip = snd_kcontrol_chip(kcontrol); snd_cx88_switch_get() local 737 struct cx88_core *core = chip->core; snd_cx88_switch_get() 747 snd_cx88_card_t *chip = snd_kcontrol_chip(kcontrol); snd_cx88_switch_put() local 748 struct cx88_core *core = chip->core; snd_cx88_switch_put() 753 spin_lock_irq(&chip->reg_lock); snd_cx88_switch_put() 763 spin_unlock_irq(&chip->reg_lock); snd_cx88_switch_put() 788 snd_cx88_card_t *chip = snd_kcontrol_chip(kcontrol); snd_cx88_alc_get() local 789 struct cx88_core *core = chip->core; snd_cx88_alc_get() 800 snd_cx88_card_t *chip = snd_kcontrol_chip(kcontrol); snd_cx88_alc_put() local 801 struct cx88_core *core = chip->core; snd_cx88_alc_put() 840 static int snd_cx88_free(snd_cx88_card_t *chip) snd_cx88_free() argument 843 if (chip->irq >= 0) snd_cx88_free() 844 free_irq(chip->irq, chip); snd_cx88_free() 846 cx88_core_put(chip->core,chip->pci); snd_cx88_free() 848 pci_disable_device(chip->pci); snd_cx88_free() 857 snd_cx88_card_t *chip = card->private_data; snd_cx88_dev_free() local 859 snd_cx88_free(chip); snd_cx88_dev_free() 872 snd_cx88_card_t *chip; snd_cx88_create() local 885 chip = card->private_data; snd_cx88_create() 902 chip->card = card; snd_cx88_create() 903 chip->pci = pci; snd_cx88_create() 904 chip->irq = -1; snd_cx88_create() 905 spin_lock_init(&chip->reg_lock); snd_cx88_create() 907 chip->core = core; snd_cx88_create() 910 err = request_irq(chip->pci->irq, cx8801_irq, snd_cx88_create() 911 IRQF_SHARED, chip->core->name, chip); snd_cx88_create() 914 chip->core->name, chip->pci->irq); snd_cx88_create() 926 chip->irq = pci->irq; snd_cx88_create() 927 synchronize_irq(chip->irq); snd_cx88_create() 929 *rchip = chip; snd_cx88_create() 939 snd_cx88_card_t *chip; cx88_audio_initdev() local 958 err = snd_cx88_create(card, pci, &chip, &core); cx88_audio_initdev() 962 err = snd_cx88_pcm(chip, 0, "CX88 Digital"); cx88_audio_initdev() 966 err = snd_ctl_add(card, snd_ctl_new1(&snd_cx88_volume, chip)); cx88_audio_initdev() 969 err = snd_ctl_add(card, snd_ctl_new1(&snd_cx88_dac_switch, chip)); cx88_audio_initdev() 972 err = snd_ctl_add(card, snd_ctl_new1(&snd_cx88_source_switch, chip)); cx88_audio_initdev() 978 snd_ctl_add(card, snd_ctl_new1(&snd_cx88_alc_switch, chip)); cx88_audio_initdev()

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