1/* 2 * Copyright (c) by Jaroslav Kysela <perex@perex.cz> 3 * Routines for control of YMF724/740/744/754 chips 4 * 5 * This program is free software; you can redistribute it and/or modify 6 * it under the terms of the GNU General Public License as published by 7 * the Free Software Foundation; either version 2 of the License, or 8 * (at your option) any later version. 9 * 10 * This program is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 * 15 * You should have received a copy of the GNU General Public License 16 * along with this program; if not, write to the Free Software 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 18 * 19 */ 20 21#include <linux/delay.h> 22#include <linux/firmware.h> 23#include <linux/init.h> 24#include <linux/interrupt.h> 25#include <linux/pci.h> 26#include <linux/sched.h> 27#include <linux/slab.h> 28#include <linux/mutex.h> 29#include <linux/module.h> 30#include <linux/io.h> 31 32#include <sound/core.h> 33#include <sound/control.h> 34#include <sound/info.h> 35#include <sound/tlv.h> 36#include "ymfpci.h" 37#include <sound/asoundef.h> 38#include <sound/mpu401.h> 39 40#include <asm/byteorder.h> 41 42/* 43 * common I/O routines 44 */ 45 46static void snd_ymfpci_irq_wait(struct snd_ymfpci *chip); 47 48static inline u8 snd_ymfpci_readb(struct snd_ymfpci *chip, u32 offset) 49{ 50 return readb(chip->reg_area_virt + offset); 51} 52 53static inline void snd_ymfpci_writeb(struct snd_ymfpci *chip, u32 offset, u8 val) 54{ 55 writeb(val, chip->reg_area_virt + offset); 56} 57 58static inline u16 snd_ymfpci_readw(struct snd_ymfpci *chip, u32 offset) 59{ 60 return readw(chip->reg_area_virt + offset); 61} 62 63static inline void snd_ymfpci_writew(struct snd_ymfpci *chip, u32 offset, u16 val) 64{ 65 writew(val, chip->reg_area_virt + offset); 66} 67 68static inline u32 snd_ymfpci_readl(struct snd_ymfpci *chip, u32 offset) 69{ 70 return readl(chip->reg_area_virt + offset); 71} 72 73static inline void snd_ymfpci_writel(struct snd_ymfpci *chip, u32 offset, u32 val) 74{ 75 writel(val, chip->reg_area_virt + offset); 76} 77 78static int snd_ymfpci_codec_ready(struct snd_ymfpci *chip, int secondary) 79{ 80 unsigned long end_time; 81 u32 reg = secondary ? YDSXGR_SECSTATUSADR : YDSXGR_PRISTATUSADR; 82 83 end_time = jiffies + msecs_to_jiffies(750); 84 do { 85 if ((snd_ymfpci_readw(chip, reg) & 0x8000) == 0) 86 return 0; 87 schedule_timeout_uninterruptible(1); 88 } while (time_before(jiffies, end_time)); 89 dev_err(chip->card->dev, 90 "codec_ready: codec %i is not ready [0x%x]\n", 91 secondary, snd_ymfpci_readw(chip, reg)); 92 return -EBUSY; 93} 94 95static void snd_ymfpci_codec_write(struct snd_ac97 *ac97, u16 reg, u16 val) 96{ 97 struct snd_ymfpci *chip = ac97->private_data; 98 u32 cmd; 99 100 snd_ymfpci_codec_ready(chip, 0); 101 cmd = ((YDSXG_AC97WRITECMD | reg) << 16) | val; 102 snd_ymfpci_writel(chip, YDSXGR_AC97CMDDATA, cmd); 103} 104 105static u16 snd_ymfpci_codec_read(struct snd_ac97 *ac97, u16 reg) 106{ 107 struct snd_ymfpci *chip = ac97->private_data; 108 109 if (snd_ymfpci_codec_ready(chip, 0)) 110 return ~0; 111 snd_ymfpci_writew(chip, YDSXGR_AC97CMDADR, YDSXG_AC97READCMD | reg); 112 if (snd_ymfpci_codec_ready(chip, 0)) 113 return ~0; 114 if (chip->device_id == PCI_DEVICE_ID_YAMAHA_744 && chip->rev < 2) { 115 int i; 116 for (i = 0; i < 600; i++) 117 snd_ymfpci_readw(chip, YDSXGR_PRISTATUSDATA); 118 } 119 return snd_ymfpci_readw(chip, YDSXGR_PRISTATUSDATA); 120} 121 122/* 123 * Misc routines 124 */ 125 126static u32 snd_ymfpci_calc_delta(u32 rate) 127{ 128 switch (rate) { 129 case 8000: return 0x02aaab00; 130 case 11025: return 0x03accd00; 131 case 16000: return 0x05555500; 132 case 22050: return 0x07599a00; 133 case 32000: return 0x0aaaab00; 134 case 44100: return 0x0eb33300; 135 default: return ((rate << 16) / 375) << 5; 136 } 137} 138 139static u32 def_rate[8] = { 140 100, 2000, 8000, 11025, 16000, 22050, 32000, 48000 141}; 142 143static u32 snd_ymfpci_calc_lpfK(u32 rate) 144{ 145 u32 i; 146 static u32 val[8] = { 147 0x00570000, 0x06AA0000, 0x18B20000, 0x20930000, 148 0x2B9A0000, 0x35A10000, 0x3EAA0000, 0x40000000 149 }; 150 151 if (rate == 44100) 152 return 0x40000000; /* FIXME: What's the right value? */ 153 for (i = 0; i < 8; i++) 154 if (rate <= def_rate[i]) 155 return val[i]; 156 return val[0]; 157} 158 159static u32 snd_ymfpci_calc_lpfQ(u32 rate) 160{ 161 u32 i; 162 static u32 val[8] = { 163 0x35280000, 0x34A70000, 0x32020000, 0x31770000, 164 0x31390000, 0x31C90000, 0x33D00000, 0x40000000 165 }; 166 167 if (rate == 44100) 168 return 0x370A0000; 169 for (i = 0; i < 8; i++) 170 if (rate <= def_rate[i]) 171 return val[i]; 172 return val[0]; 173} 174 175/* 176 * Hardware start management 177 */ 178 179static void snd_ymfpci_hw_start(struct snd_ymfpci *chip) 180{ 181 unsigned long flags; 182 183 spin_lock_irqsave(&chip->reg_lock, flags); 184 if (chip->start_count++ > 0) 185 goto __end; 186 snd_ymfpci_writel(chip, YDSXGR_MODE, 187 snd_ymfpci_readl(chip, YDSXGR_MODE) | 3); 188 chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT) & 1; 189 __end: 190 spin_unlock_irqrestore(&chip->reg_lock, flags); 191} 192 193static void snd_ymfpci_hw_stop(struct snd_ymfpci *chip) 194{ 195 unsigned long flags; 196 long timeout = 1000; 197 198 spin_lock_irqsave(&chip->reg_lock, flags); 199 if (--chip->start_count > 0) 200 goto __end; 201 snd_ymfpci_writel(chip, YDSXGR_MODE, 202 snd_ymfpci_readl(chip, YDSXGR_MODE) & ~3); 203 while (timeout-- > 0) { 204 if ((snd_ymfpci_readl(chip, YDSXGR_STATUS) & 2) == 0) 205 break; 206 } 207 if (atomic_read(&chip->interrupt_sleep_count)) { 208 atomic_set(&chip->interrupt_sleep_count, 0); 209 wake_up(&chip->interrupt_sleep); 210 } 211 __end: 212 spin_unlock_irqrestore(&chip->reg_lock, flags); 213} 214 215/* 216 * Playback voice management 217 */ 218 219static int voice_alloc(struct snd_ymfpci *chip, 220 enum snd_ymfpci_voice_type type, int pair, 221 struct snd_ymfpci_voice **rvoice) 222{ 223 struct snd_ymfpci_voice *voice, *voice2; 224 int idx; 225 226 *rvoice = NULL; 227 for (idx = 0; idx < YDSXG_PLAYBACK_VOICES; idx += pair ? 2 : 1) { 228 voice = &chip->voices[idx]; 229 voice2 = pair ? &chip->voices[idx+1] : NULL; 230 if (voice->use || (voice2 && voice2->use)) 231 continue; 232 voice->use = 1; 233 if (voice2) 234 voice2->use = 1; 235 switch (type) { 236 case YMFPCI_PCM: 237 voice->pcm = 1; 238 if (voice2) 239 voice2->pcm = 1; 240 break; 241 case YMFPCI_SYNTH: 242 voice->synth = 1; 243 break; 244 case YMFPCI_MIDI: 245 voice->midi = 1; 246 break; 247 } 248 snd_ymfpci_hw_start(chip); 249 if (voice2) 250 snd_ymfpci_hw_start(chip); 251 *rvoice = voice; 252 return 0; 253 } 254 return -ENOMEM; 255} 256 257static int snd_ymfpci_voice_alloc(struct snd_ymfpci *chip, 258 enum snd_ymfpci_voice_type type, int pair, 259 struct snd_ymfpci_voice **rvoice) 260{ 261 unsigned long flags; 262 int result; 263 264 if (snd_BUG_ON(!rvoice)) 265 return -EINVAL; 266 if (snd_BUG_ON(pair && type != YMFPCI_PCM)) 267 return -EINVAL; 268 269 spin_lock_irqsave(&chip->voice_lock, flags); 270 for (;;) { 271 result = voice_alloc(chip, type, pair, rvoice); 272 if (result == 0 || type != YMFPCI_PCM) 273 break; 274 /* TODO: synth/midi voice deallocation */ 275 break; 276 } 277 spin_unlock_irqrestore(&chip->voice_lock, flags); 278 return result; 279} 280 281static int snd_ymfpci_voice_free(struct snd_ymfpci *chip, struct snd_ymfpci_voice *pvoice) 282{ 283 unsigned long flags; 284 285 if (snd_BUG_ON(!pvoice)) 286 return -EINVAL; 287 snd_ymfpci_hw_stop(chip); 288 spin_lock_irqsave(&chip->voice_lock, flags); 289 if (pvoice->number == chip->src441_used) { 290 chip->src441_used = -1; 291 pvoice->ypcm->use_441_slot = 0; 292 } 293 pvoice->use = pvoice->pcm = pvoice->synth = pvoice->midi = 0; 294 pvoice->ypcm = NULL; 295 pvoice->interrupt = NULL; 296 spin_unlock_irqrestore(&chip->voice_lock, flags); 297 return 0; 298} 299 300/* 301 * PCM part 302 */ 303 304static void snd_ymfpci_pcm_interrupt(struct snd_ymfpci *chip, struct snd_ymfpci_voice *voice) 305{ 306 struct snd_ymfpci_pcm *ypcm; 307 u32 pos, delta; 308 309 if ((ypcm = voice->ypcm) == NULL) 310 return; 311 if (ypcm->substream == NULL) 312 return; 313 spin_lock(&chip->reg_lock); 314 if (ypcm->running) { 315 pos = le32_to_cpu(voice->bank[chip->active_bank].start); 316 if (pos < ypcm->last_pos) 317 delta = pos + (ypcm->buffer_size - ypcm->last_pos); 318 else 319 delta = pos - ypcm->last_pos; 320 ypcm->period_pos += delta; 321 ypcm->last_pos = pos; 322 if (ypcm->period_pos >= ypcm->period_size) { 323 /* 324 dev_dbg(chip->card->dev, 325 "done - active_bank = 0x%x, start = 0x%x\n", 326 chip->active_bank, 327 voice->bank[chip->active_bank].start); 328 */ 329 ypcm->period_pos %= ypcm->period_size; 330 spin_unlock(&chip->reg_lock); 331 snd_pcm_period_elapsed(ypcm->substream); 332 spin_lock(&chip->reg_lock); 333 } 334 335 if (unlikely(ypcm->update_pcm_vol)) { 336 unsigned int subs = ypcm->substream->number; 337 unsigned int next_bank = 1 - chip->active_bank; 338 struct snd_ymfpci_playback_bank *bank; 339 u32 volume; 340 341 bank = &voice->bank[next_bank]; 342 volume = cpu_to_le32(chip->pcm_mixer[subs].left << 15); 343 bank->left_gain_end = volume; 344 if (ypcm->output_rear) 345 bank->eff2_gain_end = volume; 346 if (ypcm->voices[1]) 347 bank = &ypcm->voices[1]->bank[next_bank]; 348 volume = cpu_to_le32(chip->pcm_mixer[subs].right << 15); 349 bank->right_gain_end = volume; 350 if (ypcm->output_rear) 351 bank->eff3_gain_end = volume; 352 ypcm->update_pcm_vol--; 353 } 354 } 355 spin_unlock(&chip->reg_lock); 356} 357 358static void snd_ymfpci_pcm_capture_interrupt(struct snd_pcm_substream *substream) 359{ 360 struct snd_pcm_runtime *runtime = substream->runtime; 361 struct snd_ymfpci_pcm *ypcm = runtime->private_data; 362 struct snd_ymfpci *chip = ypcm->chip; 363 u32 pos, delta; 364 365 spin_lock(&chip->reg_lock); 366 if (ypcm->running) { 367 pos = le32_to_cpu(chip->bank_capture[ypcm->capture_bank_number][chip->active_bank]->start) >> ypcm->shift; 368 if (pos < ypcm->last_pos) 369 delta = pos + (ypcm->buffer_size - ypcm->last_pos); 370 else 371 delta = pos - ypcm->last_pos; 372 ypcm->period_pos += delta; 373 ypcm->last_pos = pos; 374 if (ypcm->period_pos >= ypcm->period_size) { 375 ypcm->period_pos %= ypcm->period_size; 376 /* 377 dev_dbg(chip->card->dev, 378 "done - active_bank = 0x%x, start = 0x%x\n", 379 chip->active_bank, 380 voice->bank[chip->active_bank].start); 381 */ 382 spin_unlock(&chip->reg_lock); 383 snd_pcm_period_elapsed(substream); 384 spin_lock(&chip->reg_lock); 385 } 386 } 387 spin_unlock(&chip->reg_lock); 388} 389 390static int snd_ymfpci_playback_trigger(struct snd_pcm_substream *substream, 391 int cmd) 392{ 393 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 394 struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data; 395 struct snd_kcontrol *kctl = NULL; 396 int result = 0; 397 398 spin_lock(&chip->reg_lock); 399 if (ypcm->voices[0] == NULL) { 400 result = -EINVAL; 401 goto __unlock; 402 } 403 switch (cmd) { 404 case SNDRV_PCM_TRIGGER_START: 405 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 406 case SNDRV_PCM_TRIGGER_RESUME: 407 chip->ctrl_playback[ypcm->voices[0]->number + 1] = cpu_to_le32(ypcm->voices[0]->bank_addr); 408 if (ypcm->voices[1] != NULL && !ypcm->use_441_slot) 409 chip->ctrl_playback[ypcm->voices[1]->number + 1] = cpu_to_le32(ypcm->voices[1]->bank_addr); 410 ypcm->running = 1; 411 break; 412 case SNDRV_PCM_TRIGGER_STOP: 413 if (substream->pcm == chip->pcm && !ypcm->use_441_slot) { 414 kctl = chip->pcm_mixer[substream->number].ctl; 415 kctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE; 416 } 417 /* fall through */ 418 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 419 case SNDRV_PCM_TRIGGER_SUSPEND: 420 chip->ctrl_playback[ypcm->voices[0]->number + 1] = 0; 421 if (ypcm->voices[1] != NULL && !ypcm->use_441_slot) 422 chip->ctrl_playback[ypcm->voices[1]->number + 1] = 0; 423 ypcm->running = 0; 424 break; 425 default: 426 result = -EINVAL; 427 break; 428 } 429 __unlock: 430 spin_unlock(&chip->reg_lock); 431 if (kctl) 432 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO, &kctl->id); 433 return result; 434} 435static int snd_ymfpci_capture_trigger(struct snd_pcm_substream *substream, 436 int cmd) 437{ 438 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 439 struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data; 440 int result = 0; 441 u32 tmp; 442 443 spin_lock(&chip->reg_lock); 444 switch (cmd) { 445 case SNDRV_PCM_TRIGGER_START: 446 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 447 case SNDRV_PCM_TRIGGER_RESUME: 448 tmp = snd_ymfpci_readl(chip, YDSXGR_MAPOFREC) | (1 << ypcm->capture_bank_number); 449 snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, tmp); 450 ypcm->running = 1; 451 break; 452 case SNDRV_PCM_TRIGGER_STOP: 453 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 454 case SNDRV_PCM_TRIGGER_SUSPEND: 455 tmp = snd_ymfpci_readl(chip, YDSXGR_MAPOFREC) & ~(1 << ypcm->capture_bank_number); 456 snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, tmp); 457 ypcm->running = 0; 458 break; 459 default: 460 result = -EINVAL; 461 break; 462 } 463 spin_unlock(&chip->reg_lock); 464 return result; 465} 466 467static int snd_ymfpci_pcm_voice_alloc(struct snd_ymfpci_pcm *ypcm, int voices) 468{ 469 int err; 470 471 if (ypcm->voices[1] != NULL && voices < 2) { 472 snd_ymfpci_voice_free(ypcm->chip, ypcm->voices[1]); 473 ypcm->voices[1] = NULL; 474 } 475 if (voices == 1 && ypcm->voices[0] != NULL) 476 return 0; /* already allocated */ 477 if (voices == 2 && ypcm->voices[0] != NULL && ypcm->voices[1] != NULL) 478 return 0; /* already allocated */ 479 if (voices > 1) { 480 if (ypcm->voices[0] != NULL && ypcm->voices[1] == NULL) { 481 snd_ymfpci_voice_free(ypcm->chip, ypcm->voices[0]); 482 ypcm->voices[0] = NULL; 483 } 484 } 485 err = snd_ymfpci_voice_alloc(ypcm->chip, YMFPCI_PCM, voices > 1, &ypcm->voices[0]); 486 if (err < 0) 487 return err; 488 ypcm->voices[0]->ypcm = ypcm; 489 ypcm->voices[0]->interrupt = snd_ymfpci_pcm_interrupt; 490 if (voices > 1) { 491 ypcm->voices[1] = &ypcm->chip->voices[ypcm->voices[0]->number + 1]; 492 ypcm->voices[1]->ypcm = ypcm; 493 } 494 return 0; 495} 496 497static void snd_ymfpci_pcm_init_voice(struct snd_ymfpci_pcm *ypcm, unsigned int voiceidx, 498 struct snd_pcm_runtime *runtime, 499 int has_pcm_volume) 500{ 501 struct snd_ymfpci_voice *voice = ypcm->voices[voiceidx]; 502 u32 format; 503 u32 delta = snd_ymfpci_calc_delta(runtime->rate); 504 u32 lpfQ = snd_ymfpci_calc_lpfQ(runtime->rate); 505 u32 lpfK = snd_ymfpci_calc_lpfK(runtime->rate); 506 struct snd_ymfpci_playback_bank *bank; 507 unsigned int nbank; 508 u32 vol_left, vol_right; 509 u8 use_left, use_right; 510 unsigned long flags; 511 512 if (snd_BUG_ON(!voice)) 513 return; 514 if (runtime->channels == 1) { 515 use_left = 1; 516 use_right = 1; 517 } else { 518 use_left = (voiceidx & 1) == 0; 519 use_right = !use_left; 520 } 521 if (has_pcm_volume) { 522 vol_left = cpu_to_le32(ypcm->chip->pcm_mixer 523 [ypcm->substream->number].left << 15); 524 vol_right = cpu_to_le32(ypcm->chip->pcm_mixer 525 [ypcm->substream->number].right << 15); 526 } else { 527 vol_left = cpu_to_le32(0x40000000); 528 vol_right = cpu_to_le32(0x40000000); 529 } 530 spin_lock_irqsave(&ypcm->chip->voice_lock, flags); 531 format = runtime->channels == 2 ? 0x00010000 : 0; 532 if (snd_pcm_format_width(runtime->format) == 8) 533 format |= 0x80000000; 534 else if (ypcm->chip->device_id == PCI_DEVICE_ID_YAMAHA_754 && 535 runtime->rate == 44100 && runtime->channels == 2 && 536 voiceidx == 0 && (ypcm->chip->src441_used == -1 || 537 ypcm->chip->src441_used == voice->number)) { 538 ypcm->chip->src441_used = voice->number; 539 ypcm->use_441_slot = 1; 540 format |= 0x10000000; 541 } 542 if (ypcm->chip->src441_used == voice->number && 543 (format & 0x10000000) == 0) { 544 ypcm->chip->src441_used = -1; 545 ypcm->use_441_slot = 0; 546 } 547 if (runtime->channels == 2 && (voiceidx & 1) != 0) 548 format |= 1; 549 spin_unlock_irqrestore(&ypcm->chip->voice_lock, flags); 550 for (nbank = 0; nbank < 2; nbank++) { 551 bank = &voice->bank[nbank]; 552 memset(bank, 0, sizeof(*bank)); 553 bank->format = cpu_to_le32(format); 554 bank->base = cpu_to_le32(runtime->dma_addr); 555 bank->loop_end = cpu_to_le32(ypcm->buffer_size); 556 bank->lpfQ = cpu_to_le32(lpfQ); 557 bank->delta = 558 bank->delta_end = cpu_to_le32(delta); 559 bank->lpfK = 560 bank->lpfK_end = cpu_to_le32(lpfK); 561 bank->eg_gain = 562 bank->eg_gain_end = cpu_to_le32(0x40000000); 563 564 if (ypcm->output_front) { 565 if (use_left) { 566 bank->left_gain = 567 bank->left_gain_end = vol_left; 568 } 569 if (use_right) { 570 bank->right_gain = 571 bank->right_gain_end = vol_right; 572 } 573 } 574 if (ypcm->output_rear) { 575 if (!ypcm->swap_rear) { 576 if (use_left) { 577 bank->eff2_gain = 578 bank->eff2_gain_end = vol_left; 579 } 580 if (use_right) { 581 bank->eff3_gain = 582 bank->eff3_gain_end = vol_right; 583 } 584 } else { 585 /* The SPDIF out channels seem to be swapped, so we have 586 * to swap them here, too. The rear analog out channels 587 * will be wrong, but otherwise AC3 would not work. 588 */ 589 if (use_left) { 590 bank->eff3_gain = 591 bank->eff3_gain_end = vol_left; 592 } 593 if (use_right) { 594 bank->eff2_gain = 595 bank->eff2_gain_end = vol_right; 596 } 597 } 598 } 599 } 600} 601 602static int snd_ymfpci_ac3_init(struct snd_ymfpci *chip) 603{ 604 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci), 605 4096, &chip->ac3_tmp_base) < 0) 606 return -ENOMEM; 607 608 chip->bank_effect[3][0]->base = 609 chip->bank_effect[3][1]->base = cpu_to_le32(chip->ac3_tmp_base.addr); 610 chip->bank_effect[3][0]->loop_end = 611 chip->bank_effect[3][1]->loop_end = cpu_to_le32(1024); 612 chip->bank_effect[4][0]->base = 613 chip->bank_effect[4][1]->base = cpu_to_le32(chip->ac3_tmp_base.addr + 2048); 614 chip->bank_effect[4][0]->loop_end = 615 chip->bank_effect[4][1]->loop_end = cpu_to_le32(1024); 616 617 spin_lock_irq(&chip->reg_lock); 618 snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT, 619 snd_ymfpci_readl(chip, YDSXGR_MAPOFEFFECT) | 3 << 3); 620 spin_unlock_irq(&chip->reg_lock); 621 return 0; 622} 623 624static int snd_ymfpci_ac3_done(struct snd_ymfpci *chip) 625{ 626 spin_lock_irq(&chip->reg_lock); 627 snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT, 628 snd_ymfpci_readl(chip, YDSXGR_MAPOFEFFECT) & ~(3 << 3)); 629 spin_unlock_irq(&chip->reg_lock); 630 // snd_ymfpci_irq_wait(chip); 631 if (chip->ac3_tmp_base.area) { 632 snd_dma_free_pages(&chip->ac3_tmp_base); 633 chip->ac3_tmp_base.area = NULL; 634 } 635 return 0; 636} 637 638static int snd_ymfpci_playback_hw_params(struct snd_pcm_substream *substream, 639 struct snd_pcm_hw_params *hw_params) 640{ 641 struct snd_pcm_runtime *runtime = substream->runtime; 642 struct snd_ymfpci_pcm *ypcm = runtime->private_data; 643 int err; 644 645 if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0) 646 return err; 647 if ((err = snd_ymfpci_pcm_voice_alloc(ypcm, params_channels(hw_params))) < 0) 648 return err; 649 return 0; 650} 651 652static int snd_ymfpci_playback_hw_free(struct snd_pcm_substream *substream) 653{ 654 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 655 struct snd_pcm_runtime *runtime = substream->runtime; 656 struct snd_ymfpci_pcm *ypcm; 657 658 if (runtime->private_data == NULL) 659 return 0; 660 ypcm = runtime->private_data; 661 662 /* wait, until the PCI operations are not finished */ 663 snd_ymfpci_irq_wait(chip); 664 snd_pcm_lib_free_pages(substream); 665 if (ypcm->voices[1]) { 666 snd_ymfpci_voice_free(chip, ypcm->voices[1]); 667 ypcm->voices[1] = NULL; 668 } 669 if (ypcm->voices[0]) { 670 snd_ymfpci_voice_free(chip, ypcm->voices[0]); 671 ypcm->voices[0] = NULL; 672 } 673 return 0; 674} 675 676static int snd_ymfpci_playback_prepare(struct snd_pcm_substream *substream) 677{ 678 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 679 struct snd_pcm_runtime *runtime = substream->runtime; 680 struct snd_ymfpci_pcm *ypcm = runtime->private_data; 681 struct snd_kcontrol *kctl; 682 unsigned int nvoice; 683 684 ypcm->period_size = runtime->period_size; 685 ypcm->buffer_size = runtime->buffer_size; 686 ypcm->period_pos = 0; 687 ypcm->last_pos = 0; 688 for (nvoice = 0; nvoice < runtime->channels; nvoice++) 689 snd_ymfpci_pcm_init_voice(ypcm, nvoice, runtime, 690 substream->pcm == chip->pcm); 691 692 if (substream->pcm == chip->pcm && !ypcm->use_441_slot) { 693 kctl = chip->pcm_mixer[substream->number].ctl; 694 kctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE; 695 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO, &kctl->id); 696 } 697 return 0; 698} 699 700static int snd_ymfpci_capture_hw_params(struct snd_pcm_substream *substream, 701 struct snd_pcm_hw_params *hw_params) 702{ 703 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params)); 704} 705 706static int snd_ymfpci_capture_hw_free(struct snd_pcm_substream *substream) 707{ 708 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 709 710 /* wait, until the PCI operations are not finished */ 711 snd_ymfpci_irq_wait(chip); 712 return snd_pcm_lib_free_pages(substream); 713} 714 715static int snd_ymfpci_capture_prepare(struct snd_pcm_substream *substream) 716{ 717 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 718 struct snd_pcm_runtime *runtime = substream->runtime; 719 struct snd_ymfpci_pcm *ypcm = runtime->private_data; 720 struct snd_ymfpci_capture_bank * bank; 721 int nbank; 722 u32 rate, format; 723 724 ypcm->period_size = runtime->period_size; 725 ypcm->buffer_size = runtime->buffer_size; 726 ypcm->period_pos = 0; 727 ypcm->last_pos = 0; 728 ypcm->shift = 0; 729 rate = ((48000 * 4096) / runtime->rate) - 1; 730 format = 0; 731 if (runtime->channels == 2) { 732 format |= 2; 733 ypcm->shift++; 734 } 735 if (snd_pcm_format_width(runtime->format) == 8) 736 format |= 1; 737 else 738 ypcm->shift++; 739 switch (ypcm->capture_bank_number) { 740 case 0: 741 snd_ymfpci_writel(chip, YDSXGR_RECFORMAT, format); 742 snd_ymfpci_writel(chip, YDSXGR_RECSLOTSR, rate); 743 break; 744 case 1: 745 snd_ymfpci_writel(chip, YDSXGR_ADCFORMAT, format); 746 snd_ymfpci_writel(chip, YDSXGR_ADCSLOTSR, rate); 747 break; 748 } 749 for (nbank = 0; nbank < 2; nbank++) { 750 bank = chip->bank_capture[ypcm->capture_bank_number][nbank]; 751 bank->base = cpu_to_le32(runtime->dma_addr); 752 bank->loop_end = cpu_to_le32(ypcm->buffer_size << ypcm->shift); 753 bank->start = 0; 754 bank->num_of_loops = 0; 755 } 756 return 0; 757} 758 759static snd_pcm_uframes_t snd_ymfpci_playback_pointer(struct snd_pcm_substream *substream) 760{ 761 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 762 struct snd_pcm_runtime *runtime = substream->runtime; 763 struct snd_ymfpci_pcm *ypcm = runtime->private_data; 764 struct snd_ymfpci_voice *voice = ypcm->voices[0]; 765 766 if (!(ypcm->running && voice)) 767 return 0; 768 return le32_to_cpu(voice->bank[chip->active_bank].start); 769} 770 771static snd_pcm_uframes_t snd_ymfpci_capture_pointer(struct snd_pcm_substream *substream) 772{ 773 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 774 struct snd_pcm_runtime *runtime = substream->runtime; 775 struct snd_ymfpci_pcm *ypcm = runtime->private_data; 776 777 if (!ypcm->running) 778 return 0; 779 return le32_to_cpu(chip->bank_capture[ypcm->capture_bank_number][chip->active_bank]->start) >> ypcm->shift; 780} 781 782static void snd_ymfpci_irq_wait(struct snd_ymfpci *chip) 783{ 784 wait_queue_t wait; 785 int loops = 4; 786 787 while (loops-- > 0) { 788 if ((snd_ymfpci_readl(chip, YDSXGR_MODE) & 3) == 0) 789 continue; 790 init_waitqueue_entry(&wait, current); 791 add_wait_queue(&chip->interrupt_sleep, &wait); 792 atomic_inc(&chip->interrupt_sleep_count); 793 schedule_timeout_uninterruptible(msecs_to_jiffies(50)); 794 remove_wait_queue(&chip->interrupt_sleep, &wait); 795 } 796} 797 798static irqreturn_t snd_ymfpci_interrupt(int irq, void *dev_id) 799{ 800 struct snd_ymfpci *chip = dev_id; 801 u32 status, nvoice, mode; 802 struct snd_ymfpci_voice *voice; 803 804 status = snd_ymfpci_readl(chip, YDSXGR_STATUS); 805 if (status & 0x80000000) { 806 chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT) & 1; 807 spin_lock(&chip->voice_lock); 808 for (nvoice = 0; nvoice < YDSXG_PLAYBACK_VOICES; nvoice++) { 809 voice = &chip->voices[nvoice]; 810 if (voice->interrupt) 811 voice->interrupt(chip, voice); 812 } 813 for (nvoice = 0; nvoice < YDSXG_CAPTURE_VOICES; nvoice++) { 814 if (chip->capture_substream[nvoice]) 815 snd_ymfpci_pcm_capture_interrupt(chip->capture_substream[nvoice]); 816 } 817#if 0 818 for (nvoice = 0; nvoice < YDSXG_EFFECT_VOICES; nvoice++) { 819 if (chip->effect_substream[nvoice]) 820 snd_ymfpci_pcm_effect_interrupt(chip->effect_substream[nvoice]); 821 } 822#endif 823 spin_unlock(&chip->voice_lock); 824 spin_lock(&chip->reg_lock); 825 snd_ymfpci_writel(chip, YDSXGR_STATUS, 0x80000000); 826 mode = snd_ymfpci_readl(chip, YDSXGR_MODE) | 2; 827 snd_ymfpci_writel(chip, YDSXGR_MODE, mode); 828 spin_unlock(&chip->reg_lock); 829 830 if (atomic_read(&chip->interrupt_sleep_count)) { 831 atomic_set(&chip->interrupt_sleep_count, 0); 832 wake_up(&chip->interrupt_sleep); 833 } 834 } 835 836 status = snd_ymfpci_readw(chip, YDSXGR_INTFLAG); 837 if (status & 1) { 838 if (chip->timer) 839 snd_timer_interrupt(chip->timer, chip->timer_ticks); 840 } 841 snd_ymfpci_writew(chip, YDSXGR_INTFLAG, status); 842 843 if (chip->rawmidi) 844 snd_mpu401_uart_interrupt(irq, chip->rawmidi->private_data); 845 return IRQ_HANDLED; 846} 847 848static struct snd_pcm_hardware snd_ymfpci_playback = 849{ 850 .info = (SNDRV_PCM_INFO_MMAP | 851 SNDRV_PCM_INFO_MMAP_VALID | 852 SNDRV_PCM_INFO_INTERLEAVED | 853 SNDRV_PCM_INFO_BLOCK_TRANSFER | 854 SNDRV_PCM_INFO_PAUSE | 855 SNDRV_PCM_INFO_RESUME), 856 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE, 857 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, 858 .rate_min = 8000, 859 .rate_max = 48000, 860 .channels_min = 1, 861 .channels_max = 2, 862 .buffer_bytes_max = 256 * 1024, /* FIXME: enough? */ 863 .period_bytes_min = 64, 864 .period_bytes_max = 256 * 1024, /* FIXME: enough? */ 865 .periods_min = 3, 866 .periods_max = 1024, 867 .fifo_size = 0, 868}; 869 870static struct snd_pcm_hardware snd_ymfpci_capture = 871{ 872 .info = (SNDRV_PCM_INFO_MMAP | 873 SNDRV_PCM_INFO_MMAP_VALID | 874 SNDRV_PCM_INFO_INTERLEAVED | 875 SNDRV_PCM_INFO_BLOCK_TRANSFER | 876 SNDRV_PCM_INFO_PAUSE | 877 SNDRV_PCM_INFO_RESUME), 878 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE, 879 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, 880 .rate_min = 8000, 881 .rate_max = 48000, 882 .channels_min = 1, 883 .channels_max = 2, 884 .buffer_bytes_max = 256 * 1024, /* FIXME: enough? */ 885 .period_bytes_min = 64, 886 .period_bytes_max = 256 * 1024, /* FIXME: enough? */ 887 .periods_min = 3, 888 .periods_max = 1024, 889 .fifo_size = 0, 890}; 891 892static void snd_ymfpci_pcm_free_substream(struct snd_pcm_runtime *runtime) 893{ 894 kfree(runtime->private_data); 895} 896 897static int snd_ymfpci_playback_open_1(struct snd_pcm_substream *substream) 898{ 899 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 900 struct snd_pcm_runtime *runtime = substream->runtime; 901 struct snd_ymfpci_pcm *ypcm; 902 int err; 903 904 runtime->hw = snd_ymfpci_playback; 905 /* FIXME? True value is 256/48 = 5.33333 ms */ 906 err = snd_pcm_hw_constraint_minmax(runtime, 907 SNDRV_PCM_HW_PARAM_PERIOD_TIME, 908 5334, UINT_MAX); 909 if (err < 0) 910 return err; 911 err = snd_pcm_hw_rule_noresample(runtime, 48000); 912 if (err < 0) 913 return err; 914 915 ypcm = kzalloc(sizeof(*ypcm), GFP_KERNEL); 916 if (ypcm == NULL) 917 return -ENOMEM; 918 ypcm->chip = chip; 919 ypcm->type = PLAYBACK_VOICE; 920 ypcm->substream = substream; 921 runtime->private_data = ypcm; 922 runtime->private_free = snd_ymfpci_pcm_free_substream; 923 return 0; 924} 925 926/* call with spinlock held */ 927static void ymfpci_open_extension(struct snd_ymfpci *chip) 928{ 929 if (! chip->rear_opened) { 930 if (! chip->spdif_opened) /* set AC3 */ 931 snd_ymfpci_writel(chip, YDSXGR_MODE, 932 snd_ymfpci_readl(chip, YDSXGR_MODE) | (1 << 30)); 933 /* enable second codec (4CHEN) */ 934 snd_ymfpci_writew(chip, YDSXGR_SECCONFIG, 935 (snd_ymfpci_readw(chip, YDSXGR_SECCONFIG) & ~0x0330) | 0x0010); 936 } 937} 938 939/* call with spinlock held */ 940static void ymfpci_close_extension(struct snd_ymfpci *chip) 941{ 942 if (! chip->rear_opened) { 943 if (! chip->spdif_opened) 944 snd_ymfpci_writel(chip, YDSXGR_MODE, 945 snd_ymfpci_readl(chip, YDSXGR_MODE) & ~(1 << 30)); 946 snd_ymfpci_writew(chip, YDSXGR_SECCONFIG, 947 (snd_ymfpci_readw(chip, YDSXGR_SECCONFIG) & ~0x0330) & ~0x0010); 948 } 949} 950 951static int snd_ymfpci_playback_open(struct snd_pcm_substream *substream) 952{ 953 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 954 struct snd_pcm_runtime *runtime = substream->runtime; 955 struct snd_ymfpci_pcm *ypcm; 956 int err; 957 958 if ((err = snd_ymfpci_playback_open_1(substream)) < 0) 959 return err; 960 ypcm = runtime->private_data; 961 ypcm->output_front = 1; 962 ypcm->output_rear = chip->mode_dup4ch ? 1 : 0; 963 ypcm->swap_rear = 0; 964 spin_lock_irq(&chip->reg_lock); 965 if (ypcm->output_rear) { 966 ymfpci_open_extension(chip); 967 chip->rear_opened++; 968 } 969 spin_unlock_irq(&chip->reg_lock); 970 return 0; 971} 972 973static int snd_ymfpci_playback_spdif_open(struct snd_pcm_substream *substream) 974{ 975 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 976 struct snd_pcm_runtime *runtime = substream->runtime; 977 struct snd_ymfpci_pcm *ypcm; 978 int err; 979 980 if ((err = snd_ymfpci_playback_open_1(substream)) < 0) 981 return err; 982 ypcm = runtime->private_data; 983 ypcm->output_front = 0; 984 ypcm->output_rear = 1; 985 ypcm->swap_rear = 1; 986 spin_lock_irq(&chip->reg_lock); 987 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL, 988 snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) | 2); 989 ymfpci_open_extension(chip); 990 chip->spdif_pcm_bits = chip->spdif_bits; 991 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_pcm_bits); 992 chip->spdif_opened++; 993 spin_unlock_irq(&chip->reg_lock); 994 995 chip->spdif_pcm_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE; 996 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE | 997 SNDRV_CTL_EVENT_MASK_INFO, &chip->spdif_pcm_ctl->id); 998 return 0; 999} 1000 1001static int snd_ymfpci_playback_4ch_open(struct snd_pcm_substream *substream) 1002{ 1003 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 1004 struct snd_pcm_runtime *runtime = substream->runtime; 1005 struct snd_ymfpci_pcm *ypcm; 1006 int err; 1007 1008 if ((err = snd_ymfpci_playback_open_1(substream)) < 0) 1009 return err; 1010 ypcm = runtime->private_data; 1011 ypcm->output_front = 0; 1012 ypcm->output_rear = 1; 1013 ypcm->swap_rear = 0; 1014 spin_lock_irq(&chip->reg_lock); 1015 ymfpci_open_extension(chip); 1016 chip->rear_opened++; 1017 spin_unlock_irq(&chip->reg_lock); 1018 return 0; 1019} 1020 1021static int snd_ymfpci_capture_open(struct snd_pcm_substream *substream, 1022 u32 capture_bank_number) 1023{ 1024 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 1025 struct snd_pcm_runtime *runtime = substream->runtime; 1026 struct snd_ymfpci_pcm *ypcm; 1027 int err; 1028 1029 runtime->hw = snd_ymfpci_capture; 1030 /* FIXME? True value is 256/48 = 5.33333 ms */ 1031 err = snd_pcm_hw_constraint_minmax(runtime, 1032 SNDRV_PCM_HW_PARAM_PERIOD_TIME, 1033 5334, UINT_MAX); 1034 if (err < 0) 1035 return err; 1036 err = snd_pcm_hw_rule_noresample(runtime, 48000); 1037 if (err < 0) 1038 return err; 1039 1040 ypcm = kzalloc(sizeof(*ypcm), GFP_KERNEL); 1041 if (ypcm == NULL) 1042 return -ENOMEM; 1043 ypcm->chip = chip; 1044 ypcm->type = capture_bank_number + CAPTURE_REC; 1045 ypcm->substream = substream; 1046 ypcm->capture_bank_number = capture_bank_number; 1047 chip->capture_substream[capture_bank_number] = substream; 1048 runtime->private_data = ypcm; 1049 runtime->private_free = snd_ymfpci_pcm_free_substream; 1050 snd_ymfpci_hw_start(chip); 1051 return 0; 1052} 1053 1054static int snd_ymfpci_capture_rec_open(struct snd_pcm_substream *substream) 1055{ 1056 return snd_ymfpci_capture_open(substream, 0); 1057} 1058 1059static int snd_ymfpci_capture_ac97_open(struct snd_pcm_substream *substream) 1060{ 1061 return snd_ymfpci_capture_open(substream, 1); 1062} 1063 1064static int snd_ymfpci_playback_close_1(struct snd_pcm_substream *substream) 1065{ 1066 return 0; 1067} 1068 1069static int snd_ymfpci_playback_close(struct snd_pcm_substream *substream) 1070{ 1071 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 1072 struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data; 1073 1074 spin_lock_irq(&chip->reg_lock); 1075 if (ypcm->output_rear && chip->rear_opened > 0) { 1076 chip->rear_opened--; 1077 ymfpci_close_extension(chip); 1078 } 1079 spin_unlock_irq(&chip->reg_lock); 1080 return snd_ymfpci_playback_close_1(substream); 1081} 1082 1083static int snd_ymfpci_playback_spdif_close(struct snd_pcm_substream *substream) 1084{ 1085 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 1086 1087 spin_lock_irq(&chip->reg_lock); 1088 chip->spdif_opened = 0; 1089 ymfpci_close_extension(chip); 1090 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL, 1091 snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & ~2); 1092 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits); 1093 spin_unlock_irq(&chip->reg_lock); 1094 chip->spdif_pcm_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE; 1095 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE | 1096 SNDRV_CTL_EVENT_MASK_INFO, &chip->spdif_pcm_ctl->id); 1097 return snd_ymfpci_playback_close_1(substream); 1098} 1099 1100static int snd_ymfpci_playback_4ch_close(struct snd_pcm_substream *substream) 1101{ 1102 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 1103 1104 spin_lock_irq(&chip->reg_lock); 1105 if (chip->rear_opened > 0) { 1106 chip->rear_opened--; 1107 ymfpci_close_extension(chip); 1108 } 1109 spin_unlock_irq(&chip->reg_lock); 1110 return snd_ymfpci_playback_close_1(substream); 1111} 1112 1113static int snd_ymfpci_capture_close(struct snd_pcm_substream *substream) 1114{ 1115 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 1116 struct snd_pcm_runtime *runtime = substream->runtime; 1117 struct snd_ymfpci_pcm *ypcm = runtime->private_data; 1118 1119 if (ypcm != NULL) { 1120 chip->capture_substream[ypcm->capture_bank_number] = NULL; 1121 snd_ymfpci_hw_stop(chip); 1122 } 1123 return 0; 1124} 1125 1126static struct snd_pcm_ops snd_ymfpci_playback_ops = { 1127 .open = snd_ymfpci_playback_open, 1128 .close = snd_ymfpci_playback_close, 1129 .ioctl = snd_pcm_lib_ioctl, 1130 .hw_params = snd_ymfpci_playback_hw_params, 1131 .hw_free = snd_ymfpci_playback_hw_free, 1132 .prepare = snd_ymfpci_playback_prepare, 1133 .trigger = snd_ymfpci_playback_trigger, 1134 .pointer = snd_ymfpci_playback_pointer, 1135}; 1136 1137static struct snd_pcm_ops snd_ymfpci_capture_rec_ops = { 1138 .open = snd_ymfpci_capture_rec_open, 1139 .close = snd_ymfpci_capture_close, 1140 .ioctl = snd_pcm_lib_ioctl, 1141 .hw_params = snd_ymfpci_capture_hw_params, 1142 .hw_free = snd_ymfpci_capture_hw_free, 1143 .prepare = snd_ymfpci_capture_prepare, 1144 .trigger = snd_ymfpci_capture_trigger, 1145 .pointer = snd_ymfpci_capture_pointer, 1146}; 1147 1148int snd_ymfpci_pcm(struct snd_ymfpci *chip, int device) 1149{ 1150 struct snd_pcm *pcm; 1151 int err; 1152 1153 if ((err = snd_pcm_new(chip->card, "YMFPCI", device, 32, 1, &pcm)) < 0) 1154 return err; 1155 pcm->private_data = chip; 1156 1157 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_ops); 1158 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ymfpci_capture_rec_ops); 1159 1160 /* global setup */ 1161 pcm->info_flags = 0; 1162 strcpy(pcm->name, "YMFPCI"); 1163 chip->pcm = pcm; 1164 1165 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, 1166 snd_dma_pci_data(chip->pci), 64*1024, 256*1024); 1167 1168 return snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK, 1169 snd_pcm_std_chmaps, 2, 0, NULL); 1170} 1171 1172static struct snd_pcm_ops snd_ymfpci_capture_ac97_ops = { 1173 .open = snd_ymfpci_capture_ac97_open, 1174 .close = snd_ymfpci_capture_close, 1175 .ioctl = snd_pcm_lib_ioctl, 1176 .hw_params = snd_ymfpci_capture_hw_params, 1177 .hw_free = snd_ymfpci_capture_hw_free, 1178 .prepare = snd_ymfpci_capture_prepare, 1179 .trigger = snd_ymfpci_capture_trigger, 1180 .pointer = snd_ymfpci_capture_pointer, 1181}; 1182 1183int snd_ymfpci_pcm2(struct snd_ymfpci *chip, int device) 1184{ 1185 struct snd_pcm *pcm; 1186 int err; 1187 1188 if ((err = snd_pcm_new(chip->card, "YMFPCI - PCM2", device, 0, 1, &pcm)) < 0) 1189 return err; 1190 pcm->private_data = chip; 1191 1192 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ymfpci_capture_ac97_ops); 1193 1194 /* global setup */ 1195 pcm->info_flags = 0; 1196 sprintf(pcm->name, "YMFPCI - %s", 1197 chip->device_id == PCI_DEVICE_ID_YAMAHA_754 ? "Direct Recording" : "AC'97"); 1198 chip->pcm2 = pcm; 1199 1200 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, 1201 snd_dma_pci_data(chip->pci), 64*1024, 256*1024); 1202 1203 return 0; 1204} 1205 1206static struct snd_pcm_ops snd_ymfpci_playback_spdif_ops = { 1207 .open = snd_ymfpci_playback_spdif_open, 1208 .close = snd_ymfpci_playback_spdif_close, 1209 .ioctl = snd_pcm_lib_ioctl, 1210 .hw_params = snd_ymfpci_playback_hw_params, 1211 .hw_free = snd_ymfpci_playback_hw_free, 1212 .prepare = snd_ymfpci_playback_prepare, 1213 .trigger = snd_ymfpci_playback_trigger, 1214 .pointer = snd_ymfpci_playback_pointer, 1215}; 1216 1217int snd_ymfpci_pcm_spdif(struct snd_ymfpci *chip, int device) 1218{ 1219 struct snd_pcm *pcm; 1220 int err; 1221 1222 if ((err = snd_pcm_new(chip->card, "YMFPCI - IEC958", device, 1, 0, &pcm)) < 0) 1223 return err; 1224 pcm->private_data = chip; 1225 1226 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_spdif_ops); 1227 1228 /* global setup */ 1229 pcm->info_flags = 0; 1230 strcpy(pcm->name, "YMFPCI - IEC958"); 1231 chip->pcm_spdif = pcm; 1232 1233 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, 1234 snd_dma_pci_data(chip->pci), 64*1024, 256*1024); 1235 1236 return 0; 1237} 1238 1239static struct snd_pcm_ops snd_ymfpci_playback_4ch_ops = { 1240 .open = snd_ymfpci_playback_4ch_open, 1241 .close = snd_ymfpci_playback_4ch_close, 1242 .ioctl = snd_pcm_lib_ioctl, 1243 .hw_params = snd_ymfpci_playback_hw_params, 1244 .hw_free = snd_ymfpci_playback_hw_free, 1245 .prepare = snd_ymfpci_playback_prepare, 1246 .trigger = snd_ymfpci_playback_trigger, 1247 .pointer = snd_ymfpci_playback_pointer, 1248}; 1249 1250static const struct snd_pcm_chmap_elem surround_map[] = { 1251 { .channels = 1, 1252 .map = { SNDRV_CHMAP_MONO } }, 1253 { .channels = 2, 1254 .map = { SNDRV_CHMAP_RL, SNDRV_CHMAP_RR } }, 1255 { } 1256}; 1257 1258int snd_ymfpci_pcm_4ch(struct snd_ymfpci *chip, int device) 1259{ 1260 struct snd_pcm *pcm; 1261 int err; 1262 1263 if ((err = snd_pcm_new(chip->card, "YMFPCI - Rear", device, 1, 0, &pcm)) < 0) 1264 return err; 1265 pcm->private_data = chip; 1266 1267 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_4ch_ops); 1268 1269 /* global setup */ 1270 pcm->info_flags = 0; 1271 strcpy(pcm->name, "YMFPCI - Rear PCM"); 1272 chip->pcm_4ch = pcm; 1273 1274 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, 1275 snd_dma_pci_data(chip->pci), 64*1024, 256*1024); 1276 1277 return snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK, 1278 surround_map, 2, 0, NULL); 1279} 1280 1281static int snd_ymfpci_spdif_default_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 1282{ 1283 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; 1284 uinfo->count = 1; 1285 return 0; 1286} 1287 1288static int snd_ymfpci_spdif_default_get(struct snd_kcontrol *kcontrol, 1289 struct snd_ctl_elem_value *ucontrol) 1290{ 1291 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1292 1293 spin_lock_irq(&chip->reg_lock); 1294 ucontrol->value.iec958.status[0] = (chip->spdif_bits >> 0) & 0xff; 1295 ucontrol->value.iec958.status[1] = (chip->spdif_bits >> 8) & 0xff; 1296 ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS_48000; 1297 spin_unlock_irq(&chip->reg_lock); 1298 return 0; 1299} 1300 1301static int snd_ymfpci_spdif_default_put(struct snd_kcontrol *kcontrol, 1302 struct snd_ctl_elem_value *ucontrol) 1303{ 1304 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1305 unsigned int val; 1306 int change; 1307 1308 val = ((ucontrol->value.iec958.status[0] & 0x3e) << 0) | 1309 (ucontrol->value.iec958.status[1] << 8); 1310 spin_lock_irq(&chip->reg_lock); 1311 change = chip->spdif_bits != val; 1312 chip->spdif_bits = val; 1313 if ((snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & 1) && chip->pcm_spdif == NULL) 1314 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits); 1315 spin_unlock_irq(&chip->reg_lock); 1316 return change; 1317} 1318 1319static struct snd_kcontrol_new snd_ymfpci_spdif_default = 1320{ 1321 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1322 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT), 1323 .info = snd_ymfpci_spdif_default_info, 1324 .get = snd_ymfpci_spdif_default_get, 1325 .put = snd_ymfpci_spdif_default_put 1326}; 1327 1328static int snd_ymfpci_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 1329{ 1330 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; 1331 uinfo->count = 1; 1332 return 0; 1333} 1334 1335static int snd_ymfpci_spdif_mask_get(struct snd_kcontrol *kcontrol, 1336 struct snd_ctl_elem_value *ucontrol) 1337{ 1338 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1339 1340 spin_lock_irq(&chip->reg_lock); 1341 ucontrol->value.iec958.status[0] = 0x3e; 1342 ucontrol->value.iec958.status[1] = 0xff; 1343 spin_unlock_irq(&chip->reg_lock); 1344 return 0; 1345} 1346 1347static struct snd_kcontrol_new snd_ymfpci_spdif_mask = 1348{ 1349 .access = SNDRV_CTL_ELEM_ACCESS_READ, 1350 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1351 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK), 1352 .info = snd_ymfpci_spdif_mask_info, 1353 .get = snd_ymfpci_spdif_mask_get, 1354}; 1355 1356static int snd_ymfpci_spdif_stream_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 1357{ 1358 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; 1359 uinfo->count = 1; 1360 return 0; 1361} 1362 1363static int snd_ymfpci_spdif_stream_get(struct snd_kcontrol *kcontrol, 1364 struct snd_ctl_elem_value *ucontrol) 1365{ 1366 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1367 1368 spin_lock_irq(&chip->reg_lock); 1369 ucontrol->value.iec958.status[0] = (chip->spdif_pcm_bits >> 0) & 0xff; 1370 ucontrol->value.iec958.status[1] = (chip->spdif_pcm_bits >> 8) & 0xff; 1371 ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS_48000; 1372 spin_unlock_irq(&chip->reg_lock); 1373 return 0; 1374} 1375 1376static int snd_ymfpci_spdif_stream_put(struct snd_kcontrol *kcontrol, 1377 struct snd_ctl_elem_value *ucontrol) 1378{ 1379 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1380 unsigned int val; 1381 int change; 1382 1383 val = ((ucontrol->value.iec958.status[0] & 0x3e) << 0) | 1384 (ucontrol->value.iec958.status[1] << 8); 1385 spin_lock_irq(&chip->reg_lock); 1386 change = chip->spdif_pcm_bits != val; 1387 chip->spdif_pcm_bits = val; 1388 if ((snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & 2)) 1389 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_pcm_bits); 1390 spin_unlock_irq(&chip->reg_lock); 1391 return change; 1392} 1393 1394static struct snd_kcontrol_new snd_ymfpci_spdif_stream = 1395{ 1396 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE, 1397 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1398 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM), 1399 .info = snd_ymfpci_spdif_stream_info, 1400 .get = snd_ymfpci_spdif_stream_get, 1401 .put = snd_ymfpci_spdif_stream_put 1402}; 1403 1404static int snd_ymfpci_drec_source_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *info) 1405{ 1406 static const char *const texts[3] = {"AC'97", "IEC958", "ZV Port"}; 1407 1408 return snd_ctl_enum_info(info, 1, 3, texts); 1409} 1410 1411static int snd_ymfpci_drec_source_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *value) 1412{ 1413 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1414 u16 reg; 1415 1416 spin_lock_irq(&chip->reg_lock); 1417 reg = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL); 1418 spin_unlock_irq(&chip->reg_lock); 1419 if (!(reg & 0x100)) 1420 value->value.enumerated.item[0] = 0; 1421 else 1422 value->value.enumerated.item[0] = 1 + ((reg & 0x200) != 0); 1423 return 0; 1424} 1425 1426static int snd_ymfpci_drec_source_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *value) 1427{ 1428 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1429 u16 reg, old_reg; 1430 1431 spin_lock_irq(&chip->reg_lock); 1432 old_reg = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL); 1433 if (value->value.enumerated.item[0] == 0) 1434 reg = old_reg & ~0x100; 1435 else 1436 reg = (old_reg & ~0x300) | 0x100 | ((value->value.enumerated.item[0] == 2) << 9); 1437 snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, reg); 1438 spin_unlock_irq(&chip->reg_lock); 1439 return reg != old_reg; 1440} 1441 1442static struct snd_kcontrol_new snd_ymfpci_drec_source = { 1443 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, 1444 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1445 .name = "Direct Recording Source", 1446 .info = snd_ymfpci_drec_source_info, 1447 .get = snd_ymfpci_drec_source_get, 1448 .put = snd_ymfpci_drec_source_put 1449}; 1450 1451/* 1452 * Mixer controls 1453 */ 1454 1455#define YMFPCI_SINGLE(xname, xindex, reg, shift) \ 1456{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ 1457 .info = snd_ymfpci_info_single, \ 1458 .get = snd_ymfpci_get_single, .put = snd_ymfpci_put_single, \ 1459 .private_value = ((reg) | ((shift) << 16)) } 1460 1461#define snd_ymfpci_info_single snd_ctl_boolean_mono_info 1462 1463static int snd_ymfpci_get_single(struct snd_kcontrol *kcontrol, 1464 struct snd_ctl_elem_value *ucontrol) 1465{ 1466 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1467 int reg = kcontrol->private_value & 0xffff; 1468 unsigned int shift = (kcontrol->private_value >> 16) & 0xff; 1469 unsigned int mask = 1; 1470 1471 switch (reg) { 1472 case YDSXGR_SPDIFOUTCTRL: break; 1473 case YDSXGR_SPDIFINCTRL: break; 1474 default: return -EINVAL; 1475 } 1476 ucontrol->value.integer.value[0] = 1477 (snd_ymfpci_readl(chip, reg) >> shift) & mask; 1478 return 0; 1479} 1480 1481static int snd_ymfpci_put_single(struct snd_kcontrol *kcontrol, 1482 struct snd_ctl_elem_value *ucontrol) 1483{ 1484 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1485 int reg = kcontrol->private_value & 0xffff; 1486 unsigned int shift = (kcontrol->private_value >> 16) & 0xff; 1487 unsigned int mask = 1; 1488 int change; 1489 unsigned int val, oval; 1490 1491 switch (reg) { 1492 case YDSXGR_SPDIFOUTCTRL: break; 1493 case YDSXGR_SPDIFINCTRL: break; 1494 default: return -EINVAL; 1495 } 1496 val = (ucontrol->value.integer.value[0] & mask); 1497 val <<= shift; 1498 spin_lock_irq(&chip->reg_lock); 1499 oval = snd_ymfpci_readl(chip, reg); 1500 val = (oval & ~(mask << shift)) | val; 1501 change = val != oval; 1502 snd_ymfpci_writel(chip, reg, val); 1503 spin_unlock_irq(&chip->reg_lock); 1504 return change; 1505} 1506 1507static const DECLARE_TLV_DB_LINEAR(db_scale_native, TLV_DB_GAIN_MUTE, 0); 1508 1509#define YMFPCI_DOUBLE(xname, xindex, reg) \ 1510{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ 1511 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \ 1512 .info = snd_ymfpci_info_double, \ 1513 .get = snd_ymfpci_get_double, .put = snd_ymfpci_put_double, \ 1514 .private_value = reg, \ 1515 .tlv = { .p = db_scale_native } } 1516 1517static int snd_ymfpci_info_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 1518{ 1519 unsigned int reg = kcontrol->private_value; 1520 1521 if (reg < 0x80 || reg >= 0xc0) 1522 return -EINVAL; 1523 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 1524 uinfo->count = 2; 1525 uinfo->value.integer.min = 0; 1526 uinfo->value.integer.max = 16383; 1527 return 0; 1528} 1529 1530static int snd_ymfpci_get_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1531{ 1532 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1533 unsigned int reg = kcontrol->private_value; 1534 unsigned int shift_left = 0, shift_right = 16, mask = 16383; 1535 unsigned int val; 1536 1537 if (reg < 0x80 || reg >= 0xc0) 1538 return -EINVAL; 1539 spin_lock_irq(&chip->reg_lock); 1540 val = snd_ymfpci_readl(chip, reg); 1541 spin_unlock_irq(&chip->reg_lock); 1542 ucontrol->value.integer.value[0] = (val >> shift_left) & mask; 1543 ucontrol->value.integer.value[1] = (val >> shift_right) & mask; 1544 return 0; 1545} 1546 1547static int snd_ymfpci_put_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1548{ 1549 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1550 unsigned int reg = kcontrol->private_value; 1551 unsigned int shift_left = 0, shift_right = 16, mask = 16383; 1552 int change; 1553 unsigned int val1, val2, oval; 1554 1555 if (reg < 0x80 || reg >= 0xc0) 1556 return -EINVAL; 1557 val1 = ucontrol->value.integer.value[0] & mask; 1558 val2 = ucontrol->value.integer.value[1] & mask; 1559 val1 <<= shift_left; 1560 val2 <<= shift_right; 1561 spin_lock_irq(&chip->reg_lock); 1562 oval = snd_ymfpci_readl(chip, reg); 1563 val1 = (oval & ~((mask << shift_left) | (mask << shift_right))) | val1 | val2; 1564 change = val1 != oval; 1565 snd_ymfpci_writel(chip, reg, val1); 1566 spin_unlock_irq(&chip->reg_lock); 1567 return change; 1568} 1569 1570static int snd_ymfpci_put_nativedacvol(struct snd_kcontrol *kcontrol, 1571 struct snd_ctl_elem_value *ucontrol) 1572{ 1573 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1574 unsigned int reg = YDSXGR_NATIVEDACOUTVOL; 1575 unsigned int reg2 = YDSXGR_BUF441OUTVOL; 1576 int change; 1577 unsigned int value, oval; 1578 1579 value = ucontrol->value.integer.value[0] & 0x3fff; 1580 value |= (ucontrol->value.integer.value[1] & 0x3fff) << 16; 1581 spin_lock_irq(&chip->reg_lock); 1582 oval = snd_ymfpci_readl(chip, reg); 1583 change = value != oval; 1584 snd_ymfpci_writel(chip, reg, value); 1585 snd_ymfpci_writel(chip, reg2, value); 1586 spin_unlock_irq(&chip->reg_lock); 1587 return change; 1588} 1589 1590/* 1591 * 4ch duplication 1592 */ 1593#define snd_ymfpci_info_dup4ch snd_ctl_boolean_mono_info 1594 1595static int snd_ymfpci_get_dup4ch(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1596{ 1597 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1598 ucontrol->value.integer.value[0] = chip->mode_dup4ch; 1599 return 0; 1600} 1601 1602static int snd_ymfpci_put_dup4ch(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1603{ 1604 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1605 int change; 1606 change = (ucontrol->value.integer.value[0] != chip->mode_dup4ch); 1607 if (change) 1608 chip->mode_dup4ch = !!ucontrol->value.integer.value[0]; 1609 return change; 1610} 1611 1612static struct snd_kcontrol_new snd_ymfpci_dup4ch = { 1613 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1614 .name = "4ch Duplication", 1615 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, 1616 .info = snd_ymfpci_info_dup4ch, 1617 .get = snd_ymfpci_get_dup4ch, 1618 .put = snd_ymfpci_put_dup4ch, 1619}; 1620 1621static struct snd_kcontrol_new snd_ymfpci_controls[] = { 1622{ 1623 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1624 .name = "Wave Playback Volume", 1625 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | 1626 SNDRV_CTL_ELEM_ACCESS_TLV_READ, 1627 .info = snd_ymfpci_info_double, 1628 .get = snd_ymfpci_get_double, 1629 .put = snd_ymfpci_put_nativedacvol, 1630 .private_value = YDSXGR_NATIVEDACOUTVOL, 1631 .tlv = { .p = db_scale_native }, 1632}, 1633YMFPCI_DOUBLE("Wave Capture Volume", 0, YDSXGR_NATIVEDACLOOPVOL), 1634YMFPCI_DOUBLE("Digital Capture Volume", 0, YDSXGR_NATIVEDACINVOL), 1635YMFPCI_DOUBLE("Digital Capture Volume", 1, YDSXGR_NATIVEADCINVOL), 1636YMFPCI_DOUBLE("ADC Playback Volume", 0, YDSXGR_PRIADCOUTVOL), 1637YMFPCI_DOUBLE("ADC Capture Volume", 0, YDSXGR_PRIADCLOOPVOL), 1638YMFPCI_DOUBLE("ADC Playback Volume", 1, YDSXGR_SECADCOUTVOL), 1639YMFPCI_DOUBLE("ADC Capture Volume", 1, YDSXGR_SECADCLOOPVOL), 1640YMFPCI_DOUBLE("FM Legacy Playback Volume", 0, YDSXGR_LEGACYOUTVOL), 1641YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("AC97 ", PLAYBACK,VOLUME), 0, YDSXGR_ZVOUTVOL), 1642YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("", CAPTURE,VOLUME), 0, YDSXGR_ZVLOOPVOL), 1643YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("AC97 ",PLAYBACK,VOLUME), 1, YDSXGR_SPDIFOUTVOL), 1644YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,VOLUME), 1, YDSXGR_SPDIFLOOPVOL), 1645YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH), 0, YDSXGR_SPDIFOUTCTRL, 0), 1646YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,SWITCH), 0, YDSXGR_SPDIFINCTRL, 0), 1647YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("Loop",NONE,NONE), 0, YDSXGR_SPDIFINCTRL, 4), 1648}; 1649 1650 1651/* 1652 * GPIO 1653 */ 1654 1655static int snd_ymfpci_get_gpio_out(struct snd_ymfpci *chip, int pin) 1656{ 1657 u16 reg, mode; 1658 unsigned long flags; 1659 1660 spin_lock_irqsave(&chip->reg_lock, flags); 1661 reg = snd_ymfpci_readw(chip, YDSXGR_GPIOFUNCENABLE); 1662 reg &= ~(1 << (pin + 8)); 1663 reg |= (1 << pin); 1664 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg); 1665 /* set the level mode for input line */ 1666 mode = snd_ymfpci_readw(chip, YDSXGR_GPIOTYPECONFIG); 1667 mode &= ~(3 << (pin * 2)); 1668 snd_ymfpci_writew(chip, YDSXGR_GPIOTYPECONFIG, mode); 1669 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg | (1 << (pin + 8))); 1670 mode = snd_ymfpci_readw(chip, YDSXGR_GPIOINSTATUS); 1671 spin_unlock_irqrestore(&chip->reg_lock, flags); 1672 return (mode >> pin) & 1; 1673} 1674 1675static int snd_ymfpci_set_gpio_out(struct snd_ymfpci *chip, int pin, int enable) 1676{ 1677 u16 reg; 1678 unsigned long flags; 1679 1680 spin_lock_irqsave(&chip->reg_lock, flags); 1681 reg = snd_ymfpci_readw(chip, YDSXGR_GPIOFUNCENABLE); 1682 reg &= ~(1 << pin); 1683 reg &= ~(1 << (pin + 8)); 1684 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg); 1685 snd_ymfpci_writew(chip, YDSXGR_GPIOOUTCTRL, enable << pin); 1686 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg | (1 << (pin + 8))); 1687 spin_unlock_irqrestore(&chip->reg_lock, flags); 1688 1689 return 0; 1690} 1691 1692#define snd_ymfpci_gpio_sw_info snd_ctl_boolean_mono_info 1693 1694static int snd_ymfpci_gpio_sw_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1695{ 1696 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1697 int pin = (int)kcontrol->private_value; 1698 ucontrol->value.integer.value[0] = snd_ymfpci_get_gpio_out(chip, pin); 1699 return 0; 1700} 1701 1702static int snd_ymfpci_gpio_sw_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1703{ 1704 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1705 int pin = (int)kcontrol->private_value; 1706 1707 if (snd_ymfpci_get_gpio_out(chip, pin) != ucontrol->value.integer.value[0]) { 1708 snd_ymfpci_set_gpio_out(chip, pin, !!ucontrol->value.integer.value[0]); 1709 ucontrol->value.integer.value[0] = snd_ymfpci_get_gpio_out(chip, pin); 1710 return 1; 1711 } 1712 return 0; 1713} 1714 1715static struct snd_kcontrol_new snd_ymfpci_rear_shared = { 1716 .name = "Shared Rear/Line-In Switch", 1717 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1718 .info = snd_ymfpci_gpio_sw_info, 1719 .get = snd_ymfpci_gpio_sw_get, 1720 .put = snd_ymfpci_gpio_sw_put, 1721 .private_value = 2, 1722}; 1723 1724/* 1725 * PCM voice volume 1726 */ 1727 1728static int snd_ymfpci_pcm_vol_info(struct snd_kcontrol *kcontrol, 1729 struct snd_ctl_elem_info *uinfo) 1730{ 1731 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 1732 uinfo->count = 2; 1733 uinfo->value.integer.min = 0; 1734 uinfo->value.integer.max = 0x8000; 1735 return 0; 1736} 1737 1738static int snd_ymfpci_pcm_vol_get(struct snd_kcontrol *kcontrol, 1739 struct snd_ctl_elem_value *ucontrol) 1740{ 1741 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1742 unsigned int subs = kcontrol->id.subdevice; 1743 1744 ucontrol->value.integer.value[0] = chip->pcm_mixer[subs].left; 1745 ucontrol->value.integer.value[1] = chip->pcm_mixer[subs].right; 1746 return 0; 1747} 1748 1749static int snd_ymfpci_pcm_vol_put(struct snd_kcontrol *kcontrol, 1750 struct snd_ctl_elem_value *ucontrol) 1751{ 1752 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1753 unsigned int subs = kcontrol->id.subdevice; 1754 struct snd_pcm_substream *substream; 1755 unsigned long flags; 1756 1757 if (ucontrol->value.integer.value[0] != chip->pcm_mixer[subs].left || 1758 ucontrol->value.integer.value[1] != chip->pcm_mixer[subs].right) { 1759 chip->pcm_mixer[subs].left = ucontrol->value.integer.value[0]; 1760 chip->pcm_mixer[subs].right = ucontrol->value.integer.value[1]; 1761 if (chip->pcm_mixer[subs].left > 0x8000) 1762 chip->pcm_mixer[subs].left = 0x8000; 1763 if (chip->pcm_mixer[subs].right > 0x8000) 1764 chip->pcm_mixer[subs].right = 0x8000; 1765 1766 substream = (struct snd_pcm_substream *)kcontrol->private_value; 1767 spin_lock_irqsave(&chip->voice_lock, flags); 1768 if (substream->runtime && substream->runtime->private_data) { 1769 struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data; 1770 if (!ypcm->use_441_slot) 1771 ypcm->update_pcm_vol = 2; 1772 } 1773 spin_unlock_irqrestore(&chip->voice_lock, flags); 1774 return 1; 1775 } 1776 return 0; 1777} 1778 1779static struct snd_kcontrol_new snd_ymfpci_pcm_volume = { 1780 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1781 .name = "PCM Playback Volume", 1782 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | 1783 SNDRV_CTL_ELEM_ACCESS_INACTIVE, 1784 .info = snd_ymfpci_pcm_vol_info, 1785 .get = snd_ymfpci_pcm_vol_get, 1786 .put = snd_ymfpci_pcm_vol_put, 1787}; 1788 1789 1790/* 1791 * Mixer routines 1792 */ 1793 1794static void snd_ymfpci_mixer_free_ac97_bus(struct snd_ac97_bus *bus) 1795{ 1796 struct snd_ymfpci *chip = bus->private_data; 1797 chip->ac97_bus = NULL; 1798} 1799 1800static void snd_ymfpci_mixer_free_ac97(struct snd_ac97 *ac97) 1801{ 1802 struct snd_ymfpci *chip = ac97->private_data; 1803 chip->ac97 = NULL; 1804} 1805 1806int snd_ymfpci_mixer(struct snd_ymfpci *chip, int rear_switch) 1807{ 1808 struct snd_ac97_template ac97; 1809 struct snd_kcontrol *kctl; 1810 struct snd_pcm_substream *substream; 1811 unsigned int idx; 1812 int err; 1813 static struct snd_ac97_bus_ops ops = { 1814 .write = snd_ymfpci_codec_write, 1815 .read = snd_ymfpci_codec_read, 1816 }; 1817 1818 if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus)) < 0) 1819 return err; 1820 chip->ac97_bus->private_free = snd_ymfpci_mixer_free_ac97_bus; 1821 chip->ac97_bus->no_vra = 1; /* YMFPCI doesn't need VRA */ 1822 1823 memset(&ac97, 0, sizeof(ac97)); 1824 ac97.private_data = chip; 1825 ac97.private_free = snd_ymfpci_mixer_free_ac97; 1826 if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97)) < 0) 1827 return err; 1828 1829 /* to be sure */ 1830 snd_ac97_update_bits(chip->ac97, AC97_EXTENDED_STATUS, 1831 AC97_EA_VRA|AC97_EA_VRM, 0); 1832 1833 for (idx = 0; idx < ARRAY_SIZE(snd_ymfpci_controls); idx++) { 1834 if ((err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_ymfpci_controls[idx], chip))) < 0) 1835 return err; 1836 } 1837 if (chip->ac97->ext_id & AC97_EI_SDAC) { 1838 kctl = snd_ctl_new1(&snd_ymfpci_dup4ch, chip); 1839 err = snd_ctl_add(chip->card, kctl); 1840 if (err < 0) 1841 return err; 1842 } 1843 1844 /* add S/PDIF control */ 1845 if (snd_BUG_ON(!chip->pcm_spdif)) 1846 return -ENXIO; 1847 if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_default, chip))) < 0) 1848 return err; 1849 kctl->id.device = chip->pcm_spdif->device; 1850 if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_mask, chip))) < 0) 1851 return err; 1852 kctl->id.device = chip->pcm_spdif->device; 1853 if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_stream, chip))) < 0) 1854 return err; 1855 kctl->id.device = chip->pcm_spdif->device; 1856 chip->spdif_pcm_ctl = kctl; 1857 1858 /* direct recording source */ 1859 if (chip->device_id == PCI_DEVICE_ID_YAMAHA_754 && 1860 (err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_drec_source, chip))) < 0) 1861 return err; 1862 1863 /* 1864 * shared rear/line-in 1865 */ 1866 if (rear_switch) { 1867 if ((err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_ymfpci_rear_shared, chip))) < 0) 1868 return err; 1869 } 1870 1871 /* per-voice volume */ 1872 substream = chip->pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream; 1873 for (idx = 0; idx < 32; ++idx) { 1874 kctl = snd_ctl_new1(&snd_ymfpci_pcm_volume, chip); 1875 if (!kctl) 1876 return -ENOMEM; 1877 kctl->id.device = chip->pcm->device; 1878 kctl->id.subdevice = idx; 1879 kctl->private_value = (unsigned long)substream; 1880 if ((err = snd_ctl_add(chip->card, kctl)) < 0) 1881 return err; 1882 chip->pcm_mixer[idx].left = 0x8000; 1883 chip->pcm_mixer[idx].right = 0x8000; 1884 chip->pcm_mixer[idx].ctl = kctl; 1885 substream = substream->next; 1886 } 1887 1888 return 0; 1889} 1890 1891 1892/* 1893 * timer 1894 */ 1895 1896static int snd_ymfpci_timer_start(struct snd_timer *timer) 1897{ 1898 struct snd_ymfpci *chip; 1899 unsigned long flags; 1900 unsigned int count; 1901 1902 chip = snd_timer_chip(timer); 1903 spin_lock_irqsave(&chip->reg_lock, flags); 1904 if (timer->sticks > 1) { 1905 chip->timer_ticks = timer->sticks; 1906 count = timer->sticks - 1; 1907 } else { 1908 /* 1909 * Divisor 1 is not allowed; fake it by using divisor 2 and 1910 * counting two ticks for each interrupt. 1911 */ 1912 chip->timer_ticks = 2; 1913 count = 2 - 1; 1914 } 1915 snd_ymfpci_writew(chip, YDSXGR_TIMERCOUNT, count); 1916 snd_ymfpci_writeb(chip, YDSXGR_TIMERCTRL, 0x03); 1917 spin_unlock_irqrestore(&chip->reg_lock, flags); 1918 return 0; 1919} 1920 1921static int snd_ymfpci_timer_stop(struct snd_timer *timer) 1922{ 1923 struct snd_ymfpci *chip; 1924 unsigned long flags; 1925 1926 chip = snd_timer_chip(timer); 1927 spin_lock_irqsave(&chip->reg_lock, flags); 1928 snd_ymfpci_writeb(chip, YDSXGR_TIMERCTRL, 0x00); 1929 spin_unlock_irqrestore(&chip->reg_lock, flags); 1930 return 0; 1931} 1932 1933static int snd_ymfpci_timer_precise_resolution(struct snd_timer *timer, 1934 unsigned long *num, unsigned long *den) 1935{ 1936 *num = 1; 1937 *den = 96000; 1938 return 0; 1939} 1940 1941static struct snd_timer_hardware snd_ymfpci_timer_hw = { 1942 .flags = SNDRV_TIMER_HW_AUTO, 1943 .resolution = 10417, /* 1 / 96 kHz = 10.41666...us */ 1944 .ticks = 0x10000, 1945 .start = snd_ymfpci_timer_start, 1946 .stop = snd_ymfpci_timer_stop, 1947 .precise_resolution = snd_ymfpci_timer_precise_resolution, 1948}; 1949 1950int snd_ymfpci_timer(struct snd_ymfpci *chip, int device) 1951{ 1952 struct snd_timer *timer = NULL; 1953 struct snd_timer_id tid; 1954 int err; 1955 1956 tid.dev_class = SNDRV_TIMER_CLASS_CARD; 1957 tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE; 1958 tid.card = chip->card->number; 1959 tid.device = device; 1960 tid.subdevice = 0; 1961 if ((err = snd_timer_new(chip->card, "YMFPCI", &tid, &timer)) >= 0) { 1962 strcpy(timer->name, "YMFPCI timer"); 1963 timer->private_data = chip; 1964 timer->hw = snd_ymfpci_timer_hw; 1965 } 1966 chip->timer = timer; 1967 return err; 1968} 1969 1970 1971/* 1972 * proc interface 1973 */ 1974 1975static void snd_ymfpci_proc_read(struct snd_info_entry *entry, 1976 struct snd_info_buffer *buffer) 1977{ 1978 struct snd_ymfpci *chip = entry->private_data; 1979 int i; 1980 1981 snd_iprintf(buffer, "YMFPCI\n\n"); 1982 for (i = 0; i <= YDSXGR_WORKBASE; i += 4) 1983 snd_iprintf(buffer, "%04x: %04x\n", i, snd_ymfpci_readl(chip, i)); 1984} 1985 1986static int snd_ymfpci_proc_init(struct snd_card *card, struct snd_ymfpci *chip) 1987{ 1988 struct snd_info_entry *entry; 1989 1990 if (! snd_card_proc_new(card, "ymfpci", &entry)) 1991 snd_info_set_text_ops(entry, chip, snd_ymfpci_proc_read); 1992 return 0; 1993} 1994 1995/* 1996 * initialization routines 1997 */ 1998 1999static void snd_ymfpci_aclink_reset(struct pci_dev * pci) 2000{ 2001 u8 cmd; 2002 2003 pci_read_config_byte(pci, PCIR_DSXG_CTRL, &cmd); 2004#if 0 // force to reset 2005 if (cmd & 0x03) { 2006#endif 2007 pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd & 0xfc); 2008 pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd | 0x03); 2009 pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd & 0xfc); 2010 pci_write_config_word(pci, PCIR_DSXG_PWRCTRL1, 0); 2011 pci_write_config_word(pci, PCIR_DSXG_PWRCTRL2, 0); 2012#if 0 2013 } 2014#endif 2015} 2016 2017static void snd_ymfpci_enable_dsp(struct snd_ymfpci *chip) 2018{ 2019 snd_ymfpci_writel(chip, YDSXGR_CONFIG, 0x00000001); 2020} 2021 2022static void snd_ymfpci_disable_dsp(struct snd_ymfpci *chip) 2023{ 2024 u32 val; 2025 int timeout = 1000; 2026 2027 val = snd_ymfpci_readl(chip, YDSXGR_CONFIG); 2028 if (val) 2029 snd_ymfpci_writel(chip, YDSXGR_CONFIG, 0x00000000); 2030 while (timeout-- > 0) { 2031 val = snd_ymfpci_readl(chip, YDSXGR_STATUS); 2032 if ((val & 0x00000002) == 0) 2033 break; 2034 } 2035} 2036 2037static int snd_ymfpci_request_firmware(struct snd_ymfpci *chip) 2038{ 2039 int err, is_1e; 2040 const char *name; 2041 2042 err = request_firmware(&chip->dsp_microcode, "yamaha/ds1_dsp.fw", 2043 &chip->pci->dev); 2044 if (err >= 0) { 2045 if (chip->dsp_microcode->size != YDSXG_DSPLENGTH) { 2046 dev_err(chip->card->dev, 2047 "DSP microcode has wrong size\n"); 2048 err = -EINVAL; 2049 } 2050 } 2051 if (err < 0) 2052 return err; 2053 is_1e = chip->device_id == PCI_DEVICE_ID_YAMAHA_724F || 2054 chip->device_id == PCI_DEVICE_ID_YAMAHA_740C || 2055 chip->device_id == PCI_DEVICE_ID_YAMAHA_744 || 2056 chip->device_id == PCI_DEVICE_ID_YAMAHA_754; 2057 name = is_1e ? "yamaha/ds1e_ctrl.fw" : "yamaha/ds1_ctrl.fw"; 2058 err = request_firmware(&chip->controller_microcode, name, 2059 &chip->pci->dev); 2060 if (err >= 0) { 2061 if (chip->controller_microcode->size != YDSXG_CTRLLENGTH) { 2062 dev_err(chip->card->dev, 2063 "controller microcode has wrong size\n"); 2064 err = -EINVAL; 2065 } 2066 } 2067 if (err < 0) 2068 return err; 2069 return 0; 2070} 2071 2072MODULE_FIRMWARE("yamaha/ds1_dsp.fw"); 2073MODULE_FIRMWARE("yamaha/ds1_ctrl.fw"); 2074MODULE_FIRMWARE("yamaha/ds1e_ctrl.fw"); 2075 2076static void snd_ymfpci_download_image(struct snd_ymfpci *chip) 2077{ 2078 int i; 2079 u16 ctrl; 2080 const __le32 *inst; 2081 2082 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0x00000000); 2083 snd_ymfpci_disable_dsp(chip); 2084 snd_ymfpci_writel(chip, YDSXGR_MODE, 0x00010000); 2085 snd_ymfpci_writel(chip, YDSXGR_MODE, 0x00000000); 2086 snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, 0x00000000); 2087 snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT, 0x00000000); 2088 snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, 0x00000000); 2089 snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, 0x00000000); 2090 snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, 0x00000000); 2091 ctrl = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL); 2092 snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, ctrl & ~0x0007); 2093 2094 /* setup DSP instruction code */ 2095 inst = (const __le32 *)chip->dsp_microcode->data; 2096 for (i = 0; i < YDSXG_DSPLENGTH / 4; i++) 2097 snd_ymfpci_writel(chip, YDSXGR_DSPINSTRAM + (i << 2), 2098 le32_to_cpu(inst[i])); 2099 2100 /* setup control instruction code */ 2101 inst = (const __le32 *)chip->controller_microcode->data; 2102 for (i = 0; i < YDSXG_CTRLLENGTH / 4; i++) 2103 snd_ymfpci_writel(chip, YDSXGR_CTRLINSTRAM + (i << 2), 2104 le32_to_cpu(inst[i])); 2105 2106 snd_ymfpci_enable_dsp(chip); 2107} 2108 2109static int snd_ymfpci_memalloc(struct snd_ymfpci *chip) 2110{ 2111 long size, playback_ctrl_size; 2112 int voice, bank, reg; 2113 u8 *ptr; 2114 dma_addr_t ptr_addr; 2115 2116 playback_ctrl_size = 4 + 4 * YDSXG_PLAYBACK_VOICES; 2117 chip->bank_size_playback = snd_ymfpci_readl(chip, YDSXGR_PLAYCTRLSIZE) << 2; 2118 chip->bank_size_capture = snd_ymfpci_readl(chip, YDSXGR_RECCTRLSIZE) << 2; 2119 chip->bank_size_effect = snd_ymfpci_readl(chip, YDSXGR_EFFCTRLSIZE) << 2; 2120 chip->work_size = YDSXG_DEFAULT_WORK_SIZE; 2121 2122 size = ALIGN(playback_ctrl_size, 0x100) + 2123 ALIGN(chip->bank_size_playback * 2 * YDSXG_PLAYBACK_VOICES, 0x100) + 2124 ALIGN(chip->bank_size_capture * 2 * YDSXG_CAPTURE_VOICES, 0x100) + 2125 ALIGN(chip->bank_size_effect * 2 * YDSXG_EFFECT_VOICES, 0x100) + 2126 chip->work_size; 2127 /* work_ptr must be aligned to 256 bytes, but it's already 2128 covered with the kernel page allocation mechanism */ 2129 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci), 2130 size, &chip->work_ptr) < 0) 2131 return -ENOMEM; 2132 ptr = chip->work_ptr.area; 2133 ptr_addr = chip->work_ptr.addr; 2134 memset(ptr, 0, size); /* for sure */ 2135 2136 chip->bank_base_playback = ptr; 2137 chip->bank_base_playback_addr = ptr_addr; 2138 chip->ctrl_playback = (u32 *)ptr; 2139 chip->ctrl_playback[0] = cpu_to_le32(YDSXG_PLAYBACK_VOICES); 2140 ptr += ALIGN(playback_ctrl_size, 0x100); 2141 ptr_addr += ALIGN(playback_ctrl_size, 0x100); 2142 for (voice = 0; voice < YDSXG_PLAYBACK_VOICES; voice++) { 2143 chip->voices[voice].number = voice; 2144 chip->voices[voice].bank = (struct snd_ymfpci_playback_bank *)ptr; 2145 chip->voices[voice].bank_addr = ptr_addr; 2146 for (bank = 0; bank < 2; bank++) { 2147 chip->bank_playback[voice][bank] = (struct snd_ymfpci_playback_bank *)ptr; 2148 ptr += chip->bank_size_playback; 2149 ptr_addr += chip->bank_size_playback; 2150 } 2151 } 2152 ptr = (char *)ALIGN((unsigned long)ptr, 0x100); 2153 ptr_addr = ALIGN(ptr_addr, 0x100); 2154 chip->bank_base_capture = ptr; 2155 chip->bank_base_capture_addr = ptr_addr; 2156 for (voice = 0; voice < YDSXG_CAPTURE_VOICES; voice++) 2157 for (bank = 0; bank < 2; bank++) { 2158 chip->bank_capture[voice][bank] = (struct snd_ymfpci_capture_bank *)ptr; 2159 ptr += chip->bank_size_capture; 2160 ptr_addr += chip->bank_size_capture; 2161 } 2162 ptr = (char *)ALIGN((unsigned long)ptr, 0x100); 2163 ptr_addr = ALIGN(ptr_addr, 0x100); 2164 chip->bank_base_effect = ptr; 2165 chip->bank_base_effect_addr = ptr_addr; 2166 for (voice = 0; voice < YDSXG_EFFECT_VOICES; voice++) 2167 for (bank = 0; bank < 2; bank++) { 2168 chip->bank_effect[voice][bank] = (struct snd_ymfpci_effect_bank *)ptr; 2169 ptr += chip->bank_size_effect; 2170 ptr_addr += chip->bank_size_effect; 2171 } 2172 ptr = (char *)ALIGN((unsigned long)ptr, 0x100); 2173 ptr_addr = ALIGN(ptr_addr, 0x100); 2174 chip->work_base = ptr; 2175 chip->work_base_addr = ptr_addr; 2176 2177 snd_BUG_ON(ptr + chip->work_size != 2178 chip->work_ptr.area + chip->work_ptr.bytes); 2179 2180 snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, chip->bank_base_playback_addr); 2181 snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, chip->bank_base_capture_addr); 2182 snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, chip->bank_base_effect_addr); 2183 snd_ymfpci_writel(chip, YDSXGR_WORKBASE, chip->work_base_addr); 2184 snd_ymfpci_writel(chip, YDSXGR_WORKSIZE, chip->work_size >> 2); 2185 2186 /* S/PDIF output initialization */ 2187 chip->spdif_bits = chip->spdif_pcm_bits = SNDRV_PCM_DEFAULT_CON_SPDIF & 0xffff; 2188 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL, 0); 2189 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits); 2190 2191 /* S/PDIF input initialization */ 2192 snd_ymfpci_writew(chip, YDSXGR_SPDIFINCTRL, 0); 2193 2194 /* digital mixer setup */ 2195 for (reg = 0x80; reg < 0xc0; reg += 4) 2196 snd_ymfpci_writel(chip, reg, 0); 2197 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0x3fff3fff); 2198 snd_ymfpci_writel(chip, YDSXGR_BUF441OUTVOL, 0x3fff3fff); 2199 snd_ymfpci_writel(chip, YDSXGR_ZVOUTVOL, 0x3fff3fff); 2200 snd_ymfpci_writel(chip, YDSXGR_SPDIFOUTVOL, 0x3fff3fff); 2201 snd_ymfpci_writel(chip, YDSXGR_NATIVEADCINVOL, 0x3fff3fff); 2202 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACINVOL, 0x3fff3fff); 2203 snd_ymfpci_writel(chip, YDSXGR_PRIADCLOOPVOL, 0x3fff3fff); 2204 snd_ymfpci_writel(chip, YDSXGR_LEGACYOUTVOL, 0x3fff3fff); 2205 2206 return 0; 2207} 2208 2209static int snd_ymfpci_free(struct snd_ymfpci *chip) 2210{ 2211 u16 ctrl; 2212 2213 if (snd_BUG_ON(!chip)) 2214 return -EINVAL; 2215 2216 if (chip->res_reg_area) { /* don't touch busy hardware */ 2217 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0); 2218 snd_ymfpci_writel(chip, YDSXGR_BUF441OUTVOL, 0); 2219 snd_ymfpci_writel(chip, YDSXGR_LEGACYOUTVOL, 0); 2220 snd_ymfpci_writel(chip, YDSXGR_STATUS, ~0); 2221 snd_ymfpci_disable_dsp(chip); 2222 snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, 0); 2223 snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, 0); 2224 snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, 0); 2225 snd_ymfpci_writel(chip, YDSXGR_WORKBASE, 0); 2226 snd_ymfpci_writel(chip, YDSXGR_WORKSIZE, 0); 2227 ctrl = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL); 2228 snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, ctrl & ~0x0007); 2229 } 2230 2231 snd_ymfpci_ac3_done(chip); 2232 2233 /* Set PCI device to D3 state */ 2234#if 0 2235 /* FIXME: temporarily disabled, otherwise we cannot fire up 2236 * the chip again unless reboot. ACPI bug? 2237 */ 2238 pci_set_power_state(chip->pci, PCI_D3hot); 2239#endif 2240 2241#ifdef CONFIG_PM_SLEEP 2242 kfree(chip->saved_regs); 2243#endif 2244 if (chip->irq >= 0) 2245 free_irq(chip->irq, chip); 2246 release_and_free_resource(chip->mpu_res); 2247 release_and_free_resource(chip->fm_res); 2248 snd_ymfpci_free_gameport(chip); 2249 iounmap(chip->reg_area_virt); 2250 if (chip->work_ptr.area) 2251 snd_dma_free_pages(&chip->work_ptr); 2252 2253 release_and_free_resource(chip->res_reg_area); 2254 2255 pci_write_config_word(chip->pci, 0x40, chip->old_legacy_ctrl); 2256 2257 pci_disable_device(chip->pci); 2258 release_firmware(chip->dsp_microcode); 2259 release_firmware(chip->controller_microcode); 2260 kfree(chip); 2261 return 0; 2262} 2263 2264static int snd_ymfpci_dev_free(struct snd_device *device) 2265{ 2266 struct snd_ymfpci *chip = device->device_data; 2267 return snd_ymfpci_free(chip); 2268} 2269 2270#ifdef CONFIG_PM_SLEEP 2271static int saved_regs_index[] = { 2272 /* spdif */ 2273 YDSXGR_SPDIFOUTCTRL, 2274 YDSXGR_SPDIFOUTSTATUS, 2275 YDSXGR_SPDIFINCTRL, 2276 /* volumes */ 2277 YDSXGR_PRIADCLOOPVOL, 2278 YDSXGR_NATIVEDACINVOL, 2279 YDSXGR_NATIVEDACOUTVOL, 2280 YDSXGR_BUF441OUTVOL, 2281 YDSXGR_NATIVEADCINVOL, 2282 YDSXGR_SPDIFLOOPVOL, 2283 YDSXGR_SPDIFOUTVOL, 2284 YDSXGR_ZVOUTVOL, 2285 YDSXGR_LEGACYOUTVOL, 2286 /* address bases */ 2287 YDSXGR_PLAYCTRLBASE, 2288 YDSXGR_RECCTRLBASE, 2289 YDSXGR_EFFCTRLBASE, 2290 YDSXGR_WORKBASE, 2291 /* capture set up */ 2292 YDSXGR_MAPOFREC, 2293 YDSXGR_RECFORMAT, 2294 YDSXGR_RECSLOTSR, 2295 YDSXGR_ADCFORMAT, 2296 YDSXGR_ADCSLOTSR, 2297}; 2298#define YDSXGR_NUM_SAVED_REGS ARRAY_SIZE(saved_regs_index) 2299 2300static int snd_ymfpci_suspend(struct device *dev) 2301{ 2302 struct snd_card *card = dev_get_drvdata(dev); 2303 struct snd_ymfpci *chip = card->private_data; 2304 unsigned int i; 2305 2306 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot); 2307 snd_pcm_suspend_all(chip->pcm); 2308 snd_pcm_suspend_all(chip->pcm2); 2309 snd_pcm_suspend_all(chip->pcm_spdif); 2310 snd_pcm_suspend_all(chip->pcm_4ch); 2311 snd_ac97_suspend(chip->ac97); 2312 for (i = 0; i < YDSXGR_NUM_SAVED_REGS; i++) 2313 chip->saved_regs[i] = snd_ymfpci_readl(chip, saved_regs_index[i]); 2314 chip->saved_ydsxgr_mode = snd_ymfpci_readl(chip, YDSXGR_MODE); 2315 pci_read_config_word(chip->pci, PCIR_DSXG_LEGACY, 2316 &chip->saved_dsxg_legacy); 2317 pci_read_config_word(chip->pci, PCIR_DSXG_ELEGACY, 2318 &chip->saved_dsxg_elegacy); 2319 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0); 2320 snd_ymfpci_writel(chip, YDSXGR_BUF441OUTVOL, 0); 2321 snd_ymfpci_disable_dsp(chip); 2322 return 0; 2323} 2324 2325static int snd_ymfpci_resume(struct device *dev) 2326{ 2327 struct pci_dev *pci = to_pci_dev(dev); 2328 struct snd_card *card = dev_get_drvdata(dev); 2329 struct snd_ymfpci *chip = card->private_data; 2330 unsigned int i; 2331 2332 snd_ymfpci_aclink_reset(pci); 2333 snd_ymfpci_codec_ready(chip, 0); 2334 snd_ymfpci_download_image(chip); 2335 udelay(100); 2336 2337 for (i = 0; i < YDSXGR_NUM_SAVED_REGS; i++) 2338 snd_ymfpci_writel(chip, saved_regs_index[i], chip->saved_regs[i]); 2339 2340 snd_ac97_resume(chip->ac97); 2341 2342 pci_write_config_word(chip->pci, PCIR_DSXG_LEGACY, 2343 chip->saved_dsxg_legacy); 2344 pci_write_config_word(chip->pci, PCIR_DSXG_ELEGACY, 2345 chip->saved_dsxg_elegacy); 2346 2347 /* start hw again */ 2348 if (chip->start_count > 0) { 2349 spin_lock_irq(&chip->reg_lock); 2350 snd_ymfpci_writel(chip, YDSXGR_MODE, chip->saved_ydsxgr_mode); 2351 chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT); 2352 spin_unlock_irq(&chip->reg_lock); 2353 } 2354 snd_power_change_state(card, SNDRV_CTL_POWER_D0); 2355 return 0; 2356} 2357 2358SIMPLE_DEV_PM_OPS(snd_ymfpci_pm, snd_ymfpci_suspend, snd_ymfpci_resume); 2359#endif /* CONFIG_PM_SLEEP */ 2360 2361int snd_ymfpci_create(struct snd_card *card, 2362 struct pci_dev *pci, 2363 unsigned short old_legacy_ctrl, 2364 struct snd_ymfpci **rchip) 2365{ 2366 struct snd_ymfpci *chip; 2367 int err; 2368 static struct snd_device_ops ops = { 2369 .dev_free = snd_ymfpci_dev_free, 2370 }; 2371 2372 *rchip = NULL; 2373 2374 /* enable PCI device */ 2375 if ((err = pci_enable_device(pci)) < 0) 2376 return err; 2377 2378 chip = kzalloc(sizeof(*chip), GFP_KERNEL); 2379 if (chip == NULL) { 2380 pci_disable_device(pci); 2381 return -ENOMEM; 2382 } 2383 chip->old_legacy_ctrl = old_legacy_ctrl; 2384 spin_lock_init(&chip->reg_lock); 2385 spin_lock_init(&chip->voice_lock); 2386 init_waitqueue_head(&chip->interrupt_sleep); 2387 atomic_set(&chip->interrupt_sleep_count, 0); 2388 chip->card = card; 2389 chip->pci = pci; 2390 chip->irq = -1; 2391 chip->device_id = pci->device; 2392 chip->rev = pci->revision; 2393 chip->reg_area_phys = pci_resource_start(pci, 0); 2394 chip->reg_area_virt = ioremap_nocache(chip->reg_area_phys, 0x8000); 2395 pci_set_master(pci); 2396 chip->src441_used = -1; 2397 2398 if ((chip->res_reg_area = request_mem_region(chip->reg_area_phys, 0x8000, "YMFPCI")) == NULL) { 2399 dev_err(chip->card->dev, 2400 "unable to grab memory region 0x%lx-0x%lx\n", 2401 chip->reg_area_phys, chip->reg_area_phys + 0x8000 - 1); 2402 snd_ymfpci_free(chip); 2403 return -EBUSY; 2404 } 2405 if (request_irq(pci->irq, snd_ymfpci_interrupt, IRQF_SHARED, 2406 KBUILD_MODNAME, chip)) { 2407 dev_err(chip->card->dev, "unable to grab IRQ %d\n", pci->irq); 2408 snd_ymfpci_free(chip); 2409 return -EBUSY; 2410 } 2411 chip->irq = pci->irq; 2412 2413 snd_ymfpci_aclink_reset(pci); 2414 if (snd_ymfpci_codec_ready(chip, 0) < 0) { 2415 snd_ymfpci_free(chip); 2416 return -EIO; 2417 } 2418 2419 err = snd_ymfpci_request_firmware(chip); 2420 if (err < 0) { 2421 dev_err(chip->card->dev, "firmware request failed: %d\n", err); 2422 snd_ymfpci_free(chip); 2423 return err; 2424 } 2425 snd_ymfpci_download_image(chip); 2426 2427 udelay(100); /* seems we need a delay after downloading image.. */ 2428 2429 if (snd_ymfpci_memalloc(chip) < 0) { 2430 snd_ymfpci_free(chip); 2431 return -EIO; 2432 } 2433 2434 if ((err = snd_ymfpci_ac3_init(chip)) < 0) { 2435 snd_ymfpci_free(chip); 2436 return err; 2437 } 2438 2439#ifdef CONFIG_PM_SLEEP 2440 chip->saved_regs = kmalloc(YDSXGR_NUM_SAVED_REGS * sizeof(u32), 2441 GFP_KERNEL); 2442 if (chip->saved_regs == NULL) { 2443 snd_ymfpci_free(chip); 2444 return -ENOMEM; 2445 } 2446#endif 2447 2448 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) { 2449 snd_ymfpci_free(chip); 2450 return err; 2451 } 2452 2453 snd_ymfpci_proc_init(card, chip); 2454 2455 *rchip = chip; 2456 return 0; 2457} 2458