Searched refs:caps (Results 1 - 200 of 673) sorted by relevance

1234

/linux-4.1.27/arch/powerpc/perf/
H A Dhv-common.c7 unsigned long hv_perf_caps_get(struct hv_perf_caps *caps) hv_perf_caps_get() argument
12 struct hv_gpci_system_performance_capabilities caps; hv_perf_caps_get() member in struct:p
30 pr_devel("capability_mask: 0x%x\n", arg.caps.capability_mask); hv_perf_caps_get()
32 caps->version = arg.params.counter_info_version_out; hv_perf_caps_get()
33 caps->collect_privileged = !!arg.caps.perf_collect_privileged; hv_perf_caps_get()
34 caps->ga = !!(arg.caps.capability_mask & HV_GPCI_CM_GA); hv_perf_caps_get()
35 caps->expanded = !!(arg.caps.capability_mask & HV_GPCI_CM_EXPANDED); hv_perf_caps_get()
36 caps->lab = !!(arg.caps.capability_mask & HV_GPCI_CM_LAB); hv_perf_caps_get()
H A Dhv-common.h16 unsigned long hv_perf_caps_get(struct hv_perf_caps *caps);
H A Dhv-gpci.c85 struct hv_perf_caps caps; \
86 unsigned long hret = hv_perf_caps_get(&caps); \
90 return sprintf(page, _format, caps._name); \
287 struct hv_perf_caps caps; hv_gpci_init() local
296 hret = hv_perf_caps_get(&caps); hv_gpci_init()
/linux-4.1.27/arch/arm64/kernel/
H A Dcpufeature.c29 void check_cpu_capabilities(const struct arm64_cpu_capabilities *caps, check_cpu_capabilities() argument
34 for (i = 0; caps[i].desc; i++) { check_cpu_capabilities()
35 if (!caps[i].matches(&caps[i])) check_cpu_capabilities()
38 if (!cpus_have_cap(caps[i].capability)) check_cpu_capabilities()
39 pr_info("%s %s\n", info, caps[i].desc); check_cpu_capabilities()
40 cpus_set_cap(caps[i].capability); check_cpu_capabilities()
/linux-4.1.27/drivers/net/ethernet/mellanox/mlx4/
H A Dmain.c176 if (!(dev->caps.flags & MLX4_DEV_CAP_FLAG_DPDP)) { mlx4_check_port_params()
177 for (i = 0; i < dev->caps.num_ports - 1; i++) { mlx4_check_port_params()
185 for (i = 0; i < dev->caps.num_ports; i++) { mlx4_check_port_params()
186 if (!(port_type[i] & dev->caps.supported_type[i+1])) { mlx4_check_port_params()
199 for (i = 1; i <= dev->caps.num_ports; ++i) mlx4_set_port_mask()
200 dev->caps.port_mask[i] = dev->caps.port_type[i]; mlx4_set_port_mask()
212 if (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_SYS_EQS) { mlx4_query_func()
228 struct mlx4_caps *dev_cap = &dev->caps; mlx4_enable_cqe_eqe_stride()
264 dev->caps.vl_cap[port] = port_cap->max_vl; _mlx4_dev_port()
265 dev->caps.ib_mtu_cap[port] = port_cap->ib_mtu; _mlx4_dev_port()
271 dev->caps.gid_table_len[port] = port_cap->max_gids; _mlx4_dev_port()
272 dev->caps.pkey_table_len[port] = port_cap->max_pkeys; _mlx4_dev_port()
273 dev->caps.port_width_cap[port] = port_cap->max_port_width; _mlx4_dev_port()
274 dev->caps.eth_mtu_cap[port] = port_cap->eth_mtu; _mlx4_dev_port()
275 dev->caps.def_mac[port] = port_cap->def_mac; _mlx4_dev_port()
276 dev->caps.supported_type[port] = port_cap->supported_port_types; _mlx4_dev_port()
277 dev->caps.suggested_type[port] = port_cap->suggested_type; _mlx4_dev_port()
278 dev->caps.default_sense[port] = port_cap->default_sense; _mlx4_dev_port()
279 dev->caps.trans_type[port] = port_cap->trans_type; _mlx4_dev_port()
280 dev->caps.vendor_oui[port] = port_cap->vendor_oui; _mlx4_dev_port()
281 dev->caps.wavelength[port] = port_cap->wavelength; _mlx4_dev_port()
282 dev->caps.trans_code[port] = port_cap->trans_code; _mlx4_dev_port()
302 if (!(dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_IGNORE_FCS)) mlx4_enable_ignore_fcs()
307 dev->caps.flags2 &= ~MLX4_DEV_CAP_FLAG2_IGNORE_FCS; mlx4_enable_ignore_fcs()
311 if (!(dev->caps.flags & MLX4_DEV_CAP_FLAG_FCS_KEEP)) { mlx4_enable_ignore_fcs()
314 dev->caps.flags2 &= ~MLX4_DEV_CAP_FLAG2_IGNORE_FCS; mlx4_enable_ignore_fcs()
351 dev->caps.num_ports = dev_cap->num_ports; mlx4_dev_cap()
352 dev->caps.num_sys_eqs = dev_cap->num_sys_eqs; mlx4_dev_cap()
354 dev->caps.num_sys_eqs : mlx4_dev_cap()
356 for (i = 1; i <= dev->caps.num_ports; ++i) { mlx4_dev_cap()
364 dev->caps.uar_page_size = PAGE_SIZE; mlx4_dev_cap()
365 dev->caps.num_uars = dev_cap->uar_size / PAGE_SIZE; mlx4_dev_cap()
366 dev->caps.local_ca_ack_delay = dev_cap->local_ca_ack_delay; mlx4_dev_cap()
367 dev->caps.bf_reg_size = dev_cap->bf_reg_size; mlx4_dev_cap()
368 dev->caps.bf_regs_per_page = dev_cap->bf_regs_per_page; mlx4_dev_cap()
369 dev->caps.max_sq_sg = dev_cap->max_sq_sg; mlx4_dev_cap()
370 dev->caps.max_rq_sg = dev_cap->max_rq_sg; mlx4_dev_cap()
371 dev->caps.max_wqes = dev_cap->max_qp_sz; mlx4_dev_cap()
372 dev->caps.max_qp_init_rdma = dev_cap->max_requester_per_qp; mlx4_dev_cap()
373 dev->caps.max_srq_wqes = dev_cap->max_srq_sz; mlx4_dev_cap()
374 dev->caps.max_srq_sge = dev_cap->max_rq_sg - 1; mlx4_dev_cap()
375 dev->caps.reserved_srqs = dev_cap->reserved_srqs; mlx4_dev_cap()
376 dev->caps.max_sq_desc_sz = dev_cap->max_sq_desc_sz; mlx4_dev_cap()
377 dev->caps.max_rq_desc_sz = dev_cap->max_rq_desc_sz; mlx4_dev_cap()
383 dev->caps.max_cqes = dev_cap->max_cq_sz - 1; mlx4_dev_cap()
384 dev->caps.reserved_cqs = dev_cap->reserved_cqs; mlx4_dev_cap()
385 dev->caps.reserved_eqs = dev_cap->reserved_eqs; mlx4_dev_cap()
386 dev->caps.reserved_mtts = dev_cap->reserved_mtts; mlx4_dev_cap()
387 dev->caps.reserved_mrws = dev_cap->reserved_mrws; mlx4_dev_cap()
390 dev->caps.reserved_uars = max_t(int, 128, dev_cap->reserved_uars); mlx4_dev_cap()
391 dev->caps.reserved_pds = dev_cap->reserved_pds; mlx4_dev_cap()
392 dev->caps.reserved_xrcds = (dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) ? mlx4_dev_cap()
394 dev->caps.max_xrcds = (dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) ? mlx4_dev_cap()
396 dev->caps.mtt_entry_sz = dev_cap->mtt_entry_sz; mlx4_dev_cap()
398 dev->caps.max_msg_sz = dev_cap->max_msg_sz; mlx4_dev_cap()
399 dev->caps.page_size_cap = ~(u32) (dev_cap->min_page_sz - 1); mlx4_dev_cap()
400 dev->caps.flags = dev_cap->flags; mlx4_dev_cap()
401 dev->caps.flags2 = dev_cap->flags2; mlx4_dev_cap()
402 dev->caps.bmme_flags = dev_cap->bmme_flags; mlx4_dev_cap()
403 dev->caps.reserved_lkey = dev_cap->reserved_lkey; mlx4_dev_cap()
404 dev->caps.stat_rate_support = dev_cap->stat_rate_support; mlx4_dev_cap()
405 dev->caps.max_gso_sz = dev_cap->max_gso_sz; mlx4_dev_cap()
406 dev->caps.max_rss_tbl_sz = dev_cap->max_rss_tbl_sz; mlx4_dev_cap()
410 dev->caps.flags |= MLX4_DEV_CAP_FLAG_SENSE_SUPPORT; mlx4_dev_cap()
413 dev->caps.flags &= ~MLX4_DEV_CAP_FLAG_SENSE_SUPPORT; mlx4_dev_cap()
416 dev->caps.log_num_macs = MLX4_MIN_LOG_NUM_MAC; mlx4_dev_cap()
417 dev->caps.log_num_vlans = MLX4_MIN_LOG_NUM_VLANS; mlx4_dev_cap()
419 dev->caps.log_num_macs = log_num_mac; mlx4_dev_cap()
420 dev->caps.log_num_vlans = MLX4_LOG_NUM_VLANS; mlx4_dev_cap()
423 for (i = 1; i <= dev->caps.num_ports; ++i) { mlx4_dev_cap()
424 dev->caps.port_type[i] = MLX4_PORT_TYPE_NONE; mlx4_dev_cap()
425 if (dev->caps.supported_type[i]) { mlx4_dev_cap()
427 if (dev->caps.supported_type[i] == MLX4_PORT_TYPE_ETH) mlx4_dev_cap()
428 dev->caps.port_type[i] = MLX4_PORT_TYPE_ETH; mlx4_dev_cap()
430 else if (dev->caps.supported_type[i] == mlx4_dev_cap()
432 dev->caps.port_type[i] = MLX4_PORT_TYPE_IB; mlx4_dev_cap()
438 dev->caps.port_type[i] = dev->caps.suggested_type[i] ? mlx4_dev_cap()
441 dev->caps.port_type[i] = port_type_array[i - 1]; mlx4_dev_cap()
451 ((dev->caps.supported_type[i] == MLX4_PORT_TYPE_AUTO) && mlx4_dev_cap()
452 (dev->caps.flags & MLX4_DEV_CAP_FLAG_DPDP) && mlx4_dev_cap()
453 (dev->caps.flags & MLX4_DEV_CAP_FLAG_SENSE_SUPPORT)); mlx4_dev_cap()
460 if (mlx4_priv(dev)->sense.sense_allowed[i] && dev->caps.default_sense[i]) { mlx4_dev_cap()
462 dev->caps.possible_type[i] = MLX4_PORT_TYPE_AUTO; mlx4_dev_cap()
465 dev->caps.port_type[i] = sensed_port; mlx4_dev_cap()
467 dev->caps.possible_type[i] = dev->caps.port_type[i]; mlx4_dev_cap()
470 if (dev->caps.log_num_macs > dev_cap->port_cap[i].log_max_macs) { mlx4_dev_cap()
471 dev->caps.log_num_macs = dev_cap->port_cap[i].log_max_macs; mlx4_dev_cap()
473 i, 1 << dev->caps.log_num_macs); mlx4_dev_cap()
475 if (dev->caps.log_num_vlans > dev_cap->port_cap[i].log_max_vlans) { mlx4_dev_cap()
476 dev->caps.log_num_vlans = dev_cap->port_cap[i].log_max_vlans; mlx4_dev_cap()
478 i, 1 << dev->caps.log_num_vlans); mlx4_dev_cap()
482 dev->caps.max_counters = 1 << ilog2(dev_cap->max_counters); mlx4_dev_cap()
484 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW] = dev_cap->reserved_qps; mlx4_dev_cap()
485 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_ETH_ADDR] = mlx4_dev_cap()
486 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_ADDR] = mlx4_dev_cap()
487 (1 << dev->caps.log_num_macs) * mlx4_dev_cap()
488 (1 << dev->caps.log_num_vlans) * mlx4_dev_cap()
489 dev->caps.num_ports; mlx4_dev_cap()
490 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_EXCH] = MLX4_NUM_FEXCH; mlx4_dev_cap()
493 dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_FS_EN) mlx4_dev_cap()
494 dev->caps.dmfs_high_rate_qpn_base = dev_cap->dmfs_high_rate_qpn_base; mlx4_dev_cap()
496 dev->caps.dmfs_high_rate_qpn_base = mlx4_dev_cap()
497 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW]; mlx4_dev_cap()
500 dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_FS_EN) { mlx4_dev_cap()
501 dev->caps.dmfs_high_rate_qpn_range = dev_cap->dmfs_high_rate_qpn_range; mlx4_dev_cap()
502 dev->caps.dmfs_high_steer_mode = MLX4_STEERING_DMFS_A0_DEFAULT; mlx4_dev_cap()
503 dev->caps.flags2 |= MLX4_DEV_CAP_FLAG2_FS_A0; mlx4_dev_cap()
505 dev->caps.dmfs_high_steer_mode = MLX4_STEERING_DMFS_A0_NOT_SUPPORTED; mlx4_dev_cap()
506 dev->caps.dmfs_high_rate_qpn_base = mlx4_dev_cap()
507 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW]; mlx4_dev_cap()
508 dev->caps.dmfs_high_rate_qpn_range = MLX4_A0_STEERING_TABLE_SIZE; mlx4_dev_cap()
511 dev->caps.rl_caps = dev_cap->rl_caps; mlx4_dev_cap()
513 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_RSS_RAW_ETH] = mlx4_dev_cap()
514 dev->caps.dmfs_high_rate_qpn_range; mlx4_dev_cap()
516 dev->caps.reserved_qps = dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW] + mlx4_dev_cap()
517 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_ETH_ADDR] + mlx4_dev_cap()
518 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_ADDR] + mlx4_dev_cap()
519 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_EXCH]; mlx4_dev_cap()
521 dev->caps.sqp_demux = (mlx4_is_master(dev)) ? MLX4_MAX_NUM_SLAVES : 0; mlx4_dev_cap()
527 dev->caps.flags &= ~MLX4_DEV_CAP_FLAG_64B_CQE; mlx4_dev_cap()
528 dev->caps.flags &= ~MLX4_DEV_CAP_FLAG_64B_EQE; mlx4_dev_cap()
540 if ((dev->caps.flags & mlx4_dev_cap()
543 dev->caps.function_caps |= MLX4_FUNC_CAP_64B_EQE_CQE; mlx4_dev_cap()
547 dev->caps.alloc_res_qp_mask = mlx4_dev_cap()
548 (dev->caps.bf_reg_size ? MLX4_RESERVE_ETH_BF_QP : 0) | mlx4_dev_cap()
551 if (!(dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ETS_CFG) && mlx4_dev_cap()
552 dev->caps.flags & MLX4_DEV_CAP_FLAG_SET_ETH_SCHED) { mlx4_dev_cap()
555 dev->caps.flags2 |= MLX4_DEV_CAP_FLAG2_ETS_CFG; mlx4_dev_cap()
559 dev->caps.alloc_res_qp_mask = 0; mlx4_dev_cap()
734 dev->caps.steering_mode = hca_param->steering_mode; slave_adjust_steering_mode()
735 if (dev->caps.steering_mode == MLX4_STEERING_MODE_DEVICE_MANAGED) { slave_adjust_steering_mode()
736 dev->caps.num_qp_per_mgm = dev_cap->fs_max_num_qp_per_entry; slave_adjust_steering_mode()
737 dev->caps.fs_log_max_ucast_qp_range_size = slave_adjust_steering_mode()
740 dev->caps.num_qp_per_mgm = slave_adjust_steering_mode()
744 mlx4_steering_mode_str(dev->caps.steering_mode)); slave_adjust_steering_mode()
773 dev->caps.hca_core_clock = hca_param.hca_core_clock; mlx4_slave_cap()
776 dev->caps.max_qp_dest_rdma = 1 << hca_param.log_rd_per_qp; mlx4_slave_cap()
787 page_size = ~dev->caps.page_size_cap + 1; mlx4_slave_cap()
796 dev->caps.uar_page_size = 1 << (hca_param.uar_page_sz + 12); mlx4_slave_cap()
799 if (dev->caps.uar_page_size != PAGE_SIZE) { mlx4_slave_cap()
801 dev->caps.uar_page_size, PAGE_SIZE); mlx4_slave_cap()
820 dev->caps.num_ports = func_cap.num_ports; mlx4_slave_cap()
826 dev->caps.num_qps = 1 << hca_param.log_num_qps; mlx4_slave_cap()
827 dev->caps.num_srqs = 1 << hca_param.log_num_srqs; mlx4_slave_cap()
828 dev->caps.num_cqs = 1 << hca_param.log_num_cqs; mlx4_slave_cap()
829 dev->caps.num_mpts = 1 << hca_param.log_mpt_sz; mlx4_slave_cap()
830 dev->caps.num_eqs = func_cap.max_eq; mlx4_slave_cap()
831 dev->caps.reserved_eqs = func_cap.reserved_eq; mlx4_slave_cap()
832 dev->caps.reserved_lkey = func_cap.reserved_lkey; mlx4_slave_cap()
833 dev->caps.num_pds = MLX4_NUM_PDS; mlx4_slave_cap()
834 dev->caps.num_mgms = 0; mlx4_slave_cap()
835 dev->caps.num_amgms = 0; mlx4_slave_cap()
837 if (dev->caps.num_ports > MLX4_MAX_PORTS) { mlx4_slave_cap()
839 dev->caps.num_ports, MLX4_MAX_PORTS); mlx4_slave_cap()
843 dev->caps.qp0_qkey = kcalloc(dev->caps.num_ports, sizeof(u32), GFP_KERNEL); mlx4_slave_cap()
844 dev->caps.qp0_tunnel = kcalloc(dev->caps.num_ports, sizeof (u32), GFP_KERNEL); mlx4_slave_cap()
845 dev->caps.qp0_proxy = kcalloc(dev->caps.num_ports, sizeof (u32), GFP_KERNEL); mlx4_slave_cap()
846 dev->caps.qp1_tunnel = kcalloc(dev->caps.num_ports, sizeof (u32), GFP_KERNEL); mlx4_slave_cap()
847 dev->caps.qp1_proxy = kcalloc(dev->caps.num_ports, sizeof (u32), GFP_KERNEL); mlx4_slave_cap()
849 if (!dev->caps.qp0_tunnel || !dev->caps.qp0_proxy || mlx4_slave_cap()
850 !dev->caps.qp1_tunnel || !dev->caps.qp1_proxy || mlx4_slave_cap()
851 !dev->caps.qp0_qkey) { mlx4_slave_cap()
856 for (i = 1; i <= dev->caps.num_ports; ++i) { mlx4_slave_cap()
863 dev->caps.qp0_qkey[i - 1] = func_cap.qp0_qkey; mlx4_slave_cap()
864 dev->caps.qp0_tunnel[i - 1] = func_cap.qp0_tunnel_qpn; mlx4_slave_cap()
865 dev->caps.qp0_proxy[i - 1] = func_cap.qp0_proxy_qpn; mlx4_slave_cap()
866 dev->caps.qp1_tunnel[i - 1] = func_cap.qp1_tunnel_qpn; mlx4_slave_cap()
867 dev->caps.qp1_proxy[i - 1] = func_cap.qp1_proxy_qpn; mlx4_slave_cap()
868 dev->caps.port_mask[i] = dev->caps.port_type[i]; mlx4_slave_cap()
869 dev->caps.phys_port_id[i] = func_cap.phys_port_id; mlx4_slave_cap()
871 &dev->caps.gid_table_len[i], mlx4_slave_cap()
872 &dev->caps.pkey_table_len[i])) mlx4_slave_cap()
876 if (dev->caps.uar_page_size * (dev->caps.num_uars - mlx4_slave_cap()
877 dev->caps.reserved_uars) > mlx4_slave_cap()
881 dev->caps.uar_page_size * dev->caps.num_uars, mlx4_slave_cap()
888 dev->caps.eqe_size = 64; mlx4_slave_cap()
889 dev->caps.eqe_factor = 1; mlx4_slave_cap()
891 dev->caps.eqe_size = 32; mlx4_slave_cap()
892 dev->caps.eqe_factor = 0; mlx4_slave_cap()
896 dev->caps.cqe_size = 64; mlx4_slave_cap()
897 dev->caps.userspace_caps |= MLX4_USER_DEV_CAP_LARGE_CQE; mlx4_slave_cap()
899 dev->caps.cqe_size = 32; mlx4_slave_cap()
903 dev->caps.eqe_size = hca_param.eqe_size; mlx4_slave_cap()
904 dev->caps.eqe_factor = 0; mlx4_slave_cap()
908 dev->caps.cqe_size = hca_param.cqe_size; mlx4_slave_cap()
910 dev->caps.userspace_caps |= MLX4_USER_DEV_CAP_LARGE_CQE; mlx4_slave_cap()
913 dev->caps.flags2 &= ~MLX4_DEV_CAP_FLAG2_TS; mlx4_slave_cap()
921 dev->caps.bf_reg_size) mlx4_slave_cap()
922 dev->caps.alloc_res_qp_mask |= MLX4_RESERVE_ETH_BF_QP; mlx4_slave_cap()
925 dev->caps.alloc_res_qp_mask |= MLX4_RESERVE_A0_QP; mlx4_slave_cap()
930 kfree(dev->caps.qp0_qkey); mlx4_slave_cap()
931 kfree(dev->caps.qp0_tunnel); mlx4_slave_cap()
932 kfree(dev->caps.qp0_proxy); mlx4_slave_cap()
933 kfree(dev->caps.qp1_tunnel); mlx4_slave_cap()
934 kfree(dev->caps.qp1_proxy); mlx4_slave_cap()
935 dev->caps.qp0_qkey = NULL; mlx4_slave_cap()
936 dev->caps.qp0_tunnel = NULL; mlx4_slave_cap()
937 dev->caps.qp0_proxy = NULL; mlx4_slave_cap()
938 dev->caps.qp1_tunnel = NULL; mlx4_slave_cap()
939 dev->caps.qp1_proxy = NULL; mlx4_slave_cap()
952 for (port = 1; port <= dev->caps.num_ports; port++) { mlx4_request_modules()
953 if (dev->caps.port_type[port] == MLX4_PORT_TYPE_IB) mlx4_request_modules()
955 else if (dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH) mlx4_request_modules()
961 if (has_ib_port || (dev->caps.flags & MLX4_DEV_CAP_FLAG_IBOE)) mlx4_request_modules()
976 for (port = 0; port < dev->caps.num_ports; port++) { mlx4_change_port_types()
979 if (port_types[port] != dev->caps.port_type[port + 1]) mlx4_change_port_types()
984 for (port = 1; port <= dev->caps.num_ports; port++) { mlx4_change_port_types()
986 dev->caps.port_type[port] = port_types[port - 1]; mlx4_change_port_types()
1017 (mdev->caps.port_type[info->port] == MLX4_PORT_TYPE_IB) ? show_port_type()
1019 if (mdev->caps.possible_type[info->port] == MLX4_PORT_TYPE_AUTO) show_port_type()
1058 mdev->caps.possible_type[info->port] = info->tmp_type; set_port_type()
1060 for (i = 0; i < mdev->caps.num_ports; i++) { set_port_type()
1062 mdev->caps.possible_type[i+1]; set_port_type()
1064 types[i] = mdev->caps.port_type[i+1]; set_port_type()
1067 if (!(mdev->caps.flags & MLX4_DEV_CAP_FLAG_DPDP) && set_port_type()
1068 !(mdev->caps.flags & MLX4_DEV_CAP_FLAG_SENSE_SUPPORT)) { set_port_type()
1069 for (i = 1; i <= mdev->caps.num_ports; i++) { set_port_type()
1070 if (mdev->caps.possible_type[i] == MLX4_PORT_TYPE_AUTO) { set_port_type()
1071 mdev->caps.possible_type[i] = mdev->caps.port_type[i]; set_port_type()
1090 for (i = 0; i < mdev->caps.num_ports; i++) set_port_type()
1144 if (mdev->caps.port_type[info->port] == MLX4_PORT_TYPE_ETH) show_port_ib_mtu()
1148 ibta_mtu_to_int(mdev->caps.port_ib_mtu[info->port])); show_port_ib_mtu()
1162 if (mdev->caps.port_type[info->port] == MLX4_PORT_TYPE_ETH) { set_port_ib_mtu()
1176 mdev->caps.port_ib_mtu[info->port] = ibta_mtu; set_port_ib_mtu()
1181 for (port = 1; port <= mdev->caps.num_ports; port++) { set_port_ib_mtu()
1245 if (!(dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_PORT_REMAP)) mlx4_port_map_set()
1327 cmpt_entry_sz, dev->caps.num_qps, mlx4_init_cmpt_table()
1328 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW], mlx4_init_cmpt_table()
1337 cmpt_entry_sz, dev->caps.num_srqs, mlx4_init_cmpt_table()
1338 dev->caps.reserved_srqs, 0, 0); mlx4_init_cmpt_table()
1346 cmpt_entry_sz, dev->caps.num_cqs, mlx4_init_cmpt_table()
1347 dev->caps.reserved_cqs, 0, 0); mlx4_init_cmpt_table()
1426 * dev->caps.mtt_entry_sz below is really the MTT segment mlx4_init_icm()
1429 dev->caps.reserved_mtts = mlx4_init_icm()
1430 ALIGN(dev->caps.reserved_mtts * dev->caps.mtt_entry_sz, mlx4_init_icm()
1431 dma_get_cache_alignment()) / dev->caps.mtt_entry_sz; mlx4_init_icm()
1435 dev->caps.mtt_entry_sz, mlx4_init_icm()
1436 dev->caps.num_mtts, mlx4_init_icm()
1437 dev->caps.reserved_mtts, 1, 0); mlx4_init_icm()
1446 dev->caps.num_mpts, mlx4_init_icm()
1447 dev->caps.reserved_mrws, 1, 1); mlx4_init_icm()
1456 dev->caps.num_qps, mlx4_init_icm()
1457 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW], mlx4_init_icm()
1467 dev->caps.num_qps, mlx4_init_icm()
1468 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW], mlx4_init_icm()
1478 dev->caps.num_qps, mlx4_init_icm()
1479 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW], mlx4_init_icm()
1489 dev->caps.num_qps, mlx4_init_icm()
1490 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW], mlx4_init_icm()
1500 dev->caps.num_cqs, mlx4_init_icm()
1501 dev->caps.reserved_cqs, 0, 0); mlx4_init_icm()
1510 dev->caps.num_srqs, mlx4_init_icm()
1511 dev->caps.reserved_srqs, 0, 0); mlx4_init_icm()
1527 dev->caps.num_mgms + dev->caps.num_amgms, mlx4_init_icm()
1528 dev->caps.num_mgms + dev->caps.num_amgms, mlx4_init_icm()
1620 if (!dev->caps.bf_reg_size) map_bf_area()
1624 (dev->caps.num_uars << PAGE_SHIFT); map_bf_area()
1626 (dev->caps.num_uars << PAGE_SHIFT); map_bf_area()
1746 dev->caps.vf_caps |= MLX4_VF_CAP_FLAG_RESET; mlx4_reset_vf_support()
1823 for (i = 1; i <= dev->caps.num_ports; i++) { mlx4_parav_master_pf_caps()
1824 if (dev->caps.port_type[i] == MLX4_PORT_TYPE_ETH) mlx4_parav_master_pf_caps()
1825 dev->caps.gid_table_len[i] = mlx4_parav_master_pf_caps()
1828 dev->caps.gid_table_len[i] = 1; mlx4_parav_master_pf_caps()
1829 dev->caps.pkey_table_len[i] = mlx4_parav_master_pf_caps()
1877 if (dev->caps.dmfs_high_steer_mode == choose_steering_mode()
1881 dev->caps.dmfs_high_steer_mode = choose_steering_mode()
1895 dev->caps.steering_mode = MLX4_STEERING_MODE_DEVICE_MANAGED; choose_steering_mode()
1896 dev->caps.num_qp_per_mgm = dev_cap->fs_max_num_qp_per_entry; choose_steering_mode()
1897 dev->caps.fs_log_max_ucast_qp_range_size = choose_steering_mode()
1900 if (dev->caps.dmfs_high_steer_mode != choose_steering_mode()
1902 dev->caps.dmfs_high_steer_mode = MLX4_STEERING_DMFS_A0_DISABLE; choose_steering_mode()
1903 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_UC_STEER && choose_steering_mode()
1904 dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_MC_STEER) choose_steering_mode()
1905 dev->caps.steering_mode = MLX4_STEERING_MODE_B0; choose_steering_mode()
1907 dev->caps.steering_mode = MLX4_STEERING_MODE_A0; choose_steering_mode()
1909 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_UC_STEER || choose_steering_mode()
1910 dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_MC_STEER) choose_steering_mode()
1917 dev->caps.num_qp_per_mgm = mlx4_get_qp_per_mgm(dev); choose_steering_mode()
1920 mlx4_steering_mode_str(dev->caps.steering_mode), choose_steering_mode()
1928 if (dev->caps.steering_mode == MLX4_STEERING_MODE_DEVICE_MANAGED && choose_tunnel_offload_mode()
1930 dev->caps.tunnel_offload_mode = MLX4_TUNNEL_OFFLOAD_MODE_VXLAN; choose_tunnel_offload_mode()
1932 dev->caps.tunnel_offload_mode = MLX4_TUNNEL_OFFLOAD_MODE_NONE; choose_tunnel_offload_mode()
1934 mlx4_dbg(dev, "Tunneling offload mode is: %s\n", (dev->caps.tunnel_offload_mode choose_tunnel_offload_mode()
1943 if (dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_NOT_SUPPORTED) mlx4_validate_optimized_steering()
1946 for (i = 1; i <= dev->caps.num_ports; i++) { mlx4_validate_optimized_steering()
1950 } else if ((dev->caps.dmfs_high_steer_mode != mlx4_validate_optimized_steering()
1953 !!(dev->caps.dmfs_high_steer_mode == mlx4_validate_optimized_steering()
1958 dev->caps.dmfs_high_steer_mode), mlx4_validate_optimized_steering()
2019 if (dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_STATIC && mlx4_init_hca()
2021 dev->caps.function_caps |= MLX4_FUNC_CAP_DMFS_A0_STATIC; mlx4_init_hca()
2036 if (dev->caps.steering_mode == mlx4_init_hca()
2047 dev->caps.max_fmr_maps = (1 << (32 - ilog2(dev->caps.num_mpts))) - 1; mlx4_init_hca()
2049 init_hca.log_uar_sz = ilog2(dev->caps.num_uars); mlx4_init_hca()
2052 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW || mlx4_init_hca()
2053 dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN) mlx4_init_hca()
2072 dev->caps.num_eqs = dev_cap.max_eqs; mlx4_init_hca()
2073 dev->caps.reserved_eqs = dev_cap.reserved_eqs; mlx4_init_hca()
2074 dev->caps.reserved_uars = dev_cap.reserved_uars; mlx4_init_hca()
2082 if (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS) { mlx4_init_hca()
2087 dev->caps.flags2 &= ~MLX4_DEV_CAP_FLAG2_TS; mlx4_init_hca()
2089 dev->caps.hca_core_clock = mlx4_init_hca()
2096 if (!dev->caps.hca_core_clock) { mlx4_init_hca()
2097 dev->caps.flags2 &= ~MLX4_DEV_CAP_FLAG2_TS; mlx4_init_hca()
2105 dev->caps.flags2 &= ~MLX4_DEV_CAP_FLAG2_TS; mlx4_init_hca()
2110 if (dev->caps.dmfs_high_steer_mode != mlx4_init_hca()
2115 if (dev->caps.dmfs_high_steer_mode == mlx4_init_hca()
2117 dev->caps.dmfs_high_rate_qpn_base = mlx4_init_hca()
2118 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW]; mlx4_init_hca()
2119 dev->caps.dmfs_high_rate_qpn_range = mlx4_init_hca()
2125 dev->caps.dmfs_high_steer_mode)); mlx4_init_hca()
2137 mlx4_err(dev, "Failed to obtain slave caps\n"); mlx4_init_hca()
2160 dev->caps.rx_checksum_flags_port[1] = params.rx_csum_flags_port_1; mlx4_init_hca()
2161 dev->caps.rx_checksum_flags_port[2] = params.rx_csum_flags_port_2; mlx4_init_hca()
2173 kfree(dev->caps.qp0_qkey); mlx4_init_hca()
2174 kfree(dev->caps.qp0_tunnel); mlx4_init_hca()
2175 kfree(dev->caps.qp0_proxy); mlx4_init_hca()
2176 kfree(dev->caps.qp1_tunnel); mlx4_init_hca()
2177 kfree(dev->caps.qp1_proxy); mlx4_init_hca()
2198 if (!(dev->caps.flags & MLX4_DEV_CAP_FLAG_COUNTERS)) mlx4_init_counters_table()
2201 nent = dev->caps.max_counters; mlx4_init_counters_table()
2214 if (!(dev->caps.flags & MLX4_DEV_CAP_FLAG_COUNTERS)) __mlx4_counter_alloc()
2367 priv->eq_table.eq[dev->caps.num_comp_vectors].irq); mlx4_setup_hca()
2371 priv->eq_table.eq[dev->caps.num_comp_vectors].irq); mlx4_setup_hca()
2405 for (port = 1; port <= dev->caps.num_ports; port++) { mlx4_setup_hca()
2410 mlx4_warn(dev, "failed to get port %d default ib capabilities (%d). Continuing with caps = 0\n", mlx4_setup_hca()
2412 dev->caps.ib_port_def_cap[port] = ib_port_default_caps; mlx4_setup_hca()
2426 dev->caps.port_ib_mtu[port] = IB_MTU_2048; mlx4_setup_hca()
2428 dev->caps.port_ib_mtu[port] = IB_MTU_4096; mlx4_setup_hca()
2431 dev->caps.pkey_table_len[port] : -1); mlx4_setup_hca()
2491 int nreq = dev->caps.num_ports * num_online_cpus() + MSIX_LEGACY_SZ; mlx4_enable_msi_x()
2493 nreq = min_t(int, dev->caps.num_eqs - dev->caps.reserved_eqs, mlx4_enable_msi_x()
2510 dev->caps.num_ports * MIN_MSIX_P_PORT) { mlx4_enable_msi_x()
2512 dev->caps.comp_pool = 0; mlx4_enable_msi_x()
2513 dev->caps.num_comp_vectors = nreq - 1; mlx4_enable_msi_x()
2515 dev->caps.comp_pool = nreq - MSIX_LEGACY_SZ; mlx4_enable_msi_x()
2516 dev->caps.num_comp_vectors = MSIX_LEGACY_SZ - 1; mlx4_enable_msi_x()
2528 dev->caps.num_comp_vectors = 1; mlx4_enable_msi_x()
2529 dev->caps.comp_pool = 0; mlx4_enable_msi_x()
2602 int num_entries = dev->caps.num_ports; mlx4_init_steering()
2622 int num_entries = dev->caps.num_ports; mlx4_clear_steering()
3003 if (dev->caps.num_ports < 2 && mlx4_load_one()
3008 dev->caps.num_ports); mlx4_load_one()
3021 dev->caps.num_ports; mlx4_load_one()
3060 dev->caps.num_comp_vectors = 1; mlx4_load_one()
3061 dev->caps.comp_pool = 0; mlx4_load_one()
3082 for (port = 1; port <= dev->caps.num_ports; port++) { mlx4_load_one()
3142 kfree(dev->caps.qp0_qkey); mlx4_load_one()
3143 kfree(dev->caps.qp0_tunnel); mlx4_load_one()
3144 kfree(dev->caps.qp0_proxy); mlx4_load_one()
3145 kfree(dev->caps.qp1_tunnel); mlx4_load_one()
3146 kfree(dev->caps.qp1_proxy); mlx4_load_one()
3390 for (i = 0; i < dev->caps.num_ports; i++) { mlx4_unload_one()
3391 dev->persist->curr_port_type[i] = dev->caps.port_type[i + 1]; mlx4_unload_one()
3392 dev->persist->curr_port_poss_type[i] = dev->caps. mlx4_unload_one()
3401 for (p = 1; p <= dev->caps.num_ports; p++) { mlx4_unload_one()
3445 kfree(dev->caps.qp0_qkey); mlx4_unload_one()
3446 kfree(dev->caps.qp0_tunnel); mlx4_unload_one()
3447 kfree(dev->caps.qp0_proxy); mlx4_unload_one()
3448 kfree(dev->caps.qp1_tunnel); mlx4_unload_one()
3449 kfree(dev->caps.qp1_proxy); mlx4_unload_one()
3507 for (i = 0; i < dev->caps.num_ports; i++) restore_current_port_types()
3508 dev->caps.possible_type[i + 1] = poss_types[i]; restore_current_port_types()
H A Dqp.c249 flags &= dev->caps.alloc_res_qp_mask; mlx4_qp_reserve_range()
398 (dev->caps.num_qps - 1), qp); mlx4_qp_alloc()
473 radix_tree_delete(&dev->qp_table_tree, qp->qpn & (dev->caps.num_qps - 1)); mlx4_qp_remove()
524 err = mlx4_bitmap_init(*bitmap + MLX4_QP_TABLE_ZONE_GENERAL, dev->caps.num_qps, mlx4_create_zones()
544 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW], mlx4_create_zones()
561 last_offset = dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW]; mlx4_create_zones()
724 u32 max_table_offset = dev->caps.dmfs_high_rate_qpn_base + mlx4_init_qp_table()
725 dev->caps.dmfs_high_rate_qpn_range; mlx4_init_qp_table()
740 fixed_reserved_from_bot_rv += dev->caps.reserved_qps_cnt[k]; mlx4_init_qp_table()
753 int last_base = dev->caps.num_qps; mlx4_init_qp_table()
760 if (dev->caps.reserved_qps_cnt[sort[j]] > mlx4_init_qp_table()
761 dev->caps.reserved_qps_cnt[sort[j - 1]]) { mlx4_init_qp_table()
770 last_base -= dev->caps.reserved_qps_cnt[sort[i]]; mlx4_init_qp_table()
771 dev->caps.reserved_qps_base[sort[i]] = last_base; mlx4_init_qp_table()
773 dev->caps.reserved_qps_cnt[sort[i]]; mlx4_init_qp_table()
788 if (reserved_from_bot + reserved_from_top > dev->caps.num_qps) { mlx4_init_qp_table()
808 dev->caps.qp0_tunnel = kcalloc(dev->caps.num_ports, sizeof (u32), GFP_KERNEL); mlx4_init_qp_table()
809 dev->caps.qp0_proxy = kcalloc(dev->caps.num_ports, sizeof (u32), GFP_KERNEL); mlx4_init_qp_table()
810 dev->caps.qp1_tunnel = kcalloc(dev->caps.num_ports, sizeof (u32), GFP_KERNEL); mlx4_init_qp_table()
811 dev->caps.qp1_proxy = kcalloc(dev->caps.num_ports, sizeof (u32), GFP_KERNEL); mlx4_init_qp_table()
813 if (!dev->caps.qp0_tunnel || !dev->caps.qp0_proxy || mlx4_init_qp_table()
814 !dev->caps.qp1_tunnel || !dev->caps.qp1_proxy) { mlx4_init_qp_table()
819 for (k = 0; k < dev->caps.num_ports; k++) { mlx4_init_qp_table()
820 dev->caps.qp0_proxy[k] = dev->phys_caps.base_proxy_sqpn + mlx4_init_qp_table()
822 dev->caps.qp0_tunnel[k] = dev->caps.qp0_proxy[k] + 8 * MLX4_MFUNC_MAX; mlx4_init_qp_table()
823 dev->caps.qp1_proxy[k] = dev->phys_caps.base_proxy_sqpn + mlx4_init_qp_table()
825 dev->caps.qp1_tunnel[k] = dev->caps.qp1_proxy[k] + 8 * MLX4_MFUNC_MAX; mlx4_init_qp_table()
837 kfree(dev->caps.qp0_tunnel); mlx4_init_qp_table()
838 kfree(dev->caps.qp0_proxy); mlx4_init_qp_table()
839 kfree(dev->caps.qp1_tunnel); mlx4_init_qp_table()
840 kfree(dev->caps.qp1_proxy); mlx4_init_qp_table()
841 dev->caps.qp0_tunnel = dev->caps.qp0_proxy = mlx4_init_qp_table()
842 dev->caps.qp1_tunnel = dev->caps.qp1_proxy = NULL; mlx4_init_qp_table()
H A Dpd.c122 return mlx4_bitmap_init(&priv->pd_bitmap, dev->caps.num_pds, mlx4_init_pd_table()
124 dev->caps.reserved_pds, 0); mlx4_init_pd_table()
137 (1 << 16) - 1, dev->caps.reserved_xrcds + 1, 0); mlx4_init_xrcd_table()
156 dev->caps.uar_page_size); mlx4_uar_alloc()
221 bf->buf_size = dev->caps.bf_reg_size / 2; mlx4_bf_alloc()
222 bf->reg = uar->bf_map + idx * dev->caps.bf_reg_size; mlx4_bf_alloc()
223 if (uar->free_bf_bmap == (1 << dev->caps.bf_regs_per_page) - 1) mlx4_bf_alloc()
253 idx = (bf->reg - bf->uar->bf_map) / dev->caps.bf_reg_size; mlx4_bf_free()
272 if (dev->caps.num_uars <= 128) { mlx4_init_uar_table()
274 dev->caps.num_uars); mlx4_init_uar_table()
280 dev->caps.num_uars, dev->caps.num_uars - 1, mlx4_init_uar_table()
281 dev->caps.reserved_uars, 0); mlx4_init_uar_table()
H A Dprofile.c187 dev->caps.num_qps = profile[i].num; mlx4_make_profile()
196 dev->caps.max_qp_dest_rdma = 1 << priv->qp_table.rdmarc_shift; mlx4_make_profile()
208 dev->caps.num_srqs = profile[i].num; mlx4_make_profile()
213 dev->caps.num_cqs = profile[i].num; mlx4_make_profile()
223 dev->caps.num_eqs = roundup_pow_of_two( mlx4_make_profile()
228 init_hca->log_num_eqs = ilog2(dev->caps.num_eqs); mlx4_make_profile()
232 dev->caps.num_mpts = profile[i].num; mlx4_make_profile()
241 dev->caps.num_mtts = profile[i].num; mlx4_make_profile()
250 if (dev->caps.steering_mode == mlx4_make_profile()
252 dev->caps.num_mgms = profile[i].num; mlx4_make_profile()
256 dev->caps.num_mgms = profile[i].num >> 1; mlx4_make_profile()
257 dev->caps.num_amgms = profile[i].num >> 1; mlx4_make_profile()
269 dev->caps.num_pds = MLX4_NUM_PDS; mlx4_make_profile()
H A Deq.c89 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_PORT_MNG_CHG_EV) get_async_ev_mask()
91 if (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_RECOVERABLE_ERROR_EVENT) get_async_ev_mask()
206 slave == dev->caps.function || mlx4_slave_event()
276 if (slave >= dev->num_slaves || port > dev->caps.num_ports || mlx4_get_slave_port_state()
293 if (slave >= dev->num_slaves || port > dev->caps.num_ports || mlx4_set_slave_port_state()
339 if (slave >= dev->num_slaves || port > dev->caps.num_ports || set_and_calc_slave_port_state()
469 int eqe_size = dev->caps.eqe_size; mlx4_eq_int()
471 while ((eqe = next_eqe_sw(eq, dev->caps.eqe_factor, eqe_size))) { mlx4_eq_int()
506 if (!ret && slave != dev->caps.function) { mlx4_eq_int()
538 if (!ret && slave != dev->caps.function) { mlx4_eq_int()
571 if (dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH) { mlx4_eq_int()
603 if (dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH) mlx4_eq_int()
646 if (!ret && slave != dev->caps.function) { mlx4_eq_int()
717 if (i == dev->caps.function) mlx4_eq_int()
809 for (i = 0; i < dev->caps.num_comp_vectors + 1; ++i) mlx4_interrupt()
841 if (slave == dev->caps.function) mlx4_MAP_EQ_wrapper()
882 return (dev->caps.num_comp_vectors + 1 + dev->caps.reserved_eqs + mlx4_num_eq_uar()
883 dev->caps.comp_pool)/4 - dev->caps.reserved_eqs/4 + 1; mlx4_num_eq_uar()
891 index = eq->eqn / 4 - dev->caps.reserved_eqs / 4; mlx4_get_eq_uar()
938 npages = PAGE_ALIGN(eq->nent * dev->caps.eqe_size) / PAGE_SIZE; mlx4_create_eq()
1050 int npages = PAGE_ALIGN(dev->caps.eqe_size * eq->nent) / PAGE_SIZE; mlx4_free_eq()
1078 for (i = 0; i < dev->caps.num_comp_vectors + 1; ++i) mlx4_free_irqs()
1084 for (i = 0; i < dev->caps.comp_pool; i++) { mlx4_free_irqs()
1091 vec = dev->caps.num_comp_vectors + 1 + i; mlx4_free_irqs()
1127 priv->eq_table.eq = kcalloc(dev->caps.num_eqs - dev->caps.reserved_eqs, mlx4_alloc_eq_table()
1155 roundup_pow_of_two(dev->caps.num_eqs), mlx4_init_eq_table()
1156 dev->caps.num_eqs - 1, mlx4_init_eq_table()
1157 dev->caps.reserved_eqs, mlx4_init_eq_table()
1158 roundup_pow_of_two(dev->caps.num_eqs) - mlx4_init_eq_table()
1159 dev->caps.num_eqs); mlx4_init_eq_table()
1178 kmalloc(MLX4_IRQNAME_SIZE * (dev->caps.num_comp_vectors + 1 + mlx4_init_eq_table()
1179 dev->caps.comp_pool), mlx4_init_eq_table()
1186 for (i = 0; i < dev->caps.num_comp_vectors; ++i) { mlx4_init_eq_table()
1187 err = mlx4_create_eq(dev, dev->caps.num_cqs - mlx4_init_eq_table()
1188 dev->caps.reserved_cqs + mlx4_init_eq_table()
1199 (dev->flags & MLX4_FLAG_MSI_X) ? dev->caps.num_comp_vectors : 0, mlx4_init_eq_table()
1200 &priv->eq_table.eq[dev->caps.num_comp_vectors]); mlx4_init_eq_table()
1205 for (i = dev->caps.num_comp_vectors + 1; mlx4_init_eq_table()
1206 i < dev->caps.num_comp_vectors + dev->caps.comp_pool + 1; ++i) { mlx4_init_eq_table()
1208 err = mlx4_create_eq(dev, dev->caps.num_cqs - mlx4_init_eq_table()
1209 dev->caps.reserved_cqs + mlx4_init_eq_table()
1223 for (i = 0; i < dev->caps.num_comp_vectors + 1; ++i) { mlx4_init_eq_table()
1224 if (i < dev->caps.num_comp_vectors) { mlx4_init_eq_table()
1262 priv->eq_table.eq[dev->caps.num_comp_vectors].eqn); mlx4_init_eq_table()
1265 priv->eq_table.eq[dev->caps.num_comp_vectors].eqn, err); mlx4_init_eq_table()
1267 for (i = 0; i < dev->caps.num_comp_vectors + 1; ++i) mlx4_init_eq_table()
1273 mlx4_free_eq(dev, &priv->eq_table.eq[dev->caps.num_comp_vectors]); mlx4_init_eq_table()
1276 i = dev->caps.num_comp_vectors - 1; mlx4_init_eq_table()
1303 priv->eq_table.eq[dev->caps.num_comp_vectors].eqn); mlx4_cleanup_eq_table()
1307 for (i = 0; i < dev->caps.num_comp_vectors + dev->caps.comp_pool + 1; ++i) mlx4_cleanup_eq_table()
1338 for(i = 0; !err && (i < dev->caps.num_comp_vectors); ++i) { mlx4_test_interrupts()
1358 priv->eq_table.eq[dev->caps.num_comp_vectors].eqn); mlx4_test_interrupts()
1371 for (i = 0; !vec && i < dev->caps.comp_pool; i++) { mlx4_assign_eq()
1374 vec = dev->caps.num_comp_vectors + 1 + i; mlx4_assign_eq()
1407 err = (i == dev->caps.comp_pool) ? -ENOSPC : err; mlx4_assign_eq()
1425 int i = vec - dev->caps.num_comp_vectors - 1; mlx4_release_eq()
H A Dsense.c72 for (i = 1; i <= dev->caps.num_ports; i++) { mlx4_do_sense_ports()
75 dev->caps.possible_type[i] == MLX4_PORT_TYPE_AUTO) { mlx4_do_sense_ports()
86 for (i = 0; i < dev->caps.num_ports; i++) mlx4_do_sense_ports()
101 mlx4_do_sense_ports(dev, stype, &dev->caps.port_type[1]); mlx4_sense_port()
120 if (!(dev->caps.flags & MLX4_DEV_CAP_FLAG_DPDP)) mlx4_start_sense()
139 for (port = 1; port <= dev->caps.num_ports; port++) mlx4_sense_init()
H A Dport.c65 table->max = 1 << dev->caps.log_num_macs; mlx4_init_mac_table()
78 table->max = (1 << dev->caps.log_num_vlans) - MLX4_VLAN_REGULAR; mlx4_init_vlan_table()
248 return dev->caps.reserved_qps_base[MLX4_QP_REGION_ETH_ADDR] + mlx4_get_base_qpn()
249 (port - 1) * (1 << dev->caps.log_num_macs); mlx4_get_base_qpn()
259 if (port < 1 || port > dev->caps.num_ports) { __mlx4_unregister_mac()
498 int mlx4_get_port_ib_caps(struct mlx4_dev *dev, u8 port, __be32 *caps) mlx4_get_port_ib_caps() argument
527 *caps = *(__be32 *) (outbuf + 84); mlx4_get_port_ib_caps()
549 max_port_p_one = find_first_bit(actv_ports.ports, dev->caps.num_ports) + mlx4_get_slave_num_gids()
550 bitmap_weight(actv_ports.ports, dev->caps.num_ports) + 1; mlx4_get_slave_num_gids()
555 bitmap_zero(exclusive_ports.ports, dev->caps.num_ports); mlx4_get_slave_num_gids()
586 max_port_p_one = find_first_bit(actv_ports.ports, dev->caps.num_ports) + mlx4_get_base_gid_ix()
587 bitmap_weight(actv_ports.ports, dev->caps.num_ports) + 1; mlx4_get_base_gid_ix()
592 bitmap_zero(exclusive_ports.ports, dev->caps.num_ports); mlx4_get_base_gid_ix()
658 for (i = 0, num_eth_ports = 0; i < dev->caps.num_ports; i++) { mlx4_reset_roce_gids()
660 if (dev->caps.port_type[i + 1] != MLX4_PORT_TYPE_ETH) mlx4_reset_roce_gids()
674 for (i = 0; i < dev->caps.num_ports; i++) { mlx4_reset_roce_gids()
676 if (dev->caps.port_type[i + 1] != MLX4_PORT_TYPE_ETH) mlx4_reset_roce_gids()
721 if (slave != dev->caps.function && mlx4_common_set_port()
750 mtu = min_t(int, mtu, dev->caps.eth_mtu_cap[port] + mlx4_common_set_port()
887 if (slave != dev->caps.function) mlx4_common_set_port()
938 if (dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH) mlx4_SET_PORT()
945 ((__be32 *) mailbox->buf)[1] = dev->caps.ib_port_def_cap[port]; mlx4_SET_PORT()
958 (dev->caps.port_ib_mtu[port] << MLX4_SET_PORT_MTU_CAP) | mlx4_SET_PORT()
1007 u32 m_promisc = (dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_MC_STEER) ? mlx4_SET_PORT_qpn_calc()
1010 if (dev->caps.steering_mode != MLX4_STEERING_MODE_A0) mlx4_SET_PORT_qpn_calc()
1018 context->n_mac = dev->caps.log_num_macs; mlx4_SET_PORT_qpn_calc()
1172 if (slave != dev->caps.function) mlx4_DUMP_ETH_STATS_wrapper()
1230 bitmap_zero(exclusive_ports.ports, dev->caps.num_ports); mlx4_get_slave_from_roce_gid()
1251 actv_ports.ports, dev->caps.num_ports) + mlx4_get_slave_from_roce_gid()
1253 dev->caps.num_ports) + 1; mlx4_get_slave_from_roce_gid()
1260 dev->caps.num_ports); mlx4_get_slave_from_roce_gid()
H A Dfw.c323 find_first_bit(actv_ports.ports, dev->caps.num_ports); mlx4_QUERY_FUNC_CAP_wrapper()
351 MLX4_PUT(outbox->buf, dev->caps.phys_port_id[vhcr->in_modifier], mlx4_QUERY_FUNC_CAP_wrapper()
366 bitmap_weight(actv_ports.ports, dev->caps.num_ports), mlx4_QUERY_FUNC_CAP_wrapper()
367 dev->caps.num_ports); mlx4_QUERY_FUNC_CAP_wrapper()
370 size = dev->caps.function_caps; /* set PF behaviours */ mlx4_QUERY_FUNC_CAP_wrapper()
378 size = dev->caps.num_qps; mlx4_QUERY_FUNC_CAP_wrapper()
383 size = dev->caps.num_srqs; mlx4_QUERY_FUNC_CAP_wrapper()
388 size = dev->caps.num_cqs; mlx4_QUERY_FUNC_CAP_wrapper()
391 if (!(dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_SYS_EQS) || mlx4_QUERY_FUNC_CAP_wrapper()
395 dev->caps.num_eqs : mlx4_QUERY_FUNC_CAP_wrapper()
396 rounddown_pow_of_two(dev->caps.num_eqs); mlx4_QUERY_FUNC_CAP_wrapper()
398 size = dev->caps.reserved_eqs; mlx4_QUERY_FUNC_CAP_wrapper()
412 size = dev->caps.num_mpts; mlx4_QUERY_FUNC_CAP_wrapper()
417 size = dev->caps.num_mtts; mlx4_QUERY_FUNC_CAP_wrapper()
420 size = dev->caps.num_mgms + dev->caps.num_amgms; mlx4_QUERY_FUNC_CAP_wrapper()
428 size = dev->caps.reserved_lkey + ((slave << 8) & 0xFF00); mlx4_QUERY_FUNC_CAP_wrapper()
546 if (gen_or_port > dev->caps.num_ports) { mlx4_QUERY_FUNC_CAP()
552 if (dev->caps.port_type[gen_or_port] == MLX4_PORT_TYPE_ETH) { mlx4_QUERY_FUNC_CAP()
564 } else if (dev->caps.port_type[gen_or_port] == MLX4_PORT_TYPE_IB) { mlx4_QUERY_FUNC_CAP()
1146 first_port = find_first_bit(actv_ports.ports, dev->caps.num_ports); mlx4_QUERY_DEV_CAP_wrapper()
1149 bitmap_weight(actv_ports.ports, dev->caps.num_ports); mlx4_QUERY_DEV_CAP_wrapper()
1156 for (; slave_port < dev->caps.num_ports; ++slave_port) mlx4_QUERY_DEV_CAP_wrapper()
1165 field |= bitmap_weight(actv_ports.ports, dev->caps.num_ports) & 0x0F; mlx4_QUERY_DEV_CAP_wrapper()
1195 if (dev->caps.steering_mode != MLX4_STEERING_MODE_DEVICE_MANAGED) { mlx4_QUERY_DEV_CAP_wrapper()
1271 if (!err && dev->caps.function != slave) { mlx4_QUERY_PORT_wrapper()
1282 port_type |= (dev->caps.port_type[vhcr->in_modifier] & 0x3); mlx4_QUERY_PORT_wrapper()
1293 if (dev->caps.port_type[vhcr->in_modifier] == MLX4_PORT_TYPE_ETH) mlx4_QUERY_PORT_wrapper()
1300 short_field = dev->caps.pkey_table_len[vhcr->in_modifier]; mlx4_QUERY_PORT_wrapper()
1484 dev->caps.fw_ver = (fw_ver & 0xffff00000000ull) | mlx4_QUERY_FW()
1489 dev->caps.function = lg; mlx4_QUERY_FW()
1501 (int) (dev->caps.fw_ver >> 32), mlx4_QUERY_FW()
1502 (int) (dev->caps.fw_ver >> 16) & 0xffff, mlx4_QUERY_FW()
1503 (int) dev->caps.fw_ver & 0xffff); mlx4_QUERY_FW()
1517 (int) (dev->caps.fw_ver >> 32), mlx4_QUERY_FW()
1518 (int) (dev->caps.fw_ver >> 16) & 0xffff, mlx4_QUERY_FW()
1519 (int) dev->caps.fw_ver & 0xffff, mlx4_QUERY_FW()
1736 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_IPOIB_CSUM) mlx4_INIT_HCA()
1740 if (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ETS_CFG && enable_qos) mlx4_INIT_HCA()
1744 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_COUNTERS) mlx4_INIT_HCA()
1748 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_RSS_IP_FRAG) mlx4_INIT_HCA()
1752 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_64B_EQE) { mlx4_INIT_HCA()
1754 dev->caps.eqe_size = 64; mlx4_INIT_HCA()
1755 dev->caps.eqe_factor = 1; mlx4_INIT_HCA()
1757 dev->caps.eqe_size = 32; mlx4_INIT_HCA()
1758 dev->caps.eqe_factor = 0; mlx4_INIT_HCA()
1761 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_64B_CQE) { mlx4_INIT_HCA()
1763 dev->caps.cqe_size = 64; mlx4_INIT_HCA()
1764 dev->caps.userspace_caps |= MLX4_USER_DEV_CAP_LARGE_CQE; mlx4_INIT_HCA()
1766 dev->caps.cqe_size = 32; mlx4_INIT_HCA()
1770 if ((dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_EQE_STRIDE) && mlx4_INIT_HCA()
1771 (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_CQE_STRIDE)) { mlx4_INIT_HCA()
1772 dev->caps.eqe_size = cache_line_size(); mlx4_INIT_HCA()
1773 dev->caps.cqe_size = cache_line_size(); mlx4_INIT_HCA()
1774 dev->caps.eqe_factor = 0; mlx4_INIT_HCA()
1775 MLX4_PUT(inbox, (u8)((ilog2(dev->caps.eqe_size) - 5) << 4 | mlx4_INIT_HCA()
1776 (ilog2(dev->caps.eqe_size) - 5)), mlx4_INIT_HCA()
1780 dev->caps.userspace_caps |= MLX4_USER_DEV_CAP_LARGE_CQE; mlx4_INIT_HCA()
1783 if (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_RECOVERABLE_ERROR_EVENT) mlx4_INIT_HCA()
1803 if (dev->caps.steering_mode == mlx4_INIT_HCA()
1817 if (dev->caps.dmfs_high_steer_mode != mlx4_INIT_HCA()
1832 if (dev->caps.dmfs_high_steer_mode != mlx4_INIT_HCA()
1835 ((u8)(a0_dmfs_hw_steering[dev->caps.dmfs_high_steer_mode] mlx4_INIT_HCA()
1846 if (dev->caps.steering_mode == MLX4_STEERING_MODE_B0) mlx4_INIT_HCA()
1865 if (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_VXLAN_OFFLOADS) { mlx4_INIT_HCA()
2023 MLX4_GET(dev->caps.hca_core_clock, outbox, QUERY_HCA_CORE_CLOCK_OFFSET); mlx4_hca_core_clock_update()
2060 if (dev->caps.port_mask[port] != MLX4_PORT_TYPE_IB) { mlx4_INIT_PORT_wrapper()
2116 flags |= (dev->caps.vl_cap[port] & 0xf) << INIT_PORT_VL_SHIFT; mlx4_INIT_PORT()
2117 flags |= (dev->caps.port_width_cap[port] & 0xf) << INIT_PORT_PORT_WIDTH_SHIFT; mlx4_INIT_PORT()
2120 field = 128 << dev->caps.ib_mtu_cap[port]; mlx4_INIT_PORT()
2122 field = dev->caps.gid_table_len[port]; mlx4_INIT_PORT()
2124 field = dev->caps.pkey_table_len[port]; mlx4_INIT_PORT()
2159 if (dev->caps.port_mask[port] != MLX4_PORT_TYPE_IB) { mlx4_CLOSE_PORT_wrapper()
2277 if (!(dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_CONFIG_DEV)) mlx4_config_dev_retrieval()
2398 for (port = 1; port <= dev->caps.num_ports; port++) { mlx4_get_phys_port_id()
2410 dev->caps.phys_port_id[port] = (u64)guid_lo | mlx4_get_phys_port_id()
2490 if (dev->caps.steering_mode == mlx4_opreq_action()
2586 if (!(dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_MAD_DEMUX)) mlx4_config_mad_demux()
H A Dmcg.c131 if (port < 1 || port > dev->caps.num_ports) get_promisc_qp()
162 if (port < 1 || port > dev->caps.num_ports) new_steering_entry()
212 if (members_count == dev->caps.num_qp_per_mgm) { new_steering_entry()
249 if (port < 1 || port > dev->caps.num_ports) existing_steering_entry()
297 if (port < 1 || port > dev->caps.num_ports) check_duplicate_entry()
341 if (port < 1 || port > dev->caps.num_ports) promisc_steering_entry()
378 if (port < 1 || port > dev->caps.num_ports) can_remove_steering_entry()
435 if (port < 1 || port > dev->caps.num_ports) add_promisc_qp()
497 dev->caps.num_qp_per_mgm) { add_promisc_qp()
521 if (members_count == dev->caps.num_qp_per_mgm) { add_promisc_qp()
565 if (port < 1 || port > dev->caps.num_ports) remove_promisc_qp()
706 !!(dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_MC_STEER) : 0; find_entry()
1008 if (dev->caps.steering_mode != MLX4_STEERING_MODE_DEVICE_MANAGED) mlx4_flow_attach()
1137 index += dev->caps.num_mgms; mlx4_qp_attach_common()
1145 if (members_count == dev->caps.num_qp_per_mgm) { mlx4_qp_attach_common()
1193 if (index < dev->caps.num_mgms) mlx4_qp_attach_common()
1195 index, dev->caps.num_mgms); mlx4_qp_attach_common()
1198 index - dev->caps.num_mgms, MLX4_USE_RR); mlx4_qp_attach_common()
1289 if (amgm_index < dev->caps.num_mgms) mlx4_qp_detach_common()
1291 index, amgm_index, dev->caps.num_mgms); mlx4_qp_detach_common()
1294 amgm_index - dev->caps.num_mgms, MLX4_USE_RR); mlx4_qp_detach_common()
1309 if (index < dev->caps.num_mgms) mlx4_qp_detach_common()
1311 prev, index, dev->caps.num_mgms); mlx4_qp_detach_common()
1314 index - dev->caps.num_mgms, MLX4_USE_RR); mlx4_qp_detach_common()
1403 switch (dev->caps.steering_mode) { mlx4_multicast_attach()
1432 switch (dev->caps.steering_mode) { mlx4_multicast_detach()
1616 if (dev->caps.steering_mode == mlx4_init_mcg_table()
1619 err = mlx4_bitmap_init(&priv->mcg_table.bitmap, dev->caps.num_amgms, mlx4_init_mcg_table()
1620 dev->caps.num_amgms - 1, 0, 0); mlx4_init_mcg_table()
1631 if (dev->caps.steering_mode != mlx4_cleanup_mcg_table()
H A Dcq.c105 cqn & (dev->caps.num_cqs - 1)); mlx4_cq_completion()
123 cq = radix_tree_lookup(&cq_table->tree, cqn & (dev->caps.num_cqs - 1)); mlx4_cq_event()
295 if (vector > dev->caps.num_comp_vectors + dev->caps.comp_pool) mlx4_cq_alloc()
395 err = mlx4_bitmap_init(&cq_table->bitmap, dev->caps.num_cqs, mlx4_init_cq_table()
396 dev->caps.num_cqs - 1, dev->caps.reserved_cqs, 0); mlx4_init_cq_table()
H A Den_cq.c65 cq->buf_size = cq->size * mdev->dev->caps.cqe_size; mlx4_en_create_cq()
119 if (mdev->dev->caps.comp_pool) { mlx4_en_activate_cq()
127 % mdev->dev->caps.num_comp_vectors; mlx4_en_activate_cq()
135 mdev->dev->caps.num_comp_vectors; mlx4_en_activate_cq()
194 if (priv->mdev->dev->caps.comp_pool && cq->vector) { mlx4_en_destroy_cq()
H A Dmr.c265 return (u64) mtt->offset * dev->caps.mtt_entry_sz; mlx4_mtt_addr()
300 int key = key_to_hw_index(mmr->key) & (dev->caps.num_mpts - 1); mlx4_mr_hw_get_mpt()
363 int key = key_to_hw_index(mmr->key) & (dev->caps.num_mpts - 1); mlx4_mr_hw_write_mpt()
555 (dev->caps.num_mpts - 1)); mlx4_mr_free_reserved()
674 key_to_hw_index(mr->key) & (dev->caps.num_mpts - 1)); mlx4_mr_enable()
823 !(dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW)) || mlx4_mw_alloc()
825 !(dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN))) mlx4_mw_alloc()
871 (dev->caps.num_mpts - 1)); mlx4_mw_enable()
898 (dev->caps.num_mpts - 1)); mlx4_mw_free()
921 if (!is_power_of_2(dev->caps.num_mpts)) mlx4_init_mr_table()
924 err = mlx4_bitmap_init(&mr_table->mpt_bitmap, dev->caps.num_mpts, mlx4_init_mr_table()
925 ~0, dev->caps.reserved_mrws, 0); mlx4_init_mr_table()
930 ilog2((u32)dev->caps.num_mtts / mlx4_init_mr_table()
935 if (dev->caps.reserved_mtts) { mlx4_init_mr_table()
938 fls(dev->caps.reserved_mtts - 1)); mlx4_init_mr_table()
967 fls(dev->caps.reserved_mtts - 1)); mlx4_cleanup_mr_table()
1012 key += dev->caps.num_mpts; mlx4_map_phys_fmr()
1052 if (max_maps > dev->caps.max_fmr_maps) mlx4_fmr_alloc()
1055 if (page_shift < (ffs(dev->caps.page_size_cap) - 1) || page_shift >= 32) mlx4_fmr_alloc()
1127 (dev->caps.num_mpts - 1)); mlx4_fmr_unmap()
H A Dsrq.c50 srq = radix_tree_lookup(&srq_table->tree, srqn & (dev->caps.num_srqs - 1)); mlx4_srq_event()
285 err = mlx4_bitmap_init(&srq_table->bitmap, dev->caps.num_srqs, mlx4_init_srq_table()
286 dev->caps.num_srqs - 1, dev->caps.reserved_srqs, 0); mlx4_init_srq_table()
308 srqn & (dev->caps.num_srqs - 1)); mlx4_srq_lookup()
H A Den_resources.c55 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_PORT_REMAP) mlx4_en_fill_qp_context()
77 (mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN)) { mlx4_en_fill_qp_context()
H A Den_netdev.c478 if (priv->mdev->dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN || mlx4_en_tunnel_steer_add()
479 priv->mdev->dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_STATIC) mlx4_en_tunnel_steer_add()
500 switch (dev->caps.steering_mode) { mlx4_en_uc_steer_add()
551 switch (dev->caps.steering_mode) { mlx4_en_uc_steer_release()
593 if (dev->caps.steering_mode == MLX4_STEERING_MODE_A0) { mlx4_en_get_qp()
650 if (dev->caps.steering_mode == MLX4_STEERING_MODE_A0) { mlx4_en_put_qp()
696 if (dev->caps.steering_mode != MLX4_STEERING_MODE_A0) { mlx4_en_replace_mac()
876 switch (mdev->dev->caps.steering_mode) { mlx4_en_set_promisc_mode()
935 switch (mdev->dev->caps.steering_mode) { mlx4_en_clear_promisc_mode()
990 switch (mdev->dev->caps.steering_mode) { mlx4_en_do_multicast()
1014 switch (mdev->dev->caps.steering_mode) { mlx4_en_do_multicast()
1467 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS) mlx4_en_service_task()
1667 if (mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) { mlx4_en_start_port()
1699 if (priv->mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) mlx4_en_start_port()
1760 if (mdev->dev->caps.steering_mode == mlx4_en_stop_port()
1808 if (mdev->dev->caps.steering_mode == mlx4_en_stop_port()
1835 if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_REASSIGN_MAC_EN)) mlx4_en_stop_port()
2011 if (priv->mdev->dev->caps.comp_pool) { mlx4_en_alloc_resources()
2012 priv->dev->rx_cpu_rmap = alloc_irq_cpu_rmap(priv->mdev->dev->caps.comp_pool); mlx4_en_alloc_resources()
2122 if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS)) mlx4_en_hwtstamp_set()
2298 u64 phys_port_id = mdev->caps.phys_port_id[priv->port]; mlx4_en_get_phys_port_id()
2358 if (priv->mdev->dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) mlx4_en_add_vxlan_port()
2381 if (priv->mdev->dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) mlx4_en_del_vxlan_port()
2412 if (!(priv->mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_QP_RATE_LIMIT)) mlx4_en_set_tx_maxrate()
2684 (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_FLOWSTATS_EN)) { mlx4_en_update_pfc_stats_bitmap()
2821 priv->cqe_factor = (mdev->dev->caps.cqe_size == 64) ? 1 : 0; mlx4_en_init_netdev()
2822 priv->cqe_size = mdev->dev->caps.cqe_size; mlx4_en_init_netdev()
2827 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ETS_CFG) { mlx4_en_init_netdev()
2840 priv->max_mtu = mdev->dev->caps.eth_mtu_cap[priv->port]; mlx4_en_init_netdev()
2842 if (mdev->dev->caps.rx_checksum_flags_port[priv->port] & mlx4_en_init_netdev()
2848 mlx4_en_u64_to_mac(dev->dev_addr, mdev->dev->caps.def_mac[priv->port]); mlx4_en_init_netdev()
2854 mdev->dev->caps.def_mac[priv->port] = mac_u64; mlx4_en_init_netdev()
2914 if (mdev->dev->caps.flags & MLX4_DEV_CAP_FLAG_FCS_KEEP) mlx4_en_init_netdev()
2917 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_IGNORE_FCS) mlx4_en_init_netdev()
2920 if (mdev->dev->caps.steering_mode == mlx4_en_init_netdev()
2922 mdev->dev->caps.dmfs_high_steer_mode != MLX4_STEERING_DMFS_A0_STATIC) mlx4_en_init_netdev()
2925 if (mdev->dev->caps.steering_mode != MLX4_STEERING_MODE_A0) mlx4_en_init_netdev()
2929 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_RSS_TOP) { mlx4_en_init_netdev()
2931 } else if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_RSS_XOR) { mlx4_en_init_netdev()
2939 if (mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) { mlx4_en_init_netdev()
2967 if (mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) { mlx4_en_init_netdev()
2985 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS) mlx4_en_init_netdev()
H A Den_main.c138 if (params->udp_rss && !(mdev->dev->caps.flags mlx4_en_get_profile()
192 if (port < 1 || port > dev->caps.num_ports || mlx4_en_event()
213 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS) mlx4_en_remove()
255 mdev->LSO_support = !!(dev->caps.flags & (1 << 15)); mlx4_en_add()
282 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS) mlx4_en_add()
H A Dresource_tracker.c424 res_alloc->res_free += dev->caps.reserved_mtts; initialize_res_quotas()
425 res_alloc->guaranteed[vf] += dev->caps.reserved_mtts; initialize_res_quotas()
426 res_alloc->quota[vf] += dev->caps.reserved_mtts; initialize_res_quotas()
441 dev->quotas.qp = dev->caps.num_qps - dev->caps.reserved_qps - mlx4_init_quotas()
443 dev->quotas.cq = dev->caps.num_cqs - dev->caps.reserved_cqs; mlx4_init_quotas()
444 dev->quotas.srq = dev->caps.num_srqs - dev->caps.reserved_srqs; mlx4_init_quotas()
445 dev->quotas.mtt = dev->caps.num_mtts - dev->caps.reserved_mtts; mlx4_init_quotas()
446 dev->quotas.mpt = dev->caps.num_mpts - dev->caps.reserved_mrws; mlx4_init_quotas()
514 t, dev->caps.num_qps - mlx4_init_resource_tracker()
515 dev->caps.reserved_qps - mlx4_init_resource_tracker()
520 t, dev->caps.num_cqs - mlx4_init_resource_tracker()
521 dev->caps.reserved_cqs); mlx4_init_resource_tracker()
525 t, dev->caps.num_srqs - mlx4_init_resource_tracker()
526 dev->caps.reserved_srqs); mlx4_init_resource_tracker()
530 t, dev->caps.num_mpts - mlx4_init_resource_tracker()
531 dev->caps.reserved_mrws); mlx4_init_resource_tracker()
535 t, dev->caps.num_mtts - mlx4_init_resource_tracker()
536 dev->caps.reserved_mtts); mlx4_init_resource_tracker()
543 for (j = 0; j < dev->caps.num_ports; mlx4_init_resource_tracker()
549 dev->caps.num_ports) - 1; mlx4_init_resource_tracker()
579 res_alloc->quota[t] = dev->caps.max_counters; mlx4_init_resource_tracker()
588 for (j = 0; j < dev->caps.num_ports; j++) mlx4_init_resource_tracker()
622 dev->caps.function != i) mlx4_free_resource_tracker()
626 i = dev->caps.function; mlx4_free_resource_tracker()
728 if (dev->caps.bmme_flags & MLX4_BMME_FLAG_VSD_INIT2RTR) { update_vport_qp_param()
743 dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_UPDATE_QP) { update_vport_qp_param()
780 return dev->caps.num_mpts - 1; mpt_mask()
1544 return qpn < dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW]; fw_reserved()
1563 flags = (get_param_l(&in_param) >> 24) & dev->caps.alloc_res_qp_mask; qp_alloc_res()
1986 if (!in_port && port > 0 && port <= dev->caps.num_ports) { vlan_alloc_res()
2523 int mtt_base = mr_get_mtt_addr(inbox->buf) / dev->caps.mtt_entry_sz; mlx4_SW2HW_MPT_wrapper()
2717 int mtt_base = qp_get_mtt_addr(qpc) / dev->caps.mtt_entry_sz; mlx4_RST2INIT_QP_wrapper()
2850 int mtt_base = eq_get_mtt_addr(eqc) / dev->caps.mtt_entry_sz; mlx4_SW2HW_EQ_wrapper()
2966 if (dev->caps.port_mask[port] != MLX4_PORT_TYPE_IB) verify_qp_parameters()
2975 if (dev->caps.port_mask[port] != MLX4_PORT_TYPE_IB) verify_qp_parameters()
3100 slave == dev->caps.function || mlx4_GEN_EQE()
3189 int mtt_base = cq_get_mtt_addr(cqc) / dev->caps.mtt_entry_sz; mlx4_SW2HW_CQ_wrapper()
3278 int mtt_base = cq_get_mtt_addr(cqc) / dev->caps.mtt_entry_sz; handle_resize()
3367 int mtt_base = srq_get_mtt_addr(srqc) / dev->caps.mtt_entry_sz; mlx4_SW2HW_SRQ_wrapper()
3829 switch (dev->caps.steering_mode) { qp_attach()
3856 switch (dev->caps.steering_mode) { qp_detach()
3874 if (dev->caps.steering_mode == MLX4_STEERING_MODE_B0 || mlx4_adjust_port()
3875 dev->caps.steering_mode == MLX4_STEERING_MODE_DEVICE_MANAGED) { mlx4_adjust_port()
4103 if (dev->caps.steering_mode != mlx4_QP_FLOW_STEERING_ATTACH_wrapper()
4178 if (dev->caps.steering_mode != mlx4_QP_FLOW_STEERING_DETACH_wrapper()
4236 switch (dev->caps.steering_mode) { detach_qp()
H A Den_ethtool.c93 (u16) (mdev->dev->caps.fw_ver >> 32), mlx4_en_get_drvinfo()
94 (u16) ((mdev->dev->caps.fw_ver >> 16) & 0xffff), mlx4_en_get_drvinfo()
95 (u16) (mdev->dev->caps.fw_ver & 0xffff)); mlx4_en_get_drvinfo()
227 if (!(priv->mdev->dev->caps.flags & mask)) { mlx4_en_get_wol()
264 if (!(priv->mdev->dev->caps.flags & mask)) mlx4_en_set_wol()
342 return MLX4_EN_NUM_SELF_TEST - !(priv->mdev->dev->caps.flags mlx4_en_get_sset_count()
432 if (priv->mdev->dev->caps.flags & MLX4_DEV_CAP_FLAG_UC_LOOPBACK) mlx4_en_get_strings()
499 if ((mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ETH_BACKPL_AN_REP) && mlx4_en_autoneg_get()
826 if (priv->mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ETH_PROT_CTRL) mlx4_en_get_settings()
873 if (!(priv->mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ETH_PROT_CTRL) || mlx4_en_set_settings()
1106 if (!(priv->mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_RSS_TOP)) mlx4_en_check_rxfh_func()
1112 if (!(priv->mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_RSS_XOR)) mlx4_en_check_rxfh_func()
1624 (mdev->dev->caps.steering_mode != mlx4_en_get_rxnfc()
1661 if (mdev->dev->caps.steering_mode != mlx4_en_set_rxnfc()
1759 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS) { mlx4_en_get_ts_info()
1953 if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_PORT_BEACON)) mlx4_en_set_phys_id()
H A Dcmd.c535 ret = mlx4_master_process_vhcr(dev, dev->caps.function, vhcr); mlx4_slave_cmd()
814 out_param = (u64) dev->caps.function | master_addr; mlx4_ACCESS_MEM()
816 in_param = (u64) dev->caps.function | master_addr; mlx4_ACCESS_MEM()
858 for (i = 0; i < dev->caps.pkey_table_len[port]; i += 32) { get_full_pkey_table()
910 if (port < 1 || port > dev->caps.num_ports) mlx4_MAD_IFC_wrapper()
912 table = kcalloc((dev->caps.pkey_table_len[port] / 32) + 1, mlx4_MAD_IFC_wrapper()
931 /*get the slave specific caps:*/ mlx4_MAD_IFC_wrapper()
1837 dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_UPDATE_QP)) { mlx4_master_immediate_activate_vlan_qos()
1976 priv->dev.caps.num_ports) + 1; mlx4_master_activate_admin_state()
1978 bitmap_weight(actv_ports.ports, priv->dev.caps.num_ports); mlx4_master_activate_admin_state()
2028 priv->dev.caps.num_ports) + 1; mlx4_master_deactivate_admin_state()
2030 bitmap_weight(actv_ports.ports, priv->dev.caps.num_ports); mlx4_master_deactivate_admin_state()
2376 if (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_QOS_VPP) { mlx4_multi_func_init()
2377 for (port = 1; port <= dev->caps.num_ports; port++) { mlx4_multi_func_init()
2702 bitmap_fill(actv_ports.ports, dev->caps.num_ports); mlx4_get_active_ports()
2712 dev->caps.num_ports)); mlx4_get_active_ports()
2722 unsigned m = bitmap_weight(actv_ports.ports, dev->caps.num_ports); mlx4_slave_convert_port()
2727 n = find_first_bit(actv_ports.ports, dev->caps.num_ports); mlx4_slave_convert_port()
2740 find_first_bit(actv_ports.ports, dev->caps.num_ports); mlx4_phys_to_slave_port()
2754 if (port <= 0 || port > dev->caps.num_ports) mlx4_phys_to_slaves_pport()
2781 dev->caps.num_ports)) mlx4_phys_to_slaves_pport_actv()
2792 int min_port = find_first_bit(actv_ports.ports, dev->caps.num_ports) mlx4_slaves_closest_port()
2795 bitmap_weight(actv_ports.ports, dev->caps.num_ports); mlx4_slaves_closest_port()
2858 !(dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_QOS_VPP)) mlx4_is_vf_vst_and_prio_qos()
2932 !(dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_VLAN_CONTROL)) mlx4_set_vf_vlan()
2978 !(dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_QOS_VPP)) mlx4_set_vf_rate()
3025 dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_UPDATE_QP) mlx4_set_vf_rate()
3064 !(dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_FSM)) mlx4_set_vf_spoofchk()
H A Den_dcb_nl.c306 if (!(priv->mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_QCN)) mlx4_en_dcbnl_ieee_getqcn()
371 if (!(priv->mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_QCN)) mlx4_en_dcbnl_ieee_setqcn()
432 if (!(priv->mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_QCN)) mlx4_en_dcbnl_ieee_getqcnstats()
H A Den_clock.c268 mdev->cycles.shift = freq_to_shift(dev->caps.hca_core_clock); mlx4_en_init_timestamp()
270 clocksource_khz2mult(1000 * dev->caps.hca_core_clock, mdev->cycles.shift); mlx4_en_init_timestamp()
/linux-4.1.27/drivers/net/wireless/ath/ath5k/
H A Dcaps.c35 struct ath5k_capabilities *caps = &ah->ah_capabilities; ath5k_hw_set_capabilities() local
39 ee_header = caps->cap_eeprom.ee_header; ath5k_hw_set_capabilities()
46 caps->cap_range.range_5ghz_min = 5120; ath5k_hw_set_capabilities()
47 caps->cap_range.range_5ghz_max = 5430; ath5k_hw_set_capabilities()
48 caps->cap_range.range_2ghz_min = 0; ath5k_hw_set_capabilities()
49 caps->cap_range.range_2ghz_max = 0; ath5k_hw_set_capabilities()
52 __set_bit(AR5K_MODE_11A, caps->cap_mode); ath5k_hw_set_capabilities()
69 if (ath_is_49ghz_allowed(caps->cap_eeprom.ee_regdomain)) ath5k_hw_set_capabilities()
70 caps->cap_range.range_5ghz_min = 4920; ath5k_hw_set_capabilities()
72 caps->cap_range.range_5ghz_min = 5005; ath5k_hw_set_capabilities()
73 caps->cap_range.range_5ghz_max = 6100; ath5k_hw_set_capabilities()
76 __set_bit(AR5K_MODE_11A, caps->cap_mode); ath5k_hw_set_capabilities()
85 caps->cap_range.range_2ghz_min = 2412; ath5k_hw_set_capabilities()
86 caps->cap_range.range_2ghz_max = 2732; ath5k_hw_set_capabilities()
91 if (!caps->cap_needs_2GHz_ovr) { ath5k_hw_set_capabilities()
94 caps->cap_mode); ath5k_hw_set_capabilities()
99 caps->cap_mode); ath5k_hw_set_capabilities()
105 __clear_bit(AR5K_MODE_11A, caps->cap_mode); ath5k_hw_set_capabilities()
109 caps->cap_queues.q_tx_num = AR5K_NUM_TX_QUEUES_NOQCU; ath5k_hw_set_capabilities()
111 caps->cap_queues.q_tx_num = AR5K_NUM_TX_QUEUES; ath5k_hw_set_capabilities()
115 caps->cap_has_phyerr_counters = true; ath5k_hw_set_capabilities()
117 caps->cap_has_phyerr_counters = false; ath5k_hw_set_capabilities()
121 caps->cap_has_mrr_support = true; ath5k_hw_set_capabilities()
123 caps->cap_has_mrr_support = false; ath5k_hw_set_capabilities()
/linux-4.1.27/tools/power/cpupower/utils/helpers/
H A Dmisc.c17 if (cpupower_cpu_info.caps & CPUPOWER_CAP_AMD_CBP) { cpufreq_has_boost_support()
23 } else if (cpupower_cpu_info.caps & CPUPOWER_CAP_INTEL_IDA) cpufreq_has_boost_support()
H A Dcpuid.c59 cpu_info->caps = 0; get_cpu_info()
120 cpu_info->caps |= CPUPOWER_CAP_INV_TSC; get_cpu_info()
124 cpu_info->caps |= CPUPOWER_CAP_APERF; get_cpu_info()
130 cpu_info->caps |= CPUPOWER_CAP_AMD_CBP; get_cpu_info()
136 cpu_info->caps |= CPUPOWER_CAP_INTEL_IDA; get_cpu_info()
142 cpu_info->caps |= CPUPOWER_CAP_PERF_BIAS; get_cpu_info()
158 cpu_info->caps |= CPUPOWER_CAP_HAS_TURBO_RATIO; get_cpu_info()
163 cpu_info->caps |= CPUPOWER_CAP_HAS_TURBO_RATIO; get_cpu_info()
164 cpu_info->caps |= CPUPOWER_CAP_IS_SNB; get_cpu_info()
175 cpuid_level, ext_cpuid_level, cpu_info->caps); get_cpu_info()
H A Dmsr.c80 if (!(cpupower_cpu_info.caps & CPUPOWER_CAP_PERF_BIAS)) msr_intel_get_perf_bias()
93 if (!(cpupower_cpu_info.caps & CPUPOWER_CAP_PERF_BIAS)) msr_intel_set_perf_bias()
107 if (!(cpupower_cpu_info.caps & CPUPOWER_CAP_HAS_TURBO_RATIO)) msr_intel_get_turbo_ratio()
/linux-4.1.27/security/apparmor/include/
H A Dcapability.h26 * @audit: caps that are to be audited
27 * @quiet: caps that should not be audited
28 * @kill: caps that when requested will result in the task being killed
29 * @extended: caps that are subject finer grained mediation
43 static inline void aa_free_cap_rules(struct aa_caps *caps) aa_free_cap_rules() argument
/linux-4.1.27/fs/ceph/
H A DMakefile8 export.o caps.o snap.o xattr.o \
H A Dmds_client.h132 unsigned long s_cap_ttl; /* when session caps expire */
136 struct list_head s_caps; /* all caps issued by this session */
146 struct list_head s_cap_flushing; /* inodes w/ flushing caps */
216 /* what caps shall we drop? */
284 * references (implying they contain no inodes with caps) that
295 unsigned long last_renew_caps; /* last time we renewed our caps */
296 struct list_head cap_delay_list; /* caps with delayed release */
302 struct list_head cap_dirty; /* inodes with dirty caps */
304 int num_cap_flushing; /* # caps we are flushing */
322 int caps_total_count; /* total caps allocated */
H A Dcaps.c71 const char *ceph_cap_string(int caps) ceph_cap_string() argument
85 if (caps & CEPH_CAP_PIN) ceph_cap_string()
88 c = (caps >> CEPH_CAP_SAUTH) & 3; ceph_cap_string()
94 c = (caps >> CEPH_CAP_SLINK) & 3; ceph_cap_string()
100 c = (caps >> CEPH_CAP_SXATTR) & 3; ceph_cap_string()
106 c = caps >> CEPH_CAP_SFILE; ceph_cap_string()
160 dout("reserve caps ctx=%p need=%d\n", ctx, need); ceph_reserve_caps()
162 /* first reserve any caps that are already allocated */ ceph_reserve_caps()
184 pr_warn("reserve caps ctx=%p ENOMEM need=%d got=%d\n", ceph_reserve_caps()
198 dout("reserve caps ctx=%p %d = %d used + %d resv + %d avail\n", ceph_reserve_caps()
206 dout("unreserve caps ctx=%p count=%d\n", ctx, ctx->count); ceph_unreserve_caps()
213 dout("unreserve caps %d = %d used + %d resv + %d avail\n", ceph_unreserve_caps()
270 * Keep some preallocated caps around (ceph_min_count), to ceph_put_cap()
346 /* prefer mds with WR|BUFFER|EXCL caps */ __ceph_get_cap_mds()
395 * of unused caps back to the MDS. Should be called on cap use.
561 * don't remove caps. ceph_add_cap()
595 * If we are issued caps we don't want, or the mds' wanted ceph_add_cap()
663 * Return set of valid cap bits issued to us. Note that caps time
686 * exclude caps issued by non-auth MDS, but are been revoking __ceph_caps_issued()
688 * these caps, but the message is delayed. __ceph_caps_issued()
698 * Get cap bits issued by caps other than @ocap
718 * Move a cap to the end of the LRU (oldest caps at list head, newest
731 dout("__touch_cap %p cap %p mds%d NOP, iterating over caps\n", __touch_cap()
740 * callers to check for caps they want.)
770 /* does a combination of caps satisfy mask? */ __ceph_caps_issued_mask()
780 /* touch this + preceding caps */ __ceph_caps_issued_mask()
799 * Return true if mask caps are currently being revoked by an MDS.
859 * Return caps we have registered with the MDS(s) as 'wanted'.
961 /* when reconnect denied, we remove session caps forcibly, __ceph_remove_cap()
979 int caps, int wanted, int dirty, send_cap_msg()
994 dout("send_cap_msg %s %llx %llx caps %s wanted %s dirty %s" send_cap_msg()
997 cid, ino, ceph_cap_string(caps), ceph_cap_string(wanted), send_cap_msg()
1019 fc->caps = cpu_to_le32(caps); send_cap_msg()
1112 * Send a cap msg on the given inode. Update our caps state, then
1115 * Make note of max_size reported/requested from mds, revoked caps
1395 * Mark caps dirty. If inode is newly dirty, return the dirty flags.
1443 * can wait for caps to flush without starving.
1511 * versus held caps. Release, flush, ack revoked caps to mds as
1517 * CHECK_CAPS_FLUSH - we should flush any dirty caps immediately, without
1538 /* if we are unmounting, flush any unused caps immediately. */ ceph_check_caps()
1600 * If we no longer need to hold onto old our caps, and we may ceph_check_caps()
1621 caps again later. */ ceph_check_caps()
1672 dout("flushing dirty caps\n"); ceph_check_caps()
1676 /* completed revocation? going down and there are no caps? */ ceph_check_caps()
1683 /* want more caps from mds? */ ceph_check_caps()
1760 * Reschedule delayed caps release if we delayed anything, ceph_check_caps()
1782 * Try to flush dirty caps back to the auth mds.
1835 * Return true if we've flushed caps through the given flush_tid.
1915 dout("fsync dirty caps are %s\n", ceph_cap_string(dirty)); ceph_fsync()
1934 * Flush any dirty caps back to the mds. If we aren't asked to wait,
1966 * After a recovering MDS goes active, we need to resend any caps
2157 * on transition from wanted -> needed caps. This is needed try_get_cap_refs()
2227 * Wait for caps, and take cap references. If we can't get a WR cap
2265 * caps refs can cause deadlock. ceph_get_caps()
2284 * on the caps in question or we don't know this is safe.
2286 void ceph_get_cap_refs(struct ceph_inode_info *ci, int caps) ceph_get_cap_refs() argument
2289 __take_cap_refs(ci, caps); ceph_get_cap_refs()
2489 int newcaps = le32_to_cpu(grant->caps);
2515 * that was sent before the cap import message. So don't remove caps.
2653 check_caps = 2; /* check all caps */
2657 dout("caps unchanged: %s -> %s\n",
2662 /* non-auth MDS is revoking the newly grant caps ? */
2928 /* already have caps from the target */ handle_cap_export()
3010 unsigned caps = le32_to_cpu(im->caps); variable
3050 ceph_add_cap(inode, session, cap_id, -1, caps, wanted, seq, mseq,
3079 * Handle a caps message from the MDS.
3302 * Flush all dirty caps to the mds
3353 * record for the directory inode, even when there aren't any caps to
3373 /* only drop unused, clean caps */ ceph_encode_inode_release()
3407 rel->caps = cpu_to_le32(cap->implemented); ceph_encode_inode_release()
3432 * force an record for the directory caps if we have a dentry lease. ceph_encode_dentry_release()
977 send_cap_msg(struct ceph_mds_session *session, u64 ino, u64 cid, int op, int caps, int wanted, int dirty, u32 seq, u64 flush_tid, u32 issue_seq, u32 mseq, u64 size, u64 max_size, struct timespec *mtime, struct timespec *atime, u64 time_warp_seq, kuid_t uid, kgid_t gid, umode_t mode, u64 xattr_version, struct ceph_buffer *xattrs_buf, u64 follows, bool inline_data) send_cap_msg() argument
H A Dinode.c494 * caps in i_snap_caps. ceph_destroy_inode()
559 /* the MDS should have revoked these caps */ ceph_fill_file_size()
565 * If we hold relevant caps, or in the case where we're ceph_fill_file_size()
567 * don't hold those caps, then we need to check whether ceph_fill_file_size()
643 /* we have no write|excl caps; whatever the MDS says is true */ ceph_fill_file_time()
687 if (info->cap.caps && ceph_snap(inode) == CEPH_NOSNAP) fill_inode()
722 new_issued = ~issued & le32_to_cpu(info->cap.caps); fill_inode()
842 if (info->cap.caps) { fill_inode()
844 unsigned caps = le32_to_cpu(info->cap.caps); fill_inode() local
847 cap_fmode, caps, fill_inode()
857 (caps & CEPH_CAP_FILE_SHARED) && fill_inode()
869 ceph_cap_string(le32_to_cpu(info->cap.caps))); fill_inode()
870 ci->i_snap_caps |= le32_to_cpu(info->cap.caps); fill_inode()
875 pr_warn("mds issued no caps on %llx.%llx\n", fill_inode()
886 (le32_to_cpu(info->cap.caps) & cache_caps))) fill_inode()
1194 (le32_to_cpu(rinfo->diri.in->cap.caps) & ceph_fill_trace()
1377 /* FIXME: release caps/leases if error occurs */ ceph_readdir_prepopulate()
H A Dsuper.h81 int min_caps; /* min caps i added */
137 #define CHECK_CAPS_FLUSH 4 /* flush any dirty caps */
298 dirty|flushing caps */
313 /* held references to caps */
325 struct ceph_snap_realm *i_snap_realm; /* snap realm (if caps) */
326 int i_snap_realm_counter; /* snap realm (if caps) */
444 #define CEPH_I_NOFLUSH 16 /* do not flush dirty caps */
520 * caps helpers
825 /* caps.c */
852 extern void ceph_get_cap_refs(struct ceph_inode_info *ci, int caps);
H A Dfile.c127 * the open request locally (no need to request new caps from the
129 * if our wanted caps set expands.
170 * No need to block if we have caps on the auth MDS (for ceph_open()
330 /* wake up anyone waiting for caps on this inode */ ceph_release()
819 dout("aio_read %p %llx.%llx %llu~%u trying to get caps on %p\n", ceph_read_iter()
927 * Take cap references to avoid releasing caps to MDS mid-write.
982 dout("aio_write %p %llx.%llx %llu~%zd getting caps. i_size %llu\n", ceph_write_iter()
1021 * the MDS revokes Fwb caps before sending truncate ceph_write_iter()
/linux-4.1.27/net/ceph/
H A Dceph_fs.c63 int caps = CEPH_CAP_PIN; ceph_caps_for_mode() local
66 caps |= CEPH_CAP_FILE_SHARED | ceph_caps_for_mode()
69 caps |= CEPH_CAP_FILE_EXCL | ceph_caps_for_mode()
74 caps |= CEPH_CAP_FILE_LAZYIO; ceph_caps_for_mode()
76 return caps; ceph_caps_for_mode()
/linux-4.1.27/sound/pci/hda/
H A Dhda_proc.c125 unsigned int caps; print_amp_caps() local
126 caps = param_read(codec, nid, dir == HDA_OUTPUT ? print_amp_caps()
128 if (caps == -1 || caps == 0) { print_amp_caps()
134 caps & AC_AMPCAP_OFFSET, print_amp_caps()
135 (caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT, print_amp_caps()
136 (caps & AC_AMPCAP_STEP_SIZE) >> AC_AMPCAP_STEP_SIZE_SHIFT, print_amp_caps()
137 (caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT); print_amp_caps()
277 unsigned int caps, val; print_pin_caps() local
279 caps = param_read(codec, nid, AC_PAR_PIN_CAP); print_pin_caps()
280 snd_iprintf(buffer, " Pincap 0x%08x:", caps); print_pin_caps()
281 if (caps & AC_PINCAP_IN) print_pin_caps()
283 if (caps & AC_PINCAP_OUT) print_pin_caps()
285 if (caps & AC_PINCAP_HP_DRV) print_pin_caps()
287 if (caps & AC_PINCAP_EAPD) print_pin_caps()
289 if (caps & AC_PINCAP_PRES_DETECT) print_pin_caps()
291 if (caps & AC_PINCAP_BALANCE) print_pin_caps()
293 if (caps & AC_PINCAP_HDMI) { print_pin_caps()
298 if (caps & AC_PINCAP_HBR) print_pin_caps()
303 if (caps & AC_PINCAP_DP) print_pin_caps()
305 if (caps & AC_PINCAP_TRIG_REQ) print_pin_caps()
307 if (caps & AC_PINCAP_IMP_SENSE) print_pin_caps()
310 if (caps & AC_PINCAP_VREF) { print_pin_caps()
312 (caps & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT; print_pin_caps()
313 snd_iprintf(buffer, " Vref caps:"); print_pin_caps()
328 if (caps & AC_PINCAP_EAPD) { print_pin_caps()
340 caps = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_CONFIG_DEFAULT, 0); print_pin_caps()
341 snd_iprintf(buffer, " Pin Default 0x%08x: [%s] %s at %s %s\n", caps, print_pin_caps()
342 jack_conns[(caps & AC_DEFCFG_PORT_CONN) >> AC_DEFCFG_PORT_CONN_SHIFT], print_pin_caps()
343 snd_hda_get_jack_type(caps), print_pin_caps()
344 snd_hda_get_jack_connectivity(caps), print_pin_caps()
345 snd_hda_get_jack_location(caps)); print_pin_caps()
347 get_jack_connection(caps), print_pin_caps()
348 get_jack_color(caps)); print_pin_caps()
354 (caps & AC_DEFCFG_DEF_ASSOC) >> AC_DEFCFG_ASSOC_SHIFT, print_pin_caps()
355 caps & AC_DEFCFG_SEQUENCE); print_pin_caps()
356 if (((caps & AC_DEFCFG_MISC) >> AC_DEFCFG_MISC_SHIFT) & print_pin_caps()
538 snd_iprintf(buffer, " Processing caps: benign=%d, ncoeff=%d\n", print_proc_caps()
711 snd_iprintf(buffer, "Default Amp-In caps: "); print_codec_info()
713 snd_iprintf(buffer, "Default Amp-Out caps: "); print_codec_info()
784 snd_iprintf(buffer, " Amp-In caps: "); print_codec_info()
797 snd_iprintf(buffer, " Amp-Out caps: "); print_codec_info()
H A Dpatch_cirrus.c756 unsigned int caps; cs4208_fix_amp_caps() local
758 caps = query_amp_caps(codec, adc, HDA_INPUT); cs4208_fix_amp_caps()
759 caps &= ~(AC_AMPCAP_OFFSET); cs4208_fix_amp_caps()
760 caps |= 0x02; cs4208_fix_amp_caps()
761 snd_hda_override_amp_caps(codec, adc, HDA_INPUT, caps); cs4208_fix_amp_caps()
1106 unsigned int caps; fix_volume_caps() local
1109 caps = query_amp_caps(codec, dac, HDA_OUTPUT); fix_volume_caps()
1110 caps &= ~(0x7f << AC_AMPCAP_NUM_STEPS_SHIFT); fix_volume_caps()
1111 caps |= ((caps >> AC_AMPCAP_OFFSET_SHIFT) & 0x7f) fix_volume_caps()
1113 snd_hda_override_amp_caps(codec, dac, HDA_OUTPUT, caps); fix_volume_caps()
/linux-4.1.27/include/scsi/
H A Dosd_sec.h28 void osd_sec_encode_caps(void *caps, ...);/* NI */
29 void osd_sec_init_nosec_doall_caps(void *caps,
42 /* Version independent copy of caps into the cdb */
43 void osd_set_caps(struct osd_cdb *cdb, const void *caps);
/linux-4.1.27/include/linux/ceph/
H A Dtypes.h23 /* context for the caps reservation mechanism */
H A Dceph_fs.h417 __le32 caps, wanted; /* new issued, wanted */ member in struct:ceph_mds_request_release
446 __le32 caps, wanted; /* caps issued, wanted */ member in struct:ceph_mds_reply_cap
463 struct ceph_mds_reply_cap cap; /* caps issued for this inode */
633 * caps message, used for capability callbacks, acks, requests, etc.
640 __le32 caps, wanted, dirty; /* latest issued/wanted/dirty */ member in struct:ceph_mds_caps
/linux-4.1.27/security/apparmor/
H A Dcapability.c37 kernel_cap_t caps; member in struct:audit_cache
80 !cap_raised(profile->caps.audit, cap))) audit_caps()
84 cap_raised(profile->caps.kill, cap)) { audit_caps()
86 } else if (cap_raised(profile->caps.quiet, cap) && audit_caps()
95 if (profile == ent->profile && cap_raised(ent->caps, cap)) { audit_caps()
103 cap_raise(ent->caps, cap); audit_caps()
119 return cap_raised(profile->caps.allow, cap) ? 0 : -EPERM; profile_capable()
H A DMakefile18 quiet_cmd_make-caps = GEN $@
19 cmd_make-caps = echo "static const char *const capability_names[] = {" > $@ ;\
67 $(call cmd,make-caps)
H A Dpolicy_unpack.c543 if (!unpack_u32(e, &(profile->caps.allow.cap[0]), NULL)) unpack_profile()
545 if (!unpack_u32(e, &(profile->caps.audit.cap[0]), NULL)) unpack_profile()
547 if (!unpack_u32(e, &(profile->caps.quiet.cap[0]), NULL)) unpack_profile()
553 /* optional upper half of 64 bit caps */ unpack_profile()
554 if (!unpack_u32(e, &(profile->caps.allow.cap[1]), NULL)) unpack_profile()
556 if (!unpack_u32(e, &(profile->caps.audit.cap[1]), NULL)) unpack_profile()
558 if (!unpack_u32(e, &(profile->caps.quiet.cap[1]), NULL)) unpack_profile()
567 /* optional extended caps mediation mask */ unpack_profile()
568 if (!unpack_u32(e, &(profile->caps.extended.cap[0]), NULL)) unpack_profile()
570 if (!unpack_u32(e, &(profile->caps.extended.cap[1]), NULL)) unpack_profile()
/linux-4.1.27/drivers/net/ethernet/mellanox/mlx5/core/
H A Dfw.c67 int mlx5_cmd_query_hca_cap(struct mlx5_core_dev *dev, struct mlx5_caps *caps) mlx5_cmd_query_hca_cap() argument
69 return mlx5_core_get_caps(dev, caps, HCA_CAP_OPMOD_GET_CUR); mlx5_cmd_query_hca_cap()
72 int mlx5_query_odp_caps(struct mlx5_core_dev *dev, struct mlx5_odp_caps *caps) mlx5_query_odp_caps() argument
79 if (!(dev->caps.gen.flags & MLX5_DEV_CAP_FLAG_ON_DMND_PG)) mlx5_query_odp_caps()
94 mlx5_core_warn(dev, "query cur hca ODP caps failed, %d\n", err); mlx5_query_odp_caps()
98 memcpy(caps, MLX5_ADDR_OF(query_hca_cap_out, out, capability_struct), mlx5_query_odp_caps()
99 sizeof(*caps)); mlx5_query_odp_caps()
102 be32_to_cpu(caps->per_transport_caps.rc_odp_caps), mlx5_query_odp_caps()
103 be32_to_cpu(caps->per_transport_caps.uc_odp_caps), mlx5_query_odp_caps()
104 be32_to_cpu(caps->per_transport_caps.ud_odp_caps)); mlx5_query_odp_caps()
H A Dport.c89 int mlx5_set_port_caps(struct mlx5_core_dev *dev, u8 port_num, u32 caps) mlx5_set_port_caps() argument
96 in.caps_127_96 = cpu_to_be32(caps); mlx5_set_port_caps()
H A Duar.c178 bf->buf_size = dev->caps.gen.bf_reg_size / 2; mlx5_alloc_uuars()
182 bf->offset = (i % MLX5_BF_REGS_PER_PAGE) * dev->caps.gen.bf_reg_size + mlx5_alloc_uuars()
H A Dmlx5_core.h70 struct mlx5_caps *caps);
/linux-4.1.27/drivers/video/fbdev/
H A Damba-clcd-versatile.c27 .caps = CLCD_CAP_5551 | CLCD_CAP_565 | CLCD_CAP_888,
51 .caps = CLCD_CAP_5551 | CLCD_CAP_565 | CLCD_CAP_888,
76 .caps = CLCD_CAP_5551,
100 .caps = CLCD_CAP_5551,
125 .caps = CLCD_CAP_5551,
H A Damba-clcd.c131 u32 caps; clcdfb_set_bitfields() local
134 if (fb->panel->caps && fb->board->caps) clcdfb_set_bitfields()
135 caps = fb->panel->caps & fb->board->caps; clcdfb_set_bitfields()
138 caps = fb->panel->cntl & CNTL_BGR ? clcdfb_set_bitfields()
141 caps &= ~CLCD_CAP_444; clcdfb_set_bitfields()
146 caps &= ~CLCD_CAP_888; clcdfb_set_bitfields()
160 caps &= CLCD_CAP_5551; clcdfb_set_bitfields()
161 if (!caps) { clcdfb_set_bitfields()
176 if (!(caps & (CLCD_CAP_444 | CLCD_CAP_5551 | CLCD_CAP_565))) { clcdfb_set_bitfields()
185 if (var->green.length == 4 && caps & CLCD_CAP_444) clcdfb_set_bitfields()
186 caps &= CLCD_CAP_444; clcdfb_set_bitfields()
187 if (var->green.length == 5 && caps & CLCD_CAP_5551) clcdfb_set_bitfields()
188 caps &= CLCD_CAP_5551; clcdfb_set_bitfields()
189 else if (var->green.length == 6 && caps & CLCD_CAP_565) clcdfb_set_bitfields()
190 caps &= CLCD_CAP_565; clcdfb_set_bitfields()
196 if (caps & CLCD_CAP_565) { clcdfb_set_bitfields()
198 caps &= CLCD_CAP_565; clcdfb_set_bitfields()
199 } else if (caps & CLCD_CAP_5551) { clcdfb_set_bitfields()
201 caps &= CLCD_CAP_5551; clcdfb_set_bitfields()
204 caps &= CLCD_CAP_444; clcdfb_set_bitfields()
218 caps &= CLCD_CAP_888; clcdfb_set_bitfields()
219 if (!caps) { clcdfb_set_bitfields()
241 bgr = caps & CLCD_CAP_BGR && var->blue.offset == 0; clcdfb_set_bitfields()
242 rgb = caps & CLCD_CAP_RGB && var->red.offset == 0; clcdfb_set_bitfields()
250 bgr = caps & CLCD_CAP_BGR; clcdfb_set_bitfields()
616 u32 caps; clcdfb_of_init_tft_panel() member in struct:__anon10479
635 fb->panel->caps = 0; clcdfb_of_init_tft_panel()
638 for (i = 0; i < ARRAY_SIZE(panels) && !fb->panel->caps; i++) { clcdfb_of_init_tft_panel()
644 fb->panel->caps = panels[i].caps; clcdfb_of_init_tft_panel()
647 return fb->panel->caps ? 0 : -EINVAL; clcdfb_of_init_tft_panel()
797 board->caps = CLCD_CAP_ALL; clcdfb_of_get_board()
/linux-4.1.27/drivers/memory/
H A Datmel-sdramc.c56 const struct at91_ramc_caps *caps; atmel_ramc_probe() local
60 caps = match->data; atmel_ramc_probe()
62 if (caps->has_ddrck) { atmel_ramc_probe()
69 if (caps->has_mpddr_clk) { atmel_ramc_probe()
/linux-4.1.27/include/linux/platform_data/
H A Dmmc-davinci.h24 u32 caps; member in struct:davinci_mmc_config
H A Dhsmmc-omap.h55 u32 caps; /* Used for the MMC driver on 2430 and later */ member in struct:omap_hsmmc_platform_data
H A Dmmc-omap.h50 u32 caps; /* Used for the MMC driver on 2430 and later */ member in struct:omap_mmc_platform_data::omap_mmc_slot_data
/linux-4.1.27/drivers/ptp/
H A Dptp_chardev.c120 struct ptp_clock_caps caps; ptp_ioctl() local
134 memset(&caps, 0, sizeof(caps)); ptp_ioctl()
135 caps.max_adj = ptp->info->max_adj; ptp_ioctl()
136 caps.n_alarm = ptp->info->n_alarm; ptp_ioctl()
137 caps.n_ext_ts = ptp->info->n_ext_ts; ptp_ioctl()
138 caps.n_per_out = ptp->info->n_per_out; ptp_ioctl()
139 caps.pps = ptp->info->pps; ptp_ioctl()
140 caps.n_pins = ptp->info->n_pins; ptp_ioctl()
141 if (copy_to_user((void __user *)arg, &caps, sizeof(caps))) ptp_ioctl()
H A Dptp_ixp46x.c43 struct ptp_clock_info caps; member in struct:ixp_clock
141 struct ixp_clock *ixp_clock = container_of(ptp, struct ixp_clock, caps); ptp_ixp_adjfreq()
164 struct ixp_clock *ixp_clock = container_of(ptp, struct ixp_clock, caps); ptp_ixp_adjtime()
183 struct ixp_clock *ixp_clock = container_of(ptp, struct ixp_clock, caps); ptp_ixp_gettime()
202 struct ixp_clock *ixp_clock = container_of(ptp, struct ixp_clock, caps); ptp_ixp_settime()
220 struct ixp_clock *ixp_clock = container_of(ptp, struct ixp_clock, caps); ptp_ixp_enable()
307 ixp_clock.caps = ptp_ixp_caps; ptp_ixp_init()
309 ixp_clock.ptp_clock = ptp_clock_register(&ixp_clock.caps, NULL); ptp_ixp_init()
H A Dptp_pch.c123 struct ptp_clock_info caps; member in struct:pch_dev
417 struct pch_dev *pch_dev = container_of(ptp, struct pch_dev, caps); ptp_pch_adjfreq()
440 struct pch_dev *pch_dev = container_of(ptp, struct pch_dev, caps); ptp_pch_adjtime()
457 struct pch_dev *pch_dev = container_of(ptp, struct pch_dev, caps); ptp_pch_gettime()
474 struct pch_dev *pch_dev = container_of(ptp, struct pch_dev, caps); ptp_pch_settime()
490 struct pch_dev *pch_dev = container_of(ptp, struct pch_dev, caps); ptp_pch_enable()
630 chip->caps = ptp_pch_caps; pch_probe()
631 chip->ptp_clock = ptp_clock_register(&chip->caps, &pdev->dev); pch_probe()
/linux-4.1.27/arch/sh/drivers/dma/
H A Ddma-api.c121 * @caps: List of capabilities
131 int request_dma_bycap(const char **dmac, const char **caps, const char *dev_id) request_dma_bycap() argument
138 BUG_ON(!dmac || !caps); request_dma_bycap()
152 if (unlikely(!channel->caps)) request_dma_bycap()
155 for (p = caps; *p; p++) { request_dma_bycap()
156 if (!search_cap(channel->caps, *p)) request_dma_bycap()
246 int register_chan_caps(const char *dmac, struct dma_chan_caps *caps) register_chan_caps() argument
261 for (i = 0; i < info->nr_channels; i++, caps++) { register_chan_caps()
264 if ((info->first_channel_nr + i) != caps->ch_num) register_chan_caps()
268 channel->caps = caps->caplist; register_chan_caps()
/linux-4.1.27/arch/arm/mach-omap2/
H A Dhsmmc.c173 if (mmc_controller->caps & omap_hsmmc_mux()
182 if (mmc_controller->caps & omap_hsmmc_mux()
207 if (mmc_controller->caps & omap_hsmmc_mux()
216 if (mmc_controller->caps & omap_hsmmc_mux()
253 mmc->caps = c->caps; omap_hsmmc_pdata_init()
309 (c->caps & MMC_CAP_8_BIT_DATA)) { omap_hsmmc_pdata_init()
310 c->caps &= ~MMC_CAP_8_BIT_DATA; omap_hsmmc_pdata_init()
311 c->caps |= MMC_CAP_4_BIT_DATA; omap_hsmmc_pdata_init()
312 mmc->caps = c->caps; omap_hsmmc_pdata_init()
321 if (c->transceiver && (c->caps & MMC_CAP_8_BIT_DATA)) { omap_hsmmc_pdata_init()
322 c->caps &= ~MMC_CAP_8_BIT_DATA; omap_hsmmc_pdata_init()
323 c->caps |= MMC_CAP_4_BIT_DATA; omap_hsmmc_pdata_init()
H A Dhsmmc.h13 u32 caps; /* 4/8 wires and any additional host member in struct:omap2_hsmmc_info
H A Dboard-omap3pandora.c270 .caps = MMC_CAP_4_BIT_DATA,
278 .caps = MMC_CAP_4_BIT_DATA,
287 .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_POWER_OFF_CARD,
/linux-4.1.27/fs/nfs/
H A Dnfs3client.c34 server->caps |= NFS_CAP_ACLS; nfs_init_server_aclclient()
38 server->caps &= ~NFS_CAP_ACLS; nfs_init_server_aclclient()
44 server->caps &= ~NFS_CAP_ACLS; nfs_init_server_aclclient()
H A Dnfs42proc.c103 NFS_SERVER(inode)->caps &= ~NFS_CAP_ALLOCATE; nfs42_proc_allocate()
127 NFS_SERVER(inode)->caps &= ~NFS_CAP_DEALLOCATE; nfs42_proc_deallocate()
162 server->caps &= ~NFS_CAP_SEEK; nfs42_proc_llseek()
H A Dnfs3acl.c72 server->caps &= ~NFS_CAP_ACLS; nfs3_get_acl()
191 server->caps &= ~NFS_CAP_ACLS; __nfs3_proc_setacls()
/linux-4.1.27/drivers/media/usb/dvb-usb/
H A Ddvb-usb-i2c.c14 if (!(d->props.caps & DVB_USB_IS_AN_I2C_ADAPTER)) dvb_usb_i2c_init()
H A Ddibusb-mb.c180 .caps = DVB_USB_IS_AN_I2C_ADAPTER,
191 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
271 .caps = DVB_USB_IS_AN_I2C_ADAPTER,
281 .caps = DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF | DVB_USB_ADAP_HAS_PID_FILTER,
339 .caps = DVB_USB_IS_AN_I2C_ADAPTER,
350 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
402 .caps = DVB_USB_IS_AN_I2C_ADAPTER,
413 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
H A Ddibusb-mc.c52 .caps = DVB_USB_IS_AN_I2C_ADAPTER,
62 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
H A Ddvb-usb-urb.c97 if (adap->props.fe[i].caps & DVB_USB_ADAP_RECEIVES_204_BYTE_TS) dvb_usb_adapter_stream_init()
101 if (adap->props.fe[i].caps & DVB_USB_ADAP_RECEIVES_RAW_PAYLOAD) dvb_usb_adapter_stream_init()
H A Ddtt200u.c145 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_NEED_PID_FILTERING,
195 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_NEED_PID_FILTERING,
245 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_NEED_PID_FILTERING,
295 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_NEED_PID_FILTERING,
H A Ddvb-usb-init.c44 if (d->udev->speed == USB_SPEED_FULL && !(props->caps & DVB_USB_ADAP_HAS_PID_FILTER)) { dvb_usb_adapter_init()
49 if ((d->udev->speed == USB_SPEED_FULL && props->caps & DVB_USB_ADAP_HAS_PID_FILTER) || dvb_usb_adapter_init()
50 (props->caps & DVB_USB_ADAP_NEED_PID_FILTERING)) { dvb_usb_adapter_init()
62 props->caps & DVB_USB_ADAP_HAS_PID_FILTER) { dvb_usb_adapter_init()
H A Dm920x.c100 flags |= d->adapter[i].props.fe[0].caps; m920x_init()
917 .caps = DVB_USB_IS_AN_I2C_ADAPTER,
938 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
972 .caps = DVB_USB_IS_AN_I2C_ADAPTER,
986 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
1028 .caps = DVB_USB_IS_AN_I2C_ADAPTER,
1049 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
1073 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
1107 .caps = DVB_USB_IS_AN_I2C_ADAPTER,
1149 .caps = DVB_USB_IS_AN_I2C_ADAPTER,
1169 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
1205 .caps = DVB_USB_IS_AN_I2C_ADAPTER,
1226 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
H A Da800.c122 .caps = DVB_USB_IS_AN_I2C_ADAPTER,
132 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
H A Dnova-t-usb2.c161 .caps = DVB_USB_IS_AN_I2C_ADAPTER,
171 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
H A Ddvb-usb-dvb.c48 if (adap->props.fe[adap->active_fe].caps & DVB_USB_ADAP_HAS_PID_FILTER && dvb_usb_ctrl_feed()
61 if (adap->props.fe[adap->active_fe].caps & DVB_USB_ADAP_HAS_PID_FILTER && dvb_usb_ctrl_feed()
62 adap->props.fe[adap->active_fe].caps & dvb_usb_ctrl_feed()
H A Ddib0700_devices.c3802 .caps = DVB_USB_IS_AN_I2C_ADAPTER, \
3833 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
3938 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
3952 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4007 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4054 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4136 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4182 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4195 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4241 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4254 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4309 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4322 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4360 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4496 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4548 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4594 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4609 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4647 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
4686 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
4725 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
4764 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
4803 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
4842 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
4858 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
4934 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
4974 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
H A Dcxusb.c1613 .caps = DVB_USB_IS_AN_I2C_ADAPTER,
1657 .caps = DVB_USB_IS_AN_I2C_ADAPTER,
1714 .caps = DVB_USB_IS_AN_I2C_ADAPTER,
1778 .caps = DVB_USB_IS_AN_I2C_ADAPTER,
1833 .caps = DVB_USB_IS_AN_I2C_ADAPTER,
1889 .caps = DVB_USB_IS_AN_I2C_ADAPTER,
1941 .caps = DVB_USB_IS_AN_I2C_ADAPTER,
1994 .caps = DVB_USB_IS_AN_I2C_ADAPTER,
2049 .caps = DVB_USB_IS_AN_I2C_ADAPTER,
2094 .caps = DVB_USB_IS_AN_I2C_ADAPTER,
2147 .caps = DVB_USB_IS_AN_I2C_ADAPTER,
2201 .caps = DVB_USB_IS_AN_I2C_ADAPTER,
2255 .caps = DVB_USB_IS_AN_I2C_ADAPTER,
H A Dfriio.c466 .caps = DVB_USB_IS_AN_I2C_ADAPTER,
473 /* caps:0 => no pid filter, 188B TS packet */
478 .caps = 0,
H A Dumt-010.c95 .caps = DVB_USB_IS_AN_I2C_ADAPTER,
H A Dvp7045-fe.c167 .caps = FE_CAN_INVERSION_AUTO |
/linux-4.1.27/drivers/clk/at91/
H A Dpmc.c141 const struct at91_pmc_caps *caps = pmc->caps; pmc_irq_domain_xlate() local
148 if (!(caps->available_irqs & (1 << *out_hwirq))) pmc_irq_domain_xlate()
220 const struct at91_pmc_caps *caps) at91_pmc_init()
224 if (!regbase || !virq || !caps) at91_pmc_init()
236 pmc->caps = caps; at91_pmc_init()
377 const struct at91_pmc_caps *caps) of_at91_pmc_setup()
393 pmc = at91_pmc_init(np, regbase, virq, caps); of_at91_pmc_setup()
218 at91_pmc_init(struct device_node *np, void __iomem *regbase, int virq, const struct at91_pmc_caps *caps) at91_pmc_init() argument
376 of_at91_pmc_setup(struct device_node *np, const struct at91_pmc_caps *caps) of_at91_pmc_setup() argument
H A Dpmc.h34 const struct at91_pmc_caps *caps; member in struct:at91_pmc
/linux-4.1.27/drivers/infiniband/hw/mlx4/
H A Dmain.c103 int dmfs = dev->caps.steering_mode == MLX4_STEERING_MODE_DEVICE_MANAGED; check_flow_steering_support()
112 (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DMFS_IPOIB)) && check_flow_steering_support()
114 (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_FS_EN)); check_flow_steering_support()
160 props->fw_ver = dev->dev->caps.fw_ver; mlx4_ib_query_device()
166 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BAD_PKEY_CNTR) mlx4_ib_query_device()
168 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BAD_QKEY_CNTR) mlx4_ib_query_device()
170 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_APM && have_ib_ports) mlx4_ib_query_device()
172 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_UD_AV_PORT) mlx4_ib_query_device()
174 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_IPOIB_CSUM) mlx4_ib_query_device()
176 if (dev->dev->caps.max_gso_sz && mlx4_ib_query_device()
178 (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BLH)) mlx4_ib_query_device()
180 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_RESERVED_LKEY) mlx4_ib_query_device()
182 if ((dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_LOCAL_INV) && mlx4_ib_query_device()
183 (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_REMOTE_INV) && mlx4_ib_query_device()
184 (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_FAST_REG_WR)) mlx4_ib_query_device()
186 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) mlx4_ib_query_device()
188 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW) mlx4_ib_query_device()
190 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN) { mlx4_ib_query_device()
191 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_WIN_TYPE_2B) mlx4_ib_query_device()
206 props->page_size_cap = dev->dev->caps.page_size_cap; mlx4_ib_query_device()
208 props->max_qp_wr = dev->dev->caps.max_wqes - MLX4_IB_SQ_MAX_SPARE; mlx4_ib_query_device()
209 props->max_sge = min(dev->dev->caps.max_sq_sg, mlx4_ib_query_device()
210 dev->dev->caps.max_rq_sg); mlx4_ib_query_device()
212 props->max_cqe = dev->dev->caps.max_cqes; mlx4_ib_query_device()
214 props->max_pd = dev->dev->caps.num_pds - dev->dev->caps.reserved_pds; mlx4_ib_query_device()
215 props->max_qp_rd_atom = dev->dev->caps.max_qp_dest_rdma; mlx4_ib_query_device()
216 props->max_qp_init_rd_atom = dev->dev->caps.max_qp_init_rdma; mlx4_ib_query_device()
219 props->max_srq_wr = dev->dev->caps.max_srq_wqes - 1; mlx4_ib_query_device()
220 props->max_srq_sge = dev->dev->caps.max_srq_sge; mlx4_ib_query_device()
222 props->local_ca_ack_delay = dev->dev->caps.local_ca_ack_delay; mlx4_ib_query_device()
223 props->atomic_cap = dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_ATOMIC ? mlx4_ib_query_device()
226 props->max_pkeys = dev->dev->caps.pkey_table_len[1]; mlx4_ib_query_device()
227 props->max_mcast_grp = dev->dev->caps.num_mgms + dev->dev->caps.num_amgms; mlx4_ib_query_device()
228 props->max_mcast_qp_attach = dev->dev->caps.num_qp_per_mgm; mlx4_ib_query_device()
231 props->max_map_per_fmr = dev->dev->caps.max_fmr_maps; mlx4_ib_query_device()
245 return dev->caps.port_mask[port_num] == MLX4_PORT_TYPE_IB ? mlx4_ib_port_link_layer()
286 props->gid_tbl_len = to_mdev(ibdev)->dev->caps.gid_table_len[port]; ib_link_query_port()
287 props->max_msg_sz = to_mdev(ibdev)->dev->caps.max_msg_sz; ib_link_query_port()
288 props->pkey_tbl_len = to_mdev(ibdev)->dev->caps.pkey_table_len[port]; ib_link_query_port()
370 props->gid_tbl_len = mdev->dev->caps.gid_table_len[port]; eth_link_query_port()
371 props->max_msg_sz = mdev->dev->caps.max_msg_sz; eth_link_query_port()
602 u8 is_eth = mdev->dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH; mlx4_ib_modify_port()
645 resp_v3.qp_tab_size = dev->dev->caps.num_qps; mlx4_ib_alloc_ucontext()
646 resp_v3.bf_reg_size = dev->dev->caps.bf_reg_size; mlx4_ib_alloc_ucontext()
647 resp_v3.bf_regs_per_page = dev->dev->caps.bf_regs_per_page; mlx4_ib_alloc_ucontext()
649 resp.dev_caps = dev->dev->caps.userspace_caps; mlx4_ib_alloc_ucontext()
650 resp.qp_tab_size = dev->dev->caps.num_qps; mlx4_ib_alloc_ucontext()
651 resp.bf_reg_size = dev->dev->caps.bf_reg_size; mlx4_ib_alloc_ucontext()
652 resp.bf_regs_per_page = dev->dev->caps.bf_regs_per_page; mlx4_ib_alloc_ucontext()
653 resp.cqe_size = dev->dev->caps.cqe_size; mlx4_ib_alloc_ucontext()
707 } else if (vma->vm_pgoff == 1 && dev->dev->caps.bf_reg_size != 0) { mlx4_ib_mmap()
712 dev->dev->caps.num_uars, mlx4_ib_mmap()
763 if (!(to_mdev(ibdev)->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC)) mlx4_ib_alloc_xrcd()
1125 if (dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN || mlx4_ib_tunnel_steer_add()
1126 dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_STATIC) mlx4_ib_tunnel_steer_add()
1276 if (mdev->dev->caps.steering_mode == mlx4_ib_mcg_attach()
1355 if (mdev->dev->caps.steering_mode == mlx4_ib_mcg_detach()
1458 return sprintf(buf, "%d.%d.%d\n", (int) (dev->dev->caps.fw_ver >> 32), show_fw_ver()
1459 (int) (dev->dev->caps.fw_ver >> 16) & 0xffff, show_fw_ver()
1460 (int) dev->dev->caps.fw_ver & 0xffff); show_fw_ver()
1594 max_gids = dev->dev->caps.gid_table_len[port]; update_gid_table()
1690 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port) mlx4_ib_addr_event()
1713 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port) mlx4_ib_get_dev_port()
1720 if ((port == 0) || (port > ibdev->dev->caps.num_ports)) mlx4_ib_get_dev_port()
1829 if ((port == 0) || (port > ibdev->dev->caps.num_ports)) mlx4_ib_get_dev_addr()
2018 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port) { init_pkeys()
2032 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port) { init_pkeys()
2051 if (dev->caps.comp_pool == 0 || mlx4_ib_alloc_eqs()
2052 dev->caps.num_ports > dev->caps.comp_pool) mlx4_ib_alloc_eqs()
2055 eq_per_port = dev->caps.comp_pool / dev->caps.num_ports; mlx4_ib_alloc_eqs()
2062 total_eqs = dev->caps.num_comp_vectors + added_eqs; mlx4_ib_alloc_eqs()
2081 (eq % dev->caps.num_comp_vectors); mlx4_foreach_port()
2088 for (i = 0, eq = added_eqs; i < dev->caps.num_comp_vectors; i++)
2104 ibdev->ib_dev.num_comp_vectors = dev->caps.num_comp_vectors; mlx4_ib_free_eqs()
2109 if (ibdev->eq_table[i] <= dev->caps.num_comp_vectors) mlx4_ib_free_eqs()
2164 ibdev->ib_dev.local_dma_lkey = dev->caps.reserved_lkey; mlx4_ib_add()
2168 ibdev->ib_dev.num_comp_vectors = dev->caps.num_comp_vectors; mlx4_ib_add()
2171 if (dev->caps.userspace_caps) mlx4_ib_add()
2252 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW || mlx4_ib_add()
2253 dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN) { mlx4_ib_add()
2263 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) { mlx4_ib_add()
2342 for (j = 1; j <= ibdev->dev->caps.num_ports; j++) mlx4_ib_add()
2343 atomic64_set(&iboe->mac[j - 1], ibdev->dev->caps.def_mac[j]); mlx4_ib_add()
2354 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_IBOE) { mlx4_ib_add()
2589 ports = bitmap_weight(actv_ports.ports, dev->caps.num_ports); do_slave_init()
2590 first_port = find_first_bit(actv_ports.ports, dev->caps.num_ports); do_slave_init()
2602 for (i = 0; i < dev->caps.num_ports; i++) { do_slave_init()
H A Dqp.c148 for (i = 0; i < dev->dev->caps.num_ports; i++) { is_sqp()
149 if (qp->mqp.qpn == dev->dev->caps.qp0_proxy[i] || is_sqp()
150 qp->mqp.qpn == dev->dev->caps.qp1_proxy[i]) { is_sqp()
173 for (i = 0; i < dev->dev->caps.num_ports; i++) { is_qp0()
174 if (qp->mqp.qpn == dev->dev->caps.qp0_proxy[i]) { is_qp0()
381 if (cap->max_recv_wr > dev->dev->caps.max_wqes - MLX4_IB_SQ_MAX_SPARE || set_rq_size()
382 cap->max_recv_sge > min(dev->dev->caps.max_sq_sg, dev->dev->caps.max_rq_sg)) set_rq_size()
406 min(dev->dev->caps.max_wqes - MLX4_IB_SQ_MAX_SPARE, qp->rq.wqe_cnt); set_rq_size()
408 min(dev->dev->caps.max_sq_sg, set_rq_size()
409 dev->dev->caps.max_rq_sg)); set_rq_size()
421 if (cap->max_send_wr > (dev->dev->caps.max_wqes - MLX4_IB_SQ_MAX_SPARE) || set_kernel_sq_size()
422 cap->max_send_sge > min(dev->dev->caps.max_sq_sg, dev->dev->caps.max_rq_sg) || set_kernel_sq_size()
424 sizeof (struct mlx4_wqe_inline_seg) > dev->dev->caps.max_sq_desc_sz) set_kernel_sq_size()
433 cap->max_send_sge + 2 > dev->dev->caps.max_sq_sg) set_kernel_sq_size()
440 if (s > dev->dev->caps.max_sq_desc_sz) set_kernel_sq_size()
474 if (dev->dev->caps.fw_ver >= MLX4_FW_VER_WQE_CTRL_NEC && set_kernel_sq_size()
495 if (qp->sq.wqe_cnt <= dev->dev->caps.max_wqes) set_kernel_sq_size()
504 qp->sq.max_gs = (min(dev->dev->caps.max_sq_desc_sz, set_kernel_sq_size()
522 min(dev->dev->caps.max_sq_sg, set_kernel_sq_size()
523 dev->dev->caps.max_rq_sg)); set_kernel_sq_size()
535 if ((1 << ucmd->log_sq_bb_count) > dev->dev->caps.max_wqes || set_user_sq_size()
537 ilog2(roundup_pow_of_two(dev->dev->caps.max_sq_desc_sz)) || set_user_sq_size()
613 for (i = 0; i < dev->caps.num_ports; i++) { qp0_enabled_vf()
614 if (qpn == dev->caps.qp0_proxy[i]) qp0_enabled_vf()
615 return !!dev->caps.qp0_qkey[i]; qp0_enabled_vf()
1078 return dev->dev->caps.qp0_proxy[attr->port_num - 1]; get_sqp_num()
1080 return dev->dev->caps.qp1_proxy[attr->port_num - 1]; get_sqp_num()
1126 if (!(to_mdev(pd->device)->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC)) mlx4_ib_create_qp()
1289 !(1 << path->static_rate & dev->dev->caps.stat_rate_support)) _mlx4_set_path()
1295 if (ah->grh.sgid_index >= dev->dev->caps.gid_table_len[port]) { _mlx4_set_path()
1297 ah->grh.sgid_index, dev->dev->caps.gid_table_len[port] - 1); _mlx4_set_path()
1497 ilog2(dev->dev->caps.max_gso_sz); __mlx4_ib_modify_qp()
1507 ilog2(dev->dev->caps.max_msg_sz); __mlx4_ib_modify_qp()
1579 attr->alt_port_num > dev->dev->caps.num_ports) __mlx4_ib_modify_qp()
1583 dev->dev->caps.pkey_table_len[attr->alt_port_num]) __mlx4_ib_modify_qp()
1716 if (dev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) { __mlx4_ib_modify_qp()
1978 if (attr->pkey_index >= dev->dev->caps.pkey_table_len[p]) { mlx4_ib_modify_qp()
1988 attr->max_rd_atomic > dev->dev->caps.max_qp_init_rdma) { mlx4_ib_modify_qp()
1997 attr->max_dest_rd_atomic > dev->dev->caps.max_qp_dest_rdma) { mlx4_ib_modify_qp()
2023 for (i = 0; i < dev->caps.num_ports; i++) { vf_get_qp0_qkey()
2024 if (qpn == dev->caps.qp0_proxy[i] || vf_get_qp0_qkey()
2025 qpn == dev->caps.qp0_tunnel[i]) { vf_get_qp0_qkey()
2026 *qkey = dev->caps.qp0_qkey[i]; vf_get_qp0_qkey()
2087 cpu_to_be32(mdev->dev->caps.qp0_tunnel[sqp->qp.port - 1]); build_sriov_qp0_header()
2507 dseg->dqpn = cpu_to_be32(dev->dev->caps.qp1_tunnel[port - 1]); set_tunnel_datagram_seg()
2509 dseg->dqpn = cpu_to_be32(dev->dev->caps.qp0_tunnel[port - 1]); set_tunnel_datagram_seg()
3088 if (ib_ah_attr->port_num == 0 || ib_ah_attr->port_num > dev->caps.num_ports) to_ib_ah_attr()
H A Dmad.c316 for (slave = 0; slave < dev->dev->caps.sqp_demux; slave++) { __propagate_pkey_ev()
327 ix < dev->dev->caps.pkey_table_len[port_num]; ix++) { __propagate_pkey_ev()
412 for (i = 0; i < dev->dev->caps.sqp_demux; i++) { mlx4_ib_find_real_gid()
432 for (i = 0; i < dev->dev->caps.pkey_table_len[port]; i++) { find_slave_port_pkey_ix()
478 u8 is_eth = dev->dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH; mlx4_ib_send_to_slave()
637 if (slave >= dev->dev->caps.sqp_demux) { mlx4_ib_demux_mad()
639 slave, dev->dev->caps.sqp_demux); mlx4_ib_demux_mad()
711 if (slave >= dev->dev->caps.sqp_demux) { mlx4_ib_demux_mad()
713 slave, dev->dev->caps.sqp_demux); mlx4_ib_demux_mad()
796 if (!(to_mdev(ibdev)->dev->caps.flags & MLX4_DEV_CAP_FLAG_PORT_MNG_CHG_EV)) ib_process_mad()
1965 ctx->tun = kcalloc(dev->dev->caps.sqp_demux, mlx4_ib_alloc_demux_ctx()
1975 i < min(dev->dev->caps.sqp_demux, mlx4_ib_alloc_demux_ctx()
2022 for (i = 0; i < dev->dev->caps.sqp_demux; i++) mlx4_ib_alloc_demux_ctx()
2058 for (i = 0; i < dev->dev->caps.sqp_demux; i++) { mlx4_ib_free_demux_ctx()
2065 for (i = 0; i < dev->dev->caps.sqp_demux; i++) { mlx4_ib_free_demux_ctx()
2082 for (i = 0; i < dev->dev->caps.num_ports; i++) mlx4_ib_master_tunnels()
2106 for (i = 0; i < dev->dev->caps.sqp_demux; i++) { mlx4_ib_init_sriov()
2125 dev->dev->caps.sqp_demux); mlx4_ib_init_sriov()
H A Dsysfs.c450 (p->dev->dev->caps.pkey_table_len[p->port_num])) show_port_pkey()
474 idx >= p->dev->dev->caps.pkey_table_len[p->port_num] || store_port_pkey()
664 dev->dev->caps.pkey_table_len[port_num]); add_port()
697 for (i = 0; i < dev->dev->caps.pkey_table_len[port_num]; ++i) add_port()
739 for (port = 1; port <= dev->dev->caps.num_ports; ++port) { register_one_pkey_tree()
865 for (i = 0; i < device->dev->caps.num_ports; i++) { unregister_alias_guid_tree()
H A Dsrq.c87 if (init_attr->attr.max_wr >= dev->dev->caps.max_srq_wqes || mlx4_ib_create_srq()
88 init_attr->attr.max_sge > dev->dev->caps.max_srq_sge) mlx4_ib_create_srq()
184 (u16) dev->dev->caps.reserved_xrcds; mlx4_ib_create_srq()
H A Dah.c64 !(1 << ah->av.ib.stat_rate & dev->caps.stat_rate_support)) create_ib_ah()
97 !(1 << ah->av.eth.stat_rate & dev->caps.stat_rate_support)) create_iboe_ah()
/linux-4.1.27/drivers/hwmon/
H A Dacpi_power_meter.c93 struct acpi_power_meter_capabilities caps; member in struct:acpi_power_meter_resource
169 if (temp > resource->caps.max_avg_interval || set_avg_interval()
170 temp < resource->caps.min_avg_interval) set_avg_interval()
241 if (temp > resource->caps.max_cap || temp < resource->caps.min_cap) set_cap()
331 msecs_to_jiffies(resource->caps.sampling_time)) && update_meter()
403 val = resource->caps.min_avg_interval; show_val()
406 val = resource->caps.max_avg_interval; show_val()
409 val = resource->caps.min_cap * 1000; show_val()
412 val = resource->caps.max_cap * 1000; show_val()
415 if (resource->caps.hysteresis == UNKNOWN_HYSTERESIS) show_val()
418 val = resource->caps.hysteresis * 1000; show_val()
421 if (resource->caps.flags & POWER_METER_IS_BATTERY) show_val()
454 unsigned int acc = resource->caps.accuracy; show_accuracy()
688 if (resource->caps.flags & POWER_METER_CAN_MEASURE) { setup_attrs()
694 if (resource->caps.flags & POWER_METER_CAN_CAP) { setup_attrs()
701 if (resource->caps.configurable_cap) setup_attrs()
715 if (resource->caps.flags & POWER_METER_CAN_TRIP) { setup_attrs()
771 state.pointer = &resource->caps; read_capabilities()
780 if (resource->caps.units) { read_capabilities()
783 resource->caps.units); read_capabilities()
/linux-4.1.27/drivers/mmc/core/
H A Dsdio_irq.c57 !(host->caps & MMC_CAP_SDIO_IRQ)) { process_sdio_pending_irqs()
117 period = (host->caps & MMC_CAP_SDIO_IRQ) ? sdio_irq_thread()
160 if (!(host->caps & MMC_CAP_SDIO_IRQ)) { sdio_irq_thread()
171 if (host->caps & MMC_CAP_SDIO_IRQ) { sdio_irq_thread()
181 if (host->caps & MMC_CAP_SDIO_IRQ) { sdio_irq_thread()
210 } else if (host->caps & MMC_CAP_SDIO_IRQ) { sdio_card_irq_get()
231 } else if (host->caps & MMC_CAP_SDIO_IRQ) { sdio_card_irq_put()
248 if ((card->host->caps & MMC_CAP_SDIO_IRQ) && sdio_single_irq_set()
H A Dhost.c335 host->caps |= MMC_CAP_8_BIT_DATA; mmc_of_parse()
338 host->caps |= MMC_CAP_4_BIT_DATA; mmc_of_parse()
365 host->caps |= MMC_CAP_NONREMOVABLE; mmc_of_parse()
370 host->caps |= MMC_CAP_NEEDS_POLL; mmc_of_parse()
408 host->caps |= MMC_CAP_SD_HIGHSPEED; mmc_of_parse()
410 host->caps |= MMC_CAP_MMC_HIGHSPEED; mmc_of_parse()
412 host->caps |= MMC_CAP_UHS_SDR12; mmc_of_parse()
414 host->caps |= MMC_CAP_UHS_SDR25; mmc_of_parse()
416 host->caps |= MMC_CAP_UHS_SDR50; mmc_of_parse()
418 host->caps |= MMC_CAP_UHS_SDR104; mmc_of_parse()
420 host->caps |= MMC_CAP_UHS_DDR50; mmc_of_parse()
422 host->caps |= MMC_CAP_POWER_OFF_CARD; mmc_of_parse()
424 host->caps |= MMC_CAP_SDIO_IRQ; mmc_of_parse()
432 host->caps |= MMC_CAP_1_8V_DDR; mmc_of_parse()
434 host->caps |= MMC_CAP_1_2V_DDR; mmc_of_parse()
536 WARN_ON((host->caps & MMC_CAP_SDIO_IRQ) && mmc_add_host()
H A Dsdio.c208 if (!(card->host->caps & MMC_CAP_4_BIT_DATA)) sdio_enable_wide()
265 if (!(card->host->caps & MMC_CAP_4_BIT_DATA)) sdio_disable_wide()
297 else if ((card->host->caps & MMC_CAP_4_BIT_DATA) && sdio_enable_4bit_bus()
325 if (!(card->host->caps & MMC_CAP_SD_HIGHSPEED)) mmc_sdio_switch_hs()
416 if (!(card->host->caps & sdio_select_driver_type()
425 if (card->host->caps & MMC_CAP_DRIVER_TYPE_A) sdio_select_driver_type()
428 if (card->host->caps & MMC_CAP_DRIVER_TYPE_C) sdio_select_driver_type()
431 if (card->host->caps & MMC_CAP_DRIVER_TYPE_D) sdio_select_driver_type()
486 if ((card->host->caps & MMC_CAP_UHS_SDR104) && sdio_set_bus_speed_mode()
492 } else if ((card->host->caps & MMC_CAP_UHS_DDR50) && sdio_set_bus_speed_mode()
498 } else if ((card->host->caps & (MMC_CAP_UHS_SDR104 | sdio_set_bus_speed_mode()
505 } else if ((card->host->caps & (MMC_CAP_UHS_SDR104 | sdio_set_bus_speed_mode()
512 } else if ((card->host->caps & (MMC_CAP_UHS_SDR104 | sdio_set_bus_speed_mode()
553 if (card->host->caps & MMC_CAP_4_BIT_DATA) mmc_sdio_init_uhs_card()
860 if (host->caps & MMC_CAP_POWER_OFF_CARD) { mmc_sdio_detect()
888 if (host->caps & MMC_CAP_POWER_OFF_CARD) mmc_sdio_detect()
962 if (host->caps & MMC_CAP_POWER_OFF_CARD) { mmc_sdio_resume()
987 } else if (host->caps & MMC_CAP_SDIO_IRQ) { mmc_sdio_resume()
1115 if (host->caps & MMC_CAP_POWER_OFF_CARD) { mmc_attach_sdio()
1147 if (host->caps & MMC_CAP_POWER_OFF_CARD) mmc_attach_sdio()
H A Dsdio_bus.c146 if (func->card->host->caps & MMC_CAP_POWER_OFF_CARD) { sdio_bus_probe()
167 if (func->card->host->caps & MMC_CAP_POWER_OFF_CARD) sdio_bus_probe()
179 if (func->card->host->caps & MMC_CAP_POWER_OFF_CARD) sdio_bus_remove()
193 if (func->card->host->caps & MMC_CAP_POWER_OFF_CARD) sdio_bus_remove()
197 if (func->card->host->caps & MMC_CAP_POWER_OFF_CARD) sdio_bus_remove()
H A Dsd.c354 if (!(card->host->caps & MMC_CAP_SD_HIGHSPEED)) mmc_sd_switch_hs()
399 if (!(card->host->caps & (MMC_CAP_DRIVER_TYPE_A | MMC_CAP_DRIVER_TYPE_C sd_select_driver_type()
406 if (card->host->caps & MMC_CAP_DRIVER_TYPE_A) sd_select_driver_type()
409 if (card->host->caps & MMC_CAP_DRIVER_TYPE_C) sd_select_driver_type()
412 if (card->host->caps & MMC_CAP_DRIVER_TYPE_D) sd_select_driver_type()
462 if ((card->host->caps & MMC_CAP_UHS_SDR104) && sd_update_bus_speed_mode()
465 } else if ((card->host->caps & MMC_CAP_UHS_DDR50) && sd_update_bus_speed_mode()
468 } else if ((card->host->caps & (MMC_CAP_UHS_SDR104 | sd_update_bus_speed_mode()
472 } else if ((card->host->caps & (MMC_CAP_UHS_SDR104 | sd_update_bus_speed_mode()
476 } else if ((card->host->caps & (MMC_CAP_UHS_SDR104 | sd_update_bus_speed_mode()
629 if ((card->host->caps & MMC_CAP_4_BIT_DATA) && mmc_sd_init_uhs_card()
1012 if ((host->caps & MMC_CAP_4_BIT_DATA) && mmc_sd_init_card()
1154 if (!(host->caps & MMC_CAP_RUNTIME_RESUME)) { mmc_sd_resume()
1171 if (!(host->caps & MMC_CAP_AGGRESSIVE_PM)) mmc_sd_runtime_suspend()
1189 if (!(host->caps & (MMC_CAP_AGGRESSIVE_PM | MMC_CAP_RUNTIME_RESUME))) mmc_sd_runtime_resume()
H A Dmmc.c185 u32 caps = host->caps, caps2 = host->caps2; mmc_select_card_type() local
189 if (caps & MMC_CAP_MMC_HIGHSPEED && mmc_select_card_type()
195 if (caps & MMC_CAP_MMC_HIGHSPEED && mmc_select_card_type()
201 if (caps & MMC_CAP_1_8V_DDR && mmc_select_card_type()
207 if (caps & MMC_CAP_1_2V_DDR && mmc_select_card_type()
907 !(host->caps & (MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA))) mmc_select_bus_width()
910 idx = (host->caps & MMC_CAP_8_BIT_DATA) ? 0 : 1; mmc_select_bus_width()
941 if (!(host->caps & MMC_CAP_BUS_WIDTH_TEST)) mmc_select_bus_width()
1552 if (!cmd.busy_timeout || !(host->caps & MMC_CAP_WAIT_WHILE_BUSY)) mmc_sleep()
1746 if (!(host->caps & MMC_CAP_RUNTIME_RESUME)) { mmc_resume()
1763 if (!(host->caps & MMC_CAP_AGGRESSIVE_PM)) mmc_runtime_suspend()
1781 if (!(host->caps & (MMC_CAP_AGGRESSIVE_PM | MMC_CAP_RUNTIME_RESUME))) mmc_runtime_resume()
1819 if (!(host->caps & MMC_CAP_HW_RESET) || !host->ops->hw_reset) mmc_reset()
H A Dslot-gpio.c136 if (irq >= 0 && host->caps & MMC_CAP_NEEDS_POLL) mmc_gpiod_request_cd_irq()
153 host->caps |= MMC_CAP_NEEDS_POLL; mmc_gpiod_request_cd_irq()
/linux-4.1.27/drivers/media/platform/exynos4-is/
H A Dcommon.c42 unsigned int caps) __fimc_vidioc_querycap()
48 cap->device_caps = caps; __fimc_vidioc_querycap()
41 __fimc_vidioc_querycap(struct device *dev, struct v4l2_capability *cap, unsigned int caps) __fimc_vidioc_querycap() argument
/linux-4.1.27/Documentation/ptp/
H A Dtestptp.c145 struct ptp_clock_caps caps; main() local
270 if (ioctl(fd, PTP_CLOCK_GETCAPS, &caps)) { main()
280 caps.max_adj, main()
281 caps.n_alarm, main()
282 caps.n_ext_ts, main()
283 caps.n_per_out, main()
284 caps.pps, main()
285 caps.n_pins); main()
378 if (ioctl(fd, PTP_CLOCK_GETCAPS, &caps)) { main()
381 n_pins = caps.n_pins; main()
/linux-4.1.27/drivers/net/ethernet/sfc/
H A Dmcdi_port.c340 u32 caps; efx_mcdi_phy_probe() local
372 caps = MCDI_DWORD(outbuf, GET_LINK_OUT_CAP); efx_mcdi_phy_probe()
373 if (caps & (1 << MC_CMD_PHY_CAP_AN_LBN)) efx_mcdi_phy_probe()
375 mcdi_to_ethtool_cap(phy_data->media, caps); efx_mcdi_phy_probe()
377 phy_data->forced_cap = caps; efx_mcdi_phy_probe()
438 u32 caps = (efx->link_advertising ? efx_mcdi_port_reconfigure() local
442 return efx_mcdi_set_link(efx, caps, efx_get_mcdi_phy_flags(efx), efx_mcdi_port_reconfigure()
537 u32 caps; efx_mcdi_phy_set_settings() local
541 caps = (ethtool_to_mcdi_cap(ecmd->advertising) | efx_mcdi_phy_set_settings()
545 case 10: caps = 1 << MC_CMD_PHY_CAP_10FDX_LBN; break; efx_mcdi_phy_set_settings()
546 case 100: caps = 1 << MC_CMD_PHY_CAP_100FDX_LBN; break; efx_mcdi_phy_set_settings()
547 case 1000: caps = 1 << MC_CMD_PHY_CAP_1000FDX_LBN; break; efx_mcdi_phy_set_settings()
548 case 10000: caps = 1 << MC_CMD_PHY_CAP_10000FDX_LBN; break; efx_mcdi_phy_set_settings()
549 case 40000: caps = 1 << MC_CMD_PHY_CAP_40000FDX_LBN; break; efx_mcdi_phy_set_settings()
554 case 10: caps = 1 << MC_CMD_PHY_CAP_10HDX_LBN; break; efx_mcdi_phy_set_settings()
555 case 100: caps = 1 << MC_CMD_PHY_CAP_100HDX_LBN; break; efx_mcdi_phy_set_settings()
556 case 1000: caps = 1 << MC_CMD_PHY_CAP_1000HDX_LBN; break; efx_mcdi_phy_set_settings()
561 rc = efx_mcdi_set_link(efx, caps, efx_get_mcdi_phy_flags(efx), efx_mcdi_phy_set_settings()
572 phy_cfg->forced_cap = caps; efx_mcdi_phy_set_settings()
/linux-4.1.27/drivers/net/wireless/ath/ath9k/
H A Dcommon-init.c134 if (ah->caps.hw_caps & ATH9K_HW_CAP_2GHZ) { ath9k_cmn_init_channels_rates()
151 if (ah->caps.hw_caps & ATH9K_HW_CAP_5GHZ) { ath9k_cmn_init_channels_rates()
185 if (ah->caps.hw_caps & ATH9K_HW_CAP_LDPC) ath9k_cmn_setup_ht_cap()
188 if (ah->caps.hw_caps & ATH9K_HW_CAP_SGI_20) ath9k_cmn_setup_ht_cap()
234 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_HT)) ath9k_cmn_reload_chainmask()
237 if (ah->caps.hw_caps & ATH9K_HW_CAP_2GHZ) ath9k_cmn_reload_chainmask()
240 if (ah->caps.hw_caps & ATH9K_HW_CAP_5GHZ) ath9k_cmn_reload_chainmask()
H A Drecv.c26 (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP); ath9k_check_auto_sleep()
127 memset(skb->data, 0, ah->caps.rx_status_len); ath_rx_edma_buf_link()
129 ah->caps.rx_status_len, DMA_TO_DEVICE); ath_rx_edma_buf_link()
208 ah->caps.rx_status_len); ath_rx_edma_init()
211 ah->caps.rx_lp_qdepth); ath_rx_edma_init()
213 ah->caps.rx_hp_qdepth); ath_rx_edma_init()
281 sc->sc_ah->caps.rx_status_len; ath_rx_init()
283 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) ath_rx_init()
338 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) { ath_rx_cleanup()
447 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) { ath_startrecv()
476 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) ath_flushrecv()
492 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) ath_stoprecv()
844 if (rx_stats->rs_datalen > (common->rx_bufsize - ah->caps.rx_status_len)) { ath9k_rx_skb_preprocess()
863 hdr = (struct ieee80211_hdr *) (skb->data + ah->caps.rx_status_len); ath9k_rx_skb_preprocess()
954 struct ath9k_hw_capabilities *pCap = &ah->caps; ath9k_antenna_check()
957 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_ANT_DIV_COMB)) ath9k_antenna_check()
1008 bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA); ath_rx_tasklet()
1086 skb_put(skb, rs.rs_datalen + ah->caps.rx_status_len); ath_rx_tasklet()
1087 if (ah->caps.rx_status_len) ath_rx_tasklet()
1088 skb_pull(skb, ah->caps.rx_status_len); ath_rx_tasklet()
H A Dar9003_rtt.c109 if (!(ah->caps.rx_chainmask & (1 << chain))) ar9003_hw_rtt_load_hist()
174 if (!(ah->caps.rx_chainmask & (1 << chain))) ar9003_hw_rtt_fill_hist()
196 if (!(ah->caps.rx_chainmask & (1 << chain))) ar9003_hw_rtt_clear_hist()
H A Dgpio.c129 if (ah->caps.hw_caps & ATH9K_HW_CAP_RFSILENT) ath_start_rfkill_poll()
214 if (ah->caps.hw_caps & ATH9K_HW_CAP_MCI) { ath_btcoex_period_timer()
219 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_MCI)) ath_btcoex_period_timer()
225 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_MCI)) { ath_btcoex_period_timer()
265 (!(ah->caps.hw_caps & ATH9K_HW_CAP_MCI) && ath_btcoex_no_stomp_timer()
351 if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_MCI) && mci->aggr_limit) ath9k_btcoex_aggr_limit()
374 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_MCI)) ath9k_start_btcoex()
395 if (ah->caps.hw_caps & ATH9K_HW_CAP_MCI) ath9k_stop_btcoex()
H A Dinit.c239 desc_len = sc->sc_ah->caps.tx_desc_len; ath_descdma_setup()
257 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_4KB_SPLITTRANS)) { ath_descdma_setup()
294 if (!(sc->sc_ah->caps.hw_caps & ath_descdma_setup()
325 if (!(sc->sc_ah->caps.hw_caps & ath_descdma_setup()
380 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_ANT_DIV_COMB) ath9k_init_misc()
395 struct ath9k_hw_capabilities *pCap = &ah->caps; ath9k_init_pcoem_platform()
557 pCap = &ah->caps; ath9k_init_softc()
715 if (ah->caps.hw_caps & ATH9K_HW_CAP_2GHZ) ath9k_init_txpower_limits()
717 if (ah->caps.hw_caps & ATH9K_HW_CAP_5GHZ) ath9k_init_txpower_limits()
840 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_HT) { ath9k_set_hw_capab()
886 hw->wiphy->available_antennas_rx = BIT(ah->caps.max_rxchains) - 1; ath9k_set_hw_capab()
887 hw->wiphy->available_antennas_tx = BIT(ah->caps.max_txchains) - 1; ath9k_set_hw_capab()
890 if (ah->caps.hw_caps & ATH9K_HW_CAP_ANT_DIV_COMB) ath9k_set_hw_capab()
896 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_2GHZ) ath9k_set_hw_capab()
899 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_5GHZ) ath9k_set_hw_capab()
H A Dar9003_paprd.c62 if (ah->caps.tx_chainmask & BIT(1)) ar9003_paprd_enable()
65 if (ah->caps.tx_chainmask & BIT(2)) ar9003_paprd_enable()
183 for (i = 0; i < ah->caps.max_txchains; i++) { ar9003_paprd_setup_single_table()
786 if (ah->caps.tx_chainmask & BIT(1)) ar9003_paprd_populate_single_table()
791 if (ah->caps.tx_chainmask & BIT(2)) ar9003_paprd_populate_single_table()
1008 if ((ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->config.enable_paprd) ar9003_is_paprd_enabled()
H A Dhtc_drv_main.c589 tcap.tx_chainmask = priv->ah->caps.tx_chainmask; ath9k_htc_update_cap_target()
602 u32 caps = 0; ath9k_htc_setup_rate() local
625 caps = WLAN_RC_HT_FLAG; ath9k_htc_setup_rate()
627 caps |= ATH_RC_TX_STBC_FLAG; ath9k_htc_setup_rate()
629 caps |= WLAN_RC_DS_FLAG; ath9k_htc_setup_rate()
632 caps |= WLAN_RC_40_FLAG; ath9k_htc_setup_rate()
635 caps |= WLAN_RC_SGI_FLAG; ath9k_htc_setup_rate()
638 caps |= WLAN_RC_SGI_FLAG; ath9k_htc_setup_rate()
643 trate->capflags = cpu_to_be32(caps); ath9k_htc_setup_rate()
674 "Updated target sta: %pM, rate caps: 0x%X\n", ath9k_htc_init_rate()
701 "Updated target sta: %pM, rate caps: 0x%X\n", ath9k_htc_update_rate()
1299 "Supported rates for sta: %pM updated, rate caps: 0x%X\n", ath9k_htc_sta_rc_update_work()
H A Dmain.c441 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) ath9k_tasklet()
449 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) && ath9k_tasklet()
457 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) { ath9k_tasklet()
571 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) ath_isr()
694 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) ath9k_start()
710 if (ah->caps.hw_caps & ATH9K_HW_CAP_HT) ath9k_start()
777 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) ath9k_tx()
1349 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) { ath9k_enable_ps()
1369 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) { ath9k_disable_ps()
2101 bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA); ath9k_tx_last_beacon()
2177 return (ah->caps.rx_chainmask == 1); validate_antenna_mask()
2188 if (ah->caps.rx_chainmask != 1) ath9k_set_antenna()
2197 if (ah->caps.rx_chainmask == 1) ath9k_set_antenna()
2204 ah->rxchainmask = fill_chainmask(ah->caps.rx_chainmask, rx_ant); ath9k_set_antenna()
2206 ah->txchainmask = fill_chainmask(ah->caps.tx_chainmask, tx_ant); ath9k_set_antenna()
/linux-4.1.27/drivers/crypto/
H A Datmel-sha.c132 struct atmel_sha_caps caps; member in struct:atmel_sha_dev
323 if (!dd->caps.has_dma) atmel_sha_write_ctrl()
326 if (dd->caps.has_dualbuff) atmel_sha_write_ctrl()
483 if (dd->caps.has_dma) atmel_sha_xmit_start()
1173 if (dd->caps.has_sha224) atmel_sha_unregister_algs()
1176 if (dd->caps.has_sha_384_512) { atmel_sha_unregister_algs()
1192 if (dd->caps.has_sha224) { atmel_sha_register_algs()
1198 if (dd->caps.has_sha_384_512) { atmel_sha_register_algs()
1272 dd->caps.has_dma = 0; atmel_sha_get_cap()
1273 dd->caps.has_dualbuff = 0; atmel_sha_get_cap()
1274 dd->caps.has_sha224 = 0; atmel_sha_get_cap()
1275 dd->caps.has_sha_384_512 = 0; atmel_sha_get_cap()
1280 dd->caps.has_dma = 1; atmel_sha_get_cap()
1281 dd->caps.has_dualbuff = 1; atmel_sha_get_cap()
1282 dd->caps.has_sha224 = 1; atmel_sha_get_cap()
1283 dd->caps.has_sha_384_512 = 1; atmel_sha_get_cap()
1286 dd->caps.has_dma = 1; atmel_sha_get_cap()
1287 dd->caps.has_dualbuff = 1; atmel_sha_get_cap()
1288 dd->caps.has_sha224 = 1; atmel_sha_get_cap()
1289 dd->caps.has_sha_384_512 = 1; atmel_sha_get_cap()
1292 dd->caps.has_dma = 1; atmel_sha_get_cap()
1293 dd->caps.has_dualbuff = 1; atmel_sha_get_cap()
1294 dd->caps.has_sha224 = 1; atmel_sha_get_cap()
1422 if (sha_dd->caps.has_dma) { atmel_sha_probe()
1453 sha_dd->caps.has_sha224 ? "/SHA224" : "", atmel_sha_probe()
1454 sha_dd->caps.has_sha_384_512 ? "/SHA384/SHA512" : ""); atmel_sha_probe()
1462 if (sha_dd->caps.has_dma) atmel_sha_probe()
1490 if (sha_dd->caps.has_dma) atmel_sha_remove()
H A Datmel-aes.c143 struct atmel_aes_caps caps; member in struct:atmel_aes_dev
351 dd->dma_lch_in.dma_conf.src_maxburst = dd->caps.max_burst_size; atmel_aes_crypt_dma()
352 dd->dma_lch_in.dma_conf.dst_maxburst = dd->caps.max_burst_size; atmel_aes_crypt_dma()
353 dd->dma_lch_out.dma_conf.src_maxburst = dd->caps.max_burst_size; atmel_aes_crypt_dma()
354 dd->dma_lch_out.dma_conf.dst_maxburst = dd->caps.max_burst_size; atmel_aes_crypt_dma()
541 if (dd->caps.has_dualbuff) atmel_aes_write_ctrl()
784 dd->dma_lch_in.dma_conf.src_maxburst = dd->caps.max_burst_size; atmel_aes_dma_init()
787 dd->dma_lch_in.dma_conf.dst_maxburst = dd->caps.max_burst_size; atmel_aes_dma_init()
800 dd->dma_lch_out.dma_conf.src_maxburst = dd->caps.max_burst_size; atmel_aes_dma_init()
803 dd->dma_lch_out.dma_conf.dst_maxburst = dd->caps.max_burst_size; atmel_aes_dma_init()
1222 if (dd->caps.has_cfb64) atmel_aes_unregister_algs()
1236 if (dd->caps.has_cfb64) { atmel_aes_register_algs()
1255 dd->caps.has_dualbuff = 0; atmel_aes_get_cap()
1256 dd->caps.has_cfb64 = 0; atmel_aes_get_cap()
1257 dd->caps.max_burst_size = 1; atmel_aes_get_cap()
1262 dd->caps.has_dualbuff = 1; atmel_aes_get_cap()
1263 dd->caps.has_cfb64 = 1; atmel_aes_get_cap()
1264 dd->caps.max_burst_size = 4; atmel_aes_get_cap()
1267 dd->caps.has_dualbuff = 1; atmel_aes_get_cap()
1268 dd->caps.has_cfb64 = 1; atmel_aes_get_cap()
1269 dd->caps.max_burst_size = 4; atmel_aes_get_cap()
H A Dmxs-dcp.c61 uint32_t caps; member in struct:dcp
1009 sdcp->caps = readl(sdcp->base + MXS_DCP_CAPABILITY1); mxs_dcp_probe()
1011 if (sdcp->caps & MXS_DCP_CAPABILITY1_AES128) { mxs_dcp_probe()
1021 if (sdcp->caps & MXS_DCP_CAPABILITY1_SHA1) { mxs_dcp_probe()
1030 if (sdcp->caps & MXS_DCP_CAPABILITY1_SHA256) { mxs_dcp_probe()
1042 if (sdcp->caps & MXS_DCP_CAPABILITY1_SHA1) mxs_dcp_probe()
1046 if (sdcp->caps & MXS_DCP_CAPABILITY1_AES128) mxs_dcp_probe()
1061 if (sdcp->caps & MXS_DCP_CAPABILITY1_SHA256) mxs_dcp_remove()
1064 if (sdcp->caps & MXS_DCP_CAPABILITY1_SHA1) mxs_dcp_remove()
1067 if (sdcp->caps & MXS_DCP_CAPABILITY1_AES128) mxs_dcp_remove()
H A Datmel-tdes.c135 struct atmel_tdes_caps caps; member in struct:atmel_tdes_dev
271 if (!dd->caps.has_dma) atmel_tdes_write_ctrl()
564 if (dd->caps.has_dma) atmel_tdes_crypt_start()
814 if (!ctx->dd->caps.has_cfb_3keys && strstr(alg_name, "cfb") atmel_tdes_setkey()
1298 dd->caps.has_dma = 0; atmel_tdes_get_cap()
1299 dd->caps.has_cfb_3keys = 0; atmel_tdes_get_cap()
1304 dd->caps.has_dma = 1; atmel_tdes_get_cap()
1305 dd->caps.has_cfb_3keys = 1; atmel_tdes_get_cap()
1434 if (tdes_dd->caps.has_dma) { atmel_tdes_probe()
1473 if (tdes_dd->caps.has_dma) atmel_tdes_probe()
1504 if (tdes_dd->caps.has_dma) atmel_tdes_remove()
/linux-4.1.27/drivers/gpu/drm/nouveau/nvkm/engine/
H A Dfalcon.c78 u32 caps; _nvkm_falcon_init() local
90 caps = nv_ro32(falcon, 0x12c); _nvkm_falcon_init()
91 falcon->version = (caps & 0x0000000f); _nvkm_falcon_init()
92 falcon->secret = (caps & 0x00000030) >> 4; _nvkm_falcon_init()
95 caps = nv_ro32(falcon, 0x108); _nvkm_falcon_init()
96 falcon->code.limit = (caps & 0x000001ff) << 8; _nvkm_falcon_init()
97 falcon->data.limit = (caps & 0x0003fe00) >> 1; _nvkm_falcon_init()
/linux-4.1.27/drivers/mmc/host/
H A Dsdhci-acpi.c56 unsigned long caps; member in struct:sdhci_acpi_chip
65 unsigned long caps; member in struct:sdhci_acpi_slot
204 .caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE |
218 .caps = MMC_CAP_NONREMOVABLE | MMC_CAP_POWER_OFF_CARD |
231 .caps = MMC_CAP_WAIT_WHILE_BUSY,
348 host->mmc->caps |= c->slot->chip->caps; sdhci_acpi_probe()
354 host->mmc->caps |= c->slot->caps; sdhci_acpi_probe()
H A Datmel-mci.c145 * @caps: MCI capabilities depending on MCI version.
224 struct atmel_mci_caps caps; member in struct:atmel_mci
412 if (host->caps.has_odd_clk_div) atmci_regs_show()
426 if (host->caps.has_cstor_reg) atmci_regs_show()
434 if (host->caps.has_dma_conf_reg) { atmci_regs_show()
444 if (host->caps.has_cfg_reg) { atmci_regs_show()
755 if (!host->caps.has_rwproof) { atmci_pdc_set_single_buf()
820 if ((!host->caps.has_rwproof) atmci_pdc_complete()
822 if (host->caps.has_bad_data_ordering) atmci_pdc_complete()
857 if (host->caps.has_dma_conf_reg) atmci_dma_complete()
975 if ((!host->caps.has_rwproof) atmci_prepare_data_pdc()
979 if (host->caps.has_bad_data_ordering) atmci_prepare_data_pdc()
1045 if (host->caps.has_dma_conf_reg) atmci_prepare_data_dma()
1155 if (host->need_reset || host->caps.need_reset_after_xfer) { atmci_start_request()
1161 if (host->caps.has_cfg_reg) atmci_start_request()
1313 if (host->caps.has_cfg_reg) atmci_set_ios()
1329 if (host->caps.has_odd_clk_div) { atmci_set_ios()
1360 if (host->caps.has_rwproof) atmci_set_ios()
1363 if (host->caps.has_cfg_reg) { atmci_set_ios()
1373 if (host->caps.has_cfg_reg) atmci_set_ios()
1496 if (host->caps.has_cfg_reg)
1543 if (host->caps.need_blksz_mul_4) { atmci_command_complete()
1600 if (host->caps.has_cfg_reg) atmci_detect_change()
1742 if (host->caps.need_notbusy_for_read_ops || atmci_tasklet_func()
2180 mmc->caps |= MMC_CAP_SDIO_IRQ; atmci_init_slot()
2181 if (host->caps.has_highspeed) atmci_init_slot()
2182 mmc->caps |= MMC_CAP_SD_HIGHSPEED; atmci_init_slot()
2188 if ((slot_data->bus_width >= 4) && host->caps.has_rwproof) atmci_init_slot()
2189 mmc->caps |= MMC_CAP_4_BIT_DATA; atmci_init_slot()
2219 mmc->caps |= MMC_CAP_NONREMOVABLE; atmci_init_slot()
2221 mmc->caps |= MMC_CAP_NEEDS_POLL; atmci_init_slot()
2331 host->caps.has_dma_conf_reg = 0; atmci_get_cap()
2332 host->caps.has_pdc = ATMCI_PDC_CONNECTED; atmci_get_cap()
2333 host->caps.has_cfg_reg = 0; atmci_get_cap()
2334 host->caps.has_cstor_reg = 0; atmci_get_cap()
2335 host->caps.has_highspeed = 0; atmci_get_cap()
2336 host->caps.has_rwproof = 0; atmci_get_cap()
2337 host->caps.has_odd_clk_div = 0; atmci_get_cap()
2338 host->caps.has_bad_data_ordering = 1; atmci_get_cap()
2339 host->caps.need_reset_after_xfer = 1; atmci_get_cap()
2340 host->caps.need_blksz_mul_4 = 1; atmci_get_cap()
2341 host->caps.need_notbusy_for_read_ops = 0; atmci_get_cap()
2347 host->caps.has_odd_clk_div = 1; atmci_get_cap()
2350 host->caps.has_dma_conf_reg = 1; atmci_get_cap()
2351 host->caps.has_pdc = 0; atmci_get_cap()
2352 host->caps.has_cfg_reg = 1; atmci_get_cap()
2353 host->caps.has_cstor_reg = 1; atmci_get_cap()
2354 host->caps.has_highspeed = 1; atmci_get_cap()
2356 host->caps.has_rwproof = 1; atmci_get_cap()
2357 host->caps.need_blksz_mul_4 = 0; atmci_get_cap()
2358 host->caps.need_notbusy_for_read_ops = 1; atmci_get_cap()
2360 host->caps.has_bad_data_ordering = 0; atmci_get_cap()
2361 host->caps.need_reset_after_xfer = 0; atmci_get_cap()
2365 host->caps.has_pdc = 0; atmci_get_cap()
2439 } else if (host->caps.has_pdc) { atmci_probe()
2488 if (!host->caps.has_rwproof) { atmci_probe()
H A Dushc.c110 u32 caps; member in struct:ushc_data
137 0, 0, &ushc->caps, sizeof(ushc->caps), 100); ushc_hw_get_caps()
141 ushc->caps = le32_to_cpu(ushc->caps); ushc_hw_get_caps()
143 version = ushc->caps & USHC_GET_CAPS_VERSION_MASK; ushc_hw_get_caps()
454 mmc->caps = MMC_CAP_4_BIT_DATA | MMC_CAP_SDIO_IRQ; ushc_probe()
455 mmc->caps |= (ushc->caps & USHC_GET_CAPS_HIGH_SPD) ? MMC_CAP_SD_HIGHSPEED : 0; ushc_probe()
H A Dsdhci-iproc.c27 u32 caps; member in struct:sdhci_iproc_data
166 .caps = 0x05E90000,
203 host->mmc->caps |= MMC_CAP_1_8V_DDR; sdhci_iproc_probe()
212 host->caps = iproc_host->data->caps; sdhci_iproc_probe()
H A Dsdhci-pxav3.c140 host->caps = sdhci_readl(host, SDHCI_CAPABILITIES); armada_38x_quirks()
167 host->caps &= ~SDHCI_CAN_VDD_180; armada_38x_quirks()
168 host->mmc->caps &= ~MMC_CAP_1_8V_DDR; armada_38x_quirks()
170 host->caps &= ~SDHCI_CAN_VDD_330; armada_38x_quirks()
398 host->mmc->caps |= MMC_CAP_1_8V_DDR; sdhci_pxav3_probe()
420 host->mmc->caps |= MMC_CAP_NONREMOVABLE; sdhci_pxav3_probe()
424 host->mmc->caps |= MMC_CAP_8_BIT_DATA; sdhci_pxav3_probe()
431 host->mmc->caps |= pdata->host_caps; sdhci_pxav3_probe()
H A Dsdhci.c150 (host->mmc->caps & MMC_CAP_NONREMOVABLE)) sdhci_set_card_detection()
1664 (host->mmc->caps & MMC_CAP_NONREMOVABLE)) sdhci_do_get_cd()
2924 u32 caps[2] = {0, 0}; sdhci_add_host() local
2954 caps[0] = (host->quirks & SDHCI_QUIRK_MISSING_CAPS) ? host->caps : sdhci_add_host()
2958 caps[1] = (host->quirks & SDHCI_QUIRK_MISSING_CAPS) ? sdhci_add_host()
2964 else if (!(caps[0] & SDHCI_CAN_DO_SDMA)) sdhci_add_host()
2976 (caps[0] & SDHCI_CAN_DO_ADMA2)) sdhci_add_host()
3074 host->max_clk = (caps[0] & SDHCI_CLOCK_V3_BASE_MASK) sdhci_add_host()
3077 host->max_clk = (caps[0] & SDHCI_CLOCK_BASE_MASK) sdhci_add_host()
3095 host->clk_mul = (caps[1] & SDHCI_CLOCK_MUL_MASK) >> sdhci_add_host()
3124 host->timeout_clk = (caps[0] & SDHCI_TIMEOUT_CLK_MASK) >> sdhci_add_host()
3137 if (caps[0] & SDHCI_TIMEOUT_CLK_UNIT) sdhci_add_host()
3148 mmc->caps |= MMC_CAP_SDIO_IRQ | MMC_CAP_ERASE | MMC_CAP_CMD23; sdhci_add_host()
3168 * 8-bit width must set "mmc->caps |= MMC_CAP_8_BIT_DATA;" in sdhci_add_host()
3173 mmc->caps |= MMC_CAP_4_BIT_DATA; sdhci_add_host()
3176 mmc->caps &= ~MMC_CAP_CMD23; sdhci_add_host()
3178 if (caps[0] & SDHCI_CAN_DO_HISPD) sdhci_add_host()
3179 mmc->caps |= MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED; sdhci_add_host()
3182 !(mmc->caps & MMC_CAP_NONREMOVABLE)) sdhci_add_host()
3183 mmc->caps |= MMC_CAP_NEEDS_POLL; sdhci_add_host()
3194 caps[1] &= ~(SDHCI_SUPPORT_SDR104 | sdhci_add_host()
3205 caps[1] &= ~(SDHCI_SUPPORT_SDR104 | SDHCI_SUPPORT_SDR50 | sdhci_add_host()
3208 /* Any UHS-I mode in caps implies SDR12 and SDR25 support. */ sdhci_add_host()
3209 if (caps[1] & (SDHCI_SUPPORT_SDR104 | SDHCI_SUPPORT_SDR50 | sdhci_add_host()
3211 mmc->caps |= MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25; sdhci_add_host()
3214 if (caps[1] & SDHCI_SUPPORT_SDR104) { sdhci_add_host()
3215 mmc->caps |= MMC_CAP_UHS_SDR104 | MMC_CAP_UHS_SDR50; sdhci_add_host()
3221 } else if (caps[1] & SDHCI_SUPPORT_SDR50) sdhci_add_host()
3222 mmc->caps |= MMC_CAP_UHS_SDR50; sdhci_add_host()
3225 (caps[1] & SDHCI_SUPPORT_HS400)) sdhci_add_host()
3234 if ((caps[1] & SDHCI_SUPPORT_DDR50) && sdhci_add_host()
3236 mmc->caps |= MMC_CAP_UHS_DDR50; sdhci_add_host()
3239 if (caps[1] & SDHCI_USE_SDR50_TUNING) sdhci_add_host()
3247 if (caps[1] & SDHCI_DRIVER_TYPE_A) sdhci_add_host()
3248 mmc->caps |= MMC_CAP_DRIVER_TYPE_A; sdhci_add_host()
3249 if (caps[1] & SDHCI_DRIVER_TYPE_C) sdhci_add_host()
3250 mmc->caps |= MMC_CAP_DRIVER_TYPE_C; sdhci_add_host()
3251 if (caps[1] & SDHCI_DRIVER_TYPE_D) sdhci_add_host()
3252 mmc->caps |= MMC_CAP_DRIVER_TYPE_D; sdhci_add_host()
3255 host->tuning_count = (caps[1] & SDHCI_RETUNING_TIMER_COUNT_MASK) >> sdhci_add_host()
3266 host->tuning_mode = (caps[1] & SDHCI_RETUNING_MODE_MASK) >> sdhci_add_host()
3295 if (caps[0] & SDHCI_CAN_VDD_330) { sdhci_add_host()
3303 if (caps[0] & SDHCI_CAN_VDD_300) { sdhci_add_host()
3311 if (caps[0] & SDHCI_CAN_VDD_180) { sdhci_add_host()
3388 mmc->max_blk_size = (caps[0] & SDHCI_MAX_BLOCK_MASK) >> sdhci_add_host()
H A Dsdhci-bcm-kona.c267 (host->mmc->caps & MMC_CAP_NONREMOVABLE) ? 'Y' : 'N'); sdhci_bcm_kona_probe()
272 if (host->mmc->caps & MMC_CAP_NONREMOVABLE) sdhci_bcm_kona_probe()
276 (host->mmc->caps | MMC_CAP_8_BIT_DATA) ? 'Y' : 'N'); sdhci_bcm_kona_probe()
291 if (host->mmc->caps & MMC_CAP_NONREMOVABLE) { sdhci_bcm_kona_probe()
H A Ddw_mmc-pci.c33 .caps = DW_MCI_CAPABILITIES,
H A Dsdhci-st.c186 if (mhost->caps & MMC_CAP_NONREMOVABLE) st_mmcss_cconfig()
193 if (mhost->caps & MMC_CAP_UHS_SDR50) { st_mmcss_cconfig()
203 if (mhost->caps & MMC_CAP_UHS_SDR104) { st_mmcss_cconfig()
214 if (mhost->caps & MMC_CAP_UHS_DDR50) st_mmcss_cconfig()
H A Dsdhci-pxav2.c203 host->mmc->caps |= MMC_CAP_NONREMOVABLE; sdhci_pxav2_probe()
208 host->mmc->caps |= MMC_CAP_8_BIT_DATA; sdhci_pxav2_probe()
213 host->mmc->caps |= pdata->host_caps; sdhci_pxav2_probe()
H A Ddavinci_mmc.c813 if (host->mmc->caps & MMC_CAP_SDIO_IRQ) { mmc_davinci_xfer_done()
1307 mmc->caps |= MMC_CAP_NEEDS_POLL; davinci_mmcsd_probe()
1308 mmc->caps |= MMC_CAP_WAIT_WHILE_BUSY; davinci_mmcsd_probe()
1311 mmc->caps |= MMC_CAP_4_BIT_DATA; davinci_mmcsd_probe()
1314 mmc->caps |= (MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA); davinci_mmcsd_probe()
1325 if (pdata && pdata->caps) davinci_mmcsd_probe()
1326 mmc->caps |= pdata->caps; davinci_mmcsd_probe()
1368 mmc->caps |= MMC_CAP_SDIO_IRQ; davinci_mmcsd_probe()
1375 (mmc->caps & MMC_CAP_4_BIT_DATA) ? 4 : 1); davinci_mmcsd_probe()
1414 if (host->mmc->caps & MMC_CAP_SDIO_IRQ) davinci_mmcsd_remove()
H A Dsdhci-pci.c50 slot->host->caps = ricoh_mmc_probe_slot()
113 slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA; mrst_hc_probe_slot()
133 slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA; pch_hc_probe_slot()
208 slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE; mfd_emmc_probe_slot()
216 slot->host->mmc->caps |= MMC_CAP_POWER_OFF_CARD | MMC_CAP_NONREMOVABLE; mfd_sdio_probe_slot()
271 slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE | byt_emmc_probe_slot()
284 slot->host->mmc->caps |= MMC_CAP_POWER_OFF_CARD | MMC_CAP_NONREMOVABLE | byt_sdio_probe_slot()
292 slot->host->mmc->caps |= MMC_CAP_BUS_WIDTH_TEST | byt_sd_probe_slot()
337 slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE | intel_mrfl_mmc_probe_slot()
502 slot->host->mmc->caps |= MMC_CAP_BUS_WIDTH_TEST; jmicron_probe_slot()
1480 slot->host->mmc->caps |= MMC_CAP_HW_RESET; sdhci_pci_probe_slot()
H A Ddw_mmc-rockchip.c92 .caps = dw_mci_rk3288_dwmmc_caps,
H A Dof_mmc_spi.c136 oms->pdata.caps |= MMC_CAP_NEEDS_POLL; mmc_spi_get_pdata()
H A Dsdhci-msm.c437 u32 core_version, caps; sdhci_msm_probe() local
540 caps = readl_relaxed(host->ioaddr + SDHCI_CAPABILITIES); sdhci_msm_probe()
541 caps |= SDHCI_CAN_VDD_300 | SDHCI_CAN_DO_8BIT; sdhci_msm_probe()
542 writel_relaxed(caps, host->ioaddr + sdhci_msm_probe()
H A Dau1xmmc.c1001 mmc->caps = MMC_CAP_4_BIT_DATA | MMC_CAP_SDIO_IRQ; au1xmmc_probe()
1018 mmc->caps |= MMC_CAP_8_BIT_DATA; au1xmmc_probe()
1048 mmc->caps |= MMC_CAP_NEEDS_POLL; au1xmmc_probe()
1051 mmc->caps |= MMC_CAP_NEEDS_POLL; au1xmmc_probe()
1053 /* platform may not be able to use all advertised caps */ au1xmmc_probe()
1055 mmc->caps &= ~(host->platdata->mask_host_caps); au1xmmc_probe()
1115 !(mmc->caps & MMC_CAP_NEEDS_POLL)) au1xmmc_probe()
1146 !(host->mmc->caps & MMC_CAP_NEEDS_POLL)) au1xmmc_remove()
/linux-4.1.27/drivers/net/phy/
H A Ddp83640.c143 struct ptp_clock_info caps; member in struct:dp83640_clock
379 container_of(ptp, struct dp83640_clock, caps); ptp_dp83640_adjfreq()
412 container_of(ptp, struct dp83640_clock, caps); ptp_dp83640_adjtime()
434 container_of(ptp, struct dp83640_clock, caps); ptp_dp83640_gettime()
459 container_of(ptp, struct dp83640_clock, caps); ptp_dp83640_settime()
476 container_of(ptp, struct dp83640_clock, caps); ptp_dp83640_enable()
520 container_of(ptp, struct dp83640_clock, caps); ptp_dp83640_verify()
522 if (clock->caps.pin_config[pin].func == PTP_PF_PHYSYNC && ptp_dp83640_verify()
1003 kfree(clock->caps.pin_config); dp83640_free_clocks()
1017 clock->caps.owner = THIS_MODULE; dp83640_clock_init()
1018 sprintf(clock->caps.name, "dp83640 timer"); dp83640_clock_init()
1019 clock->caps.max_adj = 1953124; dp83640_clock_init()
1020 clock->caps.n_alarm = 0; dp83640_clock_init()
1021 clock->caps.n_ext_ts = N_EXT_TS; dp83640_clock_init()
1022 clock->caps.n_per_out = N_PER_OUT; dp83640_clock_init()
1023 clock->caps.n_pins = DP83640_N_PINS; dp83640_clock_init()
1024 clock->caps.pps = 0; dp83640_clock_init()
1025 clock->caps.adjfreq = ptp_dp83640_adjfreq; dp83640_clock_init()
1026 clock->caps.adjtime = ptp_dp83640_adjtime; dp83640_clock_init()
1027 clock->caps.gettime64 = ptp_dp83640_gettime; dp83640_clock_init()
1028 clock->caps.settime64 = ptp_dp83640_settime; dp83640_clock_init()
1029 clock->caps.enable = ptp_dp83640_enable; dp83640_clock_init()
1030 clock->caps.verify = ptp_dp83640_verify; dp83640_clock_init()
1034 dp83640_gpio_defaults(clock->caps.pin_config); dp83640_clock_init()
1085 clock->caps.pin_config = kzalloc(sizeof(struct ptp_pin_desc) * dp83640_clock_get_bus()
1087 if (!clock->caps.pin_config) { dp83640_clock_get_bus()
1140 clock->ptp_clock = ptp_clock_register(&clock->caps, &phydev->dev); dp83640_probe()
/linux-4.1.27/drivers/media/firewire/
H A Dfiredtv-fe.c183 fi->caps = FE_CAN_INVERSION_AUTO | fdtv_frontend_init()
203 fi->caps = FE_CAN_INVERSION_AUTO | fdtv_frontend_init()
223 fi->caps = FE_CAN_INVERSION_AUTO | fdtv_frontend_init()
239 fi->caps = FE_CAN_INVERSION_AUTO | fdtv_frontend_init()
/linux-4.1.27/arch/arm/mach-nspire/
H A Dclcd.c39 .caps = CLCD_CAP_565,
62 .caps = CLCD_CAP_5551,
H A Dnspire.c45 .caps = CLCD_CAP_5551 | CLCD_CAP_565,
/linux-4.1.27/drivers/acpi/
H A Dvideo_detect.c181 long caps = 0; acpi_video_get_capabilities() local
192 &caps, NULL); acpi_video_get_capabilities()
194 acpi_video_support |= caps; acpi_video_get_capabilities()
214 &caps, NULL); acpi_video_get_capabilities()
217 graphics_handle ? caps : acpi_video_support, acpi_video_get_capabilities()
220 return caps; acpi_video_get_capabilities()
/linux-4.1.27/drivers/xen/
H A Dsys-hypervisor.c245 char *caps; capabilities_show() local
247 caps = kmalloc(XEN_CAPABILITIES_INFO_LEN, GFP_KERNEL); capabilities_show()
248 if (caps) { capabilities_show()
249 ret = HYPERVISOR_xen_version(XENVER_capabilities, caps); capabilities_show()
251 ret = sprintf(buffer, "%s\n", caps); capabilities_show()
252 kfree(caps); capabilities_show()
/linux-4.1.27/sound/isa/
H A Des18xx.c112 int caps; /* Chip capabilities */ member in struct:snd_es18xx
419 if (chip->caps & ES18XX_NEW_RATE) { snd_es18xx_rate_set()
434 if ((chip->caps & ES18XX_PCM2) && mode == DAC2) { snd_es18xx_rate_set()
460 if (substream->number == 0 && (chip->caps & ES18XX_PCM2)) { snd_es18xx_playback_hw_params()
461 if ((chip->caps & ES18XX_DUPLEX_MONO) && snd_es18xx_playback_hw_params()
525 if (chip->caps & ES18XX_PCM2) snd_es18xx_playback1_trigger()
542 if (chip->caps & ES18XX_PCM2) snd_es18xx_playback1_trigger()
564 if ((chip->caps & ES18XX_DUPLEX_MONO) && snd_es18xx_capture_hw_params()
724 if (substream->number == 0 && (chip->caps & ES18XX_PCM2)) snd_es18xx_playback_prepare()
734 if (substream->number == 0 && (chip->caps & ES18XX_PCM2)) snd_es18xx_playback_trigger()
746 if (chip->caps & ES18XX_CONTROL) { snd_es18xx_interrupt()
760 if ((chip->caps & ES18XX_HWV) && snd_es18xx_interrupt()
791 if (chip->caps & ES18XX_HWV) { snd_es18xx_interrupt()
816 if (substream->number == 0 && (chip->caps & ES18XX_PCM2)) { snd_es18xx_playback_pointer()
886 if (substream->number == 0 && (chip->caps & ES18XX_PCM2)) { snd_es18xx_playback_open()
887 if ((chip->caps & ES18XX_DUPLEX_MONO) && snd_es18xx_playback_open()
902 (chip->caps & ES18XX_NEW_RATE) ? &new_hw_constraints_clocks : &old_hw_constraints_clocks); snd_es18xx_playback_open()
913 if ((chip->caps & ES18XX_DUPLEX_MONO) && snd_es18xx_capture_open()
920 (chip->caps & ES18XX_NEW_RATE) ? &new_hw_constraints_clocks : &old_hw_constraints_clocks); snd_es18xx_capture_open()
928 if (substream->number == 0 && (chip->caps & ES18XX_PCM2)) snd_es18xx_playback_close()
1407 if (chip->caps & ES18XX_CONTROL) { snd_es18xx_initialize()
1514 if (chip->caps & ES18XX_NEW_RATE) { snd_es18xx_initialize()
1520 if (!(chip->caps & ES18XX_PCM2)) { snd_es18xx_initialize()
1524 if (chip->caps & ES18XX_SPATIALIZER) { snd_es18xx_initialize()
1543 if (chip->caps & ES18XX_MUTEREC) snd_es18xx_initialize()
1545 if (chip->caps & ES18XX_RECMIX) snd_es18xx_initialize()
1639 chip->caps = ES18XX_DUPLEX_MONO | ES18XX_DUPLEX_SAME | ES18XX_CONTROL | ES18XX_GPO_2BIT; snd_es18xx_probe()
1642 chip->caps = ES18XX_PCM2 | ES18XX_SPATIALIZER | ES18XX_RECMIX | ES18XX_NEW_RATE | ES18XX_AUXB | ES18XX_MONO | ES18XX_MUTEREC | ES18XX_CONTROL | ES18XX_HWV | ES18XX_GPO_2BIT; snd_es18xx_probe()
1645 chip->caps = ES18XX_DUPLEX_MONO | ES18XX_DUPLEX_SAME | ES18XX_I2S | ES18XX_CONTROL; snd_es18xx_probe()
1648 chip->caps = ES18XX_PCM2 | ES18XX_SPATIALIZER | ES18XX_RECMIX | ES18XX_NEW_RATE | ES18XX_AUXB | ES18XX_I2S | ES18XX_CONTROL | ES18XX_HWV; snd_es18xx_probe()
1652 chip->caps = ES18XX_PCM2 | ES18XX_RECMIX | ES18XX_AUXB | ES18XX_DUPLEX_SAME | ES18XX_GPO_2BIT; snd_es18xx_probe()
1663 chip->caps &= ~(ES18XX_PCM2 | ES18XX_DUPLEX_SAME); snd_es18xx_probe()
1698 if (chip->caps & ES18XX_PCM2) snd_es18xx_pcm()
1711 if (chip->caps & ES18XX_DUPLEX_SAME) snd_es18xx_pcm()
1713 if (! (chip->caps & ES18XX_PCM2)) snd_es18xx_pcm()
1854 if (chip->caps & ES18XX_HWV) { snd_es18xx_mixer()
1869 if (chip->caps & ES18XX_PCM2) { snd_es18xx_mixer()
1881 if (chip->caps & ES18XX_RECMIX) { snd_es18xx_mixer()
1898 if (chip->caps & ES18XX_SPATIALIZER) { snd_es18xx_mixer()
1904 if (chip->caps & ES18XX_HWV) { snd_es18xx_mixer()
1948 if (chip->caps & ES18XX_GPO_2BIT) { snd_es18xx_mixer()
/linux-4.1.27/drivers/net/ethernet/freescale/
H A Dgianfar_ptp.c139 struct ptp_clock_info caps; member in struct:etsects
288 struct etsects *etsects = container_of(ptp, struct etsects, caps); ptp_gianfar_adjfreq()
310 struct etsects *etsects = container_of(ptp, struct etsects, caps); ptp_gianfar_adjtime()
330 struct etsects *etsects = container_of(ptp, struct etsects, caps); ptp_gianfar_gettime()
348 struct etsects *etsects = container_of(ptp, struct etsects, caps); ptp_gianfar_settime()
365 struct etsects *etsects = container_of(ptp, struct etsects, caps); ptp_gianfar_enable()
453 etsects->caps = ptp_gianfar_caps; gianfar_ptp_probe()
463 get_of_u32(node, "fsl,max-adj", &etsects->caps.max_adj)) { gianfar_ptp_probe()
498 ptp_gianfar_settime(&etsects->caps, &now); gianfar_ptp_probe()
516 etsects->clock = ptp_clock_register(&etsects->caps, &dev->dev); gianfar_ptp_probe()
/linux-4.1.27/arch/sparc/kernel/
H A Dsetup_64.c393 unsigned long caps = sparc64_elf_hwcap; cpucap_info() local
399 if (caps & bit) { cpucap_info()
405 if (caps & HWCAP_SPARC_CRYPTO) { cpucap_info()
447 static void __init report_hwcaps(unsigned long caps) report_hwcaps() argument
453 if (caps & bit) report_hwcaps()
456 if (caps & HWCAP_SPARC_CRYPTO) report_hwcaps()
465 unsigned long caps = 0; mdesc_cpu_hwcap_list() local
489 caps |= bit; mdesc_cpu_hwcap_list()
495 caps |= HWCAP_SPARC_CRYPTO; mdesc_cpu_hwcap_list()
505 return caps; mdesc_cpu_hwcap_list()
/linux-4.1.27/drivers/media/usb/tm6000/
H A Dtm6000-cards.c75 struct tm6000_capabilities caps; member in struct:tm6000_board
93 .caps = {
120 .caps = {
146 .caps = {
174 .caps = {
213 .caps = {
239 .caps = {
264 .caps = {
291 .caps = {
321 .caps = {
355 .caps = {
392 .caps = {
429 .caps = {
466 .caps = {
528 .caps = {
565 .caps = {
594 .caps = {
915 if (dev->caps.has_tuner) tm6000_config_tuner()
998 dev->caps = tm6000_boards[dev->model].caps; fill_board_specific_data()
1065 if (dev->caps.has_dvb) request_module_async()
1132 if (dev->caps.has_tda9874) tm6000_init_dev()
H A Dtm6000-dvb.c239 if (dev->caps.has_zl10353) { tm6000_dvb_attach_frontend()
406 if (!dev->caps.has_dvb) dvb_init()
437 if (!dev->caps.has_dvb) dvb_fini()
/linux-4.1.27/drivers/net/ethernet/chelsio/cxgb4/
H A Dcxgb4_ethtool.c273 static unsigned int from_fw_linkcaps(enum fw_port_type type, unsigned int caps) from_fw_linkcaps() argument
280 if (caps & FW_PORT_CAP_SPEED_100M) from_fw_linkcaps()
282 if (caps & FW_PORT_CAP_SPEED_1G) from_fw_linkcaps()
284 if (caps & FW_PORT_CAP_SPEED_10G) from_fw_linkcaps()
288 if (caps & FW_PORT_CAP_SPEED_1G) from_fw_linkcaps()
290 if (caps & FW_PORT_CAP_SPEED_10G) from_fw_linkcaps()
307 if (caps & FW_PORT_CAP_SPEED_1G) from_fw_linkcaps()
309 if (caps & FW_PORT_CAP_SPEED_10G) from_fw_linkcaps()
317 if (caps & FW_PORT_CAP_ANEG) from_fw_linkcaps()
322 static unsigned int to_fw_linkcaps(unsigned int caps) to_fw_linkcaps() argument
326 if (caps & ADVERTISED_100baseT_Full) to_fw_linkcaps()
328 if (caps & ADVERTISED_1000baseT_Full) to_fw_linkcaps()
330 if (caps & ADVERTISED_10000baseT_Full) to_fw_linkcaps()
332 if (caps & ADVERTISED_40000baseSR4_Full) to_fw_linkcaps()
H A Dcxgb4_dcb.c655 static u8 cxgb4_getcap(struct net_device *dev, int cap_id, u8 *caps) cxgb4_getcap() argument
662 *caps = true; cxgb4_getcap()
667 *caps = 0x80; cxgb4_getcap()
672 *caps = 0x80; cxgb4_getcap()
676 *caps = true; cxgb4_getcap()
681 *caps = false; cxgb4_getcap()
685 *caps = pi->dcb.supported; cxgb4_getcap()
689 *caps = false; cxgb4_getcap()
/linux-4.1.27/fs/cifs/
H A Dioctl.c145 __u64 caps; cifs_ioctl() local
158 caps = le64_to_cpu(tcon->fsUnixInfo.Capability); cifs_ioctl()
160 if (CIFS_UNIX_EXTATTR_CAP & caps) { cifs_ioctl()
185 caps = le64_to_cpu(tcon->fsUnixInfo.Capability); cifs_ioctl()
193 * if (CIFS_UNIX_EXTATTR_CAP & caps) cifs_ioctl()
/linux-4.1.27/drivers/usb/host/
H A Dehci-tilegx.c138 ehci->caps = hcd->regs; ehci_hcd_tilegx_drv_probe()
140 hcd->regs + HC_LENGTH(ehci, readl(&ehci->caps->hc_capbase)); ehci_hcd_tilegx_drv_probe()
142 ehci->hcs_params = readl(&ehci->caps->hcs_params); ehci_hcd_tilegx_drv_probe()
H A Dehci-w90x900.c61 ehci->caps = hcd->regs; usb_w90x900_probe()
63 HC_LENGTH(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase)); usb_w90x900_probe()
H A Dehci-grlib.c130 ehci->caps = hcd->regs; ehci_hcd_grlib_probe()
133 hc_capbase = ehci_readl(ehci, &ehci->caps->hc_capbase); ehci_hcd_grlib_probe()
H A Dehci-mxc.c119 ehci->caps = hcd->regs + 0x100; ehci_mxc_drv_probe()
121 HC_LENGTH(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase)); ehci_mxc_drv_probe()
H A Dehci-sead3.c30 ehci->caps = hcd->regs + 0x100; ehci_sead3_setup()
H A Dehci-sh.c25 ehci->caps = hcd->regs; ehci_sh_reset()
/linux-4.1.27/drivers/video/fbdev/msm/
H A Dmddi.c44 struct mddi_client_caps caps; member in union:mddi_rev
81 struct mddi_client_caps caps; member in struct:mddi_info
130 memcpy(&mddi->caps, &rev->caps, mddi_handle_rev_data()
441 * caps unless you SEND_RTD, but the first SEND_RTD mddi_get_client_caps()
465 printk(KERN_INFO "mddi_init, timeout waiting for caps\n"); mddi_get_client_caps()
749 if (mddi->caps.Mfr_Name == 0 && mddi->caps.Product_Code == 0) mddi_probe()
750 pdata->fixup(&mddi->caps.Mfr_Name, &mddi->caps.Product_Code); mddi_probe()
755 (mddi->caps.Mfr_Name << 16 | mddi->caps.Product_Code)) { mddi_probe()
H A Dmddi_client_dummy.c63 panel->panel_data.caps = MSMFB_CAP_PARTIAL_UPDATES; mddi_dummy_probe()
/linux-4.1.27/drivers/video/fbdev/omap2/dss/
H A Doverlay.c89 ovl->caps = dss_feat_get_overlay_caps(ovl->id); dss_init_overlays()
116 if ((ovl->caps & OMAP_DSS_OVL_CAP_SCALE) == 0) { dss_ovl_simple_check()
159 if ((ovl->caps & OMAP_DSS_OVL_CAP_SCALE) == 0) { dss_ovl_check()
H A Doverlay-sysfs.c256 if ((ovl->caps & OMAP_DSS_OVL_CAP_GLOBAL_ALPHA) == 0) overlay_global_alpha_store()
298 if ((ovl->caps & OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA) == 0) overlay_pre_mult_alpha_store()
338 if ((ovl->caps & OMAP_DSS_OVL_CAP_ZORDER) == 0) overlay_zorder_store()
H A Ddispc.c742 enum omap_overlay_caps caps, int x, int y) dispc_ovl_set_pos()
746 if ((caps & OMAP_DSS_OVL_CAP_POS) == 0) dispc_ovl_set_pos()
781 enum omap_overlay_caps caps, u8 zorder) dispc_ovl_set_zorder()
783 if ((caps & OMAP_DSS_OVL_CAP_ZORDER) == 0) dispc_ovl_set_zorder()
801 enum omap_overlay_caps caps, bool enable) dispc_ovl_set_pre_mult_alpha()
803 if ((caps & OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA) == 0) dispc_ovl_set_pre_mult_alpha()
810 enum omap_overlay_caps caps, u8 global_alpha) dispc_ovl_setup_global_alpha()
815 if ((caps & OMAP_DSS_OVL_CAP_GLOBAL_ALPHA) == 0) dispc_ovl_setup_global_alpha()
1112 enum omap_overlay_caps caps, bool enable) dispc_ovl_enable_replication()
1117 if ((caps & OMAP_DSS_OVL_CAP_REPLICATION) == 0) dispc_ovl_enable_replication()
2394 enum omap_overlay_caps caps, dispc_ovl_calc_scaling()
2414 if ((caps & OMAP_DSS_OVL_CAP_SCALE) == 0) dispc_ovl_calc_scaling()
2473 enum omap_overlay_caps caps = dss_feat_get_overlay_caps(plane); dispc_ovl_check() local
2502 return dispc_ovl_calc_scaling(pclk, lclk, caps, timings, in_width, dispc_ovl_check()
2510 enum omap_overlay_caps caps, u32 paddr, u32 p_uv_addr, dispc_ovl_setup_common()
2556 r = dispc_ovl_calc_scaling(pclk, lclk, caps, mgr_timings, in_width, dispc_ovl_setup_common()
2641 dispc_ovl_set_pos(plane, caps, pos_x, pos_y); dispc_ovl_setup_common()
2645 if (caps & OMAP_DSS_OVL_CAP_SCALE) { dispc_ovl_setup_common()
2656 dispc_ovl_set_zorder(plane, caps, zorder); dispc_ovl_setup_common()
2657 dispc_ovl_set_pre_mult_alpha(plane, caps, pre_mult_alpha); dispc_ovl_setup_common()
2658 dispc_ovl_setup_global_alpha(plane, caps, global_alpha); dispc_ovl_setup_common()
2660 dispc_ovl_enable_replication(plane, caps, replication); dispc_ovl_setup_common()
2670 enum omap_overlay_caps caps = dss_feat_get_overlay_caps(plane); dispc_ovl_setup() local
2681 r = dispc_ovl_setup_common(plane, caps, oi->paddr, oi->p_uv_addr, dispc_ovl_setup()
2703 enum omap_overlay_caps caps = dispc_wb_setup() local
2711 r = dispc_ovl_setup_common(plane, caps, wi->paddr, wi->p_uv_addr, dispc_wb_setup()
741 dispc_ovl_set_pos(enum omap_plane plane, enum omap_overlay_caps caps, int x, int y) dispc_ovl_set_pos() argument
780 dispc_ovl_set_zorder(enum omap_plane plane, enum omap_overlay_caps caps, u8 zorder) dispc_ovl_set_zorder() argument
800 dispc_ovl_set_pre_mult_alpha(enum omap_plane plane, enum omap_overlay_caps caps, bool enable) dispc_ovl_set_pre_mult_alpha() argument
809 dispc_ovl_setup_global_alpha(enum omap_plane plane, enum omap_overlay_caps caps, u8 global_alpha) dispc_ovl_setup_global_alpha() argument
1111 dispc_ovl_enable_replication(enum omap_plane plane, enum omap_overlay_caps caps, bool enable) dispc_ovl_enable_replication() argument
2393 dispc_ovl_calc_scaling(unsigned long pclk, unsigned long lclk, enum omap_overlay_caps caps, const struct omap_video_timings *mgr_timings, u16 width, u16 height, u16 out_width, u16 out_height, enum omap_color_mode color_mode, bool *five_taps, int *x_predecim, int *y_predecim, u16 pos_x, enum omap_dss_rotation_type rotation_type, bool mem_to_mem) dispc_ovl_calc_scaling() argument
2509 dispc_ovl_setup_common(enum omap_plane plane, enum omap_overlay_caps caps, u32 paddr, u32 p_uv_addr, u16 screen_width, int pos_x, int pos_y, u16 width, u16 height, u16 out_width, u16 out_height, enum omap_color_mode color_mode, u8 rotation, bool mirror, u8 zorder, u8 pre_mult_alpha, u8 global_alpha, enum omap_dss_rotation_type rotation_type, bool replication, const struct omap_video_timings *mgr_timings, bool mem_to_mem) dispc_ovl_setup_common() argument
/linux-4.1.27/drivers/media/dvb-frontends/
H A Ddvb_dummy_fe.c174 .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
207 .caps = FE_CAN_QAM_16 | FE_CAN_QAM_32 | FE_CAN_QAM_64 |
237 .caps = FE_CAN_INVERSION_AUTO |
/linux-4.1.27/drivers/gpu/drm/gma500/
H A Dpsb_intel_sdvo.c85 struct psb_intel_sdvo_caps caps; member in struct:psb_intel_sdvo
1186 static bool psb_intel_sdvo_get_capabilities(struct psb_intel_sdvo *psb_intel_sdvo, struct psb_intel_sdvo_caps *caps) psb_intel_sdvo_get_capabilities() argument
1188 BUILD_BUG_ON(sizeof(*caps) != 8); psb_intel_sdvo_get_capabilities()
1191 caps, sizeof(*caps))) psb_intel_sdvo_get_capabilities()
1207 caps->vendor_id, psb_intel_sdvo_get_capabilities()
1208 caps->device_id, psb_intel_sdvo_get_capabilities()
1209 caps->device_rev_id, psb_intel_sdvo_get_capabilities()
1210 caps->sdvo_version_major, psb_intel_sdvo_get_capabilities()
1211 caps->sdvo_version_minor, psb_intel_sdvo_get_capabilities()
1212 caps->sdvo_inputs_mask, psb_intel_sdvo_get_capabilities()
1213 caps->smooth_scaling, psb_intel_sdvo_get_capabilities()
1214 caps->sharp_scaling, psb_intel_sdvo_get_capabilities()
1215 caps->up_scaling, psb_intel_sdvo_get_capabilities()
1216 caps->down_scaling, psb_intel_sdvo_get_capabilities()
1217 caps->stall_support, psb_intel_sdvo_get_capabilities()
1218 caps->output_flags); psb_intel_sdvo_get_capabilities()
1296 int caps = psb_intel_sdvo->caps.output_flags & 0xf; psb_intel_sdvo_multifunc_encoder() local
1297 return caps & -caps; psb_intel_sdvo_multifunc_encoder()
1390 if (psb_intel_sdvo->caps.output_flags & psb_intel_sdvo_detect()
1903 mask &= sdvo->caps.output_flags; psb_intel_sdvo_guess_ddc_bus()
2237 memcpy(bytes, &psb_intel_sdvo->caps.output_flags, 2); psb_intel_sdvo_output_setup()
2549 if (!psb_intel_sdvo_get_capabilities(psb_intel_sdvo, &psb_intel_sdvo->caps)) psb_intel_sdvo_init()
2553 psb_intel_sdvo->caps.output_flags) != true) { psb_intel_sdvo_init()
2575 psb_intel_sdvo->caps.vendor_id, psb_intel_sdvo->caps.device_id, psb_intel_sdvo_init()
2576 psb_intel_sdvo->caps.device_rev_id, psb_intel_sdvo_init()
2579 (psb_intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N', psb_intel_sdvo_init()
2580 (psb_intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N', psb_intel_sdvo_init()
2582 psb_intel_sdvo->caps.output_flags & psb_intel_sdvo_init()
2584 psb_intel_sdvo->caps.output_flags & psb_intel_sdvo_init()
/linux-4.1.27/arch/sh/include/asm/
H A Ddma.h78 const char **caps; member in struct:dma_channel
125 extern int request_dma_bycap(const char **dmac, const char **caps,
/linux-4.1.27/drivers/iio/adc/
H A Dat91_adc.c215 struct at91_adc_caps *caps; member in struct:at91_adc_state
845 if (!st->caps->has_tsmr) at91_adc_probe_dt_ts()
870 st->caps = (struct at91_adc_caps *) at91_adc_probe_dt()
906 st->registers = &st->caps->registers; at91_adc_probe_dt()
907 st->num_channels = st->caps->num_channels; at91_adc_probe_dt()
940 if (st->caps->has_ts)
959 st->caps = (struct at91_adc_caps *) at91_adc_probe_pdata()
965 st->num_channels = st->caps->num_channels; at91_adc_probe_pdata()
969 st->registers = &st->caps->registers; at91_adc_probe_pdata()
985 if (st->caps->has_tsmr) atmel_ts_open()
996 if (st->caps->has_tsmr) atmel_ts_close()
1021 if (!st->caps->has_tsmr) { at91_ts_hw_init()
1042 reg |= AT91_ADC_TSMR_TSAV_(st->caps->ts_filter_average) at91_ts_hw_init()
1056 at91_adc_writel(st, AT91_ADC_ACR, st->caps->ts_pen_detect_sensitivity at91_ts_hw_init()
1088 if (st->caps->has_tsmr) { at91_ts_register()
1178 if (st->caps->has_tsmr) at91_adc_probe()
1236 ticks = (*st->caps->calc_startup_ticks)(st->startup_time, adc_clk_khz); at91_adc_probe()
/linux-4.1.27/drivers/ide/
H A Dide-tape.c188 u8 caps[20]; member in struct:ide_tape_obj
1068 int sprev = !!(tape->caps[4] & 0x20); idetape_space_over_filemarks()
1634 u8 buf[24], *caps; idetape_get_mode_sense_results() local
1642 put_unaligned(52, (u16 *)&tape->caps[12]); idetape_get_mode_sense_results()
1643 put_unaligned(540, (u16 *)&tape->caps[14]); idetape_get_mode_sense_results()
1644 put_unaligned(6*52, (u16 *)&tape->caps[16]); idetape_get_mode_sense_results()
1647 caps = buf + 4 + buf[3]; idetape_get_mode_sense_results()
1650 speed = be16_to_cpup((__be16 *)&caps[14]); idetape_get_mode_sense_results()
1651 max_speed = be16_to_cpup((__be16 *)&caps[8]); idetape_get_mode_sense_results()
1653 *(u16 *)&caps[8] = max_speed; idetape_get_mode_sense_results()
1654 *(u16 *)&caps[12] = be16_to_cpup((__be16 *)&caps[12]); idetape_get_mode_sense_results()
1655 *(u16 *)&caps[14] = speed; idetape_get_mode_sense_results()
1656 *(u16 *)&caps[16] = be16_to_cpup((__be16 *)&caps[16]); idetape_get_mode_sense_results()
1661 *(u16 *)&caps[14] = 650; idetape_get_mode_sense_results()
1666 *(u16 *)&caps[8] = 650; idetape_get_mode_sense_results()
1669 memcpy(&tape->caps, caps, 20); idetape_get_mode_sense_results()
1672 if ((caps[6] & 1) == 0) idetape_get_mode_sense_results()
1675 if (caps[7] & 0x02) idetape_get_mode_sense_results()
1677 else if (caps[7] & 0x04) idetape_get_mode_sense_results()
1716 ide_tape_devset_r_field(speed, caps[14]); divf_buffer_size()
1717 ide_tape_devset_r_field(buffer, caps[16]); divf_buffer_size()
1748 u16 *ctl = (u16 *)&tape->caps[12]; idetape_setup()
1785 speed = max(*(u16 *)&tape->caps[14], *(u16 *)&tape->caps[8]); idetape_setup()
1797 drive->name, tape->name, *(u16 *)&tape->caps[14], idetape_setup()
1798 (*(u16 *)&tape->caps[16] * 512) / tape->buffer_size, idetape_setup()
/linux-4.1.27/include/linux/spi/
H A Dads7846.h26 * ~150 uSec with 0.01uF caps.
H A Dmmc_spi.h40 unsigned long caps; member in struct:mmc_spi_platform_data
/linux-4.1.27/arch/arm64/include/asm/
H A Dcpufeature.h67 void check_cpu_capabilities(const struct arm64_cpu_capabilities *caps,
/linux-4.1.27/security/
H A Dcommoncap.c96 * user namespace has all caps. cap_capable()
339 static inline int bprm_caps_from_vfs_caps(struct cpu_vfs_cap_data *caps, bprm_caps_from_vfs_caps() argument
348 if (caps->magic_etc & VFS_CAP_FLAGS_EFFECTIVE) bprm_caps_from_vfs_caps()
351 if (caps->magic_etc & VFS_CAP_REVISION_MASK) bprm_caps_from_vfs_caps()
355 __u32 permitted = caps->permitted.cap[i]; CAP_FOR_EACH_U32()
356 __u32 inheritable = caps->inheritable.cap[i]; CAP_FOR_EACH_U32()
387 struct vfs_cap_data caps; get_vfs_caps_from_disk() local
394 size = inode->i_op->getxattr((struct dentry *)dentry, XATTR_NAME_CAPS, &caps, get_vfs_caps_from_disk()
405 cpu_caps->magic_etc = magic_etc = le32_to_cpu(caps.magic_etc); get_vfs_caps_from_disk()
425 cpu_caps->permitted.cap[i] = le32_to_cpu(caps.data[i].permitted); CAP_FOR_EACH_U32()
426 cpu_caps->inheritable.cap[i] = le32_to_cpu(caps.data[i].inheritable); CAP_FOR_EACH_U32()
525 /* if we have fs caps, clear dangerous personality flags */ cap_bprm_set_creds()
562 * 1) cap_effective has all caps cap_bprm_set_creds()
564 * 3) root is supposed to have all caps (SECURE_NOROOT) cap_bprm_set_creds()
770 * yet with increased caps.
771 * So we check for increased caps on the target process.
/linux-4.1.27/tools/power/cpupower/utils/
H A Dcpupower-info.c75 } else if (!(cpupower_cpu_info.caps & CPUPOWER_CAP_PERF_BIAS)) { cmd_info()
/linux-4.1.27/include/linux/amba/
H A Dclcd.h103 u32 caps; member in struct:clcd_panel
130 u32 caps; member in struct:clcd_board
234 if (fb->panel->caps && fb->board->caps && clcdfb_decode()
/linux-4.1.27/drivers/infiniband/hw/mlx5/
H A Dodp.c121 struct ib_odp_caps *caps = &dev->odp_caps; mlx5_ib_internal_query_odp_caps() local
123 memset(caps, 0, sizeof(*caps)); mlx5_ib_internal_query_odp_caps()
125 if (!(dev->mdev->caps.gen.flags & MLX5_DEV_CAP_FLAG_ON_DMND_PG)) mlx5_ib_internal_query_odp_caps()
132 caps->general_caps = IB_ODP_SUPPORT; mlx5_ib_internal_query_odp_caps()
133 COPY_ODP_BIT_MLX_TO_IB(hw_caps, caps, per_transport_caps.ud_odp_caps, mlx5_ib_internal_query_odp_caps()
135 COPY_ODP_BIT_MLX_TO_IB(hw_caps, caps, per_transport_caps.rc_odp_caps, mlx5_ib_internal_query_odp_caps()
137 COPY_ODP_BIT_MLX_TO_IB(hw_caps, caps, per_transport_caps.rc_odp_caps, mlx5_ib_internal_query_odp_caps()
139 COPY_ODP_BIT_MLX_TO_IB(hw_caps, caps, per_transport_caps.rc_odp_caps, mlx5_ib_internal_query_odp_caps()
141 COPY_ODP_BIT_MLX_TO_IB(hw_caps, caps, per_transport_caps.rc_odp_caps, mlx5_ib_internal_query_odp_caps()
H A Dmain.c77 gen = &dev->mdev->caps.gen; mlx5_ib_query_device()
159 if (dev->mdev->caps.gen.flags & MLX5_DEV_CAP_FLAG_ON_DMND_PG) mlx5_ib_query_device()
181 gen = &dev->mdev->caps.gen; mlx5_ib_query_port()
406 gen = &dev->mdev->caps.gen; mlx5_ib_alloc_ucontext()
901 gen = &dev->mdev->caps.gen; get_ext_port_caps()
914 gen = &dev->mdev->caps.gen; get_port_caps()
1210 dev->ib_dev.local_dma_lkey = mdev->caps.gen.reserved_lkey; mlx5_ib_add()
1211 dev->num_ports = mdev->caps.gen.num_ports; mlx5_ib_add()
1291 if (mdev->caps.gen.flags & MLX5_DEV_CAP_FLAG_XRC) { mlx5_ib_add()
/linux-4.1.27/arch/x86/kernel/cpu/
H A Dperf_event_amd_ibs.c67 u32 caps; member in union:perf_ibs_data::__anon3135
551 ibs_data.caps = ibs_caps; perf_ibs_handle_irq()
688 u32 caps; __get_ibs_caps() local
699 caps = cpuid_eax(IBS_CPUID_FEATURES); __get_ibs_caps()
700 if (!(caps & IBS_CAPS_AVAIL)) __get_ibs_caps()
704 return caps; __get_ibs_caps()
930 u32 caps; amd_ibs_init() local
933 caps = __get_ibs_caps(); amd_ibs_init()
934 if (!caps) amd_ibs_init()
944 ibs_caps = caps; amd_ibs_init()
H A Dintel_pt.h82 u32 caps[4 * PT_CPUID_LEAVES]; member in struct:pt_pmu
H A Dperf_event_intel_pt.c47 * supported output schemes, are cached and exported to userspace as "caps"
49 * (/sys/bus/event_source/devices/intel_pt/caps/) so that userspace can store
76 u32 c = pt_pmu.caps[cd->leaf * 4 + cd->reg]; pt_cap_get()
94 .name = "caps",
132 &pt_pmu.caps[CR_EAX + i*4], pt_pmu_hw_init()
133 &pt_pmu.caps[CR_EBX + i*4], pt_pmu_hw_init()
134 &pt_pmu.caps[CR_ECX + i*4], pt_pmu_hw_init()
135 &pt_pmu.caps[CR_EDX + i*4]); pt_pmu_hw_init()
/linux-4.1.27/drivers/video/fbdev/omap2/omapfb/
H A Domapfb-ioctl.c335 if (display->caps & OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE) { omapfb_set_update_mode()
594 struct omapfb_caps caps; omapfb_ioctl() member in union:__anon10599
701 memset(&p.caps, 0, sizeof(p.caps)); omapfb_ioctl()
702 if (display->caps & OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE) omapfb_ioctl()
703 p.caps.ctrl |= OMAPFB_CAPS_MANUAL_UPDATE; omapfb_ioctl()
704 if (display->caps & OMAP_DSS_DISPLAY_CAP_TEAR_ELIM) omapfb_ioctl()
705 p.caps.ctrl |= OMAPFB_CAPS_TEARSYNC; omapfb_ioctl()
707 if (copy_to_user((void __user *)arg, &p.caps, sizeof(p.caps))) omapfb_ioctl()
/linux-4.1.27/arch/arm/mach-integrator/
H A Dimpd1.c96 .caps = CLCD_CAP_5551,
125 .caps = CLCD_CAP_5551,
152 .caps = CLCD_CAP_5551,
184 .caps = CLCD_CAP_5551,
258 .caps = CLCD_CAP_5551 | CLCD_CAP_888,
/linux-4.1.27/sound/core/
H A Dcompress_offload.c64 unsigned long caps; member in struct:snd_compr_file
433 struct snd_compr_caps caps; snd_compr_get_caps() local
438 memset(&caps, 0, sizeof(caps)); snd_compr_get_caps()
439 retval = stream->ops->get_caps(stream, &caps); snd_compr_get_caps()
442 if (copy_to_user((void __user *)arg, &caps, sizeof(caps))) snd_compr_get_caps()
453 struct snd_compr_codec_caps *caps; snd_compr_get_codec_caps() local
458 caps = kzalloc(sizeof(*caps), GFP_KERNEL); snd_compr_get_codec_caps()
459 if (!caps) snd_compr_get_codec_caps()
462 retval = stream->ops->get_codec_caps(stream, caps); snd_compr_get_codec_caps()
465 if (copy_to_user((void __user *)arg, caps, sizeof(*caps))) snd_compr_get_codec_caps()
469 kfree(caps); snd_compr_get_codec_caps()
/linux-4.1.27/sound/oss/
H A Dsb_common.c436 devc->caps |= SB_NO_MIDI; init_Jazz16()
533 devc->caps |= SB_PCI_IRQ; sb_dsp_detect()
541 devc->caps |= SB_PCI_IRQ; sb_dsp_detect()
605 devc->caps = SB_NO_AUDIO | SB_NO_MIDI; /* Mixer only */ sb_dsp_detect()
666 devc->caps = hw_config->driver_use_1; sb_dsp_init()
668 if (!((devc->caps & SB_NO_AUDIO) && (devc->caps & SB_NO_MIDI)) && hw_config->irq > 0) sb_dsp_init()
676 int i=(devc->caps&SB_PCI_IRQ)?IRQF_SHARED:0; sb_dsp_init()
810 devc->caps |= SB_NO_MIDI; sb_dsp_init()
813 if (!(devc->caps & SB_NO_MIXER)) sb_dsp_init()
817 if (!(devc->caps & SB_NO_MIDI)) sb_dsp_init()
853 if (!(devc->caps & SB_NO_AUDIO) && devc->dma8 >= 0) sb_dsp_init()
890 if (!(devc->caps & SB_NO_AUDIO)) sb_dsp_unload()
896 if (!(devc->caps & SB_NO_AUDIO && devc->caps & SB_NO_MIDI)) sb_dsp_unload()
/linux-4.1.27/drivers/video/fbdev/omap/
H A Domapfb_main.c1055 struct omapfb_caps *caps) omapfb_get_caps()
1057 memset(caps, 0, sizeof(*caps)); omapfb_get_caps()
1058 fbdev->ctrl->get_caps(plane, caps); omapfb_get_caps()
1059 caps->ctrl |= fbdev->panel->get_caps(fbdev->panel); omapfb_get_caps()
1097 struct omapfb_caps caps; omapfb_ioctl() member in union:__anon10585
1193 omapfb_get_caps(fbdev, plane->idx, &p.caps); omapfb_ioctl()
1194 if (copy_to_user((void __user *)arg, &p.caps, sizeof(p.caps))) omapfb_ioctl()
1280 struct omapfb_caps caps; omapfb_show_caps_num() local
1285 omapfb_get_caps(fbdev, plane, &caps); omapfb_show_caps_num()
1288 plane, caps.ctrl, caps.plane_color, caps.wnd_color); omapfb_show_caps_num()
1299 struct omapfb_caps caps; omapfb_show_caps_text() local
1306 omapfb_get_caps(fbdev, plane, &caps); omapfb_show_caps_text()
1311 if (ctrl_caps[i].flag & caps.ctrl) omapfb_show_caps_text()
1319 if (color_caps[i].flag & caps.plane_color) omapfb_show_caps_text()
1327 if (color_caps[i].flag & caps.wnd_color) omapfb_show_caps_text()
1054 omapfb_get_caps(struct omapfb_device *fbdev, int plane, struct omapfb_caps *caps) omapfb_get_caps() argument
/linux-4.1.27/drivers/scsi/ibmvscsi/
H A Dibmvscsi.c1106 hostdata->caps_addr = dma_map_single(hostdata->dev, &hostdata->caps, map_persist_bufs()
1107 sizeof(hostdata->caps), DMA_BIDIRECTIONAL); map_persist_bufs()
1121 sizeof(hostdata->caps), DMA_BIDIRECTIONAL); map_persist_bufs()
1137 sizeof(hostdata->caps), DMA_BIDIRECTIONAL); unmap_persist_bufs()
1235 if (hostdata->caps.migration.common.server_support != capabilities_rsp()
1240 if (hostdata->caps.reserve.common.server_support == capabilities_rsp()
1273 hostdata->caps.flags = cpu_to_be32(CAP_LIST_SUPPORTED); send_mad_capabilities()
1275 hostdata->caps.flags |= cpu_to_be32(CLIENT_MIGRATED); send_mad_capabilities()
1277 strncpy(hostdata->caps.name, dev_name(&hostdata->host->shost_gendev), send_mad_capabilities()
1278 sizeof(hostdata->caps.name)); send_mad_capabilities()
1279 hostdata->caps.name[sizeof(hostdata->caps.name) - 1] = '\0'; send_mad_capabilities()
1283 strncpy(hostdata->caps.loc, location, sizeof(hostdata->caps.loc)); send_mad_capabilities()
1284 hostdata->caps.loc[sizeof(hostdata->caps.loc) - 1] = '\0'; send_mad_capabilities()
1289 hostdata->caps.migration.common.cap_type = send_mad_capabilities()
1291 hostdata->caps.migration.common.length = send_mad_capabilities()
1292 cpu_to_be16(sizeof(hostdata->caps.migration)); send_mad_capabilities()
1293 hostdata->caps.migration.common.server_support = send_mad_capabilities()
1295 hostdata->caps.migration.ecl = cpu_to_be32(1); send_mad_capabilities()
1298 hostdata->caps.reserve.common.cap_type = send_mad_capabilities()
1300 hostdata->caps.reserve.common.length = send_mad_capabilities()
1301 cpu_to_be16(sizeof(hostdata->caps.reserve)); send_mad_capabilities()
1302 hostdata->caps.reserve.common.server_support = send_mad_capabilities()
1304 hostdata->caps.reserve.type = send_mad_capabilities()
1307 cpu_to_be16(sizeof(hostdata->caps)); send_mad_capabilities()
1309 req->common.length = cpu_to_be16(sizeof(hostdata->caps) - send_mad_capabilities()
1310 sizeof(hostdata->caps.reserve)); send_mad_capabilities()
1961 len = snprintf(buf, sizeof(hostdata->caps.loc), "%s\n", show_host_vhost_loc()
1962 hostdata->caps.loc); show_host_vhost_loc()
1981 len = snprintf(buf, sizeof(hostdata->caps.name), "%s\n", show_host_vhost_name()
1982 hostdata->caps.name); show_host_vhost_name()
H A Dibmvscsi.h105 struct capabilities caps; member in struct:ibmvscsi_host_data
/linux-4.1.27/drivers/scsi/ufs/
H A Dufs-qcom.h169 u32 caps; member in struct:ufs_qcom_host
190 if (host->caps & UFS_QCOM_CAP_QUNIPRO) ufs_qcom_cap_qunipro()
/linux-4.1.27/tools/power/cpupower/utils/idle_monitor/
H A Dnhm_idle.c174 if (!(cpupower_cpu_info.caps & CPUPOWER_CAP_INV_TSC)) intel_nhm_register()
177 if (!(cpupower_cpu_info.caps & CPUPOWER_CAP_APERF)) intel_nhm_register()
H A Dmperf_monitor.c240 if (!(cpupower_cpu_info.caps & CPUPOWER_CAP_INV_TSC)) init_maxfreq_mode()
300 if (!(cpupower_cpu_info.caps & CPUPOWER_CAP_APERF)) mperf_register()
/linux-4.1.27/sound/soc/intel/atom/sst/
H A Dsst_drv_interface.c395 static int sst_cdev_caps(struct snd_compr_caps *caps) sst_cdev_caps() argument
397 caps->num_codecs = NUM_CODEC; sst_cdev_caps()
398 caps->min_fragment_size = MIN_FRAGMENT_SIZE; /* 50KB */ sst_cdev_caps()
399 caps->max_fragment_size = MAX_FRAGMENT_SIZE; /* 1024KB */ sst_cdev_caps()
400 caps->min_fragments = MIN_FRAGMENT; sst_cdev_caps()
401 caps->max_fragments = MAX_FRAGMENT; sst_cdev_caps()
402 caps->codecs[0] = SND_AUDIOCODEC_MP3; sst_cdev_caps()
403 caps->codecs[1] = SND_AUDIOCODEC_AAC; sst_cdev_caps()
/linux-4.1.27/drivers/net/ethernet/adi/
H A Dbfin_mac.h103 struct ptp_clock_info caps; member in struct:bfin_mac_local
/linux-4.1.27/sound/firewire/dice/
H A Ddice-proc.c157 snd_iprintf(buffer, " clock caps:"); dice_proc_read()
190 snd_iprintf(buffer, " ac3 caps: %08x\n", dice_proc_read()
216 snd_iprintf(buffer, " ac3 caps: %08x\n", dice_proc_read()
/linux-4.1.27/drivers/gpu/drm/i915/
H A Dintel_sdvo.c86 struct intel_sdvo_caps caps; member in struct:intel_sdvo
1579 static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps) intel_sdvo_get_capabilities() argument
1581 BUILD_BUG_ON(sizeof(*caps) != 8); intel_sdvo_get_capabilities()
1584 caps, sizeof(*caps))) intel_sdvo_get_capabilities()
1600 caps->vendor_id, intel_sdvo_get_capabilities()
1601 caps->device_id, intel_sdvo_get_capabilities()
1602 caps->device_rev_id, intel_sdvo_get_capabilities()
1603 caps->sdvo_version_major, intel_sdvo_get_capabilities()
1604 caps->sdvo_version_minor, intel_sdvo_get_capabilities()
1605 caps->sdvo_inputs_mask, intel_sdvo_get_capabilities()
1606 caps->smooth_scaling, intel_sdvo_get_capabilities()
1607 caps->sharp_scaling, intel_sdvo_get_capabilities()
1608 caps->up_scaling, intel_sdvo_get_capabilities()
1609 caps->down_scaling, intel_sdvo_get_capabilities()
1610 caps->stall_support, intel_sdvo_get_capabilities()
1611 caps->output_flags); intel_sdvo_get_capabilities()
1648 return hweight16(intel_sdvo->caps.output_flags) > 1; intel_sdvo_multifunc_encoder()
2248 mask &= sdvo->caps.output_flags; intel_sdvo_guess_ddc_bus()
2671 memcpy(bytes, &intel_sdvo->caps.output_flags, 2); intel_sdvo_output_setup()
2997 if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps)) intel_sdvo_init()
3001 intel_sdvo->caps.output_flags) != true) { intel_sdvo_init()
3042 intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id, intel_sdvo_init()
3043 intel_sdvo->caps.device_rev_id, intel_sdvo_init()
3046 (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N', intel_sdvo_init()
3047 (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N', intel_sdvo_init()
3049 intel_sdvo->caps.output_flags & intel_sdvo_init()
3051 intel_sdvo->caps.output_flags & intel_sdvo_init()
/linux-4.1.27/include/linux/mmc/
H A Dhost.h235 u32 caps; /* Host capabilities */ member in struct:mmc_host
387 #define mmc_host_is_spi(host) ((host)->caps & MMC_CAP_SPI)
433 return !(host->caps & MMC_CAP_NONREMOVABLE); mmc_card_is_removable()
448 return host->caps & MMC_CAP_CMD23; mmc_host_cmd23()
458 return host->caps & mmc_host_uhs()
/linux-4.1.27/include/linux/mlx4/
H A Ddevice.h819 struct mlx4_caps caps; member in struct:mlx4_dev
947 for ((port) = 1; (port) <= (dev)->caps.num_ports; (port)++) \
948 if ((type) == (dev)->caps.port_mask[(port)])
951 for ((port) = 1; (port) <= (dev)->caps.num_ports; (port)++) \
952 if (((dev)->caps.port_mask[port] != MLX4_PORT_TYPE_IB))
955 for ((port) = 1; (port) <= (dev)->caps.num_ports; (port)++) \
956 if (((dev)->caps.port_mask[port] == MLX4_PORT_TYPE_IB) || \
957 ((dev)->caps.flags & MLX4_DEV_CAP_FLAG_IBOE))
965 return dev->caps.function; mlx4_master_func_num()
984 (qpn < dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW]); mlx4_is_qp_reserved()
1009 return dev->caps.port_type[port] == MLX4_PORT_TYPE_IB ? 0 : 1; mlx4_is_eth()
/linux-4.1.27/drivers/video/fbdev/core/
H A Dsvgalib.c351 void svga_get_caps(struct fb_info *info, struct fb_blit_caps *caps, svga_get_caps() argument
356 caps->x = 1 << (8 - 1); svga_get_caps()
357 caps->y = 1 << (16 - 1); svga_get_caps()
358 caps->len = 256; svga_get_caps()
360 caps->x = (var->bits_per_pixel == 4) ? 1 << (8 - 1) : ~(u32)0; svga_get_caps()
361 caps->y = ~(u32)0; svga_get_caps()
362 caps->len = ~(u32)0; svga_get_caps()
/linux-4.1.27/drivers/net/ethernet/cadence/
H A Dmacb.c273 bp->caps & MACB_CAPS_GIGABIT_MODE_AVAILABLE) macb_handle_link_change()
348 if (macb_is_gem(bp) && bp->caps & MACB_CAPS_GIGABIT_MODE_AVAILABLE) macb_mii_probe()
353 if (bp->caps & MACB_CAPS_NO_GIGABIT_HALF) macb_mii_probe()
615 if (bp->caps & MACB_CAPS_ISR_CLEAR_ON_WRITE) macb_tx_interrupt()
969 if (bp->caps & MACB_CAPS_ISR_CLEAR_ON_WRITE) macb_poll()
1016 if (bp->caps & MACB_CAPS_ISR_CLEAR_ON_WRITE) macb_interrupt()
1029 if (bp->caps & MACB_CAPS_ISR_CLEAR_ON_WRITE) macb_interrupt()
1054 if (bp->caps & MACB_CAPS_ISR_CLEAR_ON_WRITE) macb_interrupt()
1065 if (bp->caps & MACB_CAPS_ISR_CLEAR_ON_WRITE) macb_interrupt()
1077 if (bp->caps & MACB_CAPS_ISR_CLEAR_ON_WRITE) macb_interrupt()
2161 bp->caps = dt_conf->caps; macb_configure_caps()
2164 bp->caps |= MACB_CAPS_MACB_IS_GEM; macb_configure_caps()
2168 bp->caps |= MACB_CAPS_ISR_CLEAR_ON_WRITE; macb_configure_caps()
2171 bp->caps |= MACB_CAPS_FIFO_MODE; macb_configure_caps()
2174 netdev_dbg(bp->dev, "Cadence caps 0x%08x\n", bp->caps); macb_configure_caps()
2333 if (macb_is_gem(bp) && !(bp->caps & MACB_CAPS_FIFO_MODE)) macb_init()
2335 if (bp->caps & MACB_CAPS_SG_DISABLED) macb_init()
2343 (bp->caps & MACB_CAPS_USRIO_DEFAULT_IS_MII)) macb_init()
2345 else if (!(bp->caps & MACB_CAPS_USRIO_DEFAULT_IS_MII)) macb_init()
2348 if (bp->caps & MACB_CAPS_USRIO_HAS_CLKEN) macb_init()
2674 .caps = MACB_CAPS_USRIO_HAS_CLKEN | MACB_CAPS_USRIO_DEFAULT_IS_MII,
2680 .caps = MACB_CAPS_SG_DISABLED | MACB_CAPS_GIGABIT_MODE_AVAILABLE,
2687 .caps = MACB_CAPS_SG_DISABLED | MACB_CAPS_GIGABIT_MODE_AVAILABLE,
2694 .caps = 0,
2706 .caps = MACB_CAPS_SG_DISABLED | MACB_CAPS_GIGABIT_MODE_AVAILABLE |
/linux-4.1.27/drivers/memstick/core/
H A Dmspro_block.c141 unsigned int caps; member in struct:mspro_block_data
597 if (msb->caps & MEMSTICK_CAP_AUTO_GET_INT) h_mspro_block_transfer_data()
652 if (msb->caps & MEMSTICK_CAP_AUTO_GET_INT) { h_mspro_block_transfer_data()
906 if (msb->caps & MEMSTICK_CAP_PAR4) mspro_block_switch_interface()
923 if (msb->caps & MEMSTICK_CAP_PAR8) { mspro_block_switch_interface()
966 if (msb->caps & MEMSTICK_CAP_PAR8) { mspro_block_switch_interface()
967 msb->caps &= ~MEMSTICK_CAP_PAR8; mspro_block_switch_interface()
1146 msb->caps = host->caps; mspro_block_init_card()
1159 msb->caps |= MEMSTICK_CAP_AUTO_GET_INT; mspro_block_init_card()
/linux-4.1.27/include/uapi/linux/dvb/
H A Ddmx.h121 __u32 caps; member in struct:dmx_caps
/linux-4.1.27/include/linux/
H A Dsvga.h114 void svga_get_caps(struct fb_info *info, struct fb_blit_caps *caps,
H A Dbinfmts.h30 * its parent's caps anyway */
H A Dcred.h136 kernel_cap_t cap_inheritable; /* caps our children can inherit */
137 kernel_cap_t cap_permitted; /* caps we're permitted */
138 kernel_cap_t cap_effective; /* caps we can actually use */
152 struct user_namespace *user_ns; /* user_ns the caps and keyrings are relative to. */
/linux-4.1.27/drivers/media/usb/ttusb-dec/
H A Dttusbdecfe.c255 .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
280 .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
/linux-4.1.27/drivers/net/ethernet/chelsio/cxgb/
H A Dcommon.h272 unsigned long caps; member in struct:board_info
318 #define is_10G(adapter) (board_info(adapter)->caps & SUPPORTED_10000baseT_Full)
H A Dsubr.c274 if (!(bi->caps & SUPPORTED_10000baseT_Full)) mi1_mdio_init()
395 .caps = SUPPORTED_10000baseT_Full,
417 .caps = SUPPORTED_10000baseT_Full | SUPPORTED_FIBRE,
437 .caps = SUPPORTED_10000baseT_Full | SUPPORTED_FIBRE,
457 .caps = SUPPORTED_10000baseT_Full,
479 .caps = SUPPORTED_10000baseT_Full,
502 .caps = SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full
1033 lc->supported = bi->caps; init_link_config()
/linux-4.1.27/drivers/dma/
H A Ddmaengine.c464 int dma_get_slave_caps(struct dma_chan *chan, struct dma_slave_caps *caps) dma_get_slave_caps() argument
468 if (!chan || !caps) dma_get_slave_caps()
485 caps->src_addr_widths = device->src_addr_widths; dma_get_slave_caps()
486 caps->dst_addr_widths = device->dst_addr_widths; dma_get_slave_caps()
487 caps->directions = device->directions; dma_get_slave_caps()
488 caps->residue_granularity = device->residue_granularity; dma_get_slave_caps()
494 caps->cmd_pause = !!(device->device_pause && device->device_resume); dma_get_slave_caps()
495 caps->cmd_terminate = !!device->device_terminate_all; dma_get_slave_caps()
/linux-4.1.27/arch/x86/include/asm/
H A Dxsave.h71 * This function is called only during boot time when x86 caps are not set
98 * This function is called only during boot time when x86 caps are not set
/linux-4.1.27/include/sound/
H A Dhdaudio.h57 unsigned int power_caps; /* FG power caps */
80 bool caps_overwriting:1; /* caps overwrite being in process */
/linux-4.1.27/sound/hda/
H A Dhdac_sysfs.c73 * /sys/bus/hdaudioC0D0/widgets/04/caps
260 static WIDGET_ATTR_RO(caps);
/linux-4.1.27/sound/soc/intel/atom/
H A Dsst-mfld-platform-compress.c231 struct snd_compr_caps *caps) sst_platform_compr_get_caps()
236 return stream->compr_ops->get_caps(caps); sst_platform_compr_get_caps()
230 sst_platform_compr_get_caps(struct snd_compr_stream *cstream, struct snd_compr_caps *caps) sst_platform_compr_get_caps() argument

Completed in 7700 milliseconds

1234