1/*
2 * Copyright (c) 2007 Mellanox Technologies. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses.  You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 *     Redistribution and use in source and binary forms, with or
11 *     without modification, are permitted provided that the following
12 *     conditions are met:
13 *
14 *      - Redistributions of source code must retain the above
15 *        copyright notice, this list of conditions and the following
16 *        disclaimer.
17 *
18 *      - Redistributions in binary form must reproduce the above
19 *        copyright notice, this list of conditions and the following
20 *        disclaimer in the documentation and/or other materials
21 *        provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 *
32 */
33
34#include <linux/mlx4/cq.h>
35#include <linux/mlx4/qp.h>
36#include <linux/mlx4/cmd.h>
37
38#include "mlx4_en.h"
39
40static void mlx4_en_cq_event(struct mlx4_cq *cq, enum mlx4_event event)
41{
42	return;
43}
44
45
46int mlx4_en_create_cq(struct mlx4_en_priv *priv,
47		      struct mlx4_en_cq **pcq,
48		      int entries, int ring, enum cq_type mode,
49		      int node)
50{
51	struct mlx4_en_dev *mdev = priv->mdev;
52	struct mlx4_en_cq *cq;
53	int err;
54
55	cq = kzalloc_node(sizeof(*cq), GFP_KERNEL, node);
56	if (!cq) {
57		cq = kzalloc(sizeof(*cq), GFP_KERNEL);
58		if (!cq) {
59			en_err(priv, "Failed to allocate CQ structure\n");
60			return -ENOMEM;
61		}
62	}
63
64	cq->size = entries;
65	cq->buf_size = cq->size * mdev->dev->caps.cqe_size;
66
67	cq->ring = ring;
68	cq->is_tx = mode;
69
70	/* Allocate HW buffers on provided NUMA node.
71	 * dev->numa_node is used in mtt range allocation flow.
72	 */
73	set_dev_node(&mdev->dev->persist->pdev->dev, node);
74	err = mlx4_alloc_hwq_res(mdev->dev, &cq->wqres,
75				cq->buf_size, 2 * PAGE_SIZE);
76	set_dev_node(&mdev->dev->persist->pdev->dev, mdev->dev->numa_node);
77	if (err)
78		goto err_cq;
79
80	err = mlx4_en_map_buffer(&cq->wqres.buf);
81	if (err)
82		goto err_res;
83
84	cq->buf = (struct mlx4_cqe *)cq->wqres.buf.direct.buf;
85	*pcq = cq;
86
87	return 0;
88
89err_res:
90	mlx4_free_hwq_res(mdev->dev, &cq->wqres, cq->buf_size);
91err_cq:
92	kfree(cq);
93	*pcq = NULL;
94	return err;
95}
96
97int mlx4_en_activate_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq,
98			int cq_idx)
99{
100	struct mlx4_en_dev *mdev = priv->mdev;
101	int err = 0;
102	char name[25];
103	int timestamp_en = 0;
104	struct cpu_rmap *rmap =
105#ifdef CONFIG_RFS_ACCEL
106		priv->dev->rx_cpu_rmap;
107#else
108		NULL;
109#endif
110
111	cq->dev = mdev->pndev[priv->port];
112	cq->mcq.set_ci_db  = cq->wqres.db.db;
113	cq->mcq.arm_db     = cq->wqres.db.db + 1;
114	*cq->mcq.set_ci_db = 0;
115	*cq->mcq.arm_db    = 0;
116	memset(cq->buf, 0, cq->buf_size);
117
118	if (cq->is_tx == RX) {
119		if (mdev->dev->caps.comp_pool) {
120			if (!cq->vector) {
121				sprintf(name, "%s-%d", priv->dev->name,
122					cq->ring);
123				/* Set IRQ for specific name (per ring) */
124				if (mlx4_assign_eq(mdev->dev, name, rmap,
125						   &cq->vector)) {
126					cq->vector = (cq->ring + 1 + priv->port)
127					    % mdev->dev->caps.num_comp_vectors;
128					mlx4_warn(mdev, "Failed assigning an EQ to %s, falling back to legacy EQ's\n",
129						  name);
130				}
131
132			}
133		} else {
134			cq->vector = (cq->ring + 1 + priv->port) %
135				mdev->dev->caps.num_comp_vectors;
136		}
137
138		cq->irq_desc =
139			irq_to_desc(mlx4_eq_get_irq(mdev->dev,
140						    cq->vector));
141	} else {
142		/* For TX we use the same irq per
143		ring we assigned for the RX    */
144		struct mlx4_en_cq *rx_cq;
145
146		cq_idx = cq_idx % priv->rx_ring_num;
147		rx_cq = priv->rx_cq[cq_idx];
148		cq->vector = rx_cq->vector;
149	}
150
151	if (!cq->is_tx)
152		cq->size = priv->rx_ring[cq->ring]->actual_size;
153
154	if ((cq->is_tx && priv->hwtstamp_config.tx_type) ||
155	    (!cq->is_tx && priv->hwtstamp_config.rx_filter))
156		timestamp_en = 1;
157
158	err = mlx4_cq_alloc(mdev->dev, cq->size, &cq->wqres.mtt,
159			    &mdev->priv_uar, cq->wqres.db.dma, &cq->mcq,
160			    cq->vector, 0, timestamp_en);
161	if (err)
162		return err;
163
164	cq->mcq.comp  = cq->is_tx ? mlx4_en_tx_irq : mlx4_en_rx_irq;
165	cq->mcq.event = mlx4_en_cq_event;
166
167	if (cq->is_tx) {
168		netif_napi_add(cq->dev, &cq->napi, mlx4_en_poll_tx_cq,
169			       NAPI_POLL_WEIGHT);
170	} else {
171		struct mlx4_en_rx_ring *ring = priv->rx_ring[cq->ring];
172
173		err = irq_set_affinity_hint(cq->mcq.irq,
174					    ring->affinity_mask);
175		if (err)
176			mlx4_warn(mdev, "Failed setting affinity hint\n");
177
178		netif_napi_add(cq->dev, &cq->napi, mlx4_en_poll_rx_cq, 64);
179		napi_hash_add(&cq->napi);
180	}
181
182	napi_enable(&cq->napi);
183
184	return 0;
185}
186
187void mlx4_en_destroy_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq **pcq)
188{
189	struct mlx4_en_dev *mdev = priv->mdev;
190	struct mlx4_en_cq *cq = *pcq;
191
192	mlx4_en_unmap_buffer(&cq->wqres.buf);
193	mlx4_free_hwq_res(mdev->dev, &cq->wqres, cq->buf_size);
194	if (priv->mdev->dev->caps.comp_pool && cq->vector) {
195		mlx4_release_eq(priv->mdev->dev, cq->vector);
196	}
197	cq->vector = 0;
198	cq->buf_size = 0;
199	cq->buf = NULL;
200	kfree(cq);
201	*pcq = NULL;
202}
203
204void mlx4_en_deactivate_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq)
205{
206	napi_disable(&cq->napi);
207	if (!cq->is_tx) {
208		napi_hash_del(&cq->napi);
209		synchronize_rcu();
210		irq_set_affinity_hint(cq->mcq.irq, NULL);
211	}
212	netif_napi_del(&cq->napi);
213
214	mlx4_cq_free(priv->mdev->dev, &cq->mcq);
215}
216
217/* Set rx cq moderation parameters */
218int mlx4_en_set_cq_moder(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq)
219{
220	return mlx4_cq_modify(priv->mdev->dev, &cq->mcq,
221			      cq->moder_cnt, cq->moder_time);
222}
223
224int mlx4_en_arm_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq)
225{
226	mlx4_cq_arm(&cq->mcq, MLX4_CQ_DB_REQ_NOT, priv->mdev->uar_map,
227		    &priv->mdev->uar_lock);
228
229	return 0;
230}
231
232
233