1/* 2 * linux/arch/arm/mach-omap2/hsmmc.c 3 * 4 * Copyright (C) 2007-2008 Texas Instruments 5 * Copyright (C) 2008 Nokia Corporation 6 * Author: Texas Instruments 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License version 2 as 10 * published by the Free Software Foundation. 11 */ 12#include <linux/kernel.h> 13#include <linux/slab.h> 14#include <linux/string.h> 15#include <linux/delay.h> 16#include <linux/gpio.h> 17#include <linux/mmc/host.h> 18#include <linux/platform_data/gpio-omap.h> 19#include <linux/platform_data/hsmmc-omap.h> 20 21#include "soc.h" 22#include "omap_device.h" 23#include "omap-pm.h" 24 25#include "mux.h" 26#include "hsmmc.h" 27#include "control.h" 28 29#if defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE) 30 31static u16 control_pbias_offset; 32static u16 control_devconf1_offset; 33 34#define HSMMC_NAME_LEN 9 35 36static void omap_hsmmc1_before_set_reg(struct device *dev, 37 int power_on, int vdd) 38{ 39 u32 reg, prog_io; 40 struct omap_hsmmc_platform_data *mmc = dev->platform_data; 41 42 if (mmc->remux) 43 mmc->remux(dev, power_on); 44 45 /* 46 * Assume we power both OMAP VMMC1 (for CMD, CLK, DAT0..3) and the 47 * card with Vcc regulator (from twl4030 or whatever). OMAP has both 48 * 1.8V and 3.0V modes, controlled by the PBIAS register. 49 * 50 * In 8-bit modes, OMAP VMMC1A (for DAT4..7) needs a supply, which 51 * is most naturally TWL VSIM; those pins also use PBIAS. 52 * 53 * FIXME handle VMMC1A as needed ... 54 */ 55 if (power_on) { 56 if (cpu_is_omap2430()) { 57 reg = omap_ctrl_readl(OMAP243X_CONTROL_DEVCONF1); 58 if ((1 << vdd) >= MMC_VDD_30_31) 59 reg |= OMAP243X_MMC1_ACTIVE_OVERWRITE; 60 else 61 reg &= ~OMAP243X_MMC1_ACTIVE_OVERWRITE; 62 omap_ctrl_writel(reg, OMAP243X_CONTROL_DEVCONF1); 63 } 64 65 if (mmc->internal_clock) { 66 reg = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0); 67 reg |= OMAP2_MMCSDIO1ADPCLKISEL; 68 omap_ctrl_writel(reg, OMAP2_CONTROL_DEVCONF0); 69 } 70 71 reg = omap_ctrl_readl(control_pbias_offset); 72 if (cpu_is_omap3630()) { 73 /* Set MMC I/O to 52Mhz */ 74 prog_io = omap_ctrl_readl(OMAP343X_CONTROL_PROG_IO1); 75 prog_io |= OMAP3630_PRG_SDMMC1_SPEEDCTRL; 76 omap_ctrl_writel(prog_io, OMAP343X_CONTROL_PROG_IO1); 77 } else { 78 reg |= OMAP2_PBIASSPEEDCTRL0; 79 } 80 reg &= ~OMAP2_PBIASLITEPWRDNZ0; 81 omap_ctrl_writel(reg, control_pbias_offset); 82 } else { 83 reg = omap_ctrl_readl(control_pbias_offset); 84 reg &= ~OMAP2_PBIASLITEPWRDNZ0; 85 omap_ctrl_writel(reg, control_pbias_offset); 86 } 87} 88 89static void omap_hsmmc1_after_set_reg(struct device *dev, int power_on, int vdd) 90{ 91 u32 reg; 92 93 /* 100ms delay required for PBIAS configuration */ 94 msleep(100); 95 96 if (power_on) { 97 reg = omap_ctrl_readl(control_pbias_offset); 98 reg |= (OMAP2_PBIASLITEPWRDNZ0 | OMAP2_PBIASSPEEDCTRL0); 99 if ((1 << vdd) <= MMC_VDD_165_195) 100 reg &= ~OMAP2_PBIASLITEVMODE0; 101 else 102 reg |= OMAP2_PBIASLITEVMODE0; 103 omap_ctrl_writel(reg, control_pbias_offset); 104 } else { 105 reg = omap_ctrl_readl(control_pbias_offset); 106 reg |= (OMAP2_PBIASSPEEDCTRL0 | OMAP2_PBIASLITEPWRDNZ0 | 107 OMAP2_PBIASLITEVMODE0); 108 omap_ctrl_writel(reg, control_pbias_offset); 109 } 110} 111 112static void hsmmc2_select_input_clk_src(struct omap_hsmmc_platform_data *mmc) 113{ 114 u32 reg; 115 116 reg = omap_ctrl_readl(control_devconf1_offset); 117 if (mmc->internal_clock) 118 reg |= OMAP2_MMCSDIO2ADPCLKISEL; 119 else 120 reg &= ~OMAP2_MMCSDIO2ADPCLKISEL; 121 omap_ctrl_writel(reg, control_devconf1_offset); 122} 123 124static void hsmmc2_before_set_reg(struct device *dev, int power_on, int vdd) 125{ 126 struct omap_hsmmc_platform_data *mmc = dev->platform_data; 127 128 if (mmc->remux) 129 mmc->remux(dev, power_on); 130 131 if (power_on) 132 hsmmc2_select_input_clk_src(mmc); 133} 134 135static int am35x_hsmmc2_set_power(struct device *dev, int power_on, int vdd) 136{ 137 struct omap_hsmmc_platform_data *mmc = dev->platform_data; 138 139 if (power_on) 140 hsmmc2_select_input_clk_src(mmc); 141 142 return 0; 143} 144 145static int nop_mmc_set_power(struct device *dev, int power_on, int vdd) 146{ 147 return 0; 148} 149 150static inline void omap_hsmmc_mux(struct omap_hsmmc_platform_data 151 *mmc_controller, int controller_nr) 152{ 153 if (gpio_is_valid(mmc_controller->gpio_cd) && 154 (mmc_controller->gpio_cd < OMAP_MAX_GPIO_LINES)) 155 omap_mux_init_gpio(mmc_controller->gpio_cd, 156 OMAP_PIN_INPUT_PULLUP); 157 if (gpio_is_valid(mmc_controller->gpio_cod) && 158 (mmc_controller->gpio_cod < OMAP_MAX_GPIO_LINES)) 159 omap_mux_init_gpio(mmc_controller->gpio_cod, 160 OMAP_PIN_INPUT_PULLUP); 161 if (gpio_is_valid(mmc_controller->gpio_wp) && 162 (mmc_controller->gpio_wp < OMAP_MAX_GPIO_LINES)) 163 omap_mux_init_gpio(mmc_controller->gpio_wp, 164 OMAP_PIN_INPUT_PULLUP); 165 if (cpu_is_omap34xx()) { 166 if (controller_nr == 0) { 167 omap_mux_init_signal("sdmmc1_clk", 168 OMAP_PIN_INPUT_PULLUP); 169 omap_mux_init_signal("sdmmc1_cmd", 170 OMAP_PIN_INPUT_PULLUP); 171 omap_mux_init_signal("sdmmc1_dat0", 172 OMAP_PIN_INPUT_PULLUP); 173 if (mmc_controller->caps & 174 (MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA)) { 175 omap_mux_init_signal("sdmmc1_dat1", 176 OMAP_PIN_INPUT_PULLUP); 177 omap_mux_init_signal("sdmmc1_dat2", 178 OMAP_PIN_INPUT_PULLUP); 179 omap_mux_init_signal("sdmmc1_dat3", 180 OMAP_PIN_INPUT_PULLUP); 181 } 182 if (mmc_controller->caps & 183 MMC_CAP_8_BIT_DATA) { 184 omap_mux_init_signal("sdmmc1_dat4", 185 OMAP_PIN_INPUT_PULLUP); 186 omap_mux_init_signal("sdmmc1_dat5", 187 OMAP_PIN_INPUT_PULLUP); 188 omap_mux_init_signal("sdmmc1_dat6", 189 OMAP_PIN_INPUT_PULLUP); 190 omap_mux_init_signal("sdmmc1_dat7", 191 OMAP_PIN_INPUT_PULLUP); 192 } 193 } 194 if (controller_nr == 1) { 195 /* MMC2 */ 196 omap_mux_init_signal("sdmmc2_clk", 197 OMAP_PIN_INPUT_PULLUP); 198 omap_mux_init_signal("sdmmc2_cmd", 199 OMAP_PIN_INPUT_PULLUP); 200 omap_mux_init_signal("sdmmc2_dat0", 201 OMAP_PIN_INPUT_PULLUP); 202 203 /* 204 * For 8 wire configurations, Lines DAT4, 5, 6 and 7 205 * need to be muxed in the board-*.c files 206 */ 207 if (mmc_controller->caps & 208 (MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA)) { 209 omap_mux_init_signal("sdmmc2_dat1", 210 OMAP_PIN_INPUT_PULLUP); 211 omap_mux_init_signal("sdmmc2_dat2", 212 OMAP_PIN_INPUT_PULLUP); 213 omap_mux_init_signal("sdmmc2_dat3", 214 OMAP_PIN_INPUT_PULLUP); 215 } 216 if (mmc_controller->caps & 217 MMC_CAP_8_BIT_DATA) { 218 omap_mux_init_signal("sdmmc2_dat4.sdmmc2_dat4", 219 OMAP_PIN_INPUT_PULLUP); 220 omap_mux_init_signal("sdmmc2_dat5.sdmmc2_dat5", 221 OMAP_PIN_INPUT_PULLUP); 222 omap_mux_init_signal("sdmmc2_dat6.sdmmc2_dat6", 223 OMAP_PIN_INPUT_PULLUP); 224 omap_mux_init_signal("sdmmc2_dat7.sdmmc2_dat7", 225 OMAP_PIN_INPUT_PULLUP); 226 } 227 } 228 229 /* 230 * For MMC3 the pins need to be muxed in the board-*.c files 231 */ 232 } 233} 234 235static int __init omap_hsmmc_pdata_init(struct omap2_hsmmc_info *c, 236 struct omap_hsmmc_platform_data *mmc) 237{ 238 char *hc_name; 239 240 hc_name = kzalloc(sizeof(char) * (HSMMC_NAME_LEN + 1), GFP_KERNEL); 241 if (!hc_name) { 242 pr_err("Cannot allocate memory for controller slot name\n"); 243 kfree(hc_name); 244 return -ENOMEM; 245 } 246 247 if (c->name) 248 strncpy(hc_name, c->name, HSMMC_NAME_LEN); 249 else 250 snprintf(hc_name, (HSMMC_NAME_LEN + 1), "mmc%islot%i", 251 c->mmc, 1); 252 mmc->name = hc_name; 253 mmc->caps = c->caps; 254 mmc->internal_clock = !c->ext_clock; 255 mmc->reg_offset = 0; 256 257 if (c->cover_only) { 258 /* detect if mobile phone cover removed */ 259 mmc->gpio_cd = -EINVAL; 260 mmc->gpio_cod = c->gpio_cd; 261 } else { 262 /* card detect pin on the mmc socket itself */ 263 mmc->gpio_cd = c->gpio_cd; 264 mmc->gpio_cod = -EINVAL; 265 } 266 mmc->gpio_wp = c->gpio_wp; 267 268 mmc->remux = c->remux; 269 mmc->init_card = c->init_card; 270 271 if (c->nonremovable) 272 mmc->nonremovable = 1; 273 274 /* 275 * NOTE: MMC slots should have a Vcc regulator set up. 276 * This may be from a TWL4030-family chip, another 277 * controllable regulator, or a fixed supply. 278 * 279 * temporary HACK: ocr_mask instead of fixed supply 280 */ 281 if (soc_is_am35xx()) 282 mmc->ocr_mask = MMC_VDD_165_195 | 283 MMC_VDD_26_27 | 284 MMC_VDD_27_28 | 285 MMC_VDD_29_30 | 286 MMC_VDD_30_31 | 287 MMC_VDD_31_32; 288 else 289 mmc->ocr_mask = c->ocr_mask; 290 291 if (!soc_is_am35xx()) 292 mmc->features |= HSMMC_HAS_PBIAS; 293 294 switch (c->mmc) { 295 case 1: 296 if (mmc->features & HSMMC_HAS_PBIAS) { 297 /* on-chip level shifting via PBIAS0/PBIAS1 */ 298 mmc->before_set_reg = 299 omap_hsmmc1_before_set_reg; 300 mmc->after_set_reg = 301 omap_hsmmc1_after_set_reg; 302 } 303 304 if (soc_is_am35xx()) 305 mmc->set_power = nop_mmc_set_power; 306 307 /* OMAP3630 HSMMC1 supports only 4-bit */ 308 if (cpu_is_omap3630() && 309 (c->caps & MMC_CAP_8_BIT_DATA)) { 310 c->caps &= ~MMC_CAP_8_BIT_DATA; 311 c->caps |= MMC_CAP_4_BIT_DATA; 312 mmc->caps = c->caps; 313 } 314 break; 315 case 2: 316 if (soc_is_am35xx()) 317 mmc->set_power = am35x_hsmmc2_set_power; 318 319 if (c->ext_clock) 320 c->transceiver = 1; 321 if (c->transceiver && (c->caps & MMC_CAP_8_BIT_DATA)) { 322 c->caps &= ~MMC_CAP_8_BIT_DATA; 323 c->caps |= MMC_CAP_4_BIT_DATA; 324 } 325 if (mmc->features & HSMMC_HAS_PBIAS) { 326 /* off-chip level shifting, or none */ 327 mmc->before_set_reg = hsmmc2_before_set_reg; 328 mmc->after_set_reg = NULL; 329 } 330 break; 331 case 3: 332 case 4: 333 case 5: 334 mmc->before_set_reg = NULL; 335 mmc->after_set_reg = NULL; 336 break; 337 default: 338 pr_err("MMC%d configuration not supported!\n", c->mmc); 339 kfree(hc_name); 340 return -ENODEV; 341 } 342 return 0; 343} 344 345static int omap_hsmmc_done; 346 347void omap_hsmmc_late_init(struct omap2_hsmmc_info *c) 348{ 349 struct platform_device *pdev; 350 struct omap_hsmmc_platform_data *mmc_pdata; 351 int res; 352 353 if (omap_hsmmc_done != 1) 354 return; 355 356 omap_hsmmc_done++; 357 358 for (; c->mmc; c++) { 359 if (!c->deferred) 360 continue; 361 362 pdev = c->pdev; 363 if (!pdev) 364 continue; 365 366 mmc_pdata = pdev->dev.platform_data; 367 if (!mmc_pdata) 368 continue; 369 370 if (c->cover_only) { 371 /* detect if mobile phone cover removed */ 372 mmc_pdata->gpio_cd = -EINVAL; 373 mmc_pdata->gpio_cod = c->gpio_cd; 374 } else { 375 /* card detect pin on the mmc socket itself */ 376 mmc_pdata->gpio_cd = c->gpio_cd; 377 mmc_pdata->gpio_cod = -EINVAL; 378 } 379 mmc_pdata->gpio_wp = c->gpio_wp; 380 381 res = omap_device_register(pdev); 382 if (res) 383 pr_err("Could not late init MMC %s\n", 384 c->name); 385 } 386} 387 388#define MAX_OMAP_MMC_HWMOD_NAME_LEN 16 389 390static void __init omap_hsmmc_init_one(struct omap2_hsmmc_info *hsmmcinfo, 391 int ctrl_nr) 392{ 393 struct omap_hwmod *oh; 394 struct omap_hwmod *ohs[1]; 395 struct omap_device *od; 396 struct platform_device *pdev; 397 char oh_name[MAX_OMAP_MMC_HWMOD_NAME_LEN]; 398 struct omap_hsmmc_platform_data *mmc_data; 399 struct omap_hsmmc_dev_attr *mmc_dev_attr; 400 char *name; 401 int res; 402 403 mmc_data = kzalloc(sizeof(*mmc_data), GFP_KERNEL); 404 if (!mmc_data) { 405 pr_err("Cannot allocate memory for mmc device!\n"); 406 return; 407 } 408 409 res = omap_hsmmc_pdata_init(hsmmcinfo, mmc_data); 410 if (res < 0) 411 goto free_mmc; 412 413 omap_hsmmc_mux(mmc_data, (ctrl_nr - 1)); 414 415 name = "omap_hsmmc"; 416 res = snprintf(oh_name, MAX_OMAP_MMC_HWMOD_NAME_LEN, 417 "mmc%d", ctrl_nr); 418 WARN(res >= MAX_OMAP_MMC_HWMOD_NAME_LEN, 419 "String buffer overflow in MMC%d device setup\n", ctrl_nr); 420 421 oh = omap_hwmod_lookup(oh_name); 422 if (!oh) { 423 pr_err("Could not look up %s\n", oh_name); 424 goto free_name; 425 } 426 ohs[0] = oh; 427 if (oh->dev_attr != NULL) { 428 mmc_dev_attr = oh->dev_attr; 429 mmc_data->controller_flags = mmc_dev_attr->flags; 430 /* 431 * erratum 2.1.1.128 doesn't apply if board has 432 * a transceiver is attached 433 */ 434 if (hsmmcinfo->transceiver) 435 mmc_data->controller_flags &= 436 ~OMAP_HSMMC_BROKEN_MULTIBLOCK_READ; 437 } 438 439 pdev = platform_device_alloc(name, ctrl_nr - 1); 440 if (!pdev) { 441 pr_err("Could not allocate pdev for %s\n", name); 442 goto free_name; 443 } 444 dev_set_name(&pdev->dev, "%s.%d", pdev->name, pdev->id); 445 446 od = omap_device_alloc(pdev, ohs, 1); 447 if (IS_ERR(od)) { 448 pr_err("Could not allocate od for %s\n", name); 449 goto put_pdev; 450 } 451 452 res = platform_device_add_data(pdev, mmc_data, 453 sizeof(struct omap_hsmmc_platform_data)); 454 if (res) { 455 pr_err("Could not add pdata for %s\n", name); 456 goto put_pdev; 457 } 458 459 hsmmcinfo->pdev = pdev; 460 461 if (hsmmcinfo->deferred) 462 goto free_mmc; 463 464 res = omap_device_register(pdev); 465 if (res) { 466 pr_err("Could not register od for %s\n", name); 467 goto free_od; 468 } 469 470 goto free_mmc; 471 472free_od: 473 omap_device_delete(od); 474 475put_pdev: 476 platform_device_put(pdev); 477 478free_name: 479 kfree(mmc_data->name); 480 481free_mmc: 482 kfree(mmc_data); 483} 484 485void __init omap_hsmmc_init(struct omap2_hsmmc_info *controllers) 486{ 487 if (omap_hsmmc_done) 488 return; 489 490 omap_hsmmc_done = 1; 491 492 if (cpu_is_omap2430()) { 493 control_pbias_offset = OMAP243X_CONTROL_PBIAS_LITE; 494 control_devconf1_offset = OMAP243X_CONTROL_DEVCONF1; 495 } else { 496 control_pbias_offset = OMAP343X_CONTROL_PBIAS_LITE; 497 control_devconf1_offset = OMAP343X_CONTROL_DEVCONF1; 498 } 499 500 for (; controllers->mmc; controllers++) 501 omap_hsmmc_init_one(controllers, controllers->mmc); 502 503} 504 505#endif 506