/linux-4.1.27/arch/x86/crypto/ |
H A D | ghash-clmulni-intel_asm.S | 31 #define T2 %xmm3 define 47 * T2 52 pshufd $0b01001110, DATA, T2 54 pxor DATA, T2 59 PCLMULQDQ 0x00 T3 T2 # T2 = (a1 + a0) * (b1 + b0) 60 pxor DATA, T2 61 pxor T1, T2 # T2 = a0 * b1 + a1 * b0 63 movaps T2, T3 65 psrldq $8, T2 67 pxor T2, T1 # <T1:DATA> is result of 77 movaps T3, T2 78 pslldq $8, T2 80 pxor T2, DATA 84 movaps DATA, T2 85 psrlq $5, T2 86 pxor DATA, T2 87 psrlq $1, T2 88 pxor DATA, T2 89 psrlq $1, T2 90 pxor T2, T1
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H A D | aesni-intel_avx-x86_64.S | 251 .macro GHASH_MUL_AVX GH HK T1 T2 T3 T4 T5 253 vpshufd $0b01001110, \GH, \T2 255 vpxor \GH , \T2, \T2 # T2 = (a1+a0) 260 vpclmulqdq $0x00, \T3, \T2, \T2 # T2 = (a1+a0)*(b1+b0) 261 vpxor \GH, \T2,\T2 262 vpxor \T1, \T2,\T2 # T2 = a0*b1+a1*b0 264 vpslldq $8, \T2,\T3 # shift-L T3 2 DWs 265 vpsrldq $8, \T2,\T2 # shift-R T2 2 DWs 267 vpxor \T2, \T1, \T1 # <T1:GH> = GH x HK 270 vpslld $31, \GH, \T2 # packed right shifting << 31 274 vpxor \T3, \T2, \T2 # xor the shifted versions 275 vpxor \T4, \T2, \T2 277 vpsrldq $4, \T2, \T5 # shift-R T5 1 DW 279 vpslldq $12, \T2, \T2 # shift-L T2 3 DWs 280 vpxor \T2, \GH, \GH # first phase of the reduction complete 284 vpsrld $1,\GH, \T2 # packed left shifting >> 1 287 vpxor \T3, \T2, \T2 # xor the shifted versions 288 vpxor \T4, \T2, \T2 290 vpxor \T5, \T2, \T2 291 vpxor \T2, \GH, \GH 297 .macro PRECOMPUTE_AVX HK T1 T2 T3 T4 T5 T6 306 GHASH_MUL_AVX \T5, \HK, \T1, \T3, \T4, \T6, \T2 # T5 = HashKey^2<<1 mod poly 312 GHASH_MUL_AVX \T5, \HK, \T1, \T3, \T4, \T6, \T2 # T5 = HashKey^3<<1 mod poly 318 GHASH_MUL_AVX \T5, \HK, \T1, \T3, \T4, \T6, \T2 # T5 = HashKey^4<<1 mod poly 324 GHASH_MUL_AVX \T5, \HK, \T1, \T3, \T4, \T6, \T2 # T5 = HashKey^5<<1 mod poly 330 GHASH_MUL_AVX \T5, \HK, \T1, \T3, \T4, \T6, \T2 # T5 = HashKey^6<<1 mod poly 336 GHASH_MUL_AVX \T5, \HK, \T1, \T3, \T4, \T6, \T2 # T5 = HashKey^7<<1 mod poly 342 GHASH_MUL_AVX \T5, \HK, \T1, \T3, \T4, \T6, \T2 # T5 = HashKey^8<<1 mod poly 357 .macro INITIAL_BLOCKS_AVX num_initial_blocks T1 T2 T3 T4 T5 CTR XMM1 XMM2 XMM3 XMM4 XMM5 XMM6 XMM7 XMM8 T6 T_key ENC_DEC 467 GHASH_MUL_AVX reg_i, \T2, \T1, \T3, \T4, \T5, \T6 471 GHASH_MUL_AVX reg_j, \T2, \T1, \T3, \T4, \T5, \T6 # apply GHASH on num_initial_blocks blocks 633 .macro GHASH_8_ENCRYPT_8_PARALLEL_AVX T1 T2 T3 T4 T5 T6 CTR XMM1 XMM2 XMM3 XMM4 XMM5 XMM6 XMM7 XMM8 T7 loop_idx ENC_DEC 635 vmovdqa \XMM1, \T2 718 vpclmulqdq $0x11, \T5, \T2, \T4 # T4 = a1*b1 719 vpclmulqdq $0x00, \T5, \T2, \T7 # T7 = a0*b0 721 vpshufd $0b01001110, \T2, \T6 722 vpxor \T2, \T6, \T6 903 vpxor 16*i(arg3, %r11), \T5, \T2 905 vaesenclast \T2, reg_j, reg_j 907 vaesenclast \T2, reg_j, \T3 919 vpsrldq $8, \T6, \T6 # shift-R T2 2 DWs 928 vpslld $31, \T7, \T2 # packed right shifting << 31 932 vpxor \T3, \T2, \T2 # xor the shifted versions 933 vpxor \T4, \T2, \T2 935 vpsrldq $4, \T2, \T1 # shift-R T1 1 DW 937 vpslldq $12, \T2, \T2 # shift-L T2 3 DWs 938 vpxor \T2, \T7, \T7 # first phase of the reduction complete 953 vpsrld $1, \T7, \T2 # packed left shifting >> 1 956 vpxor \T3, \T2, \T2 # xor the shifted versions 957 vpxor \T4, \T2, \T2 959 vpxor \T1, \T2, \T2 960 vpxor \T2, \T7, \T7 982 .macro GHASH_LAST_8_AVX T1 T2 T3 T4 T5 T6 T7 XMM1 XMM2 XMM3 XMM4 XMM5 XMM6 XMM7 XMM8 987 vpshufd $0b01001110, \XMM1, \T2 988 vpxor \XMM1, \T2, \T2 994 vpclmulqdq $0x00, \T3, \T2, \XMM1 998 vpshufd $0b01001110, \XMM2, \T2 999 vpxor \XMM2, \T2, \T2 1008 vpclmulqdq $0x00, \T3, \T2, \T2 1009 vpxor \T2, \XMM1, \XMM1 1013 vpshufd $0b01001110, \XMM3, \T2 1014 vpxor \XMM3, \T2, \T2 1023 vpclmulqdq $0x00, \T3, \T2, \T2 1024 vpxor \T2, \XMM1, \XMM1 1028 vpshufd $0b01001110, \XMM4, \T2 1029 vpxor \XMM4, \T2, \T2 1038 vpclmulqdq $0x00, \T3, \T2, \T2 1039 vpxor \T2, \XMM1, \XMM1 1043 vpshufd $0b01001110, \XMM5, \T2 1044 vpxor \XMM5, \T2, \T2 1053 vpclmulqdq $0x00, \T3, \T2, \T2 1054 vpxor \T2, \XMM1, \XMM1 1058 vpshufd $0b01001110, \XMM6, \T2 1059 vpxor \XMM6, \T2, \T2 1068 vpclmulqdq $0x00, \T3, \T2, \T2 1069 vpxor \T2, \XMM1, \XMM1 1073 vpshufd $0b01001110, \XMM7, \T2 1074 vpxor \XMM7, \T2, \T2 1083 vpclmulqdq $0x00, \T3, \T2, \T2 1084 vpxor \T2, \XMM1, \XMM1 1088 vpshufd $0b01001110, \XMM8, \T2 1089 vpxor \XMM8, \T2, \T2 1098 vpclmulqdq $0x00, \T3, \T2, \T2 1100 vpxor \T2, \XMM1, \XMM1 1102 vpxor \T7, \XMM1, \T2 1107 vpslldq $8, \T2, \T4 1108 vpsrldq $8, \T2, \T2 1111 vpxor \T2, \T6, \T6 # <T6:T7> holds the result of 1116 vpslld $31, \T7, \T2 # packed right shifting << 31 1120 vpxor \T3, \T2, \T2 # xor the shifted versions 1121 vpxor \T4, \T2, \T2 1123 vpsrldq $4, \T2, \T1 # shift-R T1 1 DW 1125 vpslldq $12, \T2, \T2 # shift-L T2 3 DWs 1126 vpxor \T2, \T7, \T7 # first phase of the reduction complete 1131 vpsrld $1, \T7, \T2 # packed left shifting >> 1 1134 vpxor \T3, \T2, \T2 # xor the shifted versions 1135 vpxor \T4, \T2, \T2 1137 vpxor \T1, \T2, \T2 1138 vpxor \T2, \T7, \T7 1543 .macro GHASH_MUL_AVX2 GH HK T1 T2 T3 T4 T5 1546 vpclmulqdq $0x00,\HK,\GH,\T2 # T2 = a0*b0 1556 vpxor \T2, \GH, \GH 1562 vpclmulqdq $0x01, \GH, \T3, \T2 1563 vpslldq $8, \T2, \T2 # shift-L T2 2 DWs 1565 vpxor \T2, \GH, \GH # first phase of the reduction complete 1568 vpclmulqdq $0x00, \GH, \T3, \T2 1569 vpsrldq $4, \T2, \T2 # shift-R T2 1 DW (Shift-R only 1-DW to obtain 2-DWs shift-R) 1574 vpxor \T2, \GH, \GH # second phase of the reduction complete 1581 .macro PRECOMPUTE_AVX2 HK T1 T2 T3 T4 T5 T6 1585 GHASH_MUL_AVX2 \T5, \HK, \T1, \T3, \T4, \T6, \T2 # T5 = HashKey^2<<1 mod poly 1588 GHASH_MUL_AVX2 \T5, \HK, \T1, \T3, \T4, \T6, \T2 # T5 = HashKey^3<<1 mod poly 1591 GHASH_MUL_AVX2 \T5, \HK, \T1, \T3, \T4, \T6, \T2 # T5 = HashKey^4<<1 mod poly 1594 GHASH_MUL_AVX2 \T5, \HK, \T1, \T3, \T4, \T6, \T2 # T5 = HashKey^5<<1 mod poly 1597 GHASH_MUL_AVX2 \T5, \HK, \T1, \T3, \T4, \T6, \T2 # T5 = HashKey^6<<1 mod poly 1600 GHASH_MUL_AVX2 \T5, \HK, \T1, \T3, \T4, \T6, \T2 # T5 = HashKey^7<<1 mod poly 1603 GHASH_MUL_AVX2 \T5, \HK, \T1, \T3, \T4, \T6, \T2 # T5 = HashKey^8<<1 mod poly 1616 .macro INITIAL_BLOCKS_AVX2 num_initial_blocks T1 T2 T3 T4 T5 CTR XMM1 XMM2 XMM3 XMM4 XMM5 XMM6 XMM7 XMM8 T6 T_key ENC_DEC VER 1727 GHASH_MUL_AVX2 reg_i, \T2, \T1, \T3, \T4, \T5, \T6 1731 GHASH_MUL_AVX2 reg_j, \T2, \T1, \T3, \T4, \T5, \T6 # apply GHASH on num_initial_blocks blocks 1897 .macro GHASH_8_ENCRYPT_8_PARALLEL_AVX2 T1 T2 T3 T4 T5 T6 CTR XMM1 XMM2 XMM3 XMM4 XMM5 XMM6 XMM7 XMM8 T7 loop_idx ENC_DEC 1899 vmovdqa \XMM1, \T2 1982 vpclmulqdq $0x11, \T5, \T2, \T4 # T4 = a1*b1 1983 vpclmulqdq $0x00, \T5, \T2, \T7 # T7 = a0*b0 1984 vpclmulqdq $0x01, \T5, \T2, \T6 # T6 = a1*b0 1985 vpclmulqdq $0x10, \T5, \T2, \T5 # T5 = a0*b1 2170 vpxor 16*i(arg3, %r11), \T5, \T2 2172 vaesenclast \T2, reg_j, reg_j 2174 vaesenclast \T2, reg_j, \T3 2186 vpsrldq $8, \T6, \T6 # shift-R T2 2 DWs 2196 vpclmulqdq $0x01, \T7, \T3, \T2 2197 vpslldq $8, \T2, \T2 # shift-L xmm2 2 DWs 2199 vpxor \T2, \T7, \T7 # first phase of the reduction complete 2214 vpclmulqdq $0x00, \T7, \T3, \T2 2215 vpsrldq $4, \T2, \T2 # shift-R xmm2 1 DW (Shift-R only 1-DW to obtain 2-DWs shift-R) 2220 vpxor \T2, \T4, \T4 # second phase of the reduction complete 2242 .macro GHASH_LAST_8_AVX2 T1 T2 T3 T4 T5 T6 T7 XMM1 XMM2 XMM3 XMM4 XMM5 XMM6 XMM7 XMM8 2248 vpshufd $0b01001110, \XMM1, \T2 2250 vpxor \XMM1, \T2, \T2 2256 vpclmulqdq $0x00, \T3, \T2, \XMM1 2261 vpshufd $0b01001110, \XMM2, \T2 2263 vpxor \XMM2, \T2, \T2 2272 vpclmulqdq $0x00, \T3, \T2, \T2 2274 vpxor \T2, \XMM1, \XMM1 2279 vpshufd $0b01001110, \XMM3, \T2 2281 vpxor \XMM3, \T2, \T2 2290 vpclmulqdq $0x00, \T3, \T2, \T2 2292 vpxor \T2, \XMM1, \XMM1 2297 vpshufd $0b01001110, \XMM4, \T2 2299 vpxor \XMM4, \T2, \T2 2308 vpclmulqdq $0x00, \T3, \T2, \T2 2310 vpxor \T2, \XMM1, \XMM1 2315 vpshufd $0b01001110, \XMM5, \T2 2317 vpxor \XMM5, \T2, \T2 2326 vpclmulqdq $0x00, \T3, \T2, \T2 2328 vpxor \T2, \XMM1, \XMM1 2333 vpshufd $0b01001110, \XMM6, \T2 2335 vpxor \XMM6, \T2, \T2 2344 vpclmulqdq $0x00, \T3, \T2, \T2 2346 vpxor \T2, \XMM1, \XMM1 2351 vpshufd $0b01001110, \XMM7, \T2 2353 vpxor \XMM7, \T2, \T2 2362 vpclmulqdq $0x00, \T3, \T2, \T2 2364 vpxor \T2, \XMM1, \XMM1 2369 vpshufd $0b01001110, \XMM8, \T2 2371 vpxor \XMM8, \T2, \T2 2380 vpclmulqdq $0x00, \T3, \T2, \T2 2382 vpxor \T2, \XMM1, \XMM1 2384 vpxor \T7, \XMM1, \T2 2389 vpslldq $8, \T2, \T4 2390 vpsrldq $8, \T2, \T2 2393 vpxor \T2, \T6, \T6 # <T6:T7> holds the result of the 2400 vpclmulqdq $0x01, \T7, \T3, \T2 2401 vpslldq $8, \T2, \T2 # shift-L xmm2 2 DWs 2403 vpxor \T2, \T7, \T7 # first phase of the reduction complete 2408 vpclmulqdq $0x00, \T7, \T3, \T2 2409 vpsrldq $4, \T2, \T2 # shift-R T2 1 DW (Shift-R only 1-DW to obtain 2-DWs shift-R) 2414 vpxor \T2, \T4, \T4 # second phase of the reduction complete
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H A D | sha512-ssse3-asm.S | 62 T2 = %r8 define 132 mov a_64, T2 # T2 = a 137 xor c_64, T2 # T2 = a ^ c 139 and b_64, T2 # T2 = (a ^ c) & b 140 xor tmp0, T2 # T2 = ((a ^ c) & b) ^ (a & c) = Maj(a,b,c) 147 lea (T1, T2), h_64 # a(next_state) = T1 + Maj(a,b,c) 196 mov a_64, T2 197 xor c_64, T2 199 and b_64, T2 203 xor tmp0, T2 214 add tmp0, T2 217 lea (T1, T2), h_64 240 mov a_64, T2 242 xor c_64, T2 243 and b_64, T2 249 xor tmp0, T2 265 add tmp0, T2 267 lea (T1, T2), h_64
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H A D | sha512-avx-asm.S | 63 T2 = %r8 define 139 mov a_64, T2 # T2 = a 144 xor c_64, T2 # T2 = a ^ c 146 and b_64, T2 # T2 = (a ^ c) & b 147 xor tmp0, T2 # T2 = ((a ^ c) & b) ^ (a & c) = Maj(a,b,c) 154 lea (T1, T2), h_64 # a(next_state) = T1 + Maj(a,b,c) 197 mov a_64, T2 204 xor c_64, T2 207 and b_64, T2 209 xor tmp0, T2 220 lea (T1, T2), h_64 248 mov a_64, T2 257 xor c_64, T2 259 and b_64, T2 260 xor tmp0, T2 267 lea (T1, T2), h_64
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H A D | sha1_ssse3_asm.S | 202 .set T2, REG_T2 237 mov \b, T2 239 and \c, T2 241 or T2, T1
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H A D | sha1_avx2_x86_64_asm.S | 389 rorx $(32-5), A, TA /* T2 = A >>> 5 */ 409 rorx $(32-5), A, TA /* T2 = A >>> 5 */ 435 rorx $(32-5), A, TA /* T2 = A >>> 5 */
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H A D | aesni-intel_asm.S | 137 #define T2 %r11 define 138 #define TCTR_LOW T2 844 pslldq $12, \TMP2 # left shift T2 3 DWs 1056 pslldq $12, \TMP2 # left shift T2 3 DWs
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/linux-4.1.27/drivers/block/drbd/ |
H A D | drbd_state.h | 39 #define NS2(T1, S1, T2, S2) \ 41 mask.T2 = T2##_MASK; mask; }), \ 43 val.T2 = (S2); val; }) 44 #define NS3(T1, S1, T2, S2, T3, S3) \ 46 mask.T2 = T2##_MASK; mask.T3 = T3##_MASK; mask; }), \ 48 val.T2 = (S2); val.T3 = (S3); val; }) 52 #define _NS2(D, T1, S1, T2, S2) \ 54 __ns.T2 = (S2); __ns; }) 55 #define _NS3(D, T1, S1, T2, S2, T3, S3) \ 57 __ns.T2 = (S2); __ns.T3 = (S3); __ns; })
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/linux-4.1.27/arch/sparc/crypto/ |
H A D | aes_asm.S | 12 #define ENCRYPT_TWO_ROUNDS_2(KEY_BASE, I0, I1, I2, I3, T0, T1, T2, T3) \ 15 AES_EROUND01(KEY_BASE + 0, I2, I3, T2) \ 19 AES_EROUND01(KEY_BASE + 4, T2, T3, I2) \ 20 AES_EROUND23(KEY_BASE + 6, T2, T3, I3) 28 #define ENCRYPT_TWO_ROUNDS_LAST_2(KEY_BASE, I0, I1, I2, I3, T0, T1, T2, T3) \ 31 AES_EROUND01(KEY_BASE + 0, I2, I3, T2) \ 35 AES_EROUND01_L(KEY_BASE + 4, T2, T3, I2) \ 36 AES_EROUND23_L(KEY_BASE + 6, T2, T3, I3) 46 #define ENCRYPT_128_2(KEY_BASE, I0, I1, I2, I3, T0, T1, T2, T3) \ 47 ENCRYPT_TWO_ROUNDS_2(KEY_BASE + 0, I0, I1, I2, I3, T0, T1, T2, T3) \ 48 ENCRYPT_TWO_ROUNDS_2(KEY_BASE + 8, I0, I1, I2, I3, T0, T1, T2, T3) \ 49 ENCRYPT_TWO_ROUNDS_2(KEY_BASE + 16, I0, I1, I2, I3, T0, T1, T2, T3) \ 50 ENCRYPT_TWO_ROUNDS_2(KEY_BASE + 24, I0, I1, I2, I3, T0, T1, T2, T3) \ 51 ENCRYPT_TWO_ROUNDS_LAST_2(KEY_BASE + 32, I0, I1, I2, I3, T0, T1, T2, T3) 62 #define ENCRYPT_192_2(KEY_BASE, I0, I1, I2, I3, T0, T1, T2, T3) \ 63 ENCRYPT_TWO_ROUNDS_2(KEY_BASE + 0, I0, I1, I2, I3, T0, T1, T2, T3) \ 64 ENCRYPT_TWO_ROUNDS_2(KEY_BASE + 8, I0, I1, I2, I3, T0, T1, T2, T3) \ 65 ENCRYPT_TWO_ROUNDS_2(KEY_BASE + 16, I0, I1, I2, I3, T0, T1, T2, T3) \ 66 ENCRYPT_TWO_ROUNDS_2(KEY_BASE + 24, I0, I1, I2, I3, T0, T1, T2, T3) \ 67 ENCRYPT_TWO_ROUNDS_2(KEY_BASE + 32, I0, I1, I2, I3, T0, T1, T2, T3) \ 68 ENCRYPT_TWO_ROUNDS_LAST_2(KEY_BASE + 40, I0, I1, I2, I3, T0, T1, T2, T3) 114 #define DECRYPT_TWO_ROUNDS_2(KEY_BASE, I0, I1, I2, I3, T0, T1, T2, T3) \ 118 AES_DROUND01(KEY_BASE + 2, I2, I3, T2) \ 121 AES_DROUND23(KEY_BASE + 4, T2, T3, I3) \ 122 AES_DROUND01(KEY_BASE + 6, T2, T3, I2) 130 #define DECRYPT_TWO_ROUNDS_LAST_2(KEY_BASE, I0, I1, I2, I3, T0, T1, T2, T3) \ 134 AES_DROUND01(KEY_BASE + 2, I2, I3, T2) \ 137 AES_DROUND23_L(KEY_BASE + 4, T2, T3, I3) \ 138 AES_DROUND01_L(KEY_BASE + 6, T2, T3, I2) 148 #define DECRYPT_128_2(KEY_BASE, I0, I1, I2, I3, T0, T1, T2, T3) \ 149 DECRYPT_TWO_ROUNDS_2(KEY_BASE + 0, I0, I1, I2, I3, T0, T1, T2, T3) \ 150 DECRYPT_TWO_ROUNDS_2(KEY_BASE + 8, I0, I1, I2, I3, T0, T1, T2, T3) \ 151 DECRYPT_TWO_ROUNDS_2(KEY_BASE + 16, I0, I1, I2, I3, T0, T1, T2, T3) \ 152 DECRYPT_TWO_ROUNDS_2(KEY_BASE + 24, I0, I1, I2, I3, T0, T1, T2, T3) \ 153 DECRYPT_TWO_ROUNDS_LAST_2(KEY_BASE + 32, I0, I1, I2, I3, T0, T1, T2, T3) 164 #define DECRYPT_192_2(KEY_BASE, I0, I1, I2, I3, T0, T1, T2, T3) \ 165 DECRYPT_TWO_ROUNDS_2(KEY_BASE + 0, I0, I1, I2, I3, T0, T1, T2, T3) \ 166 DECRYPT_TWO_ROUNDS_2(KEY_BASE + 8, I0, I1, I2, I3, T0, T1, T2, T3) \ 167 DECRYPT_TWO_ROUNDS_2(KEY_BASE + 16, I0, I1, I2, I3, T0, T1, T2, T3) \ 168 DECRYPT_TWO_ROUNDS_2(KEY_BASE + 24, I0, I1, I2, I3, T0, T1, T2, T3) \ 169 DECRYPT_TWO_ROUNDS_2(KEY_BASE + 32, I0, I1, I2, I3, T0, T1, T2, T3) \ 170 DECRYPT_TWO_ROUNDS_LAST_2(KEY_BASE + 40, I0, I1, I2, I3, T0, T1, T2, T3)
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/linux-4.1.27/drivers/staging/media/mn88472/ |
H A D | mn88472_priv.h | 2 * Panasonic MN88472 DVB-T/T2/C demodulator driver
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H A D | mn88472.c | 2 * Panasonic MN88472 DVB-T/T2/C demodulator driver 575 MODULE_DESCRIPTION("Panasonic MN88472 DVB-T/T2/C demodulator driver");
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/linux-4.1.27/drivers/staging/media/mn88473/ |
H A D | mn88473_priv.h | 2 * Panasonic MN88473 DVB-T/T2/C demodulator driver
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H A D | mn88473.c | 2 * Panasonic MN88473 DVB-T/T2/C demodulator driver 521 MODULE_DESCRIPTION("Panasonic MN88473 DVB-T/T2/C demodulator driver");
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/linux-4.1.27/drivers/media/dvb-frontends/ |
H A D | mn88472.h | 2 * Panasonic MN88472 DVB-T/T2/C demodulator driver
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H A D | mn88473.h | 2 * Panasonic MN88473 DVB-T/T2/C demodulator driver
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H A D | si2168.h | 2 * Silicon Labs Si2168 DVB-T/T2/C demodulator driver
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H A D | si2168_priv.h | 2 * Silicon Labs Si2168 DVB-T/T2/C demodulator driver
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H A D | cxd2820r_priv.h | 52 bool last_tune_failed; /* for switch between T and T2 tune */
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H A D | cxd2820r_core.c | 117 i2c_addr = priv->cfg.i2c_address; /* DVB-T/T2 */ cxd2820r_wr_regs() 143 i2c_addr = priv->cfg.i2c_address; /* DVB-T/T2 */ cxd2820r_rd_regs() 509 /* switch between DVB-T and DVB-T2 when tune fails */ cxd2820r_search() 649 /* default: DVB-T/T2 */
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H A D | si2168.c | 2 * Silicon Labs Si2168 DVB-T/T2/C demodulator driver 743 MODULE_DESCRIPTION("Silicon Labs Si2168 DVB-T/T2/C demodulator driver");
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/linux-4.1.27/drivers/media/usb/dvb-usb/ |
H A D | cinergyT2.h | 2 * TerraTec Cinergy T2/qanu USB2 DVB-T adapter. 7 * original Terratec Cinergy T2 driver by:
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H A D | cinergyT2-core.c | 2 * TerraTec Cinergy T2/qanu USB2 DVB-T adapter. 7 * original Terratec Cinergy T2 driver by: 251 MODULE_DESCRIPTION("Terratec Cinergy T2 DVB-T driver");
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H A D | cinergyT2-fe.c | 2 * TerraTec Cinergy T2/qanu USB2 DVB-T adapter. 7 * original Terratec Cinergy T2 driver by:
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H A D | cxusb.c | 2300 "Mygica T230 DVB-T/T2/C",
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H A D | dw2102.c | 2155 { "Geniatech T220 DVB-T/T2 USB2.0",
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/linux-4.1.27/arch/sh/include/asm/ |
H A D | uaccess_32.h | 131 "mov.l %S1,%T2\n\t" \ 153 "mov.l %R1,%T2\n\t" \
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/linux-4.1.27/arch/mips/mm/ |
H A D | page.c | 48 #define T2 10 macro 471 build_copy_load(&buf, T2, off + 2 * copy_word_size); build_copy_page() 479 build_copy_store(&buf, T2, off + 2 * copy_word_size); build_copy_page() 493 build_copy_load(&buf, T2, off + 2 * copy_word_size); build_copy_page() 501 build_copy_store(&buf, T2, off + 2 * copy_word_size); build_copy_page() 517 build_copy_load(&buf, T2, off + 2 * copy_word_size); build_copy_page() 524 build_copy_store(&buf, T2, off + 2 * copy_word_size); build_copy_page() 535 build_copy_load(&buf, T2, off + 2 * copy_word_size); build_copy_page() 542 build_copy_store(&buf, T2, off + 2 * copy_word_size); build_copy_page() 559 build_copy_load(&buf, T2, off + 2 * copy_word_size); build_copy_page() 563 build_copy_store(&buf, T2, off + 2 * copy_word_size); build_copy_page() 573 build_copy_load(&buf, T2, off + 2 * copy_word_size); build_copy_page() 577 build_copy_store(&buf, T2, off + 2 * copy_word_size); build_copy_page()
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/linux-4.1.27/arch/m68k/fpsp040/ |
H A D | scosh.S | 64 T2: .long 0x3D6F90AE,0xB1E75CC7 | ... 16381 LOG2 TRAIL label 114 fsubd T2(%pc),%fp0 | ...|X| - 16381 LOG2, ACCURATE
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H A D | ssinh.S | 60 T2: .long 0x3D6F90AE,0xB1E75CC7 | ... 16381 LOG2 TRAIL label 123 fsubd T2(%pc),%fp0 | ...|X| - 16381 LOG2, ACCURATE
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/linux-4.1.27/net/x25/ |
H A D | x25_timer.c | 134 * Timer has expired, it may have been T2, T21, T22, or T23. We can tell 143 case X25_STATE_3: /* T2 */ x25_do_timer_expiry()
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/linux-4.1.27/crypto/ |
H A D | anubis.c | 186 static const u32 T2[256] = { variable 542 inter[i] ^= T2[(kappa[j--] >> 8) & 0xff]; anubis_setkey() 566 T2[T4[(v >> 8) & 0xff] & 0xff] ^ anubis_setkey() 598 T2[(state[2] >> 24) ] ^ anubis_crypt() 604 T2[(state[2] >> 16) & 0xff] ^ anubis_crypt() 610 T2[(state[2] >> 8) & 0xff] ^ anubis_crypt() 616 T2[(state[2] ) & 0xff] ^ anubis_crypt() 632 (T2[(state[2] >> 24) ] & 0x0000ff00U) ^ anubis_crypt() 638 (T2[(state[2] >> 16) & 0xff] & 0x0000ff00U) ^ anubis_crypt() 644 (T2[(state[2] >> 8) & 0xff] & 0x0000ff00U) ^ anubis_crypt() 650 (T2[(state[2] ) & 0xff] & 0x0000ff00U) ^ anubis_crypt()
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H A D | khazad.c | 216 static const u64 T2[256] = { variable 773 T2[(int)(K1 >> 40) & 0xff] ^ khazad_setkey() 789 T2[(int)S[(int)(K1 >> 40) & 0xff] & 0xff] ^ khazad_setkey() 815 T2[(int)(state >> 40) & 0xff] ^ khazad_crypt() 826 (T2[(int)(state >> 40) & 0xff] & 0x0000ff0000000000ULL) ^ khazad_crypt()
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H A D | des_generic.c | 613 #define T2(x) pt[2 * (x) + 1] macro 617 #define DES_PC2(a, b, c, d) (T4(d) | T3(c) | T2(b) | T1(a))
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/linux-4.1.27/arch/x86/crypto/sha-mb/ |
H A D | sha1_x8_avx2.S | 233 # ymm8 T2 DD 251 T2 = %ymm8 define 332 VMOVPS (inp2, IDX), T2 339 TRANSPOSE8 T0, T1, T2, T3, T4, T5, T6, T7, T8, T9 344 vpshufb F, T2, T2 345 vmovdqu T2, (I*8+2)*32(%rsp)
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/linux-4.1.27/arch/alpha/kernel/ |
H A D | core_t2.c | 9 * Code common to all T2 core logic chips. 189 /* If Type1 access, must set T2 CFG. */ conf_read() 224 /* If Type1 access, must reset T2 CFG so normal IO space ops work. */ conf_read() 241 /* If Type1 access, must set T2 CFG. */ conf_write() 275 /* If Type1 access, must reset T2 CFG so normal IO space ops work. */ conf_write() 623 process_mcheck_info(vector, la_ptr, "T2", mcheck_expected(cpu));
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H A D | machvec_impl.h | 111 #define DO_T2_IO IO(T2,t2)
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H A D | pci_impl.h | 55 * Because MCPCIA and T2 core logic support more bits for
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/linux-4.1.27/arch/arm/crypto/ |
H A D | sha256-armv4.pl | 285 my ($T0,$T1,$T2,$T3,$T4,$T5)=("q8","q9","q10","q11","d24","d25"); 313 &vshr_u32 ($T2,$T0,$sigma0[0]); 322 &vsli_32 ($T2,$T0,32-$sigma0[0]); 328 &veor ($T1,$T1,$T2); 478 vld1.32 {$T2},[$Ktbl,:128]! 492 vadd.i32 $T2,$T2,@X[2] 495 vst1.32 {$T2},[$Xfer,:128]!
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/linux-4.1.27/arch/alpha/include/asm/ |
H A D | core_t2.h | 12 * T2 is the internal name for the core logic chipset which provides 94 /* T2 CSRs are in the non-cachable primary IO space from 3.8000.0000 to 169 * Data structure for handling T2 machine checks: 279 struct el_t2_frame_header elct_hdr; /* ID$T2-FRAME */ 355 * T2 (the core logic PCI/memory support chipset for the SABLE 475 * On SABLE with T2, we must use SPARSE memory even for 32-bit access, 525 * On SABLE with T2, we must use SPARSE memory even for 32-bit access, 570 /* New-style ioread interface. The mmio routines are so ugly for T2 that
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/linux-4.1.27/arch/blackfin/lib/ |
H A D | muldi3.S | 24 [T2] + (R1.l * R2.l + R3.l * R0.l + R0.h * R2.h) * 2^32
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/linux-4.1.27/net/nfc/hci/ |
H A D | llc_shdlc.c | 216 ("All sent frames acked. Stopped T2(retransmit)\n"); llc_shdlc_reset_t2() 226 ("Start T2(retransmit) for remaining unacked sent frames\n"); llc_shdlc_reset_t2() 307 pr_debug("Stopped T2(retransmit)\n"); llc_shdlc_rcv_rej() 578 pr_debug("Started T2 (retransmit)\n"); llc_shdlc_handle_send_queue() 675 ("Handle T2(retransmit) elapsed (T2 inactive)\n"); llc_shdlc_sm_work()
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/linux-4.1.27/drivers/nfc/st21nfcb/ |
H A D | ndlc.c | 210 pr_debug("Handle T2(recv DATA) elapsed (T2 now inactive)\n"); llt_ndlc_sm_work()
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/linux-4.1.27/include/uapi/linux/ |
H A D | mii.h | 61 #define BMSR_100HALF2 0x0200 /* Can do 100BASE-T2 HDX */ 62 #define BMSR_100FULL2 0x0400 /* Can do 100BASE-T2 FDX */
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/linux-4.1.27/drivers/gpu/drm/bridge/ |
H A D | ps8622.c | 49 #error "T2.min + T1.max must be less than T2.max + T1.min" 385 * enable the lcd/ps8622 fet. T2 is the range of time in which the ps8622_pre_enable() 389 * T2.min before deasserting the reset pin. If it takes T1.min for the ps8622_pre_enable() 390 * power to rise, we need to wait at most T2.max before deasserting the ps8622_pre_enable()
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/linux-4.1.27/drivers/net/wireless/brcm80211/brcmfmac/ |
H A D | btcoex.c | 70 * @dhcp_done: DHCP finished before T1/T2 timer expiration 342 brcmf_dbg(INFO, "DHCP done before T2 expiration\n"); brcmf_btcoex_handler() 344 brcmf_dbg(INFO, "DHCP T2:%d expired\n", brcmf_btcoex_handler()
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/linux-4.1.27/drivers/staging/speakup/ |
H A D | speakup_acntsa.c | 96 .init = "\033T2\033=M\033Oi\033N1\n",
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H A D | speakup_acntpc.c | 111 .init = "\033=X \033Oi\033T2\033=M\033N1\n",
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/linux-4.1.27/include/net/ |
H A D | lapb.h | 61 #define LAPB_DEFAULT_T2 (1 * HZ) /* T2=1s */
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H A D | ax25.h | 133 AX25_VALUES_T2, /* Default T2 timeout value */ 150 #define AX25_DEF_T2 3000 /* T2=3s */
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/linux-4.1.27/net/rose/ |
H A D | rose_timer.c | 174 case ROSE_STATE_4: /* T2 */ rose_timer_expiry()
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/linux-4.1.27/drivers/iio/pressure/ |
H A D | bmp280.c | 87 enum { T1, T2, T3 }; enumerator in enum:__anon4793 171 ((s32)(s16)le16_to_cpu(buf[T2]))) >> 11; bmp280_compensate_temp()
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/linux-4.1.27/drivers/net/ethernet/oki-semi/pch_gbe/ |
H A D | pch_gbe_phy.c | 68 #define MII_SR_100T2_HD_CAPS 0x0200 /* 100T2 Half Duplex Capable */ 69 #define MII_SR_100T2_FD_CAPS 0x0400 /* 100T2 Full Duplex Capable */
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/linux-4.1.27/arch/sparc/kernel/ |
H A D | cpu.c | 474 sparc_cpu_type = "UltraSparc T2 (Niagara2)"; sun4v_cpu_probe() 475 sparc_fpu_type = "UltraSparc T2 integrated FPU"; sun4v_cpu_probe()
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H A D | traps_64.c | 2471 /* On UltraSPARC T2 and later, FPU insns which do_illegal_instruction()
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/linux-4.1.27/drivers/net/ethernet/atheros/atlx/ |
H A D | atlx.h | 340 #define MII_SR_100T2_HD_CAPS 0x0200 /* 100T2 Half Duplex Capable */ 341 #define MII_SR_100T2_FD_CAPS 0x0400 /* 100T2 Full Duplex Capable */
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/linux-4.1.27/drivers/clocksource/ |
H A D | cadence_ttc_timer.c | 31 * T2: Timer 2, clockevent source for hrtimers 35 * common to all the timer channels (T1, T2, and T3). With a pre-scaler of 32,
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/linux-4.1.27/arch/metag/tbx/ |
H A D | tbictx.S | 176 D SETD [A0.2++],T2 344 D GETD T2,[A0.2++]
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/linux-4.1.27/drivers/scsi/bnx2fc/ |
H A D | bnx2fc_constants.h | 185 /* FcoE number of cached T2 entries */
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/linux-4.1.27/drivers/gpu/drm/radeon/ |
H A D | radeon_agp.c | 60 /* Intel 82855PM host bridge / FireGL Mobility T2 RV350 Needs AGPMode 2 (fdo #20647) */
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/linux-4.1.27/drivers/uwb/ |
H A D | whci.c | 108 * bytes (WHCI0.95[2.3, T2-9]). */ whci_add_cap()
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/linux-4.1.27/drivers/video/fbdev/via/ |
H A D | vt1636.c | 32 /* T2: Data on - Backlight on. Each increment is 2 ms. (210ms = 068h) */
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/linux-4.1.27/include/net/sctp/ |
H A D | command.h | 88 SCTP_CMD_SETUP_T2, /* Hi-level, setup T2-shutdown parms. */
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/linux-4.1.27/arch/arc/include/asm/ |
H A D | mmu_context.h | 142 * e.g. T1 runs on C1, migrates to C3. T2 running on C2 munmaps. switch_mm()
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/linux-4.1.27/drivers/mfd/ |
H A D | kempld-core.c | 547 DMI_MATCH(DMI_BOARD_NAME, "ETXexpress-SC T2"), 555 DMI_MATCH(DMI_BOARD_NAME, "ETXe-SC T2"),
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H A D | twl-core.c | 1192 /* Maybe init the T2 Interrupt subsystem */ twl_probe() 1253 { "twl5030", 0 }, /* T2 updated */
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H A D | twl4030-power.c | 320 /* Set ACTIVE to SLEEP SEQ address in T2 memory*/ twl4030_config_sleep_sequence()
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/linux-4.1.27/drivers/phy/ |
H A D | phy-twl4030-usb.c | 346 dev_err(twl->dev, "unsupported T2 transceiver mode %d\n", twl4030_usb_set_mode() 371 dev_err(twl->dev, "Timeout setting T2 HSUSB " twl4030_i2c_access()
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/linux-4.1.27/drivers/net/ethernet/broadcom/bnx2x/ |
H A D | bnx2x_init_ops.h | 917 /* Initialize T2 */ bnx2x_src_init_t2() 922 /* tell the searcher where the T2 table is */ bnx2x_src_init_t2()
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H A D | bnx2x_main.c | 8263 /* allocate searcher T2 table, as it wasn't allocated before */ bnx2x_alloc_mem_cnic() 8289 /* allocate searcher T2 table */ bnx2x_alloc_mem()
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/linux-4.1.27/net/sctp/ |
H A D | sm_statefuns.c | 193 * should stop the T2-shutdown timer and remove all knowledge of the 260 * T2-shutdown timer and remove all knowledge of the sctp_sf_do_4_C() 2193 /* Stop the T2-shutdown timer. */ sctp_sf_shutdown_sent_abort() 2217 /* The same T2 timer, so we should be able to use sctp_sf_shutdown_ack_sent_abort() 2792 * the T2-SHUTDOWN timer. sctp_sf_do_9_2_reshutack() 2796 /* and restart the T2-shutdown timer. */ sctp_sf_do_9_2_reshutack() 3110 * with a SACK, a SHUTDOWN chunk, and restart the T2-shutdown timer sctp_sf_eat_data_fast_4_4() 3317 * stop the T2-shutdown timer, send a SHUTDOWN COMPLETE chunk to its 3361 * stop the T2-shutdown timer, sctp_sf_do_9_2_final() 3956 * with a SACK, a SHUTDOWN chunk, and restart the T2-shutdown timer 5066 /* Stop the T2-shutdown timer. */ sctp_sf_shutdown_sent_prm_abort() 5097 /* The same T2 timer, so we should be able to use sctp_sf_shutdown_ack_sent_prm_abort() 5229 * It shall then start the T2-shutdown timer and enter the SHUTDOWN-SENT 5255 * T2-shutdown timer. sctp_sf_do_9_2_start_shutdown() 5259 /* It shall then start the T2-shutdown timer */ sctp_sf_do_9_2_start_shutdown() 5299 * shall send a SHUTDOWN ACK and start a T2-shutdown timer of its own, 5341 * the T2-shutdown timer. sctp_sf_do_9_2_shutdown_ack() 5345 /* and start/restart a T2-shutdown timer of its own, */ sctp_sf_do_9_2_shutdown_ack() 5634 * the T2-Shutdown timer, giving its peer ample opportunity to transmit 5646 pr_debug("%s: timer T2 expired\n", __func__); sctp_sf_t2_timer_expire() 5689 * the T2-shutdown timer. sctp_sf_t2_timer_expire() 5693 /* Restart the T2-shutdown timer. */ sctp_sf_t2_timer_expire()
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H A D | sm_sideeffect.c | 778 /* Helper function to set the timeout value for T2-SHUTDOWN timer and to set
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/linux-4.1.27/drivers/media/tuners/ |
H A D | si2157.c | 282 case SYS_DVBT2: /* it seems DVB-T and DVB-T2 both are 0x20 here */ si2157_set_params()
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/linux-4.1.27/drivers/net/ethernet/chelsio/cxgb/ |
H A D | espi.c | 173 * For T1B we need to write 1 to clear ESPI interrupts. For T2+ we t1_espi_intr_handler()
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H A D | vsc7326.c | 18 * for disabling the T2/MAC flow-control. When the interface is
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H A D | sge.c | 582 * Note: For T2 FL0 and FL1 are reversed. alloc_rx_resources() 1103 * T1/T2 SGE limits the maximum DMA size per TX descriptor to 1980 * Callback for the T2 ESPI 'stuck packet feature' workaorund
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/linux-4.1.27/drivers/char/hw_random/ |
H A D | xgene-rng.c | 149 * of squares value after checking 20,000 bits (test T2 as xgene_rng_chk_overflow()
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/linux-4.1.27/arch/sh/boards/ |
H A D | board-magicpanelr2.c | 197 * T3 COM1_RTS; T2 COM1_TXD; T1 COM1_RXD; T0 GPO(WDOG) setup_port_multiplexing()
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/linux-4.1.27/sound/pci/trident/ |
H A D | trident.h | 93 /* T2 legacy dma control registers. */
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/linux-4.1.27/fs/cifs/ |
H A D | cifspdu.h | 1815 * Flags on T2 FINDFIRST and FINDNEXT 2109 * (such as the T2 level specific data) go here 2677 T2 SET_PATH_INFO (SMB_SET_FILE_UNIX_LINK) for symlinks 2678 T2 SET_PATH_INFO (SMB_SET_FILE_BASIC_INFO2) 2679 T2 QUERY_PATH_INFO (SMB_QUERY_FILE_UNIX_LINK) 2680 T2 QUERY_PATH_INFO (SMB_QUERY_FILE_UNIX_BASIC) BB check for missing 2690 T2 FIND_FIRST/FIND_NEXT FIND_FILE_UNIX
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H A D | smb1ops.c | 677 seq_printf(m, "\nRenames: %d T2 Renames %d", cifs_print_stats()
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/linux-4.1.27/drivers/net/irda/ |
H A D | ali-ircc.c | 1125 // T1 T2 T3 T4 T5 ali_ircc_change_dongle_speed() 1139 // T2 -> SD/MODE:1 IRTX:0 ali_ircc_change_dongle_speed() 1171 // T1 T2 T3 ali_ircc_change_dongle_speed() 1198 // T2 -> SD/MODE:1 IRTX:0 ali_ircc_change_dongle_speed()
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/linux-4.1.27/drivers/net/wireless/orinoco/ |
H A D | orinoco_plx.c | 71 * the WL11000 I've seen, revision A1 and T2. These seem to differ
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/linux-4.1.27/arch/sh/kernel/ |
H A D | process_64.c | 262 printk("T2 : %08Lx%08Lx T3 : %08Lx%08Lx T4 : %08Lx%08Lx\n", show_regs()
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/linux-4.1.27/arch/sparc/math-emu/ |
H A D | math_64.c | 360 /* Starting with UltraSPARC-T2, the cpu does not set the FP Trap do_mathemu()
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/linux-4.1.27/drivers/media/usb/em28xx/ |
H A D | em28xx-cards.c | 316 /* 2013:024f PCTV nanoStick T2 290e 2095 /* 2013:024f PCTV nanoStick T2 290e. 2098 .name = "PCTV nanoStick T2 290e", 2280 /* eb1a:8179 Terratec Cinergy T2 Stick HD. 2283 .name = "Terratec Cinergy T2 Stick HD",
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H A D | em28xx-dvb.c | 1250 /* enable LNA for DVB-T, DVB-T2 and DVB-C */ em28xx_dvb_init()
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/linux-4.1.27/drivers/tty/ |
H A D | n_gsm.c | 72 #define T2 34 /* 333mS */ macro 78 #define T2 200 macro 1322 * Called off the T2 timer expiry in order to retransmit control frames 2060 /* Now we are sure T2 has stopped */ gsm_cleanup_mux() 2186 gsm->t2 = T2; gsm_alloc_mux()
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/linux-4.1.27/drivers/media/usb/dvb-usb-v2/ |
H A D | rtl28xxu.c | 867 * We continue on reduced mode, without DVB-T2/C, using master rtl2832u_frontend_attach() 1777 &rtl28xxu_props, "Astrometa DVB-T2", NULL) },
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H A D | anysee.c | 954 /* enable DVB-T/T2/C demod on IOE[5] */ anysee_frontend_attach()
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/linux-4.1.27/kernel/time/ |
H A D | hrtimer.c | 537 * T2 expires 5s from now hrtimer_force_reprogram() 542 * set. So we'd effectivly block all timers until the T2 event hrtimer_force_reprogram()
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/linux-4.1.27/drivers/hwmon/ |
H A D | lm93.c | 1775 * T4:P2 T4:P1 T3:P2 T3:P1 T2:P2 T2:P1 T1:P2 T1:P1 1780 * T4 T3 T2 T1
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/linux-4.1.27/drivers/mtd/nand/ |
H A D | sunxi_nand.c | 811 /* T2 <=> tCLH */ sunxi_nand_chip_set_timings()
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/linux-4.1.27/drivers/pinctrl/mediatek/ |
H A D | pinctrl-mtk-mt8135.h | 1720 "T2", "mt8135",
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/linux-4.1.27/drivers/gpu/drm/i915/ |
H A D | intel_bios.c | 1325 /* Set T2 to 40ms and T5 to 200ms */ intel_setup_bios()
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/linux-4.1.27/arch/arm/mm/ |
H A D | alignment.c | 710 case 0xe880: /* STM/STMIA/STMEA,LDM/LDMIA, PUSH/POP T2 */ do_alignment_t32_to_handler()
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/linux-4.1.27/net/bluetooth/ |
H A D | hci_conn.c | 58 { EDR_ESCO_MASK & ~ESCO_2EV3, 0x000d, 0x02 }, /* T2 */
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/linux-4.1.27/drivers/media/pci/cx23885/ |
H A D | cx23885-cards.c | 1178 /* WinTV-HVR5525 (PCIe, DVB-S/S2, DVB-T/T2/C) */ hauppauge_eeprom()
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/linux-4.1.27/drivers/net/wireless/iwlegacy/ |
H A D | 4965.c | 741 D_TXPOWER("chain %d meas %d T1=%d T2=%d T=%d\n", c, il4965_interpolate_chan()
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/linux-4.1.27/drivers/net/ethernet/8390/ |
H A D | pcnet_cs.c | 1513 PCMCIA_DEVICE_PROD_ID123("KingMax Technology Inc.", "EN10-T2", "PCMCIA Ethernet Card", 0x932b7189, 0x699e4436, 0x6f6652e0),
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/linux-4.1.27/arch/sparc/mm/ |
H A D | init_64.c | 1680 /* T1 and T2 support 48-bit virtual addresses. */ setup_page_offset()
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/linux-4.1.27/drivers/net/ethernet/intel/e1000/ |
H A D | e1000_hw.h | 2612 #define MII_SR_100T2_HD_CAPS 0x0200 /* 100T2 Half Duplex Capable */ 2613 #define MII_SR_100T2_FD_CAPS 0x0400 /* 100T2 Full Duplex Capable */
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/linux-4.1.27/drivers/video/fbdev/aty/ |
H A D | radeon_base.c | 184 /* 9600/FireGL T2 */
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/linux-4.1.27/drivers/media/dvb-core/ |
H A D | dvb_frontend.c | 2173 * ISDB-T and DVB-T/T2 already sets bandwidth. dtv_set_frontend()
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/linux-4.1.27/arch/m68k/ifpsp060/src/ |
H A D | fplsp.S | 550 T2: long 0x3D6F90AE,0xB1E75CC7 # 16381 LOG2 TRAIL label 7651 fsub.d T2(%pc),%fp0 # |X| - 16381 LOG2, ACCURATE 7776 fsub.d T2(%pc),%fp0 # |X| - 16381 LOG2, ACCURATE
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H A D | fpsp.S | 570 T2: long 0x3D6F90AE,0xB1E75CC7 # 16381 LOG2 TRAIL label 7757 fsub.d T2(%pc),%fp0 # |X| - 16381 LOG2, ACCURATE 7882 fsub.d T2(%pc),%fp0 # |X| - 16381 LOG2, ACCURATE
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H A D | pfpsp.S | 569 T2: long 0x3D6F90AE,0xB1E75CC7 # 16381 LOG2 TRAIL label
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