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Searched refs:iommu (Results 1 – 153 of 153) sorted by relevance

/linux-4.4.14/drivers/iommu/
Damd_iommu_init.c231 static int iommu_pc_get_set_reg_val(struct amd_iommu *iommu,
251 static u32 iommu_read_l1(struct amd_iommu *iommu, u16 l1, u8 address) in iommu_read_l1() argument
255 pci_write_config_dword(iommu->dev, 0xf8, (address | l1 << 16)); in iommu_read_l1()
256 pci_read_config_dword(iommu->dev, 0xfc, &val); in iommu_read_l1()
260 static void iommu_write_l1(struct amd_iommu *iommu, u16 l1, u8 address, u32 val) in iommu_write_l1() argument
262 pci_write_config_dword(iommu->dev, 0xf8, (address | l1 << 16 | 1 << 31)); in iommu_write_l1()
263 pci_write_config_dword(iommu->dev, 0xfc, val); in iommu_write_l1()
264 pci_write_config_dword(iommu->dev, 0xf8, (address | l1 << 16)); in iommu_write_l1()
267 static u32 iommu_read_l2(struct amd_iommu *iommu, u8 address) in iommu_read_l2() argument
271 pci_write_config_dword(iommu->dev, 0xf0, address); in iommu_read_l2()
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Dintel_irq_remapping.c31 struct intel_iommu *iommu; member
38 struct intel_iommu *iommu; member
45 struct intel_iommu *iommu; member
81 static void iommu_disable_irq_remapping(struct intel_iommu *iommu);
84 static bool ir_pre_enabled(struct intel_iommu *iommu) in ir_pre_enabled() argument
86 return (iommu->flags & VTD_FLAG_IRQ_REMAP_PRE_ENABLED); in ir_pre_enabled()
89 static void clear_ir_pre_enabled(struct intel_iommu *iommu) in clear_ir_pre_enabled() argument
91 iommu->flags &= ~VTD_FLAG_IRQ_REMAP_PRE_ENABLED; in clear_ir_pre_enabled()
94 static void init_ir_status(struct intel_iommu *iommu) in init_ir_status() argument
98 gsts = readl(iommu->reg + DMAR_GSTS_REG); in init_ir_status()
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Ddmar.c76 static void free_iommu(struct intel_iommu *iommu);
427 if (dmaru->iommu) in dmar_free_drhd()
428 free_iommu(dmaru->iommu); in dmar_free_drhd()
466 drhd->iommu->node = node; in dmar_parse_one_rhsa()
892 x86_init.iommu.iommu_init = intel_iommu_init; in detect_intel_iommu()
903 static void unmap_iommu(struct intel_iommu *iommu) in unmap_iommu() argument
905 iounmap(iommu->reg); in unmap_iommu()
906 release_mem_region(iommu->reg_phys, iommu->reg_size); in unmap_iommu()
917 static int map_iommu(struct intel_iommu *iommu, u64 phys_addr) in map_iommu() argument
921 iommu->reg_phys = phys_addr; in map_iommu()
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Dintel-iommu.c430 struct intel_iommu *iommu; /* IOMMU used by this device */ member
485 static void domain_context_clear(struct intel_iommu *iommu,
488 struct intel_iommu *iommu);
529 #define ecs_enabled(iommu) (intel_iommu_ecs && ecap_ecs(iommu->ecap) && \ argument
530 (intel_iommu_pasid28 || !ecap_broken_pasid(iommu->ecap)))
533 #define pasid_enabled(iommu) (ecs_enabled(iommu) && \ argument
534 (ecap_pasid(iommu->ecap) || ecap_broken_pasid(iommu->ecap)))
545 static bool translation_pre_enabled(struct intel_iommu *iommu) in translation_pre_enabled() argument
547 return (iommu->flags & VTD_FLAG_TRANS_PRE_ENABLED); in translation_pre_enabled()
550 static void clear_translation_pre_enabled(struct intel_iommu *iommu) in clear_translation_pre_enabled() argument
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Drockchip-iommu.c274 static u32 rk_iommu_read(struct rk_iommu *iommu, u32 offset) in rk_iommu_read() argument
276 return readl(iommu->base + offset); in rk_iommu_read()
279 static void rk_iommu_write(struct rk_iommu *iommu, u32 offset, u32 value) in rk_iommu_write() argument
281 writel(value, iommu->base + offset); in rk_iommu_write()
284 static void rk_iommu_command(struct rk_iommu *iommu, u32 command) in rk_iommu_command() argument
286 writel(command, iommu->base + RK_MMU_COMMAND); in rk_iommu_command()
289 static void rk_iommu_zap_lines(struct rk_iommu *iommu, dma_addr_t iova, in rk_iommu_zap_lines() argument
298 rk_iommu_write(iommu, RK_MMU_ZAP_ONE_LINE, iova); in rk_iommu_zap_lines()
301 static bool rk_iommu_is_stall_active(struct rk_iommu *iommu) in rk_iommu_is_stall_active() argument
303 return rk_iommu_read(iommu, RK_MMU_STATUS) & RK_MMU_STATUS_STALL_ACTIVE; in rk_iommu_is_stall_active()
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Dintel-svm.c37 int intel_svm_alloc_pasid_tables(struct intel_iommu *iommu) in intel_svm_alloc_pasid_tables() argument
42 order = ecap_pss(iommu->ecap) + 7 - PAGE_SHIFT; in intel_svm_alloc_pasid_tables()
49 iommu->name); in intel_svm_alloc_pasid_tables()
52 iommu->pasid_table = page_address(pages); in intel_svm_alloc_pasid_tables()
53 pr_info("%s: Allocated order %d PASID table.\n", iommu->name, order); in intel_svm_alloc_pasid_tables()
55 if (ecap_dis(iommu->ecap)) { in intel_svm_alloc_pasid_tables()
58 iommu->pasid_state_table = page_address(pages); in intel_svm_alloc_pasid_tables()
61 iommu->name); in intel_svm_alloc_pasid_tables()
64 idr_init(&iommu->pasid_idr); in intel_svm_alloc_pasid_tables()
69 int intel_svm_free_pasid_tables(struct intel_iommu *iommu) in intel_svm_free_pasid_tables() argument
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DMakefile1 obj-$(CONFIG_IOMMU_API) += iommu.o
2 obj-$(CONFIG_IOMMU_API) += iommu-traces.o
3 obj-$(CONFIG_IOMMU_API) += iommu-sysfs.o
4 obj-$(CONFIG_IOMMU_DMA) += dma-iommu.o
15 obj-$(CONFIG_INTEL_IOMMU) += intel-iommu.o
19 obj-$(CONFIG_OMAP_IOMMU) += omap-iommu.o
20 obj-$(CONFIG_OMAP_IOMMU_DEBUG) += omap-iommu-debug.o
21 obj-$(CONFIG_ROCKCHIP_IOMMU) += rockchip-iommu.o
24 obj-$(CONFIG_EXYNOS_IOMMU) += exynos-iommu.o
25 obj-$(CONFIG_SHMOBILE_IOMMU) += shmobile-iommu.o
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Damd_iommu.c249 return dev->archdata.iommu; in get_dev_data()
367 if (dev->archdata.iommu) in iommu_init_device()
377 struct amd_iommu *iommu; in iommu_init_device() local
379 iommu = amd_iommu_rlookup_table[dev_data->devid]; in iommu_init_device()
380 dev_data->iommu_v2 = iommu->is_iommu_v2; in iommu_init_device()
383 dev->archdata.iommu = dev_data; in iommu_init_device()
514 static void iommu_print_event(struct amd_iommu *iommu, void *__evt) in iommu_print_event() argument
593 static void iommu_poll_events(struct amd_iommu *iommu) in iommu_poll_events() argument
597 head = readl(iommu->mmio_base + MMIO_EVT_HEAD_OFFSET); in iommu_poll_events()
598 tail = readl(iommu->mmio_base + MMIO_EVT_TAIL_OFFSET); in iommu_poll_events()
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Damd_iommu_proto.h29 extern void amd_iommu_reset_cmd_buffer(struct amd_iommu *iommu);
66 extern int amd_iommu_create_irq_domain(struct amd_iommu *iommu);
68 static inline int amd_iommu_create_irq_domain(struct amd_iommu *iommu) in amd_iommu_create_irq_domain() argument
93 static inline bool iommu_feature(struct amd_iommu *iommu, u64 f) in iommu_feature() argument
95 if (!(iommu->cap & (1 << IOMMU_CAP_EFR))) in iommu_feature()
98 return !!(iommu->features & f); in iommu_feature()
Dof_iommu.c108 struct of_iommu_node *iommu = kzalloc(sizeof(*iommu), GFP_KERNEL); in of_iommu_set_ops() local
110 if (WARN_ON(!iommu)) in of_iommu_set_ops()
113 INIT_LIST_HEAD(&iommu->list); in of_iommu_set_ops()
114 iommu->np = np; in of_iommu_set_ops()
115 iommu->ops = ops; in of_iommu_set_ops()
117 list_add_tail(&iommu->list, &of_iommu_list); in of_iommu_set_ops()
Dipmmu-vmsa.c488 struct ipmmu_vmsa_archdata *archdata = dev->archdata.iommu; in ipmmu_attach_device()
530 struct ipmmu_vmsa_archdata *archdata = dev->archdata.iommu; in ipmmu_detach_device()
606 if (dev->archdata.iommu) { in ipmmu_add_device()
674 dev->archdata.iommu = archdata; in ipmmu_add_device()
711 kfree(dev->archdata.iommu); in ipmmu_add_device()
714 dev->archdata.iommu = NULL; in ipmmu_add_device()
724 struct ipmmu_vmsa_archdata *archdata = dev->archdata.iommu; in ipmmu_remove_device()
732 dev->archdata.iommu = NULL; in ipmmu_remove_device()
Damd_iommu_types.h374 #define for_each_iommu(iommu) \ argument
375 list_for_each_entry((iommu), &amd_iommu_list, list)
376 #define for_each_iommu_safe(iommu, next) \ argument
377 list_for_each_entry_safe((iommu), (next), &amd_iommu_list, list)
685 extern void iommu_flush_all_caches(struct amd_iommu *iommu);
Dshmobile-iommu.c131 struct shmobile_iommu_archdata *archdata = dev->archdata.iommu; in shmobile_iommu_attach_device()
160 struct shmobile_iommu_archdata *archdata = dev->archdata.iommu; in shmobile_iommu_detach_device()
358 dev->archdata.iommu = archdata; in shmobile_iommu_add_device()
Domap-iommu.h71 struct omap_iommu_arch_data *arch_data = dev->archdata.iommu; in dev_to_omap_iommu()
Dexynos-iommu.c135 #define has_sysmmu(dev) (dev->archdata.iommu != NULL)
743 struct exynos_iommu_owner *owner = dev->archdata.iommu; in exynos_iommu_attach_device()
1152 struct exynos_iommu_owner *owner = dev->archdata.iommu; in exynos_iommu_of_xlate()
1169 dev->archdata.iommu = owner; in exynos_iommu_of_xlate()
Domap-iommu.c1080 struct omap_iommu_arch_data *arch_data = dev->archdata.iommu; in omap_iommu_attach_dev()
1118 struct omap_iommu_arch_data *arch_data = dev->archdata.iommu; in _omap_iommu_detach_dev()
1260 dev->archdata.iommu = arch_data; in omap_iommu_add_device()
1269 struct omap_iommu_arch_data *arch_data = dev->archdata.iommu; in omap_iommu_remove_device()
Dtegra-smmu.c443 struct tegra_smmu *smmu = dev->archdata.iommu; in tegra_smmu_attach_dev()
720 dev->archdata.iommu = smmu; in tegra_smmu_add_device()
732 dev->archdata.iommu = NULL; in tegra_smmu_remove_device()
Darm-smmu.c1124 if (dev->archdata.iommu) { in arm_smmu_attach_dev()
1152 dev->archdata.iommu = domain; in arm_smmu_attach_dev()
1165 dev->archdata.iommu = NULL; in arm_smmu_detach_dev()
DKconfig199 The OMAP3 media platform drivers depend on iommu support,
/linux-4.4.14/arch/sparc/kernel/
Diommu.c51 struct iommu *iommu = container_of(iommu_map_table, struct iommu, tbl); in iommu_flushall() local
52 if (iommu->iommu_flushinv) { in iommu_flushall()
53 iommu_write(iommu->iommu_flushinv, ~(u64)0); in iommu_flushall()
58 tag = iommu->iommu_tags; in iommu_flushall()
65 (void) iommu_read(iommu->write_complete_reg); in iommu_flushall()
79 #define IOPTE_IS_DUMMY(iommu, iopte) \ argument
80 ((iopte_val(*iopte) & IOPTE_PAGE) == (iommu)->dummy_page_pa)
82 static inline void iopte_make_dummy(struct iommu *iommu, iopte_t *iopte) in iopte_make_dummy() argument
87 val |= iommu->dummy_page_pa; in iopte_make_dummy()
92 int iommu_table_init(struct iommu *iommu, int tsbsize, in iommu_table_init() argument
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Dsbus.c60 struct iommu *iommu = dev->archdata.iommu; in sbus_set_sbus64() local
75 cfg_reg = iommu->write_complete_reg; in sbus_set_sbus64()
210 struct iommu *iommu = op->dev.archdata.iommu; in sbus_build_irq() local
211 unsigned long reg_base = iommu->write_complete_reg - 0x2000UL; in sbus_build_irq()
272 struct iommu *iommu = op->dev.archdata.iommu; in sysio_ue_handler() local
273 unsigned long reg_base = iommu->write_complete_reg - 0x2000UL; in sysio_ue_handler()
346 struct iommu *iommu = op->dev.archdata.iommu; in sysio_ce_handler() local
347 unsigned long reg_base = iommu->write_complete_reg - 0x2000UL; in sysio_ce_handler()
425 struct iommu *iommu = op->dev.archdata.iommu; in sysio_sbus_error_handler() local
430 reg_base = iommu->write_complete_reg - 0x2000UL; in sysio_sbus_error_handler()
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Dpci_sun4v.c136 struct iommu *iommu; in dma_4v_alloc_coherent() local
157 iommu = dev->archdata.iommu; in dma_4v_alloc_coherent()
159 entry = iommu_tbl_range_alloc(dev, &iommu->tbl, npages, NULL, in dma_4v_alloc_coherent()
165 *dma_addrp = (iommu->tbl.table_map_base + (entry << IO_PAGE_SHIFT)); in dma_4v_alloc_coherent()
190 iommu_tbl_range_free(&iommu->tbl, *dma_addrp, npages, IOMMU_ERROR_CODE); in dma_4v_alloc_coherent()
219 struct iommu *iommu; in dma_4v_free_coherent() local
224 iommu = dev->archdata.iommu; in dma_4v_free_coherent()
227 entry = ((dvma - iommu->tbl.table_map_base) >> IO_PAGE_SHIFT); in dma_4v_free_coherent()
229 iommu_tbl_range_free(&iommu->tbl, dvma, npages, IOMMU_ERROR_CODE); in dma_4v_free_coherent()
240 struct iommu *iommu; in dma_4v_map_page() local
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Dpsycho_common.c206 struct iommu *iommu = pbm->iommu; in psycho_check_iommu_error() local
209 spin_lock_irqsave(&iommu->lock, flags); in psycho_check_iommu_error()
210 control = upa_readq(iommu->iommu_control); in psycho_check_iommu_error()
215 upa_writeq(control, iommu->iommu_control); in psycho_check_iommu_error()
245 spin_unlock_irqrestore(&iommu->lock, flags); in psycho_check_iommu_error()
402 struct iommu *iommu = pbm->iommu; in psycho_iommu_init() local
406 iommu->iommu_control = pbm->controller_regs + PSYCHO_IOMMU_CONTROL; in psycho_iommu_init()
407 iommu->iommu_tsbbase = pbm->controller_regs + PSYCHO_IOMMU_TSBBASE; in psycho_iommu_init()
408 iommu->iommu_flush = pbm->controller_regs + PSYCHO_IOMMU_FLUSH; in psycho_iommu_init()
409 iommu->iommu_tags = pbm->controller_regs + PSYCHO_IOMMU_TAG; in psycho_iommu_init()
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Dpci_fire.c30 struct iommu *iommu = pbm->iommu; in pci_fire_pbm_iommu_init() local
42 iommu->iommu_control = pbm->pbm_regs + FIRE_IOMMU_CONTROL; in pci_fire_pbm_iommu_init()
43 iommu->iommu_tsbbase = pbm->pbm_regs + FIRE_IOMMU_TSBBASE; in pci_fire_pbm_iommu_init()
44 iommu->iommu_flush = pbm->pbm_regs + FIRE_IOMMU_FLUSH; in pci_fire_pbm_iommu_init()
45 iommu->iommu_flushinv = pbm->pbm_regs + FIRE_IOMMU_FLUSHINV; in pci_fire_pbm_iommu_init()
50 iommu->write_complete_reg = pbm->controller_regs + 0x410000UL; in pci_fire_pbm_iommu_init()
55 upa_writeq(~(u64)0, iommu->iommu_flushinv); in pci_fire_pbm_iommu_init()
57 err = iommu_table_init(iommu, tsbsize * 8 * 1024, vdma[0], dma_mask, in pci_fire_pbm_iommu_init()
62 upa_writeq(__pa(iommu->page_table) | 0x7UL, iommu->iommu_tsbbase); in pci_fire_pbm_iommu_init()
64 control = upa_readq(iommu->iommu_control); in pci_fire_pbm_iommu_init()
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Dpci_schizo.c237 struct iommu *iommu = pbm->iommu; in schizo_check_iommu_error_pbm() local
244 spin_lock_irqsave(&iommu->lock, flags); in schizo_check_iommu_error_pbm()
245 control = upa_readq(iommu->iommu_control); in schizo_check_iommu_error_pbm()
252 upa_writeq(control, iommu->iommu_control); in schizo_check_iommu_error_pbm()
283 iommu->iommu_control); in schizo_check_iommu_error_pbm()
299 upa_writeq(control, iommu->iommu_control); in schizo_check_iommu_error_pbm()
341 spin_unlock_irqrestore(&iommu->lock, flags); in schizo_check_iommu_error_pbm()
1135 struct iommu *iommu = pbm->iommu; in schizo_pbm_iommu_init() local
1168 iommu->iommu_control = pbm->pbm_regs + SCHIZO_IOMMU_CONTROL; in schizo_pbm_iommu_init()
1169 iommu->iommu_tsbbase = pbm->pbm_regs + SCHIZO_IOMMU_TSBBASE; in schizo_pbm_iommu_init()
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Dldc.c146 struct ldc_iommu iommu; member
1016 static void ldc_demap(struct ldc_iommu *iommu, unsigned long id, u64 cookie, in ldc_demap() argument
1023 base = iommu->page_table + entry; in ldc_demap()
1038 struct ldc_iommu *ldc_iommu = &lp->iommu; in ldc_iommu_init()
1039 struct iommu_map_table *iommu = &ldc_iommu->iommu_map_table; in ldc_iommu_init() local
1050 iommu->map = kzalloc(sz, GFP_KERNEL); in ldc_iommu_init()
1051 if (!iommu->map) { in ldc_iommu_init()
1055 iommu_tbl_pool_init(iommu, num_tsb_entries, PAGE_SHIFT, in ldc_iommu_init()
1088 kfree(iommu->map); in ldc_iommu_init()
1089 iommu->map = NULL; in ldc_iommu_init()
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Dpci_psycho.c512 struct iommu *iommu; in psycho_probe() local
527 iommu = pbm->sibling->iommu; in psycho_probe()
529 iommu = kzalloc(sizeof(struct iommu), GFP_KERNEL); in psycho_probe()
530 if (!iommu) { in psycho_probe()
536 pbm->iommu = iommu; in psycho_probe()
587 kfree(pbm->iommu); in psycho_probe()
Dpci_sabre.c463 struct iommu *iommu; in sabre_probe() local
489 iommu = kzalloc(sizeof(*iommu), GFP_KERNEL); in sabre_probe()
490 if (!iommu) { in sabre_probe()
495 pbm->iommu = iommu; in sabre_probe()
578 kfree(pbm->iommu); in sabre_probe()
Dpci_impl.h146 struct iommu *iommu; member
Dpci.c263 sd->iommu = pbm->iommu; in of_create_pci_dev()
270 sd->iommu = pbm->iommu; in of_create_pci_dev()
957 struct iommu *iommu = pdev->dev.archdata.iommu; in pci64_dma_supported() local
959 dma_addr_mask = iommu->dma_addr_mask; in pci64_dma_supported()
Dof_device_common.c65 op->dev.archdata.iommu = bus_sd->iommu; in of_propagate_archdata()
DMakefile60 obj-$(CONFIG_SPARC64) += iommu.o
/linux-4.4.14/lib/
Diommu-common.c18 static inline bool need_flush(struct iommu_map_table *iommu) in need_flush() argument
20 return ((iommu->flags & IOMMU_NEED_FLUSH) != 0); in need_flush()
23 static inline void set_flush(struct iommu_map_table *iommu) in set_flush() argument
25 iommu->flags |= IOMMU_NEED_FLUSH; in set_flush()
28 static inline void clear_flush(struct iommu_map_table *iommu) in clear_flush() argument
30 iommu->flags &= ~IOMMU_NEED_FLUSH; in clear_flush()
51 void iommu_tbl_pool_init(struct iommu_map_table *iommu, in iommu_tbl_pool_init() argument
59 struct iommu_pool *p = &(iommu->large_pool); in iommu_tbl_pool_init()
63 iommu->nr_pools = IOMMU_NR_POOLS; in iommu_tbl_pool_init()
65 iommu->nr_pools = npools; in iommu_tbl_pool_init()
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DMakefile118 obj-$(CONFIG_IOMMU_HELPER) += iommu-helper.o iommu-common.o
/linux-4.4.14/drivers/vfio/
Dvfio_iommu_type1.c90 static struct vfio_dma *vfio_find_dma(struct vfio_iommu *iommu, in vfio_find_dma() argument
93 struct rb_node *node = iommu->dma_list.rb_node; in vfio_find_dma()
109 static void vfio_link_dma(struct vfio_iommu *iommu, struct vfio_dma *new) in vfio_link_dma() argument
111 struct rb_node **link = &iommu->dma_list.rb_node, *parent = NULL; in vfio_link_dma()
125 rb_insert_color(&new->node, &iommu->dma_list); in vfio_link_dma()
128 static void vfio_unlink_dma(struct vfio_iommu *iommu, struct vfio_dma *old) in vfio_unlink_dma() argument
130 rb_erase(&old->node, &iommu->dma_list); in vfio_unlink_dma()
336 static void vfio_unmap_unpin(struct vfio_iommu *iommu, struct vfio_dma *dma) in vfio_unmap_unpin() argument
351 domain = d = list_first_entry(&iommu->domain_list, in vfio_unmap_unpin()
354 list_for_each_entry_continue(d, &iommu->domain_list, next) { in vfio_unmap_unpin()
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/linux-4.4.14/arch/sparc/mm/
Diommu.c58 struct iommu_struct *iommu; in sbus_iommu_init() local
65 iommu = kmalloc(sizeof(struct iommu_struct), GFP_KERNEL); in sbus_iommu_init()
66 if (!iommu) { in sbus_iommu_init()
71 iommu->regs = of_ioremap(&op->resource[0], 0, PAGE_SIZE * 3, in sbus_iommu_init()
73 if (!iommu->regs) { in sbus_iommu_init()
78 control = sbus_readl(&iommu->regs->control); in sbus_iommu_init()
83 sbus_writel(control, &iommu->regs->control); in sbus_iommu_init()
85 iommu_invalidate(iommu->regs); in sbus_iommu_init()
86 iommu->start = IOMMU_START; in sbus_iommu_init()
87 iommu->end = 0xffffffff; in sbus_iommu_init()
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Dio-unit.c65 op->dev.archdata.iommu = iounit; in iounit_iommu_init()
144 struct iounit_struct *iounit = dev->archdata.iommu; in iounit_get_scsi_one()
155 struct iounit_struct *iounit = dev->archdata.iommu; in iounit_get_scsi_sgl()
171 struct iounit_struct *iounit = dev->archdata.iommu; in iounit_release_scsi_one()
185 struct iounit_struct *iounit = dev->archdata.iommu; in iounit_release_scsi_sgl()
205 struct iounit_struct *iounit = dev->archdata.iommu; in iounit_map_dma_area()
DMakefile10 obj-$(CONFIG_SPARC32) += extable.o srmmu.o iommu.o io-unit.o
/linux-4.4.14/arch/powerpc/platforms/cell/
Diommu.c115 struct cbe_iommu *iommu; member
142 static void invalidate_tce_cache(struct cbe_iommu *iommu, unsigned long *pte, in invalidate_tce_cache() argument
149 reg = iommu->xlate_regs + IOC_IOPT_CacheInvd; in invalidate_tce_cache()
206 invalidate_tce_cache(window->iommu, io_pte, npages); in tce_build_cell()
229 __pa(window->iommu->pad_page) | in tce_free_cell()
240 invalidate_tce_cache(window->iommu, io_pte, npages); in tce_free_cell()
246 struct cbe_iommu *iommu = data; in ioc_interrupt() local
248 stat = in_be64(iommu->xlate_regs + IOC_IO_ExcpStat); in ioc_interrupt()
264 out_be64(iommu->xlate_regs + IOC_IO_ExcpStat, stat); in ioc_interrupt()
309 static void cell_iommu_setup_stab(struct cbe_iommu *iommu, in cell_iommu_setup_stab() argument
[all …]
DMakefile3 obj-$(CONFIG_PPC_CELL_NATIVE) += iommu.o setup.o spider-pic.o \
/linux-4.4.14/drivers/gpu/drm/msm/
Dmsm_iommu.c27 static int msm_fault_handler(struct iommu_domain *iommu, struct device *dev, in msm_fault_handler() argument
36 struct msm_iommu *iommu = to_msm_iommu(mmu); in msm_iommu_attach() local
37 return iommu_attach_device(iommu->domain, mmu->dev); in msm_iommu_attach()
42 struct msm_iommu *iommu = to_msm_iommu(mmu); in msm_iommu_detach() local
43 iommu_detach_device(iommu->domain, mmu->dev); in msm_iommu_detach()
49 struct msm_iommu *iommu = to_msm_iommu(mmu); in msm_iommu_map() local
50 struct iommu_domain *domain = iommu->domain; in msm_iommu_map()
88 struct msm_iommu *iommu = to_msm_iommu(mmu); in msm_iommu_unmap() local
89 struct iommu_domain *domain = iommu->domain; in msm_iommu_unmap()
114 struct msm_iommu *iommu = to_msm_iommu(mmu); in msm_iommu_destroy() local
[all …]
Dmsm_gpu.c573 struct iommu_domain *iommu; in msm_gpu_init() local
650 iommu = iommu_domain_alloc(&platform_bus_type); in msm_gpu_init()
651 if (iommu) { in msm_gpu_init()
653 gpu->mmu = msm_iommu_new(&pdev->dev, iommu); in msm_gpu_init()
658 iommu_domain_free(iommu); in msm_gpu_init()
/linux-4.4.14/Documentation/ABI/testing/
Dsysfs-class-iommu-intel-iommu1 What: /sys/class/iommu/<iommu>/intel-iommu/address
8 intel-iommu with a DMAR DRHD table entry.
10 What: /sys/class/iommu/<iommu>/intel-iommu/cap
18 What: /sys/class/iommu/<iommu>/intel-iommu/ecap
26 What: /sys/class/iommu/<iommu>/intel-iommu/version
Dsysfs-class-iommu-amd-iommu1 What: /sys/class/iommu/<iommu>/amd-iommu/cap
9 What: /sys/class/iommu/<iommu>/amd-iommu/features
Dsysfs-class-iommu1 What: /sys/class/iommu/<iommu>/devices/
10 What: /sys/devices/.../iommu
/linux-4.4.14/Documentation/devicetree/bindings/iommu/
Dti,omap-iommu.txt5 "ti,omap2-iommu" for OMAP2/OMAP3 IOMMU instances
6 "ti,omap4-iommu" for OMAP4/OMAP5 IOMMU instances
7 "ti,dra7-dsp-iommu" for DRA7xx DSP IOMMU instances
8 "ti,dra7-iommu" for DRA7xx IOMMU instances
12 - #iommu-cells : Should be 0. OMAP IOMMUs are all "single-master" devices,
16 Documentation/devicetree/bindings/iommu/iommu.txt
21 - ti,iommu-bus-err-back : Indicates the IOMMU instance supports throwing
34 #iommu-cells = <0>;
35 compatible = "ti,omap2-iommu";
44 compatible = "ti,dra7-dsp-iommu";
[all …]
Drockchip,iommu.txt4 A Rockchip DRM iommu translates io virtual addresses to physical addresses for
9 - compatible : Should be "rockchip,iommu"
13 - #iommu-cells : Should be <0>. This indicates the iommu is a
16 Documentation/devicetree/bindings/iommu/iommu.txt
20 vopl_mmu: iommu@ff940300 {
21 compatible = "rockchip,iommu";
25 #iommu-cells = <0>;
Diommu.txt40 - #iommu-cells: The number of cells in an IOMMU specifier needed to encode an
46 - #iommu-cells = <0>: Single master IOMMU devices are not configurable and
52 - #iommu-cells = <1>: Multiple master IOMMU devices may need to be configured
56 - #iommu-cells = <4>: Some IOMMU devices allow the DMA window for masters to
108 iommu {
109 #iommu-cells = <0>;
113 iommus = <&{/iommu}>;
120 iommu {
129 #iommu-cells = <0>;
135 iommus = <&{/iommu}>;
[all …]
Drenesas,ipmmu-vmsa.txt17 - #iommu-cells: Must be 1.
34 #iommu-cells = <1>;
Darm,smmu-v3.txt57 #iommu-cells = <0>;
/linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/engine/device/
Dtegra.c91 mutex_init(&tdev->iommu.mutex); in nvkm_device_tegra_probe_iommu()
94 tdev->iommu.domain = iommu_domain_alloc(&platform_bus_type); in nvkm_device_tegra_probe_iommu()
95 if (IS_ERR(tdev->iommu.domain)) in nvkm_device_tegra_probe_iommu()
103 pgsize_bitmap = tdev->iommu.domain->ops->pgsize_bitmap; in nvkm_device_tegra_probe_iommu()
105 tdev->iommu.pgshift = PAGE_SHIFT; in nvkm_device_tegra_probe_iommu()
107 tdev->iommu.pgshift = fls(pgsize_bitmap & ~PAGE_MASK); in nvkm_device_tegra_probe_iommu()
108 if (tdev->iommu.pgshift == 0) { in nvkm_device_tegra_probe_iommu()
112 tdev->iommu.pgshift -= 1; in nvkm_device_tegra_probe_iommu()
115 ret = iommu_attach_device(tdev->iommu.domain, dev); in nvkm_device_tegra_probe_iommu()
119 ret = nvkm_mm_init(&tdev->iommu.mm, 0, in nvkm_device_tegra_probe_iommu()
[all …]
/linux-4.4.14/include/linux/
Dintel-iommu.h241 #define IOMMU_WAIT_OP(iommu, offset, op, cond, sts) \ argument
245 sts = op(iommu->reg + offset); \
377 void (*flush_context)(struct intel_iommu *iommu, u16 did, u16 sid,
379 void (*flush_iotlb)(struct intel_iommu *iommu, u16 did, u64 addr,
447 struct intel_iommu *iommu, void *addr, int size) in __iommu_flush_cache() argument
449 if (!ecap_coherent(iommu->ecap)) in __iommu_flush_cache()
456 extern int dmar_enable_qi(struct intel_iommu *iommu);
457 extern void dmar_disable_qi(struct intel_iommu *iommu);
458 extern int dmar_reenable_qi(struct intel_iommu *iommu);
459 extern void qi_global_iec(struct intel_iommu *iommu);
[all …]
Ddma_remapping.h38 extern int iommu_calculate_agaw(struct intel_iommu *iommu);
39 extern int iommu_calculate_max_sagaw(struct intel_iommu *iommu);
43 static inline int iommu_calculate_agaw(struct intel_iommu *iommu) in iommu_calculate_agaw() argument
47 static inline int iommu_calculate_max_sagaw(struct intel_iommu *iommu) in iommu_calculate_max_sagaw() argument
Diommu-common.h34 extern void iommu_tbl_pool_init(struct iommu_map_table *iommu,
42 struct iommu_map_table *iommu,
48 extern void iommu_tbl_range_free(struct iommu_map_table *iommu,
Ddmar.h62 struct intel_iommu *iommu; member
92 if (i=drhd->iommu, drhd->ignored) {} else
96 if (i=drhd->iommu, 0) {} else
280 extern int dmar_set_interrupt(struct intel_iommu *iommu);
Dof_iommu.h44 _OF_DECLARE(iommu, name, compat, fn, of_iommu_init_fn)
Ddma-mapping.h139 u64 size, struct iommu_ops *iommu, in arch_setup_dma_ops() argument
/linux-4.4.14/arch/sparc/include/asm/
Diommu_64.h27 struct iommu { struct
60 int iommu_table_init(struct iommu *iommu, int tsbsize, argument
Ddevice.h15 void *iommu; member
/linux-4.4.14/arch/arm/boot/dts/
Dexynos5250.dtsi269 iommu-names = "left", "right";
724 iommu = <&sysmmu_gsc0>;
734 iommu = <&sysmmu_gsc1>;
744 iommu = <&sysmmu_gsc2>;
754 iommu = <&sysmmu_gsc3>;
814 #iommu-cells = <0>;
825 #iommu-cells = <0>;
836 #iommu-cells = <0>;
846 #iommu-cells = <0>;
857 #iommu-cells = <0>;
[all …]
Ddra74x.dtsi86 compatible = "ti,dra7-dsp-iommu";
90 #iommu-cells = <0>;
96 compatible = "ti,dra7-dsp-iommu";
100 #iommu-cells = <0>;
Dexynos4x12.dtsi177 iommu-names = "isp", "drc", "fd", "mcuctl";
217 #iommu-cells = <0>;
228 #iommu-cells = <0>;
239 #iommu-cells = <0>;
250 #iommu-cells = <0>;
261 #iommu-cells = <0>;
272 #iommu-cells = <0>;
283 #iommu-cells = <0>;
Dexynos5420.dtsi182 iommu-names = "left", "right";
958 #iommu-cells = <0>;
968 #iommu-cells = <0>;
979 #iommu-cells = <0>;
990 #iommu-cells = <0>;
1001 #iommu-cells = <0>;
1011 #iommu-cells = <0>;
1020 #iommu-cells = <0>;
1029 #iommu-cells = <0>;
1039 #iommu-cells = <0>;
[all …]
Dexynos4.dtsi424 iommu-names = "left", "right";
856 #iommu-cells = <0>;
867 #iommu-cells = <0>;
878 #iommu-cells = <0>;
889 #iommu-cells = <0>;
900 #iommu-cells = <0>;
911 #iommu-cells = <0>;
922 #iommu-cells = <0>;
933 #iommu-cells = <0>;
944 #iommu-cells = <0>;
[all …]
Dexynos4210.dtsi247 #iommu-cells = <0>;
258 #iommu-cells = <0>;
Ddra7.dtsi920 compatible = "ti,dra7-dsp-iommu";
924 #iommu-cells = <0>;
930 compatible = "ti,dra7-dsp-iommu";
934 #iommu-cells = <0>;
940 compatible = "ti,dra7-iommu";
944 #iommu-cells = <0>;
945 ti,iommu-bus-err-back;
950 compatible = "ti,dra7-iommu";
954 #iommu-cells = <0>;
955 ti,iommu-bus-err-back;
Dr8a7794.dtsi1090 #iommu-cells = <1>;
1098 #iommu-cells = <1>;
1107 #iommu-cells = <1>;
1114 #iommu-cells = <1>;
1123 #iommu-cells = <1>;
1131 #iommu-cells = <1>;
Domap3.dtsi460 #iommu-cells = <0>;
461 compatible = "ti,omap2-iommu";
469 #iommu-cells = <0>;
470 compatible = "ti,omap2-iommu";
Domap4.dtsi552 compatible = "ti,omap4-iommu";
556 #iommu-cells = <0>;
560 compatible = "ti,omap4-iommu";
564 #iommu-cells = <0>;
565 ti,iommu-bus-err-back;
Dexynos3250.dtsi283 #iommu-cells = <0>;
321 #iommu-cells = <0>;
429 #iommu-cells = <0>;
Domap5.dtsi613 compatible = "ti,omap4-iommu";
617 #iommu-cells = <0>;
621 compatible = "ti,omap4-iommu";
625 #iommu-cells = <0>;
626 ti,iommu-bus-err-back;
Drk3288.dtsi806 vopb_mmu: iommu@ff930300 {
807 compatible = "rockchip,iommu";
812 #iommu-cells = <0>;
839 vopl_mmu: iommu@ff940300 {
840 compatible = "rockchip,iommu";
845 #iommu-cells = <0>;
Dr8a7791.dtsi1586 #iommu-cells = <1>;
1594 #iommu-cells = <1>;
1603 #iommu-cells = <1>;
1611 #iommu-cells = <1>;
1620 #iommu-cells = <1>;
1628 #iommu-cells = <1>;
1637 #iommu-cells = <1>;
Dr8a7790.dtsi1773 #iommu-cells = <1>;
1781 #iommu-cells = <1>;
1790 #iommu-cells = <1>;
1798 #iommu-cells = <1>;
1807 #iommu-cells = <1>;
1815 #iommu-cells = <1>;
Dexynos4415.dtsi279 #iommu-cells = <0>;
Dtegra114.dtsi530 #iommu-cells = <1>;
Dtegra20.dtsi554 iommu@7000f024 {
Dtegra30.dtsi648 #iommu-cells = <1>;
Dtegra124.dtsi601 #iommu-cells = <1>;
/linux-4.4.14/arch/powerpc/boot/dts/fsl/
Dp5020si-post.dtsi66 fsl,iommu-parent = <&pamu0>;
95 fsl,iommu-parent = <&pamu0>;
124 fsl,iommu-parent = <&pamu0>;
153 fsl,iommu-parent = <&pamu0>;
178 fsl,iommu-parent = <&pamu0>;
307 iommu@20000 {
382 fsl,iommu-parent = <&pamu0>;
388 fsl,iommu-parent = <&pamu0>;
400 fsl,iommu-parent = <&pamu1>;
413 fsl,iommu-parent = <&pamu1>;
[all …]
Dp2041si-post.dtsi66 fsl,iommu-parent = <&pamu0>;
95 fsl,iommu-parent = <&pamu0>;
124 fsl,iommu-parent = <&pamu0>;
149 fsl,iommu-parent = <&pamu0>;
275 iommu@20000 {
368 fsl,iommu-parent = <&pamu0>;
374 fsl,iommu-parent = <&pamu0>;
386 fsl,iommu-parent = <&pamu1>;
400 fsl,iommu-parent = <&pamu1>;
408 fsl,iommu-parent = <&pamu1>;
[all …]
Dp3041si-post.dtsi66 fsl,iommu-parent = <&pamu0>;
95 fsl,iommu-parent = <&pamu0>;
124 fsl,iommu-parent = <&pamu0>;
176 fsl,iommu-parent = <&pamu0>;
302 iommu@20000 {
395 fsl,iommu-parent = <&pamu0>;
401 fsl,iommu-parent = <&pamu0>;
413 fsl,iommu-parent = <&pamu1>;
427 fsl,iommu-parent = <&pamu1>;
435 fsl,iommu-parent = <&pamu1>;
[all …]
Dp5040si-post.dtsi66 fsl,iommu-parent = <&pamu0>;
94 fsl,iommu-parent = <&pamu0>;
122 fsl,iommu-parent = <&pamu0>;
262 iommu@20000 {
360 fsl,iommu-parent = <&pamu0>;
366 fsl,iommu-parent = <&pamu0>;
378 fsl,iommu-parent = <&pamu2>;
391 fsl,iommu-parent = <&pamu4>;
400 fsl,iommu-parent = <&pamu4>;
408 fsl,iommu-parent = <&pamu4>;
[all …]
Dp4080si-post.dtsi66 fsl,iommu-parent = <&pamu0>;
95 fsl,iommu-parent = <&pamu0>;
124 fsl,iommu-parent = <&pamu0>;
150 fsl,iommu-parent = <&pamu0>;
310 iommu@20000 {
354 fsl,iommu-parent = <&pamu0>;
467 fsl,iommu-parent = <&pamu0>;
473 fsl,iommu-parent = <&pamu0>;
485 fsl,iommu-parent = <&pamu1>;
499 fsl,iommu-parent = <&pamu1>;
[all …]
Dt1023si-post.dtsi49 fsl,iommu-parent = <&pamu0>;
75 fsl,iommu-parent = <&pamu0>;
101 fsl,iommu-parent = <&pamu0>;
217 iommu@20000 {
294 fsl,iommu-parent = <&pamu0>;
310 fsl,iommu-parent = <&pamu0>;
318 fsl,iommu-parent = <&pamu0>;
325 fsl,iommu-parent = <&pamu0>;
Dt1040si-post.dtsi64 fsl,iommu-parent = <&pamu0>;
90 fsl,iommu-parent = <&pamu0>;
116 fsl,iommu-parent = <&pamu0>;
142 fsl,iommu-parent = <&pamu0>;
398 iommu@20000 {
502 fsl,iommu-parent = <&pamu0>;
517 fsl,iommu-parent = <&pamu0>;
525 fsl,iommu-parent = <&pamu0>;
539 fsl,iommu-parent = <&pamu0>;
544 fsl,iommu-parent = <&pamu0>;
Dt2081si-post.dtsi65 fsl,iommu-parent = <&pamu0>;
92 fsl,iommu-parent = <&pamu0>;
119 fsl,iommu-parent = <&pamu0>;
146 fsl,iommu-parent = <&pamu0>;
496 iommu@20000 {
579 fsl,iommu-parent = <&pamu0>;
584 fsl,iommu-parent = <&pamu0>;
589 fsl,iommu-parent = <&pamu0>;
601 fsl,iommu-parent = <&pamu1>;
616 fsl,iommu-parent = <&pamu1>;
[all …]
Db4si-post.dtsi65 fsl,iommu-parent = <&pamu0>;
351 iommu@20000 {
424 fsl,iommu-parent = <&pamu0>;
430 fsl,iommu-parent = <&pamu0>;
437 fsl,iommu-parent = <&pamu1>;
449 fsl,iommu-parent = <&pamu1>;
Dt2080si-post.dtsi40 fsl,iommu-parent = <&pamu1>;
46 fsl,iommu-parent = <&pamu1>;
Db4860si-post.dtsi47 fsl,iommu-parent = <&pamu0>;
Dt4240si-post.dtsi932 iommu@20000 {
/linux-4.4.14/arch/powerpc/kernel/
Ddma.c137 struct iommu_table *iommu; in dma_direct_alloc_coherent() local
147 iommu = get_iommu_table_base(dev); in dma_direct_alloc_coherent()
148 if (!iommu) in dma_direct_alloc_coherent()
152 return iommu_alloc_coherent(dev, iommu, size, dma_handle, in dma_direct_alloc_coherent()
161 struct iommu_table *iommu; in dma_direct_free_coherent() local
168 iommu = get_iommu_table_base(dev); in dma_direct_free_coherent()
173 if (WARN_ON(!iommu)) in dma_direct_free_coherent()
175 iommu_free_coherent(iommu, size, vaddr, dma_handle); in dma_direct_free_coherent()
DMakefile93 obj-$(CONFIG_PPC64) += dma-iommu.o iommu.o
/linux-4.4.14/arch/x86/include/asm/
Dpci_64.h10 return sd->iommu; in pci_iommu()
16 sd->iommu = val; in set_pci_iommu()
Ddevice.h9 void *iommu; /* hook for IOMMU specific extension */ member
Dx86_init.h129 struct x86_init_iommu iommu; member
Dpci.h21 void *iommu; /* IOMMU private data */ member
/linux-4.4.14/Documentation/devicetree/bindings/memory-controllers/
Dnvidia,tegra-mc.txt15 - #iommu-cells: Should be 1. The single cell of the IOMMU specifier defines
19 See ../iommu/iommu.txt for details.
72 #iommu-cells = <1>;
/linux-4.4.14/drivers/of/
Ddevice.c91 struct iommu_ops *iommu; in of_dma_configure() local
146 iommu = of_iommu_configure(dev, np); in of_dma_configure()
148 iommu ? " " : " not "); in of_dma_configure()
150 arch_setup_dma_ops(dev, dma_addr, size, iommu, coherent); in of_dma_configure()
/linux-4.4.14/arch/ia64/include/asm/
Ddevice.h11 void *iommu; /* hook for IOMMU specific extension */ member
Dpci.h69 void *iommu; member
/linux-4.4.14/arch/arm64/include/asm/
Ddevice.h22 void *iommu; /* private IOMMU data */ member
Ddma-mapping.h51 struct iommu_ops *iommu, bool coherent);
/linux-4.4.14/arch/powerpc/platforms/pasemi/
DMakefile1 obj-y += setup.o pci.o time.o idle.o powersave.o iommu.o dma_lib.o misc.o
/linux-4.4.14/arch/arm/include/asm/
Ddevice.h15 void *iommu; /* private IOMMU data */ member
Ddma-mapping.h128 struct iommu_ops *iommu, bool coherent);
/linux-4.4.14/drivers/gpu/drm/nouveau/include/nvkm/core/
Dtegra.h27 } iommu; member
/linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/subdev/instmem/
Dgk20a.c607 if (tdev->iommu.domain) { in gk20a_instmem_new()
608 imem->mm_mutex = &tdev->iommu.mutex; in gk20a_instmem_new()
609 imem->mm = &tdev->iommu.mm; in gk20a_instmem_new()
610 imem->domain = tdev->iommu.domain; in gk20a_instmem_new()
611 imem->iommu_pgshift = tdev->iommu.pgshift; in gk20a_instmem_new()
/linux-4.4.14/Documentation/x86/x86_64/
Dboot-options.txt198 you have >3GB memory or told the kernel to us it (iommu=soft))
207 iommu=[<size>][,noagp][,off][,force][,noforce][,leak[=<nr_of_leak_pages>]
211 General iommu options:
221 iommu options only relevant to the AMD GART hardware IOMMU:
223 allowed Overwrite iommu off workarounds for specific chipsets.
226 leak Turn on simple iommu leak tracing (only when
246 iommu options only relevant to the software bounce buffering (SWIOTLB) IOMMU
/linux-4.4.14/drivers/gpu/drm/msm/mdp/mdp4/
Dmdp4_kms.c499 if (config->iommu) { in mdp4_kms_init()
500 mmu = msm_iommu_new(&pdev->dev, config->iommu); in mdp4_kms_init()
564 config.iommu = iommu_domain_alloc(&platform_bus_type); in mdp4_get_config()
571 config.iommu = msm_get_iommu_domain(DISPLAY_READ_DOMAIN); in mdp4_get_config()
Dmdp4_kms.h59 struct iommu_domain *iommu; member
/linux-4.4.14/arch/x86/kvm/
DMakefile18 kvm-$(CONFIG_KVM_DEVICE_ASSIGNMENT) += assigned-dev.o iommu.o
/linux-4.4.14/Documentation/devicetree/bindings/powerpc/fsl/
Dpamu.txt78 - fsl,iommu-parent
96 iommu@20000 {
148 fsl,iommu-parent = <&pamu0>;
/linux-4.4.14/arch/powerpc/platforms/pseries/
DMakefile6 setup.o iommu.o event_sources.o ras.o \
/linux-4.4.14/arch/mips/include/asm/
Dpci.h46 int iommu; member
/linux-4.4.14/drivers/gpu/drm/msm/mdp/mdp5/
Dmdp5_cfg.h101 struct iommu_domain *iommu; member
Dmdp5_kms.c597 if (config->platform.iommu) { in mdp5_kms_init()
598 mmu = msm_iommu_new(&pdev->dev, config->platform.iommu); in mdp5_kms_init()
602 iommu_domain_free(config->platform.iommu); in mdp5_kms_init()
Dmdp5_cfg.c559 config.iommu = iommu_domain_alloc(&platform_bus_type); in mdp5_get_config()
/linux-4.4.14/arch/x86/kernel/
Dx86_init.c76 .iommu = {
Dpci-dma.c264 x86_init.iommu.iommu_init(); in pci_iommu_init()
Daperture_64.c390 x86_init.iommu.iommu_init = gart_iommu_init; in gart_iommu_hole_init()
Dpci-calgary_64.c1471 x86_init.iommu.iommu_init = calgary_iommu_init; in detect_calgary()
/linux-4.4.14/Documentation/devicetree/bindings/soc/fsl/
Dqman-portals.txt43 - fsl,iommu-parent
74 - fsl,iommu-parent
Dbman.txt49 - fsl,iommu-parent
Dqman.txt51 - fsl,iommu-parent
/linux-4.4.14/arch/parisc/include/asm/
Dpci.h58 void * iommu; /* IOMMU this device is under */ member
Ddma-mapping.h216 #define GET_IOC(dev) (HBA_DATA(parisc_walk_tree(dev))->iommu)
/linux-4.4.14/arch/mips/pci/
Dpci-ip32.c119 .iommu = 0,
Dpci.c86 if (!hose->iommu) in pcibios_scanbus()
/linux-4.4.14/Documentation/devicetree/bindings/display/rockchip/
Drockchip-vop.txt30 - iommus: required a iommu node
/linux-4.4.14/include/trace/events/
Diommu.h8 #define TRACE_SYSTEM iommu
/linux-4.4.14/drivers/
DMakefile54 obj-$(CONFIG_IOMMU_SUPPORT) += iommu/
DKconfig147 source "drivers/iommu/Kconfig"
/linux-4.4.14/arch/arm64/mm/
Ddma-mapping.c982 struct iommu_ops *iommu) in __iommu_setup_dma_ops() argument
988 struct iommu_ops *iommu, bool coherent) in arch_setup_dma_ops() argument
994 __iommu_setup_dma_ops(dev, dma_base, size, iommu); in arch_setup_dma_ops()
/linux-4.4.14/arch/arm/mm/
Ddma-mapping.c2076 struct iommu_ops *iommu) in arm_setup_iommu_dma_ops() argument
2080 if (!iommu) in arm_setup_iommu_dma_ops()
2114 struct iommu_ops *iommu) in arm_setup_iommu_dma_ops() argument
2131 struct iommu_ops *iommu, bool coherent) in arch_setup_dma_ops() argument
2136 if (arm_setup_iommu_dma_ops(dev, dma_base, size, iommu)) in arch_setup_dma_ops()
/linux-4.4.14/arch/ia64/hp/common/
Dsba_iommu.c259 ? ((struct ioc *) PCI_CONTROLLER(to_pci_dev(dev))->iommu) : NULL)
1759 controller->iommu = ioc; in ioc_sac_init()
1981 if (PCI_CONTROLLER(bus)->iommu) in sba_connect_bus()
1996 PCI_CONTROLLER(bus)->iommu = ioc; in sba_connect_bus()
/linux-4.4.14/drivers/parisc/
Deisa.c312 eisa_dev.hba.iommu = ccio_get_iommu(dev); in eisa_probe()
Ddino.c956 dino_dev->hba.iommu = ccio_get_iommu(dev); in dino_probe()
Dccio-dma.c1559 HBA_DATA(dev->dev.platform_data)->iommu = ioc; in ccio_probe()
Dlba_pci.c1502 lba_dev->hba.iommu = sba_get_iommu(dev); /* get iommu data */ in lba_driver_probe()
/linux-4.4.14/drivers/gpu/drm/i915/
Di915_gpu_error.c368 err_printf(m, "IOMMU enabled?: %d\n", error->iommu); in i915_error_state_to_str()
1270 error->iommu = -1; in i915_capture_gen_state()
1272 error->iommu = intel_iommu_gfx_mapped; in i915_capture_gen_state()
Di915_drv.h499 int iommu; member
/linux-4.4.14/arch/x86/
DKconfig.debug196 time with iommu=noforce. This will also enable scatter gather
200 be set more finegrained using the iommu= command line
DKconfig819 turned off at boot time with the iommu=off parameter.
831 Calgary anyway, pass 'iommu=calgary' on the kernel command line.
/linux-4.4.14/Documentation/
Dvfio.txt164 The user now has full access to all the devices and the iommu for this
498 (iommu=group_mf). The latter we can't prevent, but the IOMMU should
509 from either function of the device are indistinguishable to the iommu:
Dremoteproc.txt201 contiguous memory, or iommu mapping of certain on-chip peripherals.
Dkernel-parameters.txt444 does not override iommu=pt
1532 Enable intel iommu driver.
1534 Disable intel iommu driver.
1542 With this option iommu will not optimize to look
1599 iommu= [x86]
DDMA-API.txt591 WARNING: at /data2/repos/linux-2.6-iommu/lib/dma-debug.c:448
/linux-4.4.14/arch/arm/mach-omap2/
DMakefile226 obj-$(CONFIG_OMAP_IOMMU) += omap-iommu.o
/linux-4.4.14/include/asm-generic/
Dvmlinux.lds.h178 #define IOMMU_OF_TABLES() OF_TABLE(CONFIG_OF_IOMMU, iommu)
/linux-4.4.14/arch/arm64/boot/dts/freescale/
Dfsl-ls2080a.dtsi202 smmu: iommu@5000000 {
/linux-4.4.14/
DMAINTAINERS640 L: iommu@lists.linux-foundation.org
641 T: git git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu.git
643 F: drivers/iommu/amd_iommu*.[ch]
644 F: include/linux/amd-iommu.h
1758 F: drivers/iommu/arm-smmu.c
1759 F: drivers/iommu/arm-smmu-v3.c
1760 F: drivers/iommu/io-pgtable-arm.c
5549 L: iommu@lists.linux-foundation.org
5550 T: git git://git.infradead.org/iommu-2.6.git
5552 F: drivers/iommu/intel-iommu.c
[all …]
/linux-4.4.14/Documentation/devicetree/
Dbooting-without-of.txt419 tables used for the iommu. Typically, the reserve map should