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Searched refs:cycles (Results 1 – 200 of 258) sorted by relevance

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/linux-4.4.14/include/linux/mfd/syscon/
Datmel-smc.h89 u32 cycles; in at91sam9_smc_setup_ns_to_cycles() local
91 cycles = DIV_ROUND_UP(timing_ns, clk_period); in at91sam9_smc_setup_ns_to_cycles()
92 if (cycles / 32) { in at91sam9_smc_setup_ns_to_cycles()
94 if (cycles < 128) in at91sam9_smc_setup_ns_to_cycles()
95 cycles = 0; in at91sam9_smc_setup_ns_to_cycles()
98 coded_cycles |= cycles % 32; in at91sam9_smc_setup_ns_to_cycles()
119 u32 cycles; in at91sam9_smc_pulse_ns_to_cycles() local
121 cycles = DIV_ROUND_UP(timing_ns, clk_period); in at91sam9_smc_pulse_ns_to_cycles()
122 if (cycles / 64) { in at91sam9_smc_pulse_ns_to_cycles()
124 if (cycles < 256) in at91sam9_smc_pulse_ns_to_cycles()
[all …]
/linux-4.4.14/drivers/memory/
Djz4780-nemc.c158 uint32_t smcr, val, cycles; in jz4780_nemc_configure_bank() local
204 cycles = jz4780_nemc_ns_to_cycles(nemc, val); in jz4780_nemc_configure_bank()
205 if (cycles > 15) { in jz4780_nemc_configure_bank()
207 val, cycles); in jz4780_nemc_configure_bank()
211 smcr |= cycles << NEMC_SMCR_TAS_SHIFT; in jz4780_nemc_configure_bank()
216 cycles = jz4780_nemc_ns_to_cycles(nemc, val); in jz4780_nemc_configure_bank()
217 if (cycles > 15) { in jz4780_nemc_configure_bank()
219 val, cycles); in jz4780_nemc_configure_bank()
223 smcr |= cycles << NEMC_SMCR_TAH_SHIFT; in jz4780_nemc_configure_bank()
228 cycles = jz4780_nemc_ns_to_cycles(nemc, val); in jz4780_nemc_configure_bank()
[all …]
Dpl172.c64 int cycles; in pl172_timing_prop() local
68 cycles = DIV_ROUND_UP(val * pl172->rate, NSEC_PER_MSEC) - start; in pl172_timing_prop()
69 if (cycles < 0) { in pl172_timing_prop()
70 cycles = 0; in pl172_timing_prop()
71 } else if (cycles > max) { in pl172_timing_prop()
76 writel(cycles, pl172->base + reg_offset); in pl172_timing_prop()
/linux-4.4.14/drivers/net/ethernet/mellanox/mlx4/
Den_clock.c44 container_of(tc, struct mlx4_en_dev, cycles); in mlx4_en_read_clock()
133 mdev->cycles.mult = neg_adj ? mult - diff : mult + diff; in mlx4_en_phc_adjfreq()
202 timecounter_init(&mdev->clock, &mdev->cycles, ns); in mlx4_en_phc_settime()
272 memset(&mdev->cycles, 0, sizeof(mdev->cycles)); in mlx4_en_init_timestamp()
273 mdev->cycles.read = mlx4_en_read_clock; in mlx4_en_init_timestamp()
274 mdev->cycles.mask = CLOCKSOURCE_MASK(48); in mlx4_en_init_timestamp()
275 mdev->cycles.shift = freq_to_shift(dev->caps.hca_core_clock); in mlx4_en_init_timestamp()
276 mdev->cycles.mult = in mlx4_en_init_timestamp()
277 clocksource_khz2mult(1000 * dev->caps.hca_core_clock, mdev->cycles.shift); in mlx4_en_init_timestamp()
278 mdev->nominal_c_mult = mdev->cycles.mult; in mlx4_en_init_timestamp()
[all …]
/linux-4.4.14/Documentation/devicetree/bindings/mtd/
Dfsmc-nand.txt15 byte 0 TCLR : CLE to RE delay in number of AHB clock cycles, only 4 bits
17 cycles.
19 byte 2 THIZ : number of HCLK clock cycles during which the data bus is
21 Only valid for write transactions. Zero means zero cycles,
22 255 means 255 cycles.
23 byte 3 THOLD : number of HCLK clock cycles to hold the address (and data
25 one cycle, 255 means 256 cycles.
26 byte 4 TWAIT : number of HCLK clock cycles to assert the command to the
28 255 means 256 cycles.
29 byte 5 TSET : number of HCLK clock cycles to assert the address before the
[all …]
Dgpmc-nand.txt46 Using ELM for ECC error correction frees some CPU cycles.
/linux-4.4.14/drivers/net/wireless/ath/
Dhw.c144 u32 cycles, busy, rx, tx; in ath_hw_cycle_counters_update() local
151 cycles = REG_READ(ah, AR_CCCNT); in ath_hw_cycle_counters_update()
166 common->cc_ani.cycles += cycles; in ath_hw_cycle_counters_update()
171 common->cc_survey.cycles += cycles; in ath_hw_cycle_counters_update()
183 listen_time = (cc->cycles - cc->rx_frame - cc->tx_frame) / in ath_hw_get_listen_time()
Dath.h48 u32 cycles; member
/linux-4.4.14/arch/xtensa/include/asm/
Ddelay.h40 unsigned long cycles = (usecs * (ccount_freq >> 15)) >> 5; in __udelay() local
43 while (((unsigned long)get_ccount()) - start < cycles) in __udelay()
61 unsigned long cycles = (nsec * (ccount_freq >> 15)) >> 15; in __ndelay() local
62 __delay(cycles); in __ndelay()
/linux-4.4.14/arch/arm/plat-omap/
Dcounter_32k.c54 static cycles_t cycles; variable
62 last_cycles = cycles; in omap_read_persistent_clock64()
63 cycles = sync32k_cnt_reg ? readl_relaxed(sync32k_cnt_reg) : 0; in omap_read_persistent_clock64()
65 nsecs = clocksource_cyc2ns(cycles - last_cycles, in omap_read_persistent_clock64()
/linux-4.4.14/drivers/pwm/
Dpwm-berlin.c64 u64 cycles, tmp; in berlin_pwm_config() local
66 cycles = clk_get_rate(pwm->clk); in berlin_pwm_config()
67 cycles *= period_ns; in berlin_pwm_config()
68 do_div(cycles, NSEC_PER_SEC); in berlin_pwm_config()
71 tmp = cycles; in berlin_pwm_config()
82 cycles = tmp * duty_ns; in berlin_pwm_config()
83 do_div(cycles, period_ns); in berlin_pwm_config()
84 duty = cycles; in berlin_pwm_config()
Dpwm-fsl-ftm.c188 unsigned long fix_rate, ext_rate, cycles; in fsl_pwm_calculate_period() local
190 cycles = fsl_pwm_calculate_period_cycles(fpc, period_ns, in fsl_pwm_calculate_period()
192 if (cycles) { in fsl_pwm_calculate_period()
194 return cycles; in fsl_pwm_calculate_period()
208 cycles = fsl_pwm_calculate_period_cycles(fpc, period_ns, m0); in fsl_pwm_calculate_period()
209 if (cycles) { in fsl_pwm_calculate_period()
211 return cycles; in fsl_pwm_calculate_period()
/linux-4.4.14/tools/perf/util/
Dparse-events.l221 cpu-cycles|cycles { return sym(yyscanner, PERF_TYPE_HARDWARE, PERF_COUNT_HW_CPU_CYCLES); }
222 stalled-cycles-frontend|idle-cycles-frontend { return sym(yyscanner, PERF_TYPE_HARDWARE, PERF_COUNT…
223 stalled-cycles-backend|idle-cycles-backend { return sym(yyscanner, PERF_TYPE_HARDWARE, PERF_COUNT_H…
229 bus-cycles { return sym(yyscanner, PERF_TYPE_HARDWARE, PERF_COUNT_HW_BUS_CYCLES); }
230 ref-cycles { return sym(yyscanner, PERF_TYPE_HARDWARE, PERF_COUNT_HW_REF_CPU_CYCLES); }
247 cycles-ct { return str(yyscanner, PE_KERNEL_PMU_EVENT); }
248 cycles-t { return str(yyscanner, PE_KERNEL_PMU_EVENT); }
Dannotate.h63 u64 cycles; member
86 u64 cycles; member
150 unsigned cycles);
Dannotate.c505 unsigned offset, unsigned cycles, in __symbol__account_cycles() argument
520 ch[offset].cycles_aggr += cycles; in __symbol__account_cycles()
528 ch[offset].cycles = 0; in __symbol__account_cycles()
538 ch[offset].cycles += cycles; in __symbol__account_cycles()
568 static struct annotation *symbol__get_annotation(struct symbol *sym, bool cycles) in symbol__get_annotation() argument
576 if (!notes->src->cycles_hist && cycles) { in symbol__get_annotation()
597 struct symbol *sym, unsigned cycles) in symbol__account_cycles() argument
619 offset, cycles, in symbol__account_cycles()
625 unsigned cycles) in addr_map_symbol__account_cycles() argument
630 if (!cycles) in addr_map_symbol__account_cycles()
[all …]
Dstat.c78 ID(CYCLES_IN_TX, cpu/cycles-t/),
81 ID(CYCLES_IN_TX_CP, cpu/cycles-ct/),
Dhist.c645 1, bi->flags.cycles ? bi->flags.cycles : 1, in iter_add_next_branch_entry()
1493 if (bs && bs->nr && bs->entries[0].flags.cycles) { in hist__account_cycles()
1513 bi[i].flags.cycles); in hist__account_cycles()
Dsort.c607 return left->branch_info->flags.cycles - in sort__cycles_cmp()
608 right->branch_info->flags.cycles; in sort__cycles_cmp()
614 if (he->branch_info->flags.cycles == 0) in hist_entry__cycles_snprintf()
617 he->branch_info->flags.cycles); in hist_entry__cycles_snprintf()
Devent.h137 u64 cycles:16; member
/linux-4.4.14/arch/h8300/lib/
Ddelay.c13 void __delay(unsigned long cycles) in __delay() argument
16 "bne 1b":"=r"(cycles):"0"(cycles)); in __delay()
/linux-4.4.14/Documentation/m68k/
DREADME.buddha142 497ns Select (7 clock cycles) , IOR/IOW after 172ns (2 clock cycles)
148 639ns Select (9 clock cycles), IOR/IOW after 243ns (3 clock cycles)
152 781ns Select (11 clock cycles), IOR/IOW after 314ns (4 clock cycles)
156 355ns Select (5 clock cycles), IOR/IOW after 101ns (1 clock cycle)
160 355ns Select (5 clock cycles), IOR/IOW after 172ns (2 clock cycles)
164 355ns Select (5 clock cycles), IOR/IOW after 243ns (3 clock cycles)
168 1065ns Select (15 clock cycles), IOR/IOW after 314ns (4 clock cycles)
172 355ns Select, (5 clock cycles), IOR/IOW after 101ns (1 clock cycle)
178 781ns select, IOR/IOW after 4 clock cycles (=314ns) aktive.
182 system: Sometimes two more clock cycles are inserted by the
[all …]
/linux-4.4.14/tools/power/cpupower/bench/
Dbenchmark.c126 " for %lius\n", _round + 1, config->cycles, in start_benchmark()
138 for (cycle = 0; cycle < config->cycles; cycle++) { in start_benchmark()
152 performance_time / config->cycles); in start_benchmark()
164 for (cycle = 0; cycle < config->cycles; cycle++) { in start_benchmark()
182 powersave_time / config->cycles); in start_benchmark()
DREADME-BENCH35 will be run X time in a row (cycles):
39 cycles=20
50 25ms load/sleep time repeated 20 times (cycles).
51 50ms load/sleep time repeated 20 times (cycles).
53 100ms load/sleep time repeated 20 times (cycles).
83 But if ondemand always kicks in in the middle of the load sleep cycles, it
116 -n, --cycles=<int> load/sleep cycles to get an avarage value to compare
Dsystem.c145 sleep_time += 2 * config->cycles * in prepare_user()
147 load_time += 2 * config->cycles * in prepare_user()
Dmain.c135 sscanf(optarg, "%u", &config->cycles); in main()
186 config->cycles, in main()
Dexample.cfg8 cycles = 20
Dparse.c133 config->cycles = 5; in prepare_default_config()
199 sscanf(val, "%u", &config->cycles); in prepare_config()
Dparse.h29 unsigned int cycles; /* calculation cycles with the same sleep/load time */ member
/linux-4.4.14/drivers/cpufreq/
Dblackfin-cpufreq.c141 cycles_t cycles; in bfin_target() local
159 cycles = get_cycles(); in bfin_target()
161 cycles += 10; /* ~10 cycles we lose after get_cycles() */ in bfin_target()
162 __bfin_cycles_off += (cycles << __bfin_cycles_mod) - (cycles << index); in bfin_target()
/linux-4.4.14/arch/m68k/coldfire/
Dsltimers.c103 u32 cycles, scnt; in mcfslt_read_clk() local
107 cycles = mcfslt_cnt; in mcfslt_read_clk()
109 cycles += mcfslt_cycles_per_jiffy; in mcfslt_read_clk()
115 return cycles + ((mcfslt_cycles_per_jiffy - 1) - scnt); in mcfslt_read_clk()
Dpit.c124 u32 cycles; in pit_read_clk() local
129 cycles = pit_cnt; in pit_read_clk()
132 return cycles + PIT_CYCLES_PER_JIFFY - pcntr; in pit_read_clk()
Dtimers.c95 u32 cycles; in mcftmr_read_clk() local
100 cycles = mcftmr_cnt; in mcftmr_read_clk()
103 return cycles + tcn; in mcftmr_read_clk()
/linux-4.4.14/drivers/clocksource/
Dtimer-prima2.c78 u64 cycles; in sirfsoc_timer_read() local
83 cycles = readl_relaxed(sirfsoc_timer_base + SIRFSOC_TIMER_LATCHED_HI); in sirfsoc_timer_read()
84 cycles = (cycles << 32) | in sirfsoc_timer_read()
87 return cycles; in sirfsoc_timer_read()
Dexynos_mct.c260 static void exynos4_mct_comp0_start(bool periodic, unsigned long cycles) in exynos4_mct_comp0_start() argument
269 exynos4_mct_write(cycles, EXYNOS4_MCT_G_COMP0_ADD_INCR); in exynos4_mct_comp0_start()
272 comp_cycle = exynos4_read_count_64() + cycles; in exynos4_mct_comp0_start()
282 static int exynos4_comp_set_next_event(unsigned long cycles, in exynos4_comp_set_next_event() argument
285 exynos4_mct_comp0_start(false, cycles); in exynos4_comp_set_next_event()
361 static void exynos4_mct_tick_start(unsigned long cycles, in exynos4_mct_tick_start() argument
368 tmp = (1 << 31) | cycles; /* MCT_L_UPDATE_ICNTB */ in exynos4_mct_tick_start()
382 static int exynos4_tick_set_next_event(unsigned long cycles, in exynos4_tick_set_next_event() argument
388 exynos4_mct_tick_start(cycles, mevt); in exynos4_tick_set_next_event()
Drockchip_timer.c62 static void rk_timer_update_counter(unsigned long cycles, in rk_timer_update_counter() argument
65 writel_relaxed(cycles, rk_base(ce) + TIMER_LOAD_COUNT0); in rk_timer_update_counter()
76 static inline int rk_timer_set_next_event(unsigned long cycles, in rk_timer_set_next_event() argument
80 rk_timer_update_counter(cycles, ce); in rk_timer_set_next_event()
Dtimer-atlas7.c90 u64 cycles; in sirfsoc_timer_read() local
95 cycles = readl_relaxed(sirfsoc_timer_base + SIRFSOC_TIMER_64COUNTER_RLATCHED_HI); in sirfsoc_timer_read()
96 cycles = (cycles << 32) | readl_relaxed(sirfsoc_timer_base + SIRFSOC_TIMER_64COUNTER_RLATCHED_LO); in sirfsoc_timer_read()
98 return cycles; in sirfsoc_timer_read()
Dtegra20_timer.c64 static int tegra_timer_set_next_event(unsigned long cycles, in tegra_timer_set_next_event() argument
69 reg = 0x80000000 | ((cycles > 1) ? (cycles-1) : 0); in tegra_timer_set_next_event()
Dvt8500_timer.c75 static int vt8500_timer_set_next_event(unsigned long cycles, in vt8500_timer_set_next_event() argument
79 cycle_t alarm = clocksource.read(&clocksource) + cycles; in vt8500_timer_set_next_event()
Dmoxart_timer.c81 static int moxart_clkevt_next_event(unsigned long cycles, in moxart_clkevt_next_event() argument
88 u = readl(base + TIMER1_BASE + REG_COUNT) - cycles; in moxart_clkevt_next_event()
Dtimer-keystone.c129 static int keystone_set_next_event(unsigned long cycles, in keystone_set_next_event() argument
132 return keystone_timer_config(cycles, TCR_ENAMODE_ONESHOT_MASK); in keystone_set_next_event()
Dcadence_ttc_timer.c115 unsigned long cycles) in ttc_set_interval() argument
124 writel_relaxed(cycles, timer->base_addr + TTC_INTR_VAL_OFFSET); in ttc_set_interval()
182 static int ttc_set_next_event(unsigned long cycles, in ttc_set_next_event() argument
188 ttc_set_interval(timer, cycles); in ttc_set_next_event()
Dsamsung_pwm_timer.c188 static int samsung_set_next_event(unsigned long cycles, in samsung_set_next_event() argument
201 if (!cycles) in samsung_set_next_event()
202 cycles = 1; in samsung_set_next_event()
204 samsung_time_setup(pwm.event_id, cycles); in samsung_set_next_event()
Dqcom-timer.c59 static int msm_timer_set_next_event(unsigned long cycles, in msm_timer_set_next_event() argument
68 writel_relaxed(cycles, event_base + TIMER_MATCH_VAL); in msm_timer_set_next_event()
Dtimer-u300.c276 static int u300_set_next_event(unsigned long cycles, in u300_set_next_event() argument
290 writel(cycles, u300_timer_base + U300_TIMER_APP_GPT1TC); in u300_set_next_event()
/linux-4.4.14/arch/arm/mach-omap2/
Dvc.c433 u32 cycles; in omap4_calc_volt_ramp() local
438 cycles = voltdm->sys_clk.rate / 1000 * time / 1000; in omap4_calc_volt_ramp()
440 cycles /= 64; in omap4_calc_volt_ramp()
446 if (cycles > 63) { in omap4_calc_volt_ramp()
447 cycles /= 4; in omap4_calc_volt_ramp()
452 if (cycles > 63) { in omap4_calc_volt_ramp()
453 cycles /= 2; in omap4_calc_volt_ramp()
458 if (cycles > 63) { in omap4_calc_volt_ramp()
459 cycles /= 4; in omap4_calc_volt_ramp()
464 if (cycles > 63) { in omap4_calc_volt_ramp()
[all …]
Dtimer.c96 static int omap2_gp_timer_set_next_event(unsigned long cycles, in omap2_gp_timer_set_next_event() argument
100 0xffffffff - cycles, OMAP_TIMER_POSTED); in omap2_gp_timer_set_next_event()
/linux-4.4.14/Documentation/misc-devices/
Disl2900346 0: 2^16 cycles (default)
47 1: 2^12 cycles
48 2: 2^8 cycles
49 3: 2^4 cycles
/linux-4.4.14/arch/m68k/68000/
Dtimers.c82 u32 cycles; in m68328_read_clk() local
85 cycles = m68328_tick_cnt + TCN; in m68328_read_clk()
88 return cycles; in m68328_read_clk()
/linux-4.4.14/tools/perf/tests/attr/
DREADME50 perf record --group -e cycles,instructions kill (test-record-group)
51 perf record -e '{cycles,instructions}' kill (test-record-group1)
57 perf stat -e cycles kill (test-stat-basic)
62 perf stat --group -e cycles,instructions kill (test-stat-group)
63 perf stat -e '{cycles,instructions}' kill (test-stat-group1)
64 perf stat -i -e cycles kill (test-stat-no-inherit)
Dtest-stat-basic3 args = -e cycles kill >/dev/null 2>&1
Dtest-stat-no-inherit3 args = -i -e cycles kill >/dev/null 2>&1
Dtest-stat-group13 args = -e '{cycles,instructions}' kill >/dev/null 2>&1
Dtest-stat-group3 args = --group -e cycles,instructions kill >/dev/null 2>&1
Dtest-stat-C03 args = -e cycles -C 0 kill >/dev/null 2>&1
Dtest-record-group3 args = --group -e cycles,instructions kill >/dev/null 2>&1
Dtest-record-group13 args = -e '{cycles,instructions}' kill >/dev/null 2>&1
Dtest-record-group-sampling3 args = -e '{cycles,cache-misses}:S' kill >/dev/null 2>&1
/linux-4.4.14/Documentation/devicetree/bindings/mmc/
Dsdhci-pxa.txt25 - mrvl,clk-delay-cycles: Specify a number of cycles to delay for tuning.
37 mrvl,clk-delay-cycles = <31>;
49 mrvl,clk-delay-cycles = <0x1F>;
/linux-4.4.14/arch/arm64/lib/
Ddelay.c27 void __delay(unsigned long cycles) in __delay() argument
31 while ((get_cycles() - start) < cycles) in __delay()
/linux-4.4.14/Documentation/devicetree/bindings/c6x/
Dclocks.txt24 - ti,c64x+pll-bypass-delay: CPU cycles to delay when entering bypass mode
26 - ti,c64x+pll-reset-delay: CPU cycles to delay after PLL reset
28 - ti,c64x+pll-lock-delay: CPU cycles to delay after PLL frequency change
/linux-4.4.14/arch/nios2/lib/
Ddelay.c23 void __delay(unsigned long cycles) in __delay() argument
27 while ((get_cycles() - start) < cycles) in __delay()
/linux-4.4.14/arch/tile/lib/
Ddelay.c39 void __delay(unsigned long cycles) in __delay() argument
41 cycles_t target = get_cycles() + cycles; in __delay()
/linux-4.4.14/arch/openrisc/lib/
Ddelay.c31 void __delay(unsigned long cycles) in __delay() argument
35 while ((get_cycles() - start) < cycles) in __delay()
/linux-4.4.14/arch/sparc/kernel/
Dtime_32.c154 u64 cycles; in timer_cs_read() local
159 cycles = timer_cs_internal_counter; in timer_cs_read()
164 cycles *= sparc_config.cs_period; in timer_cs_read()
165 cycles += offset; in timer_cs_read()
167 return cycles; in timer_cs_read()
/linux-4.4.14/arch/x86/entry/vdso/
Dvclock_gettime.c199 cycles_t cycles; in vgetsns() local
202 cycles = vread_tsc(); in vgetsns()
205 cycles = vread_hpet(); in vgetsns()
209 cycles = vread_pvclock(mode); in vgetsns()
213 v = (cycles - gtod->cycle_last) & gtod->mask; in vgetsns()
/linux-4.4.14/arch/arm/mach-ixp4xx/
Dixp4xx_npe.c415 int cycles = 0; in npe_send_message() local
434 while ((cycles < MAX_RETRIES) && in npe_send_message()
437 cycles++; in npe_send_message()
440 if (cycles == MAX_RETRIES) { in npe_send_message()
446 debug_msg(npe, "Sending a message took %i cycles\n", cycles); in npe_send_message()
454 int cycles = 0, cnt = 0; in npe_recv_message() local
458 while (cycles < MAX_RETRIES) { in npe_recv_message()
465 cycles++; in npe_recv_message()
478 if (cycles == MAX_RETRIES) { in npe_recv_message()
484 debug_msg(npe, "Receiving a message took %i cycles\n", cycles); in npe_recv_message()
/linux-4.4.14/tools/testing/selftests/powerpc/pmu/ebb/
Dcycles_test.c15 int cycles(void) in cycles() function
59 return test_harness(cycles, "cycles"); in main()
/linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/subdev/therm/
Dfan.c129 u32 cycles, cur, prev; in nvkm_therm_fan_sense() local
145 cycles = 0; in nvkm_therm_fan_sense()
154 cycles++; in nvkm_therm_fan_sense()
157 } while (cycles < 5 && nvkm_timer_read(tmr) - start < 250000000); in nvkm_therm_fan_sense()
160 if (cycles == 5) { in nvkm_therm_fan_sense()
/linux-4.4.14/crypto/
Dtcrypt.c120 unsigned long cycles = 0; in test_cipher_cycles() local
151 cycles += end - start; in test_cipher_cycles()
159 (cycles + 4) / 8, blen); in test_cipher_cycles()
203 unsigned long cycles = 0; in test_aead_cycles() local
234 cycles += end - start; in test_aead_cycles()
242 (cycles + 4) / 8, blen); in test_aead_cycles()
613 unsigned long cycles = 0; in test_hash_cycles_digest() local
638 cycles += end - start; in test_hash_cycles_digest()
648 cycles / 8, cycles / (8 * blen)); in test_hash_cycles_digest()
656 unsigned long cycles = 0; in test_hash_cycles() local
[all …]
/linux-4.4.14/arch/tile/gxio/
Diorpc_mpipe.c415 uint64_t cycles; member
419 uint64_t *nsec, uint64_t *cycles) in gxio_mpipe_get_timestamp_aux() argument
430 *cycles = params->cycles; in gxio_mpipe_get_timestamp_aux()
440 uint64_t cycles; member
444 uint64_t nsec, uint64_t cycles) in gxio_mpipe_set_timestamp_aux() argument
451 params->cycles = cycles; in gxio_mpipe_set_timestamp_aux()
Dmpipe.c436 cycles_t cycles = get_cycles(); in gxio_mpipe_set_timestamp() local
439 (uint64_t)cycles); in gxio_mpipe_set_timestamp()
/linux-4.4.14/Documentation/devicetree/bindings/misc/
Difm-csi.txt14 - ifm,csi-wait-cycles: sensor bus wait cycles
34 ifm,csi-wait-cycles = <0>;
/linux-4.4.14/include/linux/
Dtimecounter.h80 cycle_t cycles, u64 mask, u64 *frac) in cyclecounter_cyc2ns() argument
82 u64 ns = (u64) cycles; in cyclecounter_cyc2ns()
Dclocksource.h176 static inline s64 clocksource_cyc2ns(cycle_t cycles, u32 mult, u32 shift) in clocksource_cyc2ns() argument
178 return ((u64) cycles * mult) >> shift; in clocksource_cyc2ns()
/linux-4.4.14/arch/sh/lib/
Dmemcpy-sh4.S30 mov r4,r2 ! 5 MT (0 cycles latency)
32 mov.l @(r0,r5),r7 ! 21 LS (2 cycles latency)
38 ! 6 cycles, 4 bytes per iteration
103 mov r4,r2 ! 5 MT (0 cycles latency)
105 mov.l @(r0,r5),r7 ! 21 LS (2 cycles latency)
111 ! 6 cycles, 4 bytes per iteration
221 ! 4 cycles, 2 bytes per iteration
249 ! 3 cycles, 1 byte per iteration
331 ! 4 cycles, 2 long words per iteration
365 ! 4 cycles, 2 long words per iteration
[all …]
/linux-4.4.14/arch/blackfin/kernel/
Dtime-ts.c128 static int bfin_gptmr0_set_next_event(unsigned long cycles, in bfin_gptmr0_set_next_event() argument
134 set_gptimer_pwidth(TIMER0_id, cycles - 3); in bfin_gptmr0_set_next_event()
245 static int bfin_coretmr_set_next_event(unsigned long cycles, in bfin_coretmr_set_next_event() argument
250 bfin_write_TCOUNT(cycles); in bfin_coretmr_set_next_event()
/linux-4.4.14/Documentation/devicetree/bindings/regulator/
Dti-abb-regulator.txt22 - ti,clock-cycles: SoC specific data about count of system ti,clock-cycles used for
24 cycles for SR2_WTCNT_VALUE).
79 ti,clock-cycles = <8>;
99 ti,clock-cycles = <16>;
126 ti,clock-cycles = <16>;
/linux-4.4.14/drivers/media/usb/gspca/stv06xx/
Dstv06xx_hdcs.c189 int cycles, err; in hdcs_set_exposure() local
192 cycles = val * HDCS_CLK_FREQ_MHZ * 257; in hdcs_set_exposure()
200 rowexp = cycles / rp; in hdcs_set_exposure()
203 cycles -= rowexp * rp; in hdcs_set_exposure()
208 srowexp = hdcs->w - (cycles + hdcs->exp.er + 13) / ct; in hdcs_set_exposure()
214 srowexp = cp - hdcs->exp.er - 6 - cycles; in hdcs_set_exposure()
/linux-4.4.14/arch/arm/lib/
Ddelay.c57 static void __timer_delay(unsigned long cycles) in __timer_delay() argument
61 while ((get_cycles() - start) < cycles) in __timer_delay()
/linux-4.4.14/arch/arm/mach-gemini/
Dtime.c71 static int gemini_timer_set_next_event(unsigned long cycles, in gemini_timer_set_next_event() argument
78 writel(cr + cycles, TIMER_MATCH1(TIMER1_BASE)); in gemini_timer_set_next_event()
79 if (readl(TIMER_COUNT(TIMER1_BASE)) - cr > cycles) in gemini_timer_set_next_event()
/linux-4.4.14/arch/x86/include/asm/
Dpvclock.h72 cycle_t *cycles, u8 *flags) in __pvclock_read_cycles() argument
84 *cycles = ret; in __pvclock_read_cycles()
/linux-4.4.14/drivers/staging/iio/Documentation/
Dsysfs-bus-iio-impedance-analyzer-ad593327 Number of output excitation cycles (settling time cycles)
Dsysfs-bus-iio-ad71928 alternate cycles, to eliminate DC errors.
/linux-4.4.14/kernel/time/
Dtimecounter.c83 cycle_t cycles, u64 mask, u64 frac) in cc_cyc2ns_backwards() argument
85 u64 ns = (u64) cycles; in cc_cyc2ns_backwards()
/linux-4.4.14/arch/arm/mach-ks8695/
Dtime.c78 static int ks8695_set_next_event(unsigned long cycles, in ks8695_set_next_event() argument
82 u32 half = DIV_ROUND_CLOSEST(cycles, 2); in ks8695_set_next_event()
/linux-4.4.14/tools/perf/Documentation/
Dperf-bench.txt157 --cycles::
158 Use perf's cpu-cycles event instead of gettimeofday syscall.
181 --cycles::
182 Use perf's cpu-cycles event instead of gettimeofday syscall.
Dperf-list.txt49 The precise modifier works with event types 0x76 (cpu-cycles, CPU
56 perf record -a -e cpu-cycles:p ... # use ibs op counting cycles
57 perf record -a -e r076:p ... # same as -e cpu-cycles:p
84 cycles
Dperf-annotate.txt67 samples, TAB/UNTAB cycles through the lines with more samples.
Dperf-stat.txt141 example: 'perf stat -I 1000 -e cycles -a sleep 5'
181 24821162526 CPU cycles # 3057.784 M/sec
Dintel-pt.txt326 cycles since the last CYC packet. Unlike MTC and TSC packets,
349 The cyc_thresh value represents the minimum number of CPU cycles
351 number of CPU cycles is:
355 e.g. value 4 means 8 CPU cycles must pass before a CYC packet
357 packet is sent, not at, e.g. every 8 CPU cycles.
/linux-4.4.14/drivers/firewire/
Dcore-transaction.c735 unsigned int cycles; in compute_split_timeout_timestamp() local
738 cycles = card->split_timeout_cycles; in compute_split_timeout_timestamp()
739 cycles += request_timestamp & 0x1fff; in compute_split_timeout_timestamp()
742 timestamp += (cycles / 8000) << 13; in compute_split_timeout_timestamp()
743 timestamp |= cycles % 8000; in compute_split_timeout_timestamp()
1076 unsigned int cycles; in update_split_timeout() local
1078 cycles = card->split_timeout_hi * 8000 + (card->split_timeout_lo >> 19); in update_split_timeout()
1081 cycles = clamp(cycles, 800u, 3u * 8000u); in update_split_timeout()
1083 card->split_timeout_cycles = cycles; in update_split_timeout()
1084 card->split_timeout_jiffies = DIV_ROUND_UP(cycles * HZ, 8000); in update_split_timeout()
/linux-4.4.14/Documentation/devicetree/bindings/display/exynos/
Dsamsung-fimd.txt49 - cs-setup: clock cycles for the active period of address signal is enabled
52 - wr-setup: clock cycles for the active period of CS signal is enabled until
55 - wr-active: clock cycles for the active period of CS is enabled.
57 - wr-hold: clock cycles for the active period of CS is disabled until write
/linux-4.4.14/arch/mips/pci/
Dpci-octeon.c418 unsigned long cycles, pci_clock; in octeon_pci_initialize() local
421 cycles = read_c0_cvmcount(); in octeon_pci_initialize()
424 cycles = read_c0_cvmcount() - cycles; in octeon_pci_initialize()
426 (cycles / (mips_hpt_frequency / 1000000)); in octeon_pci_initialize()
/linux-4.4.14/arch/arm/mach-omap1/
Dtime.c120 static int omap_mpu_set_next_event(unsigned long cycles, in omap_mpu_set_next_event() argument
123 omap_mpu_timer_start(0, cycles, 0); in omap_mpu_set_next_event()
/linux-4.4.14/arch/arc/kernel/
Dtime.c190 static void arc_timer_event_setup(unsigned int cycles) in arc_timer_event_setup() argument
192 write_aux_reg(ARC_REG_TIMER0_LIMIT, cycles); in arc_timer_event_setup()
/linux-4.4.14/arch/hexagon/include/asm/
Ddelay.h24 extern void __delay(unsigned long cycles);
/linux-4.4.14/drivers/net/wireless/ath/ath9k/
Dlink.c518 if (cc->cycles > 0) { in ath_update_survey_stats()
523 survey->time += cc->cycles / div; in ath_update_survey_stats()
529 if (cc->cycles < div) in ath_update_survey_stats()
532 if (cc->cycles > 0) in ath_update_survey_stats()
533 ret = cc->rx_busy * 100 / cc->cycles; in ath_update_survey_stats()
/linux-4.4.14/Documentation/ABI/testing/
Dsysfs-bus-event_source-devices-events5 /sys/devices/cpu/events/stalled-cycles-frontend
7 /sys/devices/cpu/events/stalled-cycles-backend
9 /sys/devices/cpu/events/cpu-cycles
/linux-4.4.14/Documentation/
Dstatic-keys.txt262 1,474,374,262 cycles # 1.723 GHz ( +- 0.17% )
263 <not supported> stalled-cycles-frontend
264 <not supported> stalled-cycles-backend
279 1,432,559,428 cycles # 1.703 GHz ( +- 0.18% )
280 <not supported> stalled-cycles-frontend
281 <not supported> stalled-cycles-backend
291 saved .2% on instructions, and 2.8% on cycles and 1.4% on elapsed time.
Dcrc32.txt54 32 bits later. Thus, the first 32 cycles of this are pretty boring.
56 the end, so we have to add 32 extra cycles shifting in zeros at the
60 next_input_bit() until the moment it's needed. Then the first 32 cycles
Dcpu-load.txt35 If we imagine the system with one task that periodically burns cycles
Dworkqueue.txt124 not expected to hog a CPU and consume many cycles. That means
215 work items which are expected to hog CPU cycles so that their
348 cycles, using a bound wq is usually beneficial due to the increased
369 2. A single work item that consumes lots of cpu cycles
Dedac.txt528 poll_msec time period between POLL cycles for events
577 test-block-bits-1 every 10 cycles, this counter is bumped once,
579 test-block-bits-2 every 100 cycles, this counter is bumped once,
581 test-block-bits-3 every 1000 cycles, this counter is bumped once,
Dxz.txt65 Double checking the integrity would probably be waste of CPU cycles.
/linux-4.4.14/arch/hexagon/kernel/
Dtime.c217 void __delay(unsigned long cycles) in __delay() argument
221 while ((__vmgettime() - start) < cycles) in __delay()
/linux-4.4.14/arch/tile/include/gxio/
Diorpc_mpipe.h124 uint64_t *nsec, uint64_t *cycles);
127 uint64_t nsec, uint64_t cycles);
/linux-4.4.14/Documentation/devicetree/bindings/ata/
Dsata_highbank.txt27 cycles to transmit before sending an SGPIO pattern
29 cycles to transmit after sending an SGPIO pattern
/linux-4.4.14/Documentation/devicetree/bindings/input/touchscreen/
Dti-tsc-adc.txt34 ADC clock cycles. Charge delay value should be large
49 clock cycles to wait after applying the
56 ADC clock cycles to sample (to hold
/linux-4.4.14/Documentation/devicetree/bindings/display/
Dssd1307fb.txt25 - solomon,prechargep1: Length of deselect period (phase 1) in clock cycles.
26 - solomon,prechargep2: Length of precharge period (phase 2) in clock cycles.
/linux-4.4.14/arch/arm/mach-spear/
Dtime.c157 static int clockevent_next_event(unsigned long cycles, in clockevent_next_event() argument
165 writew(cycles, gpt_base + LOAD(CLKEVT)); in clockevent_next_event()
/linux-4.4.14/arch/powerpc/perf/
Dpower7-pmu.c377 GENERIC_EVENT_ATTR(cpu-cycles, PM_CYC);
378 GENERIC_EVENT_ATTR(stalled-cycles-frontend, PM_GCT_NOSLOT_CYC);
379 GENERIC_EVENT_ATTR(stalled-cycles-backend, PM_CMPLU_STALL);
Dhv-gpci-requests.h91 __count(0x10, 8, cycles)
/linux-4.4.14/drivers/char/
Drandom.c794 unsigned cycles; in add_timer_randomness() member
802 sample.cycles = random_get_entropy(); in add_timer_randomness()
900 cycles_t cycles = random_get_entropy(); in add_interrupt_randomness() local
906 if (cycles == 0) in add_interrupt_randomness()
907 cycles = get_reg(fast_pool, regs); in add_interrupt_randomness()
908 c_high = (sizeof(cycles) > 4) ? cycles >> 32 : 0; in add_interrupt_randomness()
910 fast_pool->pool[0] ^= cycles ^ j_high ^ irq; in add_interrupt_randomness()
918 add_interrupt_bench(cycles); in add_interrupt_randomness()
/linux-4.4.14/Documentation/arm/
DCCN.txt46 ccn/cycles/ [Kernel PMU event]
51 / # perf stat -a -e ccn/cycles/,ccn/xp_valid_flit,xp=1,port=0,vc=1,dir=1/ \
Dkernel_user_helpers.txt19 since those code segments only use a few cycles before returning to user
/linux-4.4.14/drivers/media/pci/b2c2/
Dflexcop-dma.c159 flexcop_dma_index_t dma_idx, u8 cycles) in flexcop_dma_config_timer() argument
167 v.dma_0x4_write.dmatimer = cycles; in flexcop_dma_config_timer()
/linux-4.4.14/arch/metag/lib/
Dmemset.S28 ! Preamble to LongLoop which generates 4*8 bytes per interation (5 cycles)
45 ! Preamble to LongishLoop which generates 1*8 bytes per interation (2 cycles)
/linux-4.4.14/arch/mips/include/asm/octeon/
Dcvmx.h382 static inline void cvmx_wait(uint64_t cycles) in cvmx_wait() argument
384 uint64_t done = cvmx_get_cycle() + cycles; in cvmx_wait()
/linux-4.4.14/Documentation/devicetree/bindings/sound/
Dics43432.txt6 64 clock cycles in each stereo output frame; 24 of the 32 available bits
Dst,sta350.txt96 million clock cycles to pass before shutting down.
/linux-4.4.14/Documentation/devicetree/bindings/input/
Dstmpe-keypad.txt9 - st,scan-count : Scanning cycles elapsed before key data is updated
/linux-4.4.14/Documentation/devicetree/bindings/watchdog/
Dof-xilinx-wdt.txt13 - xlnx,wdt-interval : Watchdog timeout interval in 2^<val> clock cycles,
/linux-4.4.14/arch/arc/include/asm/
Darcregs.h227 unsigned int pad:8, x1616:8, dsp:4, cycles:2, type:2, ver:8; member
229 unsigned int ver:8, type:2, cycles:2, dsp:4, x1616:8, pad:8;
/linux-4.4.14/drivers/media/rc/
Diguanair.c304 uint32_t cycles, fours, sevens; in iguanair_set_tx_carrier() local
308 cycles = DIV_ROUND_CLOSEST(24000000, carrier * 2) - in iguanair_set_tx_carrier()
316 sevens = (4 - cycles) & 3; in iguanair_set_tx_carrier()
317 fours = (cycles - sevens * 7) / 4; in iguanair_set_tx_carrier()
/linux-4.4.14/arch/x86/kernel/cpu/
Dperf_event_intel_lbr.c439 u16 cycles = 0; in intel_pmu_lbr_read_64() local
453 cycles = (info & LBR_INFO_CYCLES); in intel_pmu_lbr_read_64()
484 cpuc->lbr_entries[out].cycles = cycles; in intel_pmu_lbr_read_64()
Dperf_event.c1606 EVENT_ATTR(cpu-cycles, CPU_CYCLES );
1612 EVENT_ATTR(bus-cycles, BUS_CYCLES );
1613 EVENT_ATTR(stalled-cycles-frontend, STALLED_CYCLES_FRONTEND );
1614 EVENT_ATTR(stalled-cycles-backend, STALLED_CYCLES_BACKEND );
1615 EVENT_ATTR(ref-cycles, REF_CPU_CYCLES );
/linux-4.4.14/arch/alpha/kernel/
Dsetup.c1323 int cycles, prev_cycles = 1000000; in external_cache_probe() local
1335 cycles = read_mem_block(__va(0), stride, size); in external_cache_probe()
1336 if (cycles > prev_cycles * 2) { in external_cache_probe()
1340 size >> 11, prev_cycles, cycles); in external_cache_probe()
1345 prev_cycles = cycles; in external_cache_probe()
/linux-4.4.14/tools/perf/ui/browsers/
Dannotate.c156 if (dl->cycles) in annotate_browser__write()
158 CYCLES_WIDTH - 1, dl->cycles); in annotate_browser__write()
917 if (n_insn && ch->num && ch->cycles) { in count_and_fill()
918 float ipc = n_insn / ((double)ch->cycles / (double)ch->num); in count_and_fill()
952 if (ch && ch->cycles) { in annotate__compute_ipc()
959 dl->cycles = ch->cycles_aggr / ch->num_aggr; in annotate__compute_ipc()
/linux-4.4.14/arch/m68k/fpsp040/
Dsacos.S18 | Speed: The program sCOS takes approximately 310 cycles.
Dstwotox.S19 | Speed: The program stwotox takes approximately 190 cycles and the
20 | program stentox takes approximately 200 cycles.
Dsatanh.S19 | Speed: The program satanh takes approximately 270 cycles.
Dsasin.S18 | Speed: The program sASIN takes approximately 310 cycles.
Dscosh.S18 | Speed: The program sCOSH takes approximately 250 cycles.
Dssinh.S18 | Speed: The program sSINH takes approximately 280 cycles.
Dslogn.S19 | Speed: The program slogn takes approximately 190 cycles for input
22 | 210 cycles. For the less common arguments, the program will
Dstanh.S18 | Speed: The program stanh takes approximately 270 cycles.
Dsetox.S33 | The program setox takes approximately 210/190 cycles for input
39 | The program setoxm1 takes approximately ??? / ??? cycles for input
41 | approximately ??? / ??? cycles. For the less common arguments,
Dsatan.S18 | Speed: The program satan takes approximately 160 cycles for input
Dssin.S23 | Speed: The programs sSIN and sCOS take approximately 150 cycles for
25 | situation. The speed for sSINCOS is approximately 190 cycles.
Dstan.S18 | Speed: The program sTAN takes approximately 170 cycles for
Ddecbin.S13 | Speed: The program decbin takes ??? cycles to execute.
/linux-4.4.14/Documentation/hwmon/
Dmax3179019 PWM outputs. The desired fan speeds (or PWM duty cycles) are written
Dlm7028 the driver accesses the LM70 using SPI communication: 16 SCLK cycles
Dadm924063 with independent fan speed measurement cycles counting alternating rising
115 range, this will occur within a few measurement cycles.
Dvt1211167 Each PWM has 4 associated distinct output duty-cycles: full, high, low and
172 thermal thresholds exist that controls both PWMs output duty-cycles. The
Dpc87360175 once every 1024 sampling cycles (that is every 34 minutes at the default
/linux-4.4.14/drivers/net/wireless/ti/wl12xx/
Dscan.h89 u8 cycles; /* maximum number of scan cycles */ member
Dscan.c343 cfg->cycles = 0; in wl1271_scan_sched_scan_config()
/linux-4.4.14/drivers/misc/altera-stapl/
Daltera-jtag.h97 int altera_wait_cycles(struct altera_state *astate, s32 cycles,
Daltera-jtag.c352 s32 cycles, in altera_wait_cycles() argument
370 for (count = 0L; count < cycles; count++) in altera_wait_cycles()
/linux-4.4.14/Documentation/devicetree/bindings/phy/
Dnvidia,tegra20-usb-phy.txt37 - nvidia,hssync-start-delay : Number of 480 Mhz clock cycles to wait before
40 - nvidia,idle-wait-delay : Number of 480 Mhz clock cycles of idle to wait
/linux-4.4.14/drivers/media/i2c/
Dtc358743_regs.h353 #define SET_FREQ_RANGE_MODE_CYCLES(cycles) (((cycles) - 1) & \ argument
/linux-4.4.14/Documentation/x86/
Dtlb.txt53 Essentially, you are balancing the cycles you spend doing invlpg
54 with the cycles that you spend refilling the TLB later.
/linux-4.4.14/drivers/input/keyboard/
Dpmic8xxx-keypad.c381 int bits, rc, cycles; in pmic8xxx_kpd_init() local
446 cycles = (row_hold_ns * KEYP_CLOCK_FREQ) / NSEC_PER_SEC; in pmic8xxx_kpd_init()
448 scan_val |= (cycles << KEYP_SCAN_ROW_HOLD_SHIFT); in pmic8xxx_kpd_init()
/linux-4.4.14/drivers/dma/
Dmoxart-dma.c464 unsigned int completed_cycles, cycles; in moxart_dma_desc_size_in_flight() local
467 cycles = readl(ch->base + REG_OFF_CYCLES); in moxart_dma_desc_size_in_flight()
468 completed_cycles = (ch->desc->dma_cycles - cycles); in moxart_dma_desc_size_in_flight()
/linux-4.4.14/arch/arm/mach-davinci/
Dtime.c296 static int davinci_set_next_event(unsigned long cycles, in davinci_set_next_event() argument
301 t->period = cycles; in davinci_set_next_event()
/linux-4.4.14/drivers/staging/rdma/hfi1/
Dhfi.h1205 u32 cycles; in egress_cycles() local
1215 cycles = len * 8; /* bits */ in egress_cycles()
1216 cycles *= 805; in egress_cycles()
1217 cycles /= rate; in egress_cycles()
1219 return cycles; in egress_cycles()
/linux-4.4.14/arch/powerpc/boot/dts/
Do2d.dtsi119 ifm,csi-wait-cycles = <0>;
Debony.dts302 0x00000000 0x00000000 0x00000000 /* no IACK cycles */
303 0x00000002 0x0ed00000 0x00000004 /* Special cycles */
Dtaishan.dts393 0x00000000 0x00000000 0x00000000 /* no IACK cycles */
394 0x00000002 0x0ed00000 0x00000004 /* Special cycles */
Dicon.dts296 0x00000000 0x00000000 0x00000000 /* no IACK cycles */
297 0x0000000c 0x0ed00000 0x00000004 /* Special cycles */
Dkatmai.dts286 0x00000000 0x00000000 0x00000000 /* no IACK cycles */
287 0x0000000c 0x0ed00000 0x00000004 /* Special cycles */
Dcanyonlands.dts432 0x00000000 0x00000000 0x00000000 /* no IACK cycles */
433 0x0000000c 0x0ed00000 0x00000004 /* Special cycles */
Dglacier.dts469 0x00000000 0x00000000 0x00000000 /* no IACK cycles */
470 0x0000000c 0x0ed00000 0x00000004 /* Special cycles */
/linux-4.4.14/arch/arm/boot/dts/
Domap36xx.dtsi54 ti,clock-cycles = <8>;
Ddra7.dtsi966 ti,clock-cycles = <16>;
999 ti,clock-cycles = <16>;
1032 ti,clock-cycles = <16>;
1065 ti,clock-cycles = <16>;
Domap4.dtsi912 ti,clock-cycles = <16>;
925 ti,clock-cycles = <16>;
/linux-4.4.14/arch/arm/crypto/
Dsha1-armv4-large.S15 @ impl size in bytes comp cycles[*] measured performance
41 @ ~990 cycles.
46 @ Cortex A8 core and in absolute terms ~870 cycles per input block
47 @ [or 13.6 cycles per byte].
52 @ improvement on Cortex A8 core and 12.2 cycles per byte.
Daes-armv4.S17 @ is endian-neutral. The performance is ~42 cycles/byte for 128-bit
27 @ Cortex A8 core and ~25 cycles per byte processed with 128-bit key.
32 @ improvement on Cortex A8 core and ~21.5 cycles per byte.
Dsha512-core.S_shipped14 @ by gcc 3.4 and it spends ~72 clock cycles per byte [on single-issue
20 @ Cortex A8 core and ~40 cycles per processed byte.
25 @ improvement on Coxtex A8 core and ~38 cycles per byte.
30 @ one byte in 23.3 cycles or ~60% faster than integer-only code.
35 @ terms it's 22.6 cycles per byte, which is disappointing result.
40 @ 16 cycles.
/linux-4.4.14/Documentation/networking/
Dipsec.txt17 the decompression processing cycles and avoiding incurring IP
/linux-4.4.14/drivers/media/common/b2c2/
Dflexcop-common.h136 flexcop_dma_index_t dma_idx, u8 cycles);
/linux-4.4.14/Documentation/devicetree/bindings/lpddr2/
Dlpddr2.txt20 timing parameters of the DDR device in terms of number of clock cycles.
/linux-4.4.14/Documentation/devicetree/bindings/display/bridge/
Dadi,adv7511.txt24 pixel), "2x" (two clock cycles per pixel), "ddr" (one clock cycle per pixel,
/linux-4.4.14/drivers/net/ethernet/xscale/
Dixp4xx_eth.c445 int cycles = 0; in ixp4xx_mdio_cmd() local
461 while ((cycles < MAX_MDIO_RETRIES) && in ixp4xx_mdio_cmd()
464 cycles++; in ixp4xx_mdio_cmd()
467 if (cycles == MAX_MDIO_RETRIES) { in ixp4xx_mdio_cmd()
475 phy_id, write ? "write" : "read", cycles); in ixp4xx_mdio_cmd()
/linux-4.4.14/arch/cris/arch-v10/lib/
Ddram_init.S109 nop ; Wait five nop cycles between each command
/linux-4.4.14/include/uapi/linux/
Dperf_event.h966 cycles:16, /* cycle count to last branch */ member
/linux-4.4.14/Documentation/fb/
Dudlfb.txt149 metrics_cpu_kcycles_used 32-bit count of CPU cycles used in processing the
150 above pixels (in thousands of cycles).
/linux-4.4.14/drivers/net/wireless/ath/ath5k/
Dmac80211-ops.c663 if (cc->cycles > 0) { in ath5k_get_survey()
664 ah->survey.time += cc->cycles / div; in ath5k_get_survey()
Ddebug.c729 _struct.cycles > 0 ? \ in read_file_ani()
730 _struct._field * 100 / _struct.cycles : 0 in read_file_ani()
743 as->last_cc.cycles); in read_file_ani()
/linux-4.4.14/arch/arm/mach-pxa/
Dsleep.S150 @ need 6 13-MHz cycles before changing PWRMODE
/linux-4.4.14/fs/btrfs/
DKconfig56 plenty of additional CPU cycles are spent. Enabling this
/linux-4.4.14/Documentation/devicetree/bindings/soc/ti/
Dkeystone-navigator-dma.txt59 - ti,rx-retry-timeout: Number of dma cycles to wait before retry on buffer
/linux-4.4.14/Documentation/filesystems/
Dudf.txt16 and read-modify-write cycles to allow the filesystem random sector writes
Dubifs.txt24 4 Eraseblocks become worn out after some number of erase cycles -
/linux-4.4.14/Documentation/timers/
Dtimers-howto.txt22 and will busy wait for enough loop cycles to achieve
/linux-4.4.14/Documentation/bus-devices/
Dti-gpmc.txt31 in time or in cycles, provision to handle this scenario has been
/linux-4.4.14/drivers/staging/unisys/Documentation/
Dproc-entries.txt30 performance, by setting the number of cycles we wait before going idle
/linux-4.4.14/Documentation/frv/
Datomic-ops.txt17 interrupts, but on the FR-V CPUs, modifying the PSR takes a lot of clock cycles, and it has to be
/linux-4.4.14/Documentation/sound/alsa/
Dcompress_offload.txt57 cycles. The new API needs to provide a generic way of listing these
110 supported. Likewise, embedded DSPs have limited memory and cpu cycles,
/linux-4.4.14/Documentation/devicetree/bindings/bus/
Dti-gpmc.txt85 GPMC_FCLK cycles from start access time
/linux-4.4.14/sound/soc/intel/haswell/
Dsst-haswell-ipc.h260 u64 cycles; member
/linux-4.4.14/Documentation/block/
Dqueue-sysfs.txt129 provides a significant reduction in CPU cycles due to caching effects.
/linux-4.4.14/Documentation/vm/
Dzswap.txt5 dynamically allocated RAM-based memory pool. zswap basically trades CPU cycles
/linux-4.4.14/arch/cris/arch-v32/kernel/
Dhead.S58 ;; Note; 3 cycles is needed for a bank-select to take effect. Further;
/linux-4.4.14/Documentation/devicetree/bindings/memory-controllers/
Dmvebu-devbus.txt49 precedes the read data by one or two cycles.
/linux-4.4.14/Documentation/locking/
Dmutex-design.txt82 task and busy-waiting for a few cycles instead of immediately sleeping,
/linux-4.4.14/drivers/net/ethernet/chelsio/cxgb4/
Dcxgb4.h1301 void t4_pmtx_get_stats(struct adapter *adap, u32 cnt[], u64 cycles[]);
1302 void t4_pmrx_get_stats(struct adapter *adap, u32 cnt[], u64 cycles[]);
/linux-4.4.14/drivers/tty/serial/
Dserial-tegra.c244 unsigned int cycles) in tegra_uart_wait_cycle_time() argument
247 udelay(DIV_ROUND_UP(cycles * 1000000, tup->current_baud * 16)); in tegra_uart_wait_cycle_time()
/linux-4.4.14/drivers/crypto/qat/qat_common/
Dqat_hal.c163 unsigned char ae, unsigned int cycles, in qat_hal_wait_cycles() argument
173 while ((int)cycles > elapsed_cycles && times--) { in qat_hal_wait_cycles()

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