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Searched refs:ctrl_reg (Results 1 – 52 of 52) sorted by relevance

/linux-4.4.14/drivers/rtc/
Drtc-pm8xxx.c86 unsigned int ctrl_reg; in pm8xxx_rtc_set_time() local
104 rc = regmap_read(rtc_dd->regmap, regs->ctrl, &ctrl_reg); in pm8xxx_rtc_set_time()
108 if (ctrl_reg & regs->alarm_en) { in pm8xxx_rtc_set_time()
110 ctrl_reg &= ~regs->alarm_en; in pm8xxx_rtc_set_time()
111 rc = regmap_write(rtc_dd->regmap, regs->ctrl, ctrl_reg); in pm8xxx_rtc_set_time()
141 ctrl_reg |= regs->alarm_en; in pm8xxx_rtc_set_time()
142 rc = regmap_write(rtc_dd->regmap, regs->ctrl, ctrl_reg); in pm8xxx_rtc_set_time()
210 unsigned int ctrl_reg; in pm8xxx_rtc_set_alarm() local
231 rc = regmap_read(rtc_dd->regmap, regs->alarm_ctrl, &ctrl_reg); in pm8xxx_rtc_set_alarm()
236 ctrl_reg |= regs->alarm_en; in pm8xxx_rtc_set_alarm()
[all …]
/linux-4.4.14/drivers/watchdog/
Dmachzwd.c192 unsigned int ctrl_reg = 0; in zf_timer_off() local
200 ctrl_reg = zf_get_control(); in zf_timer_off()
201 ctrl_reg |= (ENABLE_WD1|ENABLE_WD2); /* disable wd1 and wd2 */ in zf_timer_off()
202 ctrl_reg &= ~(ENABLE_WD1|ENABLE_WD2); in zf_timer_off()
203 zf_set_control(ctrl_reg); in zf_timer_off()
215 unsigned int ctrl_reg = 0; in zf_timer_on() local
231 ctrl_reg = zf_get_control(); in zf_timer_on()
232 ctrl_reg |= (ENABLE_WD1|zf_action); in zf_timer_on()
233 zf_set_control(ctrl_reg); in zf_timer_on()
242 unsigned int ctrl_reg = 0; in zf_ping() local
[all …]
/linux-4.4.14/drivers/bluetooth/
Dbluecard_cs.c79 unsigned char ctrl_reg; member
266 info->ctrl_reg |= REG_CONTROL_RTS; in bluecard_write_wakeup()
267 outb(info->ctrl_reg, iobase + REG_CONTROL); in bluecard_write_wakeup()
311 info->ctrl_reg &= ~0x03; in bluecard_write_wakeup()
312 info->ctrl_reg |= baud_reg; in bluecard_write_wakeup()
313 outb(info->ctrl_reg, iobase + REG_CONTROL); in bluecard_write_wakeup()
316 info->ctrl_reg &= ~REG_CONTROL_RTS; in bluecard_write_wakeup()
317 outb(info->ctrl_reg, iobase + REG_CONTROL); in bluecard_write_wakeup()
517 info->ctrl_reg &= ~REG_CONTROL_INTERRUPT; in bluecard_interrupt()
518 outb(info->ctrl_reg, iobase + REG_CONTROL); in bluecard_interrupt()
[all …]
/linux-4.4.14/drivers/spi/
Dspi-cadence.c152 u32 ctrl_reg = CDNS_SPI_CR_DEFAULT_MASK; in cdns_spi_init_hw() local
155 ctrl_reg |= CDNS_SPI_CR_PERI_SEL_MASK; in cdns_spi_init_hw()
169 cdns_spi_write(xspi, CDNS_SPI_CR_OFFSET, ctrl_reg); in cdns_spi_init_hw()
182 u32 ctrl_reg; in cdns_spi_chipselect() local
184 ctrl_reg = cdns_spi_read(xspi, CDNS_SPI_CR_OFFSET); in cdns_spi_chipselect()
188 ctrl_reg |= CDNS_SPI_CR_SSCTRL_MASK; in cdns_spi_chipselect()
191 ctrl_reg &= ~CDNS_SPI_CR_SSCTRL_MASK; in cdns_spi_chipselect()
193 ctrl_reg |= ((~(CDNS_SPI_SS0 << spi->chip_select)) << in cdns_spi_chipselect()
197 ctrl_reg |= (spi->chip_select << CDNS_SPI_SS_SHIFT) & in cdns_spi_chipselect()
201 cdns_spi_write(xspi, CDNS_SPI_CR_OFFSET, ctrl_reg); in cdns_spi_chipselect()
[all …]
Dspi-bfin5xx.c105 u16 ctrl_reg; member
1412 drv_data->ctrl_reg = bfin_read(&drv_data->regs->ctl); in bfin_spi_suspend()
1429 bfin_write(&drv_data->regs->ctl, drv_data->ctrl_reg); in bfin_spi_resume()
/linux-4.4.14/drivers/pci/hotplug/
Dshpchp.h201 struct ctrl_reg { struct
219 BASE_OFFSET = offsetof(struct ctrl_reg, base_offset), argument
220 SLOT_AVAIL1 = offsetof(struct ctrl_reg, slot_avail1),
221 SLOT_AVAIL2 = offsetof(struct ctrl_reg, slot_avail2),
222 SLOT_CONFIG = offsetof(struct ctrl_reg, slot_config),
223 SEC_BUS_CONFIG = offsetof(struct ctrl_reg, sec_bus_config),
224 MSI_CTRL = offsetof(struct ctrl_reg, msi_ctrl),
225 PROG_INTERFACE = offsetof(struct ctrl_reg, prog_interface),
226 CMD = offsetof(struct ctrl_reg, cmd),
227 CMD_STATUS = offsetof(struct ctrl_reg, cmd_status),
[all …]
Dcpqphp.h122 struct ctrl_reg { /* offset */ struct
154 SLOT_RST = offsetof(struct ctrl_reg, slot_RST), argument
155 SLOT_ENABLE = offsetof(struct ctrl_reg, slot_enable),
156 MISC = offsetof(struct ctrl_reg, misc),
157 LED_CONTROL = offsetof(struct ctrl_reg, led_control),
158 INT_INPUT_CLEAR = offsetof(struct ctrl_reg, int_input_clear),
159 INT_MASK = offsetof(struct ctrl_reg, int_mask),
160 CTRL_RESERVED0 = offsetof(struct ctrl_reg, reserved0),
161 CTRL_RESERVED1 = offsetof(struct ctrl_reg, reserved1),
162 CTRL_RESERVED2 = offsetof(struct ctrl_reg, reserved1),
[all …]
/linux-4.4.14/drivers/net/wireless/cw1200/
Dbh.c181 u16 *ctrl_reg) in cw1200_bh_read_ctrl_reg() argument
186 ST90TDS_CONTROL_REG_ID, ctrl_reg); in cw1200_bh_read_ctrl_reg()
189 ST90TDS_CONTROL_REG_ID, ctrl_reg); in cw1200_bh_read_ctrl_reg()
199 u16 ctrl_reg; in cw1200_device_wakeup() local
216 ret = cw1200_bh_read_ctrl_reg(priv, &ctrl_reg); in cw1200_device_wakeup()
223 if (ctrl_reg & ST90TDS_CONT_RDY_BIT) { in cw1200_device_wakeup()
241 uint16_t *ctrl_reg, in cw1200_bh_rx_helper() argument
255 read_len = (*ctrl_reg & ST90TDS_CONT_NEXT_LEN_MASK) * 2; in cw1200_bh_rx_helper()
262 read_len, *ctrl_reg); in cw1200_bh_rx_helper()
296 *ctrl_reg = __le16_to_cpu( in cw1200_bh_rx_helper()
[all …]
/linux-4.4.14/drivers/clk/hisilicon/
Dclk-hix5hd2.c139 u32 ctrl_reg; member
151 void __iomem *ctrl_reg; member
177 val = readl_relaxed(clk->ctrl_reg); in clk_ether_prepare()
179 writel_relaxed(val, clk->ctrl_reg); in clk_ether_prepare()
181 writel_relaxed(val, clk->ctrl_reg); in clk_ether_prepare()
206 val = readl_relaxed(clk->ctrl_reg); in clk_ether_unprepare()
208 writel_relaxed(val, clk->ctrl_reg); in clk_ether_unprepare()
221 val = readl_relaxed(clk->ctrl_reg); in clk_complex_enable()
224 writel_relaxed(val, clk->ctrl_reg); in clk_complex_enable()
239 val = readl_relaxed(clk->ctrl_reg); in clk_complex_disable()
[all …]
/linux-4.4.14/drivers/misc/ibmasm/
Dlowlevel.h67 void __iomem *ctrl_reg = base_address + INTR_CONTROL_REGISTER; in ibmasm_enable_interrupts() local
68 writel( readl(ctrl_reg) & ~mask, ctrl_reg); in ibmasm_enable_interrupts()
73 void __iomem *ctrl_reg = base_address + INTR_CONTROL_REGISTER; in ibmasm_disable_interrupts() local
74 writel( readl(ctrl_reg) | mask, ctrl_reg); in ibmasm_disable_interrupts()
/linux-4.4.14/drivers/clocksource/
Dcadence_ttc_timer.c117 u32 ctrl_reg; in ttc_set_interval() local
120 ctrl_reg = readl_relaxed(timer->base_addr + TTC_CNT_CNTRL_OFFSET); in ttc_set_interval()
121 ctrl_reg |= TTC_CNT_CNTRL_DISABLE_MASK; in ttc_set_interval()
122 writel_relaxed(ctrl_reg, timer->base_addr + TTC_CNT_CNTRL_OFFSET); in ttc_set_interval()
130 ctrl_reg |= CNT_CNTRL_RESET; in ttc_set_interval()
131 ctrl_reg &= ~TTC_CNT_CNTRL_DISABLE_MASK; in ttc_set_interval()
132 writel_relaxed(ctrl_reg, timer->base_addr + TTC_CNT_CNTRL_OFFSET); in ttc_set_interval()
201 u32 ctrl_reg; in ttc_shutdown() local
203 ctrl_reg = readl_relaxed(timer->base_addr + TTC_CNT_CNTRL_OFFSET); in ttc_shutdown()
204 ctrl_reg |= TTC_CNT_CNTRL_DISABLE_MASK; in ttc_shutdown()
[all …]
/linux-4.4.14/drivers/phy/
Dphy-berlin-sata.c68 static inline void phy_berlin_sata_reg_setbits(void __iomem *ctrl_reg, in phy_berlin_sata_reg_setbits() argument
74 writel(phy_base + reg, ctrl_reg + PORT_VSR_ADDR); in phy_berlin_sata_reg_setbits()
77 regval = readl(ctrl_reg + PORT_VSR_DATA); in phy_berlin_sata_reg_setbits()
80 writel(regval, ctrl_reg + PORT_VSR_DATA); in phy_berlin_sata_reg_setbits()
87 void __iomem *ctrl_reg = priv->base + 0x60 + (desc->index * 0x80); in phy_berlin_sata_power_on() local
108 phy_berlin_sata_reg_setbits(ctrl_reg, priv->phy_base, 0x01, in phy_berlin_sata_power_on()
112 phy_berlin_sata_reg_setbits(ctrl_reg, priv->phy_base, 0x25, in phy_berlin_sata_power_on()
116 phy_berlin_sata_reg_setbits(ctrl_reg, priv->phy_base, 0x23, in phy_berlin_sata_power_on()
120 phy_berlin_sata_reg_setbits(ctrl_reg, priv->phy_base, 0x02, in phy_berlin_sata_power_on()
124 regval = readl(ctrl_reg + PORT_SCR_CTL); in phy_berlin_sata_power_on()
[all …]
/linux-4.4.14/drivers/char/hw_random/
Dppc4xx-rng.c57 void __iomem *ctrl_reg; in ppc4xx_rng_enable() local
66 ctrl_reg = of_iomap(ctrl, 0); in ppc4xx_rng_enable()
67 if (!ctrl_reg) { in ppc4xx_rng_enable()
72 val = in_le32(ctrl_reg + PPC4XX_TRNG_DEV_CTRL); in ppc4xx_rng_enable()
79 out_le32(ctrl_reg + PPC4XX_TRNG_DEV_CTRL, val); in ppc4xx_rng_enable()
80 iounmap(ctrl_reg); in ppc4xx_rng_enable()
/linux-4.4.14/drivers/fpga/
Dsocfpga.c348 u32 ctrl_reg; in socfpga_fpga_cfg_mode_set() local
357 ctrl_reg = socfpga_fpga_readl(priv, SOCFPGA_FPGMGR_CTL_OFST); in socfpga_fpga_cfg_mode_set()
358 ctrl_reg &= ~SOCFPGA_FPGMGR_CTL_CDRATIO_MASK; in socfpga_fpga_cfg_mode_set()
359 ctrl_reg &= ~SOCFPGA_FPGMGR_CTL_CFGWDTH_MASK; in socfpga_fpga_cfg_mode_set()
360 ctrl_reg |= cfgmgr_modes[mode].ctrl; in socfpga_fpga_cfg_mode_set()
363 ctrl_reg &= ~SOCFPGA_FPGMGR_CTL_NCE; in socfpga_fpga_cfg_mode_set()
364 socfpga_fpga_writel(priv, SOCFPGA_FPGMGR_CTL_OFST, ctrl_reg); in socfpga_fpga_cfg_mode_set()
372 u32 ctrl_reg, status; in socfpga_fpga_reset() local
389 ctrl_reg = socfpga_fpga_readl(priv, SOCFPGA_FPGMGR_CTL_OFST); in socfpga_fpga_reset()
390 ctrl_reg |= SOCFPGA_FPGMGR_CTL_NCFGPULL; in socfpga_fpga_reset()
[all …]
/linux-4.4.14/drivers/net/ethernet/intel/ixgb/
Dixgb_hw.c74 u32 ctrl_reg; in ixgb_mac_reset() local
76 ctrl_reg = IXGB_CTRL0_RST | in ixgb_mac_reset()
87 IXGB_WRITE_REG_IO(hw, CTRL0, ctrl_reg); in ixgb_mac_reset()
89 IXGB_WRITE_REG(hw, CTRL0, ctrl_reg); in ixgb_mac_reset()
94 ctrl_reg = IXGB_READ_REG(hw, CTRL0); in ixgb_mac_reset()
97 ASSERT(!(ctrl_reg & IXGB_CTRL0_RST)); in ixgb_mac_reset()
101 ctrl_reg = /* Enable interrupt from XFP and SerDes */ in ixgb_mac_reset()
107 IXGB_WRITE_REG(hw, CTRL1, ctrl_reg); in ixgb_mac_reset()
114 return ctrl_reg; in ixgb_mac_reset()
125 u32 ctrl_reg; in ixgb_adapter_stop() local
[all …]
/linux-4.4.14/drivers/tty/serial/
Dxilinx_uartps.c422 u32 ctrl_reg; in cdns_uart_clk_notifier_cb() local
452 ctrl_reg = readl(port->membase + CDNS_UART_CR_OFFSET); in cdns_uart_clk_notifier_cb()
453 ctrl_reg |= CDNS_UART_CR_TX_DIS | CDNS_UART_CR_RX_DIS; in cdns_uart_clk_notifier_cb()
454 writel(ctrl_reg, port->membase + CDNS_UART_CR_OFFSET); in cdns_uart_clk_notifier_cb()
479 ctrl_reg = readl(port->membase + CDNS_UART_CR_OFFSET); in cdns_uart_clk_notifier_cb()
480 ctrl_reg |= CDNS_UART_CR_TXRST | CDNS_UART_CR_RXRST; in cdns_uart_clk_notifier_cb()
481 writel(ctrl_reg, port->membase + CDNS_UART_CR_OFFSET); in cdns_uart_clk_notifier_cb()
493 ctrl_reg = readl(port->membase + CDNS_UART_CR_OFFSET); in cdns_uart_clk_notifier_cb()
494 ctrl_reg &= ~(CDNS_UART_CR_TX_DIS | CDNS_UART_CR_RX_DIS); in cdns_uart_clk_notifier_cb()
495 ctrl_reg |= CDNS_UART_CR_TX_EN | CDNS_UART_CR_RX_EN; in cdns_uart_clk_notifier_cb()
[all …]
/linux-4.4.14/drivers/isdn/hisax/
Dnj_s.c103 cs->hw.njet.ctrl_reg = 0xff; /* Reset On */ in reset_netjet_s()
104 byteout(cs->hw.njet.base + NETJET_CTRL, cs->hw.njet.ctrl_reg); in reset_netjet_s()
109 cs->hw.njet.ctrl_reg = 0x40; /* Reset Off and status read clear */ in reset_netjet_s()
111 cs->hw.njet.ctrl_reg = 0x00; /* Reset Off and status read clear */ in reset_netjet_s()
112 byteout(cs->hw.njet.base + NETJET_CTRL, cs->hw.njet.ctrl_reg); in reset_netjet_s()
195 cs->hw.njet.ctrl_reg = 0xff; /* Reset On */ in njs_cs_init()
196 byteout(cs->hw.njet.base + NETJET_CTRL, cs->hw.njet.ctrl_reg); in njs_cs_init()
199 cs->hw.njet.ctrl_reg = 0x00; /* Reset Off and status read clear */ in njs_cs_init()
200 byteout(cs->hw.njet.base + NETJET_CTRL, cs->hw.njet.ctrl_reg); in njs_cs_init()
Dnj_u.c86 cs->hw.njet.ctrl_reg = 0xff; /* Reset On */ in reset_netjet_u()
87 byteout(cs->hw.njet.base + NETJET_CTRL, cs->hw.njet.ctrl_reg); in reset_netjet_u()
89 cs->hw.njet.ctrl_reg = 0x40; /* Reset Off and status read clear */ in reset_netjet_u()
91 byteout(cs->hw.njet.base + NETJET_CTRL, cs->hw.njet.ctrl_reg); in reset_netjet_u()
156 cs->hw.njet.ctrl_reg = 0xff; /* Reset On */ in nju_cs_init()
157 byteout(cs->hw.njet.base + NETJET_CTRL, cs->hw.njet.ctrl_reg); in nju_cs_init()
160 cs->hw.njet.ctrl_reg = 0x00; /* Reset Off and status read clear */ in nju_cs_init()
161 byteout(cs->hw.njet.base + NETJET_CTRL, cs->hw.njet.ctrl_reg); in nju_cs_init()
Denternow_pci.c156 cs->hw.njet.ctrl_reg = 0x07; in reset_enpci()
157 outb(cs->hw.njet.ctrl_reg, cs->hw.njet.base + NETJET_CTRL); in reset_enpci()
160 cs->hw.njet.ctrl_reg = 0x30; in reset_enpci()
161 outb(cs->hw.njet.ctrl_reg, cs->hw.njet.base + NETJET_CTRL); in reset_enpci()
334 cs->hw.njet.ctrl_reg = 0x07; // geändert von 0xff in en_cs_init()
335 outb(cs->hw.njet.ctrl_reg, cs->hw.njet.base + NETJET_CTRL); in en_cs_init()
339 cs->hw.njet.ctrl_reg = 0x30; /* Reset Off and status read clear */ in en_cs_init()
340 outb(cs->hw.njet.ctrl_reg, cs->hw.njet.base + NETJET_CTRL); in en_cs_init()
Delsa.c470 cs->hw.elsa.ctrl_reg |= 0x50; in reset_elsa()
471 cs->hw.elsa.ctrl_reg &= ~ELSA_ISDN_RESET; /* Reset On */ in reset_elsa()
472 byteout(cs->hw.elsa.ctrl, cs->hw.elsa.ctrl_reg); in reset_elsa()
476 cs->hw.elsa.ctrl_reg |= ELSA_ISDN_RESET; /* Reset Off */ in reset_elsa()
477 byteout(cs->hw.elsa.ctrl, cs->hw.elsa.ctrl_reg); in reset_elsa()
617 cs->hw.elsa.ctrl_reg |= ELSA_STAT_LED; in elsa_led_handler()
619 cs->hw.elsa.ctrl_reg &= ~ELSA_STAT_LED; in elsa_led_handler()
621 cs->hw.elsa.ctrl_reg ^= ELSA_STAT_LED; in elsa_led_handler()
625 cs->hw.elsa.ctrl_reg |= ELSA_LINE_LED; in elsa_led_handler()
627 cs->hw.elsa.ctrl_reg ^= ELSA_LINE_LED; in elsa_led_handler()
[all …]
Ddiva.c779 cs->hw.diva.ctrl_reg = 0; /* Reset On */ in reset_diva()
780 byteout(cs->hw.diva.ctrl, cs->hw.diva.ctrl_reg); in reset_diva()
782 cs->hw.diva.ctrl_reg |= DIVA_RESET; /* Reset Off */ in reset_diva()
783 byteout(cs->hw.diva.ctrl, cs->hw.diva.ctrl_reg); in reset_diva()
786 cs->hw.diva.ctrl_reg |= DIVA_ISA_LED_A; in reset_diva()
790 cs->hw.diva.ctrl_reg |= DIVA_PCI_LED_A; in reset_diva()
792 byteout(cs->hw.diva.ctrl, cs->hw.diva.ctrl_reg); in reset_diva()
809 cs->hw.diva.ctrl_reg |= (DIVA_ISA == cs->subtyp) ? in diva_led_handler()
812 cs->hw.diva.ctrl_reg ^= (DIVA_ISA == cs->subtyp) ? in diva_led_handler()
817 cs->hw.diva.ctrl_reg |= (DIVA_ISA == cs->subtyp) ? in diva_led_handler()
[all …]
Dhisax.h578 u_char ctrl_reg; member
623 u_char ctrl_reg; member
680 unsigned char ctrl_reg; member
/linux-4.4.14/drivers/i2c/busses/
Di2c-cadence.c362 unsigned int ctrl_reg; in cdns_i2c_mrecv() local
369 ctrl_reg = cdns_i2c_readreg(CDNS_I2C_CR_OFFSET); in cdns_i2c_mrecv()
370 ctrl_reg |= CDNS_I2C_CR_RW | CDNS_I2C_CR_CLR_FIFO; in cdns_i2c_mrecv()
382 ctrl_reg |= CDNS_I2C_CR_HOLD; in cdns_i2c_mrecv()
384 cdns_i2c_writereg(ctrl_reg, CDNS_I2C_CR_OFFSET); in cdns_i2c_mrecv()
423 unsigned int ctrl_reg; in cdns_i2c_msend() local
431 ctrl_reg = cdns_i2c_readreg(CDNS_I2C_CR_OFFSET); in cdns_i2c_msend()
432 ctrl_reg &= ~CDNS_I2C_CR_RW; in cdns_i2c_msend()
433 ctrl_reg |= CDNS_I2C_CR_CLR_FIFO; in cdns_i2c_msend()
440 ctrl_reg |= CDNS_I2C_CR_HOLD; in cdns_i2c_msend()
[all …]
Di2c-mv64xxx.c608 unsigned long ctrl_reg; in mv64xxx_i2c_offload_xfer() local
614 ctrl_reg = MV64XXX_I2C_BRIDGE_CONTROL_ENABLE | in mv64xxx_i2c_offload_xfer()
618 ctrl_reg |= MV64XXX_I2C_BRIDGE_CONTROL_ADDR_EXT; in mv64xxx_i2c_offload_xfer()
624 ctrl_reg |= MV64XXX_I2C_BRIDGE_CONTROL_WR | in mv64xxx_i2c_offload_xfer()
632 ctrl_reg |= MV64XXX_I2C_BRIDGE_CONTROL_RD | in mv64xxx_i2c_offload_xfer()
643 ctrl_reg |= in mv64xxx_i2c_offload_xfer()
654 writel(ctrl_reg, drv_data->reg_base + MV64XXX_I2C_REG_BRIDGE_CONTROL); in mv64xxx_i2c_offload_xfer()
/linux-4.4.14/drivers/media/platform/davinci/
Dvpif.h399 u32 ctrl_reg; in disable_raw_feature() local
401 ctrl_reg = VPIF_CH0_CTRL; in disable_raw_feature()
403 ctrl_reg = VPIF_CH1_CTRL; in disable_raw_feature()
406 vpif_clr_bit(ctrl_reg, VPIF_CH_VANC_EN_BIT); in disable_raw_feature()
408 vpif_clr_bit(ctrl_reg, VPIF_CH_HANC_EN_BIT); in disable_raw_feature()
413 u32 ctrl_reg; in enable_raw_feature() local
415 ctrl_reg = VPIF_CH0_CTRL; in enable_raw_feature()
417 ctrl_reg = VPIF_CH1_CTRL; in enable_raw_feature()
420 vpif_set_bit(ctrl_reg, VPIF_CH_VANC_EN_BIT); in enable_raw_feature()
422 vpif_set_bit(ctrl_reg, VPIF_CH_HANC_EN_BIT); in enable_raw_feature()
/linux-4.4.14/arch/arm64/kernel/
Dhw_breakpoint.c235 int i, max_slots, ctrl_reg, val_reg, reg_enable; in hw_breakpoint_control() local
241 ctrl_reg = AARCH64_DBG_REG_BCR; in hw_breakpoint_control()
248 ctrl_reg = AARCH64_DBG_REG_WCR; in hw_breakpoint_control()
274 write_wb_reg(ctrl_reg, i, in hw_breakpoint_control()
279 write_wb_reg(ctrl_reg, i, 0); in hw_breakpoint_control()
586 u32 ctrl_reg; in breakpoint_handler() local
610 ctrl_reg = read_wb_reg(AARCH64_DBG_REG_BCR, i); in breakpoint_handler()
611 decode_ctrl_reg(ctrl_reg, &ctrl); in breakpoint_handler()
662 u32 ctrl_reg; in watchpoint_handler() local
697 ctrl_reg = read_wb_reg(AARCH64_DBG_REG_WCR, i); in watchpoint_handler()
[all …]
/linux-4.4.14/arch/arm/kernel/
Dhw_breakpoint.c305 u32 ctrl_reg; in get_max_wp_len() local
314 ctrl_reg = encode_ctrl_reg(ctrl); in get_max_wp_len()
317 write_wb_reg(ARM_BASE_WCR, ctrl_reg); in get_max_wp_len()
318 if ((read_wb_reg(ARM_BASE_WCR) & ctrl_reg) == ctrl_reg) in get_max_wp_len()
695 u32 val, ctrl_reg, alignment_mask; in watchpoint_handler() local
732 ctrl_reg = read_wb_reg(ARM_BASE_WCR + i); in watchpoint_handler()
733 decode_ctrl_reg(ctrl_reg, &ctrl); in watchpoint_handler()
800 u32 ctrl_reg, val, addr; in breakpoint_handler() local
827 ctrl_reg = read_wb_reg(ARM_BASE_BCR + i); in breakpoint_handler()
828 decode_ctrl_reg(ctrl_reg, &ctrl); in breakpoint_handler()
/linux-4.4.14/drivers/mmc/host/
Dmvsdio.c607 u32 ctrl_reg = 0; in mvsd_set_ios() local
629 ctrl_reg |= MVSD_HOST_CTRL_BIG_ENDIAN; in mvsd_set_ios()
630 ctrl_reg &= ~MVSD_HOST_CTRL_LSB_FIRST; in mvsd_set_ios()
633 ctrl_reg |= MVSD_HOST_CTRL_TMOUT_MASK; in mvsd_set_ios()
634 ctrl_reg |= MVSD_HOST_CTRL_TMOUT_EN; in mvsd_set_ios()
637 ctrl_reg |= MVSD_HOST_CTRL_PUSH_PULL_EN; in mvsd_set_ios()
640 ctrl_reg |= MVSD_HOST_CTRL_DATA_WIDTH_4_BITS; in mvsd_set_ios()
652 ctrl_reg |= MVSD_HOST_CTRL_HI_SPEED_EN; in mvsd_set_ios()
655 host->ctrl = ctrl_reg; in mvsd_set_ios()
656 mvsd_write(MVSD_HOST_CTRL, ctrl_reg); in mvsd_set_ios()
[all …]
/linux-4.4.14/drivers/gpu/drm/gma500/
Dmdfld_dsi_pkg_sender.c219 u32 ctrl_reg; in send_short_pkg() local
224 ctrl_reg = sender->mipi_hs_gen_ctrl_reg; in send_short_pkg()
228 ctrl_reg = sender->mipi_lp_gen_ctrl_reg; in send_short_pkg()
236 REG_WRITE(ctrl_reg, val); in send_short_pkg()
245 u32 ctrl_reg; in send_long_pkg() local
254 ctrl_reg = sender->mipi_hs_gen_ctrl_reg; in send_long_pkg()
259 ctrl_reg = sender->mipi_lp_gen_ctrl_reg; in send_long_pkg()
300 REG_WRITE(ctrl_reg, val); in send_long_pkg()
/linux-4.4.14/drivers/net/ethernet/stmicro/stmmac/
Ddwmac-sti.c127 u32 ctrl_reg; /* GMAC glue-logic control register */ member
168 u32 reg = dwmac->ctrl_reg; in stih4xx_fix_retime_src()
204 u32 reg = dwmac->ctrl_reg; in stid127_fix_retime_src()
238 u32 reg = dwmac->ctrl_reg; in sti_dwmac_init()
286 err = of_property_read_u32_index(np, "st,syscon", 1, &dwmac->ctrl_reg); in sti_dwmac_parse_data()
/linux-4.4.14/arch/powerpc/platforms/52xx/
Dmpc52xx_pic.c178 u32 ctrl_reg, type; in mpc52xx_extirq_set_type() local
194 ctrl_reg = in_be32(&intr->ctrl); in mpc52xx_extirq_set_type()
195 ctrl_reg &= ~(0x3 << (22 - (l2irq * 2))); in mpc52xx_extirq_set_type()
196 ctrl_reg |= (type << (22 - (l2irq * 2))); in mpc52xx_extirq_set_type()
197 out_be32(&intr->ctrl, ctrl_reg); in mpc52xx_extirq_set_type()
/linux-4.4.14/drivers/power/
Dltc2941-battery-gauge.c196 u8 ctrl_reg; in ltc294x_set_charge_now() local
208 LTC294X_REG_CONTROL, &ctrl_reg, 1); in ltc294x_set_charge_now()
212 ctrl_reg |= LTC294X_REG_CONTROL_SHUTDOWN_MASK; in ltc294x_set_charge_now()
214 LTC294X_REG_CONTROL, &ctrl_reg, 1); in ltc294x_set_charge_now()
226 ctrl_reg &= ~LTC294X_REG_CONTROL_SHUTDOWN_MASK; in ltc294x_set_charge_now()
228 LTC294X_REG_CONTROL, &ctrl_reg, 1); in ltc294x_set_charge_now()
/linux-4.4.14/drivers/staging/comedi/drivers/
Ddas16.c441 unsigned int ctrl_reg; member
486 if (!(devpriv->ctrl_reg & DAS16_CTRL_DMAE)) { in das16_interrupt()
752 devpriv->ctrl_reg &= ~(DAS16_CTRL_INTE | DAS16_CTRL_PACING_MASK); in das16_cmd_exec()
753 devpriv->ctrl_reg |= DAS16_CTRL_DMAE; in das16_cmd_exec()
755 devpriv->ctrl_reg |= DAS16_CTRL_EXT_PACER; in das16_cmd_exec()
757 devpriv->ctrl_reg |= DAS16_CTRL_INT_PACER; in das16_cmd_exec()
758 outb(devpriv->ctrl_reg, dev->iobase + DAS16_CTRL_REG); in das16_cmd_exec()
776 devpriv->ctrl_reg &= ~(DAS16_CTRL_INTE | DAS16_CTRL_DMAE | in das16_cancel()
778 outb(devpriv->ctrl_reg, dev->iobase + DAS16_CTRL_REG); in das16_cancel()
1163 devpriv->ctrl_reg = DAS16_CTRL_IRQ(dev->irq); in das16_attach()
[all …]
/linux-4.4.14/drivers/input/keyboard/
Dpmic8xxx-keypad.c113 u8 ctrl_reg; member
462 kp->ctrl_reg |= KEYP_CTRL_KEYP_EN; in pmic8xxx_kp_enable()
464 rc = regmap_write(kp->regmap, KEYP_CTRL, kp->ctrl_reg); in pmic8xxx_kp_enable()
475 kp->ctrl_reg &= ~KEYP_CTRL_KEYP_EN; in pmic8xxx_kp_disable()
477 rc = regmap_write(kp->regmap, KEYP_CTRL, kp->ctrl_reg); in pmic8xxx_kp_disable()
623 kp->ctrl_reg = ctrl_val; in pmic8xxx_kp_probe()
/linux-4.4.14/arch/x86/kvm/
Dpmu.h9 #define fixed_ctrl_field(ctrl_reg, idx) (((ctrl_reg) >> ((idx)*4)) & 0xf) argument
/linux-4.4.14/drivers/regulator/
Dqcom_spmi-regulator.c1288 u8 ctrl_reg[8], reg, mask; in spmi_regulator_init_registers() local
1292 ret = spmi_vreg_read(vreg, SPMI_COMMON_REG_VOLTAGE_RANGE, ctrl_reg, 8); in spmi_regulator_init_registers()
1302 ctrl_reg[SPMI_COMMON_IDX_ENABLE] &= in spmi_regulator_init_registers()
1304 ctrl_reg[SPMI_COMMON_IDX_ENABLE] |= in spmi_regulator_init_registers()
1313 ctrl_reg[SPMI_COMMON_IDX_MODE] &= in spmi_regulator_init_registers()
1315 ctrl_reg[SPMI_COMMON_IDX_MODE] |= in spmi_regulator_init_registers()
1321 ctrl_reg[SPMI_COMMON_IDX_MODE] &= in spmi_regulator_init_registers()
1323 ctrl_reg[SPMI_COMMON_IDX_MODE] |= in spmi_regulator_init_registers()
1332 ctrl_reg[SPMI_COMMON_IDX_MODE] &= in spmi_regulator_init_registers()
1334 ctrl_reg[SPMI_COMMON_IDX_MODE] |= in spmi_regulator_init_registers()
[all …]
Dwm831x-ldo.c88 int ctrl_reg = ldo->base + WM831X_LDO_CONTROL; in wm831x_gp_ldo_get_mode() local
99 ret = wm831x_reg_read(wm831x, ctrl_reg); in wm831x_gp_ldo_get_mode()
114 int ctrl_reg = ldo->base + WM831X_LDO_CONTROL; in wm831x_gp_ldo_set_mode() local
128 ret = wm831x_set_bits(wm831x, ctrl_reg, in wm831x_gp_ldo_set_mode()
141 ret = wm831x_set_bits(wm831x, ctrl_reg, in wm831x_gp_ldo_set_mode()
/linux-4.4.14/drivers/net/ethernet/xilinx/
Dxilinx_emaclite.c729 u32 ctrl_reg; in xemaclite_mdio_read() local
739 ctrl_reg = __raw_readl(lp->base_addr + XEL_MDIOCTRL_OFFSET); in xemaclite_mdio_read()
743 __raw_writel(ctrl_reg | XEL_MDIOCTRL_MDIOSTS_MASK, in xemaclite_mdio_read()
772 u32 ctrl_reg; in xemaclite_mdio_write() local
786 ctrl_reg = __raw_readl(lp->base_addr + XEL_MDIOCTRL_OFFSET); in xemaclite_mdio_write()
791 __raw_writel(ctrl_reg | XEL_MDIOCTRL_MDIOSTS_MASK, in xemaclite_mdio_write()
/linux-4.4.14/drivers/net/ethernet/intel/e1000/
De1000_ethtool.c1160 u32 ctrl_reg; in e1000_nonintegrated_phy_loopback() local
1165 ctrl_reg = er32(CTRL); in e1000_nonintegrated_phy_loopback()
1166 ctrl_reg |= (E1000_CTRL_ILOS | /* Invert Loss-Of-Signal */ in e1000_nonintegrated_phy_loopback()
1172 ew32(CTRL, ctrl_reg); in e1000_nonintegrated_phy_loopback()
1227 u32 ctrl_reg = 0; in e1000_integrated_phy_loopback() local
1242 ctrl_reg = er32(CTRL); in e1000_integrated_phy_loopback()
1248 ctrl_reg = er32(CTRL); in e1000_integrated_phy_loopback()
1249 ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */ in e1000_integrated_phy_loopback()
1250 ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */ in e1000_integrated_phy_loopback()
1257 ctrl_reg |= E1000_CTRL_ILOS; /* Invert Loss of Signal */ in e1000_integrated_phy_loopback()
[all …]
/linux-4.4.14/drivers/gpu/drm/i915/
Dintel_dsi.c101 u32 data_reg, data_mask, ctrl_reg, ctrl_mask; in intel_dsi_host_transfer() local
113 ctrl_reg = MIPI_LP_GEN_CTRL(port); in intel_dsi_host_transfer()
118 ctrl_reg = MIPI_HS_GEN_CTRL(port); in intel_dsi_host_transfer()
140 I915_WRITE(ctrl_reg, header[2] << 16 | header[1] << 8 | header[0]); in intel_dsi_host_transfer()
659 u32 dpi_enabled, func, ctrl_reg; in intel_dsi_get_hw_state() local
671 ctrl_reg = IS_BROXTON(dev) ? BXT_MIPI_PORT_CTRL(port) : in intel_dsi_get_hw_state()
673 dpi_enabled = I915_READ(ctrl_reg) & DPI_ENABLE; in intel_dsi_get_hw_state()
/linux-4.4.14/drivers/pinctrl/sirf/
Dpinctrl-atlas7.c5605 void __iomem *ctrl_reg; in atlas7_gpio_irq_ack() local
5611 ctrl_reg = ATLAS7_GPIO_CTRL(bank, pin_in_bank); in atlas7_gpio_irq_ack()
5615 val = readl(ctrl_reg); in atlas7_gpio_irq_ack()
5617 writel(val, ctrl_reg); in atlas7_gpio_irq_ack()
5625 void __iomem *ctrl_reg; in __atlas7_gpio_irq_mask() local
5630 ctrl_reg = ATLAS7_GPIO_CTRL(bank, pin_in_bank); in __atlas7_gpio_irq_mask()
5632 val = readl(ctrl_reg); in __atlas7_gpio_irq_mask()
5635 writel(val, ctrl_reg); in __atlas7_gpio_irq_mask()
5656 void __iomem *ctrl_reg; in atlas7_gpio_irq_unmask() local
5662 ctrl_reg = ATLAS7_GPIO_CTRL(bank, pin_in_bank); in atlas7_gpio_irq_unmask()
[all …]
/linux-4.4.14/drivers/video/fbdev/
Dsm501fb.c718 void __iomem *ctrl_reg = fbi->regs + SM501_DC_PANEL_CONTROL; in sm501fb_panel_power() local
721 control = smc501_readl(ctrl_reg); in sm501fb_panel_power()
727 smc501_writel(control, ctrl_reg); in sm501fb_panel_power()
732 smc501_writel(control, ctrl_reg); in sm501fb_panel_power()
744 smc501_writel(control, ctrl_reg); in sm501fb_panel_power()
755 smc501_writel(control, ctrl_reg); in sm501fb_panel_power()
767 smc501_writel(control, ctrl_reg); in sm501fb_panel_power()
778 smc501_writel(control, ctrl_reg); in sm501fb_panel_power()
784 smc501_writel(control, ctrl_reg); in sm501fb_panel_power()
789 smc501_writel(control, ctrl_reg); in sm501fb_panel_power()
/linux-4.4.14/drivers/net/ethernet/intel/e1000e/
Dethtool.c1316 u32 ctrl_reg = 0; in e1000_integrated_phy_loopback() local
1327 ctrl_reg = er32(CTRL); in e1000_integrated_phy_loopback()
1328 ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */ in e1000_integrated_phy_loopback()
1329 ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */ in e1000_integrated_phy_loopback()
1334 ew32(CTRL, ctrl_reg); in e1000_integrated_phy_loopback()
1406 ctrl_reg = er32(CTRL); in e1000_integrated_phy_loopback()
1407 ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */ in e1000_integrated_phy_loopback()
1408 ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */ in e1000_integrated_phy_loopback()
1414 ctrl_reg |= E1000_CTRL_SLU; /* Set Link Up */ in e1000_integrated_phy_loopback()
1418 ctrl_reg |= E1000_CTRL_ILOS; /* Invert Loss of Signal */ in e1000_integrated_phy_loopback()
[all …]
Dich8lan.c2242 u32 ctrl_reg = 0; in e1000_configure_k1_ich8lan() local
2264 ctrl_reg = er32(CTRL); in e1000_configure_k1_ich8lan()
2266 reg = ctrl_reg & ~(E1000_CTRL_SPD_1000 | E1000_CTRL_SPD_100); in e1000_configure_k1_ich8lan()
2273 ew32(CTRL, ctrl_reg); in e1000_configure_k1_ich8lan()
/linux-4.4.14/drivers/usb/c67x00/
Dc67x00-sched.c62 u8 ctrl_reg; /* Byte 6 */ member
139 !(td->ctrl_reg & SEQ_SEL)))
162 dev_dbg(dev, "ctrl_reg: 0x%02x\n", td->ctrl_reg); in dbg_td()
634 td->ctrl_reg = cmd; in c67x00_create_td()
1047 !(td->ctrl_reg & SEQ_SEL)); in c67x00_check_td_list()
/linux-4.4.14/drivers/atm/
Diphase.c2434 static u32 ctrl_reg; local
2437 ctrl_reg = readl(ia_dev[i]->reg+IPHASE5575_BUS_CONTROL_REG);
2440 ctrl_reg &= (~CTRL_LED);
2441 writel(ctrl_reg, ia_dev[i]->reg+IPHASE5575_BUS_CONTROL_REG);
2446 ctrl_reg |= CTRL_LED;
2447 writel(ctrl_reg, ia_dev[i]->reg+IPHASE5575_BUS_CONTROL_REG);
2503 u32 ctrl_reg; local
2530 ctrl_reg = readl(iadev->reg+IPHASE5575_BUS_CONTROL_REG);
2531 ctrl_reg = (ctrl_reg & (CTRL_LED | CTRL_FE_RST))
2546 writel(ctrl_reg, iadev->reg+IPHASE5575_BUS_CONTROL_REG);
[all …]
/linux-4.4.14/drivers/net/ethernet/intel/igb/
De1000_82575.c1640 u32 ctrl_ext, ctrl_reg, reg, anadv_reg; in igb_setup_serdes_link_82575() local
1663 ctrl_reg = rd32(E1000_CTRL); in igb_setup_serdes_link_82575()
1664 ctrl_reg |= E1000_CTRL_SLU; in igb_setup_serdes_link_82575()
1668 ctrl_reg |= E1000_CTRL_SWDPIN0 | E1000_CTRL_SWDPIN1; in igb_setup_serdes_link_82575()
1708 ctrl_reg |= E1000_CTRL_SPD_1000 | E1000_CTRL_FRCSPD | in igb_setup_serdes_link_82575()
1716 wr32(E1000_CTRL, ctrl_reg); in igb_setup_serdes_link_82575()
Digb_ethtool.c1596 u32 ctrl_reg = 0; in igb_integrated_phy_loopback() local
1625 ctrl_reg = rd32(E1000_CTRL); in igb_integrated_phy_loopback()
1626 ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */ in igb_integrated_phy_loopback()
1627 ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */ in igb_integrated_phy_loopback()
1634 ctrl_reg |= E1000_CTRL_ILOS; /* Invert Loss of Signal */ in igb_integrated_phy_loopback()
1636 wr32(E1000_CTRL, ctrl_reg); in igb_integrated_phy_loopback()
/linux-4.4.14/drivers/staging/iio/accel/
Dsca3000_core.c200 u8 ctrl_reg) in sca3000_read_ctrl_reg() argument
213 ret = sca3000_write_reg(st, SCA3000_REG_ADDR_CTRL_SEL, ctrl_reg); in sca3000_read_ctrl_reg()
/linux-4.4.14/drivers/net/ethernet/sun/
Dniu.c756 unsigned long ctrl_reg, test_cfg_reg, i; in serdes_init_10g() local
762 ctrl_reg = ENET_SERDES_0_CTRL_CFG; in serdes_init_10g()
766 ctrl_reg = ENET_SERDES_1_CTRL_CFG; in serdes_init_10g()
798 nw64(ctrl_reg, ctrl_val); in serdes_init_10g()
909 unsigned long ctrl_reg, test_cfg_reg, pll_cfg, i; in serdes_init_1g_serdes() local
920 ctrl_reg = ENET_SERDES_0_CTRL_CFG; in serdes_init_1g_serdes()
926 ctrl_reg = ENET_SERDES_1_CTRL_CFG; in serdes_init_1g_serdes()
964 nw64(ctrl_reg, ctrl_val); in serdes_init_1g_serdes()
2370 unsigned long ctrl_reg, test_cfg_reg, pll_cfg, i; in serdes_init_10g_serdes() local
2375 ctrl_reg = ENET_SERDES_0_CTRL_CFG; in serdes_init_10g_serdes()
[all …]
/linux-4.4.14/drivers/net/ethernet/chelsio/cxgb4/
Dcxgb4_debugfs.c1146 unsigned int ctrl_reg = CIM_PF_MAILBOX_CTRL_SHADOW_COPY_A; in mbox_show() local
1147 void __iomem *ctrl = adap->regs + PF_REG(mbox, ctrl_reg); in mbox_show()
/linux-4.4.14/drivers/scsi/
Dadvansys.c7022 uchar ctrl_reg; in AscISR() local
7046 ctrl_reg = AscGetChipControl(iop_base); in AscISR()
7047 saved_ctrl_reg = ctrl_reg & (~(CC_SCSI_RESET | CC_CHIP_RESET | in AscISR()
7076 if ((chipstat & CSW_HALTED) && (ctrl_reg & CC_SINGLE_STEP)) { in AscISR()