139 	u32		ctrl_reg;  member
151 	void __iomem	*ctrl_reg;  member
177 	val = readl_relaxed(clk->ctrl_reg);  in clk_ether_prepare()
179 	writel_relaxed(val, clk->ctrl_reg);  in clk_ether_prepare()
181 	writel_relaxed(val, clk->ctrl_reg);  in clk_ether_prepare()
206 	val = readl_relaxed(clk->ctrl_reg);  in clk_ether_unprepare()
208 	writel_relaxed(val, clk->ctrl_reg);  in clk_ether_unprepare()
221 	val = readl_relaxed(clk->ctrl_reg);  in clk_complex_enable()
224 	writel_relaxed(val, clk->ctrl_reg);  in clk_complex_enable()
239 	val = readl_relaxed(clk->ctrl_reg);  in clk_complex_disable()
242 	writel_relaxed(val, clk->ctrl_reg);  in clk_complex_disable()
282 		p_clk->ctrl_reg = base + clks[i].ctrl_reg;  in hix5hd2_clk_register_complex()