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Searched refs:chip_types (Results 1 – 46 of 46) sorted by relevance

/linux-4.4.14/drivers/irqchip/
Dirq-sunxi-nmi.c78 struct irq_chip_type *ct = gc->chip_types; in sunxi_sc_nmi_set_type()
163 gc->chip_types[0].type = IRQ_TYPE_LEVEL_MASK; in sunxi_sc_nmi_irq_init()
164 gc->chip_types[0].chip.irq_mask = irq_gc_mask_clr_bit; in sunxi_sc_nmi_irq_init()
165 gc->chip_types[0].chip.irq_unmask = irq_gc_mask_set_bit; in sunxi_sc_nmi_irq_init()
166 gc->chip_types[0].chip.irq_eoi = irq_gc_ack_set_bit; in sunxi_sc_nmi_irq_init()
167 gc->chip_types[0].chip.irq_set_type = sunxi_sc_nmi_set_type; in sunxi_sc_nmi_irq_init()
168 gc->chip_types[0].chip.flags = IRQCHIP_EOI_THREADED | IRQCHIP_EOI_IF_HANDLED; in sunxi_sc_nmi_irq_init()
169 gc->chip_types[0].regs.ack = reg_offs->pend; in sunxi_sc_nmi_irq_init()
170 gc->chip_types[0].regs.mask = reg_offs->enable; in sunxi_sc_nmi_irq_init()
171 gc->chip_types[0].regs.type = reg_offs->ctrl; in sunxi_sc_nmi_irq_init()
[all …]
Dirq-tb10x.c158 gc->chip_types[0].type = IRQ_TYPE_LEVEL_MASK; in of_tb10x_init_irq()
159 gc->chip_types[0].chip.irq_mask = irq_gc_mask_clr_bit; in of_tb10x_init_irq()
160 gc->chip_types[0].chip.irq_unmask = irq_gc_mask_set_bit; in of_tb10x_init_irq()
161 gc->chip_types[0].chip.irq_set_type = tb10x_irq_set_type; in of_tb10x_init_irq()
162 gc->chip_types[0].regs.mask = AB_IRQCTL_INT_ENABLE; in of_tb10x_init_irq()
164 gc->chip_types[1].type = IRQ_TYPE_EDGE_BOTH; in of_tb10x_init_irq()
165 gc->chip_types[1].chip.name = gc->chip_types[0].chip.name; in of_tb10x_init_irq()
166 gc->chip_types[1].chip.irq_ack = irq_gc_ack_set_bit; in of_tb10x_init_irq()
167 gc->chip_types[1].chip.irq_mask = irq_gc_mask_clr_bit; in of_tb10x_init_irq()
168 gc->chip_types[1].chip.irq_unmask = irq_gc_mask_set_bit; in of_tb10x_init_irq()
[all …]
Dirq-imgpdc.c412 gc->chip_types[0].regs.mask = PDC_IRQ_ROUTE; in pdc_intc_probe()
413 gc->chip_types[0].chip.irq_mask = perip_irq_mask; in pdc_intc_probe()
414 gc->chip_types[0].chip.irq_unmask = perip_irq_unmask; in pdc_intc_probe()
415 gc->chip_types[0].chip.irq_set_wake = pdc_irq_set_wake; in pdc_intc_probe()
424 gc->chip_types[0].type = IRQ_TYPE_EDGE_BOTH; in pdc_intc_probe()
425 gc->chip_types[0].handler = handle_edge_irq; in pdc_intc_probe()
426 gc->chip_types[0].regs.ack = PDC_IRQ_CLEAR; in pdc_intc_probe()
427 gc->chip_types[0].regs.mask = PDC_IRQ_ENABLE; in pdc_intc_probe()
428 gc->chip_types[0].chip.irq_ack = irq_gc_ack_set_bit; in pdc_intc_probe()
429 gc->chip_types[0].chip.irq_mask = irq_gc_mask_clr_bit; in pdc_intc_probe()
[all …]
Dirq-zevio.c111 gc->chip_types[0].chip.irq_ack = zevio_irq_ack; in zevio_of_init()
112 gc->chip_types[0].chip.irq_mask = irq_gc_mask_disable_reg; in zevio_of_init()
113 gc->chip_types[0].chip.irq_unmask = irq_gc_unmask_enable_reg; in zevio_of_init()
114 gc->chip_types[0].regs.mask = IO_IRQ_BASE + IO_ENABLE; in zevio_of_init()
115 gc->chip_types[0].regs.enable = IO_IRQ_BASE + IO_ENABLE; in zevio_of_init()
116 gc->chip_types[0].regs.disable = IO_IRQ_BASE + IO_DISABLE; in zevio_of_init()
117 gc->chip_types[0].regs.ack = IO_IRQ_BASE + IO_RESET; in zevio_of_init()
Dirq-atmel-aic.c260 gc->chip_types[0].regs.eoi = AT91_AIC_EOICR; in aic_of_init()
261 gc->chip_types[0].regs.enable = AT91_AIC_IECR; in aic_of_init()
262 gc->chip_types[0].regs.disable = AT91_AIC_IDCR; in aic_of_init()
263 gc->chip_types[0].chip.irq_mask = irq_gc_mask_disable_reg; in aic_of_init()
264 gc->chip_types[0].chip.irq_unmask = irq_gc_unmask_enable_reg; in aic_of_init()
265 gc->chip_types[0].chip.irq_retrigger = aic_retrigger; in aic_of_init()
266 gc->chip_types[0].chip.irq_set_type = aic_set_type; in aic_of_init()
267 gc->chip_types[0].chip.irq_suspend = aic_suspend; in aic_of_init()
268 gc->chip_types[0].chip.irq_resume = aic_resume; in aic_of_init()
269 gc->chip_types[0].chip.irq_pm_shutdown = aic_pm_shutdown; in aic_of_init()
Dirq-orion.c90 gc->chip_types[0].regs.mask = ORION_IRQ_MASK; in orion_irq_init()
91 gc->chip_types[0].chip.irq_mask = irq_gc_mask_clr_bit; in orion_irq_init()
92 gc->chip_types[0].chip.irq_unmask = irq_gc_mask_set_bit; in orion_irq_init()
189 gc->chip_types[0].regs.ack = ORION_BRIDGE_IRQ_CAUSE; in orion_bridge_irq_init()
190 gc->chip_types[0].regs.mask = ORION_BRIDGE_IRQ_MASK; in orion_bridge_irq_init()
191 gc->chip_types[0].chip.irq_startup = orion_bridge_irq_startup; in orion_bridge_irq_init()
192 gc->chip_types[0].chip.irq_ack = irq_gc_ack_clr_bit; in orion_bridge_irq_init()
193 gc->chip_types[0].chip.irq_mask = irq_gc_mask_clr_bit; in orion_bridge_irq_init()
194 gc->chip_types[0].chip.irq_unmask = irq_gc_mask_set_bit; in orion_bridge_irq_init()
Dirq-digicolor.c64 gc->chip_types[0].regs.ack = ack_reg; in digicolor_set_gc()
65 gc->chip_types[0].regs.mask = en_reg; in digicolor_set_gc()
66 gc->chip_types[0].chip.irq_ack = irq_gc_ack_set_bit; in digicolor_set_gc()
67 gc->chip_types[0].chip.irq_mask = irq_gc_mask_clr_bit; in digicolor_set_gc()
68 gc->chip_types[0].chip.irq_unmask = irq_gc_mask_set_bit; in digicolor_set_gc()
Dirq-moxart.c100 gc->chip_types[0].regs.mask = IRQ_MASK_REG; in moxart_of_intc_init()
101 gc->chip_types[0].regs.ack = IRQ_CLEAR_REG; in moxart_of_intc_init()
102 gc->chip_types[0].chip.irq_ack = irq_gc_ack_set_bit; in moxart_of_intc_init()
103 gc->chip_types[0].chip.irq_mask = irq_gc_mask_clr_bit; in moxart_of_intc_init()
104 gc->chip_types[0].chip.irq_unmask = irq_gc_mask_set_bit; in moxart_of_intc_init()
Dirq-nvic.c128 gc->chip_types[0].regs.enable = NVIC_ISER; in nvic_of_init()
129 gc->chip_types[0].regs.disable = NVIC_ICER; in nvic_of_init()
130 gc->chip_types[0].chip.irq_mask = irq_gc_mask_disable_reg; in nvic_of_init()
131 gc->chip_types[0].chip.irq_unmask = irq_gc_unmask_enable_reg; in nvic_of_init()
135 gc->chip_types[0].chip.irq_eoi = irq_gc_noop; in nvic_of_init()
Dirq-dw-apb-ictl.c142 gc->chip_types[0].regs.mask = APB_INT_MASK_L; in dw_apb_ictl_init()
143 gc->chip_types[0].regs.enable = APB_INT_ENABLE_L; in dw_apb_ictl_init()
144 gc->chip_types[0].chip.irq_mask = irq_gc_mask_set_bit; in dw_apb_ictl_init()
145 gc->chip_types[0].chip.irq_unmask = irq_gc_mask_clr_bit; in dw_apb_ictl_init()
146 gc->chip_types[0].chip.irq_resume = dw_apb_ictl_resume; in dw_apb_ictl_init()
Dirq-atmel-aic5.c326 gc->chip_types[0].regs.eoi = AT91_AIC5_EOICR; in aic5_of_init()
327 gc->chip_types[0].chip.irq_mask = aic5_mask; in aic5_of_init()
328 gc->chip_types[0].chip.irq_unmask = aic5_unmask; in aic5_of_init()
329 gc->chip_types[0].chip.irq_retrigger = aic5_retrigger; in aic5_of_init()
330 gc->chip_types[0].chip.irq_set_type = aic5_set_type; in aic5_of_init()
331 gc->chip_types[0].chip.irq_suspend = aic5_suspend; in aic5_of_init()
332 gc->chip_types[0].chip.irq_resume = aic5_resume; in aic5_of_init()
333 gc->chip_types[0].chip.irq_pm_shutdown = aic5_pm_shutdown; in aic5_of_init()
Dirq-renesas-irqc.c226 p->gc->chip_types[0].regs.enable = IRQC_EN_SET; in irqc_probe()
227 p->gc->chip_types[0].regs.disable = IRQC_EN_STS; in irqc_probe()
228 p->gc->chip_types[0].chip.irq_mask = irq_gc_mask_disable_reg; in irqc_probe()
229 p->gc->chip_types[0].chip.irq_unmask = irq_gc_unmask_enable_reg; in irqc_probe()
230 p->gc->chip_types[0].chip.irq_set_type = irqc_irq_set_type; in irqc_probe()
231 p->gc->chip_types[0].chip.irq_set_wake = irqc_irq_set_wake; in irqc_probe()
232 p->gc->chip_types[0].chip.flags = IRQCHIP_MASK_ON_SUSPEND; in irqc_probe()
Dirq-atmel-aic-common.c259 gc->chip_types[0].type = IRQ_TYPE_SENSE_MASK; in aic_common_of_init()
260 gc->chip_types[0].chip.irq_eoi = irq_gc_eoi; in aic_common_of_init()
261 gc->chip_types[0].chip.irq_set_wake = irq_gc_set_wake; in aic_common_of_init()
262 gc->chip_types[0].chip.irq_shutdown = aic_common_shutdown; in aic_common_of_init()
Dirq-ingenic.c64 struct irq_chip_regs *regs = &gc->chip_types->regs; in intc_irq_set_mask()
132 ct = gc->chip_types; in ingenic_intc_of_init()
Dirq-bcm7120-l2.c93 struct irq_chip_type *ct = gc->chip_types; in bcm7120_l2_intc_suspend()
104 struct irq_chip_type *ct = gc->chip_types; in bcm7120_l2_intc_resume()
296 ct = gc->chip_types; in bcm7120_l2_intc_probe()
Dirq-omap-intc.c208 ct = gc->chip_types; in omap_alloc_gc_of()
234 ct = gc->chip_types; in omap_alloc_gc_legacy()
Dirq-sirfsoc.c47 ct = gc->chip_types; in sirfsoc_alloc_gc()
Dirq-brcmstb-l2.c180 ct = gc->chip_types; in brcmstb_l2_intc_of_init()
/linux-4.4.14/drivers/gpio/
Dgpio-tz1090.c487 gc->chip_types[0].type = IRQ_TYPE_LEVEL_MASK; in tz1090_gpio_bank_probe()
488 gc->chip_types[0].handler = handle_level_irq; in tz1090_gpio_bank_probe()
489 gc->chip_types[0].regs.ack = REG_GPIO_IRQ_STS; in tz1090_gpio_bank_probe()
490 gc->chip_types[0].regs.mask = REG_GPIO_IRQ_EN; in tz1090_gpio_bank_probe()
491 gc->chip_types[0].chip.irq_startup = gpio_startup_irq; in tz1090_gpio_bank_probe()
492 gc->chip_types[0].chip.irq_ack = irq_gc_ack_clr_bit; in tz1090_gpio_bank_probe()
493 gc->chip_types[0].chip.irq_mask = irq_gc_mask_clr_bit; in tz1090_gpio_bank_probe()
494 gc->chip_types[0].chip.irq_unmask = irq_gc_mask_set_bit; in tz1090_gpio_bank_probe()
495 gc->chip_types[0].chip.irq_set_type = gpio_set_irq_type; in tz1090_gpio_bank_probe()
496 gc->chip_types[0].chip.irq_set_wake = gpio_set_irq_wake; in tz1090_gpio_bank_probe()
[all …]
Dgpio-tb10x.c256 gc->chip_types[0].type = IRQ_TYPE_EDGE_BOTH; in tb10x_gpio_probe()
257 gc->chip_types[0].chip.irq_ack = irq_gc_ack_set_bit; in tb10x_gpio_probe()
258 gc->chip_types[0].chip.irq_mask = irq_gc_mask_clr_bit; in tb10x_gpio_probe()
259 gc->chip_types[0].chip.irq_unmask = irq_gc_mask_set_bit; in tb10x_gpio_probe()
260 gc->chip_types[0].chip.irq_set_type = tb10x_gpio_irq_set_type; in tb10x_gpio_probe()
261 gc->chip_types[0].regs.ack = OFFSET_TO_REG_CHANGE; in tb10x_gpio_probe()
262 gc->chip_types[0].regs.mask = OFFSET_TO_REG_INT_EN; in tb10x_gpio_probe()
Dgpio-dwapb.c332 ct = &irq_gc->chip_types[i]; in dwapb_configure_irqs()
346 irq_gc->chip_types[0].type = IRQ_TYPE_LEVEL_MASK; in dwapb_configure_irqs()
347 irq_gc->chip_types[1].type = IRQ_TYPE_EDGE_BOTH; in dwapb_configure_irqs()
348 irq_gc->chip_types[1].handler = handle_edge_irq; in dwapb_configure_irqs()
Dgpio-sta2x11.c331 ct = gc->chip_types; in gsta_alloc_irq_chip()
343 struct irq_chip_type *ct = gc->chip_types; in gsta_alloc_irq_chip()
Dgpio-sodaville.c164 ct = sd->gc->chip_types; in sdv_register_irqsupport()
Dgpio-mxs.c211 ct = gc->chip_types; in mxs_gpio_init_gc()
Dgpio-mvebu.c800 ct = &gc->chip_types[0]; in mvebu_gpio_probe()
807 ct = &gc->chip_types[1]; in mvebu_gpio_probe()
Dgpio-mxc.c353 ct = gc->chip_types; in mxc_gpio_init_gc()
Dgpio-pch.c343 ct = gc->chip_types; in pch_gpio_alloc_generic_chip()
Dgpio-ml-ioh.c397 ct = gc->chip_types; in ioh_gpio_alloc_generic_chip()
/linux-4.4.14/kernel/irq/
Dgeneric-chip.c213 gc->chip_types->chip.name = name; in irq_init_generic_chip()
214 gc->chip_types->handler = handler; in irq_init_generic_chip()
247 struct irq_chip_type *ct = gc->chip_types; in irq_gc_init_mask_cache()
387 ct = gc->chip_types; in irq_map_generic_chip()
436 struct irq_chip_type *ct = gc->chip_types; in irq_setup_generic_chip()
479 struct irq_chip_type *ct = gc->chip_types; in irq_setup_alt_chip()
548 struct irq_chip_type *ct = gc->chip_types; in irq_gc_suspend()
568 struct irq_chip_type *ct = gc->chip_types; in irq_gc_resume()
591 struct irq_chip_type *ct = gc->chip_types; in irq_gc_shutdown()
/linux-4.4.14/arch/arm/mach-imx/
Davic.c94 struct irq_chip_type *ct = gc->chip_types; in avic_irq_suspend()
104 struct irq_chip_type *ct = gc->chip_types; in avic_irq_resume()
125 ct = gc->chip_types; in avic_init_gc()
Dtzic.c117 ct = gc->chip_types; in tzic_init_gc()
/linux-4.4.14/arch/arm/plat-orion/
Dirq.c35 ct = gc->chip_types; in orion_irq_init()
Dgpio.c595 ct = gc->chip_types; in orion_gpio_init()
/linux-4.4.14/drivers/soc/dove/
Dpmu.c295 gc->chip_types[0].regs.mask = PMC_IRQ_MASK; in dove_init_pmu_irq()
296 gc->chip_types[0].chip.irq_mask = irq_gc_mask_clr_bit; in dove_init_pmu_irq()
297 gc->chip_types[0].chip.irq_unmask = irq_gc_mask_set_bit; in dove_init_pmu_irq()
/linux-4.4.14/arch/sh/boards/mach-se/7722/
Dirq.c82 ct = gc->chip_types; in se7722_gc_init()
/linux-4.4.14/arch/arm/mach-davinci/
Dirq.c61 ct = gc->chip_types; in davinci_alloc_gc()
/linux-4.4.14/arch/sh/boards/mach-se/7343/
Dirq.c83 ct = gc->chip_types; in se7343_gc_init()
/linux-4.4.14/drivers/pinctrl/
Dpinctrl-rockchip.c1711 gc->chip_types[0].regs.mask = GPIO_INTMASK; in rockchip_interrupts_register()
1712 gc->chip_types[0].regs.ack = GPIO_PORTS_EOI; in rockchip_interrupts_register()
1713 gc->chip_types[0].chip.irq_ack = irq_gc_ack_set_bit; in rockchip_interrupts_register()
1714 gc->chip_types[0].chip.irq_mask = rockchip_irq_gc_mask_set_bit; in rockchip_interrupts_register()
1715 gc->chip_types[0].chip.irq_unmask = in rockchip_interrupts_register()
1717 gc->chip_types[0].chip.irq_set_wake = irq_gc_set_wake; in rockchip_interrupts_register()
1718 gc->chip_types[0].chip.irq_suspend = rockchip_irq_suspend; in rockchip_interrupts_register()
1719 gc->chip_types[0].chip.irq_resume = rockchip_irq_resume; in rockchip_interrupts_register()
1720 gc->chip_types[0].chip.irq_set_type = rockchip_irq_set_type; in rockchip_interrupts_register()
/linux-4.4.14/arch/arm/mach-omap1/
Dirq.c182 ct = gc->chip_types; in omap_alloc_gc()
/linux-4.4.14/drivers/mfd/
Djz4740-adc.c269 ct = gc->chip_types; in jz4740_adc_probe()
/linux-4.4.14/arch/arm/mach-omap2/
Dprm_common.c337 ct = gc->chip_types; in omap_prcm_register_chain_handler()
/linux-4.4.14/arch/mips/jz4740/
Dgpio.c432 ct = gc->chip_types; in jz4740_gpio_chip_init()
/linux-4.4.14/include/linux/
Dirq.h825 struct irq_chip_type chip_types[0]; member
/linux-4.4.14/drivers/hwmon/
Dw83795.c331 enum chip_types {w83795g, w83795adg}; enum
337 enum chip_types chip_type;
/linux-4.4.14/drivers/scsi/arm/
Dfas216.c2695 static char *chip_types[] = { variable
2892 info->scsi.type = chip_types[type]; in fas216_add()
/linux-4.4.14/drivers/gpu/ipu-v3/
Dipu-common.c1137 ct = gc->chip_types; in ipu_irq_init()