1/*
2 * arch/arm/plat-orion/irq.c
3 *
4 * Marvell Orion SoC IRQ handling.
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2.  This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/irq.h>
14#include <linux/irqdomain.h>
15#include <linux/io.h>
16#include <linux/of_address.h>
17#include <linux/of_irq.h>
18#include <asm/exception.h>
19#include <plat/irq.h>
20#include <plat/orion-gpio.h>
21#include <mach/bridge-regs.h>
22
23void __init orion_irq_init(unsigned int irq_start, void __iomem *maskaddr)
24{
25	struct irq_chip_generic *gc;
26	struct irq_chip_type *ct;
27
28	/*
29	 * Mask all interrupts initially.
30	 */
31	writel(0, maskaddr);
32
33	gc = irq_alloc_generic_chip("orion_irq", 1, irq_start, maskaddr,
34				    handle_level_irq);
35	ct = gc->chip_types;
36	ct->chip.irq_mask = irq_gc_mask_clr_bit;
37	ct->chip.irq_unmask = irq_gc_mask_set_bit;
38	irq_setup_generic_chip(gc, IRQ_MSK(32), IRQ_GC_INIT_MASK_CACHE,
39			       IRQ_NOREQUEST, IRQ_LEVEL | IRQ_NOPROBE);
40}
41