Searched refs:rev (Results 1 - 200 of 989) sorted by relevance

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/linux-4.4.14/arch/arm/mach-imx/
H A Dcpu-imx31.c24 unsigned int rev; member in struct:__anon214
26 { .srev = 0x00, .name = "i.MX31(L)", .rev = IMX_CHIP_REVISION_1_0 },
27 { .srev = 0x10, .name = "i.MX31", .rev = IMX_CHIP_REVISION_1_1 },
28 { .srev = 0x11, .name = "i.MX31L", .rev = IMX_CHIP_REVISION_1_1 },
29 { .srev = 0x12, .name = "i.MX31", .rev = IMX_CHIP_REVISION_1_1 },
30 { .srev = 0x13, .name = "i.MX31L", .rev = IMX_CHIP_REVISION_1_1 },
31 { .srev = 0x14, .name = "i.MX31", .rev = IMX_CHIP_REVISION_1_2 },
32 { .srev = 0x15, .name = "i.MX31L", .rev = IMX_CHIP_REVISION_1_2 },
33 { .srev = 0x28, .name = "i.MX31", .rev = IMX_CHIP_REVISION_2_0 },
34 { .srev = 0x29, .name = "i.MX31L", .rev = IMX_CHIP_REVISION_2_0 },
48 mx31_cpu_type[i].rev); mx31_read_cpu_rev()
49 return mx31_cpu_type[i].rev; mx31_read_cpu_rev()
H A Dcpu-imx35.c21 u32 rev; mx35_read_cpu_rev() local
23 rev = __raw_readl(MX35_IO_ADDRESS(MX35_IIM_BASE_ADDR + MXC_IIMSREV)); mx35_read_cpu_rev()
24 switch (rev) { mx35_read_cpu_rev()
H A Dcpu-imx25.c24 u32 rev; mx25_read_cpu_rev() local
31 rev = readl(iim_base + MXC_IIMSREV); mx25_read_cpu_rev()
34 switch (rev) { mx25_read_cpu_rev()
H A Dcpu-imx5.c48 u32 rev = imx5_read_srev_reg("fsl,imx51-iim"); get_mx51_srev() local
50 switch (rev) { get_mx51_srev()
98 u32 rev = imx5_read_srev_reg("fsl,imx53-iim"); get_mx53_srev() local
100 switch (rev) { get_mx53_srev()
H A Dcpu.c22 void imx_set_soc_revision(unsigned int rev) imx_set_soc_revision() argument
24 imx_soc_revision = rev; imx_set_soc_revision()
37 pr_info("CPU identified as %s, silicon rev %d.%d\n", imx_print_silicon_rev()
/linux-4.4.14/arch/arm/mach-mv78xx0/
H A Dmpp.c21 u32 dev, rev; mv78xx0_variant() local
23 mv78xx0_pcie_id(&dev, &rev); mv78xx0_variant()
25 if (dev == MV78100_DEV_ID && rev >= MV78100_REV_A0) mv78xx0_variant()
29 "(dev %#x rev %#x)\n", dev, rev); mv78xx0_variant()
H A Dcommon.c233 u32 dev, rev; mv78xx0_ge10_init() local
239 mv78xx0_pcie_id(&dev, &rev); mv78xx0_ge10_init()
257 u32 dev, rev; mv78xx0_ge11_init() local
263 mv78xx0_pcie_id(&dev, &rev); mv78xx0_ge11_init()
359 u32 dev, rev; mv78xx0_id() local
361 mv78xx0_pcie_id(&dev, &rev); mv78xx0_id()
364 if (rev == MV78X00_REV_Z0) mv78xx0_id()
369 if (rev == MV78100_REV_A0) mv78xx0_id()
371 else if (rev == MV78100_REV_A1) mv78xx0_id()
376 if (rev == MV78100_REV_A0) mv78xx0_id()
H A Dcommon.h34 void mv78xx0_pcie_id(u32 *dev, u32 *rev);
/linux-4.4.14/drivers/media/common/b2c2/
H A Dflexcop-misc.c15 fc->rev = FLEXCOP_II; flexcop_determine_revision()
19 fc->rev = FLEXCOP_IIB; flexcop_determine_revision()
23 fc->rev = FLEXCOP_III; flexcop_determine_revision()
55 [FC_SKY_REV23] = "Sky2PC/SkyStar 2 DVB-S rev 2.3 (old version)",
56 [FC_SKY_REV26] = "Sky2PC/SkyStar 2 DVB-S rev 2.6",
57 [FC_SKY_REV27] = "Sky2PC/SkyStar 2 DVB-S rev 2.7a/u",
58 [FC_SKY_REV28] = "Sky2PC/SkyStar 2 DVB-S rev 2.8",
59 [FC_SKYS2_REV33] = "Sky2PC/SkyStar S2 DVB-S/S2 rev 3.3",
73 flexcop_revision_names[fc->rev], suffix); flexcop_device_name()
/linux-4.4.14/arch/arm/mach-orion5x/
H A Dmpp.c22 u32 rev; orion5x_variant() local
24 orion5x_pcie_id(&dev, &rev); orion5x_variant()
36 "(dev %#x rev %#x)\n", dev, rev); orion5x_variant()
H A Dcommon.c198 u32 rev, dev; orion5x_init_early() local
204 orion5x_pcie_id(&dev, &rev); orion5x_init_early()
250 u32 dev, rev; orion5x_find_tclk() local
252 orion5x_pcie_id(&dev, &rev); orion5x_find_tclk()
273 * Identify device ID and rev from PCIe configuration header space '0'.
275 void __init orion5x_id(u32 *dev, u32 *rev, char **dev_name) orion5x_id() argument
277 orion5x_pcie_id(dev, rev); orion5x_id()
280 if (*rev == MV88F5281_REV_D2) { orion5x_id()
282 } else if (*rev == MV88F5281_REV_D1) { orion5x_id()
284 } else if (*rev == MV88F5281_REV_D0) { orion5x_id()
290 if (*rev == MV88F5182_REV_A2) { orion5x_id()
296 if (*rev == MV88F5181_REV_B1) { orion5x_id()
298 } else if (*rev == MV88F5181L_REV_A1) { orion5x_id()
304 if (*rev == MV88F6183_REV_B0) { orion5x_id()
317 u32 dev, rev; orion5x_init() local
319 orion5x_id(&dev, &rev, &dev_name); orion5x_init()
334 if (dev == MV88F5281_DEV_ID && rev == MV88F5281_REV_D0) { orion5x_init()
343 if ((dev == MV88F5181_DEV_ID && rev >= MV88F5181L_REV_A0) || orion5x_init()
H A Dboard-dt.c42 u32 dev, rev; orion5x_dt_init() local
44 orion5x_id(&dev, &rev, &dev_name); orion5x_dt_init()
58 if (dev == MV88F5281_DEV_ID && rev == MV88F5281_REV_D0) { orion5x_dt_init()
H A Dcommon.h34 void orion5x_id(u32 *dev, u32 *rev, char **dev_name);
60 void orion5x_pcie_id(u32 *dev, u32 *rev);
H A Ddns323-setup.c441 /* DNS-323 rev. A specific power off method */ dns323a_power_off()
448 /* DNS-323 rev B specific power off method */ dns323b_power_off()
458 /* DNS-323 rev. C specific power off method */ dns323c_power_off()
474 u32 dev, rev, i, reg; dns323_identify_rev() local
479 orion5x_pcie_id(&dev, &rev); dns323_identify_rev()
488 * driver so let's poke at it directly. We default to rev B1 in dns323_identify_rev()
504 pr_warn("DNS-323: Timeout accessing PHY, assuming rev B1\n"); dns323_identify_rev()
516 pr_warn("DNS-323: Timeout reading PHY, assuming rev B1\n"); dns323_identify_rev()
531 pr_warn("DNS-323: Unknown PHY ID 0x%04x, assuming rev B1\n", dns323_identify_rev()
629 /* The DNS323 rev B1 has flag to indicate the system is up. dns323_init()
657 * Note: AFAIK, rev B1 needs the same treatement but I'll let dns323_init()
/linux-4.4.14/drivers/gpu/drm/msm/adreno/
H A Dadreno_device.c37 .rev = ADRENO_REV(3, 0, 5, ANY_ID),
45 .rev = ADRENO_REV(3, 0, 6, 0),
53 .rev = ADRENO_REV(3, 2, ANY_ID, ANY_ID),
61 .rev = ADRENO_REV(3, 3, 0, ANY_ID),
69 .rev = ADRENO_REV(4, 2, 0, ANY_ID),
91 const struct adreno_info *adreno_info(struct adreno_rev rev) adreno_info() argument
98 if (_rev_match(info->rev.core, rev.core) && adreno_info()
99 _rev_match(info->rev.major, rev.major) && adreno_info()
100 _rev_match(info->rev.minor, rev.minor) && adreno_info()
101 _rev_match(info->rev.patchid, rev.patchid)) adreno_info()
113 struct adreno_rev rev; adreno_load_gpu() local
123 rev = config->rev; adreno_load_gpu()
124 info = adreno_info(config->rev); adreno_load_gpu()
128 rev.core, rev.major, rev.minor, rev.patchid); adreno_load_gpu()
132 DBG("Found GPU: %u.%u.%u.%u", rev.core, rev.major, adreno_load_gpu()
133 rev.minor, rev.patchid); adreno_load_gpu()
182 config.rev = ADRENO_REV((val >> 24) & 0xff, adreno_bind()
215 config.rev = ADRENO_REV(3, 2, 1, 0);
222 config.rev = ADRENO_REV(3, 2, 0, 2);
225 config.rev = ADRENO_REV(3, 2, 0, 1);
227 config.rev = ADRENO_REV(3, 2, 0, 0);
235 config.rev = ADRENO_REV(3, 2, 1, 0);
237 config.rev = ADRENO_REV(3, 2, 1, 1);
246 config.rev = ADRENO_REV(3, 0, 5, 2);
248 config.rev = ADRENO_REV(3, 0, 5, 0);
H A Dadreno_gpu.c39 *value = adreno_gpu->rev.patchid | adreno_get_param()
40 (adreno_gpu->rev.minor << 8) | adreno_get_param()
41 (adreno_gpu->rev.major << 16) | adreno_get_param()
42 (adreno_gpu->rev.core << 24); adreno_get_param()
234 adreno_gpu->info->revn, adreno_gpu->rev.core, adreno_show()
235 adreno_gpu->rev.major, adreno_gpu->rev.minor, adreno_show()
236 adreno_gpu->rev.patchid); adreno_show()
275 adreno_gpu->info->revn, adreno_gpu->rev.core, adreno_dump_info()
276 adreno_gpu->rev.major, adreno_gpu->rev.minor, adreno_dump_info()
277 adreno_gpu->rev.patchid); adreno_dump_info()
340 adreno_gpu->info = adreno_info(config->rev); adreno_gpu_init()
343 adreno_gpu->rev = config->rev; adreno_gpu_init()
H A Dadreno_gpu.h120 struct adreno_rev rev; member in struct:adreno_info
128 const struct adreno_info *adreno_info(struct adreno_rev rev);
138 struct adreno_rev rev; member in struct:adreno_gpu
168 struct adreno_rev rev; member in struct:adreno_platform_config
218 return adreno_is_a330(gpu) && (gpu->rev.patchid > 0); adreno_is_a330v2()
/linux-4.4.14/arch/arm/mach-s3c64xx/
H A Dmach-crag6410-module.c296 u8 rev; member in struct:__anon258
303 { .id = 0x01, .rev = 0xff, .name = "1250-EV1 Springbank" },
304 { .id = 0x02, .rev = 0xff, .name = "1251-EV1 Jura" },
305 { .id = 0x03, .rev = 0xff, .name = "1252-EV1 Glenlivet" },
306 { .id = 0x06, .rev = 0xff, .name = "WM8997-6721-CS96-EV1 Lapraoig" },
307 { .id = 0x07, .rev = 0xff, .name = "WM5110-6271 Deanston",
310 { .id = 0x08, .rev = 0xff, .name = "WM8903-6102 Tamdhu" },
311 { .id = 0x09, .rev = 0xff, .name = "WM1811A-6305 Adelphi" },
312 { .id = 0x0a, .rev = 0xff, .name = "WM8996-6272 Blackadder" },
313 { .id = 0x0b, .rev = 0xff, .name = "WM8994-6235 Benromach" },
314 { .id = 0x11, .rev = 0xff, .name = "6249-EV2 Glenfarclas", },
315 { .id = 0x14, .rev = 0xff, .name = "6271-EV1 Lochnagar" },
316 { .id = 0x15, .rev = 0xff, .name = "6320-EV1 Bells",
319 { .id = 0x21, .rev = 0xff, .name = "1275-EV1 Mortlach" },
320 { .id = 0x25, .rev = 0xff, .name = "1274-EV1 Glencadam" },
321 { .id = 0x31, .rev = 0xff, .name = "1253-EV1 Tomatin",
323 { .id = 0x32, .rev = 0xff, .name = "XXXX-EV1 Caol Illa" },
324 { .id = 0x33, .rev = 0xff, .name = "XXXX-EV1 Oban" },
325 { .id = 0x34, .rev = 0xff, .name = "WM0010-6320-CS42 Balblair",
328 { .id = 0x39, .rev = 0xff, .name = "1254-EV1 Dallas Dhu",
330 { .id = 0x3a, .rev = 0xff, .name = "1259-EV1 Tobermory",
332 { .id = 0x3b, .rev = 0xff, .name = "1255-EV1 Kilchoman",
334 { .id = 0x3c, .rev = 0xff, .name = "1273-EV1 Longmorn" },
335 { .id = 0x3d, .rev = 0xff, .name = "1277-EV1 Littlemill",
337 { .id = 0x3e, .rev = 0, .name = "WM5102-6271-EV1-CS127 Amrut",
340 { .id = 0x3e, .rev = -1, .name = "WM5102-6271-EV1-CS127 Amrut",
343 { .id = 0x3f, .rev = -1, .name = "WM2200-6271-CS90-M-REV1",
350 int ret, i, j, id, rev; wlf_gf_module_probe() local
359 rev = ret & 0x3; wlf_gf_module_probe()
361 if (id == gf_mods[i].id && (gf_mods[i].rev == 0xff || wlf_gf_module_probe()
362 rev == gf_mods[i].rev)) wlf_gf_module_probe()
367 gf_mods[i].name, rev + 1); wlf_gf_module_probe()
380 id, rev + 1); wlf_gf_module_probe()
/linux-4.4.14/arch/mips/ath79/
H A Dsetup.c65 u32 rev = 0; ath79_detect_sys_type() local
73 rev = id >> AR71XX_REV_ID_REVISION_SHIFT; ath79_detect_sys_type()
74 rev &= AR71XX_REV_ID_REVISION_MASK; ath79_detect_sys_type()
96 rev = id & AR724X_REV_ID_REVISION_MASK; ath79_detect_sys_type()
102 rev = id & AR724X_REV_ID_REVISION_MASK; ath79_detect_sys_type()
108 rev = id & AR724X_REV_ID_REVISION_MASK; ath79_detect_sys_type()
113 rev = id >> AR913X_REV_ID_REVISION_SHIFT; ath79_detect_sys_type()
114 rev &= AR913X_REV_ID_REVISION_MASK; ath79_detect_sys_type()
131 rev = id & AR933X_REV_ID_REVISION_MASK; ath79_detect_sys_type()
137 rev = id & AR933X_REV_ID_REVISION_MASK; ath79_detect_sys_type()
143 rev = id & AR934X_REV_ID_REVISION_MASK; ath79_detect_sys_type()
149 rev = id & AR934X_REV_ID_REVISION_MASK; ath79_detect_sys_type()
155 rev = id & AR934X_REV_ID_REVISION_MASK; ath79_detect_sys_type()
161 rev = id & QCA955X_REV_ID_REVISION_MASK; ath79_detect_sys_type()
167 rev = id & QCA955X_REV_ID_REVISION_MASK; ath79_detect_sys_type()
174 ath79_soc_rev = rev; ath79_detect_sys_type()
177 sprintf(ath79_sys_type, "Qualcomm Atheros QCA%s rev %u", ath79_detect_sys_type()
178 chip, rev); ath79_detect_sys_type()
180 sprintf(ath79_sys_type, "Atheros AR%s rev %u", chip, rev); ath79_detect_sys_type()
H A Dmachtypes.h25 ATH79_MACH_UBNT_XM, /* Ubiquiti Networks XM board rev 1.0 */
H A Dmach-ubnt-xm.c2 * Ubiquiti Networks XM (rev 1.0) board support
125 "Ubiquiti Networks XM (rev 1.0) board",
/linux-4.4.14/arch/arm/mach-omap2/
H A Did.c155 u8 dev_type, rev; omap2xxx_check_revision() local
161 rev = (idcode >> 28) & 0x0f; omap2xxx_check_revision()
166 idcode, rev, hawkeye, (idcode >> 1) & 0x7ff); omap2xxx_check_revision()
342 u8 rev; omap3xxx_check_revision() local
358 * hawkeye and rev. See TRM 1.5.2 Device Identification. omap3xxx_check_revision()
359 * Note that rev does not map directly to our defined processor omap3xxx_check_revision()
364 rev = (idcode >> 28) & 0xff; omap3xxx_check_revision()
369 switch (rev) { omap3xxx_check_revision()
402 switch (rev) { omap3xxx_check_revision()
417 switch(rev) { omap3xxx_check_revision()
434 switch (rev) { omap3xxx_check_revision()
455 switch (rev) { omap3xxx_check_revision()
473 switch (rev) { omap3xxx_check_revision()
491 switch (rev) { omap3xxx_check_revision()
511 /* Unknown default to latest silicon rev as default */ omap3xxx_check_revision()
523 u8 rev; omap4xxx_check_revision() local
526 * The IC rev detection is done with hawkeye and rev. omap4xxx_check_revision()
527 * Note that rev does not map directly to defined processor omap4xxx_check_revision()
532 rev = (idcode >> 28) & 0xf; omap4xxx_check_revision()
538 if (!rev && (hawkeye != 0xb94e) && (hawkeye != 0xb975)) { omap4xxx_check_revision()
540 rev = (idcode & 0xf) - 1; omap4xxx_check_revision()
545 switch (rev) { omap4xxx_check_revision()
555 switch (rev) { omap4xxx_check_revision()
568 switch (rev) { omap4xxx_check_revision()
579 switch (rev) { omap4xxx_check_revision()
587 /* Unknown default to latest silicon rev as default */ omap4xxx_check_revision()
601 u8 rev; omap5xxx_check_revision() local
605 rev = (idcode >> 28) & 0xff; omap5xxx_check_revision()
608 switch (rev) { omap5xxx_check_revision()
619 switch (rev) { omap5xxx_check_revision()
630 /* Unknown default to latest silicon rev as default*/ omap5xxx_check_revision()
644 u8 rev; dra7xxx_check_revision() local
648 rev = (idcode >> 28) & 0xff; dra7xxx_check_revision()
651 switch (rev) { dra7xxx_check_revision()
666 switch (rev) { dra7xxx_check_revision()
678 /* Unknown default to latest silicon rev as default*/ dra7xxx_check_revision()
679 pr_warn("%s: unknown idcode=0x%08x (hawkeye=0x%08x,rev=0x%x)\n", dra7xxx_check_revision()
680 __func__, idcode, hawkeye, rev); dra7xxx_check_revision()
H A Dmcbsp.c69 if (oh->class->rev < MCBSP_CONFIG_TYPE2) { omap_init_mcbsp()
76 if (oh->class->rev == MCBSP_CONFIG_TYPE2) { omap_init_mcbsp()
79 } else if (oh->class->rev == MCBSP_CONFIG_TYPE3) { omap_init_mcbsp()
86 } else if (oh->class->rev == MCBSP_CONFIG_TYPE4) { omap_init_mcbsp()
91 if (oh->class->rev >= MCBSP_CONFIG_TYPE3) omap_init_mcbsp()
H A Dpowerdomains3xxx_data.c578 unsigned int rev; omap3xxx_powerdomains_init() local
587 rev = omap_rev(); omap3xxx_powerdomains_init()
589 if (rev == AM35XX_REV_ES1_0 || rev == AM35XX_REV_ES1_1) { omap3xxx_powerdomains_init()
591 } else if (rev == TI8148_REV_ES1_0 || rev == TI8148_REV_ES2_0 || omap3xxx_powerdomains_init()
592 rev == TI8148_REV_ES2_1) { omap3xxx_powerdomains_init()
595 } else if (rev == TI8168_REV_ES1_0 || rev == TI8168_REV_ES1_1 omap3xxx_powerdomains_init()
596 || rev == TI8168_REV_ES2_0 || rev == TI8168_REV_ES2_1) { omap3xxx_powerdomains_init()
602 switch (rev) { omap3xxx_powerdomains_init()
H A Di2c.c72 if (oh->class->rev == OMAP_I2C_IP_VERSION_2) { omap_i2c_reset()
74 } else if (oh->class->rev == OMAP_I2C_IP_VERSION_1) { omap_i2c_reset()
166 pdata->rev = oh->class->rev; omap_i2c_add_bus()
H A Domap_hwmod_3xxx_data.c622 .rev = OMAP_I2C_IP_VERSION_1,
903 .rev = 1,
1133 .rev = MCBSP_CONFIG_TYPE3,
1375 .rev = 1,
1394 .rev = 2,
1543 .rev = OMAP3_MCSPI_REV,
3894 unsigned int rev; omap3xxx_hwmod_init() local
3903 rev = omap_rev(); omap3xxx_hwmod_init()
3910 if (rev == OMAP3430_REV_ES1_0 || rev == OMAP3430_REV_ES2_0 || omap3xxx_hwmod_init()
3911 rev == OMAP3430_REV_ES2_1 || rev == OMAP3430_REV_ES3_0 || omap3xxx_hwmod_init()
3912 rev == OMAP3430_REV_ES3_1 || rev == OMAP3430_REV_ES3_1_2) { omap3xxx_hwmod_init()
3917 } else if (rev == AM35XX_REV_ES1_0 || rev == AM35XX_REV_ES1_1) { omap3xxx_hwmod_init()
3922 } else if (rev == OMAP3630_REV_ES1_0 || rev == OMAP3630_REV_ES1_1 || omap3xxx_hwmod_init()
3923 rev == OMAP3630_REV_ES1_2) { omap3xxx_hwmod_init()
3969 if (rev == OMAP3430_REV_ES1_0) { omap3xxx_hwmod_init()
3971 } else if (rev == OMAP3430_REV_ES2_0 || rev == OMAP3430_REV_ES2_1 || omap3xxx_hwmod_init()
3972 rev == OMAP3430_REV_ES3_0 || rev == OMAP3430_REV_ES3_1 || omap3xxx_hwmod_init()
3973 rev == OMAP3430_REV_ES3_1_2) { omap3xxx_hwmod_init()
3984 if (rev == OMAP3430_REV_ES1_0 || rev == OMAP3430_REV_ES2_0 || omap3xxx_hwmod_init()
3985 rev == OMAP3430_REV_ES2_1) { omap3xxx_hwmod_init()
3987 } else if (rev == OMAP3430_REV_ES3_0 || rev == OMAP3430_REV_ES3_1 || omap3xxx_hwmod_init()
3988 rev == OMAP3430_REV_ES3_1_2) { omap3xxx_hwmod_init()
H A Dclockdomains3xxx_data.c501 unsigned int rev; omap3xxx_clockdomains_init() local
509 rev = omap_rev(); omap3xxx_clockdomains_init()
511 if (rev == AM35XX_REV_ES1_0 || rev == AM35XX_REV_ES1_1) { omap3xxx_clockdomains_init()
517 sc = (rev == OMAP3430_REV_ES1_0) ? omap3xxx_clockdomains_init()
/linux-4.4.14/scripts/
H A Dobjdiff28 SRCTREE=$(cd $(git rev-parse --show-toplevel 2>/dev/null); pwd)
74 CMT="`git rev-parse --short HEAD`"
94 SRC="`git rev-parse --short HEAD^`"
95 DST="`git rev-parse --short HEAD`"
97 SRC="`git rev-parse --short $1`"
98 DST="`git rev-parse --short $2`"
130 CMT="`git rev-parse --short $1`"
H A Dsetlocalversion46 if test -z "$(git rev-parse --show-cdup 2>/dev/null)" &&
47 head=`git rev-parse --verify --short HEAD 2>/dev/null`; then
72 printf -- '-svn%s' "`git svn find-rev $head`"
109 if rev=`LANG= LC_ALL= LC_MESSAGES=C svn info 2>/dev/null | grep '^Last Changed Rev'`; then
110 rev=`echo $rev | awk '{print $NF}'`
111 printf -- '-svn%s' "$rev"
/linux-4.4.14/arch/arm/mach-ux500/
H A Did.c45 unsigned int rev = dbx500_revision(); ux500_print_soc_info() local
49 if (rev == 0x01) ux500_print_soc_info()
51 else if (rev >= 0xA0) ux500_print_soc_info()
52 pr_cont("v%d.%d" , (rev >> 4) - 0xA + 1, rev & 0xf); ux500_print_soc_info()
H A Dcpu.c94 unsigned int rev = dbx500_revision(); ux500_get_revision() local
96 if (rev == 0x01) ux500_get_revision()
98 else if (rev >= 0xA0) ux500_get_revision()
100 (rev >> 4) - 0xA + 1, rev & 0xf); ux500_get_revision()
/linux-4.4.14/arch/arm64/kvm/
H A Dvgic-v2-switch.S57 CPU_BE( rev w5, w5 )
58 CPU_BE( rev w6, w6 )
59 CPU_BE( rev w7, w7 )
60 CPU_BE( rev w8, w8 )
61 CPU_BE( rev w9, w9 )
62 CPU_BE( rev w10, w10 )
63 CPU_BE( rev w11, w11 )
85 CPU_BE( rev w5, w5 )
113 CPU_BE( rev w4, w4 )
114 CPU_BE( rev w5, w5 )
115 CPU_BE( rev w6, w6 )
126 CPU_BE( rev w5, w5 )
/linux-4.4.14/arch/arm/include/debug/
H A D8250.S19 ARM_BE8(rev \rd, \rd)
21 ARM_BE8(rev \rd, \rd)
26 ARM_BE8(rev \rd, \rd)
H A Dpl01x.S35 ARM_BE8( rev \rd, \rd )
42 ARM_BE8( rev \rd, \rd )
H A Dzynq.S46 ARM_BE8( rev \rd, \rd )
53 ARM_BE8( rev \rd, \rd )
/linux-4.4.14/arch/x86/include/asm/
H A Dsysfb.h30 M_MB_2, /* MacBook, 2nd rev. */
31 M_MB_3, /* MacBook, 3rd rev. */
32 M_MB_5_1, /* MacBook, 5th rev. */
33 M_MB_6_1, /* MacBook, 6th rev. */
34 M_MB_7_1, /* MacBook, 7th rev. */
37 M_MBA_3, /* Macbook Air, 3rd rev */
H A Dmicrocode_intel.h8 unsigned int rev; member in struct:microcode_header_intel
56 extern int has_newer_microcode(void *mc, unsigned int csig, int cpf, int rev);
H A Dolpc.h61 static inline int olpc_board_at_least(uint32_t rev) olpc_board_at_least() argument
63 return olpc_platform_info.boardrev >= rev; olpc_board_at_least()
H A Dmicrocode_amd.h79 extern bool check_current_patch_level(u32 *rev, bool early);
/linux-4.4.14/drivers/soc/tegra/fuse/
H A Dtegra-apbmisc.c83 int rev; tegra_init_revision() local
91 rev = TEGRA_REVISION_A01; tegra_init_revision()
94 rev = TEGRA_REVISION_A02; tegra_init_revision()
99 rev = TEGRA_REVISION_A03p; tegra_init_revision()
101 rev = TEGRA_REVISION_A03; tegra_init_revision()
104 rev = TEGRA_REVISION_A04; tegra_init_revision()
107 rev = TEGRA_REVISION_UNKNOWN; tegra_init_revision()
110 tegra_sku_info.revision = rev; tegra_init_revision()
H A Dspeedo-tegra114.c49 enum tegra_revision rev = sku_info->revision; rev_sku_to_speedo_ids() local
76 if (rev == TEGRA_REVISION_A01) { rev_sku_to_speedo_ids()
H A Dspeedo-tegra20.c41 #define SPEEDO_ID_SELECT_0(rev) ((rev) <= 2)
/linux-4.4.14/arch/blackfin/
H A DMakefile91 rev-$(CONFIG_BF_REV_0_0) := 0.0
92 rev-$(CONFIG_BF_REV_0_1) := 0.1
93 rev-$(CONFIG_BF_REV_0_2) := 0.2
94 rev-$(CONFIG_BF_REV_0_3) := 0.3
95 rev-$(CONFIG_BF_REV_0_4) := 0.4
96 rev-$(CONFIG_BF_REV_0_5) := 0.5
97 rev-$(CONFIG_BF_REV_0_6) := 0.6
98 rev-$(CONFIG_BF_REV_NONE) := none
99 rev-$(CONFIG_BF_REV_ANY) := any
101 CPU_REV := $(cpu-y)-$(rev-y)
107 # - we utilize the silicon rev from the toolchain, so move it over to the checkflags
/linux-4.4.14/arch/arm/mach-ks8695/
H A Dcpu.c48 unsigned long id, rev; ks8695_processor_info() local
51 rev = __raw_readl(KS8695_MISC_VA + KS8695_RID); ks8695_processor_info()
53 printk("KS8695 ID=%04lx SubID=%02lx Revision=%02lx\n", (id & DID_ID), (rev & RID_SUBID), (rev & RID_REVISION)); ks8695_processor_info()
/linux-4.4.14/drivers/media/i2c/smiapp/
H A Dsmiapp.h94 #define SMIAPP_IDENT_FQ(manufacturer, model, rev, fl, _name, _quirk) \
97 .revision_number_major = rev, \
102 #define SMIAPP_IDENT_LQ(manufacturer, model, rev, _name, _quirk) \
105 .revision_number_major = rev, \
110 #define SMIAPP_IDENT_L(manufacturer, model, rev, _name) \
113 .revision_number_major = rev, \
117 #define SMIAPP_IDENT_Q(manufacturer, model, rev, _name, _quirk) \
120 .revision_number_major = rev, \
125 #define SMIAPP_IDENT(manufacturer, model, rev, _name) \
128 .revision_number_major = rev, \
/linux-4.4.14/drivers/isdn/hardware/eicon/
H A Dcapimain.c44 char *rev; getrev() local
47 rev = p + 2; getrev()
48 p = strchr(rev, '$'); getrev()
51 rev = "1.0"; getrev()
52 return rev; getrev()
H A Ddiva_didd.c55 char *rev; getrev() local
58 rev = p + 2; getrev()
59 p = strchr(rev, '$'); getrev()
62 rev = "1.0"; getrev()
63 return rev; getrev()
H A Ddivamnt.c59 char *rev; getrev() local
63 rev = p + 2; getrev()
64 p = strchr(rev, '$'); getrev()
67 rev = "1.0"; getrev()
69 return rev; getrev()
H A Ddivasi.c59 char *rev; getrev() local
62 rev = p + 2; getrev()
63 p = strchr(rev, '$'); getrev()
66 rev = "1.0"; getrev()
67 return rev; getrev()
/linux-4.4.14/drivers/net/wireless/b43/
H A Dwa.c66 if (phy->rev <= 2) b43_wa_initgains()
74 if (phy->rev <= 3) b43_wa_initgains()
76 else if (phy->rev == 5) { b43_wa_initgains()
80 if (phy->rev >= 3) b43_wa_initgains()
92 if (dev->phy.rev <= 2) { b43_wa_gt()
123 if (0 /* FIXME: For APHY.rev=2 this might be needed */) { b43_wa_rssi_lt()
180 if (phy->rev == 2) b43_wa_nft()
187 if (phy->rev == 1) b43_wa_nft()
225 if (phy->rev <= 1) b43_wa_nst()
227 else if (phy->rev == 2) b43_wa_nst()
229 else if (phy->rev == 3) b43_wa_nst()
234 if (phy->rev >= 6) { b43_wa_nst()
312 if (phy->rev == 1) { b43_wa_crs_ed()
314 } else if (phy->rev == 2) { b43_wa_crs_ed()
345 if (dev->phy.rev == 1) { b43_wa_wrssi_offset()
368 if (phy->rev == 1) { b43_wa_altagc()
394 if (phy->rev == 1) { b43_wa_altagc()
406 if (phy->rev == 1) { b43_wa_altagc()
413 if (phy->rev >= 6) { b43_wa_altagc()
420 if (phy->rev == 1) { b43_wa_altagc()
435 if (phy->rev >= 6) { b43_wa_altagc()
476 if (dev->phy.rev <= 4) b43_wa_boards_a()
493 if (phy->rev < 2) { b43_wa_boards_g()
500 (phy->rev >= 7)) { b43_wa_boards_g()
522 switch (phy->rev) { b43_wa_all()
595 switch (phy->rev) { b43_wa_all()
H A Dphy_n.c176 if (phy->rev >= 19 || phy->rev < 3) { b43_nphy_rf_ctl_override_rev7()
216 B43_WARN_ON(phy->rev < 7); b43_nphy_rf_ctl_override_one_to_many()
262 if (dev->phy.rev >= 3) { b43_nphy_rf_ctl_override()
405 if (dev->phy.rev >= 7) { b43_nphy_rf_ctl_intc_override()
411 B43_WARN_ON(dev->phy.rev < 3); b43_nphy_rf_ctl_intc_override()
649 u8 end = (dev->phy.rev >= 3) ? 0x1F : 0x0F; b43_nphy_set_rf_sequence()
751 case 9: /* e.g. PHY rev 16 */ b43_radio_2057_setup()
1146 B43_WARN_ON(dev->phy.rev < 3); b43_radio_2056_setup()
1188 if (dev->phy.rev >= 5) { b43_radio_2056_setup()
1317 if (phy->rev != 3) b43_radio_2056_rcal()
1425 B43_WARN_ON(dev->phy.rev >= 3); b43_radio_2055_setup()
1597 if (phy->rev >= 7) { b43_nphy_run_samples()
1607 if (phy->rev >= 19) b43_nphy_run_samples()
1819 if (dev->phy.rev < 7) { b43_nphy_rev3_rssi_select()
1914 if (dev->phy.rev >= 19) b43_nphy_rssi_select()
1916 else if (dev->phy.rev >= 3) b43_nphy_rssi_select()
1962 if (dev->phy.rev >= 3) { b43_nphy_poll_rssi()
1988 if (dev->phy.rev < 2) { b43_nphy_poll_rssi()
1997 if (dev->phy.rev < 2) { b43_nphy_poll_rssi()
2013 if (dev->phy.rev < 2) b43_nphy_poll_rssi()
2016 if (dev->phy.rev >= 3) { b43_nphy_poll_rssi()
2092 if (dev->phy.rev >= 7) { b43_nphy_rev3_rssi_cal()
2114 if (dev->phy.rev >= 7) { b43_nphy_rev3_rssi_cal()
2160 if (dev->phy.rev >= 7) b43_nphy_rev3_rssi_cal()
2194 if (dev->phy.rev >= 7) b43_nphy_rev3_rssi_cal()
2267 if (dev->phy.rev >= 7) { b43_nphy_rev3_rssi_cal()
2472 if (dev->phy.rev >= 19) { b43_nphy_rssi_cal()
2474 } else if (dev->phy.rev >= 3) { b43_nphy_rssi_cal()
2496 switch (phy->rev) { b43_nphy_gain_ctl_workarounds_rev7()
2518 if (ghz5 && dev->phy.rev >= 5) b43_nphy_gain_ctl_workarounds_rev3()
2674 if (dev->phy.rev == 2) { b43_nphy_gain_ctl_workarounds_rev1_2()
2698 if (dev->phy.rev >= 19) b43_nphy_gain_ctl_workarounds()
2700 else if (dev->phy.rev >= 7) b43_nphy_gain_ctl_workarounds()
2702 else if (dev->phy.rev >= 3) b43_nphy_gain_ctl_workarounds()
2746 if (phy->rev == 7) { b43_nphy_workarounds_rev7plus()
2766 if (phy->rev >= 16) { b43_nphy_workarounds_rev7plus()
2769 } else if (phy->rev <= 8) { b43_nphy_workarounds_rev7plus()
2774 if (phy->rev >= 16) b43_nphy_workarounds_rev7plus()
2776 else if (phy->rev >= 8) b43_nphy_workarounds_rev7plus()
2810 /* Check radio version (to be 0) by PHY rev for now */ b43_nphy_workarounds_rev7plus()
2811 if (phy->rev == 8 && b43_is_40mhz(dev)) { b43_nphy_workarounds_rev7plus()
2823 if (phy->rev == 9) { b43_nphy_workarounds_rev7plus()
3251 if (!(dev->phy.rev >= 4 && b43_nphy_workarounds_rev3plus()
3263 if (dev->phy.rev >= 6) { b43_nphy_workarounds_rev3plus()
3269 } else if (dev->phy.rev == 5) { b43_nphy_workarounds_rev3plus()
3335 if (dev->phy.rev == 4 && b43_nphy_workarounds_rev3plus()
3357 if (dev->phy.rev >= 6 && sprom->boardflags2_lo & B43_BFL2_SINGLEANT_CCK) b43_nphy_workarounds_rev3plus()
3390 if (dev->phy.rev < 3) { b43_nphy_workarounds_rev1_2()
3395 if (dev->phy.rev < 2) { b43_nphy_workarounds_rev1_2()
3414 if (dev->phy.rev < 2) { b43_nphy_workarounds_rev1_2()
3418 } else if (dev->phy.rev == 2) { b43_nphy_workarounds_rev1_2()
3423 if (dev->phy.rev < 2) b43_nphy_workarounds_rev1_2()
3435 if (dev->phy.rev < 3) { b43_nphy_workarounds_rev1_2()
3443 if (dev->phy.rev == 2) b43_nphy_workarounds_rev1_2()
3466 if (dev->phy.rev >= 7) b43_nphy_workarounds()
3468 else if (dev->phy.rev >= 3) b43_nphy_workarounds()
3548 if (phy->rev >= 7 && nphy->lpf_bw_overrode_for_sample_play) { b43_nphy_stop_playback()
3549 if (phy->rev >= 19) b43_nphy_stop_playback()
3570 if (dev->phy.rev >= 3) { b43_nphy_iq_cal_gain_params()
3576 if (phy->rev >= 19) { b43_nphy_iq_cal_gain_params()
3578 } else if (phy->rev >= 7) { b43_nphy_iq_cal_gain_params()
3624 if (dev->phy.rev >= 3 && b43_nphy_tx_power_ctrl()
3645 if (dev->phy.rev >= 3) b43_nphy_tx_power_ctrl()
3649 if (dev->phy.rev >= 3) { b43_nphy_tx_power_ctrl()
3656 if (dev->phy.rev == 2) b43_nphy_tx_power_ctrl()
3659 else if (dev->phy.rev < 2) b43_nphy_tx_power_ctrl()
3663 if (dev->phy.rev < 2 && b43_is_40mhz(dev)) b43_nphy_tx_power_ctrl()
3675 if (dev->phy.rev >= 3) { b43_nphy_tx_power_ctrl()
3683 if (phy->rev >= 19) { b43_nphy_tx_power_ctrl()
3685 } else if (phy->rev >= 7) { b43_nphy_tx_power_ctrl()
3696 if (phy->rev > 1) b43_nphy_tx_power_ctrl()
3704 if (dev->phy.rev >= 3) { b43_nphy_tx_power_ctrl()
3711 if (dev->phy.rev > 1) b43_nphy_tx_power_ctrl()
3718 if (phy->rev >= 7) { b43_nphy_tx_power_ctrl()
3722 if (dev->phy.rev >= 3) { b43_nphy_tx_power_ctrl()
3729 if (dev->phy.rev == 2) b43_nphy_tx_power_ctrl()
3731 else if (dev->phy.rev < 2) b43_nphy_tx_power_ctrl()
3734 if (dev->phy.rev < 2 && b43_is_40mhz(dev)) b43_nphy_tx_power_ctrl()
3764 if (dev->phy.rev >= 7) { b43_nphy_tx_power_fix()
3766 } else if (dev->phy.rev >= 3) { b43_nphy_tx_power_fix()
3790 if (dev->phy.rev < 7 && b43_nphy_tx_power_fix()
3808 if (dev->phy.rev >= 3) b43_nphy_tx_power_fix()
3813 if (dev->phy.rev >= 7) b43_nphy_tx_power_fix()
3819 if (dev->phy.rev >= 3) { b43_nphy_tx_power_fix()
3866 if (phy->rev >= 19) { b43_nphy_ipa_internal_tssi_setup()
3868 } else if (phy->rev >= 7) { b43_nphy_ipa_internal_tssi_setup()
3874 if (phy->rev != 5) b43_nphy_ipa_internal_tssi_setup()
3876 if (phy->rev != 7) b43_nphy_ipa_internal_tssi_setup()
3884 if (phy->rev != 5) b43_nphy_ipa_internal_tssi_setup()
3915 if (phy->rev != 5) b43_nphy_ipa_internal_tssi_setup()
3918 if (phy->rev >= 5) b43_nphy_ipa_internal_tssi_setup()
3957 if (phy->rev >= 19) b43_nphy_tx_power_ctl_idle_tssi()
3959 else if (phy->rev >= 7) b43_nphy_tx_power_ctl_idle_tssi()
3961 else if (phy->rev >= 3) b43_nphy_tx_power_ctl_idle_tssi()
3972 if (phy->rev >= 19) b43_nphy_tx_power_ctl_idle_tssi()
3974 else if (phy->rev >= 7) b43_nphy_tx_power_ctl_idle_tssi()
3976 else if (phy->rev >= 3) b43_nphy_tx_power_ctl_idle_tssi()
3979 if (phy->rev >= 19) { b43_nphy_tx_power_ctl_idle_tssi()
3982 } else if (phy->rev >= 3) { b43_nphy_tx_power_ctl_idle_tssi()
4022 if (b43_is_40mhz(dev) && dev->phy.rev >= 5) { b43_nphy_tx_prepare_adjusted_power_table()
4083 if (dev->phy.rev >= 3) b43_nphy_tx_power_ctl_setup()
4149 if (dev->phy.rev >= 3) { b43_nphy_tx_power_ctl_setup()
4152 if (dev->phy.rev >= 7) { b43_nphy_tx_power_ctl_setup()
4180 if (phy->rev >= 19) { b43_nphy_tx_power_ctl_setup()
4182 } else if (phy->rev >= 7) { b43_nphy_tx_power_ctl_setup()
4190 if (dev->phy.rev > 1) b43_nphy_tx_power_ctl_setup()
4214 if (dev->phy.rev < 3 && (i <= (31 - idle[c] + 1))) b43_nphy_tx_power_ctl_setup()
4246 if (phy->rev < 3) b43_nphy_tx_gain_table_upload()
4253 if (phy->rev >= 19) { b43_nphy_tx_gain_table_upload()
4255 } else if (phy->rev >= 7) { b43_nphy_tx_gain_table_upload()
4264 if (phy->rev >= 19) { b43_nphy_tx_gain_table_upload()
4267 } else if (phy->rev >= 7) { b43_nphy_tx_gain_table_upload()
4300 if (dev->phy.rev >= 7) { b43_nphy_pa_override()
4302 } else if (dev->phy.rev >= 3) { b43_nphy_pa_override()
4331 if (dev->phy.rev < 3 || dev->phy.rev >= 7) b43_nphy_tx_lpf_bw()
4565 if (dev->phy.rev >= 3) { b43_nphy_calc_rx_iq_comp()
4573 if (dev->phy.rev >= 3) { b43_nphy_calc_rx_iq_comp()
4610 B43_WARN_ON(dev->phy.rev < 3); b43_nphy_spur_workaround()
4695 if (dev->phy.rev >= 3) { b43_nphy_tx_pwr_ctrl_coef_setup()
4702 if (dev->phy.rev < 3) { b43_nphy_tx_pwr_ctrl_coef_setup()
4715 if (dev->phy.rev >= 3) { b43_nphy_tx_pwr_ctrl_coef_setup()
4749 if (dev->phy.rev >= 19) { b43_nphy_restore_rssi_cal()
4751 } else if (dev->phy.rev >= 7) { b43_nphy_restore_rssi_cal()
4846 if (phy->rev >= 19) { b43_nphy_tx_cal_radio_setup()
4848 } else if (phy->rev >= 7) { b43_nphy_tx_cal_radio_setup()
4850 } else if (phy->rev >= 3) { b43_nphy_tx_cal_radio_setup()
4891 (dev->phy.rev < 5) ? 0x11 : 0x01); b43_nphy_tx_cal_radio_setup()
4926 if (dev->phy.rev < 2) { b43_nphy_tx_cal_radio_setup()
4994 if (dev->phy.rev == 16) b43_nphy_int_pa_set_tx_dig_filters()
4998 if (dev->phy.rev == 17) { b43_nphy_int_pa_set_tx_dig_filters()
5036 if (dev->phy.rev >= 7) { b43_nphy_get_tx_gains()
5042 } else if (dev->phy.rev >= 3) { b43_nphy_get_tx_gains()
5069 if (dev->phy.rev >= 7) { b43_nphy_get_tx_gains()
5075 } else if (dev->phy.rev >= 3) { b43_nphy_get_tx_gains()
5097 if (dev->phy.rev >= 3) { b43_nphy_tx_cal_phy_cleanup()
5131 if (dev->phy.rev >= 3) { b43_nphy_tx_cal_phy_setup()
5172 if (phy->rev >= 19) b43_nphy_tx_cal_phy_setup()
5175 else if (phy->rev >= 7) b43_nphy_tx_cal_phy_setup()
5180 if (phy->rev >= 19) { b43_nphy_tx_cal_phy_setup()
5183 } else if (phy->rev >= 8) { b43_nphy_tx_cal_phy_setup()
5186 } else if (phy->rev == 7) { b43_nphy_tx_cal_phy_setup()
5250 if (phy->rev >= 19) { b43_nphy_save_cal()
5252 } else if (phy->rev >= 7) { b43_nphy_save_cal()
5269 } else if (phy->rev >= 3) { b43_nphy_save_cal()
5322 if (dev->phy.rev >= 3) b43_nphy_restore_cal()
5332 if (dev->phy.rev < 2) b43_nphy_restore_cal()
5344 if (phy->rev >= 19) { b43_nphy_restore_cal()
5346 } else if (phy->rev >= 7) { b43_nphy_restore_cal()
5363 } else if (phy->rev >= 3) { b43_nphy_restore_cal()
5406 if (dev->phy.rev >= 4) { b43_nphy_cal_tx_iq_lo()
5423 phy6or5x = dev->phy.rev >= 6 || b43_nphy_cal_tx_iq_lo()
5424 (dev->phy.rev == 5 && nphy->ipa2g_on && b43_nphy_cal_tx_iq_lo()
5440 if (phy->rev >= 19) { b43_nphy_cal_tx_iq_lo()
5442 } else if (phy->rev >= 7) { b43_nphy_cal_tx_iq_lo()
5463 if (dev->phy.rev < 3) b43_nphy_cal_tx_iq_lo()
5469 if (dev->phy.rev < 3) b43_nphy_cal_tx_iq_lo()
5473 if (dev->phy.rev >= 3) { b43_nphy_cal_tx_iq_lo()
5486 if (dev->phy.rev >= 3) b43_nphy_cal_tx_iq_lo()
5491 if (dev->phy.rev >= 3) b43_nphy_cal_tx_iq_lo()
5508 if (dev->phy.rev >= 3) b43_nphy_cal_tx_iq_lo()
5513 if (dev->phy.rev >= 3) b43_nphy_cal_tx_iq_lo()
5559 last = (dev->phy.rev < 3) ? 6 : 7; b43_nphy_cal_tx_iq_lo()
5564 if (dev->phy.rev < 3) { b43_nphy_cal_tx_iq_lo()
5579 if (dev->phy.rev < 3) b43_nphy_cal_tx_iq_lo()
5590 if (dev->phy.rev < 3) b43_nphy_cal_tx_iq_lo()
5603 if (dev->phy.rev < 2 && (!mphase || nphy->mphase_cal_phase_id == last)) b43_nphy_cal_tx_iq_lo()
5606 if (dev->phy.rev >= 4) b43_nphy_cal_tx_iq_lo()
5678 if (dev->phy.rev < 2) b43_nphy_rev2_cal_rx_iq()
5840 if (dev->phy.rev >= 7) b43_nphy_cal_rx_iq()
5843 if (dev->phy.rev >= 3) b43_nphy_cal_rx_iq()
5871 if (dev->phy.rev >= 3) { b43_nphy_set_rx_core_state()
5876 if (dev->phy.rev >= 3) { b43_nphy_set_rx_core_state()
5992 if (dev->phy.rev >= 7) b43_nphy_superswitch_init()
5995 if (dev->phy.rev >= 3) { b43_nphy_superswitch_init()
6052 if ((dev->phy.rev >= 3) && b43_phy_initn()
6071 phy->rev >= 7 || b43_phy_initn()
6072 (phy->rev >= 5 && b43_phy_initn()
6080 if (dev->phy.rev >= 3) { b43_phy_initn()
6083 if (phy->rev >= 7) { b43_phy_initn()
6089 if (phy->rev >= 19) { b43_phy_initn()
6100 if (dev->phy.rev < 6) { b43_phy_initn()
6107 if (dev->phy.rev >= 3) b43_phy_initn()
6111 if (dev->phy.rev <= 2) { b43_phy_initn()
6112 tmp = (dev->phy.rev == 2) ? 0x3B : 0x40; b43_phy_initn()
6130 if (phy->rev < 8) b43_phy_initn()
6135 if (phy->rev < 2) { b43_phy_initn()
6149 } else if (phy->rev >= 5) { b43_phy_initn()
6164 if (phy->rev < 7) { b43_phy_initn()
6189 if (phy->rev >= 3) { b43_phy_initn()
6219 if (phy->rev >= 3) { b43_phy_initn()
6241 if (phy->rev >= 3 && phy->rev <= 6) b43_phy_initn()
6244 if (phy->rev >= 3) b43_phy_initn()
6329 if (dev->phy.rev < 3) b43_nphy_channel_setup()
6334 if (dev->phy.rev >= 3 && b43_nphy_channel_setup()
6340 } else if (phy->rev >= 19) { b43_nphy_channel_setup()
6342 } else if (phy->rev >= 18) { b43_nphy_channel_setup()
6344 } else if (phy->rev >= 17) { b43_nphy_channel_setup()
6346 } else if (phy->rev >= 16) { b43_nphy_channel_setup()
6348 } else if (phy->rev >= 7) { b43_nphy_channel_setup()
6371 if (dev->phy.rev == 3 || dev->phy.rev == 4) b43_nphy_channel_setup()
6387 if (phy->rev >= 3) b43_nphy_channel_setup()
6405 if (phy->rev >= 19) { b43_nphy_set_channel()
6408 } else if (phy->rev >= 7) { b43_nphy_set_channel()
6413 } else if (phy->rev >= 3) { b43_nphy_set_channel()
6437 if (phy->rev >= 7) b43_nphy_set_channel()
6441 if (phy->rev >= 7) b43_nphy_set_channel()
6445 if (phy->rev >= 19) { b43_nphy_set_channel()
6447 } else if (phy->rev >= 7) { b43_nphy_set_channel()
6459 } else if (phy->rev >= 3) { b43_nphy_set_channel()
6499 nphy->hang_avoid = (phy->rev == 3 || phy->rev == 4); b43_nphy_op_prepare_structs()
6500 nphy->spur_avoid = (phy->rev >= 3) ? b43_nphy_op_prepare_structs()
6514 if (dev->phy.rev >= 3 || b43_nphy_op_prepare_structs()
6520 if (dev->phy.rev >= 2 && b43_nphy_op_prepare_structs()
6538 if (dev->phy.rev >= 3) { b43_nphy_op_prepare_structs()
6588 B43_WARN_ON(dev->phy.rev < 7 && reg == 1); b43_nphy_op_radio_read()
6590 if (dev->phy.rev >= 7) b43_nphy_op_radio_read()
6602 B43_WARN_ON(dev->phy.rev < 7 && reg == 1); b43_nphy_op_radio_write()
6618 if (phy->rev >= 19) { b43_nphy_op_software_rfkill()
6620 } else if (phy->rev >= 8) { b43_nphy_op_software_rfkill()
6623 } else if (phy->rev >= 7) { b43_nphy_op_software_rfkill()
6625 } else if (phy->rev >= 3) { b43_nphy_op_software_rfkill()
6646 if (phy->rev >= 19) { b43_nphy_op_software_rfkill()
6648 } else if (phy->rev >= 7) { b43_nphy_op_software_rfkill()
6652 } else if (phy->rev >= 3) { b43_nphy_op_software_rfkill()
6669 if (phy->rev >= 19) { b43_nphy_op_switch_analog()
6671 } else if (phy->rev >= 3) { b43_nphy_op_switch_analog()
H A Dtables_lpphy.h14 #define B43_LPTAB_TXPWR_R2PLUS B43_LPTAB32(0x07, 0) /* TX power lookup table (rev >= 2) */
15 #define B43_LPTAB_TXPWR_R0_1 B43_LPTAB32(0xA0, 0) /* TX power lookup table (rev < 2) */
H A Dphy_g.c85 /* APHY.rev < 5 || GPHY.rev < 6 */ generate_rfatt_list()
102 /* Radio.rev == 8 && Radio.version == 0x2050 */ generate_rfatt_list()
317 if (phy->rev <= 1) { b43_set_all_gains()
323 if (phy->rev <= 1) b43_set_all_gains()
347 if (phy->rev <= 1) { b43_set_original_gains()
353 if (phy->rev <= 1) b43_set_original_gains()
432 if (phy->rev != 1) { /* Not in specs, but needed to prevent PPC machine check */ b43_calc_nrssi_offset()
449 if (phy->rev >= 6) { b43_calc_nrssi_offset()
490 if (phy->rev != 1) { /* Not in specs, but needed to prevent PPC machine check */ b43_calc_nrssi_offset()
501 if (phy->rev == 0) { b43_calc_nrssi_offset()
506 if (phy->rev != 1) { /* Not in specs, but needed to prevent PPC machine check */ b43_calc_nrssi_offset()
537 if (phy->rev >= 6) { b43_calc_nrssi_offset()
543 if (phy->rev != 1) { /* Not in specs, but needed to prevent PPC machine check */ b43_calc_nrssi_offset()
557 if (phy->rev >= 6) { b43_calc_nrssi_offset()
596 if (phy->rev >= 3) { b43_calc_nrssi_slope()
607 switch (phy->rev) { b43_calc_nrssi_slope()
625 if (phy->rev >= 2) { b43_calc_nrssi_slope()
637 if (phy->rev >= 2) { b43_calc_nrssi_slope()
646 if (phy->rev >= 2) { b43_calc_nrssi_slope()
675 if (phy->rev >= 3) { b43_calc_nrssi_slope()
681 if (phy->rev >= 2) { b43_calc_nrssi_slope()
700 if (phy->rev >= 3) { b43_calc_nrssi_slope()
848 if (phy->rev != 1) { b43_radio_interference_mitigation_enable()
904 if (phy->rev < 2) { b43_radio_interference_mitigation_enable()
923 if (phy->rev == 2) { b43_radio_interference_mitigation_enable()
926 } else if (phy->rev >= 3) { b43_radio_interference_mitigation_enable()
950 if (phy->rev < 2) { b43_radio_interference_mitigation_enable()
952 } else if (phy->rev == 2) { b43_radio_interference_mitigation_enable()
974 if (phy->rev >= 3) { b43_radio_interference_mitigation_enable()
984 if (phy->rev >= 2) { b43_radio_interference_mitigation_enable()
988 if (phy->rev == 2) { b43_radio_interference_mitigation_enable()
991 } else if (phy->rev >= 6) { b43_radio_interference_mitigation_enable()
1012 if (phy->rev != 1) { b43_radio_interference_mitigation_disable()
1053 if (phy->rev >= 2) { b43_radio_interference_mitigation_disable()
1061 if (phy->rev == 2) { b43_radio_interference_mitigation_disable()
1064 } else if (phy->rev >= 3) { b43_radio_interference_mitigation_disable()
1151 if ((phy->rev < 7) || radio2050_rfover_val()
1191 if ((phy->rev < 7) || radio2050_rfover_val()
1283 } else if (phy->gmode || phy->rev >= 2) { b43_radio_init2050()
1300 if (phy->rev >= 3) b43_radio_init2050()
1334 if (phy->gmode || phy->rev >= 2) { b43_radio_init2050()
1341 if (phy->gmode || phy->rev >= 2) { b43_radio_init2050()
1360 if (phy->gmode || phy->rev >= 2) { b43_radio_init2050()
1368 if (phy->gmode || phy->rev >= 2) { b43_radio_init2050()
1376 if (phy->gmode || phy->rev >= 2) { b43_radio_init2050()
1386 if (phy->gmode || phy->rev >= 2) { b43_radio_init2050()
1408 if (phy->gmode || phy->rev >= 2) { b43_radio_init2050()
1417 if (phy->gmode || phy->rev >= 2) { b43_radio_init2050()
1426 if (phy->gmode || phy->rev >= 2) { b43_radio_init2050()
1437 if (phy->gmode || phy->rev >= 2) { b43_radio_init2050()
1514 if (phy->gmode || phy->rev >= 2) { b43_phy_initb5()
1722 if (phy->rev != 1) { /* Not in specs, but needed to prevent PPC machine check */ b43_calc_loopback_gain()
1747 if (phy->rev != 1) { /* Not in specs, but needed to prevent PPC machine check */ b43_calc_loopback_gain()
1763 if (phy->rev != 1) { /* Not in specs, but needed to prevent PPC machine check */ b43_calc_loopback_gain()
1777 if (phy->rev >= 3) b43_calc_loopback_gain()
1790 if (phy->rev >= 7) { b43_calc_loopback_gain()
1829 if (phy->rev != 1) { /* Not in specs, but needed to prevent PPC machine check */ b43_calc_loopback_gain()
1910 B43_WARN_ON(phy->rev < 6); b43_hardware_pctl_init_gphy()
1996 if (phy->rev == 1) b43_phy_initg()
2001 if (phy->rev >= 2 || phy->gmode) b43_phy_initg()
2004 if (phy->rev >= 2) { b43_phy_initg()
2008 if (phy->rev == 2) { b43_phy_initg()
2012 if (phy->rev > 5) { b43_phy_initg()
2016 if (phy->gmode || phy->rev >= 2) { b43_phy_initg()
2027 if ((phy->rev <= 2 && phy->gmode) || phy->rev >= 2) b43_phy_initg()
2051 if (phy->rev >= 6) { b43_phy_initg()
2058 if (phy->rev < 2) b43_phy_initg()
2062 if (phy->gmode || phy->rev >= 2) { b43_phy_initg()
2076 } else if (phy->gmode || phy->rev >= 2) { b43_phy_initg()
2289 if (!((phy->type == B43_PHYTYPE_G) && (phy->rev > 0))) b43_gphy_aci_scan()
2531 if (phy->rev == 1) { b43_gphy_op_prepare_hardware()
2533 * phase, as the gmode stuff is not needed for phy rev 1 */ b43_gphy_op_prepare_hardware()
2590 return (dev->phy.rev >= 6); b43_gphy_op_supports_hwpctl()
2688 if (phy->rev >= 2) { b43_gphy_op_set_rx_antenna()
2692 if (phy->rev == 2) b43_gphy_op_set_rx_antenna()
2697 if (phy->rev >= 6) b43_gphy_op_set_rx_antenna()
2711 if ((phy->rev == 0) || (!phy->gmode)) b43_gphy_op_interf_mitigation()
3004 phy->rev == 1) { b43_gphy_op_pwork_15sec()
H A Db43.h54 #define B43_MMIO_REV3PLUS_TSF_LOW 0x180 /* core rev >= 3 only */
55 #define B43_MMIO_REV3PLUS_TSF_HIGH 0x184 /* core rev >= 3 only */
75 /* PIO on core rev < 11 */
84 /* PIO on core rev >= 11 */
92 #define B43_MMIO_RADIO24_CONTROL 0x3D8 /* core rev >= 24 only */
93 #define B43_MMIO_RADIO24_DATA 0x3DA /* core rev >= 24 only */
124 #define B43_MMIO_XMTFIFO_FRAME_CNT 0x522 /* core rev>= 16 only */
125 #define B43_MMIO_XMTFIFO_BYTE_CNT 0x524 /* core rev>= 16 only */
126 #define B43_MMIO_XMTFIFO_HEAD 0x526 /* core rev>= 16 only */
127 #define B43_MMIO_XMTFIFO_RD_PTR 0x528 /* core rev>= 16 only */
128 #define B43_MMIO_XMTFIFO_WR_PTR 0x52A /* core rev>= 16 only */
129 #define B43_MMIO_XMTFIFODEF1 0x52C /* core rev>= 16 only */
138 #define B43_MMIO_SMPL_CLCT_STRPTR 0x552 /* core rev>= 22 only */
139 #define B43_MMIO_SMPL_CLCT_STPPTR 0x554 /* core rev>= 22 only */
140 #define B43_MMIO_SMPL_CLCT_CURPTR 0x556 /* core rev>= 22 only */
151 #define B43_MMIO_TSF_0 0x632 /* core rev < 3 only */
152 #define B43_MMIO_TSF_1 0x634 /* core rev < 3 only */
153 #define B43_MMIO_TSF_2 0x636 /* core rev < 3 only */
154 #define B43_MMIO_TSF_3 0x638 /* core rev < 3 only */
230 B43_SHM_RCMTA, /* Receive match transmitter address (rev >= 5 only) */
281 #define B43_SHM_SH_PSM 0x05F4 /* PSM transmitter address match block (rev < 5) */
367 #define B43_HF_20IN40IQW 0x000000000200ULL /* 20 in 40 MHz I/Q workaround (rev >= 13 only) */
384 #define B43_HF_N40W 0x000008000000ULL /* N PHY 40 MHz workaround (rev >= 13 only) */
386 #define B43_HF_BT3COEXT 0x000020000000ULL /* Bluetooth 3-wire coexistence (rev >= 13 only) */
387 #define B43_HF_BTCANT 0x000040000000ULL /* Bluetooth coexistence (antenna mode) (rev >= 13 only) */
388 #define B43_HF_ANTSELEN 0x000100000000ULL /* Antenna selection enabled (rev >= 13 only) */
389 #define B43_HF_ANTSELMODE 0x000200000000ULL /* Antenna selection mode (rev >= 13 only) */
390 #define B43_HF_MLADVW 0x001000000000ULL /* N PHY ML ADV workaround (rev >= 13 only) */
391 #define B43_HF_PR45960W 0x080000000000ULL /* PR 45960 workaround (rev >= 13 only) */
519 #define B43_TMSLOW_PLLREFSEL 0x00200000 /* PLL Frequency Reference Select (rev >= 5) */
520 #define B43_TMSLOW_MACPHYCLKEN 0x00100000 /* MAC PHY Clock Control Enable (rev >= 5) */
526 #define B43_TMSHIGH_FCLOCK 0x00040000 /* Fast Clock Available (rev >= 5) */
527 #define B43_TMSHIGH_HAVE_5GHZ_PHY 0x00020000 /* 5 GHz PHY available (rev >= 5) */
528 #define B43_TMSHIGH_HAVE_2GHZ_PHY 0x00010000 /* 2.4 GHz PHY available (rev >= 5) */
790 u16 rev; member in struct:b43_firmware
802 * core rev > 10, as these don't need PCM firmware. */
H A Dppr.c154 if (phy->type == B43_PHYTYPE_N && phy->rev >= 3) b43_ppr_load_max_from_sprom()
160 if (phy->type == B43_PHYTYPE_N && phy->rev >= 3) b43_ppr_load_max_from_sprom()
178 if (phy->type == B43_PHYTYPE_N && phy->rev >= 3) b43_ppr_load_max_from_sprom()
184 if (phy->type == B43_PHYTYPE_N && phy->rev >= 3) b43_ppr_load_max_from_sprom()
H A Dphy_a.h13 #define B43_PHY_CRSTHRES1_R1 B43_PHY_OFDM(0x06) /* CRS Threshold 1 (phy.rev 1 only) */
57 #define B43_PHY_CRSTHRES1 B43_PHY_OFDM(0xC0) /* CRS Threshold 1 (phy.rev >= 2 only) */
58 #define B43_PHY_CRSTHRES2 B43_PHY_OFDM(0xC1) /* CRS Threshold 2 (phy.rev >= 2 only) */
H A Dmain.c2309 const u8 rev = ctx->dev->dev->core_rev; b43_try_request_fw() local
2315 switch (rev) { b43_try_request_fw()
2384 if ((rev >= 5) && (rev <= 10)) b43_try_request_fw()
2386 else if (rev >= 11) b43_try_request_fw()
2394 * core rev <= 10 must do without hwcrypto then. */ b43_try_request_fw()
2403 if (rev == 13) b43_try_request_fw()
2405 else if (rev >= 5 && rev <= 10) b43_try_request_fw()
2409 if (rev == 30) b43_try_request_fw()
2411 else if (rev == 28 || rev == 25) b43_try_request_fw()
2413 else if (rev == 24) b43_try_request_fw()
2415 else if (rev == 23) b43_try_request_fw()
2417 else if (rev >= 16 && rev <= 18) b43_try_request_fw()
2419 else if (rev >= 11 && rev <= 12) b43_try_request_fw()
2423 if (rev >= 16 && rev <= 18) b43_try_request_fw()
2425 else if (rev == 15) b43_try_request_fw()
2427 else if (rev == 14) b43_try_request_fw()
2429 else if (rev == 13) b43_try_request_fw()
2433 if (rev == 29) b43_try_request_fw()
2435 else if (rev == 26) b43_try_request_fw()
2439 if (rev == 24) b43_try_request_fw()
2443 if (rev == 33) b43_try_request_fw()
2447 if (rev == 42) b43_try_request_fw()
2449 else if (rev == 40) b43_try_request_fw()
2463 if (rev == 13) b43_try_request_fw()
2465 else if (rev >= 5 && rev <= 10) b43_try_request_fw()
2469 if (rev == 30) b43_try_request_fw()
2471 else if (rev == 28 || rev == 25) b43_try_request_fw()
2473 else if (rev == 24) b43_try_request_fw()
2475 else if (rev == 23) b43_try_request_fw()
2477 else if (rev >= 16 && rev <= 18) b43_try_request_fw()
2479 else if (rev >= 11 && rev <= 12) b43_try_request_fw()
2483 if (rev >= 16 && rev <= 18) b43_try_request_fw()
2485 else if (rev == 15) b43_try_request_fw()
2487 else if (rev == 14) b43_try_request_fw()
2489 else if (rev == 13) b43_try_request_fw()
2493 if (rev == 29) b43_try_request_fw()
2495 else if (rev == 26) b43_try_request_fw()
2499 if (rev == 24) b43_try_request_fw()
2503 if (rev == 33) b43_try_request_fw()
2507 if (rev == 42) b43_try_request_fw()
2509 else if (rev == 40) b43_try_request_fw()
2526 "is required for your device (wl-core rev %u)\n", rev); b43_try_request_fw()
2532 "is required for your device (wl-core rev %u)\n", rev); b43_try_request_fw()
2538 "is required for your device (wl-core rev %u)\n", rev); b43_try_request_fw()
2700 dev->fw.rev = fwrev; b43_upload_microcode()
2702 if (dev->fw.rev >= 598) b43_upload_microcode()
2704 else if (dev->fw.rev >= 410) b43_upload_microcode()
2720 dev->fw.rev, dev->fw.patch); b43_upload_microcode()
2744 dev->fw.rev, dev->fw.patch); b43_upload_microcode()
3933 if (!(phy->type == B43_PHYTYPE_N && phy->rev >= 3)) b43_switch_band()
4669 phy->rev = phy_rev; b43_phy_versioning()
4893 if (phy->rev == 1) b43_wireless_core_init()
4949 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_PHYVER, phy->rev); b43_wireless_core_init()
5662 (core->id.rev == 0x17 || core->id.rev == 0x18)) { b43_bcma_probe()
H A Dphy_lp.c175 B43_WARN_ON(dev->phy.rev >= 2); lpphy_adjust_gain_table()
198 if (dev->phy.rev < 2) lpphy_table_init()
205 if (dev->phy.rev < 2) lpphy_table_init()
245 if (dev->phy.rev == 0) { lpphy_baseband_rev0_1_init()
265 if (dev->phy.rev == 1 && lpphy_baseband_rev0_1_init()
285 (dev->phy.rev == 0 && (sprom->boardflags_lo & B43_BFL_FEM))) { lpphy_baseband_rev0_1_init()
294 } else if (dev->phy.rev == 1 || lpphy_baseband_rev0_1_init()
314 if (dev->phy.rev == 1 && (sprom->boardflags_hi & B43_BFH_PAREF)) { lpphy_baseband_rev0_1_init()
342 if (dev->phy.rev == 1) { lpphy_baseband_rev0_1_init()
501 if (dev->phy.rev >= 2) lpphy_baseband_init()
546 if (dev->phy.rev > 0) { lpphy_2062_init()
613 if (dev->phy.rev == 2) { lpphy_2063_init()
708 if (dev->phy.rev == 1) //FIXME check channel 14! lpphy_set_rc_cap()
808 if (dev->phy.rev >= 2) { lpphy_disable_rx_gain_override()
824 if (dev->phy.rev >= 2) { lpphy_enable_rx_gain_override()
837 if (dev->phy.rev < 2) lpphy_disable_tx_gain_override()
848 if (dev->phy.rev < 2) lpphy_enable_tx_gain_override()
863 if (dev->phy.rev < 2) { lpphy_get_tx_gains()
902 if (dev->phy.rev < 2) { lpphy_set_tx_gains()
964 if (dev->phy.rev < 2) lpphy_set_rx_gain()
1172 if (dev->phy.rev >= 2) { lpphy_set_tx_power_control()
1344 if (dev->phy.rev >= 2) { lpphy_calibrate_rc()
1356 if (dev->phy.rev >= 2) b43_lpphy_op_set_rx_antenna()
1391 if (dev->phy.rev >= 2) { lpphy_set_tx_power_by_index()
1409 if (dev->phy.rev >= 2) { lpphy_set_tx_power_by_index()
1415 if (dev->phy.rev >= 2) { lpphy_set_tx_power_by_index()
1434 if (dev->phy.rev >= 2) { b43_lpphy_op_software_rfkill()
1448 if (dev->phy.rev >= 2) b43_lpphy_op_software_rfkill()
1461 if (dev->phy.rev < 2) { //SPEC FIXME Isn't this rev0/1-specific? lpphy_set_analog_filter()
1463 if ((dev->phy.rev == 1) && (lpphy->rc_cap)) lpphy_set_analog_filter()
1496 if (dev->phy.rev >= 2) lpphy_tx_pctl_init_hw()
1505 if (dev->phy.rev < 2) { lpphy_tx_pctl_init_hw()
1526 if (dev->phy.rev < 2) { lpphy_tx_pctl_init_hw()
1597 if (dev->phy.rev < 2) { lpphy_pr41573_workaround()
1610 if (dev->phy.rev < 2) { lpphy_pr41573_workaround()
1880 } else if (dev->phy.rev >= 2) { lpphy_rx_iq_cal()
1969 if (dev->phy.rev >= 2) lpphy_calibration()
1975 if ((dev->phy.rev == 0) && (saved_pctl_mode != B43_LPPHY_TXPCTL_OFF)) lpphy_calibration()
1977 if ((dev->phy.rev >= 2) && full_cal) { lpphy_calibration()
1981 if (dev->phy.rev >= 2) lpphy_calibration()
2001 if (dev->phy.rev < 2) { b43_lpphy_op_radio_read()
H A Dphy_a.c185 if (dev->phy.rev < 3) { b43_phy_rssiagc()
278 if (phy->rev >= 6) { b43_phy_inita()
290 if (phy->gmode && (phy->rev < 3)) b43_phy_inita()
304 if (phy->rev >= 3) b43_phy_inita()
480 return (dev->phy.rev >= 5); b43_aphy_op_supports_hwpctl()
542 if (phy->rev < 3) b43_aphy_op_set_rx_antenna()
546 if (phy->rev == 3) { b43_aphy_op_set_rx_antenna()
H A Dpio.c147 q->rev = dev->dev->core_rev; b43_setup_pioqueue_tx()
153 if (q->rev >= 8) { b43_setup_pioqueue_tx()
181 q->rev = dev->dev->core_rev; b43_setup_pioqueue_rx()
486 if (q->rev >= 8) pio_tx_frame()
635 if (q->rev >= 8) { pio_rx_frame()
669 if (q->rev >= 8) { pio_rx_frame()
717 if (q->rev >= 8) { pio_rx_frame()
767 if (q->rev >= 8) pio_rx_frame()
792 if (q->rev >= 8) { b43_pio_tx_suspend_queue()
805 if (q->rev >= 8) { b43_pio_tx_resume_queue()
H A Dpio.h95 u8 rev; member in struct:b43_pio_txqueue
104 u8 rev; member in struct:b43_pio_rxqueue
/linux-4.4.14/include/linux/ssb/
H A Dssb_driver_pci.h49 #define SSB_PCICORE_GPIO_IN 0x0060 /* rev >= 2 only */
50 #define SSB_PCICORE_GPIO_OUT 0x0064 /* rev >= 2 only */
51 #define SSB_PCICORE_GPIO_ENABLE 0x0068 /* rev >= 2 only */
52 #define SSB_PCICORE_GPIO_CTL 0x006C /* rev >= 2 only */
59 #define SSB_PCICORE_PCICFG0 0x0400 /* PCI config space 0 (rev >= 8) */
60 #define SSB_PCICORE_PCICFG1 0x0500 /* PCI config space 1 (rev >= 8) */
61 #define SSB_PCICORE_PCICFG2 0x0600 /* PCI config space 2 (rev >= 8) */
62 #define SSB_PCICORE_PCICFG3 0x0700 /* PCI config space 3 (rev >= 8) */
73 #define SSB_PCICORE_SBTOPCI_RC 0x00000030 /* Read Command mask (rev >= 11) */
H A Dssb_driver_chipcommon.h54 #define SSB_CHIPCO_CAP_PMU 0x10000000 /* PMU available (rev >= 20) */
55 #define SSB_CHIPCO_CAP_ECI 0x20000000 /* ECI available (rev >= 20) */
60 #define SSB_CHIPCO_CORECTL_UARTCLKEN 0x00000008 /* UART clock enable (rev >= 21) */
190 #define SSB_CHIPCO_CLKCTLST 0x01E0 /* Clock control and status (rev >= 20) */
201 #define SSB_CHIPCO_HW_WORKAROUND 0x01E4 /* Hardware workaround (rev >= 20) */
218 /* PMU registers (rev >= 20) */
263 /* PMU rev 0 PLL registers */
277 /* PMU rev 1 PLL registers */
584 u8 rev; /* PMU revision */ member in struct:ssb_chipcommon_pmu
/linux-4.4.14/arch/powerpc/kvm/
H A Dbook3s_hv_rm_mmu.c74 void kvmppc_add_revmap_chain(struct kvm *kvm, struct revmap_entry *rev, kvmppc_add_revmap_chain() argument
88 rev->forw = i; kvmppc_add_revmap_chain()
89 rev->back = head->back; kvmppc_add_revmap_chain()
93 rev->forw = rev->back = pte_index; kvmppc_add_revmap_chain()
134 struct revmap_entry *rev, remove_revmap_chain()
143 ptel = rev->guest_rpte |= rcbits; remove_revmap_chain()
150 next = real_vmalloc_addr(&kvm->arch.revmap[rev->forw]); remove_revmap_chain()
151 prev = real_vmalloc_addr(&kvm->arch.revmap[rev->back]); remove_revmap_chain()
152 next->back = rev->back; remove_revmap_chain()
153 prev->forw = rev->forw; remove_revmap_chain()
155 head = rev->forw; remove_revmap_chain()
174 struct revmap_entry *rev; kvmppc_do_h_enter() local
336 rev = &kvm->arch.revmap[pte_index]; kvmppc_do_h_enter()
338 rev = real_vmalloc_addr(rev); kvmppc_do_h_enter()
339 if (rev) { kvmppc_do_h_enter()
340 rev->guest_rpte = g_ptel; kvmppc_do_h_enter()
341 note_hpte_modification(kvm, rev); kvmppc_do_h_enter()
356 kvmppc_add_revmap_chain(kvm, rev, rmap, pte_index, kvmppc_do_h_enter()
437 struct revmap_entry *rev; kvmppc_do_h_remove() local
453 rev = real_vmalloc_addr(&kvm->arch.revmap[pte_index]); kvmppc_do_h_remove()
468 remove_revmap_chain(kvm, pte_index, rev, v, kvmppc_do_h_remove()
471 r = rev->guest_rpte & ~HPTE_GR_RESERVED; kvmppc_do_h_remove()
472 note_hpte_modification(kvm, rev); kvmppc_do_h_remove()
500 struct revmap_entry *rev, *revs[4]; kvmppc_h_bulk_remove() local
556 rev = real_vmalloc_addr(&kvm->arch.revmap[pte_index]); kvmppc_h_bulk_remove()
557 note_hpte_modification(kvm, rev); kvmppc_h_bulk_remove()
561 rcbits = rev->guest_rpte & (HPTE_R_R|HPTE_R_C); kvmppc_h_bulk_remove()
573 revs[n] = rev; kvmppc_h_bulk_remove()
588 rev = revs[k]; kvmppc_h_bulk_remove()
589 remove_revmap_chain(kvm, pte_index, rev, kvmppc_h_bulk_remove()
591 rcbits = rev->guest_rpte & (HPTE_R_R|HPTE_R_C); kvmppc_h_bulk_remove()
606 struct revmap_entry *rev; kvmppc_h_protect() local
631 rev = real_vmalloc_addr(&kvm->arch.revmap[pte_index]); kvmppc_h_protect()
632 if (rev) { kvmppc_h_protect()
633 r = (rev->guest_rpte & ~mask) | bits; kvmppc_h_protect()
634 rev->guest_rpte = r; kvmppc_h_protect()
635 note_hpte_modification(kvm, rev); kvmppc_h_protect()
671 struct revmap_entry *rev = NULL; kvmppc_h_read() local
679 rev = real_vmalloc_addr(&kvm->arch.revmap[pte_index]); kvmppc_h_read()
689 r = rev[i].guest_rpte | (r & (HPTE_R_R | HPTE_R_C)); kvmppc_h_read()
704 struct revmap_entry *rev; kvmppc_h_clear_ref() local
711 rev = real_vmalloc_addr(&kvm->arch.revmap[pte_index]); kvmppc_h_clear_ref()
720 gr = rev->guest_rpte; kvmppc_h_clear_ref()
721 if (rev->guest_rpte & HPTE_R_R) { kvmppc_h_clear_ref()
722 rev->guest_rpte &= ~HPTE_R_R; kvmppc_h_clear_ref()
723 note_hpte_modification(kvm, rev); kvmppc_h_clear_ref()
750 struct revmap_entry *rev; kvmppc_h_clear_mod() local
757 rev = real_vmalloc_addr(&kvm->arch.revmap[pte_index]); kvmppc_h_clear_mod()
766 gr = rev->guest_rpte; kvmppc_h_clear_mod()
768 rev->guest_rpte &= ~HPTE_R_C; kvmppc_h_clear_mod()
769 note_hpte_modification(kvm, rev); kvmppc_h_clear_mod()
930 struct revmap_entry *rev; kvmppc_hpte_hv_fault() local
947 rev = real_vmalloc_addr(&kvm->arch.revmap[index]); kvmppc_hpte_hv_fault()
948 gr = rev->guest_rpte; kvmppc_hpte_hv_fault()
133 remove_revmap_chain(struct kvm *kvm, long pte_index, struct revmap_entry *rev, unsigned long hpte_v, unsigned long hpte_r) remove_revmap_chain() argument
H A Dbook3s_64_mmu_hv.c54 struct revmap_entry *rev; kvmppc_alloc_hpt() local
92 rev = vmalloc(sizeof(struct revmap_entry) * kvm->arch.hpt_npte); kvmppc_alloc_hpt()
93 if (!rev) { kvmppc_alloc_hpt()
97 kvm->arch.revmap = rev; kvmppc_alloc_hpt()
447 struct revmap_entry *rev; kvmppc_book3s_hv_page_fault() local
465 rev = &kvm->arch.revmap[index]; kvmppc_book3s_hv_page_fault()
471 hpte[2] = r = rev->guest_rpte; kvmppc_book3s_hv_page_fault()
588 rev->guest_rpte != hpte[2]) kvmppc_book3s_hv_page_fault()
616 kvmppc_add_revmap_chain(kvm, rev, rmap, index, 0); kvmppc_book3s_hv_page_fault()
716 struct revmap_entry *rev = kvm->arch.revmap; kvm_unmap_rmapp() local
742 j = rev[i].forw; kvm_unmap_rmapp()
748 h = rev[i].back; kvm_unmap_rmapp()
749 rev[h].forw = j; kvm_unmap_rmapp()
750 rev[j].back = h; kvm_unmap_rmapp()
751 rev[i].forw = rev[i].back = i; kvm_unmap_rmapp()
756 ptel = rev[i].guest_rpte; kvm_unmap_rmapp()
767 if (rcbits & ~rev[i].guest_rpte) { kvm_unmap_rmapp()
768 rev[i].guest_rpte = ptel | rcbits; kvm_unmap_rmapp()
769 note_hpte_modification(kvm, &rev[i]); kvm_unmap_rmapp()
816 struct revmap_entry *rev = kvm->arch.revmap; kvm_age_rmapp() local
835 j = rev[i].forw; kvm_age_rmapp()
853 if (!(rev[i].guest_rpte & HPTE_R_R)) { kvm_age_rmapp()
854 rev[i].guest_rpte |= HPTE_R_R; kvm_age_rmapp()
855 note_hpte_modification(kvm, &rev[i]); kvm_age_rmapp()
874 struct revmap_entry *rev = kvm->arch.revmap; kvm_test_age_rmapp() local
890 j = rev[i].forw; kvm_test_age_rmapp()
923 struct revmap_entry *rev = kvm->arch.revmap; kvm_test_clear_dirty_npages() local
949 j = rev[i].forw; kvm_test_clear_dirty_npages()
991 if (!(rev[i].guest_rpte & HPTE_R_C)) { kvm_test_clear_dirty_npages()
992 rev[i].guest_rpte |= HPTE_R_C; kvm_test_clear_dirty_npages()
993 note_hpte_modification(kvm, &rev[i]); kvm_test_clear_dirty_npages()
/linux-4.4.14/sound/pci/echoaudio/
H A Dmona.c96 {0x1057, 0x1801, 0xECC0, 0x0070, 0, 0, 0}, /* DSP 56301 Mona rev.0 */
97 {0x1057, 0x1801, 0xECC0, 0x0071, 0, 0, 0}, /* DSP 56301 Mona rev.1 */
98 {0x1057, 0x1801, 0xECC0, 0x0072, 0, 0, 0}, /* DSP 56301 Mona rev.2 */
99 {0x1057, 0x3410, 0xECC0, 0x0070, 0, 0, 0}, /* DSP 56361 Mona rev.0 */
100 {0x1057, 0x3410, 0xECC0, 0x0071, 0, 0, 0}, /* DSP 56361 Mona rev.1 */
101 {0x1057, 0x3410, 0xECC0, 0x0072, 0, 0, 0}, /* DSP 56361 Mona rev.2 */
H A Dgina24.c89 {0x1057, 0x1801, 0xECC0, 0x0050, 0, 0, 0}, /* DSP 56301 Gina24 rev.0 */
90 {0x1057, 0x1801, 0xECC0, 0x0051, 0, 0, 0}, /* DSP 56301 Gina24 rev.1 */
91 {0x1057, 0x3410, 0xECC0, 0x0050, 0, 0, 0}, /* DSP 56361 Gina24 rev.0 */
92 {0x1057, 0x3410, 0xECC0, 0x0051, 0, 0, 0}, /* DSP 56361 Gina24 rev.1 */
H A Ddarla24.c71 {0x1057, 0x1801, 0xECC0, 0x0040, 0, 0, 0}, /* DSP 56301 Darla24 rev.0 */
72 {0x1057, 0x1801, 0xECC0, 0x0041, 0, 0, 0}, /* DSP 56301 Darla24 rev.1 */
H A Dlayla20.c80 {0x1057, 0x1801, 0xECC0, 0x0030, 0, 0, 0}, /* DSP 56301 Layla20 rev.0 */
81 {0x1057, 0x1801, 0xECC0, 0x0031, 0, 0, 0}, /* DSP 56301 Layla20 rev.1 */
H A Dmia.c81 {0x1057, 0x3410, 0xECC0, 0x0080, 0, 0, 0}, /* DSP 56361 Mia rev.0 */
82 {0x1057, 0x3410, 0xECC0, 0x0081, 0, 0, 0}, /* DSP 56361 Mia rev.1 */
/linux-4.4.14/drivers/bcma/
H A Ddriver_chipcommon_nflash.c24 cc->core->id.rev != 38) { bcma_nflash_init()
35 if (cc->core->id.rev == 38 && bcma_nflash_init()
H A Ddriver_pci.c70 if (pc->core->id.rev >= 10) { bcma_pcie_mdio_read()
113 if (pc->core->id.rev >= 10) { bcma_pcie_mdio_write()
269 if (pc->core->id.rev >= 15 && pc->core->id.rev <= 20) { bcma_core_pci_power_save()
275 } else if (pc->core->id.rev >= 21 && pc->core->id.rev <= 22) { bcma_core_pci_power_save()
H A Ddriver_chipcommon.c45 else if (cc->core->id.rev < 26) bcma_chipco_watchdog_get_max_timer()
48 nb = (cc->core->id.rev >= 37) ? 32 : 24; bcma_chipco_watchdog_get_max_timer()
123 if (cc->core->id.rev >= 11) bcma_core_chipcommon_early_init()
126 if (cc->core->id.rev >= 35) bcma_core_chipcommon_early_init()
145 if (cc->core->id.rev >= 20) { bcma_core_chipcommon_init()
162 if (cc->core->id.rev >= 16) { bcma_core_chipcommon_init()
292 if (cc->core->id.rev < 20) bcma_chipco_gpio_pullup()
307 if (cc->core->id.rev < 20) bcma_chipco_gpio_pulldown()
323 unsigned int ccrev = cc->core->id.rev; bcma_chipco_serial_init()
H A Ddriver_pcie2.c72 u8 core_rev = pcie2->core->id.rev; bcma_core_pcie2_hw_ltr_war()
108 u8 core_rev = pcie2->core->id.rev; pciedev_crwlpciegen2()
146 u8 core_rev = pcie2->core->id.rev; pciedev_reg_pm_clk_period()
178 if (ci->id == BCMA_CHIP_ID_BCM4360 && ci->rev > 3) bcma_core_pcie2_init()
H A Dscan.c303 core->id.rev = (cib & SCAN_CIB_REV) >> SCAN_CIB_REV_SHIFT; bcma_get_next_core()
339 (match->rev != BCMA_ANY_REV && match->rev != core->id.rev) || bcma_get_next_core()
448 chipinfo->rev = (tmp & BCMA_CC_ID_REV) >> BCMA_CC_ID_REV_SHIFT; bcma_detect_chip()
453 bcma_info(bus, "Found chip with id %s, rev 0x%02X and package 0x%02X\n", bcma_detect_chip()
454 chip_id, chipinfo->rev, chipinfo->pkg); bcma_detect_chip()
511 bcma_info(bus, "Core %d found: %s (manuf 0x%03X, id 0x%03X, rev 0x%02X, class 0x%X)\n", bcma_bus_scan()
513 core->id.manuf, core->id.id, core->id.rev, bcma_bus_scan()
H A Ddriver_chipcommon_pmu.c142 if (cc->pmu.rev >= 2) bcma_pmu2_pll_init0()
220 else if (bus->chipinfo.rev > 0) bcma_chipco_bcm4331_ext_pa_lines_ctl()
251 if (bus->chipinfo.rev == 0) { bcma_pmu_workarounds()
275 cc->pmu.rev = (pmucap & BCMA_CC_PMU_CAP_REVISION); bcma_pmu_early_init()
277 bcma_debug(cc->core->bus, "Found rev %u PMU (capabilities 0x%08X)\n", bcma_pmu_early_init()
278 cc->pmu.rev, pmucap); bcma_pmu_early_init()
283 if (cc->pmu.rev == 1) bcma_pmu_init()
330 bcma_warn(bus, "No ALP clock specified for %04X device, pmu rev. %d, using default %d Hz\n", bcma_pmu_get_alp_clock()
331 bus->chipinfo.id, cc->pmu.rev, BCMA_CC_PMU_ALP_CLOCK); bcma_pmu_get_alp_clock()
430 bcma_warn(bus, "No bus clock specified for %04X device, pmu rev. %d, using default %d Hz\n", bcma_pmu_get_bus_clock()
431 bus->chipinfo.id, cc->pmu.rev, BCMA_CC_PMU_HT_CLOCK); bcma_pmu_get_bus_clock()
446 if (cc->pmu.rev >= 5) { bcma_pmu_get_cpu_clock()
H A Dmain.c50 return sprintf(buf, "0x%02X\n", core->id.rev); rev_show()
52 static DEVICE_ATTR_RO(rev);
626 for (did = adrv->id_table; did->manuf || did->id || did->rev; did++) { bcma_bus_match()
629 (did->rev == cid->rev || did->rev == BCMA_ANY_REV) && bcma_bus_match()
668 core->id.rev, core->id.class); bcma_device_uevent()
/linux-4.4.14/arch/arm/mach-mvebu/
H A Dmvebu-soc-id.h46 int mvebu_get_soc_id(u32 *dev, u32 *rev);
48 static inline int mvebu_get_soc_id(u32 *dev, u32 *rev) mvebu_get_soc_id() argument
H A Dsystem-controller.c117 int mvebu_system_controller_get_soc_id(u32 *dev, u32 *rev) mvebu_system_controller_get_soc_id() argument
122 *rev = (readl(system_controller_base + mvebu_sc->rev_id) >> 8) mvebu_system_controller_get_soc_id()
132 u32 dev, rev; mvebu_armada375_smp_wa_init() local
135 if (mvebu_get_soc_id(&dev, &rev) != 0) mvebu_armada375_smp_wa_init()
138 if (rev != ARMADA_375_Z1_REV) mvebu_armada375_smp_wa_init()
H A Dcommon.h24 int mvebu_system_controller_get_soc_id(u32 *dev, u32 *rev);
H A Dboard-v7.c118 u32 dev, rev; i2c_quirk() local
125 if (mvebu_get_soc_id(&dev, &rev) == 0 && rev > MV78XX0_A0_REV) i2c_quirk()
H A Dmvebu-soc-id.c48 int mvebu_get_soc_id(u32 *dev, u32 *rev) mvebu_get_soc_id() argument
52 *rev = soc_rev; mvebu_get_soc_id()
/linux-4.4.14/drivers/mfd/
H A Dsmsc-ece1099.c38 int devid, rev, venid_l, venid_h; smsc_i2c_probe() local
62 regmap_read(smsc->regmap, SMSC_DEV_REV, &rev); smsc_i2c_probe()
66 dev_info(&i2c->dev, "SMSCxxx devid: %02x rev: %02x venid: %02x\n", smsc_i2c_probe()
67 devid, rev, (venid_h << 8) | venid_l); smsc_i2c_probe()
H A Dpm8921-core.c323 u32 rev; pm8921_probe() local
339 pr_err("Failed to read hw rev reg %d:rc=%d\n", REG_HWREV, rc); pm8921_probe()
343 rev = val; pm8921_probe()
348 pr_err("Failed to read hw rev 2 reg %d:rc=%d\n", pm8921_probe()
353 rev |= val << BITS_PER_BYTE; pm8921_probe()
/linux-4.4.14/arch/mips/sgi-ip32/
H A Dcrime.c28 unsigned int id, rev; crime_init() local
36 rev = id & CRIME_ID_REV; crime_init()
38 printk(KERN_INFO "CRIME id %1x rev %d at 0x%0*lx\n", crime_init()
39 id, rev, field, (unsigned long) CRIME_BASE); crime_init()
/linux-4.4.14/arch/arm/mach-zynq/
H A Dheadsmp.S16 ARM_BE8(rev r0, r0)
/linux-4.4.14/drivers/firmware/
H A Dpcdp.h35 #define PCDP_UART_IRQ (1 << 6) /* in pci_func for rev < 3 */
36 #define PCDP_UART_PCI (1 << 7) /* in pci_func for rev < 3 */
101 u8 rev; /* PCDP v2.0 is rev 3 */ member in struct:pcdp
H A Dpcdp.c99 printk(KERN_INFO "PCDP: v%d at 0x%lx\n", pcdp->rev, efi.hcdp); efi_setup_pcdp_console()
102 if (pcdp->rev < 3) efi_setup_pcdp_console()
109 if (pcdp->rev < 3 && efi_uart_console_only()) efi_setup_pcdp_console()
/linux-4.4.14/drivers/mmc/core/
H A Dquirks.c57 u64 rev = cid_rev_card(card); mmc_fixup_device() local
75 rev >= f->rev_start && rev <= f->rev_end) { mmc_fixup_device()
/linux-4.4.14/drivers/net/wireless/brcm80211/include/
H A Dchipcommon.h41 u32 chipcontrol; /* 0x28, rev >= 11 */
42 u32 chipstatus; /* 0x2c, rev >= 11 */
45 u32 jtagcmd; /* 0x30, rev >= 10 */
210 u32 gpiosel; /* 0x638, rev >= 1 */
211 u32 gpioenable; /* 0x63c, rev >= 1 */
263 #define CC_CAP_PMU 0x10000000 /* PMU Present, rev >= 20 */
264 #define CC_CAP_SROM 0x40000000 /* Srom Present, rev >= 32 */
265 /* Nand flash present, rev >= 35 */
268 #define CC_CAP2_SECI 0x00000001 /* SECI Present, rev >= 36 */
269 /* GSIO (spi/i2c) present, rev >= 37 */
290 /* pmucapabilites_ext PMU rev >= 15 */
292 /* retention_ctl PMU rev >= 15 */
/linux-4.4.14/include/linux/bcma/
H A Dbcma_driver_pci.h46 #define BCMA_CORE_PCI_GPIO_IN 0x0060 /* rev >= 2 only */
47 #define BCMA_CORE_PCI_GPIO_OUT 0x0064 /* rev >= 2 only */
48 #define BCMA_CORE_PCI_GPIO_ENABLE 0x0068 /* rev >= 2 only */
49 #define BCMA_CORE_PCI_GPIO_CTL 0x006C /* rev >= 2 only */
66 #define BCMA_CORE_PCI_MDIODATA_REGADDR_SHF_OLD 18 /* Regaddr shift (rev < 10) */
67 #define BCMA_CORE_PCI_MDIODATA_REGADDR_MASK_OLD 0x003c0000 /* Regaddr Mask (rev < 10) */
68 #define BCMA_CORE_PCI_MDIODATA_DEVADDR_SHF_OLD 22 /* Physmedia devaddr shift (rev < 10) */
69 #define BCMA_CORE_PCI_MDIODATA_DEVADDR_MASK_OLD 0x0fc00000 /* Physmedia devaddr Mask (rev < 10) */
84 #define BCMA_CORE_PCI_CLKREQENCTRL 0x0138 /* >= rev 6, Clkreq rdma control */
85 #define BCMA_CORE_PCI_PCICFG0 0x0400 /* PCI config space 0 (rev >= 8) */
86 #define BCMA_CORE_PCI_PCICFG1 0x0500 /* PCI config space 1 (rev >= 8) */
87 #define BCMA_CORE_PCI_PCICFG2 0x0600 /* PCI config space 2 (rev >= 8) */
88 #define BCMA_CORE_PCI_PCICFG3 0x0700 /* PCI config space 3 (rev >= 8) */
95 #define BCMA_CORE_PCI_SPROM_CLKREQ_OFFSET_REV5 20 /* word 20 for srom rev <= 5 */
106 #define BCMA_CORE_PCI_SBTOPCI_RC 0x00000030 /* Read Command mask (rev >= 11) */
H A Dbcma_driver_chipcommon.h48 #define BCMA_CC_CAP_PMU 0x10000000 /* PMU available (rev >= 20) */
49 #define BCMA_CC_CAP_ECI 0x20000000 /* ECI available (rev >= 20) */
51 #define BCMA_CC_CAP_NFLASH 0x80000000 /* NAND flash present (rev >= 35 or BCM4706?) */
55 #define BCMA_CC_CORECTL_UARTCLKEN 0x00000008 /* UART clock enable (rev >= 21) */
106 #define BCMA_CC_CHIPST_5357_NAND_BOOT BIT(4) /* NAND boot, valid for CC rev 38 and/or BCM5357 */
140 #define BCMA_CC_FLASHCTL_CS_ACTIVE 0x00001000 /* Chip Select Active, rev >= 20 */
298 #define BCMA_CC_HW_WORKAROUND 0x01E4 /* Hardware workaround (rev >= 20) */
315 /* PMU registers (rev >= 20) */
445 /* PMU rev 15 */
467 /* PMU rev 5 (& 6) */
569 u8 rev; /* PMU revision */ member in struct:bcma_chipcommon_pmu
/linux-4.4.14/arch/powerpc/platforms/85xx/
H A Dsbc8548.c67 unsigned int *rev; sbc8548_hw_rev() local
70 np = of_find_compatible_node(NULL, NULL, "hw-rev"); sbc8548_hw_rev()
79 rev = ioremap(res.start,sizeof(unsigned int)); sbc8548_hw_rev()
80 board_rev = (*rev) >> 28; sbc8548_hw_rev()
81 iounmap(rev); sbc8548_hw_rev()
H A Dksi8560.c157 seq_printf(m, "Hardware rev\t: %d\n", ksi8560_show_cpuinfo()
159 seq_printf(m, "CPLD rev\t: %d\n", ksi8560_show_cpuinfo()
/linux-4.4.14/drivers/isdn/hardware/avm/
H A Db1isa.c203 char rev[32]; b1isa_init() local
207 strlcpy(rev, p + 2, 32); b1isa_init()
208 if ((p = strchr(rev, '$')) != NULL && p > rev) b1isa_init()
211 strcpy(rev, "1.0"); b1isa_init()
224 strlcpy(capi_driver_b1isa.revision, rev, 32); b1isa_init()
226 printk(KERN_INFO "b1isa: revision %s\n", rev); b1isa_init()
H A Db1pcmcia.c202 char rev[32]; b1pcmcia_init() local
205 strlcpy(rev, p + 2, 32); b1pcmcia_init()
206 if ((p = strchr(rev, '$')) != NULL && p > rev) b1pcmcia_init()
209 strcpy(rev, "1.0"); b1pcmcia_init()
211 strlcpy(capi_driver_b1pcmcia.revision, rev, 32); b1pcmcia_init()
213 printk(KERN_INFO "b1pci: revision %s\n", rev); b1pcmcia_init()
H A Dt1pci.c233 char rev[32]; t1pci_init() local
237 strlcpy(rev, p + 2, 32); t1pci_init()
238 if ((p = strchr(rev, '$')) != NULL && p > rev) t1pci_init()
241 strcpy(rev, "1.0"); t1pci_init()
245 strlcpy(capi_driver_t1pci.revision, rev, 32); t1pci_init()
247 printk(KERN_INFO "t1pci: revision %s\n", rev); t1pci_init()
H A Db1pci.c382 char rev[32]; b1pci_init() local
386 strlcpy(rev, p + 2, 32); b1pci_init()
387 if ((p = strchr(rev, '$')) != NULL && p > rev) b1pci_init()
390 strcpy(rev, "1.0"); b1pci_init()
395 strlcpy(capi_driver_b1pci.revision, rev, 32); b1pci_init()
398 strlcpy(capi_driver_b1pciv4.revision, rev, 32); b1pci_init()
401 printk(KERN_INFO "b1pci: revision %s\n", rev); b1pci_init()
H A Dt1isa.c551 char rev[32]; t1isa_init() local
556 strlcpy(rev, p + 2, 32); t1isa_init()
557 if ((p = strchr(rev, '$')) != NULL && p > rev) t1isa_init()
560 strcpy(rev, "1.0"); t1isa_init()
573 strlcpy(capi_driver_t1isa.revision, rev, 32); t1isa_init()
575 printk(KERN_INFO "t1isa: revision %s\n", rev); t1isa_init()
/linux-4.4.14/arch/x86/kernel/cpu/microcode/
H A Damd.c152 u32 rev, eax, ebx, ecx, edx; apply_ucode_in_initrd() local
231 if (check_current_patch_level(&rev, true)) apply_ucode_in_initrd()
244 if (eq_id == mc->hdr.processor_rev_id && rev < mc->hdr.patch_id) { apply_ucode_in_initrd()
247 rev = mc->hdr.patch_id; apply_ucode_in_initrd()
248 *new_rev = rev; apply_ucode_in_initrd()
355 u32 rev, eax; load_ucode_amd_ap() local
368 if (check_current_patch_level(&rev, false)) load_ucode_amd_ap()
381 if (mc && rev < mc->hdr.patch_id) { load_ucode_amd_ap()
458 u32 rev; reload_ucode_amd() local
464 if (check_current_patch_level(&rev, false)) reload_ucode_amd()
469 if (mc && rev < mc->hdr.patch_id) { reload_ucode_amd()
559 csig->rev = c->microcode; collect_cpu_info_amd()
566 if (p && (p->patch_id == csig->rev)) collect_cpu_info_amd()
569 pr_info("CPU%d: patch_level=0x%08x\n", cpu, csig->rev); collect_cpu_info_amd()
620 * @rev: Use it to return the patch level. It is set to 0 in the case of
627 bool check_current_patch_level(u32 *rev, bool early) check_current_patch_level() argument
648 if (rev) check_current_patch_level()
649 *rev = lvl; check_current_patch_level()
656 u32 rev, dummy; __apply_microcode_amd() local
661 native_rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy); __apply_microcode_amd()
662 if (rev != mc_amd->hdr.patch_id) __apply_microcode_amd()
674 u32 rev; apply_microcode_amd() local
687 if (check_current_patch_level(&rev, false)) apply_microcode_amd()
691 if (rev >= mc_amd->hdr.patch_id) { apply_microcode_amd()
692 c->microcode = rev; apply_microcode_amd()
693 uci->cpu_sig.rev = rev; apply_microcode_amd()
705 uci->cpu_sig.rev = mc_amd->hdr.patch_id; apply_microcode_amd()
H A Dintel.c56 new_rev = uci->cpu_sig.rev; load_microcode_early()
69 new_rev = mc_hdr->rev; load_microcode_early()
264 if (mc_hdr->rev <= mc_saved_hdr->rev) _save_mc()
359 csig.rev = 0; collect_cpu_info_early()
384 csig.rev = val[1]; collect_cpu_info_early()
396 unsigned int sig, pf, rev, total_size, data_size, date; show_saved_mc() local
409 rev = uci.cpu_sig.rev; show_saved_mc()
410 pr_debug("CPU: sig=0x%x, pf=0x%x, rev=0x%x\n", sig, pf, rev); show_saved_mc()
422 rev = mc_saved_header->rev; show_saved_mc()
427 pr_debug("mc_saved[%d]: sig=0x%x, pf=0x%x, rev=0x%x, toal size=0x%x, date = %04x-%02x-%02x\n", show_saved_mc()
428 i, sig, pf, rev, total_size, show_saved_mc()
582 uci->cpu_sig.rev, print_ucode_info()
671 if (val[1] != mc_intel->hdr.rev) apply_microcode_early()
678 uci->cpu_sig.rev = val[1]; apply_microcode_early()
823 csig->rev = c->microcode; collect_cpu_info()
825 cpu_num, csig->sig, csig->pf, csig->rev); collect_cpu_info()
843 crev = cpu_sig.rev; get_matching_mc()
885 if (val[1] != mc_intel->hdr.rev) { apply_microcode_intel()
887 cpu_num, mc_intel->hdr.rev); apply_microcode_intel()
896 uci->cpu_sig.rev = val[1]; apply_microcode_intel()
907 int new_rev = uci->cpu_sig.rev; generic_load_microcode()
949 new_rev = mc_header.rev; generic_load_microcode()
982 cpu, new_rev, uci->cpu_sig.rev); generic_load_microcode()
/linux-4.4.14/drivers/i2c/busses/
H A Di2c-omap.c211 u32 rev; member in struct:omap_i2c_dev
297 if (omap->rev >= OMAP_I2C_REV_ON_3430_3530) __omap_i2c_init()
322 if (omap->rev >= OMAP_I2C_OMAP1_REV_2) { omap_i2c_reset()
348 if (omap->rev > OMAP_I2C_REV_ON_3430_3530) { omap_i2c_reset()
365 if (omap->rev >= OMAP_I2C_REV_ON_3430_3530) { omap_i2c_init()
466 if (omap->rev <= OMAP_I2C_REV_ON_3430_3530) { omap_i2c_init()
608 if (omap->rev < OMAP_I2C_REV_ON_3630) omap_i2c_resize_fifo()
1157 .rev = OMAP_I2C_IP_VERSION_1,
1165 .rev = OMAP_I2C_IP_VERSION_1,
1171 .rev = OMAP_I2C_IP_VERSION_1,
1176 .rev = OMAP_I2C_IP_VERSION_2,
1201 #define OMAP_I2C_SCHEME(rev) ((rev & 0xc000) >> 14)
1203 #define OMAP_I2C_REV_SCHEME_0_MAJOR(rev) (rev >> 4)
1204 #define OMAP_I2C_REV_SCHEME_0_MINOR(rev) (rev & 0xf)
1206 #define OMAP_I2C_REV_SCHEME_1_MAJOR(rev) ((rev & 0x0700) >> 7)
1207 #define OMAP_I2C_REV_SCHEME_1_MINOR(rev) (rev & 0x1f)
1296 u32 rev; omap_i2c_probe() local
1354 rev = readw_relaxed(omap->base + 0x04); omap_i2c_probe()
1356 omap->scheme = OMAP_I2C_SCHEME(rev); omap_i2c_probe()
1360 omap->rev = omap_i2c_read_reg(omap, OMAP_I2C_REV_REG); omap_i2c_probe()
1361 minor = OMAP_I2C_REV_SCHEME_0_MAJOR(omap->rev); omap_i2c_probe()
1362 major = OMAP_I2C_REV_SCHEME_0_MAJOR(omap->rev); omap_i2c_probe()
1368 rev = (rev << 16) | omap_i2c_probe()
1370 minor = OMAP_I2C_REV_SCHEME_1_MINOR(rev); omap_i2c_probe()
1371 major = OMAP_I2C_REV_SCHEME_1_MAJOR(rev); omap_i2c_probe()
1372 omap->rev = rev; omap_i2c_probe()
1377 if (omap->rev >= OMAP_I2C_REV_ON_2430 && omap_i2c_probe()
1378 omap->rev < OMAP_I2C_REV_ON_4430_PLUS) omap_i2c_probe()
1381 if (omap->rev <= OMAP_I2C_REV_ON_3430_3530) omap_i2c_probe()
1399 if (omap->rev < OMAP_I2C_REV_ON_3630) omap_i2c_probe()
1411 if (omap->rev < OMAP_I2C_OMAP1_REV_2) omap_i2c_probe()
1443 dev_info(omap->dev, "bus %d rev%d.%d at %d kHz\n", adap->nr, omap_i2c_probe()
1489 if (omap->rev < OMAP_I2C_OMAP1_REV_2) { omap_i2c_runtime_suspend()
H A Di2c-via.c97 u8 rev; vt586b_probe() local
105 pci_read_config_byte(dev, PM_CFG_REVID, &rev); vt586b_probe()
107 switch (rev) { vt586b_probe()
/linux-4.4.14/arch/m68k/mvme16x/
H A Dconfig.c103 unsigned char rev = *(unsigned char *)MVME162_VERSION_REG; mvme16x_get_hardware_list() local
106 rev & MVME16x_CONFIG_NO_VMECHIP2 ? "NOT " : ""); mvme16x_get_hardware_list()
108 rev & MVME16x_CONFIG_NO_SCSICHIP ? "NOT " : ""); mvme16x_get_hardware_list()
110 rev & MVME16x_CONFIG_NO_ETHERNET ? "NOT " : ""); mvme16x_get_hardware_list()
302 printk ("\nBRD_ID: %s BUG %x.%x %02x/%02x/%02x\n", id, p->rev>>4, config_mvme16x()
303 p->rev&0xf, p->yr, p->mth, p->day); config_mvme16x()
306 unsigned char rev = *(unsigned char *)MVME162_VERSION_REG; config_mvme16x() local
308 mvme16x_config = rev | MVME16x_CONFIG_GOT_SCCA; config_mvme16x()
312 rev & MVME16x_CONFIG_GOT_FPU ? "" : "LC"); config_mvme16x()
314 rev & MVME16x_CONFIG_SPEED_32 ? 32 : 25); config_mvme16x()
316 rev & MVME16x_CONFIG_NO_VMECHIP2 ? "NOT " : ""); config_mvme16x()
318 rev & MVME16x_CONFIG_NO_SCSICHIP ? "NOT " : ""); config_mvme16x()
320 rev & MVME16x_CONFIG_NO_ETHERNET ? "NOT " : ""); config_mvme16x()
/linux-4.4.14/sound/isa/gus/
H A Dgus_main.c362 unsigned char val, rev; snd_gus_check_version() local
369 rev = inb(GUSP(gus, BOARDVERSION)); snd_gus_check_version()
371 snd_printdd("GF1 [0x%lx] init - val = 0x%x, rev = 0x%x\n", gus->gf1.port, val, rev); snd_gus_check_version()
374 if ((val != 255 && (val & 0x06)) || (rev >= 5 && rev != 255)) { snd_gus_check_version()
375 if (rev >= 5 && rev <= 9) { snd_gus_check_version()
377 if (rev == 5) snd_gus_check_version()
380 card->longname[29] = rev == 5 ? '5' : '7'; snd_gus_check_version()
382 if (rev >= 10 && rev != 255) { snd_gus_check_version()
383 if (rev >= 10 && rev <= 11) { snd_gus_check_version()
387 } else if (rev == 0x30) { snd_gus_check_version()
391 } else if (rev == 0x50) { snd_gus_check_version()
396 snd_printk(KERN_ERR "unknown GF1 revision number at 0x%lx - 0x%x (0x%x)\n", gus->gf1.port, rev, val); snd_gus_check_version()
/linux-4.4.14/drivers/gpu/drm/tilcdc/
H A Dtilcdc_drv.c236 priv->rev = 1; tilcdc_load()
240 priv->rev = 2; tilcdc_load()
246 priv->rev = 1; tilcdc_load()
382 if (priv->rev == 1) tilcdc_irq_postinstall()
395 if (priv->rev == 1) { tilcdc_irq_uninstall()
413 if (priv->rev == 1) { enable_vblank()
442 uint8_t rev; member in struct:__anon4635
446 #define REG(rev, save, reg) { #reg, rev, save, reg }
482 seq_printf(m, "revision: %d\n", priv->rev); tilcdc_regs_show()
485 if (priv->rev >= registers[i].rev) tilcdc_regs_show()
601 if (registers[i].save && (priv->rev >= registers[i].rev)) tilcdc_pm_suspend()
615 if (registers[i].save && (priv->rev >= registers[i].rev)) tilcdc_pm_resume()
H A Dtilcdc_crtc.c122 if (priv->rev == 2) { start()
202 if (priv->rev == 2) { tilcdc_crtc_dpms()
321 if (priv->rev == 2) { tilcdc_crtc_mode_set()
334 if (priv->rev == 2) tilcdc_crtc_mode_set()
349 if (priv->rev == 2) { tilcdc_crtc_mode_set()
366 if (priv->rev == 2) { tilcdc_crtc_mode_set()
459 if (priv->rev == 1) tilcdc_crtc_max_width()
461 else if (priv->rev == 2) tilcdc_crtc_max_width()
602 if (priv->rev == 2) tilcdc_crtc_update_clk()
654 if (priv->rev == 2) { tilcdc_crtc_irq()
/linux-4.4.14/arch/alpha/include/asm/
H A Dgct.h16 u16 rev; member in struct:__gct6_node
/linux-4.4.14/arch/mips/lantiq/
H A Dprom.h17 unsigned int rev; member in struct:ltq_soc_info
H A Dprom.c91 snprintf(soc_info.sys_type, LTQ_SYS_TYPE_LEN - 1, "%s rev %s", prom_init()
/linux-4.4.14/arch/arm/include/asm/
H A Dswab.h32 __asm__ ("rev %0, %1" : "=r" (x) : "r" (x)); __arch_swab32()
/linux-4.4.14/drivers/gpu/drm/amd/amdgpu/
H A Dcik.c1903 .rev = 0,
1910 .rev = 0,
1917 .rev = 0,
1924 .rev = 0,
1931 .rev = 0,
1938 .rev = 0,
1945 .rev = 0,
1952 .rev = 0,
1959 .rev = 0,
1971 .rev = 0,
1978 .rev = 0,
1985 .rev = 0,
1992 .rev = 0,
1999 .rev = 0,
2006 .rev = 0,
2013 .rev = 0,
2020 .rev = 0,
2027 .rev = 0,
2039 .rev = 0,
2046 .rev = 0,
2053 .rev = 0,
2060 .rev = 0,
2067 .rev = 0,
2074 .rev = 0,
2081 .rev = 0,
2088 .rev = 0,
2095 .rev = 0,
2107 .rev = 0,
2114 .rev = 0,
2121 .rev = 0,
2128 .rev = 0,
2135 .rev = 0,
2142 .rev = 0,
2149 .rev = 0,
2156 .rev = 0,
2163 .rev = 0,
2175 .rev = 0,
2182 .rev = 0,
2189 .rev = 0,
2196 .rev = 0,
2203 .rev = 0,
2210 .rev = 0,
2217 .rev = 0,
2224 .rev = 0,
2231 .rev = 0,
H A Dvi.c1080 .rev = 0,
1087 .rev = 0,
1094 .rev = 0,
1101 .rev = 0,
1108 .rev = 0,
1115 .rev = 0,
1127 .rev = 0,
1134 .rev = 0,
1141 .rev = 0,
1148 .rev = 0,
1155 .rev = 0,
1162 .rev = 0,
1169 .rev = 0,
1176 .rev = 0,
1183 .rev = 0,
1195 .rev = 0,
1202 .rev = 0,
1209 .rev = 0,
1216 .rev = 0,
1223 .rev = 0,
1230 .rev = 0,
1237 .rev = 0,
1244 .rev = 0,
1251 .rev = 0,
1263 .rev = 0,
1270 .rev = 0,
1277 .rev = 0,
1284 .rev = 0,
1291 .rev = 0,
1298 .rev = 0,
1305 .rev = 0,
1312 .rev = 0,
1319 .rev = 0,
/linux-4.4.14/arch/mips/lantiq/falcon/
H A Dprom.c59 i->rev = (ltq_r32(FALCON_CHIPID) & REV_MASK) >> REV_SHIFT; ltq_soc_detect()
64 i->rev & 0x7, (i->srev & 0x3) + 1); ltq_soc_detect()
/linux-4.4.14/drivers/usb/phy/
H A Dphy-omap-otg.c100 u32 rev; omap_otg_probe() local
136 rev = readl(otg_dev->base); omap_otg_probe()
139 "OMAP USB OTG controller rev %d.%d (%s, id=%d, vbus=%d)\n", omap_otg_probe()
140 (rev >> 4) & 0xf, rev & 0xf, config->extcon, otg_dev->id, omap_otg_probe()
H A Dphy-ulpi.c64 * ULPI Specification rev.1.1 default ulpi_set_otg_flags()
84 * ULPI Specification rev.1.1 default ulpi_set_fc_flags()
100 * ULPI Specification rev.1.1 default ulpi_set_fc_flags()
113 * ULPI Specification rev.1.1 default ulpi_set_fc_flags()
/linux-4.4.14/drivers/net/wireless/brcm80211/brcmsmac/
H A Dpmu.c43 #define PCTL_PLL_PLLCTL_UPD 0x00000400 /* rev 2 */
44 #define PCTL_NOILP_ON_WAIT 0x00000200 /* rev 1 */
74 * PMU<rev>_PLL<num>_XX where <rev> is PMU corerev and <num> is an arbitrary
75 * number to differentiate different PLLs controlled by the same PMU rev.
/linux-4.4.14/drivers/bluetooth/
H A Dbtbcm.c279 u16 subver, rev; btbcm_initialize() local
296 rev = le16_to_cpu(ver->hci_rev); btbcm_initialize()
308 switch ((rev & 0xf000) >> 12) { btbcm_initialize()
327 (subver & 0x1f00) >> 8, (subver & 0x00ff), rev & 0x0fff); btbcm_initialize()
337 u16 subver, rev; btbcm_finalize() local
351 rev = le16_to_cpu(ver->hci_rev); btbcm_finalize()
357 (subver & 0x00ff), rev & 0x0fff); btbcm_finalize()
388 u16 subver, rev, pid, vid; btbcm_setup_patchram() local
405 rev = le16_to_cpu(ver->hci_rev); btbcm_setup_patchram()
425 switch ((rev & 0xf000) >> 12) { btbcm_setup_patchram()
465 (subver & 0x1f00) >> 8, (subver & 0x00ff), rev & 0x0fff); btbcm_setup_patchram()
488 rev = le16_to_cpu(ver->hci_rev); btbcm_setup_patchram()
494 (subver & 0x1f00) >> 8, (subver & 0x00ff), rev & 0x0fff); btbcm_setup_patchram()
/linux-4.4.14/drivers/scsi/
H A Du14-34f.c56 * + Backport from rev. 7.22 (use io_request_lock).
123 * 11 Apr 1998 rev. 4.05 for linux 2.0.33 and 2.1.95
128 * 10 Apr 1998 rev. 4.04 for linux 2.0.33 and 2.1.95
131 * 9 Apr 1998 rev. 4.03 for linux 2.0.33 and 2.1.94
135 * 4 Apr 1998 rev. 4.02 for linux 2.0.33 and 2.1.92
138 * 17 Mar 1998 rev. 4.01 for linux 2.0.33 and 2.1.88
142 * 12 Sep 1997 rev. 3.11 for linux 2.0.30 and 2.1.55
151 * 17 May 1997 rev. 3.10 for linux 2.0.30 and 2.1.38
156 * 24 Feb 1997 rev. 3.00 for linux 2.0.29 and 2.1.26
165 * 18 Jan 1997 rev. 2.60 for linux 2.1.21 and 2.0.28
171 * 8 Jan 1997 rev. 2.50 for linux 2.1.20 and 2.0.27
174 * 3 Dec 1996 rev. 2.40 for linux 2.1.14 and 2.0.27
177 * 22 Nov 1996 rev. 2.30 for linux 2.1.12 and 2.0.26
183 * 16 Nov 1996 rev. 2.20 for linux 2.1.10 and 2.0.25
186 * 27 Sep 1996 rev. 2.12 for linux 2.1.0
190 * 09 Jul 1996 rev. 2.11 for linux 2.0.4
194 * 16 Apr 1996 rev. 2.10 for linux 1.3.90
197 * 21 Jul 1995 rev. 2.02 for linux 1.3.11
200 * 13 Jun 1995 rev. 2.01 for linux 1.2.10
204 * 11 Mar 1995 rev. 2.00 for linux 1.2.0
208 * 23 Feb 1995 rev. 1.18 for linux 1.1.94
211 * 11 Feb 1995 rev. 1.17 for linux 1.1.91
215 * 9 Feb 1995 rev. 1.16 for linux 1.1.90
218 * 8 Feb 1995 rev. 1.15 for linux 1.1.89
221 * 28 Jan 1995 rev. 1.14 for linux 1.1.86
230 * 16 Jan 1995 rev. 1.13 for linux 1.1.81
234 * 15 Dec 1994 rev. 1.12 for linux 1.1.74
237 * 30 Nov 1994 rev. 1.11 for linux 1.1.68
241 * 14 Nov 1994 rev. 1.10 for linux 1.1.63
243 * 28 Oct 1994 rev. 1.09 for linux 1.1.58 Final BETA release.
244 * 16 Jul 1994 rev. 1.00 for linux 1.1.29 Initial ALPHA release.
278 * firmware 28004-005/38004-004 (BIOS rev. 2.00) and the latest firmware
279 * 28004-006/38004-005 (BIOS rev. 2.01).
334 * For U34F boards the latest bios prom is 38008-002 (BIOS rev. 2.01),
443 .name = "UltraStor 14F/34F rev. 8.10.00 ",
1554 unsigned int rev) { sort()
1562 if (rev) { sort()
1583 unsigned int rev = FALSE, s = TRUE, r = TRUE; reorder() local
1634 if (cursec > ((maxsec + minsec) / 2)) rev = TRUE; reorder()
1636 if (ioseek > ((maxsec - minsec) / 2)) rev = FALSE; reorder()
1638 if (!((rev && r) || (!rev && s))) sort(sl, il, n_ready, rev); reorder()
1646 if ((sl[n] == sl[n - 1]) || (!rev && ((sl[n - 1] + ll[n - 1]) > sl[n])) reorder()
1647 || (rev && ((sl[n] + ll[n]) > sl[n - 1]))) overlap = TRUE; reorder()
1658 if (rev && !r) { revcount++; readysorted += n_ready; } reorder()
1659 if (!rev && !s) { sortcount++; readysorted += n_ready; } reorder()
1667 " cur %ld s:%c r:%c rev:%c in:%c ov:%c xd %d.\n", reorder()
1671 cursec, YESNO(s), YESNO(r), YESNO(rev), YESNO(input_only), reorder()
1553 sort(unsigned long sk[], unsigned int da[], unsigned int n, unsigned int rev) sort() argument
H A Desp_scsi.c156 if (esp->rev == FASHME) esp_send_dma_cmd()
203 if (esp->rev == ESP236) { esp_flush_fifo()
250 if (esp->rev == FAST) esp_reset_esp()
258 if (esp->rev == FAST) { esp_reset_esp()
262 esp->rev = FAS236; esp_reset_esp()
264 esp->rev = FASHME; /* Version is usually '5'. */ esp_reset_esp()
266 esp->rev = FAS100A; esp_reset_esp()
271 if (esp->rev == FAS236) { esp_reset_esp()
280 esp->rev = PCSCSI; esp_reset_esp()
288 switch (esp->rev) { esp_reset_esp()
312 if (esp->rev == FASHME) { esp_reset_esp()
327 if (esp->rev == FASHME) { esp_reset_esp()
494 if (esp->rev > ESP100A) { esp_write_tgt_config3()
521 if (esp->rev == FASHME) { esp_dma_length_limit()
676 if (esp->rev == FASHME) esp_autosense()
782 if (esp->rev == FASHME && esp_need_to_nego_wide(tp)) { esp_maybe_execute_command()
813 if (ent->tag[0] && esp->rev == ESP100) { esp_maybe_execute_command()
850 if (esp->rev == FASHME) esp_maybe_execute_command()
1000 switch (esp->rev) { esp_check_spur_intr()
1147 if (esp->rev == FASHME) { esp_reconnect()
1172 if (esp->rev == ESP100) { esp_reconnect()
1190 if (esp->rev == FASHME) esp_reconnect()
1306 if (esp->rev <= ESP236) { esp_finish_select()
1344 if (esp->rev == FASHME) esp_data_bytes_sent()
1346 if (esp->rev == PCSCSI && (esp->config2 & ESP_CONFIG2_FENAB)) esp_data_bytes_sent()
1390 if (esp->rev == ESP100) { esp_data_bytes_sent()
1435 if (esp->rev >= FAS236) { esp_setsync()
1437 if (esp->rev >= FAS100A) esp_setsync()
1441 if (esp->rev == FASHME) esp_setsync()
1528 if (stp && esp->rev >= FAS236) { esp_msgin_sdtr()
1560 if (esp->rev != FASHME) esp_msgin_wdtr()
1760 if (esp->rev == ESP100) esp_process_event()
1919 if (esp->rev == FASHME) { esp_process_event()
1954 if (esp->rev == FASHME) { esp_process_event()
1962 if (esp->rev != FASHME) esp_process_event()
1969 if (esp->rev == FASHME) { esp_process_event()
1975 if (esp->rev == ESP100) esp_process_event()
1985 if (esp->rev == FASHME) esp_process_event()
1996 if (esp->rev == FASHME) esp_process_event()
2146 if (esp->rev == FASHME) { __esp_interrupt()
2238 esp->rev = ESP100; esp_get_revision()
2254 esp->rev = ESP100A; esp_get_revision()
2264 esp->rev = FAST; esp_get_revision()
2267 esp->rev = ESP236; esp_get_revision()
2417 esp->host->unique_id, esp_chip_names[esp->rev], scsi_esp_register()
H A Deata.c74 * + Backport from rev. 7.22 (use io_request_lock).
166 * 11 Apr 1998 rev. 4.05 for linux 2.0.33 and 2.1.95
171 * 10 Apr 1998 rev. 4.04 for linux 2.0.33 and 2.1.95
174 * 9 Apr 1998 rev. 4.03 for linux 2.0.33 and 2.1.94
179 * 4 Apr 1998 rev. 4.02 for linux 2.0.33 and 2.1.92
182 * 17 Mar 1998 rev. 4.01 for linux 2.0.33 and 2.1.88
186 * 12 Sep 1997 rev. 3.11 for linux 2.0.30 and 2.1.55
195 * 17 May 1997 rev. 3.10 for linux 2.0.30 and 2.1.38
202 * 24 Feb 1997 rev. 3.00 for linux 2.0.29 and 2.1.26
214 * 18 Jan 1997 rev. 2.60 for linux 2.1.21 and 2.0.28
221 * 8 Jan 1997 rev. 2.50 for linux 2.1.20 and 2.0.27
225 * 3 Dec 1996 rev. 2.40 for linux 2.1.14 and 2.0.27
228 * 22 Nov 1996 rev. 2.30 for linux 2.1.12 and 2.0.26
236 * 16 Nov 1996 rev. 2.20 for linux 2.1.10 and 2.0.25
239 * 27 Sep 1996 rev. 2.12 for linux 2.1.0
243 * 09 Jul 1996 rev. 2.11 for linux 2.0.4
246 * 16 Apr 1996 rev. 2.10 for linux 1.3.90
249 * 6 Jul 1995 rev. 2.01 for linux 1.3.7
252 * 11 Mar 1995 rev. 2.00 for linux 1.2.0
256 * 23 Feb 1995 rev. 1.18 for linux 1.1.94
259 * 11 Feb 1995 rev. 1.17 for linux 1.1.91
264 * 9 Feb 1995 rev. 1.16 for linux 1.1.90
268 * 8 Feb 1995 rev. 1.15 for linux 1.1.89
272 * 28 Jan 1995 rev. 1.14 for linux 1.1.86
277 * 24 Jan 1995 rev. 1.13 for linux 1.1.85
281 * 16 Jan 1995 rev. 1.12 for linux 1.1.81
286 * 17 Dec 1994 rev. 1.11 for linux 1.1.74
291 * 15 Dec 1994 rev. 1.10 for linux 1.1.74
297 * 30 Nov 1994 rev. 1.09 for linux 1.1.68
301 * 18 Nov 1994 rev. 1.08 for linux 1.1.64
305 * 14 Nov 1994 rev. 1.07 for linux 1.1.63 Final BETA release.
306 * 04 Aug 1994 rev. 1.00 for linux 1.1.39 First BETA release.
310 * EATA (Enhanced AT Bus Attachment) rev. 2.0A, using DMA protocol.
516 .name = "EATA/DMA 2.0x rev. 8.10.00 ",
829 unsigned char protocol_rev; /* EATA 2.0 rev., 'A' or 'B' or 'C' */
2068 unsigned int rev) sort()
2077 if (rev) { sort()
2104 unsigned int rev = 0, s = 1, r = 1; reorder() local
2166 rev = 1; reorder()
2169 rev = 0; reorder()
2171 if (!((rev && r) || (!rev && s))) reorder()
2172 sort(sl, il, n_ready, rev); reorder()
2186 || (!rev && ((sl[n - 1] + ll[n - 1]) > sl[n])) reorder()
2187 || (rev && ((sl[n] + ll[n]) > sl[n - 1]))) reorder()
2209 if (rev && !r) { reorder()
2213 if (!rev && !s) { reorder()
2226 " cur %ld s:%c r:%c rev:%c in:%c ov:%c xd %d.\n", reorder()
2231 YESNO(r), YESNO(rev), YESNO(input_only), reorder()
2067 sort(unsigned long sk[], unsigned int da[], unsigned int n, unsigned int rev) sort() argument
/linux-4.4.14/drivers/mcb/
H A Dmcb-internal.h54 * @rev: the revision of the variant's implementation
89 * @rev: the revision of the variant's implementation
102 unsigned int rev:6; member in struct:chameleon_bdd
/linux-4.4.14/arch/mips/sgi-ip22/
H A Dip22-eisa.c55 u16 rev; decode_eisa_sig() local
68 rev = (sig[2] << 8) | sig[3]; decode_eisa_sig()
69 sprintf(sig_str + 3, "%04X", rev); decode_eisa_sig()
/linux-4.4.14/drivers/net/wireless/b43legacy/
H A Dradio.c158 if (phy->rev <= 1) { b43legacy_set_all_gains()
194 if (phy->rev <= 1) { b43legacy_set_original_gains()
290 if (!((phy->type == B43legacy_PHYTYPE_G) && (phy->rev > 0))) b43legacy_radio_aci_scan()
416 if (phy->rev >= 6) { b43legacy_calc_nrssi_offset()
522 if (phy->rev >= 6) { b43legacy_calc_nrssi_offset()
542 if (phy->rev >= 6) { b43legacy_calc_nrssi_offset()
579 tmp &= (phy->rev >= 5) ? 0x007F : 0x000F; b43legacy_calc_nrssi_slope()
665 if (phy->rev >= 3) { b43legacy_calc_nrssi_slope()
677 switch (phy->rev) { b43legacy_calc_nrssi_slope()
706 if (phy->rev >= 2) { b43legacy_calc_nrssi_slope()
738 if (phy->rev >= 2) { b43legacy_calc_nrssi_slope()
771 if (phy->rev >= 3) { b43legacy_calc_nrssi_slope()
778 if (phy->rev >= 2) { b43legacy_calc_nrssi_slope()
804 if (phy->rev >= 3) { b43legacy_calc_nrssi_slope()
1001 if (phy->rev != 1) { b43legacy_radio_interference_mitigation_enable()
1074 if (phy->rev < 2) b43legacy_radio_interference_mitigation_enable()
1093 if (phy->rev == 2) { b43legacy_radio_interference_mitigation_enable()
1096 } else if (phy->rev >= 3) { b43legacy_radio_interference_mitigation_enable()
1127 if (phy->rev < 2) b43legacy_radio_interference_mitigation_enable()
1129 else if (phy->rev == 2) { b43legacy_radio_interference_mitigation_enable()
1177 if (phy->rev >= 3) { b43legacy_radio_interference_mitigation_enable()
1206 if (phy->rev >= 2) b43legacy_radio_interference_mitigation_enable()
1213 if (phy->rev == 2) { b43legacy_radio_interference_mitigation_enable()
1220 } else if (phy->rev >= 6) { b43legacy_radio_interference_mitigation_enable()
1244 if (phy->rev != 1) { b43legacy_radio_interference_mitigation_disable()
1294 if (phy->rev >= 2) { b43legacy_radio_interference_mitigation_disable()
1302 if (phy->rev == 2) { b43legacy_radio_interference_mitigation_disable()
1305 } else if (phy->rev >= 3) { b43legacy_radio_interference_mitigation_disable()
1346 (phy->rev == 0) || (!phy->gmode)) b43legacy_radio_set_interference_mitigation()
1410 if (phy->rev < 7 || !(dev->dev->bus->sprom.boardflags_lo b43legacy_get_812_value()
1463 if (phy->rev >= 7 && dev->dev->bus->sprom.boardflags_lo b43legacy_get_812_value()
1539 if (phy->rev > 1) { /* loopback gain enabled */ b43legacy_radio_init2050()
1542 if (phy->rev >= 3) b43legacy_radio_init2050()
1553 if (phy->rev < 7 || b43legacy_radio_init2050()
1717 if (phy->rev > 1) { b43legacy_radio_init2050()
H A Dphy.c148 if (phy->type == B43legacy_PHYTYPE_G && phy->rev == 1) { b43legacy_phy_calibrate()
189 phy->rev >= 2 && b43legacy_phy_init_pctl()
223 if (phy->rev == 1) b43legacy_phy_agcsetup()
231 if (phy->rev == 1) { b43legacy_phy_agcsetup()
261 if (phy->rev == 1) b43legacy_phy_agcsetup()
285 if (phy->rev == 1) { b43legacy_phy_agcsetup()
299 if (phy->rev > 2) { b43legacy_phy_agcsetup()
310 if (phy->rev == 1) { b43legacy_phy_agcsetup()
326 if (phy->rev >= 6) { b43legacy_phy_agcsetup()
340 if (phy->rev == 1) { b43legacy_phy_setupg()
361 if (phy->rev == 2) { b43legacy_phy_setupg()
364 } else if (phy->rev > 2) { b43legacy_phy_setupg()
379 if (phy->rev <= 2) b43legacy_phy_setupg()
383 else if ((phy->rev >= 7) && (b43legacy_phy_read(dev, 0x0449) & 0x0200)) b43legacy_phy_setupg()
392 if (phy->rev == 2) b43legacy_phy_setupg()
396 else if ((phy->rev > 2) && (phy->rev <= 8)) b43legacy_phy_setupg()
401 if (phy->rev == 1) { b43legacy_phy_setupg()
825 if (phy->rev != 1) { b43legacy_calc_loopback_gain()
856 if (phy->rev != 1) { b43legacy_calc_loopback_gain()
885 if (phy->rev != 1) { b43legacy_calc_loopback_gain()
908 if (phy->rev >= 3) b43legacy_calc_loopback_gain()
925 if (phy->rev >= 7) { b43legacy_calc_loopback_gain()
977 if (phy->rev != 1) { b43legacy_calc_loopback_gain()
1013 if (phy->rev == 1) b43legacy_phy_initg()
1017 if (phy->rev >= 2 && phy->gmode) b43legacy_phy_initg()
1020 if (phy->rev >= 2) { b43legacy_phy_initg()
1024 if (phy->rev == 2) { b43legacy_phy_initg()
1028 if (phy->rev > 5) { b43legacy_phy_initg()
1046 if (phy->rev >= 2) b43legacy_phy_initg()
1055 if (phy->rev >= 2 && phy->gmode) b43legacy_phy_initg()
1075 if (phy->rev >= 6) b43legacy_phy_initg()
1084 if (phy->rev < 2) b43legacy_phy_initg()
1103 } else if (phy->gmode || phy->rev >= 2) { b43legacy_phy_initg()
2065 switch (phy->rev) { b43legacy_phy_init()
2147 if (phy->rev >= 2) { b43legacy_phy_set_antenna_diversity()
2155 if (phy->rev == 2) b43legacy_phy_set_antenna_diversity()
2162 } else if (phy->rev >= 6) b43legacy_phy_set_antenna_diversity()
2165 if (phy->rev < 3) b43legacy_phy_set_antenna_diversity()
2174 if (phy->rev == 3) { b43legacy_phy_set_antenna_diversity()
H A Db43legacy.h54 #define B43legacy_MMIO_REV3PLUS_TSF_LOW 0x180 /* core rev >= 3 only */
55 #define B43legacy_MMIO_REV3PLUS_TSF_HIGH 0x184 /* core rev >= 3 only */
96 #define B43legacy_MMIO_TSF_0 0x632 /* core rev < 3 only */
97 #define B43legacy_MMIO_TSF_1 0x634 /* core rev < 3 only */
98 #define B43legacy_MMIO_TSF_2 0x636 /* core rev < 3 only */
99 #define B43legacy_MMIO_TSF_3 0x638 /* core rev < 3 only */
226 #define B43legacy_TMSHIGH_GPHY 0x00010000 /* G-PHY avail (rev >= 5) */
409 u8 rev; member in struct:b43legacy_phy
530 struct b43legacy_dmaring *rx_ring3; /* only on core.rev < 5 */
651 u16 rev; member in struct:b43legacy_firmware
/linux-4.4.14/net/netfilter/
H A Dnft_compat.c492 int rev, int target) nfnl_compat_fill_info()
509 nla_put_be32(skb, NFTA_COMPAT_REV, htonl(rev)) || nfnl_compat_fill_info()
530 u32 rev; nfnl_compat_get() local
539 rev = ntohl(nla_get_be32(tb[NFTA_COMPAT_REV])); nfnl_compat_get()
564 rev, target, &ret), nfnl_compat_get()
623 const char *name, u32 rev, u32 family) nft_match_cmp()
625 return strcmp(match->name, name) == 0 && match->revision == rev && nft_match_cmp()
636 u32 rev, family; nft_match_select_ops() local
644 rev = ntohl(nla_get_be32(tb[NFTA_MATCH_REV])); nft_match_select_ops()
651 if (nft_match_cmp(match, mt_name, rev, family)) { nft_match_select_ops()
659 match = xt_request_find_match(family, mt_name, rev); nft_match_select_ops()
703 const char *name, u32 rev, u32 family) nft_target_cmp()
705 return strcmp(tg->name, name) == 0 && tg->revision == rev && nft_target_cmp()
716 u32 rev, family; nft_target_select_ops() local
724 rev = ntohl(nla_get_be32(tb[NFTA_TARGET_REV])); nft_target_select_ops()
731 if (nft_target_cmp(target, tg_name, rev, family)) { nft_target_select_ops()
739 target = xt_request_find_target(family, tg_name, rev); nft_target_select_ops()
490 nfnl_compat_fill_info(struct sk_buff *skb, u32 portid, u32 seq, u32 type, int event, u16 family, const char *name, int rev, int target) nfnl_compat_fill_info() argument
622 nft_match_cmp(const struct xt_match *match, const char *name, u32 rev, u32 family) nft_match_cmp() argument
702 nft_target_cmp(const struct xt_target *tg, const char *name, u32 rev, u32 family) nft_target_cmp() argument
/linux-4.4.14/drivers/usb/host/
H A Dpci-quirks.c97 u8 rev; member in struct:amd_chipset_type
122 u8 rev = 0; amd_chipset_sb_type_init() local
128 rev = pinfo->smbus_dev->revision; amd_chipset_sb_type_init()
129 if (rev >= 0x10 && rev <= 0x1f) amd_chipset_sb_type_init()
131 else if (rev >= 0x30 && rev <= 0x3f) amd_chipset_sb_type_init()
133 else if (rev >= 0x40 && rev <= 0x4f) amd_chipset_sb_type_init()
144 rev = pinfo->smbus_dev->revision; amd_chipset_sb_type_init()
145 if (rev >= 0x11 && rev <= 0x14) amd_chipset_sb_type_init()
147 else if (rev >= 0x15 && rev <= 0x18) amd_chipset_sb_type_init()
149 else if (rev >= 0x39 && rev <= 0x3a) amd_chipset_sb_type_init()
153 pinfo->sb_type.rev = rev; amd_chipset_sb_type_init()
197 info.sb_type.rev > 0x3b)) { usb_amd_find_chipset_info()
264 u8 rev; usb_amd_hang_symptom_quirk() local
267 rev = amd_chipset.sb_type.rev; usb_amd_hang_symptom_quirk()
271 rev >= 0x3a && rev <= 0x3b); usb_amd_hang_symptom_quirk()
329 amd_chipset.sb_type.rev <= 0x3b) { usb_amd_quirk_pll()
/linux-4.4.14/drivers/media/pci/cx23885/
H A Dnetup-eeprom.h30 u8 rev;/* card revision */ member in struct:netup_card_info
H A Dnetup-eeprom.c96 cinfo->rev = netup_eeprom_read(i2c_adap, 63); netup_get_card_info()
/linux-4.4.14/arch/alpha/boot/
H A Dmain.c64 unsigned long i, rev; pal_init() local
97 rev = percpu->pal_revision = percpu->palcode_avail[2]; pal_init()
99 srm_printk("Ok (rev %lx)\n", rev); pal_init()
H A Dbootp.c70 unsigned long i, rev; pal_init() local
103 rev = percpu->pal_revision = percpu->palcode_avail[2]; pal_init()
105 srm_printk("Ok (rev %lx)\n", rev); pal_init()
/linux-4.4.14/arch/powerpc/platforms/ps3/
H A Dsetup.c58 int ps3_compare_firmware_version(u16 major, u16 minor, u16 rev) ps3_compare_firmware_version() argument
65 x.rev = rev; ps3_compare_firmware_version()
203 ps3_firmware_version.rev); ps3_setup_arch()
/linux-4.4.14/arch/mips/fw/arc/
H A Dinit.c44 pb->ver, pb->rev); prom_init()
H A Dtree.c96 printk("[%p]:class<%s>type<%s>flags<%s>ver<%d>rev<%d>", dump_component()
98 iflags[p->iflags], p->vers, p->rev); dump_component()
/linux-4.4.14/include/linux/
H A Di2c-omap.h33 u32 rev; member in struct:omap_i2c_bus_platform_data
H A Dmcb.h52 * @rev: revision in Chameleon table
68 int rev; member in struct:mcb_device
/linux-4.4.14/include/drm/
H A Ddrm_displayid.h55 u8 rev; member in struct:displayid_hdr
63 u8 rev; member in struct:displayid_block
/linux-4.4.14/arch/mips/include/asm/fw/arc/
H A Dhinv.h116 #define SGI_ARCS_REV 0 /* rev .00 */
119 #define SGI_ARCS_REV 10 /* rev .10, 3/04/92 */
/linux-4.4.14/arch/mips/lantiq/xway/
H A Dprom.c46 i->rev = (ltq_r32(LTQ_MPS_CHIPID) & REV_MASK) >> REV_SHIFT; ltq_soc_detect()
47 sprintf(i->rev_type, "1.%d", i->rev); ltq_soc_detect()
/linux-4.4.14/sound/soc/codecs/
H A Dwmfw.h32 __le16 rev; member in struct:wmfw_header
130 __be32 rev; member in union:wmfw_coeff_hdr::__anon15536
H A Dwm1250-ev1.c202 int id, board, rev, ret; wm1250_ev1_probe() local
213 rev = board & 0x3; wm1250_ev1_probe()
220 dev_info(&i2c->dev, "revision %d\n", rev + 1); wm1250_ev1_probe()
/linux-4.4.14/include/linux/i2c/
H A Ddm355evm_msp.h9 * and tweaked to match source and rev D2 schematics by removing CPLD
10 * and NOR flash hooks (which were last appropriate in rev B boards).
/linux-4.4.14/drivers/input/gameport/
H A Dlightning.c258 int i, rev, result; l4_add_card() local
281 rev = inb(L4_PORT); l4_add_card()
283 if (!rev) l4_add_card()
291 card_no ? "secondary" : "primary", rev >> 4, rev, L4_PORT); l4_add_card()
296 if (rev > 0x28) /* on 2.9+ the setcal command works correctly */ l4_add_card()
/linux-4.4.14/arch/arm/mach-mxs/
H A Dmach-mxs.c387 u32 rev = chipid & HW_DIGCTL_REV_MASK; mxs_get_cpu_rev() local
391 switch (rev) { mxs_get_cpu_rev()
406 switch (rev) { mxs_get_cpu_rev()
421 u32 rev = mxs_get_cpu_rev(); mxs_get_revision() local
423 if (rev != MXS_CHIP_REV_UNKNOWN) mxs_get_revision()
424 return kasprintf(GFP_KERNEL, "%d.%d", (rev >> 4) & 0xf, mxs_get_revision()
425 rev & 0xf); mxs_get_revision()
/linux-4.4.14/drivers/net/wireless/ti/wl1251/
H A Dacx.c136 struct acx_revision *rev; wl1251_acx_fw_version() local
139 wl1251_debug(DEBUG_ACX, "acx fw rev"); wl1251_acx_fw_version()
141 rev = kzalloc(sizeof(*rev), GFP_KERNEL); wl1251_acx_fw_version()
142 if (!rev) wl1251_acx_fw_version()
145 ret = wl1251_cmd_interrogate(wl, ACX_FW_REV, rev, sizeof(*rev)); wl1251_acx_fw_version()
152 strncpy(buf, rev->fw_version, min(len, sizeof(rev->fw_version))); wl1251_acx_fw_version()
156 * sizeof(rev->fw_version) long or fw_len is less than wl1251_acx_fw_version()
157 * sizeof(rev->fw_version) it won't be null terminated wl1251_acx_fw_version()
159 buf[min(len, sizeof(rev->fw_version)) - 1] = '\0'; wl1251_acx_fw_version()
162 kfree(rev); wl1251_acx_fw_version()
/linux-4.4.14/drivers/ide/
H A Dalim15x3.c538 u8 rev = dev->revision, idx = id->driver_data; alim15x3_init_one() local
540 /* don't use LBA48 DMA on ALi devices before rev 0xC5 */ alim15x3_init_one()
541 if (rev <= 0xC4) alim15x3_init_one()
544 if (rev >= 0x20) { alim15x3_init_one()
545 if (rev == 0x20) alim15x3_init_one()
548 if (rev < 0xC2) alim15x3_init_one()
550 else if (rev == 0xC2 || rev == 0xC3) alim15x3_init_one()
552 else if (rev == 0xC4) alim15x3_init_one()
/linux-4.4.14/drivers/ata/
H A Dpata_hpt3x2n.c493 u8 rev = dev->revision; hpt3x2n_init_one() local
508 /* 372N if rev >= 6 */ hpt3x2n_init_one()
509 if (rev < 6) hpt3x2n_init_one()
513 /* 371N if rev >= 2 */ hpt3x2n_init_one()
514 if (rev < 2) hpt3x2n_init_one()
518 /* 372N if rev >= 2 */ hpt3x2n_init_one()
519 if (rev < 2) hpt3x2n_init_one()
523 /* 302N if rev >= 2 */ hpt3x2n_init_one()
524 if (rev < 2) hpt3x2n_init_one()
/linux-4.4.14/drivers/gpu/drm/msm/mdp/mdp4/
H A Dmdp4_kms.c51 mdp4_kms->rev = minor; mdp4_hw_init()
54 if ((mdp4_kms->rev == 2) || (mdp4_kms->rev == 4)) { mdp4_hw_init()
66 if (mdp4_kms->rev == 2) { mdp4_hw_init()
77 if (mdp4_kms->rev > 1) { mdp4_hw_init()
89 if ((mdp4_kms->rev >= 1) || (clk >= 90000000)) { mdp4_hw_init()
107 if (mdp4_kms->rev >= 2) mdp4_hw_init()
119 if (mdp4_kms->rev > 1) mdp4_hw_init()
470 // XXX if (rev >= MDP_REV_42) { ??? mdp4_kms_init()
/linux-4.4.14/arch/arm64/crypto/
H A Daes-modes.S272 rev x5, x5
285 rev x5, x5
295 rev x7, x5
298 rev x7, x5
330 rev x7, x5
335 rev x7, x5
353 rev x7, x5
357 rev x7, x7 /* ... to handle the carry */
359 rev x7, x7
/linux-4.4.14/drivers/input/misc/
H A Dcma3000_d0x.c290 int rev; cma3000_init() local
355 rev = CMA3000_READ(data, CMA3000_REVID, "Revid"); cma3000_init()
356 if (rev < 0) { cma3000_init()
357 error = rev; cma3000_init()
361 pr_info("CMA3000 Accelerometer: Revision %x\n", rev); cma3000_init()
/linux-4.4.14/drivers/memory/
H A Dpl172.c201 static const char *rev = "?"; pl172_probe() local
207 rev = pl172_revisions[amba_rev(adev)]; pl172_probe()
210 rev = pl175_revisions[amba_rev(adev)]; pl172_probe()
213 rev = pl176_revisions[amba_rev(adev)]; pl172_probe()
216 dev_info(dev, "ARM PL%x revision %s\n", amba_part(adev), rev); pl172_probe()
/linux-4.4.14/arch/m68k/include/asm/
H A Ddvma.h106 #define DMA_HASCOUNT(rev) ((rev)==dvmaesc1)
139 #define DMA_VERS1 0x80000000 /* DMA rev 1 */
140 #define DMA_VERS2 0xa0000000 /* DMA rev 2 */
142 #define DMA_VERSPLUS 0x90000000 /* DMA rev 1 PLUS */
/linux-4.4.14/arch/ia64/sn/include/xtalk/
H A Dxbow.h279 #define XBOW_REV_1_0 0x1 /* xbow rev 1.0 is "1" */
280 #define XBOW_REV_1_1 0x2 /* xbow rev 1.1 is "2" */
281 #define XBOW_REV_1_2 0x3 /* xbow rev 1.2 is "3" */
282 #define XBOW_REV_1_3 0x4 /* xbow rev 1.3 is "4" */
283 #define XBOW_REV_2_0 0x5 /* xbow rev 2.0 is "5" */
/linux-4.4.14/arch/arm64/lib/
H A Dstrcmp.S192 CPU_LE( rev syndrome, syndrome )
193 CPU_LE( rev data1, data1 )
194 CPU_LE( rev data2, data2 )
211 CPU_BE( rev tmp3, data1 )
215 CPU_BE( rev has_nul, has_nul )
H A Dstrncmp.S251 CPU_LE( rev syndrome, syndrome )
252 CPU_LE( rev data1, data1 )
253 CPU_LE( rev data2, data2 )
269 CPU_BE( rev tmp3, data1 )
273 CPU_BE( rev has_nul, has_nul )
H A Dstrlen.S99 CPU_BE( rev data2, data2 )
105 rev has_nul2, has_nul2
/linux-4.4.14/drivers/usb/storage/
H A Dsierra_ms.c31 __u8 rev; member in struct:swoc_info
86 dev_dbg(dev, "SWIMS: SWoC Rev: %02d\n", swocInfo->rev); debug_swoc()
117 swocInfo->rev, show_truinst()
/linux-4.4.14/drivers/usb/common/
H A Dcommon.c159 if (!of_property_read_u32(np, "otg-rev", &otg_rev)) { of_usb_update_otg_caps()
173 pr_err("%s: unsupported otg-rev: 0x%x\n", of_usb_update_otg_caps()
179 * otg-rev is mandatory for otg properties, if not passed of_usb_update_otg_caps()
/linux-4.4.14/drivers/spi/
H A Dspi-bcm53xx.c229 if (core->bus->drv_cc.core->id.rev != 42) { bcm53xxspi_bcma_probe()
230 pr_err("SPI on SoC with unsupported ChipCommon rev\n"); bcm53xxspi_bcma_probe()
253 /* Broadcom SoCs (at least with the CC rev 42) use SPI for flash only */ bcm53xxspi_bcma_probe()
/linux-4.4.14/arch/x86/kernel/
H A Dprobe_roms.c120 unsigned short offset, vendor, device, list, rev; find_oprom() local
142 probe_kernel_address(rom + offset + 0xc, rev) == 0 && find_oprom()
143 rev >= 3 && list && find_oprom()
/linux-4.4.14/arch/mips/sibyte/sb1250/
H A Dsetup.c82 printk("Unknown BCM1250 rev %x\n", soc_pass); setup_bcm1250()
138 printk("Unknown %s rev %x\n", soc_str, soc_pass); setup_bcm112x()
199 printk("Broadcom SiByte %s %s @ %d MHz (SB1 rev %d)\n", sb1250_setup()
/linux-4.4.14/arch/arm/kvm/
H A Dinterrupts_head.S422 ARM_BE8(rev r4, r4 )
423 ARM_BE8(rev r5, r5 )
424 ARM_BE8(rev r6, r6 )
425 ARM_BE8(rev r7, r7 )
426 ARM_BE8(rev r8, r8 )
427 ARM_BE8(rev r9, r9 )
428 ARM_BE8(rev r10, r10 )
454 ARM_BE8(rev r6, r6 )
480 ARM_BE8(rev r3, r3 )
481 ARM_BE8(rev r4, r4 )
482 ARM_BE8(rev r8, r8 )
493 ARM_BE8(rev r6, r6 )
/linux-4.4.14/drivers/ssb/
H A Dscan.c276 u32 idhi, cc, rev, tmp; ssb_bus_scan() local
292 rev = (idhi & SSB_IDHIGH_RCLO); ssb_bus_scan()
293 rev |= (idhi & SSB_IDHIGH_RCHI) >> SSB_IDHIGH_RCHI_SHIFT; ssb_bus_scan()
304 if (rev >= 4) { ssb_bus_scan()
321 ssb_info("Found chip with id 0x%04X, rev 0x%02X and package 0x%02X\n", ssb_bus_scan()
360 "(cc 0x%03X, rev 0x%02X, vendor 0x%04X)\n", ssb_bus_scan()
H A Ddriver_pcicore.c482 u8 rev = pc->dev->id.revision; ssb_pcicore_pcie_setup_workarounds() local
484 if (rev == 0 || rev == 1) { ssb_pcicore_pcie_setup_workarounds()
490 if (rev == 1) { ssb_pcicore_pcie_setup_workarounds()
497 if (rev == 0) { ssb_pcicore_pcie_setup_workarounds()
506 } else if (rev == 3 || rev == 4 || rev == 5) { ssb_pcicore_pcie_setup_workarounds()
510 } else if (rev == 7) { ssb_pcicore_pcie_setup_workarounds()
514 if (rev >= 6) { ssb_pcicore_pcie_setup_workarounds()
/linux-4.4.14/drivers/input/keyboard/
H A Domap4-keypad.c243 int rev; omap4_keypad_probe() local
296 rev = __raw_readl(keypad_data->base + OMAP4_KBD_REVISION); omap4_keypad_probe()
297 rev &= 0x03 << 30; omap4_keypad_probe()
298 rev >>= 30; omap4_keypad_probe()
299 switch (rev) { omap4_keypad_probe()
310 "Keypad reports unsupported revision %d", rev); omap4_keypad_probe()
/linux-4.4.14/arch/arm/crypto/
H A Daes-armv4.S192 rev r0,r0
193 rev r1,r1
194 rev r2,r2
195 rev r3,r3
203 rev r0,r0
204 rev r1,r1
205 rev r2,r2
206 rev r3,r3
447 rev r0,r0
448 rev r1,r1
449 rev r2,r2
450 rev r3,r3
514 rev r8,r8
515 rev r9,r9
585 rev r8,r8
586 rev r9,r9
887 rev r0,r0
888 rev r1,r1
889 rev r2,r2
890 rev r3,r3
898 rev r0,r0
899 rev r1,r1
900 rev r2,r2
901 rev r3,r3
H A Daes-ce-core.S287 rev r6, r6
296 rev ip, r6
300 rev ip, r6
309 rev ip, r6
327 rev ip, r6
345 rev ip, ip @ ... to handle the carry
347 rev ip, ip
/linux-4.4.14/drivers/media/dvb-frontends/
H A Dcx24113.c50 u8 rev; member in struct:cx24113_state
156 if (state->rev == REV_CX24113) { cx24113_set_parameters()
237 if (state->rev == 0x43 && state->vcodiv == VCODIV4) cx24113_set_Fref()
249 if (state->rev == REV_CX24113) cx24113_enable()
297 if (state->rev == 0x43 && state->vcodiv == VCODIV4) cx24113_set_ref_div()
317 if (state->rev == REV_CX24113) { cx24113_calc_pll_nf()
583 state->rev = rc; cx24113_attach()
593 cx_err("unsupported device id: %x\n", state->rev); cx24113_attach()
/linux-4.4.14/drivers/net/wireless/rt2x00/
H A Drt2x00.h176 u16 rev; member in struct:rt2x00_chip
1081 const u16 rt, const u16 rf, const u16 rev) rt2x00_set_chip()
1085 rt2x00dev->chip.rev = rev; rt2x00_set_chip()
1087 rt2x00_info(rt2x00dev, "Chipset detected - rt: %04x, rf: %04x, rev: %04x\n", rt2x00_set_chip()
1089 rt2x00dev->chip.rev); rt2x00_set_chip()
1093 const u16 rt, const u16 rev) rt2x00_set_rt()
1096 rt2x00dev->chip.rev = rev; rt2x00_set_rt()
1098 rt2x00_info(rt2x00dev, "RT chipset %04x, rev %04x detected\n", rt2x00_set_rt()
1099 rt2x00dev->chip.rt, rt2x00dev->chip.rev); rt2x00_set_rt()
1122 return rt2x00dev->chip.rev; rt2x00_rev()
1126 const u16 rt, const u16 rev) rt2x00_rt_rev()
1128 return (rt2x00_rt(rt2x00dev, rt) && rt2x00_rev(rt2x00dev) == rev); rt2x00_rt_rev()
1132 const u16 rt, const u16 rev) rt2x00_rt_rev_lt()
1134 return (rt2x00_rt(rt2x00dev, rt) && rt2x00_rev(rt2x00dev) < rev); rt2x00_rt_rev_lt()
1138 const u16 rt, const u16 rev) rt2x00_rt_rev_gte()
1140 return (rt2x00_rt(rt2x00dev, rt) && rt2x00_rev(rt2x00dev) >= rev); rt2x00_rt_rev_gte()
1080 rt2x00_set_chip(struct rt2x00_dev *rt2x00dev, const u16 rt, const u16 rf, const u16 rev) rt2x00_set_chip() argument
1092 rt2x00_set_rt(struct rt2x00_dev *rt2x00dev, const u16 rt, const u16 rev) rt2x00_set_rt() argument
1125 rt2x00_rt_rev(struct rt2x00_dev *rt2x00dev, const u16 rt, const u16 rev) rt2x00_rt_rev() argument
1131 rt2x00_rt_rev_lt(struct rt2x00_dev *rt2x00dev, const u16 rt, const u16 rev) rt2x00_rt_rev_lt() argument
1137 rt2x00_rt_rev_gte(struct rt2x00_dev *rt2x00dev, const u16 rt, const u16 rev) rt2x00_rt_rev_gte() argument
/linux-4.4.14/drivers/net/wireless/brcm80211/brcmfmac/
H A Dchip.h53 * @rev: core revision.
58 u16 rev; member in struct:brcmf_core
H A Dchip.c181 u32 errlogstatus; /* rev 6 */
182 u32 errlogaddr; /* rev 6 */
183 /* used for patching rev 3 & 5 */
254 core->rev = SBCOREREV(regdata); brcmf_chip_sb_corerev()
506 idx++, core->pub.id, core->pub.rev, core->pub.base, brcmf_chip_cores_check()
576 if (WARN_ON(sr->pub.rev < 4)) brcmf_chip_socram_ramsize()
586 if ((sr->pub.rev <= 7) || (sr->pub.rev == 12)) { brcmf_chip_socram_ramsize()
845 u8 nmp, nsp, nmw, nsw, rev; brcmf_chip_dmp_erom_scan() local
875 rev = (val & DMP_COMP_REVISION) >> DMP_COMP_REVISION_S; brcmf_chip_dmp_erom_scan()
891 core->rev = rev; brcmf_chip_dmp_erom_scan()
904 /* Get CC core rev brcmf_chip_recognition()
915 brcmf_dbg(INFO, "found %s chip: BCM%s, rev=%d\n", brcmf_chip_recognition()
1020 /* get pmu caps & rev */ brcmf_chip_setup()
1029 cc->pub.rev, pub->pmurev, pub->pmucaps); brcmf_chip_setup()
/linux-4.4.14/drivers/net/ethernet/ti/
H A Dcpsw_ale.c30 #define ALE_VERSION_MAJOR(rev) ((rev >> 8) & 0xff)
31 #define ALE_VERSION_MINOR(rev) (rev & 0xff)
724 u32 rev; cpsw_ale_start() local
726 rev = __raw_readl(ale->params.ale_regs + ALE_IDVER); cpsw_ale_start()
728 ALE_VERSION_MAJOR(rev), ALE_VERSION_MINOR(rev)); cpsw_ale_start()
/linux-4.4.14/arch/cris/arch-v32/kernel/
H A Dsetup.c29 unsigned short rev; member in struct:cpu_info
69 if (cpinfo[i].rev == revision) { show_cpuinfo()
/linux-4.4.14/arch/mips/include/asm/
H A Dcdmm.h20 * @rev: Device revision number.
27 unsigned int rev; member in struct:mips_cdmm_device
/linux-4.4.14/arch/mips/pci/
H A Dpci-ip32.c134 printk("MACE PCI rev %d\n", mace->pci.rev); mace_init()
/linux-4.4.14/arch/mips/sibyte/bcm1480/
H A Dsetup.c73 printk("Unknown %s rev %x\n", soc_str, soc_pass); setup_bcm1x80_bcm1x55()
137 printk("Broadcom SiByte %s %s @ %d MHz (SB-1A rev %d)\n", bcm1480_setup()
/linux-4.4.14/arch/m68k/fpsp040/
H A Dx_fline.S76 cmpib #VER_41,(%a7) |test for rev unimp frame
78 subl #UNIMP_41_SIZE-4,%a7 |emulate a rev fsave
/linux-4.4.14/tools/power/cpupower/debug/kernel/
H A Dcpufreq-test_tsc.c64 /* FADT rev. 2 */ cpufreq_test_tsc()
78 /* FADT rev. 1 */ cpufreq_test_tsc()
/linux-4.4.14/drivers/net/ethernet/chelsio/cxgb3/
H A Dxgmac.c112 if (adap->params.rev == 0) { t3_mac_reset()
141 if ((val & F_PCS_RESET_) && adap->params.rev) { t3_mac_reset()
201 if ((val & F_PCS_RESET_) && adap->params.rev) { t3b2_mac_reset()
364 if (adap->params.rev >= T3_REV_B2 && t3_mac_set_mtu()
371 reg = adap->params.rev == T3_REV_B2 ? t3_mac_set_mtu()
413 ipg = (adap->params.rev == T3_REV_C) ? 0 : 1; t3_mac_set_mtu()
418 if (adap->params.rev > 0) { t3_mac_set_mtu()
419 divisor = (adap->params.rev == T3_REV_C) ? 64 : 8; t3_mac_set_mtu()
477 adap->params.rev == T3_REV_C ? t3_mac_enable()
481 adap->params.rev == T3_REV_C ? 0 : 1 << idx); t3_mac_enable()
622 if (mac->adapter->params.rev == T3_REV_B2) t3_mac_update_stats()
/linux-4.4.14/drivers/net/ethernet/atheros/alx/
H A Dhw.c41 static inline bool alx_is_rev_a(u8 rev) alx_is_rev_a() argument
43 return rev == ALX_REV_A0 || rev == ALX_REV_A1; alx_is_rev_a()
335 static void alx_reset_osc(struct alx_hw *hw, u8 rev) alx_reset_osc() argument
349 if (rev >= ALX_REV_B0) { alx_reset_osc()
365 /* disable isolate for rev A devices */ alx_reset_osc()
366 if (alx_is_rev_a(rev)) alx_reset_osc()
405 u8 rev; alx_reset_mac() local
409 rev = alx_hw_revision(hw); alx_reset_mac()
410 a_cr = alx_is_rev_a(rev) && alx_hw_with_cr(hw); alx_reset_mac()
463 alx_reset_osc(hw, rev); alx_reset_mac()
466 * disable isolate for rev A devices alx_reset_mac()
474 if (alx_is_rev_a(rev)) alx_reset_mac()
562 u8 rev = alx_hw_revision(hw); alx_reset_pcie() local
587 if (alx_is_rev_a(rev) && alx_hw_with_cr(hw)) { alx_reset_pcie()
647 u8 rev = alx_hw_revision(hw); alx_enable_aspm() local
668 if (alx_is_rev_a(rev) && alx_hw_with_cr(hw)) alx_enable_aspm()
/linux-4.4.14/drivers/gpu/drm/radeon/
H A Dradeon_combios.c134 int rev, size; combios_get_table_offset() local
249 rev = RBIOS8(check_offset); combios_get_table_offset()
250 if (rev > 0) { combios_get_table_offset()
261 rev = RBIOS8(check_offset); combios_get_table_offset()
262 if (rev > 0) { combios_get_table_offset()
273 rev = RBIOS8(check_offset); combios_get_table_offset()
274 if (rev > 0) { combios_get_table_offset()
285 rev = RBIOS8(check_offset); combios_get_table_offset()
286 if (rev == 2) { combios_get_table_offset()
738 int8_t rev; radeon_combios_get_clock_info() local
743 rev = RBIOS8(pll_info); radeon_combios_get_clock_info()
753 if (rev > 9) { radeon_combios_get_clock_info()
768 if (rev > 10) { radeon_combios_get_clock_info()
783 if (rev > 10) { radeon_combios_get_clock_info()
866 uint8_t rev, bg, dac; radeon_combios_get_primary_dac_info() local
879 rev = RBIOS8(dac_info) & 0x3; radeon_combios_get_primary_dac_info()
880 if (rev < 2) { radeon_combios_get_primary_dac_info()
1017 uint8_t rev, bg, dac; radeon_combios_get_tv_dac_info() local
1028 rev = RBIOS8(dac_info + 0x3); radeon_combios_get_tv_dac_info()
1029 if (rev > 4) { radeon_combios_get_tv_dac_info()
1044 } else if (rev > 1) { radeon_combios_get_tv_dac_info()
1067 rev = RBIOS8(dac_info) & 0x3; radeon_combios_get_tv_dac_info()
1068 if (rev < 2) { radeon_combios_get_tv_dac_info()
2282 uint8_t rev = RBIOS8(ext_tmds_info); combios_check_dl_dvi() local
2284 if (rev >= 3) { combios_check_dl_dvi()
2639 u8 rev, blocks, tmp; radeon_combios_get_power_modes() local
2664 rev = RBIOS8(offset); radeon_combios_get_power_modes()
2666 if (rev == 0) { radeon_combios_get_power_modes()
2670 } else if (rev == 1) { radeon_combios_get_power_modes()
2674 } else if (rev == 2) { radeon_combios_get_power_modes()
2728 rev = RBIOS8(offset); radeon_combios_get_power_modes()
2740 if (rev > 4) radeon_combios_get_power_modes()
2753 if (rev < 6) { radeon_combios_get_power_modes()
2789 if (rev > 6) radeon_combios_get_power_modes()
2885 uint8_t blocks, slave_addr, rev; radeon_combios_external_tmds_setup() local
2895 rev = RBIOS8(offset); radeon_combios_external_tmds_setup()
2897 rev = RBIOS8(offset); radeon_combios_external_tmds_setup()
2898 if (rev > 1) { radeon_combios_external_tmds_setup()
3261 uint8_t rev; combios_write_ram_size() local
3273 rev = RBIOS8(offset); combios_write_ram_size()
3274 if (rev < 3) { combios_write_ram_size()
3287 rev = RBIOS8(offset - 1); combios_write_ram_size()
3288 if (rev < 1) { combios_write_ram_size()
/linux-4.4.14/drivers/staging/comedi/drivers/
H A Dni_atmio.c78 321791a.pdf discontinuation of at-mio-16e-10 rev. c
79 321808a.pdf about at-mio-16e-10 rev P
80 321837a.pdf discontinuation of at-mio-16de-10 rev d
81 321838a.pdf about at-mio-16de-10 rev N
/linux-4.4.14/drivers/net/ethernet/sfc/
H A Def10_regs.h16 * E<type>_<min-rev><max-rev>_
26 * <min-rev> is the first revision to which the definition applies:
31 * then <max-rev> is the last revision to which the definition applies;
/linux-4.4.14/arch/x86/platform/olpc/
H A Dolpc_dt.c206 __be32 rev; olpc_dt_get_board_revision() local
214 (char *) &rev, sizeof(rev)); olpc_dt_get_board_revision()
218 return be32_to_cpu(rev); olpc_dt_get_board_revision()
/linux-4.4.14/include/linux/can/
H A Dcore.h25 #define CAN_VERSION_STRING "rev " CAN_VERSION " abi " CAN_ABI_VERSION
/linux-4.4.14/include/uapi/linux/
H A Dflat.h29 unsigned long rev; /* version (as above) */ member in struct:flat_hdr
H A Dmmtimer.h11 * Timers Draft Specification (rev. 0.97) from Intel. Note that some
/linux-4.4.14/arch/mips/include/asm/mach-jz4740/
H A Djz4740_fb.h60 uint32_t rev; member in struct:jz4740_fb_platform_data::__anon1891
/linux-4.4.14/arch/mips/kernel/
H A Dcpu-bugs64.c63 * dsll32 when executed on R4000 rev. 2.2 or 3.0 (PRId mult_sh_align_mod()
196 * when executed on R4000 rev. 2.2 or 3.0 (PRId 00000422 or check_daddi()
257 * executed on R4400 rev. 1.0 (PRId 00000440). check_daddiu()
264 * problem affects R4000 rev. 2.2 and 3.0 (PRId 00000422 and check_daddiu()
/linux-4.4.14/arch/m68k/include/uapi/asm/
H A Dbootinfo-vme.h49 __u8 rev, mth, day, yr; member in struct:__anon1822
/linux-4.4.14/arch/ia64/include/asm/sn/
H A Dsn_feature_sets.h23 * the presence of a PROM feature. Down rev (old) PROMs will always test
H A Dtioca_provider.h17 * part revision numbers. (1 << 1) == rev A, (1 << 2) == rev B,
18 * (3 << 1) == (rev A or rev B), etc
/linux-4.4.14/drivers/media/platform/s5p-tv/
H A Dsii9234_drv.c145 int family, rev, tpi_rev, dev_id, sub_id, hdcp, id; sii9234_verify_version() local
148 rev = sii9234_readb(client, 0x1c) & 0x0f; sii9234_verify_version()
154 if (family < 0 || rev < 0 || tpi_rev < 0 || dev_id < 0 || sii9234_verify_version()
162 dev_info(dev, "chip: SiL%02x family: %02x, rev: %02x\n", sii9234_verify_version()
163 id, family, rev); sii9234_verify_version()
/linux-4.4.14/arch/powerpc/platforms/maple/
H A Dsetup.c350 u32 rev; maple_cpc925_edac_setup() local
375 rev = __raw_readl(mem); maple_cpc925_edac_setup()
378 if (rev < 0x34 || rev > 0x3f) { /* U3H */ maple_cpc925_edac_setup()
380 __func__, rev); maple_cpc925_edac_setup()
/linux-4.4.14/drivers/acpi/
H A Dutils.c620 * @rev: revision number of requested function
631 acpi_evaluate_dsm(acpi_handle handle, const u8 *uuid, int rev, int func, acpi_evaluate_dsm() argument
646 params[1].integer.value = rev; acpi_evaluate_dsm()
673 * @rev: revision number of requested functions
680 bool acpi_check_dsm(acpi_handle handle, const u8 *uuid, int rev, u64 funcs) acpi_check_dsm() argument
689 obj = acpi_evaluate_dsm(handle, uuid, rev, 0, NULL); acpi_check_dsm()
/linux-4.4.14/arch/powerpc/kernel/
H A Dcpu_setup_6xx.S117 /* 7400 <= rev 2.7 and 7410 rev = 1.0 suffer from some
221 * it's known to be bogus on rev 2.1 and earlier
372 /* If rev 2.x, backup HID2 */
462 * that is restore HID2 on rev 2.x and PLL config & switch
465 /* If rev 2.x, restore HID2 with low voltage bit cleared */
/linux-4.4.14/drivers/media/pci/ttpci/
H A Dbudget.c554 case 0x4f60: /* Fujitsu Siemens Activy Budget-S PCI rev AL (stv0299/tsa5059) */ frontend_init()
592 case 0x4f61: // Fujitsu Siemens Activy Budget-S PCI rev GR (tda8083/Grundig 29504-451(tsa5522)) frontend_init()
601 case 0x5f60: /* Fujitsu Siemens Activy Budget-T PCI rev AL (tda10046/ALPS TDHD1-204A) */ frontend_init()
609 case 0x5f61: /* Fujitsu Siemens Activy Budget-T PCI rev GR (L64781/Grundig 29504-401(tsa5060)) */ frontend_init()
830 MAKE_BUDGET_INFO(fsacs0, "Fujitsu Siemens Activy Budget-S PCI (rev GR/grundig frontend)", BUDGET_FS_ACTIVY);
831 MAKE_BUDGET_INFO(fsacs1, "Fujitsu Siemens Activy Budget-S PCI (rev AL/alps frontend)", BUDGET_FS_ACTIVY);
832 MAKE_BUDGET_INFO(fsact, "Fujitsu Siemens Activy Budget-T PCI (rev GR/Grundig frontend)", BUDGET_FS_ACTIVY);
833 MAKE_BUDGET_INFO(fsact1, "Fujitsu Siemens Activy Budget-T PCI (rev AL/ALPS TDHD1-204A)", BUDGET_FS_ACTIVY);
/linux-4.4.14/drivers/bus/
H A Dmips_cdmm.c81 retval = add_uevent_var(env, "CDMM_REV=%u", cdev->rev); mips_cdmm_uevent()
102 CDMM_ATTR(revision, "%u\n", dev->rev);
501 unsigned int drb, type, size, rev; mips_cdmm_bus_discover() local
518 rev = (acsr & CDMM_ACSR_DEVREV) >> CDMM_ACSR_DEVREV_SHIFT; mips_cdmm_bus_discover()
523 pr_info("cdmm%u-%u: @%u (%#x..%#x), type 0x%02x, rev %u\n", mips_cdmm_bus_discover()
526 type, rev); mips_cdmm_bus_discover()
538 dev->rev = rev; mips_cdmm_bus_discover()
/linux-4.4.14/arch/mn10300/kernel/
H A Dsetup.c174 printk(KERN_INFO "Panasonic %s, rev %ld\n", cpu_init()
235 "cpu rev : %lu\n" show_cpuinfo()

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