Searched refs:pre (Results 1 - 200 of 1072) sorted by relevance

123456

/linux-4.1.27/arch/mips/bcm47xx/
H A Dsprom.c200 const char *pre = prefix; bcm47xx_sprom_fill_auto() local
203 ENTRY(0xfffffffe, u16, pre, "boardrev", board_rev, 0, true); bcm47xx_sprom_fill_auto()
204 ENTRY(0x00000002, u16, pre, "boardflags", boardflags_lo, 0, fb); bcm47xx_sprom_fill_auto()
205 ENTRY(0xfffffffc, u16, pre, "boardtype", board_type, 0, true); bcm47xx_sprom_fill_auto()
206 ENTRY(0xfffffffe, u16, pre, "boardnum", board_num, 0, fb); bcm47xx_sprom_fill_auto()
207 ENTRY(0x00000002, u8, pre, "cc", country_code, 0, fb); bcm47xx_sprom_fill_auto()
208 ENTRY(0xfffffff8, u8, pre, "regrev", regrev, 0, fb); bcm47xx_sprom_fill_auto()
210 ENTRY(0xfffffffe, u8, pre, "ledbh0", gpio0, 0xff, fb); bcm47xx_sprom_fill_auto()
211 ENTRY(0xfffffffe, u8, pre, "ledbh1", gpio1, 0xff, fb); bcm47xx_sprom_fill_auto()
212 ENTRY(0xfffffffe, u8, pre, "ledbh2", gpio2, 0xff, fb); bcm47xx_sprom_fill_auto()
213 ENTRY(0xfffffffe, u8, pre, "ledbh3", gpio3, 0xff, fb); bcm47xx_sprom_fill_auto()
215 ENTRY(0x0000070e, u16, pre, "pa0b0", pa0b0, 0, fb); bcm47xx_sprom_fill_auto()
216 ENTRY(0x0000070e, u16, pre, "pa0b1", pa0b1, 0, fb); bcm47xx_sprom_fill_auto()
217 ENTRY(0x0000070e, u16, pre, "pa0b2", pa0b2, 0, fb); bcm47xx_sprom_fill_auto()
218 ENTRY(0x0000070e, u8, pre, "pa0itssit", itssi_bg, 0, fb); bcm47xx_sprom_fill_auto()
219 ENTRY(0x0000070e, u8, pre, "pa0maxpwr", maxpwr_bg, 0, fb); bcm47xx_sprom_fill_auto()
221 ENTRY(0x0000070c, u8, pre, "opo", opo, 0, fb); bcm47xx_sprom_fill_auto()
222 ENTRY(0xfffffffe, u8, pre, "aa2g", ant_available_bg, 0, fb); bcm47xx_sprom_fill_auto()
223 ENTRY(0xfffffffe, u8, pre, "aa5g", ant_available_a, 0, fb); bcm47xx_sprom_fill_auto()
224 ENTRY(0x000007fe, s8, pre, "ag0", antenna_gain.a0, 0, fb); bcm47xx_sprom_fill_auto()
225 ENTRY(0x000007fe, s8, pre, "ag1", antenna_gain.a1, 0, fb); bcm47xx_sprom_fill_auto()
226 ENTRY(0x000007f0, s8, pre, "ag2", antenna_gain.a2, 0, fb); bcm47xx_sprom_fill_auto()
227 ENTRY(0x000007f0, s8, pre, "ag3", antenna_gain.a3, 0, fb); bcm47xx_sprom_fill_auto()
229 ENTRY(0x0000070e, u16, pre, "pa1b0", pa1b0, 0, fb); bcm47xx_sprom_fill_auto()
230 ENTRY(0x0000070e, u16, pre, "pa1b1", pa1b1, 0, fb); bcm47xx_sprom_fill_auto()
231 ENTRY(0x0000070e, u16, pre, "pa1b2", pa1b2, 0, fb); bcm47xx_sprom_fill_auto()
232 ENTRY(0x0000070c, u16, pre, "pa1lob0", pa1lob0, 0, fb); bcm47xx_sprom_fill_auto()
233 ENTRY(0x0000070c, u16, pre, "pa1lob1", pa1lob1, 0, fb); bcm47xx_sprom_fill_auto()
234 ENTRY(0x0000070c, u16, pre, "pa1lob2", pa1lob2, 0, fb); bcm47xx_sprom_fill_auto()
235 ENTRY(0x0000070c, u16, pre, "pa1hib0", pa1hib0, 0, fb); bcm47xx_sprom_fill_auto()
236 ENTRY(0x0000070c, u16, pre, "pa1hib1", pa1hib1, 0, fb); bcm47xx_sprom_fill_auto()
237 ENTRY(0x0000070c, u16, pre, "pa1hib2", pa1hib2, 0, fb); bcm47xx_sprom_fill_auto()
238 ENTRY(0x0000070e, u8, pre, "pa1itssit", itssi_a, 0, fb); bcm47xx_sprom_fill_auto()
239 ENTRY(0x0000070e, u8, pre, "pa1maxpwr", maxpwr_a, 0, fb); bcm47xx_sprom_fill_auto()
240 ENTRY(0x0000070c, u8, pre, "pa1lomaxpwr", maxpwr_al, 0, fb); bcm47xx_sprom_fill_auto()
241 ENTRY(0x0000070c, u8, pre, "pa1himaxpwr", maxpwr_ah, 0, fb); bcm47xx_sprom_fill_auto()
243 ENTRY(0x00000708, u8, pre, "bxa2g", bxa2g, 0, fb); bcm47xx_sprom_fill_auto()
244 ENTRY(0x00000708, u8, pre, "rssisav2g", rssisav2g, 0, fb); bcm47xx_sprom_fill_auto()
245 ENTRY(0x00000708, u8, pre, "rssismc2g", rssismc2g, 0, fb); bcm47xx_sprom_fill_auto()
246 ENTRY(0x00000708, u8, pre, "rssismf2g", rssismf2g, 0, fb); bcm47xx_sprom_fill_auto()
247 ENTRY(0x00000708, u8, pre, "bxa5g", bxa5g, 0, fb); bcm47xx_sprom_fill_auto()
248 ENTRY(0x00000708, u8, pre, "rssisav5g", rssisav5g, 0, fb); bcm47xx_sprom_fill_auto()
249 ENTRY(0x00000708, u8, pre, "rssismc5g", rssismc5g, 0, fb); bcm47xx_sprom_fill_auto()
250 ENTRY(0x00000708, u8, pre, "rssismf5g", rssismf5g, 0, fb); bcm47xx_sprom_fill_auto()
251 ENTRY(0x00000708, u8, pre, "tri2g", tri2g, 0, fb); bcm47xx_sprom_fill_auto()
252 ENTRY(0x00000708, u8, pre, "tri5g", tri5g, 0, fb); bcm47xx_sprom_fill_auto()
253 ENTRY(0x00000708, u8, pre, "tri5gl", tri5gl, 0, fb); bcm47xx_sprom_fill_auto()
254 ENTRY(0x00000708, u8, pre, "tri5gh", tri5gh, 0, fb); bcm47xx_sprom_fill_auto()
255 ENTRY(0x00000708, s8, pre, "rxpo2g", rxpo2g, 0, fb); bcm47xx_sprom_fill_auto()
256 ENTRY(0x00000708, s8, pre, "rxpo5g", rxpo5g, 0, fb); bcm47xx_sprom_fill_auto()
257 ENTRY(0xfffffff0, u8, pre, "txchain", txchain, 0xf, fb); bcm47xx_sprom_fill_auto()
258 ENTRY(0xfffffff0, u8, pre, "rxchain", rxchain, 0xf, fb); bcm47xx_sprom_fill_auto()
259 ENTRY(0xfffffff0, u8, pre, "antswitch", antswitch, 0xff, fb); bcm47xx_sprom_fill_auto()
260 ENTRY(0x00000700, u8, pre, "tssipos2g", fem.ghz2.tssipos, 0, fb); bcm47xx_sprom_fill_auto()
261 ENTRY(0x00000700, u8, pre, "extpagain2g", fem.ghz2.extpa_gain, 0, fb); bcm47xx_sprom_fill_auto()
262 ENTRY(0x00000700, u8, pre, "pdetrange2g", fem.ghz2.pdet_range, 0, fb); bcm47xx_sprom_fill_auto()
263 ENTRY(0x00000700, u8, pre, "triso2g", fem.ghz2.tr_iso, 0, fb); bcm47xx_sprom_fill_auto()
264 ENTRY(0x00000700, u8, pre, "antswctl2g", fem.ghz2.antswlut, 0, fb); bcm47xx_sprom_fill_auto()
265 ENTRY(0x00000700, u8, pre, "tssipos5g", fem.ghz5.tssipos, 0, fb); bcm47xx_sprom_fill_auto()
266 ENTRY(0x00000700, u8, pre, "extpagain5g", fem.ghz5.extpa_gain, 0, fb); bcm47xx_sprom_fill_auto()
267 ENTRY(0x00000700, u8, pre, "pdetrange5g", fem.ghz5.pdet_range, 0, fb); bcm47xx_sprom_fill_auto()
268 ENTRY(0x00000700, u8, pre, "triso5g", fem.ghz5.tr_iso, 0, fb); bcm47xx_sprom_fill_auto()
269 ENTRY(0x00000700, u8, pre, "antswctl5g", fem.ghz5.antswlut, 0, fb); bcm47xx_sprom_fill_auto()
270 ENTRY(0x000000f0, u8, pre, "txpid2ga0", txpid2g[0], 0, fb); bcm47xx_sprom_fill_auto()
271 ENTRY(0x000000f0, u8, pre, "txpid2ga1", txpid2g[1], 0, fb); bcm47xx_sprom_fill_auto()
272 ENTRY(0x000000f0, u8, pre, "txpid2ga2", txpid2g[2], 0, fb); bcm47xx_sprom_fill_auto()
273 ENTRY(0x000000f0, u8, pre, "txpid2ga3", txpid2g[3], 0, fb); bcm47xx_sprom_fill_auto()
274 ENTRY(0x000000f0, u8, pre, "txpid5ga0", txpid5g[0], 0, fb); bcm47xx_sprom_fill_auto()
275 ENTRY(0x000000f0, u8, pre, "txpid5ga1", txpid5g[1], 0, fb); bcm47xx_sprom_fill_auto()
276 ENTRY(0x000000f0, u8, pre, "txpid5ga2", txpid5g[2], 0, fb); bcm47xx_sprom_fill_auto()
277 ENTRY(0x000000f0, u8, pre, "txpid5ga3", txpid5g[3], 0, fb); bcm47xx_sprom_fill_auto()
278 ENTRY(0x000000f0, u8, pre, "txpid5gla0", txpid5gl[0], 0, fb); bcm47xx_sprom_fill_auto()
279 ENTRY(0x000000f0, u8, pre, "txpid5gla1", txpid5gl[1], 0, fb); bcm47xx_sprom_fill_auto()
280 ENTRY(0x000000f0, u8, pre, "txpid5gla2", txpid5gl[2], 0, fb); bcm47xx_sprom_fill_auto()
281 ENTRY(0x000000f0, u8, pre, "txpid5gla3", txpid5gl[3], 0, fb); bcm47xx_sprom_fill_auto()
282 ENTRY(0x000000f0, u8, pre, "txpid5gha0", txpid5gh[0], 0, fb); bcm47xx_sprom_fill_auto()
283 ENTRY(0x000000f0, u8, pre, "txpid5gha1", txpid5gh[1], 0, fb); bcm47xx_sprom_fill_auto()
284 ENTRY(0x000000f0, u8, pre, "txpid5gha2", txpid5gh[2], 0, fb); bcm47xx_sprom_fill_auto()
285 ENTRY(0x000000f0, u8, pre, "txpid5gha3", txpid5gh[3], 0, fb); bcm47xx_sprom_fill_auto()
287 ENTRY(0xffffff00, u8, pre, "tempthresh", tempthresh, 0, fb); bcm47xx_sprom_fill_auto()
288 ENTRY(0xffffff00, u8, pre, "tempoffset", tempoffset, 0, fb); bcm47xx_sprom_fill_auto()
289 ENTRY(0xffffff00, u16, pre, "rawtempsense", rawtempsense, 0, fb); bcm47xx_sprom_fill_auto()
290 ENTRY(0xffffff00, u8, pre, "measpower", measpower, 0, fb); bcm47xx_sprom_fill_auto()
291 ENTRY(0xffffff00, u8, pre, "tempsense_slope", tempsense_slope, 0, fb); bcm47xx_sprom_fill_auto()
292 ENTRY(0xffffff00, u8, pre, "tempcorrx", tempcorrx, 0, fb); bcm47xx_sprom_fill_auto()
293 ENTRY(0xffffff00, u8, pre, "tempsense_option", tempsense_option, 0, fb); bcm47xx_sprom_fill_auto()
294 ENTRY(0x00000700, u8, pre, "freqoffset_corr", freqoffset_corr, 0, fb); bcm47xx_sprom_fill_auto()
295 ENTRY(0x00000700, u8, pre, "iqcal_swp_dis", iqcal_swp_dis, 0, fb); bcm47xx_sprom_fill_auto()
296 ENTRY(0x00000700, u8, pre, "hw_iqcal_en", hw_iqcal_en, 0, fb); bcm47xx_sprom_fill_auto()
297 ENTRY(0x00000700, u8, pre, "elna2g", elna2g, 0, fb); bcm47xx_sprom_fill_auto()
298 ENTRY(0x00000700, u8, pre, "elna5g", elna5g, 0, fb); bcm47xx_sprom_fill_auto()
299 ENTRY(0xffffff00, u8, pre, "phycal_tempdelta", phycal_tempdelta, 0, fb); bcm47xx_sprom_fill_auto()
300 ENTRY(0xffffff00, u8, pre, "temps_period", temps_period, 0, fb); bcm47xx_sprom_fill_auto()
301 ENTRY(0xffffff00, u8, pre, "temps_hysteresis", temps_hysteresis, 0, fb); bcm47xx_sprom_fill_auto()
302 ENTRY(0xffffff00, u8, pre, "measpower1", measpower1, 0, fb); bcm47xx_sprom_fill_auto()
303 ENTRY(0xffffff00, u8, pre, "measpower2", measpower2, 0, fb); bcm47xx_sprom_fill_auto()
305 ENTRY(0x000001f0, u16, pre, "cck2gpo", cck2gpo, 0, fb); bcm47xx_sprom_fill_auto()
306 ENTRY(0x000001f0, u32, pre, "ofdm2gpo", ofdm2gpo, 0, fb); bcm47xx_sprom_fill_auto()
307 ENTRY(0x000001f0, u32, pre, "ofdm5gpo", ofdm5gpo, 0, fb); bcm47xx_sprom_fill_auto()
308 ENTRY(0x000001f0, u32, pre, "ofdm5glpo", ofdm5glpo, 0, fb); bcm47xx_sprom_fill_auto()
309 ENTRY(0x000001f0, u32, pre, "ofdm5ghpo", ofdm5ghpo, 0, fb); bcm47xx_sprom_fill_auto()
310 ENTRY(0x000001f0, u16, pre, "mcs2gpo0", mcs2gpo[0], 0, fb); bcm47xx_sprom_fill_auto()
311 ENTRY(0x000001f0, u16, pre, "mcs2gpo1", mcs2gpo[1], 0, fb); bcm47xx_sprom_fill_auto()
312 ENTRY(0x000001f0, u16, pre, "mcs2gpo2", mcs2gpo[2], 0, fb); bcm47xx_sprom_fill_auto()
313 ENTRY(0x000001f0, u16, pre, "mcs2gpo3", mcs2gpo[3], 0, fb); bcm47xx_sprom_fill_auto()
314 ENTRY(0x000001f0, u16, pre, "mcs2gpo4", mcs2gpo[4], 0, fb); bcm47xx_sprom_fill_auto()
315 ENTRY(0x000001f0, u16, pre, "mcs2gpo5", mcs2gpo[5], 0, fb); bcm47xx_sprom_fill_auto()
316 ENTRY(0x000001f0, u16, pre, "mcs2gpo6", mcs2gpo[6], 0, fb); bcm47xx_sprom_fill_auto()
317 ENTRY(0x000001f0, u16, pre, "mcs2gpo7", mcs2gpo[7], 0, fb); bcm47xx_sprom_fill_auto()
318 ENTRY(0x000001f0, u16, pre, "mcs5gpo0", mcs5gpo[0], 0, fb); bcm47xx_sprom_fill_auto()
319 ENTRY(0x000001f0, u16, pre, "mcs5gpo1", mcs5gpo[1], 0, fb); bcm47xx_sprom_fill_auto()
320 ENTRY(0x000001f0, u16, pre, "mcs5gpo2", mcs5gpo[2], 0, fb); bcm47xx_sprom_fill_auto()
321 ENTRY(0x000001f0, u16, pre, "mcs5gpo3", mcs5gpo[3], 0, fb); bcm47xx_sprom_fill_auto()
322 ENTRY(0x000001f0, u16, pre, "mcs5gpo4", mcs5gpo[4], 0, fb); bcm47xx_sprom_fill_auto()
323 ENTRY(0x000001f0, u16, pre, "mcs5gpo5", mcs5gpo[5], 0, fb); bcm47xx_sprom_fill_auto()
324 ENTRY(0x000001f0, u16, pre, "mcs5gpo6", mcs5gpo[6], 0, fb); bcm47xx_sprom_fill_auto()
325 ENTRY(0x000001f0, u16, pre, "mcs5gpo7", mcs5gpo[7], 0, fb); bcm47xx_sprom_fill_auto()
326 ENTRY(0x000001f0, u16, pre, "mcs5glpo0", mcs5glpo[0], 0, fb); bcm47xx_sprom_fill_auto()
327 ENTRY(0x000001f0, u16, pre, "mcs5glpo1", mcs5glpo[1], 0, fb); bcm47xx_sprom_fill_auto()
328 ENTRY(0x000001f0, u16, pre, "mcs5glpo2", mcs5glpo[2], 0, fb); bcm47xx_sprom_fill_auto()
329 ENTRY(0x000001f0, u16, pre, "mcs5glpo3", mcs5glpo[3], 0, fb); bcm47xx_sprom_fill_auto()
330 ENTRY(0x000001f0, u16, pre, "mcs5glpo4", mcs5glpo[4], 0, fb); bcm47xx_sprom_fill_auto()
331 ENTRY(0x000001f0, u16, pre, "mcs5glpo5", mcs5glpo[5], 0, fb); bcm47xx_sprom_fill_auto()
332 ENTRY(0x000001f0, u16, pre, "mcs5glpo6", mcs5glpo[6], 0, fb); bcm47xx_sprom_fill_auto()
333 ENTRY(0x000001f0, u16, pre, "mcs5glpo7", mcs5glpo[7], 0, fb); bcm47xx_sprom_fill_auto()
334 ENTRY(0x000001f0, u16, pre, "mcs5ghpo0", mcs5ghpo[0], 0, fb); bcm47xx_sprom_fill_auto()
335 ENTRY(0x000001f0, u16, pre, "mcs5ghpo1", mcs5ghpo[1], 0, fb); bcm47xx_sprom_fill_auto()
336 ENTRY(0x000001f0, u16, pre, "mcs5ghpo2", mcs5ghpo[2], 0, fb); bcm47xx_sprom_fill_auto()
337 ENTRY(0x000001f0, u16, pre, "mcs5ghpo3", mcs5ghpo[3], 0, fb); bcm47xx_sprom_fill_auto()
338 ENTRY(0x000001f0, u16, pre, "mcs5ghpo4", mcs5ghpo[4], 0, fb); bcm47xx_sprom_fill_auto()
339 ENTRY(0x000001f0, u16, pre, "mcs5ghpo5", mcs5ghpo[5], 0, fb); bcm47xx_sprom_fill_auto()
340 ENTRY(0x000001f0, u16, pre, "mcs5ghpo6", mcs5ghpo[6], 0, fb); bcm47xx_sprom_fill_auto()
341 ENTRY(0x000001f0, u16, pre, "mcs5ghpo7", mcs5ghpo[7], 0, fb); bcm47xx_sprom_fill_auto()
342 ENTRY(0x000001f0, u16, pre, "cddpo", cddpo, 0, fb); bcm47xx_sprom_fill_auto()
343 ENTRY(0x000001f0, u16, pre, "stbcpo", stbcpo, 0, fb); bcm47xx_sprom_fill_auto()
344 ENTRY(0x000001f0, u16, pre, "bw40po", bw40po, 0, fb); bcm47xx_sprom_fill_auto()
345 ENTRY(0x000001f0, u16, pre, "bwduppo", bwduppo, 0, fb); bcm47xx_sprom_fill_auto()
347 ENTRY(0xfffffe00, u16, pre, "cckbw202gpo", cckbw202gpo, 0, fb); bcm47xx_sprom_fill_auto()
348 ENTRY(0xfffffe00, u16, pre, "cckbw20ul2gpo", cckbw20ul2gpo, 0, fb); bcm47xx_sprom_fill_auto()
349 ENTRY(0x00000600, u32, pre, "legofdmbw202gpo", legofdmbw202gpo, 0, fb); bcm47xx_sprom_fill_auto()
350 ENTRY(0x00000600, u32, pre, "legofdmbw20ul2gpo", legofdmbw20ul2gpo, 0, fb); bcm47xx_sprom_fill_auto()
351 ENTRY(0x00000600, u32, pre, "legofdmbw205glpo", legofdmbw205glpo, 0, fb); bcm47xx_sprom_fill_auto()
352 ENTRY(0x00000600, u32, pre, "legofdmbw20ul5glpo", legofdmbw20ul5glpo, 0, fb); bcm47xx_sprom_fill_auto()
353 ENTRY(0x00000600, u32, pre, "legofdmbw205gmpo", legofdmbw205gmpo, 0, fb); bcm47xx_sprom_fill_auto()
354 ENTRY(0x00000600, u32, pre, "legofdmbw20ul5gmpo", legofdmbw20ul5gmpo, 0, fb); bcm47xx_sprom_fill_auto()
355 ENTRY(0x00000600, u32, pre, "legofdmbw205ghpo", legofdmbw205ghpo, 0, fb); bcm47xx_sprom_fill_auto()
356 ENTRY(0x00000600, u32, pre, "legofdmbw20ul5ghpo", legofdmbw20ul5ghpo, 0, fb); bcm47xx_sprom_fill_auto()
357 ENTRY(0xfffffe00, u32, pre, "mcsbw202gpo", mcsbw202gpo, 0, fb); bcm47xx_sprom_fill_auto()
358 ENTRY(0x00000600, u32, pre, "mcsbw20ul2gpo", mcsbw20ul2gpo, 0, fb); bcm47xx_sprom_fill_auto()
359 ENTRY(0xfffffe00, u32, pre, "mcsbw402gpo", mcsbw402gpo, 0, fb); bcm47xx_sprom_fill_auto()
360 ENTRY(0xfffffe00, u32, pre, "mcsbw205glpo", mcsbw205glpo, 0, fb); bcm47xx_sprom_fill_auto()
361 ENTRY(0x00000600, u32, pre, "mcsbw20ul5glpo", mcsbw20ul5glpo, 0, fb); bcm47xx_sprom_fill_auto()
362 ENTRY(0xfffffe00, u32, pre, "mcsbw405glpo", mcsbw405glpo, 0, fb); bcm47xx_sprom_fill_auto()
363 ENTRY(0xfffffe00, u32, pre, "mcsbw205gmpo", mcsbw205gmpo, 0, fb); bcm47xx_sprom_fill_auto()
364 ENTRY(0x00000600, u32, pre, "mcsbw20ul5gmpo", mcsbw20ul5gmpo, 0, fb); bcm47xx_sprom_fill_auto()
365 ENTRY(0xfffffe00, u32, pre, "mcsbw405gmpo", mcsbw405gmpo, 0, fb); bcm47xx_sprom_fill_auto()
366 ENTRY(0xfffffe00, u32, pre, "mcsbw205ghpo", mcsbw205ghpo, 0, fb); bcm47xx_sprom_fill_auto()
367 ENTRY(0x00000600, u32, pre, "mcsbw20ul5ghpo", mcsbw20ul5ghpo, 0, fb); bcm47xx_sprom_fill_auto()
368 ENTRY(0xfffffe00, u32, pre, "mcsbw405ghpo", mcsbw405ghpo, 0, fb); bcm47xx_sprom_fill_auto()
369 ENTRY(0x00000600, u16, pre, "mcs32po", mcs32po, 0, fb); bcm47xx_sprom_fill_auto()
370 ENTRY(0x00000600, u16, pre, "legofdm40duppo", legofdm40duppo, 0, fb); bcm47xx_sprom_fill_auto()
371 ENTRY(0x00000700, u8, pre, "pcieingress_war", pcieingress_war, 0, fb); bcm47xx_sprom_fill_auto()
374 ENTRY(0x00000700, u8, pre, "rxgainerr2ga0", rxgainerr2ga[0], 0, fb); bcm47xx_sprom_fill_auto()
375 ENTRY(0x00000700, u8, pre, "rxgainerr2ga1", rxgainerr2ga[1], 0, fb); bcm47xx_sprom_fill_auto()
376 ENTRY(0x00000700, u8, pre, "rxgainerr2ga2", rxgainerr2ga[2], 0, fb); bcm47xx_sprom_fill_auto()
377 ENTRY(0x00000700, u8, pre, "rxgainerr5gla0", rxgainerr5gla[0], 0, fb); bcm47xx_sprom_fill_auto()
378 ENTRY(0x00000700, u8, pre, "rxgainerr5gla1", rxgainerr5gla[1], 0, fb); bcm47xx_sprom_fill_auto()
379 ENTRY(0x00000700, u8, pre, "rxgainerr5gla2", rxgainerr5gla[2], 0, fb); bcm47xx_sprom_fill_auto()
380 ENTRY(0x00000700, u8, pre, "rxgainerr5gma0", rxgainerr5gma[0], 0, fb); bcm47xx_sprom_fill_auto()
381 ENTRY(0x00000700, u8, pre, "rxgainerr5gma1", rxgainerr5gma[1], 0, fb); bcm47xx_sprom_fill_auto()
382 ENTRY(0x00000700, u8, pre, "rxgainerr5gma2", rxgainerr5gma[2], 0, fb); bcm47xx_sprom_fill_auto()
383 ENTRY(0x00000700, u8, pre, "rxgainerr5gha0", rxgainerr5gha[0], 0, fb); bcm47xx_sprom_fill_auto()
384 ENTRY(0x00000700, u8, pre, "rxgainerr5gha1", rxgainerr5gha[1], 0, fb); bcm47xx_sprom_fill_auto()
385 ENTRY(0x00000700, u8, pre, "rxgainerr5gha2", rxgainerr5gha[2], 0, fb); bcm47xx_sprom_fill_auto()
386 ENTRY(0x00000700, u8, pre, "rxgainerr5gua0", rxgainerr5gua[0], 0, fb); bcm47xx_sprom_fill_auto()
387 ENTRY(0x00000700, u8, pre, "rxgainerr5gua1", rxgainerr5gua[1], 0, fb); bcm47xx_sprom_fill_auto()
388 ENTRY(0x00000700, u8, pre, "rxgainerr5gua2", rxgainerr5gua[2], 0, fb); bcm47xx_sprom_fill_auto()
390 ENTRY(0xfffffe00, u8, pre, "sar2g", sar2g, 0, fb); bcm47xx_sprom_fill_auto()
391 ENTRY(0xfffffe00, u8, pre, "sar5g", sar5g, 0, fb); bcm47xx_sprom_fill_auto()
394 ENTRY(0x00000700, u8, pre, "noiselvl2ga0", noiselvl2ga[0], 0, fb); bcm47xx_sprom_fill_auto()
395 ENTRY(0x00000700, u8, pre, "noiselvl2ga1", noiselvl2ga[1], 0, fb); bcm47xx_sprom_fill_auto()
396 ENTRY(0x00000700, u8, pre, "noiselvl2ga2", noiselvl2ga[2], 0, fb); bcm47xx_sprom_fill_auto()
397 ENTRY(0x00000700, u8, pre, "noiselvl5gla0", noiselvl5gla[0], 0, fb); bcm47xx_sprom_fill_auto()
398 ENTRY(0x00000700, u8, pre, "noiselvl5gla1", noiselvl5gla[1], 0, fb); bcm47xx_sprom_fill_auto()
399 ENTRY(0x00000700, u8, pre, "noiselvl5gla2", noiselvl5gla[2], 0, fb); bcm47xx_sprom_fill_auto()
400 ENTRY(0x00000700, u8, pre, "noiselvl5gma0", noiselvl5gma[0], 0, fb); bcm47xx_sprom_fill_auto()
401 ENTRY(0x00000700, u8, pre, "noiselvl5gma1", noiselvl5gma[1], 0, fb); bcm47xx_sprom_fill_auto()
402 ENTRY(0x00000700, u8, pre, "noiselvl5gma2", noiselvl5gma[2], 0, fb); bcm47xx_sprom_fill_auto()
403 ENTRY(0x00000700, u8, pre, "noiselvl5gha0", noiselvl5gha[0], 0, fb); bcm47xx_sprom_fill_auto()
404 ENTRY(0x00000700, u8, pre, "noiselvl5gha1", noiselvl5gha[1], 0, fb); bcm47xx_sprom_fill_auto()
405 ENTRY(0x00000700, u8, pre, "noiselvl5gha2", noiselvl5gha[2], 0, fb); bcm47xx_sprom_fill_auto()
406 ENTRY(0x00000700, u8, pre, "noiselvl5gua0", noiselvl5gua[0], 0, fb); bcm47xx_sprom_fill_auto()
407 ENTRY(0x00000700, u8, pre, "noiselvl5gua1", noiselvl5gua[1], 0, fb); bcm47xx_sprom_fill_auto()
408 ENTRY(0x00000700, u8, pre, "noiselvl5gua2", noiselvl5gua[2], 0, fb); bcm47xx_sprom_fill_auto()
/linux-4.1.27/sound/pci/ctxfi/
H A Dctimap.c25 struct list_head *pos, *pre, *head; input_mapper_add() local
46 pre = pos->prev;
47 if (pre == head)
48 pre = head->prev;
52 pre = head->prev;
57 pre_ent = list_entry(pre, struct imapper, list);
71 struct list_head *next, *pre, *head; input_mapper_delete() local
79 pre = (entry->list.prev == head) ? head->prev : entry->list.prev; input_mapper_delete()
82 if (pre == &entry->list) { input_mapper_delete()
90 pre_ent = list_entry(pre, struct imapper, list); input_mapper_delete()
H A Dctvmem.c81 struct list_head *pos, *pre; put_vm_block() local
109 pre = pos->prev; put_vm_block()
110 while (pre != &vm->unused) { put_vm_block()
112 pre_ent = list_entry(pre, struct ct_vm_block, list); put_vm_block()
119 pos = pre; put_vm_block()
120 pre = pos->prev; put_vm_block()
/linux-4.1.27/arch/s390/include/asm/
H A Dschid.h7 /* Helper function for sane state of pre-allocated subchannel_id. */
/linux-4.1.27/arch/cris/include/asm/
H A Ddelay.h7 * Delay routines, using a pre-computed "loops_per_second" value.
/linux-4.1.27/arch/mips/boot/compressed/
H A Ddbg.c2 * MIPS-specific debug support for pre-boot environment
H A Ddecompress.c49 /* activate the code for pre-boot environment */
/linux-4.1.27/arch/arm/include/asm/
H A Dmutex.h11 * On pre-ARMv6 hardware this results in a swp-based implementation,
H A Dswitch_to.h7 * For v7 SMP cores running a preemptible kernel we may be pre-empted
H A Ddelay.h4 * Delay routines, using a pre-computed "loops_per_second" value.
H A Dfpstate.h21 * - an implementation-dependent word of state for FLDMX/FSTMX (pre-ARMv6)
H A Dspinlock.h5 #error SMP not supported on pre-ARMv6 CPUs
/linux-4.1.27/include/linux/decompress/
H A Dmm.h4 * Memory management for pre-boot and ramdisk uncompressors
15 /* Code active when included from pre-boot environment: */
19 * pre-boot environment, so that data can arbitrarily relocated (via
H A Dgeneric.h12 *len - len of pre-read data in inbuf
/linux-4.1.27/include/linux/platform_data/
H A Dkeypad-ep93xx.h18 * @prescale: row/column counter pre-scaler load value
/linux-4.1.27/include/uapi/linux/netfilter_ipv4/
H A Dipt_ECN.h25 __u8 ip_ect; /* ECT codepoint of IPv4 header, pre-shifted */
/linux-4.1.27/arch/frv/kernel/
H A Dtime.c73 unsigned short base, pre, prediv; time_divisor_init() local
76 pre = 1; time_divisor_init()
78 base = __res_bus_clock_speed_HZ / pre / HZ / (1 << prediv); time_divisor_init()
80 __set_TPRV(pre); time_divisor_init()
/linux-4.1.27/arch/arm/include/asm/hardware/
H A Dicst.h40 * This frequency is pre-output divider.
50 * This frequency is pre-output divider.
/linux-4.1.27/arch/arc/include/asm/
H A Ddelay.h8 * Delay routines using pre computed loops_per_jiffy value.
57 * HZ * 4295 is pre-evaluated by gcc - hence only 2 mpy ops __udelay()
/linux-4.1.27/net/sunrpc/xprtrdma/
H A Dphysical_ops.c6 /* No-op chunk preparation. All client memory is pre-registered.
10 * pre-registered and never deregistered. This mode is good for
H A Dxprt_rdma.h187 * on the fly (ie, not pre-registered).
224 * It includes pre-registered buffer memory for send AND recv.
278 * struct rpcrdma_buffer -- holds list/queue of pre-registered memory for
/linux-4.1.27/sound/core/
H A Dpcm_memory.c89 * Releases the pre-allocated buffer of the given substream.
106 * snd_pcm_lib_preallocate_free_for_all - release all pre-allocated buffers on the pcm
109 * Releases all the pre-allocated buffers on the given pcm.
229 * pre-allocate the buffer and create a proc file for the substream
247 * snd_pcm_lib_preallocate_pages - pre-allocation for the given DMA type
251 * @size: the requested pre-allocation size in bytes
252 * @max: the max. allowed pre-allocation size
254 * Do pre-allocation for the given DMA buffer type.
270 * snd_pcm_lib_preallocate_pages_for_all - pre-allocation for continuous memory type (all substreams)
274 * @size: the requested pre-allocation size in bytes
275 * @max: the max. allowed pre-allocation size
277 * Do pre-allocation to all substreams of the given pcm for the
356 dmab = &substream->dma_buffer; /* use the pre-allocated buffer */ snd_pcm_lib_malloc_pages()
/linux-4.1.27/drivers/media/i2c/cx25840/
H A Dcx25840-audio.c60 * 432 MHz pre-postdivide cx25840_set_audclk_freq()
66 * 196.6 MHz pre-postdivide cx25840_set_audclk_freq()
98 * 432 MHz pre-postdivide cx25840_set_audclk_freq()
104 * 271 MHz pre-postdivide cx25840_set_audclk_freq()
135 * 432 MHz pre-postdivide cx25840_set_audclk_freq()
141 * 295 MHz pre-postdivide cx25840_set_audclk_freq()
174 * 432 MHz pre-postdivide cx25840_set_audclk_freq()
180 * 246 MHz pre-postdivide cx25840_set_audclk_freq()
215 * 432 MHz pre-postdivide cx25840_set_audclk_freq()
221 * 271 MHz pre-postdivide cx25840_set_audclk_freq()
256 * 432 MHz pre-postdivide cx25840_set_audclk_freq()
262 * 295 MHz pre-postdivide cx25840_set_audclk_freq()
/linux-4.1.27/drivers/staging/lustre/lustre/include/
H A Dlustre_sec.h74 * <pre>
78 * </pre>
357 * Only used by pre-allocated request/reply pool.
395 * \pre req->rq_reqmsg point to request message.
396 * \pre req->rq_reqlen is the request message length.
408 * \pre req->rq_repdata point to reply message with signature.
409 * \pre req->rq_repdata_len is the total reply message length.
421 * \pre req->rq_reqmsg point to request message in clear text.
422 * \pre req->rq_reqlen is the request message length.
434 * \pre req->rq_repdata point to encrypted reply message.
435 * \pre req->rq_repdata_len is the total cipher text length.
448 * \pre bulk buffer is descripted by desc->bd_iov and
472 * \pre bulk buffer is descripted by desc->bd_iov/desc->bd_enc_iov and
620 * \pre req->rq_reqmsg == NULL.
621 * \pre req->rq_reqbuf == NULL, otherwise it must be pre-allocated,
635 * \pre req->rq_reqbuf != NULL.
645 * \pre req->rq_repbuf == NULL.
659 * \pre req->rq_repbuf != NULL.
673 * \pre req->rq_reqmsg->lm_buflens[segment] < newsize.
696 * \pre request message is pointed by req->rq_reqbuf, size is
715 * \pre reply message is pointed by req->rq_reply_state->rs_msg, size
736 * \pre if req->rq_reply_state != NULL, then it's pre-allocated, we
770 * \pre desc->bd_iov and desc->bd_iov_count describes the buffer
/linux-4.1.27/drivers/input/mouse/
H A Dhgpk.h12 HGPK_MODEL_PREA = 0x0a, /* pre-B1s */
/linux-4.1.27/arch/sh/lib64/
H A Dudelay.c4 * Delay routines, using a pre-computed "loops_per_jiffy" value.
/linux-4.1.27/arch/alpha/lib/
H A Dudelay.c4 * Delay routines, using a pre-computed "loops_per_jiffy" value.
/linux-4.1.27/lib/
H A Dcrc-t10dif.c64 MODULE_SOFTDEP("pre: crct10dif");
H A Dlibcrc32c.c77 MODULE_SOFTDEP("pre: crc32c");
H A Dsort.c50 /* pre-scale counters for performance */ sort()
H A Ddecompress_inflate.c5 /* prevent inclusion of _LINUX_KERNEL_H in pre-boot environment: lots
/linux-4.1.27/lib/xz/
H A Dxz_crc32.c21 * STATIC_RW_DATA is used in the pre-boot environment on some architectures.
/linux-4.1.27/sound/hda/
H A Darray.c14 * pre-allocated array size, re-allocate the array.
/linux-4.1.27/include/linux/
H A Ddelay.h7 * Delay routines, using a pre-computed "loops_per_jiffy" value.
H A Dprefetch.h18 prefetch(x) attempts to pre-emptively get the memory pointed to
/linux-4.1.27/drivers/staging/comedi/drivers/
H A Ds526.c233 /* Load the pre-load register high word */ s526_gpct_insn_config()
237 /* Load the pre-load register low word */ s526_gpct_insn_config()
271 /* Load the pre-load register 0 high word */ s526_gpct_insn_config()
275 /* Load the pre-load register 0 low word */ s526_gpct_insn_config()
284 /* Load the pre-load register 1 high word */ s526_gpct_insn_config()
288 /* Load the pre-load register 1 low word */ s526_gpct_insn_config()
314 /* Load the pre-load register 0 high word */ s526_gpct_insn_config()
318 /* Load the pre-load register 0 low word */ s526_gpct_insn_config()
327 /* Load the pre-load register 1 high word */ s526_gpct_insn_config()
331 /* Load the pre-load register 1 low word */ s526_gpct_insn_config()
365 @pre PULSE_PERIOD > PULSE_WIDTH > 0 s526_gpct_winsn()
/linux-4.1.27/drivers/media/dvb-frontends/
H A Ddrxk_hard.h196 u16 reference; /* pre SAW reference value, range 0 .. 31 */
197 bool use_pre_saw; /* TRUE algorithms must use pre SAW sense */
249 struct s_cfg_pre_saw m_vsb_pre_saw_cfg; /* settings for pre SAW sense */
294 struct s_cfg_pre_saw m_atv_pre_saw_cfg; /* settings for ATV pre SAW sense */
307 struct s_cfg_pre_saw m_qam_pre_saw_cfg; /* settings for QAM pre SAW sense */
319 struct s_cfg_pre_saw m_dvbt_pre_saw_cfg; /* settings for QAM pre SAW sense */
/linux-4.1.27/arch/x86/crypto/
H A Dsha1_ssse3_asm.S65 /* we keep window of 64 w[i]+K pre-calculated values in a circular buffer */
254 * RR does two rounds of SHA-1 back to back with W[] pre-calc
303 .set i, ((\r) % 80) # pre-compute for the next iteration
351 /* message scheduling pre-compute for rounds 0-15 */
366 /* message scheduling pre-compute for rounds 16-31
369 * - pre-calculate K+w[i] values and store to mem, for later load by ALU add
407 /* message scheduling pre-compute for rounds 32-79
H A Dsha1_avx2_x86_64_asm.S202 /* message scheduling pre-compute for rounds 0-15 */
225 * message scheduling pre-compute for rounds 16-31
227 * pre-calculate K+w[i] values and store to mem
H A Dcamellia-aesni-avx-asm_64.S480 /* load blocks to registers and apply pre-whitening */
503 /* byteslice pre-whitened blocks and store to temporary memory */
597 * pre-SubByte transform
599 * pre-lookup for sbox1, sbox2, sbox3:
618 * pre-SubByte transform
620 * pre-lookup for sbox4:
/linux-4.1.27/arch/x86/include/asm/
H A Dparavirt_types.h540 pre, post, ...) \
548 asm volatile(pre \
558 asm volatile(pre \
571 #define __PVOP_CALL(rettype, op, pre, post, ...) \
573 EXTRA_CLOBBERS, pre, post, ##__VA_ARGS__)
575 #define __PVOP_CALLEESAVE(rettype, op, pre, post, ...) \
578 pre, post, ##__VA_ARGS__)
581 #define ____PVOP_VCALL(op, clbr, call_clbr, extra_clbr, pre, post, ...) \
585 asm volatile(pre \
595 #define __PVOP_VCALL(op, pre, post, ...) \
598 pre, post, ##__VA_ARGS__)
600 #define __PVOP_VCALLEESAVE(op, pre, post, ...) \
603 pre, post, ##__VA_ARGS__)
H A Ddwarf2.h53 * Due to the structure of pre-exisiting code, don't use assembler line
/linux-4.1.27/drivers/clk/qcom/
H A Dclk-rcg.h61 * struct pre_div - pre-divider
62 * @pre_div_shift: lowest bit of pre divider field
87 * @p: pre divider
/linux-4.1.27/arch/microblaze/include/asm/
H A Dpgalloc.h43 extern unsigned long *zero_cache; /* head linked list of pre-zero'd pages */
44 extern atomic_t zero_sz; /* # currently pre-zero'd pages */
56 * return a pre-zero'd page from the list,
/linux-4.1.27/drivers/staging/lustre/lustre/fid/
H A Dfid_lib.c56 * <pre>
60 * </pre>
/linux-4.1.27/drivers/gpu/drm/sti/
H A Dsti_hdmi_tx3g4c28phy.c140 * To configure the source termination and pre-emphasis appropriately sti_hdmi_tx3g4c28phy_start()
166 * Default, power up the serializer with no pre-emphasis or sti_hdmi_tx3g4c28phy_start()
H A Dsti_hdmi_tx3g0c55phy.c263 * To configure the source termination and pre-emphasis appropriately sti_hdmi_tx3g0c55phy_start()
291 * Default, power up the serializer with no pre-emphasis or source sti_hdmi_tx3g0c55phy_start()
/linux-4.1.27/tools/perf/util/
H A Dparse-events.h41 PMU_EVENT_SYMBOL_PREFIX, /* prefix of pre-suf style event */
42 PMU_EVENT_SYMBOL_SUFFIX, /* suffix of pre-suf style event */
/linux-4.1.27/arch/sparc/lib/
H A DVISsave.S21 /* Nothing special need be done here to handle pre-emption, this
/linux-4.1.27/arch/unicore32/include/asm/
H A Ddelay.h12 * Delay routines, using a pre-computed "loops_per_second" value.
/linux-4.1.27/drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/
H A Dpll.h53 * for most pre nv50 cards setting a log2P of 7 (the common max_log2p
/linux-4.1.27/arch/mips/kernel/
H A Dcrash_dump.c23 * copying the data to a pre-allocated kernel page and then copying to user
H A Dmips-mt.c46 * Takes an argument which taken to be a pre-call MVPControl value.
99 tcstatval = flags; /* And pre-dump TCStatus is flags */ mips_mt_regdump()
/linux-4.1.27/arch/blackfin/include/asm/
H A Dtime.h14 * - CCLK is divided by a programmable 8-bit pre-scaler (TSCALE)
/linux-4.1.27/arch/ia64/include/asm/
H A Ddelay.h5 * Delay routines using a pre-computed "cycles/usec" value.
/linux-4.1.27/arch/ia64/kernel/
H A Dcrash_dump.c30 * copying the data to a pre-allocated kernel page and then copying to user
/linux-4.1.27/tools/perf/
H A Dbuiltin-list.c40 printf("\nList of pre-defined events (to be used in -e):\n\n"); cmd_list()
/linux-4.1.27/drivers/iio/adc/
H A Dqcom-spmi-vadc.c505 unsigned int pre; vadc_prescaling_from_dt() local
507 for (pre = 0; pre < ARRAY_SIZE(vadc_prescale_ratios); pre++) vadc_prescaling_from_dt()
508 if (vadc_prescale_ratios[pre].num == num && vadc_prescaling_from_dt()
509 vadc_prescale_ratios[pre].den == den) vadc_prescaling_from_dt()
512 if (pre == ARRAY_SIZE(vadc_prescale_ratios)) vadc_prescaling_from_dt()
515 return pre; vadc_prescaling_from_dt()
766 ret = of_property_read_u32_array(node, "qcom,pre-scaling", varr, 2); vadc_get_dt_channel_data()
770 dev_err(dev, "%02x invalid pre-scaling <%d %d>\n", vadc_get_dt_channel_data()
/linux-4.1.27/drivers/media/dvb-frontends/drx39xyj/
H A Ddrxj.h186 * /struct struct drxj_cfg_pre_saw * Interface to configure pre SAW sense.
190 u16 reference; /* pre SAW reference value, range 0 .. 31 */
191 bool use_pre_saw; /* true algorithms must use pre SAW sense */};
211 /**< no of pre RS bit errors */
213 /**< no of pre RS symbol errors */
215 /**< no of pre RS packet errors */
487 /**< qam pre SAW config */
489 /**< qam pre SAW config */
515 /**< atv pre SAW config */
529 /* OOB pre-saw value */
/linux-4.1.27/drivers/s390/scsi/
H A Dzfcp_dbf.h254 * @pay_buf: pre-allocated buffer for payload
255 * @rec_buf: pre-allocated buffer for recovery
256 * @hba_buf: pre-allocated buffer for hba
257 * @san_buf: pre-allocated buffer for san
258 * @scsi_buf: pre-allocated buffer for scsi
/linux-4.1.27/drivers/clk/bcm/
H A Dclk-kona.c688 * into account a divider and an optional pre-divider. The
689 * pre-divider register pointer may be NULL.
706 * If there is a pre-divider, divide the scaled parent rate clk_recalc_rate()
707 * by the pre-divider value first. In this case--to improve clk_recalc_rate()
708 * accuracy--scale the parent rate by *both* the pre-divider clk_recalc_rate()
710 * result of the pre-divider. clk_recalc_rate()
739 * into two dividers. The pre-divider can be NULL, and even if it's
741 * be nonexistent, and in that case the pre-divider is also ignored.
762 * If there is a pre-divider, divide the scaled parent rate round_rate()
763 * by the pre-divider value first. In this case--to improve round_rate()
764 * accuracy--scale the parent rate by *both* the pre-divider round_rate()
766 * result of the pre-divider. round_rate()
770 * For simplicity we treat the pre-divider as fixed (for now). round_rate()
1090 * pre-trigger we want to use that instead. kona_peri_clk_set_parent()
1102 trig == &data->pre_trig ? "pre-" : "", kona_peri_clk_set_parent()
1141 * pre-divider be, but for now we never actually try to kona_peri_clk_set_rate()
1156 * We aren't updating any pre-divider at this point, so kona_peri_clk_set_rate()
1214 * For the pre-divider and selector, the pre-trigger is used __peri_clk_init()
1221 pr_err("%s: error initializing pre-divider for %s\n", __func__, __peri_clk_init()
H A Dclk-kona.h229 * variable. If there are two dividers, they are the "pre-divider"
231 * there is no pre-divider.
367 * case, the "pre-trigger" will be used when changing a clock's
368 * selector and/or its pre-divider.
H A Dclk-kona-setup.c143 pr_err("%s: bad pre-divider offset for %s " peri_clk_data_offsets_valid()
171 pr_err("%s: bad pre-trigger offset for %s (%u > %u)\n", peri_clk_data_offsets_valid()
458 if (!div_valid(pre_div, "pre-divider", name)) peri_clk_data_valid()
461 pr_err("%s: pre-divider but no divider for %s\n", __func__, peri_clk_data_valid()
472 if (!trig_valid(trig, "pre-trigger", name)) { peri_clk_data_valid()
482 pr_err("%s: pre-trigger but no trigger for %s\n", __func__, peri_clk_data_valid()
/linux-4.1.27/drivers/media/pci/cx18/
H A Dcx18-av-audio.c80 /* xtal * 0xf.15f17f0/4 = 108 MHz: 432 MHz pre-postdiv*/ set_audclk_freq()
115 /* xtal * 0xf.15f17f0/4 = 108 MHz: 432 MHz pre-postdiv*/ set_audclk_freq()
150 /* xtal * 0xf.15f17f0/4 = 108 MHz: 432 MHz pre-postdiv*/ set_audclk_freq()
187 /* xtal * 0xf.15f17f0/4 = 108 MHz: 432 MHz pre-postdiv*/ set_audclk_freq()
226 /* xtal * 0xf.15f17f0/4 = 108 MHz: 432 MHz pre-postdiv*/ set_audclk_freq()
265 /* xtal * 0xf.15f17f0/4 = 108 MHz: 432 MHz pre-postdiv*/ set_audclk_freq()
/linux-4.1.27/arch/powerpc/kernel/
H A Dpci_dn.c322 * This is done depth first. As each node is processed, a "pre"
325 * The "pre" func returns a value. If non-zero is returned from
326 * the "pre" func, the traversal stops and this value is returned.
338 void *traverse_pci_devices(struct device_node *start, traverse_func pre, traverse_pci_devices() argument
354 if (pre && ((ret = pre(dn, data)) != NULL)) traverse_pci_devices()
/linux-4.1.27/drivers/staging/skein/
H A Dskein_iv.h11 ** They are pre-computed here only for speed; i.e., to
14 ** The IV for any fixed hash length may be pre-computed.
H A Dskein_base.c33 switch (hash_bit_len) { /* use pre-computed values, where available */ skein_256_init()
95 } else { /* here to pre-process a key */ skein_256_init_ext()
119 /* pre-pad cfg.w[] with zeroes */ skein_256_init_ext()
255 switch (hash_bit_len) { /* use pre-computed values, where available */ skein_512_init()
321 } else { /* here to pre-process a key */ skein_512_init_ext()
344 /* pre-pad cfg.w[] with zeroes */ skein_512_init_ext()
480 switch (hash_bit_len) { /* use pre-computed values, where available */ skein_1024_init()
540 } else { /* here to pre-process a key */ skein_1024_init_ext()
564 /* pre-pad cfg.w[] with zeroes */ skein_1024_init_ext()
/linux-4.1.27/drivers/gpu/drm/nouveau/dispnv04/
H A Ddisp.c164 * on pre-existing state, for now load the state of the card *before* nv04_display_init()
168 * save/restore "pre-load" state, but more general so we can save nv04_display_init()
/linux-4.1.27/drivers/watchdog/
H A Ddavinci_wdt.c96 /* Once the WDT is in pre-active state write to davinci_wdt_start()
100 /* put watchdog in pre-active state */ davinci_wdt_start()
/linux-4.1.27/include/linux/power/
H A Dsmb347-charger.h47 * @pre_charge_current: current (in uA) to use in pre-charging phase
51 * pre-charge to fast charge mode
/linux-4.1.27/arch/powerpc/include/uapi/asm/
H A Dbootx.h53 the map is optional and current BootX will only build it for pre-PCI
84 * On pre-PCI macintosh (BOOT_ARCH_PCI bit set to 0 in architecture), this
/linux-4.1.27/include/linux/mfd/
H A Drt5033-private.h163 /* RT5033 charger pre-charge current limits (as in CHGCTRL4 register), uA */
184 * RT5033 charger pre-charge threshold volt limits
/linux-4.1.27/drivers/net/vmxnet3/
H A Dupt1_defs.h46 /* the following counters are for pkts from the wire, i.e., pre-LRO */
/linux-4.1.27/drivers/scsi/qla2xxx/
H A Dtcm_qla2xxx.h8 * Number of pre-allocated per-session tags, based upon the worst-case
/linux-4.1.27/drivers/edac/
H A Dedac_module.h89 /* pre-process these away */
/linux-4.1.27/arch/x86/kernel/
H A Dcrash_dump_32.c47 * copying the data to a pre-allocated kernel page and then copying to user
/linux-4.1.27/arch/x86/mm/
H A Dmmio-mod.c73 * - pre/post callbacks assume the effect of is_enabled() being true.
117 * For some reason the pre/post pairs have been called in an
143 static void pre(struct kmmio_probe *p, struct pt_regs *regs, pre() function
256 .pre_handler = pre, ioremap_trace_core()
/linux-4.1.27/drivers/gpu/drm/msm/edp/
H A Dedp_phy.c62 /* voltage mode and pre emphasis cfg */ msm_edp_phy_vm_pe_init()
/linux-4.1.27/arch/microblaze/kernel/
H A Dmodule.c68 /* Split relocs only required/used pre gcc4.1.1 */ apply_relocate_add()
/linux-4.1.27/arch/sh/include/asm/
H A Dsuspend.h22 /* notifier chains for pre/post sleep hooks */ sh_mobile_setup_cpuidle()
/linux-4.1.27/arch/sh/include/cpu-sh5/cpu/
H A Dregisters.h18 ** Section 1: acts on assembly sources pre-processed by GPP ( <source.S>).
/linux-4.1.27/arch/mips/loongson/common/
H A Dpci.c57 /* size: 256M, burst transmission, pre-fetch enable, 64bit */ setup_pcimap()
/linux-4.1.27/arch/mips/pci/
H A Dpci-virtio-guest.c124 /* Virtio comes pre-assigned */ pci_virtio_guest_setup()
/linux-4.1.27/arch/powerpc/include/asm/
H A Dppc-pci.h37 void *traverse_pci_devices(struct device_node *start, traverse_func pre,
/linux-4.1.27/arch/hexagon/lib/
H A Dio.c64 /* Pretty sure len is pre-adjusted for the length of the access already */ __raw_readsl()
/linux-4.1.27/arch/m68k/amiga/
H A Damisound.c33 volatile unsigned short amiga_audio_min_period = 124; /* Default for pre-OCS */
/linux-4.1.27/fs/btrfs/
H A Dextent_map.h15 #define EXTENT_FLAG_PREALLOC 3 /* pre-allocated extent */
/linux-4.1.27/drivers/net/ethernet/cisco/enic/
H A Denic_pp.c229 /* If pre-associate is not part of an associate. enic_pp_preassociate_rr()
245 /* If pre-associate is not part of an associate. */ enic_pp_preassociate_rr()
268 /* Check if a pre-associate was called before */ enic_pp_associate()
/linux-4.1.27/drivers/crypto/vmx/
H A Dghashp8-ppc.pl92 stvx_u $xC2,0,r3 # save pre-computed table
113 lvx_u $Hl,r8,$Htbl # load pre-computed table
161 lvx_u $Hl,r8,$Htbl # load pre-computed table
/linux-4.1.27/arch/x86/kvm/
H A Dmmu_audit.c23 "pre page fault",
25 "pre pte write",
27 "pre sync",
/linux-4.1.27/arch/arm/mach-davinci/
H A Dclock.c304 /* If pre-PLL, source clock is before the multiplier and divider(s) */ clk_sysclk_recalc()
348 /* If pre-PLL, source clock is before the multiplier and divider(s) */ davinci_set_sysclk_rate()
436 /* pre-divider is fixed, but (some?) chips won't report that */ clk_pllclk_recalc()
475 * @prediv: The pre divider value. Passing 0 disables the pre-divider.
H A Dtime.c217 /* reset both timers, no pre-scaler for timer34 */ timer_init()
440 /* put watchdog in pre-active state */ davinci_watchdog_reset()
/linux-4.1.27/arch/arc/kernel/
H A Dkprobes.c226 /* If we have no pre-handler or it returned 0, we continue with arc_kprobe_handler()
227 * normal processing. If we have a pre-handler and it returned arc_kprobe_handler()
293 * pre/post handlers in the module.
325 * We are here because the instructions in the pre/post handler kprobe_fault_handler()
336 * We come here because instructions in the pre/post kprobe_fault_handler()
/linux-4.1.27/drivers/atm/
H A Deni.c1250 static int comp_tx(struct eni_dev *eni_dev,int *pcr,int reserved,int *pre, comp_tx() argument
1256 if (unlimited) *pre = *res = 0; comp_tx()
1261 for (*pre = 0; *pre < 3; (*pre)++) comp_tx()
1262 if (TS_CLOCK/pre_div[*pre]/64 <= *pcr) break; comp_tx()
1263 div = pre_div[*pre]**pcr; comp_tx()
1271 for (*pre = 3; *pre >= 0; (*pre)--) comp_tx()
1272 if (TS_CLOCK/pre_div[*pre]/64 > -*pcr) break; comp_tx()
1273 if (*pre < 3) (*pre)++; /* else fail later */ comp_tx()
1274 div = pre_div[*pre]*-*pcr; comp_tx()
1281 *pcr = TS_CLOCK/pre_div[*pre]/(*res+1); comp_tx()
1282 DPRINTK("out pcr: %d (%d:%d)\n",*pcr,*pre,*res); comp_tx()
1296 int pre,res,order; reserve_or_set_tx() local
1340 error = comp_tx(eni_dev,&rate,tx->reserved,&pre,&res,unlimited); reserve_or_set_tx()
1365 tx->prescaler = pre; reserve_or_set_tx()
H A Dhorizon.c593 u32 pre; make_rate() local
623 pre = DIV_ROUND_UP(br, c<<div); make_rate()
625 if (!pre) make_rate()
626 pre = 1; make_rate()
629 pre = DIV_ROUND_CLOSEST(br, c<<div); make_rate()
631 if (!pre) make_rate()
632 pre = 1; make_rate()
635 pre = br/(c<<div); make_rate()
637 if (!pre) make_rate()
640 PRINTD (DBG_QOS, "A: p=%u, d=%u", pre, div); make_rate()
656 pre = DIV_ROUND_UP(br, c<<div); make_rate()
659 pre = DIV_ROUND_CLOSEST(br, c<<div); make_rate()
662 pre = br/(c<<div); make_rate()
664 PRINTD (DBG_QOS, "B: p=%u, d=%u", pre, div); make_rate()
674 pre = 1 << CR_MAXPEXP; make_rate()
675 PRINTD (DBG_QOS, "C: p=%u, d=%u", pre, div); make_rate()
678 if (div > CR_MAXD || (!pre) || pre > 1<<CR_MAXPEXP) { make_rate()
680 div, pre); make_rate()
684 *bits = (div<<CLOCK_SELECT_SHIFT) | (pre-1); make_rate()
686 *actual = DIV_ROUND_UP(br, pre<<div); make_rate()
/linux-4.1.27/drivers/net/wireless/ath/ath5k/
H A Dpci.c173 * L0s will be disabled when a pre 1.1 PCIe device is detected. We do ath5k_pci_probe()
174 * know L1 works correctly even for all ath5k pre 1.1 PCIe devices ath5k_pci_probe()
180 * drivers to override blacklists for pre 1.1 PCIe but for now it is ath5k_pci_probe()
/linux-4.1.27/drivers/md/
H A Ddm-bio-prison.h67 * Returns 1 if pre-existing cell returned, zero if new cell created using
/linux-4.1.27/drivers/i2c/
H A Di2c-boardinfo.c2 * i2c-boardinfo.c - collect pre-declarations of I2C devices
/linux-4.1.27/drivers/ide/
H A Dide-generic.c65 /* Cyrix CS55{1,2}0 pre SFF MWDMA ATA on the bridge */ for_each_pci_dev()
H A Dide-timings.c93 /* conservative "downgrade" for all pre-ATA2 drives */ ide_pio_cycle_time()
/linux-4.1.27/drivers/media/platform/exynos-gsc/
H A Dgsc-regs.h118 /* G-Scaler pre scale ratio */
/linux-4.1.27/drivers/staging/unisys/common-spar/include/channels/
H A Dvbuschannel.h41 * channel struct so as to break pre-existing software. Note that you can
/linux-4.1.27/drivers/clocksource/
H A Dcadence_ttc_timer.c35 * common to all the timer channels (T1, T2, and T3). With a pre-scaler of 32,
39 * obtained from device tree. The pre-scaler of 32 is used.
60 * Setup the timers to use pre-scaling, using a fixed value for now that will
299 /* scale up: pre-change notification did the adjustment */ ttc_rate_change_clocksource_cb()
H A Dtimer-keystone.c200 /* reset timer as 64-bit, no pre-scaler, plus features are disabled */ keystone_timer_init()
/linux-4.1.27/arch/x86/xen/
H A Dxen-asm_64.S4 * versions, with the pre- and post-amble chopped off.
H A Dxen-asm.S4 * versions, with the pre- and post-amble chopped off.
/linux-4.1.27/arch/sh/kernel/cpu/shmobile/
H A Dpm.c22 * Notifier lists for pre/post sleep notification
/linux-4.1.27/arch/sh/mm/
H A Dioremap.c58 * PMB entries are all pre-faulted. __ioremap_caller()
H A Dtlb-sh5.c118 * pre-allocated TLB slot @config_addr (see sh64_get_wired_dtlb_entry).
H A Dcache-sh5.c104 Also, note the risk that we might get pre-empted between the ASID sh64_icache_inv_user_page()
333 /* As long as the kernel is not pre-emptible, this doesn't need to be sh64_dcache_purge_coloured_phy_page()
364 /* As long as the kernel is not pre-emptible, this doesn't need to be sh64_dcache_purge_phy_page()
/linux-4.1.27/arch/sparc/include/asm/
H A Dspinlock_64.h21 * the spinner sections must be pre-V9 branches.
/linux-4.1.27/arch/tile/include/asm/
H A Dirq.h65 * allocate a new IRQ or discover an IRQ that was pre-allocated by the
/linux-4.1.27/arch/x86/ia32/
H A Dia32_signal.c156 unsigned int pre = GET_SEG(seg); \
158 pre |= 3; \
159 if (pre != cur) \
160 set_user_seg(seg, pre); \
/linux-4.1.27/arch/powerpc/platforms/cell/spufs/
H A Dspu_utils.h99 * pre-canned DMA-list in local storage. build_dma_list()
/linux-4.1.27/arch/mn10300/unit-asb2364/
H A Dunit-init.c101 * storm from stuff it was doing pre-reset */ unit_setup()
/linux-4.1.27/arch/arm64/kernel/
H A Dhyp-stub.S94 * If not, there is a pre-existing hypervisor, some CPUs failed to boot, or
/linux-4.1.27/arch/ia64/
H A DMakefile38 a source-tree that post-dates 18-Dec-2002. You can find a pre-compiled \
/linux-4.1.27/arch/m68k/include/asm/
H A Ddelay.h10 * Delay routines, using a pre-computed "loops_per_jiffy" value.
/linux-4.1.27/arch/arm/mach-omap2/
H A Dsdrc.c72 * Return pre-calculated values for the SDRC_ACTIM_CTRLA,
H A Dsdrc.h65 * This structure holds a pre-computed set of register values for the
67 * intended to be pre-computed and specified in an array in the board-*.c
H A Dsleep24xx.S45 * R0 : DLL ctrl value pre-Sleep
/linux-4.1.27/arch/arm/mach-lpc32xx/
H A Dserial.c91 /* pre-UART clock divider set to 1 */ lpc32xx_serial_init()
/linux-4.1.27/samples/kprobes/
H A Dkprobe_example.c74 * instruction within the pre- or post-handler, or when Kprobes
/linux-4.1.27/security/integrity/ima/
H A Dima_queue.c17 * in the pre-configured TPM PCR (if available).
/linux-4.1.27/include/drm/
H A Di915_drm.h41 * fb aperture size and the amount of pre-reserved memory.
/linux-4.1.27/drivers/staging/lustre/lustre/obdclass/
H A Dcl_page.c849 * \pre !cl_page_is_owned(pg, io)
928 * \pre !cl_page_is_owned(pg, io)
956 * \pre cl_page_is_owned(pg, io)
983 * \pre cl_page_is_owned(pg, io)
1006 * \pre cl_page_is_owned(pg, io)
1094 * \pre pg == cl_page_top(pg)
1095 * \pre VM page is locked
1228 * \pre pg->cp_state == CPS_PAGEIN || pg->cp_state == CPS_PAGEOUT
1276 * \pre pg->cp_state == CPS_CACHED
1309 * \pre cl_page_is_owned(pg, io)
1343 * \pre cl_page_is_owned(pg, io)
H A Dcl_lock.c402 * \pre state: CLS_CACHED, CLS_HELD or CLS_ENQUEUED
713 * \pre cl_lock_is_mutexed(lock)
919 * \pre cl_lock_is_mutexed(lock)
1281 * \pre current thread or io owns a hold on lock.
1464 * \pre current thread or io owns a hold on the lock
1465 * \pre ergo(result == 0, lock->cll_state == CLS_ENQUEUED ||
1713 * \pre atomic_read(&lock->cll_ref) > 0
1714 * \pre ergo(cl_lock_nesting(lock) == CNL_TOP,
1743 * \pre atomic_read(&lock->cll_ref) > 0
/linux-4.1.27/drivers/net/wireless/prism54/
H A Dislpci_dev.h39 PRV_STATE_PREBOOT, /* we are in a pre-boot state (empty RAM) */
42 PRV_STATE_PREINIT, /* pre-init state */
/linux-4.1.27/drivers/spi/
H A Dspi-imx.c252 * there are two 4-bit dividers, the pre-divider divides by mx51_ecspi_clkdiv()
253 * $pre, the post-divider by 2^$post mx51_ecspi_clkdiv()
255 unsigned int pre, post; mx51_ecspi_clkdiv() local
273 pre = DIV_ROUND_UP(fin, fspi << post) - 1; mx51_ecspi_clkdiv()
275 pr_debug("%s: fin: %u, fspi: %u, post: %u, pre: %u\n", mx51_ecspi_clkdiv()
276 __func__, fin, fspi, post, pre); mx51_ecspi_clkdiv()
279 *fres = (fin / (pre + 1)) >> post; mx51_ecspi_clkdiv()
281 return (pre << MX51_ECSPI_CTRL_PREDIV_OFFSET) | mx51_ecspi_clkdiv()
/linux-4.1.27/drivers/staging/vt6655/
H A Ddesc.h164 * ref_sk_buff is used for mapping the skb structure between pre-built
166 * change skb structure, i.e. pre-built driver-obj may link to older skb that
/linux-4.1.27/drivers/net/wireless/brcm80211/brcmsmac/
H A Dampdu.c52 #define NUM_FFPLD_FIFO 4 /* number of fifo concerned by pre-loading */
79 /* structure to hold tx fifo information and pre-loading state
85 * ampdu_pld_size: number of bytes to be pre-loaded
353 * Return 1 if pre-loading not active, -1 if not an underflow event,
354 * 0 if pre-loading module took care of the event.
454 "pre-load size %d\n", brcms_c_ffpld_check_txfunfl()
919 * try tuning pre-loading or ampdu size brcms_c_ampdu_dotxstatus_complete()
923 * if there were underflows, but pre-loading brcms_c_ampdu_dotxstatus_complete()
H A Dpmu.c55 /* ALP clock on pre-PMU chips */
/linux-4.1.27/drivers/usb/host/
H A Dohci-pci.c157 /* SB800 needs pre-fetch fix */ ohci_quirk_amd700()
315 MODULE_SOFTDEP("pre: ehci_pci");
/linux-4.1.27/fs/nfsd/
H A Dnfsfh.h38 unsigned char fh_pre_saved; /* pre-op attrs saved */
45 * pre-op nfsv4 change attr: note must check IS_I_VERSION(inode)
/linux-4.1.27/arch/powerpc/platforms/pseries/
H A Dhvcserver.c113 * @pi_buff: A page sized buffer pre-allocated prior to calling this function
119 * The pi_buff is pre-allocated prior to calling this function because this
H A Dio_event_irq.c114 * event type, and sub-type. There is no easy way to pre-sort clients
/linux-4.1.27/arch/arm64/include/asm/
H A Dkvm_mmu.h47 * pre-allocated (we pre-allocate the fake PGD and the PUD when the Stage-2
/linux-4.1.27/arch/m32r/kernel/
H A Dhead.S87 addi r2, #-4 ; account for pre-inc store
95 addi r2, #4 ; account for pre-inc store
/linux-4.1.27/arch/arm/mm/
H A Dcache-tauros2.c32 * being used on a pre-v7 CPU, and we only need to build support for
34 * configured to support a pre-v7 CPU.
/linux-4.1.27/arch/s390/kernel/
H A Dkprobes.c308 * processing. That includes the calls to the pre/post handlers kprobe_handler()
319 * active. This can happen in the pre and post kprobe_handler()
331 * If we have no pre-handler or it returned 0, we kprobe_handler()
333 * pre-handler and it returned non-zero, it prepped kprobe_handler()
595 * We come here because instructions in the pre/post kprobe_trap_handler()
/linux-4.1.27/drivers/staging/lustre/lustre/ldlm/
H A Dldlm_pool.c94 * give a possibility for constructing few pre-defined behavior policies. If
219 * \pre ->pl_lock is locked.
239 * \pre ->pl_lock is locked.
283 * \pre ->pl_lock is locked.
329 * \pre ->pl_lock is not locked.
960 * \pre ->pl_lock is not locked.
976 * \pre ->pl_lock is not locked.
989 * \pre ->pl_lock is not locked.
1005 * \pre ->pl_lock is not locked.
/linux-4.1.27/drivers/scsi/lpfc/
H A Dlpfc_sli.h54 uint16_t iotag; /* pre-assigned IO tag */
55 uint16_t sli4_lxritag; /* logical pre-assigned XRI. */
56 uint16_t sli4_xritag; /* pre-assigned XRI, (OXID) tag. */
H A Dlpfc_sli4.h631 uint16_t iotag; /* pre-assigned IO tag */
632 uint16_t sli4_lxritag; /* logical pre-assigned xri. */
633 uint16_t sli4_xritag; /* pre-assigned XRI, (OXID) tag. */
634 struct sli4_sge *sgl; /* pre-assigned SGL */
/linux-4.1.27/drivers/usb/serial/
H A Dkeyspan.h126 /* Product IDs for the products supported, pre-renumeration */
497 /* usb_device_id table for the pre-firmware download keyspan devices */
540 /* Structs for the devices, pre and post renumeration. */
/linux-4.1.27/drivers/uwb/i1480/dfu/
H A Dmac.c25 * code to upload pre and mac firmwares is the same, so it uses a
361 * Upload a pre-PHY firmware
448 * This has to be called after the pre fw has been uploaded (if
/linux-4.1.27/fs/jfs/
H A Dresize.c367 * s.t. logredo() can reconstruct pre-extension state jfs_extendfs()
454 * crash before it to pre-extension state; jfs_extendfs()
463 * logredo() will recover to pre-extendfs state; jfs_extendfs()
/linux-4.1.27/drivers/mtd/maps/
H A Dlantiq-flash.c78 * section. As memcpy() makes use of pre-fetching we cannot use it here.
/linux-4.1.27/drivers/net/
H A DSpace.c16 * - get rid of pre-linked dev list, dynamic device allocation
/linux-4.1.27/drivers/media/pci/pt3/
H A Dpt3_i2c.c154 /* send [pre-]translated i2c msgs stored at addr */ send_i2c_cmd()
/linux-4.1.27/drivers/message/fusion/
H A Dmptlan.h76 /* Override mptbase.h by pre-defining these! */
/linux-4.1.27/drivers/misc/
H A Datmel_tclib.c40 * pre-initialized struct atmel_tc is returned. The caller can access
/linux-4.1.27/drivers/net/wireless/iwlwifi/dvm/
H A Dled.c90 "use pre-defined blinking time\n"); iwl_blink_compensation()
/linux-4.1.27/drivers/net/wireless/rt2x00/
H A Drt2500usb.h509 * BBP pre-TX registers.
510 * PHY_CSR5: BBP pre-TX CCK.
517 * BBP pre-TX registers.
518 * PHY_CSR6: BBP pre-TX OFDM.
/linux-4.1.27/drivers/scsi/isci/
H A Dprobe_roms.c141 * deprecated: override default amp_control for pre-preproduction isci_request_firmware()
/linux-4.1.27/drivers/scsi/ufs/
H A Dufs-qcom.h32 /* vendor specific pre-defined parameters */
H A Dufshcd.h318 * struct ufs_init_prefetch - contains data that is pre-fetched once during
360 * @is_init_prefetch: flag to check if data was pre-fetched in initialization
361 * @init_prefetch_data: data pre-fetched during initialization
/linux-4.1.27/drivers/cpufreq/
H A Ddavinci-cpufreq.c117 * to pre/post change notification list. davinci_cpu_init()
/linux-4.1.27/crypto/
H A Ddeflate.c16 * current zlib kernel code uses a worst case pre-allocation system by default.
/linux-4.1.27/drivers/acpi/
H A Dsleep.c599 * pre-ACPI 2.0 suspend ordering has been requested.
611 * The following callbacks are used if the pre-ACPI 2.0 suspend ordering has
749 * function is used if the pre-ACPI 2.0 suspend ordering has been
776 * The following callbacks are used if the pre-ACPI 2.0 suspend ordering has
/linux-4.1.27/drivers/ata/
H A Dpata_opti.c102 * the FreeBSD driver then pre computed to keep the code clean. There
/linux-4.1.27/fs/xfs/libxfs/
H A Dxfs_log_rlimit.c55 * the maximum one in terms of the pre-calculated values which were done
H A Dxfs_trans_resv.h24 * structure for maintaining pre-calculated transaction reservations.
/linux-4.1.27/include/linux/netfilter/
H A Dnf_conntrack_pptp.h37 /* in pre-2.6.11 this used to be per-expect. Now it is per-conntrack
/linux-4.1.27/include/linux/raid/
H A Dpq.h22 /* We need a pre-zeroed page... if we don't want to use the kernel-provided
/linux-4.1.27/kernel/bpf/
H A Darraymap.c105 /* all elements were pre-allocated, cannot insert a new one */ array_map_update_elem()
/linux-4.1.27/arch/sh/drivers/
H A Dheartbeat.c7 * be independently controlled (either via a pre-defined hardware
/linux-4.1.27/arch/nios2/kernel/
H A Dmisaligned.c226 /* pre-calc offsets of registers on sys call stack frame */ misaligned_calc_reg_offsets()
/linux-4.1.27/arch/parisc/math-emu/
H A Ddfsqrt.c152 /* correct exponent for pre-shift */ dbl_fsqrt()
H A Dsfsqrt.c145 /* correct exponent for pre-shift */ sgl_fsqrt()
/linux-4.1.27/arch/arm64/lib/
H A Dmemmove.S169 /* pre-load 64 bytes data. */
/linux-4.1.27/arch/hexagon/include/uapi/asm/
H A Dregisters.h20 unsigned long vmest; /* Event context - pre-event SSR values */
/linux-4.1.27/arch/m32r/boot/compressed/
H A Dhead.S106 addi r2, #-4 ; account for pre-inc store
/linux-4.1.27/arch/m68k/mm/
H A Dfault.c104 pre-decrement on the stack and that doesn't show up do_page_fault()
/linux-4.1.27/arch/arm/probes/kprobes/
H A Dcore.c273 /* A pre- or post-handler probe got us here. */ kprobe_handler()
291 * If we have no pre-handler or it returned 0, we kprobe_handler()
293 * pre-handler and it returned non-zero, it prepped kprobe_handler()
377 * We come here because instructions in the pre/post kprobe_fault_handler()
/linux-4.1.27/arch/arm/kernel/
H A Dreboot.c135 * executing pre-reset code, and using RAM that the primary CPU's code wishes
/linux-4.1.27/arch/arm/mach-bcm/
H A Dbcm_kona_smc.c141 /* __bcm_kona_smc() should only run on CPU 0, with pre-emption disabled */ __bcm_kona_smc()
/linux-4.1.27/net/core/
H A Dlink_watch.c81 /* Handle pre-registration link state changes */ linkwatch_init_dev()
/linux-4.1.27/security/apparmor/
H A Dprocattr.c135 * separated by a \0. Ie. userspace writes them pre tokenized aa_setprocattr_changehat()
/linux-4.1.27/include/crypto/
H A Drng.h145 * pre-defined threshold.
/linux-4.1.27/include/linux/i2c/
H A Dsx150x.h59 * pre-existing IRQ line.
/linux-4.1.27/drivers/i2c/busses/
H A Di2c-ali1563.c72 dev_dbg(&a->dev, "Transaction (pre): STS=%02x, CNTL1=%02x, " ali1563_transaction()
137 dev_dbg(&a->dev, "Block (pre): STS=%02x, CNTL1=%02x, " ali1563_block_start()
/linux-4.1.27/drivers/media/pci/ivtv/
H A Divtv-firmware.c122 IVTV_DEBUG_INFO("init Encoder SDRAM pre-charge\n"); ivtv_halt_firmware()
129 IVTV_DEBUG_INFO("init Decoder SDRAM pre-charge\n"); ivtv_halt_firmware()
/linux-4.1.27/drivers/misc/echo/
H A Decho.h69 low complexity filter is adequate for this, so pre-whitening adds little to the
72 An FIR filter adapted using pre-whitened NLMS performs well, provided certain
/linux-4.1.27/drivers/staging/rtl8188eu/include/
H A Drtl8188e_hal.h157 /* 9bytes + 1byt + 5bytes and pre 1byte. */
177 /* 9bytes + 1byt + 5bytes and pre 1byte. */
/linux-4.1.27/drivers/net/wireless/ath/carl9170/
H A Dwlan.h186 * Beware of compiler bugs in all gcc pre 4.4!
217 * Beware of compiler bugs in all gcc pre 4.4!
/linux-4.1.27/drivers/gpu/drm/nouveau/nvkm/engine/disp/
H A Ddport.c280 /* pre-train script */ dp_link_train_init()
358 /* enable down-spreading and execute pre-train script from vbios */ nvkm_dp_train()
/linux-4.1.27/drivers/acpi/acpica/
H A Dtbxface.c79 * PARAMETERS: initial_table_array - Pointer to an array of pre-allocated
85 * pre-allocated array is allowed. Ignored
/linux-4.1.27/fs/sysfs/
H A Dgroup.c261 * sysfs_merge_group - merge files into a pre-existing attribute group.
294 * sysfs_unmerge_group - remove files from a pre-existing attribute group.
/linux-4.1.27/arch/powerpc/platforms/pasemi/
H A Dsetup.c49 /* SDC reset register, must be pre-mapped at reset time */
52 /* Various error status registers, must be pre-mapped at MCE time */
/linux-4.1.27/arch/powerpc/platforms/powermac/
H A Dcache.S104 /* Set to data-only (pre-745x bit) */
153 /* Invalidate L2. This is pre-745x, we clear the L2I bit ourselves */
/linux-4.1.27/arch/powerpc/sysdev/
H A Dfsl_lbc.c89 * fsl_upm_find - find pre-programmed UPM via base address
153 * pre-programmed AMX bits in the UPM RAM.
/linux-4.1.27/arch/powerpc/crypto/
H A Daes-spe-core.S61 * via bl/blr. It expects that caller has pre-xored input data with first
209 * via bl/blr. It expects that caller has pre-xored input data with first
/linux-4.1.27/arch/c6x/platforms/
H A Dpll.c226 /* If pre-PLL, source clock is before the multiplier and divider(s) */ clk_sysclk_recalc()
314 pr_debug("PLL%d: input = %luMHz, pre[%d] mul[%d] post[%d] " clk_pllclk_recalc()
/linux-4.1.27/mm/
H A Dpercpu-vm.c16 /* must not be used on pre-mapped chunk */ pcpu_chunk_page()
149 * proper pre/post flush functions.
/linux-4.1.27/drivers/mmc/host/
H A Drtsx_pci_sdmmc.c155 * @pre: if called in pre_req()
161 struct mmc_data *data, bool pre) sd_pre_dma_transfer()
168 if (!pre && data->host_cookie && data->host_cookie != host->cookie) { sd_pre_dma_transfer()
175 if (pre || data->host_cookie != host->cookie) { sd_pre_dma_transfer()
182 if (pre) { sd_pre_dma_transfer()
208 dev_dbg(sdmmc_dev(host), "pre dma sg: %d\n", host->cookie_sg_count); sdmmc_pre_req()
160 sd_pre_dma_transfer(struct realtek_pci_sdmmc *host, struct mmc_data *data, bool pre) sd_pre_dma_transfer() argument
/linux-4.1.27/drivers/video/fbdev/
H A Dpm3fb.c157 int f, pre, post; pm3fb_calculate_clock() local
163 for (pre = 1; pre < 256; pre++) { pm3fb_calculate_clock()
165 freq = ((2*PM3_REF_CLOCK * f) >> post) / pre; pm3fb_calculate_clock()
172 *prescale = pre; pm3fb_calculate_clock()
/linux-4.1.27/kernel/rcu/
H A Dsrcu.c178 * Return true if the number of pre-existing readers is determined to
208 * zero even though there is a pre-existing reader throughout. srcu_readers_active_idx_check()
335 * @@@ Wait until all pre-existing readers complete. Such readers
354 * us to wait for pre-existing readers in a starvation-free manner.
366 * all pre-existing SRCU read-side critical section. On systems with
608 * pre-existing readers using both idx values. They are therefore srcu_advance_batches()
/linux-4.1.27/arch/powerpc/platforms/512x/
H A Dclock-commonclk.c924 * pre-enable those "internal" clock items which never get mpc512x_clk_setup_clock_tree()
955 * pre-enable those clock items which are not yet appropriately mpc5121_clk_provide_migration_support()
964 * so we "pre-enable" the clock here, to not have the clock mpc5121_clk_provide_migration_support()
967 * this PCI clock pre-enable workaround only applies when there mpc5121_clk_provide_migration_support()
1085 * silent and non-fatal, and pre-enable the clock item here such
/linux-4.1.27/drivers/media/i2c/
H A Dmsp3400-driver.c754 /* Has scart4 input: not in pre D revisions, not in stripped D revs */ msp_probe()
761 /* Has scart2 a volume control? Not in pre-D revisions. */ msp_probe()
767 /* Has subwoofer output: not in pre-D revs and not in stripped down msp_probe()
/linux-4.1.27/drivers/bus/
H A Dmips_cdmm.c281 * pre-emption or by running from a pinned kernel thread.
340 * pre-emption or by running from a pinned kernel thread.
426 * pre-emption or by running from a pinned kernel thread.

Completed in 6236 milliseconds

123456