1/*
2 * VISsave.S: Code for saving FPU register state for
3 *            VIS routines. One should not call this directly,
4 *            but use macros provided in <asm/visasm.h>.
5 *
6 * Copyright (C) 1998 Jakub Jelinek (jj@ultra.linux.cz)
7 */
8
9#include <asm/asi.h>
10#include <asm/page.h>
11#include <asm/ptrace.h>
12#include <asm/visasm.h>
13#include <asm/thread_info.h>
14
15	.text
16	.globl		VISenter, VISenterhalf
17
18	/* On entry: %o5=current FPRS value, %g7 is callers address */
19	/* May clobber %o5, %g1, %g2, %g3, %g7, %icc, %xcc */
20
21	/* Nothing special need be done here to handle pre-emption, this
22	 * FPU save/restore mechanism is already preemption safe.
23	 */
24
25	.align		32
26VISenter:
27	ldub		[%g6 + TI_FPDEPTH], %g1
28	brnz,a,pn	%g1, 1f
29	 cmp		%g1, 1
30	stb		%g0, [%g6 + TI_FPSAVED]
31	stx		%fsr, [%g6 + TI_XFSR]
329:	jmpl		%g7 + %g0, %g0
33	 nop
341:	bne,pn		%icc, 2f
35
36	 srl		%g1, 1, %g1
37vis1:	ldub		[%g6 + TI_FPSAVED], %g3
38	stx		%fsr, [%g6 + TI_XFSR]
39	or		%g3, %o5, %g3
40	stb		%g3, [%g6 + TI_FPSAVED]
41	rd		%gsr, %g3
42	clr		%g1
43	ba,pt		%xcc, 3f
44
45	 stx		%g3, [%g6 + TI_GSR]
462:	add		%g6, %g1, %g3
47	mov		FPRS_DU | FPRS_DL | FPRS_FEF, %o5
48	sll		%g1, 3, %g1
49	stb		%o5, [%g3 + TI_FPSAVED]
50	rd		%gsr, %g2
51	add		%g6, %g1, %g3
52	stx		%g2, [%g3 + TI_GSR]
53
54	add		%g6, %g1, %g2
55	stx		%fsr, [%g2 + TI_XFSR]
56	sll		%g1, 5, %g1
573:	andcc		%o5, FPRS_DL|FPRS_DU, %g0
58	be,pn		%icc, 9b
59	 add		%g6, TI_FPREGS, %g2
60	andcc		%o5, FPRS_DL, %g0
61
62	be,pn		%icc, 4f
63	 add		%g6, TI_FPREGS+0x40, %g3
64	membar		#Sync
65	stda		%f0, [%g2 + %g1] ASI_BLK_P
66	stda		%f16, [%g3 + %g1] ASI_BLK_P
67	membar		#Sync
68	andcc		%o5, FPRS_DU, %g0
69	be,pn		%icc, 5f
704:	 add		%g1, 128, %g1
71	membar		#Sync
72	stda		%f32, [%g2 + %g1] ASI_BLK_P
73
74	stda		%f48, [%g3 + %g1] ASI_BLK_P
755:	membar		#Sync
76	ba,pt		%xcc, 80f
77	 nop
78
79	.align		32
8080:	jmpl		%g7 + %g0, %g0
81	 nop
82