1/* 2 * OHCI HCD (Host Controller Driver) for USB. 3 * 4 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at> 5 * (C) Copyright 2000-2002 David Brownell <dbrownell@users.sourceforge.net> 6 * 7 * [ Initialisation is based on Linus' ] 8 * [ uhci code and gregs ohci fragments ] 9 * [ (C) Copyright 1999 Linus Torvalds ] 10 * [ (C) Copyright 1999 Gregory P. Smith] 11 * 12 * PCI Bus Glue 13 * 14 * This file is licenced under the GPL. 15 */ 16 17#include <linux/io.h> 18#include <linux/kernel.h> 19#include <linux/module.h> 20#include <linux/pci.h> 21#include <linux/usb.h> 22#include <linux/usb/hcd.h> 23 24#include "ohci.h" 25#include "pci-quirks.h" 26 27#define DRIVER_DESC "OHCI PCI platform driver" 28 29static const char hcd_name[] = "ohci-pci"; 30 31 32/*-------------------------------------------------------------------------*/ 33 34static int broken_suspend(struct usb_hcd *hcd) 35{ 36 device_init_wakeup(&hcd->self.root_hub->dev, 0); 37 return 0; 38} 39 40/* AMD 756, for most chips (early revs), corrupts register 41 * values on read ... so enable the vendor workaround. 42 */ 43static int ohci_quirk_amd756(struct usb_hcd *hcd) 44{ 45 struct ohci_hcd *ohci = hcd_to_ohci (hcd); 46 47 ohci->flags = OHCI_QUIRK_AMD756; 48 ohci_dbg (ohci, "AMD756 erratum 4 workaround\n"); 49 50 /* also erratum 10 (suspend/resume issues) */ 51 return broken_suspend(hcd); 52} 53 54/* Apple's OHCI driver has a lot of bizarre workarounds 55 * for this chip. Evidently control and bulk lists 56 * can get confused. (B&W G3 models, and ...) 57 */ 58static int ohci_quirk_opti(struct usb_hcd *hcd) 59{ 60 struct ohci_hcd *ohci = hcd_to_ohci (hcd); 61 62 ohci_dbg (ohci, "WARNING: OPTi workarounds unavailable\n"); 63 64 return 0; 65} 66 67/* Check for NSC87560. We have to look at the bridge (fn1) to 68 * identify the USB (fn2). This quirk might apply to more or 69 * even all NSC stuff. 70 */ 71static int ohci_quirk_ns(struct usb_hcd *hcd) 72{ 73 struct pci_dev *pdev = to_pci_dev(hcd->self.controller); 74 struct pci_dev *b; 75 76 b = pci_get_slot (pdev->bus, PCI_DEVFN (PCI_SLOT (pdev->devfn), 1)); 77 if (b && b->device == PCI_DEVICE_ID_NS_87560_LIO 78 && b->vendor == PCI_VENDOR_ID_NS) { 79 struct ohci_hcd *ohci = hcd_to_ohci (hcd); 80 81 ohci->flags |= OHCI_QUIRK_SUPERIO; 82 ohci_dbg (ohci, "Using NSC SuperIO setup\n"); 83 } 84 pci_dev_put(b); 85 86 return 0; 87} 88 89/* Check for Compaq's ZFMicro chipset, which needs short 90 * delays before control or bulk queues get re-activated 91 * in finish_unlinks() 92 */ 93static int ohci_quirk_zfmicro(struct usb_hcd *hcd) 94{ 95 struct ohci_hcd *ohci = hcd_to_ohci (hcd); 96 97 ohci->flags |= OHCI_QUIRK_ZFMICRO; 98 ohci_dbg(ohci, "enabled Compaq ZFMicro chipset quirks\n"); 99 100 return 0; 101} 102 103/* Check for Toshiba SCC OHCI which has big endian registers 104 * and little endian in memory data structures 105 */ 106static int ohci_quirk_toshiba_scc(struct usb_hcd *hcd) 107{ 108 struct ohci_hcd *ohci = hcd_to_ohci (hcd); 109 110 /* That chip is only present in the southbridge of some 111 * cell based platforms which are supposed to select 112 * CONFIG_USB_OHCI_BIG_ENDIAN_MMIO. We verify here if 113 * that was the case though. 114 */ 115#ifdef CONFIG_USB_OHCI_BIG_ENDIAN_MMIO 116 ohci->flags |= OHCI_QUIRK_BE_MMIO; 117 ohci_dbg (ohci, "enabled big endian Toshiba quirk\n"); 118 return 0; 119#else 120 ohci_err (ohci, "unsupported big endian Toshiba quirk\n"); 121 return -ENXIO; 122#endif 123} 124 125/* Check for NEC chip and apply quirk for allegedly lost interrupts. 126 */ 127 128static void ohci_quirk_nec_worker(struct work_struct *work) 129{ 130 struct ohci_hcd *ohci = container_of(work, struct ohci_hcd, nec_work); 131 int status; 132 133 status = ohci_restart(ohci); 134 if (status != 0) 135 ohci_err(ohci, "Restarting NEC controller failed in %s, %d\n", 136 "ohci_restart", status); 137} 138 139static int ohci_quirk_nec(struct usb_hcd *hcd) 140{ 141 struct ohci_hcd *ohci = hcd_to_ohci (hcd); 142 143 ohci->flags |= OHCI_QUIRK_NEC; 144 INIT_WORK(&ohci->nec_work, ohci_quirk_nec_worker); 145 ohci_dbg (ohci, "enabled NEC chipset lost interrupt quirk\n"); 146 147 return 0; 148} 149 150static int ohci_quirk_amd700(struct usb_hcd *hcd) 151{ 152 struct ohci_hcd *ohci = hcd_to_ohci(hcd); 153 154 if (usb_amd_find_chipset_info()) 155 ohci->flags |= OHCI_QUIRK_AMD_PLL; 156 157 /* SB800 needs pre-fetch fix */ 158 if (usb_amd_prefetch_quirk()) { 159 ohci->flags |= OHCI_QUIRK_AMD_PREFETCH; 160 ohci_dbg(ohci, "enabled AMD prefetch quirk\n"); 161 } 162 163 ohci->flags |= OHCI_QUIRK_GLOBAL_SUSPEND; 164 return 0; 165} 166 167/* List of quirks for OHCI */ 168static const struct pci_device_id ohci_pci_quirks[] = { 169 { 170 PCI_DEVICE(PCI_VENDOR_ID_AMD, 0x740c), 171 .driver_data = (unsigned long)ohci_quirk_amd756, 172 }, 173 { 174 PCI_DEVICE(PCI_VENDOR_ID_OPTI, 0xc861), 175 .driver_data = (unsigned long)ohci_quirk_opti, 176 }, 177 { 178 PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_ANY_ID), 179 .driver_data = (unsigned long)ohci_quirk_ns, 180 }, 181 { 182 PCI_DEVICE(PCI_VENDOR_ID_COMPAQ, 0xa0f8), 183 .driver_data = (unsigned long)ohci_quirk_zfmicro, 184 }, 185 { 186 PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, 0x01b6), 187 .driver_data = (unsigned long)ohci_quirk_toshiba_scc, 188 }, 189 { 190 PCI_DEVICE(PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_USB), 191 .driver_data = (unsigned long)ohci_quirk_nec, 192 }, 193 { 194 /* Toshiba portege 4000 */ 195 .vendor = PCI_VENDOR_ID_AL, 196 .device = 0x5237, 197 .subvendor = PCI_VENDOR_ID_TOSHIBA, 198 .subdevice = 0x0004, 199 .driver_data = (unsigned long) broken_suspend, 200 }, 201 { 202 PCI_DEVICE(PCI_VENDOR_ID_ITE, 0x8152), 203 .driver_data = (unsigned long) broken_suspend, 204 }, 205 { 206 PCI_DEVICE(PCI_VENDOR_ID_ATI, 0x4397), 207 .driver_data = (unsigned long)ohci_quirk_amd700, 208 }, 209 { 210 PCI_DEVICE(PCI_VENDOR_ID_ATI, 0x4398), 211 .driver_data = (unsigned long)ohci_quirk_amd700, 212 }, 213 { 214 PCI_DEVICE(PCI_VENDOR_ID_ATI, 0x4399), 215 .driver_data = (unsigned long)ohci_quirk_amd700, 216 }, 217 218 /* FIXME for some of the early AMD 760 southbridges, OHCI 219 * won't work at all. blacklist them. 220 */ 221 222 {}, 223}; 224 225static int ohci_pci_reset (struct usb_hcd *hcd) 226{ 227 struct ohci_hcd *ohci = hcd_to_ohci (hcd); 228 struct pci_dev *pdev = to_pci_dev(hcd->self.controller); 229 int ret = 0; 230 231 if (hcd->self.controller) { 232 const struct pci_device_id *quirk_id; 233 234 quirk_id = pci_match_id(ohci_pci_quirks, pdev); 235 if (quirk_id != NULL) { 236 int (*quirk)(struct usb_hcd *ohci); 237 quirk = (void *)quirk_id->driver_data; 238 ret = quirk(hcd); 239 } 240 } 241 242 if (ret == 0) 243 ret = ohci_setup(hcd); 244 /* 245 * After ohci setup RWC may not be set for add-in PCI cards. 246 * This transfers PCI PM wakeup capabilities. 247 */ 248 if (device_can_wakeup(&pdev->dev)) 249 ohci->hc_control |= OHCI_CTRL_RWC; 250 return ret; 251} 252 253static struct hc_driver __read_mostly ohci_pci_hc_driver; 254 255static const struct ohci_driver_overrides pci_overrides __initconst = { 256 .product_desc = "OHCI PCI host controller", 257 .reset = ohci_pci_reset, 258}; 259 260static const struct pci_device_id pci_ids [] = { { 261 /* handle any USB OHCI controller */ 262 PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_OHCI, ~0), 263 .driver_data = (unsigned long) &ohci_pci_hc_driver, 264 }, { 265 /* The device in the ConneXT I/O hub has no class reg */ 266 PCI_VDEVICE(STMICRO, PCI_DEVICE_ID_STMICRO_USB_OHCI), 267 .driver_data = (unsigned long) &ohci_pci_hc_driver, 268 }, { /* end: all zeroes */ } 269}; 270MODULE_DEVICE_TABLE (pci, pci_ids); 271 272/* pci driver glue; this is a "new style" PCI driver module */ 273static struct pci_driver ohci_pci_driver = { 274 .name = (char *) hcd_name, 275 .id_table = pci_ids, 276 277 .probe = usb_hcd_pci_probe, 278 .remove = usb_hcd_pci_remove, 279 .shutdown = usb_hcd_pci_shutdown, 280 281#ifdef CONFIG_PM 282 .driver = { 283 .pm = &usb_hcd_pci_pm_ops 284 }, 285#endif 286}; 287 288static int __init ohci_pci_init(void) 289{ 290 if (usb_disabled()) 291 return -ENODEV; 292 293 pr_info("%s: " DRIVER_DESC "\n", hcd_name); 294 295 ohci_init_driver(&ohci_pci_hc_driver, &pci_overrides); 296 297#ifdef CONFIG_PM 298 /* Entries for the PCI suspend/resume callbacks are special */ 299 ohci_pci_hc_driver.pci_suspend = ohci_suspend; 300 ohci_pci_hc_driver.pci_resume = ohci_resume; 301#endif 302 303 return pci_register_driver(&ohci_pci_driver); 304} 305module_init(ohci_pci_init); 306 307static void __exit ohci_pci_cleanup(void) 308{ 309 pci_unregister_driver(&ohci_pci_driver); 310} 311module_exit(ohci_pci_cleanup); 312 313MODULE_DESCRIPTION(DRIVER_DESC); 314MODULE_LICENSE("GPL"); 315MODULE_SOFTDEP("pre: ehci_pci"); 316