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Searched refs:ahb (Results 1 – 165 of 165) sorted by relevance

/linux-4.1.27/drivers/amba/
Dtegra-ahb.c135 static inline u32 gizmo_readl(struct tegra_ahb *ahb, u32 offset) in gizmo_readl() argument
137 return readl(ahb->regs + offset); in gizmo_readl()
140 static inline void gizmo_writel(struct tegra_ahb *ahb, u32 value, u32 offset) in gizmo_writel() argument
142 writel(value, ahb->regs + offset); in gizmo_writel()
148 struct tegra_ahb *ahb = dev_get_drvdata(dev); in tegra_ahb_match_by_smmu() local
151 return (ahb->dev->of_node == dn) ? 1 : 0; in tegra_ahb_match_by_smmu()
158 struct tegra_ahb *ahb; in tegra_ahb_enable_smmu() local
164 ahb = dev_get_drvdata(dev); in tegra_ahb_enable_smmu()
165 val = gizmo_readl(ahb, AHB_ARBITRATION_XBAR_CTRL); in tegra_ahb_enable_smmu()
167 gizmo_writel(ahb, val, AHB_ARBITRATION_XBAR_CTRL); in tegra_ahb_enable_smmu()
[all …]
DMakefile2 obj-$(CONFIG_TEGRA_AHB) += tegra-ahb.o
/linux-4.1.27/Documentation/devicetree/bindings/arm/tegra/
Dnvidia,tegra20-ahb.txt4 - compatible : For Tegra20, must contain "nvidia,tegra20-ahb". For
5 Tegra30, must contain "nvidia,tegra30-ahb". Otherwise, must contain
6 '"nvidia,<chip>-ahb", "nvidia,tegra30-ahb"' where <chip> is tegra124,
14 ahb: ahb@6000c004 {
15 compatible = "nvidia,tegra20-ahb";
/linux-4.1.27/arch/arm/mach-imx/
Dclk-imx35.c23 unsigned char arm, ahb, sel; member
27 { .arm = 1, .ahb = 4, .sel = 0},
28 { .arm = 1, .ahb = 3, .sel = 1},
29 { .arm = 2, .ahb = 2, .sel = 0},
30 { .arm = 0, .ahb = 0, .sel = 0},
31 { .arm = 0, .ahb = 0, .sel = 0},
32 { .arm = 0, .ahb = 0, .sel = 0},
33 { .arm = 4, .ahb = 1, .sel = 0},
34 { .arm = 1, .ahb = 5, .sel = 0},
35 { .arm = 1, .ahb = 8, .sel = 0},
[all …]
Dclk-imx25.c68 dummy, osc, mpll, upll, mpll_cpu_3_4, cpu_sel, cpu, ahb, usb_div, ipg, enumerator
103 clk[ahb] = imx_clk_divider("ahb", "cpu", ccm(CCM_CCTL), 28, 2); in __mx25_clocks_init()
230 clk_set_parent(clk[per5_sel], clk[ahb]); in __mx25_clocks_init()
Dclk-imx31.c37 dummy, ckih, ckil, mpll, spll, upll, mcu_main, hsp, ahb, nfc, ipg, enumerator
64 clk[ahb] = imx_clk_divider("ahb", "mcu_main", base + MXC_CCM_PDR0, 3, 3); in mx31_clocks_init()
/linux-4.1.27/Documentation/devicetree/bindings/iommu/
Dnvidia,tegra30-smmu.txt10 - nvidia,ahb : phandle to the ahb bus connected to SMMU.
20 nvidia,ahb = <&ahb>;
/linux-4.1.27/Documentation/devicetree/bindings/clock/
Dnspire-clock.txt5 "lsi,nspire-cx-ahb-divider" for the AHB divider in the CX model
6 "lsi,nspire-classic-ahb-divider" for the AHB divider in the older model
14 - clocks: For the "nspire-*-ahb-divider" compatible clocks, this is the parent
Dsunxi.txt22 "allwinner,sun4i-a10-ahb-clk" - for the AHB clock
23 "allwinner,sun5i-a13-ahb-clk" - for the AHB clock on A13
24 "allwinner,sun9i-a80-ahb-clk" - for the AHB bus clocks on A80
25 "allwinner,sun4i-a10-ahb-gates-clk" - for the AHB gates on A10
26 "allwinner,sun5i-a13-ahb-gates-clk" - for the AHB gates on A13
27 "allwinner,sun5i-a10s-ahb-gates-clk" - for the AHB gates on A10s
28 "allwinner,sun7i-a20-ahb-gates-clk" - for the AHB gates on A20
197 clock-names = "ahb";
199 reset-names = "ahb";
Dimx35-clock.txt23 ahb 8
112 clock-names = "ipg", "ahb", "per";
Dimx31-clock.txt23 ahb 8
Dimx25-clock.txt22 ahb 7
/linux-4.1.27/Documentation/devicetree/bindings/media/
Dcoda.txt16 - clocks : Should contain the ahb and per clocks, in the order
18 - clock-names : Should be "ahb", "per"
28 clock-names = "ahb", "per";
/linux-4.1.27/Documentation/devicetree/bindings/mmc/
Dsunxi-mmc.txt14 - clock-names : must contain "ahb", "mmc", "output" and "sample"
19 - reset-names : must contain "ahb"
29 clock-names = "ahb", "mod", "output", "sample";
/linux-4.1.27/arch/arm/boot/dts/
Dsun5i-a10s.dtsi147 ahb: ahb@01c20054 { label
149 compatible = "allwinner,sun4i-a10-ahb-clk";
152 clock-output-names = "ahb";
157 compatible = "allwinner,sun5i-a10s-ahb-gates-clk";
159 clocks = <&ahb>;
173 clocks = <&ahb>;
335 clock-names = "ahb", "mod";
349 clock-names = "ahb", "mod";
381 clock-names = "ahb",
396 clock-names = "ahb",
[all …]
Dsun9i-a80.dtsi166 compatible = "allwinner,sun9i-a80-ahb-clk";
174 compatible = "allwinner,sun9i-a80-ahb-clk";
182 compatible = "allwinner,sun9i-a80-ahb-clk";
331 clock-names = "ahb", "mmc", "output", "sample";
333 reset-names = "ahb";
343 clock-names = "ahb", "mmc", "output", "sample";
345 reset-names = "ahb";
355 clock-names = "ahb", "mmc", "output", "sample";
357 reset-names = "ahb";
367 clock-names = "ahb", "mmc", "output", "sample";
[all …]
Dsun5i-a13.dtsi188 ahb: ahb@01c20054 { label
190 compatible = "allwinner,sun4i-a10-ahb-clk";
193 clock-output-names = "ahb";
198 compatible = "allwinner,sun5i-a13-ahb-gates-clk";
200 clocks = <&ahb>;
213 clocks = <&ahb>;
373 clock-names = "ahb", "mod";
387 clock-names = "ahb", "mod";
403 clock-names = "ahb",
418 clock-names = "ahb",
[all …]
Dsun4i-a10.dtsi214 ahb: ahb@01c20054 { label
216 compatible = "allwinner,sun4i-a10-ahb-clk";
219 clock-output-names = "ahb";
224 compatible = "allwinner,sun4i-a10-ahb-gates-clk";
226 clocks = <&ahb>;
244 clocks = <&ahb>;
436 clock-names = "ahb", "mod";
450 clock-names = "ahb", "mod";
482 clock-names = "ahb",
497 clock-names = "ahb",
[all …]
Dnspire-classic.dtsi51 compatible = "lsi,nspire-classic-ahb-divider";
65 ahb {
Dimx35.dtsi177 clock-names = "ipg", "ahb";
220 clock-names = "ipg", "ahb", "per";
229 clock-names = "ipg", "ahb", "per";
238 clock-names = "ipg", "ahb", "per";
272 clock-names = "ipg", "ahb";
329 clock-names = "ipg", "ahb", "per";
Dimx27.dtsi98 clock-names = "ipg", "ahb";
462 clock-names = "ipg", "ahb", "per";
472 clock-names = "per", "ahb";
483 clock-names = "ipg", "ahb", "per";
495 clock-names = "ipg", "ahb", "per";
508 clock-names = "ipg", "ahb", "per";
526 clock-names = "ipg", "ahb";
548 clock-names = "ipg", "ahb";
Dimx50.dtsi108 clock-names = "ipg", "ahb", "per";
120 clock-names = "ipg", "ahb", "per";
169 clock-names = "ipg", "ahb", "per";
181 clock-names = "ipg", "ahb", "per";
424 clock-names = "ipg", "ahb";
487 clock-names = "ipg", "ahb", "ptp";
Dimx53.dtsi122 clock-names = "sata", "sata_ref", "ahb";
195 clock-names = "ipg", "ahb", "per";
207 clock-names = "ipg", "ahb", "per";
258 clock-names = "ipg", "ahb", "per";
270 clock-names = "ipg", "ahb", "per";
651 clock-names = "ipg", "ahb";
741 clock-names = "ipg", "ahb", "ptp";
767 clock-names = "per", "ahb";
778 clock-names = "ipg", "ahb";
Dsun6i-a31.dtsi397 clock-names = "ahb",
402 reset-names = "ahb";
414 clock-names = "ahb",
419 reset-names = "ahb";
431 clock-names = "ahb",
436 reset-names = "ahb";
448 clock-names = "ahb",
453 reset-names = "ahb";
823 clock-names = "ahb", "mod";
835 clock-names = "ahb", "mod";
[all …]
Dnspire-cx.dts43 compatible = "lsi,nspire-cx-ahb-divider";
91 ahb {
Dsun7i-a20.dtsi254 ahb: ahb@01c20054 { label
256 compatible = "allwinner,sun4i-a10-ahb-clk";
259 clock-output-names = "ahb";
264 compatible = "allwinner,sun7i-a20-ahb-gates-clk";
266 clocks = <&ahb>;
286 clocks = <&ahb>;
551 clock-names = "ahb", "mod";
565 clock-names = "ahb", "mod";
597 clock-names = "ahb",
612 clock-names = "ahb",
[all …]
Dimx25.dtsi295 clock-names = "ipg", "ahb";
401 clock-names = "ipg", "ahb", "per";
410 clock-names = "ipg", "ahb", "per";
419 clock-names = "ipg", "ahb", "per";
462 clock-names = "ipg", "ahb";
516 clock-names = "ipg", "ahb", "per";
Dimx28-cfa10058.dts101 ahb@80080000 {
127 ahb@80080000 {
Dat91sam9x5_lcd.dtsi14 ahb {
Dimx51.dtsi174 clock-names = "ipg", "ahb", "per";
185 clock-names = "ipg", "ahb", "per";
234 clock-names = "ipg", "ahb", "per";
246 clock-names = "ipg", "ahb", "per";
470 clock-names = "ipg", "ahb";
587 clock-names = "ipg", "ahb", "ptp";
Dat91sam9g35ek.dts17 ahb {
Dat91sam9x35ek.dts17 ahb {
Dat91sam9g15.dtsi15 ahb {
Dimx28-cfa10057.dts134 ahb@80080000 {
160 ahb@80080000 {
Dat91sam9x25ek.dts17 ahb {
Dat91sam9g35.dtsi16 ahb {
Dat91sam9x35.dtsi17 ahb {
Dat91sam9g25.dtsi18 ahb {
Dusb_a9260.dts24 ahb {
Dat91sam9x25.dtsi19 ahb {
Dsama5d3_tcb1.dtsi19 ahb {
Dsama5d3xdm.dtsi11 ahb {
Dat91sam9g25ek.dts17 ahb {
Dusb_a9g20_lpw.dts15 ahb {
Dsama5d33ek.dts18 ahb {
Dsama5d36ek.dts18 ahb {
Dge863-pro3.dtsi28 ahb {
Dsama5d31ek.dts18 ahb {
Dsun8i-a23.dtsi281 clock-names = "ahb",
286 reset-names = "ahb";
298 clock-names = "ahb",
303 reset-names = "ahb";
315 clock-names = "ahb",
320 reset-names = "ahb";
Dsama5d35ek.dts17 ahb {
Devk-pro3.dts24 ahb {
Dsama5d34ek.dts18 ahb {
Dat91sam9g20ek_2mmc.dts15 ahb {
Dmpa1600.dts38 ahb {
Dat91sam9g20.dtsi28 ahb {
Dethernut5.dts33 ahb {
Dat91sam9x5_usart3.dtsi18 ahb {
Dtny_a9260_common.dtsi37 ahb {
Dat91sam9x5_can.dtsi14 ahb {
Dat91sam9x5_macb1.dtsi14 ahb {
Dusb_a9g20-dab-mmx.dtsi10 ahb {
Dat91-cosino_mega2560.dts22 ahb {
Dimx28-m28evk.dts200 ahb@80080000 {
220 clock-names = "ipg", "ahb";
Dimx28-apf28.dts76 ahb@80080000 {
Dtny_a9263.dts42 ahb {
Dsama5d3_mci2.dtsi15 ahb {
Dsama5d3_can.dtsi14 ahb {
Dimx6sl.dtsi644 clock-names = "ipg", "ahb";
727 clock-names = "ipg", "ahb";
738 clock-names = "ipg", "ahb", "per";
750 clock-names = "ipg", "ahb", "per";
762 clock-names = "ipg", "ahb", "per";
774 clock-names = "ipg", "ahb", "per";
Dsama5d3_uart.dtsi20 ahb {
Dat91sam9x5cm.dtsi36 ahb {
Dsama5d3_emac.dtsi14 ahb {
Dusb_a9260_common.dtsi29 ahb {
Dimx1.dtsi93 clock-names = "ipg", "ahb", "per";
133 clock-names = "ipg", "ahb";
Dimx28-cfa10037.dts54 ahb@80080000 {
Dat91sam9x5_macb0.dtsi14 ahb {
Dspear600-evb.dts26 ahb {
Dimx6qdl.dtsi345 clock-names = "per", "ahb";
825 clock-names = "ipg", "ahb";
905 clock-names = "ipg", "ahb", "ptp";
923 clock-names = "ipg", "ahb", "per";
935 clock-names = "ipg", "ahb", "per";
947 clock-names = "ipg", "ahb", "per";
959 clock-names = "ipg", "ahb", "per";
Dat91sam9x5_isi.dtsi14 ahb {
Dat91rm9200ek.dts38 ahb {
Dspear300.dtsi17 ahb {
Daks-cdu.dts25 ahb {
Dat91-cosino.dtsi47 ahb {
Dsama5d3xcm.dtsi31 ahb {
Dimx28-duckbill.dts75 ahb@80080000 {
Dusb_a9263.dts42 ahb {
Dkizbox.dts39 ahb {
Dat91-foxg20.dts44 ahb {
Dimx28-cfa10036.dts111 ahb@80080000 {
Dimx23-olinuxino.dts95 ahb@80080000 {
Dpm9g45.dts42 ahb {
Dvfxxx.dtsi455 clock-names = "ipg", "ahb", "per";
498 clock-names = "ipg", "ahb", "ptp";
509 clock-names = "ipg", "ahb", "ptp";
Danimeo_ip.dts53 ahb {
Dat91-qil_a9260.dts41 ahb {
Dimx28-cfa10049.dts298 ahb@80080000 {
324 ahb@80080000 {
Dimx6sx.dtsi727 clock-names = "ipg", "ahb";
791 clock-names = "ipg", "ahb", "ptp",
814 clock-names = "ipg", "ahb", "per";
826 clock-names = "ipg", "ahb", "per";
838 clock-names = "ipg", "ahb", "per";
850 clock-names = "ipg", "ahb", "per";
900 clock-names = "ipg", "ahb", "ptp",
Dimx28-sps1.dts105 ahb@80080000 {
Dspear310.dtsi17 ahb {
Dimx23-evk.dts122 ahb@80080000 {
Dtegra114.dtsi217 ahb: ahb@6000c004 { label
218 compatible = "nvidia,tegra114-ahb", "nvidia,tegra30-ahb";
Dat91-ariag25.dts55 ahb {
Dnspire.dtsi71 ahb {
Dspear3xx.dtsi34 ahb {
Dat91sam9x5ek.dtsi19 ahb {
Dspear310-evb.dts27 ahb {
Dspear320-evb.dts27 ahb {
Dat91sam9rlek.dts42 ahb {
Dat91sam9g20ek_common.dtsi39 ahb {
Dspear320.dtsi17 ahb {
Dat91sam9263ek.dts42 ahb {
Dspear300-evb.dts27 ahb {
Dphy3250.dts28 ahb {
Dat91sam9n12ek.dts43 ahb {
Dimx23.dtsi358 axi-ahb@8002e000 {
515 ahb@80080000 {
Dimx28.dtsi944 axi-ahb@8002e000 {
1191 ahb@80080000 {
1227 clock-names = "ipg", "ahb", "enet_out";
1236 clock-names = "ipg", "ahb";
Dimx28-apx4devkit.dts185 ahb@80080000 {
Dat91sam9261ek.dts42 ahb {
Dsama5d3_gmac.dtsi14 ahb {
Dspear1340.dtsi19 ahb {
Dsama5d3xmb.dtsi14 ahb {
Dimx28-apf28dev.dts157 ahb@80080000 {
Dwm8650.dtsi123 clkahb: ahb {
Dspear600.dtsi32 ahb {
Dimx6q.dtsi152 clock-names = "sata", "sata_ref", "ahb";
Dimx28-m28cu3.dts178 ahb@80080000 {
Dat91-sama5d3_xplained.dts34 ahb {
Dea3250.dts28 ahb {
Dspear320-hmi.dts27 ahb {
Dat91sam9m10g45ek.dts44 ahb {
Dat91-sama5d4_xplained.dts79 ahb {
Dwm8505.dtsi119 clkahb: ahb {
Dwm8850.dtsi140 clkahb: ahb {
Dtegra30.dtsi332 ahb: ahb@6000c004 { label
333 compatible = "nvidia,tegra30-ahb";
Dwm8750.dtsi129 clkahb: ahb {
Dlpc32xx.dtsi30 ahb {
Dspear1310-evb.dts27 ahb {
Dspear13xx.dtsi81 ahb {
Dimx28-evk.dts247 ahb@80080000 {
Dat91-sama5d4ek.dts79 ahb {
Dspear1310.dtsi19 ahb {
Dsama5d3_lcd.dtsi14 ahb {
Dtegra20.dtsi228 ahb@6000c004 {
229 compatible = "nvidia,tegra20-ahb";
Dspear1340-evb.dts27 ahb {
Drk3288.dtsi613 reset-names = "axi", "ahb", "dclk";
644 reset-names = "axi", "ahb", "dclk";
Dat91sam9261.dtsi68 ahb {
Dat91sam9n12.dtsi72 ahb {
Dat91rm9200.dtsi74 ahb {
Dat91sam9rl.dtsi78 ahb {
Dat91sam9263.dtsi75 ahb {
Dat91sam9260.dtsi77 ahb {
Dat91sam9x5.dtsi80 ahb {
Dat91sam9g45.dtsi82 ahb {
Dsama5d3.dtsi87 ahb {
Dsama5d4.dtsi117 ahb {
/linux-4.1.27/Documentation/devicetree/bindings/video/
Drockchip-vop.txt20 hclk_vop: for ahb bus to R/W the phy regs.
27 - ahb
44 reset-names = "axi", "ahb", "dclk";
/linux-4.1.27/Documentation/devicetree/bindings/spi/
Dspi-sun4i.txt9 - "ahb": the gated AHB parent clock
20 clock-names = "ahb", "mod";
Dspi-sun6i.txt9 - "ahb": the gated AHB parent clock
22 clock-names = "ahb", "mod";
/linux-4.1.27/Documentation/devicetree/bindings/mtd/
Dsunxi-nand.txt11 * "ahb" : AHB gating clock
33 clock-names = "ahb", "mod";
/linux-4.1.27/Documentation/devicetree/bindings/ata/
Dimx-sata.txt14 - clock-names : should include "sata", "sata_ref" and "ahb" entries
35 clock-names = "sata", "sata_ref", "ahb";
/linux-4.1.27/include/soc/tegra/
Dahb.h17 extern int tegra_ahb_enable_smmu(struct device_node *ahb);
/linux-4.1.27/drivers/net/wireless/ath/ath5k/
DMakefile20 ath5k-$(CONFIG_ATH5K_AHB) += ahb.o
/linux-4.1.27/drivers/iommu/
Dtegra-smmu.c669 struct device_node *ahb; in tegra_smmu_ahb_enable() local
671 ahb = of_find_matching_node(NULL, ahb_match); in tegra_smmu_ahb_enable()
672 if (ahb) { in tegra_smmu_ahb_enable()
673 tegra_ahb_enable_smmu(ahb); in tegra_smmu_ahb_enable()
674 of_node_put(ahb); in tegra_smmu_ahb_enable()
/linux-4.1.27/sound/soc/samsung/
Didma.c153 u32 ahb = readl(idma.regs + I2SAHB); in idma_hw_params() local
155 ahb |= (AHB_DMARLD | AHB_INTMASK); in idma_hw_params()
157 writel(ahb, idma.regs + I2SAHB); in idma_hw_params()
/linux-4.1.27/drivers/net/wireless/ath/ath9k/
DMakefile13 ath9k-$(CONFIG_ATH9K_AHB) += ahb.o
/linux-4.1.27/Documentation/devicetree/bindings/dma/
Dsun6i-dma.txt41 clock-names = "ahb", "mod";
/linux-4.1.27/Documentation/devicetree/bindings/sound/
Dfsl,esai.txt28 "fsys" The system clock derived from ahb clock used to