1/* 2 * Copyright 2013 Freescale Semiconductor, Inc. 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License as published by 6 * the Free Software Foundation; either version 2 of the License, or 7 * (at your option) any later version. 8 */ 9 10#include "vf610-pinfunc.h" 11#include <dt-bindings/clock/vf610-clock.h> 12#include <dt-bindings/interrupt-controller/irq.h> 13#include <dt-bindings/gpio/gpio.h> 14 15/ { 16 aliases { 17 can0 = &can0; 18 can1 = &can1; 19 serial0 = &uart0; 20 serial1 = &uart1; 21 serial2 = &uart2; 22 serial3 = &uart3; 23 serial4 = &uart4; 24 serial5 = &uart5; 25 gpio0 = &gpio0; 26 gpio1 = &gpio1; 27 gpio2 = &gpio2; 28 gpio3 = &gpio3; 29 gpio4 = &gpio4; 30 usbphy0 = &usbphy0; 31 usbphy1 = &usbphy1; 32 }; 33 34 fxosc: fxosc { 35 compatible = "fixed-clock"; 36 #clock-cells = <0>; 37 clock-frequency = <24000000>; 38 }; 39 40 sxosc: sxosc { 41 compatible = "fixed-clock"; 42 #clock-cells = <0>; 43 clock-frequency = <32768>; 44 }; 45 46 reboot: syscon-reboot { 47 compatible = "syscon-reboot"; 48 regmap = <&src>; 49 offset = <0x0>; 50 mask = <0x1000>; 51 }; 52 53 soc { 54 #address-cells = <1>; 55 #size-cells = <1>; 56 compatible = "simple-bus"; 57 interrupt-parent = <&mscm_ir>; 58 ranges; 59 60 aips0: aips-bus@40000000 { 61 compatible = "fsl,aips-bus", "simple-bus"; 62 #address-cells = <1>; 63 #size-cells = <1>; 64 ranges; 65 66 mscm_cpucfg: cpucfg@40001000 { 67 compatible = "fsl,vf610-mscm-cpucfg", "syscon"; 68 reg = <0x40001000 0x800>; 69 }; 70 71 mscm_ir: interrupt-controller@40001800 { 72 compatible = "fsl,vf610-mscm-ir"; 73 reg = <0x40001800 0x400>; 74 fsl,cpucfg = <&mscm_cpucfg>; 75 interrupt-controller; 76 #interrupt-cells = <2>; 77 }; 78 79 edma0: dma-controller@40018000 { 80 #dma-cells = <2>; 81 compatible = "fsl,vf610-edma"; 82 reg = <0x40018000 0x2000>, 83 <0x40024000 0x1000>, 84 <0x40025000 0x1000>; 85 dma-channels = <32>; 86 interrupts = <8 IRQ_TYPE_LEVEL_HIGH>, 87 <9 IRQ_TYPE_LEVEL_HIGH>; 88 interrupt-names = "edma-tx", "edma-err"; 89 clock-names = "dmamux0", "dmamux1"; 90 clocks = <&clks VF610_CLK_DMAMUX0>, 91 <&clks VF610_CLK_DMAMUX1>; 92 status = "disabled"; 93 }; 94 95 can0: flexcan@40020000 { 96 compatible = "fsl,vf610-flexcan"; 97 reg = <0x40020000 0x4000>; 98 interrupts = <58 IRQ_TYPE_LEVEL_HIGH>; 99 clocks = <&clks VF610_CLK_FLEXCAN0>, 100 <&clks VF610_CLK_FLEXCAN0>; 101 clock-names = "ipg", "per"; 102 status = "disabled"; 103 }; 104 105 uart0: serial@40027000 { 106 compatible = "fsl,vf610-lpuart"; 107 reg = <0x40027000 0x1000>; 108 interrupts = <61 IRQ_TYPE_LEVEL_HIGH>; 109 clocks = <&clks VF610_CLK_UART0>; 110 clock-names = "ipg"; 111 dmas = <&edma0 0 2>, 112 <&edma0 0 3>; 113 dma-names = "rx","tx"; 114 status = "disabled"; 115 }; 116 117 uart1: serial@40028000 { 118 compatible = "fsl,vf610-lpuart"; 119 reg = <0x40028000 0x1000>; 120 interrupts = <62 IRQ_TYPE_LEVEL_HIGH>; 121 clocks = <&clks VF610_CLK_UART1>; 122 clock-names = "ipg"; 123 dmas = <&edma0 0 4>, 124 <&edma0 0 5>; 125 dma-names = "rx","tx"; 126 status = "disabled"; 127 }; 128 129 uart2: serial@40029000 { 130 compatible = "fsl,vf610-lpuart"; 131 reg = <0x40029000 0x1000>; 132 interrupts = <63 IRQ_TYPE_LEVEL_HIGH>; 133 clocks = <&clks VF610_CLK_UART2>; 134 clock-names = "ipg"; 135 dmas = <&edma0 0 6>, 136 <&edma0 0 7>; 137 dma-names = "rx","tx"; 138 status = "disabled"; 139 }; 140 141 uart3: serial@4002a000 { 142 compatible = "fsl,vf610-lpuart"; 143 reg = <0x4002a000 0x1000>; 144 interrupts = <64 IRQ_TYPE_LEVEL_HIGH>; 145 clocks = <&clks VF610_CLK_UART3>; 146 clock-names = "ipg"; 147 dmas = <&edma0 0 8>, 148 <&edma0 0 9>; 149 dma-names = "rx","tx"; 150 status = "disabled"; 151 }; 152 153 dspi0: dspi0@4002c000 { 154 #address-cells = <1>; 155 #size-cells = <0>; 156 compatible = "fsl,vf610-dspi"; 157 reg = <0x4002c000 0x1000>; 158 interrupts = <67 IRQ_TYPE_LEVEL_HIGH>; 159 clocks = <&clks VF610_CLK_DSPI0>; 160 clock-names = "dspi"; 161 spi-num-chipselects = <5>; 162 status = "disabled"; 163 }; 164 165 dspi1: dspi1@4002d000 { 166 #address-cells = <1>; 167 #size-cells = <0>; 168 compatible = "fsl,vf610-dspi"; 169 reg = <0x4002d000 0x1000>; 170 interrupts = <68 IRQ_TYPE_LEVEL_HIGH>; 171 clocks = <&clks VF610_CLK_DSPI1>; 172 clock-names = "dspi"; 173 spi-num-chipselects = <5>; 174 status = "disabled"; 175 }; 176 177 sai2: sai@40031000 { 178 compatible = "fsl,vf610-sai"; 179 reg = <0x40031000 0x1000>; 180 interrupts = <86 IRQ_TYPE_LEVEL_HIGH>; 181 clocks = <&clks VF610_CLK_SAI2>; 182 clock-names = "sai"; 183 dma-names = "tx", "rx"; 184 dmas = <&edma0 0 21>, 185 <&edma0 0 20>; 186 status = "disabled"; 187 }; 188 189 pit: pit@40037000 { 190 compatible = "fsl,vf610-pit"; 191 reg = <0x40037000 0x1000>; 192 interrupts = <39 IRQ_TYPE_LEVEL_HIGH>; 193 clocks = <&clks VF610_CLK_PIT>; 194 clock-names = "pit"; 195 }; 196 197 pwm0: pwm@40038000 { 198 compatible = "fsl,vf610-ftm-pwm"; 199 #pwm-cells = <3>; 200 reg = <0x40038000 0x1000>; 201 clock-names = "ftm_sys", "ftm_ext", 202 "ftm_fix", "ftm_cnt_clk_en"; 203 clocks = <&clks VF610_CLK_FTM0>, 204 <&clks VF610_CLK_FTM0_EXT_SEL>, 205 <&clks VF610_CLK_FTM0_FIX_SEL>, 206 <&clks VF610_CLK_FTM0_EXT_FIX_EN>; 207 status = "disabled"; 208 }; 209 210 pwm1: pwm@40039000 { 211 compatible = "fsl,vf610-ftm-pwm"; 212 #pwm-cells = <3>; 213 reg = <0x40039000 0x1000>; 214 clock-names = "ftm_sys", "ftm_ext", 215 "ftm_fix", "ftm_cnt_clk_en"; 216 clocks = <&clks VF610_CLK_FTM1>, 217 <&clks VF610_CLK_FTM1_EXT_SEL>, 218 <&clks VF610_CLK_FTM1_FIX_SEL>, 219 <&clks VF610_CLK_FTM1_EXT_FIX_EN>; 220 status = "disabled"; 221 }; 222 223 adc0: adc@4003b000 { 224 compatible = "fsl,vf610-adc"; 225 reg = <0x4003b000 0x1000>; 226 interrupts = <53 IRQ_TYPE_LEVEL_HIGH>; 227 clocks = <&clks VF610_CLK_ADC0>; 228 clock-names = "adc"; 229 status = "disabled"; 230 }; 231 232 wdoga5: wdog@4003e000 { 233 compatible = "fsl,vf610-wdt", "fsl,imx21-wdt"; 234 reg = <0x4003e000 0x1000>; 235 interrupts = <20 IRQ_TYPE_LEVEL_HIGH>; 236 clocks = <&clks VF610_CLK_WDT>; 237 clock-names = "wdog"; 238 status = "disabled"; 239 }; 240 241 qspi0: quadspi@40044000 { 242 #address-cells = <1>; 243 #size-cells = <0>; 244 compatible = "fsl,vf610-qspi"; 245 reg = <0x40044000 0x1000>; 246 interrupts = <24 IRQ_TYPE_LEVEL_HIGH>; 247 clocks = <&clks VF610_CLK_QSPI0_EN>, 248 <&clks VF610_CLK_QSPI0>; 249 clock-names = "qspi_en", "qspi"; 250 status = "disabled"; 251 }; 252 253 iomuxc: iomuxc@40048000 { 254 compatible = "fsl,vf610-iomuxc"; 255 reg = <0x40048000 0x1000>; 256 }; 257 258 gpio0: gpio@40049000 { 259 compatible = "fsl,vf610-gpio"; 260 reg = <0x40049000 0x1000 0x400ff000 0x40>; 261 gpio-controller; 262 #gpio-cells = <2>; 263 interrupts = <107 IRQ_TYPE_LEVEL_HIGH>; 264 interrupt-controller; 265 #interrupt-cells = <2>; 266 gpio-ranges = <&iomuxc 0 0 32>; 267 }; 268 269 gpio1: gpio@4004a000 { 270 compatible = "fsl,vf610-gpio"; 271 reg = <0x4004a000 0x1000 0x400ff040 0x40>; 272 gpio-controller; 273 #gpio-cells = <2>; 274 interrupts = <108 IRQ_TYPE_LEVEL_HIGH>; 275 interrupt-controller; 276 #interrupt-cells = <2>; 277 gpio-ranges = <&iomuxc 0 32 32>; 278 }; 279 280 gpio2: gpio@4004b000 { 281 compatible = "fsl,vf610-gpio"; 282 reg = <0x4004b000 0x1000 0x400ff080 0x40>; 283 gpio-controller; 284 #gpio-cells = <2>; 285 interrupts = <109 IRQ_TYPE_LEVEL_HIGH>; 286 interrupt-controller; 287 #interrupt-cells = <2>; 288 gpio-ranges = <&iomuxc 0 64 32>; 289 }; 290 291 gpio3: gpio@4004c000 { 292 compatible = "fsl,vf610-gpio"; 293 reg = <0x4004c000 0x1000 0x400ff0c0 0x40>; 294 gpio-controller; 295 #gpio-cells = <2>; 296 interrupts = <110 IRQ_TYPE_LEVEL_HIGH>; 297 interrupt-controller; 298 #interrupt-cells = <2>; 299 gpio-ranges = <&iomuxc 0 96 32>; 300 }; 301 302 gpio4: gpio@4004d000 { 303 compatible = "fsl,vf610-gpio"; 304 reg = <0x4004d000 0x1000 0x400ff100 0x40>; 305 gpio-controller; 306 #gpio-cells = <2>; 307 interrupts = <111 IRQ_TYPE_LEVEL_HIGH>; 308 interrupt-controller; 309 #interrupt-cells = <2>; 310 gpio-ranges = <&iomuxc 0 128 7>; 311 }; 312 313 anatop: anatop@40050000 { 314 compatible = "fsl,vf610-anatop", "syscon"; 315 reg = <0x40050000 0x400>; 316 }; 317 318 usbphy0: usbphy@40050800 { 319 compatible = "fsl,vf610-usbphy"; 320 reg = <0x40050800 0x400>; 321 interrupts = <50 IRQ_TYPE_LEVEL_HIGH>; 322 clocks = <&clks VF610_CLK_USBPHY0>; 323 fsl,anatop = <&anatop>; 324 status = "disabled"; 325 }; 326 327 usbphy1: usbphy@40050c00 { 328 compatible = "fsl,vf610-usbphy"; 329 reg = <0x40050c00 0x400>; 330 interrupts = <51 IRQ_TYPE_LEVEL_HIGH>; 331 clocks = <&clks VF610_CLK_USBPHY1>; 332 fsl,anatop = <&anatop>; 333 status = "disabled"; 334 }; 335 336 i2c0: i2c@40066000 { 337 #address-cells = <1>; 338 #size-cells = <0>; 339 compatible = "fsl,vf610-i2c"; 340 reg = <0x40066000 0x1000>; 341 interrupts = <71 IRQ_TYPE_LEVEL_HIGH>; 342 clocks = <&clks VF610_CLK_I2C0>; 343 clock-names = "ipg"; 344 dmas = <&edma0 0 50>, 345 <&edma0 0 51>; 346 dma-names = "rx","tx"; 347 status = "disabled"; 348 }; 349 350 clks: ccm@4006b000 { 351 compatible = "fsl,vf610-ccm"; 352 reg = <0x4006b000 0x1000>; 353 clocks = <&sxosc>, <&fxosc>; 354 clock-names = "sxosc", "fxosc"; 355 #clock-cells = <1>; 356 }; 357 358 usbdev0: usb@40034000 { 359 compatible = "fsl,vf610-usb", "fsl,imx27-usb"; 360 reg = <0x40034000 0x800>; 361 interrupts = <75 IRQ_TYPE_LEVEL_HIGH>; 362 clocks = <&clks VF610_CLK_USBC0>; 363 fsl,usbphy = <&usbphy0>; 364 fsl,usbmisc = <&usbmisc0 0>; 365 dr_mode = "peripheral"; 366 status = "disabled"; 367 }; 368 369 usbmisc0: usb@40034800 { 370 #index-cells = <1>; 371 compatible = "fsl,vf610-usbmisc"; 372 reg = <0x40034800 0x200>; 373 clocks = <&clks VF610_CLK_USBC0>; 374 status = "disabled"; 375 }; 376 377 src: src@4006e000 { 378 compatible = "fsl,vf610-src", "syscon"; 379 reg = <0x4006e000 0x1000>; 380 interrupts = <96 IRQ_TYPE_LEVEL_HIGH>; 381 }; 382 }; 383 384 aips1: aips-bus@40080000 { 385 compatible = "fsl,aips-bus", "simple-bus"; 386 #address-cells = <1>; 387 #size-cells = <1>; 388 ranges; 389 390 edma1: dma-controller@40098000 { 391 #dma-cells = <2>; 392 compatible = "fsl,vf610-edma"; 393 reg = <0x40098000 0x2000>, 394 <0x400a1000 0x1000>, 395 <0x400a2000 0x1000>; 396 dma-channels = <32>; 397 interrupts = <10 IRQ_TYPE_LEVEL_HIGH>, 398 <11 IRQ_TYPE_LEVEL_HIGH>; 399 interrupt-names = "edma-tx", "edma-err"; 400 clock-names = "dmamux0", "dmamux1"; 401 clocks = <&clks VF610_CLK_DMAMUX2>, 402 <&clks VF610_CLK_DMAMUX3>; 403 status = "disabled"; 404 }; 405 406 snvs0: snvs@400a7000 { 407 compatible = "fsl,sec-v4.0-mon", "simple-bus"; 408 #address-cells = <1>; 409 #size-cells = <1>; 410 ranges = <0 0x400a7000 0x2000>; 411 412 snvsrtc: snvs-rtc-lp@34 { 413 compatible = "fsl,sec-v4.0-mon-rtc-lp"; 414 reg = <0x34 0x58>; 415 interrupts = <100 IRQ_TYPE_LEVEL_HIGH>; 416 clocks = <&clks VF610_CLK_SNVS>; 417 clock-names = "snvs-rtc"; 418 }; 419 }; 420 421 uart4: serial@400a9000 { 422 compatible = "fsl,vf610-lpuart"; 423 reg = <0x400a9000 0x1000>; 424 interrupts = <65 IRQ_TYPE_LEVEL_HIGH>; 425 clocks = <&clks VF610_CLK_UART4>; 426 clock-names = "ipg"; 427 status = "disabled"; 428 }; 429 430 uart5: serial@400aa000 { 431 compatible = "fsl,vf610-lpuart"; 432 reg = <0x400aa000 0x1000>; 433 interrupts = <66 IRQ_TYPE_LEVEL_HIGH>; 434 clocks = <&clks VF610_CLK_UART5>; 435 clock-names = "ipg"; 436 status = "disabled"; 437 }; 438 439 adc1: adc@400bb000 { 440 compatible = "fsl,vf610-adc"; 441 reg = <0x400bb000 0x1000>; 442 interrupts = <54 IRQ_TYPE_LEVEL_HIGH>; 443 clocks = <&clks VF610_CLK_ADC1>; 444 clock-names = "adc"; 445 status = "disabled"; 446 }; 447 448 esdhc1: esdhc@400b2000 { 449 compatible = "fsl,imx53-esdhc"; 450 reg = <0x400b2000 0x1000>; 451 interrupts = <28 IRQ_TYPE_LEVEL_HIGH>; 452 clocks = <&clks VF610_CLK_IPG_BUS>, 453 <&clks VF610_CLK_PLATFORM_BUS>, 454 <&clks VF610_CLK_ESDHC1>; 455 clock-names = "ipg", "ahb", "per"; 456 status = "disabled"; 457 }; 458 459 usbh1: usb@400b4000 { 460 compatible = "fsl,vf610-usb", "fsl,imx27-usb"; 461 reg = <0x400b4000 0x800>; 462 interrupts = <76 IRQ_TYPE_LEVEL_HIGH>; 463 clocks = <&clks VF610_CLK_USBC1>; 464 fsl,usbphy = <&usbphy1>; 465 fsl,usbmisc = <&usbmisc1 0>; 466 dr_mode = "host"; 467 status = "disabled"; 468 }; 469 470 usbmisc1: usb@400b4800 { 471 #index-cells = <1>; 472 compatible = "fsl,vf610-usbmisc"; 473 reg = <0x400b4800 0x200>; 474 clocks = <&clks VF610_CLK_USBC1>; 475 status = "disabled"; 476 }; 477 478 ftm: ftm@400b8000 { 479 compatible = "fsl,ftm-timer"; 480 reg = <0x400b8000 0x1000 0x400b9000 0x1000>; 481 interrupts = <44 IRQ_TYPE_LEVEL_HIGH>; 482 clock-names = "ftm-evt", "ftm-src", 483 "ftm-evt-counter-en", "ftm-src-counter-en"; 484 clocks = <&clks VF610_CLK_FTM2>, 485 <&clks VF610_CLK_FTM3>, 486 <&clks VF610_CLK_FTM2_EXT_FIX_EN>, 487 <&clks VF610_CLK_FTM3_EXT_FIX_EN>; 488 status = "disabled"; 489 }; 490 491 fec0: ethernet@400d0000 { 492 compatible = "fsl,mvf600-fec"; 493 reg = <0x400d0000 0x1000>; 494 interrupts = <78 IRQ_TYPE_LEVEL_HIGH>; 495 clocks = <&clks VF610_CLK_ENET0>, 496 <&clks VF610_CLK_ENET0>, 497 <&clks VF610_CLK_ENET>; 498 clock-names = "ipg", "ahb", "ptp"; 499 status = "disabled"; 500 }; 501 502 fec1: ethernet@400d1000 { 503 compatible = "fsl,mvf600-fec"; 504 reg = <0x400d1000 0x1000>; 505 interrupts = <79 IRQ_TYPE_LEVEL_HIGH>; 506 clocks = <&clks VF610_CLK_ENET1>, 507 <&clks VF610_CLK_ENET1>, 508 <&clks VF610_CLK_ENET>; 509 clock-names = "ipg", "ahb", "ptp"; 510 status = "disabled"; 511 }; 512 513 can1: flexcan@400d4000 { 514 compatible = "fsl,vf610-flexcan"; 515 reg = <0x400d4000 0x4000>; 516 interrupts = <59 IRQ_TYPE_LEVEL_HIGH>; 517 clocks = <&clks VF610_CLK_FLEXCAN1>, 518 <&clks VF610_CLK_FLEXCAN1>; 519 clock-names = "ipg", "per"; 520 status = "disabled"; 521 }; 522 523 }; 524 }; 525}; 526