1/* 2 * at91sam9263.dtsi - Device Tree Include file for AT91SAM9263 family SoC 3 * 4 * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> 5 * 6 * Licensed under GPLv2 only. 7 */ 8 9#include "skeleton.dtsi" 10#include <dt-bindings/pinctrl/at91.h> 11#include <dt-bindings/interrupt-controller/irq.h> 12#include <dt-bindings/gpio/gpio.h> 13#include <dt-bindings/clock/at91.h> 14 15/ { 16 model = "Atmel AT91SAM9263 family SoC"; 17 compatible = "atmel,at91sam9263"; 18 interrupt-parent = <&aic>; 19 20 aliases { 21 serial0 = &dbgu; 22 serial1 = &usart0; 23 serial2 = &usart1; 24 serial3 = &usart2; 25 gpio0 = &pioA; 26 gpio1 = &pioB; 27 gpio2 = &pioC; 28 gpio3 = &pioD; 29 gpio4 = &pioE; 30 tcb0 = &tcb0; 31 i2c0 = &i2c0; 32 ssc0 = &ssc0; 33 ssc1 = &ssc1; 34 pwm0 = &pwm0; 35 }; 36 37 cpus { 38 #address-cells = <0>; 39 #size-cells = <0>; 40 41 cpu { 42 compatible = "arm,arm926ej-s"; 43 device_type = "cpu"; 44 }; 45 }; 46 47 memory { 48 reg = <0x20000000 0x08000000>; 49 }; 50 51 clocks { 52 main_xtal: main_xtal { 53 compatible = "fixed-clock"; 54 #clock-cells = <0>; 55 clock-frequency = <0>; 56 }; 57 58 slow_xtal: slow_xtal { 59 compatible = "fixed-clock"; 60 #clock-cells = <0>; 61 clock-frequency = <0>; 62 }; 63 }; 64 65 sram0: sram@00300000 { 66 compatible = "mmio-sram"; 67 reg = <0x00300000 0x14000>; 68 }; 69 70 sram1: sram@00500000 { 71 compatible = "mmio-sram"; 72 reg = <0x00500000 0x4000>; 73 }; 74 75 ahb { 76 compatible = "simple-bus"; 77 #address-cells = <1>; 78 #size-cells = <1>; 79 ranges; 80 81 apb { 82 compatible = "simple-bus"; 83 #address-cells = <1>; 84 #size-cells = <1>; 85 ranges; 86 87 aic: interrupt-controller@fffff000 { 88 #interrupt-cells = <3>; 89 compatible = "atmel,at91rm9200-aic"; 90 interrupt-controller; 91 reg = <0xfffff000 0x200>; 92 atmel,external-irqs = <30 31>; 93 }; 94 95 pmc: pmc@fffffc00 { 96 compatible = "atmel,at91rm9200-pmc"; 97 reg = <0xfffffc00 0x100>; 98 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 99 interrupt-controller; 100 #address-cells = <1>; 101 #size-cells = <0>; 102 #interrupt-cells = <1>; 103 104 main_osc: main_osc { 105 compatible = "atmel,at91rm9200-clk-main-osc"; 106 #clock-cells = <0>; 107 interrupts-extended = <&pmc AT91_PMC_MOSCS>; 108 clocks = <&main_xtal>; 109 }; 110 111 main: mainck { 112 compatible = "atmel,at91rm9200-clk-main"; 113 #clock-cells = <0>; 114 clocks = <&main_osc>; 115 }; 116 117 plla: pllack { 118 compatible = "atmel,at91rm9200-clk-pll"; 119 #clock-cells = <0>; 120 interrupts-extended = <&pmc AT91_PMC_LOCKA>; 121 clocks = <&main>; 122 reg = <0>; 123 atmel,clk-input-range = <1000000 32000000>; 124 #atmel,pll-clk-output-range-cells = <4>; 125 atmel,pll-clk-output-ranges = <80000000 200000000 0 1>, 126 <190000000 240000000 2 1>; 127 }; 128 129 pllb: pllbck { 130 compatible = "atmel,at91rm9200-clk-pll"; 131 #clock-cells = <0>; 132 interrupts-extended = <&pmc AT91_PMC_LOCKB>; 133 clocks = <&main>; 134 reg = <1>; 135 atmel,clk-input-range = <1000000 32000000>; 136 #atmel,pll-clk-output-range-cells = <4>; 137 atmel,pll-clk-output-ranges = <80000000 200000000 0 1>, 138 <190000000 240000000 2 1>; 139 }; 140 141 mck: masterck { 142 compatible = "atmel,at91rm9200-clk-master"; 143 #clock-cells = <0>; 144 interrupts-extended = <&pmc AT91_PMC_MCKRDY>; 145 clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>; 146 atmel,clk-output-range = <0 120000000>; 147 atmel,clk-divisors = <1 2 4 0>; 148 }; 149 150 usb: usbck { 151 compatible = "atmel,at91rm9200-clk-usb"; 152 #clock-cells = <0>; 153 atmel,clk-divisors = <1 2 4 0>; 154 clocks = <&pllb>; 155 }; 156 157 prog: progck { 158 compatible = "atmel,at91rm9200-clk-programmable"; 159 #address-cells = <1>; 160 #size-cells = <0>; 161 interrupt-parent = <&pmc>; 162 clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>; 163 164 prog0: prog0 { 165 #clock-cells = <0>; 166 reg = <0>; 167 interrupts = <AT91_PMC_PCKRDY(0)>; 168 }; 169 170 prog1: prog1 { 171 #clock-cells = <0>; 172 reg = <1>; 173 interrupts = <AT91_PMC_PCKRDY(1)>; 174 }; 175 176 prog2: prog2 { 177 #clock-cells = <0>; 178 reg = <2>; 179 interrupts = <AT91_PMC_PCKRDY(2)>; 180 }; 181 182 prog3: prog3 { 183 #clock-cells = <0>; 184 reg = <3>; 185 interrupts = <AT91_PMC_PCKRDY(3)>; 186 }; 187 }; 188 189 systemck { 190 compatible = "atmel,at91rm9200-clk-system"; 191 #address-cells = <1>; 192 #size-cells = <0>; 193 194 uhpck: uhpck { 195 #clock-cells = <0>; 196 reg = <6>; 197 clocks = <&usb>; 198 }; 199 200 udpck: udpck { 201 #clock-cells = <0>; 202 reg = <7>; 203 clocks = <&usb>; 204 }; 205 206 pck0: pck0 { 207 #clock-cells = <0>; 208 reg = <8>; 209 clocks = <&prog0>; 210 }; 211 212 pck1: pck1 { 213 #clock-cells = <0>; 214 reg = <9>; 215 clocks = <&prog1>; 216 }; 217 218 pck2: pck2 { 219 #clock-cells = <0>; 220 reg = <10>; 221 clocks = <&prog2>; 222 }; 223 224 pck3: pck3 { 225 #clock-cells = <0>; 226 reg = <11>; 227 clocks = <&prog3>; 228 }; 229 }; 230 231 periphck { 232 compatible = "atmel,at91rm9200-clk-peripheral"; 233 #address-cells = <1>; 234 #size-cells = <0>; 235 clocks = <&mck>; 236 237 pioA_clk: pioA_clk { 238 #clock-cells = <0>; 239 reg = <2>; 240 }; 241 242 pioB_clk: pioB_clk { 243 #clock-cells = <0>; 244 reg = <3>; 245 }; 246 247 pioCDE_clk: pioCDE_clk { 248 #clock-cells = <0>; 249 reg = <4>; 250 }; 251 252 usart0_clk: usart0_clk { 253 #clock-cells = <0>; 254 reg = <7>; 255 }; 256 257 usart1_clk: usart1_clk { 258 #clock-cells = <0>; 259 reg = <8>; 260 }; 261 262 usart2_clk: usart2_clk { 263 #clock-cells = <0>; 264 reg = <9>; 265 }; 266 267 mci0_clk: mci0_clk { 268 #clock-cells = <0>; 269 reg = <10>; 270 }; 271 272 mci1_clk: mci1_clk { 273 #clock-cells = <0>; 274 reg = <11>; 275 }; 276 277 can_clk: can_clk { 278 #clock-cells = <0>; 279 reg = <12>; 280 }; 281 282 twi0_clk: twi0_clk { 283 #clock-cells = <0>; 284 reg = <13>; 285 }; 286 287 spi0_clk: spi0_clk { 288 #clock-cells = <0>; 289 reg = <14>; 290 }; 291 292 spi1_clk: spi1_clk { 293 #clock-cells = <0>; 294 reg = <15>; 295 }; 296 297 ssc0_clk: ssc0_clk { 298 #clock-cells = <0>; 299 reg = <16>; 300 }; 301 302 ssc1_clk: ssc1_clk { 303 #clock-cells = <0>; 304 reg = <17>; 305 }; 306 307 ac97_clk: ac97_clk { 308 #clock-cells = <0>; 309 reg = <18>; 310 }; 311 312 tcb_clk: tcb_clk { 313 #clock-cells = <0>; 314 reg = <19>; 315 }; 316 317 pwm_clk: pwm_clk { 318 #clock-cells = <0>; 319 reg = <20>; 320 }; 321 322 macb0_clk: macb0_clk { 323 #clock-cells = <0>; 324 reg = <21>; 325 }; 326 327 g2de_clk: g2de_clk { 328 #clock-cells = <0>; 329 reg = <23>; 330 }; 331 332 udc_clk: udc_clk { 333 #clock-cells = <0>; 334 reg = <24>; 335 }; 336 337 isi_clk: isi_clk { 338 #clock-cells = <0>; 339 reg = <25>; 340 }; 341 342 lcd_clk: lcd_clk { 343 #clock-cells = <0>; 344 reg = <26>; 345 }; 346 347 dma_clk: dma_clk { 348 #clock-cells = <0>; 349 reg = <27>; 350 }; 351 352 ohci_clk: ohci_clk { 353 #clock-cells = <0>; 354 reg = <29>; 355 }; 356 }; 357 }; 358 359 ramc0: ramc@ffffe200 { 360 compatible = "atmel,at91sam9260-sdramc"; 361 reg = <0xffffe200 0x200>; 362 }; 363 364 ramc1: ramc@ffffe800 { 365 compatible = "atmel,at91sam9260-sdramc"; 366 reg = <0xffffe800 0x200>; 367 }; 368 369 pit: timer@fffffd30 { 370 compatible = "atmel,at91sam9260-pit"; 371 reg = <0xfffffd30 0xf>; 372 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 373 clocks = <&mck>; 374 }; 375 376 tcb0: timer@fff7c000 { 377 compatible = "atmel,at91rm9200-tcb"; 378 reg = <0xfff7c000 0x100>; 379 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 0>; 380 clocks = <&tcb_clk>; 381 clock-names = "t0_clk"; 382 }; 383 384 rstc@fffffd00 { 385 compatible = "atmel,at91sam9260-rstc"; 386 reg = <0xfffffd00 0x10>; 387 }; 388 389 shdwc@fffffd10 { 390 compatible = "atmel,at91sam9260-shdwc"; 391 reg = <0xfffffd10 0x10>; 392 }; 393 394 pinctrl@fffff200 { 395 #address-cells = <1>; 396 #size-cells = <1>; 397 compatible = "atmel,at91rm9200-pinctrl", "simple-bus"; 398 ranges = <0xfffff200 0xfffff200 0xa00>; 399 400 atmel,mux-mask = < 401 /* A B */ 402 0xfffffffb 0xffffe07f /* pioA */ 403 0x0007ffff 0x39072fff /* pioB */ 404 0xffffffff 0x3ffffff8 /* pioC */ 405 0xfffffbff 0xffffffff /* pioD */ 406 0xffe00fff 0xfbfcff00 /* pioE */ 407 >; 408 409 /* shared pinctrl settings */ 410 dbgu { 411 pinctrl_dbgu: dbgu-0 { 412 atmel,pins = 413 <AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC30 periph A */ 414 AT91_PIOC 31 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PC31 periph with pullup */ 415 }; 416 }; 417 418 usart0 { 419 pinctrl_usart0: usart0-0 { 420 atmel,pins = 421 <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA26 periph A with pullup */ 422 AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA27 periph A */ 423 }; 424 425 pinctrl_usart0_rts: usart0_rts-0 { 426 atmel,pins = 427 <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA28 periph A */ 428 }; 429 430 pinctrl_usart0_cts: usart0_cts-0 { 431 atmel,pins = 432 <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA29 periph A */ 433 }; 434 }; 435 436 usart1 { 437 pinctrl_usart1: usart1-0 { 438 atmel,pins = 439 <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD0 periph A with pullup */ 440 AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD1 periph A */ 441 }; 442 443 pinctrl_usart1_rts: usart1_rts-0 { 444 atmel,pins = 445 <AT91_PIOD 7 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD7 periph B */ 446 }; 447 448 pinctrl_usart1_cts: usart1_cts-0 { 449 atmel,pins = 450 <AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD8 periph B */ 451 }; 452 }; 453 454 usart2 { 455 pinctrl_usart2: usart2-0 { 456 atmel,pins = 457 <AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD2 periph A with pullup */ 458 AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD3 periph A */ 459 }; 460 461 pinctrl_usart2_rts: usart2_rts-0 { 462 atmel,pins = 463 <AT91_PIOD 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD5 periph B */ 464 }; 465 466 pinctrl_usart2_cts: usart2_cts-0 { 467 atmel,pins = 468 <AT91_PIOD 6 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD6 periph B */ 469 }; 470 }; 471 472 nand { 473 pinctrl_nand: nand-0 { 474 atmel,pins = 475 <AT91_PIOA 22 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PA22 gpio RDY pin pull_up*/ 476 AT91_PIOD 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PD15 gpio enable pin pull_up */ 477 }; 478 }; 479 480 macb { 481 pinctrl_macb_rmii: macb_rmii-0 { 482 atmel,pins = 483 <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC25 periph B */ 484 AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE21 periph A */ 485 AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE23 periph A */ 486 AT91_PIOE 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE24 periph A */ 487 AT91_PIOE 25 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE25 periph A */ 488 AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE26 periph A */ 489 AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE27 periph A */ 490 AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE28 periph A */ 491 AT91_PIOE 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE29 periph A */ 492 AT91_PIOE 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PE30 periph A */ 493 }; 494 495 pinctrl_macb_rmii_mii: macb_rmii_mii-0 { 496 atmel,pins = 497 <AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC20 periph B */ 498 AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC21 periph B */ 499 AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC22 periph B */ 500 AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC23 periph B */ 501 AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC24 periph B */ 502 AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC25 periph B */ 503 AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC27 periph B */ 504 AT91_PIOE 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE22 periph B */ 505 }; 506 }; 507 508 mmc0 { 509 pinctrl_mmc0_clk: mmc0_clk-0 { 510 atmel,pins = 511 <AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA12 periph A */ 512 }; 513 514 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 { 515 atmel,pins = 516 <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA1 periph A with pullup */ 517 AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA0 periph A with pullup */ 518 }; 519 520 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 { 521 atmel,pins = 522 <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA3 periph A with pullup */ 523 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA4 periph A with pullup */ 524 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA5 periph A with pullup */ 525 }; 526 527 pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 { 528 atmel,pins = 529 <AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA16 periph A with pullup */ 530 AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA17 periph A with pullup */ 531 }; 532 533 pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 { 534 atmel,pins = 535 <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA18 periph A with pullup */ 536 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA19 periph A with pullup */ 537 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA20 periph A with pullup */ 538 }; 539 }; 540 541 mmc1 { 542 pinctrl_mmc1_clk: mmc1_clk-0 { 543 atmel,pins = 544 <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA6 periph A */ 545 }; 546 547 pinctrl_mmc1_slot0_cmd_dat0: mmc1_slot0_cmd_dat0-0 { 548 atmel,pins = 549 <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */ 550 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA8 periph A with pullup */ 551 }; 552 553 pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 { 554 atmel,pins = 555 <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA9 periph A with pullup */ 556 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA10 periph A with pullup */ 557 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA11 periph A with pullup */ 558 }; 559 560 pinctrl_mmc1_slot1_cmd_dat0: mmc1_slot1_cmd_dat0-0 { 561 atmel,pins = 562 <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA21 periph A with pullup */ 563 AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA22 periph A with pullup */ 564 }; 565 566 pinctrl_mmc1_slot1_dat1_3: mmc1_slot1_dat1_3-0 { 567 atmel,pins = 568 <AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA23 periph A with pullup */ 569 AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA24 periph A with pullup */ 570 AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA25 periph A with pullup */ 571 }; 572 }; 573 574 ssc0 { 575 pinctrl_ssc0_tx: ssc0_tx-0 { 576 atmel,pins = 577 <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB0 periph B */ 578 AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB1 periph B */ 579 AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB2 periph B */ 580 }; 581 582 pinctrl_ssc0_rx: ssc0_rx-0 { 583 atmel,pins = 584 <AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB3 periph B */ 585 AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB4 periph B */ 586 AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB5 periph B */ 587 }; 588 }; 589 590 ssc1 { 591 pinctrl_ssc1_tx: ssc1_tx-0 { 592 atmel,pins = 593 <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB6 periph A */ 594 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB7 periph A */ 595 AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB8 periph A */ 596 }; 597 598 pinctrl_ssc1_rx: ssc1_rx-0 { 599 atmel,pins = 600 <AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A */ 601 AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB10 periph A */ 602 AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB11 periph A */ 603 }; 604 }; 605 606 spi0 { 607 pinctrl_spi0: spi0-0 { 608 atmel,pins = 609 <AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA0 periph B SPI0_MISO pin */ 610 AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA1 periph B SPI0_MOSI pin */ 611 AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA2 periph B SPI0_SPCK pin */ 612 }; 613 }; 614 615 spi1 { 616 pinctrl_spi1: spi1-0 { 617 atmel,pins = 618 <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A SPI1_MISO pin */ 619 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A SPI1_MOSI pin */ 620 AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB14 periph A SPI1_SPCK pin */ 621 }; 622 }; 623 624 tcb0 { 625 pinctrl_tcb0_tclk0: tcb0_tclk0-0 { 626 atmel,pins = <AT91_PIOB 28 AT91_PERIPH_B AT91_PINCTRL_NONE>; 627 }; 628 629 pinctrl_tcb0_tclk1: tcb0_tclk1-0 { 630 atmel,pins = <AT91_PIOC 28 AT91_PERIPH_B AT91_PINCTRL_NONE>; 631 }; 632 633 pinctrl_tcb0_tclk2: tcb0_tclk2-0 { 634 atmel,pins = <AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; 635 }; 636 637 pinctrl_tcb0_tioa0: tcb0_tioa0-0 { 638 atmel,pins = <AT91_PIOE 18 AT91_PERIPH_B AT91_PINCTRL_NONE>; 639 }; 640 641 pinctrl_tcb0_tioa1: tcb0_tioa1-0 { 642 atmel,pins = <AT91_PIOE 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; 643 }; 644 645 pinctrl_tcb0_tioa2: tcb0_tioa2-0 { 646 atmel,pins = <AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; 647 }; 648 649 pinctrl_tcb0_tiob0: tcb0_tiob0-0 { 650 atmel,pins = <AT91_PIOE 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; 651 }; 652 653 pinctrl_tcb0_tiob1: tcb0_tiob1-0 { 654 atmel,pins = <AT91_PIOE 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; 655 }; 656 657 pinctrl_tcb0_tiob2: tcb0_tiob2-0 { 658 atmel,pins = <AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE>; 659 }; 660 }; 661 662 fb { 663 pinctrl_fb: fb-0 { 664 atmel,pins = 665 <AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC1 periph A */ 666 AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC2 periph A */ 667 AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC3 periph A */ 668 AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB9 periph B */ 669 AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC6 periph A */ 670 AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC7 periph A */ 671 AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC8 periph A */ 672 AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC9 periph A */ 673 AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC10 periph A */ 674 AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC11 periph A */ 675 AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC14 periph A */ 676 AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC15 periph A */ 677 AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC16 periph A */ 678 AT91_PIOC 12 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC12 periph B */ 679 AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC18 periph A */ 680 AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC19 periph A */ 681 AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC22 periph A */ 682 AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC23 periph A */ 683 AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC24 periph A */ 684 AT91_PIOC 17 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC17 periph B */ 685 AT91_PIOC 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC26 periph A */ 686 AT91_PIOC 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC27 periph A */ 687 }; 688 }; 689 690 can { 691 pinctrl_can_rx_tx: can_rx_tx { 692 atmel,pins = 693 <AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* CANRX, conflicts with IRQ0 */ 694 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* CANTX, conflicts with PCK0 */ 695 }; 696 }; 697 698 ac97 { 699 pinctrl_ac97: ac97-0 { 700 atmel,pins = 701 <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A AC97FS pin */ 702 AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A AC97CK pin */ 703 AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A AC97TX pin */ 704 AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB14 periph A AC97RX pin */ 705 }; 706 }; 707 708 pioA: gpio@fffff200 { 709 compatible = "atmel,at91rm9200-gpio"; 710 reg = <0xfffff200 0x200>; 711 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>; 712 #gpio-cells = <2>; 713 gpio-controller; 714 interrupt-controller; 715 #interrupt-cells = <2>; 716 clocks = <&pioA_clk>; 717 }; 718 719 pioB: gpio@fffff400 { 720 compatible = "atmel,at91rm9200-gpio"; 721 reg = <0xfffff400 0x200>; 722 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>; 723 #gpio-cells = <2>; 724 gpio-controller; 725 interrupt-controller; 726 #interrupt-cells = <2>; 727 clocks = <&pioB_clk>; 728 }; 729 730 pioC: gpio@fffff600 { 731 compatible = "atmel,at91rm9200-gpio"; 732 reg = <0xfffff600 0x200>; 733 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>; 734 #gpio-cells = <2>; 735 gpio-controller; 736 interrupt-controller; 737 #interrupt-cells = <2>; 738 clocks = <&pioCDE_clk>; 739 }; 740 741 pioD: gpio@fffff800 { 742 compatible = "atmel,at91rm9200-gpio"; 743 reg = <0xfffff800 0x200>; 744 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>; 745 #gpio-cells = <2>; 746 gpio-controller; 747 interrupt-controller; 748 #interrupt-cells = <2>; 749 clocks = <&pioCDE_clk>; 750 }; 751 752 pioE: gpio@fffffa00 { 753 compatible = "atmel,at91rm9200-gpio"; 754 reg = <0xfffffa00 0x200>; 755 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>; 756 #gpio-cells = <2>; 757 gpio-controller; 758 interrupt-controller; 759 #interrupt-cells = <2>; 760 clocks = <&pioCDE_clk>; 761 }; 762 }; 763 764 dbgu: serial@ffffee00 { 765 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart"; 766 reg = <0xffffee00 0x200>; 767 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 768 pinctrl-names = "default"; 769 pinctrl-0 = <&pinctrl_dbgu>; 770 clocks = <&mck>; 771 clock-names = "usart"; 772 status = "disabled"; 773 }; 774 775 usart0: serial@fff8c000 { 776 compatible = "atmel,at91sam9260-usart"; 777 reg = <0xfff8c000 0x200>; 778 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>; 779 atmel,use-dma-rx; 780 atmel,use-dma-tx; 781 pinctrl-names = "default"; 782 pinctrl-0 = <&pinctrl_usart0>; 783 clocks = <&usart0_clk>; 784 clock-names = "usart"; 785 status = "disabled"; 786 }; 787 788 usart1: serial@fff90000 { 789 compatible = "atmel,at91sam9260-usart"; 790 reg = <0xfff90000 0x200>; 791 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>; 792 atmel,use-dma-rx; 793 atmel,use-dma-tx; 794 pinctrl-names = "default"; 795 pinctrl-0 = <&pinctrl_usart1>; 796 clocks = <&usart1_clk>; 797 clock-names = "usart"; 798 status = "disabled"; 799 }; 800 801 usart2: serial@fff94000 { 802 compatible = "atmel,at91sam9260-usart"; 803 reg = <0xfff94000 0x200>; 804 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>; 805 atmel,use-dma-rx; 806 atmel,use-dma-tx; 807 pinctrl-names = "default"; 808 pinctrl-0 = <&pinctrl_usart2>; 809 clocks = <&usart2_clk>; 810 clock-names = "usart"; 811 status = "disabled"; 812 }; 813 814 ssc0: ssc@fff98000 { 815 compatible = "atmel,at91rm9200-ssc"; 816 reg = <0xfff98000 0x4000>; 817 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>; 818 pinctrl-names = "default"; 819 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; 820 clocks = <&ssc0_clk>; 821 clock-names = "pclk"; 822 status = "disabled"; 823 }; 824 825 ssc1: ssc@fff9c000 { 826 compatible = "atmel,at91rm9200-ssc"; 827 reg = <0xfff9c000 0x4000>; 828 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>; 829 pinctrl-names = "default"; 830 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>; 831 clocks = <&ssc1_clk>; 832 clock-names = "pclk"; 833 status = "disabled"; 834 }; 835 836 ac97: sound@fffa0000 { 837 compatible = "atmel,at91sam9263-ac97c"; 838 reg = <0xfffa0000 0x4000>; 839 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 5>; 840 pinctrl-names = "default"; 841 pinctrl-0 = <&pinctrl_ac97>; 842 clocks = <&ac97_clk>; 843 clock-names = "ac97_clk"; 844 status = "disabled"; 845 }; 846 847 macb0: ethernet@fffbc000 { 848 compatible = "cdns,at91sam9260-macb", "cdns,macb"; 849 reg = <0xfffbc000 0x100>; 850 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>; 851 pinctrl-names = "default"; 852 pinctrl-0 = <&pinctrl_macb_rmii>; 853 clocks = <&macb0_clk>, <&macb0_clk>; 854 clock-names = "hclk", "pclk"; 855 status = "disabled"; 856 }; 857 858 usb1: gadget@fff78000 { 859 compatible = "atmel,at91sam9263-udc"; 860 reg = <0xfff78000 0x4000>; 861 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 2>; 862 clocks = <&udc_clk>, <&udpck>; 863 clock-names = "pclk", "hclk"; 864 status = "disabled"; 865 }; 866 867 i2c0: i2c@fff88000 { 868 compatible = "atmel,at91sam9260-i2c"; 869 reg = <0xfff88000 0x100>; 870 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 6>; 871 #address-cells = <1>; 872 #size-cells = <0>; 873 clocks = <&twi0_clk>; 874 status = "disabled"; 875 }; 876 877 mmc0: mmc@fff80000 { 878 compatible = "atmel,hsmci"; 879 reg = <0xfff80000 0x600>; 880 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>; 881 pinctrl-names = "default"; 882 #address-cells = <1>; 883 #size-cells = <0>; 884 clocks = <&mci0_clk>; 885 clock-names = "mci_clk"; 886 status = "disabled"; 887 }; 888 889 mmc1: mmc@fff84000 { 890 compatible = "atmel,hsmci"; 891 reg = <0xfff84000 0x600>; 892 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>; 893 pinctrl-names = "default"; 894 #address-cells = <1>; 895 #size-cells = <0>; 896 clocks = <&mci1_clk>; 897 clock-names = "mci_clk"; 898 status = "disabled"; 899 }; 900 901 watchdog@fffffd40 { 902 compatible = "atmel,at91sam9260-wdt"; 903 reg = <0xfffffd40 0x10>; 904 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 905 atmel,watchdog-type = "hardware"; 906 atmel,reset-type = "all"; 907 atmel,dbg-halt; 908 status = "disabled"; 909 }; 910 911 spi0: spi@fffa4000 { 912 #address-cells = <1>; 913 #size-cells = <0>; 914 compatible = "atmel,at91rm9200-spi"; 915 reg = <0xfffa4000 0x200>; 916 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>; 917 pinctrl-names = "default"; 918 pinctrl-0 = <&pinctrl_spi0>; 919 clocks = <&spi0_clk>; 920 clock-names = "spi_clk"; 921 status = "disabled"; 922 }; 923 924 spi1: spi@fffa8000 { 925 #address-cells = <1>; 926 #size-cells = <0>; 927 compatible = "atmel,at91rm9200-spi"; 928 reg = <0xfffa8000 0x200>; 929 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 3>; 930 pinctrl-names = "default"; 931 pinctrl-0 = <&pinctrl_spi1>; 932 clocks = <&spi1_clk>; 933 clock-names = "spi_clk"; 934 status = "disabled"; 935 }; 936 937 pwm0: pwm@fffb8000 { 938 compatible = "atmel,at91sam9rl-pwm"; 939 reg = <0xfffb8000 0x300>; 940 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 4>; 941 #pwm-cells = <3>; 942 clocks = <&pwm_clk>; 943 clock-names = "pwm_clk"; 944 status = "disabled"; 945 }; 946 947 can: can@fffac000 { 948 compatible = "atmel,at91sam9263-can"; 949 reg = <0xfffac000 0x300>; 950 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>; 951 pinctrl-names = "default"; 952 pinctrl-0 = <&pinctrl_can_rx_tx>; 953 clocks = <&can_clk>; 954 clock-names = "can_clk"; 955 }; 956 957 rtc@fffffd20 { 958 compatible = "atmel,at91sam9260-rtt"; 959 reg = <0xfffffd20 0x10>; 960 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 961 clocks = <&slow_xtal>; 962 status = "disabled"; 963 }; 964 965 rtc@fffffd50 { 966 compatible = "atmel,at91sam9260-rtt"; 967 reg = <0xfffffd50 0x10>; 968 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 969 clocks = <&slow_xtal>; 970 status = "disabled"; 971 }; 972 973 gpbr: syscon@fffffd60 { 974 compatible = "atmel,at91sam9260-gpbr", "syscon"; 975 reg = <0xfffffd60 0x50>; 976 status = "disabled"; 977 }; 978 }; 979 980 fb0: fb@0x00700000 { 981 compatible = "atmel,at91sam9263-lcdc"; 982 reg = <0x00700000 0x1000>; 983 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 3>; 984 pinctrl-names = "default"; 985 pinctrl-0 = <&pinctrl_fb>; 986 clocks = <&lcd_clk>, <&lcd_clk>; 987 clock-names = "lcdc_clk", "hclk"; 988 status = "disabled"; 989 }; 990 991 nand0: nand@40000000 { 992 compatible = "atmel,at91rm9200-nand"; 993 #address-cells = <1>; 994 #size-cells = <1>; 995 reg = <0x40000000 0x10000000 996 0xffffe000 0x200 997 >; 998 atmel,nand-addr-offset = <21>; 999 atmel,nand-cmd-offset = <22>; 1000 pinctrl-names = "default"; 1001 pinctrl-0 = <&pinctrl_nand>; 1002 gpios = <&pioA 22 GPIO_ACTIVE_HIGH 1003 &pioD 15 GPIO_ACTIVE_HIGH 1004 0 1005 >; 1006 status = "disabled"; 1007 }; 1008 1009 usb0: ohci@00a00000 { 1010 compatible = "atmel,at91rm9200-ohci", "usb-ohci"; 1011 reg = <0x00a00000 0x100000>; 1012 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 2>; 1013 clocks = <&usb>, <&ohci_clk>, <&ohci_clk>, <&uhpck>; 1014 clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck"; 1015 status = "disabled"; 1016 }; 1017 }; 1018 1019 i2c@0 { 1020 compatible = "i2c-gpio"; 1021 gpios = <&pioB 4 GPIO_ACTIVE_HIGH /* sda */ 1022 &pioB 5 GPIO_ACTIVE_HIGH /* scl */ 1023 >; 1024 i2c-gpio,sda-open-drain; 1025 i2c-gpio,scl-open-drain; 1026 i2c-gpio,delay-us = <2>; /* ~100 kHz */ 1027 #address-cells = <1>; 1028 #size-cells = <0>; 1029 status = "disabled"; 1030 }; 1031}; 1032