Searched refs:r16 (Results 1 - 148 of 148) sorted by relevance

/linux-4.1.27/arch/ia64/kernel/
H A Dminstate.h33 * r2 = points to &pt_regs.r16
48 mov r16=IA64_KR(CURRENT); /* M */ \
58 adds r16=IA64_TASK_THREAD_ON_USTACK_OFFSET,r16; \
60 ld1 r17=[r16]; /* load current->thread.on_ustack flag */ \
61 st1 [r16]=r0; /* clear current->thread.on_ustack flag */ \
62 adds r1=-IA64_TASK_THREAD_ON_USTACK_OFFSET,r16 \
85 adds r16=PT(CR_IPSR),r1; \
88 st8 [r16]=r29; /* save cr.ipsr */ \
95 adds r16=PT(R8),r1; /* initialize first base pointer */ \
99 .mem.offset 0,0; st8.spill [r16]=r8,16; \
102 .mem.offset 0,0; st8.spill [r16]=r10,24; \
105 st8 [r16]=r28,16; /* save cr.iip */ \
113 st8 [r16]=r25,16; /* save ar.unat */ \
117 st8 [r16]=r27,16; /* save ar.rsc */ \
120 ;; /* avoid RAW on r16 & r17 */ \
121 (pUStk) st8 [r16]=r23,16; /* save ar.bspstore */ \
123 (pKStk) adds r16=16,r16; /* skip over ar_bspstore field */ \
125 st8 [r16]=r29,16; /* save b0 */ \
129 .mem.offset 0,0; st8.spill [r16]=r20,16; /* save original r1 */ \
133 .mem.offset 0,0; st8.spill [r16]=r13,16; \
137 .mem.offset 0,0; st8.spill [r16]=r15,16; \
140 .mem.offset 0,0; st8.spill [r16]=r2,16; \
157 * r2: points to &pt_regs.r16
167 .mem.offset 0,0; st8.spill [r2]=r16,16; \
216 (pUStk) sub r16=r18,r22; \
225 cmp.leu p1,p0=r16,r17; \
228 movl r16=2f; \
232 mov b0=r16; \
H A Drelocate_kernel.S40 movl r16 = IA64_PSR_AC|IA64_PSR_BN|IA64_PSR_IC
49 mov cr.ipsr=r16
98 movl r16=KERNEL_START
101 ptr.i r16, r18
102 ptr.d r16, r18
108 mov r16=in3
111 ptr.i r16,r18
117 mov r16=IA64_KR(CURRENT_STACK)
119 shl r16=r16,IA64_GRANULE_SHIFT
122 add r16=r19,r16
125 ptr.d r16,r18
131 movl r16=PAGE_MASK
139 (p6) and r17=r30, r16
143 (p6) and in0=r30, r16
152 and r18=r30, r16
262 st8 [in0]=r16, 8 // r16
H A Divt.S72 # define DBG_FAULT(i) mov r16=ar.k2;; shl r16=r16,8;; add r16=(i),r16;;mov ar.k2=r16
111 MOV_FROM_IFA(r16) // get address that caused the TLB miss
120 shl r21=r16,3 // shift bit 60 into sign bit
121 shr.u r17=r16,61 // get the region number into r17
239 (p6) ptc.l r16,r27 // purge translation
257 MOV_FROM_IFA(r16) // get virtual address
284 (p7) ptc.l r16,r20
301 MOV_FROM_IFA(r16) // get virtual address
328 (p7) ptc.l r16,r20
339 MOV_FROM_IFA(r16) // get address that caused the TLB miss
346 shr.u r22=r16,61 // get the region number into r21
350 THASH(p8, r17, r16, r23)
357 and r19=r19,r16 // clear ed, reserved bits, and PTE control bits
358 shr.u r18=r16,57 // move address bit 61 to bit 4
377 MOV_FROM_IFA(r16) // get address that caused the TLB miss
386 shr.u r22=r16,61 // get the region number into r21
390 THASH(p8, r17, r16, r25)
396 cmp.ge p10,p11=r16,r24 // access to per_cpu_data?
397 tbit.z p12,p0=r16,61 // access to region 6?
404 (p11) and r19=r19,r16 // clear non-ppn fields
441 * Input: r16: faulting address
455 shl r21=r16,3 // shift bit 60 into sign bit
458 shr.u r17=r16,61 // get the region number into r17
465 shr.u r22=r16,r22
466 shr.u r18=r16,r18
538 MOV_FROM_IFA(r16) // get the address that caused the fault
541 THASH(p0, r17, r16, r18) // compute virtual address of L3 PTE
570 (p7) ptc.l r16,r24
581 ITC_D(p0, r18, r16) // install updated PTE
593 MOV_FROM_IFA(r16) // get the address that caused the fault
605 (p6) mov r16=r18 // if so, use cr.iip instead of cr.ifa
608 THASH(p0, r17, r16, r18) // compute virtual address of L3 PTE
636 (p7) ptc.l r16,r24
647 ITC_I(p0, r18, r16) // install updated PTE
659 MOV_FROM_IFA(r16) // get the address that caused the fault
662 THASH(p0, r17, r16, r18) // compute virtual address of L3 PTE
690 (p7) ptc.l r16,r24
699 ITC_D(p0, r18, r16) // install updated PTE
726 mov.m r16=IA64_KR(CURRENT) // M2 r16 <- current task (12 cyc)
757 mov r1=r16 // A move task-pointer to "addl"-addressable reg
758 mov r2=r16 // A setup r2 for ia64_syscall_setup
759 add r9=TI_FLAGS+IA64_TASK_SIZE,r16 // A r9 = &current_thread_info()->flags
761 adds r16=IA64_TASK_THREAD_ON_USTACK_OFFSET,r16
765 ld1.bias r17=[r16] // M0|1 r17 = current->thread.on_ustack flag
803 st1 [r16]=r0 // M2|3 clear current->thread.on_ustack flag
822 add r16=TI_AC_STAMP+IA64_TASK_SIZE,r13 // A
826 ld8 r18=[r16],TI_AC_STIME-TI_AC_STAMP // M get last stamp
829 ld8 r20=[r16],TI_AC_STAMP-TI_AC_STIME // M cumulated stime
833 st8 [r16]=r30,TI_AC_STIME-TI_AC_STAMP // M update stamp
839 st8 [r16]=r20 // M update stime
849 SSM_PSR_IC_AND_DEFAULT_BITS_AND_SRLZ_I(r3, r16) // M2 now it's safe to re-enable intr.-collection
856 SSM_PSR_I(p15, p15, r16) // M2 restore psr.i
946 add r16=PT(CR_IPSR),r1 // initialize first base pointer
950 st8 [r16]=r29,PT(AR_PFS)-PT(CR_IPSR) // save cr.ipsr
958 st8 [r16]=r26,PT(CR_IFS)-PT(AR_PFS) // save ar.pfs
968 st8 [r16]=r19,PT(AR_RNAT)-PT(CR_IFS) // store ar.pfs.pfm in cr.ifs
981 (pKStk) adds r16=PT(PR)-PT(AR_RNAT),r16 // skip over ar_rnat field
989 (pUStk) st8 [r16]=r24,PT(PR)-PT(AR_RNAT) // save ar.rnat
993 st8 [r16]=r31,PT(LOADRS)-PT(PR) // save predicates
997 st8 [r16]=r18,PT(R12)-PT(LOADRS) // save ar.rsc value for "loadrs"
1002 .mem.offset 0,0; st8.spill [r16]=r12,PT(AR_FPSR)-PT(R12) // save r12
1006 st8 [r16]=r21,PT(R8)-PT(AR_FPSR) // save ar.fpsr
1021 st8 [r16]=r8 // ensure pt_regs.r8 != 0 (see handle_syscall_error)
1058 add r16=TI_AC_STAMP+IA64_TASK_SIZE,r13
1061 ld8 r18=[r16],TI_AC_STIME-TI_AC_STAMP // time at last check in kernel
1064 ld8 r23=[r16],TI_AC_STAMP-TI_AC_STIME // cumulated stime
1068 st8 [r16]=r20,TI_AC_STIME-TI_AC_STAMP // update stamp
1074 st8 [r16]=r23 // update stime
1108 MOV_FROM_IFA(r16)
1116 ptc.l r16,r17
1128 MOV_FROM_IFA(r16)
1141 MOV_FROM_IFA(r16)
1154 MOV_FROM_IFA(r16)
1167 MOV_FROM_ISR(r16)
1170 cmp4.eq p6,p0=0,r16
1196 MOV_FROM_IPSR(p0, r16)
1204 dep r16=-1,r16,IA64_PSR_ED_BIT,1
1207 MOV_TO_IPSR(p0, r16, r18)
1238 MOV_FROM_IPSR(p0, r16)
1245 dep r16=0,r16,41,2 // clear EI
1248 MOV_TO_IPSR(p0, r16, r19)
1519 // call do_page_fault (predicates are in r31, psr.dt may be off, r16 is faulting address)
H A Defi_stub.S57 movl r16=PSR_BITS_TO_CLEAR
64 andcm r16=loc3,r16 // get psr with IT, DT, and RT bits cleared
77 mov r16=loc3
H A Desi_stub.S74 movl r16=PSR_BITS_TO_CLEAR
81 andcm r16=loc3,r16 // get psr with IT, DT, and RT bits cleared
87 mov r16=loc3 // save virtual mode psr
H A Djprobes.S66 movl r16=invalidate_restore_cfm
68 mov b6=r16
73 mov r16=ar.rsc
79 mov ar.rsc=r16
H A Dmca_asm.S99 movl r16=KERNEL_START
102 ptr.i r16, r18
103 ptr.d r16, r18
112 ld8 r16=[r2]
115 ptr.i r16,r18
120 mov r16=IA64_KR(CURRENT_STACK)
122 shl r16=r16,IA64_GRANULE_SHIFT
125 add r16=r19,r16
128 ptr.d r16,r18
173 mov r16=IA64_TR_KERNEL
181 itr.i itr[r16]=r18
183 itr.d dtr[r16]=r18
195 ld8 r16=[r2] // load PAL vaddr
199 mov cr.ifa=r16
207 mov r16=IA64_KR(CURRENT_STACK)
209 shl r16=r16,IA64_GRANULE_SHIFT
212 add r18=r19,r16
215 add r16=r20,r16
222 itr.d dtr[r20]=r16
828 ld8 r16=[temp1],16 // prev_IA64_KR_CURRENT_STACK
857 * r16 contains prev_IA64_KR_CURRENT_STACK, r13 contains
875 shl r20=r16,IA64_GRANULE_SHIFT // r16 = prev_IA64_KR_CURRENT_STACK
878 mov IA64_KR(CURRENT_STACK)=r16
1038 mov r16=IA64_KR(CURRENT_STACK) // physical granule mapped by IA64_TR_CURRENT_STACK
1040 shl r16=r16,IA64_GRANULE_SHIFT
1042 dep r16=-1,r16,61,3 // virtual granule
1045 ptr.d r16,r18
1049 shr.u r16=r20,IA64_GRANULE_SHIFT // r20 = physical start of MCA/INIT stack
1052 mov IA64_KR(CURRENT_STACK)=r16
H A Dentry.S112 alloc r16=ar.pfs,8,2,6,0
116 mov loc1=r16 // save ar.pfs across do_fork
123 (p6) st8 [r2]=in5 // store TLS in r16 for copy_thread()
143 alloc r16=ar.pfs,8,2,6,0
147 mov loc1=r16 // save ar.pfs across do_fork
174 alloc r16=ar.pfs,1,0,0,0
239 * - r16 holds ar.pfs
316 st8 [r15]=r16,SW(AR_LC)-SW(AR_PFS) // save ar.pfs
390 ld8 r16=[r2],(SW(PR)-SW(AR_PFS)) // ar.pfs
440 mov ar.pfs=r16
464 ld8 r16 = [r15] // load next's stack pointer
468 lfetch.fault [r16], 128
471 lfetch.fault [r16], 128
474 lfetch.fault [r16], 128
477 lfetch.fault [r16], 128
479 lfetch.fault [r16], 128
495 adds r16=PT(F6)+16,sp
498 stf.spill [r16]=f6,32
501 stf.spill [r16]=f8,32
504 stf.spill [r16]=f10
512 adds r16=PT(F6)+16,sp
515 ldf.fill f6=[r16],32
518 ldf.fill f8=[r16],32
521 ldf.fill f10=[r16]
531 movl r16=sys_call_table
533 shladd r20=r15,3,r16 // r20 = sys_call_table + 8*(syscall-1024)
667 * r16-r17: cleared
746 mov r16=ar.bsp // M2 get existing backing store pointer
884 ld8.fill r16=[r3],PT(AR_CSD)-PT(R16)
948 adds r16=PT(CR_IPSR)+16,r12
963 ld8 r29=[r16],16 // load cr.ipsr
966 ld8 r30=[r16],16 // load cr.ifs
969 ld8 r26=[r16],16 // load ar.pfs
973 ld8 r24=[r16],16 // load ar.rnat (may be garbage)
976 ld8 r31=[r16],16 // load predicates
979 ld8 r19=[r16],16 // load ar.rsc value for "loadrs"
982 ld8.fill r12=[r16],16
990 ld8 r20=[r16],16 // ar.fpsr
996 ld8.fill r14=[r16],16
1005 // no one require bsp in r16 if (pKStk) branch is selected.
1010 ld8.fill r3=[r16] // deferred
1013 mov r16=ar.bsp // get existing backing store pointer
1015 ld8.fill r3=[r16]
1019 mov r16=ar.bsp // get existing backing store pointer
1034 sub r16=r16,r18 // krbs = old bsp - size of dirty partition
1037 sub r19=r19,r16 // calculate total byte size of dirty partition
1131 (pLvSys)mov r16=r0 // A clear r16 for leave_syscall, no-op otherwise
1280 adds r16=PT(F6)+32,sp
1283 stf.spill [r16]=f6,32
1286 stf.spill [r16]=f8,32
1289 stf.spill [r16]=f10
1306 * r16 = fake ar.pfs, we simply need to make sure privilege is still 0
1308 mov r16=r0
1327 mov r16=loc1
H A Dpal.S170 movl r16=PAL_PSR_BITS_TO_CLEAR
175 andcm r16=loc3,r16 // removes bits to clear from psr
183 mov r16=loc3 // r16= original psr
221 movl r16=PAL_PSR_BITS_TO_CLEAR
227 andcm r16=loc3,r16 // removes bits to clear from psr
240 mov r16=loc3 // r16= original psr
H A Dhead.S226 SET_ONE_RR(0, PAGE_SHIFT, r2, r16, 1);;
227 SET_ONE_RR(1, PAGE_SHIFT, r2, r16, 1);;
228 SET_ONE_RR(2, PAGE_SHIFT, r2, r16, 1);;
229 SET_ONE_RR(3, PAGE_SHIFT, r2, r16, 1);;
230 SET_ONE_RR(4, PAGE_SHIFT, r2, r16, 1);;
231 SET_ONE_RR(5, PAGE_SHIFT, r2, r16, 1);;
232 SET_ONE_RR(6, IA64_GRANULE_SHIFT, r2, r16, 0);;
233 SET_ONE_RR(7, IA64_GRANULE_SHIFT, r2, r16, 0);;
242 mov r16=IA64_TR_KERNEL
252 itr.i itr[r16]=r18
254 itr.d dtr[r16]=r18
261 movl r16=(IA64_PSR_IT|IA64_PSR_IC|IA64_PSR_DT|IA64_PSR_RT|IA64_PSR_DFH|IA64_PSR_BN \
264 mov cr.ipsr=r16
274 SET_AREA_FOR_BOOTING_CPU(r2, r16);
276 STORE_REGION_REGS(r16, r8,r9,r10,r11,r12,r13,r14,r15);
277 SAL_TO_OS_BOOT_HANDOFF_STATE_SAVE(r16,r17,r25)
314 mov r16=-1
328 shr.u r16=r3,IA64_GRANULE_SHIFT
346 mov IA64_KR(CURRENT_STACK)=r16
401 mov r16=num_hypervisor_hooks
405 cmp.ltu p7,p0=r2,r16 // array size check
460 alloc r16=ar.pfs,1,0,0,0
466 1: mov r16=dbr[r18]
474 st8.nta [in0]=r16,8
483 alloc r16=ar.pfs,1,0,0,0
490 1: ld8.nta r16=[in0],8
494 mov dbr[r18]=r16
916 * r16 = new psr to establish
934 mov cr.ipsr=r16 // set new PSR
965 * r16 = new psr to establish
982 mov cr.ipsr=r16 // set new PSR
1075 alloc r16=ar.pfs,1,0,0,0
1101 alloc r16=ar.pfs,1,0,0,0; \
1119 alloc r16=ar.pfs,1,0,0,0;;
1136 movl r16=SAL_PSR_BITS_TO_SET;;
1137 mov cr.ipsr=r16
H A Dfsys.S36 * r16 = "current" task pointer (in normal kernel-mode, this is in r13)
64 add r17=IA64_TASK_GROUP_LEADER_OFFSET,r16
67 add r9=TI_FLAGS+IA64_TASK_SIZE,r16
97 add r9=TI_FLAGS+IA64_TASK_SIZE,r16
98 add r17=IA64_TASK_TGIDLINK_OFFSET,r16
106 add r18=IA64_TASK_CLEAR_CHILD_TID_OFFSET,r16
162 // r16 = preserved: current task pointer
193 add r2 = TI_FLAGS+IA64_TASK_SIZE,r16
336 add r2=TI_FLAGS+IA64_TASK_SIZE,r16
338 add r3=TI_CPU+IA64_TASK_SIZE,r16
472 mov r2=r16 // A get task addr to addl-addressable register
473 adds r16=IA64_TASK_THREAD_ON_USTACK_OFFSET,r16 // A
476 st1 [r16]=r0 // M2|3 clear current->thread.on_ustack flag
513 add r16=TI_AC_STAMP+IA64_TASK_SIZE,r2
516 ld8 r18=[r16],TI_AC_STIME-TI_AC_STAMP // time at last check in kernel
519 ld8 r20=[r16],TI_AC_STAMP-TI_AC_STIME // cumulated stime
523 st8 [r16]=r30,TI_AC_STIME-TI_AC_STAMP // update stamp
529 st8 [r16]=r20 // update stime
H A Dgate.S130 (p1) br.cond.spnt setup_rbs // yup -> (clobbers p8, r14-r16, and r18-r20)
210 mov.m r16=ar.bsp // sc_loadrs <- (new bsp - new bspstore) << 16
214 sub r15=r16,r15
245 adds r16=(LOADRS_OFF+SIGCONTEXT_OFF),sp
248 ld8 r17=[r16]
249 ld8 r16=[r18] // get new rnat
293 mov ar.rnat=r16 // restore RNaT
331 mov r16=IA64_KR(CURRENT) // M2 (12 cyc)
H A Dsignal.c86 err |= __copy_from_user(&scr->pt.r16, &sc->sc_gr[16], 16*8); /* r16-r31 */ restore_sigcontext()
271 err |= __copy_to_user(&sc->sc_gr[16], &scr->pt.r16, 16*8); /* r16-r31 */ setup_sigcontext()
H A Dprocess.c131 printk("r14 : %016lx r15 : %016lx r16 : %016lx\n", regs->r14, regs->r15, regs->r16); show_regs()
417 child_ptregs->r13 = regs->r16; /* see sys_clone2() in entry.S */ copy_thread()
H A Dptrace.c774 memset(&pt->r16, 0, 16*8); /* clear r16-r31 */ convert_to_non_syscall()
902 retval |= __copy_to_user(&ppr->gr[16], &pt->r16, sizeof(long) * 16); ptrace_getregs()
1039 retval |= __copy_from_user(&pt->r16, &ppr->gr[16], sizeof(long) * 16); ptrace_setregs()
1546 /* r16-r31 */ do_gpregs_get()
1550 &dst->u.get.kbuf, &dst->u.get.ubuf, &pt->r16, do_gpregs_get()
1638 &dst->u.set.kbuf, &dst->u.set.ubuf, &pt->r16, do_gpregs_set()
H A Dasm-offsets.c105 DEFINE(IA64_PT_REGS_R16_OFFSET, offsetof (struct pt_regs, r16)); foo()
H A Dmodule.c266 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* movl r16=TARGET_IP */
276 0x60, 0x80, 0x04, 0x80, 0x03, 0x00, /* mov b6=r16 */
H A Dunaligned.c219 RPT(r16), RPT(r17), RPT(r18), RPT(r19),
H A Dmca.c933 copy_reg(&bank[16-16], ms->pmsa_nat_bits, &regs->r16, nat); finish_pt_regs()
H A Dunwind.c210 offsetof(struct pt_regs, r16),
/linux-4.1.27/arch/powerpc/crypto/
H A Daes-spe-keys.S28 stw r16,16(r1);
33 lwz r16,16(r1); \
89 li r16,10 /* 10 expansion rounds */
106 subi r16,r16,1
107 cmpwi r16,0
135 li r16,8 /* 8 expansion rounds */
153 subi r16,r16,1
154 cmpwi r16,0 /* last round early kick out */
189 li r16,7 /* 7 expansion rounds */
211 subi r16,r16,1
212 cmpwi r16,0 /* last round early kick out */
H A Dsha1-powerpc-asm.S163 lwz r16,0(r3)
168 add RA(0),RA(80),r16
H A Daes-spe-regs.h27 #define rW0 r16 /* working registers */
H A Dsha1-spe-asm.S27 #define rW2 r16
65 evstdw r16,24(r1); /* and save the SPE part too */ \
78 evldw r16,24(r1); \
H A Dsha256-spe-asm.S36 #define rW2 r16
56 evstdw r16,24(r1); /* and save the SPE part too */ \
71 evldw r16,24(r1); \
H A Dmd5-asm.S30 #define rW07 r16
H A Daes-spe-modes.S93 evstdw r16,32(r1); /* registers. Take the chance */ \
107 evldw r16,32(r1); \
/linux-4.1.27/arch/powerpc/mm/
H A Dtlb_low_64e.S65 std r16,EX_TLB_R16(r12)
66 mfspr r16,\addr /* get faulting address */
83 ld r16,EX_TLB_R16(r12)
115 srdi r15,r16,60 /* get region */
116 rldicl. r10,r16,64-PGTABLE_EADDR_SIZE,PGTABLE_EADDR_SIZE+4
133 * r16 = faulting address
140 rldicl r15,r16,64-PGDIR_SHIFT+3,64-PGD_INDEX_SIZE-3
157 rldicl r15,r16,64-PUD_SHIFT+3,64-PUD_INDEX_SIZE-3
164 rldicl r15,r16,64-PMD_SHIFT+3,64-PMD_INDEX_SIZE-3
170 rldicl r15,r16,64-PAGE_SHIFT+3,64-PTE_INDEX_SIZE-3
191 clrrdi r11,r16,12 /* Clear low crap in EA */
240 rldicl. r10,r16,64-PGTABLE_EADDR_SIZE,PGTABLE_EADDR_SIZE+4
241 srdi r15,r16,60 /* get region */
272 srdi. r15,r16,60 /* get region */
273 ori r16,r16,1
284 srdi. r15,r16,60 /* get region */
285 rldicr r16,r16,0,62
294 * r16 = page of faulting address (low bit 0 if data, 1 if instruction)
373 tlbsx 0,r16
389 rldicl. r10,r16,64-PGTABLE_EADDR_SIZE,PGTABLE_EADDR_SIZE+4
392 rldicl r15,r16,64-PGDIR_SHIFT+3,64-PGD_INDEX_SIZE-3
398 rldicl r15,r16,64-PUD_SHIFT+3,64-PUD_INDEX_SIZE-3
404 rldicl r15,r16,64-PMD_SHIFT+3,64-PMD_INDEX_SIZE-3
428 clrrdi r15,r16,21 /* make EA 2M-aligned */
432 lbz r16,TCD_ESEL_MAX(r11)
437 cmpw r15,r16
467 andi. r16,r16,1
496 mfspr r16,SPRN_DEAR /* get faulting address */
497 srdi r15,r16,60 /* get region */
511 std r16,EX_TLB_DEAR(r12); /* save DEAR */
571 * Faulting address is SRR0 which is already in r16
573 srdi r15,r16,60 /* get region */
605 * r16 = faulting address
625 rldicl r14,r16,64-(PAGE_SHIFT-4),PAGE_SHIFT-4+4
629 rldicl r15,r16,64-(PAGE_SHIFT-3),64-15
633 rldicl r14,r16,64-(PAGE_SHIFT-3),PAGE_SHIFT-3+4
667 clrrdi r11,r16,12 /* Clear low crap in EA */
697 srdi r16,r15,32
699 mtspr SPRN_MAS7,r16
735 * r16 = virtual page table faulting address
783 rldicl. r10,r16,64-(VPTE_INDEX_SIZE+3),VPTE_INDEX_SIZE+3+4
792 rldicl r11,r16,64-VPTE_PGD_SHIFT,64-PGD_INDEX_SIZE-3
800 rldicl r11,r16,64-VPTE_PUD_SHIFT,64-PUD_INDEX_SIZE-3
808 rldicl r11,r16,64-VPTE_PMD_SHIFT,64-PMD_INDEX_SIZE-3
815 * a 4K or 64K page from r16 -> r15.
832 srdi r16,r10,32
834 mtspr SPRN_MAS7,r16
896 ld r16,EX_TLB_ESR+PACA_EXTLB(r13)
899 cmpdi cr0,r16,-1
902 mtspr SPRN_ESR,r16
936 mfspr r16,SPRN_DEAR /* get faulting address */
937 srdi r11,r16,60 /* get region */
979 * Faulting address is SRR0 which is already in r16
981 srdi r11,r16,60 /* get region */
1010 * r16 = virtual page table faulting address
1033 rldicl. r10,r16,64-PGTABLE_EADDR_SIZE,PGTABLE_EADDR_SIZE+4
1041 rldicl r11,r16,64-(PGDIR_SHIFT-3),64-PGD_INDEX_SIZE-3
1049 rldicl r11,r16,64-(PUD_SHIFT-3),64-PUD_INDEX_SIZE-3
1057 rldicl r11,r16,64-(PMD_SHIFT-3),64-PMD_INDEX_SIZE-3
1074 rlwimi r15,r16,32-9,20,20
1092 srdi r16,r10,32
1094 mtspr SPRN_MAS7,r16
1116 mtspr SPRN_DEAR,r16
1130 * r16 = faulting address
1159 cmpld cr0,r16,r10
1177 clrrdi r10,r16,30 /* 1G page index */
1182 srdi r16,r10,32
1184 mtspr SPRN_MAS7,r16
/linux-4.1.27/arch/tile/kernel/
H A Dmcount_64.S144 moveli r16, hw2_last(ftrace_graph_entry)
148 shl16insli r16, r16, hw1(ftrace_graph_entry)
152 shl16insli r16, r16, hw0(ftrace_graph_entry)
155 ld r16, r16
156 sub r17, r16, r17
H A Dregs_32.S110 r16, r17, r18, r19, r20, r21, r22, r23, \
H A Dregs_64.S110 r16, r17, r18, r19, r20, r21, r22, r23, \
H A Dintvec_64.S631 push_reg r16, r52
1083 { move r15, zero; move r16, zero }
1129 pop_reg r16
1362 { move r16, r5; addxi r5, r5, 0 }
H A Dkgdb.c45 { "r16", GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[16])},
H A Dintvec_32.S435 push_reg r16, r52
1052 { move r16, zero; move r17, zero }
1093 pop_reg r16
/linux-4.1.27/arch/microblaze/include/asm/
H A Dkgdb.h23 __asm__ __volatile__("brki r16, 0x18;"); arch_kgdb_breakpoint()
H A Dthread_info.h38 __u32 r16; member in struct:cpu_context
/linux-4.1.27/arch/powerpc/include/asm/
H A Dexception-64e.h89 * re-entrancy safe working space of r10...r16 and CR with r12 being used
110 std r16,EX_TLB_R16(r12); \
111 mfspr r16,SPRN_SRR0; \
116 std r16,EX_TLB_SRR0(r12); \
140 ld r16,EX_TLB_SRR1(r12); \
148 mtspr SPRN_SRR1,r16; \
150 ld r16,EX_TLB_R16(r12); \
171 ld r16,EX_TLB_LR(r12); \
174 mtlr r16;
H A Dppc_asm.h585 #define r16 %r16 macro
/linux-4.1.27/tools/testing/selftests/powerpc/copyloops/asm/
H A Dppc_asm.h9 #define R16 r16
/linux-4.1.27/arch/ia64/lib/
H A Dclear_page.S35 mov r16 = PAGE_SIZE/L3_LINE_SIZE-1 // main loop count, -1=repeat/until
50 mov ar.lc = r16 // one L3 line per iteration
H A Dcarta_random.S17 #define t0 r16
H A Dip_fast_csum.S108 add r16=r20,r21
116 add r8=r16,r17
H A Dcopy_page.S23 #define lcount r16
H A Dclear_user.S25 #define cnt r16
H A Dcopy_page_mck.S74 #define dst_pre_l2 r16
H A Dmemcpy.S28 # define cnt r16
H A Dstrlen.S72 #define base r16
H A Dstrlen_user.S74 #define base r16
H A Ddo_csum.S94 #define hmask r16
H A Dcopy_user.S56 #define word1 r16
H A Dmemcpy_mck.S29 #define saved_in2 r16
/linux-4.1.27/arch/microblaze/kernel/
H A Dexceptions.c55 _exception(SIGTRAP, regs, TRAP_BRKPT, regs->r16); sw_exception()
56 flush_dcache_range(regs->r16, regs->r16 + 0x4); sw_exception()
57 flush_icache_range(regs->r16, regs->r16 + 0x4); sw_exception()
H A Dkgdb.c148 .gdb_bpt_instr = {0x18, 0x00, 0x0c, 0xba}, /* brki r16, 0x18 */
150 .gdb_bpt_instr = {0xba, 0x0c, 0x00, 0x18}, /* brki r16, 0x18 */
H A Dasm-offsets.c46 DEFINE(PT_R16, offsetof(struct pt_regs, r16)); main()
104 DEFINE(CC_R16, offsetof(struct cpu_context, r16)); main()
H A Dmcount.S32 swi r16, r1, 52; \
63 lwi r16, r1, 52; \
H A Dprocess.c33 pr_info(" r13=%08lX, r14=%08lX, r15=%08lX, r16=%08lX\n", show_regs()
34 regs->r13, regs->r14, regs->r15, regs->r16); show_regs()
H A Dentry.S192 swi r16, r1, PT_R16; \
228 lwi r16, r1, PT_R16; \
752 * Debug trap for KGDB. Enter to _debug_exception by brki r16, 0x18
772 swi r16, r1, PT_PC; /* PC and r16 are the same */
806 swi r16, r1, PT_PC; /* Save LP */
854 rtbd r16, 0; /* MS: Instructions to return from a debug trap */
863 lwi r16, r1, PT_PC;
867 rtbd r16, 0; /* MS: Instructions to return from a debug trap */
887 swi r16, r11, CC_R16
938 lwi r16, r11, CC_R16
H A Dentry-nommu.S84 swi r16, r1, PT_R16
180 lwi r16, r1, PT_R16
238 swi r16, r1, PT_R16
329 swi r16, r1, PT_R16
402 swi r16, r11, CC_R16
460 lwi r16, r11, CC_R16
555 lwi r16, r1, PT_R16
H A Dsignal.c70 COPY(r14); COPY(r15); COPY(r16); COPY(r17); restore_sigcontext()
131 COPY(r14); COPY(r15); COPY(r16); COPY(r17); setup_sigcontext()
/linux-4.1.27/arch/parisc/kernel/
H A Dentry.S122 mtsp %r16,%sr3
130 STREG %r16,PT_SR7(%r9)
144 STREG %r16,PT_SR7(%r9)
166 mfsp %sr7,%r16
825 mfctl %cr30,%r16
826 LDREG TI_TASK(%r16), %r16 /* thread_info -> task_struct */
827 ldo TASK_REGS(%r16),%r16
831 LDREG PT_IAOQ0(%r16),%r19
833 STREG %r19,PT_IAOQ0(%r16)
834 LDREG PT_IAOQ1(%r16),%r19
836 STREG %r19,PT_IAOQ1(%r16)
837 LDREG PT_PSW(%r16),%r19
846 STREG %r19,PT_PSW(%r16)
858 STREG %r0,PT_SR2(%r16)
860 STREG %r19,PT_SR0(%r16)
861 STREG %r19,PT_SR1(%r16)
862 STREG %r19,PT_SR3(%r16)
863 STREG %r19,PT_SR4(%r16)
864 STREG %r19,PT_SR5(%r16)
865 STREG %r19,PT_SR6(%r16)
866 STREG %r19,PT_SR7(%r16)
890 LDREG PT_IASQ0(%r16), %r20
892 LDREG PT_IASQ1(%r16), %r20
906 copy %r16, %r26 /* struct pt_regs *regs */
911 copy %r16,%r29
944 LDREG PT_IASQ0(%r16), %r20
947 LDREG PT_IASQ1(%r16), %r20
985 LDREG PT_PSW(%r16), %r20
1000 cmpib,COND(=),n 0,%r16,1f
1018 copy %r29, %r16 /* save pt_regs */
1034 mfsp %sr7,%r16
1035 cmpib,COND(=),n 0,%r16,1f
1060 mfctl %cr20, %r16 /* isr */
1081 extrd,u %r16,63,SPACEID_SHIFT,%r1 /* get high bits from isr for ior */
1083 depdi 0,63,SPACEID_SHIFT,%r16 /* clear them from isr */
1085 STREG %r16, PT_ISR(%r29)
1104 copy %r25, %r16 /* save pt_regs */
1133 pte = r16 /* pte/phys page # */
1341 ldi 0x280,%r16
1342 and %r9,%r16,%r17
1343 cmpb,<>,n %r16,%r17,nadtlb_probe_check
1378 ldi 0x80,%r16
1379 and %r9,%r16,%r17
1380 cmpb,<>,n %r16,%r17,nadtlb_fault /* Must be probe,[rw]*/
1686 STREG %r16,PT_GR16(\regs)
1705 LDREG PT_GR16(\regs),%r16
1949 copy %r25,%r16
1959 copy %r25,%r16
2087 bv %r0(%r25) /* r16 - shadowed */
2161 bv %r0(%r25) /* r16 */
2162 copy %r1,%r16
H A Dsyscall.S310 STREG %r16,PT_GR16(%r2)
/linux-4.1.27/arch/tile/lib/
H A Dmemcpy_32.S186 EX: { move r12, r5; lw r16, r1 }
193 EX: { move r12, r6; lw r16, r1 }
200 EX: { move r12, r7; lw r16, r1 }
216 * - r16 = WORD_0.
276 * stalling until it has filled by "looking at" r16.
278 EX: { lw r13, r1; addi r1, r1, 4; move zero, r16 } /* r13 = WORD_1 */
300 EX: { sw r0, r16; addi r0, r0, 4; add r16, r0, r2 } /* store(WORD_0) */
301 EX: { sw r0, r13; addi r0, r0, 4; andi r16, r16, -64 } /* store(WORD_1) */
302 EX: { sw r0, r14; addi r0, r0, 4; slt_u r16, r9, r16 } /* store(WORD_2) */
305 EX: { sw r0, r17; addi r0, r0, 4; mvz r9, r16, r13 }/* store(WORD_4) */
443 /* r16 = (r2 < 64), after we subtract 32 from r2 below. */
444 slti_u r16, r2, 64 + 32
458 { bzt r16, .Lcopy_unaligned_line; move r7, r6 }
/linux-4.1.27/arch/powerpc/lib/
H A Dcopyuser_power7.S65 ld r16,STK_REG(R16)(r1)
82 ld r16,STK_REG(R16)(r1)
147 std r16,STK_REG(R16)(r1)
172 err2; ld r16,80(r4)
189 err2; std r16,80(r3)
202 ld r16,STK_REG(R16)(r1)
421 std r16,STK_REG(R16)(r1)
426 li r16,112
443 err4; lvx v0,r4,r16
452 err4; stvx v0,r3,r16
458 ld r16,STK_REG(R16)(r1)
606 std r16,STK_REG(R16)(r1)
611 li r16,112
635 err4; lvx v0,r4,r16
645 err4; stvx v15,r3,r16
651 ld r16,STK_REG(R16)(r1)
H A Dmemcpy_power7.S80 std r16,STK_REG(R16)(r1)
105 ld r16,80(r4)
122 std r16,80(r3)
135 ld r16,STK_REG(R16)(r1)
354 std r16,STK_REG(R16)(r1)
359 li r16,112
376 lvx v0,r4,r16
385 stvx v0,r3,r16
391 ld r16,STK_REG(R16)(r1)
540 std r16,STK_REG(R16)(r1)
545 li r16,112
569 lvx v0,r4,r16
579 stvx v15,r3,r16
585 ld r16,STK_REG(R16)(r1)
H A Dcrtsavres.S327 std r16,-128(r1)
384 ld r16,-128(r1)
/linux-4.1.27/arch/ia64/hp/sim/boot/
H A Dboot_head.S117 mov r16=0xffff /* implemented PMC */
121 st8 [r29]=r16,16 /* store implemented PMC */
129 mov r16=0xf0 /* cycles count capable PMC */
135 st8 [r29]=r16,16 /* store cycles capable */
/linux-4.1.27/tools/testing/selftests/powerpc/copyloops/
H A Dcopyuser_power7.S65 ld r16,STK_REG(R16)(r1)
82 ld r16,STK_REG(R16)(r1)
147 std r16,STK_REG(R16)(r1)
172 err2; ld r16,80(r4)
189 err2; std r16,80(r3)
202 ld r16,STK_REG(R16)(r1)
421 std r16,STK_REG(R16)(r1)
426 li r16,112
443 err4; lvx v0,r4,r16
452 err4; stvx v0,r3,r16
458 ld r16,STK_REG(R16)(r1)
606 std r16,STK_REG(R16)(r1)
611 li r16,112
635 err4; lvx v0,r4,r16
645 err4; stvx v15,r3,r16
651 ld r16,STK_REG(R16)(r1)
H A Dmemcpy_power7.S80 std r16,STK_REG(R16)(r1)
105 ld r16,80(r4)
122 std r16,80(r3)
135 ld r16,STK_REG(R16)(r1)
354 std r16,STK_REG(R16)(r1)
359 li r16,112
376 lvx v0,r4,r16
385 stvx v0,r3,r16
391 ld r16,STK_REG(R16)(r1)
540 std r16,STK_REG(R16)(r1)
545 li r16,112
569 lvx v0,r4,r16
579 stvx v15,r3,r16
585 ld r16,STK_REG(R16)(r1)
/linux-4.1.27/arch/nios2/include/asm/
H A Dptrace.h53 unsigned long r16; /* r16-r23 Callee-saved GP registers */ member in struct:switch_stack
H A Dentry.h91 stw r16, SW_R16(sp)
105 ldw r16, SW_R16(sp)
H A Delf.h76 pr_reg[23] = sw->r16; \
/linux-4.1.27/arch/ia64/include/asm/
H A Dparavirt_privop.h187 * r16, r17
204 * r16: saved gp
218 "mov r16 = gp\n" /* save gp */ \
234 "mov gp = r16\n" /* restore gp value */ \
248 "r15", "r16", "r17"
252 "r15", "r16", "r17"
256 "r15", "r16", "r17"
260 "r15", "r16", "r17"
H A Dasmmacro.h94 mov r16=ar.pfs; \
99 mov ar.pfs=r16; \
/linux-4.1.27/arch/unicore32/kernel/
H A Dentry.S67 ldm.b (r16 - pc), [sp]+ @ load r0 - pc, asr
77 ldur (r16 - lr), [sp]+ @ get calling r16 - lr
80 ldur (r16 - lr), [sp]+ @ get calling r16 - lr
163 stm (r16 - r28), [r5]+
194 stm (r16 - r28), [r4]+
236 stm (r16 - r28, sp, lr), [r1]+
500 stm.w (r16 - r27, sp, lr), [ip]+
521 ldm (r16 - r27, sp, pc), [ip]+ @ Load all regs saved previously
595 stm (r16 - r28), [r8]+ @ Calling r16 - r28
H A Dsleep.S53 stm.w (r16 - r27, lr), [sp-] @ save registers on stack
202 ldm.w (r16 - r27, pc), [sp]+ @ return to caller
H A Ddebug-macro.S17 .macro put_word_ocd, rd, rx=r16
H A Dprocess.c151 printk(KERN_DEFAULT "r19: %08lx r18: %08lx r17: %08lx r16: %08lx\n", __show_regs()
/linux-4.1.27/arch/score/kernel/
H A Dentry.S108 lw r16, [r28, TI_REGS]
245 sw r16, [r28, TI_REGS]
343 sw r16, [\reg, THREAD_REG16];
359 lw r16, [\reg, THREAD_REG16];
461 mv r16, r10
466 mv r8, r16
H A Dtraps.c128 printk("r16: %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n", show_regs()
/linux-4.1.27/arch/score/include/asm/
H A Dasmmacro.h41 sw r16, [r0, PT_R16] variable
138 lw r16, [r0, PT_R16] variable
/linux-4.1.27/arch/hexagon/kernel/
H A Dvm_events.c65 printk(KERN_EMERG "r16: \t0x%08lx %08lx %08lx %08lx\n", regs->r16, show_regs()
H A Dkgdb.c48 { "r16", GDB_SIZEOF_REG, offsetof(struct pt_regs, r16)},
/linux-4.1.27/arch/arc/include/asm/
H A Dunwind.h33 unsigned long r16; member in struct:arc700_regs
92 PTREGS_INFO(r16), \
H A Dptrace.h63 long r25, r24, r23, r22, r21, r20, r19, r18, r17, r16, r15, r14, r13; member in struct:callee_regs
H A Dentry.h120 PUSH r16
140 POP r16
/linux-4.1.27/arch/arc/kernel/
H A Dctx_sw.c34 "st.a r16, [sp, -4] \n\t" __switch_to()
100 "ld.ab r16, [sp, 4] \n\t" __switch_to()
/linux-4.1.27/arch/microblaze/include/uapi/asm/
H A Dptrace.h33 microblaze_reg_t r16; member in struct:pt_regs
H A Delf.h111 _r->r16 = _r->r17 = _r->r18 = _r->r19 = \
/linux-4.1.27/arch/powerpc/boot/
H A Dppc_asm.h45 #define r16 16 macro
/linux-4.1.27/arch/hexagon/include/uapi/asm/
H A Duser.h29 unsigned long r16; member in struct:user_regs_struct
H A Dregisters.h134 unsigned long r16; member in struct:pt_regs::__anon1454::__anon1455
/linux-4.1.27/arch/alpha/include/uapi/asm/
H A Dptrace.h48 unsigned long r16; member in struct:pt_regs
/linux-4.1.27/arch/arc/include/uapi/asm/
H A Dptrace.h45 long r19, r18, r17, r16, r15, r14, r13; member in struct:user_regs_struct::__anon140
/linux-4.1.27/tools/testing/selftests/powerpc/switch_endian/
H A Dswitch_endian_test.S42 addi r16, r15, 16
/linux-4.1.27/arch/parisc/include/asm/
H A Dassembly.h196 STREG %r16, PT_GR16(\regs) variable
230 LDREG PT_GR16(\regs), %r16
360 std %r16, -40(%r30)
370 ldd -40(%r30), %r16
404 stw %r16, -76(%r30)
414 ldw -76(%r30), %r16
H A Dasmregs.h62 r16: .reg %r16
/linux-4.1.27/arch/powerpc/kernel/
H A Dswsusp_asm64.S98 SAVE_REGISTER(r16)
215 RESTORE_REGISTER(r16)
H A Dhead_fsl_booke.S698 stw r16, THREAD_NORMSAVE(6)(r12)
708 lwzx r16, r14, r15
710 li r16, 0
714 add r17, r17, r16 /* r17 = *next_tlbcam_idx */
722 mfspr r16, SPRN_TLB1CFG
723 andi. r16, r16, 0xfff
727 cmpw r15, r16
739 mfspr r16, SPRN_MAS1
740 rlwimi r16, r15, 7, 20, 24
741 mtspr SPRN_MAS1, r16
833 lwz r16, THREAD_NORMSAVE(6)(r10)
H A Dtm.S123 li r16, MSR_RI
124 ori r16, r16, MSR_EE /* IRQs hard off */
125 andc r15, r15, r16
H A Didle_power7.S299 mfspr r16,SPRN_SRR1
451 mtspr SPRN_SRR1,r16
H A Dkgdb.c290 { "r16", GDB_SIZEOF_REG, offsetof(struct pt_regs, gpr[16]) },
H A Dhead_8xx.S587 add r10, r10, r16 ;b 151f
/linux-4.1.27/arch/sh/mm/
H A DMakefile64 -ffixed-r13 -ffixed-r14 -ffixed-r16 -ffixed-r17 -ffixed-r19 \
/linux-4.1.27/arch/tile/include/asm/
H A Dbarrier.h41 "r15", "r16", "r17", "r18", "r19", __mb_incoherent()
/linux-4.1.27/arch/nios2/kernel/
H A Dasm-offsets.c67 OFFSET(SW_R16, switch_stack, r16); main()
H A Dinsnemu.S143 stw r16, 64(sp)
424 movi r16, 1 /* used to create "rori B,A,1" from "ror B,A,r16" */
436 * r16 = 1
462 ror r7, r7, r16 /* r7 = 0x80000000 on carry, or else 0x00000000 */
574 ldw r16, 64(sp)
H A Dsignal.c67 err |= __get_user(sw->r16, &gregs[15]); rt_restore_ucontext()
149 err |= __put_user(sw->r16, &gregs[15]); rt_setup_ucontext()
H A Dkgdb.c49 { "r16", GDB_SIZEOF_REG, -1 },
H A Dprocess.c112 childstack->r16 = usp; /* fn */ copy_thread()
H A Dentry.S503 callr r16 /* function */
/linux-4.1.27/arch/ia64/sn/kernel/sn2/
H A Dptc_deadlock.S31 scr1 = r16
/linux-4.1.27/arch/powerpc/kvm/
H A Dbooke_interrupts.S185 stw r16, VCPU_GPR(R16)(r4)
265 lwz r16, VCPU_GPR(R16)(r4)
303 stw r16, VCPU_GPR(R16)(r4)
323 lwz r16, HOST_NV_GPR(R16)(r1)
368 stw r16, HOST_NV_GPR(R16)(r1)
388 lwz r16, VCPU_GPR(R16)(r4)
H A Dbookehv_interrupts.S124 PPC_STL r16, VCPU_GPR(R16)(r4)
456 PPC_LL r16, VCPU_GPR(R16)(r4)
490 PPC_STL r16, VCPU_GPR(R16)(r4)
510 PPC_LL r16, HOST_NV_GPR(R16)(r1)
553 PPC_STL r16, HOST_NV_GPR(R16)(r1)
573 PPC_LL r16, VCPU_GPR(R16)(r4)
H A Dbook3s_interrupts.S44 PPC_LL r16, VCPU_GPR(R16)(vcpu); \
188 PPC_STL r16, VCPU_GPR(R16)(r7)
H A Dbook3s_hv_rmhandlers.S734 ld r16, VCPU_GPR(R16)(r4)
1309 std r16, VCPU_GPR(R16)(r9)
2122 std r16, VCPU_GPR(R16)(r3)
2233 ld r16, VCPU_GPR(R16)(r4)
/linux-4.1.27/arch/unicore32/include/asm/
H A Dthread_info.h47 __u32 r16; member in struct:cpu_context_save
/linux-4.1.27/arch/alpha/include/asm/
H A Da.out-core.h73 dump->regs[EF_A0] = pt->r16; aout_dump_thread()
/linux-4.1.27/arch/alpha/kernel/
H A Dsignal.c173 err |= __get_user(regs->r16, sc->sc_regs+16); restore_sigcontext()
308 err |= __put_user(regs->r16, sc->sc_regs+16); setup_sigcontext()
370 regs->r16 = ksig->sig; /* a0: signal number */ setup_frame()
424 regs->r16 = ksig->sig; /* a0: signal number */ setup_rt_frame()
H A Dptrace.c86 PT_REG( r16), PT_REG( r17), PT_REG( r18), PT_REG( r19),
324 audit_syscall_entry(regs->r0, regs->r16, regs->r17, regs->r18, regs->r19); syscall_trace_enter()
H A Dtraps.c86 regs->r16, regs->r17, regs->r18); dik_show_regs()
288 info.si_trapno = regs->r16; do_entIF()
289 switch ((long) regs->r16) { do_entIF()
670 printk("r16= %016lx r17= %016lx r18= %016lx\n", do_entUna()
766 R(r16), R(r17), R(r18),
H A Dprocess.c313 dest[16] = pt->r16; dump_elf_thread()
/linux-4.1.27/arch/sh/kernel/cpu/sh5/
H A Dswitchto.S74 st.q r0, (16*8), r16
156 ld.q r0, (16*8), r16
H A Dentry.S737 st.q SP, FRAME_R(16), r16
995 ld.q SP, FRAME_R(16), r16
1760 st.q r0, 0x080, r16
/linux-4.1.27/arch/openrisc/kernel/
H A Dentry.S72 l.lwz r16,PT_GPR16(r1) ;\
110 l.sw PT_GPR16(r1),r16 ;\
148 l.sw PT_GPR16(r1),r16 ;\
657 l.sw PT_GPR16(r1),r16
934 l.lwz r16,PT_GPR16(r1)
999 l.sw PT_GPR16(r1),r16
1042 l.lwz r16,PT_GPR16(r1)
1082 l.sw PT_GPR16(r1),r16
H A Dhead.S470 CLEAR_GPR(r16)
605 CLEAR_GPR(r16)
664 r16 contains number of cache sets
670 l.sll r16,r30,r28
675 // l.mul r5,r14,r16
730 r16 contains number of cache sets
736 l.sll r16,r30,r28
/linux-4.1.27/arch/hexagon/include/asm/
H A Delf.h135 DEST.r16 = REGS->r16; \
H A Dprocessor.h106 unsigned long r16; member in struct:hexagon_switch_stack::__anon1411::__anon1412
/linux-4.1.27/drivers/net/wireless/b43/
H A Dradio_2057.c130 r10, r11, r12, r13, r14, r15, r16, r17, r18, r19, \
148 .radio_pga_boost_tune_core0 = r16, \
162 r10, r11, r12, r13, r14, r15, r16, r17) \
179 .radio_pad2g_tune_pus_core1 = r16, \
H A Dradio_2059.c36 r10, r11, r12, r13, r14, r15, r16, r17, r18, r19, \
54 .radio_rxtx6a = r16, \
H A Dradio_2055.c272 r12, r13, r14, r15, r16, r17, r18, r19, r20, r21) \
289 .radio_c1_tx_mxbgtrim = r16, \
H A Dradio_2056.c3039 r10, r11, r12, r13, r14, r15, r16, r17, r18, r19, \
3058 .radio_syn_logen_buf4 = r16, \
/linux-4.1.27/arch/tile/kernel/vdso/
H A Dvgettimeofday.c168 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", vdso_fallback_gettime()
/linux-4.1.27/drivers/sh/clk/
H A Dcpg.c44 static unsigned int r16(const void __iomem *addr) r16() function
66 read = r16; sh_clk_mstp_enable()
/linux-4.1.27/arch/hexagon/lib/
H A Dmemcpy.S234 memd(sp+#0) = R17:16; /* save r16,r17 on stack6 */
540 r17:16 = memd(sp+#0); /* restore r16+r17 */
/linux-4.1.27/arch/arm/probes/
H A Ddecode.h294 #define REGS(r16, r12, r8, r4, r0) \
295 (((REG_TYPE_##r16) << 16) + \
/linux-4.1.27/arch/powerpc/net/
H A Dbpf_jit.h45 * m[0] r16
H A Dbpf_jit_asm.S25 * r16-31 M[]
/linux-4.1.27/arch/ia64/include/uapi/asm/
H A Dptrace.h121 unsigned long r16; /* scratch */ member in struct:pt_regs
H A Dptrace_offsets.h53 * unsigned long r16;
/linux-4.1.27/arch/unicore32/mm/
H A Dalignment.c41 #define LDM_H_BIT(i) (i & (1 << 6)) /* select r0-r15 or r16-r31 */
/linux-4.1.27/sound/soc/codecs/
H A Dcs42l52.c78 { CS42L52_ADCA_VOL, 0x00 }, /* r16 ADCA Volume */
H A Dcs42l56.c88 { 22, 0x00 }, /* r16 - Beep Volume / Off Time */
H A Dcs42l73.c66 { 22, 0x00 }, /* r16 - MICB Preamp, PGA Volume */
/linux-4.1.27/drivers/media/usb/gspca/
H A Dsonixb.c256 0x28, 0x1e, /* H & V sizes r15 .. r16 */
/linux-4.1.27/drivers/net/ethernet/tile/
H A Dtilepro.c333 "r15", "r16", "r17", "r18", "r19", __netio_fastio1()
/linux-4.1.27/drivers/scsi/libsas/
H A Dsas_expander.c189 * FIS as described in section J.5 of sas-2 r16 to_dev_type()
/linux-4.1.27/arch/powerpc/xmon/
H A Dxmon.c2499 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
/linux-4.1.27/arch/x86/kvm/
H A Demulate.c4992 case 0x8d: /* lea r16/r32, m */ x86_emulate_insn()

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