1/*
2 * Low-level system-call handling, trap handlers and context-switching
3 *
4 * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu>
5 * Copyright (C) 2008-2009 PetaLogix
6 * Copyright (C) 2003		John Williams <jwilliams@itee.uq.edu.au>
7 * Copyright (C) 2001,2002	NEC Corporation
8 * Copyright (C) 2001,2002	Miles Bader <miles@gnu.org>
9 *
10 * This file is subject to the terms and conditions of the GNU General
11 * Public License. See the file COPYING in the main directory of this
12 * archive for more details.
13 *
14 * Written by Miles Bader <miles@gnu.org>
15 * Heavily modified by John Williams for Microblaze
16 */
17
18#include <linux/sys.h>
19#include <linux/linkage.h>
20
21#include <asm/entry.h>
22#include <asm/current.h>
23#include <asm/processor.h>
24#include <asm/exceptions.h>
25#include <asm/asm-offsets.h>
26#include <asm/thread_info.h>
27
28#include <asm/page.h>
29#include <asm/unistd.h>
30
31#include <linux/errno.h>
32#include <asm/signal.h>
33
34#undef DEBUG
35
36#ifdef DEBUG
37/* Create space for syscalls counting. */
38.section .data
39.global syscall_debug_table
40.align 4
41syscall_debug_table:
42	.space	(__NR_syscalls * 4)
43#endif /* DEBUG */
44
45#define C_ENTRY(name)	.globl name; .align 4; name
46
47/*
48 * Various ways of setting and clearing BIP in flags reg.
49 * This is mucky, but necessary using microblaze version that
50 * allows msr ops to write to BIP
51 */
52#if CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR
53	.macro	clear_bip
54	msrclr	r0, MSR_BIP
55	.endm
56
57	.macro	set_bip
58	msrset	r0, MSR_BIP
59	.endm
60
61	.macro	clear_eip
62	msrclr	r0, MSR_EIP
63	.endm
64
65	.macro	set_ee
66	msrset	r0, MSR_EE
67	.endm
68
69	.macro	disable_irq
70	msrclr	r0, MSR_IE
71	.endm
72
73	.macro	enable_irq
74	msrset	r0, MSR_IE
75	.endm
76
77	.macro	set_ums
78	msrset	r0, MSR_UMS
79	msrclr	r0, MSR_VMS
80	.endm
81
82	.macro	set_vms
83	msrclr	r0, MSR_UMS
84	msrset	r0, MSR_VMS
85	.endm
86
87	.macro	clear_ums
88	msrclr	r0, MSR_UMS
89	.endm
90
91	.macro	clear_vms_ums
92	msrclr	r0, MSR_VMS | MSR_UMS
93	.endm
94#else
95	.macro	clear_bip
96	mfs	r11, rmsr
97	andi	r11, r11, ~MSR_BIP
98	mts	rmsr, r11
99	.endm
100
101	.macro	set_bip
102	mfs	r11, rmsr
103	ori	r11, r11, MSR_BIP
104	mts	rmsr, r11
105	.endm
106
107	.macro	clear_eip
108	mfs	r11, rmsr
109	andi	r11, r11, ~MSR_EIP
110	mts	rmsr, r11
111	.endm
112
113	.macro	set_ee
114	mfs	r11, rmsr
115	ori	r11, r11, MSR_EE
116	mts	rmsr, r11
117	.endm
118
119	.macro	disable_irq
120	mfs	r11, rmsr
121	andi	r11, r11, ~MSR_IE
122	mts	rmsr, r11
123	.endm
124
125	.macro	enable_irq
126	mfs	r11, rmsr
127	ori	r11, r11, MSR_IE
128	mts	rmsr, r11
129	.endm
130
131	.macro set_ums
132	mfs	r11, rmsr
133	ori	r11, r11, MSR_VMS
134	andni	r11, r11, MSR_UMS
135	mts	rmsr, r11
136	.endm
137
138	.macro	set_vms
139	mfs	r11, rmsr
140	ori	r11, r11, MSR_VMS
141	andni	r11, r11, MSR_UMS
142	mts	rmsr, r11
143	.endm
144
145	.macro	clear_ums
146	mfs	r11, rmsr
147	andni	r11, r11, MSR_UMS
148	mts	rmsr,r11
149	.endm
150
151	.macro	clear_vms_ums
152	mfs	r11, rmsr
153	andni	r11, r11, (MSR_VMS|MSR_UMS)
154	mts	rmsr,r11
155	.endm
156#endif
157
158/* Define how to call high-level functions. With MMU, virtual mode must be
159 * enabled when calling the high-level function. Clobbers R11.
160 * VM_ON, VM_OFF, DO_JUMP_BIPCLR, DO_CALL
161 */
162
163/* turn on virtual protected mode save */
164#define VM_ON		\
165	set_ums;	\
166	rted	r0, 2f;	\
167	nop; \
1682:
169
170/* turn off virtual protected mode save and user mode save*/
171#define VM_OFF			\
172	clear_vms_ums;		\
173	rted	r0, TOPHYS(1f);	\
174	nop; \
1751:
176
177#define SAVE_REGS \
178	swi	r2, r1, PT_R2;	/* Save SDA */			\
179	swi	r3, r1, PT_R3;					\
180	swi	r4, r1, PT_R4;					\
181	swi	r5, r1, PT_R5;					\
182	swi	r6, r1, PT_R6;					\
183	swi	r7, r1, PT_R7;					\
184	swi	r8, r1, PT_R8;					\
185	swi	r9, r1, PT_R9;					\
186	swi	r10, r1, PT_R10;					\
187	swi	r11, r1, PT_R11;	/* save clobbered regs after rval */\
188	swi	r12, r1, PT_R12;					\
189	swi	r13, r1, PT_R13;	/* Save SDA2 */			\
190	swi	r14, r1, PT_PC;	/* PC, before IRQ/trap */	\
191	swi	r15, r1, PT_R15;	/* Save LP */			\
192	swi	r16, r1, PT_R16;					\
193	swi	r17, r1, PT_R17;					\
194	swi	r18, r1, PT_R18;	/* Save asm scratch reg */	\
195	swi	r19, r1, PT_R19;					\
196	swi	r20, r1, PT_R20;					\
197	swi	r21, r1, PT_R21;					\
198	swi	r22, r1, PT_R22;					\
199	swi	r23, r1, PT_R23;					\
200	swi	r24, r1, PT_R24;					\
201	swi	r25, r1, PT_R25;					\
202	swi	r26, r1, PT_R26;					\
203	swi	r27, r1, PT_R27;					\
204	swi	r28, r1, PT_R28;					\
205	swi	r29, r1, PT_R29;					\
206	swi	r30, r1, PT_R30;					\
207	swi	r31, r1, PT_R31;	/* Save current task reg */	\
208	mfs	r11, rmsr;		/* save MSR */			\
209	swi	r11, r1, PT_MSR;
210
211#define RESTORE_REGS \
212	lwi	r11, r1, PT_MSR;					\
213	mts	rmsr , r11;						\
214	lwi	r2, r1, PT_R2;	/* restore SDA */		\
215	lwi	r3, r1, PT_R3;					\
216	lwi	r4, r1, PT_R4;					\
217	lwi	r5, r1, PT_R5;					\
218	lwi	r6, r1, PT_R6;					\
219	lwi	r7, r1, PT_R7;					\
220	lwi	r8, r1, PT_R8;					\
221	lwi	r9, r1, PT_R9;					\
222	lwi	r10, r1, PT_R10;					\
223	lwi	r11, r1, PT_R11;	/* restore clobbered regs after rval */\
224	lwi	r12, r1, PT_R12;					\
225	lwi	r13, r1, PT_R13;	/* restore SDA2 */		\
226	lwi	r14, r1, PT_PC;	/* RESTORE_LINK PC, before IRQ/trap */\
227	lwi	r15, r1, PT_R15;	/* restore LP */		\
228	lwi	r16, r1, PT_R16;					\
229	lwi	r17, r1, PT_R17;					\
230	lwi	r18, r1, PT_R18;	/* restore asm scratch reg */	\
231	lwi	r19, r1, PT_R19;					\
232	lwi	r20, r1, PT_R20;					\
233	lwi	r21, r1, PT_R21;					\
234	lwi	r22, r1, PT_R22;					\
235	lwi	r23, r1, PT_R23;					\
236	lwi	r24, r1, PT_R24;					\
237	lwi	r25, r1, PT_R25;					\
238	lwi	r26, r1, PT_R26;					\
239	lwi	r27, r1, PT_R27;					\
240	lwi	r28, r1, PT_R28;					\
241	lwi	r29, r1, PT_R29;					\
242	lwi	r30, r1, PT_R30;					\
243	lwi	r31, r1, PT_R31;	/* Restore cur task reg */
244
245#define SAVE_STATE	\
246	swi	r1, r0, TOPHYS(PER_CPU(ENTRY_SP)); /* save stack */	\
247	/* See if already in kernel mode.*/				\
248	mfs	r1, rmsr;						\
249	andi	r1, r1, MSR_UMS;					\
250	bnei	r1, 1f;						\
251	/* Kernel-mode state save.  */					\
252	/* Reload kernel stack-ptr. */					\
253	lwi	r1, r0, TOPHYS(PER_CPU(ENTRY_SP));			\
254	/* FIXME: I can add these two lines to one */			\
255	/* tophys(r1,r1); */						\
256	/* addik	r1, r1, -PT_SIZE; */				\
257	addik	r1, r1, CONFIG_KERNEL_BASE_ADDR - CONFIG_KERNEL_START - PT_SIZE; \
258	SAVE_REGS							\
259	brid	2f;							\
260	swi	r1, r1, PT_MODE; 	 				\
2611:	/* User-mode state save.  */					\
262	lwi	r1, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); /* get saved current */\
263	tophys(r1,r1);							\
264	lwi	r1, r1, TS_THREAD_INFO;	/* get the thread info */	\
265	/* MS these three instructions can be added to one */		\
266	/* addik	r1, r1, THREAD_SIZE; */				\
267	/* tophys(r1,r1); */						\
268	/* addik	r1, r1, -PT_SIZE; */			\
269	addik r1, r1, THREAD_SIZE + CONFIG_KERNEL_BASE_ADDR - CONFIG_KERNEL_START - PT_SIZE; \
270	SAVE_REGS							\
271	lwi	r11, r0, TOPHYS(PER_CPU(ENTRY_SP));			\
272	swi	r11, r1, PT_R1; /* Store user SP.  */		\
273	swi	r0, r1, PT_MODE; /* Was in user-mode.  */		\
274	/* MS: I am clearing UMS even in case when I come from kernel space */ \
275	clear_ums; 							\
2762:	lwi	CURRENT_TASK, r0, TOPHYS(PER_CPU(CURRENT_SAVE));
277
278.text
279
280/*
281 * User trap.
282 *
283 * System calls are handled here.
284 *
285 * Syscall protocol:
286 * Syscall number in r12, args in r5-r10
287 * Return value in r3
288 *
289 * Trap entered via brki instruction, so BIP bit is set, and interrupts
290 * are masked. This is nice, means we don't have to CLI before state save
291 */
292C_ENTRY(_user_exception):
293	swi	r1, r0, TOPHYS(PER_CPU(ENTRY_SP)) /* save stack */
294	addi	r14, r14, 4	/* return address is 4 byte after call */
295
296	lwi	r1, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); /* get saved current */
297	tophys(r1,r1);
298	lwi	r1, r1, TS_THREAD_INFO;	/* get stack from task_struct */
299/* calculate kernel stack pointer from task struct 8k */
300	addik	r1, r1, THREAD_SIZE;
301	tophys(r1,r1);
302
303	addik	r1, r1, -PT_SIZE; /* Make room on the stack.  */
304	SAVE_REGS
305	swi	r0, r1, PT_R3
306	swi	r0, r1, PT_R4
307
308	swi	r0, r1, PT_MODE;			/* Was in user-mode. */
309	lwi	r11, r0, TOPHYS(PER_CPU(ENTRY_SP));
310	swi	r11, r1, PT_R1;		/* Store user SP.  */
311	clear_ums;
3122:	lwi	CURRENT_TASK, r0, TOPHYS(PER_CPU(CURRENT_SAVE));
313	/* Save away the syscall number.  */
314	swi	r12, r1, PT_R0;
315	tovirt(r1,r1)
316
317/* where the trap should return need -8 to adjust for rtsd r15, 8*/
318/* Jump to the appropriate function for the system call number in r12
319 * (r12 is not preserved), or return an error if r12 is not valid. The LP
320 * register should point to the location where
321 * the called function should return.  [note that MAKE_SYS_CALL uses label 1] */
322
323	/* Step into virtual mode */
324	rtbd	r0, 3f
325	nop
3263:
327	lwi	r11, CURRENT_TASK, TS_THREAD_INFO /* get thread info */
328	lwi	r11, r11, TI_FLAGS	 /* get flags in thread info */
329	andi	r11, r11, _TIF_WORK_SYSCALL_MASK
330	beqi	r11, 4f
331
332	addik	r3, r0, -ENOSYS
333	swi	r3, r1, PT_R3
334	brlid	r15, do_syscall_trace_enter
335	addik	r5, r1, PT_R0
336
337	# do_syscall_trace_enter returns the new syscall nr.
338	addk	r12, r0, r3
339	lwi	r5, r1, PT_R5;
340	lwi	r6, r1, PT_R6;
341	lwi	r7, r1, PT_R7;
342	lwi	r8, r1, PT_R8;
343	lwi	r9, r1, PT_R9;
344	lwi	r10, r1, PT_R10;
3454:
346/* Jump to the appropriate function for the system call number in r12
347 * (r12 is not preserved), or return an error if r12 is not valid.
348 * The LP register should point to the location where the called function
349 * should return.  [note that MAKE_SYS_CALL uses label 1] */
350	/* See if the system call number is valid */
351	blti	r12, 5f
352	addi	r11, r12, -__NR_syscalls;
353	bgei	r11, 5f;
354	/* Figure out which function to use for this system call.  */
355	/* Note Microblaze barrel shift is optional, so don't rely on it */
356	add	r12, r12, r12;			/* convert num -> ptr */
357	add	r12, r12, r12;
358	addi	r30, r0, 1			/* restarts allowed */
359
360#ifdef DEBUG
361	/* Trac syscalls and stored them to syscall_debug_table */
362	/* The first syscall location stores total syscall number */
363	lwi	r3, r0, syscall_debug_table
364	addi	r3, r3, 1
365	swi	r3, r0, syscall_debug_table
366	lwi	r3, r12, syscall_debug_table
367	addi	r3, r3, 1
368	swi	r3, r12, syscall_debug_table
369#endif
370
371	# Find and jump into the syscall handler.
372	lwi	r12, r12, sys_call_table
373	/* where the trap should return need -8 to adjust for rtsd r15, 8 */
374	addi	r15, r0, ret_from_trap-8
375	bra	r12
376
377	/* The syscall number is invalid, return an error.  */
3785:
379	braid	ret_from_trap
380	addi	r3, r0, -ENOSYS;
381
382/* Entry point used to return from a syscall/trap */
383/* We re-enable BIP bit before state restore */
384C_ENTRY(ret_from_trap):
385	swi	r3, r1, PT_R3
386	swi	r4, r1, PT_R4
387
388	lwi	r11, r1, PT_MODE;
389/* See if returning to kernel mode, if so, skip resched &c.  */
390	bnei	r11, 2f;
391	/* We're returning to user mode, so check for various conditions that
392	 * trigger rescheduling. */
393	/* FIXME: Restructure all these flag checks. */
394	lwi	r11, CURRENT_TASK, TS_THREAD_INFO;	/* get thread info */
395	lwi	r11, r11, TI_FLAGS;		/* get flags in thread info */
396	andi	r11, r11, _TIF_WORK_SYSCALL_MASK
397	beqi	r11, 1f
398
399	brlid	r15, do_syscall_trace_leave
400	addik	r5, r1, PT_R0
4011:
402	/* We're returning to user mode, so check for various conditions that
403	 * trigger rescheduling. */
404	/* get thread info from current task */
405	lwi	r11, CURRENT_TASK, TS_THREAD_INFO;
406	lwi	r19, r11, TI_FLAGS;		/* get flags in thread info */
407	andi	r11, r19, _TIF_NEED_RESCHED;
408	beqi	r11, 5f;
409
410	bralid	r15, schedule;	/* Call scheduler */
411	nop;				/* delay slot */
412	bri	1b
413
414	/* Maybe handle a signal */
4155:
416	andi	r11, r19, _TIF_SIGPENDING | _TIF_NOTIFY_RESUME;
417	beqi	r11, 4f;		/* Signals to handle, handle them */
418
419	addik	r5, r1, 0;		/* Arg 1: struct pt_regs *regs */
420	bralid	r15, do_notify_resume;	/* Handle any signals */
421	add	r6, r30, r0;		/* Arg 2: int in_syscall */
422	add	r30, r0, r0		/* no more restarts */
423	bri	1b
424
425/* Finally, return to user state.  */
4264:	set_bip;			/*  Ints masked for state restore */
427	swi	CURRENT_TASK, r0, PER_CPU(CURRENT_SAVE); /* save current */
428	VM_OFF;
429	tophys(r1,r1);
430	RESTORE_REGS;
431	addik	r1, r1, PT_SIZE		/* Clean up stack space.  */
432	lwi	r1, r1, PT_R1 - PT_SIZE;/* Restore user stack pointer. */
433	bri	6f;
434
435/* Return to kernel state.  */
4362:	set_bip;			/*  Ints masked for state restore */
437	VM_OFF;
438	tophys(r1,r1);
439	RESTORE_REGS;
440	addik	r1, r1, PT_SIZE		/* Clean up stack space.  */
441	tovirt(r1,r1);
4426:
443TRAP_return:		/* Make global symbol for debugging */
444	rtbd	r14, 0;	/* Instructions to return from an IRQ */
445	nop;
446
447
448/* This the initial entry point for a new child thread, with an appropriate
449   stack in place that makes it look the the child is in the middle of an
450   syscall.  This function is actually `returned to' from switch_thread
451   (copy_thread makes ret_from_fork the return address in each new thread's
452   saved context).  */
453C_ENTRY(ret_from_fork):
454	bralid	r15, schedule_tail; /* ...which is schedule_tail's arg */
455	add	r5, r3, r0;	/* switch_thread returns the prev task */
456				/* ( in the delay slot ) */
457	brid	ret_from_trap;	/* Do normal trap return */
458	add	r3, r0, r0;	/* Child's fork call should return 0. */
459
460C_ENTRY(ret_from_kernel_thread):
461	bralid	r15, schedule_tail; /* ...which is schedule_tail's arg */
462	add	r5, r3, r0;	/* switch_thread returns the prev task */
463				/* ( in the delay slot ) */
464	brald	r15, r20	/* fn was left in r20 */
465	addk	r5, r0, r19	/* ... and argument - in r19 */
466	brid	ret_from_trap
467	add	r3, r0, r0
468
469C_ENTRY(sys_rt_sigreturn_wrapper):
470	addik	r30, r0, 0		/* no restarts */
471	brid	sys_rt_sigreturn	/* Do real work */
472	addik	r5, r1, 0;		/* add user context as 1st arg */
473
474/*
475 * HW EXCEPTION rutine start
476 */
477C_ENTRY(full_exception_trap):
478	/* adjust exception address for privileged instruction
479	 * for finding where is it */
480	addik	r17, r17, -4
481	SAVE_STATE /* Save registers */
482	/* PC, before IRQ/trap - this is one instruction above */
483	swi	r17, r1, PT_PC;
484	tovirt(r1,r1)
485	/* FIXME this can be store directly in PT_ESR reg.
486	 * I tested it but there is a fault */
487	/* where the trap should return need -8 to adjust for rtsd r15, 8 */
488	addik	r15, r0, ret_from_exc - 8
489	mfs	r6, resr
490	mfs	r7, rfsr;		/* save FSR */
491	mts	rfsr, r0;	/* Clear sticky fsr */
492	rted	r0, full_exception
493	addik	r5, r1, 0		 /* parameter struct pt_regs * regs */
494
495/*
496 * Unaligned data trap.
497 *
498 * Unaligned data trap last on 4k page is handled here.
499 *
500 * Trap entered via exception, so EE bit is set, and interrupts
501 * are masked.  This is nice, means we don't have to CLI before state save
502 *
503 * The assembler routine is in "arch/microblaze/kernel/hw_exception_handler.S"
504 */
505C_ENTRY(unaligned_data_trap):
506	/* MS: I have to save r11 value and then restore it because
507	 * set_bit, clear_eip, set_ee use r11 as temp register if MSR
508	 * instructions are not used. We don't need to do if MSR instructions
509	 * are used and they use r0 instead of r11.
510	 * I am using ENTRY_SP which should be primary used only for stack
511	 * pointer saving. */
512	swi	r11, r0, TOPHYS(PER_CPU(ENTRY_SP));
513	set_bip;        /* equalize initial state for all possible entries */
514	clear_eip;
515	set_ee;
516	lwi	r11, r0, TOPHYS(PER_CPU(ENTRY_SP));
517	SAVE_STATE		/* Save registers.*/
518	/* PC, before IRQ/trap - this is one instruction above */
519	swi	r17, r1, PT_PC;
520	tovirt(r1,r1)
521	/* where the trap should return need -8 to adjust for rtsd r15, 8 */
522	addik	r15, r0, ret_from_exc-8
523	mfs	r3, resr		/* ESR */
524	mfs	r4, rear		/* EAR */
525	rtbd	r0, _unaligned_data_exception
526	addik	r7, r1, 0		/* parameter struct pt_regs * regs */
527
528/*
529 * Page fault traps.
530 *
531 * If the real exception handler (from hw_exception_handler.S) didn't find
532 * the mapping for the process, then we're thrown here to handle such situation.
533 *
534 * Trap entered via exceptions, so EE bit is set, and interrupts
535 * are masked.  This is nice, means we don't have to CLI before state save
536 *
537 * Build a standard exception frame for TLB Access errors.  All TLB exceptions
538 * will bail out to this point if they can't resolve the lightweight TLB fault.
539 *
540 * The C function called is in "arch/microblaze/mm/fault.c", declared as:
541 * void do_page_fault(struct pt_regs *regs,
542 *				unsigned long address,
543 *				unsigned long error_code)
544 */
545/* data and intruction trap - which is choose is resolved int fault.c */
546C_ENTRY(page_fault_data_trap):
547	SAVE_STATE		/* Save registers.*/
548	/* PC, before IRQ/trap - this is one instruction above */
549	swi	r17, r1, PT_PC;
550	tovirt(r1,r1)
551	/* where the trap should return need -8 to adjust for rtsd r15, 8 */
552	addik	r15, r0, ret_from_exc-8
553	mfs	r6, rear		/* parameter unsigned long address */
554	mfs	r7, resr		/* parameter unsigned long error_code */
555	rted	r0, do_page_fault
556	addik	r5, r1, 0		/* parameter struct pt_regs * regs */
557
558C_ENTRY(page_fault_instr_trap):
559	SAVE_STATE		/* Save registers.*/
560	/* PC, before IRQ/trap - this is one instruction above */
561	swi	r17, r1, PT_PC;
562	tovirt(r1,r1)
563	/* where the trap should return need -8 to adjust for rtsd r15, 8 */
564	addik	r15, r0, ret_from_exc-8
565	mfs	r6, rear		/* parameter unsigned long address */
566	ori	r7, r0, 0		/* parameter unsigned long error_code */
567	rted	r0, do_page_fault
568	addik	r5, r1, 0		/* parameter struct pt_regs * regs */
569
570/* Entry point used to return from an exception.  */
571C_ENTRY(ret_from_exc):
572	lwi	r11, r1, PT_MODE;
573	bnei	r11, 2f;		/* See if returning to kernel mode, */
574					/* ... if so, skip resched &c.  */
575
576	/* We're returning to user mode, so check for various conditions that
577	   trigger rescheduling. */
5781:
579	lwi	r11, CURRENT_TASK, TS_THREAD_INFO;	/* get thread info */
580	lwi	r19, r11, TI_FLAGS;	/* get flags in thread info */
581	andi	r11, r19, _TIF_NEED_RESCHED;
582	beqi	r11, 5f;
583
584/* Call the scheduler before returning from a syscall/trap. */
585	bralid	r15, schedule;	/* Call scheduler */
586	nop;				/* delay slot */
587	bri	1b
588
589	/* Maybe handle a signal */
5905:	andi	r11, r19, _TIF_SIGPENDING | _TIF_NOTIFY_RESUME;
591	beqi	r11, 4f;		/* Signals to handle, handle them */
592
593	/*
594	 * Handle a signal return; Pending signals should be in r18.
595	 *
596	 * Not all registers are saved by the normal trap/interrupt entry
597	 * points (for instance, call-saved registers (because the normal
598	 * C-compiler calling sequence in the kernel makes sure they're
599	 * preserved), and call-clobbered registers in the case of
600	 * traps), but signal handlers may want to examine or change the
601	 * complete register state.  Here we save anything not saved by
602	 * the normal entry sequence, so that it may be safely restored
603	 * (in a possibly modified form) after do_notify_resume returns. */
604	addik	r5, r1, 0;		/* Arg 1: struct pt_regs *regs */
605	bralid	r15, do_notify_resume;	/* Handle any signals */
606	addi	r6, r0, 0;		/* Arg 2: int in_syscall */
607	bri	1b
608
609/* Finally, return to user state.  */
6104:	set_bip;			/* Ints masked for state restore */
611	swi	CURRENT_TASK, r0, PER_CPU(CURRENT_SAVE); /* save current */
612	VM_OFF;
613	tophys(r1,r1);
614
615	RESTORE_REGS;
616	addik	r1, r1, PT_SIZE		/* Clean up stack space.  */
617
618	lwi	r1, r1, PT_R1 - PT_SIZE; /* Restore user stack pointer. */
619	bri	6f;
620/* Return to kernel state.  */
6212:	set_bip;			/* Ints masked for state restore */
622	VM_OFF;
623	tophys(r1,r1);
624	RESTORE_REGS;
625	addik	r1, r1, PT_SIZE		/* Clean up stack space.  */
626
627	tovirt(r1,r1);
6286:
629EXC_return:		/* Make global symbol for debugging */
630	rtbd	r14, 0;	/* Instructions to return from an IRQ */
631	nop;
632
633/*
634 * HW EXCEPTION rutine end
635 */
636
637/*
638 * Hardware maskable interrupts.
639 *
640 * The stack-pointer (r1) should have already been saved to the memory
641 * location PER_CPU(ENTRY_SP).
642 */
643C_ENTRY(_interrupt):
644/* MS: we are in physical address */
645/* Save registers, switch to proper stack, convert SP to virtual.*/
646	swi	r1, r0, TOPHYS(PER_CPU(ENTRY_SP))
647	/* MS: See if already in kernel mode. */
648	mfs	r1, rmsr
649	nop
650	andi	r1, r1, MSR_UMS
651	bnei	r1, 1f
652
653/* Kernel-mode state save. */
654	lwi	r1, r0, TOPHYS(PER_CPU(ENTRY_SP))
655	tophys(r1,r1); /* MS: I have in r1 physical address where stack is */
656	/* save registers */
657/* MS: Make room on the stack -> activation record */
658	addik	r1, r1, -PT_SIZE;
659	SAVE_REGS
660	brid	2f;
661	swi	r1, r1, PT_MODE; /* 0 - user mode, 1 - kernel mode */
6621:
663/* User-mode state save. */
664 /* MS: get the saved current */
665	lwi	r1, r0, TOPHYS(PER_CPU(CURRENT_SAVE));
666	tophys(r1,r1);
667	lwi	r1, r1, TS_THREAD_INFO;
668	addik	r1, r1, THREAD_SIZE;
669	tophys(r1,r1);
670	/* save registers */
671	addik	r1, r1, -PT_SIZE;
672	SAVE_REGS
673	/* calculate mode */
674	swi	r0, r1, PT_MODE;
675	lwi	r11, r0, TOPHYS(PER_CPU(ENTRY_SP));
676	swi	r11, r1, PT_R1;
677	clear_ums;
6782:
679	lwi	CURRENT_TASK, r0, TOPHYS(PER_CPU(CURRENT_SAVE));
680	tovirt(r1,r1)
681	addik	r15, r0, irq_call;
682irq_call:rtbd	r0, do_IRQ;
683	addik	r5, r1, 0;
684
685/* MS: we are in virtual mode */
686ret_from_irq:
687	lwi	r11, r1, PT_MODE;
688	bnei	r11, 2f;
689
6901:
691	lwi	r11, CURRENT_TASK, TS_THREAD_INFO;
692	lwi	r19, r11, TI_FLAGS; /* MS: get flags from thread info */
693	andi	r11, r19, _TIF_NEED_RESCHED;
694	beqi	r11, 5f
695	bralid	r15, schedule;
696	nop; /* delay slot */
697	bri	1b
698
699    /* Maybe handle a signal */
7005:	andi	r11, r19, _TIF_SIGPENDING | _TIF_NOTIFY_RESUME;
701	beqid	r11, no_intr_resched
702/* Handle a signal return; Pending signals should be in r18. */
703	addik	r5, r1, 0; /* Arg 1: struct pt_regs *regs */
704	bralid	r15, do_notify_resume;	/* Handle any signals */
705	addi	r6, r0, 0; /* Arg 2: int in_syscall */
706	bri	1b
707
708/* Finally, return to user state. */
709no_intr_resched:
710    /* Disable interrupts, we are now committed to the state restore */
711	disable_irq
712	swi	CURRENT_TASK, r0, PER_CPU(CURRENT_SAVE);
713	VM_OFF;
714	tophys(r1,r1);
715	RESTORE_REGS
716	addik	r1, r1, PT_SIZE /* MS: Clean up stack space. */
717	lwi	r1, r1, PT_R1 - PT_SIZE;
718	bri	6f;
719/* MS: Return to kernel state. */
7202:
721#ifdef CONFIG_PREEMPT
722	lwi	r11, CURRENT_TASK, TS_THREAD_INFO;
723	/* MS: get preempt_count from thread info */
724	lwi	r5, r11, TI_PREEMPT_COUNT;
725	bgti	r5, restore;
726
727	lwi	r5, r11, TI_FLAGS;		/* get flags in thread info */
728	andi	r5, r5, _TIF_NEED_RESCHED;
729	beqi	r5, restore /* if zero jump over */
730
731preempt:
732	/* interrupts are off that's why I am calling preempt_chedule_irq */
733	bralid	r15, preempt_schedule_irq
734	nop
735	lwi	r11, CURRENT_TASK, TS_THREAD_INFO;	/* get thread info */
736	lwi	r5, r11, TI_FLAGS;		/* get flags in thread info */
737	andi	r5, r5, _TIF_NEED_RESCHED;
738	bnei	r5, preempt /* if non zero jump to resched */
739restore:
740#endif
741	VM_OFF /* MS: turn off MMU */
742	tophys(r1,r1)
743	RESTORE_REGS
744	addik	r1, r1, PT_SIZE	/* MS: Clean up stack space. */
745	tovirt(r1,r1);
7466:
747IRQ_return: /* MS: Make global symbol for debugging */
748	rtid	r14, 0
749	nop
750
751/*
752 * Debug trap for KGDB. Enter to _debug_exception by brki r16, 0x18
753 * and call handling function with saved pt_regs
754 */
755C_ENTRY(_debug_exception):
756	/* BIP bit is set on entry, no interrupts can occur */
757	swi	r1, r0, TOPHYS(PER_CPU(ENTRY_SP))
758
759	mfs	r1, rmsr
760	nop
761	andi	r1, r1, MSR_UMS
762	bnei	r1, 1f
763/* MS: Kernel-mode state save - kgdb */
764	lwi	r1, r0, TOPHYS(PER_CPU(ENTRY_SP)); /* Reload kernel stack-ptr*/
765
766	/* BIP bit is set on entry, no interrupts can occur */
767	addik   r1, r1, CONFIG_KERNEL_BASE_ADDR - CONFIG_KERNEL_START - PT_SIZE;
768	SAVE_REGS;
769	/* save all regs to pt_reg structure */
770	swi	r0, r1, PT_R0;	/* R0 must be saved too */
771	swi	r14, r1, PT_R14	/* rewrite saved R14 value */
772	swi	r16, r1, PT_PC; /* PC and r16 are the same */
773	/* save special purpose registers to pt_regs */
774	mfs	r11, rear;
775	swi	r11, r1, PT_EAR;
776	mfs	r11, resr;
777	swi	r11, r1, PT_ESR;
778	mfs	r11, rfsr;
779	swi	r11, r1, PT_FSR;
780
781	/* stack pointer is in physical address at it is decrease
782	 * by PT_SIZE but we need to get correct R1 value */
783	addik   r11, r1, CONFIG_KERNEL_START - CONFIG_KERNEL_BASE_ADDR + PT_SIZE;
784	swi	r11, r1, PT_R1
785	/* MS: r31 - current pointer isn't changed */
786	tovirt(r1,r1)
787#ifdef CONFIG_KGDB
788	addi	r5, r1, 0 /* pass pt_reg address as the first arg */
789	addik	r15, r0, dbtrap_call; /* return address */
790	rtbd	r0, microblaze_kgdb_break
791	nop;
792#endif
793	/* MS: Place handler for brki from kernel space if KGDB is OFF.
794	 * It is very unlikely that another brki instruction is called. */
795	bri 0
796
797/* MS: User-mode state save - gdb */
7981:	lwi	r1, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); /* get saved current */
799	tophys(r1,r1);
800	lwi	r1, r1, TS_THREAD_INFO;	/* get the thread info */
801	addik	r1, r1, THREAD_SIZE;	/* calculate kernel stack pointer */
802	tophys(r1,r1);
803
804	addik	r1, r1, -PT_SIZE; /* Make room on the stack.  */
805	SAVE_REGS;
806	swi	r16, r1, PT_PC;	/* Save LP */
807	swi	r0, r1, PT_MODE; /* Was in user-mode.  */
808	lwi	r11, r0, TOPHYS(PER_CPU(ENTRY_SP));
809	swi	r11, r1, PT_R1; /* Store user SP.  */
810	lwi	CURRENT_TASK, r0, TOPHYS(PER_CPU(CURRENT_SAVE));
811	tovirt(r1,r1)
812	set_vms;
813	addik	r5, r1, 0;
814	addik	r15, r0, dbtrap_call;
815dbtrap_call: /* Return point for kernel/user entry + 8 because of rtsd r15, 8 */
816	rtbd	r0, sw_exception
817	nop
818
819	/* MS: The first instruction for the second part of the gdb/kgdb */
820	set_bip; /* Ints masked for state restore */
821	lwi	r11, r1, PT_MODE;
822	bnei	r11, 2f;
823/* MS: Return to user space - gdb */
8241:
825	/* Get current task ptr into r11 */
826	lwi	r11, CURRENT_TASK, TS_THREAD_INFO;	/* get thread info */
827	lwi	r19, r11, TI_FLAGS;	/* get flags in thread info */
828	andi	r11, r19, _TIF_NEED_RESCHED;
829	beqi	r11, 5f;
830
831	/* Call the scheduler before returning from a syscall/trap. */
832	bralid	r15, schedule;	/* Call scheduler */
833	nop;				/* delay slot */
834	bri	1b
835
836	/* Maybe handle a signal */
8375:	andi	r11, r19, _TIF_SIGPENDING | _TIF_NOTIFY_RESUME;
838	beqi	r11, 4f;		/* Signals to handle, handle them */
839
840	addik	r5, r1, 0;		/* Arg 1: struct pt_regs *regs */
841	bralid	r15, do_notify_resume;	/* Handle any signals */
842	addi  r6, r0, 0;	/* Arg 2: int in_syscall */
843	bri	1b
844
845/* Finally, return to user state.  */
8464:	swi	CURRENT_TASK, r0, PER_CPU(CURRENT_SAVE); /* save current */
847	VM_OFF;
848	tophys(r1,r1);
849	/* MS: Restore all regs */
850	RESTORE_REGS
851	addik	r1, r1, PT_SIZE	 /* Clean up stack space */
852	lwi	r1, r1, PT_R1 - PT_SIZE; /* Restore user stack pointer */
853DBTRAP_return_user: /* MS: Make global symbol for debugging */
854	rtbd	r16, 0; /* MS: Instructions to return from a debug trap */
855	nop;
856
857/* MS: Return to kernel state - kgdb */
8582:	VM_OFF;
859	tophys(r1,r1);
860	/* MS: Restore all regs */
861	RESTORE_REGS
862	lwi	r14, r1, PT_R14;
863	lwi	r16, r1, PT_PC;
864	addik	r1, r1, PT_SIZE; /* MS: Clean up stack space */
865	tovirt(r1,r1);
866DBTRAP_return_kernel: /* MS: Make global symbol for debugging */
867	rtbd	r16, 0; /* MS: Instructions to return from a debug trap */
868	nop;
869
870
871ENTRY(_switch_to)
872	/* prepare return value */
873	addk	r3, r0, CURRENT_TASK
874
875	/* save registers in cpu_context */
876	/* use r11 and r12, volatile registers, as temp register */
877	/* give start of cpu_context for previous process */
878	addik	r11, r5, TI_CPU_CONTEXT
879	swi	r1, r11, CC_R1
880	swi	r2, r11, CC_R2
881	/* skip volatile registers.
882	 * they are saved on stack when we jumped to _switch_to() */
883	/* dedicated registers */
884	swi	r13, r11, CC_R13
885	swi	r14, r11, CC_R14
886	swi	r15, r11, CC_R15
887	swi	r16, r11, CC_R16
888	swi	r17, r11, CC_R17
889	swi	r18, r11, CC_R18
890	/* save non-volatile registers */
891	swi	r19, r11, CC_R19
892	swi	r20, r11, CC_R20
893	swi	r21, r11, CC_R21
894	swi	r22, r11, CC_R22
895	swi	r23, r11, CC_R23
896	swi	r24, r11, CC_R24
897	swi	r25, r11, CC_R25
898	swi	r26, r11, CC_R26
899	swi	r27, r11, CC_R27
900	swi	r28, r11, CC_R28
901	swi	r29, r11, CC_R29
902	swi	r30, r11, CC_R30
903	/* special purpose registers */
904	mfs	r12, rmsr
905	swi	r12, r11, CC_MSR
906	mfs	r12, rear
907	swi	r12, r11, CC_EAR
908	mfs	r12, resr
909	swi	r12, r11, CC_ESR
910	mfs	r12, rfsr
911	swi	r12, r11, CC_FSR
912
913	/* update r31, the current-give me pointer to task which will be next */
914	lwi	CURRENT_TASK, r6, TI_TASK
915	/* stored it to current_save too */
916	swi	CURRENT_TASK, r0, PER_CPU(CURRENT_SAVE)
917
918	/* get new process' cpu context and restore */
919	/* give me start where start context of next task */
920	addik	r11, r6, TI_CPU_CONTEXT
921
922	/* non-volatile registers */
923	lwi	r30, r11, CC_R30
924	lwi	r29, r11, CC_R29
925	lwi	r28, r11, CC_R28
926	lwi	r27, r11, CC_R27
927	lwi	r26, r11, CC_R26
928	lwi	r25, r11, CC_R25
929	lwi	r24, r11, CC_R24
930	lwi	r23, r11, CC_R23
931	lwi	r22, r11, CC_R22
932	lwi	r21, r11, CC_R21
933	lwi	r20, r11, CC_R20
934	lwi	r19, r11, CC_R19
935	/* dedicated registers */
936	lwi	r18, r11, CC_R18
937	lwi	r17, r11, CC_R17
938	lwi	r16, r11, CC_R16
939	lwi	r15, r11, CC_R15
940	lwi	r14, r11, CC_R14
941	lwi	r13, r11, CC_R13
942	/* skip volatile registers */
943	lwi	r2, r11, CC_R2
944	lwi	r1, r11, CC_R1
945
946	/* special purpose registers */
947	lwi	r12, r11, CC_FSR
948	mts	rfsr, r12
949	lwi	r12, r11, CC_MSR
950	mts	rmsr, r12
951
952	rtsd	r15, 8
953	nop
954
955ENTRY(_reset)
956	brai	0; /* Jump to reset vector */
957
958	/* These are compiled and loaded into high memory, then
959	 * copied into place in mach_early_setup */
960	.section	.init.ivt, "ax"
961#if CONFIG_MANUAL_RESET_VECTOR
962	.org	0x0
963	brai	CONFIG_MANUAL_RESET_VECTOR
964#endif
965	.org	0x8
966	brai	TOPHYS(_user_exception); /* syscall handler */
967	.org	0x10
968	brai	TOPHYS(_interrupt);	/* Interrupt handler */
969	.org	0x18
970	brai	TOPHYS(_debug_exception);	/* debug trap handler */
971	.org	0x20
972	brai	TOPHYS(_hw_exception_handler);	/* HW exception handler */
973
974.section .rodata,"a"
975#include "syscall_table.S"
976
977syscall_table_size=(.-sys_call_table)
978
979type_SYSCALL:
980	.ascii "SYSCALL\0"
981type_IRQ:
982	.ascii "IRQ\0"
983type_IRQ_PREEMPT:
984	.ascii "IRQ (PREEMPTED)\0"
985type_SYSCALL_PREEMPT:
986	.ascii " SYSCALL (PREEMPTED)\0"
987
988	/*
989	 * Trap decoding for stack unwinder
990	 * Tuples are (start addr, end addr, string)
991	 * If return address lies on [start addr, end addr],
992	 * unwinder displays 'string'
993	 */
994
995	.align 4
996.global microblaze_trap_handlers
997microblaze_trap_handlers:
998	/* Exact matches come first */
999	.word ret_from_trap; .word ret_from_trap   ; .word type_SYSCALL
1000	.word ret_from_irq ; .word ret_from_irq    ; .word type_IRQ
1001	/* Fuzzy matches go here */
1002	.word ret_from_irq ; .word no_intr_resched ; .word type_IRQ_PREEMPT
1003	.word ret_from_trap; .word TRAP_return     ; .word type_SYSCALL_PREEMPT
1004	/* End of table */
1005	.word 0               ; .word 0               ; .word 0
1006