| /linux-4.4.14/drivers/gpu/drm/amd/amdgpu/ |
| D | vi.c | 593 u32 reset_mask = 0; in vi_gpu_check_soft_reset() local
604 reset_mask |= AMDGPU_RESET_GFX; in vi_gpu_check_soft_reset()
607 reset_mask |= AMDGPU_RESET_CP; in vi_gpu_check_soft_reset()
612 reset_mask |= AMDGPU_RESET_RLC; in vi_gpu_check_soft_reset()
617 reset_mask |= AMDGPU_RESET_CP; in vi_gpu_check_soft_reset()
622 reset_mask |= AMDGPU_RESET_DMA; in vi_gpu_check_soft_reset()
625 reset_mask |= AMDGPU_RESET_DMA1; in vi_gpu_check_soft_reset()
631 reset_mask |= AMDGPU_RESET_IH; in vi_gpu_check_soft_reset()
634 reset_mask |= AMDGPU_RESET_SEM; in vi_gpu_check_soft_reset()
637 reset_mask |= AMDGPU_RESET_GRBM; in vi_gpu_check_soft_reset()
[all …]
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| D | cik.c | 1080 u32 reset_mask = 0; in amdgpu_cik_gpu_check_soft_reset() local
1091 reset_mask |= AMDGPU_RESET_GFX; in amdgpu_cik_gpu_check_soft_reset()
1094 reset_mask |= AMDGPU_RESET_CP; in amdgpu_cik_gpu_check_soft_reset()
1099 reset_mask |= AMDGPU_RESET_RLC; in amdgpu_cik_gpu_check_soft_reset()
1104 reset_mask |= AMDGPU_RESET_DMA; in amdgpu_cik_gpu_check_soft_reset()
1109 reset_mask |= AMDGPU_RESET_DMA1; in amdgpu_cik_gpu_check_soft_reset()
1114 reset_mask |= AMDGPU_RESET_DMA; in amdgpu_cik_gpu_check_soft_reset()
1117 reset_mask |= AMDGPU_RESET_DMA1; in amdgpu_cik_gpu_check_soft_reset()
1123 reset_mask |= AMDGPU_RESET_IH; in amdgpu_cik_gpu_check_soft_reset()
1126 reset_mask |= AMDGPU_RESET_SEM; in amdgpu_cik_gpu_check_soft_reset()
[all …]
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| /linux-4.4.14/drivers/clk/sunxi/ |
| D | clk-usb.c | 92 u32 reset_mask; member
149 if (data->reset_mask == 0) in sunxi_usb_clk_setup()
167 reset_data->rcdev.nr_resets = __fls(data->reset_mask) + 1; in sunxi_usb_clk_setup()
175 .reset_mask = BIT(2) | BIT(1) | BIT(0),
188 .reset_mask = BIT(1) | BIT(0),
199 .reset_mask = BIT(2) | BIT(1) | BIT(0),
210 .reset_mask = BIT(2) | BIT(1) | BIT(0),
221 .reset_mask = BIT(19) | BIT(18) | BIT(17),
235 .reset_mask = BIT(21) | BIT(20) | BIT(19) | BIT(18) | BIT(17),
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| /linux-4.4.14/drivers/gpu/drm/radeon/ |
| D | ni.c | 1754 u32 reset_mask = 0; in cayman_gpu_check_soft_reset() local
1765 reset_mask |= RADEON_RESET_GFX; in cayman_gpu_check_soft_reset()
1769 reset_mask |= RADEON_RESET_CP; in cayman_gpu_check_soft_reset()
1772 reset_mask |= RADEON_RESET_GRBM | RADEON_RESET_GFX | RADEON_RESET_CP; in cayman_gpu_check_soft_reset()
1777 reset_mask |= RADEON_RESET_DMA; in cayman_gpu_check_soft_reset()
1782 reset_mask |= RADEON_RESET_DMA1; in cayman_gpu_check_soft_reset()
1787 reset_mask |= RADEON_RESET_DMA; in cayman_gpu_check_soft_reset()
1790 reset_mask |= RADEON_RESET_DMA1; in cayman_gpu_check_soft_reset()
1795 reset_mask |= RADEON_RESET_RLC; in cayman_gpu_check_soft_reset()
1798 reset_mask |= RADEON_RESET_IH; in cayman_gpu_check_soft_reset()
[all …]
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| D | r600.c | 1610 u32 reset_mask = 0; in r600_gpu_check_soft_reset() local
1621 reset_mask |= RADEON_RESET_GFX; in r600_gpu_check_soft_reset()
1628 reset_mask |= RADEON_RESET_GFX; in r600_gpu_check_soft_reset()
1633 reset_mask |= RADEON_RESET_CP; in r600_gpu_check_soft_reset()
1636 reset_mask |= RADEON_RESET_GRBM | RADEON_RESET_GFX | RADEON_RESET_CP; in r600_gpu_check_soft_reset()
1641 reset_mask |= RADEON_RESET_DMA; in r600_gpu_check_soft_reset()
1646 reset_mask |= RADEON_RESET_RLC; in r600_gpu_check_soft_reset()
1649 reset_mask |= RADEON_RESET_IH; in r600_gpu_check_soft_reset()
1652 reset_mask |= RADEON_RESET_SEM; in r600_gpu_check_soft_reset()
1655 reset_mask |= RADEON_RESET_GRBM; in r600_gpu_check_soft_reset()
[all …]
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| D | evergreen_dma.c | 173 u32 reset_mask = evergreen_gpu_check_soft_reset(rdev); in evergreen_dma_is_lockup() local
175 if (!(reset_mask & RADEON_RESET_DMA)) { in evergreen_dma_is_lockup()
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| D | evergreen.c | 3916 u32 reset_mask = 0; in evergreen_gpu_check_soft_reset() local
3926 reset_mask |= RADEON_RESET_GFX; in evergreen_gpu_check_soft_reset()
3930 reset_mask |= RADEON_RESET_CP; in evergreen_gpu_check_soft_reset()
3933 reset_mask |= RADEON_RESET_GRBM | RADEON_RESET_GFX | RADEON_RESET_CP; in evergreen_gpu_check_soft_reset()
3938 reset_mask |= RADEON_RESET_DMA; in evergreen_gpu_check_soft_reset()
3943 reset_mask |= RADEON_RESET_DMA; in evergreen_gpu_check_soft_reset()
3948 reset_mask |= RADEON_RESET_RLC; in evergreen_gpu_check_soft_reset()
3951 reset_mask |= RADEON_RESET_IH; in evergreen_gpu_check_soft_reset()
3954 reset_mask |= RADEON_RESET_SEM; in evergreen_gpu_check_soft_reset()
3957 reset_mask |= RADEON_RESET_GRBM; in evergreen_gpu_check_soft_reset()
[all …]
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| D | si.c | 3773 u32 reset_mask = 0; in si_gpu_check_soft_reset() local
3784 reset_mask |= RADEON_RESET_GFX; in si_gpu_check_soft_reset()
3788 reset_mask |= RADEON_RESET_CP; in si_gpu_check_soft_reset()
3791 reset_mask |= RADEON_RESET_GRBM | RADEON_RESET_GFX | RADEON_RESET_CP; in si_gpu_check_soft_reset()
3796 reset_mask |= RADEON_RESET_RLC; in si_gpu_check_soft_reset()
3801 reset_mask |= RADEON_RESET_DMA; in si_gpu_check_soft_reset()
3806 reset_mask |= RADEON_RESET_DMA1; in si_gpu_check_soft_reset()
3811 reset_mask |= RADEON_RESET_DMA; in si_gpu_check_soft_reset()
3814 reset_mask |= RADEON_RESET_DMA1; in si_gpu_check_soft_reset()
3820 reset_mask |= RADEON_RESET_IH; in si_gpu_check_soft_reset()
[all …]
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| D | si_dma.c | 43 u32 reset_mask = si_gpu_check_soft_reset(rdev); in si_dma_is_lockup() local
51 if (!(reset_mask & mask)) { in si_dma_is_lockup()
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| D | cik.c | 5257 u32 reset_mask = 0; in cik_gpu_check_soft_reset() local
5268 reset_mask |= RADEON_RESET_GFX; in cik_gpu_check_soft_reset()
5271 reset_mask |= RADEON_RESET_CP; in cik_gpu_check_soft_reset()
5276 reset_mask |= RADEON_RESET_RLC; in cik_gpu_check_soft_reset()
5281 reset_mask |= RADEON_RESET_DMA; in cik_gpu_check_soft_reset()
5286 reset_mask |= RADEON_RESET_DMA1; in cik_gpu_check_soft_reset()
5291 reset_mask |= RADEON_RESET_DMA; in cik_gpu_check_soft_reset()
5294 reset_mask |= RADEON_RESET_DMA1; in cik_gpu_check_soft_reset()
5300 reset_mask |= RADEON_RESET_IH; in cik_gpu_check_soft_reset()
5303 reset_mask |= RADEON_RESET_SEM; in cik_gpu_check_soft_reset()
[all …]
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| D | ni_dma.c | 289 u32 reset_mask = cayman_gpu_check_soft_reset(rdev); in cayman_dma_is_lockup() local
297 if (!(reset_mask & mask)) { in cayman_dma_is_lockup()
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| D | r600_dma.c | 210 u32 reset_mask = r600_gpu_check_soft_reset(rdev); in r600_dma_is_lockup() local
212 if (!(reset_mask & RADEON_RESET_DMA)) { in r600_dma_is_lockup()
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| D | cik_sdma.c | 772 u32 reset_mask = cik_gpu_check_soft_reset(rdev); in cik_sdma_is_lockup() local
780 if (!(reset_mask & mask)) { in cik_sdma_is_lockup()
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| /linux-4.4.14/drivers/net/ethernet/ibm/ |
| D | ibmveth.h | 85 unsigned long reset_mask, unsigned long set_mask, in h_illan_attributes() argument
92 reset_mask, set_mask); in h_illan_attributes()
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| /linux-4.4.14/include/linux/ |
| D | ioc3.h | 65 int reset_mask; /* non-zero if you want the ioc3.c module to reset interrupts */ member
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| /linux-4.4.14/drivers/scsi/aacraid/ |
| D | src.c | 565 u32 var, reset_mask; in aac_src_restart_adapter() local
573 0, 0, 0, 0, 0, 0, &var, &reset_mask, NULL, NULL, NULL); in aac_src_restart_adapter()
578 reset_mask = dev->doorbell_mask; in aac_src_restart_adapter()
593 src_writel(dev, MUnit.IDR, reset_mask); in aac_src_restart_adapter()
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| /linux-4.4.14/drivers/sn/ |
| D | ioc3.c | 430 if (ioc3_submodules[id]->reset_mask) in ioc3_intr_io()
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| /linux-4.4.14/drivers/net/ethernet/3com/ |
| D | 3c59x.c | 1965 int do_tx_reset = 0, reset_mask = 0; in vortex_error() local
1993 reset_mask = 0x0108; /* Reset interface logic, but not download logic */ in vortex_error()
2057 issue_and_wait(dev, TxReset|reset_mask); in vortex_error()
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