Searched refs:insn (Results 1 - 200 of 549) sorted by relevance

123

/linux-4.4.14/arch/x86/lib/
H A Dinsn.c27 #include <asm/insn.h>
30 #define validate_next(t, insn, n) \
31 ((insn)->next_byte + sizeof(t) + n <= (insn)->end_kaddr)
33 #define __get_next(t, insn) \
34 ({ t r = *(t*)insn->next_byte; insn->next_byte += sizeof(t); r; })
36 #define __peek_nbyte_next(t, insn, n) \
37 ({ t r = *(t*)((insn)->next_byte + n); r; })
39 #define get_next(t, insn) \
40 ({ if (unlikely(!validate_next(t, insn, 0))) goto err_out; __get_next(t, insn); })
42 #define peek_nbyte_next(t, insn, n) \
43 ({ if (unlikely(!validate_next(t, insn, n))) goto err_out; __peek_nbyte_next(t, insn, n); })
45 #define peek_next(t, insn) peek_nbyte_next(t, insn, 0)
48 * insn_init() - initialize struct insn
49 * @insn: &struct insn to be initialized
53 void insn_init(struct insn *insn, const void *kaddr, int buf_len, int x86_64) insn_init() argument
62 memset(insn, 0, sizeof(*insn)); insn_init()
63 insn->kaddr = kaddr; insn_init()
64 insn->end_kaddr = kaddr + buf_len; insn_init()
65 insn->next_byte = kaddr; insn_init()
66 insn->x86_64 = x86_64 ? 1 : 0; insn_init()
67 insn->opnd_bytes = 4; insn_init()
69 insn->addr_bytes = 8; insn_init()
71 insn->addr_bytes = 4; insn_init()
76 * @insn: &struct insn containing instruction
78 * Populates the @insn->prefixes bitmap, and updates @insn->next_byte
79 * to point to the (first) opcode. No effect if @insn->prefixes.got
82 void insn_get_prefixes(struct insn *insn) insn_get_prefixes() argument
84 struct insn_field *prefixes = &insn->prefixes; insn_get_prefixes()
94 b = peek_next(insn_byte_t, insn); insn_get_prefixes()
107 if (insn->x86_64) insn_get_prefixes()
108 insn->addr_bytes ^= 12; insn_get_prefixes()
110 insn->addr_bytes ^= 6; insn_get_prefixes()
113 insn->opnd_bytes ^= 6; insn_get_prefixes()
117 insn->next_byte++; insn_get_prefixes()
119 b = peek_next(insn_byte_t, insn); insn_get_prefixes()
123 if (lb && lb != insn->prefixes.bytes[3]) { insn_get_prefixes()
124 if (unlikely(insn->prefixes.bytes[3])) { insn_get_prefixes()
126 b = insn->prefixes.bytes[3]; insn_get_prefixes()
131 insn->prefixes.bytes[3] = lb; insn_get_prefixes()
135 if (insn->x86_64) { insn_get_prefixes()
136 b = peek_next(insn_byte_t, insn); insn_get_prefixes()
139 insn->rex_prefix.value = b; insn_get_prefixes()
140 insn->rex_prefix.nbytes = 1; insn_get_prefixes()
141 insn->next_byte++; insn_get_prefixes()
144 insn->opnd_bytes = 8; insn_get_prefixes()
147 insn->rex_prefix.got = 1; insn_get_prefixes()
150 b = peek_next(insn_byte_t, insn); insn_get_prefixes()
153 insn_byte_t b2 = peek_nbyte_next(insn_byte_t, insn, 1); insn_get_prefixes()
154 if (!insn->x86_64) { insn_get_prefixes()
163 insn->vex_prefix.bytes[0] = b; insn_get_prefixes()
164 insn->vex_prefix.bytes[1] = b2; insn_get_prefixes()
166 b2 = peek_nbyte_next(insn_byte_t, insn, 2); insn_get_prefixes()
167 insn->vex_prefix.bytes[2] = b2; insn_get_prefixes()
168 insn->vex_prefix.nbytes = 3; insn_get_prefixes()
169 insn->next_byte += 3; insn_get_prefixes()
170 if (insn->x86_64 && X86_VEX_W(b2)) insn_get_prefixes()
172 insn->opnd_bytes = 8; insn_get_prefixes()
179 insn->vex_prefix.bytes[2] = b2 & 0x7f; insn_get_prefixes()
180 insn->vex_prefix.nbytes = 2; insn_get_prefixes()
181 insn->next_byte += 2; insn_get_prefixes()
185 insn->vex_prefix.got = 1; insn_get_prefixes()
195 * @insn: &struct insn containing instruction
197 * Populates @insn->opcode, updates @insn->next_byte to point past the
198 * opcode byte(s), and set @insn->attr (except for groups).
200 * Sets @insn->opcode.value = opcode1. No effect if @insn->opcode.got
203 void insn_get_opcode(struct insn *insn) insn_get_opcode() argument
205 struct insn_field *opcode = &insn->opcode; insn_get_opcode()
210 if (!insn->prefixes.got) insn_get_opcode()
211 insn_get_prefixes(insn); insn_get_opcode()
214 op = get_next(insn_byte_t, insn); insn_get_opcode()
219 if (insn_is_avx(insn)) { insn_get_opcode()
221 m = insn_vex_m_bits(insn); insn_get_opcode()
222 p = insn_vex_p_bits(insn); insn_get_opcode()
223 insn->attr = inat_get_avx_attribute(op, m, p); insn_get_opcode()
224 if (!inat_accept_vex(insn->attr) && !inat_is_group(insn->attr)) insn_get_opcode()
225 insn->attr = 0; /* This instruction is bad */ insn_get_opcode()
229 insn->attr = inat_get_opcode_attribute(op); insn_get_opcode()
230 while (inat_is_escape(insn->attr)) { insn_get_opcode()
232 op = get_next(insn_byte_t, insn); insn_get_opcode()
234 pfx_id = insn_last_prefix_id(insn); insn_get_opcode()
235 insn->attr = inat_get_escape_attribute(op, pfx_id, insn->attr); insn_get_opcode()
237 if (inat_must_vex(insn->attr)) insn_get_opcode()
238 insn->attr = 0; /* This instruction is bad */ insn_get_opcode()
248 * @insn: &struct insn containing instruction
250 * Populates @insn->modrm and updates @insn->next_byte to point past the
252 * (prefixes and opcode(s)). No effect if @insn->modrm.got is already 1.
254 void insn_get_modrm(struct insn *insn) insn_get_modrm() argument
256 struct insn_field *modrm = &insn->modrm; insn_get_modrm()
260 if (!insn->opcode.got) insn_get_modrm()
261 insn_get_opcode(insn); insn_get_modrm()
263 if (inat_has_modrm(insn->attr)) { insn_get_modrm()
264 mod = get_next(insn_byte_t, insn); insn_get_modrm()
267 if (inat_is_group(insn->attr)) { insn_get_modrm()
268 pfx_id = insn_last_prefix_id(insn); insn_get_modrm()
269 insn->attr = inat_get_group_attribute(mod, pfx_id, insn_get_modrm()
270 insn->attr); insn_get_modrm()
271 if (insn_is_avx(insn) && !inat_accept_vex(insn->attr)) insn_get_modrm()
272 insn->attr = 0; /* This is bad */ insn_get_modrm()
276 if (insn->x86_64 && inat_is_force64(insn->attr)) insn_get_modrm()
277 insn->opnd_bytes = 8; insn_get_modrm()
287 * @insn: &struct insn containing instruction
290 * ModRM byte. No effect if @insn->x86_64 is 0.
292 int insn_rip_relative(struct insn *insn) insn_rip_relative() argument
294 struct insn_field *modrm = &insn->modrm; insn_rip_relative()
296 if (!insn->x86_64) insn_rip_relative()
299 insn_get_modrm(insn); insn_rip_relative()
309 * @insn: &struct insn containing instruction
314 void insn_get_sib(struct insn *insn) insn_get_sib() argument
318 if (insn->sib.got) insn_get_sib()
320 if (!insn->modrm.got) insn_get_sib()
321 insn_get_modrm(insn); insn_get_sib()
322 if (insn->modrm.nbytes) { insn_get_sib()
323 modrm = (insn_byte_t)insn->modrm.value; insn_get_sib()
324 if (insn->addr_bytes != 2 && insn_get_sib()
326 insn->sib.value = get_next(insn_byte_t, insn); insn_get_sib()
327 insn->sib.nbytes = 1; insn_get_sib()
330 insn->sib.got = 1; insn_get_sib()
339 * @insn: &struct insn containing instruction
345 void insn_get_displacement(struct insn *insn) insn_get_displacement() argument
349 if (insn->displacement.got) insn_get_displacement()
351 if (!insn->sib.got) insn_get_displacement()
352 insn_get_sib(insn); insn_get_displacement()
353 if (insn->modrm.nbytes) { insn_get_displacement()
371 mod = X86_MODRM_MOD(insn->modrm.value); insn_get_displacement()
372 rm = X86_MODRM_RM(insn->modrm.value); insn_get_displacement()
373 base = X86_SIB_BASE(insn->sib.value); insn_get_displacement()
377 insn->displacement.value = get_next(char, insn); insn_get_displacement()
378 insn->displacement.nbytes = 1; insn_get_displacement()
379 } else if (insn->addr_bytes == 2) { insn_get_displacement()
381 insn->displacement.value = insn_get_displacement()
382 get_next(short, insn); insn_get_displacement()
383 insn->displacement.nbytes = 2; insn_get_displacement()
388 insn->displacement.value = get_next(int, insn); insn_get_displacement()
389 insn->displacement.nbytes = 4; insn_get_displacement()
394 insn->displacement.got = 1; insn_get_displacement()
401 static int __get_moffset(struct insn *insn) __get_moffset() argument
403 switch (insn->addr_bytes) { __get_moffset()
405 insn->moffset1.value = get_next(short, insn); __get_moffset()
406 insn->moffset1.nbytes = 2; __get_moffset()
409 insn->moffset1.value = get_next(int, insn); __get_moffset()
410 insn->moffset1.nbytes = 4; __get_moffset()
413 insn->moffset1.value = get_next(int, insn); __get_moffset()
414 insn->moffset1.nbytes = 4; __get_moffset()
415 insn->moffset2.value = get_next(int, insn); __get_moffset()
416 insn->moffset2.nbytes = 4; __get_moffset()
421 insn->moffset1.got = insn->moffset2.got = 1; __get_moffset()
430 static int __get_immv32(struct insn *insn) __get_immv32() argument
432 switch (insn->opnd_bytes) { __get_immv32()
434 insn->immediate.value = get_next(short, insn); __get_immv32()
435 insn->immediate.nbytes = 2; __get_immv32()
439 insn->immediate.value = get_next(int, insn); __get_immv32()
440 insn->immediate.nbytes = 4; __get_immv32()
453 static int __get_immv(struct insn *insn) __get_immv() argument
455 switch (insn->opnd_bytes) { __get_immv()
457 insn->immediate1.value = get_next(short, insn); __get_immv()
458 insn->immediate1.nbytes = 2; __get_immv()
461 insn->immediate1.value = get_next(int, insn); __get_immv()
462 insn->immediate1.nbytes = 4; __get_immv()
465 insn->immediate1.value = get_next(int, insn); __get_immv()
466 insn->immediate1.nbytes = 4; __get_immv()
467 insn->immediate2.value = get_next(int, insn); __get_immv()
468 insn->immediate2.nbytes = 4; __get_immv()
473 insn->immediate1.got = insn->immediate2.got = 1; __get_immv()
481 static int __get_immptr(struct insn *insn) __get_immptr() argument
483 switch (insn->opnd_bytes) { __get_immptr()
485 insn->immediate1.value = get_next(short, insn); __get_immptr()
486 insn->immediate1.nbytes = 2; __get_immptr()
489 insn->immediate1.value = get_next(int, insn); __get_immptr()
490 insn->immediate1.nbytes = 4; __get_immptr()
498 insn->immediate2.value = get_next(unsigned short, insn); __get_immptr()
499 insn->immediate2.nbytes = 2; __get_immptr()
500 insn->immediate1.got = insn->immediate2.got = 1; __get_immptr()
509 * @insn: &struct insn containing instruction
516 void insn_get_immediate(struct insn *insn) insn_get_immediate() argument
518 if (insn->immediate.got) insn_get_immediate()
520 if (!insn->displacement.got) insn_get_immediate()
521 insn_get_displacement(insn); insn_get_immediate()
523 if (inat_has_moffset(insn->attr)) { insn_get_immediate()
524 if (!__get_moffset(insn)) insn_get_immediate()
529 if (!inat_has_immediate(insn->attr)) insn_get_immediate()
533 switch (inat_immediate_size(insn->attr)) { insn_get_immediate()
535 insn->immediate.value = get_next(char, insn); insn_get_immediate()
536 insn->immediate.nbytes = 1; insn_get_immediate()
539 insn->immediate.value = get_next(short, insn); insn_get_immediate()
540 insn->immediate.nbytes = 2; insn_get_immediate()
543 insn->immediate.value = get_next(int, insn); insn_get_immediate()
544 insn->immediate.nbytes = 4; insn_get_immediate()
547 insn->immediate1.value = get_next(int, insn); insn_get_immediate()
548 insn->immediate1.nbytes = 4; insn_get_immediate()
549 insn->immediate2.value = get_next(int, insn); insn_get_immediate()
550 insn->immediate2.nbytes = 4; insn_get_immediate()
553 if (!__get_immptr(insn)) insn_get_immediate()
557 if (!__get_immv32(insn)) insn_get_immediate()
561 if (!__get_immv(insn)) insn_get_immediate()
565 /* Here, insn must have an immediate, but failed */ insn_get_immediate()
568 if (inat_has_second_immediate(insn->attr)) { insn_get_immediate()
569 insn->immediate2.value = get_next(char, insn); insn_get_immediate()
570 insn->immediate2.nbytes = 1; insn_get_immediate()
573 insn->immediate.got = 1; insn_get_immediate()
581 * @insn: &struct insn containing instruction
586 void insn_get_length(struct insn *insn) insn_get_length() argument
588 if (insn->length) insn_get_length()
590 if (!insn->immediate.got) insn_get_length()
591 insn_get_immediate(insn); insn_get_length()
592 insn->length = (unsigned char)((unsigned long)insn->next_byte insn_get_length()
593 - (unsigned long)insn->kaddr); insn_get_length()
H A DMakefile5 inat_tables_script = $(srctree)/arch/x86/tools/gen-insn-attr-x86.awk
23 lib-$(CONFIG_INSTRUCTION_DECODER) += insn.o inat.o
/linux-4.4.14/tools/perf/util/intel-pt-decoder/
H A Dinsn.c27 #include "insn.h"
30 #define validate_next(t, insn, n) \
31 ((insn)->next_byte + sizeof(t) + n <= (insn)->end_kaddr)
33 #define __get_next(t, insn) \
34 ({ t r = *(t*)insn->next_byte; insn->next_byte += sizeof(t); r; })
36 #define __peek_nbyte_next(t, insn, n) \
37 ({ t r = *(t*)((insn)->next_byte + n); r; })
39 #define get_next(t, insn) \
40 ({ if (unlikely(!validate_next(t, insn, 0))) goto err_out; __get_next(t, insn); })
42 #define peek_nbyte_next(t, insn, n) \
43 ({ if (unlikely(!validate_next(t, insn, n))) goto err_out; __peek_nbyte_next(t, insn, n); })
45 #define peek_next(t, insn) peek_nbyte_next(t, insn, 0)
48 * insn_init() - initialize struct insn
49 * @insn: &struct insn to be initialized
53 void insn_init(struct insn *insn, const void *kaddr, int buf_len, int x86_64) insn_init() argument
62 memset(insn, 0, sizeof(*insn)); insn_init()
63 insn->kaddr = kaddr; insn_init()
64 insn->end_kaddr = kaddr + buf_len; insn_init()
65 insn->next_byte = kaddr; insn_init()
66 insn->x86_64 = x86_64 ? 1 : 0; insn_init()
67 insn->opnd_bytes = 4; insn_init()
69 insn->addr_bytes = 8; insn_init()
71 insn->addr_bytes = 4; insn_init()
76 * @insn: &struct insn containing instruction
78 * Populates the @insn->prefixes bitmap, and updates @insn->next_byte
79 * to point to the (first) opcode. No effect if @insn->prefixes.got
82 void insn_get_prefixes(struct insn *insn) insn_get_prefixes() argument
84 struct insn_field *prefixes = &insn->prefixes; insn_get_prefixes()
94 b = peek_next(insn_byte_t, insn); insn_get_prefixes()
107 if (insn->x86_64) insn_get_prefixes()
108 insn->addr_bytes ^= 12; insn_get_prefixes()
110 insn->addr_bytes ^= 6; insn_get_prefixes()
113 insn->opnd_bytes ^= 6; insn_get_prefixes()
117 insn->next_byte++; insn_get_prefixes()
119 b = peek_next(insn_byte_t, insn); insn_get_prefixes()
123 if (lb && lb != insn->prefixes.bytes[3]) { insn_get_prefixes()
124 if (unlikely(insn->prefixes.bytes[3])) { insn_get_prefixes()
126 b = insn->prefixes.bytes[3]; insn_get_prefixes()
131 insn->prefixes.bytes[3] = lb; insn_get_prefixes()
135 if (insn->x86_64) { insn_get_prefixes()
136 b = peek_next(insn_byte_t, insn); insn_get_prefixes()
139 insn->rex_prefix.value = b; insn_get_prefixes()
140 insn->rex_prefix.nbytes = 1; insn_get_prefixes()
141 insn->next_byte++; insn_get_prefixes()
144 insn->opnd_bytes = 8; insn_get_prefixes()
147 insn->rex_prefix.got = 1; insn_get_prefixes()
150 b = peek_next(insn_byte_t, insn); insn_get_prefixes()
153 insn_byte_t b2 = peek_nbyte_next(insn_byte_t, insn, 1); insn_get_prefixes()
154 if (!insn->x86_64) { insn_get_prefixes()
163 insn->vex_prefix.bytes[0] = b; insn_get_prefixes()
164 insn->vex_prefix.bytes[1] = b2; insn_get_prefixes()
166 b2 = peek_nbyte_next(insn_byte_t, insn, 2); insn_get_prefixes()
167 insn->vex_prefix.bytes[2] = b2; insn_get_prefixes()
168 insn->vex_prefix.nbytes = 3; insn_get_prefixes()
169 insn->next_byte += 3; insn_get_prefixes()
170 if (insn->x86_64 && X86_VEX_W(b2)) insn_get_prefixes()
172 insn->opnd_bytes = 8; insn_get_prefixes()
179 insn->vex_prefix.bytes[2] = b2 & 0x7f; insn_get_prefixes()
180 insn->vex_prefix.nbytes = 2; insn_get_prefixes()
181 insn->next_byte += 2; insn_get_prefixes()
185 insn->vex_prefix.got = 1; insn_get_prefixes()
195 * @insn: &struct insn containing instruction
197 * Populates @insn->opcode, updates @insn->next_byte to point past the
198 * opcode byte(s), and set @insn->attr (except for groups).
200 * Sets @insn->opcode.value = opcode1. No effect if @insn->opcode.got
203 void insn_get_opcode(struct insn *insn) insn_get_opcode() argument
205 struct insn_field *opcode = &insn->opcode; insn_get_opcode()
210 if (!insn->prefixes.got) insn_get_opcode()
211 insn_get_prefixes(insn); insn_get_opcode()
214 op = get_next(insn_byte_t, insn); insn_get_opcode()
219 if (insn_is_avx(insn)) { insn_get_opcode()
221 m = insn_vex_m_bits(insn); insn_get_opcode()
222 p = insn_vex_p_bits(insn); insn_get_opcode()
223 insn->attr = inat_get_avx_attribute(op, m, p); insn_get_opcode()
224 if (!inat_accept_vex(insn->attr) && !inat_is_group(insn->attr)) insn_get_opcode()
225 insn->attr = 0; /* This instruction is bad */ insn_get_opcode()
229 insn->attr = inat_get_opcode_attribute(op); insn_get_opcode()
230 while (inat_is_escape(insn->attr)) { insn_get_opcode()
232 op = get_next(insn_byte_t, insn); insn_get_opcode()
234 pfx_id = insn_last_prefix_id(insn); insn_get_opcode()
235 insn->attr = inat_get_escape_attribute(op, pfx_id, insn->attr); insn_get_opcode()
237 if (inat_must_vex(insn->attr)) insn_get_opcode()
238 insn->attr = 0; /* This instruction is bad */ insn_get_opcode()
248 * @insn: &struct insn containing instruction
250 * Populates @insn->modrm and updates @insn->next_byte to point past the
252 * (prefixes and opcode(s)). No effect if @insn->modrm.got is already 1.
254 void insn_get_modrm(struct insn *insn) insn_get_modrm() argument
256 struct insn_field *modrm = &insn->modrm; insn_get_modrm()
260 if (!insn->opcode.got) insn_get_modrm()
261 insn_get_opcode(insn); insn_get_modrm()
263 if (inat_has_modrm(insn->attr)) { insn_get_modrm()
264 mod = get_next(insn_byte_t, insn); insn_get_modrm()
267 if (inat_is_group(insn->attr)) { insn_get_modrm()
268 pfx_id = insn_last_prefix_id(insn); insn_get_modrm()
269 insn->attr = inat_get_group_attribute(mod, pfx_id, insn_get_modrm()
270 insn->attr); insn_get_modrm()
271 if (insn_is_avx(insn) && !inat_accept_vex(insn->attr)) insn_get_modrm()
272 insn->attr = 0; /* This is bad */ insn_get_modrm()
276 if (insn->x86_64 && inat_is_force64(insn->attr)) insn_get_modrm()
277 insn->opnd_bytes = 8; insn_get_modrm()
287 * @insn: &struct insn containing instruction
290 * ModRM byte. No effect if @insn->x86_64 is 0.
292 int insn_rip_relative(struct insn *insn) insn_rip_relative() argument
294 struct insn_field *modrm = &insn->modrm; insn_rip_relative()
296 if (!insn->x86_64) insn_rip_relative()
299 insn_get_modrm(insn); insn_rip_relative()
309 * @insn: &struct insn containing instruction
314 void insn_get_sib(struct insn *insn) insn_get_sib() argument
318 if (insn->sib.got) insn_get_sib()
320 if (!insn->modrm.got) insn_get_sib()
321 insn_get_modrm(insn); insn_get_sib()
322 if (insn->modrm.nbytes) { insn_get_sib()
323 modrm = (insn_byte_t)insn->modrm.value; insn_get_sib()
324 if (insn->addr_bytes != 2 && insn_get_sib()
326 insn->sib.value = get_next(insn_byte_t, insn); insn_get_sib()
327 insn->sib.nbytes = 1; insn_get_sib()
330 insn->sib.got = 1; insn_get_sib()
339 * @insn: &struct insn containing instruction
345 void insn_get_displacement(struct insn *insn) insn_get_displacement() argument
349 if (insn->displacement.got) insn_get_displacement()
351 if (!insn->sib.got) insn_get_displacement()
352 insn_get_sib(insn); insn_get_displacement()
353 if (insn->modrm.nbytes) { insn_get_displacement()
371 mod = X86_MODRM_MOD(insn->modrm.value); insn_get_displacement()
372 rm = X86_MODRM_RM(insn->modrm.value); insn_get_displacement()
373 base = X86_SIB_BASE(insn->sib.value); insn_get_displacement()
377 insn->displacement.value = get_next(char, insn); insn_get_displacement()
378 insn->displacement.nbytes = 1; insn_get_displacement()
379 } else if (insn->addr_bytes == 2) { insn_get_displacement()
381 insn->displacement.value = insn_get_displacement()
382 get_next(short, insn); insn_get_displacement()
383 insn->displacement.nbytes = 2; insn_get_displacement()
388 insn->displacement.value = get_next(int, insn); insn_get_displacement()
389 insn->displacement.nbytes = 4; insn_get_displacement()
394 insn->displacement.got = 1; insn_get_displacement()
401 static int __get_moffset(struct insn *insn) __get_moffset() argument
403 switch (insn->addr_bytes) { __get_moffset()
405 insn->moffset1.value = get_next(short, insn); __get_moffset()
406 insn->moffset1.nbytes = 2; __get_moffset()
409 insn->moffset1.value = get_next(int, insn); __get_moffset()
410 insn->moffset1.nbytes = 4; __get_moffset()
413 insn->moffset1.value = get_next(int, insn); __get_moffset()
414 insn->moffset1.nbytes = 4; __get_moffset()
415 insn->moffset2.value = get_next(int, insn); __get_moffset()
416 insn->moffset2.nbytes = 4; __get_moffset()
421 insn->moffset1.got = insn->moffset2.got = 1; __get_moffset()
430 static int __get_immv32(struct insn *insn) __get_immv32() argument
432 switch (insn->opnd_bytes) { __get_immv32()
434 insn->immediate.value = get_next(short, insn); __get_immv32()
435 insn->immediate.nbytes = 2; __get_immv32()
439 insn->immediate.value = get_next(int, insn); __get_immv32()
440 insn->immediate.nbytes = 4; __get_immv32()
453 static int __get_immv(struct insn *insn) __get_immv() argument
455 switch (insn->opnd_bytes) { __get_immv()
457 insn->immediate1.value = get_next(short, insn); __get_immv()
458 insn->immediate1.nbytes = 2; __get_immv()
461 insn->immediate1.value = get_next(int, insn); __get_immv()
462 insn->immediate1.nbytes = 4; __get_immv()
465 insn->immediate1.value = get_next(int, insn); __get_immv()
466 insn->immediate1.nbytes = 4; __get_immv()
467 insn->immediate2.value = get_next(int, insn); __get_immv()
468 insn->immediate2.nbytes = 4; __get_immv()
473 insn->immediate1.got = insn->immediate2.got = 1; __get_immv()
481 static int __get_immptr(struct insn *insn) __get_immptr() argument
483 switch (insn->opnd_bytes) { __get_immptr()
485 insn->immediate1.value = get_next(short, insn); __get_immptr()
486 insn->immediate1.nbytes = 2; __get_immptr()
489 insn->immediate1.value = get_next(int, insn); __get_immptr()
490 insn->immediate1.nbytes = 4; __get_immptr()
498 insn->immediate2.value = get_next(unsigned short, insn); __get_immptr()
499 insn->immediate2.nbytes = 2; __get_immptr()
500 insn->immediate1.got = insn->immediate2.got = 1; __get_immptr()
509 * @insn: &struct insn containing instruction
516 void insn_get_immediate(struct insn *insn) insn_get_immediate() argument
518 if (insn->immediate.got) insn_get_immediate()
520 if (!insn->displacement.got) insn_get_immediate()
521 insn_get_displacement(insn); insn_get_immediate()
523 if (inat_has_moffset(insn->attr)) { insn_get_immediate()
524 if (!__get_moffset(insn)) insn_get_immediate()
529 if (!inat_has_immediate(insn->attr)) insn_get_immediate()
533 switch (inat_immediate_size(insn->attr)) { insn_get_immediate()
535 insn->immediate.value = get_next(char, insn); insn_get_immediate()
536 insn->immediate.nbytes = 1; insn_get_immediate()
539 insn->immediate.value = get_next(short, insn); insn_get_immediate()
540 insn->immediate.nbytes = 2; insn_get_immediate()
543 insn->immediate.value = get_next(int, insn); insn_get_immediate()
544 insn->immediate.nbytes = 4; insn_get_immediate()
547 insn->immediate1.value = get_next(int, insn); insn_get_immediate()
548 insn->immediate1.nbytes = 4; insn_get_immediate()
549 insn->immediate2.value = get_next(int, insn); insn_get_immediate()
550 insn->immediate2.nbytes = 4; insn_get_immediate()
553 if (!__get_immptr(insn)) insn_get_immediate()
557 if (!__get_immv32(insn)) insn_get_immediate()
561 if (!__get_immv(insn)) insn_get_immediate()
565 /* Here, insn must have an immediate, but failed */ insn_get_immediate()
568 if (inat_has_second_immediate(insn->attr)) { insn_get_immediate()
569 insn->immediate2.value = get_next(char, insn); insn_get_immediate()
570 insn->immediate2.nbytes = 1; insn_get_immediate()
573 insn->immediate.got = 1; insn_get_immediate()
581 * @insn: &struct insn containing instruction
586 void insn_get_length(struct insn *insn) insn_get_length() argument
588 if (insn->length) insn_get_length()
590 if (!insn->immediate.got) insn_get_length()
591 insn_get_immediate(insn); insn_get_length()
592 insn->length = (unsigned char)((unsigned long)insn->next_byte insn_get_length()
593 - (unsigned long)insn->kaddr); insn_get_length()
H A Dinsn.h36 struct insn { struct
67 const insn_byte_t *kaddr; /* kernel address of insn to analyze */
68 const insn_byte_t *end_kaddr; /* kernel address of last insn in buffer */
100 extern void insn_init(struct insn *insn, const void *kaddr, int buf_len, int x86_64);
101 extern void insn_get_prefixes(struct insn *insn);
102 extern void insn_get_opcode(struct insn *insn);
103 extern void insn_get_modrm(struct insn *insn);
104 extern void insn_get_sib(struct insn *insn);
105 extern void insn_get_displacement(struct insn *insn);
106 extern void insn_get_immediate(struct insn *insn);
107 extern void insn_get_length(struct insn *insn);
110 static inline void insn_get_attribute(struct insn *insn) insn_get_attribute() argument
112 insn_get_modrm(insn); insn_get_attribute()
116 extern int insn_rip_relative(struct insn *insn);
118 /* Init insn for kernel text */ kernel_insn_init()
119 static inline void kernel_insn_init(struct insn *insn, kernel_insn_init() argument
123 insn_init(insn, kaddr, buf_len, 1); kernel_insn_init()
125 insn_init(insn, kaddr, buf_len, 0); kernel_insn_init()
129 static inline int insn_is_avx(struct insn *insn) insn_is_avx() argument
131 if (!insn->prefixes.got) insn_is_avx()
132 insn_get_prefixes(insn); insn_is_avx()
133 return (insn->vex_prefix.value != 0); insn_is_avx()
137 static inline int insn_complete(struct insn *insn) insn_complete() argument
139 return insn->opcode.got && insn->modrm.got && insn->sib.got && insn_complete()
140 insn->displacement.got && insn->immediate.got; insn_complete()
143 static inline insn_byte_t insn_vex_m_bits(struct insn *insn) insn_vex_m_bits() argument
145 if (insn->vex_prefix.nbytes == 2) /* 2 bytes VEX */ insn_vex_m_bits()
148 return X86_VEX3_M(insn->vex_prefix.bytes[1]); insn_vex_m_bits()
151 static inline insn_byte_t insn_vex_p_bits(struct insn *insn) insn_vex_p_bits() argument
153 if (insn->vex_prefix.nbytes == 2) /* 2 bytes VEX */ insn_vex_p_bits()
154 return X86_VEX_P(insn->vex_prefix.bytes[1]); insn_vex_p_bits()
156 return X86_VEX_P(insn->vex_prefix.bytes[2]); insn_vex_p_bits()
160 static inline int insn_last_prefix_id(struct insn *insn) insn_last_prefix_id() argument
162 if (insn_is_avx(insn)) insn_last_prefix_id()
163 return insn_vex_p_bits(insn); /* VEX_p is a SIMD prefix id */ insn_last_prefix_id()
165 if (insn->prefixes.bytes[3]) insn_last_prefix_id()
166 return inat_get_last_prefix_id(insn->prefixes.bytes[3]); insn_last_prefix_id()
172 static inline int insn_offset_rex_prefix(struct insn *insn) insn_offset_rex_prefix() argument
174 return insn->prefixes.nbytes; insn_offset_rex_prefix()
176 static inline int insn_offset_vex_prefix(struct insn *insn) insn_offset_vex_prefix() argument
178 return insn_offset_rex_prefix(insn) + insn->rex_prefix.nbytes; insn_offset_vex_prefix()
180 static inline int insn_offset_opcode(struct insn *insn) insn_offset_opcode() argument
182 return insn_offset_vex_prefix(insn) + insn->vex_prefix.nbytes; insn_offset_opcode()
184 static inline int insn_offset_modrm(struct insn *insn) insn_offset_modrm() argument
186 return insn_offset_opcode(insn) + insn->opcode.nbytes; insn_offset_modrm()
188 static inline int insn_offset_sib(struct insn *insn) insn_offset_sib() argument
190 return insn_offset_modrm(insn) + insn->modrm.nbytes; insn_offset_sib()
192 static inline int insn_offset_displacement(struct insn *insn) insn_offset_displacement() argument
194 return insn_offset_sib(insn) + insn->sib.nbytes; insn_offset_displacement()
196 static inline int insn_offset_immediate(struct insn *insn) insn_offset_immediate() argument
198 return insn_offset_displacement(insn) + insn->displacement.nbytes; insn_offset_immediate()
H A Dintel-pt-insn-decoder.c23 #include "insn.h"
26 #include "insn.c"
28 #include "intel-pt-insn-decoder.h"
31 static void intel_pt_insn_decoder(struct insn *insn, intel_pt_insn_decoder() argument
38 if (insn_is_avx(insn)) { intel_pt_insn_decoder()
41 intel_pt_insn->length = insn->length; intel_pt_insn_decoder()
45 switch (insn->opcode.bytes[0]) { intel_pt_insn_decoder()
47 switch (insn->opcode.bytes[1]) { intel_pt_insn_decoder()
111 ext = (insn->modrm.bytes[0] >> 3) & 0x7; intel_pt_insn_decoder()
133 intel_pt_insn->length = insn->length; intel_pt_insn_decoder()
138 switch (insn->immediate.nbytes) { intel_pt_insn_decoder()
140 intel_pt_insn->rel = insn->immediate.value; intel_pt_insn_decoder()
144 bswap_16((short)insn->immediate.value); intel_pt_insn_decoder()
147 intel_pt_insn->rel = bswap_32(insn->immediate.value); intel_pt_insn_decoder()
154 intel_pt_insn->rel = insn->immediate.value; intel_pt_insn_decoder()
162 struct insn insn; intel_pt_get_insn() local
164 insn_init(&insn, buf, len, x86_64); intel_pt_get_insn()
165 insn_get_length(&insn); intel_pt_get_insn()
166 if (!insn_complete(&insn) || insn.length > len) intel_pt_get_insn()
168 intel_pt_insn_decoder(&insn, intel_pt_insn); intel_pt_get_insn()
169 if (insn.length < INTEL_PT_INSN_DBG_BUF_SZ) intel_pt_get_insn()
170 memcpy(intel_pt_insn->buf, buf, insn.length); intel_pt_get_insn()
/linux-4.4.14/arch/powerpc/xmon/
H A Dspu.h91 #define SIGNED_EXTRACT(insn,size,pos) (((int)((insn) << (32-size-pos))) >> (32-size))
92 #define UNSIGNED_EXTRACT(insn,size,pos) (((insn) >> pos) & ((1 << size)-1))
94 #define DECODE_INSN_RT(insn) (insn & 0x7f)
95 #define DECODE_INSN_RA(insn) ((insn >> 7) & 0x7f)
96 #define DECODE_INSN_RB(insn) ((insn >> 14) & 0x7f)
97 #define DECODE_INSN_RC(insn) ((insn >> 21) & 0x7f)
99 #define DECODE_INSN_I10(insn) SIGNED_EXTRACT(insn,10,14)
100 #define DECODE_INSN_U10(insn) UNSIGNED_EXTRACT(insn,10,14)
103 #define DECODE_INSN_I16(insn) SIGNED_EXTRACT(insn,16,7)
104 #define DECODE_INSN_U16(insn) UNSIGNED_EXTRACT(insn,16,7)
107 #define DECODE_INSN_U14(insn) UNSIGNED_EXTRACT(insn,14,0)
110 #define DECODE_INSN_I18(insn) SIGNED_EXTRACT(insn,18,7)
111 #define DECODE_INSN_U18(insn) UNSIGNED_EXTRACT(insn,18,7)
114 #define DECODE_INSN_I7(insn) SIGNED_EXTRACT(insn,7,14)
115 #define DECODE_INSN_U7(insn) UNSIGNED_EXTRACT(insn,7,14)
118 #define DECODE_INSN_I8(insn) SIGNED_EXTRACT(insn,8,14)
119 #define DECODE_INSN_U8(insn) UNSIGNED_EXTRACT(insn,8,14)
122 #define DECODE_INSN_I9a(insn) ((SIGNED_EXTRACT(insn,2,23) << 7) | UNSIGNED_EXTRACT(insn,7,0))
123 #define DECODE_INSN_I9b(insn) ((SIGNED_EXTRACT(insn,2,14) << 7) | UNSIGNED_EXTRACT(insn,7,0))
124 #define DECODE_INSN_U9a(insn) ((UNSIGNED_EXTRACT(insn,2,23) << 7) | UNSIGNED_EXTRACT(insn,7,0))
125 #define DECODE_INSN_U9b(insn) ((UNSIGNED_EXTRACT(insn,2,14) << 7) | UNSIGNED_EXTRACT(insn,7,0))
H A Ddis-asm.h15 extern int print_insn_powerpc(unsigned long insn, unsigned long memaddr);
16 extern int print_insn_spu(unsigned long insn, unsigned long memaddr);
18 static inline int print_insn_powerpc(unsigned long insn, unsigned long memaddr) print_insn_powerpc() argument
20 printf("%.8x", insn); print_insn_powerpc()
24 static inline int print_insn_spu(unsigned long insn, unsigned long memaddr) print_insn_spu() argument
26 printf("%.8x", insn); print_insn_spu()
H A Dspu-dis.c55 get_index_for_opcode (unsigned int insn) get_index_for_opcode() argument
58 unsigned int opcode = insn >> (32-11); get_index_for_opcode()
94 print_insn_spu (unsigned long insn, unsigned long memaddr) print_insn_spu() argument
101 index = get_index_for_opcode (insn); print_insn_spu()
105 printf(".long 0x%x", insn); print_insn_spu()
117 int fb = (insn >> (32-18)) & 0x7f; print_insn_spu()
138 DECODE_INSN_RT (insn)); print_insn_spu()
142 DECODE_INSN_RA (insn)); print_insn_spu()
146 DECODE_INSN_RB (insn)); print_insn_spu()
150 DECODE_INSN_RC (insn)); print_insn_spu()
154 DECODE_INSN_RA (insn)); print_insn_spu()
158 DECODE_INSN_RA (insn)); print_insn_spu()
166 173 - DECODE_INSN_U8 (insn)); print_insn_spu()
170 155 - DECODE_INSN_U8 (insn)); print_insn_spu()
180 hex_value = DECODE_INSN_I7 (insn); print_insn_spu()
184 print_address(memaddr + DECODE_INSN_I9a (insn) * 4); print_insn_spu()
187 print_address(memaddr + DECODE_INSN_I9b (insn) * 4); print_insn_spu()
191 hex_value = DECODE_INSN_I10 (insn); print_insn_spu()
195 hex_value = DECODE_INSN_I10 (insn) * 16; print_insn_spu()
199 hex_value = DECODE_INSN_I16 (insn); print_insn_spu()
203 hex_value = DECODE_INSN_U16 (insn); print_insn_spu()
207 value = DECODE_INSN_I16 (insn) * 4; print_insn_spu()
217 value = DECODE_INSN_U16 (insn) * 4; print_insn_spu()
224 value = DECODE_INSN_U18 (insn); print_insn_spu()
234 hex_value = DECODE_INSN_U14 (insn); print_insn_spu()
H A Dppc-dis.c31 print_insn_powerpc (unsigned long insn, unsigned long memaddr) print_insn_powerpc() argument
51 op = PPC_OP (insn); print_insn_powerpc()
72 if ((insn & opcode->mask) != opcode->opcode print_insn_powerpc()
84 (*operand->extract) (insn, dialect, &invalid); print_insn_powerpc()
111 value = (*operand->extract) (insn, dialect, &invalid); print_insn_powerpc()
114 value = (insn >> operand->shift) & ((1 << operand->bits) - 1); print_insn_powerpc()
192 printf(".long 0x%lx", insn); print_insn_powerpc()
/linux-4.4.14/arch/arm/include/asm/
H A Dpatch.h4 void patch_text(void *addr, unsigned int insn);
5 void __patch_text_real(void *addr, unsigned int insn, bool remap);
7 static inline void __patch_text(void *addr, unsigned int insn) __patch_text() argument
9 __patch_text_real(addr, insn, true); __patch_text()
12 static inline void __patch_text_early(void *addr, unsigned int insn) __patch_text_early() argument
14 __patch_text_real(addr, insn, false); __patch_text_early()
H A Dfutex.h24 #define __futex_atomic_op(insn, ret, oldval, tmp, uaddr, oparg) \
32 " " insn "\n" \
83 #define __futex_atomic_op(insn, ret, oldval, tmp, uaddr, oparg) \
88 " " insn "\n" \
H A Duprobes.h31 u8 insn[MAX_UINSN_BYTES]; member in struct:arch_uprobe
/linux-4.4.14/arch/arm64/kernel/
H A Dinsn.c33 #include <asm/insn.h>
57 enum aarch64_insn_encoding_class __kprobes aarch64_get_insn_class(u32 insn) aarch64_get_insn_class() argument
59 return aarch64_insn_encoding_class[(insn >> 25) & 0xf]; aarch64_get_insn_class()
63 bool __kprobes aarch64_insn_is_nop(u32 insn) aarch64_insn_is_nop() argument
65 if (!aarch64_insn_is_hint(insn)) aarch64_insn_is_nop()
68 switch (insn & 0xFE0) { aarch64_insn_is_nop()
80 bool aarch64_insn_is_branch_imm(u32 insn) aarch64_insn_is_branch_imm() argument
82 return (aarch64_insn_is_b(insn) || aarch64_insn_is_bl(insn) || aarch64_insn_is_branch_imm()
83 aarch64_insn_is_tbz(insn) || aarch64_insn_is_tbnz(insn) || aarch64_insn_is_branch_imm()
84 aarch64_insn_is_cbz(insn) || aarch64_insn_is_cbnz(insn) || aarch64_insn_is_branch_imm()
85 aarch64_insn_is_bcond(insn)); aarch64_insn_is_branch_imm()
128 static int __kprobes __aarch64_insn_write(void *addr, u32 insn) __aarch64_insn_write() argument
137 ret = probe_kernel_write(waddr, &insn, AARCH64_INSN_SIZE); __aarch64_insn_write()
145 int __kprobes aarch64_insn_write(void *addr, u32 insn) aarch64_insn_write() argument
147 insn = cpu_to_le32(insn); aarch64_insn_write()
148 return __aarch64_insn_write(addr, insn); aarch64_insn_write()
151 static bool __kprobes __aarch64_insn_hotpatch_safe(u32 insn) __aarch64_insn_hotpatch_safe() argument
153 if (aarch64_get_insn_class(insn) != AARCH64_INSN_CLS_BR_SYS) __aarch64_insn_hotpatch_safe()
156 return aarch64_insn_is_b(insn) || __aarch64_insn_hotpatch_safe()
157 aarch64_insn_is_bl(insn) || __aarch64_insn_hotpatch_safe()
158 aarch64_insn_is_svc(insn) || __aarch64_insn_hotpatch_safe()
159 aarch64_insn_is_hvc(insn) || __aarch64_insn_hotpatch_safe()
160 aarch64_insn_is_smc(insn) || __aarch64_insn_hotpatch_safe()
161 aarch64_insn_is_brk(insn) || __aarch64_insn_hotpatch_safe()
162 aarch64_insn_is_nop(insn); __aarch64_insn_hotpatch_safe()
181 int __kprobes aarch64_insn_patch_text_nosync(void *addr, u32 insn) aarch64_insn_patch_text_nosync() argument
190 ret = aarch64_insn_write(tp, insn); aarch64_insn_patch_text_nosync()
250 u32 insn; aarch64_insn_patch_text() local
254 ret = aarch64_insn_read(addrs[0], &insn); aarch64_insn_patch_text()
258 if (aarch64_insn_hotpatch_safe(insn, insns[0])) { aarch64_insn_patch_text()
336 u64 aarch64_insn_decode_immediate(enum aarch64_insn_imm_type type, u32 insn) aarch64_insn_decode_immediate() argument
344 immlo = (insn >> ADR_IMM_LOSHIFT) & ADR_IMM_LOMASK; aarch64_insn_decode_immediate()
345 immhi = (insn >> ADR_IMM_HISHIFT) & ADR_IMM_HIMASK; aarch64_insn_decode_immediate()
346 insn = (immhi << ADR_IMM_HILOSPLIT) | immlo; aarch64_insn_decode_immediate()
357 return (insn >> shift) & mask; aarch64_insn_decode_immediate()
361 u32 insn, u64 imm) aarch64_insn_encode_immediate()
385 insn &= ~(mask << shift); aarch64_insn_encode_immediate()
386 insn |= (imm & mask) << shift; aarch64_insn_encode_immediate()
388 return insn; aarch64_insn_encode_immediate()
392 u32 insn, aarch64_insn_encode_register()
423 insn &= ~(GENMASK(4, 0) << shift); aarch64_insn_encode_register()
424 insn |= reg << shift; aarch64_insn_encode_register()
426 return insn; aarch64_insn_encode_register()
430 u32 insn) aarch64_insn_encode_ldst_size()
452 insn &= ~GENMASK(31, 30); aarch64_insn_encode_ldst_size()
453 insn |= size << 30; aarch64_insn_encode_ldst_size()
455 return insn; aarch64_insn_encode_ldst_size()
478 u32 insn; aarch64_insn_gen_branch_imm() local
490 insn = aarch64_insn_get_bl_value(); aarch64_insn_gen_branch_imm()
493 insn = aarch64_insn_get_b_value(); aarch64_insn_gen_branch_imm()
500 return aarch64_insn_encode_immediate(AARCH64_INSN_IMM_26, insn, aarch64_insn_gen_branch_imm()
509 u32 insn; aarch64_insn_gen_comp_branch_imm() local
516 insn = aarch64_insn_get_cbz_value(); aarch64_insn_gen_comp_branch_imm()
519 insn = aarch64_insn_get_cbnz_value(); aarch64_insn_gen_comp_branch_imm()
530 insn |= AARCH64_INSN_SF_BIT; aarch64_insn_gen_comp_branch_imm()
537 insn = aarch64_insn_encode_register(AARCH64_INSN_REGTYPE_RT, insn, reg); aarch64_insn_gen_comp_branch_imm()
539 return aarch64_insn_encode_immediate(AARCH64_INSN_IMM_19, insn, aarch64_insn_gen_comp_branch_imm()
546 u32 insn; aarch64_insn_gen_cond_branch_imm() local
551 insn = aarch64_insn_get_bcond_value(); aarch64_insn_gen_cond_branch_imm()
554 insn |= cond; aarch64_insn_gen_cond_branch_imm()
556 return aarch64_insn_encode_immediate(AARCH64_INSN_IMM_19, insn, aarch64_insn_gen_cond_branch_imm()
573 u32 insn; aarch64_insn_gen_branch_reg() local
577 insn = aarch64_insn_get_br_value(); aarch64_insn_gen_branch_reg()
580 insn = aarch64_insn_get_blr_value(); aarch64_insn_gen_branch_reg()
583 insn = aarch64_insn_get_ret_value(); aarch64_insn_gen_branch_reg()
590 return aarch64_insn_encode_register(AARCH64_INSN_REGTYPE_RN, insn, reg); aarch64_insn_gen_branch_reg()
599 u32 insn; aarch64_insn_gen_load_store_reg() local
603 insn = aarch64_insn_get_ldr_reg_value(); aarch64_insn_gen_load_store_reg()
606 insn = aarch64_insn_get_str_reg_value(); aarch64_insn_gen_load_store_reg()
613 insn = aarch64_insn_encode_ldst_size(size, insn); aarch64_insn_gen_load_store_reg()
615 insn = aarch64_insn_encode_register(AARCH64_INSN_REGTYPE_RT, insn, reg); aarch64_insn_gen_load_store_reg()
617 insn = aarch64_insn_encode_register(AARCH64_INSN_REGTYPE_RN, insn, aarch64_insn_gen_load_store_reg()
620 return aarch64_insn_encode_register(AARCH64_INSN_REGTYPE_RM, insn, aarch64_insn_gen_load_store_reg()
631 u32 insn; aarch64_insn_gen_load_store_pair() local
636 insn = aarch64_insn_get_ldp_pre_value(); aarch64_insn_gen_load_store_pair()
639 insn = aarch64_insn_get_stp_pre_value(); aarch64_insn_gen_load_store_pair()
642 insn = aarch64_insn_get_ldp_post_value(); aarch64_insn_gen_load_store_pair()
645 insn = aarch64_insn_get_stp_post_value(); aarch64_insn_gen_load_store_pair()
664 insn |= AARCH64_INSN_SF_BIT; aarch64_insn_gen_load_store_pair()
671 insn = aarch64_insn_encode_register(AARCH64_INSN_REGTYPE_RT, insn, aarch64_insn_gen_load_store_pair()
674 insn = aarch64_insn_encode_register(AARCH64_INSN_REGTYPE_RT2, insn, aarch64_insn_gen_load_store_pair()
677 insn = aarch64_insn_encode_register(AARCH64_INSN_REGTYPE_RN, insn, aarch64_insn_gen_load_store_pair()
680 return aarch64_insn_encode_immediate(AARCH64_INSN_IMM_7, insn, aarch64_insn_gen_load_store_pair()
689 u32 insn; aarch64_insn_gen_add_sub_imm() local
693 insn = aarch64_insn_get_add_imm_value(); aarch64_insn_gen_add_sub_imm()
696 insn = aarch64_insn_get_sub_imm_value(); aarch64_insn_gen_add_sub_imm()
699 insn = aarch64_insn_get_adds_imm_value(); aarch64_insn_gen_add_sub_imm()
702 insn = aarch64_insn_get_subs_imm_value(); aarch64_insn_gen_add_sub_imm()
713 insn |= AARCH64_INSN_SF_BIT; aarch64_insn_gen_add_sub_imm()
722 insn = aarch64_insn_encode_register(AARCH64_INSN_REGTYPE_RD, insn, dst); aarch64_insn_gen_add_sub_imm()
724 insn = aarch64_insn_encode_register(AARCH64_INSN_REGTYPE_RN, insn, src); aarch64_insn_gen_add_sub_imm()
726 return aarch64_insn_encode_immediate(AARCH64_INSN_IMM_12, insn, imm); aarch64_insn_gen_add_sub_imm()
735 u32 insn; aarch64_insn_gen_bitfield() local
740 insn = aarch64_insn_get_bfm_value(); aarch64_insn_gen_bitfield()
743 insn = aarch64_insn_get_ubfm_value(); aarch64_insn_gen_bitfield()
746 insn = aarch64_insn_get_sbfm_value(); aarch64_insn_gen_bitfield()
758 insn |= AARCH64_INSN_SF_BIT | AARCH64_INSN_N_BIT; aarch64_insn_gen_bitfield()
769 insn = aarch64_insn_encode_register(AARCH64_INSN_REGTYPE_RD, insn, dst); aarch64_insn_gen_bitfield()
771 insn = aarch64_insn_encode_register(AARCH64_INSN_REGTYPE_RN, insn, src); aarch64_insn_gen_bitfield()
773 insn = aarch64_insn_encode_immediate(AARCH64_INSN_IMM_R, insn, immr); aarch64_insn_gen_bitfield()
775 return aarch64_insn_encode_immediate(AARCH64_INSN_IMM_S, insn, imms); aarch64_insn_gen_bitfield()
783 u32 insn; aarch64_insn_gen_movewide() local
787 insn = aarch64_insn_get_movz_value(); aarch64_insn_gen_movewide()
790 insn = aarch64_insn_get_movk_value(); aarch64_insn_gen_movewide()
793 insn = aarch64_insn_get_movn_value(); aarch64_insn_gen_movewide()
807 insn |= AARCH64_INSN_SF_BIT; aarch64_insn_gen_movewide()
816 insn |= (shift >> 4) << 21; aarch64_insn_gen_movewide()
818 insn = aarch64_insn_encode_register(AARCH64_INSN_REGTYPE_RD, insn, dst); aarch64_insn_gen_movewide()
820 return aarch64_insn_encode_immediate(AARCH64_INSN_IMM_16, insn, imm); aarch64_insn_gen_movewide()
830 u32 insn; aarch64_insn_gen_add_sub_shifted_reg() local
834 insn = aarch64_insn_get_add_value(); aarch64_insn_gen_add_sub_shifted_reg()
837 insn = aarch64_insn_get_sub_value(); aarch64_insn_gen_add_sub_shifted_reg()
840 insn = aarch64_insn_get_adds_value(); aarch64_insn_gen_add_sub_shifted_reg()
843 insn = aarch64_insn_get_subs_value(); aarch64_insn_gen_add_sub_shifted_reg()
855 insn |= AARCH64_INSN_SF_BIT; aarch64_insn_gen_add_sub_shifted_reg()
864 insn = aarch64_insn_encode_register(AARCH64_INSN_REGTYPE_RD, insn, dst); aarch64_insn_gen_add_sub_shifted_reg()
866 insn = aarch64_insn_encode_register(AARCH64_INSN_REGTYPE_RN, insn, src); aarch64_insn_gen_add_sub_shifted_reg()
868 insn = aarch64_insn_encode_register(AARCH64_INSN_REGTYPE_RM, insn, reg); aarch64_insn_gen_add_sub_shifted_reg()
870 return aarch64_insn_encode_immediate(AARCH64_INSN_IMM_6, insn, shift); aarch64_insn_gen_add_sub_shifted_reg()
878 u32 insn; aarch64_insn_gen_data1() local
882 insn = aarch64_insn_get_rev16_value(); aarch64_insn_gen_data1()
885 insn = aarch64_insn_get_rev32_value(); aarch64_insn_gen_data1()
889 insn = aarch64_insn_get_rev64_value(); aarch64_insn_gen_data1()
900 insn |= AARCH64_INSN_SF_BIT; aarch64_insn_gen_data1()
907 insn = aarch64_insn_encode_register(AARCH64_INSN_REGTYPE_RD, insn, dst); aarch64_insn_gen_data1()
909 return aarch64_insn_encode_register(AARCH64_INSN_REGTYPE_RN, insn, src); aarch64_insn_gen_data1()
918 u32 insn; aarch64_insn_gen_data2() local
922 insn = aarch64_insn_get_udiv_value(); aarch64_insn_gen_data2()
925 insn = aarch64_insn_get_sdiv_value(); aarch64_insn_gen_data2()
928 insn = aarch64_insn_get_lslv_value(); aarch64_insn_gen_data2()
931 insn = aarch64_insn_get_lsrv_value(); aarch64_insn_gen_data2()
934 insn = aarch64_insn_get_asrv_value(); aarch64_insn_gen_data2()
937 insn = aarch64_insn_get_rorv_value(); aarch64_insn_gen_data2()
948 insn |= AARCH64_INSN_SF_BIT; aarch64_insn_gen_data2()
955 insn = aarch64_insn_encode_register(AARCH64_INSN_REGTYPE_RD, insn, dst); aarch64_insn_gen_data2()
957 insn = aarch64_insn_encode_register(AARCH64_INSN_REGTYPE_RN, insn, src); aarch64_insn_gen_data2()
959 return aarch64_insn_encode_register(AARCH64_INSN_REGTYPE_RM, insn, reg); aarch64_insn_gen_data2()
969 u32 insn; aarch64_insn_gen_data3() local
973 insn = aarch64_insn_get_madd_value(); aarch64_insn_gen_data3()
976 insn = aarch64_insn_get_msub_value(); aarch64_insn_gen_data3()
987 insn |= AARCH64_INSN_SF_BIT; aarch64_insn_gen_data3()
994 insn = aarch64_insn_encode_register(AARCH64_INSN_REGTYPE_RD, insn, dst); aarch64_insn_gen_data3()
996 insn = aarch64_insn_encode_register(AARCH64_INSN_REGTYPE_RA, insn, src); aarch64_insn_gen_data3()
998 insn = aarch64_insn_encode_register(AARCH64_INSN_REGTYPE_RN, insn, aarch64_insn_gen_data3()
1001 return aarch64_insn_encode_register(AARCH64_INSN_REGTYPE_RM, insn, aarch64_insn_gen_data3()
1012 u32 insn; aarch64_insn_gen_logical_shifted_reg() local
1016 insn = aarch64_insn_get_and_value(); aarch64_insn_gen_logical_shifted_reg()
1019 insn = aarch64_insn_get_bic_value(); aarch64_insn_gen_logical_shifted_reg()
1022 insn = aarch64_insn_get_orr_value(); aarch64_insn_gen_logical_shifted_reg()
1025 insn = aarch64_insn_get_orn_value(); aarch64_insn_gen_logical_shifted_reg()
1028 insn = aarch64_insn_get_eor_value(); aarch64_insn_gen_logical_shifted_reg()
1031 insn = aarch64_insn_get_eon_value(); aarch64_insn_gen_logical_shifted_reg()
1034 insn = aarch64_insn_get_ands_value(); aarch64_insn_gen_logical_shifted_reg()
1037 insn = aarch64_insn_get_bics_value(); aarch64_insn_gen_logical_shifted_reg()
1049 insn |= AARCH64_INSN_SF_BIT; aarch64_insn_gen_logical_shifted_reg()
1058 insn = aarch64_insn_encode_register(AARCH64_INSN_REGTYPE_RD, insn, dst); aarch64_insn_gen_logical_shifted_reg()
1060 insn = aarch64_insn_encode_register(AARCH64_INSN_REGTYPE_RN, insn, src); aarch64_insn_gen_logical_shifted_reg()
1062 insn = aarch64_insn_encode_register(AARCH64_INSN_REGTYPE_RM, insn, reg); aarch64_insn_gen_logical_shifted_reg()
1064 return aarch64_insn_encode_immediate(AARCH64_INSN_IMM_6, insn, shift); aarch64_insn_gen_logical_shifted_reg()
1072 s32 aarch64_get_branch_offset(u32 insn) aarch64_get_branch_offset() argument
1076 if (aarch64_insn_is_b(insn) || aarch64_insn_is_bl(insn)) { aarch64_get_branch_offset()
1077 imm = aarch64_insn_decode_immediate(AARCH64_INSN_IMM_26, insn); aarch64_get_branch_offset()
1081 if (aarch64_insn_is_cbz(insn) || aarch64_insn_is_cbnz(insn) || aarch64_get_branch_offset()
1082 aarch64_insn_is_bcond(insn)) { aarch64_get_branch_offset()
1083 imm = aarch64_insn_decode_immediate(AARCH64_INSN_IMM_19, insn); aarch64_get_branch_offset()
1087 if (aarch64_insn_is_tbz(insn) || aarch64_insn_is_tbnz(insn)) { aarch64_get_branch_offset()
1088 imm = aarch64_insn_decode_immediate(AARCH64_INSN_IMM_14, insn); aarch64_get_branch_offset()
1100 u32 aarch64_set_branch_offset(u32 insn, s32 offset) aarch64_set_branch_offset() argument
1102 if (aarch64_insn_is_b(insn) || aarch64_insn_is_bl(insn)) aarch64_set_branch_offset()
1103 return aarch64_insn_encode_immediate(AARCH64_INSN_IMM_26, insn, aarch64_set_branch_offset()
1106 if (aarch64_insn_is_cbz(insn) || aarch64_insn_is_cbnz(insn) || aarch64_set_branch_offset()
1107 aarch64_insn_is_bcond(insn)) aarch64_set_branch_offset()
1108 return aarch64_insn_encode_immediate(AARCH64_INSN_IMM_19, insn, aarch64_set_branch_offset()
1111 if (aarch64_insn_is_tbz(insn) || aarch64_insn_is_tbnz(insn)) aarch64_set_branch_offset()
1112 return aarch64_insn_encode_immediate(AARCH64_INSN_IMM_14, insn, aarch64_set_branch_offset()
1119 bool aarch32_insn_is_wide(u32 insn) aarch32_insn_is_wide() argument
1121 return insn >= 0xe800; aarch32_insn_is_wide()
1127 u32 aarch32_insn_extract_reg_num(u32 insn, int offset) aarch32_insn_extract_reg_num() argument
1129 return (insn & (0xf << offset)) >> offset; aarch32_insn_extract_reg_num()
1134 u32 aarch32_insn_mcr_extract_opc2(u32 insn) aarch32_insn_mcr_extract_opc2() argument
1136 return (insn & (OPC2_MASK << OPC2_OFFSET)) >> OPC2_OFFSET; aarch32_insn_mcr_extract_opc2()
1140 u32 aarch32_insn_mcr_extract_crm(u32 insn) aarch32_insn_mcr_extract_crm() argument
1142 return insn & CRM_MASK; aarch32_insn_mcr_extract_crm()
360 aarch64_insn_encode_immediate(enum aarch64_insn_imm_type type, u32 insn, u64 imm) aarch64_insn_encode_immediate() argument
391 aarch64_insn_encode_register(enum aarch64_insn_register_type type, u32 insn, enum aarch64_insn_register reg) aarch64_insn_encode_register() argument
429 aarch64_insn_encode_ldst_size(enum aarch64_insn_size_type type, u32 insn) aarch64_insn_encode_ldst_size() argument
H A Darmv8_deprecated.c19 #include <asm/insn.h>
94 struct insn_emulation *insn = (struct insn_emulation *)data; enable_insn_hw_mode() local
95 if (insn->ops->set_hw_mode) enable_insn_hw_mode()
96 insn->ops->set_hw_mode(true); enable_insn_hw_mode()
101 struct insn_emulation *insn = (struct insn_emulation *)data; disable_insn_hw_mode() local
102 if (insn->ops->set_hw_mode) disable_insn_hw_mode()
103 insn->ops->set_hw_mode(false); disable_insn_hw_mode()
107 static int run_all_cpu_set_hw_mode(struct insn_emulation *insn, bool enable) run_all_cpu_set_hw_mode() argument
109 if (!insn->ops->set_hw_mode) run_all_cpu_set_hw_mode()
112 on_each_cpu(enable_insn_hw_mode, (void *)insn, true); run_all_cpu_set_hw_mode()
114 on_each_cpu(disable_insn_hw_mode, (void *)insn, true); run_all_cpu_set_hw_mode()
128 struct insn_emulation *insn; run_all_insn_set_hw_mode() local
131 list_for_each_entry(insn, &insn_emulation, node) { run_all_insn_set_hw_mode()
132 bool enable = (insn->current_mode == INSN_HW); run_all_insn_set_hw_mode()
133 if (insn->ops->set_hw_mode && insn->ops->set_hw_mode(enable)) { run_all_insn_set_hw_mode()
135 cpu, insn->ops->name); run_all_insn_set_hw_mode()
143 static int update_insn_emulation_mode(struct insn_emulation *insn, update_insn_emulation_mode() argument
152 remove_emulation_hooks(insn->ops); update_insn_emulation_mode()
155 if (!run_all_cpu_set_hw_mode(insn, false)) update_insn_emulation_mode()
156 pr_notice("Disabled %s support\n", insn->ops->name); update_insn_emulation_mode()
160 switch (insn->current_mode) { update_insn_emulation_mode()
164 register_emulation_hooks(insn->ops); update_insn_emulation_mode()
167 ret = run_all_cpu_set_hw_mode(insn, true); update_insn_emulation_mode()
169 pr_notice("Enabled %s support\n", insn->ops->name); update_insn_emulation_mode()
179 struct insn_emulation *insn; register_insn_emulation() local
181 insn = kzalloc(sizeof(*insn), GFP_KERNEL); register_insn_emulation()
182 insn->ops = ops; register_insn_emulation()
183 insn->min = INSN_UNDEF; register_insn_emulation()
187 insn->current_mode = INSN_EMULATE; register_insn_emulation()
189 run_all_cpu_set_hw_mode(insn, false); register_insn_emulation()
190 insn->max = INSN_HW; register_insn_emulation()
193 insn->current_mode = INSN_UNDEF; register_insn_emulation()
194 insn->max = INSN_EMULATE; register_insn_emulation()
199 list_add(&insn->node, &insn_emulation); register_insn_emulation()
204 update_insn_emulation_mode(insn, INSN_UNDEF); register_insn_emulation()
212 struct insn_emulation *insn = (struct insn_emulation *) table->data; emulation_proc_handler() local
213 enum insn_emulation_mode prev_mode = insn->current_mode; emulation_proc_handler()
215 table->data = &insn->current_mode; emulation_proc_handler()
218 if (ret || !write || prev_mode == insn->current_mode) emulation_proc_handler()
221 ret = update_insn_emulation_mode(insn, prev_mode); emulation_proc_handler()
224 insn->current_mode = prev_mode; emulation_proc_handler()
225 update_insn_emulation_mode(insn, INSN_UNDEF); emulation_proc_handler()
228 table->data = insn; emulation_proc_handler()
244 struct insn_emulation *insn; register_insn_emulation_sysctl() local
251 list_for_each_entry(insn, &insn_emulation, node) { register_insn_emulation_sysctl()
257 sysctl->procname = insn->ops->name; register_insn_emulation_sysctl()
258 sysctl->data = insn; register_insn_emulation_sysctl()
259 sysctl->extra1 = &insn->min; register_insn_emulation_sysctl()
260 sysctl->extra2 = &insn->max; register_insn_emulation_sysctl()
564 char *insn; compat_setend_handler() local
569 insn = "setend be"; compat_setend_handler()
572 insn = "setend le"; compat_setend_handler()
576 trace_instruction_emulation(insn, regs->pc); compat_setend_handler()
H A Dalternative.c27 #include <asm/insn.h>
64 u32 insn; get_alt_insn() local
66 insn = le32_to_cpu(*altinsnptr); get_alt_insn()
68 if (aarch64_insn_is_branch_imm(insn)) { get_alt_insn()
69 s32 offset = aarch64_get_branch_offset(insn); get_alt_insn()
81 insn = aarch64_set_branch_offset(insn, offset); get_alt_insn()
85 return insn; get_alt_insn()
95 u32 insn; __apply_alternatives() local
107 nr_inst = alt->alt_len / sizeof(insn); __apply_alternatives()
110 insn = get_alt_insn(alt, origptr + i, replptr + i); __apply_alternatives()
111 *(origptr + i) = cpu_to_le32(insn); __apply_alternatives()
H A Djump_label.c21 #include <asm/insn.h>
29 u32 insn; arch_jump_label_transform() local
32 insn = aarch64_insn_gen_branch_imm(entry->code, arch_jump_label_transform()
36 insn = aarch64_insn_gen_nop(); arch_jump_label_transform()
39 aarch64_insn_patch_text(&addr, &insn, 1); arch_jump_label_transform()
H A Dmodule.c30 #include <asm/insn.h>
118 u32 insn = le32_to_cpu(*(u32 *)place); reloc_insn_movw() local
130 insn &= ~(3 << 29); reloc_insn_movw()
133 insn |= 2 << 29; reloc_insn_movw()
147 insn = aarch64_insn_encode_immediate(imm_type, insn, imm); reloc_insn_movw()
148 *(u32 *)place = cpu_to_le32(insn); reloc_insn_movw()
176 u32 insn = le32_to_cpu(*(u32 *)place); reloc_insn_imm() local
187 insn = aarch64_insn_encode_immediate(imm_type, insn, imm); reloc_insn_imm()
188 *(u32 *)place = cpu_to_le32(insn); reloc_insn_imm()
/linux-4.4.14/arch/x86/include/asm/
H A Dinsn.h36 struct insn { struct
67 const insn_byte_t *kaddr; /* kernel address of insn to analyze */
68 const insn_byte_t *end_kaddr; /* kernel address of last insn in buffer */
100 extern void insn_init(struct insn *insn, const void *kaddr, int buf_len, int x86_64);
101 extern void insn_get_prefixes(struct insn *insn);
102 extern void insn_get_opcode(struct insn *insn);
103 extern void insn_get_modrm(struct insn *insn);
104 extern void insn_get_sib(struct insn *insn);
105 extern void insn_get_displacement(struct insn *insn);
106 extern void insn_get_immediate(struct insn *insn);
107 extern void insn_get_length(struct insn *insn);
110 static inline void insn_get_attribute(struct insn *insn) insn_get_attribute() argument
112 insn_get_modrm(insn); insn_get_attribute()
116 extern int insn_rip_relative(struct insn *insn);
118 /* Init insn for kernel text */ kernel_insn_init()
119 static inline void kernel_insn_init(struct insn *insn, kernel_insn_init() argument
123 insn_init(insn, kaddr, buf_len, 1); kernel_insn_init()
125 insn_init(insn, kaddr, buf_len, 0); kernel_insn_init()
129 static inline int insn_is_avx(struct insn *insn) insn_is_avx() argument
131 if (!insn->prefixes.got) insn_is_avx()
132 insn_get_prefixes(insn); insn_is_avx()
133 return (insn->vex_prefix.value != 0); insn_is_avx()
137 static inline int insn_complete(struct insn *insn) insn_complete() argument
139 return insn->opcode.got && insn->modrm.got && insn->sib.got && insn_complete()
140 insn->displacement.got && insn->immediate.got; insn_complete()
143 static inline insn_byte_t insn_vex_m_bits(struct insn *insn) insn_vex_m_bits() argument
145 if (insn->vex_prefix.nbytes == 2) /* 2 bytes VEX */ insn_vex_m_bits()
148 return X86_VEX3_M(insn->vex_prefix.bytes[1]); insn_vex_m_bits()
151 static inline insn_byte_t insn_vex_p_bits(struct insn *insn) insn_vex_p_bits() argument
153 if (insn->vex_prefix.nbytes == 2) /* 2 bytes VEX */ insn_vex_p_bits()
154 return X86_VEX_P(insn->vex_prefix.bytes[1]); insn_vex_p_bits()
156 return X86_VEX_P(insn->vex_prefix.bytes[2]); insn_vex_p_bits()
160 static inline int insn_last_prefix_id(struct insn *insn) insn_last_prefix_id() argument
162 if (insn_is_avx(insn)) insn_last_prefix_id()
163 return insn_vex_p_bits(insn); /* VEX_p is a SIMD prefix id */ insn_last_prefix_id()
165 if (insn->prefixes.bytes[3]) insn_last_prefix_id()
166 return inat_get_last_prefix_id(insn->prefixes.bytes[3]); insn_last_prefix_id()
172 static inline int insn_offset_rex_prefix(struct insn *insn) insn_offset_rex_prefix() argument
174 return insn->prefixes.nbytes; insn_offset_rex_prefix()
176 static inline int insn_offset_vex_prefix(struct insn *insn) insn_offset_vex_prefix() argument
178 return insn_offset_rex_prefix(insn) + insn->rex_prefix.nbytes; insn_offset_vex_prefix()
180 static inline int insn_offset_opcode(struct insn *insn) insn_offset_opcode() argument
182 return insn_offset_vex_prefix(insn) + insn->vex_prefix.nbytes; insn_offset_opcode()
184 static inline int insn_offset_modrm(struct insn *insn) insn_offset_modrm() argument
186 return insn_offset_opcode(insn) + insn->opcode.nbytes; insn_offset_modrm()
188 static inline int insn_offset_sib(struct insn *insn) insn_offset_sib() argument
190 return insn_offset_modrm(insn) + insn->modrm.nbytes; insn_offset_sib()
192 static inline int insn_offset_displacement(struct insn *insn) insn_offset_displacement() argument
194 return insn_offset_sib(insn) + insn->sib.nbytes; insn_offset_displacement()
196 static inline int insn_offset_immediate(struct insn *insn) insn_offset_immediate() argument
198 return insn_offset_displacement(insn) + insn->displacement.nbytes; insn_offset_immediate()
H A Dfutex.h14 #define __futex_atomic_op1(insn, ret, oldval, uaddr, oparg) \
16 "1:\t" insn "\n" \
26 #define __futex_atomic_op2(insn, ret, oldval, uaddr, oparg) \
30 "\t" insn "\n" \
H A Dkprobes.h27 #include <asm/insn.h>
69 kprobe_opcode_t *insn; member in struct:arch_specific_insn
74 * added a relative jump after the instruction copy in insn,
86 kprobe_opcode_t *insn; member in struct:arch_optimized_insn
/linux-4.4.14/arch/arm/kernel/
H A Djump_label.c4 #include <asm/insn.h>
13 unsigned int insn; __arch_jump_label_transform() local
16 insn = arm_gen_branch(entry->code, entry->target); __arch_jump_label_transform()
18 insn = arm_gen_nop(); __arch_jump_label_transform()
21 __patch_text_early(addr, insn); __arch_jump_label_transform()
23 patch_text(addr, insn); __arch_jump_label_transform()
H A Dpatch.c15 unsigned int insn; member in struct:patch
55 void __kprobes __patch_text_real(void *addr, unsigned int insn, bool remap) __patch_text_real() argument
69 if (thumb2 && __opcode_is_thumb16(insn)) { __patch_text_real()
70 *(u16 *)waddr = __opcode_to_mem_thumb16(insn); __patch_text_real()
73 u16 first = __opcode_thumb32_first(insn); __patch_text_real()
74 u16 second = __opcode_thumb32_second(insn); __patch_text_real()
93 insn = __opcode_to_mem_thumb32(insn); __patch_text_real()
95 insn = __opcode_to_mem_arm(insn); __patch_text_real()
97 *(u32 *)waddr = insn; __patch_text_real()
115 __patch_text(patch->addr, patch->insn); patch_text_stop_machine()
120 void __kprobes patch_text(void *addr, unsigned int insn) patch_text() argument
124 .insn = insn, patch_text()
H A Dunwind.c70 const unsigned long *insn; /* pointer to the current instructions word */ member in struct:unwind_ctrl_block
232 ret = (*ctrl->insn >> (ctrl->byte * 8)) & 0xff; unwind_get_byte()
235 ctrl->insn++; unwind_get_byte()
278 unsigned long insn) unwind_exec_pop_r4_to_rN()
284 for (reg = 4; reg <= 4 + (insn & 7); reg++) unwind_exec_pop_r4_to_rN()
288 if (insn & 0x8) unwind_exec_pop_r4_to_rN()
321 unsigned long insn = unwind_get_byte(ctrl); unwind_exec_insn() local
324 pr_debug("%s: insn = %08lx\n", __func__, insn); unwind_exec_insn()
326 if ((insn & 0xc0) == 0x00) unwind_exec_insn()
327 ctrl->vrs[SP] += ((insn & 0x3f) << 2) + 4; unwind_exec_insn()
328 else if ((insn & 0xc0) == 0x40) unwind_exec_insn()
329 ctrl->vrs[SP] -= ((insn & 0x3f) << 2) + 4; unwind_exec_insn()
330 else if ((insn & 0xf0) == 0x80) { unwind_exec_insn()
333 insn = (insn << 8) | unwind_get_byte(ctrl); unwind_exec_insn()
334 mask = insn & 0x0fff; unwind_exec_insn()
337 insn); unwind_exec_insn()
344 } else if ((insn & 0xf0) == 0x90 && unwind_exec_insn()
345 (insn & 0x0d) != 0x0d) unwind_exec_insn()
346 ctrl->vrs[SP] = ctrl->vrs[insn & 0x0f]; unwind_exec_insn()
347 else if ((insn & 0xf0) == 0xa0) { unwind_exec_insn()
348 ret = unwind_exec_pop_r4_to_rN(ctrl, insn); unwind_exec_insn()
351 } else if (insn == 0xb0) { unwind_exec_insn()
356 } else if (insn == 0xb1) { unwind_exec_insn()
361 (insn << 8) | mask); unwind_exec_insn()
368 } else if (insn == 0xb2) { unwind_exec_insn()
373 pr_warn("unwind: Unhandled instruction %02lx\n", insn); unwind_exec_insn()
415 if (idx->insn == 1) unwind_frame()
418 else if ((idx->insn & 0x80000000) == 0) unwind_frame()
420 ctrl.insn = (unsigned long *)prel31_to_addr(&idx->insn); unwind_frame()
421 else if ((idx->insn & 0xff000000) == 0x80000000) unwind_frame()
423 ctrl.insn = &idx->insn; unwind_frame()
426 idx->insn, idx); unwind_frame()
431 if ((*ctrl.insn & 0xff000000) == 0x80000000) { unwind_frame()
434 } else if ((*ctrl.insn & 0xff000000) == 0x81000000) { unwind_frame()
436 ctrl.entries = 1 + ((*ctrl.insn & 0x00ff0000) >> 16); unwind_frame()
439 *ctrl.insn, ctrl.insn); unwind_frame()
277 unwind_exec_pop_r4_to_rN(struct unwind_ctrl_block *ctrl, unsigned long insn) unwind_exec_pop_r4_to_rN() argument
H A DMakefile50 obj-$(CONFIG_DYNAMIC_FTRACE) += ftrace.o insn.o
51 obj-$(CONFIG_FUNCTION_GRAPH_TRACER) += ftrace.o insn.o
52 obj-$(CONFIG_JUMP_LABEL) += jump_label.o insn.o patch.o
55 obj-$(CONFIG_KPROBES) += patch.o insn.o
/linux-4.4.14/arch/s390/include/asm/
H A Dftrace.h41 static inline void ftrace_generate_nop_insn(struct ftrace_insn *insn) ftrace_generate_nop_insn() argument
46 insn->opc = 0xc004; ftrace_generate_nop_insn()
47 insn->disp = 0; ftrace_generate_nop_insn()
50 insn->opc = 0xc0f4; ftrace_generate_nop_insn()
51 insn->disp = MCOUNT_INSN_SIZE / 2; ftrace_generate_nop_insn()
56 static inline int is_ftrace_nop(struct ftrace_insn *insn) is_ftrace_nop() argument
60 if (insn->disp == 0) is_ftrace_nop()
63 if (insn->disp == MCOUNT_INSN_SIZE / 2) is_ftrace_nop()
70 static inline void ftrace_generate_call_insn(struct ftrace_insn *insn, ftrace_generate_call_insn() argument
78 insn->opc = 0xc005; ftrace_generate_call_insn()
79 insn->disp = (target - ip) / 2; ftrace_generate_call_insn()
H A Dkprobes.h62 kprobe_opcode_t *insn; member in struct:arch_specific_insn
88 int probe_is_prohibited_opcode(u16 *insn);
89 int probe_get_fixup_type(u16 *insn);
90 int probe_is_insn_relative_long(u16 *insn);
H A Duprobes.h22 uprobe_opcode_t insn[3]; member in union:arch_uprobe::__anon2485
H A Dfacility.h47 " .insn s,0xb2b10000,0(0)\n" /* stfl */ stfle()
57 asm volatile(".insn s,0xb2b00000,0(%1)" /* stfle */ stfle()
H A Dfutex.h9 #define __futex_atomic_op(insn, ret, oldval, newval, uaddr, oparg) \
13 "1:"insn \
H A Druntime_instr.h63 asm volatile(".insn rsy,0xeb0000000060,0,0,%0" /* LRIC */ load_runtime_instr_cb()
69 asm volatile(".insn rsy,0xeb0000000061,0,0,%0" /* STRIC */ store_runtime_instr_cb()
/linux-4.4.14/drivers/staging/comedi/kcomedilib/
H A Dkcomedilib_main.c76 struct comedi_insn *insn, comedi_do_insn()
90 if (insn->subdev >= dev->n_subdevices) { comedi_do_insn()
94 s = &dev->subdevices[insn->subdev]; comedi_do_insn()
98 "%d not usable subdevice\n", insn->subdev); comedi_do_insn()
105 ret = comedi_check_chanlist(s, 1, &insn->chanspec); comedi_do_insn()
118 switch (insn->insn) { comedi_do_insn()
120 ret = s->insn_bits(dev, s, insn, data); comedi_do_insn()
124 ret = s->insn_config(dev, s, insn, data); comedi_do_insn()
141 struct comedi_insn insn; comedi_dio_get_config() local
145 memset(&insn, 0, sizeof(insn)); comedi_dio_get_config()
146 insn.insn = INSN_CONFIG; comedi_dio_get_config()
147 insn.n = 2; comedi_dio_get_config()
148 insn.subdev = subdev; comedi_dio_get_config()
149 insn.chanspec = CR_PACK(chan, 0, 0); comedi_dio_get_config()
152 ret = comedi_do_insn(dev, &insn, data); comedi_dio_get_config()
162 struct comedi_insn insn; comedi_dio_config() local
164 memset(&insn, 0, sizeof(insn)); comedi_dio_config()
165 insn.insn = INSN_CONFIG; comedi_dio_config()
166 insn.n = 1; comedi_dio_config()
167 insn.subdev = subdev; comedi_dio_config()
168 insn.chanspec = CR_PACK(chan, 0, 0); comedi_dio_config()
170 return comedi_do_insn(dev, &insn, &io); comedi_dio_config()
178 struct comedi_insn insn; comedi_dio_bitfield2() local
189 memset(&insn, 0, sizeof(insn)); comedi_dio_bitfield2()
190 insn.insn = INSN_BITS; comedi_dio_bitfield2()
191 insn.chanspec = base_channel; comedi_dio_bitfield2()
192 insn.n = 2; comedi_dio_bitfield2()
193 insn.subdev = subdev; comedi_dio_bitfield2()
199 * Most drivers ignore the base channel in insn->chanspec. comedi_dio_bitfield2()
205 insn.chanspec = 0; comedi_dio_bitfield2()
213 ret = comedi_do_insn(dev, &insn, data); comedi_dio_bitfield2()
75 comedi_do_insn(struct comedi_device *dev, struct comedi_insn *insn, unsigned int *data) comedi_do_insn() argument
/linux-4.4.14/arch/m32r/kernel/
H A Dalign.c38 #define REG1(insn) (((insn) & 0x0f00) >> 8)
39 #define REG2(insn) ((insn) & 0x000f)
81 static int emu_addi(unsigned short insn, struct pt_regs *regs) emu_addi() argument
83 char imm = (char)(insn & 0xff); emu_addi()
84 int dest = REG1(insn); emu_addi()
94 static int emu_ldi(unsigned short insn, struct pt_regs *regs) emu_ldi() argument
96 char imm = (char)(insn & 0xff); emu_ldi()
98 set_reg(regs, REG1(insn), (int)imm); emu_ldi()
103 static int emu_add(unsigned short insn, struct pt_regs *regs) emu_add() argument
105 int dest = REG1(insn); emu_add()
106 int src = REG2(insn); emu_add()
116 static int emu_addx(unsigned short insn, struct pt_regs *regs) emu_addx() argument
118 int dest = REG1(insn); emu_addx()
124 val += (unsigned int)get_reg(regs, REG2(insn)); emu_addx()
136 static int emu_and(unsigned short insn, struct pt_regs *regs) emu_and() argument
138 int dest = REG1(insn); emu_and()
142 val &= get_reg(regs, REG2(insn)); emu_and()
148 static int emu_cmp(unsigned short insn, struct pt_regs *regs) emu_cmp() argument
150 if (get_reg(regs, REG1(insn)) < get_reg(regs, REG2(insn))) emu_cmp()
158 static int emu_cmpeq(unsigned short insn, struct pt_regs *regs) emu_cmpeq() argument
160 if (get_reg(regs, REG1(insn)) == get_reg(regs, REG2(insn))) emu_cmpeq()
168 static int emu_cmpu(unsigned short insn, struct pt_regs *regs) emu_cmpu() argument
170 if ((unsigned int)get_reg(regs, REG1(insn)) emu_cmpu()
171 < (unsigned int)get_reg(regs, REG2(insn))) emu_cmpu()
179 static int emu_cmpz(unsigned short insn, struct pt_regs *regs) emu_cmpz() argument
181 if (!get_reg(regs, REG2(insn))) emu_cmpz()
189 static int emu_mv(unsigned short insn, struct pt_regs *regs) emu_mv() argument
193 val = get_reg(regs, REG2(insn)); emu_mv()
194 set_reg(regs, REG1(insn), val); emu_mv()
199 static int emu_neg(unsigned short insn, struct pt_regs *regs) emu_neg() argument
203 val = get_reg(regs, REG2(insn)); emu_neg()
204 set_reg(regs, REG1(insn), 0 - val); emu_neg()
209 static int emu_not(unsigned short insn, struct pt_regs *regs) emu_not() argument
213 val = get_reg(regs, REG2(insn)); emu_not()
214 set_reg(regs, REG1(insn), ~val); emu_not()
219 static int emu_or(unsigned short insn, struct pt_regs *regs) emu_or() argument
221 int dest = REG1(insn); emu_or()
225 val |= get_reg(regs, REG2(insn)); emu_or()
231 static int emu_sub(unsigned short insn, struct pt_regs *regs) emu_sub() argument
233 int dest = REG1(insn); emu_sub()
237 val -= get_reg(regs, REG2(insn)); emu_sub()
243 static int emu_subx(unsigned short insn, struct pt_regs *regs) emu_subx() argument
245 int dest = REG1(insn); emu_subx()
249 val -= (unsigned int)get_reg(regs, REG2(insn)); emu_subx()
262 static int emu_xor(unsigned short insn, struct pt_regs *regs) emu_xor() argument
264 int dest = REG1(insn); emu_xor()
268 val ^= (unsigned int)get_reg(regs, REG2(insn)); emu_xor()
274 static int emu_mul(unsigned short insn, struct pt_regs *regs) emu_mul() argument
276 int dest = REG1(insn); emu_mul()
280 reg2 = get_reg(regs, REG2(insn)); emu_mul()
292 static int emu_mullo_a0(unsigned short insn, struct pt_regs *regs) emu_mullo_a0() argument
296 reg1 = get_reg(regs, REG1(insn)); emu_mullo_a0()
297 reg2 = get_reg(regs, REG2(insn)); emu_mullo_a0()
312 static int emu_mullo_a1(unsigned short insn, struct pt_regs *regs) emu_mullo_a1() argument
316 reg1 = get_reg(regs, REG1(insn)); emu_mullo_a1()
317 reg2 = get_reg(regs, REG2(insn)); emu_mullo_a1()
332 static int emu_mvfacmi_a0(unsigned short insn, struct pt_regs *regs) emu_mvfacmi_a0() argument
337 set_reg(regs, REG1(insn), (int)val); emu_mvfacmi_a0()
342 static int emu_mvfacmi_a1(unsigned short insn, struct pt_regs *regs) emu_mvfacmi_a1() argument
347 set_reg(regs, REG1(insn), (int)val); emu_mvfacmi_a1()
352 static int emu_m32r2(unsigned short insn, struct pt_regs *regs) emu_m32r2() argument
356 if ((insn & 0x7fff) == ISA_NOP) /* nop */ emu_m32r2()
359 switch(insn & 0x7000) { emu_m32r2()
361 res = emu_addi(insn, regs); emu_m32r2()
364 res = emu_ldi(insn, regs); emu_m32r2()
373 switch(insn & 0x70f0) { emu_m32r2()
375 res = emu_add(insn, regs); emu_m32r2()
378 res = emu_addx(insn, regs); emu_m32r2()
381 res = emu_and(insn, regs); emu_m32r2()
384 res = emu_cmp(insn, regs); emu_m32r2()
387 res = emu_cmpeq(insn, regs); emu_m32r2()
390 res = emu_cmpu(insn, regs); emu_m32r2()
393 res = emu_cmpz(insn, regs); emu_m32r2()
396 res = emu_mv(insn, regs); emu_m32r2()
399 res = emu_neg(insn, regs); emu_m32r2()
402 res = emu_not(insn, regs); emu_m32r2()
405 res = emu_or(insn, regs); emu_m32r2()
408 res = emu_sub(insn, regs); emu_m32r2()
411 res = emu_subx(insn, regs); emu_m32r2()
414 res = emu_xor(insn, regs); emu_m32r2()
417 res = emu_mul(insn, regs); emu_m32r2()
420 res = emu_mullo_a0(insn, regs); emu_m32r2()
423 res = emu_mullo_a1(insn, regs); emu_m32r2()
432 switch(insn & 0x70ff) { emu_m32r2()
434 res = emu_mvfacmi_a0(insn, regs); emu_m32r2()
437 res = emu_mvfacmi_a1(insn, regs); emu_m32r2()
459 static int insn_check(unsigned long insn, struct pt_regs *regs, insn_check() argument
465 * 32bit insn insn_check()
469 if (insn & 0x80000000) { /* 32bit insn */ insn_check()
470 *ucp += (short)(insn & 0x0000ffff); insn_check()
472 } else { /* 16bit insn */ insn_check()
475 if (!(regs->bpc & 0x2) && insn & 0x8000) { insn_check()
476 res = emu_m32r2((unsigned short)insn, regs); insn_check()
573 /* insn alignment check */ handle_unaligned_access()
H A Dptrace.c255 compute_next_pc_for_16bit_insn(unsigned long insn, unsigned long pc, compute_next_pc_for_16bit_insn() argument
264 if (insn & 0x00008000) compute_next_pc_for_16bit_insn()
267 insn &= 0x7fff; /* right slot */ compute_next_pc_for_16bit_insn()
269 insn >>= 16; /* left slot */ compute_next_pc_for_16bit_insn()
271 op = (insn >> 12) & 0xf; compute_next_pc_for_16bit_insn()
272 op2 = (insn >> 8) & 0xf; compute_next_pc_for_16bit_insn()
273 op3 = (insn >> 4) & 0xf; compute_next_pc_for_16bit_insn()
280 disp = (long)(insn << 24) >> 22; compute_next_pc_for_16bit_insn()
288 disp = (long)(insn << 24) >> 22; compute_next_pc_for_16bit_insn()
295 disp = (long)(insn << 24) >> 22; compute_next_pc_for_16bit_insn()
310 trapno = insn & 0xf; compute_next_pc_for_16bit_insn()
326 regno = insn & 0xf; compute_next_pc_for_16bit_insn()
334 regno = insn & 0xf; compute_next_pc_for_16bit_insn()
343 regno = insn & 0xf; compute_next_pc_for_16bit_insn()
358 compute_next_pc_for_32bit_insn(unsigned long insn, unsigned long pc, compute_next_pc_for_32bit_insn() argument
367 op = (insn >> 28) & 0xf; compute_next_pc_for_32bit_insn()
369 op2 = (insn >> 24) & 0xf; compute_next_pc_for_32bit_insn()
374 disp = (long)(insn << 8) >> 6; compute_next_pc_for_32bit_insn()
382 disp = (long)(insn << 8) >> 6; compute_next_pc_for_32bit_insn()
389 disp = (long)(insn << 8) >> 6; compute_next_pc_for_32bit_insn()
394 op2 = (insn >> 20) & 0xf; compute_next_pc_for_32bit_insn()
404 regno1 = ((insn >> 24) & 0xf); compute_next_pc_for_32bit_insn()
405 regno2 = ((insn >> 16) & 0xf); compute_next_pc_for_32bit_insn()
407 disp = (long)(insn << 16) >> 14; compute_next_pc_for_32bit_insn()
418 compute_next_pc(unsigned long insn, unsigned long pc, compute_next_pc() argument
421 if (insn & 0x80000000) compute_next_pc()
422 compute_next_pc_for_32bit_insn(insn, pc, next_pc, child); compute_next_pc()
424 compute_next_pc_for_16bit_insn(insn, pc, next_pc, child); compute_next_pc()
440 p->insn[p->nr_trap] = next_insn; register_debug_trap()
477 *code = p->insn[i]; unregister_debug_trap()
481 p->insn[i] = p->insn[i + 1]; unregister_debug_trap()
496 access_process_vm(child, p->addr[i], &p->insn[i], sizeof(p->insn[i]), 1); unregister_all_debug_traps()
578 p->insn[i] = 0; init_debug_traps()
585 unsigned long pc, insn; user_enable_single_step() local
592 if (access_process_vm(child, pc&~3, &insn, sizeof(insn), 0) user_enable_single_step()
593 != sizeof(insn)) user_enable_single_step()
596 compute_next_pc(insn, pc, &next_pc, child); user_enable_single_step()
/linux-4.4.14/arch/arm/probes/kprobes/
H A Dactions-common.c21 static void __kprobes simulate_ldm1stm1(probes_opcode_t insn, simulate_ldm1stm1() argument
25 int rn = (insn >> 16) & 0xf; simulate_ldm1stm1()
26 int lbit = insn & (1 << 20); simulate_ldm1stm1()
27 int wbit = insn & (1 << 21); simulate_ldm1stm1()
28 int ubit = insn & (1 << 23); simulate_ldm1stm1()
29 int pbit = insn & (1 << 24); simulate_ldm1stm1()
35 reg_bit_vector = insn & 0xffff; simulate_ldm1stm1()
45 reg_bit_vector = insn & 0xffff; simulate_ldm1stm1()
63 static void __kprobes simulate_stm1_pc(probes_opcode_t insn, simulate_stm1_pc() argument
70 simulate_ldm1stm1(insn, asi, regs); simulate_stm1_pc()
74 static void __kprobes simulate_ldm1_pc(probes_opcode_t insn, simulate_ldm1_pc() argument
78 simulate_ldm1stm1(insn, asi, regs); simulate_ldm1_pc()
83 emulate_generic_r0_12_noflags(probes_opcode_t insn, emulate_generic_r0_12_noflags() argument
111 emulate_generic_r2_14_noflags(probes_opcode_t insn, emulate_generic_r2_14_noflags() argument
114 emulate_generic_r0_12_noflags(insn, asi, emulate_generic_r2_14_noflags()
119 emulate_ldm_r3_15(probes_opcode_t insn, emulate_ldm_r3_15() argument
122 emulate_generic_r0_12_noflags(insn, asi, emulate_ldm_r3_15()
128 kprobe_decode_ldmstm(probes_opcode_t insn, struct arch_probes_insn *asi, kprobe_decode_ldmstm() argument
132 unsigned reglist = insn & 0xffff; kprobe_decode_ldmstm()
133 int is_ldm = insn & 0x100000; kprobe_decode_ldmstm()
134 int rn = (insn >> 16) & 0xf; kprobe_decode_ldmstm()
157 asi->insn[0] = __opcode_to_mem_arm((insn & 0xfff00000) | kprobe_decode_ldmstm()
H A Dactions-thumb.c27 t32_simulate_table_branch(probes_opcode_t insn, t32_simulate_table_branch() argument
31 int rn = (insn >> 16) & 0xf; t32_simulate_table_branch()
32 int rm = insn & 0xf; t32_simulate_table_branch()
38 if (insn & 0x10) /* TBH */ t32_simulate_table_branch()
47 t32_simulate_mrs(probes_opcode_t insn, t32_simulate_mrs() argument
50 int rd = (insn >> 8) & 0xf; t32_simulate_mrs()
56 t32_simulate_cond_branch(probes_opcode_t insn, t32_simulate_cond_branch() argument
61 long offset = insn & 0x7ff; /* imm11 */ t32_simulate_cond_branch()
62 offset += (insn & 0x003f0000) >> 5; /* imm6 */ t32_simulate_cond_branch()
63 offset += (insn & 0x00002000) << 4; /* J1 */ t32_simulate_cond_branch()
64 offset += (insn & 0x00000800) << 7; /* J2 */ t32_simulate_cond_branch()
65 offset -= (insn & 0x04000000) >> 7; /* Apply sign bit */ t32_simulate_cond_branch()
71 t32_decode_cond_branch(probes_opcode_t insn, struct arch_probes_insn *asi, t32_decode_cond_branch() argument
74 int cc = (insn >> 22) & 0xf; t32_decode_cond_branch()
81 t32_simulate_branch(probes_opcode_t insn, t32_simulate_branch() argument
86 long offset = insn & 0x7ff; /* imm11 */ t32_simulate_branch()
87 offset += (insn & 0x03ff0000) >> 5; /* imm10 */ t32_simulate_branch()
88 offset += (insn & 0x00002000) << 9; /* J1 */ t32_simulate_branch()
89 offset += (insn & 0x00000800) << 10; /* J2 */ t32_simulate_branch()
90 if (insn & 0x04000000) t32_simulate_branch()
95 if (insn & (1 << 14)) { t32_simulate_branch()
98 if (!(insn & (1 << 12))) { t32_simulate_branch()
109 t32_simulate_ldr_literal(probes_opcode_t insn, t32_simulate_ldr_literal() argument
113 int rt = (insn >> 12) & 0xf; t32_simulate_ldr_literal()
116 long offset = insn & 0xfff; t32_simulate_ldr_literal()
117 if (insn & 0x00800000) t32_simulate_ldr_literal()
122 if (insn & 0x00400000) { t32_simulate_ldr_literal()
129 } else if (insn & 0x00200000) { t32_simulate_ldr_literal()
131 if (insn & 0x01000000) t32_simulate_ldr_literal()
137 if (insn & 0x01000000) t32_simulate_ldr_literal()
147 t32_decode_ldmstm(probes_opcode_t insn, struct arch_probes_insn *asi, t32_decode_ldmstm() argument
150 enum probes_insn ret = kprobe_decode_ldmstm(insn, asi, d); t32_decode_ldmstm()
153 insn = __mem_to_opcode_arm(asi->insn[0]); t32_decode_ldmstm()
154 ((u16 *)asi->insn)[0] = __opcode_to_mem_thumb16(insn >> 16); t32_decode_ldmstm()
155 ((u16 *)asi->insn)[1] = __opcode_to_mem_thumb16(insn & 0xffff); t32_decode_ldmstm()
161 t32_emulate_ldrdstrd(probes_opcode_t insn, t32_emulate_ldrdstrd() argument
165 int rt1 = (insn >> 12) & 0xf; t32_emulate_ldrdstrd()
166 int rt2 = (insn >> 8) & 0xf; t32_emulate_ldrdstrd()
167 int rn = (insn >> 16) & 0xf; t32_emulate_ldrdstrd()
188 t32_emulate_ldrstr(probes_opcode_t insn, t32_emulate_ldrstr() argument
191 int rt = (insn >> 12) & 0xf; t32_emulate_ldrstr()
192 int rn = (insn >> 16) & 0xf; t32_emulate_ldrstr()
193 int rm = insn & 0xf; t32_emulate_ldrstr()
214 t32_emulate_rd8rn16rm0_rwflags(probes_opcode_t insn, t32_emulate_rd8rn16rm0_rwflags() argument
217 int rd = (insn >> 8) & 0xf; t32_emulate_rd8rn16rm0_rwflags()
218 int rn = (insn >> 16) & 0xf; t32_emulate_rd8rn16rm0_rwflags()
219 int rm = insn & 0xf; t32_emulate_rd8rn16rm0_rwflags()
241 t32_emulate_rd8pc16_noflags(probes_opcode_t insn, t32_emulate_rd8pc16_noflags() argument
245 int rd = (insn >> 8) & 0xf; t32_emulate_rd8pc16_noflags()
261 t32_emulate_rd8rn16_noflags(probes_opcode_t insn, t32_emulate_rd8rn16_noflags() argument
264 int rd = (insn >> 8) & 0xf; t32_emulate_rd8rn16_noflags()
265 int rn = (insn >> 16) & 0xf; t32_emulate_rd8rn16_noflags()
281 t32_emulate_rdlo12rdhi8rn16rm0_noflags(probes_opcode_t insn, t32_emulate_rdlo12rdhi8rn16rm0_noflags() argument
285 int rdlo = (insn >> 12) & 0xf; t32_emulate_rdlo12rdhi8rn16rm0_noflags()
286 int rdhi = (insn >> 8) & 0xf; t32_emulate_rdlo12rdhi8rn16rm0_noflags()
287 int rn = (insn >> 16) & 0xf; t32_emulate_rdlo12rdhi8rn16rm0_noflags()
288 int rm = insn & 0xf; t32_emulate_rdlo12rdhi8rn16rm0_noflags()
309 t16_simulate_bxblx(probes_opcode_t insn, t16_simulate_bxblx() argument
313 int rm = (insn >> 3) & 0xf; t16_simulate_bxblx()
316 if (insn & (1 << 7)) /* BLX ? */ t16_simulate_bxblx()
323 t16_simulate_ldr_literal(probes_opcode_t insn, t16_simulate_ldr_literal() argument
327 long index = insn & 0xff; t16_simulate_ldr_literal()
328 int rt = (insn >> 8) & 0x7; t16_simulate_ldr_literal()
333 t16_simulate_ldrstr_sp_relative(probes_opcode_t insn, t16_simulate_ldrstr_sp_relative() argument
337 long index = insn & 0xff; t16_simulate_ldrstr_sp_relative()
338 int rt = (insn >> 8) & 0x7; t16_simulate_ldrstr_sp_relative()
339 if (insn & 0x800) /* LDR */ t16_simulate_ldrstr_sp_relative()
346 t16_simulate_reladr(probes_opcode_t insn, t16_simulate_reladr() argument
349 unsigned long base = (insn & 0x800) ? regs->ARM_sp t16_simulate_reladr()
351 long offset = insn & 0xff; t16_simulate_reladr()
352 int rt = (insn >> 8) & 0x7; t16_simulate_reladr()
357 t16_simulate_add_sp_imm(probes_opcode_t insn, t16_simulate_add_sp_imm() argument
360 long imm = insn & 0x7f; t16_simulate_add_sp_imm()
361 if (insn & 0x80) /* SUB */ t16_simulate_add_sp_imm()
368 t16_simulate_cbz(probes_opcode_t insn, t16_simulate_cbz() argument
371 int rn = insn & 0x7; t16_simulate_cbz()
372 probes_opcode_t nonzero = regs->uregs[rn] ? insn : ~insn; t16_simulate_cbz()
374 long i = insn & 0x200; t16_simulate_cbz()
375 long imm5 = insn & 0xf8; t16_simulate_cbz()
382 t16_simulate_it(probes_opcode_t insn, t16_simulate_it() argument
389 * The new IT state is in the lower byte of insn. t16_simulate_it()
393 cpsr |= (insn & 0xfc) << 8; t16_simulate_it()
394 cpsr |= (insn & 0x03) << 25; t16_simulate_it()
399 t16_singlestep_it(probes_opcode_t insn, t16_singlestep_it() argument
403 t16_simulate_it(insn, asi, regs); t16_singlestep_it()
407 t16_decode_it(probes_opcode_t insn, struct arch_probes_insn *asi, t16_decode_it() argument
415 t16_simulate_cond_branch(probes_opcode_t insn, t16_simulate_cond_branch() argument
419 long offset = insn & 0x7f; t16_simulate_cond_branch()
420 offset -= insn & 0x80; /* Apply sign bit */ t16_simulate_cond_branch()
425 t16_decode_cond_branch(probes_opcode_t insn, struct arch_probes_insn *asi, t16_decode_cond_branch() argument
428 int cc = (insn >> 8) & 0xf; t16_decode_cond_branch()
435 t16_simulate_branch(probes_opcode_t insn, t16_simulate_branch() argument
439 long offset = insn & 0x3ff; t16_simulate_branch()
440 offset -= insn & 0x400; /* Apply sign bit */ t16_simulate_branch()
445 t16_emulate_loregs(probes_opcode_t insn, t16_emulate_loregs() argument
468 t16_emulate_loregs_rwflags(probes_opcode_t insn, t16_emulate_loregs_rwflags() argument
471 regs->ARM_cpsr = t16_emulate_loregs(insn, asi, regs); t16_emulate_loregs_rwflags()
475 t16_emulate_loregs_noitrwflags(probes_opcode_t insn, t16_emulate_loregs_noitrwflags() argument
478 unsigned long cpsr = t16_emulate_loregs(insn, asi, regs); t16_emulate_loregs_noitrwflags()
484 t16_emulate_hiregs(probes_opcode_t insn, t16_emulate_hiregs() argument
488 int rdn = (insn & 0x7) | ((insn & 0x80) >> 4); t16_emulate_hiregs()
489 int rm = (insn >> 3) & 0xf; t16_emulate_hiregs()
515 t16_decode_hiregs(probes_opcode_t insn, struct arch_probes_insn *asi, t16_decode_hiregs() argument
518 insn &= ~0x00ff; t16_decode_hiregs()
519 insn |= 0x001; /* Set Rdn = R1 and Rm = R0 */ t16_decode_hiregs()
520 ((u16 *)asi->insn)[0] = __opcode_to_mem_thumb16(insn); t16_decode_hiregs()
526 t16_emulate_push(probes_opcode_t insn, t16_emulate_push() argument
543 t16_decode_push(probes_opcode_t insn, struct arch_probes_insn *asi, t16_decode_push() argument
552 ((u16 *)asi->insn)[0] = __opcode_to_mem_thumb16(0xe929); t16_decode_push()
554 ((u16 *)asi->insn)[1] = __opcode_to_mem_thumb16(insn & 0x1ff); t16_decode_push()
560 t16_emulate_pop_nopc(probes_opcode_t insn, t16_emulate_pop_nopc() argument
577 t16_emulate_pop_pc(probes_opcode_t insn, t16_emulate_pop_pc() argument
598 t16_decode_pop(probes_opcode_t insn, struct arch_probes_insn *asi, t16_decode_pop() argument
607 ((u16 *)asi->insn)[0] = __opcode_to_mem_thumb16(0xe8b9); t16_decode_pop()
609 ((u16 *)asi->insn)[1] = __opcode_to_mem_thumb16(insn & 0x1ff); t16_decode_pop()
610 asi->insn_handler = insn & 0x100 ? t16_emulate_pop_pc t16_decode_pop()
H A Dcheckers-common.c21 enum probes_insn checker_stack_use_none(probes_opcode_t insn, checker_stack_use_none() argument
29 enum probes_insn checker_stack_use_unknown(probes_opcode_t insn, checker_stack_use_unknown() argument
38 enum probes_insn checker_stack_use_imm_0xx(probes_opcode_t insn, checker_stack_use_imm_0xx() argument
42 int imm = insn & 0xff; checker_stack_use_imm_0xx()
48 * Different from other insn uses imm8, the real addressing offset of
51 enum probes_insn checker_stack_use_t32strd(probes_opcode_t insn, checker_stack_use_t32strd() argument
55 int imm = insn & 0xff; checker_stack_use_t32strd()
60 enum probes_insn checker_stack_use_imm_x0x(probes_opcode_t insn, checker_stack_use_imm_x0x() argument
64 int imm = ((insn & 0xf00) >> 4) + (insn & 0xf); checker_stack_use_imm_x0x()
70 enum probes_insn checker_stack_use_imm_xxx(probes_opcode_t insn, checker_stack_use_imm_xxx() argument
74 int imm = insn & 0xfff; checker_stack_use_imm_xxx()
79 enum probes_insn checker_stack_use_stmdx(probes_opcode_t insn, checker_stack_use_stmdx() argument
83 unsigned int reglist = insn & 0xffff; checker_stack_use_stmdx()
84 int pbit = insn & (1 << 24); checker_stack_use_stmdx()
H A Dactions-arm.c40 * instruction in insn[0]. In insn[1] is a
77 emulate_ldrdstrd(probes_opcode_t insn, emulate_ldrdstrd() argument
81 int rt = (insn >> 12) & 0xf; emulate_ldrdstrd()
82 int rn = (insn >> 16) & 0xf; emulate_ldrdstrd()
83 int rm = insn & 0xf; emulate_ldrdstrd()
101 if (is_writeback(insn)) emulate_ldrdstrd()
106 emulate_ldr(probes_opcode_t insn, emulate_ldr() argument
110 int rt = (insn >> 12) & 0xf; emulate_ldr()
111 int rn = (insn >> 16) & 0xf; emulate_ldr()
112 int rm = insn & 0xf; emulate_ldr()
131 if (is_writeback(insn)) emulate_ldr()
136 emulate_str(probes_opcode_t insn, emulate_str() argument
141 int rt = (insn >> 12) & 0xf; emulate_str()
142 int rn = (insn >> 16) & 0xf; emulate_str()
143 int rm = insn & 0xf; emulate_str()
158 if (is_writeback(insn)) emulate_str()
163 emulate_rd12rn16rm0rs8_rwflags(probes_opcode_t insn, emulate_rd12rn16rm0rs8_rwflags() argument
167 int rd = (insn >> 12) & 0xf; emulate_rd12rn16rm0rs8_rwflags()
168 int rn = (insn >> 16) & 0xf; emulate_rd12rn16rm0rs8_rwflags()
169 int rm = insn & 0xf; emulate_rd12rn16rm0rs8_rwflags()
170 int rs = (insn >> 8) & 0xf; emulate_rd12rn16rm0rs8_rwflags()
198 emulate_rd12rn16rm0_rwflags_nopc(probes_opcode_t insn, emulate_rd12rn16rm0_rwflags_nopc() argument
201 int rd = (insn >> 12) & 0xf; emulate_rd12rn16rm0_rwflags_nopc()
202 int rn = (insn >> 16) & 0xf; emulate_rd12rn16rm0_rwflags_nopc()
203 int rm = insn & 0xf; emulate_rd12rn16rm0_rwflags_nopc()
225 emulate_rd16rn12rm0rs8_rwflags_nopc(probes_opcode_t insn, emulate_rd16rn12rm0rs8_rwflags_nopc() argument
229 int rd = (insn >> 16) & 0xf; emulate_rd16rn12rm0rs8_rwflags_nopc()
230 int rn = (insn >> 12) & 0xf; emulate_rd16rn12rm0rs8_rwflags_nopc()
231 int rm = insn & 0xf; emulate_rd16rn12rm0rs8_rwflags_nopc()
232 int rs = (insn >> 8) & 0xf; emulate_rd16rn12rm0rs8_rwflags_nopc()
255 emulate_rd12rm0_noflags_nopc(probes_opcode_t insn, emulate_rd12rm0_noflags_nopc() argument
258 int rd = (insn >> 12) & 0xf; emulate_rd12rm0_noflags_nopc()
259 int rm = insn & 0xf; emulate_rd12rm0_noflags_nopc()
275 emulate_rdlo12rdhi16rn0rm8_rwflags_nopc(probes_opcode_t insn, emulate_rdlo12rdhi16rn0rm8_rwflags_nopc() argument
279 int rdlo = (insn >> 12) & 0xf; emulate_rdlo12rdhi16rn0rm8_rwflags_nopc()
280 int rdhi = (insn >> 16) & 0xf; emulate_rdlo12rdhi16rn0rm8_rwflags_nopc()
281 int rn = insn & 0xf; emulate_rdlo12rdhi16rn0rm8_rwflags_nopc()
282 int rm = (insn >> 8) & 0xf; emulate_rdlo12rdhi16rn0rm8_rwflags_nopc()
H A Dcheckers-arm.c21 static enum probes_insn __kprobes arm_check_stack(probes_opcode_t insn, arm_check_stack() argument
91 return probes_decode_insn(insn, asi, table, false, false, stack_check_actions, NULL); arm_check_stack()
101 static enum probes_insn __kprobes arm_check_regs_nouse(probes_opcode_t insn, arm_check_regs_nouse() argument
109 static enum probes_insn arm_check_regs_normal(probes_opcode_t insn, arm_check_regs_normal() argument
117 for (i = 0; i < 5; regs >>= 4, insn >>= 4, i++) arm_check_regs_normal()
119 asi->register_usage_flags |= 1 << (insn & 0xf); arm_check_regs_normal()
125 static enum probes_insn arm_check_regs_ldmstm(probes_opcode_t insn, arm_check_regs_ldmstm() argument
129 unsigned int reglist = insn & 0xffff; arm_check_regs_ldmstm()
130 unsigned int rn = (insn >> 16) & 0xf; arm_check_regs_ldmstm()
135 static enum probes_insn arm_check_regs_mov_ip_sp(probes_opcode_t insn, arm_check_regs_mov_ip_sp() argument
156 static enum probes_insn arm_check_regs_ldrdstrd(probes_opcode_t insn, arm_check_regs_ldrdstrd() argument
160 int rdt = (insn >> 12) & 0xf; arm_check_regs_ldrdstrd()
161 arm_check_regs_normal(insn, asi, h); arm_check_regs_ldrdstrd()
H A Dcheckers-thumb.c21 static enum probes_insn __kprobes t32_check_stack(probes_opcode_t insn, t32_check_stack() argument
83 return probes_decode_insn(insn, asi, table, false, false, stack_check_actions, NULL); t32_check_stack()
93 * See following comments. This insn must be 'push'.
95 static enum probes_insn __kprobes t16_check_stack(probes_opcode_t insn, t16_check_stack() argument
99 unsigned int reglist = insn & 0x1ff; t16_check_stack()
105 * T16 encoding is simple: only the 'push' insn can need extra stack space.
H A Dopt-arm.c28 #include <asm/insn.h>
124 return optinsn->insn != NULL; arch_prepared_optinsn()
155 if (op->optinsn.insn) { __arch_remove_optimized_kprobe()
156 free_optinsn_slot(op->optinsn.insn, dirty); __arch_remove_optimized_kprobe()
157 op->optinsn.insn = NULL; __arch_remove_optimized_kprobe()
213 * kprobe opt use a 'b' instruction to branch to optinsn.insn. arch_prepare_optimized_kprobe()
272 /* If possible, copy insn and have it executed during restore */ arch_prepare_optimized_kprobe()
297 /* Set op->optinsn.insn means prepared. */ arch_prepare_optimized_kprobe()
298 op->optinsn.insn = code; arch_prepare_optimized_kprobe()
307 unsigned long insn; list_for_each_entry_safe() local
317 insn = arm_gen_branch((unsigned long)op->kp.addr, list_for_each_entry_safe()
318 (unsigned long)op->optinsn.insn); list_for_each_entry_safe()
319 BUG_ON(insn == 0); list_for_each_entry_safe()
322 * Make it a conditional branch if replaced insn list_for_each_entry_safe()
325 insn = (__mem_to_opcode_arm( list_for_each_entry_safe()
327 (insn & 0x0fffffff); list_for_each_entry_safe()
334 kprobes_remove_breakpoint(op->kp.addr, insn); list_for_each_entry_safe()
H A Dcore.c57 kprobe_opcode_t insn; arch_prepare_kprobe() local
72 insn = __mem_to_opcode_thumb16(((u16 *)addr)[0]); arch_prepare_kprobe()
73 if (is_wide_instruction(insn)) { arch_prepare_kprobe()
75 insn = __opcode_thumb32_compose(insn, inst2); arch_prepare_kprobe()
88 insn = __mem_to_opcode_arm(*p->addr); arch_prepare_kprobe()
94 p->opcode = insn; arch_prepare_kprobe()
95 p->ainsn.insn = tmp_insn; arch_prepare_kprobe()
97 switch ((*decode_insn)(insn, &p->ainsn, true, actions, checkers)) { arch_prepare_kprobe()
102 p->ainsn.insn = get_insn_slot(); arch_prepare_kprobe()
103 if (!p->ainsn.insn) arch_prepare_kprobe()
106 p->ainsn.insn[is] = tmp_insn[is]; arch_prepare_kprobe()
107 flush_insns(p->ainsn.insn, arch_prepare_kprobe()
108 sizeof(p->ainsn.insn[0]) * MAX_INSN_SIZE); arch_prepare_kprobe()
110 ((uintptr_t)p->ainsn.insn | thumb); arch_prepare_kprobe()
113 case INSN_GOOD_NO_SLOT: /* instruction doesn't need insn slot */ arch_prepare_kprobe()
114 p->ainsn.insn = NULL; arch_prepare_kprobe()
119 * Never instrument insn like 'str r0, [sp, +/-r1]'. Also, insn likes arch_prepare_kprobe()
144 kprobe_opcode_t insn = p->opcode; arch_arm_kprobe() local
149 if (insn >= 0xe0000000) arch_arm_kprobe()
152 brkp |= insn & 0xf0000000; /* Copy condition from insn */ arch_arm_kprobe()
168 unsigned int insn; member in struct:patch
174 __patch_text(p->addr, p->insn); __kprobes_remove_breakpoint()
178 void __kprobes kprobes_remove_breakpoint(void *addr, unsigned int insn) kprobes_remove_breakpoint() argument
182 .insn = insn, kprobes_remove_breakpoint()
195 if (p->ainsn.insn) { arch_remove_kprobe()
196 free_insn_slot(p->ainsn.insn, 0); arch_remove_kprobe()
197 p->ainsn.insn = NULL; arch_remove_kprobe()
H A Dcore.h33 extern void kprobes_remove_breakpoint(void *addr, unsigned int insn);
36 kprobe_decode_ldmstm(kprobe_opcode_t insn, struct arch_probes_insn *asi,
/linux-4.4.14/arch/mips/kernel/
H A Dbranch.c60 union mips_instruction insn = (union mips_instruction)dec_insn.insn; __mm_isBranchInstr() local
68 switch (insn.mm_i_format.opcode) { __mm_isBranchInstr()
70 if ((insn.mm_i_format.simmediate & MM_POOL32A_MINOR_MASK) == __mm_isBranchInstr()
72 switch (insn.mm_i_format.simmediate >> __mm_isBranchInstr()
78 if (insn.mm_i_format.rt != 0) /* Not mm_jr */ __mm_isBranchInstr()
79 regs->regs[insn.mm_i_format.rt] = __mm_isBranchInstr()
83 *contpc = regs->regs[insn.mm_i_format.rs]; __mm_isBranchInstr()
89 switch (insn.mm_i_format.rt) { __mm_isBranchInstr()
97 if ((long)regs->regs[insn.mm_i_format.rs] < 0) __mm_isBranchInstr()
100 (insn.mm_i_format.simmediate << 1); __mm_isBranchInstr()
113 if ((long)regs->regs[insn.mm_i_format.rs] >= 0) __mm_isBranchInstr()
116 (insn.mm_i_format.simmediate << 1); __mm_isBranchInstr()
123 if ((long)regs->regs[insn.mm_i_format.rs] <= 0) __mm_isBranchInstr()
126 (insn.mm_i_format.simmediate << 1); __mm_isBranchInstr()
133 if ((long)regs->regs[insn.mm_i_format.rs] <= 0) __mm_isBranchInstr()
136 (insn.mm_i_format.simmediate << 1); __mm_isBranchInstr()
158 bit = (insn.mm_i_format.rs >> 2); __mm_isBranchInstr()
164 (insn.mm_i_format.simmediate << 1); __mm_isBranchInstr()
172 switch (insn.mm_i_format.rt) { __mm_isBranchInstr()
179 *contpc = regs->regs[insn.mm_i_format.rs]; __mm_isBranchInstr()
184 if ((long)regs->regs[reg16to32map[insn.mm_b1_format.rs]] == 0) __mm_isBranchInstr()
187 (insn.mm_b1_format.simmediate << 1); __mm_isBranchInstr()
193 if ((long)regs->regs[reg16to32map[insn.mm_b1_format.rs]] != 0) __mm_isBranchInstr()
196 (insn.mm_b1_format.simmediate << 1); __mm_isBranchInstr()
203 (insn.mm_b0_format.simmediate << 1); __mm_isBranchInstr()
206 if (regs->regs[insn.mm_i_format.rs] == __mm_isBranchInstr()
207 regs->regs[insn.mm_i_format.rt]) __mm_isBranchInstr()
210 (insn.mm_i_format.simmediate << 1); __mm_isBranchInstr()
217 if (regs->regs[insn.mm_i_format.rs] != __mm_isBranchInstr()
218 regs->regs[insn.mm_i_format.rt]) __mm_isBranchInstr()
221 (insn.mm_i_format.simmediate << 1); __mm_isBranchInstr()
232 *contpc |= (insn.j_format.target << 2); __mm_isBranchInstr()
243 *contpc |= (insn.j_format.target << 1); __mm_isBranchInstr()
281 mminsn.insn = word; __microMIPS_compute_return_epc()
401 * @insn: branch instruction to decode
417 union mips_instruction insn) __compute_return_epc_for_insn()
423 switch (insn.i_format.opcode) { __compute_return_epc_for_insn()
428 switch (insn.r_format.func) { __compute_return_epc_for_insn()
430 regs->regs[insn.r_format.rd] = epc + 8; __compute_return_epc_for_insn()
433 if (NO_R6EMU && insn.r_format.func == jr_op) __compute_return_epc_for_insn()
435 regs->cp0_epc = regs->regs[insn.r_format.rs]; __compute_return_epc_for_insn()
446 switch (insn.i_format.rt) { __compute_return_epc_for_insn()
451 if ((long)regs->regs[insn.i_format.rs] < 0) { __compute_return_epc_for_insn()
452 epc = epc + 4 + (insn.i_format.simmediate << 2); __compute_return_epc_for_insn()
453 if (insn.i_format.rt == bltzl_op) __compute_return_epc_for_insn()
464 if ((long)regs->regs[insn.i_format.rs] >= 0) { __compute_return_epc_for_insn()
465 epc = epc + 4 + (insn.i_format.simmediate << 2); __compute_return_epc_for_insn()
466 if (insn.i_format.rt == bgezl_op) __compute_return_epc_for_insn()
475 if (NO_R6EMU && (insn.i_format.rs || __compute_return_epc_for_insn()
476 insn.i_format.rt == bltzall_op)) { __compute_return_epc_for_insn()
487 if (!insn.i_format.rs) { __compute_return_epc_for_insn()
494 (insn.i_format.simmediate << 2); __compute_return_epc_for_insn()
498 if ((long)regs->regs[insn.i_format.rs] < 0) { __compute_return_epc_for_insn()
499 epc = epc + 4 + (insn.i_format.simmediate << 2); __compute_return_epc_for_insn()
500 if (insn.i_format.rt == bltzall_op) __compute_return_epc_for_insn()
509 if (NO_R6EMU && (insn.i_format.rs || __compute_return_epc_for_insn()
510 insn.i_format.rt == bgezall_op)) { __compute_return_epc_for_insn()
521 if (!insn.i_format.rs) { __compute_return_epc_for_insn()
528 (insn.i_format.simmediate << 2); __compute_return_epc_for_insn()
532 if ((long)regs->regs[insn.i_format.rs] >= 0) { __compute_return_epc_for_insn()
533 epc = epc + 4 + (insn.i_format.simmediate << 2); __compute_return_epc_for_insn()
534 if (insn.i_format.rt == bgezall_op) __compute_return_epc_for_insn()
548 epc = epc + 4 + (insn.i_format.simmediate << 2); __compute_return_epc_for_insn()
565 epc |= (insn.j_format.target << 2); __compute_return_epc_for_insn()
567 if (insn.i_format.opcode == jalx_op) __compute_return_epc_for_insn()
578 if (regs->regs[insn.i_format.rs] == __compute_return_epc_for_insn()
579 regs->regs[insn.i_format.rt]) { __compute_return_epc_for_insn()
580 epc = epc + 4 + (insn.i_format.simmediate << 2); __compute_return_epc_for_insn()
581 if (insn.i_format.opcode == beql_op) __compute_return_epc_for_insn()
592 if (regs->regs[insn.i_format.rs] != __compute_return_epc_for_insn()
593 regs->regs[insn.i_format.rt]) { __compute_return_epc_for_insn()
594 epc = epc + 4 + (insn.i_format.simmediate << 2); __compute_return_epc_for_insn()
595 if (insn.i_format.opcode == bnel_op) __compute_return_epc_for_insn()
603 if (!insn.i_format.rt && NO_R6EMU) __compute_return_epc_for_insn()
619 if (cpu_has_mips_r6 && insn.i_format.rt) { __compute_return_epc_for_insn()
620 if ((insn.i_format.opcode == blez_op) && __compute_return_epc_for_insn()
621 ((!insn.i_format.rs && insn.i_format.rt) || __compute_return_epc_for_insn()
622 (insn.i_format.rs == insn.i_format.rt))) __compute_return_epc_for_insn()
628 if ((long)regs->regs[insn.i_format.rs] <= 0) { __compute_return_epc_for_insn()
629 epc = epc + 4 + (insn.i_format.simmediate << 2); __compute_return_epc_for_insn()
630 if (insn.i_format.opcode == blezl_op) __compute_return_epc_for_insn()
638 if (!insn.i_format.rt && NO_R6EMU) __compute_return_epc_for_insn()
654 if (cpu_has_mips_r6 && insn.i_format.rt) { __compute_return_epc_for_insn()
655 if ((insn.i_format.opcode == blez_op) && __compute_return_epc_for_insn()
656 ((!insn.i_format.rs && insn.i_format.rt) || __compute_return_epc_for_insn()
657 (insn.i_format.rs == insn.i_format.rt))) __compute_return_epc_for_insn()
664 if ((long)regs->regs[insn.i_format.rs] > 0) { __compute_return_epc_for_insn()
665 epc = epc + 4 + (insn.i_format.simmediate << 2); __compute_return_epc_for_insn()
666 if (insn.i_format.opcode == bgtzl_op) __compute_return_epc_for_insn()
678 ((insn.i_format.rs == bc1eqz_op) || __compute_return_epc_for_insn()
679 (insn.i_format.rs == bc1nez_op))) { __compute_return_epc_for_insn()
690 reg = insn.i_format.rt; __compute_return_epc_for_insn()
692 switch (insn.i_format.rs) { __compute_return_epc_for_insn()
709 (insn.i_format.simmediate << 2); __compute_return_epc_for_insn()
724 bit = (insn.i_format.rt >> 2); __compute_return_epc_for_insn()
727 switch (insn.i_format.rt & 3) { __compute_return_epc_for_insn()
732 (insn.i_format.simmediate << 2); __compute_return_epc_for_insn()
733 if (insn.i_format.rt == 2) __compute_return_epc_for_insn()
744 (insn.i_format.simmediate << 2); __compute_return_epc_for_insn()
745 if (insn.i_format.rt == 3) __compute_return_epc_for_insn()
756 if ((regs->regs[insn.i_format.rs] & (1ull<<insn.i_format.rt)) __compute_return_epc_for_insn()
758 epc = epc + 4 + (insn.i_format.simmediate << 2); __compute_return_epc_for_insn()
764 if ((regs->regs[insn.i_format.rs] & __compute_return_epc_for_insn()
765 (1ull<<(insn.i_format.rt+32))) == 0) __compute_return_epc_for_insn()
766 epc = epc + 4 + (insn.i_format.simmediate << 2); __compute_return_epc_for_insn()
772 if (regs->regs[insn.i_format.rs] & (1ull<<insn.i_format.rt)) __compute_return_epc_for_insn()
773 epc = epc + 4 + (insn.i_format.simmediate << 2); __compute_return_epc_for_insn()
779 if (regs->regs[insn.i_format.rs] & __compute_return_epc_for_insn()
780 (1ull<<(insn.i_format.rt+32))) __compute_return_epc_for_insn()
781 epc = epc + 4 + (insn.i_format.simmediate << 2); __compute_return_epc_for_insn()
802 epc += 4 + (insn.i_format.simmediate << 2); __compute_return_epc_for_insn()
819 if (insn.i_format.rs) __compute_return_epc_for_insn()
835 if (insn.i_format.rt && !insn.i_format.rs) __compute_return_epc_for_insn()
859 union mips_instruction insn; __compute_return_epc() local
869 if (__get_user(insn.word, addr)) { __compute_return_epc()
874 return __compute_return_epc_for_insn(regs, insn); __compute_return_epc()
416 __compute_return_epc_for_insn(struct pt_regs *regs, union mips_instruction insn) __compute_return_epc_for_insn() argument
H A Djump_label.c44 union mips_instruction insn; arch_jump_label_transform() local
55 insn.j_format.opcode = J_ISA_BIT ? mm_j32_op : j_op; arch_jump_label_transform()
56 insn.j_format.target = e->target >> J_RANGE_SHIFT; arch_jump_label_transform()
58 insn.word = 0; /* nop */ arch_jump_label_transform()
64 insn_p->halfword[0] = insn.word >> 16; arch_jump_label_transform()
65 insn_p->halfword[1] = insn.word; arch_jump_label_transform()
67 *insn_p = insn; arch_jump_label_transform()
H A Duprobes.c13 static inline int insn_has_delay_slot(const union mips_instruction insn) insn_has_delay_slot() argument
15 switch (insn.i_format.opcode) { insn_has_delay_slot()
20 switch (insn.r_format.func) { insn_has_delay_slot()
33 switch (insn.i_format.rt) { insn_has_delay_slot()
97 inst.word = aup->insn[0]; arch_uprobe_analyze_insn()
98 aup->ixol[0] = aup->insn[insn_has_delay_slot(inst)]; arch_uprobe_analyze_insn()
106 * @insn: instruction to be checked.
107 * Returns true if @insn is a trap variant.
114 bool is_trap_insn(uprobe_opcode_t *insn) is_trap_insn() argument
118 inst.word = *insn; is_trap_insn()
160 union mips_instruction insn; arch_uprobe_pre_xol() local
167 if (insn_has_delay_slot((union mips_instruction) aup->insn[0])) { arch_uprobe_pre_xol()
171 __compute_return_epc_for_insn(regs, insn); arch_uprobe_pre_xol()
193 * If xol insn itself traps and generates a signal(Say,
H A Dunaligned.c120 ".insn\n\t" \
141 ".insn\n\t" \
174 ".insn\n\t" \
201 ".insn\n\t" \
225 ".insn\n\t" \
245 ".insn\n\t" \
278 ".insn\n\t" \
323 ".insn\n\t" \
355 ".insn\n\t" \
376 ".insn\n\t" \
396 ".insn\n\t" \
426 ".insn\n\t" \
466 ".insn\n\t" \
499 ".insn\n\t" \
520 ".insn\n\t" \
553 ".insn\n\t" \
581 ".insn\n\t" \
605 ".insn\n\t" \
625 ".insn\n\t" \
658 ".insn\n\t" \
703 ".insn\n\t" \
733 ".insn\n\t" \
754 ".insn\n\t" \
774 ".insn\n\t" \
804 ".insn\n\t" \
844 ".insn\n\t" \
886 union mips_instruction insn; emulate_load_store_insn() local
906 __get_user(insn.word, pc); emulate_load_store_insn()
908 switch (insn.i_format.opcode) { emulate_load_store_insn()
951 switch (insn.spec3_format.func) { emulate_load_store_insn()
963 regs->regs[insn.spec3_format.rt] = value; emulate_load_store_insn()
976 regs->regs[insn.spec3_format.rt] = value; emulate_load_store_insn()
989 regs->regs[insn.spec3_format.rt] = value; emulate_load_store_insn()
997 value = regs->regs[insn.spec3_format.rt]; emulate_load_store_insn()
1010 value = regs->regs[insn.spec3_format.rt]; emulate_load_store_insn()
1040 regs->regs[insn.i_format.rt] = value; emulate_load_store_insn()
1059 regs->regs[insn.i_format.rt] = value; emulate_load_store_insn()
1078 regs->regs[insn.i_format.rt] = value; emulate_load_store_insn()
1097 regs->regs[insn.i_format.rt] = value; emulate_load_store_insn()
1120 regs->regs[insn.i_format.rt] = value; emulate_load_store_insn()
1132 value = regs->regs[insn.i_format.rt]; emulate_load_store_insn()
1152 value = regs->regs[insn.i_format.rt]; emulate_load_store_insn()
1180 value = regs->regs[insn.i_format.rt]; emulate_load_store_insn()
1220 df = insn.msa_mi10_format.df; emulate_load_store_insn()
1221 wd = insn.msa_mi10_format.wd; emulate_load_store_insn()
1224 switch (insn.msa_mi10_format.func) { emulate_load_store_insn()
1368 union mips_instruction insn; emulate_load_store_microMIPS() local
1394 mminsn.insn = word; emulate_load_store_microMIPS()
1410 insn = (union mips_instruction)(mminsn.insn); emulate_load_store_microMIPS()
1412 insn = (union mips_instruction)(mminsn.next_insn); emulate_load_store_microMIPS()
1416 switch (insn.mm_i_format.opcode) { emulate_load_store_microMIPS()
1419 switch (insn.mm_x_format.func) { emulate_load_store_microMIPS()
1421 reg = insn.mm_x_format.rd; emulate_load_store_microMIPS()
1428 switch (insn.mm_m_format.func) { emulate_load_store_microMIPS()
1430 reg = insn.mm_m_format.rd; emulate_load_store_microMIPS()
1449 reg = insn.mm_m_format.rd; emulate_load_store_microMIPS()
1469 reg = insn.mm_m_format.rd; emulate_load_store_microMIPS()
1492 reg = insn.mm_m_format.rd; emulate_load_store_microMIPS()
1514 reg = insn.mm_m_format.rd; emulate_load_store_microMIPS()
1551 reg = insn.mm_m_format.rd; emulate_load_store_microMIPS()
1589 reg = insn.mm_m_format.rd; emulate_load_store_microMIPS()
1631 reg = insn.mm_m_format.rd; emulate_load_store_microMIPS()
1677 switch (insn.mm_m_format.func) { emulate_load_store_microMIPS()
1679 reg = insn.mm_m_format.rd; emulate_load_store_microMIPS()
1687 switch (insn.mm_x_format.func) { emulate_load_store_microMIPS()
1723 reg = insn.mm_i_format.rt; emulate_load_store_microMIPS()
1727 reg = insn.mm_i_format.rt; emulate_load_store_microMIPS()
1731 reg = insn.mm_i_format.rt; emulate_load_store_microMIPS()
1735 reg = insn.mm_i_format.rt; emulate_load_store_microMIPS()
1739 reg = insn.mm_i_format.rt; emulate_load_store_microMIPS()
1743 reg = insn.mm_i_format.rt; emulate_load_store_microMIPS()
1747 reg = insn.mm_i_format.rt; emulate_load_store_microMIPS()
1751 switch (insn.mm16_m_format.func) { emulate_load_store_microMIPS()
1753 reg = insn.mm16_m_format.rlist; emulate_load_store_microMIPS()
1773 reg = insn.mm16_m_format.rlist; emulate_load_store_microMIPS()
1797 reg = reg16to32[insn.mm16_rb_format.rt]; emulate_load_store_microMIPS()
1801 reg = reg16to32[insn.mm16_rb_format.rt]; emulate_load_store_microMIPS()
1805 reg = reg16to32st[insn.mm16_rb_format.rt]; emulate_load_store_microMIPS()
1809 reg = reg16to32st[insn.mm16_rb_format.rt]; emulate_load_store_microMIPS()
1813 reg = insn.mm16_r5_format.rt; emulate_load_store_microMIPS()
1817 reg = insn.mm16_r5_format.rt; emulate_load_store_microMIPS()
1821 reg = reg16to32[insn.mm16_r3_format.rt]; emulate_load_store_microMIPS()
H A Dkprobes.c56 static int __kprobes insn_has_delayslot(union mips_instruction insn) insn_has_delayslot() argument
58 switch (insn.i_format.opcode) { insn_has_delayslot()
65 switch (insn.r_format.func) { insn_has_delayslot()
124 static int __kprobes insn_has_ll_or_sc(union mips_instruction insn) insn_has_ll_or_sc() argument
128 switch (insn.i_format.opcode) { insn_has_ll_or_sc()
143 union mips_instruction insn; arch_prepare_kprobe() local
147 insn = p->addr[0]; arch_prepare_kprobe()
149 if (insn_has_ll_or_sc(insn)) { arch_prepare_kprobe()
164 /* insn: must be on special executable page on mips. */ arch_prepare_kprobe()
165 p->ainsn.insn = get_insn_slot(); arch_prepare_kprobe()
166 if (!p->ainsn.insn) { arch_prepare_kprobe()
172 * In the kprobe->ainsn.insn[] array we store the original arch_prepare_kprobe()
184 if (insn_has_delayslot(insn)) arch_prepare_kprobe()
185 memcpy(&p->ainsn.insn[0], p->addr + 1, sizeof(kprobe_opcode_t)); arch_prepare_kprobe()
187 memcpy(&p->ainsn.insn[0], p->addr, sizeof(kprobe_opcode_t)); arch_prepare_kprobe()
189 p->ainsn.insn[1] = breakpoint2_insn; arch_prepare_kprobe()
210 if (p->ainsn.insn) { arch_remove_kprobe()
211 free_insn_slot(p->ainsn.insn, 0); arch_remove_kprobe()
212 p->ainsn.insn = NULL; arch_remove_kprobe()
258 union mips_instruction insn = p->opcode; evaluate_branch_instruction() local
266 if (p->ainsn.insn->word == 0) evaluate_branch_instruction()
271 ret = __compute_return_epc_for_insn(regs, insn); evaluate_branch_instruction()
307 regs->cp0_epc = (unsigned long)&p->ainsn.insn[0]; prepare_singlestep()
316 * copy is p->ainsn.insn.
355 p->ainsn.insn->word == breakpoint_insn.word) { kprobe_handler()
H A Dmodule.c126 /* Sign extend the addend we extract from the lo insn. */ apply_r_mips_lo16_rel()
133 unsigned long insn; apply_r_mips_lo16_rel() local
147 insn = *l->addr; apply_r_mips_lo16_rel()
148 val = ((insn & 0xffff) << 16) + vallo; apply_r_mips_lo16_rel()
157 insn = (insn & ~0xffff) | val; apply_r_mips_lo16_rel()
158 *l->addr = insn; apply_r_mips_lo16_rel()
/linux-4.4.14/kernel/bpf/
H A Dverifier.c23 * All paths of conditional branches are analyzed until 'bpf_exit' insn.
31 * The second pass is all possible path descent from the 1st insn.
33 * analysis is limited to 32k insn, which may be hit even if total number of
34 * insn is less then 4K, but there are too many branches that change stack/regs.
54 * 1st insn copies R10 (which has FRAME_PTR) type into R1
57 * So after 2nd insn, the register R1 has type PTR_TO_STACK
103 * BPF_MOV64_REG(BPF_REG_2, BPF_REG_10), // after this insn R2 type is FRAME_PTR
104 * BPF_ALU64_IMM(BPF_ADD, BPF_REG_2, -4), // after this insn R2 type is PTR_TO_STACK
105 * BPF_LD_MAP_FD(BPF_REG_1, map_fd), // after this insn R1 type is CONST_PTR_TO_MAP
114 * If it's ok, then verifier allows this BPF_CALL insn and looks at
120 * insn, the register holding that pointer in the true branch changes state to
316 static void print_bpf_insn(struct bpf_insn *insn) print_bpf_insn() argument
318 u8 class = BPF_CLASS(insn->code); print_bpf_insn()
321 if (BPF_SRC(insn->code) == BPF_X) print_bpf_insn()
323 insn->code, class == BPF_ALU ? "(u32) " : "", print_bpf_insn()
324 insn->dst_reg, print_bpf_insn()
325 bpf_alu_string[BPF_OP(insn->code) >> 4], print_bpf_insn()
327 insn->src_reg); print_bpf_insn()
330 insn->code, class == BPF_ALU ? "(u32) " : "", print_bpf_insn()
331 insn->dst_reg, print_bpf_insn()
332 bpf_alu_string[BPF_OP(insn->code) >> 4], print_bpf_insn()
334 insn->imm); print_bpf_insn()
336 if (BPF_MODE(insn->code) == BPF_MEM) print_bpf_insn()
338 insn->code, print_bpf_insn()
339 bpf_ldst_string[BPF_SIZE(insn->code) >> 3], print_bpf_insn()
340 insn->dst_reg, print_bpf_insn()
341 insn->off, insn->src_reg); print_bpf_insn()
342 else if (BPF_MODE(insn->code) == BPF_XADD) print_bpf_insn()
344 insn->code, print_bpf_insn()
345 bpf_ldst_string[BPF_SIZE(insn->code) >> 3], print_bpf_insn()
346 insn->dst_reg, insn->off, print_bpf_insn()
347 insn->src_reg); print_bpf_insn()
349 verbose("BUG_%02x\n", insn->code); print_bpf_insn()
351 if (BPF_MODE(insn->code) != BPF_MEM) { print_bpf_insn()
352 verbose("BUG_st_%02x\n", insn->code); print_bpf_insn()
356 insn->code, print_bpf_insn()
357 bpf_ldst_string[BPF_SIZE(insn->code) >> 3], print_bpf_insn()
358 insn->dst_reg, print_bpf_insn()
359 insn->off, insn->imm); print_bpf_insn()
361 if (BPF_MODE(insn->code) != BPF_MEM) { print_bpf_insn()
362 verbose("BUG_ldx_%02x\n", insn->code); print_bpf_insn()
366 insn->code, insn->dst_reg, print_bpf_insn()
367 bpf_ldst_string[BPF_SIZE(insn->code) >> 3], print_bpf_insn()
368 insn->src_reg, insn->off); print_bpf_insn()
370 if (BPF_MODE(insn->code) == BPF_ABS) { print_bpf_insn()
372 insn->code, print_bpf_insn()
373 bpf_ldst_string[BPF_SIZE(insn->code) >> 3], print_bpf_insn()
374 insn->imm); print_bpf_insn()
375 } else if (BPF_MODE(insn->code) == BPF_IND) { print_bpf_insn()
377 insn->code, print_bpf_insn()
378 bpf_ldst_string[BPF_SIZE(insn->code) >> 3], print_bpf_insn()
379 insn->src_reg, insn->imm); print_bpf_insn()
380 } else if (BPF_MODE(insn->code) == BPF_IMM) { print_bpf_insn()
382 insn->code, insn->dst_reg, insn->imm); print_bpf_insn()
384 verbose("BUG_ld_%02x\n", insn->code); print_bpf_insn()
388 u8 opcode = BPF_OP(insn->code); print_bpf_insn()
391 verbose("(%02x) call %d\n", insn->code, insn->imm); print_bpf_insn()
392 } else if (insn->code == (BPF_JMP | BPF_JA)) { print_bpf_insn()
394 insn->code, insn->off); print_bpf_insn()
395 } else if (insn->code == (BPF_JMP | BPF_EXIT)) { print_bpf_insn()
396 verbose("(%02x) exit\n", insn->code); print_bpf_insn()
397 } else if (BPF_SRC(insn->code) == BPF_X) { print_bpf_insn()
399 insn->code, insn->dst_reg, print_bpf_insn()
400 bpf_jmp_string[BPF_OP(insn->code) >> 4], print_bpf_insn()
401 insn->src_reg, insn->off); print_bpf_insn()
404 insn->code, insn->dst_reg, print_bpf_insn()
405 bpf_jmp_string[BPF_OP(insn->code) >> 4], print_bpf_insn()
406 insn->imm, insn->off); print_bpf_insn()
409 verbose("(%02x) %s\n", insn->code, bpf_class_string[class]); print_bpf_insn()
736 static int check_xadd(struct verifier_env *env, struct bpf_insn *insn) check_xadd() argument
741 if ((BPF_SIZE(insn->code) != BPF_W && BPF_SIZE(insn->code) != BPF_DW) || check_xadd()
742 insn->imm != 0) { check_xadd()
748 err = check_reg_arg(regs, insn->src_reg, SRC_OP); check_xadd()
753 err = check_reg_arg(regs, insn->dst_reg, SRC_OP); check_xadd()
758 err = check_mem_access(env, insn->dst_reg, insn->off, check_xadd()
759 BPF_SIZE(insn->code), BPF_READ, -1); check_xadd()
764 return check_mem_access(env, insn->dst_reg, insn->off, check_xadd()
765 BPF_SIZE(insn->code), BPF_WRITE, -1); check_xadd()
1015 static int check_alu_op(struct verifier_env *env, struct bpf_insn *insn) check_alu_op() argument
1018 u8 opcode = BPF_OP(insn->code); check_alu_op()
1023 if (BPF_SRC(insn->code) != 0 || check_alu_op()
1024 insn->src_reg != BPF_REG_0 || check_alu_op()
1025 insn->off != 0 || insn->imm != 0) { check_alu_op()
1030 if (insn->src_reg != BPF_REG_0 || insn->off != 0 || check_alu_op()
1031 (insn->imm != 16 && insn->imm != 32 && insn->imm != 64)) { check_alu_op()
1038 err = check_reg_arg(regs, insn->dst_reg, SRC_OP); check_alu_op()
1042 if (is_pointer_value(env, insn->dst_reg)) { check_alu_op()
1044 insn->dst_reg); check_alu_op()
1049 err = check_reg_arg(regs, insn->dst_reg, DST_OP); check_alu_op()
1055 if (BPF_SRC(insn->code) == BPF_X) { check_alu_op()
1056 if (insn->imm != 0 || insn->off != 0) { check_alu_op()
1062 err = check_reg_arg(regs, insn->src_reg, SRC_OP); check_alu_op()
1066 if (insn->src_reg != BPF_REG_0 || insn->off != 0) { check_alu_op()
1073 err = check_reg_arg(regs, insn->dst_reg, DST_OP); check_alu_op()
1077 if (BPF_SRC(insn->code) == BPF_X) { check_alu_op()
1078 if (BPF_CLASS(insn->code) == BPF_ALU64) { check_alu_op()
1082 regs[insn->dst_reg] = regs[insn->src_reg]; check_alu_op()
1084 if (is_pointer_value(env, insn->src_reg)) { check_alu_op()
1086 insn->src_reg); check_alu_op()
1089 regs[insn->dst_reg].type = UNKNOWN_VALUE; check_alu_op()
1090 regs[insn->dst_reg].map_ptr = NULL; check_alu_op()
1096 regs[insn->dst_reg].type = CONST_IMM; check_alu_op()
1097 regs[insn->dst_reg].imm = insn->imm; check_alu_op()
1108 if (BPF_SRC(insn->code) == BPF_X) { check_alu_op()
1109 if (insn->imm != 0 || insn->off != 0) { check_alu_op()
1114 err = check_reg_arg(regs, insn->src_reg, SRC_OP); check_alu_op()
1118 if (insn->src_reg != BPF_REG_0 || insn->off != 0) { check_alu_op()
1125 err = check_reg_arg(regs, insn->dst_reg, SRC_OP); check_alu_op()
1130 BPF_SRC(insn->code) == BPF_K && insn->imm == 0) { check_alu_op()
1136 opcode == BPF_ARSH) && BPF_SRC(insn->code) == BPF_K) { check_alu_op()
1137 int size = BPF_CLASS(insn->code) == BPF_ALU64 ? 64 : 32; check_alu_op()
1139 if (insn->imm < 0 || insn->imm >= size) { check_alu_op()
1140 verbose("invalid shift %d\n", insn->imm); check_alu_op()
1146 if (opcode == BPF_ADD && BPF_CLASS(insn->code) == BPF_ALU64 && check_alu_op()
1147 regs[insn->dst_reg].type == FRAME_PTR && check_alu_op()
1148 BPF_SRC(insn->code) == BPF_K) { check_alu_op()
1150 } else if (is_pointer_value(env, insn->dst_reg)) { check_alu_op()
1152 insn->dst_reg); check_alu_op()
1154 } else if (BPF_SRC(insn->code) == BPF_X && check_alu_op()
1155 is_pointer_value(env, insn->src_reg)) { check_alu_op()
1157 insn->src_reg); check_alu_op()
1162 err = check_reg_arg(regs, insn->dst_reg, DST_OP); check_alu_op()
1167 regs[insn->dst_reg].type = PTR_TO_STACK; check_alu_op()
1168 regs[insn->dst_reg].imm = insn->imm; check_alu_op()
1176 struct bpf_insn *insn, int *insn_idx) check_cond_jmp_op()
1180 u8 opcode = BPF_OP(insn->code); check_cond_jmp_op()
1188 if (BPF_SRC(insn->code) == BPF_X) { check_cond_jmp_op()
1189 if (insn->imm != 0) { check_cond_jmp_op()
1195 err = check_reg_arg(regs, insn->src_reg, SRC_OP); check_cond_jmp_op()
1199 if (is_pointer_value(env, insn->src_reg)) { check_cond_jmp_op()
1201 insn->src_reg); check_cond_jmp_op()
1205 if (insn->src_reg != BPF_REG_0) { check_cond_jmp_op()
1212 err = check_reg_arg(regs, insn->dst_reg, SRC_OP); check_cond_jmp_op()
1217 if (BPF_SRC(insn->code) == BPF_K && check_cond_jmp_op()
1219 regs[insn->dst_reg].type == CONST_IMM && check_cond_jmp_op()
1220 regs[insn->dst_reg].imm == insn->imm) { check_cond_jmp_op()
1225 *insn_idx += insn->off; check_cond_jmp_op()
1236 other_branch = push_stack(env, *insn_idx + insn->off + 1, *insn_idx); check_cond_jmp_op()
1241 if (BPF_SRC(insn->code) == BPF_K && check_cond_jmp_op()
1242 insn->imm == 0 && (opcode == BPF_JEQ || check_cond_jmp_op()
1244 regs[insn->dst_reg].type == PTR_TO_MAP_VALUE_OR_NULL) { check_cond_jmp_op()
1246 /* next fallthrough insn can access memory via check_cond_jmp_op()
1249 regs[insn->dst_reg].type = PTR_TO_MAP_VALUE; check_cond_jmp_op()
1251 other_branch->regs[insn->dst_reg].type = CONST_IMM; check_cond_jmp_op()
1252 other_branch->regs[insn->dst_reg].imm = 0; check_cond_jmp_op()
1254 other_branch->regs[insn->dst_reg].type = PTR_TO_MAP_VALUE; check_cond_jmp_op()
1255 regs[insn->dst_reg].type = CONST_IMM; check_cond_jmp_op()
1256 regs[insn->dst_reg].imm = 0; check_cond_jmp_op()
1258 } else if (is_pointer_value(env, insn->dst_reg)) { check_cond_jmp_op()
1259 verbose("R%d pointer comparison prohibited\n", insn->dst_reg); check_cond_jmp_op()
1261 } else if (BPF_SRC(insn->code) == BPF_K && check_cond_jmp_op()
1268 other_branch->regs[insn->dst_reg].type = CONST_IMM; check_cond_jmp_op()
1269 other_branch->regs[insn->dst_reg].imm = insn->imm; check_cond_jmp_op()
1274 regs[insn->dst_reg].type = CONST_IMM; check_cond_jmp_op()
1275 regs[insn->dst_reg].imm = insn->imm; check_cond_jmp_op()
1284 static struct bpf_map *ld_imm64_to_map_ptr(struct bpf_insn *insn) ld_imm64_to_map_ptr() argument
1286 u64 imm64 = ((u64) (u32) insn[0].imm) | ((u64) (u32) insn[1].imm) << 32; ld_imm64_to_map_ptr()
1292 static int check_ld_imm(struct verifier_env *env, struct bpf_insn *insn) check_ld_imm() argument
1297 if (BPF_SIZE(insn->code) != BPF_DW) { check_ld_imm()
1298 verbose("invalid BPF_LD_IMM insn\n"); check_ld_imm()
1301 if (insn->off != 0) { check_ld_imm()
1306 err = check_reg_arg(regs, insn->dst_reg, DST_OP); check_ld_imm()
1310 if (insn->src_reg == 0) check_ld_imm()
1315 BUG_ON(insn->src_reg != BPF_PSEUDO_MAP_FD); check_ld_imm()
1317 regs[insn->dst_reg].type = CONST_PTR_TO_MAP; check_ld_imm()
1318 regs[insn->dst_reg].map_ptr = ld_imm64_to_map_ptr(insn); check_ld_imm()
1349 static int check_ld_abs(struct verifier_env *env, struct bpf_insn *insn) check_ld_abs() argument
1352 u8 mode = BPF_MODE(insn->code); check_ld_abs()
1361 if (insn->dst_reg != BPF_REG_0 || insn->off != 0 || check_ld_abs()
1362 BPF_SIZE(insn->code) == BPF_DW || check_ld_abs()
1363 (mode == BPF_ABS && insn->src_reg != BPF_REG_0)) { check_ld_abs()
1380 err = check_reg_arg(regs, insn->src_reg, SRC_OP); check_ld_abs()
1459 verbose("jump out of range from insn %d to %d\n", t, w); push_insn()
1476 verbose("back-edge from insn %d to %d\n", t, w); push_insn()
1482 verbose("insn state internal bug\n"); push_insn()
1508 insn_state[0] = DISCOVERED; /* mark 1st insn as discovered */ check_cfg()
1582 verbose("unreachable insn %d\n", i); check_cfg()
1719 struct bpf_insn *insn; do_check() local
1724 verbose("invalid insn idx %d insn_cnt %d\n", do_check()
1729 insn = &insns[insn_idx]; do_check()
1730 class = BPF_CLASS(insn->code); do_check()
1733 verbose("BPF program is too large. Proccessed %d insn\n", do_check()
1761 print_bpf_insn(insn); do_check()
1765 err = check_alu_op(env, insn); do_check()
1775 err = check_reg_arg(regs, insn->src_reg, SRC_OP); do_check()
1779 err = check_reg_arg(regs, insn->dst_reg, DST_OP_NO_MARK); do_check()
1783 src_reg_type = regs[insn->src_reg].type; do_check()
1788 err = check_mem_access(env, insn->src_reg, insn->off, do_check()
1789 BPF_SIZE(insn->code), BPF_READ, do_check()
1790 insn->dst_reg); do_check()
1794 if (BPF_SIZE(insn->code) != BPF_W) { do_check()
1799 if (insn->imm == 0) { do_check()
1800 /* saw a valid insn do_check()
1802 * use reserved 'imm' field to mark this insn do_check()
1804 insn->imm = src_reg_type; do_check()
1806 } else if (src_reg_type != insn->imm && do_check()
1808 insn->imm == PTR_TO_CTX)) { do_check()
1809 /* ABuser program is trying to use the same insn do_check()
1816 verbose("same insn cannot be used with different pointers\n"); do_check()
1823 if (BPF_MODE(insn->code) == BPF_XADD) { do_check()
1824 err = check_xadd(env, insn); do_check()
1832 err = check_reg_arg(regs, insn->src_reg, SRC_OP); do_check()
1836 err = check_reg_arg(regs, insn->dst_reg, SRC_OP); do_check()
1840 dst_reg_type = regs[insn->dst_reg].type; do_check()
1843 err = check_mem_access(env, insn->dst_reg, insn->off, do_check()
1844 BPF_SIZE(insn->code), BPF_WRITE, do_check()
1845 insn->src_reg); do_check()
1849 if (insn->imm == 0) { do_check()
1850 insn->imm = dst_reg_type; do_check()
1851 } else if (dst_reg_type != insn->imm && do_check()
1853 insn->imm == PTR_TO_CTX)) { do_check()
1854 verbose("same insn cannot be used with different pointers\n"); do_check()
1859 if (BPF_MODE(insn->code) != BPF_MEM || do_check()
1860 insn->src_reg != BPF_REG_0) { do_check()
1865 err = check_reg_arg(regs, insn->dst_reg, SRC_OP); do_check()
1870 err = check_mem_access(env, insn->dst_reg, insn->off, do_check()
1871 BPF_SIZE(insn->code), BPF_WRITE, do_check()
1877 u8 opcode = BPF_OP(insn->code); do_check()
1880 if (BPF_SRC(insn->code) != BPF_K || do_check()
1881 insn->off != 0 || do_check()
1882 insn->src_reg != BPF_REG_0 || do_check()
1883 insn->dst_reg != BPF_REG_0) { do_check()
1888 err = check_call(env, insn->imm); do_check()
1893 if (BPF_SRC(insn->code) != BPF_K || do_check()
1894 insn->imm != 0 || do_check()
1895 insn->src_reg != BPF_REG_0 || do_check()
1896 insn->dst_reg != BPF_REG_0) { do_check()
1901 insn_idx += insn->off + 1; do_check()
1905 if (BPF_SRC(insn->code) != BPF_K || do_check()
1906 insn->imm != 0 || do_check()
1907 insn->src_reg != BPF_REG_0 || do_check()
1908 insn->dst_reg != BPF_REG_0) { do_check()
1937 err = check_cond_jmp_op(env, insn, &insn_idx); do_check()
1942 u8 mode = BPF_MODE(insn->code); do_check()
1945 err = check_ld_abs(env, insn); do_check()
1950 err = check_ld_imm(env, insn); do_check()
1960 verbose("unknown insn class %d\n", class); do_check()
1975 struct bpf_insn *insn = env->prog->insnsi; replace_map_fd_with_map_ptr() local
1979 for (i = 0; i < insn_cnt; i++, insn++) { replace_map_fd_with_map_ptr()
1980 if (BPF_CLASS(insn->code) == BPF_LDX && replace_map_fd_with_map_ptr()
1981 (BPF_MODE(insn->code) != BPF_MEM || insn->imm != 0)) { replace_map_fd_with_map_ptr()
1986 if (BPF_CLASS(insn->code) == BPF_STX && replace_map_fd_with_map_ptr()
1987 ((BPF_MODE(insn->code) != BPF_MEM && replace_map_fd_with_map_ptr()
1988 BPF_MODE(insn->code) != BPF_XADD) || insn->imm != 0)) { replace_map_fd_with_map_ptr()
1993 if (insn[0].code == (BPF_LD | BPF_IMM | BPF_DW)) { replace_map_fd_with_map_ptr()
1997 if (i == insn_cnt - 1 || insn[1].code != 0 || replace_map_fd_with_map_ptr()
1998 insn[1].dst_reg != 0 || insn[1].src_reg != 0 || replace_map_fd_with_map_ptr()
1999 insn[1].off != 0) { replace_map_fd_with_map_ptr()
2000 verbose("invalid bpf_ld_imm64 insn\n"); replace_map_fd_with_map_ptr()
2004 if (insn->src_reg == 0) replace_map_fd_with_map_ptr()
2008 if (insn->src_reg != BPF_PSEUDO_MAP_FD) { replace_map_fd_with_map_ptr()
2009 verbose("unrecognized bpf_ld_imm64 insn\n"); replace_map_fd_with_map_ptr()
2013 f = fdget(insn->imm); replace_map_fd_with_map_ptr()
2017 insn->imm); replace_map_fd_with_map_ptr()
2022 insn[0].imm = (u32) (unsigned long) map; replace_map_fd_with_map_ptr()
2023 insn[1].imm = ((u64) (unsigned long) map) >> 32; replace_map_fd_with_map_ptr()
2051 insn++; replace_map_fd_with_map_ptr()
2075 struct bpf_insn *insn = env->prog->insnsi; convert_pseudo_ld_imm64() local
2079 for (i = 0; i < insn_cnt; i++, insn++) convert_pseudo_ld_imm64()
2080 if (insn->code == (BPF_LD | BPF_IMM | BPF_DW)) convert_pseudo_ld_imm64()
2081 insn->src_reg = 0; convert_pseudo_ld_imm64()
2086 struct bpf_insn *insn = prog->insnsi; adjust_branches() local
2090 for (i = 0; i < insn_cnt; i++, insn++) { adjust_branches()
2091 if (BPF_CLASS(insn->code) != BPF_JMP || adjust_branches()
2092 BPF_OP(insn->code) == BPF_CALL || adjust_branches()
2093 BPF_OP(insn->code) == BPF_EXIT) adjust_branches()
2097 if (i < pos && i + insn->off + 1 > pos) adjust_branches()
2098 insn->off += delta; adjust_branches()
2099 else if (i > pos + delta && i + insn->off + 1 <= pos + delta) adjust_branches()
2100 insn->off -= delta; adjust_branches()
2109 struct bpf_insn *insn = env->prog->insnsi; convert_ctx_accesses() local
2120 for (i = 0; i < insn_cnt; i++, insn++) { convert_ctx_accesses()
2121 if (insn->code == (BPF_LDX | BPF_MEM | BPF_W)) convert_ctx_accesses()
2123 else if (insn->code == (BPF_STX | BPF_MEM | BPF_W)) convert_ctx_accesses()
2128 if (insn->imm != PTR_TO_CTX) { convert_ctx_accesses()
2130 insn->imm = 0; convert_ctx_accesses()
2135 convert_ctx_access(type, insn->dst_reg, insn->src_reg, convert_ctx_accesses()
2136 insn->off, insn_buf, env->prog); convert_ctx_accesses()
2143 memcpy(insn, insn_buf, sizeof(*insn)); convert_ctx_accesses()
2158 sizeof(*insn) * (insn_cnt - i - cnt)); convert_ctx_accesses()
2161 memcpy(new_prog->insnsi + i, insn_buf, sizeof(*insn) * cnt); convert_ctx_accesses()
2168 insn = new_prog->insnsi + i + cnt - 1; convert_ctx_accesses()
1175 check_cond_jmp_op(struct verifier_env *env, struct bpf_insn *insn, int *insn_idx) check_cond_jmp_op() argument
H A Dcore.c47 #define DST regs[insn->dst_reg]
48 #define SRC regs[insn->src_reg]
52 #define IMM insn->imm
191 * @insn: is the array of eBPF instructions
195 static unsigned int __bpf_prog_run(void *ctx, const struct bpf_insn *insn) __bpf_prog_run() argument
303 #define CONT ({ insn++; goto select_insn; }) __bpf_prog_run()
304 #define CONT_JMP ({ insn++; goto select_insn; }) __bpf_prog_run()
314 goto *jumptable[insn->code]; __bpf_prog_run()
359 DST = (u64) (u32) insn[0].imm | ((u64) (u32) insn[1].imm) << 32; __bpf_prog_run()
360 insn++; __bpf_prog_run()
441 BPF_R0 = (__bpf_call_base + insn->imm)(BPF_R1, BPF_R2, BPF_R3, __bpf_prog_run()
468 insn = prog->insnsi; __bpf_prog_run()
475 insn += insn->off; __bpf_prog_run()
479 insn += insn->off; __bpf_prog_run()
485 insn += insn->off; __bpf_prog_run()
491 insn += insn->off; __bpf_prog_run()
497 insn += insn->off; __bpf_prog_run()
503 insn += insn->off; __bpf_prog_run()
509 insn += insn->off; __bpf_prog_run()
515 insn += insn->off; __bpf_prog_run()
521 insn += insn->off; __bpf_prog_run()
527 insn += insn->off; __bpf_prog_run()
533 insn += insn->off; __bpf_prog_run()
539 insn += insn->off; __bpf_prog_run()
545 insn += insn->off; __bpf_prog_run()
551 insn += insn->off; __bpf_prog_run()
557 insn += insn->off; __bpf_prog_run()
567 *(SIZE *)(unsigned long) (DST + insn->off) = SRC; \ __bpf_prog_run()
570 *(SIZE *)(unsigned long) (DST + insn->off) = IMM; \ __bpf_prog_run()
573 DST = *(SIZE *)(unsigned long) (SRC + insn->off); \ __bpf_prog_run()
583 (DST + insn->off)); __bpf_prog_run()
587 (DST + insn->off)); __bpf_prog_run()
653 WARN_RATELIMIT(1, "unknown opcode %02x\n", insn->code); __bpf_prog_run()
/linux-4.4.14/arch/sparc/kernel/
H A Dunaligned_32.c32 static inline enum direction decode_direction(unsigned int insn) decode_direction() argument
34 unsigned long tmp = (insn >> 21) & 1; decode_direction()
39 if(((insn>>19)&0x3f) == 15) decode_direction()
47 static inline int decode_access_size(unsigned int insn) decode_access_size() argument
49 insn = (insn >> 19) & 3; decode_access_size()
51 if(!insn) decode_access_size()
53 else if(insn == 3) decode_access_size()
55 else if(insn == 2) decode_access_size()
58 printk("Impossible unaligned trap. insn=%08x\n", insn); decode_access_size()
65 static inline int decode_signedness(unsigned int insn) decode_signedness() argument
67 return (insn & 0x400000); decode_signedness()
135 unsigned int insn) compute_effective_address()
137 unsigned int rs1 = (insn >> 14) & 0x1f; compute_effective_address()
138 unsigned int rs2 = insn & 0x1f; compute_effective_address()
139 unsigned int rd = (insn >> 25) & 0x1f; compute_effective_address()
141 if(insn & 0x2000) { compute_effective_address()
143 return (fetch_reg(rs1, regs) + sign_extend_imm13(insn)); compute_effective_address()
151 unsigned int insn) safe_compute_effective_address()
153 unsigned int rs1 = (insn >> 14) & 0x1f; safe_compute_effective_address()
154 unsigned int rs2 = insn & 0x1f; safe_compute_effective_address()
155 unsigned int rd = (insn >> 25) & 0x1f; safe_compute_effective_address()
157 if(insn & 0x2000) { safe_compute_effective_address()
159 return (safe_fetch_reg(rs1, regs) + sign_extend_imm13(insn)); safe_compute_effective_address()
203 static inline int floating_point_load_or_store_p(unsigned int insn) floating_point_load_or_store_p() argument
205 return (insn >> 24) & 1; floating_point_load_or_store_p()
208 static inline int ok_for_kernel(unsigned int insn) ok_for_kernel() argument
210 return !floating_point_load_or_store_p(insn); ok_for_kernel()
213 static void kernel_mna_trap_fault(struct pt_regs *regs, unsigned int insn) kernel_mna_trap_fault() argument
219 unsigned long address = compute_effective_address(regs, insn); kernel_mna_trap_fault()
239 asmlinkage void kernel_unaligned_trap(struct pt_regs *regs, unsigned int insn) kernel_unaligned_trap() argument
241 enum direction dir = decode_direction(insn); kernel_unaligned_trap()
242 int size = decode_access_size(insn); kernel_unaligned_trap()
244 if(!ok_for_kernel(insn) || dir == both) { kernel_unaligned_trap()
249 unsigned long addr = compute_effective_address(regs, insn); kernel_unaligned_trap()
255 err = do_int_load(fetch_reg_addr(((insn>>25)&0x1f), kernel_unaligned_trap()
258 decode_signedness(insn)); kernel_unaligned_trap()
262 err = do_int_store(((insn>>25)&0x1f), size, kernel_unaligned_trap()
270 kernel_mna_trap_fault(regs, insn); kernel_unaligned_trap()
276 static inline int ok_for_user(struct pt_regs *regs, unsigned int insn, ok_for_user() argument
281 int size = ((insn >> 19) & 3) == 3 ? 8 : 4; ok_for_user()
290 reg = (insn >> 25) & 0x1f; ok_for_user()
295 reg = (insn >> 14) & 0x1f; ok_for_user()
300 if (!(insn & 0x2000)) { ok_for_user()
301 reg = (insn & 0x1f); ok_for_user()
311 static void user_mna_trap_fault(struct pt_regs *regs, unsigned int insn) user_mna_trap_fault() argument
318 info.si_addr = (void __user *)safe_compute_effective_address(regs, insn); user_mna_trap_fault()
323 asmlinkage void user_unaligned_trap(struct pt_regs *regs, unsigned int insn) user_unaligned_trap() argument
328 (((insn >> 30) & 3) != 3)) user_unaligned_trap()
330 dir = decode_direction(insn); user_unaligned_trap()
331 if(!ok_for_user(regs, insn, dir)) { user_unaligned_trap()
334 int err, size = decode_access_size(insn); user_unaligned_trap()
337 if(floating_point_load_or_store_p(insn)) { user_unaligned_trap()
342 addr = compute_effective_address(regs, insn); user_unaligned_trap()
346 err = do_int_load(fetch_reg_addr(((insn>>25)&0x1f), user_unaligned_trap()
349 decode_signedness(insn)); user_unaligned_trap()
353 err = do_int_store(((insn>>25)&0x1f), size, user_unaligned_trap()
378 user_mna_trap_fault(regs, insn); user_unaligned_trap()
134 compute_effective_address(struct pt_regs *regs, unsigned int insn) compute_effective_address() argument
150 safe_compute_effective_address(struct pt_regs *regs, unsigned int insn) safe_compute_effective_address() argument
H A Djump_label.c17 u32 *insn = (u32 *) (unsigned long) entry->code; arch_jump_label_transform() local
35 *insn = val; arch_jump_label_transform()
36 flushi(insn); arch_jump_label_transform()
H A Dvisemul.c293 static void edge(struct pt_regs *regs, unsigned int insn, unsigned int opf) edge() argument
298 maybe_flush_windows(RS1(insn), RS2(insn), RD(insn), 0); edge()
299 orig_rs1 = rs1 = fetch_reg(RS1(insn), regs); edge()
300 orig_rs2 = rs2 = fetch_reg(RS2(insn), regs); edge()
349 store_reg(regs, rd_val, RD(insn)); edge()
371 static void array(struct pt_regs *regs, unsigned int insn, unsigned int opf) array() argument
376 maybe_flush_windows(RS1(insn), RS2(insn), RD(insn), 0); array()
377 rs1 = fetch_reg(RS1(insn), regs); array()
378 rs2 = fetch_reg(RS2(insn), regs); array()
402 store_reg(regs, rd_val, RD(insn)); array()
405 static void bmask(struct pt_regs *regs, unsigned int insn) bmask() argument
409 maybe_flush_windows(RS1(insn), RS2(insn), RD(insn), 0); bmask()
410 rs1 = fetch_reg(RS1(insn), regs); bmask()
411 rs2 = fetch_reg(RS2(insn), regs); bmask()
414 store_reg(regs, rd_val, RD(insn)); bmask()
421 static void bshuffle(struct pt_regs *regs, unsigned int insn) bshuffle() argument
429 rs1 = fpd_regval(f, RS1(insn)); bshuffle()
430 rs2 = fpd_regval(f, RS2(insn)); bshuffle()
444 *fpd_regaddr(f, RD(insn)) = rd_val; bshuffle()
447 static void pdist(struct pt_regs *regs, unsigned int insn) pdist() argument
453 rs1 = fpd_regval(f, RS1(insn)); pdist()
454 rs2 = fpd_regval(f, RS2(insn)); pdist()
455 rd = fpd_regaddr(f, RD(insn)); pdist()
476 static void pformat(struct pt_regs *regs, unsigned int insn, unsigned int opf) pformat() argument
487 rs2 = fpd_regval(f, RS2(insn)); pformat()
502 *fps_regaddr(f, RD(insn)) = rd_val; pformat()
509 rs1 = fpd_regval(f, RS1(insn)); pformat()
510 rs2 = fpd_regval(f, RS2(insn)); pformat()
525 *fpd_regaddr(f, RD(insn)) = rd_val; pformat()
532 rs2 = fpd_regval(f, RS2(insn)); pformat()
548 *fps_regaddr(f, RD(insn)) = rd_val; pformat()
555 rs2 = fps_regval(f, RS2(insn)); pformat()
566 *fpd_regaddr(f, RD(insn)) = rd_val; pformat()
571 rs1 = fps_regval(f, RS1(insn)); pformat()
572 rs2 = fps_regval(f, RS2(insn)); pformat()
582 *fpd_regaddr(f, RD(insn)) = rd_val; pformat()
588 static void pmul(struct pt_regs *regs, unsigned int insn, unsigned int opf) pmul() argument
597 rs1 = fps_regval(f, RS1(insn)); pmul()
598 rs2 = fpd_regval(f, RS2(insn)); pmul()
613 *fpd_regaddr(f, RD(insn)) = rd_val; pmul()
622 rs1 = fps_regval(f, RS1(insn)); pmul()
623 rs2 = fps_regval(f, RS2(insn)); pmul()
638 *fpd_regaddr(f, RD(insn)) = rd_val; pmul()
646 rs1 = fpd_regval(f, RS1(insn)); pmul()
647 rs2 = fpd_regval(f, RS2(insn)); pmul()
668 *fpd_regaddr(f, RD(insn)) = rd_val; pmul()
676 rs1 = fps_regval(f, RS1(insn)); pmul()
677 rs2 = fps_regval(f, RS2(insn)); pmul()
698 *fpd_regaddr(f, RD(insn)) = rd_val; pmul()
704 static void pcmp(struct pt_regs *regs, unsigned int insn, unsigned int opf) pcmp() argument
709 rs1 = fpd_regval(f, RS1(insn)); pcmp()
710 rs2 = fpd_regval(f, RS2(insn)); pcmp()
796 maybe_flush_windows(0, 0, RD(insn), 0); pcmp()
797 store_reg(regs, rd_val, RD(insn)); pcmp()
803 int vis_emul(struct pt_regs *regs, unsigned int insn) vis_emul() argument
815 if (get_user(insn, (u32 __user *) pc)) vis_emul()
820 opf = (insn & VIS_OPF_MASK) >> VIS_OPF_SHIFT; vis_emul()
831 pformat(regs, insn, opf); vis_emul()
842 pmul(regs, insn, opf); vis_emul()
854 pcmp(regs, insn, opf); vis_emul()
870 edge(regs, insn, opf); vis_emul()
875 pdist(regs, insn); vis_emul()
882 array(regs, insn, opf); vis_emul()
887 bmask(regs, insn); vis_emul()
891 bshuffle(regs, insn); vis_emul()
H A Dunaligned_64.c41 static inline enum direction decode_direction(unsigned int insn) decode_direction() argument
43 unsigned long tmp = (insn >> 21) & 1; decode_direction()
48 switch ((insn>>19)&0xf) { decode_direction()
58 static inline int decode_access_size(struct pt_regs *regs, unsigned int insn) decode_access_size() argument
62 tmp = ((insn >> 19) & 0xf); decode_access_size()
73 printk("Impossible unaligned trap. insn=%08x\n", insn); decode_access_size()
86 static inline int decode_asi(unsigned int insn, struct pt_regs *regs) decode_asi() argument
88 if (insn & 0x800000) { decode_asi()
89 if (insn & 0x2000) decode_asi()
92 return (unsigned char)(insn >> 5); /* imm_asi */ decode_asi()
98 static inline int decode_signedness(unsigned int insn) decode_signedness() argument
100 return (insn & 0x400000); decode_signedness()
169 unsigned int insn, unsigned int rd) compute_effective_address()
172 unsigned int rs1 = (insn >> 14) & 0x1f; compute_effective_address()
173 unsigned int rs2 = insn & 0x1f; compute_effective_address()
176 if (insn & 0x2000) { compute_effective_address()
178 addr = (fetch_reg(rs1, regs) + sign_extend_imm13(insn)); compute_effective_address()
248 static inline int floating_point_load_or_store_p(unsigned int insn) floating_point_load_or_store_p() argument
250 return (insn >> 24) & 1; floating_point_load_or_store_p()
253 static inline int ok_for_kernel(unsigned int insn) ok_for_kernel() argument
255 return !floating_point_load_or_store_p(insn); ok_for_kernel()
261 unsigned int insn = current_thread_info()->kern_una_insn; kernel_mna_trap_fault() local
268 address = compute_effective_address(regs, insn, kernel_mna_trap_fault()
269 ((insn >> 25) & 0x1f)); kernel_mna_trap_fault()
305 asmlinkage void kernel_unaligned_trap(struct pt_regs *regs, unsigned int insn) kernel_unaligned_trap() argument
307 enum direction dir = decode_direction(insn); kernel_unaligned_trap()
308 int size = decode_access_size(regs, insn); kernel_unaligned_trap()
312 current_thread_info()->kern_una_insn = insn; kernel_unaligned_trap()
314 orig_asi = asi = decode_asi(insn, regs); kernel_unaligned_trap()
326 if (!ok_for_kernel(insn) || dir == both) { kernel_unaligned_trap()
337 addr = compute_effective_address(regs, insn, kernel_unaligned_trap()
338 ((insn >> 25) & 0x1f)); kernel_unaligned_trap()
353 reg_addr = fetch_reg_addr(((insn>>25)&0x1f), regs); kernel_unaligned_trap()
356 decode_signedness(insn), asi); kernel_unaligned_trap()
379 err = do_int_store(((insn>>25)&0x1f), size, kernel_unaligned_trap()
395 int handle_popc(u32 insn, struct pt_regs *regs) handle_popc() argument
398 int ret, rd = ((insn >> 25) & 0x1f); handle_popc()
402 if (insn & 0x2000) { handle_popc()
404 value = sign_extend_imm13(insn); handle_popc()
406 maybe_flush_windows(0, insn & 0x1f, rd, from_kernel); handle_popc()
407 value = fetch_reg(insn & 0x1f, regs); handle_popc()
436 int handle_ldf_stq(u32 insn, struct pt_regs *regs) handle_ldf_stq() argument
438 unsigned long addr = compute_effective_address(regs, insn, 0); handle_ldf_stq()
441 int asi = decode_asi(insn, regs); handle_ldf_stq()
448 if (insn & 0x200000) { handle_ldf_stq()
452 freg = ((insn >> 25) & 0x1e) | ((insn >> 20) & 0x20); handle_ldf_stq()
513 switch (insn & 0x180000) { handle_ldf_stq()
519 freg = (insn >> 25) & 0x1f; handle_ldf_stq()
521 freg = ((insn >> 25) & 0x1e) | ((insn >> 20) & 0x20); handle_ldf_stq()
569 void handle_ld_nf(u32 insn, struct pt_regs *regs) handle_ld_nf() argument
571 int rd = ((insn >> 25) & 0x1f); handle_ld_nf()
581 if ((insn & 0x780000) == 0x180000) handle_ld_nf()
585 if ((insn & 0x780000) == 0x180000) handle_ld_nf()
589 if ((insn & 0x780000) == 0x180000) handle_ld_nf()
600 u32 insn; handle_lddfmna() local
611 if (get_user(insn, (u32 __user *) pc) != -EFAULT) { handle_lddfmna()
612 int asi = decode_asi(insn, regs); handle_lddfmna()
629 freg = ((insn >> 25) & 0x1e) | ((insn >> 20) & 0x20); handle_lddfmna()
664 u32 insn; handle_stdfmna() local
675 if (get_user(insn, (u32 __user *) pc) != -EFAULT) { handle_stdfmna()
676 int asi = decode_asi(insn, regs); handle_stdfmna()
677 freg = ((insn >> 25) & 0x1e) | ((insn >> 20) & 0x20); handle_stdfmna()
168 compute_effective_address(struct pt_regs *regs, unsigned int insn, unsigned int rd) compute_effective_address() argument
H A Dkprobes.c21 * In the kprobe->ainsn.insn[] array we store the original
30 * - Set regs->tpc to point to kprobe->ainsn.insn[0]
31 * - Set regs->tnpc to point to kprobe->ainsn.insn[1]
35 * kprobe->ainsn.insn[1] to hit. When it does we:
54 p->ainsn.insn[0] = *p->addr; arch_prepare_kprobe()
55 flushi(&p->ainsn.insn[0]); arch_prepare_kprobe()
57 p->ainsn.insn[1] = BREAKPOINT_INSTRUCTION_2; arch_prepare_kprobe()
58 flushi(&p->ainsn.insn[1]); arch_prepare_kprobe()
110 regs->tpc = (unsigned long) &p->ainsn.insn[0]; prepare_singlestep()
111 regs->tnpc = (unsigned long) &p->ainsn.insn[1]; prepare_singlestep()
201 * of the BREAKPOINT_INSTRUCTION_2 at p->ainsn.insn[1]
204 static unsigned long __kprobes relbranch_fixup(u32 insn, struct kprobe *p, relbranch_fixup() argument
216 if ((insn & 0xc0000000) == 0x40000000 || relbranch_fixup()
217 (insn & 0xc1c00000) == 0x00400000 || relbranch_fixup()
218 (insn & 0xc1c00000) == 0x00800000) { relbranch_fixup()
221 ainsn_addr = (unsigned long) &p->ainsn.insn[0]; relbranch_fixup()
239 static void __kprobes retpc_fixup(struct pt_regs *regs, u32 insn, retpc_fixup() argument
245 if ((insn & 0xc0000000) == 0x40000000) { retpc_fixup()
250 if ((insn & 0xc1f80000) == 0x81c00000) { retpc_fixup()
251 unsigned long rd = ((insn >> 25) & 0x1f); retpc_fixup()
275 * copy is &p->ainsn.insn[0].
283 u32 insn = p->ainsn.insn[0]; resume_execution() local
285 regs->tnpc = relbranch_fixup(insn, p, regs); resume_execution()
290 retpc_fixup(regs, insn, (unsigned long) p->addr); resume_execution()
/linux-4.4.14/arch/arm/probes/uprobes/
H A Dcore.h12 enum probes_insn uprobe_decode_ldmstm(probes_opcode_t insn,
16 enum probes_insn decode_ldr(probes_opcode_t insn,
21 decode_rd12rn16rm0rs8_rwflags(probes_opcode_t insn,
26 decode_wb_pc(probes_opcode_t insn, struct arch_probes_insn *asi,
30 decode_pc_ro(probes_opcode_t insn, struct arch_probes_insn *asi,
H A Dactions-arm.c22 probes_opcode_t insn = __mem_to_opcode_arm(*pinsn); uprobes_substitute_pc() local
29 for (regs = oregs; regs; regs >>= 4, insn >>= 4) { uprobes_substitute_pc()
33 free &= ~(1 << (insn & 0xf)); uprobes_substitute_pc()
50 insn = temp; uprobes_substitute_pc()
61 insn &= ~mask; uprobes_substitute_pc()
62 insn |= free & mask; uprobes_substitute_pc()
65 *pinsn = __opcode_to_mem_arm(insn); uprobes_substitute_pc()
108 decode_pc_ro(probes_opcode_t insn, struct arch_probes_insn *asi, decode_pc_ro() argument
132 decode_wb_pc(probes_opcode_t insn, struct arch_probes_insn *asi, decode_wb_pc() argument
137 enum probes_insn ret = decode_pc_ro(insn, asi, d); decode_wb_pc()
139 if (((insn >> 12) & 0xf) == 15) decode_wb_pc()
147 decode_rd12rn16rm0rs8_rwflags(probes_opcode_t insn, decode_rd12rn16rm0rs8_rwflags() argument
151 return decode_wb_pc(insn, asi, d, true); decode_rd12rn16rm0rs8_rwflags()
155 decode_ldr(probes_opcode_t insn, struct arch_probes_insn *asi, decode_ldr() argument
158 return decode_wb_pc(insn, asi, d, false); decode_ldr()
162 uprobe_decode_ldmstm(probes_opcode_t insn, uprobe_decode_ldmstm() argument
168 unsigned reglist = insn & 0xffff; uprobe_decode_ldmstm()
169 int rn = (insn >> 16) & 0xf; uprobe_decode_ldmstm()
170 int lbit = insn & (1 << 20); uprobe_decode_ldmstm()
183 insn ^= 0xc000; uprobe_decode_ldmstm()
186 auprobe->ixol[0] = __opcode_to_mem_arm(insn); uprobe_decode_ldmstm()
H A Dcore.c26 bool is_swbp_insn(uprobe_opcode_t *insn) is_swbp_insn() argument
28 return (__mem_to_opcode_arm(*insn) & 0x0fffffff) == is_swbp_insn()
56 opcode = __mem_to_opcode_arm(*(unsigned int *) auprobe->insn); arch_uprobe_skip_sstep()
78 unsigned int insn; arch_uprobe_analyze_insn() local
86 insn = __mem_to_opcode_arm(*(unsigned int *)auprobe->insn); arch_uprobe_analyze_insn()
87 auprobe->ixol[0] = __opcode_to_mem_arm(insn); arch_uprobe_analyze_insn()
90 ret = arm_probes_decode_insn(insn, &auprobe->asi, false, arch_uprobe_analyze_insn()
106 if (insn >= 0xe0000000) arch_uprobe_analyze_insn()
109 bpinsn |= insn & 0xf0000000; /* Copy condition from insn */ arch_uprobe_analyze_insn()
/linux-4.4.14/arch/s390/lib/
H A Dprobes.c10 int probe_is_prohibited_opcode(u16 *insn) probe_is_prohibited_opcode() argument
12 if (!is_known_insn((unsigned char *)insn)) probe_is_prohibited_opcode()
14 switch (insn[0] >> 8) { probe_is_prohibited_opcode()
23 switch (insn[0] & 0x0f) { probe_is_prohibited_opcode()
28 switch (insn[0]) { probe_is_prohibited_opcode()
44 int probe_get_fixup_type(u16 *insn) probe_get_fixup_type() argument
49 switch (insn[0] >> 8) { probe_get_fixup_type()
54 if ((insn[0] & 0x0f) == 0) probe_get_fixup_type()
75 if ((insn[0] & 0xff) == 0xb2) probe_get_fixup_type()
79 if ((insn[0] & 0x0f) == 0x05) probe_get_fixup_type()
83 if ((insn[0] & 0x0f) == 0x05) /* brasl */ probe_get_fixup_type()
87 switch (insn[2] & 0xff) { probe_get_fixup_type()
95 if ((insn[2] & 0xff) == 0x46) probe_get_fixup_type()
99 switch (insn[2] & 0xff) { probe_get_fixup_type()
116 int probe_is_insn_relative_long(u16 *insn) probe_is_insn_relative_long() argument
120 switch (insn[0] >> 8) { probe_is_insn_relative_long()
122 if ((insn[0] & 0x0f) == 0x00) /* larl */ probe_is_insn_relative_long()
126 switch (insn[0] & 0x0f) { probe_is_insn_relative_long()
142 switch (insn[0] & 0x0f) { probe_is_insn_relative_long()
H A Duaccess.c28 "0: .insn ss,0xc80000000000,0(%0,%2),0(%1),0\n" copy_from_user_mvcos()
39 "3: .insn ss,0xc80000000000,0(%4,%2),0(%1),0\n" copy_from_user_mvcos()
121 "0: .insn ss,0xc80000000000,0(%0,%1),0(%2),0\n" copy_to_user_mvcos()
132 "3: .insn ss,0xc80000000000,0(%4,%1),0(%2),0\n" copy_to_user_mvcos()
195 "0: .insn ss,0xc80000000000,0(%0,%1),0(%2),0\n" copy_in_user_mvcos()
256 "0: .insn ss,0xc80000000000,0(%0,%1),0(%4),0\n" clear_user_mvcos()
266 "3: .insn ss,0xc80000000000,0(%3,%1),0(%4),0\n" clear_user_mvcos()
/linux-4.4.14/arch/x86/tools/
H A Dtest_get_len.c27 #include <asm/insn.h>
29 #include <insn.c>
70 static void dump_insn(FILE *fp, struct insn *insn) dump_insn() argument
73 dump_field(fp, "prefixes", "\t", &insn->prefixes); dump_insn()
74 dump_field(fp, "rex_prefix", "\t", &insn->rex_prefix); dump_insn()
75 dump_field(fp, "vex_prefix", "\t", &insn->vex_prefix); dump_insn()
76 dump_field(fp, "opcode", "\t", &insn->opcode); dump_insn()
77 dump_field(fp, "modrm", "\t", &insn->modrm); dump_insn()
78 dump_field(fp, "sib", "\t", &insn->sib); dump_insn()
79 dump_field(fp, "displacement", "\t", &insn->displacement); dump_insn()
80 dump_field(fp, "immediate1", "\t", &insn->immediate1); dump_insn()
81 dump_field(fp, "immediate2", "\t", &insn->immediate2); dump_insn()
83 insn->attr, insn->opnd_bytes, insn->addr_bytes); dump_insn()
85 insn->length, insn->x86_64, insn->kaddr); dump_insn()
115 struct insn insn; main() local
152 insn_init(&insn, insn_buf, sizeof(insn_buf), x86_64); main()
153 insn_get_length(&insn); main()
154 if (insn.length != nb) { main()
161 insn.length); main()
163 dump_insn(stderr, &insn); main()
H A Dinsn_sanity.c34 #include <asm/insn.h>
36 #include <insn.c>
80 static void dump_insn(FILE *fp, struct insn *insn) dump_insn() argument
83 dump_field(fp, "prefixes", "\t", &insn->prefixes); dump_insn()
84 dump_field(fp, "rex_prefix", "\t", &insn->rex_prefix); dump_insn()
85 dump_field(fp, "vex_prefix", "\t", &insn->vex_prefix); dump_insn()
86 dump_field(fp, "opcode", "\t", &insn->opcode); dump_insn()
87 dump_field(fp, "modrm", "\t", &insn->modrm); dump_insn()
88 dump_field(fp, "sib", "\t", &insn->sib); dump_insn()
89 dump_field(fp, "displacement", "\t", &insn->displacement); dump_insn()
90 dump_field(fp, "immediate1", "\t", &insn->immediate1); dump_insn()
91 dump_field(fp, "immediate2", "\t", &insn->immediate2); dump_insn()
93 insn->attr, insn->opnd_bytes, insn->addr_bytes); dump_insn()
95 insn->length, insn->x86_64, insn->kaddr); dump_insn()
99 unsigned char *insn_buf, struct insn *insn) dump_stream()
105 dump_insn(fp, insn); dump_stream()
238 struct insn insn; main() local
257 insn_init(&insn, insn_buf, sizeof(insn_buf), x86_64); main()
258 insn_get_length(&insn); main()
260 if (insn.next_byte <= insn.kaddr || main()
261 insn.kaddr + MAX_INSN_SIZE < insn.next_byte) { main()
263 dump_stream(stderr, "Error: Found an access violation", i, insn_buf, &insn); main()
265 } else if (verbose && !insn_complete(&insn)) main()
266 dump_stream(stdout, "Info: Found an undecodable input", i, insn_buf, &insn); main()
268 dump_insn(stdout, &insn); main()
98 dump_stream(FILE *fp, const char *msg, unsigned long nr_iter, unsigned char *insn_buf, struct insn *insn) dump_stream() argument
H A DMakefile36 $(obj)/test_get_len.o: $(srctree)/arch/x86/lib/insn.c $(srctree)/arch/x86/lib/inat.c $(srctree)/arch/x86/include/asm/inat_types.h $(srctree)/arch/x86/include/asm/inat.h $(srctree)/arch/x86/include/asm/insn.h $(objtree)/arch/x86/lib/inat-tables.c
38 $(obj)/insn_sanity.o: $(srctree)/arch/x86/lib/insn.c $(srctree)/arch/x86/lib/inat.c $(srctree)/arch/x86/include/asm/inat_types.h $(srctree)/arch/x86/include/asm/inat.h $(srctree)/arch/x86/include/asm/insn.h $(objtree)/arch/x86/lib/inat-tables.c
/linux-4.4.14/arch/s390/kernel/
H A Djump_label.c15 struct insn { struct
25 static void jump_label_make_nop(struct jump_entry *entry, struct insn *insn) jump_label_make_nop() argument
28 insn->opcode = 0xc004; jump_label_make_nop()
29 insn->offset = 0; jump_label_make_nop()
32 static void jump_label_make_branch(struct jump_entry *entry, struct insn *insn) jump_label_make_branch() argument
35 insn->opcode = 0xc0f4; jump_label_make_branch()
36 insn->offset = (entry->target - entry->code) >> 1; jump_label_make_branch()
39 static void jump_label_bug(struct jump_entry *entry, struct insn *expected, jump_label_bug()
40 struct insn *new) jump_label_bug()
53 static struct insn orignop = {
62 struct insn old, new; __jump_label_transform()
H A Dkprobes.c75 ftrace_generate_nop_insn((struct ftrace_insn *)p->ainsn.insn); copy_instruction()
78 memcpy(p->ainsn.insn, p->addr, insn_length(*p->addr >> 8)); copy_instruction()
79 p->opcode = p->ainsn.insn[0]; copy_instruction()
80 if (!probe_is_insn_relative_long(p->ainsn.insn)) copy_instruction()
84 * RI2 displacement field. We have already made sure that the insn copy_instruction()
89 disp = *(s32 *)&p->ainsn.insn[1]; copy_instruction()
91 new_addr = (u64)(unsigned long)p->ainsn.insn; copy_instruction()
93 *(s32 *)&p->ainsn.insn[1] = new_disp; copy_instruction()
105 * Get an insn slot that is within the same 2GB area like the original s390_get_insn_slot()
107 * field can be patched and executed within the insn slot. s390_get_insn_slot()
109 p->ainsn.insn = NULL; s390_get_insn_slot()
111 p->ainsn.insn = get_dmainsn_slot(); s390_get_insn_slot()
113 p->ainsn.insn = get_insn_slot(); s390_get_insn_slot()
114 return p->ainsn.insn ? 0 : -ENOMEM; s390_get_insn_slot()
120 if (!p->ainsn.insn) s390_free_insn_slot()
123 free_dmainsn_slot(p->ainsn.insn, 0); s390_free_insn_slot()
125 free_insn_slot(p->ainsn.insn, 0); s390_free_insn_slot()
126 p->ainsn.insn = NULL; s390_free_insn_slot()
159 struct ftrace_insn new_insn, *insn; swap_instruction() local
168 insn = (struct ftrace_insn *) p->addr; swap_instruction()
170 if (is_ftrace_nop(insn)) swap_instruction()
176 if (insn->disp == KPROBE_ON_FTRACE_NOP) swap_instruction()
344 enable_singlestep(kcb, regs, (unsigned long) p->ainsn.insn); kprobe_handler()
358 (unsigned long) p->ainsn.insn); kprobe_handler()
488 * copy is p->ainsn.insn.
494 int fixup = probe_get_fixup_type(p->ainsn.insn); resume_execution()
498 struct ftrace_insn *insn = (struct ftrace_insn *) p->addr; resume_execution() local
508 if (insn->disp == KPROBE_ON_FTRACE_CALL) { resume_execution()
510 regs->gprs[0] = (unsigned long)p->addr + sizeof(*insn); resume_execution()
515 ip += (unsigned long) p->addr - (unsigned long) p->ainsn.insn; resume_execution()
518 int ilen = insn_length(p->ainsn.insn[0] >> 8); resume_execution()
519 if (ip - (unsigned long) p->ainsn.insn == ilen) resume_execution()
524 int reg = (p->ainsn.insn[0] & 0xf0) >> 4; resume_execution()
526 (unsigned long) p->ainsn.insn; resume_execution()
H A Dftrace.c60 static inline void ftrace_generate_orig_insn(struct ftrace_insn *insn) ftrace_generate_orig_insn() argument
64 insn->opc = 0xc004; ftrace_generate_orig_insn()
65 insn->disp = 0; ftrace_generate_orig_insn()
68 insn->opc = 0xe3e0; ftrace_generate_orig_insn()
69 insn->disp = 0xf0080024; ftrace_generate_orig_insn()
73 static inline int is_kprobe_on_ftrace(struct ftrace_insn *insn) is_kprobe_on_ftrace() argument
76 if (insn->opc == BREAKPOINT_INSTRUCTION) is_kprobe_on_ftrace()
82 static inline void ftrace_generate_kprobe_nop_insn(struct ftrace_insn *insn) ftrace_generate_kprobe_nop_insn() argument
85 insn->opc = BREAKPOINT_INSTRUCTION; ftrace_generate_kprobe_nop_insn()
86 insn->disp = KPROBE_ON_FTRACE_NOP; ftrace_generate_kprobe_nop_insn()
90 static inline void ftrace_generate_kprobe_call_insn(struct ftrace_insn *insn) ftrace_generate_kprobe_call_insn() argument
93 insn->opc = BREAKPOINT_INSTRUCTION; ftrace_generate_kprobe_call_insn()
94 insn->disp = KPROBE_ON_FTRACE_CALL; ftrace_generate_kprobe_call_insn()
H A Duprobes.c23 return probe_is_prohibited_opcode(auprobe->insn); arch_uprobe_analyze_insn()
77 int fixup = probe_get_fixup_type(auprobe->insn); arch_uprobe_post_xol()
88 int reg = (auprobe->insn[0] & 0xf0) >> 4; arch_uprobe_post_xol()
93 int ilen = insn_length(auprobe->insn[0] >> 8); arch_uprobe_post_xol()
260 struct insn_ril *insn; handle_insn_ril() local
265 insn = (struct insn_ril *) &auprobe->insn; handle_insn_ril()
266 rx = (union split_register *) &regs->gprs[insn->reg]; handle_insn_ril()
267 uptr = (void *)(regs->psw.addr + (insn->disp * 2)); handle_insn_ril()
268 ilen = insn_length(insn->opc0); handle_insn_ril()
270 switch (insn->opc0) { handle_insn_ril()
272 switch (insn->opc1) { handle_insn_ril()
279 switch (insn->opc1) { handle_insn_ril()
316 switch (insn->opc1) { handle_insn_ril()
380 if (probe_is_insn_relative_long(auprobe->insn)) { arch_uprobe_skip_sstep()
/linux-4.4.14/arch/sparc/mm/
H A Dextable.c21 /* Single insn entries are encoded as: search_extable()
22 * word 1: insn address search_extable()
26 * word 1: first insn address search_extable()
28 * word 3: last insn address + 4 bytes search_extable()
50 if (walk->insn == value) search_extable()
59 if (walk[0].insn <= value && walk[1].insn > value) search_extable()
78 if (within_module_init(m->extable[i].insn, m)) { trim_init_extable()
100 *g2 = (addr - entry->insn) / 4; search_extables_range()
H A Dfault_64.c99 u32 insn = 0; get_user_insn() local
124 : "=r" (insn) get_user_insn()
137 : "=r" (insn) get_user_insn()
145 return insn; get_user_insn()
170 unsigned long fault_addr, unsigned int insn, do_fault_siginfo()
186 if (insn) do_fault_siginfo()
187 addr = compute_effective_address(regs, insn, 0); do_fault_siginfo()
200 static unsigned int get_fault_insn(struct pt_regs *regs, unsigned int insn) get_fault_insn() argument
202 if (!insn) { get_fault_insn()
206 insn = *(unsigned int *) regs->tpc; get_fault_insn()
208 insn = get_user_insn(regs->tpc); get_fault_insn()
211 return insn; get_fault_insn()
215 int fault_code, unsigned int insn, do_kernel_fault()
220 if ((!insn) && (regs->tstate & TSTATE_PRIV)) do_kernel_fault()
223 /* If user insn could be read (thus insn is zero), that do_kernel_fault()
229 (insn & 0xc0800000) == 0xc0800000) { do_kernel_fault()
230 if (insn & 0x2000) do_kernel_fault()
233 asi = (insn >> 5); do_kernel_fault()
235 if (insn & 0x1000000) { do_kernel_fault()
236 handle_ldf_stq(insn, regs); do_kernel_fault()
242 handle_ld_nf(insn, regs); do_kernel_fault()
262 do_fault_siginfo(si_code, SIGSEGV, regs, address, insn, fault_code); do_kernel_fault()
287 unsigned int insn = 0; do_sparc64_fault() local
341 insn = get_fault_insn(regs, insn); do_sparc64_fault()
367 insn = get_fault_insn(regs, 0); do_sparc64_fault()
368 if (!insn) do_sparc64_fault()
374 if ((insn & 0xc0200000) == 0xc0200000 && do_sparc64_fault()
375 (insn & 0x01780000) != 0x01680000) { do_sparc64_fault()
391 insn = get_fault_insn(regs, insn); do_sparc64_fault()
392 if ((insn & 0xc0800000) == 0xc0800000) { do_sparc64_fault()
395 if (insn & 0x2000) do_sparc64_fault()
398 asi = (insn >> 5); do_sparc64_fault()
508 insn = get_fault_insn(regs, insn); do_sparc64_fault()
512 do_kernel_fault(regs, si_code, fault_code, insn, address); do_sparc64_fault()
520 insn = get_fault_insn(regs, insn); do_sparc64_fault()
529 insn = get_fault_insn(regs, 0); do_sparc64_fault()
533 insn = get_fault_insn(regs, insn); do_sparc64_fault()
540 do_fault_siginfo(BUS_ADRERR, SIGBUS, regs, address, insn, fault_code); do_sparc64_fault()
169 do_fault_siginfo(int code, int sig, struct pt_regs *regs, unsigned long fault_addr, unsigned int insn, int fault_code) do_fault_siginfo() argument
214 do_kernel_fault(struct pt_regs *regs, int si_code, int fault_code, unsigned int insn, unsigned long address) do_kernel_fault() argument
H A Dfault_32.c62 unsigned int insn; lookup_fault() local
74 insn = *((unsigned int *) pc); lookup_fault()
75 if ((insn >> 21) & 1) lookup_fault()
82 insn = *((unsigned int *) pc); lookup_fault()
83 if (!((insn >> 21) & 1) || ((insn>>19)&0x3f) == 15) lookup_fault()
146 unsigned int insn; compute_si_addr() local
152 insn = *(unsigned int *) regs->pc; compute_si_addr()
154 __get_user(insn, (unsigned int *) regs->pc); compute_si_addr()
156 return safe_compute_effective_address(regs, insn); compute_si_addr()
314 printk("EX_TABLE: insn<%08lx> fixup<%08x> g2<%08lx>\n", do_sparc_fault()
/linux-4.4.14/arch/powerpc/math-emu/
H A Dmath.c230 u32 insn = 0; do_mathemu() local
236 if (get_user(insn, (u32 *)pc)) do_mathemu()
239 switch (insn >> 26) { do_mathemu()
250 switch ((insn >> 1) & 0x3ff) { do_mathemu()
266 switch ((insn >> 1) & 0x1f) { do_mathemu()
284 if (insn & 0x20) { do_mathemu()
285 switch ((insn >> 1) & 0x1f) { do_mathemu()
304 switch ((insn >> 1) & 0x3ff) { do_mathemu()
331 op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f); do_mathemu()
332 op1 = (void *)&current->thread.TS_FPR((insn >> 16) & 0x1f); do_mathemu()
333 op2 = (void *)&current->thread.TS_FPR((insn >> 11) & 0x1f); do_mathemu()
337 op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f); do_mathemu()
338 op1 = (void *)&current->thread.TS_FPR((insn >> 16) & 0x1f); do_mathemu()
339 op2 = (void *)&current->thread.TS_FPR((insn >> 6) & 0x1f); do_mathemu()
343 op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f); do_mathemu()
344 op1 = (void *)&current->thread.TS_FPR((insn >> 16) & 0x1f); do_mathemu()
345 op2 = (void *)&current->thread.TS_FPR((insn >> 11) & 0x1f); do_mathemu()
346 op3 = (void *)&current->thread.TS_FPR((insn >> 6) & 0x1f); do_mathemu()
350 idx = (insn >> 16) & 0x1f; do_mathemu()
351 sdisp = (insn & 0xffff); do_mathemu()
352 op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f); do_mathemu()
357 idx = (insn >> 16) & 0x1f; do_mathemu()
361 sdisp = (insn & 0xffff); do_mathemu()
362 op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f); do_mathemu()
367 op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f); do_mathemu()
371 op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f); do_mathemu()
372 op1 = (void *)&current->thread.TS_FPR((insn >> 16) & 0x1f); do_mathemu()
376 op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f); do_mathemu()
377 op1 = (void *)&current->thread.TS_FPR((insn >> 11) & 0x1f); do_mathemu()
381 idx = (insn >> 16) & 0x1f; do_mathemu()
382 op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f); do_mathemu()
384 + regs->gpr[(insn >> 11) & 0x1f]); do_mathemu()
388 idx = (insn >> 16) & 0x1f; do_mathemu()
391 op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f); do_mathemu()
393 + regs->gpr[(insn >> 11) & 0x1f]); do_mathemu()
398 op1 = (void *)((insn >> 23) & 0x7); do_mathemu()
399 op2 = (void *)&current->thread.TS_FPR((insn >> 16) & 0x1f); do_mathemu()
400 op3 = (void *)&current->thread.TS_FPR((insn >> 11) & 0x1f); do_mathemu()
405 op1 = (void *)((insn >> 23) & 0x7); do_mathemu()
406 op2 = (void *)((insn >> 18) & 0x7); do_mathemu()
410 op0 = (void *)((insn >> 21) & 0x1f); do_mathemu()
414 op0 = (void *)((insn >> 23) & 0x7); do_mathemu()
415 op1 = (void *)((insn >> 12) & 0xf); do_mathemu()
419 op0 = (void *)((insn >> 17) & 0xff); do_mathemu()
420 op1 = (void *)&current->thread.TS_FPR((insn >> 11) & 0x1f); do_mathemu()
436 if (insn & 1) { do_mathemu()
/linux-4.4.14/arch/x86/kernel/kprobes/
H A Dopt.c37 #include <asm/insn.h>
193 /* Check whether insn is indirect jump */ insn_is_indirect_jump()
194 static int insn_is_indirect_jump(struct insn *insn) insn_is_indirect_jump() argument
196 return ((insn->opcode.bytes[0] == 0xff && insn_is_indirect_jump()
197 (X86_MODRM_REG(insn->modrm.value) & 6) == 4) || /* Jump */ insn_is_indirect_jump()
198 insn->opcode.bytes[0] == 0xea); /* Segment based jump */ insn_is_indirect_jump()
201 /* Check whether insn jumps into specified address range */ insn_jump_into_range()
202 static int insn_jump_into_range(struct insn *insn, unsigned long start, int len) insn_jump_into_range() argument
206 switch (insn->opcode.bytes[0]) { insn_jump_into_range()
215 if ((insn->opcode.bytes[1] & 0xf0) == 0x80) /* jcc near */ insn_jump_into_range()
219 if ((insn->opcode.bytes[0] & 0xf0) == 0x70) /* jcc short */ insn_jump_into_range()
223 target = (unsigned long)insn->next_byte + insn->immediate.value; insn_jump_into_range()
232 struct insn insn; can_optimize() local
264 kernel_insn_init(&insn, (void *)recovered_insn, MAX_INSN_SIZE); can_optimize()
265 insn_get_length(&insn); can_optimize()
267 if (insn.opcode.bytes[0] == BREAKPOINT_INSTRUCTION) can_optimize()
270 insn.kaddr = (void *)addr; can_optimize()
271 insn.next_byte = (void *)(addr + insn.length); can_optimize()
273 if (insn_is_indirect_jump(&insn) || can_optimize()
274 insn_jump_into_range(&insn, paddr + INT3_SIZE, can_optimize()
277 addr += insn.length; can_optimize()
310 if (op->optinsn.insn) { __arch_remove_optimized_kprobe()
311 free_optinsn_slot(op->optinsn.insn, dirty); __arch_remove_optimized_kprobe()
312 op->optinsn.insn = NULL; __arch_remove_optimized_kprobe()
337 op->optinsn.insn = get_optinsn_slot(); arch_prepare_optimized_kprobe()
338 if (!op->optinsn.insn) arch_prepare_optimized_kprobe()
345 rel = (long)op->optinsn.insn - (long)op->kp.addr + RELATIVEJUMP_SIZE; arch_prepare_optimized_kprobe()
351 buf = (u8 *)op->optinsn.insn; arch_prepare_optimized_kprobe()
390 s32 rel = (s32)((long)op->optinsn.insn - list_for_each_entry_safe()
403 op->optinsn.insn); list_for_each_entry_safe()
418 op->optinsn.insn); arch_unoptimize_kprobe()
444 regs->ip = (unsigned long)op->optinsn.insn + TMPL_END_IDX; setup_detour_execution()
H A Dcore.c58 #include <asm/insn.h>
121 } __packed *insn; __synthesize_relative_insn() local
123 insn = (struct __arch_relative_insn *)from; __synthesize_relative_insn()
124 insn->raddr = (s32)((long)(to) - ((long)(from) + 5)); __synthesize_relative_insn()
125 insn->op = op; __synthesize_relative_insn()
145 static kprobe_opcode_t *skip_prefixes(kprobe_opcode_t *insn) skip_prefixes() argument
149 attr = inat_get_opcode_attribute((insn_byte_t)*insn); skip_prefixes()
151 insn++; skip_prefixes()
152 attr = inat_get_opcode_attribute((insn_byte_t)*insn); skip_prefixes()
156 insn++; skip_prefixes()
158 return insn; skip_prefixes()
245 * Basically, kp->ainsn.insn has an original instruction. __recover_probed_insn()
249 * from the kp->ainsn.insn. __recover_probed_insn()
292 struct insn insn; can_probe() local
312 kernel_insn_init(&insn, (void *)__addr, MAX_INSN_SIZE); can_probe()
313 insn_get_length(&insn); can_probe()
319 if (insn.opcode.bytes[0] == BREAKPOINT_INSTRUCTION) can_probe()
321 addr += insn.length; can_probe()
330 static int is_IF_modifier(kprobe_opcode_t *insn) is_IF_modifier() argument
333 insn = skip_prefixes(insn); is_IF_modifier()
335 switch (*insn) { is_IF_modifier()
355 struct insn insn; __copy_instruction() local
363 kernel_insn_init(&insn, (void *)recovered_insn, MAX_INSN_SIZE); __copy_instruction()
364 insn_get_length(&insn); __copy_instruction()
365 length = insn.length; __copy_instruction()
368 if (insn.opcode.bytes[0] == BREAKPOINT_INSTRUCTION) __copy_instruction()
370 memcpy(dest, insn.kaddr, length); __copy_instruction()
373 if (insn_rip_relative(&insn)) { __copy_instruction()
376 kernel_insn_init(&insn, dest, length); __copy_instruction()
377 insn_get_displacement(&insn); __copy_instruction()
390 newdisp = (u8 *) src + (s64) insn.displacement.value - (u8 *) dest; __copy_instruction()
393 pr_err("\tSrc: %p, Dest: %p, old disp: %x\n", src, dest, insn.displacement.value); __copy_instruction()
396 disp = (u8 *) dest + insn_offset_displacement(&insn); __copy_instruction()
408 ret = __copy_instruction(p->ainsn.insn, p->addr); arch_copy_kprobe()
416 if (can_boost(p->ainsn.insn)) arch_copy_kprobe()
422 p->ainsn.if_modifier = is_IF_modifier(p->ainsn.insn); arch_copy_kprobe()
425 p->opcode = p->ainsn.insn[0]; arch_copy_kprobe()
437 /* insn: must be on special executable page on x86. */ arch_prepare_kprobe()
438 p->ainsn.insn = get_insn_slot(); arch_prepare_kprobe()
439 if (!p->ainsn.insn) arch_prepare_kprobe()
457 if (p->ainsn.insn) { arch_remove_kprobe()
458 free_insn_slot(p->ainsn.insn, (p->ainsn.boostable == 1)); arch_remove_kprobe()
459 p->ainsn.insn = NULL; arch_remove_kprobe()
539 regs->ip = (unsigned long)p->ainsn.insn; setup_singlestep()
558 regs->ip = (unsigned long)p->ainsn.insn; setup_singlestep()
805 * copy is p->ainsn.insn.
830 unsigned long copy_ip = (unsigned long)p->ainsn.insn; resume_execution()
832 kprobe_opcode_t *insn = p->ainsn.insn; resume_execution() local
835 insn = skip_prefixes(insn); resume_execution()
838 switch (*insn) { resume_execution()
861 if ((insn[1] & 0x30) == 0x10) { resume_execution()
869 } else if (((insn[1] & 0x31) == 0x20) || resume_execution()
870 ((insn[1] & 0x31) == 0x21)) { resume_execution()
950 if (unlikely(regs->ip == (unsigned long)cur->ainsn.insn)) { kprobe_fault_handler()
/linux-4.4.14/tools/perf/arch/x86/tests/
H A Dinsn-x86.c7 #include "intel-pt-decoder/insn.h"
8 #include "intel-pt-decoder/intel-pt-insn-decoder.h"
20 #include "insn-x86-dat-32.c"
27 #include "insn-x86-dat-64.c"
96 struct insn insn; test_data_item() local
99 insn_init(&insn, dat->data, MAX_INSN_SIZE, x86_64); test_data_item()
100 insn_get_length(&insn); test_data_item()
102 if (!insn_complete(&insn)) { test_data_item()
107 if (insn.length != dat->expected_length) { test_data_item()
109 insn.length, dat->expected_length, dat->asm_rep); test_data_item()
164 * The instructions are originally in insn-x86-dat-src.c which has been
165 * processed by scripts gen-insn-x86-dat.sh and gen-insn-x86-dat.awk to produce
166 * insn-x86-dat-32.c and insn-x86-dat-64.c which are included into this program.
167 * i.e. to add new instructions to the test, edit insn-x86-dat-src.c, run the
168 * gen-insn-x86-dat.sh script, make perf, and then run the test.
/linux-4.4.14/lib/
H A Dextable.c29 if (x->insn > y->insn) cmp_ex()
31 if (x->insn < y->insn) cmp_ex()
51 while (m->num_exentries && within_module_init(m->extable[0].insn, m)) { trim_init_extable()
57 within_module_init(m->extable[m->num_exentries-1].insn, m)) trim_init_extable()
81 * careful, the distance between value and insn search_extable()
84 if (mid->insn < value) search_extable()
86 else if (mid->insn > value) search_extable()
H A Dtest_bpf.c94 struct sock_filter *insn; bpf_fill_maxinsns1() local
98 insn = kmalloc_array(len, sizeof(*insn), GFP_KERNEL); bpf_fill_maxinsns1()
99 if (!insn) bpf_fill_maxinsns1()
103 insn[i] = __BPF_STMT(BPF_RET | BPF_K, k); bpf_fill_maxinsns1()
105 self->u.ptr.insns = insn; bpf_fill_maxinsns1()
114 struct sock_filter *insn; bpf_fill_maxinsns2() local
117 insn = kmalloc_array(len, sizeof(*insn), GFP_KERNEL); bpf_fill_maxinsns2()
118 if (!insn) bpf_fill_maxinsns2()
122 insn[i] = __BPF_STMT(BPF_RET | BPF_K, 0xfefefefe); bpf_fill_maxinsns2()
124 self->u.ptr.insns = insn; bpf_fill_maxinsns2()
133 struct sock_filter *insn; bpf_fill_maxinsns3() local
137 insn = kmalloc_array(len, sizeof(*insn), GFP_KERNEL); bpf_fill_maxinsns3()
138 if (!insn) bpf_fill_maxinsns3()
146 insn[i] = __BPF_STMT(BPF_ALU | BPF_ADD | BPF_K, k); bpf_fill_maxinsns3()
149 insn[len - 1] = __BPF_STMT(BPF_RET | BPF_A, 0); bpf_fill_maxinsns3()
151 self->u.ptr.insns = insn; bpf_fill_maxinsns3()
160 struct sock_filter *insn; bpf_fill_maxinsns4() local
163 insn = kmalloc_array(len, sizeof(*insn), GFP_KERNEL); bpf_fill_maxinsns4()
164 if (!insn) bpf_fill_maxinsns4()
168 insn[i] = __BPF_STMT(BPF_RET | BPF_K, 0xfefefefe); bpf_fill_maxinsns4()
170 self->u.ptr.insns = insn; bpf_fill_maxinsns4()
179 struct sock_filter *insn; bpf_fill_maxinsns5() local
182 insn = kmalloc_array(len, sizeof(*insn), GFP_KERNEL); bpf_fill_maxinsns5()
183 if (!insn) bpf_fill_maxinsns5()
186 insn[0] = __BPF_JUMP(BPF_JMP | BPF_JA, len - 2, 0, 0); bpf_fill_maxinsns5()
189 insn[i] = __BPF_STMT(BPF_RET | BPF_K, 0xfefefefe); bpf_fill_maxinsns5()
191 insn[len - 1] = __BPF_STMT(BPF_RET | BPF_K, 0xabababab); bpf_fill_maxinsns5()
193 self->u.ptr.insns = insn; bpf_fill_maxinsns5()
202 struct sock_filter *insn; bpf_fill_maxinsns6() local
205 insn = kmalloc_array(len, sizeof(*insn), GFP_KERNEL); bpf_fill_maxinsns6()
206 if (!insn) bpf_fill_maxinsns6()
210 insn[i] = __BPF_STMT(BPF_LD | BPF_W | BPF_ABS, SKF_AD_OFF + bpf_fill_maxinsns6()
213 insn[len - 1] = __BPF_STMT(BPF_RET | BPF_A, 0); bpf_fill_maxinsns6()
215 self->u.ptr.insns = insn; bpf_fill_maxinsns6()
224 struct sock_filter *insn; bpf_fill_maxinsns7() local
227 insn = kmalloc_array(len, sizeof(*insn), GFP_KERNEL); bpf_fill_maxinsns7()
228 if (!insn) bpf_fill_maxinsns7()
232 insn[i] = __BPF_STMT(BPF_LD | BPF_W | BPF_ABS, SKF_AD_OFF + bpf_fill_maxinsns7()
235 insn[len - 4] = __BPF_STMT(BPF_MISC | BPF_TAX, 0); bpf_fill_maxinsns7()
236 insn[len - 3] = __BPF_STMT(BPF_LD | BPF_W | BPF_ABS, SKF_AD_OFF + bpf_fill_maxinsns7()
238 insn[len - 2] = __BPF_STMT(BPF_ALU | BPF_SUB | BPF_X, 0); bpf_fill_maxinsns7()
239 insn[len - 1] = __BPF_STMT(BPF_RET | BPF_A, 0); bpf_fill_maxinsns7()
241 self->u.ptr.insns = insn; bpf_fill_maxinsns7()
250 struct sock_filter *insn; bpf_fill_maxinsns8() local
253 insn = kmalloc_array(len, sizeof(*insn), GFP_KERNEL); bpf_fill_maxinsns8()
254 if (!insn) bpf_fill_maxinsns8()
257 insn[0] = __BPF_STMT(BPF_LD | BPF_IMM, 0xffffffff); bpf_fill_maxinsns8()
260 insn[i] = __BPF_JUMP(BPF_JMP | BPF_JGT, 0xffffffff, jmp_off--, 0); bpf_fill_maxinsns8()
262 insn[len - 1] = __BPF_STMT(BPF_RET | BPF_A, 0); bpf_fill_maxinsns8()
264 self->u.ptr.insns = insn; bpf_fill_maxinsns8()
273 struct bpf_insn *insn; bpf_fill_maxinsns9() local
276 insn = kmalloc_array(len, sizeof(*insn), GFP_KERNEL); bpf_fill_maxinsns9()
277 if (!insn) bpf_fill_maxinsns9()
280 insn[0] = BPF_JMP_IMM(BPF_JA, 0, 0, len - 2); bpf_fill_maxinsns9()
281 insn[1] = BPF_ALU32_IMM(BPF_MOV, R0, 0xcbababab); bpf_fill_maxinsns9()
282 insn[2] = BPF_EXIT_INSN(); bpf_fill_maxinsns9()
285 insn[i] = BPF_ALU32_IMM(BPF_MOV, R0, 0xfefefefe); bpf_fill_maxinsns9()
287 insn[len - 2] = BPF_EXIT_INSN(); bpf_fill_maxinsns9()
288 insn[len - 1] = BPF_JMP_IMM(BPF_JA, 0, 0, -(len - 1)); bpf_fill_maxinsns9()
290 self->u.ptr.insns = insn; bpf_fill_maxinsns9()
299 struct bpf_insn *insn; bpf_fill_maxinsns10() local
302 insn = kmalloc_array(len, sizeof(*insn), GFP_KERNEL); bpf_fill_maxinsns10()
303 if (!insn) bpf_fill_maxinsns10()
307 insn[i] = BPF_JMP_IMM(BPF_JA, 0, 0, hlen - 2 - 2 * i); bpf_fill_maxinsns10()
309 insn[i] = BPF_JMP_IMM(BPF_JA, 0, 0, hlen - 1 - 2 * i); bpf_fill_maxinsns10()
311 insn[hlen / 2] = BPF_JMP_IMM(BPF_JA, 0, 0, hlen / 2 - 1); bpf_fill_maxinsns10()
312 insn[hlen] = BPF_ALU32_IMM(BPF_MOV, R0, 0xabababac); bpf_fill_maxinsns10()
313 insn[hlen + 1] = BPF_EXIT_INSN(); bpf_fill_maxinsns10()
315 self->u.ptr.insns = insn; bpf_fill_maxinsns10()
324 struct sock_filter *insn; __bpf_fill_ja() local
328 insn = kmalloc_array(len, sizeof(*insn), GFP_KERNEL); __bpf_fill_ja()
329 if (!insn) __bpf_fill_ja()
336 insn[i + j] = __BPF_JUMP(BPF_JMP | BPF_JA, __bpf_fill_ja()
339 insn[i + j] = __BPF_JUMP(BPF_JMP | BPF_JA, rlen - 1 - j, __bpf_fill_ja()
342 insn[len - 1] = __BPF_STMT(BPF_RET | BPF_K, 0xababcbac); __bpf_fill_ja()
344 self->u.ptr.insns = insn; __bpf_fill_ja()
365 struct sock_filter *insn; bpf_fill_ld_abs_get_processor_id() local
368 insn = kmalloc_array(len, sizeof(*insn), GFP_KERNEL); bpf_fill_ld_abs_get_processor_id()
369 if (!insn) bpf_fill_ld_abs_get_processor_id()
373 insn[i] = __BPF_STMT(BPF_LD | BPF_B | BPF_ABS, 0); bpf_fill_ld_abs_get_processor_id()
374 insn[i + 1] = __BPF_STMT(BPF_LD | BPF_W | BPF_ABS, bpf_fill_ld_abs_get_processor_id()
378 insn[len - 1] = __BPF_STMT(BPF_RET | BPF_K, 0xbee); bpf_fill_ld_abs_get_processor_id()
380 self->u.ptr.insns = insn; bpf_fill_ld_abs_get_processor_id()
391 struct bpf_insn *insn; bpf_fill_ld_abs_vlan_push_pop() local
394 insn = kmalloc_array(len, sizeof(*insn), GFP_KERNEL); bpf_fill_ld_abs_vlan_push_pop()
395 if (!insn) bpf_fill_ld_abs_vlan_push_pop()
398 insn[i++] = BPF_MOV64_REG(R6, R1); bpf_fill_ld_abs_vlan_push_pop()
401 insn[i++] = BPF_LD_ABS(BPF_B, 0); bpf_fill_ld_abs_vlan_push_pop()
402 insn[i] = BPF_JMP_IMM(BPF_JNE, R0, 0x34, len - i - 2); bpf_fill_ld_abs_vlan_push_pop()
404 insn[i++] = BPF_MOV64_REG(R1, R6); bpf_fill_ld_abs_vlan_push_pop()
405 insn[i++] = BPF_MOV64_IMM(R2, 1); bpf_fill_ld_abs_vlan_push_pop()
406 insn[i++] = BPF_MOV64_IMM(R3, 2); bpf_fill_ld_abs_vlan_push_pop()
407 insn[i++] = BPF_RAW_INSN(BPF_JMP | BPF_CALL, 0, 0, 0, bpf_fill_ld_abs_vlan_push_pop()
409 insn[i] = BPF_JMP_IMM(BPF_JNE, R0, 0, len - i - 2); bpf_fill_ld_abs_vlan_push_pop()
414 insn[i++] = BPF_LD_ABS(BPF_B, 0); bpf_fill_ld_abs_vlan_push_pop()
415 insn[i] = BPF_JMP_IMM(BPF_JNE, R0, 0x34, len - i - 2); bpf_fill_ld_abs_vlan_push_pop()
417 insn[i++] = BPF_MOV64_REG(R1, R6); bpf_fill_ld_abs_vlan_push_pop()
418 insn[i++] = BPF_RAW_INSN(BPF_JMP | BPF_CALL, 0, 0, 0, bpf_fill_ld_abs_vlan_push_pop()
420 insn[i] = BPF_JMP_IMM(BPF_JNE, R0, 0, len - i - 2); bpf_fill_ld_abs_vlan_push_pop()
427 insn[i] = BPF_ALU32_IMM(BPF_MOV, R0, 0xbef); bpf_fill_ld_abs_vlan_push_pop()
429 insn[len - 1] = BPF_EXIT_INSN(); bpf_fill_ld_abs_vlan_push_pop()
431 self->u.ptr.insns = insn; bpf_fill_ld_abs_vlan_push_pop()
1796 "check: unknown insn",
1798 /* seccomp insn, rejected in socket filter */
/linux-4.4.14/arch/xtensa/include/asm/
H A Dcacheasm.h34 .macro __loop_cache_all ar at insn size line_width
39 \insn \ar, 0 << (\line_width)
40 \insn \ar, 1 << (\line_width)
41 \insn \ar, 2 << (\line_width)
42 \insn \ar, 3 << (\line_width)
48 .macro __loop_cache_range ar as at insn line_width
54 \insn \ar, 0
60 .macro __loop_cache_page ar at insn line_width
63 \insn \ar, 0 << (\line_width)
64 \insn \ar, 1 << (\line_width)
65 \insn \ar, 2 << (\line_width)
66 \insn \ar, 3 << (\line_width)
/linux-4.4.14/arch/sh/include/asm/
H A Duaccess_32.h35 #define __get_user_asm(x, addr, err, insn) \
39 "mov." insn " %2, %1\n\t" \
56 #define __get_user_asm(x, addr, err, insn) \
59 "mov." insn " %1, %0\n\t" \
90 #define __put_user_asm(x, addr, err, insn) \
94 "mov." insn " %1, %2\n\t" \
114 #define __put_user_asm(x, addr, err, insn) \
117 "mov." insn " %0, %1\n\t" \
/linux-4.4.14/arch/alpha/mm/
H A Dextable.c11 return (unsigned long)&x->insn + x->insn; ex_to_addr()
22 ex_a->insn = (int)(addr_b - (unsigned long)&ex_a->insn); swap_ex()
23 ex_b->insn = (int)(addr_a - (unsigned long)&ex_b->insn); swap_ex()
/linux-4.4.14/drivers/staging/comedi/drivers/addi-data/
H A Dhwdrv_apci1564.c3 struct comedi_insn *insn, apci1564_timer_insn_config()
51 return insn->n; apci1564_timer_insn_config()
56 struct comedi_insn *insn, apci1564_timer_insn_write()
74 return insn->n; apci1564_timer_insn_write()
79 struct comedi_insn *insn, apci1564_timer_insn_read()
91 return insn->n; apci1564_timer_insn_read()
96 struct comedi_insn *insn, apci1564_counter_insn_config()
100 unsigned int chan = CR_CHAN(insn->chanspec); apci1564_counter_insn_config()
136 return insn->n; apci1564_counter_insn_config()
141 struct comedi_insn *insn, apci1564_counter_insn_write()
145 unsigned int chan = CR_CHAN(insn->chanspec); apci1564_counter_insn_write()
164 return insn->n; apci1564_counter_insn_write()
169 struct comedi_insn *insn, apci1564_counter_insn_read()
173 unsigned int chan = CR_CHAN(insn->chanspec); apci1564_counter_insn_read()
186 return insn->n; apci1564_counter_insn_read()
1 apci1564_timer_insn_config(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) apci1564_timer_insn_config() argument
54 apci1564_timer_insn_write(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) apci1564_timer_insn_write() argument
77 apci1564_timer_insn_read(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) apci1564_timer_insn_read() argument
94 apci1564_counter_insn_config(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) apci1564_counter_insn_config() argument
139 apci1564_counter_insn_write(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) apci1564_counter_insn_write() argument
167 apci1564_counter_insn_read(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) apci1564_counter_insn_read() argument
H A Dhwdrv_apci3501.c21 struct comedi_insn *insn, apci3501_config_insn_timer()
70 return insn->n; apci3501_config_insn_timer()
87 struct comedi_insn *insn, apci3501_write_insn_timer()
112 return insn->n; apci3501_write_insn_timer()
127 struct comedi_insn *insn, apci3501_read_insn_timer()
140 return insn->n; apci3501_read_insn_timer()
19 apci3501_config_insn_timer(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) apci3501_config_insn_timer() argument
85 apci3501_write_insn_timer(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) apci3501_write_insn_timer() argument
125 apci3501_read_insn_timer(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) apci3501_read_insn_timer() argument
/linux-4.4.14/arch/mips/math-emu/
H A Dcp1emu.c97 union mips_instruction insn = *insn_ptr; microMIPS32_to_MIPS32() local
98 union mips_instruction mips32_insn = insn; microMIPS32_to_MIPS32()
101 switch (insn.mm_i_format.opcode) { microMIPS32_to_MIPS32()
104 mips32_insn.mm_i_format.rt = insn.mm_i_format.rs; microMIPS32_to_MIPS32()
105 mips32_insn.mm_i_format.rs = insn.mm_i_format.rt; microMIPS32_to_MIPS32()
109 mips32_insn.mm_i_format.rt = insn.mm_i_format.rs; microMIPS32_to_MIPS32()
110 mips32_insn.mm_i_format.rs = insn.mm_i_format.rt; microMIPS32_to_MIPS32()
114 mips32_insn.mm_i_format.rt = insn.mm_i_format.rs; microMIPS32_to_MIPS32()
115 mips32_insn.mm_i_format.rs = insn.mm_i_format.rt; microMIPS32_to_MIPS32()
119 mips32_insn.mm_i_format.rt = insn.mm_i_format.rs; microMIPS32_to_MIPS32()
120 mips32_insn.mm_i_format.rs = insn.mm_i_format.rt; microMIPS32_to_MIPS32()
124 if ((insn.mm_i_format.rt == mm_bc1f_op) || microMIPS32_to_MIPS32()
125 (insn.mm_i_format.rt == mm_bc1t_op)) { microMIPS32_to_MIPS32()
129 (insn.mm_i_format.rt == mm_bc1t_op) ? 1 : 0; microMIPS32_to_MIPS32()
134 switch (insn.mm_fp0_format.func) { microMIPS32_to_MIPS32()
143 op = insn.mm_fp0_format.func; microMIPS32_to_MIPS32()
161 mips32_insn.fp6_format.fr = insn.mm_fp6_format.fr; microMIPS32_to_MIPS32()
162 mips32_insn.fp6_format.ft = insn.mm_fp6_format.ft; microMIPS32_to_MIPS32()
163 mips32_insn.fp6_format.fs = insn.mm_fp6_format.fs; microMIPS32_to_MIPS32()
164 mips32_insn.fp6_format.fd = insn.mm_fp6_format.fd; microMIPS32_to_MIPS32()
169 op = insn.mm_fp5_format.op & 0x7; microMIPS32_to_MIPS32()
182 insn.mm_fp5_format.base; microMIPS32_to_MIPS32()
184 insn.mm_fp5_format.index; microMIPS32_to_MIPS32()
186 mips32_insn.r_format.re = insn.mm_fp5_format.fd; microMIPS32_to_MIPS32()
193 if (insn.mm_fp2_format.op == mm_fmovt_op) microMIPS32_to_MIPS32()
195 else if (insn.mm_fp2_format.op == mm_fmovf_op) microMIPS32_to_MIPS32()
200 sdps_format[insn.mm_fp2_format.fmt]; microMIPS32_to_MIPS32()
202 (insn.mm_fp2_format.cc<<2) + op; microMIPS32_to_MIPS32()
204 insn.mm_fp2_format.fs; microMIPS32_to_MIPS32()
206 insn.mm_fp2_format.fd; microMIPS32_to_MIPS32()
213 if (insn.mm_fp0_format.op == mm_fadd_op) microMIPS32_to_MIPS32()
215 else if (insn.mm_fp0_format.op == mm_fsub_op) microMIPS32_to_MIPS32()
217 else if (insn.mm_fp0_format.op == mm_fmul_op) microMIPS32_to_MIPS32()
219 else if (insn.mm_fp0_format.op == mm_fdiv_op) microMIPS32_to_MIPS32()
224 sdps_format[insn.mm_fp0_format.fmt]; microMIPS32_to_MIPS32()
226 insn.mm_fp0_format.ft; microMIPS32_to_MIPS32()
228 insn.mm_fp0_format.fs; microMIPS32_to_MIPS32()
230 insn.mm_fp0_format.fd; microMIPS32_to_MIPS32()
237 if (insn.mm_fp0_format.op == mm_fmovn_op) microMIPS32_to_MIPS32()
239 else if (insn.mm_fp0_format.op == mm_fmovz_op) microMIPS32_to_MIPS32()
244 sdps_format[insn.mm_fp0_format.fmt]; microMIPS32_to_MIPS32()
246 insn.mm_fp0_format.ft; microMIPS32_to_MIPS32()
248 insn.mm_fp0_format.fs; microMIPS32_to_MIPS32()
250 insn.mm_fp0_format.fd; microMIPS32_to_MIPS32()
256 switch (insn.mm_fp1_format.op) { microMIPS32_to_MIPS32()
261 if ((insn.mm_fp1_format.op & 0x7f) == microMIPS32_to_MIPS32()
267 mips32_insn.r_format.rs = insn.mm_fp4_format.fs; microMIPS32_to_MIPS32()
269 (insn.mm_fp4_format.cc << 2) + op; microMIPS32_to_MIPS32()
270 mips32_insn.r_format.rd = insn.mm_fp4_format.rt; microMIPS32_to_MIPS32()
278 if ((insn.mm_fp1_format.op & 0x7f) == microMIPS32_to_MIPS32()
281 fmt = swl_format[insn.mm_fp3_format.fmt]; microMIPS32_to_MIPS32()
284 fmt = dwl_format[insn.mm_fp3_format.fmt]; microMIPS32_to_MIPS32()
290 insn.mm_fp3_format.fs; microMIPS32_to_MIPS32()
292 insn.mm_fp3_format.rt; microMIPS32_to_MIPS32()
301 if ((insn.mm_fp1_format.op & 0x7f) == microMIPS32_to_MIPS32()
304 else if ((insn.mm_fp1_format.op & 0x7f) == microMIPS32_to_MIPS32()
311 sdps_format[insn.mm_fp3_format.fmt]; microMIPS32_to_MIPS32()
314 insn.mm_fp3_format.fs; microMIPS32_to_MIPS32()
316 insn.mm_fp3_format.rt; microMIPS32_to_MIPS32()
329 if (insn.mm_fp1_format.op == mm_ffloorl_op) microMIPS32_to_MIPS32()
331 else if (insn.mm_fp1_format.op == mm_ffloorw_op) microMIPS32_to_MIPS32()
333 else if (insn.mm_fp1_format.op == mm_fceill_op) microMIPS32_to_MIPS32()
335 else if (insn.mm_fp1_format.op == mm_fceilw_op) microMIPS32_to_MIPS32()
337 else if (insn.mm_fp1_format.op == mm_ftruncl_op) microMIPS32_to_MIPS32()
339 else if (insn.mm_fp1_format.op == mm_ftruncw_op) microMIPS32_to_MIPS32()
341 else if (insn.mm_fp1_format.op == mm_froundl_op) microMIPS32_to_MIPS32()
343 else if (insn.mm_fp1_format.op == mm_froundw_op) microMIPS32_to_MIPS32()
345 else if (insn.mm_fp1_format.op == mm_fcvtl_op) microMIPS32_to_MIPS32()
351 sd_format[insn.mm_fp1_format.fmt]; microMIPS32_to_MIPS32()
354 insn.mm_fp1_format.fs; microMIPS32_to_MIPS32()
356 insn.mm_fp1_format.rt; microMIPS32_to_MIPS32()
362 if (insn.mm_fp1_format.op == mm_frsqrt_op) microMIPS32_to_MIPS32()
364 else if (insn.mm_fp1_format.op == mm_fsqrt_op) microMIPS32_to_MIPS32()
370 sdps_format[insn.mm_fp1_format.fmt]; microMIPS32_to_MIPS32()
373 insn.mm_fp1_format.fs; microMIPS32_to_MIPS32()
375 insn.mm_fp1_format.rt; microMIPS32_to_MIPS32()
384 if (insn.mm_fp1_format.op == mm_mfc1_op) microMIPS32_to_MIPS32()
386 else if (insn.mm_fp1_format.op == mm_mtc1_op) microMIPS32_to_MIPS32()
388 else if (insn.mm_fp1_format.op == mm_cfc1_op) microMIPS32_to_MIPS32()
390 else if (insn.mm_fp1_format.op == mm_ctc1_op) microMIPS32_to_MIPS32()
392 else if (insn.mm_fp1_format.op == mm_mfhc1_op) microMIPS32_to_MIPS32()
399 insn.mm_fp1_format.rt; microMIPS32_to_MIPS32()
401 insn.mm_fp1_format.fs; microMIPS32_to_MIPS32()
412 sdps_format[insn.mm_fp4_format.fmt]; microMIPS32_to_MIPS32()
413 mips32_insn.fp0_format.ft = insn.mm_fp4_format.rt; microMIPS32_to_MIPS32()
414 mips32_insn.fp0_format.fs = insn.mm_fp4_format.fs; microMIPS32_to_MIPS32()
415 mips32_insn.fp0_format.fd = insn.mm_fp4_format.cc << 2; microMIPS32_to_MIPS32()
417 insn.mm_fp4_format.cond | MM_MIPS32_COND_FC; microMIPS32_to_MIPS32()
440 union mips_instruction insn = (union mips_instruction)dec_insn.insn; isBranchInstr() local
444 switch (insn.i_format.opcode) { isBranchInstr()
446 switch (insn.r_format.func) { isBranchInstr()
448 if (insn.r_format.rd != 0) { isBranchInstr()
449 regs->regs[insn.r_format.rd] = isBranchInstr()
456 if (NO_R6EMU && insn.r_format.func == jr_op) isBranchInstr()
458 *contpc = regs->regs[insn.r_format.rs]; isBranchInstr()
463 switch (insn.i_format.rt) { isBranchInstr()
466 if (NO_R6EMU && (insn.i_format.rs || isBranchInstr()
467 insn.i_format.rt == bltzall_op)) isBranchInstr()
478 if ((long)regs->regs[insn.i_format.rs] < 0) isBranchInstr()
481 (insn.i_format.simmediate << 2); isBranchInstr()
489 if (NO_R6EMU && (insn.i_format.rs || isBranchInstr()
490 insn.i_format.rt == bgezall_op)) isBranchInstr()
501 if ((long)regs->regs[insn.i_format.rs] >= 0) isBranchInstr()
504 (insn.i_format.simmediate << 2); isBranchInstr()
523 *contpc |= (insn.j_format.target << 2); isBranchInstr()
531 if (regs->regs[insn.i_format.rs] == isBranchInstr()
532 regs->regs[insn.i_format.rt]) isBranchInstr()
535 (insn.i_format.simmediate << 2); isBranchInstr()
545 if (regs->regs[insn.i_format.rs] != isBranchInstr()
546 regs->regs[insn.i_format.rt]) isBranchInstr()
549 (insn.i_format.simmediate << 2); isBranchInstr()
556 if (!insn.i_format.rt && NO_R6EMU) isBranchInstr()
572 if (cpu_has_mips_r6 && insn.i_format.rt) { isBranchInstr()
573 if ((insn.i_format.opcode == blez_op) && isBranchInstr()
574 ((!insn.i_format.rs && insn.i_format.rt) || isBranchInstr()
575 (insn.i_format.rs == insn.i_format.rt))) isBranchInstr()
583 if ((long)regs->regs[insn.i_format.rs] <= 0) isBranchInstr()
586 (insn.i_format.simmediate << 2); isBranchInstr()
593 if (!insn.i_format.rt && NO_R6EMU) isBranchInstr()
609 if (cpu_has_mips_r6 && insn.i_format.rt) { isBranchInstr()
610 if ((insn.i_format.opcode == blez_op) && isBranchInstr()
611 ((!insn.i_format.rs && insn.i_format.rt) || isBranchInstr()
612 (insn.i_format.rs == insn.i_format.rt))) isBranchInstr()
621 if ((long)regs->regs[insn.i_format.rs] > 0) isBranchInstr()
624 (insn.i_format.simmediate << 2); isBranchInstr()
634 if (insn.i_format.rt && !insn.i_format.rs) isBranchInstr()
642 if ((regs->regs[insn.i_format.rs] & (1ull<<insn.i_format.rt)) == 0) isBranchInstr()
643 *contpc = regs->cp0_epc + 4 + (insn.i_format.simmediate << 2); isBranchInstr()
648 if ((regs->regs[insn.i_format.rs] & (1ull<<(insn.i_format.rt + 32))) == 0) isBranchInstr()
649 *contpc = regs->cp0_epc + 4 + (insn.i_format.simmediate << 2); isBranchInstr()
654 if (regs->regs[insn.i_format.rs] & (1ull<<insn.i_format.rt)) isBranchInstr()
655 *contpc = regs->cp0_epc + 4 + (insn.i_format.simmediate << 2); isBranchInstr()
660 if (regs->regs[insn.i_format.rs] & (1ull<<(insn.i_format.rt + 32))) isBranchInstr()
661 *contpc = regs->cp0_epc + 4 + (insn.i_format.simmediate << 2); isBranchInstr()
696 if (!insn.i_format.rs) isBranchInstr()
707 ((insn.i_format.rs == bc1eqz_op) || isBranchInstr()
708 (insn.i_format.rs == bc1nez_op))) { isBranchInstr()
710 switch (insn.i_format.rs) { isBranchInstr()
712 if (get_fpr32(&current->thread.fpu.fpr[insn.i_format.rt], 0) & 0x1) isBranchInstr()
716 if (!(get_fpr32(&current->thread.fpu.fpr[insn.i_format.rt], 0) & 0x1)) isBranchInstr()
723 (insn.i_format.simmediate << 2); isBranchInstr()
734 if (insn.i_format.rs == bc_op) { isBranchInstr()
742 bit = (insn.i_format.rt >> 2); isBranchInstr()
745 switch (insn.i_format.rt & 3) { isBranchInstr()
751 (insn.i_format.simmediate << 2); isBranchInstr()
762 (insn.i_format.simmediate << 2); isBranchInstr()
1021 ir = dec_insn.insn; /* process current instr */ cop1Emulate()
1337 * dslot as normal insn cop1Emulate()
2529 dec_insn.insn = (*instr_ptr << 16) | fpu_emulator_cop1Handler()
2535 dec_insn.insn = (*instr_ptr << 16) | fpu_emulator_cop1Handler()
2556 if ((get_user(dec_insn.insn, fpu_emulator_cop1Handler()
2568 if ((dec_insn.insn == 0) || fpu_emulator_cop1Handler()
2570 ((dec_insn.insn & 0xffff) == MM_NOP16))) fpu_emulator_cop1Handler()
/linux-4.4.14/drivers/staging/comedi/drivers/
H A Dmultiq3.c92 struct comedi_insn *insn, multiq3_ai_status()
105 struct comedi_insn *insn, multiq3_ai_insn_read()
108 unsigned int chan = CR_CHAN(insn->chanspec); multiq3_ai_insn_read()
115 ret = comedi_timeout(dev, s, insn, multiq3_ai_status, multiq3_ai_insn_read()
120 for (i = 0; i < insn->n; i++) { multiq3_ai_insn_read()
123 ret = comedi_timeout(dev, s, insn, multiq3_ai_status, multiq3_ai_insn_read()
137 return insn->n; multiq3_ai_insn_read()
142 struct comedi_insn *insn, multiq3_ao_insn_write()
145 unsigned int chan = CR_CHAN(insn->chanspec); multiq3_ao_insn_write()
149 for (i = 0; i < insn->n; i++) { multiq3_ao_insn_write()
158 return insn->n; multiq3_ao_insn_write()
163 struct comedi_insn *insn, unsigned int *data) multiq3_di_insn_bits()
167 return insn->n; multiq3_di_insn_bits()
172 struct comedi_insn *insn, multiq3_do_insn_bits()
180 return insn->n; multiq3_do_insn_bits()
185 struct comedi_insn *insn, multiq3_encoder_insn_read()
188 unsigned int chan = CR_CHAN(insn->chanspec); multiq3_encoder_insn_read()
192 for (i = 0; i < insn->n; i++) { multiq3_encoder_insn_read()
226 return insn->n; multiq3_encoder_insn_read()
244 struct comedi_insn *insn, multiq3_encoder_insn_config()
247 unsigned int chan = CR_CHAN(insn->chanspec); multiq3_encoder_insn_config()
257 return insn->n; multiq3_encoder_insn_config()
90 multiq3_ai_status(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned long context) multiq3_ai_status() argument
103 multiq3_ai_insn_read(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) multiq3_ai_insn_read() argument
140 multiq3_ao_insn_write(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) multiq3_ao_insn_write() argument
161 multiq3_di_insn_bits(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) multiq3_di_insn_bits() argument
170 multiq3_do_insn_bits(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) multiq3_do_insn_bits() argument
183 multiq3_encoder_insn_read(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) multiq3_encoder_insn_read() argument
242 multiq3_encoder_insn_config(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) multiq3_encoder_insn_config() argument
H A Dke_counter.c52 struct comedi_insn *insn, ke_counter_insn_write()
55 unsigned int chan = CR_CHAN(insn->chanspec); ke_counter_insn_write()
59 for (i = 0; i < insn->n; i++) { ke_counter_insn_write()
69 return insn->n; ke_counter_insn_write()
74 struct comedi_insn *insn, ke_counter_insn_read()
77 unsigned int chan = CR_CHAN(insn->chanspec); ke_counter_insn_read()
81 for (i = 0; i < insn->n; i++) { ke_counter_insn_read()
93 return insn->n; ke_counter_insn_read()
106 struct comedi_insn *insn, ke_counter_insn_config()
154 return insn->n; ke_counter_insn_config()
159 struct comedi_insn *insn, ke_counter_do_insn_bits()
167 return insn->n; ke_counter_do_insn_bits()
50 ke_counter_insn_write(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) ke_counter_insn_write() argument
72 ke_counter_insn_read(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) ke_counter_insn_read() argument
104 ke_counter_insn_config(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) ke_counter_insn_config() argument
157 ke_counter_do_insn_bits(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) ke_counter_do_insn_bits() argument
H A Daddi_watchdog.c43 struct comedi_insn *insn, addi_watchdog_insn_config()
68 return insn->n; addi_watchdog_insn_config()
73 struct comedi_insn *insn, addi_watchdog_insn_read()
79 for (i = 0; i < insn->n; i++) addi_watchdog_insn_read()
82 return insn->n; addi_watchdog_insn_read()
87 struct comedi_insn *insn, addi_watchdog_insn_write()
99 for (i = 0; i < insn->n; i++) { addi_watchdog_insn_write()
104 return insn->n; addi_watchdog_insn_write()
41 addi_watchdog_insn_config(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) addi_watchdog_insn_config() argument
71 addi_watchdog_insn_read(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) addi_watchdog_insn_read() argument
85 addi_watchdog_insn_write(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) addi_watchdog_insn_write() argument
H A Dadl_pci8164.c42 struct comedi_insn *insn, adl_pci8164_insn_read()
46 unsigned int chan = CR_CHAN(insn->chanspec); adl_pci8164_insn_read()
49 for (i = 0; i < insn->n; i++) adl_pci8164_insn_read()
52 return insn->n; adl_pci8164_insn_read()
57 struct comedi_insn *insn, adl_pci8164_insn_write()
61 unsigned int chan = CR_CHAN(insn->chanspec); adl_pci8164_insn_write()
64 for (i = 0; i < insn->n; i++) adl_pci8164_insn_write()
67 return insn->n; adl_pci8164_insn_write()
40 adl_pci8164_insn_read(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) adl_pci8164_insn_read() argument
55 adl_pci8164_insn_write(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) adl_pci8164_insn_write() argument
H A Dfl512.c61 struct comedi_insn *insn, fl512_ai_insn_read()
64 unsigned int chan = CR_CHAN(insn->chanspec); fl512_ai_insn_read()
70 for (i = 0; i < insn->n; i++) { fl512_ai_insn_read()
83 return insn->n; fl512_ai_insn_read()
88 struct comedi_insn *insn, fl512_ao_insn_write()
91 unsigned int chan = CR_CHAN(insn->chanspec); fl512_ao_insn_write()
95 for (i = 0; i < insn->n; i++) { fl512_ao_insn_write()
105 return insn->n; fl512_ao_insn_write()
59 fl512_ai_insn_read(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) fl512_ai_insn_read() argument
86 fl512_ao_insn_write(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) fl512_ao_insn_write() argument
H A Dicp_multi.c99 struct comedi_insn *insn, icp_multi_ai_eoc()
112 struct comedi_insn *insn, icp_multi_ai_insn_read()
115 unsigned int chan = CR_CHAN(insn->chanspec); icp_multi_ai_insn_read()
116 unsigned int range = CR_RANGE(insn->chanspec); icp_multi_ai_insn_read()
117 unsigned int aref = CR_AREF(insn->chanspec); icp_multi_ai_insn_read()
132 for (n = 0; n < insn->n; n++) { icp_multi_ai_insn_read()
140 ret = comedi_timeout(dev, s, insn, icp_multi_ai_eoc, 0); icp_multi_ai_insn_read()
152 struct comedi_insn *insn, icp_multi_ao_ready()
165 struct comedi_insn *insn, icp_multi_ao_insn_write()
168 unsigned int chan = CR_CHAN(insn->chanspec); icp_multi_ao_insn_write()
169 unsigned int range = CR_RANGE(insn->chanspec); icp_multi_ao_insn_write()
178 for (i = 0; i < insn->n; i++) { icp_multi_ao_insn_write()
183 ret = comedi_timeout(dev, s, insn, icp_multi_ao_ready, 0); icp_multi_ao_insn_write()
196 return insn->n; icp_multi_ao_insn_write()
201 struct comedi_insn *insn, icp_multi_di_insn_bits()
206 return insn->n; icp_multi_di_insn_bits()
211 struct comedi_insn *insn, icp_multi_do_insn_bits()
219 return insn->n; icp_multi_do_insn_bits()
97 icp_multi_ai_eoc(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned long context) icp_multi_ai_eoc() argument
110 icp_multi_ai_insn_read(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) icp_multi_ai_insn_read() argument
150 icp_multi_ao_ready(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned long context) icp_multi_ao_ready() argument
163 icp_multi_ao_insn_write(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) icp_multi_ao_insn_write() argument
199 icp_multi_di_insn_bits(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) icp_multi_di_insn_bits() argument
209 icp_multi_do_insn_bits(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) icp_multi_do_insn_bits() argument
H A Drti800.c144 struct comedi_insn *insn, rti800_ai_eoc()
161 struct comedi_insn *insn, rti800_ai_insn_read()
165 unsigned int chan = CR_CHAN(insn->chanspec); rti800_ai_insn_read()
166 unsigned int gain = CR_RANGE(insn->chanspec); rti800_ai_insn_read()
182 if (insn->n > 0) { rti800_ai_insn_read()
191 for (i = 0; i < insn->n; i++) { rti800_ai_insn_read()
196 ret = comedi_timeout(dev, s, insn, rti800_ai_eoc, 0); rti800_ai_insn_read()
209 return insn->n; rti800_ai_insn_read()
214 struct comedi_insn *insn, rti800_ao_insn_write()
218 unsigned int chan = CR_CHAN(insn->chanspec); rti800_ao_insn_write()
223 for (i = 0; i < insn->n; i++) { rti800_ao_insn_write()
235 return insn->n; rti800_ao_insn_write()
240 struct comedi_insn *insn, rti800_di_insn_bits()
244 return insn->n; rti800_di_insn_bits()
249 struct comedi_insn *insn, rti800_do_insn_bits()
259 return insn->n; rti800_do_insn_bits()
142 rti800_ai_eoc(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned long context) rti800_ai_eoc() argument
159 rti800_ai_insn_read(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) rti800_ai_insn_read() argument
212 rti800_ao_insn_write(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) rti800_ao_insn_write() argument
238 rti800_di_insn_bits(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) rti800_di_insn_bits() argument
247 rti800_do_insn_bits(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) rti800_do_insn_bits() argument
H A Dpcmad.c65 struct comedi_insn *insn, pcmad_ai_eoc()
78 struct comedi_insn *insn, pcmad_ai_insn_read()
81 unsigned int chan = CR_CHAN(insn->chanspec); pcmad_ai_insn_read()
82 unsigned int range = CR_RANGE(insn->chanspec); pcmad_ai_insn_read()
87 for (i = 0; i < insn->n; i++) { pcmad_ai_insn_read()
90 ret = comedi_timeout(dev, s, insn, pcmad_ai_eoc, 0); pcmad_ai_insn_read()
109 return insn->n; pcmad_ai_insn_read()
63 pcmad_ai_eoc(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned long context) pcmad_ai_eoc() argument
76 pcmad_ai_insn_read(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) pcmad_ai_insn_read() argument
H A Dadl_pci6208.c53 struct comedi_insn *insn, pci6208_ao_eoc()
66 struct comedi_insn *insn, pci6208_ao_insn_write()
69 unsigned int chan = CR_CHAN(insn->chanspec); pci6208_ao_insn_write()
74 for (i = 0; i < insn->n; i++) { pci6208_ao_insn_write()
78 ret = comedi_timeout(dev, s, insn, pci6208_ao_eoc, 0); pci6208_ao_insn_write()
89 return insn->n; pci6208_ao_insn_write()
94 struct comedi_insn *insn, pci6208_di_insn_bits()
104 return insn->n; pci6208_di_insn_bits()
109 struct comedi_insn *insn, pci6208_do_insn_bits()
117 return insn->n; pci6208_do_insn_bits()
51 pci6208_ao_eoc(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned long context) pci6208_ao_eoc() argument
64 pci6208_ao_insn_write(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) pci6208_ao_insn_write() argument
92 pci6208_di_insn_bits(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) pci6208_di_insn_bits() argument
107 pci6208_do_insn_bits(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) pci6208_do_insn_bits() argument
H A Ds526.c157 struct comedi_insn *insn, s526_gpct_rinsn()
160 unsigned int chan = CR_CHAN(insn->chanspec); s526_gpct_rinsn()
163 for (i = 0; i < insn->n; i++) s526_gpct_rinsn()
166 return insn->n; s526_gpct_rinsn()
171 struct comedi_insn *insn, s526_gpct_insn_config()
175 unsigned int chan = CR_CHAN(insn->chanspec); s526_gpct_insn_config()
323 return insn->n; s526_gpct_insn_config()
328 struct comedi_insn *insn, s526_gpct_winsn()
332 unsigned int chan = CR_CHAN(insn->chanspec); s526_gpct_winsn()
360 return insn->n; s526_gpct_winsn()
365 struct comedi_insn *insn, s526_eoc()
381 struct comedi_insn *insn, s526_ai_insn_read()
385 unsigned int chan = CR_CHAN(insn->chanspec); s526_ai_insn_read()
402 for (i = 0; i < insn->n; i++) { s526_ai_insn_read()
408 ret = comedi_timeout(dev, s, insn, s526_eoc, S526_INT_AI); s526_ai_insn_read()
416 return insn->n; s526_ai_insn_read()
421 struct comedi_insn *insn, s526_ao_insn_write()
424 unsigned int chan = CR_CHAN(insn->chanspec); s526_ao_insn_write()
433 for (i = 0; i < insn->n; i++) { s526_ao_insn_write()
439 ret = comedi_timeout(dev, s, insn, s526_eoc, S526_INT_AO); s526_ao_insn_write()
445 return insn->n; s526_ao_insn_write()
450 struct comedi_insn *insn, s526_dio_insn_bits()
458 return insn->n; s526_dio_insn_bits()
463 struct comedi_insn *insn, s526_dio_insn_config()
466 unsigned int chan = CR_CHAN(insn->chanspec); s526_dio_insn_config()
479 ret = comedi_dio_insn_config(dev, s, insn, data, mask); s526_dio_insn_config()
494 return insn->n; s526_dio_insn_config()
155 s526_gpct_rinsn(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) s526_gpct_rinsn() argument
169 s526_gpct_insn_config(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) s526_gpct_insn_config() argument
326 s526_gpct_winsn(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) s526_gpct_winsn() argument
363 s526_eoc(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned long context) s526_eoc() argument
379 s526_ai_insn_read(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) s526_ai_insn_read() argument
419 s526_ao_insn_write(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) s526_ao_insn_write() argument
448 s526_dio_insn_bits(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) s526_dio_insn_bits() argument
461 s526_dio_insn_config(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) s526_dio_insn_config() argument
H A Dcb_das16_cs.c137 struct comedi_insn *insn, das16cs_ai_eoc()
150 struct comedi_insn *insn, das16cs_ai_insn_read()
154 int chan = CR_CHAN(insn->chanspec); das16cs_ai_insn_read()
155 int range = CR_RANGE(insn->chanspec); das16cs_ai_insn_read()
156 int aref = CR_AREF(insn->chanspec); das16cs_ai_insn_read()
189 for (i = 0; i < insn->n; i++) { das16cs_ai_insn_read()
192 ret = comedi_timeout(dev, s, insn, das16cs_ai_eoc, 0); das16cs_ai_insn_read()
204 struct comedi_insn *insn, das16cs_ao_insn_write()
208 unsigned int chan = CR_CHAN(insn->chanspec); das16cs_ao_insn_write()
214 for (i = 0; i < insn->n; i++) { das16cs_ao_insn_write()
250 return insn->n; das16cs_ao_insn_write()
255 struct comedi_insn *insn, das16cs_dio_insn_bits()
263 return insn->n; das16cs_dio_insn_bits()
268 struct comedi_insn *insn, das16cs_dio_insn_config()
272 unsigned int chan = CR_CHAN(insn->chanspec); das16cs_dio_insn_config()
281 ret = comedi_dio_insn_config(dev, s, insn, data, mask); das16cs_dio_insn_config()
295 return insn->n; das16cs_dio_insn_config()
300 struct comedi_insn *insn, das16cs_counter_insn_config()
332 return insn->n; das16cs_counter_insn_config()
135 das16cs_ai_eoc(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned long context) das16cs_ai_eoc() argument
148 das16cs_ai_insn_read(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) das16cs_ai_insn_read() argument
202 das16cs_ao_insn_write(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) das16cs_ao_insn_write() argument
253 das16cs_dio_insn_bits(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) das16cs_dio_insn_bits() argument
266 das16cs_dio_insn_config(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) das16cs_dio_insn_config() argument
298 das16cs_counter_insn_config(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) das16cs_counter_insn_config() argument
H A Ddas08.c166 struct comedi_insn *insn, das08_ai_eoc()
179 struct comedi_insn *insn, unsigned int *data) das08_ai_insn_read()
189 chan = CR_CHAN(insn->chanspec); das08_ai_insn_read()
190 range = CR_RANGE(insn->chanspec); das08_ai_insn_read()
206 range = CR_RANGE(insn->chanspec); das08_ai_insn_read()
211 for (n = 0; n < insn->n; n++) { das08_ai_insn_read()
220 ret = comedi_timeout(dev, s, insn, das08_ai_eoc, 0); das08_ai_insn_read()
262 struct comedi_insn *insn, unsigned int *data) das08_di_insn_bits()
267 return insn->n; das08_di_insn_bits()
272 struct comedi_insn *insn, unsigned int *data) das08_do_insn_bits()
287 return insn->n; das08_do_insn_bits()
292 struct comedi_insn *insn, unsigned int *data) das08jr_di_insn_bits()
297 return insn->n; das08jr_di_insn_bits()
302 struct comedi_insn *insn, unsigned int *data) das08jr_do_insn_bits()
309 return insn->n; das08jr_do_insn_bits()
336 struct comedi_insn *insn, das08_ao_insn_write()
339 unsigned int chan = CR_CHAN(insn->chanspec); das08_ao_insn_write()
343 for (i = 0; i < insn->n; i++) { das08_ao_insn_write()
349 return insn->n; das08_ao_insn_write()
164 das08_ai_eoc(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned long context) das08_ai_eoc() argument
177 das08_ai_insn_read(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) das08_ai_insn_read() argument
260 das08_di_insn_bits(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) das08_di_insn_bits() argument
270 das08_do_insn_bits(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) das08_do_insn_bits() argument
290 das08jr_di_insn_bits(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) das08jr_di_insn_bits() argument
300 das08jr_do_insn_bits(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) das08jr_do_insn_bits() argument
334 das08_ao_insn_write(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) das08_ao_insn_write() argument
H A Ddt2815.c69 struct comedi_insn *insn, dt2815_ao_status()
82 struct comedi_insn *insn, unsigned int *data) dt2815_ao_insn_read()
86 int chan = CR_CHAN(insn->chanspec); dt2815_ao_insn_read()
88 for (i = 0; i < insn->n; i++) dt2815_ao_insn_read()
95 struct comedi_insn *insn, unsigned int *data) dt2815_ao_insn()
99 int chan = CR_CHAN(insn->chanspec); dt2815_ao_insn()
103 for (i = 0; i < insn->n; i++) { dt2815_ao_insn()
107 ret = comedi_timeout(dev, s, insn, dt2815_ao_status, 0x00); dt2815_ao_insn()
113 ret = comedi_timeout(dev, s, insn, dt2815_ao_status, 0x10); dt2815_ao_insn()
67 dt2815_ao_status(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned long context) dt2815_ao_status() argument
80 dt2815_ao_insn_read(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) dt2815_ao_insn_read() argument
94 dt2815_ao_insn(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) dt2815_ao_insn() argument
H A Daio_aio12_8.c110 struct comedi_insn *insn, aio_aio12_8_ai_eoc()
123 struct comedi_insn *insn, aio_aio12_8_ai_read()
126 unsigned int chan = CR_CHAN(insn->chanspec); aio_aio12_8_ai_read()
127 unsigned int range = CR_RANGE(insn->chanspec); aio_aio12_8_ai_read()
143 for (i = 0; i < insn->n; i++) { aio_aio12_8_ai_read()
148 ret = comedi_timeout(dev, s, insn, aio_aio12_8_ai_eoc, 0); aio_aio12_8_ai_read()
161 return insn->n; aio_aio12_8_ai_read()
166 struct comedi_insn *insn, aio_aio12_8_ao_insn_write()
169 unsigned int chan = CR_CHAN(insn->chanspec); aio_aio12_8_ao_insn_write()
176 for (i = 0; i < insn->n; i++) { aio_aio12_8_ao_insn_write()
182 return insn->n; aio_aio12_8_ao_insn_write()
187 struct comedi_insn *insn, aio_aio12_8_counter_insn_config()
190 unsigned int chan = CR_CHAN(insn->chanspec); aio_aio12_8_counter_insn_config()
205 return insn->n; aio_aio12_8_counter_insn_config()
108 aio_aio12_8_ai_eoc(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned long context) aio_aio12_8_ai_eoc() argument
121 aio_aio12_8_ai_read(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) aio_aio12_8_ai_read() argument
164 aio_aio12_8_ao_insn_write(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) aio_aio12_8_ao_insn_write() argument
185 aio_aio12_8_counter_insn_config(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) aio_aio12_8_counter_insn_config() argument
H A Ddyna_pci10xx.c60 struct comedi_insn *insn, dyna_pci10xx_ai_eoc()
73 struct comedi_insn *insn, dyna_pci10xx_insn_read_ai()
83 chan = CR_CHAN(insn->chanspec); dyna_pci10xx_insn_read_ai()
84 range = range_codes_pci1050_ai[CR_RANGE((insn->chanspec))]; dyna_pci10xx_insn_read_ai()
88 for (n = 0; n < insn->n; n++) { dyna_pci10xx_insn_read_ai()
94 ret = comedi_timeout(dev, s, insn, dyna_pci10xx_ai_eoc, 0); dyna_pci10xx_insn_read_ai()
113 struct comedi_insn *insn, dyna_pci10xx_insn_write_ao()
120 chan = CR_CHAN(insn->chanspec); dyna_pci10xx_insn_write_ao()
121 range = range_codes_pci1050_ai[CR_RANGE((insn->chanspec))]; dyna_pci10xx_insn_write_ao()
124 for (n = 0; n < insn->n; n++) { dyna_pci10xx_insn_write_ao()
137 struct comedi_insn *insn, dyna_pci10xx_di_insn_bits()
152 return insn->n; dyna_pci10xx_di_insn_bits()
157 struct comedi_insn *insn, dyna_pci10xx_do_insn_bits()
172 return insn->n; dyna_pci10xx_do_insn_bits()
58 dyna_pci10xx_ai_eoc(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned long context) dyna_pci10xx_ai_eoc() argument
71 dyna_pci10xx_insn_read_ai(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) dyna_pci10xx_insn_read_ai() argument
111 dyna_pci10xx_insn_write_ao(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) dyna_pci10xx_insn_write_ao() argument
135 dyna_pci10xx_di_insn_bits(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) dyna_pci10xx_di_insn_bits() argument
155 dyna_pci10xx_do_insn_bits(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) dyna_pci10xx_do_insn_bits() argument
H A Dmf6x4.c95 struct comedi_insn *insn, mf6x4_di_insn_bits()
100 return insn->n; mf6x4_di_insn_bits()
105 struct comedi_insn *insn, mf6x4_do_insn_bits()
113 return insn->n; mf6x4_do_insn_bits()
118 struct comedi_insn *insn, mf6x4_ai_eoc()
132 struct comedi_insn *insn, mf6x4_ai_insn_read()
135 unsigned int chan = CR_CHAN(insn->chanspec); mf6x4_ai_insn_read()
143 for (i = 0; i < insn->n; i++) { mf6x4_ai_insn_read()
147 ret = comedi_timeout(dev, s, insn, mf6x4_ai_eoc, 0); mf6x4_ai_insn_read()
160 return insn->n; mf6x4_ai_insn_read()
165 struct comedi_insn *insn, mf6x4_ao_insn_write()
169 unsigned int chan = CR_CHAN(insn->chanspec); mf6x4_ao_insn_write()
179 for (i = 0; i < insn->n; i++) { mf6x4_ao_insn_write()
185 return insn->n; mf6x4_ao_insn_write()
93 mf6x4_di_insn_bits(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) mf6x4_di_insn_bits() argument
103 mf6x4_do_insn_bits(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) mf6x4_do_insn_bits() argument
116 mf6x4_ai_eoc(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned long context) mf6x4_ai_eoc() argument
130 mf6x4_ai_insn_read(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) mf6x4_ai_insn_read() argument
163 mf6x4_ao_insn_write(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) mf6x4_ao_insn_write() argument
H A Daddi_apci_16xx.c59 struct comedi_insn *insn, apci16xx_insn_config()
62 unsigned int chan = CR_CHAN(insn->chanspec); apci16xx_insn_config()
75 ret = comedi_dio_insn_config(dev, s, insn, data, mask); apci16xx_insn_config()
81 return insn->n; apci16xx_insn_config()
86 struct comedi_insn *insn, apci16xx_dio_insn_bits()
94 return insn->n; apci16xx_dio_insn_bits()
57 apci16xx_insn_config(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) apci16xx_insn_config() argument
84 apci16xx_dio_insn_bits(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) apci16xx_dio_insn_bits() argument
H A Ddt2817.c44 struct comedi_insn *insn, dt2817_dio_insn_config()
47 unsigned int chan = CR_CHAN(insn->chanspec); dt2817_dio_insn_config()
61 ret = comedi_dio_insn_config(dev, s, insn, data, mask); dt2817_dio_insn_config()
76 return insn->n; dt2817_dio_insn_config()
81 struct comedi_insn *insn, dt2817_dio_insn_bits()
107 return insn->n; dt2817_dio_insn_bits()
42 dt2817_dio_insn_config(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) dt2817_dio_insn_config() argument
79 dt2817_dio_insn_bits(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) dt2817_dio_insn_bits() argument
H A Ddt2811.c225 struct comedi_insn *insn, dt2811_ai_eoc()
237 struct comedi_insn *insn, unsigned int *data) dt2811_ai_insn()
239 int chan = CR_CHAN(insn->chanspec); dt2811_ai_insn()
243 for (i = 0; i < insn->n; i++) { dt2811_ai_insn()
246 ret = comedi_timeout(dev, s, insn, dt2811_ai_eoc, 0); dt2811_ai_insn()
260 struct comedi_insn *insn, dt2811_ao_insn_write()
263 unsigned int chan = CR_CHAN(insn->chanspec); dt2811_ao_insn_write()
267 for (i = 0; i < insn->n; i++) { dt2811_ao_insn_write()
275 return insn->n; dt2811_ao_insn_write()
280 struct comedi_insn *insn, unsigned int *data) dt2811_di_insn_bits()
284 return insn->n; dt2811_di_insn_bits()
289 struct comedi_insn *insn, dt2811_do_insn_bits()
297 return insn->n; dt2811_do_insn_bits()
223 dt2811_ai_eoc(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned long context) dt2811_ai_eoc() argument
236 dt2811_ai_insn(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) dt2811_ai_insn() argument
258 dt2811_ao_insn_write(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) dt2811_ao_insn_write() argument
278 dt2811_di_insn_bits(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) dt2811_di_insn_bits() argument
287 dt2811_do_insn_bits(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) dt2811_do_insn_bits() argument
H A Dcb_pcimdas.c168 struct comedi_insn *insn, cb_pcimdas_ai_eoc()
182 struct comedi_insn *insn, cb_pcimdas_ai_insn_read()
186 unsigned int chan = CR_CHAN(insn->chanspec); cb_pcimdas_ai_insn_read()
187 unsigned int range = CR_RANGE(insn->chanspec); cb_pcimdas_ai_insn_read()
212 for (n = 0; n < insn->n; n++) { cb_pcimdas_ai_insn_read()
217 ret = comedi_timeout(dev, s, insn, cb_pcimdas_ai_eoc, 0); cb_pcimdas_ai_insn_read()
231 struct comedi_insn *insn, cb_pcimdas_ao_insn_write()
235 unsigned int chan = CR_CHAN(insn->chanspec); cb_pcimdas_ao_insn_write()
239 for (i = 0; i < insn->n; i++) { cb_pcimdas_ao_insn_write()
245 return insn->n; cb_pcimdas_ao_insn_write()
250 struct comedi_insn *insn, cb_pcimdas_di_insn_bits()
260 return insn->n; cb_pcimdas_di_insn_bits()
265 struct comedi_insn *insn, cb_pcimdas_do_insn_bits()
275 return insn->n; cb_pcimdas_do_insn_bits()
280 struct comedi_insn *insn, cb_pcimdas_counter_insn_config()
314 return insn->n; cb_pcimdas_counter_insn_config()
166 cb_pcimdas_ai_eoc(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned long context) cb_pcimdas_ai_eoc() argument
180 cb_pcimdas_ai_insn_read(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) cb_pcimdas_ai_insn_read() argument
229 cb_pcimdas_ao_insn_write(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) cb_pcimdas_ao_insn_write() argument
248 cb_pcimdas_di_insn_bits(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) cb_pcimdas_di_insn_bits() argument
263 cb_pcimdas_do_insn_bits(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) cb_pcimdas_do_insn_bits() argument
278 cb_pcimdas_counter_insn_config(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) cb_pcimdas_counter_insn_config() argument
H A Dcontec_pci_dio.c40 struct comedi_insn *insn, contec_do_insn_bits()
48 return insn->n; contec_do_insn_bits()
53 struct comedi_insn *insn, unsigned int *data) contec_di_insn_bits()
57 return insn->n; contec_di_insn_bits()
38 contec_do_insn_bits(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) contec_do_insn_bits() argument
51 contec_di_insn_bits(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) contec_di_insn_bits() argument
H A Dii_pci20kc.c144 struct comedi_insn *insn, ii20k_ao_insn_write()
148 unsigned int chan = CR_CHAN(insn->chanspec); ii20k_ao_insn_write()
151 for (i = 0; i < insn->n; i++) { ii20k_ao_insn_write()
164 return insn->n; ii20k_ao_insn_write()
169 struct comedi_insn *insn, ii20k_ai_eoc()
223 struct comedi_insn *insn, ii20k_ai_insn_read()
230 ii20k_ai_setup(dev, s, insn->chanspec); ii20k_ai_insn_read()
232 for (i = 0; i < insn->n; i++) { ii20k_ai_insn_read()
238 ret = comedi_timeout(dev, s, insn, ii20k_ai_eoc, 0); ii20k_ai_insn_read()
249 return insn->n; ii20k_ai_insn_read()
318 struct comedi_insn *insn, ii20k_dio_insn_config()
321 unsigned int chan = CR_CHAN(insn->chanspec); ii20k_dio_insn_config()
334 ret = comedi_dio_insn_config(dev, s, insn, data, mask); ii20k_dio_insn_config()
340 return insn->n; ii20k_dio_insn_config()
345 struct comedi_insn *insn, ii20k_dio_insn_bits()
371 return insn->n; ii20k_dio_insn_bits()
142 ii20k_ao_insn_write(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) ii20k_ao_insn_write() argument
167 ii20k_ai_eoc(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned long context) ii20k_ai_eoc() argument
221 ii20k_ai_insn_read(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) ii20k_ai_insn_read() argument
316 ii20k_dio_insn_config(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) ii20k_dio_insn_config() argument
343 ii20k_dio_insn_bits(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) ii20k_dio_insn_bits() argument
H A Dc6xdigio.c160 struct comedi_insn *insn, c6xdigio_pwm_insn_write()
163 unsigned int chan = CR_CHAN(insn->chanspec); c6xdigio_pwm_insn_write()
167 for (i = 0; i < insn->n; i++) { c6xdigio_pwm_insn_write()
181 return insn->n; c6xdigio_pwm_insn_write()
186 struct comedi_insn *insn, c6xdigio_pwm_insn_read()
189 unsigned int chan = CR_CHAN(insn->chanspec); c6xdigio_pwm_insn_read()
195 for (i = 0; i < insn->n; i++) c6xdigio_pwm_insn_read()
198 return insn->n; c6xdigio_pwm_insn_read()
203 struct comedi_insn *insn, c6xdigio_encoder_insn_read()
206 unsigned int chan = CR_CHAN(insn->chanspec); c6xdigio_encoder_insn_read()
210 for (i = 0; i < insn->n; i++) { c6xdigio_encoder_insn_read()
217 return insn->n; c6xdigio_encoder_insn_read()
158 c6xdigio_pwm_insn_write(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) c6xdigio_pwm_insn_write() argument
184 c6xdigio_pwm_insn_read(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) c6xdigio_pwm_insn_read() argument
201 c6xdigio_encoder_insn_read(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) c6xdigio_encoder_insn_read() argument
H A Dni_daq_700.c85 struct comedi_insn *insn, daq700_dio_insn_bits()
102 return insn->n; daq700_dio_insn_bits()
107 struct comedi_insn *insn, daq700_dio_insn_config()
112 ret = comedi_dio_insn_config(dev, s, insn, data, 0); daq700_dio_insn_config()
119 return insn->n; daq700_dio_insn_config()
124 struct comedi_insn *insn, daq700_ai_eoc()
142 struct comedi_insn *insn, unsigned int *data) daq700_ai_rinsn()
147 unsigned int chan = CR_CHAN(insn->chanspec); daq700_ai_rinsn()
148 unsigned int aref = CR_AREF(insn->chanspec); daq700_ai_rinsn()
149 unsigned int range = CR_RANGE(insn->chanspec); daq700_ai_rinsn()
167 for (n = 0; n < insn->n; n++) { daq700_ai_rinsn()
178 ret = comedi_timeout(dev, s, insn, daq700_ai_eoc, 0); daq700_ai_rinsn()
83 daq700_dio_insn_bits(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) daq700_dio_insn_bits() argument
105 daq700_dio_insn_config(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) daq700_dio_insn_config() argument
122 daq700_ai_eoc(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned long context) daq700_ai_eoc() argument
140 daq700_ai_rinsn(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) daq700_ai_rinsn() argument
H A Dni_at_ao.c137 struct comedi_insn *insn, atao_ao_insn_write()
140 unsigned int chan = CR_CHAN(insn->chanspec); atao_ao_insn_write()
147 for (i = 0; i < insn->n; i++) { atao_ao_insn_write()
159 return insn->n; atao_ao_insn_write()
164 struct comedi_insn *insn, atao_dio_insn_bits()
172 return insn->n; atao_dio_insn_bits()
177 struct comedi_insn *insn, atao_dio_insn_config()
181 unsigned int chan = CR_CHAN(insn->chanspec); atao_dio_insn_config()
190 ret = comedi_dio_insn_config(dev, s, insn, data, mask); atao_dio_insn_config()
205 return insn->n; atao_dio_insn_config()
243 struct comedi_insn *insn, atao_calib_insn_write()
246 unsigned int chan = CR_CHAN(insn->chanspec); atao_calib_insn_write()
248 if (insn->n) { atao_calib_insn_write()
249 unsigned int val = data[insn->n - 1]; atao_calib_insn_write()
271 return insn->n; atao_calib_insn_write()
135 atao_ao_insn_write(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) atao_ao_insn_write() argument
162 atao_dio_insn_bits(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) atao_dio_insn_bits() argument
175 atao_dio_insn_config(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) atao_dio_insn_config() argument
241 atao_calib_insn_write(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) atao_calib_insn_write() argument
H A Ddac02.c79 struct comedi_insn *insn, dac02_ao_insn_write()
82 unsigned int chan = CR_CHAN(insn->chanspec); dac02_ao_insn_write()
83 unsigned int range = CR_RANGE(insn->chanspec); dac02_ao_insn_write()
87 for (i = 0; i < insn->n; i++) { dac02_ao_insn_write()
108 return insn->n; dac02_ao_insn_write()
77 dac02_ao_insn_write(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) dac02_ao_insn_write() argument
H A Ddas6402.c374 struct comedi_insn *insn, das6402_ai_eoc()
387 struct comedi_insn *insn, das6402_ai_insn_read()
390 unsigned int chan = CR_CHAN(insn->chanspec); das6402_ai_insn_read()
391 unsigned int aref = CR_AREF(insn->chanspec); das6402_ai_insn_read()
401 das6402_ai_set_mode(dev, s, insn->chanspec, DAS6402_MODE_POLLED); das6402_ai_insn_read()
407 for (i = 0; i < insn->n; i++) { das6402_ai_insn_read()
411 ret = comedi_timeout(dev, s, insn, das6402_ai_eoc, 0); das6402_ai_insn_read()
420 return insn->n; das6402_ai_insn_read()
425 struct comedi_insn *insn, das6402_ao_insn_write()
429 unsigned int chan = CR_CHAN(insn->chanspec); das6402_ao_insn_write()
430 unsigned int range = CR_RANGE(insn->chanspec); das6402_ao_insn_write()
455 for (i = 0; i < insn->n; i++) { das6402_ao_insn_write()
480 return insn->n; das6402_ao_insn_write()
485 struct comedi_insn *insn, das6402_ao_insn_read()
488 unsigned int chan = CR_CHAN(insn->chanspec); das6402_ao_insn_read()
496 return comedi_readback_insn_read(dev, s, insn, data); das6402_ao_insn_read()
501 struct comedi_insn *insn, das6402_di_insn_bits()
506 return insn->n; das6402_di_insn_bits()
511 struct comedi_insn *insn, das6402_do_insn_bits()
519 return insn->n; das6402_do_insn_bits()
372 das6402_ai_eoc(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned long context) das6402_ai_eoc() argument
385 das6402_ai_insn_read(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) das6402_ai_insn_read() argument
423 das6402_ao_insn_write(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) das6402_ao_insn_write() argument
483 das6402_ao_insn_read(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) das6402_ao_insn_read() argument
499 das6402_di_insn_bits(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) das6402_di_insn_bits() argument
509 das6402_do_insn_bits(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) das6402_do_insn_bits() argument
H A Dadq12b.c104 struct comedi_insn *insn, adq12b_ai_eoc()
117 struct comedi_insn *insn, adq12b_ai_insn_read()
121 unsigned int chan = CR_CHAN(insn->chanspec); adq12b_ai_insn_read()
122 unsigned int range = CR_RANGE(insn->chanspec); adq12b_ai_insn_read()
137 for (i = 0; i < insn->n; i++) { adq12b_ai_insn_read()
138 ret = comedi_timeout(dev, s, insn, adq12b_ai_eoc, 0); adq12b_ai_insn_read()
148 return insn->n; adq12b_ai_insn_read()
153 struct comedi_insn *insn, unsigned int *data) adq12b_di_insn_bits()
158 return insn->n; adq12b_di_insn_bits()
163 struct comedi_insn *insn, adq12b_do_insn_bits()
183 return insn->n; adq12b_do_insn_bits()
102 adq12b_ai_eoc(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned long context) adq12b_ai_eoc() argument
115 adq12b_ai_insn_read(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) adq12b_ai_insn_read() argument
151 adq12b_di_insn_bits(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) adq12b_di_insn_bits() argument
161 adq12b_do_insn_bits(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) adq12b_do_insn_bits() argument
H A Dcb_pcidas.c321 struct comedi_insn *insn, cb_pcidas_ai_eoc()
335 struct comedi_insn *insn, cb_pcidas_ai_insn_read()
339 unsigned int chan = CR_CHAN(insn->chanspec); cb_pcidas_ai_insn_read()
340 unsigned int range = CR_RANGE(insn->chanspec); cb_pcidas_ai_insn_read()
341 unsigned int aref = CR_AREF(insn->chanspec); cb_pcidas_ai_insn_read()
347 if (insn->chanspec & CR_ALT_SOURCE) { cb_pcidas_ai_insn_read()
369 for (n = 0; n < insn->n; n++) { cb_pcidas_ai_insn_read()
374 ret = comedi_timeout(dev, s, insn, cb_pcidas_ai_eoc, 0); cb_pcidas_ai_insn_read()
388 struct comedi_insn *insn, cb_pcidas_ai_insn_config()
408 return insn->n; cb_pcidas_ai_insn_config()
411 /* analog output insn for pcidas-1000 and 1200 series */ cb_pcidas_ao_nofifo_insn_write()
414 struct comedi_insn *insn, cb_pcidas_ao_nofifo_insn_write()
418 unsigned int chan = CR_CHAN(insn->chanspec); cb_pcidas_ao_nofifo_insn_write()
419 unsigned int range = CR_RANGE(insn->chanspec); cb_pcidas_ao_nofifo_insn_write()
432 for (i = 0; i < insn->n; i++) { cb_pcidas_ao_nofifo_insn_write()
439 return insn->n; cb_pcidas_ao_nofifo_insn_write()
442 /* analog output insn for pcidas-1602 series */ cb_pcidas_ao_fifo_insn_write()
445 struct comedi_insn *insn, cb_pcidas_ao_fifo_insn_write()
449 unsigned int chan = CR_CHAN(insn->chanspec); cb_pcidas_ao_fifo_insn_write()
450 unsigned int range = CR_RANGE(insn->chanspec); cb_pcidas_ao_fifo_insn_write()
467 for (i = 0; i < insn->n; i++) { cb_pcidas_ao_fifo_insn_write()
474 return insn->n; cb_pcidas_ao_fifo_insn_write()
479 struct comedi_insn *insn, cb_pcidas_eeprom_ready()
493 struct comedi_insn *insn, cb_pcidas_eeprom_insn_read()
497 unsigned int chan = CR_CHAN(insn->chanspec); cb_pcidas_eeprom_insn_read()
501 for (i = 0; i < insn->n; i++) { cb_pcidas_eeprom_insn_read()
503 ret = comedi_timeout(dev, s, insn, cb_pcidas_eeprom_ready, 0); cb_pcidas_eeprom_insn_read()
519 ret = comedi_timeout(dev, s, insn, cb_pcidas_eeprom_ready, 0); cb_pcidas_eeprom_insn_read()
526 return insn->n; cb_pcidas_eeprom_insn_read()
570 struct comedi_insn *insn, cb_pcidas_caldac_insn_write()
573 unsigned int chan = CR_CHAN(insn->chanspec); cb_pcidas_caldac_insn_write()
575 if (insn->n) { cb_pcidas_caldac_insn_write()
576 unsigned int val = data[insn->n - 1]; cb_pcidas_caldac_insn_write()
586 return insn->n; cb_pcidas_caldac_insn_write()
607 struct comedi_insn *insn, cb_pcidas_dac08_insn_write()
610 unsigned int chan = CR_CHAN(insn->chanspec); cb_pcidas_dac08_insn_write()
612 if (insn->n) { cb_pcidas_dac08_insn_write()
613 unsigned int val = data[insn->n - 1]; cb_pcidas_dac08_insn_write()
621 return insn->n; cb_pcidas_dac08_insn_write()
640 struct comedi_insn *insn, cb_pcidas_trimpot_insn_write()
643 unsigned int chan = CR_CHAN(insn->chanspec); cb_pcidas_trimpot_insn_write()
645 if (insn->n) { cb_pcidas_trimpot_insn_write()
646 unsigned int val = data[insn->n - 1]; cb_pcidas_trimpot_insn_write()
654 return insn->n; cb_pcidas_trimpot_insn_write()
319 cb_pcidas_ai_eoc(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned long context) cb_pcidas_ai_eoc() argument
333 cb_pcidas_ai_insn_read(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) cb_pcidas_ai_insn_read() argument
386 cb_pcidas_ai_insn_config(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) cb_pcidas_ai_insn_config() argument
412 cb_pcidas_ao_nofifo_insn_write(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) cb_pcidas_ao_nofifo_insn_write() argument
443 cb_pcidas_ao_fifo_insn_write(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) cb_pcidas_ao_fifo_insn_write() argument
477 cb_pcidas_eeprom_ready(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned long context) cb_pcidas_eeprom_ready() argument
491 cb_pcidas_eeprom_insn_read(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) cb_pcidas_eeprom_insn_read() argument
568 cb_pcidas_caldac_insn_write(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) cb_pcidas_caldac_insn_write() argument
605 cb_pcidas_dac08_insn_write(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) cb_pcidas_dac08_insn_write() argument
638 cb_pcidas_trimpot_insn_write(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) cb_pcidas_trimpot_insn_write() argument
H A Dcomedi_parport.c83 struct comedi_insn *insn, parport_data_reg_insn_bits()
91 return insn->n; parport_data_reg_insn_bits()
96 struct comedi_insn *insn, parport_data_reg_insn_config()
102 ret = comedi_dio_insn_config(dev, s, insn, data, 0xff); parport_data_reg_insn_config()
113 return insn->n; parport_data_reg_insn_config()
118 struct comedi_insn *insn, parport_status_reg_insn_bits()
123 return insn->n; parport_status_reg_insn_bits()
128 struct comedi_insn *insn, parport_ctrl_reg_insn_bits()
142 return insn->n; parport_ctrl_reg_insn_bits()
147 struct comedi_insn *insn, parport_intr_insn_bits()
151 return insn->n; parport_intr_insn_bits()
81 parport_data_reg_insn_bits(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) parport_data_reg_insn_bits() argument
94 parport_data_reg_insn_config(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) parport_data_reg_insn_config() argument
116 parport_status_reg_insn_bits(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) parport_status_reg_insn_bits() argument
126 parport_ctrl_reg_insn_bits(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) parport_ctrl_reg_insn_bits() argument
145 parport_intr_insn_bits(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) parport_intr_insn_bits() argument
H A Dpcm3724.c158 /* overriding the 8255 insn config */ subdev_3724_insn_config()
161 struct comedi_insn *insn, subdev_3724_insn_config()
164 unsigned int chan = CR_CHAN(insn->chanspec); subdev_3724_insn_config()
177 ret = comedi_dio_insn_config(dev, s, insn, data, mask); subdev_3724_insn_config()
181 do_3724_config(dev, s, insn->chanspec); subdev_3724_insn_config()
182 enable_chan(dev, s, insn->chanspec); subdev_3724_insn_config()
184 return insn->n; subdev_3724_insn_config()
159 subdev_3724_insn_config(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) subdev_3724_insn_config() argument
H A Dpcl711.c246 struct comedi_insn *insn, pcl711_ai_eoc()
259 struct comedi_insn *insn, pcl711_ai_insn_read()
265 pcl711_set_changain(dev, s, insn->chanspec); pcl711_ai_insn_read()
269 for (i = 0; i < insn->n; i++) { pcl711_ai_insn_read()
272 ret = comedi_timeout(dev, s, insn, pcl711_ai_eoc, 0); pcl711_ai_insn_read()
279 return insn->n; pcl711_ai_insn_read()
375 struct comedi_insn *insn, pcl711_ao_insn_write()
378 unsigned int chan = CR_CHAN(insn->chanspec); pcl711_ao_insn_write()
382 for (i = 0; i < insn->n; i++) { pcl711_ao_insn_write()
388 return insn->n; pcl711_ao_insn_write()
393 struct comedi_insn *insn, pcl711_di_insn_bits()
403 return insn->n; pcl711_di_insn_bits()
408 struct comedi_insn *insn, pcl711_do_insn_bits()
423 return insn->n; pcl711_do_insn_bits()
244 pcl711_ai_eoc(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned long context) pcl711_ai_eoc() argument
257 pcl711_ai_insn_read(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) pcl711_ai_insn_read() argument
373 pcl711_ao_insn_write(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) pcl711_ao_insn_write() argument
391 pcl711_di_insn_bits(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) pcl711_di_insn_bits() argument
406 pcl711_do_insn_bits(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) pcl711_do_insn_bits() argument
H A Dme_daq.c160 struct comedi_insn *insn, me_dio_insn_config()
164 unsigned int chan = CR_CHAN(insn->chanspec); me_dio_insn_config()
173 ret = comedi_dio_insn_config(dev, s, insn, data, mask); me_dio_insn_config()
188 return insn->n; me_dio_insn_config()
193 struct comedi_insn *insn, me_dio_insn_bits()
221 return insn->n; me_dio_insn_bits()
226 struct comedi_insn *insn, me_ai_eoc()
239 struct comedi_insn *insn, me_ai_insn_read()
243 unsigned int chan = CR_CHAN(insn->chanspec); me_ai_insn_read()
244 unsigned int range = CR_RANGE(insn->chanspec); me_ai_insn_read()
245 unsigned int aref = CR_AREF(insn->chanspec); me_ai_insn_read()
281 for (i = 0; i < insn->n; i++) { me_ai_insn_read()
286 ret = comedi_timeout(dev, s, insn, me_ai_eoc, 0); me_ai_insn_read()
301 return ret ? ret : insn->n; me_ai_insn_read()
306 struct comedi_insn *insn, me_ao_insn_write()
310 unsigned int chan = CR_CHAN(insn->chanspec); me_ao_insn_write()
311 unsigned int range = CR_RANGE(insn->chanspec); me_ao_insn_write()
335 for (i = 0; i < insn->n; i++) { me_ao_insn_write()
345 return insn->n; me_ao_insn_write()
158 me_dio_insn_config(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) me_dio_insn_config() argument
191 me_dio_insn_bits(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) me_dio_insn_bits() argument
224 me_ai_eoc(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned long context) me_ai_eoc() argument
237 me_ai_insn_read(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) me_ai_insn_read() argument
304 me_ao_insn_write(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) me_ao_insn_write() argument
H A Ddt3000.c516 struct comedi_insn *insn, dt3k_ai_insn_read()
522 chan = CR_CHAN(insn->chanspec); dt3k_ai_insn_read()
523 gain = CR_RANGE(insn->chanspec); dt3k_ai_insn_read()
525 aref = CR_AREF(insn->chanspec); dt3k_ai_insn_read()
527 for (i = 0; i < insn->n; i++) dt3k_ai_insn_read()
535 struct comedi_insn *insn, dt3k_ao_insn_write()
538 unsigned int chan = CR_CHAN(insn->chanspec); dt3k_ao_insn_write()
542 for (i = 0; i < insn->n; i++) { dt3k_ao_insn_write()
548 return insn->n; dt3k_ao_insn_write()
565 struct comedi_insn *insn, dt3k_dio_insn_config()
568 unsigned int chan = CR_CHAN(insn->chanspec); dt3k_dio_insn_config()
577 ret = comedi_dio_insn_config(dev, s, insn, data, mask); dt3k_dio_insn_config()
583 return insn->n; dt3k_dio_insn_config()
588 struct comedi_insn *insn, dt3k_dio_insn_bits()
596 return insn->n; dt3k_dio_insn_bits()
601 struct comedi_insn *insn, dt3k_mem_insn_read()
604 unsigned int addr = CR_CHAN(insn->chanspec); dt3k_mem_insn_read()
607 for (i = 0; i < insn->n; i++) { dt3k_mem_insn_read()
514 dt3k_ai_insn_read(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) dt3k_ai_insn_read() argument
533 dt3k_ao_insn_write(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) dt3k_ao_insn_write() argument
563 dt3k_dio_insn_config(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) dt3k_dio_insn_config() argument
586 dt3k_dio_insn_bits(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) dt3k_dio_insn_bits() argument
599 dt3k_mem_insn_read(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) dt3k_mem_insn_read() argument
H A Dserial2002.c577 struct comedi_insn *insn, serial2002_di_insn_read()
584 chan = devpriv->digital_in_mapping[CR_CHAN(insn->chanspec)]; serial2002_di_insn_read()
585 for (n = 0; n < insn->n; n++) { serial2002_di_insn_read()
601 struct comedi_insn *insn, serial2002_do_insn_write()
608 chan = devpriv->digital_out_mapping[CR_CHAN(insn->chanspec)]; serial2002_do_insn_write()
609 for (n = 0; n < insn->n; n++) { serial2002_do_insn_write()
622 struct comedi_insn *insn, serial2002_ai_insn_read()
629 chan = devpriv->analog_in_mapping[CR_CHAN(insn->chanspec)]; serial2002_ai_insn_read()
630 for (n = 0; n < insn->n; n++) { serial2002_ai_insn_read()
646 struct comedi_insn *insn, serial2002_ao_insn_write()
653 chan = devpriv->analog_out_mapping[CR_CHAN(insn->chanspec)]; serial2002_ao_insn_write()
654 for (n = 0; n < insn->n; n++) { serial2002_ao_insn_write()
668 struct comedi_insn *insn, serial2002_ao_insn_read()
673 int chan = CR_CHAN(insn->chanspec); serial2002_ao_insn_read()
675 for (n = 0; n < insn->n; n++) serial2002_ao_insn_read()
683 struct comedi_insn *insn, serial2002_encoder_insn_read()
690 chan = devpriv->encoder_in_mapping[CR_CHAN(insn->chanspec)]; serial2002_encoder_insn_read()
691 for (n = 0; n < insn->n; n++) { serial2002_encoder_insn_read()
575 serial2002_di_insn_read(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) serial2002_di_insn_read() argument
599 serial2002_do_insn_write(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) serial2002_do_insn_write() argument
620 serial2002_ai_insn_read(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) serial2002_ai_insn_read() argument
644 serial2002_ao_insn_write(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) serial2002_ao_insn_write() argument
666 serial2002_ao_insn_read(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) serial2002_ao_insn_read() argument
681 serial2002_encoder_insn_read(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) serial2002_encoder_insn_read() argument
H A Dadv_pci1723.c89 struct comedi_insn *insn, pci1723_ao_insn_write()
92 unsigned int chan = CR_CHAN(insn->chanspec); pci1723_ao_insn_write()
95 for (i = 0; i < insn->n; i++) { pci1723_ao_insn_write()
102 return insn->n; pci1723_ao_insn_write()
107 struct comedi_insn *insn, pci1723_dio_insn_config()
110 unsigned int chan = CR_CHAN(insn->chanspec); pci1723_dio_insn_config()
115 ret = comedi_dio_insn_config(dev, s, insn, data, mask); pci1723_dio_insn_config()
125 return insn->n; pci1723_dio_insn_config()
130 struct comedi_insn *insn, pci1723_dio_insn_bits()
138 return insn->n; pci1723_dio_insn_bits()
87 pci1723_ao_insn_write(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) pci1723_ao_insn_write() argument
105 pci1723_dio_insn_config(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) pci1723_dio_insn_config() argument
128 pci1723_dio_insn_bits(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) pci1723_dio_insn_bits() argument
H A Dvmk80xx.c244 struct comedi_insn *insn, vmk80xx_ai_insn_read()
253 chan = CR_CHAN(insn->chanspec); vmk80xx_ai_insn_read()
271 for (n = 0; n < insn->n; n++) { vmk80xx_ai_insn_read()
292 struct comedi_insn *insn, vmk80xx_ao_insn_write()
302 chan = CR_CHAN(insn->chanspec); vmk80xx_ao_insn_write()
319 for (n = 0; n < insn->n; n++) { vmk80xx_ao_insn_write()
333 struct comedi_insn *insn, vmk80xx_ao_insn_read()
342 chan = CR_CHAN(insn->chanspec); vmk80xx_ao_insn_read()
348 for (n = 0; n < insn->n; n++) { vmk80xx_ao_insn_read()
362 struct comedi_insn *insn, vmk80xx_di_insn_bits()
401 struct comedi_insn *insn, vmk80xx_do_insn_bits()
440 return ret ? ret : insn->n; vmk80xx_do_insn_bits()
445 struct comedi_insn *insn, vmk80xx_cnt_insn_read()
454 chan = CR_CHAN(insn->chanspec); vmk80xx_cnt_insn_read()
471 for (n = 0; n < insn->n; n++) { vmk80xx_cnt_insn_read()
489 struct comedi_insn *insn, vmk80xx_cnt_insn_config()
493 unsigned int chan = CR_CHAN(insn->chanspec); vmk80xx_cnt_insn_config()
521 return ret ? ret : insn->n; vmk80xx_cnt_insn_config()
526 struct comedi_insn *insn, vmk80xx_cnt_insn_write()
537 chan = CR_CHAN(insn->chanspec); vmk80xx_cnt_insn_write()
544 for (n = 0; n < insn->n; n++) { vmk80xx_cnt_insn_write()
570 struct comedi_insn *insn, vmk80xx_pwm_insn_read()
589 for (n = 0; n < insn->n; n++) { vmk80xx_pwm_insn_read()
603 struct comedi_insn *insn, vmk80xx_pwm_insn_write()
634 for (n = 0; n < insn->n; n++) { vmk80xx_pwm_insn_write()
242 vmk80xx_ai_insn_read(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) vmk80xx_ai_insn_read() argument
290 vmk80xx_ao_insn_write(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) vmk80xx_ao_insn_write() argument
331 vmk80xx_ao_insn_read(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) vmk80xx_ao_insn_read() argument
360 vmk80xx_di_insn_bits(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) vmk80xx_di_insn_bits() argument
399 vmk80xx_do_insn_bits(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) vmk80xx_do_insn_bits() argument
443 vmk80xx_cnt_insn_read(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) vmk80xx_cnt_insn_read() argument
487 vmk80xx_cnt_insn_config(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) vmk80xx_cnt_insn_config() argument
524 vmk80xx_cnt_insn_write(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) vmk80xx_cnt_insn_write() argument
568 vmk80xx_pwm_insn_read(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) vmk80xx_pwm_insn_read() argument
601 vmk80xx_pwm_insn_write(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) vmk80xx_pwm_insn_write() argument
H A Dadv_pci1724.c84 struct comedi_insn *insn, adv_pci1724_dac_idle()
97 struct comedi_insn *insn, adv_pci1724_insn_write()
101 unsigned int chan = CR_CHAN(insn->chanspec); adv_pci1724_insn_write()
111 for (i = 0; i < insn->n; ++i) { adv_pci1724_insn_write()
114 ret = comedi_timeout(dev, s, insn, adv_pci1724_dac_idle, 0); adv_pci1724_insn_write()
124 return insn->n; adv_pci1724_insn_write()
82 adv_pci1724_dac_idle(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned long context) adv_pci1724_dac_idle() argument
95 adv_pci1724_insn_write(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) adv_pci1724_insn_write() argument
H A Dpcmda12.c69 struct comedi_insn *insn, pcmda12_ao_insn_write()
73 unsigned int chan = CR_CHAN(insn->chanspec); pcmda12_ao_insn_write()
78 for (i = 0; i < insn->n; ++i) { pcmda12_ao_insn_write()
92 return insn->n; pcmda12_ao_insn_write()
97 struct comedi_insn *insn, pcmda12_ao_insn_read()
109 return comedi_readback_insn_read(dev, s, insn, data); pcmda12_ao_insn_read()
67 pcmda12_ao_insn_write(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) pcmda12_ao_insn_write() argument
95 pcmda12_ao_insn_read(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) pcmda12_ao_insn_read() argument
H A Dssv_dnp.c52 struct comedi_insn *insn, dnp_dio_insn_bits()
86 return insn->n; dnp_dio_insn_bits()
91 struct comedi_insn *insn, dnp_dio_insn_config()
94 unsigned int chan = CR_CHAN(insn->chanspec); dnp_dio_insn_config()
99 ret = comedi_dio_insn_config(dev, s, insn, data, 0); dnp_dio_insn_config()
130 return insn->n; dnp_dio_insn_config()
50 dnp_dio_insn_bits(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) dnp_dio_insn_bits() argument
89 dnp_dio_insn_config(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) dnp_dio_insn_config() argument
H A Daddi_apci_3501.c95 struct comedi_insn *insn, apci3501_ao_insn_write()
98 unsigned int chan = CR_CHAN(insn->chanspec); apci3501_ao_insn_write()
99 unsigned int range = CR_RANGE(insn->chanspec); apci3501_ao_insn_write()
118 for (i = 0; i < insn->n; i++) { apci3501_ao_insn_write()
139 return insn->n; apci3501_ao_insn_write()
146 struct comedi_insn *insn, apci3501_di_insn_bits()
151 return insn->n; apci3501_di_insn_bits()
156 struct comedi_insn *insn, apci3501_do_insn_bits()
166 return insn->n; apci3501_do_insn_bits()
245 struct comedi_insn *insn, apci3501_eeprom_insn_read()
249 unsigned short addr = CR_CHAN(insn->chanspec); apci3501_eeprom_insn_read()
253 return insn->n; apci3501_eeprom_insn_read()
93 apci3501_ao_insn_write(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) apci3501_ao_insn_write() argument
144 apci3501_di_insn_bits(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) apci3501_di_insn_bits() argument
154 apci3501_do_insn_bits(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) apci3501_do_insn_bits() argument
243 apci3501_eeprom_insn_read(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) apci3501_eeprom_insn_read() argument
H A Dni_6527.c121 struct comedi_insn *insn, ni6527_di_insn_config()
125 unsigned int chan = CR_CHAN(insn->chanspec); ni6527_di_insn_config()
150 return insn->n; ni6527_di_insn_config()
155 struct comedi_insn *insn, ni6527_di_insn_bits()
166 return insn->n; ni6527_di_insn_bits()
171 struct comedi_insn *insn, ni6527_do_insn_bits()
193 return insn->n; ni6527_do_insn_bits()
274 struct comedi_insn *insn, unsigned int *data) ni6527_intr_insn_bits()
277 return insn->n; ni6527_intr_insn_bits()
316 struct comedi_insn *insn, ni6527_intr_insn_config()
325 if (insn->n != 3) ni6527_intr_insn_config()
363 return insn->n; ni6527_intr_insn_config()
119 ni6527_di_insn_config(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) ni6527_di_insn_config() argument
153 ni6527_di_insn_bits(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) ni6527_di_insn_bits() argument
169 ni6527_do_insn_bits(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) ni6527_do_insn_bits() argument
272 ni6527_intr_insn_bits(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) ni6527_intr_insn_bits() argument
314 ni6527_intr_insn_config(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) ni6527_intr_insn_config() argument
H A Daddi_apci_2200.c39 struct comedi_insn *insn, apci2200_di_insn_bits()
44 return insn->n; apci2200_di_insn_bits()
49 struct comedi_insn *insn, apci2200_do_insn_bits()
59 return insn->n; apci2200_do_insn_bits()
37 apci2200_di_insn_bits(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) apci2200_di_insn_bits() argument
47 apci2200_do_insn_bits(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) apci2200_do_insn_bits() argument
H A Dni_670x.c89 struct comedi_insn *insn, ni_670x_ao_insn_write()
92 unsigned int chan = CR_CHAN(insn->chanspec); ni_670x_ao_insn_write()
106 for (i = 0; i < insn->n; i++) { ni_670x_ao_insn_write()
116 return insn->n; ni_670x_ao_insn_write()
121 struct comedi_insn *insn, ni_670x_dio_insn_bits()
129 return insn->n; ni_670x_dio_insn_bits()
134 struct comedi_insn *insn, ni_670x_dio_insn_config()
139 ret = comedi_dio_insn_config(dev, s, insn, data, 0); ni_670x_dio_insn_config()
145 return insn->n; ni_670x_dio_insn_config()
87 ni_670x_ao_insn_write(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) ni_670x_ao_insn_write() argument
119 ni_670x_dio_insn_bits(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) ni_670x_dio_insn_bits() argument
132 ni_670x_dio_insn_config(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) ni_670x_dio_insn_config() argument
H A Drti802.c52 struct comedi_insn *insn, rti802_ao_insn_write()
56 unsigned int chan = CR_CHAN(insn->chanspec); rti802_ao_insn_write()
61 for (i = 0; i < insn->n; i++) { rti802_ao_insn_write()
74 return insn->n; rti802_ao_insn_write()
50 rti802_ao_insn_write(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) rti802_ao_insn_write() argument
H A Daddi_apci_3xxx.c430 struct comedi_insn *insn, apci3xxx_ai_eoc()
443 struct comedi_insn *insn, apci3xxx_ai_insn_read()
449 ret = apci3xxx_ai_setup(dev, insn->chanspec); apci3xxx_ai_insn_read()
453 for (i = 0; i < insn->n; i++) { apci3xxx_ai_insn_read()
458 ret = comedi_timeout(dev, s, insn, apci3xxx_ai_eoc, 0); apci3xxx_ai_insn_read()
466 return insn->n; apci3xxx_ai_insn_read()
607 struct comedi_insn *insn, apci3xxx_ao_eoc()
620 struct comedi_insn *insn, apci3xxx_ao_insn_write()
623 unsigned int chan = CR_CHAN(insn->chanspec); apci3xxx_ao_insn_write()
624 unsigned int range = CR_RANGE(insn->chanspec); apci3xxx_ao_insn_write()
628 for (i = 0; i < insn->n; i++) { apci3xxx_ao_insn_write()
638 ret = comedi_timeout(dev, s, insn, apci3xxx_ao_eoc, 0); apci3xxx_ao_insn_write()
645 return insn->n; apci3xxx_ao_insn_write()
650 struct comedi_insn *insn, apci3xxx_di_insn_bits()
655 return insn->n; apci3xxx_di_insn_bits()
660 struct comedi_insn *insn, apci3xxx_do_insn_bits()
670 return insn->n; apci3xxx_do_insn_bits()
675 struct comedi_insn *insn, apci3xxx_dio_insn_config()
678 unsigned int chan = CR_CHAN(insn->chanspec); apci3xxx_dio_insn_config()
696 ret = comedi_dio_insn_config(dev, s, insn, data, mask); apci3xxx_dio_insn_config()
703 return insn->n; apci3xxx_dio_insn_config()
708 struct comedi_insn *insn, apci3xxx_dio_insn_bits()
731 return insn->n; apci3xxx_dio_insn_bits()
428 apci3xxx_ai_eoc(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned long context) apci3xxx_ai_eoc() argument
441 apci3xxx_ai_insn_read(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) apci3xxx_ai_insn_read() argument
605 apci3xxx_ao_eoc(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned long context) apci3xxx_ao_eoc() argument
618 apci3xxx_ao_insn_write(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) apci3xxx_ao_insn_write() argument
648 apci3xxx_di_insn_bits(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) apci3xxx_di_insn_bits() argument
658 apci3xxx_do_insn_bits(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) apci3xxx_do_insn_bits() argument
673 apci3xxx_dio_insn_config(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) apci3xxx_dio_insn_config() argument
706 apci3xxx_dio_insn_bits(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) apci3xxx_dio_insn_bits() argument
H A Dpcmmio.c253 struct comedi_insn *insn, pcmmio_dio_insn_bits()
283 return insn->n; pcmmio_dio_insn_bits()
288 struct comedi_insn *insn, pcmmio_dio_insn_config()
295 ret = comedi_dio_insn_config(dev, s, insn, data, 0); pcmmio_dio_insn_config()
302 return insn->n; pcmmio_dio_insn_config()
528 struct comedi_insn *insn, pcmmio_ai_eoc()
541 struct comedi_insn *insn, pcmmio_ai_insn_read()
545 unsigned int chan = CR_CHAN(insn->chanspec); pcmmio_ai_insn_read()
546 unsigned int range = CR_RANGE(insn->chanspec); pcmmio_ai_insn_read()
547 unsigned int aref = CR_AREF(insn->chanspec); pcmmio_ai_insn_read()
582 ret = comedi_timeout(dev, s, insn, pcmmio_ai_eoc, 0); pcmmio_ai_insn_read()
589 for (i = 0; i < insn->n; i++) { pcmmio_ai_insn_read()
592 ret = comedi_timeout(dev, s, insn, pcmmio_ai_eoc, 0); pcmmio_ai_insn_read()
606 return insn->n; pcmmio_ai_insn_read()
611 struct comedi_insn *insn, pcmmio_ao_eoc()
624 struct comedi_insn *insn, pcmmio_ao_insn_write()
628 unsigned int chan = CR_CHAN(insn->chanspec); pcmmio_ao_insn_write()
629 unsigned int range = CR_RANGE(insn->chanspec); pcmmio_ao_insn_write()
651 ret = comedi_timeout(dev, s, insn, pcmmio_ao_eoc, 0); pcmmio_ao_insn_write()
655 for (i = 0; i < insn->n; i++) { pcmmio_ao_insn_write()
664 ret = comedi_timeout(dev, s, insn, pcmmio_ao_eoc, 0); pcmmio_ao_insn_write()
671 return insn->n; pcmmio_ao_insn_write()
251 pcmmio_dio_insn_bits(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) pcmmio_dio_insn_bits() argument
286 pcmmio_dio_insn_config(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) pcmmio_dio_insn_config() argument
526 pcmmio_ai_eoc(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned long context) pcmmio_ai_eoc() argument
539 pcmmio_ai_insn_read(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) pcmmio_ai_insn_read() argument
609 pcmmio_ao_eoc(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned long context) pcmmio_ao_eoc() argument
622 pcmmio_ao_insn_write(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) pcmmio_ao_insn_write() argument
H A Ddt2801.c442 struct comedi_insn *insn, unsigned int *data) dt2801_ai_insn_read()
448 for (i = 0; i < insn->n; i++) { dt2801_ai_insn_read()
450 dt2801_writedata(dev, CR_RANGE(insn->chanspec)); dt2801_ai_insn_read()
451 dt2801_writedata(dev, CR_CHAN(insn->chanspec)); dt2801_ai_insn_read()
465 struct comedi_insn *insn, dt2801_ao_insn_write()
468 unsigned int chan = CR_CHAN(insn->chanspec); dt2801_ao_insn_write()
481 struct comedi_insn *insn, dt2801_dio_insn_bits()
499 return insn->n; dt2801_dio_insn_bits()
504 struct comedi_insn *insn, dt2801_dio_insn_config()
509 ret = comedi_dio_insn_config(dev, s, insn, data, 0xff); dt2801_dio_insn_config()
516 return insn->n; dt2801_dio_insn_config()
440 dt2801_ai_insn_read(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) dt2801_ai_insn_read() argument
463 dt2801_ao_insn_write(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) dt2801_ao_insn_write() argument
479 dt2801_dio_insn_bits(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) dt2801_dio_insn_bits() argument
502 dt2801_dio_insn_config(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) dt2801_dio_insn_config() argument
H A Dpcl726.c159 struct comedi_insn *insn, pcl726_intr_insn_bits()
163 return insn->n; pcl726_intr_insn_bits()
243 struct comedi_insn *insn, pcl726_ao_insn_write()
246 unsigned int chan = CR_CHAN(insn->chanspec); pcl726_ao_insn_write()
247 unsigned int range = CR_RANGE(insn->chanspec); pcl726_ao_insn_write()
250 for (i = 0; i < insn->n; i++) { pcl726_ao_insn_write()
264 return insn->n; pcl726_ao_insn_write()
269 struct comedi_insn *insn, pcl726_di_insn_bits()
285 return insn->n; pcl726_di_insn_bits()
290 struct comedi_insn *insn, pcl726_do_insn_bits()
314 return insn->n; pcl726_do_insn_bits()
157 pcl726_intr_insn_bits(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) pcl726_intr_insn_bits() argument
241 pcl726_ao_insn_write(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) pcl726_ao_insn_write() argument
267 pcl726_di_insn_bits(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) pcl726_di_insn_bits() argument
288 pcl726_do_insn_bits(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) pcl726_do_insn_bits() argument
H A Ddmm32at.c199 struct comedi_insn *insn, dmm32at_ai_status()
212 struct comedi_insn *insn, dmm32at_ai_insn_read()
218 dmm32at_ai_set_chanspec(dev, s, insn->chanspec, 1); dmm32at_ai_insn_read()
221 ret = comedi_timeout(dev, s, insn, dmm32at_ai_status, dmm32at_ai_insn_read()
226 for (i = 0; i < insn->n; i++) { dmm32at_ai_insn_read()
229 ret = comedi_timeout(dev, s, insn, dmm32at_ai_status, dmm32at_ai_insn_read()
237 return insn->n; dmm32at_ai_insn_read()
383 * we don't have the 'insn' here but it's not needed dmm32at_ai_cmd()
447 struct comedi_insn *insn, dmm32at_ao_eoc()
460 struct comedi_insn *insn, dmm32at_ao_insn_write()
463 unsigned int chan = CR_CHAN(insn->chanspec); dmm32at_ao_insn_write()
466 for (i = 0; i < insn->n; i++) { dmm32at_ao_insn_write()
476 ret = comedi_timeout(dev, s, insn, dmm32at_ao_eoc, 0); dmm32at_ao_insn_write()
486 return insn->n; dmm32at_ao_insn_write()
197 dmm32at_ai_status(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned long context) dmm32at_ai_status() argument
210 dmm32at_ai_insn_read(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) dmm32at_ai_insn_read() argument
445 dmm32at_ao_eoc(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned long context) dmm32at_ao_eoc() argument
458 dmm32at_ao_insn_write(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) dmm32at_ao_insn_write() argument
H A Dni_usb6501.c348 struct comedi_insn *insn, ni6501_dio_insn_config()
353 ret = comedi_dio_insn_config(dev, s, insn, data, 0); ni6501_dio_insn_config()
361 return insn->n; ni6501_dio_insn_config()
366 struct comedi_insn *insn, ni6501_dio_insn_bits()
395 return insn->n; ni6501_dio_insn_bits()
400 struct comedi_insn *insn, ni6501_cnt_insn_config()
423 return ret ? ret : insn->n; ni6501_cnt_insn_config()
428 struct comedi_insn *insn, ni6501_cnt_insn_read()
435 for (i = 0; i < insn->n; i++) { ni6501_cnt_insn_read()
442 return insn->n; ni6501_cnt_insn_read()
447 struct comedi_insn *insn, ni6501_cnt_insn_write()
452 if (insn->n) { ni6501_cnt_insn_write()
453 u32 val = data[insn->n - 1]; ni6501_cnt_insn_write()
460 return insn->n; ni6501_cnt_insn_write()
346 ni6501_dio_insn_config(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) ni6501_dio_insn_config() argument
364 ni6501_dio_insn_bits(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) ni6501_dio_insn_bits() argument
398 ni6501_cnt_insn_config(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) ni6501_cnt_insn_config() argument
426 ni6501_cnt_insn_read(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) ni6501_cnt_insn_read() argument
445 ni6501_cnt_insn_write(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) ni6501_cnt_insn_write() argument
H A Daddi_apci_1500.c458 struct comedi_insn *insn, apci1500_di_cfg_trig()
534 return insn->n; apci1500_di_cfg_trig()
539 struct comedi_insn *insn, apci1500_di_insn_config()
544 return apci1500_di_cfg_trig(dev, s, insn, data); apci1500_di_insn_config()
552 struct comedi_insn *insn, apci1500_di_insn_bits()
559 return insn->n; apci1500_di_insn_bits()
564 struct comedi_insn *insn, apci1500_do_insn_bits()
574 return insn->n; apci1500_do_insn_bits()
579 struct comedi_insn *insn, apci1500_timer_insn_config()
583 unsigned int chan = CR_CHAN(insn->chanspec); apci1500_timer_insn_config()
705 return insn->n; apci1500_timer_insn_config()
710 struct comedi_insn *insn, apci1500_timer_insn_write()
713 unsigned int chan = CR_CHAN(insn->chanspec); apci1500_timer_insn_write()
721 if (insn->n) apci1500_timer_insn_write()
724 return insn->n; apci1500_timer_insn_write()
729 struct comedi_insn *insn, apci1500_timer_insn_read()
732 unsigned int chan = CR_CHAN(insn->chanspec); apci1500_timer_insn_read()
741 for (i = 0; i < insn->n; i++) { apci1500_timer_insn_read()
750 return insn->n; apci1500_timer_insn_read()
456 apci1500_di_cfg_trig(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) apci1500_di_cfg_trig() argument
537 apci1500_di_insn_config(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) apci1500_di_insn_config() argument
550 apci1500_di_insn_bits(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) apci1500_di_insn_bits() argument
562 apci1500_do_insn_bits(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) apci1500_do_insn_bits() argument
577 apci1500_timer_insn_config(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) apci1500_timer_insn_config() argument
708 apci1500_timer_insn_write(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) apci1500_timer_insn_write() argument
727 apci1500_timer_insn_read(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) apci1500_timer_insn_read() argument
H A Dcb_pcimdda.c94 struct comedi_insn *insn, cb_pcimdda_ao_insn_write()
97 unsigned int chan = CR_CHAN(insn->chanspec); cb_pcimdda_ao_insn_write()
102 for (i = 0; i < insn->n; i++) { cb_pcimdda_ao_insn_write()
119 return insn->n; cb_pcimdda_ao_insn_write()
124 struct comedi_insn *insn, cb_pcimdda_ao_insn_read()
127 unsigned int chan = CR_CHAN(insn->chanspec); cb_pcimdda_ao_insn_read()
132 return comedi_readback_insn_read(dev, s, insn, data); cb_pcimdda_ao_insn_read()
92 cb_pcimdda_ao_insn_write(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) cb_pcimdda_ao_insn_write() argument
122 cb_pcimdda_ao_insn_read(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) cb_pcimdda_ao_insn_read() argument
/linux-4.4.14/arch/x86/kernel/
H A Duprobes.c31 #include <asm/insn.h>
36 /* Adjust IP back to vicinity of actual insn */
39 /* Adjust the return address of a call insn */
54 #define OPCODE1(insn) ((insn)->opcode.bytes[0])
55 #define OPCODE2(insn) ((insn)->opcode.bytes[1])
56 #define OPCODE3(insn) ((insn)->opcode.bytes[2])
57 #define MODRM_REG(insn) X86_MODRM_REG((insn)->modrm.value)
194 * 0f 06 - clts (CPL0 insn)
196 * 0f 08 - invd (CPL0 insn)
197 * 0f 09 - wbinvd (CPL0 insn)
199 * 0f 30 - wrmsr (CPL0 insn) (then why rdmsr is allowed, it's also CPL0 insn?)
203 * 0f 78 - vmread (Intel VMX. CPL0 insn)
204 * 0f 79 - vmwrite (Intel VMX. CPL0 insn)
269 static bool is_prefix_bad(struct insn *insn) is_prefix_bad() argument
273 for (i = 0; i < insn->prefixes.nbytes; i++) { is_prefix_bad()
274 switch (insn->prefixes.bytes[i]) { is_prefix_bad()
286 static int uprobe_init_insn(struct arch_uprobe *auprobe, struct insn *insn, bool x86_64) uprobe_init_insn() argument
290 insn_init(insn, auprobe->insn, sizeof(auprobe->insn), x86_64); uprobe_init_insn()
292 insn_get_length(insn); uprobe_init_insn()
293 if (WARN_ON_ONCE(!insn_complete(insn))) uprobe_init_insn()
296 if (is_prefix_bad(insn)) uprobe_init_insn()
304 if (test_bit(OPCODE1(insn), (unsigned long *)good_insns)) uprobe_init_insn()
307 if (insn->opcode.nbytes == 2) { uprobe_init_insn()
308 if (test_bit(OPCODE2(insn), (unsigned long *)good_2byte_insns)) uprobe_init_insn()
317 * If arch_uprobe->insn doesn't use rip-relative addressing, return
340 static void riprel_analyze(struct arch_uprobe *auprobe, struct insn *insn) riprel_analyze() argument
346 if (!insn_rip_relative(insn)) riprel_analyze()
354 if (insn->rex_prefix.nbytes) { riprel_analyze()
355 cursor = auprobe->insn + insn_offset_rex_prefix(insn); riprel_analyze()
361 * TODO: add XOP/EVEX treatment when insn decoder supports them riprel_analyze()
363 if (insn->vex_prefix.nbytes == 3) { riprel_analyze()
372 cursor = auprobe->insn + insn_offset_vex_prefix(insn) + 1; riprel_analyze()
389 * First appeared in Haswell (BMI2 insn). It is vex-encoded. riprel_analyze()
408 * by one insn (maskmovq) and BX register is used riprel_analyze()
413 * also, rsp+disp32 needs sib encoding -> insn length change). riprel_analyze()
416 reg = MODRM_REG(insn); /* Fetch modrm.reg */ riprel_analyze()
418 if (insn->vex_prefix.nbytes == 2) riprel_analyze()
419 reg2 = insn->vex_prefix.bytes[1]; riprel_analyze()
420 else if (insn->vex_prefix.nbytes == 3) riprel_analyze()
421 reg2 = insn->vex_prefix.bytes[2]; riprel_analyze()
452 cursor = auprobe->insn + insn_offset_modrm(insn); riprel_analyze()
499 static void riprel_analyze(struct arch_uprobe *auprobe, struct insn *insn) riprel_analyze() argument
648 * branch_clear_offset) insn out-of-line. In the likely case branch_emulate_op()
650 * should die or restart the same insn after it handles the branch_emulate_op()
671 * "call" insn was executed out-of-line. Just restore ->sp and restart. branch_post_xol_op()
678 static void branch_clear_offset(struct arch_uprobe *auprobe, struct insn *insn) branch_clear_offset() argument
681 * Turn this insn into "call 1f; 1:", this is what we will execute branch_clear_offset()
691 * divorce ->insn[] and ->ixol[]. We need to preserve the 1st byte branch_clear_offset()
692 * of ->insn[] for set_orig_insn(). branch_clear_offset()
694 memset(auprobe->insn + insn_offset_immediate(insn), branch_clear_offset()
695 0, insn->immediate.nbytes); branch_clear_offset()
703 /* Returns -ENOSYS if branch_xol_ops doesn't handle this insn */ branch_setup_xol_ops()
704 static int branch_setup_xol_ops(struct arch_uprobe *auprobe, struct insn *insn) branch_setup_xol_ops() argument
706 u8 opc1 = OPCODE1(insn); branch_setup_xol_ops()
716 branch_clear_offset(auprobe, insn); branch_setup_xol_ops()
720 if (insn->opcode.nbytes != 2) branch_setup_xol_ops()
726 opc1 = OPCODE2(insn) - 0x10; branch_setup_xol_ops()
737 for (i = 0; i < insn->prefixes.nbytes; i++) { branch_setup_xol_ops()
738 if (insn->prefixes.bytes[i] == 0x66) branch_setup_xol_ops()
743 auprobe->branch.ilen = insn->length; branch_setup_xol_ops()
744 auprobe->branch.offs = insn->immediate.value; branch_setup_xol_ops()
759 struct insn insn; arch_uprobe_analyze_insn() local
763 ret = uprobe_init_insn(auprobe, &insn, is_64bit_mm(mm)); arch_uprobe_analyze_insn()
767 ret = branch_setup_xol_ops(auprobe, &insn); arch_uprobe_analyze_insn()
775 switch (OPCODE1(&insn)) { arch_uprobe_analyze_insn()
790 switch (MODRM_REG(&insn)) { arch_uprobe_analyze_insn()
800 riprel_analyze(auprobe, &insn); arch_uprobe_analyze_insn()
803 auprobe->defparam.ilen = insn.length; arch_uprobe_analyze_insn()
838 * If xol insn itself traps and generates a signal(Say,
992 if (ctx == RP_CHECK_CALL) /* sp was just decremented by "call" insn */ arch_uretprobe_is_alive()
/linux-4.4.14/arch/arm/probes/
H A Ddecode.c199 prepare_emulated_insn(probes_opcode_t insn, struct arch_probes_insn *asi, prepare_emulated_insn() argument
204 u16 *thumb_insn = (u16 *)asi->insn; prepare_emulated_insn()
208 return insn; prepare_emulated_insn()
210 asi->insn[1] = __opcode_to_mem_arm(0xe12fff1e); /* ARM bx lr */ prepare_emulated_insn()
212 asi->insn[1] = __opcode_to_mem_arm(0xe1a0f00e); /* mov pc, lr */ prepare_emulated_insn()
215 if (insn < 0xe0000000) prepare_emulated_insn()
216 insn = (insn | 0xe0000000) & ~0x10000000; prepare_emulated_insn()
217 return insn; prepare_emulated_insn()
225 set_emulated_insn(probes_opcode_t insn, struct arch_probes_insn *asi, set_emulated_insn() argument
230 u16 *ip = (u16 *)asi->insn; set_emulated_insn()
231 if (is_wide_instruction(insn)) set_emulated_insn()
232 *ip++ = __opcode_to_mem_thumb16(insn >> 16); set_emulated_insn()
233 *ip++ = __opcode_to_mem_thumb16(insn); set_emulated_insn()
237 asi->insn[0] = __opcode_to_mem_arm(insn); set_emulated_insn()
263 probes_opcode_t insn = *pinsn; decode_regs() local
287 if ((insn ^ 0xdddddddd) & mask) decode_regs()
293 if ((insn ^ 0xffffffff) & mask) decode_regs()
299 if (((insn ^ 0xdddddddd) & mask) == 0) decode_regs()
306 if (((insn ^ 0xdddddddd) & 0xdddddddd & mask) == 0) decode_regs()
311 if (!is_writeback(insn)) decode_regs()
317 if (((insn ^ 0xffffffff) & mask) == 0) decode_regs()
323 insn &= ~mask; decode_regs()
324 insn |= new_bits & mask; decode_regs()
328 *pinsn = insn; decode_regs()
346 int action, probes_opcode_t insn, run_checkers()
362 retval = checker_func(insn, asi, h); run_checkers()
399 * (insn & mask) == value
414 probes_decode_insn(probes_opcode_t insn, struct arch_probes_insn *asi, probes_decode_insn() argument
423 * @insn can be modified by decode_regs. Save its original probes_decode_insn()
426 probes_opcode_t origin_insn = insn; probes_decode_insn()
446 insn = prepare_emulated_insn(insn, asi, thumb); probes_decode_insn()
458 if (!matched && (insn & h->mask.bits) != h->value.bits) probes_decode_insn()
461 if (!decode_regs(&insn, regs, emulate)) probes_decode_insn()
480 return actions[action].decoder(insn, asi, h); probes_decode_insn()
505 return actions[action].decoder(insn, asi, h); probes_decode_insn()
508 set_emulated_insn(insn, asi, thumb); probes_decode_insn()
345 run_checkers(const struct decode_checker *checkers[], int action, probes_opcode_t insn, struct arch_probes_insn *asi, const struct decode_header *h) run_checkers() argument
H A Ddecode-thumb.h93 thumb16_probes_decode_insn(probes_opcode_t insn, struct arch_probes_insn *asi,
97 thumb32_probes_decode_insn(probes_opcode_t insn, struct arch_probes_insn *asi,
/linux-4.4.14/arch/blackfin/kernel/
H A Dftrace.c22 static void bfin_make_pcrel24(unsigned char *insn, unsigned long src, bfin_make_pcrel24() argument
26 insn[0] = pcrel >> 16; bfin_make_pcrel24()
27 insn[1] = 0xe3; bfin_make_pcrel24()
28 insn[2] = pcrel; bfin_make_pcrel24()
29 insn[3] = pcrel >> 8; bfin_make_pcrel24()
31 #define bfin_make_pcrel24(insn, src, dst) bfin_make_pcrel24(insn, src, (unsigned long)(dst))
/linux-4.4.14/arch/tile/kernel/
H A Dunaligned.c70 tilegx_bundle_bits insn[14]; member in struct:unaligned_jit_fragment
1032 frag.insn[n++] = jit_bundle_gen()
1038 frag.insn[n++] = jit_bundle_gen()
1044 frag.insn[n] = jit_x1_addi(ra, ra, 1); jit_bundle_gen()
1046 frag.insn[n] = jit_x1_addi(ra, ra, jit_bundle_gen()
1051 frag.insn[n] |= jit_x0_fnop(); jit_bundle_gen()
1053 frag.insn[n] |= jit_x0_rotli(rb, rb, 32); jit_bundle_gen()
1055 frag.insn[n] |= jit_x0_rotli(rb, rb, 16); jit_bundle_gen()
1059 frag.insn[n++] = bundle_2; jit_bundle_gen()
1060 frag.insn[n++] = jit_x0_fnop() | jit_x1_iret(); jit_bundle_gen()
1064 frag.insn[n++] = jit_bundle_gen()
1067 frag.insn[n++] = jit_bundle_gen()
1070 frag.insn[n++] = jit_bundle_gen()
1073 frag.insn[n++] = jit_bundle_gen()
1076 frag.insn[n++] = jit_bundle_gen()
1083 frag.insn[n++] = jit_bundle_gen()
1086 frag.insn[n++] = jit_bundle_gen()
1091 frag.insn[n++] = jit_bundle_gen()
1094 frag.insn[n++] = jit_bundle_gen()
1097 frag.insn[n++] = jit_bundle_gen()
1100 frag.insn[n++] = jit_bundle_gen()
1107 frag.insn[n++] = jit_bundle_gen()
1113 frag.insn[n++] = bundle_2; jit_bundle_gen()
1120 frag.insn[n++] = jit_bundle_gen()
1127 frag.insn[n++] = jit_bundle_gen()
1135 frag.insn[n++] = jit_bundle_gen()
1142 frag.insn[n++] = jit_bundle_gen()
1150 frag.insn[n++] = jit_bundle_gen()
1163 frag.insn[n++] = jit_bundle_gen()
1166 frag.insn[n++] = jit_bundle_gen()
1170 frag.insn[n++] = jit_bundle_gen()
1174 frag.insn[n++] = jit_bundle_gen()
1184 frag.insn[n++] = jit_bundle_gen()
1187 frag.insn[n++] = jit_bundle_gen()
1190 frag.insn[n++] = jit_bundle_gen()
1193 frag.insn[n++] = jit_bundle_gen()
1197 frag.insn[n++] = jit_bundle_gen()
1200 frag.insn[n++] = jit_bundle_gen()
1203 frag.insn[n++] = jit_bundle_gen()
1210 frag.insn[n++] = jit_x0_rotli(rb, rb, 32) | jit_bundle_gen()
1213 frag.insn[n++] = jit_bundle_gen()
1217 frag.insn[n++] = jit_bundle_gen()
1222 frag.insn[n++] = jit_bundle_gen()
1228 frag.insn[n++] = bundle_2; jit_bundle_gen()
1231 frag.insn[n++] = jit_bundle_gen()
1237 frag.insn[n++] = jit_bundle_gen()
1243 frag.insn[n++] = jit_bundle_gen()
1247 frag.insn[n++] = jit_bundle_gen()
1251 frag.insn[n++] = jit_bundle_gen()
1254 frag.insn[n++] = jit_x0_fnop() | jit_x1_ld(clob3, clob3); jit_bundle_gen()
1255 frag.insn[n++] = jit_x0_fnop() | jit_x1_iret(); jit_bundle_gen()
1266 frag.insn[n++] = jit_bundle_gen()
1269 frag.insn[n++] = jit_bundle_gen()
1272 frag.insn[n++] = jit_bundle_gen()
1277 frag.insn[n++] = jit_bundle_gen()
1281 frag.insn[n++] = jit_bundle_gen()
1287 frag.insn[n++] = bundle_2; jit_bundle_gen()
1290 frag.insn[n++] = jit_bundle_gen()
1297 frag.insn[n++] = jit_bundle_gen()
1303 frag.insn[n++] = jit_bundle_gen()
1306 frag.insn[n++] = jit_bundle_gen()
1309 frag.insn[n++] = jit_bundle_gen()
1313 frag.insn[n++] = jit_bundle_gen()
1317 frag.insn[n++] = jit_bundle_gen()
1322 frag.insn[n++] = jit_bundle_gen()
1328 frag.insn[n++] = jit_bundle_gen()
1335 frag.insn[n++] = jit_bundle_gen()
1343 frag.insn[n++] = jit_bundle_gen()
1350 frag.insn[n++] = jit_bundle_gen()
1358 frag.insn[n++] = jit_x0_fnop() | jit_x1_iret(); jit_bundle_gen()
1383 k, (unsigned long long)frag.insn[k], jit_bundle_gen()
1384 (unsigned long long)frag.insn[k+1]); jit_bundle_gen()
1391 frag.insn[k] = GX_INSN_BSWAP(frag.insn[k]); jit_bundle_gen()
1428 regs->pc = (unsigned long)&jit_code_area[idx].insn[0]; jit_bundle_gen()
H A Dbacktrace.c75 const struct tile_decoded_instruction *insn = find_matching_insn() local
78 if (insn->opcode->mnemonic != mnemonic) find_matching_insn()
83 if (operand_values[j] != insn->operand_values[j]) { find_matching_insn()
90 return insn; find_matching_insn()
109 const struct tile_decoded_instruction *insn = bt_has_addi_sp() local
111 if (insn == NULL) bt_has_addi_sp()
112 insn = find_matching_insn(bundle, TILE_OPC_ADDLI, vals, 2); bt_has_addi_sp()
114 if (insn == NULL) bt_has_addi_sp()
115 insn = find_matching_insn(bundle, TILEGX_OPC_ADDXLI, vals, 2); bt_has_addi_sp()
116 if (insn == NULL) bt_has_addi_sp()
117 insn = find_matching_insn(bundle, TILEGX_OPC_ADDXI, vals, 2); bt_has_addi_sp()
119 if (insn == NULL) bt_has_addi_sp()
122 *adjust = insn->operand_values[2]; bt_has_addi_sp()
138 const struct tile_decoded_instruction *insn = bt_get_info_ops() local
141 if (insn->opcode->mnemonic == TILE_OPC_INFO || bt_get_info_ops()
142 insn->opcode->mnemonic == TILE_OPC_INFOL) { bt_get_info_ops()
143 operands[num_ops++] = insn->operand_values[0]; bt_get_info_ops()
155 const struct tile_decoded_instruction *insn = bt_has_jrp() local
157 if (insn == NULL) bt_has_jrp()
160 *target_reg = insn->operand_values[0]; bt_has_jrp()
169 const struct tile_decoded_instruction *insn = bt_modifies_reg() local
172 if (insn->opcode->implicitly_written_register == reg) bt_modifies_reg()
175 for (j = 0; j < insn->opcode->num_operands; j++) bt_modifies_reg()
176 if (insn->operands[j]->is_dest_reg && bt_modifies_reg()
177 insn->operand_values[j] == reg) bt_modifies_reg()
217 const struct tile_decoded_instruction *insn = bt_update_moveli() local
220 if (insn->opcode->mnemonic == TILEGX_OPC_MOVELI) { bt_update_moveli()
221 int reg = insn->operand_values[0]; bt_update_moveli()
222 moveli_args[reg] = insn->operand_values[1]; bt_update_moveli()
236 const struct tile_decoded_instruction *insn = bt_has_add_sp() local
238 if (insn) { bt_has_add_sp()
239 int reg = insn->operand_values[2]; bt_has_add_sp()
H A Dkprobes.c43 static int __kprobes insn_has_control(kprobe_opcode_t insn) insn_has_control() argument
45 if (get_Mode(insn) != 0) { /* Y-format bundle */ insn_has_control()
46 if (get_Opcode_Y1(insn) != RRR_1_OPCODE_Y1 || insn_has_control()
47 get_RRROpcodeExtension_Y1(insn) != UNARY_RRR_1_OPCODE_Y1) insn_has_control()
50 switch (get_UnaryOpcodeExtension_Y1(insn)) { insn_has_control()
62 switch (get_Opcode_X1(insn)) { insn_has_control()
68 if (get_RRROpcodeExtension_X1(insn) != UNARY_RRR_0_OPCODE_X1) insn_has_control()
70 switch (get_UnaryOpcodeExtension_X1(insn)) { insn_has_control()
97 /* insn: must be on special executable page on tile. */ arch_prepare_kprobe()
98 p->ainsn.insn = get_insn_slot(); arch_prepare_kprobe()
99 if (!p->ainsn.insn) arch_prepare_kprobe()
103 * In the kprobe->ainsn.insn[] array we store the original arch_prepare_kprobe()
107 memcpy(&p->ainsn.insn[0], p->addr, sizeof(kprobe_opcode_t)); arch_prepare_kprobe()
108 p->ainsn.insn[1] = breakpoint2_insn; arch_prepare_kprobe()
146 if (p->ainsn.insn) { arch_remove_kprobe()
147 free_insn_slot(p->ainsn.insn, 0); arch_remove_kprobe()
148 p->ainsn.insn = NULL; arch_remove_kprobe()
180 regs->pc = (unsigned long)&p->ainsn.insn[0]; prepare_singlestep()
204 p->ainsn.insn[0] == breakpoint_insn) { kprobe_handler()
276 * instruction. The address of this copy is p->ainsn.insn.
/linux-4.4.14/arch/sparc/include/asm/
H A Dkprobes.h18 do { flushi(&(p)->ainsn.insn[0]); \
19 flushi(&(p)->ainsn.insn[1]); \
27 kprobe_opcode_t insn[MAX_INSN_SIZE]; member in struct:arch_specific_insn
H A Dsetup.h54 int handle_ldf_stq(u32 insn, struct pt_regs *regs);
55 void handle_ld_nf(u32 insn, struct pt_regs *regs);
H A Dfutex_64.h8 #define __futex_cas_op(insn, ret, oldval, uaddr, oparg) \
11 " " insn "\n" \
/linux-4.4.14/arch/mips/include/asm/
H A Dpaccess.h53 #define __get_dbe_asm(insn) \
56 "1:\t" insn "\t%1,%2\n\t" \
59 ".insn\n\t" \
92 #define __put_dbe_asm(insn) \
95 "1:\t" insn "\t%1,%2\n\t" \
98 ".insn\n\t" \
H A Dfutex.h21 #define __futex_atomic_op(insn, ret, oldval, uaddr, oparg) \
30 " " insn " \n" \
36 " .insn \n" \
59 " " insn " \n" \
65 " .insn \n" \
167 " .insn \n" futex_atomic_cmpxchg_inatomic()
196 " .insn \n" futex_atomic_cmpxchg_inatomic()
H A Dftrace.h27 "2: .insn\n" \
49 "2: .insn\n" \
H A Duaccess.h281 #define __GET_DW(val, insn, ptr) __get_data_asm_ll32(val, insn, ptr)
284 #define __GET_DW(val, insn, ptr) __get_data_asm(val, insn, ptr)
330 #define __get_data_asm(val, insn, addr) \
335 "1: "insn("%1", "%3")" \n" \
337 " .insn \n" \
355 #define __get_data_asm_ll32(val, insn, addr) \
363 "1: " insn("%1", "(%3)")" \n" \
364 "2: " insn("%D1", "4(%3)")" \n" \
366 " .insn \n" \
422 #define __PUT_DW(insn, ptr) __put_data_asm_ll32(insn, ptr)
425 #define __PUT_DW(insn, ptr) __put_data_asm(insn, ptr)
471 #define __put_data_asm(insn, ptr) \
474 "1: "insn("%z2", "%3")" # __put_data_asm \n" \
476 " .insn \n" \
489 #define __put_data_asm_ll32(insn, ptr) \
492 "1: "insn("%2", "(%3)")" # __put_data_asm_ll32 \n" \
493 "2: "insn("%D2", "4(%3)")" \n" \
495 " .insn \n" \
649 #define __get_data_unaligned_asm(val, insn, addr) \
654 "1: " insn " %1, %3 \n" \
656 " .insn \n" \
684 " .insn \n" \
745 #define __put_user_unaligned_asm(insn, ptr) \
748 "1: " insn " %z2, %3 # __put_user_unaligned_asm\n" \
750 " .insn \n" \
769 " .insn \n" \
1487 unsigned long insn; member in struct:exception_table_entry
/linux-4.4.14/arch/x86/mm/
H A Dextable.c9 return (unsigned long)&x->insn + x->insn; ex_insn_addr()
40 if (fixup->fixup - fixup->insn >= 0x7ffffff0 - 4) { fixup_exception()
62 if (fixup->fixup - fixup->insn >= 0x7ffffff0 - 4) { early_fixup_exception()
120 return x->insn - y->insn; cmp_ex()
132 p->insn += i; sort_extable()
144 p->insn -= i; sort_extable()
H A Dmpx.c13 #include <asm/insn.h>
68 static int get_reg_offset(struct insn *insn, struct pt_regs *regs, get_reg_offset() argument
98 if (IS_ENABLED(CONFIG_X86_64) && !insn->x86_64) get_reg_offset()
103 regno = X86_MODRM_RM(insn->modrm.value); get_reg_offset()
104 if (X86_REX_B(insn->rex_prefix.value)) get_reg_offset()
109 regno = X86_SIB_INDEX(insn->sib.value); get_reg_offset()
110 if (X86_REX_X(insn->rex_prefix.value)) get_reg_offset()
115 regno = X86_SIB_BASE(insn->sib.value); get_reg_offset()
116 if (X86_REX_B(insn->rex_prefix.value)) get_reg_offset()
138 static void __user *mpx_get_addr_ref(struct insn *insn, struct pt_regs *regs) mpx_get_addr_ref() argument
144 insn_get_modrm(insn); mpx_get_addr_ref()
145 insn_get_sib(insn); mpx_get_addr_ref()
146 sib = insn->sib.value; mpx_get_addr_ref()
148 if (X86_MODRM_MOD(insn->modrm.value) == 3) { mpx_get_addr_ref()
149 addr_offset = get_reg_offset(insn, regs, REG_TYPE_RM); mpx_get_addr_ref()
154 if (insn->sib.nbytes) { mpx_get_addr_ref()
155 base_offset = get_reg_offset(insn, regs, REG_TYPE_BASE); mpx_get_addr_ref()
159 indx_offset = get_reg_offset(insn, regs, REG_TYPE_INDEX); mpx_get_addr_ref()
167 addr_offset = get_reg_offset(insn, regs, REG_TYPE_RM); mpx_get_addr_ref()
172 addr += insn->displacement.value; mpx_get_addr_ref()
179 static int mpx_insn_decode(struct insn *insn, mpx_insn_decode() argument
196 insn_init(insn, buf, nr_copied, x86_64); mpx_insn_decode()
197 insn_get_length(insn); mpx_insn_decode()
206 if (nr_copied < insn->length) mpx_insn_decode()
209 insn_get_opcode(insn); mpx_insn_decode()
214 if (insn->opcode.bytes[0] != 0x0f) mpx_insn_decode()
216 if ((insn->opcode.bytes[1] != 0x1a) && mpx_insn_decode()
217 (insn->opcode.bytes[1] != 0x1b)) mpx_insn_decode()
243 struct insn insn; mpx_generate_siginfo() local
247 err = mpx_insn_decode(&insn, regs); mpx_generate_siginfo()
255 insn_get_modrm(&insn); mpx_generate_siginfo()
256 bndregno = X86_MODRM_REG(insn.modrm.value); mpx_generate_siginfo()
291 info->si_addr = mpx_get_addr_ref(&insn, regs); mpx_generate_siginfo()
/linux-4.4.14/arch/arc/include/asm/
H A Dtimex.h16 /* XXX: get_cycles() to be implemented with RTSC insn */
H A Dfutex.h21 #define __futex_atomic_op(insn, ret, oldval, uaddr, oparg)\
26 insn "\n" \
49 #define __futex_atomic_op(insn, ret, oldval, uaddr, oparg)\
54 insn "\n" \
/linux-4.4.14/arch/s390/mm/
H A Dextable.c45 return x->insn - y->insn; cmp_ex()
56 p->insn += i; sort_extable()
62 p->insn -= i; sort_extable()
H A Dpage-states.c45 " .insn rrf,0xb9ab0000,%1,%1,0,0\n" cmma_init()
59 asm volatile(".insn rrf,0xb9ab0000,%0,%1,%2,0" set_page_unstable()
77 asm volatile(".insn rrf,0xb9ab0000,%0,%1,%2,0" set_page_stable()
/linux-4.4.14/samples/seccomp/
H A Dbpf-helper.c22 __u8 insn = count - 1; bpf_resolve_jumps() local
30 filter += insn; bpf_resolve_jumps()
31 for (; filter >= begin; --insn, --filter) { bpf_resolve_jumps()
42 (insn + 1); bpf_resolve_jumps()
52 labels->labels[filter->k].location = insn; bpf_resolve_jumps()
/linux-4.4.14/net/core/
H A Dfilter.c155 struct bpf_insn *insn = insn_buf; convert_skb_access() local
161 *insn++ = BPF_LDX_MEM(BPF_W, dst_reg, src_reg, convert_skb_access()
166 *insn++ = BPF_LDX_MEM(BPF_B, dst_reg, src_reg, PKT_TYPE_OFFSET()); convert_skb_access()
167 *insn++ = BPF_ALU32_IMM(BPF_AND, dst_reg, PKT_TYPE_MAX); convert_skb_access()
169 *insn++ = BPF_ALU32_IMM(BPF_RSH, dst_reg, 5); convert_skb_access()
176 *insn++ = BPF_LDX_MEM(BPF_H, dst_reg, src_reg, convert_skb_access()
186 *insn++ = BPF_LDX_MEM(BPF_H, dst_reg, src_reg, convert_skb_access()
189 *insn++ = BPF_ALU32_IMM(BPF_AND, dst_reg, convert_skb_access()
193 *insn++ = BPF_ALU32_IMM(BPF_RSH, dst_reg, 12); convert_skb_access()
195 *insn++ = BPF_ALU32_IMM(BPF_AND, dst_reg, 1); convert_skb_access()
200 return insn - insn_buf; convert_skb_access()
206 struct bpf_insn *insn = *insnp; convert_bpf_extensions() local
214 *insn++ = BPF_LDX_MEM(BPF_H, BPF_REG_A, BPF_REG_CTX, convert_bpf_extensions()
217 *insn = BPF_ENDIAN(BPF_FROM_BE, BPF_REG_A, 16); convert_bpf_extensions()
221 cnt = convert_skb_access(SKF_AD_PKTTYPE, BPF_REG_A, BPF_REG_CTX, insn); convert_bpf_extensions()
222 insn += cnt - 1; convert_bpf_extensions()
231 *insn++ = BPF_LDX_MEM(bytes_to_bpf_size(FIELD_SIZEOF(struct sk_buff, dev)), convert_bpf_extensions()
235 *insn++ = BPF_JMP_IMM(BPF_JNE, BPF_REG_TMP, 0, 1); convert_bpf_extensions()
236 *insn++ = BPF_EXIT_INSN(); convert_bpf_extensions()
238 *insn = BPF_LDX_MEM(BPF_W, BPF_REG_A, BPF_REG_TMP, convert_bpf_extensions()
241 *insn = BPF_LDX_MEM(BPF_H, BPF_REG_A, BPF_REG_TMP, convert_bpf_extensions()
246 cnt = convert_skb_access(SKF_AD_MARK, BPF_REG_A, BPF_REG_CTX, insn); convert_bpf_extensions()
247 insn += cnt - 1; convert_bpf_extensions()
253 *insn = BPF_LDX_MEM(BPF_W, BPF_REG_A, BPF_REG_CTX, convert_bpf_extensions()
258 cnt = convert_skb_access(SKF_AD_QUEUE, BPF_REG_A, BPF_REG_CTX, insn); convert_bpf_extensions()
259 insn += cnt - 1; convert_bpf_extensions()
264 BPF_REG_A, BPF_REG_CTX, insn); convert_bpf_extensions()
265 insn += cnt - 1; convert_bpf_extensions()
270 BPF_REG_A, BPF_REG_CTX, insn); convert_bpf_extensions()
271 insn += cnt - 1; convert_bpf_extensions()
278 *insn++ = BPF_LDX_MEM(BPF_H, BPF_REG_A, BPF_REG_CTX, convert_bpf_extensions()
281 *insn = BPF_ENDIAN(BPF_FROM_BE, BPF_REG_A, 16); convert_bpf_extensions()
290 *insn++ = BPF_MOV64_REG(BPF_REG_ARG1, BPF_REG_CTX); convert_bpf_extensions()
292 *insn++ = BPF_MOV64_REG(BPF_REG_ARG2, BPF_REG_A); convert_bpf_extensions()
294 *insn++ = BPF_MOV64_REG(BPF_REG_ARG3, BPF_REG_X); convert_bpf_extensions()
298 *insn = BPF_EMIT_CALL(__skb_get_pay_offset); convert_bpf_extensions()
301 *insn = BPF_EMIT_CALL(__skb_get_nlattr); convert_bpf_extensions()
304 *insn = BPF_EMIT_CALL(__skb_get_nlattr_nest); convert_bpf_extensions()
307 *insn = BPF_EMIT_CALL(__get_raw_cpu_id); convert_bpf_extensions()
310 *insn = BPF_EMIT_CALL(bpf_user_rnd_u32); convert_bpf_extensions()
318 *insn = BPF_ALU32_REG(BPF_XOR, BPF_REG_A, BPF_REG_X); convert_bpf_extensions()
330 *insnp = insn; convert_bpf_extensions()
390 struct bpf_insn *insn = tmp_insns; bpf_convert_filter() local
430 convert_bpf_extensions(fp, &insn)) bpf_convert_filter()
433 *insn = BPF_RAW_INSN(fp->code, BPF_REG_A, BPF_REG_X, 0, fp->k); bpf_convert_filter()
446 insn->off = addrs ? addrs[target] - addrs[i] - 1 : 0; \ bpf_convert_filter()
447 /* Adjust pc relative offset for 2nd or 3rd insn. */ \ bpf_convert_filter()
448 insn->off -= insn - tmp_insns; \ bpf_convert_filter()
453 insn->code = fp->code; bpf_convert_filter()
468 * in compare insn. bpf_convert_filter()
470 *insn++ = BPF_MOV32_IMM(BPF_REG_TMP, fp->k); bpf_convert_filter()
472 insn->dst_reg = BPF_REG_A; bpf_convert_filter()
473 insn->src_reg = BPF_REG_TMP; bpf_convert_filter()
476 insn->dst_reg = BPF_REG_A; bpf_convert_filter()
477 insn->imm = fp->k; bpf_convert_filter()
479 insn->src_reg = bpf_src == BPF_X ? BPF_REG_X : 0; bpf_convert_filter()
482 /* Common case where 'jump_false' is next insn. */ bpf_convert_filter()
484 insn->code = BPF_JMP | BPF_OP(fp->code) | bpf_src; bpf_convert_filter()
490 /* Convert JEQ into JNE when 'jump_true' is next insn. */ bpf_convert_filter()
492 insn->code = BPF_JMP | BPF_JNE | bpf_src; bpf_convert_filter()
500 insn->code = BPF_JMP | BPF_OP(fp->code) | bpf_src; bpf_convert_filter()
502 insn++; bpf_convert_filter()
504 insn->code = BPF_JMP | BPF_JA; bpf_convert_filter()
512 *insn++ = BPF_MOV64_REG(BPF_REG_TMP, BPF_REG_A); bpf_convert_filter()
514 *insn++ = BPF_LD_ABS(BPF_B, fp->k); bpf_convert_filter()
516 *insn++ = BPF_ALU32_IMM(BPF_AND, BPF_REG_A, 0xf); bpf_convert_filter()
518 *insn++ = BPF_ALU32_IMM(BPF_LSH, BPF_REG_A, 2); bpf_convert_filter()
520 *insn++ = BPF_MOV64_REG(BPF_REG_X, BPF_REG_A); bpf_convert_filter()
522 *insn = BPF_MOV64_REG(BPF_REG_A, BPF_REG_TMP); bpf_convert_filter()
528 *insn++ = BPF_MOV32_RAW(BPF_RVAL(fp->code) == BPF_K ? bpf_convert_filter()
531 *insn = BPF_EXIT_INSN(); bpf_convert_filter()
537 *insn = BPF_STX_MEM(BPF_W, BPF_REG_FP, BPF_CLASS(fp->code) == bpf_convert_filter()
545 *insn = BPF_LDX_MEM(BPF_W, BPF_CLASS(fp->code) == BPF_LD ? bpf_convert_filter()
553 *insn = BPF_MOV32_IMM(BPF_CLASS(fp->code) == BPF_LD ? bpf_convert_filter()
559 *insn = BPF_MOV64_REG(BPF_REG_X, BPF_REG_A); bpf_convert_filter()
564 *insn = BPF_MOV64_REG(BPF_REG_A, BPF_REG_X); bpf_convert_filter()
570 *insn = BPF_LDX_MEM(BPF_W, BPF_CLASS(fp->code) == BPF_LD ? bpf_convert_filter()
578 *insn = BPF_LDX_MEM(BPF_W, BPF_REG_A, BPF_REG_CTX, fp->k); bpf_convert_filter()
586 insn++; bpf_convert_filter()
589 sizeof(*insn) * (insn - tmp_insns)); bpf_convert_filter()
590 new_insn += insn - tmp_insns; bpf_convert_filter()
1754 struct bpf_insn *insn = insn_buf; bpf_net_convert_ctx_access() local
1760 *insn++ = BPF_LDX_MEM(BPF_W, dst_reg, src_reg, bpf_net_convert_ctx_access()
1767 *insn++ = BPF_LDX_MEM(BPF_H, dst_reg, src_reg, bpf_net_convert_ctx_access()
1774 *insn++ = BPF_LDX_MEM(BPF_H, dst_reg, src_reg, bpf_net_convert_ctx_access()
1782 *insn++ = BPF_STX_MEM(BPF_W, dst_reg, src_reg, bpf_net_convert_ctx_access()
1785 *insn++ = BPF_LDX_MEM(BPF_W, dst_reg, src_reg, bpf_net_convert_ctx_access()
1792 *insn++ = BPF_LDX_MEM(BPF_W, dst_reg, src_reg, bpf_net_convert_ctx_access()
1799 *insn++ = BPF_LDX_MEM(bytes_to_bpf_size(FIELD_SIZEOF(struct sk_buff, dev)), bpf_net_convert_ctx_access()
1802 *insn++ = BPF_JMP_IMM(BPF_JEQ, dst_reg, 0, 1); bpf_net_convert_ctx_access()
1803 *insn++ = BPF_LDX_MEM(BPF_W, dst_reg, dst_reg, bpf_net_convert_ctx_access()
1810 *insn++ = BPF_LDX_MEM(BPF_W, dst_reg, src_reg, bpf_net_convert_ctx_access()
1818 *insn++ = BPF_STX_MEM(BPF_W, dst_reg, src_reg, bpf_net_convert_ctx_access()
1821 *insn++ = BPF_LDX_MEM(BPF_W, dst_reg, src_reg, bpf_net_convert_ctx_access()
1826 return convert_skb_access(SKF_AD_PKTTYPE, dst_reg, src_reg, insn); bpf_net_convert_ctx_access()
1829 return convert_skb_access(SKF_AD_QUEUE, dst_reg, src_reg, insn); bpf_net_convert_ctx_access()
1833 dst_reg, src_reg, insn); bpf_net_convert_ctx_access()
1837 dst_reg, src_reg, insn); bpf_net_convert_ctx_access()
1848 *insn++ = BPF_STX_MEM(BPF_W, dst_reg, src_reg, ctx_off); bpf_net_convert_ctx_access()
1850 *insn++ = BPF_LDX_MEM(BPF_W, dst_reg, src_reg, ctx_off); bpf_net_convert_ctx_access()
1858 *insn++ = BPF_STX_MEM(BPF_H, dst_reg, src_reg, ctx_off); bpf_net_convert_ctx_access()
1866 *insn++ = BPF_STX_MEM(BPF_H, dst_reg, src_reg, bpf_net_convert_ctx_access()
1869 *insn++ = BPF_LDX_MEM(BPF_H, dst_reg, src_reg, bpf_net_convert_ctx_access()
1874 *insn++ = BPF_MOV64_REG(dst_reg, dst_reg); bpf_net_convert_ctx_access()
1876 *insn++ = BPF_MOV64_IMM(dst_reg, 0); bpf_net_convert_ctx_access()
1881 return insn - insn_buf; bpf_net_convert_ctx_access()
/linux-4.4.14/arch/s390/include/uapi/asm/
H A Dsie.h222 #define INSN_DECODE_IPA0(ipa0, insn, rshift, mask) \
223 (insn >> 56) == (ipa0) ? \
224 ((ipa0 << 8) | ((insn >> rshift) & mask)) :
226 #define INSN_DECODE(insn) (insn >> 56)
233 #define icpt_insn_decoder(insn) ( \
234 INSN_DECODE_IPA0(0x01, insn, 48, 0xff) \
235 INSN_DECODE_IPA0(0xaa, insn, 48, 0x0f) \
236 INSN_DECODE_IPA0(0xb2, insn, 48, 0xff) \
237 INSN_DECODE_IPA0(0xb9, insn, 48, 0xff) \
238 INSN_DECODE_IPA0(0xe3, insn, 48, 0xff) \
239 INSN_DECODE_IPA0(0xe5, insn, 48, 0xff) \
240 INSN_DECODE_IPA0(0xeb, insn, 16, 0xff) \
241 INSN_DECODE_IPA0(0xc8, insn, 48, 0x0f) \
242 INSN_DECODE(insn))
/linux-4.4.14/drivers/staging/comedi/
H A Dcomedi_compat32.c76 unsigned int insn; member in struct:comedi32_insn_struct
317 /* Copy 32-bit insn structure to native insn structure. */ get_compat_insn()
318 static int get_compat_insn(struct comedi_insn __user *insn, get_compat_insn() argument
327 /* Copy insn structure. Ignore the unused members. */ get_compat_insn()
330 !access_ok(VERIFY_WRITE, insn, sizeof(*insn))) get_compat_insn()
333 err |= __get_user(temp.uint, &insn32->insn); get_compat_insn()
334 err |= __put_user(temp.uint, &insn->insn); get_compat_insn()
336 err |= __put_user(temp.uint, &insn->n); get_compat_insn()
338 err |= __put_user(compat_ptr(temp.uptr), &insn->data); get_compat_insn()
340 err |= __put_user(temp.uint, &insn->subdev); get_compat_insn()
342 err |= __put_user(temp.uint, &insn->chanspec); get_compat_insn()
351 struct comedi_insn insn[1]; compat_insnlist() member in struct:combined_insnlist
374 insn[n_insns])); compat_insnlist()
381 err |= __put_user(&s->insn[0], &s->insnlist.insns); compat_insnlist()
385 /* Copy insn structures. */ compat_insnlist()
387 rc = get_compat_insn(&s->insn[n], &insn32[n]); compat_insnlist()
399 struct comedi_insn __user *insn; compat_insn() local
404 insn = compat_alloc_user_space(sizeof(*insn)); compat_insn()
406 rc = get_compat_insn(insn, insn32); compat_insn()
410 return translated_ioctl(file, COMEDI_INSN, (unsigned long)insn); compat_insn()
H A Dcomedi_fops.c1173 static int check_insn_config_length(struct comedi_insn *insn, check_insn_config_length() argument
1176 if (insn->n < 1) check_insn_config_length()
1184 if (insn->n == 1) check_insn_config_length()
1201 if (insn->n == 2) check_insn_config_length()
1213 if (insn->n == 3) check_insn_config_length()
1218 if (insn->n == 5) check_insn_config_length()
1222 if (insn->n == 6) check_insn_config_length()
1226 * by default we allow the insn since we don't have checks for check_insn_config_length()
1230 pr_warn("No check for data length of config insn id %i is implemented\n", check_insn_config_length()
1233 pr_warn("Assuming n=%i is correct\n", insn->n); check_insn_config_length()
1239 static int parse_insn(struct comedi_device *dev, struct comedi_insn *insn, parse_insn() argument
1246 if (insn->insn & INSN_MASK_SPECIAL) { parse_insn()
1249 switch (insn->insn) { parse_insn()
1254 if (insn->n != 2) { parse_insn()
1267 if (insn->n != 1 || data[0] >= 100000) { parse_insn()
1275 if (insn->n != 1) { parse_insn()
1279 if (insn->subdev >= dev->n_subdevices) { parse_insn()
1282 insn->subdev); parse_insn()
1286 s = &dev->subdevices[insn->subdev]; parse_insn()
1302 dev_dbg(dev->class_dev, "invalid insn\n"); parse_insn()
1310 if (insn->subdev >= dev->n_subdevices) { parse_insn()
1312 insn->subdev); parse_insn()
1316 s = &dev->subdevices[insn->subdev]; parse_insn()
1320 insn->subdev); parse_insn()
1332 ret = comedi_check_chanlist(s, 1, &insn->chanspec); parse_insn()
1345 switch (insn->insn) { parse_insn()
1347 ret = s->insn_read(dev, s, insn, data); parse_insn()
1356 ? s->maxdata_list[CR_CHAN(insn->chanspec)] parse_insn()
1358 for (i = 0; i < insn->n; ++i) { parse_insn()
1367 ret = s->insn_write(dev, s, insn, data); parse_insn()
1376 if (insn->n != 2) { parse_insn()
1381 * insn->chanspec. Fix this here if parse_insn()
1388 shift = CR_CHAN(insn->chanspec); parse_insn()
1390 insn->chanspec = 0; parse_insn()
1395 ret = s->insn_bits(dev, s, insn, data); parse_insn()
1402 ret = check_insn_config_length(insn, data); parse_insn()
1405 ret = s->insn_config(dev, s, insn, data); parse_insn()
1474 if (insns[i].insn & INSN_MASK_WRITE) { do_insnlist_ioctl()
1486 if (insns[i].insn & INSN_MASK_READ) { do_insnlist_ioctl()
1517 * data (for writes) from insn->data pointer
1520 * data (for reads) to insn->data pointer
1525 struct comedi_insn insn; do_insn_ioctl() local
1535 if (copy_from_user(&insn, arg, sizeof(insn))) { do_insn_ioctl()
1540 /* This is where the behavior of insn and insnlist deviate. */ do_insn_ioctl()
1541 if (insn.n > MAX_SAMPLES) do_insn_ioctl()
1542 insn.n = MAX_SAMPLES; do_insn_ioctl()
1543 if (insn.insn & INSN_MASK_WRITE) { do_insn_ioctl()
1545 insn.data, do_insn_ioctl()
1546 insn.n * sizeof(unsigned int))) { do_insn_ioctl()
1551 ret = parse_insn(dev, &insn, data, file); do_insn_ioctl()
1554 if (insn.insn & INSN_MASK_READ) { do_insn_ioctl()
1555 if (copy_to_user(insn.data, do_insn_ioctl()
1557 insn.n * sizeof(unsigned int))) { do_insn_ioctl()
1562 ret = insn.n; do_insn_ioctl()
H A Ddrivers.c224 struct comedi_insn *insn, unsigned int *data) insn_inval()
233 * @insn: COMEDI instruction.
241 * @insn->n is normally 1, which will read a single value. If higher, the
244 * Returns @insn->n on success, or -EINVAL if @s->readback is NULL.
248 struct comedi_insn *insn, comedi_readback_insn_read()
251 unsigned int chan = CR_CHAN(insn->chanspec); comedi_readback_insn_read()
257 for (i = 0; i < insn->n; i++) comedi_readback_insn_read()
260 return insn->n; comedi_readback_insn_read()
268 * @insn: COMEDI instruction.
273 * some error (other than -EBUSY) to occur. The parameters @dev, @s, @insn,
283 struct comedi_insn *insn, comedi_timeout()
286 struct comedi_insn *insn, comedi_timeout()
294 ret = cb(dev, s, insn, context); comedi_timeout()
307 * @insn: COMEDI instruction.
312 * channel number specified by @insn->chanspec. Otherwise, @mask
326 * instruction, @insn->n (> 0) for a %INSN_CONFIG_DIO_QUERY instruction, or
331 struct comedi_insn *insn, comedi_dio_insn_config()
335 unsigned int chan_mask = 1 << CR_CHAN(insn->chanspec); comedi_dio_insn_config()
351 return insn->n; comedi_dio_insn_config()
578 struct comedi_insn *insn, unsigned int *data) insn_rw_emulate_bits()
584 unsigned chan = CR_CHAN(insn->chanspec); insn_rw_emulate_bits()
591 new_insn.insn = INSN_BITS; insn_rw_emulate_bits()
594 new_insn.subdev = insn->subdev; insn_rw_emulate_bits()
596 if (insn->insn == INSN_WRITE) { insn_rw_emulate_bits()
608 if (insn->insn == INSN_READ) insn_rw_emulate_bits()
223 insn_inval(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) insn_inval() argument
246 comedi_readback_insn_read(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) comedi_readback_insn_read() argument
281 comedi_timeout(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, int (*cb)(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned long context), unsigned long context) comedi_timeout() argument
329 comedi_dio_insn_config(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data, unsigned int mask) comedi_dio_insn_config() argument
576 insn_rw_emulate_bits(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) insn_rw_emulate_bits() argument
/linux-4.4.14/arch/x86/net/
H A Dbpf_jit_comp.c187 /* maximum number of bytes emitted while JITing one eBPF insn */
341 struct bpf_insn *insn = bpf_prog->insnsi; do_jit() local
355 for (i = 0; i < insn_cnt; i++, insn++) { do_jit()
356 const s32 imm32 = insn->imm; do_jit()
357 u32 dst_reg = insn->dst_reg; do_jit()
358 u32 src_reg = insn->src_reg; do_jit()
366 switch (insn->code) { do_jit()
378 switch (BPF_OP(insn->code)) { do_jit()
385 if (BPF_CLASS(insn->code) == BPF_ALU64) do_jit()
407 if (BPF_CLASS(insn->code) == BPF_ALU64) do_jit()
424 if (BPF_CLASS(insn->code) == BPF_ALU64) do_jit()
429 switch (BPF_OP(insn->code)) { do_jit()
465 if (insn[1].code != 0 || insn[1].src_reg != 0 || do_jit()
466 insn[1].dst_reg != 0 || insn[1].off != 0) { do_jit()
468 pr_err("invalid BPF_LD_IMM64 insn\n"); do_jit()
474 EMIT(insn[0].imm, 4); do_jit()
475 EMIT(insn[1].imm, 4); do_jit()
477 insn++; do_jit()
493 if (BPF_SRC(insn->code) == BPF_X) do_jit()
508 if (BPF_SRC(insn->code) == BPF_X) { do_jit()
522 * after this insn: div, mov, pop, pop, mov do_jit()
528 if (BPF_CLASS(insn->code) == BPF_ALU64) do_jit()
535 if (BPF_OP(insn->code) == BPF_MOD) do_jit()
559 if (BPF_SRC(insn->code) == BPF_X) do_jit()
566 if (BPF_CLASS(insn->code) == BPF_ALU64) do_jit()
590 if (BPF_CLASS(insn->code) == BPF_ALU64) do_jit()
595 switch (BPF_OP(insn->code)) { do_jit()
625 if (BPF_CLASS(insn->code) == BPF_ALU64) do_jit()
630 switch (BPF_OP(insn->code)) { do_jit()
640 if (insn->dst_reg == BPF_REG_4) do_jit()
642 EMIT_mov(insn->dst_reg, AUX_REG); do_jit()
723 st: if (is_imm8(insn->off)) do_jit()
724 EMIT2(add_1reg(0x40, dst_reg), insn->off); do_jit()
726 EMIT1_off32(add_1reg(0x80, dst_reg), insn->off); do_jit()
728 EMIT(imm32, bpf_size_to_x86_bytes(BPF_SIZE(insn->code))); do_jit()
755 stx: if (is_imm8(insn->off)) do_jit()
756 EMIT2(add_2reg(0x40, dst_reg, src_reg), insn->off); do_jit()
759 insn->off); do_jit()
781 ldx: /* if insn->off == 0 we can save one extra byte, but do_jit()
785 if (is_imm8(insn->off)) do_jit()
786 EMIT2(add_2reg(0x40, src_reg, dst_reg), insn->off); do_jit()
789 insn->off); do_jit()
802 xadd: if (is_imm8(insn->off)) do_jit()
803 EMIT2(add_2reg(0x40, dst_reg, src_reg), insn->off); do_jit()
806 insn->off); do_jit()
822 * pop %r9, pop %r10 take 4 bytes after call insn do_jit()
887 switch (BPF_OP(insn->code)) { do_jit()
914 jmp_offset = addrs[i + insn->off] - addrs[i]; do_jit()
927 jmp_offset = addrs[i + insn->off] - addrs[i]; do_jit()
955 if (BPF_MODE(insn->code) == BPF_ABS) { do_jit()
1018 pr_err("bpf_jit: unknown opcode %02x\n", insn->code); do_jit()
1024 pr_err("bpf_jit_compile fatal insn size error\n"); do_jit()
/linux-4.4.14/arch/powerpc/kernel/
H A Dkprobes.c48 kprobe_opcode_t insn = *p->addr; arch_prepare_kprobe() local
53 } else if (IS_MTMSRD(insn) || IS_RFID(insn) || IS_RFI(insn)) { arch_prepare_kprobe()
58 /* insn must be on a special executable page on ppc64. This is arch_prepare_kprobe()
61 p->ainsn.insn = get_insn_slot(); arch_prepare_kprobe()
62 if (!p->ainsn.insn) arch_prepare_kprobe()
67 memcpy(p->ainsn.insn, p->addr, arch_prepare_kprobe()
70 flush_icache_range((unsigned long)p->ainsn.insn, arch_prepare_kprobe()
71 (unsigned long)p->ainsn.insn + sizeof(kprobe_opcode_t)); arch_prepare_kprobe()
94 if (p->ainsn.insn) { arch_remove_kprobe()
95 free_insn_slot(p->ainsn.insn, 0); arch_remove_kprobe()
96 p->ainsn.insn = NULL; arch_remove_kprobe()
106 * instruction even if the probed insn is a trap prepare_singlestep()
110 regs->nip = (unsigned long)p->ainsn.insn; prepare_singlestep()
161 kprobe_opcode_t insn = *p->ainsn.insn; kprobe_handler() local
163 is_trap(insn)) { kprobe_handler()
235 unsigned int insn = *p->ainsn.insn; kprobe_handler() local
238 ret = emulate_step(regs, insn); kprobe_handler()
260 printk("Can't step on instruction %x\n", insn); kprobe_handler()
361 * copy is p->ainsn.insn.
372 if (((unsigned long)cur->ainsn.insn + 4) != regs->nip) post_kprobe_handler()
H A Duprobes.c35 * @insn: instruction to be checked.
36 * Returns true if @insn is a trap variant.
38 bool is_trap_insn(uprobe_opcode_t *insn) is_trap_insn() argument
40 return (is_trap(*insn)); is_trap_insn()
88 * If xol insn itself traps and generates a signal (SIGILL/SIGSEGV/etc),
186 * emulate_step() returns 1 if the insn was successfully emulated. arch_uprobe_skip_sstep()
189 ret = emulate_step(regs, auprobe->insn); arch_uprobe_skip_sstep()
/linux-4.4.14/arch/parisc/kernel/
H A Dunwind.c229 unsigned int insn; unwind_frame_regs() local
304 insn = *(unsigned int *)npc; unwind_frame_regs()
306 if ((insn & 0xffffc000) == 0x37de0000 || unwind_frame_regs()
307 (insn & 0xffe00000) == 0x6fc00000) { unwind_frame_regs()
309 frame_size += (insn & 0x1 ? -1 << 13 : 0) | unwind_frame_regs()
310 ((insn & 0x3fff) >> 1); unwind_frame_regs()
311 dbg("analyzing func @ %lx, insn=%08x @ " unwind_frame_regs()
313 insn, npc, frame_size); unwind_frame_regs()
314 } else if ((insn & 0xffe00008) == 0x73c00008) { unwind_frame_regs()
316 frame_size += (insn & 0x1 ? -1 << 13 : 0) | unwind_frame_regs()
317 (((insn >> 4) & 0x3ff) << 3); unwind_frame_regs()
318 dbg("analyzing func @ %lx, insn=%08x @ " unwind_frame_regs()
320 insn, npc, frame_size); unwind_frame_regs()
321 } else if (insn == 0x6bc23fd9) { unwind_frame_regs()
325 dbg("analyzing func @ %lx, insn=stw rp," unwind_frame_regs()
327 } else if (insn == 0x0fc212c1) { unwind_frame_regs()
331 dbg("analyzing func @ %lx, insn=std rp," unwind_frame_regs()
/linux-4.4.14/arch/arm64/include/asm/
H A Dinsn.h283 bool aarch64_insn_is_nop(u32 insn);
284 bool aarch64_insn_is_branch_imm(u32 insn);
287 int aarch64_insn_write(void *addr, u32 insn);
288 enum aarch64_insn_encoding_class aarch64_get_insn_class(u32 insn);
289 u64 aarch64_insn_decode_immediate(enum aarch64_insn_imm_type type, u32 insn);
291 u32 insn, u64 imm);
355 s32 aarch64_get_branch_offset(u32 insn);
356 u32 aarch64_set_branch_offset(u32 insn, s32 offset);
360 int aarch64_insn_patch_text_nosync(void *addr, u32 insn);
364 bool aarch32_insn_is_wide(u32 insn);
370 u32 aarch32_insn_extract_reg_num(u32 insn, int offset);
371 u32 aarch32_insn_mcr_extract_opc2(u32 insn);
372 u32 aarch32_insn_mcr_extract_crm(u32 insn);
/linux-4.4.14/arch/sparc/math-emu/
H A Dmath_64.c170 u32 insn = 0; do_mathemu() local
191 if (get_user(insn, (u32 __user *) pc) != -EFAULT) { do_mathemu()
192 if ((insn & 0xc1f80000) == 0x81a00000) /* FPOP1 */ { do_mathemu()
193 switch ((insn >> 5) & 0x1ff) { do_mathemu()
260 else if ((insn & 0xc1f80000) == 0x81a80000) /* FPOP2 */ { do_mathemu()
262 switch ((insn >> 5) & 0x1ff) { do_mathemu()
271 if (!((insn >> 11) & 3)) do_mathemu()
274 XR = current_thread_info()->xfsr[0] >> (30 + ((insn >> 10) & 0x6)); do_mathemu()
277 switch ((insn >> 14) & 0x7) { do_mathemu()
287 if ((insn >> 14) & 8) do_mathemu()
294 if ((insn >> 5) & 0x80) do_mathemu()
299 switch ((insn >> 14) & 0x7) { do_mathemu()
309 if ((insn >> 14) & 8) do_mathemu()
318 freg = (insn >> 14) & 0x1f; do_mathemu()
335 switch ((insn >> 10) & 3) { do_mathemu()
340 if ((insn >> 10) & 4) do_mathemu()
352 insn = (insn & 0x3e00001f) | 0x81a00060; do_mathemu()
372 freg = ((insn >> 14) & 0x1f); do_mathemu()
390 freg = (insn & 0x1f); do_mathemu()
408 freg = ((insn >> 25) & 0x1f); do_mathemu()
430 switch ((insn >> 5) & 0x1ff) { do_mathemu()
488 (((insn >> 5) & 0x1ff) == FCMPEQ || do_mathemu()
H A Dmath_32.c14 * The fxxxxx.c files each emulate a single insn. They look relatively
82 * each insn is. This is from the binutils source :->
132 static int do_one_mathemu(u32 insn, unsigned long *fsr, unsigned long *fregs);
145 /* regs->pc isn't necessarily the PC at which the offending insn is sitting. do_mathemu()
165 unsigned long insn; do_mathemu() local
173 printk("%d: %08lx at %08lx\n", i, fpt->thread.fpqueue[i].insn, do_mathemu()
177 if (fpt->thread.fpqdepth == 0) { /* no queue, guilty insn is at regs->pc */ do_mathemu()
181 if (!get_user(insn, (u32 __user *) regs->pc)) { do_mathemu()
182 retcode = do_one_mathemu(insn, &fpt->thread.fsr, fpt->thread.float_regs); do_mathemu()
194 retcode = do_one_mathemu(fpt->thread.fpqueue[i].insn, &(fpt->thread.fsr), fpt->thread.float_regs); do_mathemu()
195 if (!retcode) /* insn failed, no point doing any more */ do_mathemu()
274 static int do_one_mathemu(u32 insn, unsigned long *pfsr, unsigned long *fregs) do_one_mathemu() argument
276 /* Emulate the given insn, updating fsr and fregs appropriately. */ do_one_mathemu()
292 printk("In do_mathemu(), emulating %08lx\n", insn); do_one_mathemu()
295 if ((insn & 0xc1f80000) == 0x81a00000) /* FPOP1 */ { do_one_mathemu()
296 switch ((insn >> 5) & 0x1ff) { do_one_mathemu()
330 } else if ((insn & 0xc1f80000) == 0x81a80000) /* FPOP2 */ { do_one_mathemu()
331 switch ((insn >> 5) & 0x1ff) { do_one_mathemu()
353 freg = ((insn >> 14) & 0x1f); do_one_mathemu()
374 freg = (insn & 0x1f); do_one_mathemu()
395 freg = ((insn >> 25) & 0x1f); do_one_mathemu()
422 printk("executing insn...\n"); do_one_mathemu()
425 switch ((insn >> 5) & 0x1ff) { do_one_mathemu()
474 (((insn >> 5) & 0x1ff) == FCMPES || do_one_mathemu()
483 (((insn >> 5) & 0x1ff) == FCMPED || do_one_mathemu()
492 (((insn >> 5) & 0x1ff) == FCMPEQ || do_one_mathemu()
H A Dsfp-util_32.h29 "wr %%g0,%2,%%y ! SPARC has 0-3 delay insn after a wr\n\t" \
30 "sra %3,31,%%g2 ! Don't move this insn\n\t" \
31 "and %2,%%g2,%%g2 ! Don't move this insn\n\t" \
32 "andcc %%g0,0,%%g1 ! Don't move this insn\n\t" \
/linux-4.4.14/arch/mips/lib/
H A Dstrlen_user.S14 #define EX(insn,reg,addr,handler) \
15 9: insn reg, addr; \
H A Dstrncpy_user.S14 #define EX(insn,reg,addr,handler) \
15 9: insn reg, addr; \
H A Dstrnlen_user.S13 #define EX(insn,reg,addr,handler) \
14 9: insn reg, addr; \
H A Dmemset.S44 #define __EVAFY(insn, reg, addr) __BUILD_EVA_INSN(insn##e, reg, addr)
45 #define ___BUILD_EVA_INSN(insn, reg, addr) __EVAFY(insn, reg, addr)
47 #define EX(insn,reg,addr,handler) \
49 9: insn reg, addr; \
51 9: ___BUILD_EVA_INSN(insn, reg, addr); \
/linux-4.4.14/arch/avr32/kernel/
H A Dtraps.c149 static int do_cop_absent(u32 insn) do_cop_absent() argument
154 if ((insn & 0xfdf00000) == 0xf1900000) do_cop_absent()
158 cop_nr = (insn >> 13) & 0x7; do_cop_absent()
188 u32 insn; do_illegal_opcode() local
214 if (get_user(insn, (u32 __user *)pc)) do_illegal_opcode()
217 if (ecr == ECR_COPROC_ABSENT && !do_cop_absent(insn)) do_illegal_opcode()
222 if ((insn & hook->insn_mask) == hook->insn_val) { do_illegal_opcode()
223 if (hook->fn(regs, insn) == 0) { do_illegal_opcode()
/linux-4.4.14/arch/arm/mm/
H A Dabort-macro.S33 .macro teq_ldrd, tmp, insn
36 and \tmp, \insn, \tmp
/linux-4.4.14/arch/x86/um/
H A Dfault.c11 unsigned long insn; member in struct:exception_table_entry
/linux-4.4.14/arch/alpha/math-emu/
H A Dmath.c106 __u32 insn; alpha_fp_emul() local
109 get_user(insn, (__u32 __user *)pc); alpha_fp_emul()
110 fc = (insn >> 0) & 0x1f; /* destination register */ alpha_fp_emul()
111 fb = (insn >> 16) & 0x1f; alpha_fp_emul()
112 fa = (insn >> 21) & 0x1f; alpha_fp_emul()
113 func = (insn >> 5) & 0xf; alpha_fp_emul()
114 src = (insn >> 9) & 0x3; alpha_fp_emul()
115 mode = (insn >> 11) & 0x3; alpha_fp_emul()
220 if (insn & 0x2000) { alpha_fp_emul()
331 printk(KERN_ERR "alpha_fp_emul: Invalid FP insn %#x at %#lx\n", alpha_fp_emul()
332 insn, pc); alpha_fp_emul()
340 unsigned long insn, opcode, rc, si_code = 0; alpha_fp_emul_imprecise() local
354 get_user(insn, (__u32 __user *)(trigger_pc)); alpha_fp_emul_imprecise()
355 opcode = insn >> 26; alpha_fp_emul_imprecise()
356 rc = insn & 0x1f; alpha_fp_emul_imprecise()
365 switch (insn & 0xffff) { alpha_fp_emul_imprecise()
/linux-4.4.14/arch/ia64/include/asm/
H A Dftrace.h17 /* second bundle, insn 2 */ ftrace_call_adjust()
H A Dfutex.h8 #define __futex_atomic_op1(insn, ret, oldval, uaddr, oparg) \
13 "[1:] " insn ";; \n" \
22 #define __futex_atomic_op2(insn, ret, oldval, uaddr, oparg) \
31 insn ";; \n" \
/linux-4.4.14/arch/avr32/include/asm/
H A Dtraps.h17 int (*fn)(struct pt_regs *regs, u32 insn);
/linux-4.4.14/arch/sh/kernel/cpu/sh2a/
H A Dopcode_helper.c37 unsigned int instruction_size(unsigned int insn) instruction_size() argument
40 switch ((insn & 0xf00f)) { instruction_size()
48 switch ((insn & 0xf08f)) { instruction_size()
/linux-4.4.14/include/linux/
H A Dlguest_launcher.h36 * the trap address, insn is the instruction), or 13 for a GPF
37 * (insn is the instruction).
41 __u8 insn[7]; member in struct:lguest_pending
/linux-4.4.14/tools/testing/selftests/x86/
H A Dtest_FCMOV.c15 #define TEST(insn) \
16 long double __attribute__((noinline)) insn(long flags) \
24 " " #insn " %%st(1), %%st" "\n" \
/linux-4.4.14/arch/powerpc/include/asm/
H A Dcode-patching.h54 u32 *insn = func; ppc_function_entry() local
72 if ((((*insn & OP_RT_RA_MASK) == ADDIS_R2_R12) || ppc_function_entry()
73 ((*insn & OP_RT_RA_MASK) == LIS_R2)) && ppc_function_entry()
74 ((*(insn+1) & OP_RT_RA_MASK) == ADDI_R2_R2)) ppc_function_entry()
75 return (unsigned long)(insn + 2); ppc_function_entry()
H A Dfutex.h12 #define __futex_atomic_op(insn, ret, oldval, uaddr, oparg) \
16 insn \
H A Duprobes.h35 #define UPROBE_SWBP_INSN_SIZE 4 /* swbp insn size in bytes */
39 u32 insn; member in union:arch_uprobe::__anon2346
/linux-4.4.14/arch/mips/mm/
H A Duasm.c65 struct insn { struct
149 build_insn(buf, insn##op, a, b, c); \
156 build_insn(buf, insn##op, b, c, a); \
163 build_insn(buf, insn##op, b, a, c); \
170 build_insn(buf, insn##op, c, b, a); \
177 build_insn(buf, insn##op, b, c, a); \
184 build_insn(buf, insn##op, a, b, c); \
191 build_insn(buf, insn##op, c, a, b); \
198 build_insn(buf, insn##op, b, a, c); \
205 build_insn(buf, insn##op, b, a, c+d-1, c); \
212 build_insn(buf, insn##op, b, a, c+d-33, c); \
219 build_insn(buf, insn##op, b, a, d-1, c); \
226 build_insn(buf, insn##op, a, b); \
233 build_insn(buf, insn##op, b, a); \
240 build_insn(buf, insn##op, a, b); \
247 build_insn(buf, insn##op, a); \
254 build_insn(buf, insn##op); \
/linux-4.4.14/arch/s390/pci/
H A Dpci_insn.c34 " .insn rxy,0xe300000000d0,%[req],%[fib]\n" __mpcifc()
67 " .insn rre,0xb9d30000,%[fn],%[addr]\n" __rpcit()
97 " .insn rsy,0xeb00000000d1,%[ctl],%[isc],%[u]\n" zpci_set_irq_ctrl()
110 " .insn rre,0xb9d20000,%[data],%[req]\n" __pcilg()
151 " .insn rre,0xb9d00000,%[data],%[req]\n" __pcistg()
187 " .insn rsy,0xeb00000000d0,%[req],%[offset],%[data]\n" __pcistb()
/linux-4.4.14/arch/metag/include/asm/
H A Dsyscall.h25 unsigned long insn; syscall_get_nr() local
32 if (get_user(insn, (unsigned long *)(regs->ctx.CurrPC - 4))) syscall_get_nr()
35 if (insn == __METAG_SW_ENCODING(SYS)) syscall_get_nr()
/linux-4.4.14/tools/perf/arch/s390/util/
H A Dkvm-stat.c25 unsigned long insn; event_icpt_insn_get_key() local
27 insn = perf_evsel__intval(evsel, sample, "instruction"); event_icpt_insn_get_key()
28 key->key = icpt_insn_decoder(insn); event_icpt_insn_get_key()
/linux-4.4.14/samples/bpf/
H A Dbpf_load.h15 * storing map_fd into insn->imm and marking such insns as BPF_PSEUDO_MAP_FD
/linux-4.4.14/arch/sh/kernel/cpu/sh4/
H A Dfpu.c180 unsigned short insn = *(unsigned short *)regs->pc; ieee_fpe_handler() local
184 (insn >> 12) & 0xf, ieee_fpe_handler()
185 (insn >> 8) & 0xf, ieee_fpe_handler()
186 (insn >> 4) & 0xf, ieee_fpe_handler()
187 insn & 0xf ieee_fpe_handler()
195 nextpc = regs->pc + 4 + ((short)((insn & 0xfff) << 4) >> 3); ieee_fpe_handler()
200 nextpc = regs->pc + 4 + ((char)(insn & 0xff) << 1); ieee_fpe_handler()
209 nextpc = regs->pc + 4 + ((char)(insn & 0xff) << 1); ieee_fpe_handler()
221 } else if (insn == 0x000b) { ieee_fpe_handler()
226 nextpc = regs->pc + instruction_size(insn); ieee_fpe_handler()
227 finsn = insn; ieee_fpe_handler()
/linux-4.4.14/arch/x86/mm/kmemcheck/
H A Dselftest.c9 const uint8_t *insn; member in struct:selftest_opcode
42 kmemcheck_opcode_decode(op->insn, &size); selftest_opcode_one()
/linux-4.4.14/arch/alpha/include/asm/
H A Dfutex.h11 #define __futex_atomic_op(insn, ret, oldval, uaddr, oparg) \
15 insn \
/linux-4.4.14/arch/alpha/kernel/
H A Dptrace.c178 unsigned int insn, op_code; ptrace_set_bpt() local
182 res = read_int(child, pc, (int *) &insn); ptrace_set_bpt()
186 op_code = insn >> 26; ptrace_set_bpt()
196 displ = ((s32)(insn << 11)) >> 9; ptrace_set_bpt()
203 reg_b = (insn >> 16) & 0x1f; ptrace_set_bpt()
208 DBG(DBG_BPT, ("execing normal insn\n")); ptrace_set_bpt()
214 (int *) &insn); ptrace_set_bpt()
217 task_thread_info(child)->bpt_insn[i] = insn; ptrace_set_bpt()
/linux-4.4.14/arch/microblaze/include/asm/
H A Dfutex.h10 #define __futex_atomic_op(insn, ret, oldval, uaddr, oparg) \
14 insn \
/linux-4.4.14/arch/nios2/include/asm/
H A Duaccess.h38 unsigned long insn; member in struct:exception_table_entry
126 #define __get_user_asm(val, insn, addr, err) \
130 "1: " insn " %1, 0(%2)\n" \
187 #define __put_user_asm(val, insn, ptr, err) \
191 "1: " insn " %1, 0(%2)\n" \
/linux-4.4.14/arch/ia64/kernel/
H A Dmodule.c139 struct insn;
142 bundle (const struct insn *insn) bundle() argument
144 return (uint64_t) insn & ~0xfUL; bundle()
148 slot (const struct insn *insn) slot() argument
150 return (uint64_t) insn & 0x3; slot()
154 apply_imm64 (struct module *mod, struct insn *insn, uint64_t val) apply_imm64() argument
156 if (slot(insn) != 2) { apply_imm64()
158 mod->name, slot(insn)); apply_imm64()
161 ia64_patch_imm64((u64) insn, val); apply_imm64()
166 apply_imm60 (struct module *mod, struct insn *insn, uint64_t val) apply_imm60() argument
168 if (slot(insn) != 2) { apply_imm60()
170 mod->name, slot(insn)); apply_imm60()
178 ia64_patch_imm60((u64) insn, val); apply_imm60()
183 apply_imm22 (struct module *mod, struct insn *insn, uint64_t val) apply_imm22() argument
190 ia64_patch((u64) insn, 0x01fffcfe000UL, ( ((val & 0x200000UL) << 15) /* bit 21 -> 36 */ apply_imm22()
198 apply_imm21b (struct module *mod, struct insn *insn, uint64_t val) apply_imm21b() argument
205 ia64_patch((u64) insn, 0x11ffffe000UL, ( ((val & 0x100000UL) << 16) /* bit 20 -> 36 */ apply_imm21b()
235 if (apply_imm64(mod, (struct insn *) (plt->bundle[0] + 2), target_gp) patch_plt()
236 && apply_imm60(mod, (struct insn *) (plt->bundle[1] + 2), patch_plt()
285 if (apply_imm64(mod, (struct insn *) (plt->bundle[0] + 2), target_ip) patch_plt()
286 && apply_imm64(mod, (struct insn *) (plt->bundle[1] + 2), target_gp)) patch_plt()
537 get_plt (struct module *mod, const struct insn *insn, uint64_t value, int *okp) get_plt() argument
545 if (in_init(mod, (uint64_t) insn)) { get_plt()
/linux-4.4.14/tools/lib/traceevent/
H A Dplugin_kvm.c39 static const char *disassemble(unsigned char *insn, int len, uint64_t rip, disassemble() argument
58 ud_set_input_buffer(&ud, insn, len); disassemble()
69 static const char *disassemble(unsigned char *insn, int len, uint64_t rip, disassemble() argument
77 sprintf(out + i * 3, "%02x ", insn[i]); disassemble()
299 uint8_t *insn; kvm_emulate_insn_handler() local
317 insn = pevent_get_field_raw(s, event, "insn", record, &llen, 1); kvm_emulate_insn_handler()
318 if (!insn) kvm_emulate_insn_handler()
321 disasm = disassemble(insn, len, rip, kvm_emulate_insn_handler()
/linux-4.4.14/arch/arc/lib/
H A Dmemcmp.S74 ; slow track insn
89 ; slow track insn
102 ; slow track insn

Completed in 4382 milliseconds

123