Lines Matching refs:insn
97 union mips_instruction insn = *insn_ptr; in microMIPS32_to_MIPS32() local
98 union mips_instruction mips32_insn = insn; in microMIPS32_to_MIPS32()
101 switch (insn.mm_i_format.opcode) { in microMIPS32_to_MIPS32()
104 mips32_insn.mm_i_format.rt = insn.mm_i_format.rs; in microMIPS32_to_MIPS32()
105 mips32_insn.mm_i_format.rs = insn.mm_i_format.rt; in microMIPS32_to_MIPS32()
109 mips32_insn.mm_i_format.rt = insn.mm_i_format.rs; in microMIPS32_to_MIPS32()
110 mips32_insn.mm_i_format.rs = insn.mm_i_format.rt; in microMIPS32_to_MIPS32()
114 mips32_insn.mm_i_format.rt = insn.mm_i_format.rs; in microMIPS32_to_MIPS32()
115 mips32_insn.mm_i_format.rs = insn.mm_i_format.rt; in microMIPS32_to_MIPS32()
119 mips32_insn.mm_i_format.rt = insn.mm_i_format.rs; in microMIPS32_to_MIPS32()
120 mips32_insn.mm_i_format.rs = insn.mm_i_format.rt; in microMIPS32_to_MIPS32()
124 if ((insn.mm_i_format.rt == mm_bc1f_op) || in microMIPS32_to_MIPS32()
125 (insn.mm_i_format.rt == mm_bc1t_op)) { in microMIPS32_to_MIPS32()
129 (insn.mm_i_format.rt == mm_bc1t_op) ? 1 : 0; in microMIPS32_to_MIPS32()
134 switch (insn.mm_fp0_format.func) { in microMIPS32_to_MIPS32()
143 op = insn.mm_fp0_format.func; in microMIPS32_to_MIPS32()
161 mips32_insn.fp6_format.fr = insn.mm_fp6_format.fr; in microMIPS32_to_MIPS32()
162 mips32_insn.fp6_format.ft = insn.mm_fp6_format.ft; in microMIPS32_to_MIPS32()
163 mips32_insn.fp6_format.fs = insn.mm_fp6_format.fs; in microMIPS32_to_MIPS32()
164 mips32_insn.fp6_format.fd = insn.mm_fp6_format.fd; in microMIPS32_to_MIPS32()
169 op = insn.mm_fp5_format.op & 0x7; in microMIPS32_to_MIPS32()
182 insn.mm_fp5_format.base; in microMIPS32_to_MIPS32()
184 insn.mm_fp5_format.index; in microMIPS32_to_MIPS32()
186 mips32_insn.r_format.re = insn.mm_fp5_format.fd; in microMIPS32_to_MIPS32()
193 if (insn.mm_fp2_format.op == mm_fmovt_op) in microMIPS32_to_MIPS32()
195 else if (insn.mm_fp2_format.op == mm_fmovf_op) in microMIPS32_to_MIPS32()
200 sdps_format[insn.mm_fp2_format.fmt]; in microMIPS32_to_MIPS32()
202 (insn.mm_fp2_format.cc<<2) + op; in microMIPS32_to_MIPS32()
204 insn.mm_fp2_format.fs; in microMIPS32_to_MIPS32()
206 insn.mm_fp2_format.fd; in microMIPS32_to_MIPS32()
213 if (insn.mm_fp0_format.op == mm_fadd_op) in microMIPS32_to_MIPS32()
215 else if (insn.mm_fp0_format.op == mm_fsub_op) in microMIPS32_to_MIPS32()
217 else if (insn.mm_fp0_format.op == mm_fmul_op) in microMIPS32_to_MIPS32()
219 else if (insn.mm_fp0_format.op == mm_fdiv_op) in microMIPS32_to_MIPS32()
224 sdps_format[insn.mm_fp0_format.fmt]; in microMIPS32_to_MIPS32()
226 insn.mm_fp0_format.ft; in microMIPS32_to_MIPS32()
228 insn.mm_fp0_format.fs; in microMIPS32_to_MIPS32()
230 insn.mm_fp0_format.fd; in microMIPS32_to_MIPS32()
237 if (insn.mm_fp0_format.op == mm_fmovn_op) in microMIPS32_to_MIPS32()
239 else if (insn.mm_fp0_format.op == mm_fmovz_op) in microMIPS32_to_MIPS32()
244 sdps_format[insn.mm_fp0_format.fmt]; in microMIPS32_to_MIPS32()
246 insn.mm_fp0_format.ft; in microMIPS32_to_MIPS32()
248 insn.mm_fp0_format.fs; in microMIPS32_to_MIPS32()
250 insn.mm_fp0_format.fd; in microMIPS32_to_MIPS32()
256 switch (insn.mm_fp1_format.op) { in microMIPS32_to_MIPS32()
261 if ((insn.mm_fp1_format.op & 0x7f) == in microMIPS32_to_MIPS32()
267 mips32_insn.r_format.rs = insn.mm_fp4_format.fs; in microMIPS32_to_MIPS32()
269 (insn.mm_fp4_format.cc << 2) + op; in microMIPS32_to_MIPS32()
270 mips32_insn.r_format.rd = insn.mm_fp4_format.rt; in microMIPS32_to_MIPS32()
278 if ((insn.mm_fp1_format.op & 0x7f) == in microMIPS32_to_MIPS32()
281 fmt = swl_format[insn.mm_fp3_format.fmt]; in microMIPS32_to_MIPS32()
284 fmt = dwl_format[insn.mm_fp3_format.fmt]; in microMIPS32_to_MIPS32()
290 insn.mm_fp3_format.fs; in microMIPS32_to_MIPS32()
292 insn.mm_fp3_format.rt; in microMIPS32_to_MIPS32()
301 if ((insn.mm_fp1_format.op & 0x7f) == in microMIPS32_to_MIPS32()
304 else if ((insn.mm_fp1_format.op & 0x7f) == in microMIPS32_to_MIPS32()
311 sdps_format[insn.mm_fp3_format.fmt]; in microMIPS32_to_MIPS32()
314 insn.mm_fp3_format.fs; in microMIPS32_to_MIPS32()
316 insn.mm_fp3_format.rt; in microMIPS32_to_MIPS32()
329 if (insn.mm_fp1_format.op == mm_ffloorl_op) in microMIPS32_to_MIPS32()
331 else if (insn.mm_fp1_format.op == mm_ffloorw_op) in microMIPS32_to_MIPS32()
333 else if (insn.mm_fp1_format.op == mm_fceill_op) in microMIPS32_to_MIPS32()
335 else if (insn.mm_fp1_format.op == mm_fceilw_op) in microMIPS32_to_MIPS32()
337 else if (insn.mm_fp1_format.op == mm_ftruncl_op) in microMIPS32_to_MIPS32()
339 else if (insn.mm_fp1_format.op == mm_ftruncw_op) in microMIPS32_to_MIPS32()
341 else if (insn.mm_fp1_format.op == mm_froundl_op) in microMIPS32_to_MIPS32()
343 else if (insn.mm_fp1_format.op == mm_froundw_op) in microMIPS32_to_MIPS32()
345 else if (insn.mm_fp1_format.op == mm_fcvtl_op) in microMIPS32_to_MIPS32()
351 sd_format[insn.mm_fp1_format.fmt]; in microMIPS32_to_MIPS32()
354 insn.mm_fp1_format.fs; in microMIPS32_to_MIPS32()
356 insn.mm_fp1_format.rt; in microMIPS32_to_MIPS32()
362 if (insn.mm_fp1_format.op == mm_frsqrt_op) in microMIPS32_to_MIPS32()
364 else if (insn.mm_fp1_format.op == mm_fsqrt_op) in microMIPS32_to_MIPS32()
370 sdps_format[insn.mm_fp1_format.fmt]; in microMIPS32_to_MIPS32()
373 insn.mm_fp1_format.fs; in microMIPS32_to_MIPS32()
375 insn.mm_fp1_format.rt; in microMIPS32_to_MIPS32()
384 if (insn.mm_fp1_format.op == mm_mfc1_op) in microMIPS32_to_MIPS32()
386 else if (insn.mm_fp1_format.op == mm_mtc1_op) in microMIPS32_to_MIPS32()
388 else if (insn.mm_fp1_format.op == mm_cfc1_op) in microMIPS32_to_MIPS32()
390 else if (insn.mm_fp1_format.op == mm_ctc1_op) in microMIPS32_to_MIPS32()
392 else if (insn.mm_fp1_format.op == mm_mfhc1_op) in microMIPS32_to_MIPS32()
399 insn.mm_fp1_format.rt; in microMIPS32_to_MIPS32()
401 insn.mm_fp1_format.fs; in microMIPS32_to_MIPS32()
412 sdps_format[insn.mm_fp4_format.fmt]; in microMIPS32_to_MIPS32()
413 mips32_insn.fp0_format.ft = insn.mm_fp4_format.rt; in microMIPS32_to_MIPS32()
414 mips32_insn.fp0_format.fs = insn.mm_fp4_format.fs; in microMIPS32_to_MIPS32()
415 mips32_insn.fp0_format.fd = insn.mm_fp4_format.cc << 2; in microMIPS32_to_MIPS32()
417 insn.mm_fp4_format.cond | MM_MIPS32_COND_FC; in microMIPS32_to_MIPS32()
440 union mips_instruction insn = (union mips_instruction)dec_insn.insn; in isBranchInstr() local
444 switch (insn.i_format.opcode) { in isBranchInstr()
446 switch (insn.r_format.func) { in isBranchInstr()
448 if (insn.r_format.rd != 0) { in isBranchInstr()
449 regs->regs[insn.r_format.rd] = in isBranchInstr()
456 if (NO_R6EMU && insn.r_format.func == jr_op) in isBranchInstr()
458 *contpc = regs->regs[insn.r_format.rs]; in isBranchInstr()
463 switch (insn.i_format.rt) { in isBranchInstr()
466 if (NO_R6EMU && (insn.i_format.rs || in isBranchInstr()
467 insn.i_format.rt == bltzall_op)) in isBranchInstr()
478 if ((long)regs->regs[insn.i_format.rs] < 0) in isBranchInstr()
481 (insn.i_format.simmediate << 2); in isBranchInstr()
489 if (NO_R6EMU && (insn.i_format.rs || in isBranchInstr()
490 insn.i_format.rt == bgezall_op)) in isBranchInstr()
501 if ((long)regs->regs[insn.i_format.rs] >= 0) in isBranchInstr()
504 (insn.i_format.simmediate << 2); in isBranchInstr()
523 *contpc |= (insn.j_format.target << 2); in isBranchInstr()
531 if (regs->regs[insn.i_format.rs] == in isBranchInstr()
532 regs->regs[insn.i_format.rt]) in isBranchInstr()
535 (insn.i_format.simmediate << 2); in isBranchInstr()
545 if (regs->regs[insn.i_format.rs] != in isBranchInstr()
546 regs->regs[insn.i_format.rt]) in isBranchInstr()
549 (insn.i_format.simmediate << 2); in isBranchInstr()
556 if (!insn.i_format.rt && NO_R6EMU) in isBranchInstr()
572 if (cpu_has_mips_r6 && insn.i_format.rt) { in isBranchInstr()
573 if ((insn.i_format.opcode == blez_op) && in isBranchInstr()
574 ((!insn.i_format.rs && insn.i_format.rt) || in isBranchInstr()
575 (insn.i_format.rs == insn.i_format.rt))) in isBranchInstr()
583 if ((long)regs->regs[insn.i_format.rs] <= 0) in isBranchInstr()
586 (insn.i_format.simmediate << 2); in isBranchInstr()
593 if (!insn.i_format.rt && NO_R6EMU) in isBranchInstr()
609 if (cpu_has_mips_r6 && insn.i_format.rt) { in isBranchInstr()
610 if ((insn.i_format.opcode == blez_op) && in isBranchInstr()
611 ((!insn.i_format.rs && insn.i_format.rt) || in isBranchInstr()
612 (insn.i_format.rs == insn.i_format.rt))) in isBranchInstr()
621 if ((long)regs->regs[insn.i_format.rs] > 0) in isBranchInstr()
624 (insn.i_format.simmediate << 2); in isBranchInstr()
634 if (insn.i_format.rt && !insn.i_format.rs) in isBranchInstr()
642 if ((regs->regs[insn.i_format.rs] & (1ull<<insn.i_format.rt)) == 0) in isBranchInstr()
643 *contpc = regs->cp0_epc + 4 + (insn.i_format.simmediate << 2); in isBranchInstr()
648 if ((regs->regs[insn.i_format.rs] & (1ull<<(insn.i_format.rt + 32))) == 0) in isBranchInstr()
649 *contpc = regs->cp0_epc + 4 + (insn.i_format.simmediate << 2); in isBranchInstr()
654 if (regs->regs[insn.i_format.rs] & (1ull<<insn.i_format.rt)) in isBranchInstr()
655 *contpc = regs->cp0_epc + 4 + (insn.i_format.simmediate << 2); in isBranchInstr()
660 if (regs->regs[insn.i_format.rs] & (1ull<<(insn.i_format.rt + 32))) in isBranchInstr()
661 *contpc = regs->cp0_epc + 4 + (insn.i_format.simmediate << 2); in isBranchInstr()
696 if (!insn.i_format.rs) in isBranchInstr()
707 ((insn.i_format.rs == bc1eqz_op) || in isBranchInstr()
708 (insn.i_format.rs == bc1nez_op))) { in isBranchInstr()
710 switch (insn.i_format.rs) { in isBranchInstr()
712 if (get_fpr32(¤t->thread.fpu.fpr[insn.i_format.rt], 0) & 0x1) in isBranchInstr()
716 if (!(get_fpr32(¤t->thread.fpu.fpr[insn.i_format.rt], 0) & 0x1)) in isBranchInstr()
723 (insn.i_format.simmediate << 2); in isBranchInstr()
734 if (insn.i_format.rs == bc_op) { in isBranchInstr()
742 bit = (insn.i_format.rt >> 2); in isBranchInstr()
745 switch (insn.i_format.rt & 3) { in isBranchInstr()
751 (insn.i_format.simmediate << 2); in isBranchInstr()
762 (insn.i_format.simmediate << 2); in isBranchInstr()
1021 ir = dec_insn.insn; /* process current instr */ in cop1Emulate()
2529 dec_insn.insn = (*instr_ptr << 16) | in fpu_emulator_cop1Handler()
2535 dec_insn.insn = (*instr_ptr << 16) | in fpu_emulator_cop1Handler()
2556 if ((get_user(dec_insn.insn, in fpu_emulator_cop1Handler()
2568 if ((dec_insn.insn == 0) || in fpu_emulator_cop1Handler()
2570 ((dec_insn.insn & 0xffff) == MM_NOP16))) in fpu_emulator_cop1Handler()