Lines Matching refs:insn
1302 load_store_t insn; in ia64_handle_unaligned() member
1385 "ld.x6=0x%x ld.m=%d ld.op=%d\n", opcode, u.insn.qp, u.insn.r1, u.insn.imm, in ia64_handle_unaligned()
1386 u.insn.r3, u.insn.x, u.insn.hint, u.insn.x6_sz, u.insn.m, u.insn.op); in ia64_handle_unaligned()
1425 if (u.insn.x) in ia64_handle_unaligned()
1453 if (u.insn.x) in ia64_handle_unaligned()
1464 ret = emulate_load_int(ifa, u.insn, regs); in ia64_handle_unaligned()
1469 if (u.insn.x) in ia64_handle_unaligned()
1475 ret = emulate_store_int(ifa, u.insn, regs); in ia64_handle_unaligned()
1482 if (u.insn.x) in ia64_handle_unaligned()
1483 ret = emulate_load_floatpair(ifa, u.insn, regs); in ia64_handle_unaligned()
1485 ret = emulate_load_float(ifa, u.insn, regs); in ia64_handle_unaligned()
1492 ret = emulate_load_float(ifa, u.insn, regs); in ia64_handle_unaligned()
1497 ret = emulate_store_float(ifa, u.insn, regs); in ia64_handle_unaligned()