13 static inline int insn_has_delay_slot(const union mips_instruction insn)  in insn_has_delay_slot()  argument
15 	switch (insn.i_format.opcode) {  in insn_has_delay_slot()
20 		switch (insn.r_format.func) {  in insn_has_delay_slot()
33 		switch (insn.i_format.rt) {  in insn_has_delay_slot()
97 	inst.word = aup->insn[0];  in arch_uprobe_analyze_insn()
98 	aup->ixol[0] = aup->insn[insn_has_delay_slot(inst)];  in arch_uprobe_analyze_insn()
114 bool is_trap_insn(uprobe_opcode_t *insn)  in is_trap_insn()  argument
118 	inst.word = *insn;  in is_trap_insn()
160 	union mips_instruction insn;  in arch_uprobe_pre_xol()  local
167 	if (insn_has_delay_slot((union mips_instruction) aup->insn[0])) {  in arch_uprobe_pre_xol()
171 		__compute_return_epc_for_insn(regs, insn);  in arch_uprobe_pre_xol()