27 t32_simulate_table_branch(probes_opcode_t insn,  in t32_simulate_table_branch()  argument
31 	int rn = (insn >> 16) & 0xf;  in t32_simulate_table_branch()
32 	int rm = insn & 0xf;  in t32_simulate_table_branch()
38 	if (insn & 0x10) /* TBH */  in t32_simulate_table_branch()
47 t32_simulate_mrs(probes_opcode_t insn,  in t32_simulate_mrs()  argument
50 	int rd = (insn >> 8) & 0xf;  in t32_simulate_mrs()
56 t32_simulate_cond_branch(probes_opcode_t insn,  in t32_simulate_cond_branch()  argument
61 	long offset = insn & 0x7ff;		/* imm11 */  in t32_simulate_cond_branch()
62 	offset += (insn & 0x003f0000) >> 5;	/* imm6 */  in t32_simulate_cond_branch()
63 	offset += (insn & 0x00002000) << 4;	/* J1 */  in t32_simulate_cond_branch()
64 	offset += (insn & 0x00000800) << 7;	/* J2 */  in t32_simulate_cond_branch()
65 	offset -= (insn & 0x04000000) >> 7;	/* Apply sign bit */  in t32_simulate_cond_branch()
71 t32_decode_cond_branch(probes_opcode_t insn, struct arch_probes_insn *asi,  in t32_decode_cond_branch()  argument
74 	int cc = (insn >> 22) & 0xf;  in t32_decode_cond_branch()
81 t32_simulate_branch(probes_opcode_t insn,  in t32_simulate_branch()  argument
86 	long offset = insn & 0x7ff;		/* imm11 */  in t32_simulate_branch()
87 	offset += (insn & 0x03ff0000) >> 5;	/* imm10 */  in t32_simulate_branch()
88 	offset += (insn & 0x00002000) << 9;	/* J1 */  in t32_simulate_branch()
89 	offset += (insn & 0x00000800) << 10;	/* J2 */  in t32_simulate_branch()
90 	if (insn & 0x04000000)  in t32_simulate_branch()
95 	if (insn & (1 << 14)) {  in t32_simulate_branch()
98 		if (!(insn & (1 << 12))) {  in t32_simulate_branch()
109 t32_simulate_ldr_literal(probes_opcode_t insn,  in t32_simulate_ldr_literal()  argument
113 	int rt = (insn >> 12) & 0xf;  in t32_simulate_ldr_literal()
116 	long offset = insn & 0xfff;  in t32_simulate_ldr_literal()
117 	if (insn & 0x00800000)  in t32_simulate_ldr_literal()
122 	if (insn & 0x00400000) {  in t32_simulate_ldr_literal()
129 	} else if (insn & 0x00200000) {  in t32_simulate_ldr_literal()
131 		if (insn & 0x01000000)  in t32_simulate_ldr_literal()
137 		if (insn & 0x01000000)  in t32_simulate_ldr_literal()
147 t32_decode_ldmstm(probes_opcode_t insn, struct arch_probes_insn *asi,  in t32_decode_ldmstm()  argument
150 	enum probes_insn ret = kprobe_decode_ldmstm(insn, asi, d);  in t32_decode_ldmstm()
153 	insn = __mem_to_opcode_arm(asi->insn[0]);  in t32_decode_ldmstm()
154 	((u16 *)asi->insn)[0] = __opcode_to_mem_thumb16(insn >> 16);  in t32_decode_ldmstm()
155 	((u16 *)asi->insn)[1] = __opcode_to_mem_thumb16(insn & 0xffff);  in t32_decode_ldmstm()
161 t32_emulate_ldrdstrd(probes_opcode_t insn,  in t32_emulate_ldrdstrd()  argument
165 	int rt1 = (insn >> 12) & 0xf;  in t32_emulate_ldrdstrd()
166 	int rt2 = (insn >> 8) & 0xf;  in t32_emulate_ldrdstrd()
167 	int rn = (insn >> 16) & 0xf;  in t32_emulate_ldrdstrd()
188 t32_emulate_ldrstr(probes_opcode_t insn,  in t32_emulate_ldrstr()  argument
191 	int rt = (insn >> 12) & 0xf;  in t32_emulate_ldrstr()
192 	int rn = (insn >> 16) & 0xf;  in t32_emulate_ldrstr()
193 	int rm = insn & 0xf;  in t32_emulate_ldrstr()
214 t32_emulate_rd8rn16rm0_rwflags(probes_opcode_t insn,  in t32_emulate_rd8rn16rm0_rwflags()  argument
217 	int rd = (insn >> 8) & 0xf;  in t32_emulate_rd8rn16rm0_rwflags()
218 	int rn = (insn >> 16) & 0xf;  in t32_emulate_rd8rn16rm0_rwflags()
219 	int rm = insn & 0xf;  in t32_emulate_rd8rn16rm0_rwflags()
241 t32_emulate_rd8pc16_noflags(probes_opcode_t insn,  in t32_emulate_rd8pc16_noflags()  argument
245 	int rd = (insn >> 8) & 0xf;  in t32_emulate_rd8pc16_noflags()
261 t32_emulate_rd8rn16_noflags(probes_opcode_t insn,  in t32_emulate_rd8rn16_noflags()  argument
264 	int rd = (insn >> 8) & 0xf;  in t32_emulate_rd8rn16_noflags()
265 	int rn = (insn >> 16) & 0xf;  in t32_emulate_rd8rn16_noflags()
281 t32_emulate_rdlo12rdhi8rn16rm0_noflags(probes_opcode_t insn,  in t32_emulate_rdlo12rdhi8rn16rm0_noflags()  argument
285 	int rdlo = (insn >> 12) & 0xf;  in t32_emulate_rdlo12rdhi8rn16rm0_noflags()
286 	int rdhi = (insn >> 8) & 0xf;  in t32_emulate_rdlo12rdhi8rn16rm0_noflags()
287 	int rn = (insn >> 16) & 0xf;  in t32_emulate_rdlo12rdhi8rn16rm0_noflags()
288 	int rm = insn & 0xf;  in t32_emulate_rdlo12rdhi8rn16rm0_noflags()
309 t16_simulate_bxblx(probes_opcode_t insn,  in t16_simulate_bxblx()  argument
313 	int rm = (insn >> 3) & 0xf;  in t16_simulate_bxblx()
316 	if (insn & (1 << 7)) /* BLX ? */  in t16_simulate_bxblx()
323 t16_simulate_ldr_literal(probes_opcode_t insn,  in t16_simulate_ldr_literal()  argument
327 	long index = insn & 0xff;  in t16_simulate_ldr_literal()
328 	int rt = (insn >> 8) & 0x7;  in t16_simulate_ldr_literal()
333 t16_simulate_ldrstr_sp_relative(probes_opcode_t insn,  in t16_simulate_ldrstr_sp_relative()  argument
337 	long index = insn & 0xff;  in t16_simulate_ldrstr_sp_relative()
338 	int rt = (insn >> 8) & 0x7;  in t16_simulate_ldrstr_sp_relative()
339 	if (insn & 0x800) /* LDR */  in t16_simulate_ldrstr_sp_relative()
346 t16_simulate_reladr(probes_opcode_t insn,  in t16_simulate_reladr()  argument
349 	unsigned long base = (insn & 0x800) ? regs->ARM_sp  in t16_simulate_reladr()
351 	long offset = insn & 0xff;  in t16_simulate_reladr()
352 	int rt = (insn >> 8) & 0x7;  in t16_simulate_reladr()
357 t16_simulate_add_sp_imm(probes_opcode_t insn,  in t16_simulate_add_sp_imm()  argument
360 	long imm = insn & 0x7f;  in t16_simulate_add_sp_imm()
361 	if (insn & 0x80) /* SUB */  in t16_simulate_add_sp_imm()
368 t16_simulate_cbz(probes_opcode_t insn,  in t16_simulate_cbz()  argument
371 	int rn = insn & 0x7;  in t16_simulate_cbz()
372 	probes_opcode_t nonzero = regs->uregs[rn] ? insn : ~insn;  in t16_simulate_cbz()
374 		long i = insn & 0x200;  in t16_simulate_cbz()
375 		long imm5 = insn & 0xf8;  in t16_simulate_cbz()
382 t16_simulate_it(probes_opcode_t insn,  in t16_simulate_it()  argument
393 	cpsr |= (insn & 0xfc) << 8;  in t16_simulate_it()
394 	cpsr |= (insn & 0x03) << 25;  in t16_simulate_it()
399 t16_singlestep_it(probes_opcode_t insn,  in t16_singlestep_it()  argument
403 	t16_simulate_it(insn, asi, regs);  in t16_singlestep_it()
407 t16_decode_it(probes_opcode_t insn, struct arch_probes_insn *asi,  in t16_decode_it()  argument
415 t16_simulate_cond_branch(probes_opcode_t insn,  in t16_simulate_cond_branch()  argument
419 	long offset = insn & 0x7f;  in t16_simulate_cond_branch()
420 	offset -= insn & 0x80; /* Apply sign bit */  in t16_simulate_cond_branch()
425 t16_decode_cond_branch(probes_opcode_t insn, struct arch_probes_insn *asi,  in t16_decode_cond_branch()  argument
428 	int cc = (insn >> 8) & 0xf;  in t16_decode_cond_branch()
435 t16_simulate_branch(probes_opcode_t insn,  in t16_simulate_branch()  argument
439 	long offset = insn & 0x3ff;  in t16_simulate_branch()
440 	offset -= insn & 0x400; /* Apply sign bit */  in t16_simulate_branch()
445 t16_emulate_loregs(probes_opcode_t insn,  in t16_emulate_loregs()  argument
468 t16_emulate_loregs_rwflags(probes_opcode_t insn,  in t16_emulate_loregs_rwflags()  argument
471 	regs->ARM_cpsr = t16_emulate_loregs(insn, asi, regs);  in t16_emulate_loregs_rwflags()
475 t16_emulate_loregs_noitrwflags(probes_opcode_t insn,  in t16_emulate_loregs_noitrwflags()  argument
478 	unsigned long cpsr = t16_emulate_loregs(insn, asi, regs);  in t16_emulate_loregs_noitrwflags()
484 t16_emulate_hiregs(probes_opcode_t insn,  in t16_emulate_hiregs()  argument
488 	int rdn = (insn & 0x7) | ((insn & 0x80) >> 4);  in t16_emulate_hiregs()
489 	int rm = (insn >> 3) & 0xf;  in t16_emulate_hiregs()
515 t16_decode_hiregs(probes_opcode_t insn, struct arch_probes_insn *asi,  in t16_decode_hiregs()  argument
518 	insn &= ~0x00ff;  in t16_decode_hiregs()
519 	insn |= 0x001; /* Set Rdn = R1 and Rm = R0 */  in t16_decode_hiregs()
520 	((u16 *)asi->insn)[0] = __opcode_to_mem_thumb16(insn);  in t16_decode_hiregs()
526 t16_emulate_push(probes_opcode_t insn,  in t16_emulate_push()  argument
543 t16_decode_push(probes_opcode_t insn, struct arch_probes_insn *asi,  in t16_decode_push()  argument
552 	((u16 *)asi->insn)[0] = __opcode_to_mem_thumb16(0xe929);  in t16_decode_push()
554 	((u16 *)asi->insn)[1] = __opcode_to_mem_thumb16(insn & 0x1ff);  in t16_decode_push()
560 t16_emulate_pop_nopc(probes_opcode_t insn,  in t16_emulate_pop_nopc()  argument
577 t16_emulate_pop_pc(probes_opcode_t insn,  in t16_emulate_pop_pc()  argument
598 t16_decode_pop(probes_opcode_t insn, struct arch_probes_insn *asi,  in t16_decode_pop()  argument
607 	((u16 *)asi->insn)[0] = __opcode_to_mem_thumb16(0xe8b9);  in t16_decode_pop()
609 	((u16 *)asi->insn)[1] = __opcode_to_mem_thumb16(insn & 0x1ff);  in t16_decode_pop()
610 	asi->insn_handler = insn & 0x100 ? t16_emulate_pop_pc  in t16_decode_pop()