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Searched refs:cvmx_write_csr (Results 1 – 48 of 48) sorted by relevance

/linux-4.4.14/arch/mips/cavium-octeon/executive/
Dcvmx-helper-rgmii.c114 cvmx_write_csr(CVMX_GMXX_TXX_CLK(index, interface), 1); in cvmx_helper_rgmii_internal_loopback()
115 cvmx_write_csr(CVMX_GMXX_TXX_SLOT(index, interface), 0x200); in cvmx_helper_rgmii_internal_loopback()
116 cvmx_write_csr(CVMX_GMXX_TXX_BURST(index, interface), 0x2000); in cvmx_helper_rgmii_internal_loopback()
117 cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), gmx_cfg.u64); in cvmx_helper_rgmii_internal_loopback()
119 cvmx_write_csr(CVMX_ASXX_PRT_LOOP(interface), (1 << index) | tmp); in cvmx_helper_rgmii_internal_loopback()
121 cvmx_write_csr(CVMX_ASXX_TX_PRT_EN(interface), (1 << index) | tmp); in cvmx_helper_rgmii_internal_loopback()
123 cvmx_write_csr(CVMX_ASXX_RX_PRT_EN(interface), (1 << index) | tmp); in cvmx_helper_rgmii_internal_loopback()
125 cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), gmx_cfg.u64); in cvmx_helper_rgmii_internal_loopback()
143 cvmx_write_csr(CVMX_ASXX_TX_HI_WATERX(port, interface), 12); in __cvmx_helper_errata_asx_pass1()
145 cvmx_write_csr(CVMX_ASXX_TX_HI_WATERX(port, interface), 11); in __cvmx_helper_errata_asx_pass1()
[all …]
Dcvmx-helper-xaui.c81 cvmx_write_csr(CVMX_GMXX_INF_MODE(interface), mode.u64); in __cvmx_helper_xaui_probe()
103 cvmx_write_csr(CVMX_PKO_MEM_PORT_PTRS, pko_mem_port_ptrs.u64); in __cvmx_helper_xaui_probe()
131 cvmx_write_csr(CVMX_GMXX_PRTX_CFG(0, interface), gmx_cfg.u64); in __cvmx_helper_xaui_enable()
139 cvmx_write_csr(CVMX_PCSXX_MISC_CTL_REG(interface), xauiMiscCtl.u64); in __cvmx_helper_xaui_enable()
143 cvmx_write_csr(CVMX_GMXX_RXX_INT_EN(0, interface), 0x0); in __cvmx_helper_xaui_enable()
145 cvmx_write_csr(CVMX_GMXX_TX_INT_EN(interface), 0x0); in __cvmx_helper_xaui_enable()
147 cvmx_write_csr(CVMX_PCSXX_INT_EN_REG(interface), 0x0); in __cvmx_helper_xaui_enable()
156 cvmx_write_csr(CVMX_GMXX_TX_XAUI_CTL(interface), gmxXauiTxCtl.u64); in __cvmx_helper_xaui_enable()
167 cvmx_write_csr(CVMX_PCSXX_CONTROL1_REG(interface), xauiCtl.u64); in __cvmx_helper_xaui_enable()
188 cvmx_write_csr(CVMX_GMXX_PRTX_CFG(0, interface), gmx_cfg.u64); in __cvmx_helper_xaui_enable()
[all …]
Dcvmx-spi.c208 cvmx_write_csr(CVMX_SPXX_INT_MSK(interface), 0); in cvmx_spi_reset_cb()
210 cvmx_write_csr(CVMX_STXX_INT_MSK(interface), 0); in cvmx_spi_reset_cb()
213 cvmx_write_csr(CVMX_SRXX_COM_CTL(interface), 0); in cvmx_spi_reset_cb()
214 cvmx_write_csr(CVMX_STXX_COM_CTL(interface), 0); in cvmx_spi_reset_cb()
217 cvmx_write_csr(CVMX_SPXX_CLK_CTL(interface), spxx_clk_ctl.u64); in cvmx_spi_reset_cb()
238 cvmx_write_csr(CVMX_SRXX_SPI4_CALX(index, interface), in cvmx_spi_reset_cb()
243 cvmx_write_csr(CVMX_STXX_SPI4_CALX(index, interface), in cvmx_spi_reset_cb()
248 cvmx_write_csr(CVMX_SPXX_INT_REG(interface), in cvmx_spi_reset_cb()
250 cvmx_write_csr(CVMX_SPXX_INT_MSK(interface), spxx_int_msk.u64); in cvmx_spi_reset_cb()
251 cvmx_write_csr(CVMX_STXX_INT_REG(interface), in cvmx_spi_reset_cb()
[all …]
Dcvmx-helper-sgmii.c66 cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), gmxx_prtx_cfg.u64); in __cvmx_helper_sgmii_hardware_init_one_time()
86 cvmx_write_csr(CVMX_PCSX_LINKX_TIMER_COUNT_REG(index, interface), in __cvmx_helper_sgmii_hardware_init_one_time()
107 cvmx_write_csr(CVMX_PCSX_ANX_ADV_REG(index, interface), in __cvmx_helper_sgmii_hardware_init_one_time()
122 cvmx_write_csr(CVMX_PCSX_SGMX_AN_ADV_REG in __cvmx_helper_sgmii_hardware_init_one_time()
157 cvmx_write_csr(CVMX_PCSX_MRX_CONTROL_REG(index, interface), in __cvmx_helper_sgmii_hardware_init_link()
176 cvmx_write_csr(CVMX_PCSX_MRX_CONTROL_REG(index, interface), in __cvmx_helper_sgmii_hardware_init_link()
218 cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), gmxx_prtx_cfg.u64); in __cvmx_helper_sgmii_hardware_init_link_speed()
261 cvmx_write_csr(CVMX_GMXX_TXX_SLOT(index, interface), 64); in __cvmx_helper_sgmii_hardware_init_link_speed()
262 cvmx_write_csr(CVMX_GMXX_TXX_BURST(index, interface), 0); in __cvmx_helper_sgmii_hardware_init_link_speed()
269 cvmx_write_csr(CVMX_GMXX_TXX_SLOT(index, interface), 64); in __cvmx_helper_sgmii_hardware_init_link_speed()
[all …]
Dcvmx-pko.c107 cvmx_write_csr(CVMX_PKO_MEM_IQUEUE_PTRS, config.u64); in __cvmx_pko_iport_config()
133 cvmx_write_csr(CVMX_PKO_MEM_IPORT_PTRS, config.u64); in __cvmx_pko_port_map_o68()
154 cvmx_write_csr(CVMX_PKO_MEM_IPORT_PTRS, config.u64); in __cvmx_pko_port_map_o68()
198 cvmx_write_csr(CVMX_PKO_REG_CMD_BUF, config.u64); in cvmx_pko_initialize_global()
220 cvmx_write_csr(CVMX_PKO_REG_QUEUE_MODE, 2); in cvmx_pko_initialize_global()
222 cvmx_write_csr(CVMX_PKO_REG_QUEUE_MODE, 1); in cvmx_pko_initialize_global()
225 cvmx_write_csr(CVMX_PKO_REG_QUEUE_MODE, 2); in cvmx_pko_initialize_global()
227 cvmx_write_csr(CVMX_PKO_REG_QUEUE_MODE, 1); in cvmx_pko_initialize_global()
266 cvmx_write_csr(CVMX_PKO_REG_FLAGS, flags.u64); in cvmx_pko_enable()
277 cvmx_write_csr(CVMX_PKO_REG_FLAGS, pko_reg_flags.u64); in cvmx_pko_disable()
[all …]
Dcvmx-interrupt-decodes.c54 cvmx_write_csr(CVMX_GMXX_RXX_INT_REG(index, block), in __cvmx_interrupt_gmxx_rxx_int_en_enable()
227 cvmx_write_csr(CVMX_GMXX_RXX_INT_EN(index, block), gmx_rx_int_en.u64); in __cvmx_interrupt_gmxx_rxx_int_en_enable()
235 cvmx_write_csr(CVMX_PCSX_INTX_REG(index, block), in __cvmx_interrupt_pcsx_intx_en_reg_enable()
268 cvmx_write_csr(CVMX_PCSX_INTX_EN_REG(index, block), pcs_int_en_reg.u64); in __cvmx_interrupt_pcsx_intx_en_reg_enable()
276 cvmx_write_csr(CVMX_PCSXX_INT_REG(index), in __cvmx_interrupt_pcsxx_int_en_reg_enable()
297 cvmx_write_csr(CVMX_PCSXX_INT_EN_REG(index), pcsx_int_en_reg.u64); in __cvmx_interrupt_pcsxx_int_en_reg_enable()
306 cvmx_write_csr(CVMX_SPXX_INT_REG(index), in __cvmx_interrupt_spxx_int_msk_enable()
337 cvmx_write_csr(CVMX_SPXX_INT_MSK(index), spx_int_msk.u64); in __cvmx_interrupt_spxx_int_msk_enable()
345 cvmx_write_csr(CVMX_STXX_INT_REG(index), in __cvmx_interrupt_stxx_int_msk_enable()
370 cvmx_write_csr(CVMX_STXX_INT_MSK(index), stx_int_msk.u64); in __cvmx_interrupt_stxx_int_msk_enable()
Dcvmx-helper-util.c193 cvmx_write_csr(CVMX_IPD_QOSX_RED_MARKS(queue), red_marks.u64); in cvmx_helper_setup_red_queue()
202 cvmx_write_csr(CVMX_IPD_RED_QUEX_PARAM(queue), red_param.u64); in cvmx_helper_setup_red_queue()
233 cvmx_write_csr(CVMX_IPD_PORTX_BP_PAGE_CNT(port), in cvmx_helper_setup_red()
244 cvmx_write_csr(CVMX_IPD_BP_PRT_RED_END, ipd_bp_prt_red_end.u64); in cvmx_helper_setup_red()
250 cvmx_write_csr(CVMX_IPD_RED_PORT_ENABLE, red_port_enable.u64); in cvmx_helper_setup_red()
277 cvmx_write_csr(CVMX_GMXX_TX_PRTS(interface), gmx_tx_prts.u64); in __cvmx_helper_setup_gmx()
297 cvmx_write_csr(CVMX_GMXX_RX_PRTS(interface), gmx_rx_prts.u64); in __cvmx_helper_setup_gmx()
328 cvmx_write_csr(CVMX_PKO_REG_GMX_PORT_MODE, pko_mode.u64); in __cvmx_helper_setup_gmx()
359 cvmx_write_csr(CVMX_GMXX_TXX_THRESH(index, interface), in __cvmx_helper_setup_gmx()
Dcvmx-helper.c660 cvmx_write_csr(CVMX_IOB_FAU_TIMEOUT, fau_to.u64); in __cvmx_helper_global_setup_pko()
673 cvmx_write_csr(CVMX_PKO_REG_MIN_PKT, min_pkt.u64); in __cvmx_helper_global_setup_pko()
825 cvmx_write_csr(CVMX_ASXX_RX_PRT_EN(INTERFACE(FIX_IPD_OUTPORT)), 0); in __cvmx_helper_errata_fix_ipd_ptr_alignment()
847 cvmx_write_csr(CVMX_ASXX_PRT_LOOP(INTERFACE(FIX_IPD_OUTPORT)), in __cvmx_helper_errata_fix_ipd_ptr_alignment()
905 cvmx_write_csr(CVMX_GMXX_PRTX_CFG in __cvmx_helper_errata_fix_ipd_ptr_alignment()
908 cvmx_write_csr(CVMX_ASXX_TX_PRT_EN(INTERFACE(FIX_IPD_OUTPORT)), in __cvmx_helper_errata_fix_ipd_ptr_alignment()
910 cvmx_write_csr(CVMX_ASXX_RX_PRT_EN(INTERFACE(FIX_IPD_OUTPORT)), in __cvmx_helper_errata_fix_ipd_ptr_alignment()
913 cvmx_write_csr(CVMX_GMXX_RXX_JABBER in __cvmx_helper_errata_fix_ipd_ptr_alignment()
916 cvmx_write_csr(CVMX_GMXX_RXX_FRM_MAX in __cvmx_helper_errata_fix_ipd_ptr_alignment()
948 cvmx_write_csr(CVMX_GMXX_PRTX_CFG in __cvmx_helper_errata_fix_ipd_ptr_alignment()
[all …]
Dcvmx-helper-board.c687 cvmx_write_csr(CVMX_ASXX_TX_CLK_SETX(1, interface), 0); in __cvmx_helper_board_hardware_enable()
688 cvmx_write_csr(CVMX_ASXX_RX_CLK_SETX(1, interface), 0); in __cvmx_helper_board_hardware_enable()
694 cvmx_write_csr(CVMX_ASXX_TX_CLK_SETX(0, interface), in __cvmx_helper_board_hardware_enable()
696 cvmx_write_csr(CVMX_ASXX_RX_CLK_SETX(0, interface), in __cvmx_helper_board_hardware_enable()
734 cvmx_write_csr(CVMX_ASXX_RX_CLK_SETX in __cvmx_helper_board_hardware_enable()
736 cvmx_write_csr(CVMX_ASXX_TX_CLK_SETX in __cvmx_helper_board_hardware_enable()
743 cvmx_write_csr(CVMX_ASXX_RX_CLK_SETX(0, interface), 0); in __cvmx_helper_board_hardware_enable()
744 cvmx_write_csr(CVMX_ASXX_TX_CLK_SETX(0, interface), 0x10); in __cvmx_helper_board_hardware_enable()
745 cvmx_write_csr(CVMX_ASXX_RX_CLK_SETX(1, interface), 0); in __cvmx_helper_board_hardware_enable()
746 cvmx_write_csr(CVMX_ASXX_TX_CLK_SETX(1, interface), 0x10); in __cvmx_helper_board_hardware_enable()
[all …]
Dcvmx-l2c.c102 cvmx_write_csr(CVMX_L2C_WPAR_PPX(core), mask); in cvmx_l2c_set_core_way_partition()
119 cvmx_write_csr(CVMX_L2C_SPAR0, in cvmx_l2c_set_core_way_partition()
124 cvmx_write_csr(CVMX_L2C_SPAR1, in cvmx_l2c_set_core_way_partition()
129 cvmx_write_csr(CVMX_L2C_SPAR2, in cvmx_l2c_set_core_way_partition()
134 cvmx_write_csr(CVMX_L2C_SPAR3, in cvmx_l2c_set_core_way_partition()
154 cvmx_write_csr(CVMX_L2C_WPAR_IOBX(0), mask); in cvmx_l2c_set_hw_way_partition()
156 cvmx_write_csr(CVMX_L2C_SPAR4, in cvmx_l2c_set_hw_way_partition()
201 cvmx_write_csr(CVMX_L2C_PFCTL, pfctl.u64); in cvmx_l2c_config_perf()
228 cvmx_write_csr(CVMX_L2C_TADX_PRF(tad), in cvmx_l2c_config_perf()
361 cvmx_write_csr(CVMX_L2T_ERR, l2t_err.u64); in cvmx_l2c_lock_line()
[all …]
Dcvmx-helper-jtag.c69 cvmx_write_csr(CVMX_CIU_QLM_JTGC, jtgc.u64); in cvmx_helper_qlm_jtag_init()
96 cvmx_write_csr(CVMX_CIU_QLM_JTGD, jtgd.u64); in cvmx_helper_qlm_jtag_shift()
140 cvmx_write_csr(CVMX_CIU_QLM_JTGD, jtgd.u64); in cvmx_helper_qlm_jtag_update()
Dcvmx-helper-loop.c62 cvmx_write_csr(CVMX_PIP_PRT_CFGX(ipd_port), port_cfg.u64); in __cvmx_helper_loop_probe()
68 cvmx_write_csr(CVMX_IPD_SUB_PORT_FCS, ipd_sub_port_fcs.u64); in __cvmx_helper_loop_probe()
Dcvmx-interrupt-rsl.c69 cvmx_write_csr(CVMX_ASXX_INT_EN(block), csr.u64); in __cvmx_interrupt_asxx_enable()
137 cvmx_write_csr(CVMX_GMXX_TX_INT_EN(interface), gmx_tx_int_en.u64); in __cvmx_interrupt_gmxx_enable()
Dcvmx-helper-spi.c91 cvmx_write_csr(CVMX_PKO_REG_CRC_ENABLE, enable.u64); in __cvmx_helper_spi_probe()
120 cvmx_write_csr(CVMX_PIP_PRT_CFGX(ipd_port), port_config.u64); in __cvmx_helper_spi_enable()
Dcvmx-helper-npi.c106 cvmx_write_csr(CVMX_PIP_PRT_CFGX(ipd_port), in __cvmx_helper_npi_enable()
Dcvmx-cmd-queue.c261 cvmx_write_csr(CVMX_PKO_REG_READ_IDX, queue_id & 0xffff); in cvmx_cmd_queue_length()
Docteon-model.c46 cvmx_write_csr(CVMX_MIO_FUS_RCMD, read_cmd.u64); in cvmx_fuse_read_byte()
/linux-4.4.14/arch/mips/include/asm/octeon/
Dcvmx-ipd.h94 cvmx_write_csr(CVMX_IPD_1ST_MBUFF_SKIP, first_skip.u64); in cvmx_ipd_config()
98 cvmx_write_csr(CVMX_IPD_NOT_1ST_MBUFF_SKIP, not_first_skip.u64); in cvmx_ipd_config()
102 cvmx_write_csr(CVMX_IPD_PACKET_MBUFF_SIZE, size.u64); in cvmx_ipd_config()
106 cvmx_write_csr(CVMX_IPD_1st_NEXT_PTR_BACK, first_back_struct.u64); in cvmx_ipd_config()
110 cvmx_write_csr(CVMX_IPD_2nd_NEXT_PTR_BACK, second_back_struct.u64); in cvmx_ipd_config()
114 cvmx_write_csr(CVMX_IPD_WQE_FPA_QUEUE, wqe_pool.u64); in cvmx_ipd_config()
119 cvmx_write_csr(CVMX_IPD_CTL_STATUS, ipd_ctl_reg.u64); in cvmx_ipd_config()
141 cvmx_write_csr(CVMX_IPD_CTL_STATUS, ipd_reg.u64); in cvmx_ipd_enable()
152 cvmx_write_csr(CVMX_IPD_CTL_STATUS, ipd_reg.u64); in cvmx_ipd_disable()
203 cvmx_write_csr(CVMX_IPD_PWP_PTR_FIFO_CTL, in cvmx_ipd_free_ptr()
[all …]
Dcvmx-mdio.h276 cvmx_write_csr(CVMX_SMIX_CLK(bus_id), smi_clk.u64); in __cvmx_mdio_set_clause45_mode()
286 cvmx_write_csr(CVMX_SMIX_CLK(bus_id), smi_clk.u64); in __cvmx_mdio_set_clause22_mode()
313 cvmx_write_csr(CVMX_SMIX_CMD(bus_id), smi_cmd.u64); in cvmx_mdio_read()
350 cvmx_write_csr(CVMX_SMIX_WR_DAT(bus_id), smi_wr.u64); in cvmx_mdio_write()
356 cvmx_write_csr(CVMX_SMIX_CMD(bus_id), smi_cmd.u64); in cvmx_mdio_write()
396 cvmx_write_csr(CVMX_SMIX_WR_DAT(bus_id), smi_wr.u64); in cvmx_mdio_45_read()
402 cvmx_write_csr(CVMX_SMIX_CMD(bus_id), smi_cmd.u64); in cvmx_mdio_45_read()
419 cvmx_write_csr(CVMX_SMIX_CMD(bus_id), smi_cmd.u64); in cvmx_mdio_45_read()
471 cvmx_write_csr(CVMX_SMIX_WR_DAT(bus_id), smi_wr.u64); in cvmx_mdio_45_write()
477 cvmx_write_csr(CVMX_SMIX_CMD(bus_id), smi_cmd.u64); in cvmx_mdio_45_write()
[all …]
Dcvmx-pip.h296 cvmx_write_csr(CVMX_PIP_PRT_CFGX(port_num), port_cfg.u64); in cvmx_pip_config_port()
297 cvmx_write_csr(CVMX_PIP_PRT_TAGX(port_num), port_tag_cfg.u64); in cvmx_pip_config_port()
327 cvmx_write_csr(CVMX_PIP_QOS_WATCHX(watcher), watcher_config.u64);
343 cvmx_write_csr(CVMX_PIP_QOS_VLANX(vlan_priority), pip_qos_vlanx.u64); in cvmx_pip_config_vlan_qos()
357 cvmx_write_csr(CVMX_PIP_QOS_DIFFX(diffserv), pip_qos_diffx.u64); in cvmx_pip_config_diffserv_qos()
387 cvmx_write_csr(CVMX_PIP_STAT_CTL, pip_stat_ctl.u64); in cvmx_pip_get_port_status()
470 cvmx_write_csr(CVMX_PIP_CRC_CTLX(interface), config.u64); in cvmx_pip_config_crc()
474 cvmx_write_csr(CVMX_PIP_CRC_IVX(interface), pip_crc_ivx.u64); in cvmx_pip_config_crc()
493 cvmx_write_csr(CVMX_PIP_TAG_INCX(index), pip_tag_incx.u64); in cvmx_pip_tag_mask_clear()
519 cvmx_write_csr(CVMX_PIP_TAG_INCX(index), pip_tag_incx.u64); in cvmx_pip_tag_mask_set()
Dcvmx-pko.h587 cvmx_write_csr(CVMX_PKO_REG_READ_IDX, pko_reg_read_idx.u64); in cvmx_pko_get_port_status()
593 cvmx_write_csr(CVMX_PKO_MEM_COUNT0, pko_mem_count0.u64); in cvmx_pko_get_port_status()
600 cvmx_write_csr(CVMX_PKO_MEM_COUNT1, pko_mem_count1.u64); in cvmx_pko_get_port_status()
606 cvmx_write_csr(CVMX_PKO_REG_READ_IDX, pko_reg_read_idx.u64); in cvmx_pko_get_port_status()
612 cvmx_write_csr(CVMX_PKO_REG_READ_IDX, pko_reg_read_idx.u64); in cvmx_pko_get_port_status()
Dcvmx-fpa.h163 cvmx_write_csr(CVMX_FPA_FPF1_MARKS + (i - 1) * 8ull, in cvmx_fpa_enable()
174 cvmx_write_csr(CVMX_FPA_CTL_STATUS, status.u64); in cvmx_fpa_enable()
Dcvmx.h264 static inline void cvmx_write_csr(uint64_t csr_addr, uint64_t val) in cvmx_write_csr() function
Dcvmx-pow.h1857 cvmx_write_csr(CVMX_POW_PP_GRP_MSKX(core_num), grp_msk.u64); in cvmx_pow_set_group_mask()
1907 cvmx_write_csr(CVMX_POW_PP_GRP_MSKX(core_num), grp_msk.u64); in cvmx_pow_set_priority()
/linux-4.4.14/drivers/watchdog/
Docteon-wdt-main.c258 cvmx_write_csr(CVMX_CIU_PP_POKEX(core), 1); in octeon_wdt_poke_irq()
267 cvmx_write_csr(CVMX_CIU_PP_POKEX(core), 1); in octeon_wdt_poke_irq()
388 cvmx_write_csr(CVMX_CIU_PP_POKEX(core), 1); in octeon_wdt_disable_interrupt()
392 cvmx_write_csr(CVMX_CIU_WDOGX(core), ciu_wdog.u64); in octeon_wdt_disable_interrupt()
407 cvmx_write_csr(CVMX_CIU_WDOGX(core), ciu_wdog.u64); in octeon_wdt_setup_interrupt()
420 cvmx_write_csr(CVMX_CIU_PP_POKEX(core), 1); in octeon_wdt_setup_interrupt()
426 cvmx_write_csr(CVMX_CIU_WDOGX(core), ciu_wdog.u64); in octeon_wdt_setup_interrupt()
455 cvmx_write_csr(CVMX_CIU_PP_POKEX(coreid), 1); in octeon_wdt_ping()
509 cvmx_write_csr(CVMX_CIU_PP_POKEX(coreid), 1); in octeon_wdt_set_timeout()
513 cvmx_write_csr(CVMX_CIU_WDOGX(coreid), ciu_wdog.u64); in octeon_wdt_set_timeout()
[all …]
/linux-4.4.14/arch/mips/cavium-octeon/
Docteon-irq.c275 cvmx_write_csr(CVMX_CIU_INTX_EN0(coreid * 2), *pen); in octeon_irq_ciu_enable()
284 cvmx_write_csr(CVMX_CIU_INTX_EN1(coreid * 2 + 1), *pen); in octeon_irq_ciu_enable()
307 cvmx_write_csr(CVMX_CIU_INTX_EN0(cvmx_get_core_num() * 2), *pen); in octeon_irq_ciu_enable_local()
316 cvmx_write_csr(CVMX_CIU_INTX_EN1(cvmx_get_core_num() * 2 + 1), *pen); in octeon_irq_ciu_enable_local()
339 cvmx_write_csr(CVMX_CIU_INTX_EN0(cvmx_get_core_num() * 2), *pen); in octeon_irq_ciu_disable_local()
348 cvmx_write_csr(CVMX_CIU_INTX_EN1(cvmx_get_core_num() * 2 + 1), *pen); in octeon_irq_ciu_disable_local()
379 cvmx_write_csr(CVMX_CIU_INTX_EN0(coreid * 2), *pen); in octeon_irq_ciu_disable_all()
381 cvmx_write_csr(CVMX_CIU_INTX_EN1(coreid * 2 + 1), *pen); in octeon_irq_ciu_disable_all()
412 cvmx_write_csr(CVMX_CIU_INTX_EN0(coreid * 2), *pen); in octeon_irq_ciu_enable_all()
414 cvmx_write_csr(CVMX_CIU_INTX_EN1(coreid * 2 + 1), *pen); in octeon_irq_ciu_enable_all()
[all …]
Dsetup.c191 cvmx_write_csr(CVMX_CIU_WDOGX(cpu_logical_map(cpu)), 0); in octeon_generic_shutdown()
193 cvmx_write_csr(CVMX_CIU_WDOGX(cvmx_get_core_num()), 0); in octeon_generic_shutdown()
412 cvmx_write_csr(CVMX_CIU_WDOGX(cpu_logical_map(cpu)), 0); in octeon_restart()
414 cvmx_write_csr(CVMX_CIU_WDOGX(cvmx_get_core_num()), 0); in octeon_restart()
420 cvmx_write_csr(CVMX_RST_SOFT_RST, 1); in octeon_restart()
422 cvmx_write_csr(CVMX_CIU_SOFT_RST, 1); in octeon_restart()
439 cvmx_write_csr(CVMX_CIU_WDOGX(cvmx_get_core_num()), 0); in octeon_kill_core()
456 cvmx_write_csr(CVMX_GPIO_BIT_CFGX(12), 1); in octeon_halt()
457 cvmx_write_csr(CVMX_GPIO_TX_SET, 0x1000); in octeon_halt()
603 cvmx_write_csr(CVMX_IOB_FAU_TIMEOUT, fau_timeout.u64); in octeon_user_io_init()
[all …]
Dsmp.c42 cvmx_write_csr(CVMX_CIU_MBOX_CLRX(coreid), action); in mailbox_interrupt()
67 cvmx_write_csr(CVMX_CIU_MBOX_SETX(coreid), action); in octeon_send_ipi_single()
205 cvmx_write_csr(CVMX_CIU_MBOX_CLRX(cvmx_get_core_num()), 0xffff); in octeon_prepare_cpus()
285 cvmx_write_csr(CVMX_CIU_PP_RST, 1 << coreid); in octeon_cpu_die()
286 cvmx_write_csr(CVMX_CIU_PP_RST, 0); in octeon_cpu_die()
335 cvmx_write_csr(CVMX_CIU_PP_RST, 1 << coreid); in octeon_update_boot_vector()
336 cvmx_write_csr(CVMX_CIU_PP_RST, 0); in octeon_update_boot_vector()
345 cvmx_write_csr(CVMX_CIU_NMI, (1 << coreid) & avail_coremask); in octeon_update_boot_vector()
Docteon-platform.c131 cvmx_write_csr(CVMX_UCTLX_IF_ENA(0), if_ena.u64); in octeon2_usb_clocks_start()
150 cvmx_write_csr(CVMX_UCTLX_CLK_RST_CTL(0), clk_rst_ctl.u64); in octeon2_usb_clocks_start()
169 cvmx_write_csr(CVMX_UCTLX_CLK_RST_CTL(0), clk_rst_ctl.u64); in octeon2_usb_clocks_start()
201 cvmx_write_csr(CVMX_UCTLX_CLK_RST_CTL(0), clk_rst_ctl.u64); in octeon2_usb_clocks_start()
205 cvmx_write_csr(CVMX_UCTLX_CLK_RST_CTL(0), clk_rst_ctl.u64); in octeon2_usb_clocks_start()
208 cvmx_write_csr(CVMX_UCTLX_CLK_RST_CTL(0), clk_rst_ctl.u64); in octeon2_usb_clocks_start()
218 cvmx_write_csr(CVMX_UCTLX_CLK_RST_CTL(0), clk_rst_ctl.u64); in octeon2_usb_clocks_start()
229 cvmx_write_csr(CVMX_UCTLX_UPHY_CTL_STATUS(0), uphy_ctl_status.u64); in octeon2_usb_clocks_start()
236 cvmx_write_csr(CVMX_UCTLX_UPHY_CTL_STATUS(0), uphy_ctl_status.u64); in octeon2_usb_clocks_start()
247 cvmx_write_csr(CVMX_UCTLX_CLK_RST_CTL(0), clk_rst_ctl.u64); in octeon2_usb_clocks_start()
[all …]
Doct_ilm.c126 cvmx_write_csr(CVMX_CIU_TIMX(timer), timx.u64); in start_timer()
162 cvmx_write_csr(CVMX_CIU_TIMX(timer), timx.u64); in disable_timer()
/linux-4.4.14/arch/mips/pci/
Dpcie-octeon.c180 cvmx_write_csr(CVMX_PESCX_CFG_RD(pcie_port), pescx_cfg_rd.u64); in cvmx_pcie_cfgx_read()
187 cvmx_write_csr(CVMX_PEMX_CFG_RD(pcie_port), pemx_cfg_rd.u64); in cvmx_pcie_cfgx_read()
209 cvmx_write_csr(CVMX_PESCX_CFG_WR(pcie_port), pescx_cfg_wr.u64); in cvmx_pcie_cfgx_write()
215 cvmx_write_csr(CVMX_PEMX_CFG_WR(pcie_port), pemx_cfg_wr.u64); in cvmx_pcie_cfgx_write()
448 cvmx_write_csr(CVMX_PEXP_NPEI_CTL_STATUS2, npei_ctl_status2.u64); in __cvmx_pcie_rc_initialize_config_space()
463 cvmx_write_csr(CVMX_DPI_SLI_PRTX_CFG(pcie_port), prt_cfg.u64); in __cvmx_pcie_rc_initialize_config_space()
467 cvmx_write_csr(CVMX_PEXP_SLI_S2M_PORTX_CTL(pcie_port), sli_s2m_portx_ctl.u64); in __cvmx_pcie_rc_initialize_config_space()
620 cvmx_write_csr(CVMX_PESCX_CTL_STATUS(pcie_port), pescx_ctl_status.u64); in __cvmx_pcie_rc_initialize_link_gen1()
626 cvmx_write_csr(CVMX_PESCX_CTL_STATUS(pcie_port), pescx_ctl_status.u64); in __cvmx_pcie_rc_initialize_link_gen1()
647 cvmx_write_csr(CVMX_PEXP_NPEI_INT_SUM, cvmx_read_csr(CVMX_PEXP_NPEI_INT_SUM)); in __cvmx_pcie_rc_initialize_link_gen1()
[all …]
Dpci-octeon.c372 cvmx_write_csr(CVMX_CIU_SOFT_PRST, 0x1); in octeon_pci_initialize()
380 cvmx_write_csr(CVMX_NPI_CTL_STATUS, ctl_status.u64); in octeon_pci_initialize()
384 cvmx_write_csr(CVMX_CIU_SOFT_PRST, 0x4); in octeon_pci_initialize()
501 cvmx_write_csr(CVMX_NPI_PCI_INT_ARB_CFG, pci_int_arb_cfg.u64); in octeon_pci_initialize()
609 cvmx_write_csr(CVMX_NPI_MEM_ACCESS_SUBID3, mem_access.u64); in octeon_pci_setup()
703 cvmx_write_csr(CVMX_NPI_PCI_INT_SUM2, -1); in octeon_pci_setup()
Dmsi-octeon.c278 cvmx_write_csr(mis_ena_reg[irq_index], en); in octeon_irq_msi_enable_pcie()
294 cvmx_write_csr(mis_ena_reg[irq_index], en); in octeon_irq_msi_disable_pcie()
340 cvmx_write_csr(msi_rcv_reg[index], 1ull << bit); in __octeon_msi_do_interrupt()
/linux-4.4.14/drivers/net/ethernet/octeon/
Docteon_mgmt.c167 cvmx_write_csr(p->mix + MIX_INTENA, mix_intena.u64); in octeon_mgmt_set_rx_irq()
179 cvmx_write_csr(p->mix + MIX_INTENA, mix_intena.u64); in octeon_mgmt_set_tx_irq()
246 cvmx_write_csr(p->mix + MIX_IRING2, 1); in octeon_mgmt_rx_fill_ring()
282 cvmx_write_csr(p->mix + MIX_ORCNT, mix_orcnt.u64); in octeon_mgmt_clean_tx_buffers()
299 cvmx_write_csr(CVMX_MIXX_TSCTL(p->port), 0); in octeon_mgmt_clean_tx_buffers()
469 cvmx_write_csr(p->mix + MIX_IRCNT, mix_ircnt.u64); in octeon_mgmt_receive_one()
521 cvmx_write_csr(p->mix + MIX_CTL, mix_ctl.u64); in octeon_mgmt_reset_hw()
526 cvmx_write_csr(p->mix + MIX_CTL, mix_ctl.u64); in octeon_mgmt_reset_hw()
608 cvmx_write_csr(p->agl + AGL_GMX_PRT_CFG, agl_gmx_prtx.u64); in octeon_mgmt_set_rx_filtering()
615 cvmx_write_csr(p->agl + AGL_GMX_RX_ADR_CTL, adr_ctl.u64); in octeon_mgmt_set_rx_filtering()
[all …]
/linux-4.4.14/drivers/staging/octeon/
Dethernet.c164 cvmx_write_csr(CVMX_IPD_CTL_STATUS, ipd_ctl_status.u64); in cvm_oct_configure_common_hw()
285 cvmx_write_csr(CVMX_GMXX_RXX_FRM_MAX(index, interface), in cvm_oct_common_change_mtu()
297 cvmx_write_csr(CVMX_PIP_FRM_LEN_CHKX(interface), in cvm_oct_common_change_mtu()
305 cvmx_write_csr(CVMX_GMXX_RXX_JABBER(index, interface), in cvm_oct_common_change_mtu()
350 cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), in cvm_oct_common_set_multicast_list()
353 cvmx_write_csr(CVMX_GMXX_RXX_ADR_CTL(index, interface), in cvm_oct_common_set_multicast_list()
356 cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM_EN in cvm_oct_common_set_multicast_list()
359 cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM_EN in cvm_oct_common_set_multicast_list()
362 cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), in cvm_oct_common_set_multicast_list()
386 cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), in cvm_oct_set_mac_filter()
[all …]
Dethernet-spi.c97 cvmx_write_csr(CVMX_SPXX_INT_REG(index), spx_int_reg.u64); in cvm_oct_spi_spx_int()
104 cvmx_write_csr(CVMX_STXX_INT_REG(index), stx_int_reg.u64); in cvm_oct_spi_spx_int()
110 cvmx_write_csr(CVMX_SPXX_INT_MSK(index), 0); in cvm_oct_spi_spx_int()
111 cvmx_write_csr(CVMX_STXX_INT_MSK(index), 0); in cvm_oct_spi_spx_int()
149 cvmx_write_csr(CVMX_SPXX_INT_MSK(interface), spxx_int_msk.u64); in cvm_oct_spi_enable_error_reporting()
160 cvmx_write_csr(CVMX_STXX_INT_MSK(interface), stxx_int_msk.u64); in cvm_oct_spi_enable_error_reporting()
234 cvmx_write_csr(CVMX_SPXX_INT_MSK(interface), 0); in cvm_oct_spi_uninit()
235 cvmx_write_csr(CVMX_STXX_INT_MSK(interface), 0); in cvm_oct_spi_uninit()
Dethernet-rx.c186 cvmx_write_csr(CVMX_SSO_PPX_GRP_MSK(coreid), in cvm_oct_napi_poll()
191 cvmx_write_csr(CVMX_POW_PP_GRP_MSKX(coreid), in cvm_oct_napi_poll()
216 cvmx_write_csr(CVMX_SSO_WQ_IQ_DIS, in cvm_oct_napi_poll()
218 cvmx_write_csr(CVMX_SSO_WQ_INT, in cvm_oct_napi_poll()
226 cvmx_write_csr(CVMX_POW_WQ_INT, wq_int.u64); in cvm_oct_napi_poll()
424 cvmx_write_csr(CVMX_SSO_PPX_GRP_MSK(coreid), old_group_mask); in cvm_oct_napi_poll()
427 cvmx_write_csr(CVMX_POW_PP_GRP_MSKX(coreid), old_group_mask); in cvm_oct_napi_poll()
494 cvmx_write_csr(CVMX_SSO_WQ_INT_THRX(pow_receive_group), in cvm_oct_rx_initialize()
499 cvmx_write_csr(CVMX_SSO_WQ_INT_PC, int_pc.u64); in cvm_oct_rx_initialize()
507 cvmx_write_csr(CVMX_POW_WQ_INT_THRX(pow_receive_group), in cvm_oct_rx_initialize()
[all …]
Dethernet-rgmii.c47 cvmx_write_csr(CVMX_GMXX_RXX_FRM_CTL(index, interface), in cvm_oct_set_hw_preamble()
57 cvmx_write_csr(CVMX_IPD_SUB_PORT_FCS, ipd_sub_port_fcs.u64); in cvm_oct_set_hw_preamble()
62 cvmx_write_csr(CVMX_GMXX_RXX_INT_REG(index, interface), in cvm_oct_set_hw_preamble()
182 cvmx_write_csr(CVMX_GMXX_RXX_INT_REG(index, interface), in cmv_oct_rgmii_gmx_interrupt()
265 cvmx_write_csr(CVMX_GMXX_RXX_INT_EN(index, interface), in cvm_oct_rgmii_init()
303 cvmx_write_csr(CVMX_GMXX_RXX_INT_EN(index, interface), in cvm_oct_rgmii_uninit()
Dethernet-tx.c81 cvmx_write_csr(CVMX_CIU_TIMX(1), ciu_timx.u64); in cvm_oct_kick_tx_poll_watchdog()
725 cvmx_write_csr(CVMX_CIU_TIMX(1), 0); in cvm_oct_tx_cleanup_watchdog()
736 cvmx_write_csr(CVMX_CIU_TIMX(1), 0); in cvm_oct_tx_initialize()
Dethernet-mdio.c143 cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), gmx_cfg.u64); in cvm_oct_common_stop()
/linux-4.4.14/drivers/edac/
Docteon_edac-l2c.c42 cvmx_write_csr(CVMX_L2T_ERR, l2t_err_reset.u64); in octeon_l2c_poll_oct1()
57 cvmx_write_csr(CVMX_L2D_ERR, l2d_err_reset.u64); in octeon_l2c_poll_oct1()
101 cvmx_write_csr(CVMX_L2C_ERR_TDTX(tad), err_tdtx_reset.u64); in _octeon_l2c_poll_oct2()
124 cvmx_write_csr(CVMX_L2C_ERR_TTGX(tad), err_ttgx_reset.u64); in _octeon_l2c_poll_oct2()
161 cvmx_write_csr(CVMX_L2T_ERR, l2t_err.u64); in octeon_l2c_probe()
166 cvmx_write_csr(CVMX_L2T_ERR, l2d_err.u64); in octeon_l2c_probe()
Docteon_edac-lmc.c69 cvmx_write_csr(CVMX_LMCX_MEM_CFG0(mci->mc_idx), cfg0.u64); in octeon_lmc_edac_poll()
121 cvmx_write_csr(CVMX_LMCX_INT(mci->mc_idx), int_reg.u64); in octeon_lmc_edac_poll_o2()
266 cvmx_write_csr(CVMX_LMCX_MEM_CFG0(mc), cfg0.u64); in octeon_lmc_edac_probe()
298 cvmx_write_csr(CVMX_LMCX_MEM_CFG0(mc), en.u64); in octeon_lmc_edac_probe()
/linux-4.4.14/drivers/spi/
Dspi-octeon.c88 cvmx_write_csr(p->register_base + OCTEON_SPI_CFG, mpi_cfg.u64); in octeon_spi_do_transfer()
100 cvmx_write_csr(p->register_base + OCTEON_SPI_DAT0 + (8 * i), d); in octeon_spi_do_transfer()
107 cvmx_write_csr(p->register_base + OCTEON_SPI_TX, mpi_tx.u64); in octeon_spi_do_transfer()
124 cvmx_write_csr(p->register_base + OCTEON_SPI_DAT0 + (8 * i), d); in octeon_spi_do_transfer()
135 cvmx_write_csr(p->register_base + OCTEON_SPI_TX, mpi_tx.u64); in octeon_spi_do_transfer()
236 cvmx_write_csr(register_base + OCTEON_SPI_CFG, 0); in octeon_spi_remove()
/linux-4.4.14/drivers/ata/
Dpata_octeon_cf.c118 cvmx_write_csr(CVMX_MIO_BOOT_REG_CFGX(cs), reg_cfg.u64); in octeon_cf_set_boot_reg_cfg()
216 cvmx_write_csr(CVMX_MIO_BOOT_REG_TIMX(cf_port->cs0), reg_tim.u64); in octeon_cf_set_piomode()
219 cvmx_write_csr(CVMX_MIO_BOOT_REG_TIMX(cf_port->cs1), in octeon_cf_set_piomode()
291 cvmx_write_csr(cf_port->dma_base + DMA_TIM, dma_tim.u64); in octeon_cf_set_dmamode()
586 cvmx_write_csr(cf_port->dma_base + DMA_INT, mio_boot_dma_int.u64); in octeon_cf_dma_start()
589 cvmx_write_csr(cf_port->dma_base + DMA_INT_EN, mio_boot_dma_int.u64); in octeon_cf_dma_start()
621 cvmx_write_csr(cf_port->dma_base + DMA_CFG, mio_boot_dma_cfg.u64); in octeon_cf_dma_start()
656 cvmx_write_csr(cf_port->dma_base + DMA_CFG, dma_cfg.u64); in octeon_cf_dma_finished()
660 cvmx_write_csr(cf_port->dma_base + DMA_INT_EN, dma_int.u64); in octeon_cf_dma_finished()
664 cvmx_write_csr(cf_port->dma_base + DMA_INT, dma_int.u64); in octeon_cf_dma_finished()
[all …]
/linux-4.4.14/drivers/gpio/
Dgpio-octeon.c46 cvmx_write_csr(gpio->register_base + bit_cfg_reg(offset), 0); in octeon_gpio_dir_in()
55 cvmx_write_csr(reg, mask); in octeon_gpio_set()
69 cvmx_write_csr(gpio->register_base + bit_cfg_reg(offset), cfgx.u64); in octeon_gpio_dir_out()
/linux-4.4.14/drivers/char/hw_random/
Docteon-rng.c36 cvmx_write_csr((u64)p->control_status, ctl.u64); in octeon_rng_init()
47 cvmx_write_csr((u64)p->control_status, ctl.u64); in octeon_rng_cleanup()
/linux-4.4.14/drivers/net/phy/
Dmdio-octeon.c122 cvmx_write_csr(addr, val); in oct_mdio_writeq()
/linux-4.4.14/drivers/staging/octeon-usb/
Docteon-hcd.c3667 cvmx_write_csr(CVMX_IOB_N2C_L2C_PRI_CNT, pri_cnt.u64); in octeon_usb_probe()