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/linux-4.4.14/Documentation/
Dlockup-watchdogs.txt66 By default, the watchdog runs on all online cores. However, on a
68 on the housekeeping cores, not the cores specified in the "nohz_full"
70 the "nohz_full" cores, we would have to run timer ticks to activate
72 from protecting the user code on those cores from the kernel.
73 Of course, disabling it by default on the nohz_full cores means that
74 when those cores do enter the kernel, by default we will not be
76 to continue to run on the housekeeping (non-tickless) cores means
77 that we will continue to detect lockups properly on those cores.
79 In either case, the set of cores excluded from running the watchdog
81 nohz_full cores, this may be useful for debugging a case where the
[all …]
Dpercpu-rw-semaphore.txt8 cores take the lock for reading, the cache line containing the semaphore
9 is bouncing between L1 caches of the cores, causing performance
Drpmsg.txt16 and each of the other three cores (two M3 cores and a DSP) is running
39 OMAP4, remote cores and hardware accelerators may have direct access to the
Dhwspinlock.txt73 soon as possible, in order to minimize remote cores polling on the
108 possible, in order to minimize remote cores polling on the hardware
Dremoteproc.txt11 configuration, and each of the other three cores (two M3 cores and a DSP)
Dxillybus.txt51 again, pre-designed building blocks, IP cores, are often used. These are the
52 FPGA parallels of library functions. IP cores may implement certain
Dworkqueue.txt41 wq users over the years and with the number of CPU cores continuously
Dkernel-parameters.txt2400 on "Classic" PPC cores.
/linux-4.4.14/Documentation/devicetree/bindings/media/xilinx/
Dvideo.txt1 DT bindings for Xilinx video IP cores
4 Xilinx video IP cores process video streams by acting as video sinks and/or
10 cores are represented as defined in ../video-interfaces.txt.
18 The following properties are common to all Xilinx video IP cores.
21 AXI bus between video IP cores, using its VF code as defined in "AXI4-Stream
Dxlnx,video.txt8 video IP cores. Each video IP core is represented as documented in video.txt
11 mappings between DMAs and the video IP cores.
/linux-4.4.14/Documentation/devicetree/bindings/bus/
Dbrcm,bus-axi.txt9 The cores on the AXI bus are automatically detected by bcma with the
12 BCM47xx/BCM53xx ARM SoCs. To assign IRQ numbers to the cores, provide
17 The top-level axi bus may contain children representing attached cores
19 detected (e.g. IRQ numbers). Also some of the cores may be responsible
/linux-4.4.14/arch/x86/mm/
Damdtopology.c79 unsigned int bits, cores, apicid_base; in amd_numa_init() local
181 cores = 1 << bits; in amd_numa_init()
192 for (j = apicid_base; j < cores + apicid_base; j++) in amd_numa_init()
/linux-4.4.14/drivers/bcma/
Dmain.c91 list_for_each_entry(core, &bus->cores, list) { in bcma_find_core_unit()
302 INIT_LIST_HEAD(&bus->cores); in bcma_init_bus()
327 list_for_each_entry(core, &bus->cores, list) { in bcma_register_devices()
395 list_for_each_entry_safe(core, tmp, &bus->cores, list) { in bcma_unregister_cores()
405 list_for_each_entry_safe(core, tmp, &bus->cores, list) { in bcma_unregister_cores()
444 list_for_each_entry(core, &bus->cores, list) { in bcma_bus_register()
569 list_for_each_entry(core, &bus->cores, list) { in bcma_bus_suspend()
590 list_for_each_entry(core, &bus->cores, list) { in bcma_bus_resume()
Ddriver_mips.c173 list_for_each_entry(core, &bus->cores, list) { in bcma_core_mips_set_irq()
219 list_for_each_entry(core, &bus->cores, list) { in bcma_core_mips_dump_irq()
427 list_for_each_entry(core, &bus->cores, list) { in bcma_core_mips_init()
Dscan.c254 list_for_each_entry(core, &bus->cores, list) { in bcma_find_core_by_index()
265 list_for_each_entry_reverse(core, &bus->cores, list) { in bcma_find_core_reverse()
516 list_add_tail(&core->list, &bus->cores); in bcma_bus_scan()
/linux-4.4.14/Documentation/ABI/testing/
Dsysfs-bus-bcma14 There are a few types of BCMA cores, they can be identified by
22 BCMA cores of the same type can still slightly differ depending
Dsysfs-devices-system-cpu79 to other cores and threads in the same physical package.
/linux-4.4.14/Documentation/fmc/
Dmezzanine.txt10 EEPROM (as mandated by the FMC standard) or by the actual cores
43 their EEPROM or on the actual FPGA cores that can be enumerated.
53 Matching on FPGA cores depends on two numeric fields: the 64-bit vendor
56 identified by an array of cores (it matches if all of the cores are
65 struct fmc_sdb_id { struct fmc_sdb_one_id *cores; int cores_nr; };
/linux-4.4.14/drivers/soc/qcom/
DKconfig18 QCOM Platform specific power driver to manage cores and L2 low power
19 modes. It interface with various system drivers to put the cores in
/linux-4.4.14/arch/arm/boot/dts/
Dvexpress-v2p-ca15_a7.dts334 /* Total current for the two A15 cores */
341 /* Total current for the three A7 cores */
355 /* Total power for the two A15 cores */
362 /* Total power for the three A7 cores */
369 /* Total energy for the two A15 cores */
376 /* Total energy for the three A7 cores */
Dsocfpga_arria5.dtsi18 /* First 4KB has trampoline code for secondary cores. */
Dsocfpga_cyclone5.dtsi19 /* First 4KB has trampoline code for secondary cores. */
Decx-2000.dts19 /* First 4KB has pen for secondary cores. */
Dhighbank.dts19 /* First 4KB has pen for secondary cores. */
Dvexpress-v2p-ca15-tc1.dts195 /* Total current for the two cores */
Dr8a7794.dtsi513 /* The memory map in the User's Manual maps the cores to bus numbers */
Dr8a7791.dtsi401 /* The memory map in the User's Manual maps the cores to bus numbers */
/linux-4.4.14/Documentation/devicetree/bindings/arc/
Daxs103.txt5 HS38x cores.
/linux-4.4.14/Documentation/devicetree/bindings/
Dxilinx.txt1 d) Xilinx IP cores
3 The Xilinx EDK toolchain ships with a set of IP cores (devices) for use
14 device drivers how the IP cores are configured, but it requires the kernel
20 properties of the device node. In general, device nodes for IP-cores
89 Some IP cores actually implement 2 or more logical devices. In
232 That covers the general approach to binding xilinx IP cores into the
/linux-4.4.14/Documentation/devicetree/bindings/arm/rockchip/
Dpmu.txt5 This includes the power to the CPU cores.
Dsmp-sram.txt5 of the cores. Once the core gets powered up it executes the code that is
/linux-4.4.14/arch/powerpc/kernel/
Dprom_init.c870 u32 cores; in prom_send_capabilities() local
888 cores = 0; in prom_send_capabilities()
889 cores |= ptcores[0] << 24; in prom_send_capabilities()
890 cores |= ptcores[1] << 16; in prom_send_capabilities()
891 cores |= ptcores[2] << 8; in prom_send_capabilities()
892 cores |= ptcores[3]; in prom_send_capabilities()
893 if (cores != NR_CPUS) { in prom_send_capabilities()
896 cores); in prom_send_capabilities()
898 cores = DIV_ROUND_UP(NR_CPUS, prom_count_smt_threads()); in prom_send_capabilities()
900 cores, NR_CPUS); in prom_send_capabilities()
[all …]
/linux-4.4.14/tools/power/x86/turbostat/
Dturbostat.c199 struct core_data cores; member
667 format_counters(&average.threads, &average.cores, in format_all_counters()
880 average.cores.c3 += c->c3; in sum_counters()
881 average.cores.c6 += c->c6; in sum_counters()
882 average.cores.c7 += c->c7; in sum_counters()
884 average.cores.core_temp_c = MAX(average.cores.core_temp_c, c->core_temp_c); in sum_counters()
926 clear_counters(&average.threads, &average.cores, &average.packages); in compute_average()
940 average.cores.c3 /= topo.num_cores; in compute_average()
941 average.cores.c6 /= topo.num_cores; in compute_average()
942 average.cores.c7 /= topo.num_cores; in compute_average()
[all …]
/linux-4.4.14/Documentation/devicetree/bindings/interrupt-controller/
Dsnps,archs-intc.txt1 * ARC-HS incore Interrupt Controller (Provided by cores implementing ARCv2 ISA)
Dsnps,archs-idu-intc.txt15 Second cell specifies the irq distribution mode to cores
Dti,keystone-irq.txt3 On Keystone SOCs, DSP cores can send interrupts to ARM
Darm,gic.txt3 ARM SMP cores are often associated with a GIC, providing per processor
91 For ARM cores that support the virtualization extensions, additional
Darm,gic-v3.txt3 AArch64 SMP cores are often associated with a GICv3, providing Private
/linux-4.4.14/arch/mn10300/mm/
Dcache.inc20 # On some cores it is necessary to disable the icache whilst we do this.
81 # On some cores it is necessary to disable the dcache whilst we do this.
/linux-4.4.14/Documentation/devicetree/bindings/c6x/
Dtimer64.txt17 - ti,core-mask: on multi-core SoCs, bitmask of cores allowed to use this timer.
/linux-4.4.14/arch/mips/include/asm/mach-cavium-octeon/
Dkernel-entry-init.h98 # All cores other than the master need to wait here for SMP bootstrap
130 # Someone tried to boot SMP with a non SMP kernel. All extra cores
/linux-4.4.14/Documentation/devicetree/bindings/arm/omap/
Dmpu.txt3 The MPU subsystem contain one or several ARM cores
/linux-4.4.14/arch/powerpc/platforms/40x/
DKconfig146 # All 405-based cores up until the 405GPR and 405EP have this errata.
150 # All 40x-based cores, up until the 405GPR and 405EP have this errata.
/linux-4.4.14/drivers/net/wireless/brcm80211/brcmfmac/
Dchip.c238 struct list_head cores; member
491 list_add_tail(&core->list, &ci->cores); in brcmf_chip_add_core()
504 list_for_each_entry(core, &ci->cores, list) { in brcmf_chip_cores_check()
1013 cc = list_first_entry(&chip->cores, struct brcmf_core_priv, list); in brcmf_chip_setup()
1059 INIT_LIST_HEAD(&chip->cores); in brcmf_chip_attach()
1090 list_for_each_entry_safe(core, tmp, &chip->cores, list) { in brcmf_chip_detach()
1103 list_for_each_entry(core, &chip->cores, list) in brcmf_chip_get_core()
1116 cc = list_first_entry(&chip->cores, struct brcmf_core_priv, list); in brcmf_chip_get_chipcommon()
/linux-4.4.14/drivers/staging/clocking-wizard/
Ddt-binding.txt12 - reg: Base and size of the cores register space
/linux-4.4.14/arch/arc/
DKconfig104 The original ARC ISA of ARC600/700 cores
109 ISA for the Next Generation ARC-HS cores
188 This IP block enables SMP in ARC-HS38 cores.
201 In SMP configuration cores can be configured as Halt-on-reset
464 ARC cores with 40 bit Physical Addressing support
552 not zeroed out on reset by mdb and/or ARCv2 based cores. The bogus
/linux-4.4.14/Documentation/devicetree/bindings/gpio/
Dgpio-grgpio.txt1 Aeroflex Gaisler GRGPIO General Purpose I/O cores.
Dgpio-dsp-keystone.txt3 HOST OS userland running on ARM can send interrupts to DSP cores using
/linux-4.4.14/Documentation/devicetree/bindings/arm/exynos/
Dsmp-sysram.txt5 of the secondary cores. Once the core gets powered up it executes the
/linux-4.4.14/tools/power/cpupower/utils/helpers/
Dtopology.c72 cpu_top->pkgs = cpu_top->cores = 0; in get_cpu_topology()
Dhelpers.h107 unsigned int cores; member
/linux-4.4.14/Documentation/devicetree/bindings/soc/fsl/
Dbman-portals.txt13 interaction by software running on processor cores, accelerators and network
Dqman-portals.txt14 interaction by software running on processor cores, accelerators and network
/linux-4.4.14/arch/x86/kernel/cpu/
Dperf_event_intel_rapl.c421 RAPL_EVENT_ATTR_STR(energy-cores, rapl_cores, "event=0x01");
426 RAPL_EVENT_ATTR_STR(energy-cores.unit, rapl_cores_unit, "Joules");
434 RAPL_EVENT_ATTR_STR(energy-cores.scale, rapl_cores_scale, "2.3283064365386962890625e-10");
/linux-4.4.14/arch/powerpc/platforms/86xx/
DKconfig9 The Freescale E600 SoCs have 74xx cores.
/linux-4.4.14/Documentation/devicetree/bindings/arm/
Dal,alpine.txt20 The Alpine platform includes cortex-a15 cores.
Dpmu.txt3 ARM cores often have a PMU for counting cpu and cache events like cache misses
Darch_timer.txt3 ARM cores may have a per-core architected timer, which provides per-cpu timers,
Dl2cc.txt3 ARM cores often have a separate level 2 cache controller. There are various
Darm-boards189 - a "cpus" node describing the available cores and their associated
Dvexpress.txt35 - LogicTile Express 13MG (V2F-2XV6) running Cortex-A7 (3 cores) SMM:
Dtopology.txt24 In systems where SMT is not supported "cpu" nodes represent all cores present
Didle-states.txt10 where cores can be put in different low-power states (ranging from simple
/linux-4.4.14/Documentation/cpu-freq/
Dboost.txt18 some cores in a multi-core package if certain conditions apply, mostly
60 This will either disable the boost functionality on all cores in the
/linux-4.4.14/Documentation/arm/keystone/
DOverview.txt7 and c66x DSP cores. This document describes essential information required
/linux-4.4.14/Documentation/devicetree/bindings/power/
Dfsl,imx-gpc.txt42 IP cores belonging to a power domain should contain a 'power-domains' property
/linux-4.4.14/Documentation/arm/Samsung/
DBootloader-interface.txt65 AFTR - ARM Off Top Running, a low power mode, Cortex cores and many other
DOverview.txt8 ARM9 through to the newest ARM cores. This document shows an overview of
/linux-4.4.14/Documentation/devicetree/bindings/spi/
Dfsl-spi.txt17 - clock-frequency : input clock frequency to non FSL_SOC cores
Dspi-rspi.txt30 - num-cs : Number of chip selects. Some RSPI cores have more than 1.
/linux-4.4.14/include/linux/
Dfmc.h60 struct fmc_sdb_one_id *cores; member
/linux-4.4.14/drivers/cpuidle/
DKconfig.arm24 define different C-states for little and big cores through the
/linux-4.4.14/Documentation/sysctl/
Dkernel.txt221 core_pattern is a '|', see above). When collecting cores via a pipe
232 are noted via the kernel log and their cores are skipped. 0 is a
941 The default cpumask is all possible cores, but if NO_HZ_FULL is
942 enabled in the kernel config, and cores are specified with the
943 nohz_full= boot argument, those cores are excluded by default.
944 Offline cores can be included in this mask, and if the core is later
948 to re-enable cores that by default were not running the watchdog,
949 if a kernel lockup was suspected on those cores.
952 so for example to enable the watchdog on cores 0, 2, 3, and 4 you
/linux-4.4.14/arch/powerpc/platforms/85xx/
DKconfig46 BSC9132 is a heterogeneous SoC containing dual e500v2 powerpc cores
47 and dual StarCore SC3850 DSP cores.
/linux-4.4.14/drivers/mailbox/
DKconfig24 send short messages between Highbank's A9 cores and the EnergyCore
/linux-4.4.14/arch/arm64/boot/dts/arm/
Dvexpress-v2f-1xv7-ca53x2.dts7 * Cortex-A53 (2 cores) Soft Macrocell Model
/linux-4.4.14/arch/metag/mm/
DKconfig25 This is the default page size used by all Meta cores.
/linux-4.4.14/drivers/video/fbdev/omap2/dss/
DKconfig82 HDMI Interface for OMAP5 and similar cores. This adds the High
/linux-4.4.14/Documentation/devicetree/bindings/crypto/
Dfsl-sec6.txt77 range can be made visible to one (or more) cores.
Dfsl-sec4.txt25 2. Job Rings (HW interface between cores & SEC 4 registers).
148 range can be made visible to one (or more) cores.
/linux-4.4.14/drivers/bus/
DKconfig79 cores. This bus is for per-CPU tightly coupled devices such as the
/linux-4.4.14/drivers/gpu/drm/msm/
DNOTES15 + zero, one, or two 2d cores (z180)
/linux-4.4.14/Documentation/hwmon/
Dcoretemp24 show the temperature of all cores inside a package under a single device
/linux-4.4.14/tools/power/cpupower/utils/idle_monitor/
Dcpupower-monitor.c433 cpu_top.pkgs, cpu_top.cores, cpu_count); in cmd_monitor()
/linux-4.4.14/arch/arm/mach-bcm/
DKconfig56 Support for Broadcom BCM470X and BCM5301X SoCs with ARM CPU cores.
/linux-4.4.14/arch/powerpc/platforms/
DKconfig.cputype178 and some e300 cores (c3 and c4). Select this only if your
225 addresses. This feature may not be available on all cores.
/linux-4.4.14/drivers/iommu/
DKconfig79 cores within the multimedia subsystem.
220 cores within the multimedia subsystem.
/linux-4.4.14/include/linux/bcma/
Dbcma.h347 struct list_head cores; member
/linux-4.4.14/Documentation/devicetree/bindings/arm/hisilicon/
Dhisilicon.txt197 The clock registers and power registers of secondary cores are defined
/linux-4.4.14/drivers/net/ethernet/broadcom/
DKconfig157 This driver supports GBit MAC and BCM4706 GBit MAC cores on BCMA bus.
/linux-4.4.14/Documentation/devicetree/bindings/clock/
Dqoriq-clock.txt7 cores and peripheral IP blocks.
/linux-4.4.14/Documentation/devicetree/bindings/powerpc/fsl/
Dmpic.txt54 directed at other cores. This ensures that the client
Ddcsr.txt329 control the debug operations of the SoC and cores.
/linux-4.4.14/drivers/net/can/
DKconfig119 endian syntheses of the cores would need some modifications on
/linux-4.4.14/tools/perf/Documentation/
Dperf-stat.txt152 is a useful mode to detect imbalance between physical cores. To enable this mode,
/linux-4.4.14/Documentation/networking/
Dstmmac.txt239 there are two MAC cores: one MAC is for MDIO Bus/PHY emulation
348 Timestamps, new GMAC cores support the advanced timestamp features.
Dixgbe.txt126 Matches flows and CPU cores for flow affinity. Supports multiple parameters
Dscaling.txt95 initial tests, so limit the number of queues to the number of CPU cores
/linux-4.4.14/arch/metag/
DKconfig132 This will not completely prevent cache incoherency on affected cores.
/linux-4.4.14/arch/mips/
DKconfig568 a variety of MIPS cores.
1624 can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
2069 only on cnMIPS cores. Note that you will need a suitable Linux
2167 on cores with the MT ASE and uses the available VPEs to implement
2181 when dealing with MIPS MT enabled cores at a cost of slightly
2283 Select this if you wish to run an SMP kernel across multiple cores
2285 enabled the kernel will probe for other cores and boot them with
/linux-4.4.14/fs/squashfs/
DKconfig96 decompression is load-balanced across the cores.
/linux-4.4.14/drivers/clk/samsung/
Dclk-exynos4.c1419 #define E4412_CPU_DIV1(cores, hpm, copy) \ argument
1420 (((cores) << 8) | ((hpm) << 4) | ((copy) << 0))
/linux-4.4.14/arch/arm/mm/
DKconfig341 bool "Accept early Feroceon cores with an ARM926 ID"
345 This enables the usage of some old Feroceon cores
768 Some cores are synthesizable to have various sized cache. For
/linux-4.4.14/arch/arm64/boot/dts/freescale/
Dfsl-ls2080a.dtsi64 /* We have 4 clusters having 2 Cortex-A57 cores each */
/linux-4.4.14/drivers/edac/
DKconfig347 the cnMIPS cores of Cavium Octeon family SOCs.
/linux-4.4.14/Documentation/thermal/
Dintel_powerclamp.txt139 among CPUs become challenging as the number of cores grows. This is
/linux-4.4.14/drivers/thermal/
DKconfig318 addition to DTSs on CPU cores. Each DTS will be registered as a
/linux-4.4.14/arch/xtensa/
DKconfig167 like the open cores ethernet driver and the serial interface.
/linux-4.4.14/arch/sparc/
DKconfig403 IP cores that are distributed under GPL. GRLIB can be downloaded
/linux-4.4.14/drivers/usb/gadget/udc/
DKconfig110 Select this to support Aeroflex Gaisler GRUSBDC cores from the GRLIB
/linux-4.4.14/arch/x86/
DKconfig.cpu363 # the right-hand clause are the cores that benefit from this optimization.
DKconfig433 enable more than ~168 cores.
/linux-4.4.14/arch/s390/
DKconfig482 multiple cores or multiple books.
/linux-4.4.14/drivers/char/
DKconfig179 between several cores on a system
/linux-4.4.14/drivers/watchdog/
DKconfig342 affect both cores and the peripherals of the IOP. The ATU-X
1262 Enables the watchdog for all cores running Linux. It
/linux-4.4.14/arch/powerpc/
DKconfig345 such as fsqrt on cores that do have an FPU but do not implement
/linux-4.4.14/arch/arm/
DKconfig1127 r1p0) erratum. On affected cores the LoUIS bit field of the CLIDR
1773 cores where a 8-word STM instruction give significantly higher
/linux-4.4.14/Documentation/virtual/kvm/
Dtimekeeping.txt381 cores. This technique, known as spread-spectrum clocking, reduces EMI at the
Dapi.txt216 threads in one or more virtual CPU cores. (This is because the
/linux-4.4.14/drivers/gpio/
DKconfig210 Select this to support Aeroflex Gaisler GRGPIO cores from the GRLIB
/linux-4.4.14/Documentation/scsi/
Dsym53c8xx_2.txt679 SCSI standards, chip cores functionnals and internal driver data structures.
Dncr53c8xx.txt1351 SCSI standards, chip cores functionnals and internal driver data structures.
/linux-4.4.14/Documentation/cgroups/
Dcpusets.txt559 2 : search cores in a package.
/linux-4.4.14/Documentation/filesystems/
Dxfs-delayed-logging-design.txt494 inode changes. If you modify lots of inode cores (e.g. chmod -R g+w *), then