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Searched refs:clk_pll (Results 1 – 38 of 38) sorted by relevance

/linux-4.4.14/drivers/clk/mxs/
Dclk-pll.c29 struct clk_pll { struct
36 #define to_clk_pll(_hw) container_of(_hw, struct clk_pll, hw) argument
40 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_prepare()
51 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_unprepare()
58 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_enable()
67 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_disable()
75 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_recalc_rate()
91 struct clk_pll *pll; in mxs_clk_pll()
/linux-4.4.14/drivers/clk/meson/
Dclk-pll.c191 struct meson_clk_pll *clk_pll; in meson_clk_register_pll() local
194 clk_pll = kzalloc(sizeof(*clk_pll), GFP_KERNEL); in meson_clk_register_pll()
195 if (!clk_pll) in meson_clk_register_pll()
198 clk_pll->base = reg_base + clk_conf->reg_off; in meson_clk_register_pll()
199 clk_pll->lock = lock; in meson_clk_register_pll()
200 clk_pll->conf = clk_conf->conf.pll; in meson_clk_register_pll()
210 if (clk_pll->conf->rate_table) { in meson_clk_register_pll()
213 for (len = 0; clk_pll->conf->rate_table[len].rate != 0; ) in meson_clk_register_pll()
216 clk_pll->rate_count = len; in meson_clk_register_pll()
220 clk_pll->hw.init = &init; in meson_clk_register_pll()
[all …]
/linux-4.4.14/drivers/clk/qcom/
Dclk-pll.c39 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_enable()
80 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_disable()
95 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_recalc_rate()
141 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_determine_rate()
156 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_set_rate()
192 static int wait_for_pll(struct clk_pll *pll) in wait_for_pll()
216 struct clk_pll *p = to_clk_pll(clk_hw_get_parent(hw)); in clk_pll_vote_enable()
232 clk_pll_set_fsm_mode(struct clk_pll *pll, struct regmap *regmap, u8 lock_count) in clk_pll_set_fsm_mode()
251 static void clk_pll_configure(struct clk_pll *pll, struct regmap *regmap, in clk_pll_configure()
278 void clk_pll_configure_sr(struct clk_pll *pll, struct regmap *regmap, in clk_pll_configure_sr()
[all …]
Dclk-pll.h47 struct clk_pll { struct
67 #define to_clk_pll(_hw) container_of(to_clk_regmap(_hw), struct clk_pll, clkr) argument
84 void clk_pll_configure_sr(struct clk_pll *pll, struct regmap *regmap,
86 void clk_pll_configure_sr_hpm_lp(struct clk_pll *pll, struct regmap *regmap,
Dlcc-ipq806x.c34 static struct clk_pll pll4 = {
Dgcc-ipq806x.c35 static struct clk_pll pll0 = {
62 static struct clk_pll pll3 = {
89 static struct clk_pll pll8 = {
116 static struct clk_pll pll14 = {
157 static struct clk_pll pll18 = {
Dmmcc-msm8974.c189 static struct clk_pll mmpll0 = {
216 static struct clk_pll mmpll1 = {
243 static struct clk_pll mmpll2 = {
258 static struct clk_pll mmpll3 = {
Dmmcc-apq8084.c224 static struct clk_pll mmpll0 = {
251 static struct clk_pll mmpll1 = {
278 static struct clk_pll mmpll2 = {
293 static struct clk_pll mmpll3 = {
309 static struct clk_pll mmpll4 = {
Dlcc-msm8960.c34 static struct clk_pll pll4 = {
Dgcc-msm8916.c269 static struct clk_pll gpll0 = {
296 static struct clk_pll gpll1 = {
323 static struct clk_pll gpll2 = {
350 static struct clk_pll bimc_pll = {
Dgcc-msm8974.c67 static struct clk_pll gpll0 = {
130 static struct clk_pll gpll1 = {
157 static struct clk_pll gpll4 = {
Dgcc-msm8960.c35 static struct clk_pll pll3 = {
62 static struct clk_pll pll8 = {
89 static struct clk_pll pll14 = {
Dgcc-apq8084.c111 static struct clk_pll gpll0 = {
174 static struct clk_pll gpll1 = {
201 static struct clk_pll gpll4 = {
Dmmcc-msm8960.c116 static struct clk_pll pll2 = {
132 static struct clk_pll pll15 = {
Dgcc-msm8660.c35 static struct clk_pll pll8 = {
/linux-4.4.14/drivers/clk/at91/
Dclk-pll.c57 #define to_clk_pll(hw) container_of(hw, struct clk_pll, hw)
59 struct clk_pll { struct
74 struct clk_pll *pll = (struct clk_pll *)dev_id; in clk_pll_irq_handler() argument
84 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_prepare()
132 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_is_prepared()
141 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_unprepare()
153 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_recalc_rate()
161 static long clk_pll_get_best_div_mul(struct clk_pll *pll, unsigned long rate, in clk_pll_get_best_div_mul()
274 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_round_rate()
283 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_set_rate()
[all …]
/linux-4.4.14/Documentation/devicetree/bindings/clock/
Dmoxa,moxart-clock.txt37 clk_pll: clk_pll@98100000 {
47 clocks = <&clk_pll>;
/linux-4.4.14/drivers/clk/
Dclk-nomadik.c142 struct clk_pll { struct
161 #define to_pll(_hw) container_of(_hw, struct clk_pll, hw) argument
166 struct clk_pll *pll = to_pll(hw); in pll_clk_enable()
186 struct clk_pll *pll = to_pll(hw); in pll_clk_disable()
205 struct clk_pll *pll = to_pll(hw); in pll_clk_is_enabled()
221 struct clk_pll *pll = to_pll(hw); in pll_clk_recalc_rate()
261 struct clk_pll *pll; in pll_clk_register()
Dclk-vt8500.c50 struct clk_pll { struct
316 #define to_clk_pll(_hw) container_of(_hw, struct clk_pll, hw)
542 struct clk_pll *pll = to_clk_pll(hw); in vtwm_pll_set_rate()
585 struct clk_pll *pll = to_clk_pll(hw); in vtwm_pll_round_rate()
616 struct clk_pll *pll = to_clk_pll(hw); in vtwm_pll_recalc_rate()
654 struct clk_pll *pll_clk; in vtwm_pll_clk_init()
/linux-4.4.14/drivers/clk/spear/
Dclk-vco-pll.c66 #define to_clk_pll(_hw) container_of(_hw, struct clk_pll, hw)
87 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_round_rate_index()
127 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_recalc_rate()
147 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_set_rate()
283 struct clk_pll *pll; in clk_register_vco_pll()
Dclk.h102 struct clk_pll { struct
/linux-4.4.14/drivers/clk/keystone/
Dpll.c72 struct clk_pll { struct
77 #define to_clk_pll(_hw) container_of(_hw, struct clk_pll, hw) argument
82 struct clk_pll *pll = to_clk_pll(hw); in clk_pllclk_recalc()
130 struct clk_pll *pll; in clk_register_pll()
/linux-4.4.14/arch/arm/boot/dts/
Dmoxart.dtsi46 clk_pll: clk_pll@98100000 { label
56 clocks = <&clk_pll>;
Dmoxart-uc7112lx.dts79 &clk_pll {
/linux-4.4.14/drivers/gpu/drm/imx/
Dimx-ldb.c82 struct clk *clk_pll[2]; /* upstream clock we can adjust */ member
155 clk_get_rate(ldb->clk_pll[chno]), serial_clk); in imx_ldb_set_clock()
156 clk_set_rate(ldb->clk_pll[chno], serial_clk); in imx_ldb_set_clock()
159 clk_get_rate(ldb->clk_pll[chno])); in imx_ldb_set_clock()
396 ldb->clk_pll[chno] = devm_clk_get(ldb->dev, clkname); in imx_ldb_get_clk()
398 return PTR_ERR_OR_ZERO(ldb->clk_pll[chno]); in imx_ldb_get_clk()
/linux-4.4.14/drivers/clk/sirf/
Dclk-common.c34 struct clk_pll { struct
39 #define to_pllclk(_hw) container_of(_hw, struct clk_pll, hw) argument
78 struct clk_pll *clk = to_pllclk(hw); in pll_clk_recalc_rate()
130 struct clk_pll *clk = to_pllclk(hw); in pll_clk_set_rate()
218 static struct clk_pll clk_pll1 = {
225 static struct clk_pll clk_pll2 = {
232 static struct clk_pll clk_pll3 = {
Dclk-atlas7.c214 struct clk_pll { struct
218 #define to_pllclk(_hw) container_of(_hw, struct clk_pll, hw) argument
357 struct clk_pll *clk = to_pllclk(hw); in pll_clk_recalc_rate()
402 static struct clk_pll clk_cpupll = {
416 static struct clk_pll clk_mempll = {
430 static struct clk_pll clk_sys0pll = {
444 static struct clk_pll clk_sys1pll = {
458 static struct clk_pll clk_sys2pll = {
472 static struct clk_pll clk_sys3pll = {
/linux-4.4.14/arch/m68k/coldfire/
Dm5407.c31 &clk_pll,
Dm5206.c31 &clk_pll,
Dm5307.c40 &clk_pll,
Dm523x.c39 &clk_pll,
Dm525x.c32 &clk_pll,
Dm528x.c41 &clk_pll,
Dm5249.c32 &clk_pll,
Dm5272.c46 &clk_pll,
Dm527x.c41 &clk_pll,
Dm54xx.c43 &clk_pll,
/linux-4.4.14/drivers/clk/ti/
Dfapll.c82 struct clk *clk_pll; member
520 synth->clk_pll = pll_clk; in ti_fapll_synth_setup()