Searched refs:bios (Results 1 - 200 of 417) sorted by relevance

123

/linux-4.4.14/drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/
H A Dbmp.h4 bmp_version(struct nvkm_bios *bios) bmp_version() argument
6 if (bios->bmp_offset) { bmp_version()
7 return nvbios_rd08(bios, bios->bmp_offset + 5) << 8 | bmp_version()
8 nvbios_rd08(bios, bios->bmp_offset + 6); bmp_version()
15 bmp_mem_init_table(struct nvkm_bios *bios) bmp_mem_init_table() argument
17 if (bmp_version(bios) >= 0x0300) bmp_mem_init_table()
18 return nvbios_rd16(bios, bios->bmp_offset + 24); bmp_mem_init_table()
23 bmp_sdr_seq_table(struct nvkm_bios *bios) bmp_sdr_seq_table() argument
25 if (bmp_version(bios) >= 0x0300) bmp_sdr_seq_table()
26 return nvbios_rd16(bios, bios->bmp_offset + 26); bmp_sdr_seq_table()
31 bmp_ddr_seq_table(struct nvkm_bios *bios) bmp_ddr_seq_table() argument
33 if (bmp_version(bios) >= 0x0300) bmp_ddr_seq_table()
34 return nvbios_rd16(bios, bios->bmp_offset + 28); bmp_ddr_seq_table()
H A Dfan.h3 #include <subdev/bios/therm.h>
5 u16 nvbios_fan_parse(struct nvkm_bios *bios, struct nvbios_therm_fan *fan);
H A Dconn.h27 u32 nvbios_connTe(struct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len);
28 u32 nvbios_connTp(struct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len,
41 u32 nvbios_connEe(struct nvkm_bios *bios, u8 idx, u8 *ver, u8 *hdr);
42 u32 nvbios_connEp(struct nvkm_bios *bios, u8 idx, u8 *ver, u8 *hdr,
H A Drammap.h3 #include <subdev/bios/ramcfg.h>
10 u32 nvbios_rammapEp_from_perf(struct nvkm_bios *bios, u32 data, u8 size,
20 u32 nvbios_rammapSp_from_perf(struct nvkm_bios *bios, u32 data, u8 size, int idx,
H A Dinit.h6 struct nvkm_bios *bios; member in struct:nvbios_init
H A Dtiming.h3 #include <subdev/bios/ramcfg.h>
H A Di2c.h4 /* matches bios type field prior to ccb 4.1 */
/linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/subdev/bios/
H A Dbase.c26 #include <subdev/bios.h>
27 #include <subdev/bios/bmp.h>
28 #include <subdev/bios/bit.h>
56 nvbios_memcmp(struct nvkm_bios *bios, u32 addr, const char *str, u32 len) nvbios_memcmp() argument
61 c1 = nvbios_rd08(bios, addr++); nvbios_memcmp()
70 nvbios_extend(struct nvkm_bios *bios, u32 length) nvbios_extend() argument
72 if (bios->size < length) { nvbios_extend()
73 u8 *prev = bios->data; nvbios_extend()
74 if (!(bios->data = kmalloc(length, GFP_KERNEL))) { nvbios_extend()
75 bios->data = prev; nvbios_extend()
78 memcpy(bios->data, prev, bios->size); nvbios_extend()
79 bios->size = length; nvbios_extend()
89 struct nvkm_bios *bios = nvkm_bios(subdev); nvkm_bios_dtor() local
90 kfree(bios->data); nvkm_bios_dtor()
91 return bios; nvkm_bios_dtor()
102 struct nvkm_bios *bios; nvkm_bios_new() local
106 if (!(bios = *pbios = kzalloc(sizeof(*bios), GFP_KERNEL))) nvkm_bios_new()
108 nvkm_subdev_ctor(&nvkm_bios, device, index, 0, &bios->subdev); nvkm_bios_new()
110 ret = nvbios_shadow(bios); nvkm_bios_new()
115 bios->bmp_offset = nvbios_findstr(bios->data, bios->size, nvkm_bios_new()
117 if (bios->bmp_offset) { nvkm_bios_new()
118 nvkm_debug(&bios->subdev, "BMP version %x.%x\n", nvkm_bios_new()
119 bmp_version(bios) >> 8, nvkm_bios_new()
120 bmp_version(bios) & 0xff); nvkm_bios_new()
123 bios->bit_offset = nvbios_findstr(bios->data, bios->size, nvkm_bios_new()
125 if (bios->bit_offset) nvkm_bios_new()
126 nvkm_debug(&bios->subdev, "BIT signature found\n"); nvkm_bios_new()
129 if (!bit_entry(bios, 'i', &bit_i) && bit_i.length >= 4) { nvkm_bios_new()
130 bios->version.major = nvbios_rd08(bios, bit_i.offset + 3); nvkm_bios_new()
131 bios->version.chip = nvbios_rd08(bios, bit_i.offset + 2); nvkm_bios_new()
132 bios->version.minor = nvbios_rd08(bios, bit_i.offset + 1); nvkm_bios_new()
133 bios->version.micro = nvbios_rd08(bios, bit_i.offset + 0); nvkm_bios_new()
134 bios->version.patch = nvbios_rd08(bios, bit_i.offset + 4); nvkm_bios_new()
136 if (bmp_version(bios)) { nvkm_bios_new()
137 bios->version.major = nvbios_rd08(bios, bios->bmp_offset + 13); nvkm_bios_new()
138 bios->version.chip = nvbios_rd08(bios, bios->bmp_offset + 12); nvkm_bios_new()
139 bios->version.minor = nvbios_rd08(bios, bios->bmp_offset + 11); nvkm_bios_new()
140 bios->version.micro = nvbios_rd08(bios, bios->bmp_offset + 10); nvkm_bios_new()
143 nvkm_info(&bios->subdev, "version %02x.%02x.%02x.%02x.%02x\n", nvkm_bios_new()
144 bios->version.major, bios->version.chip, nvkm_bios_new()
145 bios->version.minor, bios->version.micro, bios->version.patch); nvkm_bios_new()
H A Dtiming.c24 #include <subdev/bios.h>
25 #include <subdev/bios/bit.h>
26 #include <subdev/bios/timing.h>
29 nvbios_timingTe(struct nvkm_bios *bios, nvbios_timingTe() argument
35 if (!bit_entry(bios, 'P', &bit_P)) { nvbios_timingTe()
37 timing = nvbios_rd16(bios, bit_P.offset + 4); nvbios_timingTe()
40 timing = nvbios_rd16(bios, bit_P.offset + 8); nvbios_timingTe()
43 *ver = nvbios_rd08(bios, timing + 0); nvbios_timingTe()
46 *hdr = nvbios_rd08(bios, timing + 1); nvbios_timingTe()
47 *cnt = nvbios_rd08(bios, timing + 2); nvbios_timingTe()
48 *len = nvbios_rd08(bios, timing + 3); nvbios_timingTe()
53 *hdr = nvbios_rd08(bios, timing + 1); nvbios_timingTe()
54 *cnt = nvbios_rd08(bios, timing + 5); nvbios_timingTe()
55 *len = nvbios_rd08(bios, timing + 2); nvbios_timingTe()
56 *snr = nvbios_rd08(bios, timing + 4); nvbios_timingTe()
57 *ssz = nvbios_rd08(bios, timing + 3); nvbios_timingTe()
69 nvbios_timingEe(struct nvkm_bios *bios, int idx, nvbios_timingEe() argument
73 u16 timing = nvbios_timingTe(bios, ver, hdr, cnt, len, &snr, &ssz); nvbios_timingEe()
85 nvbios_timingEp(struct nvkm_bios *bios, int idx, nvbios_timingEp() argument
88 u16 data = nvbios_timingEe(bios, idx, ver, hdr, cnt, len), temp; nvbios_timingEp()
93 p->timing_10_WR = nvbios_rd08(bios, data + 0x00); nvbios_timingEp()
94 p->timing_10_WTR = nvbios_rd08(bios, data + 0x01); nvbios_timingEp()
95 p->timing_10_CL = nvbios_rd08(bios, data + 0x02); nvbios_timingEp()
96 p->timing_10_RC = nvbios_rd08(bios, data + 0x03); nvbios_timingEp()
97 p->timing_10_RFC = nvbios_rd08(bios, data + 0x05); nvbios_timingEp()
98 p->timing_10_RAS = nvbios_rd08(bios, data + 0x07); nvbios_timingEp()
99 p->timing_10_RP = nvbios_rd08(bios, data + 0x09); nvbios_timingEp()
100 p->timing_10_RCDRD = nvbios_rd08(bios, data + 0x0a); nvbios_timingEp()
101 p->timing_10_RCDWR = nvbios_rd08(bios, data + 0x0b); nvbios_timingEp()
102 p->timing_10_RRD = nvbios_rd08(bios, data + 0x0c); nvbios_timingEp()
103 p->timing_10_13 = nvbios_rd08(bios, data + 0x0d); nvbios_timingEp()
104 p->timing_10_ODT = nvbios_rd08(bios, data + 0x0e) & 0x07; nvbios_timingEp()
106 p->ramcfg_RON = nvbios_rd08(bios, data + 0x0e) & 0x07; nvbios_timingEp()
117 p->timing_10_24 = nvbios_rd08(bios, data + 0x18); nvbios_timingEp()
121 p->timing_10_21 = nvbios_rd08(bios, data + 0x15); nvbios_timingEp()
123 p->timing_10_20 = nvbios_rd08(bios, data + 0x14); nvbios_timingEp()
125 p->timing_10_CWL = nvbios_rd08(bios, data + 0x13); nvbios_timingEp()
127 p->timing_10_18 = nvbios_rd08(bios, data + 0x12); nvbios_timingEp()
130 p->timing_10_16 = nvbios_rd08(bios, data + 0x10); nvbios_timingEp()
135 p->timing[0] = nvbios_rd32(bios, data + 0x00); nvbios_timingEp()
136 p->timing[1] = nvbios_rd32(bios, data + 0x04); nvbios_timingEp()
137 p->timing[2] = nvbios_rd32(bios, data + 0x08); nvbios_timingEp()
138 p->timing[3] = nvbios_rd32(bios, data + 0x0c); nvbios_timingEp()
139 p->timing[4] = nvbios_rd32(bios, data + 0x10); nvbios_timingEp()
140 p->timing[5] = nvbios_rd32(bios, data + 0x14); nvbios_timingEp()
141 p->timing[6] = nvbios_rd32(bios, data + 0x18); nvbios_timingEp()
142 p->timing[7] = nvbios_rd32(bios, data + 0x1c); nvbios_timingEp()
143 p->timing[8] = nvbios_rd32(bios, data + 0x20); nvbios_timingEp()
144 p->timing[9] = nvbios_rd32(bios, data + 0x24); nvbios_timingEp()
145 p->timing[10] = nvbios_rd32(bios, data + 0x28); nvbios_timingEp()
146 p->timing_20_2e_03 = (nvbios_rd08(bios, data + 0x2e) & 0x03) >> 0; nvbios_timingEp()
147 p->timing_20_2e_30 = (nvbios_rd08(bios, data + 0x2e) & 0x30) >> 4; nvbios_timingEp()
148 p->timing_20_2e_c0 = (nvbios_rd08(bios, data + 0x2e) & 0xc0) >> 6; nvbios_timingEp()
149 p->timing_20_2f_03 = (nvbios_rd08(bios, data + 0x2f) & 0x03) >> 0; nvbios_timingEp()
150 temp = nvbios_rd16(bios, data + 0x2c); nvbios_timingEp()
153 p->timing_20_30_07 = (nvbios_rd08(bios, data + 0x30) & 0x07) >> 0; nvbios_timingEp()
154 p->timing_20_30_f8 = (nvbios_rd08(bios, data + 0x30) & 0xf8) >> 3; nvbios_timingEp()
155 temp = nvbios_rd16(bios, data + 0x31); nvbios_timingEp()
H A Drammap.c24 #include <subdev/bios.h>
25 #include <subdev/bios/bit.h>
26 #include <subdev/bios/rammap.h>
29 nvbios_rammapTe(struct nvkm_bios *bios, u8 *ver, u8 *hdr, nvbios_rammapTe() argument
35 if (!bit_entry(bios, 'P', &bit_P)) { nvbios_rammapTe()
37 rammap = nvbios_rd16(bios, bit_P.offset + 4); nvbios_rammapTe()
40 *ver = nvbios_rd08(bios, rammap + 0); nvbios_rammapTe()
44 *hdr = nvbios_rd08(bios, rammap + 1); nvbios_rammapTe()
45 *cnt = nvbios_rd08(bios, rammap + 5); nvbios_rammapTe()
46 *len = nvbios_rd08(bios, rammap + 2); nvbios_rammapTe()
47 *snr = nvbios_rd08(bios, rammap + 4); nvbios_rammapTe()
48 *ssz = nvbios_rd08(bios, rammap + 3); nvbios_rammapTe()
60 nvbios_rammapEe(struct nvkm_bios *bios, int idx, nvbios_rammapEe() argument
64 u16 rammap = nvbios_rammapTe(bios, ver, hdr, cnt, len, &snr, &ssz); nvbios_rammapEe()
78 nvbios_rammapEp_from_perf(struct nvkm_bios *bios, u32 data, u8 size, nvbios_rammapEp_from_perf() argument
83 p->rammap_00_16_20 = (nvbios_rd08(bios, data + 0x16) & 0x20) >> 5; nvbios_rammapEp_from_perf()
84 p->rammap_00_16_40 = (nvbios_rd08(bios, data + 0x16) & 0x40) >> 6; nvbios_rammapEp_from_perf()
85 p->rammap_00_17_02 = (nvbios_rd08(bios, data + 0x17) & 0x02) >> 1; nvbios_rammapEp_from_perf()
91 nvbios_rammapEp(struct nvkm_bios *bios, int idx, nvbios_rammapEp() argument
94 u32 data = nvbios_rammapEe(bios, idx, ver, hdr, cnt, len), temp; nvbios_rammapEp()
100 p->rammap_min = nvbios_rd16(bios, data + 0x00); nvbios_rammapEp()
101 p->rammap_max = nvbios_rd16(bios, data + 0x02); nvbios_rammapEp()
102 p->rammap_10_04_02 = (nvbios_rd08(bios, data + 0x04) & 0x02) >> 1; nvbios_rammapEp()
103 p->rammap_10_04_08 = (nvbios_rd08(bios, data + 0x04) & 0x08) >> 3; nvbios_rammapEp()
106 p->rammap_min = nvbios_rd16(bios, data + 0x00); nvbios_rammapEp()
107 p->rammap_max = nvbios_rd16(bios, data + 0x02); nvbios_rammapEp()
108 p->rammap_11_08_01 = (nvbios_rd08(bios, data + 0x08) & 0x01) >> 0; nvbios_rammapEp()
109 p->rammap_11_08_0c = (nvbios_rd08(bios, data + 0x08) & 0x0c) >> 2; nvbios_rammapEp()
110 p->rammap_11_08_10 = (nvbios_rd08(bios, data + 0x08) & 0x10) >> 4; nvbios_rammapEp()
111 temp = nvbios_rd32(bios, data + 0x09); nvbios_rammapEp()
120 p->rammap_11_0d = nvbios_rd08(bios, data + 0x0d); nvbios_rammapEp()
121 p->rammap_11_0e = nvbios_rd08(bios, data + 0x0e); nvbios_rammapEp()
122 p->rammap_11_0f = nvbios_rd08(bios, data + 0x0f); nvbios_rammapEp()
123 p->rammap_11_11_0c = (nvbios_rd08(bios, data + 0x11) & 0x0c) >> 2; nvbios_rammapEp()
133 nvbios_rammapEm(struct nvkm_bios *bios, u16 mhz, nvbios_rammapEm() argument
138 while ((data = nvbios_rammapEp(bios, idx++, ver, hdr, cnt, len, info))) { nvbios_rammapEm()
146 nvbios_rammapSe(struct nvkm_bios *bios, u32 data, nvbios_rammapSe() argument
159 nvbios_rammapSp_from_perf(struct nvkm_bios *bios, u32 data, u8 size, int idx, nvbios_rammapSp_from_perf() argument
168 p->ramcfg_timing = nvbios_rd08(bios, data + 0x01); nvbios_rammapSp_from_perf()
169 p->ramcfg_00_03_01 = (nvbios_rd08(bios, data + 0x03) & 0x01) >> 0; nvbios_rammapSp_from_perf()
170 p->ramcfg_00_03_02 = (nvbios_rd08(bios, data + 0x03) & 0x02) >> 1; nvbios_rammapSp_from_perf()
171 p->ramcfg_DLLoff = (nvbios_rd08(bios, data + 0x03) & 0x04) >> 2; nvbios_rammapSp_from_perf()
172 p->ramcfg_00_03_08 = (nvbios_rd08(bios, data + 0x03) & 0x08) >> 3; nvbios_rammapSp_from_perf()
173 p->ramcfg_RON = (nvbios_rd08(bios, data + 0x03) & 0x10) >> 3; nvbios_rammapSp_from_perf()
174 p->ramcfg_FBVDDQ = (nvbios_rd08(bios, data + 0x03) & 0x80) >> 7; nvbios_rammapSp_from_perf()
175 p->ramcfg_00_04_02 = (nvbios_rd08(bios, data + 0x04) & 0x02) >> 1; nvbios_rammapSp_from_perf()
176 p->ramcfg_00_04_04 = (nvbios_rd08(bios, data + 0x04) & 0x04) >> 2; nvbios_rammapSp_from_perf()
177 p->ramcfg_00_04_20 = (nvbios_rd08(bios, data + 0x04) & 0x20) >> 5; nvbios_rammapSp_from_perf()
178 p->ramcfg_00_05 = (nvbios_rd08(bios, data + 0x05) & 0xff) >> 0; nvbios_rammapSp_from_perf()
179 p->ramcfg_00_06 = (nvbios_rd08(bios, data + 0x06) & 0xff) >> 0; nvbios_rammapSp_from_perf()
180 p->ramcfg_00_07 = (nvbios_rd08(bios, data + 0x07) & 0xff) >> 0; nvbios_rammapSp_from_perf()
181 p->ramcfg_00_08 = (nvbios_rd08(bios, data + 0x08) & 0xff) >> 0; nvbios_rammapSp_from_perf()
182 p->ramcfg_00_09 = (nvbios_rd08(bios, data + 0x09) & 0xff) >> 0; nvbios_rammapSp_from_perf()
183 p->ramcfg_00_0a_0f = (nvbios_rd08(bios, data + 0x0a) & 0x0f) >> 0; nvbios_rammapSp_from_perf()
184 p->ramcfg_00_0a_f0 = (nvbios_rd08(bios, data + 0x0a) & 0xf0) >> 4; nvbios_rammapSp_from_perf()
190 nvbios_rammapSp(struct nvkm_bios *bios, u32 data, nvbios_rammapSp() argument
194 data = nvbios_rammapSe(bios, data, ever, ehdr, ecnt, elen, idx, ver, hdr); nvbios_rammapSp()
199 p->ramcfg_timing = nvbios_rd08(bios, data + 0x01); nvbios_rammapSp()
200 p->ramcfg_10_02_01 = (nvbios_rd08(bios, data + 0x02) & 0x01) >> 0; nvbios_rammapSp()
201 p->ramcfg_10_02_02 = (nvbios_rd08(bios, data + 0x02) & 0x02) >> 1; nvbios_rammapSp()
202 p->ramcfg_10_02_04 = (nvbios_rd08(bios, data + 0x02) & 0x04) >> 2; nvbios_rammapSp()
203 p->ramcfg_10_02_08 = (nvbios_rd08(bios, data + 0x02) & 0x08) >> 3; nvbios_rammapSp()
204 p->ramcfg_10_02_10 = (nvbios_rd08(bios, data + 0x02) & 0x10) >> 4; nvbios_rammapSp()
205 p->ramcfg_10_02_20 = (nvbios_rd08(bios, data + 0x02) & 0x20) >> 5; nvbios_rammapSp()
206 p->ramcfg_DLLoff = (nvbios_rd08(bios, data + 0x02) & 0x40) >> 6; nvbios_rammapSp()
207 p->ramcfg_10_03_0f = (nvbios_rd08(bios, data + 0x03) & 0x0f) >> 0; nvbios_rammapSp()
208 p->ramcfg_10_04_01 = (nvbios_rd08(bios, data + 0x04) & 0x01) >> 0; nvbios_rammapSp()
209 p->ramcfg_FBVDDQ = (nvbios_rd08(bios, data + 0x04) & 0x08) >> 3; nvbios_rammapSp()
210 p->ramcfg_10_05 = (nvbios_rd08(bios, data + 0x05) & 0xff) >> 0; nvbios_rammapSp()
211 p->ramcfg_10_06 = (nvbios_rd08(bios, data + 0x06) & 0xff) >> 0; nvbios_rammapSp()
212 p->ramcfg_10_07 = (nvbios_rd08(bios, data + 0x07) & 0xff) >> 0; nvbios_rammapSp()
213 p->ramcfg_10_08 = (nvbios_rd08(bios, data + 0x08) & 0xff) >> 0; nvbios_rammapSp()
214 p->ramcfg_10_09_0f = (nvbios_rd08(bios, data + 0x09) & 0x0f) >> 0; nvbios_rammapSp()
215 p->ramcfg_10_09_f0 = (nvbios_rd08(bios, data + 0x09) & 0xf0) >> 4; nvbios_rammapSp()
218 p->ramcfg_timing = nvbios_rd08(bios, data + 0x00); nvbios_rammapSp()
219 p->ramcfg_11_01_01 = (nvbios_rd08(bios, data + 0x01) & 0x01) >> 0; nvbios_rammapSp()
220 p->ramcfg_11_01_02 = (nvbios_rd08(bios, data + 0x01) & 0x02) >> 1; nvbios_rammapSp()
221 p->ramcfg_11_01_04 = (nvbios_rd08(bios, data + 0x01) & 0x04) >> 2; nvbios_rammapSp()
222 p->ramcfg_11_01_08 = (nvbios_rd08(bios, data + 0x01) & 0x08) >> 3; nvbios_rammapSp()
223 p->ramcfg_11_01_10 = (nvbios_rd08(bios, data + 0x01) & 0x10) >> 4; nvbios_rammapSp()
224 p->ramcfg_DLLoff = (nvbios_rd08(bios, data + 0x01) & 0x20) >> 5; nvbios_rammapSp()
225 p->ramcfg_11_01_40 = (nvbios_rd08(bios, data + 0x01) & 0x40) >> 6; nvbios_rammapSp()
226 p->ramcfg_11_01_80 = (nvbios_rd08(bios, data + 0x01) & 0x80) >> 7; nvbios_rammapSp()
227 p->ramcfg_11_02_03 = (nvbios_rd08(bios, data + 0x02) & 0x03) >> 0; nvbios_rammapSp()
228 p->ramcfg_11_02_04 = (nvbios_rd08(bios, data + 0x02) & 0x04) >> 2; nvbios_rammapSp()
229 p->ramcfg_11_02_08 = (nvbios_rd08(bios, data + 0x02) & 0x08) >> 3; nvbios_rammapSp()
230 p->ramcfg_11_02_10 = (nvbios_rd08(bios, data + 0x02) & 0x10) >> 4; nvbios_rammapSp()
231 p->ramcfg_11_02_40 = (nvbios_rd08(bios, data + 0x02) & 0x40) >> 6; nvbios_rammapSp()
232 p->ramcfg_11_02_80 = (nvbios_rd08(bios, data + 0x02) & 0x80) >> 7; nvbios_rammapSp()
233 p->ramcfg_11_03_0f = (nvbios_rd08(bios, data + 0x03) & 0x0f) >> 0; nvbios_rammapSp()
234 p->ramcfg_11_03_30 = (nvbios_rd08(bios, data + 0x03) & 0x30) >> 4; nvbios_rammapSp()
235 p->ramcfg_11_03_c0 = (nvbios_rd08(bios, data + 0x03) & 0xc0) >> 6; nvbios_rammapSp()
236 p->ramcfg_11_03_f0 = (nvbios_rd08(bios, data + 0x03) & 0xf0) >> 4; nvbios_rammapSp()
237 p->ramcfg_11_04 = (nvbios_rd08(bios, data + 0x04) & 0xff) >> 0; nvbios_rammapSp()
238 p->ramcfg_11_06 = (nvbios_rd08(bios, data + 0x06) & 0xff) >> 0; nvbios_rammapSp()
239 p->ramcfg_11_07_02 = (nvbios_rd08(bios, data + 0x07) & 0x02) >> 1; nvbios_rammapSp()
240 p->ramcfg_11_07_04 = (nvbios_rd08(bios, data + 0x07) & 0x04) >> 2; nvbios_rammapSp()
241 p->ramcfg_11_07_08 = (nvbios_rd08(bios, data + 0x07) & 0x08) >> 3; nvbios_rammapSp()
242 p->ramcfg_11_07_10 = (nvbios_rd08(bios, data + 0x07) & 0x10) >> 4; nvbios_rammapSp()
243 p->ramcfg_11_07_40 = (nvbios_rd08(bios, data + 0x07) & 0x40) >> 6; nvbios_rammapSp()
244 p->ramcfg_11_07_80 = (nvbios_rd08(bios, data + 0x07) & 0x80) >> 7; nvbios_rammapSp()
245 p->ramcfg_11_08_01 = (nvbios_rd08(bios, data + 0x08) & 0x01) >> 0; nvbios_rammapSp()
246 p->ramcfg_11_08_02 = (nvbios_rd08(bios, data + 0x08) & 0x02) >> 1; nvbios_rammapSp()
247 p->ramcfg_11_08_04 = (nvbios_rd08(bios, data + 0x08) & 0x04) >> 2; nvbios_rammapSp()
248 p->ramcfg_11_08_08 = (nvbios_rd08(bios, data + 0x08) & 0x08) >> 3; nvbios_rammapSp()
249 p->ramcfg_11_08_10 = (nvbios_rd08(bios, data + 0x08) & 0x10) >> 4; nvbios_rammapSp()
250 p->ramcfg_11_08_20 = (nvbios_rd08(bios, data + 0x08) & 0x20) >> 5; nvbios_rammapSp()
251 p->ramcfg_11_09 = (nvbios_rd08(bios, data + 0x09) & 0xff) >> 0; nvbios_rammapSp()
H A Dpll.c24 #include <subdev/bios.h>
25 #include <subdev/bios/bit.h>
26 #include <subdev/bios/bmp.h>
27 #include <subdev/bios/pll.h>
81 pll_limits_table(struct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len) pll_limits_table() argument
85 if (!bit_entry(bios, 'C', &bit_C) && bit_C.length >= 10) { pll_limits_table()
86 u16 data = nvbios_rd16(bios, bit_C.offset + 8); pll_limits_table()
88 *ver = nvbios_rd08(bios, data + 0); pll_limits_table()
89 *hdr = nvbios_rd08(bios, data + 1); pll_limits_table()
90 *len = nvbios_rd08(bios, data + 2); pll_limits_table()
91 *cnt = nvbios_rd08(bios, data + 3); pll_limits_table()
96 if (bmp_version(bios) >= 0x0524) { pll_limits_table()
97 u16 data = nvbios_rd16(bios, bios->bmp_offset + 142); pll_limits_table()
99 *ver = nvbios_rd08(bios, data + 0); pll_limits_table()
112 pll_map(struct nvkm_bios *bios) pll_map() argument
114 struct nvkm_device *device = bios->subdev.device; pll_map()
139 pll_map_reg(struct nvkm_bios *bios, u32 reg, u32 *type, u8 *ver, u8 *len) pll_map_reg() argument
145 data = pll_limits_table(bios, ver, &hdr, &cnt, len); pll_map_reg()
149 if (nvbios_rd32(bios, data + 3) == reg) { pll_map_reg()
150 *type = nvbios_rd08(bios, data + 0); pll_map_reg()
158 map = pll_map(bios); pll_map_reg()
164 if (nvbios_rd32(bios, data) == map->reg) pll_map_reg()
181 pll_map_type(struct nvkm_bios *bios, u8 type, u32 *reg, u8 *ver, u8 *len) pll_map_type() argument
187 data = pll_limits_table(bios, ver, &hdr, &cnt, len); pll_map_type()
191 if (nvbios_rd08(bios, data + 0) == type) { pll_map_type()
192 *reg = nvbios_rd32(bios, data + 3); pll_map_type()
200 map = pll_map(bios); pll_map_type()
206 if (nvbios_rd32(bios, data) == map->reg) pll_map_type()
223 nvbios_pll_parse(struct nvkm_bios *bios, u32 type, struct nvbios_pll *info) nvbios_pll_parse() argument
225 struct nvkm_subdev *subdev = &bios->subdev; nvbios_pll_parse()
233 data = pll_map_reg(bios, reg, &type, &ver, &len); nvbios_pll_parse()
235 data = pll_map_type(bios, type, &reg, &ver, &len); nvbios_pll_parse()
250 info->vco1.min_freq = nvbios_rd32(bios, data + 0); nvbios_pll_parse()
251 info->vco1.max_freq = nvbios_rd32(bios, data + 4); nvbios_pll_parse()
252 info->vco2.min_freq = nvbios_rd32(bios, data + 8); nvbios_pll_parse()
253 info->vco2.max_freq = nvbios_rd32(bios, data + 12); nvbios_pll_parse()
254 info->vco1.min_inputfreq = nvbios_rd32(bios, data + 16); nvbios_pll_parse()
255 info->vco2.min_inputfreq = nvbios_rd32(bios, data + 20); nvbios_pll_parse()
263 switch (bios->version.chip) { nvbios_pll_parse()
282 switch (bios->version.chip) { nvbios_pll_parse()
296 info->vco1.min_freq = nvbios_rd16(bios, data + 4) * 1000; nvbios_pll_parse()
297 info->vco1.max_freq = nvbios_rd16(bios, data + 6) * 1000; nvbios_pll_parse()
298 info->vco2.min_freq = nvbios_rd16(bios, data + 8) * 1000; nvbios_pll_parse()
299 info->vco2.max_freq = nvbios_rd16(bios, data + 10) * 1000; nvbios_pll_parse()
300 info->vco1.min_inputfreq = nvbios_rd16(bios, data + 12) * 1000; nvbios_pll_parse()
301 info->vco2.min_inputfreq = nvbios_rd16(bios, data + 14) * 1000; nvbios_pll_parse()
302 info->vco1.max_inputfreq = nvbios_rd16(bios, data + 16) * 1000; nvbios_pll_parse()
303 info->vco2.max_inputfreq = nvbios_rd16(bios, data + 18) * 1000; nvbios_pll_parse()
304 info->vco1.min_n = nvbios_rd08(bios, data + 20); nvbios_pll_parse()
305 info->vco1.max_n = nvbios_rd08(bios, data + 21); nvbios_pll_parse()
306 info->vco1.min_m = nvbios_rd08(bios, data + 22); nvbios_pll_parse()
307 info->vco1.max_m = nvbios_rd08(bios, data + 23); nvbios_pll_parse()
308 info->vco2.min_n = nvbios_rd08(bios, data + 24); nvbios_pll_parse()
309 info->vco2.max_n = nvbios_rd08(bios, data + 25); nvbios_pll_parse()
310 info->vco2.min_m = nvbios_rd08(bios, data + 26); nvbios_pll_parse()
311 info->vco2.max_m = nvbios_rd08(bios, data + 27); nvbios_pll_parse()
313 info->max_p = nvbios_rd08(bios, data + 29); nvbios_pll_parse()
315 if (bios->version.chip < 0x60) nvbios_pll_parse()
317 info->bias_p = nvbios_rd08(bios, data + 30); nvbios_pll_parse()
320 info->refclk = nvbios_rd32(bios, data + 31); nvbios_pll_parse()
323 data = nvbios_rd16(bios, data + 1); nvbios_pll_parse()
325 info->vco1.min_freq = nvbios_rd16(bios, data + 0) * 1000; nvbios_pll_parse()
326 info->vco1.max_freq = nvbios_rd16(bios, data + 2) * 1000; nvbios_pll_parse()
327 info->vco2.min_freq = nvbios_rd16(bios, data + 4) * 1000; nvbios_pll_parse()
328 info->vco2.max_freq = nvbios_rd16(bios, data + 6) * 1000; nvbios_pll_parse()
329 info->vco1.min_inputfreq = nvbios_rd16(bios, data + 8) * 1000; nvbios_pll_parse()
330 info->vco2.min_inputfreq = nvbios_rd16(bios, data + 10) * 1000; nvbios_pll_parse()
331 info->vco1.max_inputfreq = nvbios_rd16(bios, data + 12) * 1000; nvbios_pll_parse()
332 info->vco2.max_inputfreq = nvbios_rd16(bios, data + 14) * 1000; nvbios_pll_parse()
333 info->vco1.min_n = nvbios_rd08(bios, data + 16); nvbios_pll_parse()
334 info->vco1.max_n = nvbios_rd08(bios, data + 17); nvbios_pll_parse()
335 info->vco1.min_m = nvbios_rd08(bios, data + 18); nvbios_pll_parse()
336 info->vco1.max_m = nvbios_rd08(bios, data + 19); nvbios_pll_parse()
337 info->vco2.min_n = nvbios_rd08(bios, data + 20); nvbios_pll_parse()
338 info->vco2.max_n = nvbios_rd08(bios, data + 21); nvbios_pll_parse()
339 info->vco2.min_m = nvbios_rd08(bios, data + 22); nvbios_pll_parse()
340 info->vco2.max_m = nvbios_rd08(bios, data + 23); nvbios_pll_parse()
341 info->max_p_usable = info->max_p = nvbios_rd08(bios, data + 25); nvbios_pll_parse()
342 info->bias_p = nvbios_rd08(bios, data + 27); nvbios_pll_parse()
343 info->refclk = nvbios_rd32(bios, data + 28); nvbios_pll_parse()
346 info->refclk = nvbios_rd16(bios, data + 9) * 1000; nvbios_pll_parse()
347 data = nvbios_rd16(bios, data + 1); nvbios_pll_parse()
349 info->vco1.min_freq = nvbios_rd16(bios, data + 0) * 1000; nvbios_pll_parse()
350 info->vco1.max_freq = nvbios_rd16(bios, data + 2) * 1000; nvbios_pll_parse()
351 info->vco1.min_inputfreq = nvbios_rd16(bios, data + 4) * 1000; nvbios_pll_parse()
352 info->vco1.max_inputfreq = nvbios_rd16(bios, data + 6) * 1000; nvbios_pll_parse()
353 info->vco1.min_m = nvbios_rd08(bios, data + 8); nvbios_pll_parse()
354 info->vco1.max_m = nvbios_rd08(bios, data + 9); nvbios_pll_parse()
355 info->vco1.min_n = nvbios_rd08(bios, data + 10); nvbios_pll_parse()
356 info->vco1.max_n = nvbios_rd08(bios, data + 11); nvbios_pll_parse()
357 info->min_p = nvbios_rd08(bios, data + 12); nvbios_pll_parse()
358 info->max_p = nvbios_rd08(bios, data + 13); nvbios_pll_parse()
367 if (bios->version.chip == 0x51) { nvbios_pll_parse()
381 * vco1, so if it's zero it's either a pre limit table bios, or one nvbios_pll_parse()
385 info->vco1.max_freq = nvbios_rd32(bios, bios->bmp_offset + 67); nvbios_pll_parse()
386 info->vco1.min_freq = nvbios_rd32(bios, bios->bmp_offset + 71); nvbios_pll_parse()
387 if (bmp_version(bios) < 0x0506) { nvbios_pll_parse()
400 if (bios->version.chip < 0x11) nvbios_pll_parse()
404 if (bios->version.chip < 0x11) nvbios_pll_parse()
409 if (bios->version.chip < 0x17 || nvbios_pll_parse()
410 bios->version.chip == 0x1a || nvbios_pll_parse()
411 bios->version.chip == 0x20) nvbios_pll_parse()
H A Dvmap.c24 #include <subdev/bios.h>
25 #include <subdev/bios/bit.h>
26 #include <subdev/bios/vmap.h>
29 nvbios_vmap_table(struct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len) nvbios_vmap_table() argument
34 if (!bit_entry(bios, 'P', &bit_P)) { nvbios_vmap_table()
36 vmap = nvbios_rd16(bios, bit_P.offset + 0x20); nvbios_vmap_table()
38 *ver = nvbios_rd08(bios, vmap + 0); nvbios_vmap_table()
42 *hdr = nvbios_rd08(bios, vmap + 1); nvbios_vmap_table()
43 *cnt = nvbios_rd08(bios, vmap + 3); nvbios_vmap_table()
44 *len = nvbios_rd08(bios, vmap + 2); nvbios_vmap_table()
57 nvbios_vmap_parse(struct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len, nvbios_vmap_parse() argument
60 u16 vmap = nvbios_vmap_table(bios, ver, hdr, cnt, len); nvbios_vmap_parse()
71 nvbios_vmap_entry(struct nvkm_bios *bios, int idx, u8 *ver, u8 *len) nvbios_vmap_entry() argument
74 u16 vmap = nvbios_vmap_table(bios, ver, &hdr, &cnt, len); nvbios_vmap_entry()
83 nvbios_vmap_entry_parse(struct nvkm_bios *bios, int idx, u8 *ver, u8 *len, nvbios_vmap_entry_parse() argument
86 u16 vmap = nvbios_vmap_entry(bios, idx, ver, len); nvbios_vmap_entry_parse()
91 info->min = nvbios_rd32(bios, vmap + 0x00); nvbios_vmap_entry_parse()
92 info->max = nvbios_rd32(bios, vmap + 0x04); nvbios_vmap_entry_parse()
93 info->arg[0] = nvbios_rd32(bios, vmap + 0x08); nvbios_vmap_entry_parse()
94 info->arg[1] = nvbios_rd32(bios, vmap + 0x0c); nvbios_vmap_entry_parse()
95 info->arg[2] = nvbios_rd32(bios, vmap + 0x10); nvbios_vmap_entry_parse()
98 info->unk0 = nvbios_rd08(bios, vmap + 0x00); nvbios_vmap_entry_parse()
99 info->link = nvbios_rd08(bios, vmap + 0x01); nvbios_vmap_entry_parse()
100 info->min = nvbios_rd32(bios, vmap + 0x02); nvbios_vmap_entry_parse()
101 info->max = nvbios_rd32(bios, vmap + 0x06); nvbios_vmap_entry_parse()
102 info->arg[0] = nvbios_rd32(bios, vmap + 0x0a); nvbios_vmap_entry_parse()
103 info->arg[1] = nvbios_rd32(bios, vmap + 0x0e); nvbios_vmap_entry_parse()
104 info->arg[2] = nvbios_rd32(bios, vmap + 0x12); nvbios_vmap_entry_parse()
105 info->arg[3] = nvbios_rd32(bios, vmap + 0x16); nvbios_vmap_entry_parse()
106 info->arg[4] = nvbios_rd32(bios, vmap + 0x1a); nvbios_vmap_entry_parse()
107 info->arg[5] = nvbios_rd32(bios, vmap + 0x1e); nvbios_vmap_entry_parse()
H A Dvolt.c24 #include <subdev/bios.h>
25 #include <subdev/bios/bit.h>
26 #include <subdev/bios/volt.h>
29 nvbios_volt_table(struct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len) nvbios_volt_table() argument
34 if (!bit_entry(bios, 'P', &bit_P)) { nvbios_volt_table()
36 volt = nvbios_rd16(bios, bit_P.offset + 0x0c); nvbios_volt_table()
39 volt = nvbios_rd16(bios, bit_P.offset + 0x10); nvbios_volt_table()
42 *ver = nvbios_rd08(bios, volt + 0); nvbios_volt_table()
46 *cnt = nvbios_rd08(bios, volt + 2); nvbios_volt_table()
47 *len = nvbios_rd08(bios, volt + 1); nvbios_volt_table()
50 *hdr = nvbios_rd08(bios, volt + 1); nvbios_volt_table()
51 *cnt = nvbios_rd08(bios, volt + 2); nvbios_volt_table()
52 *len = nvbios_rd08(bios, volt + 3); nvbios_volt_table()
57 *hdr = nvbios_rd08(bios, volt + 1); nvbios_volt_table()
58 *cnt = nvbios_rd08(bios, volt + 3); nvbios_volt_table()
59 *len = nvbios_rd08(bios, volt + 2); nvbios_volt_table()
69 nvbios_volt_parse(struct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len, nvbios_volt_parse() argument
72 u16 volt = nvbios_volt_table(bios, ver, hdr, cnt, len); nvbios_volt_parse()
77 info->vidmask = nvbios_rd08(bios, volt + 0x04); nvbios_volt_parse()
81 info->vidmask = nvbios_rd08(bios, volt + 0x05); nvbios_volt_parse()
85 info->vidmask = nvbios_rd08(bios, volt + 0x04); nvbios_volt_parse()
89 info->base = nvbios_rd32(bios, volt + 0x04); nvbios_volt_parse()
90 info->step = nvbios_rd16(bios, volt + 0x08); nvbios_volt_parse()
91 info->vidmask = nvbios_rd08(bios, volt + 0x0b); nvbios_volt_parse()
97 info->min = nvbios_rd32(bios, volt + 0x0a); nvbios_volt_parse()
98 info->max = nvbios_rd32(bios, volt + 0x0e); nvbios_volt_parse()
99 info->base = nvbios_rd32(bios, volt + 0x12) & 0x00ffffff; nvbios_volt_parse()
102 if (nvbios_rd32(bios, volt + 0x4) & 1) { nvbios_volt_parse()
104 info->pwm_freq = nvbios_rd32(bios, volt + 0x5) / 1000; nvbios_volt_parse()
105 info->pwm_range = nvbios_rd32(bios, volt + 0x16); nvbios_volt_parse()
108 info->vidmask = nvbios_rd08(bios, volt + 0x06); nvbios_volt_parse()
109 info->step = nvbios_rd16(bios, volt + 0x16); nvbios_volt_parse()
117 nvbios_volt_entry(struct nvkm_bios *bios, int idx, u8 *ver, u8 *len) nvbios_volt_entry() argument
120 u16 volt = nvbios_volt_table(bios, ver, &hdr, &cnt, len); nvbios_volt_entry()
129 nvbios_volt_entry_parse(struct nvkm_bios *bios, int idx, u8 *ver, u8 *len, nvbios_volt_entry_parse() argument
132 u16 volt = nvbios_volt_entry(bios, idx, ver, len); nvbios_volt_entry_parse()
137 info->voltage = nvbios_rd08(bios, volt + 0x00) * 10000; nvbios_volt_entry_parse()
138 info->vid = nvbios_rd08(bios, volt + 0x01); nvbios_volt_entry_parse()
141 info->voltage = nvbios_rd08(bios, volt + 0x00) * 10000; nvbios_volt_entry_parse()
142 info->vid = nvbios_rd08(bios, volt + 0x01) >> 2; nvbios_volt_entry_parse()
H A Dperf.c24 #include <subdev/bios.h>
25 #include <subdev/bios/bit.h>
26 #include <subdev/bios/perf.h>
29 nvbios_perf_table(struct nvkm_bios *bios, u8 *ver, u8 *hdr, nvbios_perf_table() argument
35 if (!bit_entry(bios, 'P', &bit_P)) { nvbios_perf_table()
37 perf = nvbios_rd16(bios, bit_P.offset + 0); nvbios_perf_table()
39 *ver = nvbios_rd08(bios, perf + 0); nvbios_perf_table()
40 *hdr = nvbios_rd08(bios, perf + 1); nvbios_perf_table()
42 *cnt = nvbios_rd08(bios, perf + 5); nvbios_perf_table()
43 *len = nvbios_rd08(bios, perf + 2); nvbios_perf_table()
44 *snr = nvbios_rd08(bios, perf + 4); nvbios_perf_table()
45 *ssz = nvbios_rd08(bios, perf + 3); nvbios_perf_table()
49 *cnt = nvbios_rd08(bios, perf + 2); nvbios_perf_table()
50 *len = nvbios_rd08(bios, perf + 3); nvbios_perf_table()
51 *snr = nvbios_rd08(bios, perf + 4); nvbios_perf_table()
52 *ssz = nvbios_rd08(bios, perf + 5); nvbios_perf_table()
59 if (bios->bmp_offset) { nvbios_perf_table()
60 if (nvbios_rd08(bios, bios->bmp_offset + 6) >= 0x25) { nvbios_perf_table()
61 perf = nvbios_rd16(bios, bios->bmp_offset + 0x94); nvbios_perf_table()
63 *hdr = nvbios_rd08(bios, perf + 0); nvbios_perf_table()
64 *ver = nvbios_rd08(bios, perf + 1); nvbios_perf_table()
65 *cnt = nvbios_rd08(bios, perf + 2); nvbios_perf_table()
66 *len = nvbios_rd08(bios, perf + 3); nvbios_perf_table()
78 nvbios_perf_entry(struct nvkm_bios *bios, int idx, nvbios_perf_entry() argument
82 u16 perf = nvbios_perf_table(bios, ver, hdr, cnt, len, &snr, &ssz); nvbios_perf_entry()
94 nvbios_perfEp(struct nvkm_bios *bios, int idx, nvbios_perfEp() argument
97 u16 perf = nvbios_perf_entry(bios, idx, ver, hdr, cnt, len); nvbios_perfEp()
99 info->pstate = nvbios_rd08(bios, perf + 0x00); nvbios_perfEp()
104 info->core = nvbios_rd32(bios, perf + 0x01) * 10; nvbios_perfEp()
105 info->memory = nvbios_rd32(bios, perf + 0x05) * 20; nvbios_perfEp()
106 info->fanspeed = nvbios_rd08(bios, perf + 0x37); nvbios_perfEp()
108 info->voltage = nvbios_rd08(bios, perf + 0x38); nvbios_perfEp()
113 info->fanspeed = nvbios_rd08(bios, perf + 0x04); nvbios_perfEp()
114 info->voltage = nvbios_rd08(bios, perf + 0x05); nvbios_perfEp()
115 info->shader = nvbios_rd16(bios, perf + 0x06) * 1000; nvbios_perfEp()
117 nvbios_rd08(bios, perf + 0x08) * 1000; nvbios_perfEp()
118 switch (bios->subdev.device->chipset) { nvbios_perfEp()
121 info->memory = nvbios_rd16(bios, perf + 0x0b) * 1000; nvbios_perfEp()
124 info->memory = nvbios_rd16(bios, perf + 0x0b) * 2000; nvbios_perfEp()
129 info->fanspeed = nvbios_rd08(bios, perf + 0x04); nvbios_perfEp()
130 info->voltage = nvbios_rd08(bios, perf + 0x05); nvbios_perfEp()
131 info->core = nvbios_rd16(bios, perf + 0x06) * 1000; nvbios_perfEp()
132 info->shader = nvbios_rd16(bios, perf + 0x0a) * 1000; nvbios_perfEp()
133 info->memory = nvbios_rd16(bios, perf + 0x0c) * 1000; nvbios_perfEp()
136 info->script = nvbios_rd16(bios, perf + 0x02); nvbios_perfEp()
138 info->fanspeed = nvbios_rd08(bios, perf + 0x06); nvbios_perfEp()
139 info->voltage = nvbios_rd08(bios, perf + 0x07); nvbios_perfEp()
140 info->core = nvbios_rd16(bios, perf + 0x08) * 1000; nvbios_perfEp()
141 info->shader = nvbios_rd16(bios, perf + 0x0a) * 1000; nvbios_perfEp()
142 info->memory = nvbios_rd16(bios, perf + 0x0c) * 1000; nvbios_perfEp()
143 info->vdec = nvbios_rd16(bios, perf + 0x10) * 1000; nvbios_perfEp()
144 info->disp = nvbios_rd16(bios, perf + 0x14) * 1000; nvbios_perfEp()
147 info->voltage = nvbios_rd08(bios, perf + 0x02); nvbios_perfEp()
156 nvbios_perfSe(struct nvkm_bios *bios, u32 perfE, int idx, nvbios_perfSe() argument
168 nvbios_perfSp(struct nvkm_bios *bios, u32 perfE, int idx, nvbios_perfSp() argument
172 u32 data = nvbios_perfSe(bios, perfE, idx, ver, hdr, cnt, len); nvbios_perfSp()
176 info->v40.freq = (nvbios_rd16(bios, data + 0x00) & 0x3fff) * 1000; nvbios_perfSp()
185 nvbios_perf_fan_parse(struct nvkm_bios *bios, nvbios_perf_fan_parse() argument
189 u16 perf = nvbios_perf_table(bios, &ver, &hdr, &cnt, &len, &snr, &ssz); nvbios_perf_fan_parse()
194 fan->pwm_divisor = nvbios_rd16(bios, perf + 6); nvbios_perf_fan_parse()
H A Dpcir.c24 #include <subdev/bios.h>
25 #include <subdev/bios/pcir.h>
28 nvbios_pcirTe(struct nvkm_bios *bios, u32 base, u8 *ver, u16 *hdr) nvbios_pcirTe() argument
30 u32 data = nvbios_rd16(bios, base + 0x18); nvbios_pcirTe()
33 switch (nvbios_rd32(bios, data + 0x00)) { nvbios_pcirTe()
37 *hdr = nvbios_rd16(bios, data + 0x0a); nvbios_pcirTe()
38 *ver = nvbios_rd08(bios, data + 0x0c); nvbios_pcirTe()
41 nvkm_debug(&bios->subdev, nvbios_pcirTe()
43 data, nvbios_rd32(bios, data + 0x00)); nvbios_pcirTe()
52 nvbios_pcirTp(struct nvkm_bios *bios, u32 base, u8 *ver, u16 *hdr, nvbios_pcirTp() argument
55 u32 data = nvbios_pcirTe(bios, base, ver, hdr); nvbios_pcirTp()
58 info->vendor_id = nvbios_rd16(bios, data + 0x04); nvbios_pcirTp()
59 info->device_id = nvbios_rd16(bios, data + 0x06); nvbios_pcirTp()
60 info->class_code[0] = nvbios_rd08(bios, data + 0x0d); nvbios_pcirTp()
61 info->class_code[1] = nvbios_rd08(bios, data + 0x0e); nvbios_pcirTp()
62 info->class_code[2] = nvbios_rd08(bios, data + 0x0f); nvbios_pcirTp()
63 info->image_size = nvbios_rd16(bios, data + 0x10) * 512; nvbios_pcirTp()
64 info->image_rev = nvbios_rd16(bios, data + 0x12); nvbios_pcirTp()
65 info->image_type = nvbios_rd08(bios, data + 0x14); nvbios_pcirTp()
66 info->last = nvbios_rd08(bios, data + 0x15) & 0x80; nvbios_pcirTp()
H A Ddisp.c24 #include <subdev/bios.h>
25 #include <subdev/bios/bit.h>
26 #include <subdev/bios/disp.h>
29 nvbios_disp_table(struct nvkm_bios *bios, nvbios_disp_table() argument
34 if (!bit_entry(bios, 'U', &U)) { nvbios_disp_table()
36 u16 data = nvbios_rd16(bios, U.offset); nvbios_disp_table()
38 *ver = nvbios_rd08(bios, data + 0x00); nvbios_disp_table()
43 *hdr = nvbios_rd08(bios, data + 0x01); nvbios_disp_table()
44 *len = nvbios_rd08(bios, data + 0x02); nvbios_disp_table()
45 *cnt = nvbios_rd08(bios, data + 0x03); nvbios_disp_table()
46 *sub = nvbios_rd08(bios, data + 0x04); nvbios_disp_table()
59 nvbios_disp_entry(struct nvkm_bios *bios, u8 idx, u8 *ver, u8 *len, u8 *sub) nvbios_disp_entry() argument
62 u16 data = nvbios_disp_table(bios, ver, &hdr, &cnt, len, sub); nvbios_disp_entry()
70 nvbios_disp_parse(struct nvkm_bios *bios, u8 idx, u8 *ver, u8 *len, u8 *sub, nvbios_disp_parse() argument
73 u16 data = nvbios_disp_entry(bios, idx, ver, len, sub); nvbios_disp_parse()
75 info->data = nvbios_rd16(bios, data + 0); nvbios_disp_parse()
82 nvbios_outp_entry(struct nvkm_bios *bios, u8 idx, nvbios_outp_entry() argument
86 u16 data = nvbios_disp_parse(bios, idx, ver, len, hdr, &info); nvbios_outp_entry()
88 *cnt = nvbios_rd08(bios, info.data + 0x05); nvbios_outp_entry()
96 nvbios_outp_parse(struct nvkm_bios *bios, u8 idx, nvbios_outp_parse() argument
99 u16 data = nvbios_outp_entry(bios, idx, ver, hdr, cnt, len); nvbios_outp_parse()
101 info->type = nvbios_rd16(bios, data + 0x00); nvbios_outp_parse()
102 info->mask = nvbios_rd32(bios, data + 0x02); nvbios_outp_parse()
105 info->script[0] = nvbios_rd16(bios, data + 0x06); nvbios_outp_parse()
106 info->script[1] = nvbios_rd16(bios, data + 0x08); nvbios_outp_parse()
109 info->script[2] = nvbios_rd16(bios, data + 0x0a); nvbios_outp_parse()
116 nvbios_outp_match(struct nvkm_bios *bios, u16 type, u16 mask, nvbios_outp_match() argument
120 while ((data = nvbios_outp_parse(bios, idx++, ver, hdr, cnt, len, info)) || *ver) { nvbios_outp_match()
130 nvbios_ocfg_entry(struct nvkm_bios *bios, u16 outp, u8 idx, nvbios_ocfg_entry() argument
139 nvbios_ocfg_parse(struct nvkm_bios *bios, u16 outp, u8 idx, nvbios_ocfg_parse() argument
142 u16 data = nvbios_ocfg_entry(bios, outp, idx, ver, hdr, cnt, len); nvbios_ocfg_parse()
144 info->match = nvbios_rd16(bios, data + 0x00); nvbios_ocfg_parse()
145 info->clkcmp[0] = nvbios_rd16(bios, data + 0x02); nvbios_ocfg_parse()
146 info->clkcmp[1] = nvbios_rd16(bios, data + 0x04); nvbios_ocfg_parse()
152 nvbios_ocfg_match(struct nvkm_bios *bios, u16 outp, u16 type, nvbios_ocfg_match() argument
156 while ((data = nvbios_ocfg_parse(bios, outp, idx++, ver, hdr, cnt, len, info))) { nvbios_ocfg_match()
164 nvbios_oclk_match(struct nvkm_bios *bios, u16 cmp, u32 khz) nvbios_oclk_match() argument
167 if (khz / 10 >= nvbios_rd16(bios, cmp + 0x00)) nvbios_oclk_match()
168 return nvbios_rd16(bios, cmp + 0x02); nvbios_oclk_match()
H A Di2c.c24 #include <subdev/bios.h>
25 #include <subdev/bios/dcb.h>
26 #include <subdev/bios/i2c.h>
29 dcb_i2c_table(struct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len) dcb_i2c_table() argument
32 u16 dcb = dcb_table(bios, ver, hdr, cnt, len); dcb_i2c_table()
35 i2c = nvbios_rd16(bios, dcb + 2); dcb_i2c_table()
37 i2c = nvbios_rd16(bios, dcb + 4); dcb_i2c_table()
41 nvkm_warn(&bios->subdev, "ccb %02x not supported\n", *ver); dcb_i2c_table()
46 *ver = nvbios_rd08(bios, i2c + 0); dcb_i2c_table()
47 *hdr = nvbios_rd08(bios, i2c + 1); dcb_i2c_table()
48 *cnt = nvbios_rd08(bios, i2c + 2); dcb_i2c_table()
49 *len = nvbios_rd08(bios, i2c + 3); dcb_i2c_table()
61 dcb_i2c_entry(struct nvkm_bios *bios, u8 idx, u8 *ver, u8 *len) dcb_i2c_entry() argument
64 u16 i2c = dcb_i2c_table(bios, ver, &hdr, &cnt, len); dcb_i2c_entry()
71 dcb_i2c_parse(struct nvkm_bios *bios, u8 idx, struct dcb_i2c_entry *info) dcb_i2c_parse() argument
73 struct nvkm_subdev *subdev = &bios->subdev; dcb_i2c_parse()
75 u16 ent = dcb_i2c_entry(bios, idx, &ver, &len); dcb_i2c_parse()
78 u32 ent_value = nvbios_rd32(bios, ent); dcb_i2c_parse()
88 info->type = nvbios_rd08(bios, ent + 0x03); dcb_i2c_parse()
90 info->type = nvbios_rd08(bios, ent + 0x03) & 0x07; dcb_i2c_parse()
102 info->drive = nvbios_rd08(bios, ent + 0); dcb_i2c_parse()
103 info->sense = nvbios_rd08(bios, ent + 1); dcb_i2c_parse()
106 info->drive = nvbios_rd08(bios, ent + 1); dcb_i2c_parse()
109 info->drive = nvbios_rd08(bios, ent + 0) & 0x0f; dcb_i2c_parse()
110 if (nvbios_rd08(bios, ent + 1) & 0x01) dcb_i2c_parse()
111 info->share = nvbios_rd08(bios, ent + 1) >> 1; dcb_i2c_parse()
114 info->auxch = nvbios_rd08(bios, ent + 0) & 0x0f; dcb_i2c_parse()
115 if (nvbios_rd08(bios, ent + 1) & 0x01) dcb_i2c_parse()
119 info->drive = (nvbios_rd16(bios, ent + 0) & 0x01f) >> 0; dcb_i2c_parse()
122 info->auxch = (nvbios_rd16(bios, ent + 0) & 0x3e0) >> 5; dcb_i2c_parse()
136 if (bios->bmp_offset && idx < 2) { dcb_i2c_parse()
140 if (nvbios_rd08(bios, bios->bmp_offset + 5) < 4) dcb_i2c_parse()
143 ent = 0x0036 + bios->bmp_offset; dcb_i2c_parse()
146 info->drive = nvbios_rd08(bios, ent + 4); dcb_i2c_parse()
148 info->sense = nvbios_rd08(bios, ent + 5); dcb_i2c_parse()
152 info->drive = nvbios_rd08(bios, ent + 6); dcb_i2c_parse()
154 info->sense = nvbios_rd08(bios, ent + 7); dcb_i2c_parse()
H A Dconn.c24 #include <subdev/bios.h>
25 #include <subdev/bios/dcb.h>
26 #include <subdev/bios/conn.h>
29 nvbios_connTe(struct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len) nvbios_connTe() argument
31 u32 dcb = dcb_table(bios, ver, hdr, cnt, len); nvbios_connTe()
33 u32 data = nvbios_rd16(bios, dcb + 0x14); nvbios_connTe()
35 *ver = nvbios_rd08(bios, data + 0); nvbios_connTe()
36 *hdr = nvbios_rd08(bios, data + 1); nvbios_connTe()
37 *cnt = nvbios_rd08(bios, data + 2); nvbios_connTe()
38 *len = nvbios_rd08(bios, data + 3); nvbios_connTe()
46 nvbios_connTp(struct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len, nvbios_connTp() argument
49 u32 data = nvbios_connTe(bios, ver, hdr, cnt, len); nvbios_connTp()
62 nvbios_connEe(struct nvkm_bios *bios, u8 idx, u8 *ver, u8 *len) nvbios_connEe() argument
65 u32 data = nvbios_connTe(bios, ver, &hdr, &cnt, len); nvbios_connEe()
72 nvbios_connEp(struct nvkm_bios *bios, u8 idx, u8 *ver, u8 *len, nvbios_connEp() argument
75 u32 data = nvbios_connEe(bios, idx, ver, len); nvbios_connEp()
80 info->type = nvbios_rd08(bios, data + 0x00); nvbios_connEp()
81 info->location = nvbios_rd08(bios, data + 0x01) & 0x0f; nvbios_connEp()
82 info->hpd = (nvbios_rd08(bios, data + 0x01) & 0x30) >> 4; nvbios_connEp()
83 info->dp = (nvbios_rd08(bios, data + 0x01) & 0xc0) >> 6; nvbios_connEp()
86 info->hpd |= (nvbios_rd08(bios, data + 0x02) & 0x03) << 2; nvbios_connEp()
87 info->dp |= nvbios_rd08(bios, data + 0x02) & 0x0c; nvbios_connEp()
88 info->di = (nvbios_rd08(bios, data + 0x02) & 0xf0) >> 4; nvbios_connEp()
89 info->hpd |= (nvbios_rd08(bios, data + 0x03) & 0x07) << 4; nvbios_connEp()
90 info->sr = (nvbios_rd08(bios, data + 0x03) & 0x08) >> 3; nvbios_connEp()
91 info->lcdid = (nvbios_rd08(bios, data + 0x03) & 0x70) >> 4; nvbios_connEp()
H A Ddp.c24 #include <subdev/bios.h>
25 #include <subdev/bios/bit.h>
26 #include <subdev/bios/dp.h>
29 nvbios_dp_table(struct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len) nvbios_dp_table() argument
33 if (!bit_entry(bios, 'd', &d)) { nvbios_dp_table()
35 u16 data = nvbios_rd16(bios, d.offset); nvbios_dp_table()
37 *ver = nvbios_rd08(bios, data + 0x00); nvbios_dp_table()
43 *hdr = nvbios_rd08(bios, data + 0x01); nvbios_dp_table()
44 *len = nvbios_rd08(bios, data + 0x02); nvbios_dp_table()
45 *cnt = nvbios_rd08(bios, data + 0x03); nvbios_dp_table()
58 nvbios_dpout_entry(struct nvkm_bios *bios, u8 idx, nvbios_dpout_entry() argument
61 u16 data = nvbios_dp_table(bios, ver, hdr, cnt, len); nvbios_dpout_entry()
63 u16 outp = nvbios_rd16(bios, data + *hdr + idx * *len); nvbios_dpout_entry()
67 *hdr = nvbios_rd08(bios, data + 0x04); nvbios_dpout_entry()
68 *len = nvbios_rd08(bios, data + 0x05); nvbios_dpout_entry()
69 *cnt = nvbios_rd08(bios, outp + 0x04); nvbios_dpout_entry()
73 *hdr = nvbios_rd08(bios, data + 0x04); nvbios_dpout_entry()
87 nvbios_dpout_parse(struct nvkm_bios *bios, u8 idx, nvbios_dpout_parse() argument
91 u16 data = nvbios_dpout_entry(bios, idx, ver, hdr, cnt, len); nvbios_dpout_parse()
94 info->type = nvbios_rd16(bios, data + 0x00); nvbios_dpout_parse()
95 info->mask = nvbios_rd16(bios, data + 0x02); nvbios_dpout_parse()
99 info->flags = nvbios_rd08(bios, data + 0x05); nvbios_dpout_parse()
100 info->script[0] = nvbios_rd16(bios, data + 0x06); nvbios_dpout_parse()
101 info->script[1] = nvbios_rd16(bios, data + 0x08); nvbios_dpout_parse()
102 info->lnkcmp = nvbios_rd16(bios, data + 0x0a); nvbios_dpout_parse()
104 info->script[2] = nvbios_rd16(bios, data + 0x0c); nvbios_dpout_parse()
105 info->script[3] = nvbios_rd16(bios, data + 0x0e); nvbios_dpout_parse()
108 info->script[4] = nvbios_rd16(bios, data + 0x10); nvbios_dpout_parse()
112 info->flags = nvbios_rd08(bios, data + 0x04); nvbios_dpout_parse()
113 info->script[0] = nvbios_rd16(bios, data + 0x05); nvbios_dpout_parse()
114 info->script[1] = nvbios_rd16(bios, data + 0x07); nvbios_dpout_parse()
115 info->lnkcmp = nvbios_rd16(bios, data + 0x09); nvbios_dpout_parse()
116 info->script[2] = nvbios_rd16(bios, data + 0x0b); nvbios_dpout_parse()
117 info->script[3] = nvbios_rd16(bios, data + 0x0d); nvbios_dpout_parse()
118 info->script[4] = nvbios_rd16(bios, data + 0x0f); nvbios_dpout_parse()
129 nvbios_dpout_match(struct nvkm_bios *bios, u16 type, u16 mask, nvbios_dpout_match() argument
134 while ((data = nvbios_dpout_parse(bios, idx++, ver, hdr, cnt, len, info)) || *ver) { nvbios_dpout_match()
144 nvbios_dpcfg_entry(struct nvkm_bios *bios, u16 outp, u8 idx, nvbios_dpcfg_entry() argument
148 outp = nvbios_dp_table(bios, ver, hdr, cnt, len); nvbios_dpcfg_entry()
150 *len = nvbios_rd08(bios, outp + 0x06); nvbios_dpcfg_entry()
151 *cnt = nvbios_rd08(bios, outp + 0x07) * nvbios_dpcfg_entry()
152 nvbios_rd08(bios, outp + 0x05); nvbios_dpcfg_entry()
162 nvbios_dpcfg_parse(struct nvkm_bios *bios, u16 outp, u8 idx, nvbios_dpcfg_parse() argument
166 u16 data = nvbios_dpcfg_entry(bios, outp, idx, ver, hdr, cnt, len); nvbios_dpcfg_parse()
171 info->dc = nvbios_rd08(bios, data + 0x02); nvbios_dpcfg_parse()
172 info->pe = nvbios_rd08(bios, data + 0x03); nvbios_dpcfg_parse()
173 info->tx_pu = nvbios_rd08(bios, data + 0x04); nvbios_dpcfg_parse()
178 info->pc = nvbios_rd08(bios, data + 0x00); nvbios_dpcfg_parse()
179 info->dc = nvbios_rd08(bios, data + 0x01); nvbios_dpcfg_parse()
180 info->pe = nvbios_rd08(bios, data + 0x02); nvbios_dpcfg_parse()
181 info->tx_pu = nvbios_rd08(bios, data + 0x03); nvbios_dpcfg_parse()
192 nvbios_dpcfg_match(struct nvkm_bios *bios, u16 outp, u8 pc, u8 vs, u8 pe, nvbios_dpcfg_match() argument
203 idx += nvbios_rd08(bios, outp + 0x11) * 40; nvbios_dpcfg_match()
205 while ((data = nvbios_dpcfg_entry(bios, outp, ++idx, nvbios_dpcfg_match()
207 if (nvbios_rd08(bios, data + 0x00) == vs && nvbios_dpcfg_match()
208 nvbios_rd08(bios, data + 0x01) == pe) nvbios_dpcfg_match()
213 return nvbios_dpcfg_parse(bios, outp, idx, ver, hdr, cnt, len, info); nvbios_dpcfg_match()
H A Dbit.c24 #include <subdev/bios.h>
25 #include <subdev/bios/bit.h>
28 bit_entry(struct nvkm_bios *bios, u8 id, struct bit_entry *bit) bit_entry() argument
30 if (likely(bios->bit_offset)) { bit_entry()
31 u8 entries = nvbios_rd08(bios, bios->bit_offset + 10); bit_entry()
32 u32 entry = bios->bit_offset + 12; bit_entry()
34 if (nvbios_rd08(bios, entry + 0) == id) { bit_entry()
35 bit->id = nvbios_rd08(bios, entry + 0); bit_entry()
36 bit->version = nvbios_rd08(bios, entry + 1); bit_entry()
37 bit->length = nvbios_rd16(bios, entry + 2); bit_entry()
38 bit->offset = nvbios_rd16(bios, entry + 4); bit_entry()
42 entry += nvbios_rd08(bios, bios->bit_offset + 9); bit_entry()
H A Dinit.c24 #include <subdev/bios.h>
25 #include <subdev/bios/bit.h>
26 #include <subdev/bios/bmp.h>
27 #include <subdev/bios/conn.h>
28 #include <subdev/bios/dcb.h>
29 #include <subdev/bios/dp.h>
30 #include <subdev/bios/gpio.h>
31 #include <subdev/bios/init.h>
32 #include <subdev/bios/ramcfg.h>
122 struct nvkm_bios *bios = init->bios; init_conn() local
130 conn = nvbios_connEp(bios, conn, &ver, &hdr, &connE); init_conn()
144 struct nvkm_devinit *devinit = init->bios->subdev.device->devinit; init_nvreg()
157 if (init->bios->subdev.device->card_type >= NV_50) { init_nvreg()
182 struct nvkm_device *device = init->bios->subdev.device; init_rd32()
192 struct nvkm_device *device = init->bios->subdev.device; init_wr32()
201 struct nvkm_device *device = init->bios->subdev.device; init_mask()
263 struct nvkm_i2c *i2c = init->bios->subdev.device->i2c; init_i2c()
303 struct nvkm_i2c *i2c = init->bios->subdev.device->i2c; init_aux()
344 struct nvkm_devinit *devinit = init->bios->subdev.device->devinit; init_prog_pll()
353 * parsing of bios structures that are required to execute init tables
357 init_table(struct nvkm_bios *bios, u16 *len) init_table() argument
361 if (!bit_entry(bios, 'I', &bit_I)) { init_table()
366 if (bmp_version(bios) >= 0x0510) { init_table()
368 return bios->bmp_offset + 75; init_table()
377 struct nvkm_bios *bios = init->bios; init_table_() local
378 u16 len, data = init_table(bios, &len); init_table_()
381 data = nvbios_rd16(bios, data + offset); init_table_()
407 init_script(struct nvkm_bios *bios, int index) init_script() argument
409 struct nvbios_init init = { .bios = bios }; init_script()
410 u16 bmp_ver = bmp_version(bios), data; init_script()
416 data = bios->bmp_offset + (bmp_ver < 0x0200 ? 14 : 18); init_script()
417 return nvbios_rd16(bios, data + (index * 2)); init_script()
422 return nvbios_rd16(bios, data + (index * 2)); init_script()
428 init_unknown_script(struct nvkm_bios *bios) init_unknown_script() argument
430 u16 len, data = init_table(bios, &len); init_unknown_script()
432 return nvbios_rd16(bios, data + 14); init_unknown_script()
439 return nvbios_ramcfg_count(init->bios); init_ram_restrict_group_count()
453 if (!init->ramcfg || init->bios->version.major < 0x70) init_ram_restrict()
461 struct nvkm_bios *bios = init->bios; init_xlat_() local
464 u16 data = nvbios_rd16(bios, table + (index * 2)); init_xlat_()
466 return nvbios_rd08(bios, data + offset); init_xlat_()
479 struct nvkm_bios *bios = init->bios; init_condition_met() local
482 u32 reg = nvbios_rd32(bios, table + (cond * 12) + 0); init_condition_met()
483 u32 msk = nvbios_rd32(bios, table + (cond * 12) + 4); init_condition_met()
484 u32 val = nvbios_rd32(bios, table + (cond * 12) + 8); init_condition_met()
495 struct nvkm_bios *bios = init->bios; init_io_condition_met() local
498 u16 port = nvbios_rd16(bios, table + (cond * 5) + 0); init_io_condition_met()
499 u8 index = nvbios_rd08(bios, table + (cond * 5) + 2); init_io_condition_met()
500 u8 mask = nvbios_rd08(bios, table + (cond * 5) + 3); init_io_condition_met()
501 u8 value = nvbios_rd08(bios, table + (cond * 5) + 4); init_io_condition_met()
512 struct nvkm_bios *bios = init->bios; init_io_flag_condition_met() local
515 u16 port = nvbios_rd16(bios, table + (cond * 9) + 0); init_io_flag_condition_met()
516 u8 index = nvbios_rd08(bios, table + (cond * 9) + 2); init_io_flag_condition_met()
517 u8 mask = nvbios_rd08(bios, table + (cond * 9) + 3); init_io_flag_condition_met()
518 u8 shift = nvbios_rd08(bios, table + (cond * 9) + 4); init_io_flag_condition_met()
519 u16 data = nvbios_rd16(bios, table + (cond * 9) + 5); init_io_flag_condition_met()
520 u8 dmask = nvbios_rd08(bios, table + (cond * 9) + 7); init_io_flag_condition_met()
521 u8 value = nvbios_rd08(bios, table + (cond * 9) + 8); init_io_flag_condition_met()
523 return (nvbios_rd08(bios, data + ioval) & dmask) == value; init_io_flag_condition_met()
583 u8 opcode = nvbios_rd08(init->bios, init->offset); init_reserved()
597 cont(" 0x%02x", nvbios_rd08(init->bios, init->offset + i)); init_reserved()
620 struct nvkm_bios *bios = init->bios; init_io_restrict_prog() local
621 u16 port = nvbios_rd16(bios, init->offset + 1); init_io_restrict_prog()
622 u8 index = nvbios_rd08(bios, init->offset + 3); init_io_restrict_prog()
623 u8 mask = nvbios_rd08(bios, init->offset + 4); init_io_restrict_prog()
624 u8 shift = nvbios_rd08(bios, init->offset + 5); init_io_restrict_prog()
625 u8 count = nvbios_rd08(bios, init->offset + 6); init_io_restrict_prog()
626 u32 reg = nvbios_rd32(bios, init->offset + 7); init_io_restrict_prog()
636 u32 data = nvbios_rd32(bios, init->offset); init_io_restrict_prog()
657 struct nvkm_bios *bios = init->bios; init_repeat() local
658 u8 count = nvbios_rd08(bios, init->offset + 1); init_repeat()
683 struct nvkm_bios *bios = init->bios; init_io_restrict_pll() local
684 u16 port = nvbios_rd16(bios, init->offset + 1); init_io_restrict_pll()
685 u8 index = nvbios_rd08(bios, init->offset + 3); init_io_restrict_pll()
686 u8 mask = nvbios_rd08(bios, init->offset + 4); init_io_restrict_pll()
687 u8 shift = nvbios_rd08(bios, init->offset + 5); init_io_restrict_pll()
688 s8 iofc = nvbios_rd08(bios, init->offset + 6); init_io_restrict_pll()
689 u8 count = nvbios_rd08(bios, init->offset + 7); init_io_restrict_pll()
690 u32 reg = nvbios_rd32(bios, init->offset + 8); init_io_restrict_pll()
700 u32 freq = nvbios_rd16(bios, init->offset) * 10; init_io_restrict_pll()
739 struct nvkm_bios *bios = init->bios; init_copy() local
740 u32 reg = nvbios_rd32(bios, init->offset + 1); init_copy()
741 u8 shift = nvbios_rd08(bios, init->offset + 5); init_copy()
742 u8 smask = nvbios_rd08(bios, init->offset + 6); init_copy()
743 u16 port = nvbios_rd16(bios, init->offset + 7); init_copy()
744 u8 index = nvbios_rd08(bios, init->offset + 9); init_copy()
745 u8 mask = nvbios_rd08(bios, init->offset + 10); init_copy()
778 struct nvkm_bios *bios = init->bios; init_io_flag_condition() local
779 u8 cond = nvbios_rd08(bios, init->offset + 1); init_io_flag_condition()
795 struct nvkm_bios *bios = init->bios; init_dp_condition() local
797 u8 cond = nvbios_rd08(bios, init->offset + 1); init_dp_condition()
798 u8 unkn = nvbios_rd08(bios, init->offset + 2); init_dp_condition()
813 (data = nvbios_dpout_match(bios, DCB_OUTPUT_DP, init_dp_condition()
843 struct nvkm_bios *bios = init->bios; init_io_mask_or() local
844 u8 index = nvbios_rd08(bios, init->offset + 1); init_io_mask_or()
862 struct nvkm_bios *bios = init->bios; init_io_or() local
863 u8 index = nvbios_rd08(bios, init->offset + 1); init_io_or()
881 struct nvkm_bios *bios = init->bios; init_andn_reg() local
882 u32 reg = nvbios_rd32(bios, init->offset + 1); init_andn_reg()
883 u32 mask = nvbios_rd32(bios, init->offset + 5); init_andn_reg()
898 struct nvkm_bios *bios = init->bios; init_or_reg() local
899 u32 reg = nvbios_rd32(bios, init->offset + 1); init_or_reg()
900 u32 mask = nvbios_rd32(bios, init->offset + 5); init_or_reg()
915 struct nvkm_bios *bios = init->bios; init_idx_addr_latched() local
916 u32 creg = nvbios_rd32(bios, init->offset + 1); init_idx_addr_latched()
917 u32 dreg = nvbios_rd32(bios, init->offset + 5); init_idx_addr_latched()
918 u32 mask = nvbios_rd32(bios, init->offset + 9); init_idx_addr_latched()
919 u32 data = nvbios_rd32(bios, init->offset + 13); init_idx_addr_latched()
920 u8 count = nvbios_rd08(bios, init->offset + 17); init_idx_addr_latched()
927 u8 iaddr = nvbios_rd08(bios, init->offset + 0); init_idx_addr_latched()
928 u8 idata = nvbios_rd08(bios, init->offset + 1); init_idx_addr_latched()
945 struct nvkm_bios *bios = init->bios; init_io_restrict_pll2() local
946 u16 port = nvbios_rd16(bios, init->offset + 1); init_io_restrict_pll2()
947 u8 index = nvbios_rd08(bios, init->offset + 3); init_io_restrict_pll2()
948 u8 mask = nvbios_rd08(bios, init->offset + 4); init_io_restrict_pll2()
949 u8 shift = nvbios_rd08(bios, init->offset + 5); init_io_restrict_pll2()
950 u8 count = nvbios_rd08(bios, init->offset + 6); init_io_restrict_pll2()
951 u32 reg = nvbios_rd32(bios, init->offset + 7); init_io_restrict_pll2()
961 u32 freq = nvbios_rd32(bios, init->offset); init_io_restrict_pll2()
980 struct nvkm_bios *bios = init->bios; init_pll2() local
981 u32 reg = nvbios_rd32(bios, init->offset + 1); init_pll2()
982 u32 freq = nvbios_rd32(bios, init->offset + 5); init_pll2()
997 struct nvkm_bios *bios = init->bios; init_i2c_byte() local
998 u8 index = nvbios_rd08(bios, init->offset + 1); init_i2c_byte()
999 u8 addr = nvbios_rd08(bios, init->offset + 2) >> 1; init_i2c_byte()
1000 u8 count = nvbios_rd08(bios, init->offset + 3); init_i2c_byte()
1006 u8 reg = nvbios_rd08(bios, init->offset + 0); init_i2c_byte()
1007 u8 mask = nvbios_rd08(bios, init->offset + 1); init_i2c_byte()
1008 u8 data = nvbios_rd08(bios, init->offset + 2); init_i2c_byte()
1028 struct nvkm_bios *bios = init->bios; init_zm_i2c_byte() local
1029 u8 index = nvbios_rd08(bios, init->offset + 1); init_zm_i2c_byte()
1030 u8 addr = nvbios_rd08(bios, init->offset + 2) >> 1; init_zm_i2c_byte()
1031 u8 count = nvbios_rd08(bios, init->offset + 3); init_zm_i2c_byte()
1037 u8 reg = nvbios_rd08(bios, init->offset + 0); init_zm_i2c_byte()
1038 u8 data = nvbios_rd08(bios, init->offset + 1); init_zm_i2c_byte()
1054 struct nvkm_bios *bios = init->bios; init_zm_i2c() local
1055 u8 index = nvbios_rd08(bios, init->offset + 1); init_zm_i2c()
1056 u8 addr = nvbios_rd08(bios, init->offset + 2) >> 1; init_zm_i2c()
1057 u8 count = nvbios_rd08(bios, init->offset + 3); init_zm_i2c()
1064 data[i] = nvbios_rd08(bios, init->offset); init_zm_i2c()
1088 struct nvkm_bios *bios = init->bios; init_tmds() local
1089 u8 tmds = nvbios_rd08(bios, init->offset + 1); init_tmds()
1090 u8 addr = nvbios_rd08(bios, init->offset + 2); init_tmds()
1091 u8 mask = nvbios_rd08(bios, init->offset + 3); init_tmds()
1092 u8 data = nvbios_rd08(bios, init->offset + 4); init_tmds()
1114 struct nvkm_bios *bios = init->bios; init_zm_tmds_group() local
1115 u8 tmds = nvbios_rd08(bios, init->offset + 1); init_zm_tmds_group()
1116 u8 count = nvbios_rd08(bios, init->offset + 2); init_zm_tmds_group()
1123 u8 addr = nvbios_rd08(bios, init->offset + 0); init_zm_tmds_group()
1124 u8 data = nvbios_rd08(bios, init->offset + 1); init_zm_tmds_group()
1141 struct nvkm_bios *bios = init->bios; init_cr_idx_adr_latch() local
1142 u8 addr0 = nvbios_rd08(bios, init->offset + 1); init_cr_idx_adr_latch()
1143 u8 addr1 = nvbios_rd08(bios, init->offset + 2); init_cr_idx_adr_latch()
1144 u8 base = nvbios_rd08(bios, init->offset + 3); init_cr_idx_adr_latch()
1145 u8 count = nvbios_rd08(bios, init->offset + 4); init_cr_idx_adr_latch()
1153 u8 data = nvbios_rd08(bios, init->offset); init_cr_idx_adr_latch()
1171 struct nvkm_bios *bios = init->bios; init_cr() local
1172 u8 addr = nvbios_rd08(bios, init->offset + 1); init_cr()
1173 u8 mask = nvbios_rd08(bios, init->offset + 2); init_cr()
1174 u8 data = nvbios_rd08(bios, init->offset + 3); init_cr()
1191 struct nvkm_bios *bios = init->bios; init_zm_cr() local
1192 u8 addr = nvbios_rd08(bios, init->offset + 1); init_zm_cr()
1193 u8 data = nvbios_rd08(bios, init->offset + 2); init_zm_cr()
1208 struct nvkm_bios *bios = init->bios; init_zm_cr_group() local
1209 u8 count = nvbios_rd08(bios, init->offset + 1); init_zm_cr_group()
1215 u8 addr = nvbios_rd08(bios, init->offset + 0); init_zm_cr_group()
1216 u8 data = nvbios_rd08(bios, init->offset + 1); init_zm_cr_group()
1232 struct nvkm_bios *bios = init->bios; init_condition_time() local
1233 u8 cond = nvbios_rd08(bios, init->offset + 1); init_condition_time()
1234 u8 retry = nvbios_rd08(bios, init->offset + 2); init_condition_time()
1259 struct nvkm_bios *bios = init->bios; init_ltime() local
1260 u16 msec = nvbios_rd16(bios, init->offset + 1); init_ltime()
1276 struct nvkm_bios *bios = init->bios; init_zm_reg_sequence() local
1277 u32 base = nvbios_rd32(bios, init->offset + 1); init_zm_reg_sequence()
1278 u8 count = nvbios_rd08(bios, init->offset + 5); init_zm_reg_sequence()
1284 u32 data = nvbios_rd32(bios, init->offset); init_zm_reg_sequence()
1301 struct nvkm_bios *bios = init->bios; init_pll_indirect() local
1302 u32 reg = nvbios_rd32(bios, init->offset + 1); init_pll_indirect()
1303 u16 addr = nvbios_rd16(bios, init->offset + 5); init_pll_indirect()
1304 u32 freq = (u32)nvbios_rd16(bios, addr) * 1000; init_pll_indirect()
1320 struct nvkm_bios *bios = init->bios; init_zm_reg_indirect() local
1321 u32 reg = nvbios_rd32(bios, init->offset + 1); init_zm_reg_indirect()
1322 u16 addr = nvbios_rd16(bios, init->offset + 5); init_zm_reg_indirect()
1323 u32 data = nvbios_rd32(bios, addr); init_zm_reg_indirect()
1339 struct nvkm_bios *bios = init->bios; init_sub_direct() local
1340 u16 addr = nvbios_rd16(bios, init->offset + 1); init_sub_direct()
1365 struct nvkm_bios *bios = init->bios; init_jump() local
1366 u16 offset = nvbios_rd16(bios, init->offset + 1); init_jump()
1383 struct nvkm_bios *bios = init->bios; init_i2c_if() local
1384 u8 index = nvbios_rd08(bios, init->offset + 1); init_i2c_if()
1385 u8 addr = nvbios_rd08(bios, init->offset + 2); init_i2c_if()
1386 u8 reg = nvbios_rd08(bios, init->offset + 3); init_i2c_if()
1387 u8 mask = nvbios_rd08(bios, init->offset + 4); init_i2c_if()
1388 u8 data = nvbios_rd08(bios, init->offset + 5); init_i2c_if()
1410 struct nvkm_bios *bios = init->bios; init_copy_nv_reg() local
1411 u32 sreg = nvbios_rd32(bios, init->offset + 1); init_copy_nv_reg()
1412 u8 shift = nvbios_rd08(bios, init->offset + 5); init_copy_nv_reg()
1413 u32 smask = nvbios_rd32(bios, init->offset + 6); init_copy_nv_reg()
1414 u32 sxor = nvbios_rd32(bios, init->offset + 10); init_copy_nv_reg()
1415 u32 dreg = nvbios_rd32(bios, init->offset + 14); init_copy_nv_reg()
1416 u32 dmask = nvbios_rd32(bios, init->offset + 18); init_copy_nv_reg()
1436 struct nvkm_bios *bios = init->bios; init_zm_index_io() local
1437 u16 port = nvbios_rd16(bios, init->offset + 1); init_zm_index_io()
1438 u8 index = nvbios_rd08(bios, init->offset + 3); init_zm_index_io()
1439 u8 data = nvbios_rd08(bios, init->offset + 4); init_zm_index_io()
1454 struct nvkm_devinit *devinit = init->bios->subdev.device->devinit; init_compute_mem()
1472 struct nvkm_bios *bios = init->bios; init_reset() local
1473 u32 reg = nvbios_rd32(bios, init->offset + 1); init_reset()
1474 u32 data1 = nvbios_rd32(bios, init->offset + 5); init_reset()
1475 u32 data2 = nvbios_rd32(bios, init->offset + 9); init_reset()
1499 u16 mdata = bmp_mem_init_table(init->bios); init_configure_mem_clk()
1508 struct nvkm_bios *bios = init->bios; init_configure_mem() local
1515 if (bios->version.major > 2) { init_configure_mem()
1522 sdata = bmp_sdr_seq_table(bios); init_configure_mem()
1523 if (nvbios_rd08(bios, mdata) & 0x01) init_configure_mem()
1524 sdata = bmp_ddr_seq_table(bios); init_configure_mem()
1530 for (; (addr = nvbios_rd32(bios, sdata)) != 0xffffffff; sdata += 4) { init_configure_mem()
1538 data = nvbios_rd32(bios, mdata); init_configure_mem()
1558 struct nvkm_bios *bios = init->bios; init_configure_clk() local
1564 if (bios->version.major > 2) { init_configure_clk()
1573 clock = nvbios_rd16(bios, mdata + 4) * 10; init_configure_clk()
1577 clock = nvbios_rd16(bios, mdata + 2) * 10; init_configure_clk()
1578 if (nvbios_rd08(bios, mdata) & 0x01) init_configure_clk()
1592 struct nvkm_bios *bios = init->bios; init_configure_preinit() local
1598 if (bios->version.major > 2) { init_configure_preinit()
1618 struct nvkm_bios *bios = init->bios; init_io() local
1619 u16 port = nvbios_rd16(bios, init->offset + 1); init_io()
1620 u8 mask = nvbios_rd16(bios, init->offset + 3); init_io()
1621 u8 data = nvbios_rd16(bios, init->offset + 4); init_io()
1631 if (bios->subdev.device->card_type >= NV_50 && init_io()
1658 struct nvkm_bios *bios = init->bios; init_sub() local
1659 u8 index = nvbios_rd08(bios, init->offset + 1); init_sub()
1664 addr = init_script(bios, index); init_sub()
1685 struct nvkm_bios *bios = init->bios; init_ram_condition() local
1686 u8 mask = nvbios_rd08(bios, init->offset + 1); init_ram_condition()
1687 u8 value = nvbios_rd08(bios, init->offset + 2); init_ram_condition()
1704 struct nvkm_bios *bios = init->bios; init_nv_reg() local
1705 u32 reg = nvbios_rd32(bios, init->offset + 1); init_nv_reg()
1706 u32 mask = nvbios_rd32(bios, init->offset + 5); init_nv_reg()
1707 u32 data = nvbios_rd32(bios, init->offset + 9); init_nv_reg()
1722 struct nvkm_bios *bios = init->bios; init_macro() local
1723 u8 macro = nvbios_rd08(bios, init->offset + 1); init_macro()
1730 u32 addr = nvbios_rd32(bios, table + (macro * 8) + 0); init_macro()
1731 u32 data = nvbios_rd32(bios, table + (macro * 8) + 4); init_macro()
1758 struct nvkm_bios *bios = init->bios; init_strap_condition() local
1759 u32 mask = nvbios_rd32(bios, init->offset + 1); init_strap_condition()
1760 u32 value = nvbios_rd32(bios, init->offset + 5); init_strap_condition()
1776 struct nvkm_bios *bios = init->bios; init_time() local
1777 u16 usec = nvbios_rd16(bios, init->offset + 1); init_time()
1797 struct nvkm_bios *bios = init->bios; init_condition() local
1798 u8 cond = nvbios_rd08(bios, init->offset + 1); init_condition()
1814 struct nvkm_bios *bios = init->bios; init_io_condition() local
1815 u8 cond = nvbios_rd08(bios, init->offset + 1); init_io_condition()
1831 struct nvkm_bios *bios = init->bios; init_zm_reg16() local
1832 u32 addr = nvbios_rd32(bios, init->offset + 1); init_zm_reg16()
1833 u16 data = nvbios_rd16(bios, init->offset + 5); init_zm_reg16()
1848 struct nvkm_bios *bios = init->bios; init_index_io() local
1849 u16 port = nvbios_rd16(bios, init->offset + 1); init_index_io()
1850 u8 index = nvbios_rd16(bios, init->offset + 3); init_index_io()
1851 u8 mask = nvbios_rd08(bios, init->offset + 4); init_index_io()
1852 u8 data = nvbios_rd08(bios, init->offset + 5); init_index_io()
1870 struct nvkm_bios *bios = init->bios; init_pll() local
1871 u32 reg = nvbios_rd32(bios, init->offset + 1); init_pll()
1872 u32 freq = nvbios_rd16(bios, init->offset + 5) * 10; init_pll()
1887 struct nvkm_bios *bios = init->bios; init_zm_reg() local
1888 u32 addr = nvbios_rd32(bios, init->offset + 1); init_zm_reg()
1889 u32 data = nvbios_rd32(bios, init->offset + 5); init_zm_reg()
1907 struct nvkm_bios *bios = init->bios; init_ram_restrict_pll() local
1908 u8 type = nvbios_rd08(bios, init->offset + 1); init_ram_restrict_pll()
1917 u32 freq = nvbios_rd32(bios, init->offset); init_ram_restrict_pll()
1937 struct nvkm_gpio *gpio = init->bios->subdev.device->gpio; init_gpio()
1953 struct nvkm_bios *bios = init->bios; init_ram_restrict_zm_reg_group() local
1954 u32 addr = nvbios_rd32(bios, init->offset + 1); init_ram_restrict_zm_reg_group()
1955 u8 incr = nvbios_rd08(bios, init->offset + 5); init_ram_restrict_zm_reg_group()
1956 u8 num = nvbios_rd08(bios, init->offset + 6); init_ram_restrict_zm_reg_group()
1968 u32 data = nvbios_rd32(bios, init->offset); init_ram_restrict_zm_reg_group()
1991 struct nvkm_bios *bios = init->bios; init_copy_zm_reg() local
1992 u32 sreg = nvbios_rd32(bios, init->offset + 1); init_copy_zm_reg()
1993 u32 dreg = nvbios_rd32(bios, init->offset + 5); init_copy_zm_reg()
2008 struct nvkm_bios *bios = init->bios; init_zm_reg_group() local
2009 u32 addr = nvbios_rd32(bios, init->offset + 1); init_zm_reg_group()
2010 u8 count = nvbios_rd08(bios, init->offset + 5); init_zm_reg_group()
2016 u32 data = nvbios_rd32(bios, init->offset); init_zm_reg_group()
2030 struct nvkm_bios *bios = init->bios; init_xlat() local
2031 u32 saddr = nvbios_rd32(bios, init->offset + 1); init_xlat()
2032 u8 sshift = nvbios_rd08(bios, init->offset + 5); init_xlat()
2033 u8 smask = nvbios_rd08(bios, init->offset + 6); init_xlat()
2034 u8 index = nvbios_rd08(bios, init->offset + 7); init_xlat()
2035 u32 daddr = nvbios_rd32(bios, init->offset + 8); init_xlat()
2036 u32 dmask = nvbios_rd32(bios, init->offset + 12); init_xlat()
2037 u8 shift = nvbios_rd08(bios, init->offset + 16); init_xlat()
2058 struct nvkm_bios *bios = init->bios; init_zm_mask_add() local
2059 u32 addr = nvbios_rd32(bios, init->offset + 1); init_zm_mask_add()
2060 u32 mask = nvbios_rd32(bios, init->offset + 5); init_zm_mask_add()
2061 u32 add = nvbios_rd32(bios, init->offset + 9); init_zm_mask_add()
2079 struct nvkm_bios *bios = init->bios; init_auxch() local
2080 u32 addr = nvbios_rd32(bios, init->offset + 1); init_auxch()
2081 u8 count = nvbios_rd08(bios, init->offset + 5); init_auxch()
2087 u8 mask = nvbios_rd08(bios, init->offset + 0); init_auxch()
2088 u8 data = nvbios_rd08(bios, init->offset + 1); init_auxch()
2103 struct nvkm_bios *bios = init->bios; init_zm_auxch() local
2104 u32 addr = nvbios_rd32(bios, init->offset + 1); init_zm_auxch()
2105 u8 count = nvbios_rd08(bios, init->offset + 5); init_zm_auxch()
2111 u8 data = nvbios_rd08(bios, init->offset + 0); init_zm_auxch()
2125 struct nvkm_bios *bios = init->bios; init_i2c_long_if() local
2126 u8 index = nvbios_rd08(bios, init->offset + 1); init_i2c_long_if()
2127 u8 addr = nvbios_rd08(bios, init->offset + 2) >> 1; init_i2c_long_if()
2128 u8 reglo = nvbios_rd08(bios, init->offset + 3); init_i2c_long_if()
2129 u8 reghi = nvbios_rd08(bios, init->offset + 4); init_i2c_long_if()
2130 u8 mask = nvbios_rd08(bios, init->offset + 5); init_i2c_long_if()
2131 u8 data = nvbios_rd08(bios, init->offset + 6); init_i2c_long_if()
2164 struct nvkm_bios *bios = init->bios; init_gpio_ne() local
2165 struct nvkm_gpio *gpio = bios->subdev.device->gpio; init_gpio_ne()
2167 u8 count = nvbios_rd08(bios, init->offset + 1); init_gpio_ne()
2175 cont("0x%02x ", nvbios_rd08(bios, i)); init_gpio_ne()
2178 while ((data = dcb_gpio_parse(bios, 0, idx++, &ver, &len, &func))) { init_gpio_ne()
2181 if (func.func == nvbios_rd08(bios, i)) init_gpio_ne()
2279 u8 opcode = nvbios_rd08(init->bios, init->offset); nvbios_exec()
2294 struct nvkm_bios *bios = subdev->device->bios; nvbios_init() local
2301 while (!ret && (data = (init_script(bios, ++i)))) { nvbios_init()
2304 .bios = bios, nvbios_init()
2317 if (!ret && (data = init_unknown_script(bios))) { nvbios_init()
2320 .bios = bios, nvbios_init()
H A Dpmu.c24 #include <subdev/bios.h>
25 #include <subdev/bios/bit.h>
26 #include <subdev/bios/image.h>
27 #include <subdev/bios/pmu.h>
30 weirdo_pointer(struct nvkm_bios *bios, u32 data) weirdo_pointer() argument
34 if (nvbios_image(bios, idx++, &image)) { weirdo_pointer()
36 while (nvbios_image(bios, idx++, &image)) { weirdo_pointer()
45 nvbios_pmuTe(struct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len) nvbios_pmuTe() argument
50 if (!bit_entry(bios, 'p', &bit_p)) { nvbios_pmuTe()
52 data = nvbios_rd32(bios, bit_p.offset + 0x00); nvbios_pmuTe()
53 if ((data = weirdo_pointer(bios, data))) { nvbios_pmuTe()
54 *ver = nvbios_rd08(bios, data + 0x00); /* maybe? */ nvbios_pmuTe()
55 *hdr = nvbios_rd08(bios, data + 0x01); nvbios_pmuTe()
56 *len = nvbios_rd08(bios, data + 0x02); nvbios_pmuTe()
57 *cnt = nvbios_rd08(bios, data + 0x03); nvbios_pmuTe()
65 nvbios_pmuEe(struct nvkm_bios *bios, int idx, u8 *ver, u8 *hdr) nvbios_pmuEe() argument
68 u32 data = nvbios_pmuTe(bios, ver, hdr, &cnt, &len); nvbios_pmuEe()
78 nvbios_pmuEp(struct nvkm_bios *bios, int idx, u8 *ver, u8 *hdr, nvbios_pmuEp() argument
81 u32 data = nvbios_pmuEe(bios, idx, ver, hdr); nvbios_pmuEp()
85 info->type = nvbios_rd08(bios, data + 0x00); nvbios_pmuEp()
86 info->data = nvbios_rd32(bios, data + 0x02); nvbios_pmuEp()
93 nvbios_pmuRm(struct nvkm_bios *bios, u8 type, struct nvbios_pmuR *info) nvbios_pmuRm() argument
99 while ((data = nvbios_pmuEp(bios, idx++, &ver, &hdr, &pmuE))) { nvbios_pmuRm()
101 (data = weirdo_pointer(bios, pmuE.data))) { nvbios_pmuRm()
102 info->init_addr_pmu = nvbios_rd32(bios, data + 0x08); nvbios_pmuRm()
103 info->args_addr_pmu = nvbios_rd32(bios, data + 0x0c); nvbios_pmuRm()
105 info->boot_addr_pmu = nvbios_rd32(bios, data + 0x10) + nvbios_pmuRm()
106 nvbios_rd32(bios, data + 0x18); nvbios_pmuRm()
107 info->boot_size = nvbios_rd32(bios, data + 0x1c) - nvbios_pmuRm()
108 nvbios_rd32(bios, data + 0x18); nvbios_pmuRm()
112 info->code_size = nvbios_rd32(bios, data + 0x20); nvbios_pmuRm()
114 nvbios_rd32(bios, data + 0x24); nvbios_pmuRm()
115 info->data_addr_pmu = nvbios_rd32(bios, data + 0x28); nvbios_pmuRm()
116 info->data_size = nvbios_rd32(bios, data + 0x2c); nvbios_pmuRm()
H A Dextdev.c24 #include <subdev/bios.h>
25 #include <subdev/bios/dcb.h>
26 #include <subdev/bios/extdev.h>
29 extdev_table(struct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *len, u8 *cnt) extdev_table() argument
34 dcb = dcb_table(bios, &dcb_ver, &dcb_hdr, &dcb_cnt, &dcb_len); extdev_table()
38 extdev = nvbios_rd16(bios, dcb + 18); extdev_table()
42 *ver = nvbios_rd08(bios, extdev + 0); extdev_table()
43 *hdr = nvbios_rd08(bios, extdev + 1); extdev_table()
44 *cnt = nvbios_rd08(bios, extdev + 2); extdev_table()
45 *len = nvbios_rd08(bios, extdev + 3); extdev_table()
50 nvbios_extdev_entry(struct nvkm_bios *bios, int idx, u8 *ver, u8 *len) nvbios_extdev_entry() argument
53 u16 extdev = extdev_table(bios, ver, &hdr, len, &cnt); nvbios_extdev_entry()
60 extdev_parse_entry(struct nvkm_bios *bios, u16 offset, extdev_parse_entry() argument
63 entry->type = nvbios_rd08(bios, offset + 0); extdev_parse_entry()
64 entry->addr = nvbios_rd08(bios, offset + 1); extdev_parse_entry()
65 entry->bus = (nvbios_rd08(bios, offset + 2) >> 4) & 1; extdev_parse_entry()
69 nvbios_extdev_parse(struct nvkm_bios *bios, int idx, nvbios_extdev_parse() argument
75 if (!(entry = nvbios_extdev_entry(bios, idx, &ver, &len))) nvbios_extdev_parse()
78 extdev_parse_entry(bios, entry, func); nvbios_extdev_parse()
83 nvbios_extdev_find(struct nvkm_bios *bios, enum nvbios_extdev_type type, nvbios_extdev_find() argument
90 while ((entry = nvbios_extdev_entry(bios, i++, &ver, &len))) { nvbios_extdev_find()
91 extdev_parse_entry(bios, entry, func); nvbios_extdev_find()
H A Dxpio.c24 #include <subdev/bios.h>
25 #include <subdev/bios/gpio.h>
26 #include <subdev/bios/xpio.h>
29 dcb_xpiod_table(struct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len) dcb_xpiod_table() argument
31 u16 data = dcb_gpio_table(bios, ver, hdr, cnt, len); dcb_xpiod_table()
33 u16 xpio = nvbios_rd16(bios, data + 0x04); dcb_xpiod_table()
35 *ver = nvbios_rd08(bios, data + 0x00); dcb_xpiod_table()
36 *hdr = nvbios_rd08(bios, data + 0x01); dcb_xpiod_table()
37 *cnt = nvbios_rd08(bios, data + 0x02); dcb_xpiod_table()
38 *len = nvbios_rd08(bios, data + 0x03); dcb_xpiod_table()
46 dcb_xpio_table(struct nvkm_bios *bios, u8 idx, dcb_xpio_table() argument
49 u16 data = dcb_xpiod_table(bios, ver, hdr, cnt, len); dcb_xpio_table()
51 u16 xpio = nvbios_rd16(bios, data + *hdr + (idx * *len)); dcb_xpio_table()
53 *ver = nvbios_rd08(bios, data + 0x00); dcb_xpio_table()
54 *hdr = nvbios_rd08(bios, data + 0x01); dcb_xpio_table()
55 *cnt = nvbios_rd08(bios, data + 0x02); dcb_xpio_table()
56 *len = nvbios_rd08(bios, data + 0x03); dcb_xpio_table()
64 dcb_xpio_parse(struct nvkm_bios *bios, u8 idx, dcb_xpio_parse() argument
67 u16 data = dcb_xpio_table(bios, idx, ver, hdr, cnt, len); dcb_xpio_parse()
69 info->type = nvbios_rd08(bios, data + 0x04); dcb_xpio_parse()
70 info->addr = nvbios_rd08(bios, data + 0x05); dcb_xpio_parse()
71 info->flags = nvbios_rd08(bios, data + 0x06); dcb_xpio_parse()
H A Dramcfg.c24 #include <subdev/bios.h>
25 #include <subdev/bios/bit.h>
26 #include <subdev/bios/ramcfg.h>
27 #include <subdev/bios/M0203.h>
36 nvbios_ramcfg_count(struct nvkm_bios *bios) nvbios_ramcfg_count() argument
40 if (!bit_entry(bios, 'M', &bit_M)) { nvbios_ramcfg_count()
42 return nvbios_rd08(bios, bit_M.offset + 2); nvbios_ramcfg_count()
44 return nvbios_rd08(bios, bit_M.offset + 0); nvbios_ramcfg_count()
53 struct nvkm_bios *bios = subdev->device->bios; nvbios_ramcfg_index() local
60 if (!bit_entry(bios, 'M', &bit_M)) { nvbios_ramcfg_index()
62 xlat = nvbios_rd16(bios, bit_M.offset + 3); nvbios_ramcfg_index()
69 nvbios_M0203Em(bios, strap, &ver, &hdr, &M0203E)) nvbios_ramcfg_index()
71 xlat = nvbios_rd16(bios, bit_M.offset + 1); nvbios_ramcfg_index()
76 strap = nvbios_rd08(bios, xlat + strap); nvbios_ramcfg_index()
H A Dgpio.c24 #include <subdev/bios.h>
25 #include <subdev/bios/dcb.h>
26 #include <subdev/bios/gpio.h>
27 #include <subdev/bios/xpio.h>
30 dcb_gpio_table(struct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len) dcb_gpio_table() argument
33 u16 dcb = dcb_table(bios, ver, hdr, cnt, len); dcb_gpio_table()
36 data = nvbios_rd16(bios, dcb + 0x0a); dcb_gpio_table()
38 if (*ver >= 0x22 && nvbios_rd08(bios, dcb - 1) >= 0x13) dcb_gpio_table()
39 data = nvbios_rd16(bios, dcb - 0x0f); dcb_gpio_table()
42 *ver = nvbios_rd08(bios, data + 0x00); dcb_gpio_table()
45 *cnt = nvbios_rd08(bios, data + 0x02); dcb_gpio_table()
46 *len = nvbios_rd08(bios, data + 0x01); dcb_gpio_table()
49 *hdr = nvbios_rd08(bios, data + 0x01); dcb_gpio_table()
50 *cnt = nvbios_rd08(bios, data + 0x02); dcb_gpio_table()
51 *len = nvbios_rd08(bios, data + 0x03); dcb_gpio_table()
61 dcb_gpio_entry(struct nvkm_bios *bios, int idx, int ent, u8 *ver, u8 *len) dcb_gpio_entry() argument
67 gpio = dcb_gpio_table(bios, ver, &hdr, &cnt, len); dcb_gpio_entry()
69 gpio = dcb_xpio_table(bios, idx, &xver, &hdr, &cnt, len); dcb_gpio_entry()
78 dcb_gpio_parse(struct nvkm_bios *bios, int idx, int ent, u8 *ver, u8 *len, dcb_gpio_parse() argument
81 u16 data = dcb_gpio_entry(bios, idx, ent, ver, len); dcb_gpio_parse()
84 u16 info = nvbios_rd16(bios, data); dcb_gpio_parse()
94 u32 info = nvbios_rd32(bios, data); dcb_gpio_parse()
103 u32 info = nvbios_rd32(bios, data + 0); dcb_gpio_parse()
104 u8 info1 = nvbios_rd32(bios, data + 4); dcb_gpio_parse()
119 dcb_gpio_match(struct nvkm_bios *bios, int idx, u8 func, u8 line, dcb_gpio_match() argument
125 while ((data = dcb_gpio_parse(bios, idx, i++, ver, len, gpio))) { dcb_gpio_match()
132 if ((data = dcb_table(bios, ver, &hdr, &cnt, len))) { dcb_gpio_match()
134 u8 conf = nvbios_rd08(bios, data - 5); dcb_gpio_match()
135 u8 addr = nvbios_rd08(bios, data - 4); dcb_gpio_match()
H A DP0260.c24 #include <subdev/bios.h>
25 #include <subdev/bios/bit.h>
26 #include <subdev/bios/P0260.h>
29 nvbios_P0260Te(struct nvkm_bios *bios, nvbios_P0260Te() argument
35 if (!bit_entry(bios, 'P', &bit_P)) { nvbios_P0260Te()
37 data = nvbios_rd32(bios, bit_P.offset + 0x60); nvbios_P0260Te()
39 *ver = nvbios_rd08(bios, data + 0); nvbios_P0260Te()
42 *hdr = nvbios_rd08(bios, data + 1); nvbios_P0260Te()
43 *cnt = nvbios_rd08(bios, data + 2); nvbios_P0260Te()
45 *xnr = nvbios_rd08(bios, data + 3); nvbios_P0260Te()
58 nvbios_P0260Ee(struct nvkm_bios *bios, int idx, u8 *ver, u8 *len) nvbios_P0260Ee() argument
61 u32 data = nvbios_P0260Te(bios, ver, &hdr, &cnt, len, &xnr, &xsz); nvbios_P0260Ee()
68 nvbios_P0260Ep(struct nvkm_bios *bios, int idx, u8 *ver, u8 *len, nvbios_P0260Ep() argument
71 u32 data = nvbios_P0260Ee(bios, idx, ver, len); nvbios_P0260Ep()
75 info->data = nvbios_rd32(bios, data); nvbios_P0260Ep()
84 nvbios_P0260Xe(struct nvkm_bios *bios, int idx, u8 *ver, u8 *xsz) nvbios_P0260Xe() argument
87 u32 data = nvbios_P0260Te(bios, ver, &hdr, &cnt, &len, &xnr, xsz); nvbios_P0260Xe()
94 nvbios_P0260Xp(struct nvkm_bios *bios, int idx, u8 *ver, u8 *hdr, nvbios_P0260Xp() argument
97 u32 data = nvbios_P0260Xe(bios, idx, ver, hdr); nvbios_P0260Xp()
101 info->data = nvbios_rd32(bios, data); nvbios_P0260Xp()
H A Dboost.c24 #include <subdev/bios.h>
25 #include <subdev/bios/bit.h>
26 #include <subdev/bios/boost.h>
29 nvbios_boostTe(struct nvkm_bios *bios, nvbios_boostTe() argument
35 if (!bit_entry(bios, 'P', &bit_P)) { nvbios_boostTe()
37 boost = nvbios_rd16(bios, bit_P.offset + 0x30); nvbios_boostTe()
40 *ver = nvbios_rd08(bios, boost + 0); nvbios_boostTe()
43 *hdr = nvbios_rd08(bios, boost + 1); nvbios_boostTe()
44 *cnt = nvbios_rd08(bios, boost + 5); nvbios_boostTe()
45 *len = nvbios_rd08(bios, boost + 2); nvbios_boostTe()
46 *snr = nvbios_rd08(bios, boost + 4); nvbios_boostTe()
47 *ssz = nvbios_rd08(bios, boost + 3); nvbios_boostTe()
59 nvbios_boostEe(struct nvkm_bios *bios, int idx, nvbios_boostEe() argument
63 u16 data = nvbios_boostTe(bios, ver, hdr, cnt, len, &snr, &ssz); nvbios_boostEe()
75 nvbios_boostEp(struct nvkm_bios *bios, int idx, nvbios_boostEp() argument
78 u16 data = nvbios_boostEe(bios, idx, ver, hdr, cnt, len); nvbios_boostEp()
81 info->pstate = (nvbios_rd16(bios, data + 0x00) & 0x01e0) >> 5; nvbios_boostEp()
82 info->min = nvbios_rd16(bios, data + 0x02) * 1000; nvbios_boostEp()
83 info->max = nvbios_rd16(bios, data + 0x04) * 1000; nvbios_boostEp()
89 nvbios_boostEm(struct nvkm_bios *bios, u8 pstate, nvbios_boostEm() argument
93 while ((data = nvbios_boostEp(bios, idx++, ver, hdr, cnt, len, info))) { nvbios_boostEm()
101 nvbios_boostSe(struct nvkm_bios *bios, int idx, nvbios_boostSe() argument
113 nvbios_boostSp(struct nvkm_bios *bios, int idx, nvbios_boostSp() argument
117 data = nvbios_boostSe(bios, idx, data, ver, hdr, cnt, len); nvbios_boostSp()
120 info->domain = nvbios_rd08(bios, data + 0x00); nvbios_boostSp()
121 info->percent = nvbios_rd08(bios, data + 0x01); nvbios_boostSp()
122 info->min = nvbios_rd16(bios, data + 0x02) * 1000; nvbios_boostSp()
123 info->max = nvbios_rd16(bios, data + 0x04) * 1000; nvbios_boostSp()
H A Dcstep.c24 #include <subdev/bios.h>
25 #include <subdev/bios/bit.h>
26 #include <subdev/bios/cstep.h>
29 nvbios_cstepTe(struct nvkm_bios *bios, nvbios_cstepTe() argument
35 if (!bit_entry(bios, 'P', &bit_P)) { nvbios_cstepTe()
37 cstep = nvbios_rd16(bios, bit_P.offset + 0x34); nvbios_cstepTe()
40 *ver = nvbios_rd08(bios, cstep + 0); nvbios_cstepTe()
43 *hdr = nvbios_rd08(bios, cstep + 1); nvbios_cstepTe()
44 *cnt = nvbios_rd08(bios, cstep + 3); nvbios_cstepTe()
45 *len = nvbios_rd08(bios, cstep + 2); nvbios_cstepTe()
46 *xnr = nvbios_rd08(bios, cstep + 5); nvbios_cstepTe()
47 *xsz = nvbios_rd08(bios, cstep + 4); nvbios_cstepTe()
59 nvbios_cstepEe(struct nvkm_bios *bios, int idx, u8 *ver, u8 *hdr) nvbios_cstepEe() argument
62 u16 data = nvbios_cstepTe(bios, ver, hdr, &cnt, &len, &xnr, &xsz); nvbios_cstepEe()
72 nvbios_cstepEp(struct nvkm_bios *bios, int idx, u8 *ver, u8 *hdr, nvbios_cstepEp() argument
75 u16 data = nvbios_cstepEe(bios, idx, ver, hdr); nvbios_cstepEp()
78 info->pstate = (nvbios_rd16(bios, data + 0x00) & 0x01e0) >> 5; nvbios_cstepEp()
79 info->index = nvbios_rd08(bios, data + 0x03); nvbios_cstepEp()
85 nvbios_cstepEm(struct nvkm_bios *bios, u8 pstate, u8 *ver, u8 *hdr, nvbios_cstepEm() argument
89 while ((data = nvbios_cstepEp(bios, idx++, ver, hdr, info))) { nvbios_cstepEm()
97 nvbios_cstepXe(struct nvkm_bios *bios, int idx, u8 *ver, u8 *hdr) nvbios_cstepXe() argument
100 u16 data = nvbios_cstepTe(bios, ver, hdr, &cnt, &len, &xnr, &xsz); nvbios_cstepXe()
110 nvbios_cstepXp(struct nvkm_bios *bios, int idx, u8 *ver, u8 *hdr, nvbios_cstepXp() argument
113 u16 data = nvbios_cstepXe(bios, idx, ver, hdr); nvbios_cstepXp()
116 info->freq = nvbios_rd16(bios, data + 0x00) * 1000; nvbios_cstepXp()
117 info->unkn[0] = nvbios_rd08(bios, data + 0x02); nvbios_cstepXp()
118 info->unkn[1] = nvbios_rd08(bios, data + 0x03); nvbios_cstepXp()
119 info->voltage = nvbios_rd08(bios, data + 0x04); nvbios_cstepXp()
H A Dmxm.c24 #include <subdev/bios.h>
25 #include <subdev/bios/bit.h>
26 #include <subdev/bios/mxm.h>
29 mxm_table(struct nvkm_bios *bios, u8 *ver, u8 *hdr) mxm_table() argument
31 struct nvkm_subdev *subdev = &bios->subdev; mxm_table()
34 if (bit_entry(bios, 'x', &x)) { mxm_table()
75 mxm_sor_map(struct nvkm_bios *bios, u8 conn) mxm_sor_map() argument
77 struct nvkm_subdev *subdev = &bios->subdev; mxm_sor_map()
79 u16 mxm = mxm_table(bios, &ver, &hdr); mxm_sor_map()
81 u16 map = nvbios_rd16(bios, mxm + 4); mxm_sor_map()
83 ver = nvbios_rd08(bios, map); mxm_sor_map()
85 if (conn < nvbios_rd08(bios, map + 3)) { mxm_sor_map()
86 map += nvbios_rd08(bios, map + 1); mxm_sor_map()
88 return nvbios_rd08(bios, map); mxm_sor_map()
98 if (bios->version.chip == 0x84 || bios->version.chip == 0x86) mxm_sor_map()
100 if (bios->version.chip == 0x92) mxm_sor_map()
102 if (bios->version.chip == 0x94 || bios->version.chip == 0x96) mxm_sor_map()
104 if (bios->version.chip == 0x98) mxm_sor_map()
112 mxm_ddc_map(struct nvkm_bios *bios, u8 port) mxm_ddc_map() argument
114 struct nvkm_subdev *subdev = &bios->subdev; mxm_ddc_map()
116 u16 mxm = mxm_table(bios, &ver, &hdr); mxm_ddc_map()
118 u16 map = nvbios_rd16(bios, mxm + 6); mxm_ddc_map()
120 ver = nvbios_rd08(bios, map); mxm_ddc_map()
122 if (port < nvbios_rd08(bios, map + 3)) { mxm_ddc_map()
123 map += nvbios_rd08(bios, map + 1); mxm_ddc_map()
125 return nvbios_rd08(bios, map); mxm_ddc_map()
H A DM0209.c24 #include <subdev/bios.h>
25 #include <subdev/bios/bit.h>
26 #include <subdev/bios/M0209.h>
29 nvbios_M0209Te(struct nvkm_bios *bios, nvbios_M0209Te() argument
35 if (!bit_entry(bios, 'M', &bit_M)) { nvbios_M0209Te()
37 data = nvbios_rd32(bios, bit_M.offset + 0x09); nvbios_M0209Te()
39 *ver = nvbios_rd08(bios, data + 0x00); nvbios_M0209Te()
42 *hdr = nvbios_rd08(bios, data + 0x01); nvbios_M0209Te()
43 *len = nvbios_rd08(bios, data + 0x02); nvbios_M0209Te()
44 *ssz = nvbios_rd08(bios, data + 0x03); nvbios_M0209Te()
46 *cnt = nvbios_rd08(bios, data + 0x04); nvbios_M0209Te()
58 nvbios_M0209Ee(struct nvkm_bios *bios, int idx, nvbios_M0209Ee() argument
62 u32 data = nvbios_M0209Te(bios, ver, hdr, cnt, len, &snr, &ssz); nvbios_M0209Ee()
74 nvbios_M0209Ep(struct nvkm_bios *bios, int idx, nvbios_M0209Ep() argument
77 u32 data = nvbios_M0209Ee(bios, idx, ver, hdr, cnt, len); nvbios_M0209Ep()
81 info->v00_40 = (nvbios_rd08(bios, data + 0x00) & 0x40) >> 6; nvbios_M0209Ep()
82 info->bits = nvbios_rd08(bios, data + 0x00) & 0x3f; nvbios_M0209Ep()
83 info->modulo = nvbios_rd08(bios, data + 0x01); nvbios_M0209Ep()
84 info->v02_40 = (nvbios_rd08(bios, data + 0x02) & 0x40) >> 6; nvbios_M0209Ep()
85 info->v02_07 = nvbios_rd08(bios, data + 0x02) & 0x07; nvbios_M0209Ep()
86 info->v03 = nvbios_rd08(bios, data + 0x03); nvbios_M0209Ep()
95 nvbios_M0209Se(struct nvkm_bios *bios, int ent, int idx, u8 *ver, u8 *hdr) nvbios_M0209Se() argument
99 u32 data = nvbios_M0209Ee(bios, ent, ver, hdr, &cnt, &len); nvbios_M0209Se()
109 nvbios_M0209Sp(struct nvkm_bios *bios, int ent, int idx, u8 *ver, u8 *hdr, nvbios_M0209Sp() argument
114 u32 data = nvbios_M0209Ep(bios, ent, ver, hdr, &cnt, &len, &M0209E); nvbios_M0209Sp()
116 u32 i, data = nvbios_M0209Se(bios, ent, idx, ver, hdr); nvbios_M0209Sp()
125 info->data[i] = nvbios_rd32(bios, data + off); nvbios_M0209Sp()
H A Dtherm.c24 #include <subdev/bios.h>
25 #include <subdev/bios/bit.h>
26 #include <subdev/bios/therm.h>
29 therm_table(struct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *len, u8 *cnt) therm_table() argument
34 if (!bit_entry(bios, 'P', &bit_P)) { therm_table()
36 therm = nvbios_rd16(bios, bit_P.offset + 12); therm_table()
38 therm = nvbios_rd16(bios, bit_P.offset + 16); therm_table()
40 nvkm_error(&bios->subdev, therm_table()
49 *ver = nvbios_rd08(bios, therm + 0); therm_table()
50 *hdr = nvbios_rd08(bios, therm + 1); therm_table()
51 *len = nvbios_rd08(bios, therm + 2); therm_table()
52 *cnt = nvbios_rd08(bios, therm + 3); therm_table()
53 return therm + nvbios_rd08(bios, therm + 1); therm_table()
57 nvbios_therm_entry(struct nvkm_bios *bios, int idx, u8 *ver, u8 *len) nvbios_therm_entry() argument
60 u16 therm = therm_table(bios, ver, &hdr, len, &cnt); nvbios_therm_entry()
67 nvbios_therm_sensor_parse(struct nvkm_bios *bios, nvbios_therm_sensor_parse() argument
83 while ((entry = nvbios_therm_entry(bios, i++, &ver, &len))) { nvbios_therm_sensor_parse()
84 s16 value = nvbios_rd16(bios, entry + 1); nvbios_therm_sensor_parse()
86 switch (nvbios_rd08(bios, entry + 0)) { nvbios_therm_sensor_parse()
95 offset = ((s8) nvbios_rd08(bios, entry + 2)) / 2; nvbios_therm_sensor_parse()
153 nvbios_therm_fan_parse(struct nvkm_bios *bios, struct nvbios_therm_fan *fan) nvbios_therm_fan_parse() argument
165 while ((entry = nvbios_therm_entry(bios, i++, &ver, &len))) { nvbios_therm_fan_parse()
166 s16 value = nvbios_rd16(bios, entry + 1); nvbios_therm_fan_parse()
168 switch (nvbios_rd08(bios, entry + 0)) { nvbios_therm_fan_parse()
199 fan->linear_min_temp = nvbios_rd08(bios, entry + 1); nvbios_therm_fan_parse()
200 fan->linear_max_temp = nvbios_rd08(bios, entry + 2); nvbios_therm_fan_parse()
206 if (bios->subdev.device->card_type >= NV_C0 && nvbios_therm_fan_parse()
H A Dfan.c24 #include <subdev/bios.h>
25 #include <subdev/bios/bit.h>
26 #include <subdev/bios/fan.h>
29 nvbios_fan_table(struct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len) nvbios_fan_table() argument
34 if (!bit_entry(bios, 'P', &bit_P)) { nvbios_fan_table()
36 fan = nvbios_rd16(bios, bit_P.offset + 0x58); nvbios_fan_table()
39 *ver = nvbios_rd08(bios, fan + 0); nvbios_fan_table()
42 *hdr = nvbios_rd08(bios, fan + 1); nvbios_fan_table()
43 *len = nvbios_rd08(bios, fan + 2); nvbios_fan_table()
44 *cnt = nvbios_rd08(bios, fan + 3); nvbios_fan_table()
56 nvbios_fan_entry(struct nvkm_bios *bios, int idx, u8 *ver, u8 *hdr, nvbios_fan_entry() argument
59 u16 data = nvbios_fan_table(bios, ver, hdr, cnt, len); nvbios_fan_entry()
66 nvbios_fan_parse(struct nvkm_bios *bios, struct nvbios_therm_fan *fan) nvbios_fan_parse() argument
70 u16 data = nvbios_fan_entry(bios, 0, &ver, &hdr, &cnt, &len); nvbios_fan_parse()
72 u8 type = nvbios_rd08(bios, data + 0x00); nvbios_fan_parse()
87 fan->min_duty = nvbios_rd08(bios, data + 0x02); nvbios_fan_parse()
88 fan->max_duty = nvbios_rd08(bios, data + 0x03); nvbios_fan_parse()
90 fan->pwm_freq = nvbios_rd32(bios, data + 0x0b) & 0xffffff; nvbios_fan_parse()
H A DM0203.c24 #include <subdev/bios.h>
25 #include <subdev/bios/bit.h>
26 #include <subdev/bios/M0203.h>
29 nvbios_M0203Te(struct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len) nvbios_M0203Te() argument
34 if (!bit_entry(bios, 'M', &bit_M)) { nvbios_M0203Te()
36 data = nvbios_rd16(bios, bit_M.offset + 0x03); nvbios_M0203Te()
38 *ver = nvbios_rd08(bios, data + 0x00); nvbios_M0203Te()
41 *hdr = nvbios_rd08(bios, data + 0x01); nvbios_M0203Te()
42 *len = nvbios_rd08(bios, data + 0x02); nvbios_M0203Te()
43 *cnt = nvbios_rd08(bios, data + 0x03); nvbios_M0203Te()
55 nvbios_M0203Tp(struct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len, nvbios_M0203Tp() argument
58 u32 data = nvbios_M0203Te(bios, ver, hdr, cnt, len); nvbios_M0203Tp()
62 info->type = nvbios_rd08(bios, data + 0x04); nvbios_M0203Tp()
63 info->pointer = nvbios_rd16(bios, data + 0x05); nvbios_M0203Tp()
72 nvbios_M0203Ee(struct nvkm_bios *bios, int idx, u8 *ver, u8 *hdr) nvbios_M0203Ee() argument
75 u32 data = nvbios_M0203Te(bios, ver, hdr, &cnt, &len); nvbios_M0203Ee()
85 nvbios_M0203Ep(struct nvkm_bios *bios, int idx, u8 *ver, u8 *hdr, nvbios_M0203Ep() argument
88 u32 data = nvbios_M0203Ee(bios, idx, ver, hdr); nvbios_M0203Ep()
92 info->type = (nvbios_rd08(bios, data + 0x00) & 0x0f) >> 0; nvbios_M0203Ep()
93 info->strap = (nvbios_rd08(bios, data + 0x00) & 0xf0) >> 4; nvbios_M0203Ep()
94 info->group = (nvbios_rd08(bios, data + 0x01) & 0x0f) >> 0; nvbios_M0203Ep()
103 nvbios_M0203Em(struct nvkm_bios *bios, u8 ramcfg, u8 *ver, u8 *hdr, nvbios_M0203Em() argument
106 struct nvkm_subdev *subdev = &bios->subdev; nvbios_M0203Em()
111 if (!nvbios_M0203Tp(bios, ver, hdr, &cnt, &len, &M0203T)) { nvbios_M0203Em()
116 while ((data = nvbios_M0203Ep(bios, ++idx, ver, hdr, info))) { nvbios_M0203Em()
H A DM0205.c24 #include <subdev/bios.h>
25 #include <subdev/bios/bit.h>
26 #include <subdev/bios/M0205.h>
29 nvbios_M0205Te(struct nvkm_bios *bios, nvbios_M0205Te() argument
35 if (!bit_entry(bios, 'M', &bit_M)) { nvbios_M0205Te()
37 data = nvbios_rd32(bios, bit_M.offset + 0x05); nvbios_M0205Te()
39 *ver = nvbios_rd08(bios, data + 0x00); nvbios_M0205Te()
42 *hdr = nvbios_rd08(bios, data + 0x01); nvbios_M0205Te()
43 *len = nvbios_rd08(bios, data + 0x02); nvbios_M0205Te()
44 *ssz = nvbios_rd08(bios, data + 0x03); nvbios_M0205Te()
45 *snr = nvbios_rd08(bios, data + 0x04); nvbios_M0205Te()
46 *cnt = nvbios_rd08(bios, data + 0x05); nvbios_M0205Te()
58 nvbios_M0205Tp(struct nvkm_bios *bios, nvbios_M0205Tp() argument
62 u32 data = nvbios_M0205Te(bios, ver, hdr, cnt, len, snr, ssz); nvbios_M0205Tp()
66 info->freq = nvbios_rd16(bios, data + 0x06); nvbios_M0205Tp()
75 nvbios_M0205Ee(struct nvkm_bios *bios, int idx, nvbios_M0205Ee() argument
79 u32 data = nvbios_M0205Te(bios, ver, hdr, cnt, len, &snr, &ssz); nvbios_M0205Ee()
91 nvbios_M0205Ep(struct nvkm_bios *bios, int idx, nvbios_M0205Ep() argument
95 u32 data = nvbios_M0205Ee(bios, idx, ver, hdr, cnt, len); nvbios_M0205Ep()
99 info->type = nvbios_rd08(bios, data + 0x00) & 0x0f; nvbios_M0205Ep()
108 nvbios_M0205Se(struct nvkm_bios *bios, int ent, int idx, u8 *ver, u8 *hdr) nvbios_M0205Se() argument
112 u32 data = nvbios_M0205Ee(bios, ent, ver, hdr, &cnt, &len); nvbios_M0205Se()
122 nvbios_M0205Sp(struct nvkm_bios *bios, int ent, int idx, u8 *ver, u8 *hdr, nvbios_M0205Sp() argument
125 u32 data = nvbios_M0205Se(bios, ent, idx, ver, hdr); nvbios_M0205Sp()
129 info->data = nvbios_rd08(bios, data + 0x00); nvbios_M0205Sp()
H A Dnpde.c24 #include <subdev/bios.h>
25 #include <subdev/bios/npde.h>
26 #include <subdev/bios/pcir.h>
29 nvbios_npdeTe(struct nvkm_bios *bios, u32 base) nvbios_npdeTe() argument
33 u32 data = nvbios_pcirTp(bios, base, &ver, &hdr, &pcir); nvbios_npdeTe()
35 switch (nvbios_rd32(bios, data + 0x00)) { nvbios_npdeTe()
39 nvkm_debug(&bios->subdev, nvbios_npdeTe()
41 data, nvbios_rd32(bios, data + 0x00)); nvbios_npdeTe()
50 nvbios_npdeTp(struct nvkm_bios *bios, u32 base, struct nvbios_npdeT *info) nvbios_npdeTp() argument
52 u32 data = nvbios_npdeTe(bios, base); nvbios_npdeTp()
55 info->image_size = nvbios_rd16(bios, data + 0x08) * 512; nvbios_npdeTp()
56 info->last = nvbios_rd08(bios, data + 0x0a) & 0x80; nvbios_npdeTp()
H A Dshadow.c27 #include <subdev/bios.h>
28 #include <subdev/bios/image.h>
39 shadow_fetch(struct nvkm_bios *bios, struct shadow *mthd, u32 upto) shadow_fetch() argument
42 const u32 start = bios->size; shadow_fetch()
44 if (nvbios_extend(bios, limit) > 0) { shadow_fetch()
45 u32 read = mthd->func->read(data, start, limit - start, bios); shadow_fetch()
46 bios->size = start + read; shadow_fetch()
48 return bios->size >= upto; shadow_fetch()
52 shadow_image(struct nvkm_bios *bios, int idx, u32 offset, struct shadow *mthd) shadow_image() argument
54 struct nvkm_subdev *subdev = &bios->subdev; shadow_image()
64 if (!shadow_fetch(bios, mthd, offset + 0x1000)) { shadow_image()
70 if (!nvbios_image(bios, idx, &image)) { shadow_image()
78 if (!shadow_fetch(bios, mthd, image.size)) { shadow_image()
86 nvbios_checksum(&bios->data[image.base], image.size)) { shadow_image()
102 score += shadow_image(bios, idx + 1, offset + image.size, mthd); shadow_image()
107 shadow_method(struct nvkm_bios *bios, struct shadow *mthd, const char *name) shadow_method() argument
110 struct nvkm_subdev *subdev = &bios->subdev; shadow_method()
114 mthd->data = func->init(bios, name); shadow_method()
120 mthd->score = shadow_image(bios, 0, 0, mthd); shadow_method()
124 mthd->data = bios->data; shadow_method()
125 mthd->size = bios->size; shadow_method()
126 bios->data = NULL; shadow_method()
127 bios->size = 0; shadow_method()
133 shadow_fw_read(void *data, u32 offset, u32 length, struct nvkm_bios *bios) shadow_fw_read() argument
137 memcpy(bios->data + offset, fw->data + offset, length); shadow_fw_read()
144 shadow_fw_init(struct nvkm_bios *bios, const char *name) shadow_fw_init() argument
146 struct device *dev = bios->subdev.device->dev; shadow_fw_init()
164 nvbios_shadow(struct nvkm_bios *bios) nvbios_shadow() argument
166 struct nvkm_subdev *subdev = &bios->subdev; nvbios_shadow()
182 /* handle user-specified bios source */ nvbios_shadow()
191 if (shadow_method(bios, mthd, NULL)) nvbios_shadow()
199 shadow_method(bios, mthd, source); nvbios_shadow()
210 /* scan all potential bios sources, looking for best image */ nvbios_shadow()
214 if (shadow_method(bios, mthd, NULL)) { nvbios_shadow()
235 bios->data = best->data; nvbios_shadow()
236 bios->size = best->size; nvbios_shadow()
H A Dimage.c24 #include <subdev/bios.h>
25 #include <subdev/bios/image.h>
26 #include <subdev/bios/pcir.h>
27 #include <subdev/bios/npde.h>
30 nvbios_imagen(struct nvkm_bios *bios, struct nvbios_image *image) nvbios_imagen() argument
32 struct nvkm_subdev *subdev = &bios->subdev; nvbios_imagen()
39 switch ((data = nvbios_rd16(bios, image->base + 0x00))) { nvbios_imagen()
50 if (!(data = nvbios_pcirTp(bios, image->base, &ver, &hdr, &pcir))) nvbios_imagen()
57 if (!(data = nvbios_npdeTp(bios, image->base, &npde))) nvbios_imagen()
69 nvbios_image(struct nvkm_bios *bios, int idx, struct nvbios_image *image) nvbios_image() argument
74 if (image->last || !nvbios_imagen(bios, image)) nvbios_image()
H A Ddcb.c24 #include <subdev/bios.h>
25 #include <subdev/bios/dcb.h>
28 dcb_table(struct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len) dcb_table() argument
30 struct nvkm_subdev *subdev = &bios->subdev; dcb_table()
35 dcb = nvbios_rd16(bios, 0x36); dcb_table()
41 *ver = nvbios_rd08(bios, dcb); dcb_table()
48 if (nvbios_rd32(bios, dcb + 6) == 0x4edcbdcb) { dcb_table()
49 *hdr = nvbios_rd08(bios, dcb + 1); dcb_table()
50 *cnt = nvbios_rd08(bios, dcb + 2); dcb_table()
51 *len = nvbios_rd08(bios, dcb + 3); dcb_table()
56 if (nvbios_rd32(bios, dcb + 4) == 0x4edcbdcb) { dcb_table()
57 u16 i2c = nvbios_rd16(bios, dcb + 2); dcb_table()
65 if (!nvbios_memcmp(bios, dcb - 7, "DEV_REC", 7)) { dcb_table()
66 u16 i2c = nvbios_rd16(bios, dcb + 2); dcb_table()
99 dcb_outp(struct nvkm_bios *bios, u8 idx, u8 *ver, u8 *len) dcb_outp() argument
102 u16 dcb = dcb_table(bios, ver, &hdr, &cnt, len); dcb_outp()
121 dcb_outp_parse(struct nvkm_bios *bios, u8 idx, u8 *ver, u8 *len, dcb_outp_parse() argument
124 u16 dcb = dcb_outp(bios, idx, ver, len); dcb_outp_parse()
128 u32 conn = nvbios_rd32(bios, dcb + 0x00); dcb_outp_parse()
142 u32 conf = nvbios_rd32(bios, dcb + 0x04); dcb_outp_parse()
194 dcb_outp_match(struct nvkm_bios *bios, u16 type, u16 mask, dcb_outp_match() argument
198 while ((dcb = dcb_outp_parse(bios, idx++, ver, len, outp))) { dcb_outp_match()
208 dcb_outp_foreach(struct nvkm_bios *bios, void *data, dcb_outp_foreach() argument
215 while ((outp = dcb_outp(bios, ++idx, &ver, &len))) { dcb_outp_foreach()
216 if (nvbios_rd32(bios, outp) == 0x00000000) dcb_outp_foreach()
218 if (nvbios_rd32(bios, outp) == 0xffffffff) dcb_outp_foreach()
221 if (nvbios_rd08(bios, outp) == DCB_OUTPUT_UNUSED) dcb_outp_foreach()
223 if (nvbios_rd08(bios, outp) == DCB_OUTPUT_EOL) dcb_outp_foreach()
226 ret = exec(bios, data, idx, outp); dcb_outp_foreach()
H A Dshadowacpi.c26 int nouveau_acpi_get_bios_chunk(uint8_t *bios, int offset, int len);
36 nouveau_acpi_get_bios_chunk(uint8_t *bios, int offset, int len) nouveau_acpi_get_bios_chunk() argument
47 acpi_read_fast(void *data, u32 offset, u32 length, struct nvkm_bios *bios) acpi_read_fast() argument
53 if (nvbios_extend(bios, limit) >= 0) { acpi_read_fast()
54 int ret = nouveau_acpi_get_bios_chunk(bios->data, start, fetch); acpi_read_fast()
63 * but only return 4KiB of data. The common bios fetching logic will
68 acpi_read_slow(void *data, u32 offset, u32 length, struct nvkm_bios *bios) acpi_read_slow() argument
74 if (nvbios_extend(bios, limit) >= 0) { acpi_read_slow()
76 int ret = nouveau_acpi_get_bios_chunk(bios->data, acpi_read_slow()
89 acpi_init(struct nvkm_bios *bios, const char *name) acpi_init() argument
91 if (!nouveau_acpi_rom_supported(bios->subdev.device->dev)) acpi_init()
H A Dshadowramin.c26 struct nvkm_bios *bios; member in struct:priv
31 pramin_read(void *data, u32 offset, u32 length, struct nvkm_bios *bios) pramin_read() argument
33 struct nvkm_device *device = bios->subdev.device; pramin_read()
37 *(u32 *)&bios->data[i] = nvkm_rd32(device, 0x700000 + i); pramin_read()
48 struct nvkm_device *device = priv->bios->subdev.device; pramin_fini()
55 pramin_init(struct nvkm_bios *bios, const char *name) pramin_init() argument
57 struct nvkm_subdev *subdev = &bios->subdev; pramin_init()
66 /* we can't get the bios image pointer without PDISP */ pramin_init()
98 /* modify bar0 PRAMIN window to cover the bios image */ pramin_init()
104 priv->bios = bios; pramin_init()
H A Dshadowpci.c34 pcirom_read(void *data, u32 offset, u32 length, struct nvkm_bios *bios) pcirom_read() argument
38 memcpy_fromio(bios->data + offset, priv->rom + offset, length); pcirom_read()
54 pcirom_init(struct nvkm_bios *bios, const char *name) pcirom_init() argument
56 struct nvkm_device *device = bios->subdev.device; pcirom_init()
92 platform_init(struct nvkm_bios *bios, const char *name) platform_init() argument
94 struct nvkm_device *device = bios->subdev.device; platform_init()
H A Dshadowof.c34 of_read(void *data, u32 offset, u32 length, struct nvkm_bios *bios) of_read() argument
39 memcpy_fromio(bios->data + offset, priv->data + offset, length); of_read()
53 of_init(struct nvkm_bios *bios, const char *name) of_init() argument
55 struct nvkm_device *device = bios->subdev.device; of_init()
H A Dshadowrom.c28 prom_read(void *data, u32 offset, u32 length, struct nvkm_bios *bios) prom_read() argument
34 *(u32 *)&bios->data[i] = nvkm_rd32(device, 0x300000 + i); prom_read()
48 prom_init(struct nvkm_bios *bios, const char *name) prom_init() argument
50 struct nvkm_device *device = bios->subdev.device; prom_init()
H A Dpriv.h4 #include <subdev/bios.h>
/linux-4.4.14/drivers/gpu/drm/radeon/
H A Datom-bits.h28 static inline uint8_t get_u8(void *bios, int ptr) get_u8() argument
30 return ((unsigned char *)bios)[ptr]; get_u8()
32 #define U8(ptr) get_u8(ctx->ctx->bios, (ptr))
33 #define CU8(ptr) get_u8(ctx->bios, (ptr)) get_u16()
34 static inline uint16_t get_u16(void *bios, int ptr) get_u16() argument
36 return get_u8(bios ,ptr)|(((uint16_t)get_u8(bios, ptr+1))<<8); get_u16()
38 #define U16(ptr) get_u16(ctx->ctx->bios, (ptr))
39 #define CU16(ptr) get_u16(ctx->bios, (ptr)) get_u32()
40 static inline uint32_t get_u32(void *bios, int ptr) get_u32() argument
42 return get_u16(bios, ptr)|(((uint32_t)get_u16(bios, ptr+2))<<16); get_u32()
44 #define U32(ptr) get_u32(ctx->ctx->bios, (ptr))
45 #define CU32(ptr) get_u32(ctx->bios, (ptr))
46 #define CSTR(ptr) (((char *)(ctx->bios))+(ptr))
H A Dradeon_bios.c41 * part of the system bios. On boot, the system bios puts a
47 uint8_t __iomem *bios; igp_read_bios_from_vram() local
55 rdev->bios = NULL; igp_read_bios_from_vram()
57 bios = ioremap(vram_base, size); igp_read_bios_from_vram()
58 if (!bios) { igp_read_bios_from_vram()
62 if (size == 0 || bios[0] != 0x55 || bios[1] != 0xaa) { igp_read_bios_from_vram()
63 iounmap(bios); igp_read_bios_from_vram()
66 rdev->bios = kmalloc(size, GFP_KERNEL); igp_read_bios_from_vram()
67 if (rdev->bios == NULL) { igp_read_bios_from_vram()
68 iounmap(bios); igp_read_bios_from_vram()
71 memcpy_fromio(rdev->bios, bios, size); igp_read_bios_from_vram()
72 iounmap(bios); igp_read_bios_from_vram()
78 uint8_t __iomem *bios, val1, val2; radeon_read_bios() local
81 rdev->bios = NULL; radeon_read_bios()
83 bios = pci_map_rom(rdev->pdev, &size); radeon_read_bios()
84 if (!bios) { radeon_read_bios()
88 val1 = readb(&bios[0]); radeon_read_bios()
89 val2 = readb(&bios[1]); radeon_read_bios()
92 pci_unmap_rom(rdev->pdev, bios); radeon_read_bios()
95 rdev->bios = kzalloc(size, GFP_KERNEL); radeon_read_bios()
96 if (rdev->bios == NULL) { radeon_read_bios()
97 pci_unmap_rom(rdev->pdev, bios); radeon_read_bios()
100 memcpy_fromio(rdev->bios, bios, size); radeon_read_bios()
101 pci_unmap_rom(rdev->pdev, bios); radeon_read_bios()
107 uint8_t __iomem *bios; radeon_read_platform_bios() local
110 rdev->bios = NULL; radeon_read_platform_bios()
112 bios = pci_platform_rom(rdev->pdev, &size); radeon_read_platform_bios()
113 if (!bios) { radeon_read_platform_bios()
117 if (size == 0 || bios[0] != 0x55 || bios[1] != 0xaa) { radeon_read_platform_bios()
120 rdev->bios = kmemdup(bios, size, GFP_KERNEL); radeon_read_platform_bios()
121 if (rdev->bios == NULL) { radeon_read_platform_bios()
138 * @bios: vbios image pointer
146 static int radeon_atrm_call(acpi_handle atrm_handle, uint8_t *bios, radeon_atrm_call() argument
170 memcpy(bios+offset, obj->buffer.pointer, obj->buffer.length); radeon_atrm_call()
219 rdev->bios = kmalloc(size, GFP_KERNEL); radeon_atrm_get_bios()
220 if (!rdev->bios) { radeon_atrm_get_bios()
221 DRM_ERROR("Unable to allocate bios\n"); radeon_atrm_get_bios()
227 rdev->bios, radeon_atrm_get_bios()
234 if (i == 0 || rdev->bios[0] != 0x55 || rdev->bios[1] != 0xaa) { radeon_atrm_get_bios()
235 kfree(rdev->bios); radeon_atrm_get_bios()
639 rdev->bios = kmemdup(&vbios->VbiosContent, vhdr->ImageLength, GFP_KERNEL); radeon_acpi_vfct_bios()
640 ret = !!rdev->bios; radeon_acpi_vfct_bios()
668 if (r == false || rdev->bios == NULL) { radeon_get_bios()
670 rdev->bios = NULL; radeon_get_bios()
673 if (rdev->bios[0] != 0x55 || rdev->bios[1] != 0xaa) { radeon_get_bios()
674 printk("BIOS signature incorrect %x %x\n", rdev->bios[0], rdev->bios[1]); radeon_get_bios()
689 if (!memcmp(rdev->bios + tmp, "ATOM", 4) || radeon_get_bios()
690 !memcmp(rdev->bios + tmp, "MOTA", 4)) { radeon_get_bios()
699 kfree(rdev->bios); radeon_get_bios()
700 rdev->bios = NULL; radeon_get_bios()
H A Dr600_dpm.c853 power_info = (union power_info *)(mode_info->atom_context->bios + data_offset); r600_get_platform_caps()
884 power_info = (union power_info *)(mode_info->atom_context->bios + data_offset); r600_parse_extended_power_table()
890 fan_info = (union fan_info *)(mode_info->atom_context->bios + data_offset + r600_parse_extended_power_table()
921 (mode_info->atom_context->bios + data_offset + r600_parse_extended_power_table()
930 (mode_info->atom_context->bios + data_offset + r600_parse_extended_power_table()
941 (mode_info->atom_context->bios + data_offset + r600_parse_extended_power_table()
953 (mode_info->atom_context->bios + data_offset + r600_parse_extended_power_table()
967 (mode_info->atom_context->bios + data_offset + r600_parse_extended_power_table()
985 (mode_info->atom_context->bios + data_offset + r600_parse_extended_power_table()
1032 (mode_info->atom_context->bios + data_offset + r600_parse_extended_power_table()
1067 (mode_info->atom_context->bios + data_offset + r600_parse_extended_power_table()
1072 (mode_info->atom_context->bios + data_offset + r600_parse_extended_power_table()
1076 (mode_info->atom_context->bios + data_offset + r600_parse_extended_power_table()
1081 (mode_info->atom_context->bios + data_offset + r600_parse_extended_power_table()
1134 (mode_info->atom_context->bios + data_offset + r600_parse_extended_power_table()
1138 (mode_info->atom_context->bios + data_offset + r600_parse_extended_power_table()
1171 (mode_info->atom_context->bios + data_offset + r600_parse_extended_power_table()
1197 (mode_info->atom_context->bios + data_offset + r600_parse_extended_power_table()
1229 (mode_info->atom_context->bios + data_offset + r600_parse_extended_power_table()
1254 u8 rev = *(u8 *)(mode_info->atom_context->bios + data_offset + r600_parse_extended_power_table()
1265 (mode_info->atom_context->bios + data_offset + r600_parse_extended_power_table()
1272 (mode_info->atom_context->bios + data_offset + r600_parse_extended_power_table()
H A Dradeon_atombios.c144 i2c_info = (struct _ATOM_GPIO_I2C_INFO *)(ctx->bios + data_offset); radeon_lookup_i2c_gpio()
178 i2c_info = (struct _ATOM_GPIO_I2C_INFO *)(ctx->bios + data_offset); radeon_atombios_i2c_init()
214 gpio_info = (struct _ATOM_GPIO_PIN_LUT *)(ctx->bios + data_offset); radeon_atombios_lookup_gpio()
410 * So while the bios table is technically correct, radeon_atom_apply_quirks()
544 obj_header = (ATOM_OBJECT_HEADER *) (ctx->bios + data_offset); radeon_get_atom_connector_info_from_object_table()
546 (ctx->bios + data_offset + radeon_get_atom_connector_info_from_object_table()
549 (ctx->bios + data_offset + radeon_get_atom_connector_info_from_object_table()
552 (ctx->bios + data_offset + radeon_get_atom_connector_info_from_object_table()
555 (ctx->bios + data_offset + radeon_get_atom_connector_info_from_object_table()
602 *) (ctx->bios + igp_offset); radeon_get_atom_connector_info_from_object_table()
663 (ctx->bios + data_offset + radeon_get_atom_connector_info_from_object_table()
694 (ctx->bios + data_offset + radeon_get_atom_connector_info_from_object_table()
702 (ctx->bios + data_offset + radeon_get_atom_connector_info_from_object_table()
772 (ctx->bios + data_offset + radeon_get_atom_connector_info_from_object_table()
866 xtmds = (ATOM_XTMDS_INFO *)(ctx->bios + data_offset); atombios_get_connector_object_id()
929 (union atom_supported_devices *)(ctx->bios + data_offset); radeon_get_atom_connector_info_from_supported_devices_table()
1127 igp_info = (union igp_info *)(mode_info->atom_context->bios + radeon_atombios_get_dentist_vco_freq()
1151 (union firmware_info *)(mode_info->atom_context->bios + radeon_atom_get_clock_info()
1318 igp_info = (union igp_info *)(mode_info->atom_context->bios + radeon_atombios_sideport_present()
1353 (struct _ATOM_TMDS_INFO *)(mode_info->atom_context->bios + radeon_atombios_get_tmds_info()
1402 (struct _ATOM_SPREAD_SPECTRUM_INFO *)(mode_info->atom_context->bios + data_offset); radeon_atombios_get_ppll_ss_info()
1441 (mode_info->atom_context->bios + data_offset); radeon_atombios_get_igp_ss_overrides()
1540 (union asic_ss_info *)(mode_info->atom_context->bios + data_offset); radeon_atombios_get_asic_ss_info()
1642 (union lvds_info *)(mode_info->atom_context->bios + data_offset); radeon_atombios_get_lvds_info()
1707 record = (u8 *)(mode_info->atom_context->bios + radeon_atombios_get_lvds_info()
1711 record = (u8 *)(mode_info->atom_context->bios + radeon_atombios_get_lvds_info()
1782 (mode_info->atom_context->bios + data_offset); radeon_atombios_get_primary_dac_info()
1814 tv_info = (ATOM_ANALOG_TV_INFO *)(mode_info->atom_context->bios + data_offset); radeon_atom_get_tv_timings()
1853 tv_info_v1_2 = (ATOM_ANALOG_TV_INFO_V1_2 *)(mode_info->atom_context->bios + data_offset); radeon_atom_get_tv_timings()
1908 (mode_info->atom_context->bios + data_offset); radeon_atombios_get_tv_info()
1969 (mode_info->atom_context->bios + data_offset); radeon_atombios_get_tv_dac_info()
2104 power_info = (union power_info *)(mode_info->atom_context->bios + data_offset); radeon_atombios_parse_power_table_1_3()
2385 (union firmware_info *)(mode_info->atom_context->bios + radeon_atombios_get_default_voltages()
2584 power_info = (union power_info *)(mode_info->atom_context->bios + data_offset); radeon_atombios_parse_power_table_4_5()
2597 (mode_info->atom_context->bios + data_offset + radeon_atombios_parse_power_table_4_5()
2601 (mode_info->atom_context->bios + data_offset + radeon_atombios_parse_power_table_4_5()
2614 (mode_info->atom_context->bios + data_offset + radeon_atombios_parse_power_table_4_5()
2676 power_info = (union power_info *)(mode_info->atom_context->bios + data_offset); radeon_atombios_parse_power_table_6()
2680 (mode_info->atom_context->bios + data_offset + radeon_atombios_parse_power_table_6()
2683 (mode_info->atom_context->bios + data_offset + radeon_atombios_parse_power_table_6()
2686 (mode_info->atom_context->bios + data_offset + radeon_atombios_parse_power_table_6()
3226 (rdev->mode_info.atom_context->bios + data_offset); radeon_atom_get_leakage_vddc_based_on_leakage_params()
3237 (rdev->mode_info.atom_context->bios + data_offset + radeon_atom_get_leakage_vddc_based_on_leakage_params()
3240 (rdev->mode_info.atom_context->bios + data_offset + radeon_atom_get_leakage_vddc_based_on_leakage_params()
3243 (rdev->mode_info.atom_context->bios + data_offset + radeon_atom_get_leakage_vddc_based_on_leakage_params()
3246 (rdev->mode_info.atom_context->bios + data_offset + radeon_atom_get_leakage_vddc_based_on_leakage_params()
3249 (rdev->mode_info.atom_context->bios + data_offset + radeon_atom_get_leakage_vddc_based_on_leakage_params()
3443 (rdev->mode_info.atom_context->bios + data_offset); radeon_atom_is_voltage_gpio()
3502 (rdev->mode_info.atom_context->bios + data_offset); radeon_atom_get_svi2_info()
3545 (rdev->mode_info.atom_context->bios + data_offset); radeon_atom_get_max_voltage()
3604 (rdev->mode_info.atom_context->bios + data_offset); radeon_atom_get_min_voltage()
3654 (rdev->mode_info.atom_context->bios + data_offset); radeon_atom_get_voltage_step()
3723 (rdev->mode_info.atom_context->bios + data_offset); radeon_atom_get_voltage_table()
3823 (rdev->mode_info.atom_context->bios + data_offset); radeon_atom_get_memory_info()
3915 (rdev->mode_info.atom_context->bios + data_offset); radeon_atom_get_mclk_range_table()
3987 (rdev->mode_info.atom_context->bios + data_offset); radeon_atom_init_mc_reg_table()
4076 /* let the bios control the backlight */ radeon_atom_initialize_bios_scratch_regs()
4079 /* tell the bios not to handle mode switching */ radeon_atom_initialize_bios_scratch_regs()
H A Datom.h129 void *bios; member in struct:atom_context
H A Drs780_dpm.c805 power_info = (union power_info *)(mode_info->atom_context->bios + data_offset); rs780_parse_power_table()
814 (mode_info->atom_context->bios + data_offset + rs780_parse_power_table()
818 (mode_info->atom_context->bios + data_offset + rs780_parse_power_table()
824 (mode_info->atom_context->bios + data_offset + rs780_parse_power_table()
873 info = (union igp_info *)(rdev->mode_info.atom_context->bios + data_offset); rs780_dpm_init()
875 /* Get various system informations from bios */ rs780_dpm_init()
H A Datom.c1266 struct atom_context *atom_parse(struct card_info *card, void *bios) atom_parse() argument
1279 ctx->bios = bios; atom_parse()
1368 u16 *mdt = (u16 *)(ctx->bios + ctx->data_table + 4); atom_parse_data_header()
1388 u16 *mct = (u16 *)(ctx->bios + ctx->cmd_table + 4); atom_parse_cmd_header()
1408 firmware_usage = (struct _ATOM_VRAM_USAGE_BY_FIRMWARE *)(ctx->bios + data_offset); atom_allocate_fb_scratch()
/linux-4.4.14/drivers/gpu/drm/amd/include/
H A Datom-bits.h28 static inline uint8_t get_u8(void *bios, int ptr) get_u8() argument
30 return ((unsigned char *)bios)[ptr]; get_u8()
32 #define U8(ptr) get_u8(ctx->ctx->bios, (ptr))
33 #define CU8(ptr) get_u8(ctx->bios, (ptr)) get_u16()
34 static inline uint16_t get_u16(void *bios, int ptr) get_u16() argument
36 return get_u8(bios ,ptr)|(((uint16_t)get_u8(bios, ptr+1))<<8); get_u16()
38 #define U16(ptr) get_u16(ctx->ctx->bios, (ptr))
39 #define CU16(ptr) get_u16(ctx->bios, (ptr)) get_u32()
40 static inline uint32_t get_u32(void *bios, int ptr) get_u32() argument
42 return get_u16(bios, ptr)|(((uint32_t)get_u16(bios, ptr+2))<<16); get_u32()
44 #define U32(ptr) get_u32(ctx->ctx->bios, (ptr))
45 #define CU32(ptr) get_u32(ctx->bios, (ptr))
46 #define CSTR(ptr) (((char *)(ctx->bios))+(ptr))
/linux-4.4.14/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_bios.c40 * part of the system bios. On boot, the system bios puts a
46 uint8_t __iomem *bios; igp_read_bios_from_vram() local
54 adev->bios = NULL; igp_read_bios_from_vram()
56 bios = ioremap(vram_base, size); igp_read_bios_from_vram()
57 if (!bios) { igp_read_bios_from_vram()
61 if (size == 0 || bios[0] != 0x55 || bios[1] != 0xaa) { igp_read_bios_from_vram()
62 iounmap(bios); igp_read_bios_from_vram()
65 adev->bios = kmalloc(size, GFP_KERNEL); igp_read_bios_from_vram()
66 if (adev->bios == NULL) { igp_read_bios_from_vram()
67 iounmap(bios); igp_read_bios_from_vram()
70 memcpy_fromio(adev->bios, bios, size); igp_read_bios_from_vram()
71 iounmap(bios); igp_read_bios_from_vram()
77 uint8_t __iomem *bios, val1, val2; amdgpu_read_bios() local
80 adev->bios = NULL; amdgpu_read_bios()
82 bios = pci_map_rom(adev->pdev, &size); amdgpu_read_bios()
83 if (!bios) { amdgpu_read_bios()
87 val1 = readb(&bios[0]); amdgpu_read_bios()
88 val2 = readb(&bios[1]); amdgpu_read_bios()
91 pci_unmap_rom(adev->pdev, bios); amdgpu_read_bios()
94 adev->bios = kzalloc(size, GFP_KERNEL); amdgpu_read_bios()
95 if (adev->bios == NULL) { amdgpu_read_bios()
96 pci_unmap_rom(adev->pdev, bios); amdgpu_read_bios()
99 memcpy_fromio(adev->bios, bios, size); amdgpu_read_bios()
100 pci_unmap_rom(adev->pdev, bios); amdgpu_read_bios()
106 uint8_t __iomem *bios; amdgpu_read_platform_bios() local
109 adev->bios = NULL; amdgpu_read_platform_bios()
111 bios = pci_platform_rom(adev->pdev, &size); amdgpu_read_platform_bios()
112 if (!bios) { amdgpu_read_platform_bios()
116 if (size == 0 || bios[0] != 0x55 || bios[1] != 0xaa) { amdgpu_read_platform_bios()
119 adev->bios = kmemdup(bios, size, GFP_KERNEL); amdgpu_read_platform_bios()
120 if (adev->bios == NULL) { amdgpu_read_platform_bios()
137 * @bios: vbios image pointer
145 static int amdgpu_atrm_call(acpi_handle atrm_handle, uint8_t *bios, amdgpu_atrm_call() argument
169 memcpy(bios+offset, obj->buffer.pointer, obj->buffer.length); amdgpu_atrm_call()
218 adev->bios = kmalloc(size, GFP_KERNEL); amdgpu_atrm_get_bios()
219 if (!adev->bios) { amdgpu_atrm_get_bios()
220 DRM_ERROR("Unable to allocate bios\n"); amdgpu_atrm_get_bios()
226 adev->bios, amdgpu_atrm_get_bios()
233 if (i == 0 || adev->bios[0] != 0x55 || adev->bios[1] != 0xaa) { amdgpu_atrm_get_bios()
234 kfree(adev->bios); amdgpu_atrm_get_bios()
297 adev->bios = kmemdup(&vbios->VbiosContent, vhdr->ImageLength, GFP_KERNEL); amdgpu_acpi_vfct_bios()
298 ret = !!adev->bios; amdgpu_acpi_vfct_bios()
328 if (r == false || adev->bios == NULL) { amdgpu_get_bios()
330 adev->bios = NULL; amdgpu_get_bios()
333 if (adev->bios[0] != 0x55 || adev->bios[1] != 0xaa) { amdgpu_get_bios()
334 printk("BIOS signature incorrect %x %x\n", adev->bios[0], adev->bios[1]); amdgpu_get_bios()
349 if (!memcmp(adev->bios + tmp, "ATOM", 4) || amdgpu_get_bios()
350 !memcmp(adev->bios + tmp, "MOTA", 4)) { amdgpu_get_bios()
359 kfree(adev->bios); amdgpu_get_bios()
360 adev->bios = NULL; amdgpu_get_bios()
H A Damdgpu_atombios.c102 i2c_info = (struct _ATOM_GPIO_I2C_INFO *)(ctx->bios + data_offset); amdgpu_atombios_lookup_i2c_gpio()
136 i2c_info = (struct _ATOM_GPIO_I2C_INFO *)(ctx->bios + data_offset); amdgpu_atombios_i2c_init()
173 gpio_info = (struct _ATOM_GPIO_PIN_LUT *)(ctx->bios + data_offset); amdgpu_atombios_lookup_gpio()
298 obj_header = (ATOM_OBJECT_HEADER *) (ctx->bios + data_offset); amdgpu_atombios_get_connector_info_from_object_table()
300 (ctx->bios + data_offset + amdgpu_atombios_get_connector_info_from_object_table()
303 (ctx->bios + data_offset + amdgpu_atombios_get_connector_info_from_object_table()
306 (ctx->bios + data_offset + amdgpu_atombios_get_connector_info_from_object_table()
309 (ctx->bios + data_offset + amdgpu_atombios_get_connector_info_from_object_table()
361 (ctx->bios + data_offset + amdgpu_atombios_get_connector_info_from_object_table()
389 (ctx->bios + data_offset + amdgpu_atombios_get_connector_info_from_object_table()
397 (ctx->bios + data_offset + amdgpu_atombios_get_connector_info_from_object_table()
467 (ctx->bios + data_offset + amdgpu_atombios_get_connector_info_from_object_table()
562 (union firmware_info *)(mode_info->atom_context->bios + amdgpu_atombios_get_clock_info()
726 (mode_info->atom_context->bios + data_offset); amdgpu_atombios_get_igp_ss_overrides()
841 (union asic_ss_info *)(mode_info->atom_context->bios + data_offset); amdgpu_atombios_get_asic_ss_info()
1187 (adev->mode_info.atom_context->bios + data_offset); amdgpu_atombios_get_leakage_vddc_based_on_leakage_params()
1198 (adev->mode_info.atom_context->bios + data_offset + amdgpu_atombios_get_leakage_vddc_based_on_leakage_params()
1201 (adev->mode_info.atom_context->bios + data_offset + amdgpu_atombios_get_leakage_vddc_based_on_leakage_params()
1204 (adev->mode_info.atom_context->bios + data_offset + amdgpu_atombios_get_leakage_vddc_based_on_leakage_params()
1207 (adev->mode_info.atom_context->bios + data_offset + amdgpu_atombios_get_leakage_vddc_based_on_leakage_params()
1210 (adev->mode_info.atom_context->bios + data_offset + amdgpu_atombios_get_leakage_vddc_based_on_leakage_params()
1331 (adev->mode_info.atom_context->bios + data_offset); amdgpu_atombios_is_voltage_gpio()
1369 (adev->mode_info.atom_context->bios + data_offset); amdgpu_atombios_get_voltage_table()
1441 (adev->mode_info.atom_context->bios + data_offset); amdgpu_atombios_init_mc_reg_table()
1541 /* let the bios control the backlight */ amdgpu_atombios_scratch_regs_init()
1544 /* tell the bios not to handle mode switching */ amdgpu_atombios_scratch_regs_init()
H A Damdgpu_dpm.c293 power_info = (union power_info *)(mode_info->atom_context->bios + data_offset); amdgpu_get_platform_caps()
326 power_info = (union power_info *)(mode_info->atom_context->bios + data_offset); amdgpu_parse_extended_power_table()
332 fan_info = (union fan_info *)(mode_info->atom_context->bios + data_offset + amdgpu_parse_extended_power_table()
363 (mode_info->atom_context->bios + data_offset + amdgpu_parse_extended_power_table()
374 (mode_info->atom_context->bios + data_offset + amdgpu_parse_extended_power_table()
385 (mode_info->atom_context->bios + data_offset + amdgpu_parse_extended_power_table()
396 (mode_info->atom_context->bios + data_offset + amdgpu_parse_extended_power_table()
408 (mode_info->atom_context->bios + data_offset + amdgpu_parse_extended_power_table()
426 (mode_info->atom_context->bios + data_offset + amdgpu_parse_extended_power_table()
473 (mode_info->atom_context->bios + data_offset + amdgpu_parse_extended_power_table()
508 (mode_info->atom_context->bios + data_offset + amdgpu_parse_extended_power_table()
513 (mode_info->atom_context->bios + data_offset + amdgpu_parse_extended_power_table()
517 (mode_info->atom_context->bios + data_offset + amdgpu_parse_extended_power_table()
522 (mode_info->atom_context->bios + data_offset + amdgpu_parse_extended_power_table()
575 (mode_info->atom_context->bios + data_offset + amdgpu_parse_extended_power_table()
579 (mode_info->atom_context->bios + data_offset + amdgpu_parse_extended_power_table()
612 (mode_info->atom_context->bios + data_offset + amdgpu_parse_extended_power_table()
638 (mode_info->atom_context->bios + data_offset + amdgpu_parse_extended_power_table()
670 (mode_info->atom_context->bios + data_offset + amdgpu_parse_extended_power_table()
695 u8 rev = *(u8 *)(mode_info->atom_context->bios + data_offset + amdgpu_parse_extended_power_table()
706 (mode_info->atom_context->bios + data_offset + amdgpu_parse_extended_power_table()
713 (mode_info->atom_context->bios + data_offset + amdgpu_parse_extended_power_table()
734 (mode_info->atom_context->bios + data_offset + amdgpu_parse_extended_power_table()
805 (mode_info->atom_context->bios + data_offset); amdgpu_add_thermal_controller()
H A Datom.h128 void *bios; member in struct:atom_context
/linux-4.4.14/drivers/gpu/drm/nouveau/
H A Dnouveau_bios.c68 static uint16_t clkcmptable(struct nvbios *bios, uint16_t clktable, int pxclk) clkcmptable() argument
73 if (bios->major_version < 5) /* pre BIT */ clkcmptable()
79 compareclk = ROM16(bios->data[clktable + compare_record_len * i]); clkcmptable()
81 if (bios->major_version < 5) { clkcmptable()
82 uint8_t tmdssub = bios->data[clktable + 2 + compare_record_len * i]; clkcmptable()
83 scriptptr = ROM16(bios->data[bios->init_script_tbls_ptr + tmdssub * 2]); clkcmptable()
85 scriptptr = ROM16(bios->data[clktable + 2 + compare_record_len * i]); clkcmptable()
112 struct nvbios *bios = &drm->vbios; call_lvds_manufacturer_script() local
113 uint8_t sub = bios->data[bios->fp.xlated_entry + script] + (bios->fp.link_c_increment && dcbent->or & DCB_OUTPUT_C ? 1 : 0); call_lvds_manufacturer_script()
114 uint16_t scriptofs = ROM16(bios->data[bios->init_script_tbls_ptr + sub * 2]); call_lvds_manufacturer_script()
116 if (!bios->fp.xlated_entry || !sub || !scriptofs) call_lvds_manufacturer_script()
119 run_digital_op_script(dev, scriptofs, dcbent, head, bios->fp.dual_link); call_lvds_manufacturer_script()
123 mdelay(ROM16(bios->data[bios->fp.xlated_entry + 7])); call_lvds_manufacturer_script()
149 struct nvbios *bios = &drm->vbios; run_lvds_table() local
163 scriptptr = ROM16(bios->data[bios->fp.lvdsmanufacturerpointer + 7 + outputset * 2]); run_lvds_table()
167 scriptptr = ROM16(bios->data[bios->fp.lvdsmanufacturerpointer + 11 + outputset * 2]); run_lvds_table()
170 clktable = bios->fp.lvdsmanufacturerpointer + 15; run_lvds_table()
175 if (bios->fp.dual_link) run_lvds_table()
177 if (bios->fp.if_is_24bit) run_lvds_table()
183 if (bios->fp.dual_link) { run_lvds_table()
188 if (bios->fp.strapless_is_24bit & cmpval_24bit) run_lvds_table()
192 clktable = ROM16(bios->data[clktable]); run_lvds_table()
197 scriptptr = clkcmptable(bios, clktable, pxclk); run_lvds_table()
204 run_digital_op_script(dev, scriptptr, dcbent, head, bios->fp.dual_link); run_lvds_table()
219 struct nvbios *bios = &drm->vbios; call_lvds_script() local
220 uint8_t lvds_ver = bios->data[bios->fp.lvdsmanufacturerpointer]; call_lvds_script()
224 if (bios->fp.last_script_invoc == (script << 1 | head) || !lvds_ver || call_lvds_script()
228 if (!bios->fp.lvds_init_run) { call_lvds_script()
229 bios->fp.lvds_init_run = true; call_lvds_script()
233 if (script == LVDS_PANEL_ON && bios->fp.reset_after_pclk_change) call_lvds_script()
235 if (script == LVDS_RESET && bios->fp.power_off_for_reset) call_lvds_script()
248 bios->fp.last_script_invoc = (script << 1 | head); call_lvds_script()
262 static int parse_lvds_manufacturer_table_header(struct drm_device *dev, struct nvbios *bios, struct lvdstableheader *lth) parse_lvds_manufacturer_table_header() argument
276 if (bios->fp.lvdsmanufacturerpointer == 0x0) { parse_lvds_manufacturer_table_header()
281 lvds_ver = bios->data[bios->fp.lvdsmanufacturerpointer]; parse_lvds_manufacturer_table_header()
286 recordlen = bios->data[bios->fp.lvdsmanufacturerpointer + 1]; parse_lvds_manufacturer_table_header()
289 headerlen = bios->data[bios->fp.lvdsmanufacturerpointer + 1]; parse_lvds_manufacturer_table_header()
294 recordlen = bios->data[bios->fp.lvdsmanufacturerpointer + 2]; parse_lvds_manufacturer_table_header()
297 headerlen = bios->data[bios->fp.lvdsmanufacturerpointer + 1]; parse_lvds_manufacturer_table_header()
302 recordlen = bios->data[bios->fp.lvdsmanufacturerpointer + 2]; parse_lvds_manufacturer_table_header()
319 get_fp_strap(struct drm_device *dev, struct nvbios *bios) get_fp_strap() argument
333 if (bios->major_version < 5 && bios->data[0x48] & 0x4) get_fp_strap()
342 static int parse_fp_mode_table(struct drm_device *dev, struct nvbios *bios) parse_fp_mode_table() argument
350 if (bios->fp.fptablepointer == 0x0) { parse_fp_mode_table()
356 bios->digital_min_front_porch = 0x4b; parse_fp_mode_table()
360 fptable = &bios->data[bios->fp.fptablepointer]; parse_fp_mode_table()
389 bios->digital_min_front_porch = fptable[4]; parse_fp_mode_table()
399 if (!bios->is_mobile) /* !mobile only needs digital_min_front_porch */ parse_fp_mode_table()
402 ret = parse_lvds_manufacturer_table_header(dev, bios, &lth); parse_fp_mode_table()
407 bios->fp.fpxlatetableptr = bios->fp.lvdsmanufacturerpointer + parse_fp_mode_table()
409 bios->fp.xlatwidth = lth.recordlen; parse_fp_mode_table()
411 if (bios->fp.fpxlatetableptr == 0x0) { parse_fp_mode_table()
416 fpstrapping = get_fp_strap(dev, bios); parse_fp_mode_table()
418 fpindex = bios->data[bios->fp.fpxlatetableptr + parse_fp_mode_table()
419 fpstrapping * bios->fp.xlatwidth]; parse_fp_mode_table()
428 bios->fp_no_ddc = fpstrapping != 0xf || fpindex != 0xf; parse_fp_mode_table()
432 * panel using a strap-derived bios mode present. this condition parse_fp_mode_table()
438 bios->fp.mode_ptr = bios->fp.fptablepointer + headerlen + parse_fp_mode_table()
442 ROM16(bios->data[bios->fp.mode_ptr + 11]) + 1, parse_fp_mode_table()
443 ROM16(bios->data[bios->fp.mode_ptr + 25]) + 1, parse_fp_mode_table()
444 ROM16(bios->data[bios->fp.mode_ptr + 7]) * 10); parse_fp_mode_table()
452 struct nvbios *bios = &drm->vbios; nouveau_bios_fp_mode() local
453 uint8_t *mode_entry = &bios->data[bios->fp.mode_ptr]; nouveau_bios_fp_mode()
456 return bios->fp.mode_ptr; nouveau_bios_fp_mode()
492 return bios->fp.mode_ptr; nouveau_bios_fp_mode()
523 struct nvbios *bios = &drm->vbios; nouveau_bios_parse_lvds_table() local
524 int fpstrapping = get_fp_strap(dev, bios), lvdsmanufacturerindex = 0; nouveau_bios_parse_lvds_table()
527 int ret, chip_version = bios->chip_version; nouveau_bios_parse_lvds_table()
529 ret = parse_lvds_manufacturer_table_header(dev, bios, &lth); nouveau_bios_parse_lvds_table()
535 lvdsmanufacturerindex = bios->data[ nouveau_bios_parse_lvds_table()
536 bios->fp.fpxlatemanufacturertableptr + nouveau_bios_parse_lvds_table()
550 (bios->legacy.lvds_single_a_script_ptr & 1) ? nouveau_bios_parse_lvds_table()
552 if (pxclk >= bios->fp.duallink_transition_clk) nouveau_bios_parse_lvds_table()
568 if (pxclk >= bios->fp.duallink_transition_clk) nouveau_bios_parse_lvds_table()
588 lvdsofs = bios->fp.xlated_entry = bios->fp.lvdsmanufacturerpointer + lth.headerlen + lth.recordlen * lvdsmanufacturerindex; nouveau_bios_parse_lvds_table()
591 bios->fp.power_off_for_reset = bios->data[lvdsofs] & 1; nouveau_bios_parse_lvds_table()
592 bios->fp.reset_after_pclk_change = bios->data[lvdsofs] & 2; nouveau_bios_parse_lvds_table()
593 bios->fp.dual_link = bios->data[lvdsofs] & 4; nouveau_bios_parse_lvds_table()
594 bios->fp.link_c_increment = bios->data[lvdsofs] & 8; nouveau_bios_parse_lvds_table()
595 *if_is_24bit = bios->data[lvdsofs] & 16; nouveau_bios_parse_lvds_table()
603 bios->fp.power_off_for_reset = true; nouveau_bios_parse_lvds_table()
604 bios->fp.reset_after_pclk_change = true; nouveau_bios_parse_lvds_table()
610 bios->fp.dual_link = bios->data[lvdsofs] & 1; nouveau_bios_parse_lvds_table()
611 bios->fp.if_is_24bit = bios->data[lvdsofs] & 2; nouveau_bios_parse_lvds_table()
612 bios->fp.strapless_is_24bit = bios->data[bios->fp.lvdsmanufacturerpointer + 4]; nouveau_bios_parse_lvds_table()
613 bios->fp.duallink_transition_clk = ROM16(bios->data[bios->fp.lvdsmanufacturerpointer + 5]) * 10; nouveau_bios_parse_lvds_table()
619 bios->fp.dual_link = (pxclk >= bios->fp.duallink_transition_clk); nouveau_bios_parse_lvds_table()
621 *dl = bios->fp.dual_link; nouveau_bios_parse_lvds_table()
631 * This runs the TMDS regs setting code found on BIT bios cards run_tmds_table()
639 struct nvbios *bios = &drm->vbios; run_tmds_table() local
640 int cv = bios->chip_version; run_tmds_table()
651 clktable = bios->tmds.output0_script_ptr; run_tmds_table()
655 clktable = bios->tmds.output1_script_ptr; run_tmds_table()
664 scriptptr = clkcmptable(bios, clktable, pxclk); run_tmds_table()
680 static void parse_script_table_pointers(struct nvbios *bios, uint16_t offset) parse_script_table_pointers() argument
694 bios->init_script_tbls_ptr = ROM16(bios->data[offset]); parse_script_table_pointers()
697 static int parse_bit_A_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry) parse_bit_A_tbl_entry() argument
714 load_table_ptr = ROM16(bios->data[bitentry->offset]); parse_bit_A_tbl_entry()
721 version = bios->data[load_table_ptr]; parse_bit_A_tbl_entry()
729 headerlen = bios->data[load_table_ptr + 1]; parse_bit_A_tbl_entry()
730 entrylen = bios->data[load_table_ptr + 2]; parse_bit_A_tbl_entry()
731 num_entries = bios->data[load_table_ptr + 3]; parse_bit_A_tbl_entry()
739 bios->dactestval = ROM32(bios->data[load_table_ptr + headerlen]) & 0x3ff; parse_bit_A_tbl_entry()
744 static int parse_bit_display_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry) parse_bit_display_tbl_entry() argument
761 bios->fp.fptablepointer = ROM16(bios->data[bitentry->offset + 2]); parse_bit_display_tbl_entry()
766 static int parse_bit_init_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry) parse_bit_init_tbl_entry() argument
780 parse_script_table_pointers(bios, bitentry->offset); parse_bit_init_tbl_entry()
784 static int parse_bit_i_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry) parse_bit_i_tbl_entry() argument
807 * bit 4 seems to indicate a mobile bios (doesn't suffer from BMP's parse_bit_i_tbl_entry()
810 bios->feature_byte = bios->data[bitentry->offset + 5]; parse_bit_i_tbl_entry()
811 bios->is_mobile = bios->feature_byte & FEATURE_MOBILE; parse_bit_i_tbl_entry()
819 daccmpoffset = ROM16(bios->data[bitentry->offset + 13]); parse_bit_i_tbl_entry()
831 dacver = bios->data[daccmpoffset]; parse_bit_i_tbl_entry()
832 dacheaderlen = bios->data[daccmpoffset + 1]; parse_bit_i_tbl_entry()
840 bios->dactestval = ROM32(bios->data[daccmpoffset + dacheaderlen]); parse_bit_i_tbl_entry()
841 bios->tvdactestval = ROM32(bios->data[daccmpoffset + dacheaderlen + 4]); parse_bit_i_tbl_entry()
846 static int parse_bit_lvds_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry) parse_bit_lvds_tbl_entry() argument
866 bios->fp.lvdsmanufacturerpointer = ROM16(bios->data[bitentry->offset]); parse_bit_lvds_tbl_entry()
872 parse_bit_M_tbl_entry(struct drm_device *dev, struct nvbios *bios, parse_bit_M_tbl_entry() argument
886 * Older bios versions don't have a sufficiently long table for parse_bit_M_tbl_entry()
893 bios->ram_restrict_group_count = bios->data[bitentry->offset + 2]; parse_bit_M_tbl_entry()
894 bios->ram_restrict_tbl_ptr = ROM16(bios->data[bitentry->offset + 3]); parse_bit_M_tbl_entry()
896 bios->ram_restrict_group_count = bios->data[bitentry->offset + 0]; parse_bit_M_tbl_entry()
897 bios->ram_restrict_tbl_ptr = ROM16(bios->data[bitentry->offset + 1]); parse_bit_M_tbl_entry()
903 static int parse_bit_tmds_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry) parse_bit_tmds_tbl_entry() argument
936 tmdstableptr = ROM16(bios->data[bitentry->offset]); parse_bit_tmds_tbl_entry()
943 bios->data[tmdstableptr] >> 4, bios->data[tmdstableptr] & 0xf); parse_bit_tmds_tbl_entry()
946 if (bios->data[tmdstableptr] != 0x11) parse_bit_tmds_tbl_entry()
953 script1 = ROM16(bios->data[tmdstableptr + 7]); parse_bit_tmds_tbl_entry()
954 script2 = ROM16(bios->data[tmdstableptr + 9]); parse_bit_tmds_tbl_entry()
955 if (bios->data[script1] != 'q' || bios->data[script2] != 'q') parse_bit_tmds_tbl_entry()
958 bios->tmds.output0_script_ptr = ROM16(bios->data[tmdstableptr + 11]); parse_bit_tmds_tbl_entry()
959 bios->tmds.output1_script_ptr = ROM16(bios->data[tmdstableptr + 13]); parse_bit_tmds_tbl_entry()
975 struct nvbios *bios = &drm->vbios; bit_table() local
978 if (bios->type != NVBIOS_BIT) bit_table()
981 entries = bios->data[bios->offset + 10]; bit_table()
982 entry = &bios->data[bios->offset + 12]; bit_table()
993 entry += bios->data[bios->offset + 9]; bit_table()
1000 parse_bit_table(struct nvbios *bios, const uint16_t bitoffset, parse_bit_table() argument
1003 struct drm_device *dev = bios->dev; parse_bit_table()
1008 return table->parse_fn(dev, bios, &bitentry); parse_bit_table()
1015 parse_bit_structure(struct nvbios *bios, const uint16_t bitoffset) parse_bit_structure() argument
1021 * for use of bios->*_version or bios->feature_byte while parsing; parse_bit_structure()
1023 * data from the image into the bios struct, thus no interdependencies parse_bit_structure()
1025 ret = parse_bit_table(bios, bitoffset, &BIT_TABLE('i', i)); parse_bit_structure()
1028 if (bios->major_version >= 0x60) /* g80+ */ parse_bit_structure()
1029 parse_bit_table(bios, bitoffset, &BIT_TABLE('A', A)); parse_bit_structure()
1030 parse_bit_table(bios, bitoffset, &BIT_TABLE('D', display)); parse_bit_structure()
1031 ret = parse_bit_table(bios, bitoffset, &BIT_TABLE('I', init)); parse_bit_structure()
1034 parse_bit_table(bios, bitoffset, &BIT_TABLE('M', M)); /* memory? */ parse_bit_structure()
1035 parse_bit_table(bios, bitoffset, &BIT_TABLE('L', lvds)); parse_bit_structure()
1036 parse_bit_table(bios, bitoffset, &BIT_TABLE('T', tmds)); parse_bit_structure()
1041 static int parse_bmp_structure(struct drm_device *dev, struct nvbios *bios, unsigned int offset) parse_bmp_structure() argument
1051 * offset + 18: init script table pointer (for bios versions < 5.10h) parse_bmp_structure()
1052 * offset + 20: extra init script table pointer (for bios parse_bmp_structure()
1055 * offset + 24: memory init table pointer (used on early bios versions) parse_bmp_structure()
1087 uint8_t *bmp = &bios->data[offset], bmp_version_major, bmp_version_minor; parse_bmp_structure()
1092 bios->digital_min_front_porch = 0x4b; parse_bmp_structure()
1093 bios->fmaxvco = 256000; parse_bmp_structure()
1094 bios->fminvco = 128000; parse_bmp_structure()
1095 bios->fp.duallink_transition_clk = 90000; parse_bmp_structure()
1108 *(uint16_t *)&bios->data[0x36] = 0; parse_bmp_structure()
1117 "Please send in your bios\n"); parse_bmp_structure()
1170 * Bit 4 seems to indicate either a mobile bios or a quadro card -- parse_bmp_structure()
1173 * bit 6 a tv bios. parse_bmp_structure()
1175 bios->feature_byte = bmp[9]; parse_bmp_structure()
1178 bios->old_style_init = true; parse_bmp_structure()
1182 bios->init_script_tbls_ptr = ROM16(bmp[legacy_scripts_offset]); parse_bmp_structure()
1183 bios->extra_init_script_tbl_ptr = ROM16(bmp[legacy_scripts_offset + 2]); parse_bmp_structure()
1186 bios->legacy.mem_init_tbl_ptr = ROM16(bmp[24]); parse_bmp_structure()
1187 bios->legacy.sdr_seq_tbl_ptr = ROM16(bmp[26]); parse_bmp_structure()
1188 bios->legacy.ddr_seq_tbl_ptr = ROM16(bmp[28]); parse_bmp_structure()
1194 bios->legacy.i2c_indices.crt = bios->data[legacy_i2c_offset]; parse_bmp_structure()
1195 bios->legacy.i2c_indices.tv = bios->data[legacy_i2c_offset + 1]; parse_bmp_structure()
1196 bios->legacy.i2c_indices.panel = bios->data[legacy_i2c_offset + 2]; parse_bmp_structure()
1199 bios->fmaxvco = ROM32(bmp[67]); parse_bmp_structure()
1200 bios->fminvco = ROM32(bmp[71]); parse_bmp_structure()
1203 parse_script_table_pointers(bios, offset + 75); parse_bmp_structure()
1205 bios->tmds.output0_script_ptr = ROM16(bmp[89]); parse_bmp_structure()
1206 bios->tmds.output1_script_ptr = ROM16(bmp[91]); parse_bmp_structure()
1212 bios->legacy.lvds_single_a_script_ptr = ROM16(bmp[95]); parse_bmp_structure()
1215 bios->fp.fptablepointer = ROM16(bmp[105]); parse_bmp_structure()
1216 bios->fp.fpxlatetableptr = ROM16(bmp[107]); parse_bmp_structure()
1217 bios->fp.xlatwidth = 1; parse_bmp_structure()
1220 bios->fp.lvdsmanufacturerpointer = ROM16(bmp[117]); parse_bmp_structure()
1221 bios->fp.fpxlatemanufacturertableptr = ROM16(bmp[119]); parse_bmp_structure()
1225 bios->pll_limit_tbl_ptr = ROM16(bmp[142]); parse_bmp_structure()
1229 bios->fp.duallink_transition_clk = ROM16(bmp[156]) * 10; parse_bmp_structure()
1750 fabricate_dcb_encoder_table(struct drm_device *dev, struct nvbios *bios) fabricate_dcb_encoder_table() argument
1752 struct dcb_table *dcb = &bios->dcb; fabricate_dcb_encoder_table()
1766 bios->legacy.i2c_indices.crt, 1, 1); fabricate_dcb_encoder_table()
1768 if (nv04_tv_identify(dev, bios->legacy.i2c_indices.tv) >= 0) fabricate_dcb_encoder_table()
1770 bios->legacy.i2c_indices.tv, fabricate_dcb_encoder_table()
1773 else if (bios->tmds.output0_script_ptr || fabricate_dcb_encoder_table()
1774 bios->tmds.output1_script_ptr) fabricate_dcb_encoder_table()
1776 bios->legacy.i2c_indices.panel, fabricate_dcb_encoder_table()
1814 dcb_fake_connectors(struct nvbios *bios) dcb_fake_connectors() argument
1816 struct dcb_table *dcbt = &bios->dcb; dcb_fake_connectors()
1823 * and, as usual, a blacklist of boards with bad bios data.. dcb_fake_connectors()
1825 if (!nv_match_device(bios->dev, 0x0392, 0x107d, 0x20a2)) { dcb_fake_connectors()
1853 u8 *conntab = olddcb_conntab(bios->dev); dcb_fake_connectors()
1860 parse_dcb_table(struct drm_device *dev, struct nvbios *bios) parse_dcb_table() argument
1863 struct dcb_table *dcb = &bios->dcb; parse_dcb_table()
1870 if (bios->type == NVBIOS_BMP) { parse_dcb_table()
1871 fabricate_dcb_encoder_table(dev, bios); parse_dcb_table()
1902 dcb_fake_connectors(bios); parse_dcb_table()
1906 static int load_nv17_hwsq_ucode_entry(struct drm_device *dev, struct nvbios *bios, uint16_t hwsq_offset, int entry) load_nv17_hwsq_ucode_entry() argument
1923 if (bios->data[hwsq_offset] <= entry) { load_nv17_hwsq_ucode_entry()
1929 bytes_to_write = bios->data[hwsq_offset + 1]; load_nv17_hwsq_ucode_entry()
1941 nvif_wr32(device, 0x00001304, ROM32(bios->data[hwsq_entry_offset])); load_nv17_hwsq_ucode_entry()
1946 nvif_wr32(device, 0x00001400 + i, ROM32(bios->data[hwsq_entry_offset + i + 4])); load_nv17_hwsq_ucode_entry()
1955 struct nvbios *bios) load_nv17_hw_sequencer_ucode()
1970 hwsq_offset = findstr(bios->data, bios->length, hwsq_signature, sz); load_nv17_hw_sequencer_ucode()
1975 return load_nv17_hwsq_ucode_entry(dev, bios, hwsq_offset + sz, 0); load_nv17_hw_sequencer_ucode()
1981 struct nvbios *bios = &drm->vbios; nouveau_bios_embedded_edid() local
1988 if (bios->fp.edid) nouveau_bios_embedded_edid()
1989 return bios->fp.edid; nouveau_bios_embedded_edid()
1992 newoffset = findstr(&bios->data[offset], searchlen, nouveau_bios_embedded_edid()
1997 if (!nv_cksum(&bios->data[offset], EDID1_LEN)) nouveau_bios_embedded_edid()
2006 return bios->fp.edid = &bios->data[offset]; nouveau_bios_embedded_edid()
2012 struct nvkm_bios *bios = nvxx_bios(&drm->device); NVInitVBIOS() local
2019 legacy->data = bios->data; NVInitVBIOS()
2020 legacy->length = bios->size; NVInitVBIOS()
2021 legacy->major_version = bios->version.major; NVInitVBIOS()
2022 legacy->chip_version = bios->version.chip; NVInitVBIOS()
2023 if (bios->bit_offset) { NVInitVBIOS()
2025 legacy->offset = bios->bit_offset; NVInitVBIOS()
2028 if (bios->bmp_offset) { NVInitVBIOS()
2030 legacy->offset = bios->bmp_offset; NVInitVBIOS()
2041 struct nvbios *bios = &drm->vbios; nouveau_run_vbios_init() local
2045 bios->state.crtchead = 0; nouveau_run_vbios_init()
2047 if (bios->major_version < 5) /* BMP only */ nouveau_run_vbios_init()
2048 load_nv17_hw_sequencer_ucode(dev, bios); nouveau_run_vbios_init()
2050 if (bios->execute) { nouveau_run_vbios_init()
2051 bios->fp.last_script_invoc = 0; nouveau_run_vbios_init()
2052 bios->fp.lvds_init_run = false; nouveau_run_vbios_init()
2079 struct nvbios *bios = &drm->vbios; nouveau_bios_init() local
2089 ret = parse_dcb_table(dev, bios); nouveau_bios_init()
2093 if (!bios->major_version) /* we don't run version 0 bios */ nouveau_bios_init()
2097 bios->execute = false; nouveau_bios_init()
2103 bios->execute = true; nouveau_bios_init()
2111 if (bios->major_version < 5) nouveau_bios_init()
2112 bios->is_mobile = NVReadVgaCrtc(dev, 0, NV_CIO_CRE_4B) & 0x40; nouveau_bios_init()
2115 if (bios->is_mobile || bios->major_version >= 5) nouveau_bios_init()
2116 ret = parse_fp_mode_table(dev, bios); nouveau_bios_init()
2119 bios->execute = true; nouveau_bios_init()
1954 load_nv17_hw_sequencer_ucode(struct drm_device *dev, struct nvbios *bios) load_nv17_hw_sequencer_ucode() argument
H A Dnouveau_acpi.h12 int nouveau_acpi_get_bios_chunk(uint8_t *bios, int offset, int len);
22 static inline int nouveau_acpi_get_bios_chunk(uint8_t *bios, int offset, int len) { return -EINVAL; } nouveau_acpi_edid() argument
H A Dnouveau_acpi.c43 #define OPTIMUS_HDA_CODEC_MASK (2 << 27) /* hda bios control */
241 (result & OPTIMUS_HDA_CODEC_MASK) ? "hda bios codec supported" : ""); nouveau_dsm_pci_probe()
347 static int nouveau_rom_call(acpi_handle rom_handle, uint8_t *bios, nouveau_rom_call() argument
371 memcpy(bios+offset, obj->buffer.pointer, len); nouveau_rom_call()
393 int nouveau_acpi_get_bios_chunk(uint8_t *bios, int offset, int len) nouveau_acpi_get_bios_chunk() argument
395 return nouveau_rom_call(nouveau_dsm_priv.rom_handle, bios, offset, len); nouveau_acpi_get_bios_chunk()
H A Dnouveau_bios.h53 #include <subdev/bios/dcb.h>
54 #include <subdev/bios/conn.h>
H A Dnouveau_encoder.h30 #include <subdev/bios/dcb.h>
/linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/subdev/volt/
H A Dgk104.c28 #include <subdev/bios.h>
29 #include <subdev/bios/volt.h>
34 struct nvbios_volt bios; member in struct:gk104_volt
40 struct nvbios_volt *bios = &gk104_volt(base)->bios; gk104_volt_get() local
47 return bios->base + bios->pwm_range * duty / div; gk104_volt_get()
53 struct nvbios_volt *bios = &gk104_volt(base)->bios; gk104_volt_set() local
58 div = 27648000 / bios->pwm_freq; gk104_volt_set()
59 duty = (uv - bios->base) * div / bios->pwm_range; gk104_volt_set()
81 struct nvbios_volt bios; gk104_volt_new() local
86 if (!nvbios_volt_parse(device->bios, &ver, &hdr, &cnt, &len, &bios)) gk104_volt_new()
90 bios.type == NVBIOS_VOLT_PWM) { gk104_volt_new()
98 volt->bios = bios; gk104_volt_new()
104 if (bios.type == NVBIOS_VOLT_PWM && volt_func != &gk104_volt_pwm) { gk104_volt_new()
H A Dbase.c26 #include <subdev/bios.h>
27 #include <subdev/bios/vmap.h>
28 #include <subdev/bios/volt.h>
71 struct nvkm_bios *bios = volt->subdev.device->bios; nvkm_volt_map() local
76 vmap = nvbios_vmap_entry_parse(bios, id, &ver, &len, &info); nvkm_volt_map()
113 nvkm_volt_parse_bios(struct nvkm_bios *bios, struct nvkm_volt *volt) nvkm_volt_parse_bios() argument
121 data = nvbios_volt_parse(bios, &ver, &hdr, &cnt, &len, &info); nvkm_volt_parse_bios()
135 data = nvbios_volt_entry_parse(bios, i, &ver, &hdr, nvkm_volt_parse_bios()
177 struct nvkm_bios *bios = device->bios; nvkm_volt_ctor() local
183 /* Assuming the non-bios device should build the voltage table later */ nvkm_volt_ctor()
184 if (bios) nvkm_volt_ctor()
185 nvkm_volt_parse_bios(bios, volt); nvkm_volt_ctor()
H A Dgpio.c25 #include <subdev/bios.h>
26 #include <subdev/bios/gpio.h>
/linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/
H A Dgm204.c26 #include <subdev/bios.h>
27 #include <subdev/bios/bit.h>
28 #include <subdev/bios/pmu.h>
34 struct nvkm_bios *bios = device->bios; pmu_code() local
41 nvkm_wr32(device, 0x10a184, nvbios_rd32(bios, img + i)); pmu_code()
54 struct nvkm_bios *bios = device->bios; pmu_data() local
59 nvkm_wr32(device, 0x10a1c4, nvbios_rd32(bios, img + i)); pmu_data()
85 struct nvkm_bios *bios = subdev->device->bios; pmu_load() local
88 if (!nvbios_pmuRm(bios, type, &pmu)) { pmu_load()
115 struct nvkm_bios *bios = device->bios; gm204_devinit_post() local
120 if (bit_entry(bios, 'I', &bit_I) || bit_I.version != 1 || gm204_devinit_post()
142 u32 img = nvbios_rd16(bios, bit_I.offset + 0x14); gm204_devinit_post()
143 u32 len = nvbios_rd16(bios, bit_I.offset + 0x16); gm204_devinit_post()
150 u32 img = nvbios_rd16(bios, bit_I.offset + 0x18); gm204_devinit_post()
151 u32 len = nvbios_rd16(bios, bit_I.offset + 0x1a); gm204_devinit_post()
163 /* load and execute some other ucode image (bios therm?) */ gm204_devinit_post()
H A Dnv50.c26 #include <subdev/bios.h>
27 #include <subdev/bios/dcb.h>
28 #include <subdev/bios/disp.h>
29 #include <subdev/bios/init.h>
30 #include <subdev/bios/pll.h>
39 struct nvkm_bios *bios = device->bios; nv50_devinit_pll_set() local
44 ret = nvbios_pll_parse(bios, type, &info); nv50_devinit_pll_set()
128 struct nvkm_bios *bios = device->bios; nv50_devinit_init() local
138 while (init->base.post && dcb_outp_parse(bios, i, &ver, &hdr, &outp)) { nv50_devinit_init()
139 if (nvbios_outp_match(bios, outp.hasht, outp.hashm, nv50_devinit_init()
143 .bios = bios, nv50_devinit_init()
H A Dnv05.c29 #include <subdev/bios.h>
30 #include <subdev/bios/bmp.h>
31 #include <subdev/bios/init.h>
49 struct nvkm_bios *bios = device->bios; nv05_devinit_meminit() local
64 if ((data = bmp_mem_init_table(bios))) { nv05_devinit_meminit()
65 ramcfg[0] = nvbios_rd08(bios, data + 2 * strap + 0); nv05_devinit_meminit()
66 ramcfg[1] = nvbios_rd08(bios, data + 2 * strap + 1); nv05_devinit_meminit()
83 u32 scramble = nvbios_rd32(bios, data); nv05_devinit_meminit()
H A Dgf100.c26 #include <subdev/bios.h>
27 #include <subdev/bios/init.h>
28 #include <subdev/bios/pll.h>
40 ret = nvbios_pll_parse(device->bios, type, &info); gf100_devinit_pll_set()
H A Dgm107.c26 #include <subdev/bios.h>
27 #include <subdev/bios/init.h>
H A Dnv1a.c26 #include <subdev/bios.h>
27 #include <subdev/bios/init.h>
H A Dgt215.c26 #include <subdev/bios.h>
27 #include <subdev/bios/init.h>
28 #include <subdev/bios/pll.h>
40 ret = nvbios_pll_parse(device->bios, type, &info); gt215_devinit_pll_set()
116 * the video bios doesn't care and does what the scripts say. it's gt215_devinit_mmio()
H A Dnv04.c29 #include <subdev/bios.h>
30 #include <subdev/bios/init.h>
31 #include <subdev/bios/pll.h>
147 int chip_version = device->bios->version.chip; setPLL_single()
202 int chip_version = device->bios->version.chip; setPLL_double_highregs()
230 /* magic bits set by the blob (but not the bios) on g71-73 */ setPLL_double_highregs()
310 if (nvbios_pll_parse(device->bios, Preg, &info)) setPLL_double_lowregs()
359 struct nvkm_bios *bios = subdev->device->bios; nv04_devinit_pll_set() local
362 int cv = bios->version.chip; nv04_devinit_pll_set()
366 ret = nvbios_pll_parse(bios, type > 0x405c ? type : type - 4, &info); nv04_devinit_pll_set()
H A Dg84.c26 #include <subdev/bios.h>
27 #include <subdev/bios/init.h>
H A Dg98.c26 #include <subdev/bios.h>
27 #include <subdev/bios/init.h>
H A Dmcp89.c26 #include <subdev/bios.h>
27 #include <subdev/bios/init.h>
H A Dnv20.c29 #include <subdev/bios.h>
30 #include <subdev/bios/init.h>
H A Dnv10.c29 #include <subdev/bios.h>
30 #include <subdev/bios/init.h>
/linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/subdev/fb/
H A Dgddr3.c75 switch (ram->next->bios.timing_ver) { nvkm_gddr3_calc()
77 CWL = ram->next->bios.timing_10_CWL; nvkm_gddr3_calc()
78 CL = ram->next->bios.timing_10_CL; nvkm_gddr3_calc()
79 WR = ram->next->bios.timing_10_WR; nvkm_gddr3_calc()
80 DLL = !ram->next->bios.ramcfg_DLLoff; nvkm_gddr3_calc()
81 ODT = ram->next->bios.timing_10_ODT; nvkm_gddr3_calc()
82 RON = ram->next->bios.ramcfg_RON; nvkm_gddr3_calc()
85 CWL = (ram->next->bios.timing[1] & 0x00000f80) >> 7; nvkm_gddr3_calc()
86 CL = (ram->next->bios.timing[1] & 0x0000001f) >> 0; nvkm_gddr3_calc()
87 WR = (ram->next->bios.timing[2] & 0x007f0000) >> 16; nvkm_gddr3_calc()
96 if (ram->next->bios.timing_ver == 0x20 || nvkm_gddr3_calc()
97 ram->next->bios.ramcfg_timing == 0xff) { nvkm_gddr3_calc()
H A Dramgk104.c29 #include <subdev/bios.h>
30 #include <subdev/bios/init.h>
31 #include <subdev/bios/M0205.h>
32 #include <subdev/bios/M0209.h>
33 #include <subdev/bios/pll.h>
34 #include <subdev/bios/rammap.h>
35 #include <subdev/bios/timing.h>
211 u8 v0 = next->bios.ramcfg_11_03_c0; r1373f4_fini()
212 u8 v1 = next->bios.ramcfg_11_03_30; r1373f4_fini()
256 int vc = !next->bios.ramcfg_11_02_08; gk104_ram_calc_gddr5()
257 int mv = !next->bios.ramcfg_11_02_04; gk104_ram_calc_gddr5()
309 switch (next->bios.ramcfg_11_03_c0) { gk104_ram_calc_gddr5()
316 switch (next->bios.ramcfg_11_03_30) { gk104_ram_calc_gddr5()
324 if (next->bios.ramcfg_11_02_80) gk104_ram_calc_gddr5()
326 if (next->bios.ramcfg_11_02_40) gk104_ram_calc_gddr5()
328 if (next->bios.ramcfg_11_07_10) gk104_ram_calc_gddr5()
330 if (next->bios.ramcfg_11_07_08) gk104_ram_calc_gddr5()
365 if (next->bios.ramcfg_11_02_40 || gk104_ram_calc_gddr5()
366 next->bios.ramcfg_11_07_10) { gk104_ram_calc_gddr5()
389 if (next->bios.ramcfg_11_07_40) gk104_ram_calc_gddr5()
393 ram_wr32(fuc, 0x10f65c, 0x00000011 * next->bios.rammap_11_11_0c); gk104_ram_calc_gddr5()
394 ram_wr32(fuc, 0x10f6b8, 0x01010101 * next->bios.ramcfg_11_09); gk104_ram_calc_gddr5()
395 ram_wr32(fuc, 0x10f6bc, 0x01010101 * next->bios.ramcfg_11_09); gk104_ram_calc_gddr5()
397 if (!next->bios.ramcfg_11_07_08 && !next->bios.ramcfg_11_07_04) { gk104_ram_calc_gddr5()
398 ram_wr32(fuc, 0x10f698, 0x01010101 * next->bios.ramcfg_11_04); gk104_ram_calc_gddr5()
399 ram_wr32(fuc, 0x10f69c, 0x01010101 * next->bios.ramcfg_11_04); gk104_ram_calc_gddr5()
401 if (!next->bios.ramcfg_11_07_08) { gk104_ram_calc_gddr5()
407 u32 data = 0x01000100 * next->bios.ramcfg_11_04; gk104_ram_calc_gddr5()
412 if (ram->mode == 2 && next->bios.ramcfg_11_08_10) gk104_ram_calc_gddr5()
420 if (!next->bios.ramcfg_11_02_80) gk104_ram_calc_gddr5()
422 if (!next->bios.ramcfg_11_02_40) gk104_ram_calc_gddr5()
424 if (!next->bios.ramcfg_11_07_10) gk104_ram_calc_gddr5()
426 if (!next->bios.ramcfg_11_07_08) gk104_ram_calc_gddr5()
432 if (next->bios.ramcfg_11_01_08) gk104_ram_calc_gddr5()
443 if (next->bios.ramcfg_11_08_01) gk104_ram_calc_gddr5()
450 if (next->bios.ramcfg_11_08_08) gk104_ram_calc_gddr5()
452 if (next->bios.ramcfg_11_08_04) gk104_ram_calc_gddr5()
454 if (next->bios.ramcfg_11_08_02) gk104_ram_calc_gddr5()
459 ram_mask(fuc, 0x10f248, 0xffffffff, next->bios.timing[10]); gk104_ram_calc_gddr5()
460 ram_mask(fuc, 0x10f290, 0xffffffff, next->bios.timing[0]); gk104_ram_calc_gddr5()
461 ram_mask(fuc, 0x10f294, 0xffffffff, next->bios.timing[1]); gk104_ram_calc_gddr5()
462 ram_mask(fuc, 0x10f298, 0xffffffff, next->bios.timing[2]); gk104_ram_calc_gddr5()
463 ram_mask(fuc, 0x10f29c, 0xffffffff, next->bios.timing[3]); gk104_ram_calc_gddr5()
464 ram_mask(fuc, 0x10f2a0, 0xffffffff, next->bios.timing[4]); gk104_ram_calc_gddr5()
465 ram_mask(fuc, 0x10f2a4, 0xffffffff, next->bios.timing[5]); gk104_ram_calc_gddr5()
466 ram_mask(fuc, 0x10f2a8, 0xffffffff, next->bios.timing[6]); gk104_ram_calc_gddr5()
467 ram_mask(fuc, 0x10f2ac, 0xffffffff, next->bios.timing[7]); gk104_ram_calc_gddr5()
468 ram_mask(fuc, 0x10f2cc, 0xffffffff, next->bios.timing[8]); gk104_ram_calc_gddr5()
469 ram_mask(fuc, 0x10f2e8, 0xffffffff, next->bios.timing[9]); gk104_ram_calc_gddr5()
473 if (next->bios.ramcfg_11_08_20) gk104_ram_calc_gddr5()
481 data |= next->bios.ramcfg_11_02_03 << 8; gk104_ram_calc_gddr5()
485 if (next->bios.ramcfg_11_01_10) gk104_ram_calc_gddr5()
493 data |= next->bios.timing_20_30_07 << 28; gk104_ram_calc_gddr5()
497 if (next->bios.ramcfg_11_01_01) gk104_ram_calc_gddr5()
505 data |= next->bios.timing_20_30_07 << 28; gk104_ram_calc_gddr5()
509 if (next->bios.ramcfg_11_01_02) gk104_ram_calc_gddr5()
517 if (!next->bios.ramcfg_11_01_04) gk104_ram_calc_gddr5()
519 if (!next->bios.ramcfg_11_07_80) gk104_ram_calc_gddr5()
524 if (next->bios.ramcfg_11_03_f0) { gk104_ram_calc_gddr5()
525 if (next->bios.rammap_11_08_0c) { gk104_ram_calc_gddr5()
526 if (!next->bios.ramcfg_11_07_80) gk104_ram_calc_gddr5()
539 ram_wr32(fuc, 0x10f870, 0x11111111 * next->bios.ramcfg_11_03_0f); gk104_ram_calc_gddr5()
543 data |= next->bios.ramcfg_11_02_03; gk104_ram_calc_gddr5()
547 if (next->bios.ramcfg_11_01_10) gk104_ram_calc_gddr5()
558 data = next->bios.timing_20_30_07 << 8; gk104_ram_calc_gddr5()
559 if (next->bios.ramcfg_11_01_01) gk104_ram_calc_gddr5()
563 ram_mask(fuc, 0x10f250, 0x000003f0, next->bios.timing_20_2c_003f << 4); gk104_ram_calc_gddr5()
564 data = (next->bios.timing[10] & 0x7f000000) >> 24; gk104_ram_calc_gddr5()
565 if (data < next->bios.timing_20_2c_1fc0) gk104_ram_calc_gddr5()
566 data = next->bios.timing_20_2c_1fc0; gk104_ram_calc_gddr5()
568 ram_mask(fuc, 0x10f224, 0x001f0000, next->bios.timing_20_30_f8 << 16); gk104_ram_calc_gddr5()
570 ram_mask(fuc, 0x10fec4, 0x041e0f07, next->bios.timing_20_31_0800 << 26 | gk104_ram_calc_gddr5()
571 next->bios.timing_20_31_0780 << 17 | gk104_ram_calc_gddr5()
572 next->bios.timing_20_31_0078 << 8 | gk104_ram_calc_gddr5()
573 next->bios.timing_20_31_0007); gk104_ram_calc_gddr5()
574 ram_mask(fuc, 0x10fec8, 0x00000027, next->bios.timing_20_31_8000 << 5 | gk104_ram_calc_gddr5()
575 next->bios.timing_20_31_7000); gk104_ram_calc_gddr5()
583 if (next->bios.ramcfg_11_08_10 && (ram->mode == 2) /*XXX*/) { gk104_ram_calc_gddr5()
616 if (!next->bios.ramcfg_11_07_08) { gk104_ram_calc_gddr5()
617 if (!next->bios.ramcfg_11_07_04) gk104_ram_calc_gddr5()
631 if (!next->bios.ramcfg_11_07_08) { gk104_ram_calc_gddr5()
633 if ( next->bios.ramcfg_11_07_04) gk104_ram_calc_gddr5()
635 if (!next->bios.rammap_11_08_10) gk104_ram_calc_gddr5()
657 if (next->bios.ramcfg_11_07_02) gk104_ram_calc_gddr5()
663 if (next->bios.rammap_11_08_01) gk104_ram_calc_gddr5()
703 int vc = !next->bios.ramcfg_11_02_08; gk104_ram_calc_sddr3()
704 int mv = !next->bios.ramcfg_11_02_04; gk104_ram_calc_sddr3()
720 if (next->bios.ramcfg_11_03_f0) gk104_ram_calc_sddr3()
725 if (next->bios.ramcfg_DLLoff) gk104_ram_calc_sddr3()
749 switch (next->bios.ramcfg_11_03_c0) { gk104_ram_calc_sddr3()
756 switch (next->bios.ramcfg_11_03_30) { gk104_ram_calc_sddr3()
764 if (next->bios.ramcfg_11_02_80) gk104_ram_calc_sddr3()
766 if (next->bios.ramcfg_11_02_40) gk104_ram_calc_sddr3()
768 if (next->bios.ramcfg_11_07_10) gk104_ram_calc_sddr3()
770 if (next->bios.ramcfg_11_07_08) gk104_ram_calc_sddr3()
780 data |= next->bios.ramcfg_11_03_30 << 16; gk104_ram_calc_sddr3()
812 if (next->bios.ramcfg_11_02_40 || gk104_ram_calc_sddr3()
813 next->bios.ramcfg_11_07_10) { gk104_ram_calc_sddr3()
819 if (next->bios.ramcfg_11_07_40) gk104_ram_calc_sddr3()
823 ram_wr32(fuc, 0x10f65c, 0x00000011 * next->bios.rammap_11_11_0c); gk104_ram_calc_sddr3()
824 ram_wr32(fuc, 0x10f6b8, 0x01010101 * next->bios.ramcfg_11_09); gk104_ram_calc_sddr3()
825 ram_wr32(fuc, 0x10f6bc, 0x01010101 * next->bios.ramcfg_11_09); gk104_ram_calc_sddr3()
829 if (!next->bios.ramcfg_11_02_80) gk104_ram_calc_sddr3()
831 if (!next->bios.ramcfg_11_02_40) gk104_ram_calc_sddr3()
833 if (!next->bios.ramcfg_11_07_10) gk104_ram_calc_sddr3()
835 if (!next->bios.ramcfg_11_07_08) gk104_ram_calc_sddr3()
842 if (next->bios.ramcfg_11_08_01) gk104_ram_calc_sddr3()
849 ram_mask(fuc, 0x10f248, 0xffffffff, next->bios.timing[10]); gk104_ram_calc_sddr3()
850 ram_mask(fuc, 0x10f290, 0xffffffff, next->bios.timing[0]); gk104_ram_calc_sddr3()
851 ram_mask(fuc, 0x10f294, 0xffffffff, next->bios.timing[1]); gk104_ram_calc_sddr3()
852 ram_mask(fuc, 0x10f298, 0xffffffff, next->bios.timing[2]); gk104_ram_calc_sddr3()
853 ram_mask(fuc, 0x10f29c, 0xffffffff, next->bios.timing[3]); gk104_ram_calc_sddr3()
854 ram_mask(fuc, 0x10f2a0, 0xffffffff, next->bios.timing[4]); gk104_ram_calc_sddr3()
855 ram_mask(fuc, 0x10f2a4, 0xffffffff, next->bios.timing[5]); gk104_ram_calc_sddr3()
856 ram_mask(fuc, 0x10f2a8, 0xffffffff, next->bios.timing[6]); gk104_ram_calc_sddr3()
857 ram_mask(fuc, 0x10f2ac, 0xffffffff, next->bios.timing[7]); gk104_ram_calc_sddr3()
858 ram_mask(fuc, 0x10f2cc, 0xffffffff, next->bios.timing[8]); gk104_ram_calc_sddr3()
859 ram_mask(fuc, 0x10f2e8, 0xffffffff, next->bios.timing[9]); gk104_ram_calc_sddr3()
863 if (!next->bios.ramcfg_11_01_04) gk104_ram_calc_sddr3()
865 if (!next->bios.ramcfg_11_07_80) gk104_ram_calc_sddr3()
870 if (next->bios.ramcfg_11_03_f0) { gk104_ram_calc_sddr3()
871 if (next->bios.rammap_11_08_0c) { gk104_ram_calc_sddr3()
872 if (!next->bios.ramcfg_11_07_80) gk104_ram_calc_sddr3()
886 ram_wr32(fuc, 0x10f870, 0x11111111 * next->bios.ramcfg_11_03_0f); gk104_ram_calc_sddr3()
888 ram_mask(fuc, 0x10f250, 0x000003f0, next->bios.timing_20_2c_003f << 4); gk104_ram_calc_sddr3()
890 data = (next->bios.timing[10] & 0x7f000000) >> 24; gk104_ram_calc_sddr3()
891 if (data < next->bios.timing_20_2c_1fc0) gk104_ram_calc_sddr3()
892 data = next->bios.timing_20_2c_1fc0; gk104_ram_calc_sddr3()
895 ram_mask(fuc, 0x10f224, 0x001f0000, next->bios.timing_20_30_f8 << 16); gk104_ram_calc_sddr3()
905 if (!next->bios.ramcfg_DLLoff) { gk104_ram_calc_sddr3()
915 if (!next->bios.ramcfg_DLLoff) { gk104_ram_calc_sddr3()
941 if (next->bios.rammap_11_08_01) gk104_ram_calc_sddr3()
961 if (mhz >= cfg->bios.rammap_min && gk104_ram_calc_data()
962 mhz <= cfg->bios.rammap_max) { gk104_ram_calc_data()
1133 xits->bios.ramcfg_11_02_04 = copy->bios.ramcfg_11_02_04; gk104_ram_calc()
1134 xits->bios.ramcfg_11_02_03 = copy->bios.ramcfg_11_02_03; gk104_ram_calc()
1135 xits->bios.timing_20_30_07 = copy->bios.timing_20_30_07; gk104_ram_calc()
1138 if (memcmp(xits, &ram->base.former, sizeof(xits->bios))) gk104_ram_calc()
1157 if (mhz >= cfg->bios.rammap_min && gk104_ram_prog_0()
1158 mhz <= cfg->bios.rammap_max) gk104_ram_prog_0()
1166 data |= cfg->bios.rammap_11_0a_03fe << 12; gk104_ram_prog_0()
1170 data |= cfg->bios.rammap_11_09_01ff; gk104_ram_prog_0()
1176 data |= cfg->bios.rammap_11_0a_0400; gk104_ram_prog_0()
1182 data |= cfg->bios.rammap_11_0a_0800; gk104_ram_prog_0()
1188 data |= cfg->bios.rammap_11_0b_01f0; gk104_ram_prog_0()
1194 data |= cfg->bios.rammap_11_0b_0200 << 9; gk104_ram_prog_0()
1200 data |= cfg->bios.rammap_11_0d << 16; gk104_ram_prog_0()
1204 data |= cfg->bios.rammap_11_0f << 8; gk104_ram_prog_0()
1210 data |= cfg->bios.rammap_11_0e << 8; gk104_ram_prog_0()
1214 data |= cfg->bios.rammap_11_0b_0800 << 7; gk104_ram_prog_0()
1218 data |= cfg->bios.rammap_11_0b_0400 << 5; gk104_ram_prog_0()
1268 struct nvkm_bios *bios = ram->fb->subdev.device->bios; gk104_ram_train_type() local
1278 if (!(data = nvbios_M0205Ep(bios, i, &ver, &hdr, &cnt, &len, &M0205E))) gk104_ram_train_type()
1294 if (!(data = nvbios_M0205Sp(bios, i, ramcfg, &ver, &hdr, &M0205S))) gk104_ram_train_type()
1299 if (!(data = nvbios_M0209Ep(bios, i, &ver, &hdr, &cnt, &len, &M0209E))) gk104_ram_train_type()
1303 if (!(data = nvbios_M0209Sp(bios, i, 0, &ver, &hdr, value))) gk104_ram_train_type()
1311 if (!(data = nvbios_M0209Sp(bios, M0209E.v03, 0, &ver, &hdr, gk104_ram_train_type()
1395 struct nvkm_bios *bios = device->bios; gk104_ram_init() local
1411 data = nvbios_rammapTe(bios, &ver, &hdr, &cnt, &len, &snr, &ssz); gk104_ram_init()
1415 cnt = nvbios_rd08(bios, data + 0x14); /* guess at count */ gk104_ram_init()
1416 data = nvbios_rd32(bios, data + 0x10); /* guess u32... */ gk104_ram_init()
1423 .bios = bios, gk104_ram_init()
1424 .offset = nvbios_rd32(bios, data), gk104_ram_init()
1440 struct nvkm_bios *bios = ram->base.fb->subdev.device->bios; gk104_ram_ctor_data() local
1450 p = &list_last_entry(&ram->cfg, typeof(*cfg), head)->bios; gk104_ram_ctor_data()
1451 n = &cfg->bios; gk104_ram_ctor_data()
1454 data = nvbios_rammapEp(bios, i, &ver, &hdr, &cnt, &len, &cfg->bios); gk104_ram_ctor_data()
1461 data = nvbios_rammapSp(bios, data, ver, hdr, cnt, len, ramcfg, gk104_ram_ctor_data()
1462 &ver, &hdr, &cfg->bios); gk104_ram_ctor_data()
1468 /* lookup memory timings, if bios says they're present */ gk104_ram_ctor_data()
1469 if (cfg->bios.ramcfg_timing != 0xff) { gk104_ram_ctor_data()
1470 data = nvbios_timingEp(bios, cfg->bios.ramcfg_timing, gk104_ram_ctor_data()
1472 &cfg->bios); gk104_ram_ctor_data()
1535 struct nvkm_bios *bios = device->bios; gk104_ram_new() local
1572 /* parse bios data for all rammap table entries up-front, and gk104_ram_new()
1578 * hoped that these were mere optimisations and the bios init gk104_ram_new()
1591 /* parse bios data for both pll's */ gk104_ram_new()
1592 ret = nvbios_pll_parse(bios, 0x0c, &ram->fuc.refpll); gk104_ram_new()
1598 ret = nvbios_pll_parse(bios, 0x04, &ram->fuc.mempll); gk104_ram_new()
H A Dgddr5.c29 * unconditionally in the hope that a "false everywhere" in the bios
41 xd = !ram->next->bios.ramcfg_DLLoff; nvkm_gddr5_calc()
43 switch (ram->next->bios.ramcfg_ver) { nvkm_gddr5_calc()
45 pd = ram->next->bios.ramcfg_11_01_80; nvkm_gddr5_calc()
46 lf = ram->next->bios.ramcfg_11_01_40; nvkm_gddr5_calc()
47 vh = ram->next->bios.ramcfg_11_02_10; nvkm_gddr5_calc()
48 vr = ram->next->bios.ramcfg_11_02_04; nvkm_gddr5_calc()
49 vo = ram->next->bios.ramcfg_11_06; nvkm_gddr5_calc()
50 l3 = !ram->next->bios.ramcfg_11_07_02; nvkm_gddr5_calc()
56 switch (ram->next->bios.timing_ver) { nvkm_gddr5_calc()
58 WL = (ram->next->bios.timing[1] & 0x00000f80) >> 7; nvkm_gddr5_calc()
59 CL = (ram->next->bios.timing[1] & 0x0000001f); nvkm_gddr5_calc()
60 WR = (ram->next->bios.timing[2] & 0x007f0000) >> 16; nvkm_gddr5_calc()
61 at[0] = ram->next->bios.timing_20_2e_c0; nvkm_gddr5_calc()
62 at[1] = ram->next->bios.timing_20_2e_30; nvkm_gddr5_calc()
63 dt = ram->next->bios.timing_20_2e_03; nvkm_gddr5_calc()
64 ds = ram->next->bios.timing_20_2f_03; nvkm_gddr5_calc()
H A Dsddr3.c73 DLL = !ram->next->bios.ramcfg_DLLoff; nvkm_sddr3_calc()
75 switch (ram->next->bios.timing_ver) { nvkm_sddr3_calc()
77 if (ram->next->bios.timing_hdr < 0x17) { nvkm_sddr3_calc()
81 CWL = ram->next->bios.timing_10_CWL; nvkm_sddr3_calc()
82 CL = ram->next->bios.timing_10_CL; nvkm_sddr3_calc()
83 WR = ram->next->bios.timing_10_WR; nvkm_sddr3_calc()
84 ODT = ram->next->bios.timing_10_ODT; nvkm_sddr3_calc()
87 CWL = (ram->next->bios.timing[1] & 0x00000f80) >> 7; nvkm_sddr3_calc()
88 CL = (ram->next->bios.timing[1] & 0x0000001f) >> 0; nvkm_sddr3_calc()
89 WR = (ram->next->bios.timing[2] & 0x007f0000) >> 16; nvkm_sddr3_calc()
H A Dramnv50.c30 #include <subdev/bios.h>
31 #include <subdev/bios/perf.h>
32 #include <subdev/bios/pll.h>
33 #include <subdev/bios/rammap.h>
34 #include <subdev/bios/timing.h>
75 struct nvbios_ramcfg *cfg = &ram->base.target.bios; nv50_ram_timing_calc()
97 unkt3b = 0x19 + ram->base.next->bios.rammap_00_16_40; nv50_ram_timing_calc()
99 ram->base.next->bios.rammap_00_16_40) << 16 | nv50_ram_timing_calc()
154 struct nvbios_ramcfg *cfg = &ram->base.target.bios; nv50_ram_timing_read()
224 struct nvkm_bios *bios = subdev->device->bios; nv50_ram_calc() local
242 data = nvbios_perfEp(bios, i++, &ver, &hdr, &cnt, nv50_ram_calc()
251 nvbios_rammapEp_from_perf(bios, data, hdr, &next->bios); nv50_ram_calc()
260 data = nvbios_rammapSp_from_perf(bios, data + hdr, size, strap, nv50_ram_calc()
261 &next->bios); nv50_ram_calc()
267 /* lookup memory timings, if bios says they're present */ nv50_ram_calc()
268 if (next->bios.ramcfg_timing != 0xff) { nv50_ram_calc()
269 data = nvbios_timingEp(bios, next->bios.ramcfg_timing, nv50_ram_calc()
270 &ver, &hdr, &cnt, &len, &next->bios); nv50_ram_calc()
305 if (subdev->device->chipset <= 0x96 && !next->bios.ramcfg_00_03_02) nv50_ram_calc()
319 if (next->bios.timing_10_ODT) nv50_ram_calc()
328 ret = nvbios_pll_parse(bios, 0x004008, &mpll); nv50_ram_calc()
355 next->bios.rammap_00_16_40 << 14); nv50_ram_calc()
363 nv50_ram_gpio(hwsq, 0x18, !next->bios.ramcfg_FBVDDQ); nv50_ram_calc()
400 if (!next->bios.ramcfg_00_03_02) nv50_ram_calc()
402 ram_mask(hwsq, 0x100200, 0x00001000, !next->bios.ramcfg_00_04_02 << 12); nv50_ram_calc()
413 if (!next->bios.ramcfg_00_03_08) nv50_ram_calc()
415 if (!next->bios.ramcfg_FBVDDQ) nv50_ram_calc()
417 if ( next->bios.ramcfg_00_04_04) nv50_ram_calc()
422 if (!next->bios.ramcfg_00_03_08) nv50_ram_calc()
426 if ( next->bios.ramcfg_00_03_01) nv50_ram_calc()
428 if ( next->bios.ramcfg_00_03_02) nv50_ram_calc()
430 if (!next->bios.ramcfg_00_03_08) nv50_ram_calc()
432 if ( next->bios.ramcfg_00_04_04) nv50_ram_calc()
434 if ( next->bios.ramcfg_00_04_20) nv50_ram_calc()
444 if (next->bios.rammap_00_16_20) { nv50_ram_calc()
445 ram_wr32(hwsq, 0x1005a0, next->bios.ramcfg_00_07 << 16 | nv50_ram_calc()
446 next->bios.ramcfg_00_06 << 8 | nv50_ram_calc()
447 next->bios.ramcfg_00_05); nv50_ram_calc()
448 ram_wr32(hwsq, 0x1005a4, next->bios.ramcfg_00_09 << 8 | nv50_ram_calc()
449 next->bios.ramcfg_00_08); nv50_ram_calc()
456 if (!next->bios.timing_10_ODT) nv50_ram_calc()
460 if (!next->bios.ramcfg_DLLoff) nv50_ram_calc()
468 if (next->bios.rammap_00_17_02) nv50_ram_calc()
470 if (!next->bios.rammap_00_16_40) nv50_ram_calc()
472 if (next->bios.ramcfg_00_03_02) nv50_ram_calc()
474 if (subdev->device->chipset <= 0x96 && next->bios.ramcfg_00_03_02) nv50_ram_calc()
641 struct nvkm_bios *bios = device->bios; nv50_ram_ctor() local
652 if (nvkm_fb_bios_memtype(bios) == NVKM_RAM_TYPE_DDR3) nv50_ram_ctor()
H A Dsddr2.c64 switch (ram->next->bios.timing_ver) { nvkm_sddr2_calc()
66 CL = ram->next->bios.timing_10_CL; nvkm_sddr2_calc()
67 WR = ram->next->bios.timing_10_WR; nvkm_sddr2_calc()
68 DLL = !ram->next->bios.ramcfg_DLLoff; nvkm_sddr2_calc()
69 ODT = ram->next->bios.timing_10_ODT & 3; nvkm_sddr2_calc()
72 CL = (ram->next->bios.timing[1] & 0x0000001f); nvkm_sddr2_calc()
73 WR = (ram->next->bios.timing[2] & 0x007f0000) >> 16; nvkm_sddr2_calc()
79 if (ram->next->bios.timing_ver == 0x20 || nvkm_sddr2_calc()
80 ram->next->bios.ramcfg_timing == 0xff) { nvkm_sddr2_calc()
H A Dramgt215.c30 #include <subdev/bios.h>
31 #include <subdev/bios/M0205.h>
32 #include <subdev/bios/rammap.h>
33 #include <subdev/bios/timing.h>
159 struct nvkm_bios *bios = device->bios; gt215_link_train() local
180 nvbios_M0205Tp(bios, &ver, &hdr, &cnt, &len, &snr, &ssz, &M0205T); gt215_link_train()
281 struct nvkm_bios *bios = device->bios; gt215_link_train_init() local
292 if (!nvbios_M0205Ep(bios, i, &ver, &hdr, &cnt, &len, &M0205E)) gt215_link_train_init()
350 struct nvbios_ramcfg *cfg = &ram->base.target.bios; gt215_ram_timing_calc()
499 struct nvkm_bios *bios = device->bios; gt215_ram_calc() local
519 data = nvbios_rammapEm(bios, freq / 1000, &ver, &hdr, &cnt, &len, gt215_ram_calc()
520 &next->bios); gt215_ram_calc()
533 data = nvbios_rammapSp(bios, data, ver, hdr, cnt, len, strap, gt215_ram_calc()
534 &ver, &hdr, &next->bios); gt215_ram_calc()
540 /* lookup memory timings, if bios says they're present */ gt215_ram_calc()
541 if (next->bios.ramcfg_timing != 0xff) { gt215_ram_calc()
542 data = nvbios_timingEp(bios, next->bios.ramcfg_timing, gt215_ram_calc()
544 &next->bios); gt215_ram_calc()
597 if (!next->bios.ramcfg_DLLoff) gt215_ram_calc()
605 if (next->bios.ramcfg_10_02_10) { gt215_ram_calc()
629 if (!next->bios.ramcfg_10_02_10) { gt215_ram_calc()
637 switch (next->bios.ramcfg_DLLoff * ram->base.type) { gt215_ram_calc()
646 if (next->bios.timing_10_ODT) gt215_ram_calc()
663 next->bios.ramcfg_FBVDDQ) { gt215_ram_calc()
671 gt215_ram_gpio(fuc, 0x18, !next->bios.ramcfg_FBVDDQ); gt215_ram_calc()
707 if (next->bios.rammap_10_04_08) { gt215_ram_calc()
708 ram_wr32(fuc, 0x1005a0, next->bios.ramcfg_10_06 << 16 | gt215_ram_calc()
709 next->bios.ramcfg_10_05 << 8 | gt215_ram_calc()
710 next->bios.ramcfg_10_05); gt215_ram_calc()
711 ram_wr32(fuc, 0x1005a4, next->bios.ramcfg_10_08 << 8 | gt215_ram_calc()
712 next->bios.ramcfg_10_07); gt215_ram_calc()
713 ram_wr32(fuc, 0x10f804, next->bios.ramcfg_10_09_f0 << 20 | gt215_ram_calc()
714 next->bios.ramcfg_10_03_0f << 16 | gt215_ram_calc()
715 next->bios.ramcfg_10_09_0f | gt215_ram_calc()
766 ram_mask(fuc, 0x100200, 0x00001000, !next->bios.ramcfg_10_02_08 << 12); gt215_ram_calc()
777 if (!next->bios.ramcfg_10_02_04) gt215_ram_calc()
780 if (next->bios.ramcfg_10_02_04) { gt215_ram_calc()
785 if (next->bios.ramcfg_10_02_10) gt215_ram_calc()
800 if (next->bios.ramcfg_10_02_10) gt215_ram_calc()
814 unk714 |= (next->bios.ramcfg_10_04_01) << 8; gt215_ram_calc()
816 if (next->bios.ramcfg_10_02_20) gt215_ram_calc()
818 if (next->bios.ramcfg_10_02_02) gt215_ram_calc()
820 if (next->bios.ramcfg_10_02_01) gt215_ram_calc()
822 if (next->bios.timing_10_24 != 0xff) { gt215_ram_calc()
824 unk718 |= next->bios.timing_10_24 << 28; gt215_ram_calc()
826 if (next->bios.ramcfg_10_02_10) gt215_ram_calc()
834 if (!next->bios.timing_10_ODT) gt215_ram_calc()
838 if (!next->bios.ramcfg_DLLoff) gt215_ram_calc()
861 if (next->bios.rammap_10_04_02) gt215_ram_calc()
863 if (next->bios.ramcfg_10_02_10) { gt215_ram_calc()
H A Dramnv40.c26 #include <subdev/bios.h>
27 #include <subdev/bios/bit.h>
28 #include <subdev/bios/init.h>
29 #include <subdev/bios/pll.h>
38 struct nvkm_bios *bios = subdev->device->bios; nv40_ram_calc() local
43 ret = nvbios_pll_parse(bios, 0x04, &pll); nv40_ram_calc()
72 struct nvkm_bios *bios = device->bios; nv40_ram_prog() local
153 if (!bit_entry(bios, 'M', &M)) { nv40_ram_prog()
156 .bios = bios, nv40_ram_prog()
157 .offset = nvbios_rd16(bios, M.offset + 0x00), nv40_ram_prog()
H A Dbase.c27 #include <subdev/bios.h>
28 #include <subdev/bios/M0203.h>
65 nvkm_fb_bios_memtype(struct nvkm_bios *bios) nvkm_fb_bios_memtype() argument
67 struct nvkm_subdev *subdev = &bios->subdev; nvkm_fb_bios_memtype()
73 if (nvbios_M0203Em(bios, ramcfg, &ver, &hdr, &M0203E)) { nvkm_fb_bios_memtype()
H A Dramgf100.c29 #include <subdev/bios.h>
30 #include <subdev/bios/pll.h>
31 #include <subdev/bios/rammap.h>
32 #include <subdev/bios/timing.h>
135 struct nvkm_bios *bios = device->bios; gf100_ram_calc() local
148 rammap.data = nvbios_rammapEm(bios, freq / 1000, &ver, &rammap.size, gf100_ram_calc()
168 /* lookup memory timings, if bios says they're present */ gf100_ram_calc()
169 strap = nvbios_rd08(bios, ramcfg.data + 0x01); gf100_ram_calc()
171 timing.data = nvbios_timingEe(bios, strap, &ver, &timing.size, gf100_ram_calc()
564 struct nvkm_bios *bios = device->bios; gf100_ram_ctor() local
571 enum nvkm_ram_type type = nvkm_fb_bios_memtype(bios); gf100_ram_ctor()
632 struct nvkm_bios *bios = subdev->device->bios; gf100_ram_new() local
644 ret = nvbios_pll_parse(bios, 0x0c, &ram->refpll); gf100_ram_new()
650 ret = nvbios_pll_parse(bios, 0x04, &ram->mempll); gf100_ram_new()
/linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/subdev/therm/
H A Dfan.c27 #include <subdev/bios/fan.h>
45 target = max_t(u8, target, fan->bios.min_duty); nvkm_fan_update()
46 target = min_t(u8, target, fan->bios.max_duty); nvkm_fan_update()
87 u16 bump_period = fan->bios.bump_period; nvkm_fan_update()
88 u16 slow_down_period = fan->bios.slow_down_period; nvkm_fan_update()
186 therm->fan->bios.pwm_freq = 0; nvkm_therm_fan_set_defaults()
187 therm->fan->bios.min_duty = 0; nvkm_therm_fan_set_defaults()
188 therm->fan->bios.max_duty = 100; nvkm_therm_fan_set_defaults()
189 therm->fan->bios.bump_period = 500; nvkm_therm_fan_set_defaults()
190 therm->fan->bios.slow_down_period = 2000; nvkm_therm_fan_set_defaults()
191 therm->fan->bios.linear_min_temp = 40; nvkm_therm_fan_set_defaults()
192 therm->fan->bios.linear_max_temp = 85; nvkm_therm_fan_set_defaults()
198 if (therm->fan->bios.min_duty > 100) nvkm_therm_fan_safety_checks()
199 therm->fan->bios.min_duty = 100; nvkm_therm_fan_safety_checks()
200 if (therm->fan->bios.max_duty > 100) nvkm_therm_fan_safety_checks()
201 therm->fan->bios.max_duty = 100; nvkm_therm_fan_safety_checks()
203 if (therm->fan->bios.min_duty > therm->fan->bios.max_duty) nvkm_therm_fan_safety_checks()
204 therm->fan->bios.min_duty = therm->fan->bios.max_duty; nvkm_therm_fan_safety_checks()
228 struct nvkm_bios *bios = device->bios; nvkm_therm_fan_ctor() local
271 nvbios_perf_fan_parse(bios, &therm->fan->perf); nvkm_therm_fan_ctor()
272 if (!nvbios_fan_parse(bios, &therm->fan->bios)) { nvkm_therm_fan_ctor()
274 if (nvbios_therm_fan_parse(bios, &therm->fan->bios)) nvkm_therm_fan_ctor()
H A Dfanpwm.c28 #include <subdev/bios.h>
29 #include <subdev/bios/fan.h>
67 if (fan->base.bios.pwm_freq) { nvkm_fanpwm_set()
71 divs /= fan->base.bios.pwm_freq; nvkm_fanpwm_set()
88 struct nvkm_bios *bios = device->bios; nvkm_fanpwm_create() local
93 nvbios_fan_parse(bios, &info); nvkm_fanpwm_create()
H A Dbase.c37 struct nvbios_therm_trip_point *trip = therm->fan->bios.trip, nvkm_therm_update_trip()
45 for (i = 0; i < therm->fan->bios.nr_fan_trip; i++) { nvkm_therm_update_trip()
69 u8 linear_min_temp = therm->fan->bios.linear_min_temp; nvkm_therm_update_linear()
70 u8 linear_max_temp = therm->fan->bios.linear_max_temp; nvkm_therm_update_linear()
76 return therm->fan->bios.min_duty; nvkm_therm_update_linear()
78 return therm->fan->bios.max_duty; nvkm_therm_update_linear()
82 duty *= (therm->fan->bios.max_duty - therm->fan->bios.min_duty); nvkm_therm_update_linear()
84 duty += therm->fan->bios.min_duty; nvkm_therm_update_linear()
112 switch(therm->fan->bios.fan_mode) { nvkm_therm_update()
200 return therm->fan->bios.min_duty; nvkm_therm_attr_get()
202 return therm->fan->bios.max_duty; nvkm_therm_attr_get()
234 if (value > therm->fan->bios.max_duty) nvkm_therm_attr_set()
235 value = therm->fan->bios.max_duty; nvkm_therm_attr_set()
236 therm->fan->bios.min_duty = value; nvkm_therm_attr_set()
241 if (value < therm->fan->bios.min_duty) nvkm_therm_attr_set()
242 value = therm->fan->bios.min_duty; nvkm_therm_attr_set()
243 therm->fan->bios.max_duty = value; nvkm_therm_attr_set()
H A Dic.c26 #include <subdev/bios/extdev.h>
86 struct nvkm_bios *bios = device->bios; nvkm_therm_ic_ctor() local
95 if (!nvbios_extdev_find(bios, NVBIOS_EXTDEV_LM89, &extdev_entry)) { nvkm_therm_ic_ctor()
107 if (!nvbios_extdev_find(bios, NVBIOS_EXTDEV_ADT7473, &extdev_entry)) { nvkm_therm_ic_ctor()
H A Dpriv.h28 #include <subdev/bios.h>
29 #include <subdev/bios/extdev.h>
30 #include <subdev/bios/gpio.h>
31 #include <subdev/bios/perf.h>
40 struct nvbios_therm_fan bios; member in struct:nvkm_fan
H A Dtemp.c242 struct nvkm_bios *bios = subdev->device->bios; nvkm_therm_sensor_ctor() local
247 if (nvbios_therm_sensor_parse(bios, NVBIOS_THERM_DOMAIN_CORE, nvkm_therm_sensor_ctor()
/linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/engine/disp/
H A Dconn.h6 #include <subdev/bios.h>
7 #include <subdev/bios/conn.h>
H A Ddport.c28 #include <subdev/bios.h>
29 #include <subdev/bios/init.h>
54 struct nvkm_bios *bios = subdev->device->bios; dp_set_link_config() local
57 .bios = bios, dp_set_link_config()
72 while ((dp->link_bw / 10) < nvbios_rd16(bios, lnkcmp)) dp_set_link_config()
74 init.offset = nvbios_rd16(bios, lnkcmp + 2); dp_set_link_config()
76 while ((dp->link_bw / 27000) < nvbios_rd08(bios, lnkcmp)) dp_set_link_config()
78 init.offset = nvbios_rd16(bios, lnkcmp + 1); dp_set_link_config()
267 .bios = subdev->device->bios, dp_link_train_init()
293 .bios = subdev->device->bios, dp_link_train_fini()
H A Dgf119.c27 #include <subdev/bios.h>
28 #include <subdev/bios/disp.h>
29 #include <subdev/bios/init.h>
30 #include <subdev/bios/pll.h>
53 struct nvkm_bios *bios = subdev->device->bios; exec_lookup() local
82 *data = nvbios_outp_match(bios, outp->info.hasht, exec_lookup()
99 struct nvkm_bios *bios = device->bios; exec_script() local
119 .bios = bios, exec_script()
137 struct nvkm_bios *bios = device->bios; exec_clkcmp() local
176 data = nvbios_ocfg_match(bios, data, *conf, &ver, &hdr, &cnt, &len, &info2); exec_clkcmp()
178 data = nvbios_oclk_match(bios, info2.clkcmp[id], pclk); exec_clkcmp()
182 .bios = bios, exec_clkcmp()
213 .bios = subdev->device->bios, gf119_disp_intr_unk2_0()
H A Doutp.h5 #include <subdev/bios.h>
6 #include <subdev/bios/dcb.h>
H A Doutpdp.h15 #include <subdev/bios.h>
16 #include <subdev/bios/dp.h>
H A Dsorg94.c125 struct nvkm_bios *bios = device->bios; g94_sor_dp_drv_ctl() local
133 addr = nvbios_dpout_match(bios, outp->base.info.hasht, g94_sor_dp_drv_ctl()
139 addr = nvbios_dpcfg_match(bios, addr, 0, vs, pe, g94_sor_dp_drv_ctl()
H A Dsorgf119.c72 struct nvkm_bios *bios = device->bios; gf119_sor_dp_drv_ctl() local
80 addr = nvbios_dpout_match(bios, outp->base.info.hasht, gf119_sor_dp_drv_ctl()
86 addr = nvbios_dpcfg_match(bios, addr, pc, vs, pe, gf119_sor_dp_drv_ctl()
H A Dsorgm204.c97 struct nvkm_bios *bios = device->bios; gm204_sor_dp_drv_ctl() local
105 addr = nvbios_dpout_match(bios, outp->base.info.hasht, gm204_sor_dp_drv_ctl()
111 addr = nvbios_dpcfg_match(bios, addr, pc, vs, pe, gm204_sor_dp_drv_ctl()
H A Dbase.c31 #include <subdev/bios.h>
32 #include <subdev/bios/dcb.h>
286 struct nvkm_bios *bios = device->bios; nvkm_disp_ctor() local
307 while ((data = dcb_outp_parse(bios, ++i, &ver, &hdr, &dcbE))) { nvkm_disp_ctor()
363 /* bios data *should* give us the most useful information */ nvkm_disp_ctor()
364 data = nvbios_connEp(bios, outp->info.connector, &ver, &hdr, nvkm_disp_ctor()
367 /* no bios connector data... */ nvkm_disp_ctor()
H A Doutpdp.c215 struct nvkm_bios *bios = device->bios; nvkm_output_dp_ctor() local
229 /* bios data is not optional */ nvkm_output_dp_ctor()
230 data = nvbios_dpout_match(bios, outp->base.info.hasht, nvkm_output_dp_ctor()
234 OUTP_ERR(&outp->base, "no bios dp data"); nvkm_output_dp_ctor()
238 OUTP_DBG(&outp->base, "bios dp %02x %02x %02x %02x", nvkm_output_dp_ctor()
H A Dnv50.c30 #include <subdev/bios.h>
31 #include <subdev/bios/disp.h>
32 #include <subdev/bios/init.h>
33 #include <subdev/bios/pll.h>
232 struct nvkm_bios *bios = subdev->device->bios; exec_lookup() local
272 *data = nvbios_outp_match(bios, outp->info.hasht, exec_lookup()
289 struct nvkm_bios *bios = device->bios; exec_script() local
330 .bios = bios, exec_script()
348 struct nvkm_bios *bios = device->bios; exec_clkcmp() local
413 data = nvbios_ocfg_match(bios, data, *conf, &ver, &hdr, &cnt, &len, &info2); exec_clkcmp()
415 data = nvbios_oclk_match(bios, info2.clkcmp[id], pclk); exec_clkcmp()
419 .bios = bios, exec_clkcmp()
462 .bios = subdev->device->bios, nv50_disp_intr_unk20_0()
701 struct nvkm_bios *bios = device->bios; nv50_disp_intr_unk40_0_tmds() local
709 if (dcb_outp_match(bios, DCB_OUTPUT_DP, mask, &ver, &hdr, &match)) nv50_disp_intr_unk40_0_tmds()
H A Dhdagf119.c28 #include <subdev/bios.h>
29 #include <subdev/bios/dcb.h>
H A Doutp.c26 #include <subdev/bios.h>
27 #include <subdev/bios/dcb.h>
/linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/subdev/mxm/
H A Dnv50.c26 #include <subdev/bios.h>
27 #include <subdev/bios/conn.h>
28 #include <subdev/bios/dcb.h>
29 #include <subdev/bios/mxm.h>
52 struct nvkm_bios *bios = mxm->subdev.device->bios; mxm_match_dcb() local
68 u8 link = mxm_sor_map(bios, ctx->desc.dig_conn); mxm_match_dcb()
95 mxm_dcb_sanitise_entry(struct nvkm_bios *bios, void *data, int idx, u16 pdcb) mxm_dcb_sanitise_entry() argument
98 struct context ctx = { .outp = (u32 *)(bios->data + pdcb) }; mxm_dcb_sanitise_entry()
116 i2cidx = mxm_ddc_map(bios, ctx.desc.ddc_port); mxm_dcb_sanitise_entry()
133 link = mxm_sor_map(bios, ctx.desc.dig_conn) & 0x30; mxm_dcb_sanitise_entry()
146 conn = bios->data; mxm_dcb_sanitise_entry()
147 conn += nvbios_connEe(bios, (ctx.outp[0] & 0x0000f000) >> 12, &ver, &len); mxm_dcb_sanitise_entry()
190 struct nvkm_bios *bios = subdev->device->bios; mxm_dcb_sanitise() local
192 u16 dcb = dcb_table(bios, &ver, &hdr, &cnt, &len); mxm_dcb_sanitise()
198 dcb_outp_foreach(bios, mxm, mxm_dcb_sanitise_entry); mxm_dcb_sanitise()
H A Dbase.c27 #include <subdev/bios.h>
28 #include <subdev/bios/mxm.h>
47 struct nvkm_bios *bios = device->bios; mxm_shadow_rom() local
52 i2cidx = mxm_ddc_map(bios, 1 /* LVDS_DDC */) & 0x0f; mxm_shadow_rom()
104 * of course there's at least one bios out there which fails mxm_shadow_dsm()
236 struct nvkm_bios *bios = device->bios; nvkm_mxm_new_() local
246 data = mxm_table(bios, &ver, &len); nvkm_mxm_new_()
247 if (!data || !(ver = nvbios_rd08(bios, data))) { nvkm_mxm_new_()
/linux-4.4.14/arch/x86/include/asm/
H A Dkbdleds.h7 * ask the bios for the correct state.
/linux-4.4.14/drivers/gpu/drm/nouveau/dispnv04/
H A Ddisp.h4 #include <subdev/bios/pll.h>
165 #include <subdev/bios.h>
166 #include <subdev/bios/init.h>
173 struct nvkm_bios *bios = nvxx_bios(&drm->device); nouveau_bios_run_init_table() local
175 .subdev = &bios->subdev, nouveau_bios_run_init_table()
176 .bios = bios, nouveau_bios_run_init_table()
/linux-4.4.14/drivers/md/
H A Ddm-bio-prison.c80 bio_list_init(&cell->bios); __setup_new_cell()
129 bio_list_add(&cell->bios, inmate); __bio_detain()
191 bio_list_merge(inmates, &cell->bios); __cell_release()
197 struct bio_list *bios) dm_cell_release()
202 __cell_release(prison, cell, bios); dm_cell_release()
208 * Sometimes we don't want the holder, just the additional bios.
215 bio_list_merge(inmates, &cell->bios); __cell_release_no_holder()
233 struct bio_list bios; dm_cell_error() local
236 bio_list_init(&bios); dm_cell_error()
237 dm_cell_release(prison, cell, &bios); dm_cell_error()
239 while ((bio = bio_list_pop(&bios))) { dm_cell_error()
263 if (bio_list_empty(&cell->bios)) { __promote_or_release()
268 cell->holder = bio_list_pop(&cell->bios); __promote_or_release()
195 dm_cell_release(struct dm_bio_prison *prison, struct dm_bio_prison_cell *cell, struct bio_list *bios) dm_cell_release() argument
H A Ddm-bio-prison.h21 * by a key, multiple bios can be in the same cell. When the cell is
22 * subsequently unlocked the bios become available.
46 struct bio_list bios; member in struct:dm_bio_prison_cell
89 struct bio_list *bios);
123 * new mapping could free the old block that the read bios are mapped to.
H A Draid1.c52 * level, we store IO_BLOCKED in the appropriate 'bios' pointer
76 int size = offsetof(struct r1bio, bios[pi->raid_disks]); r1bio_pool_alloc()
78 /* allocate a r1bio with room for raid_disks entries in the bios array */ r1bio_pool_alloc()
110 * Allocate bios : 1 for reading, n-1 for writing r1buf_pool_alloc()
116 r1_bio->bios[j] = bio; r1buf_pool_alloc()
129 bio = r1_bio->bios[j]; r1buf_pool_alloc()
135 /* If not user-requests, copy the page pointers to all bios */ r1buf_pool_alloc()
139 r1_bio->bios[j]->bi_io_vec[i].bv_page = r1buf_pool_alloc()
140 r1_bio->bios[0]->bi_io_vec[i].bv_page; r1buf_pool_alloc()
151 bio_for_each_segment_all(bv, r1_bio->bios[j], i) r1buf_pool_alloc()
157 bio_put(r1_bio->bios[j]); r1buf_pool_alloc()
171 r1bio->bios[j]->bi_io_vec[i].bv_page != r1buf_pool_free()
172 r1bio->bios[0]->bi_io_vec[i].bv_page) r1buf_pool_free()
173 safe_put_page(r1bio->bios[j]->bi_io_vec[i].bv_page); r1buf_pool_free()
176 bio_put(r1bio->bios[i]); r1buf_pool_free()
186 struct bio **bio = r1_bio->bios + i; put_all_bios()
207 struct bio *bio = r1_bio->bios[i]; put_buf()
309 if (r1_bio->bios[mirror] == bio) find_bio_disk()
438 r1_bio->bios[mirror] = NULL; raid1_end_write_request()
456 r1_bio->bios[mirror] = IO_MADE_GOOD; raid1_end_write_request()
485 if (r1_bio->bios[mirror] == NULL) raid1_end_write_request()
560 if (r1_bio->bios[disk] == IO_BLOCKED read_balance()
812 * next resync will reach to the window which normal bios are raise_barrier()
1163 r1_bio->bios[rdisk] = read_bio; make_request()
1217 * bios[x] to bio make_request()
1223 * with a set of bios attached. make_request()
1239 r1_bio->bios[i] = NULL; make_request()
1289 r1_bio->bios[i] = bio; make_request()
1299 if (r1_bio->bios[j]) make_request()
1337 if (!r1_bio->bios[i]) make_request()
1373 r1_bio->bios[i] = mbio; make_request()
1805 struct bio *bio = r1_bio->bios[r1_bio->read_disk]; fix_sync_read_error()
1820 if (r1_bio->bios[d]->bi_end_io == end_sync_read) { fix_sync_read_error()
1879 if (r1_bio->bios[d]->bi_end_io != end_sync_read) fix_sync_read_error()
1885 r1_bio->bios[d]->bi_end_io = NULL; fix_sync_read_error()
1894 if (r1_bio->bios[d]->bi_end_io != end_sync_read) fix_sync_read_error()
1926 /* Fix variable parts of all bios */ process_checks()
1932 struct bio *b = r1_bio->bios[i]; process_checks()
1960 if (r1_bio->bios[primary]->bi_end_io == end_sync_read && process_checks()
1961 !r1_bio->bios[primary]->bi_error) { process_checks()
1962 r1_bio->bios[primary]->bi_end_io = NULL; process_checks()
1969 struct bio *pbio = r1_bio->bios[primary]; process_checks()
1970 struct bio *sbio = r1_bio->bios[i]; process_checks()
2011 bio = r1_bio->bios[r1_bio->read_disk]; sync_request_write()
2026 wbio = r1_bio->bios[i]; sync_request_write()
2231 struct bio *bio = r1_bio->bios[m]; handle_sync_write_finished()
2253 if (r1_bio->bios[m] == IO_MADE_GOOD) { handle_write_finished()
2259 } else if (r1_bio->bios[m] != NULL) { handle_write_finished()
2314 bio = r1_bio->bios[r1_bio->read_disk]; handle_read_error()
2327 r1_bio->bios[r1_bio->read_disk] = handle_read_error()
2335 r1_bio->bios[r1_bio->read_disk] = bio; handle_read_error()
2445 generic_make_request(r1_bio->bios[r1_bio->read_disk]); raid1d()
2564 bio = r1_bio->bios[i]; sync_request()
2635 if (r1_bio->bios[i]->bi_end_io == end_sync_write) { sync_request()
2706 bio = r1_bio->bios[i]; sync_request()
2714 bio = r1_bio->bios[i]; sync_request()
2729 } while (r1_bio->bios[disk]->bi_vcnt < RESYNC_PAGES); sync_request()
2749 bio = r1_bio->bios[i]; sync_request()
2758 bio = r1_bio->bios[r1_bio->read_disk]; sync_request()
H A Draid10.h117 * if the IO is in WRITE direction, then multiple bios are used,
120 * When reconstructing, we use 2 bios, one for read, one for write.
144 /* Set ReadError on bios that experience a read error
H A Draid1.h156 * if the IO is in WRITE direction, then multiple bios are used.
159 struct bio *bios[0]; member in struct:r1bio
160 /* DO NOT PUT ANY NEW FIELDS HERE - bios array is contiguously alloced*/
168 /* Set ReadError on bios that experience a readerror so that
H A Ddm-thin.c312 struct rb_root sort_bio_list; /* sorted list of deferred bios */
434 struct bio_list *bios) cell_release()
436 dm_cell_release(pool->prison, cell, bios); cell_release()
451 struct bio_list *bios) cell_release_no_holder()
453 dm_cell_release_no_holder(pool->prison, cell, bios); cell_release_no_holder()
550 static void __merge_bio_list(struct bio_list *bios, struct bio_list *master) __merge_bio_list() argument
552 bio_list_merge(bios, master); __merge_bio_list()
556 static void error_bio_list(struct bio_list *bios, int error) error_bio_list() argument
560 while ((bio = bio_list_pop(bios))) { error_bio_list()
568 struct bio_list bios; error_thin_bio_list() local
571 bio_list_init(&bios); error_thin_bio_list()
574 __merge_bio_list(&bios, master); error_thin_bio_list()
577 error_bio_list(&bios, error); error_thin_bio_list()
599 struct bio_list bios; requeue_io() local
602 bio_list_init(&bios); requeue_io()
605 __merge_bio_list(&bios, &tc->deferred_bio_list); requeue_io()
606 __merge_bio_list(&bios, &tc->retry_on_resume_list); requeue_io()
609 error_bio_list(&bios, DM_ENDIO_REQUEUE); requeue_io()
734 * Batch together any bios that trigger commits and then issue a issue()
839 * This sends the bios in the cell, except the original holder, back
868 while ((bio = bio_list_pop(&cell->bios))) { __inc_remap_and_issue_cell()
875 * We can't issue the bios with the bio prison lock __inc_remap_and_issue_cell()
896 * We have to be careful to inc any bios we're about to issue inc_remap_and_issue_cell()
897 * before the cell is released, and avoid a race with new bios inc_remap_and_issue_cell()
942 * Release any bios held while the block was being provisioned. process_prepared_mapping()
945 * the bios in the cell. process_prepared_mapping()
1400 * If we have run out of space, queue bios until the device is
1451 struct bio_list bios; retry_bios_on_resume() local
1460 bio_list_init(&bios); retry_bios_on_resume()
1461 cell_release(pool, cell, &bios); retry_bios_on_resume()
1463 while ((bio = bio_list_pop(&bios))) retry_bios_on_resume()
1488 * __bio_inc_remaining() is used to defer parent bios's end_io until
1489 * we _know_ all chained sub range discard bios have completed.
1546 * The parent bio must not complete before sub discard bios are break_up_discard_bio()
1569 * passdown bios are in flight. process_discard_cell_passdown()
1645 while ((bio = bio_list_pop(&cell->bios))) { __remap_and_issue_shared_cell()
1722 * Remap empty bios (flushes) immediately, without provisioning. provision_block()
1733 * Fill read bios with zeroes and complete them immediately. provision_block()
1973 struct bio_list bios; __sort_thin_deferred_bios() local
1975 bio_list_init(&bios); __sort_thin_deferred_bios()
1976 bio_list_merge(&bios, &tc->deferred_bio_list); __sort_thin_deferred_bios()
1980 while ((bio = bio_list_pop(&bios))) __sort_thin_deferred_bios()
1984 * Transfer the sorted bios in sort_bio_list back to __sort_thin_deferred_bios()
1986 * all bios. __sort_thin_deferred_bios()
1996 struct bio_list bios; process_thin_deferred_bios() local
2005 bio_list_init(&bios); process_thin_deferred_bios()
2016 bio_list_merge(&bios, &tc->deferred_bio_list); process_thin_deferred_bios()
2022 while ((bio = bio_list_pop(&bios))) { process_thin_deferred_bios()
2031 bio_list_merge(&tc->deferred_bio_list, &bios); process_thin_deferred_bios()
2174 struct bio_list bios; process_deferred_bios() local
2185 * If there are any deferred flush bios, we must commit process_deferred_bios()
2188 bio_list_init(&bios); process_deferred_bios()
2190 bio_list_merge(&bios, &pool->deferred_flush_bios); process_deferred_bios()
2194 if (bio_list_empty(&bios) && process_deferred_bios()
2199 while ((bio = bio_list_pop(&bios))) process_deferred_bios()
2205 while ((bio = bio_list_pop(&bios))) process_deferred_bios()
3411 * Must requeue active_thins' bios and then resume pool_resume()
4066 * wake_worker() call finding no bios to process (because the newly thin_ctr()
432 cell_release(struct pool *pool, struct dm_bio_prison_cell *cell, struct bio_list *bios) cell_release() argument
449 cell_release_no_holder(struct pool *pool, struct dm_bio_prison_cell *cell, struct bio_list *bios) cell_release_no_holder() argument
H A Ddm-io.c26 struct bio_set *bios; member in struct:dm_io_client
61 client->bios = bioset_create(min_ios, 0); dm_io_client_create()
62 if (!client->bios) dm_io_client_create()
77 bioset_free(client->bios); dm_io_client_destroy()
110 * We need an io object to keep track of the number of bios that
321 bio = bio_alloc_bioset(GFP_NOIO, num_bvecs, io->client->bios); do_region()
H A Ddm-region-hash.c91 /* Callback function to schedule bios writes */
92 void (*dispatch_bios)(void *context, struct bio_list *bios);
162 struct bio_list *bios), dm_region_hash_create()
369 * Dispatch the bios before we call 'wake_up_all'. complete_resync_work()
373 * before we dispatch_bios (queue bios and call wake()), complete_resync_work()
524 void dm_rh_inc_pending(struct dm_region_hash *rh, struct bio_list *bios) dm_rh_inc_pending() argument
528 for (bio = bios->head; bio; bio = bio->bi_next) { dm_rh_inc_pending()
160 dm_region_hash_create( void *context, void (*dispatch_bios)(void *context, struct bio_list *bios), void (*wakeup_workers)(void *context), void (*wakeup_all_recovery_waiters)(void *context), sector_t target_begin, unsigned max_recovery, struct dm_dirty_log *log, uint32_t region_size, region_t nr_regions) dm_region_hash_create() argument
H A Ddm-cache-target.c895 * Batch together any bios that trigger commits and then issue a issue()
1080 * We have to handle these bios individually. __cell_defer()
1686 while ((bio = bio_list_pop(&cell->bios))) { inc_fn()
1956 struct bio_list bios; process_deferred_bios() local
1961 bio_list_init(&bios); process_deferred_bios()
1964 bio_list_merge(&bios, &cache->deferred_bios); process_deferred_bios()
1968 while (!bio_list_empty(&bios)) { process_deferred_bios()
1977 bio_list_merge(&cache->deferred_bios, &bios); process_deferred_bios()
1982 bio = bio_list_pop(&bios); process_deferred_bios()
2036 struct bio_list bios; process_deferred_flush_bios() local
2039 bio_list_init(&bios); process_deferred_flush_bios()
2042 bio_list_merge(&bios, &cache->deferred_flush_bios); process_deferred_flush_bios()
2047 * These bios have already been through inc_ds() process_deferred_flush_bios()
2049 while ((bio = bio_list_pop(&bios))) process_deferred_flush_bios()
2056 struct bio_list bios; process_deferred_writethrough_bios() local
2059 bio_list_init(&bios); process_deferred_writethrough_bios()
2062 bio_list_merge(&bios, &cache->deferred_writethrough_bios); process_deferred_writethrough_bios()
2067 * These bios have already been through inc_ds() process_deferred_writethrough_bios()
2069 while ((bio = bio_list_pop(&bios))) process_deferred_writethrough_bios()
2218 struct bio_list bios; requeue_deferred_bios() local
2220 bio_list_init(&bios); requeue_deferred_bios()
2221 bio_list_merge(&bios, &cache->deferred_bios); requeue_deferred_bios()
2224 while ((bio = bio_list_pop(&bios))) { requeue_deferred_bios()
/linux-4.4.14/drivers/gpu/drm/nouveau/include/nvkm/subdev/
H A Dgpio.h6 #include <subdev/bios.h>
7 #include <subdev/bios/gpio.h>
H A Dtherm.h5 #include <subdev/bios.h>
6 #include <subdev/bios/therm.h>
60 /* bios */
H A Dfb.h91 #include <subdev/bios.h>
92 #include <subdev/bios/ramcfg.h>
96 struct nvbios_ramcfg bios; member in struct:nvkm_ram_data
H A Di2c.h6 #include <subdev/bios.h>
7 #include <subdev/bios/i2c.h>
H A Dclk.h66 u8 bios; /* 0xff for none */ member in struct:nvkm_domain
/linux-4.4.14/drivers/char/
H A Dtoshiba.c372 static int tosh_get_machine_id(void __iomem *bios) tosh_get_machine_id() argument
379 id = (0x100*(int) readb(bios+0xfffe))+((int) readb(bios+0xfffa)); tosh_get_machine_id()
406 cx = readw(bios + address); tosh_get_machine_id()
408 cx = readw(bios + address); tosh_get_machine_id()
410 cx = readw(bios + address); tosh_get_machine_id()
433 void __iomem *bios = ioremap(0xf0000, 0x10000); tosh_probe() local
435 if (!bios) tosh_probe()
442 if (readb(bios+0xe010+i)!=signature[i]) { tosh_probe()
444 iounmap(bios); tosh_probe()
460 iounmap(bios); tosh_probe()
470 tosh_id = tosh_get_machine_id(bios); tosh_probe()
474 major = readb(bios+0xe009)-'0'; tosh_probe()
475 minor = ((readb(bios+0xe00b)-'0')*10)+(readb(bios+0xe00c)-'0'); tosh_probe()
480 day = ((readb(bios+0xfff5)-'0')*10)+(readb(bios+0xfff6)-'0'); tosh_probe()
481 month = ((readb(bios+0xfff8)-'0')*10)+(readb(bios+0xfff9)-'0'); tosh_probe()
482 year = ((readb(bios+0xfffb)-'0')*10)+(readb(bios+0xfffc)-'0'); tosh_probe()
499 iounmap(bios); tosh_probe()
H A Duv_mmtimer.c29 #include <asm/uv/bios.h>
/linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/subdev/clk/
H A Dbase.c26 #include <subdev/bios.h>
27 #include <subdev/bios/boost.h>
28 #include <subdev/bios/cstep.h>
29 #include <subdev/bios/perf.h>
43 struct nvkm_bios *bios = clk->subdev.device->bios; nvkm_clk_adjust() local
48 data = nvbios_boostEm(bios, pstate, &ver, &hdr, &cnt, &len, &boostE); nvkm_clk_adjust()
59 subd = nvbios_boostSp(bios, idx++, data, &sver, &shdr, nvkm_clk_adjust()
140 struct nvkm_bios *bios = clk->subdev.device->bios; nvkm_cstate_new() local
147 data = nvbios_cstepXp(bios, idx, &ver, &hdr, &cstepX); nvkm_cstate_new()
161 domain->bios, cstepX.freq); nvkm_cstate_new()
309 struct nvkm_bios *bios = clk->subdev.device->bios; nvkm_pstate_new() local
318 data = nvbios_perfEp(bios, idx, &ver, &hdr, &cnt, &len, &perfE); nvkm_pstate_new()
343 u32 perfSe = nvbios_perfSp(bios, data, domain->bios, nvkm_pstate_new()
351 domain->bios, nvkm_pstate_new()
358 data = nvbios_cstepEm(bios, pstate->pstate, &ver, &hdr, &cstepE); nvkm_pstate_new()
H A Dnv04.c27 #include <subdev/bios.h>
28 #include <subdev/bios/pll.h>
53 int cv = device->bios->version.chip; nv04_clk_pll_prog()
H A Dpllnv04.c25 #include <subdev/bios.h>
26 #include <subdev/bios/pll.h>
40 struct nvkm_bios *bios = subdev->device->bios; getMNP_single() local
56 if (bios->version.major < 0x60) { getMNP_single()
57 int cv = bios->version.chip; getMNP_single()
139 int chip_version = subdev->device->bios->version.chip; getMNP_double()
H A Dpllgt215.c26 #include <subdev/bios.h>
27 #include <subdev/bios/pll.h>
H A Dnv40.c28 #include <subdev/bios.h>
29 #include <subdev/bios/pll.h>
131 ret = nvbios_pll_parse(subdev->device->bios, reg, &pll); nv40_clk_calc_pll()
H A Dgf100.c28 #include <subdev/bios.h>
29 #include <subdev/bios/pll.h>
245 struct nvkm_bios *bios = subdev->device->bios; calc_pll() local
249 ret = nvbios_pll_parse(bios, 0x137000 + (idx * 0x20), &limits); calc_pll()
H A Dgk104.c29 #include <subdev/bios.h>
30 #include <subdev/bios/pll.h>
266 struct nvkm_bios *bios = subdev->device->bios; calc_pll() local
270 ret = nvbios_pll_parse(bios, 0x137000 + (idx * 0x20), &limits); calc_pll()
H A Dmcp77.c28 #include <subdev/bios.h>
29 #include <subdev/bios/pll.h>
172 ret = nvbios_pll_parse(subdev->device->bios, reg, &pll); calc_pll()
H A Dgt215.c30 #include <subdev/bios.h>
31 #include <subdev/bios/pll.h>
252 ret = nvbios_pll_parse(subdev->device->bios, pll, &limits); gt215_pll_info()
H A Dnv50.c28 #include <subdev/bios.h>
29 #include <subdev/bios/pll.h>
331 ret = nvbios_pll_parse(subdev->device->bios, reg, &pll); calc_pll()
/linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/engine/device/
H A Dbase.c30 #include <subdev/bios.h>
73 .bios = nvkm_bios_new,
79 .bios = nvkm_bios_new,
100 .bios = nvkm_bios_new,
121 .bios = nvkm_bios_new,
141 .bios = nvkm_bios_new,
163 .bios = nvkm_bios_new,
185 .bios = nvkm_bios_new,
207 .bios = nvkm_bios_new,
229 .bios = nvkm_bios_new,
251 .bios = nvkm_bios_new,
273 .bios = nvkm_bios_new,
295 .bios = nvkm_bios_new,
317 .bios = nvkm_bios_new,
339 .bios = nvkm_bios_new,
361 .bios = nvkm_bios_new,
383 .bios = nvkm_bios_new,
406 .bios = nvkm_bios_new,
429 .bios = nvkm_bios_new,
451 .bios = nvkm_bios_new,
474 .bios = nvkm_bios_new,
500 .bios = nvkm_bios_new,
526 .bios = nvkm_bios_new,
552 .bios = nvkm_bios_new,
578 .bios = nvkm_bios_new,
604 .bios = nvkm_bios_new,
630 .bios = nvkm_bios_new,
656 .bios = nvkm_bios_new,
682 .bios = nvkm_bios_new,
708 .bios = nvkm_bios_new,
734 .bios = nvkm_bios_new,
760 .bios = nvkm_bios_new,
786 .bios = nvkm_bios_new,
813 .bios = nvkm_bios_new,
841 .bios = nvkm_bios_new,
867 .bios = nvkm_bios_new,
893 .bios = nvkm_bios_new,
920 .bios = nvkm_bios_new,
952 .bios = nvkm_bios_new,
984 .bios = nvkm_bios_new,
1016 .bios = nvkm_bios_new,
1048 .bios = nvkm_bios_new,
1080 .bios = nvkm_bios_new,
1112 .bios = nvkm_bios_new,
1144 .bios = nvkm_bios_new,
1178 .bios = nvkm_bios_new,
1211 .bios = nvkm_bios_new,
1244 .bios = nvkm_bios_new,
1276 .bios = nvkm_bios_new,
1308 .bios = nvkm_bios_new,
1341 .bios = nvkm_bios_new,
1377 .bios = nvkm_bios_new,
1412 .bios = nvkm_bios_new,
1447 .bios = nvkm_bios_new,
1483 .bios = nvkm_bios_new,
1519 .bios = nvkm_bios_new,
1555 .bios = nvkm_bios_new,
1590 .bios = nvkm_bios_new,
1623 .bios = nvkm_bios_new,
1658 .bios = nvkm_bios_new,
1695 .bios = nvkm_bios_new,
1732 .bios = nvkm_bios_new,
1793 .bios = nvkm_bios_new,
1829 .bios = nvkm_bios_new,
1865 .bios = nvkm_bios_new,
1901 .bios = nvkm_bios_new,
1937 .bios = nvkm_bios_new,
1969 .bios = nvkm_bios_new,
2000 .bios = nvkm_bios_new,
2076 _(VBIOS , device->bios , &device->bios->subdev); nvkm_device_subdev()
2521 _(NVKM_SUBDEV_VBIOS , bios);
H A Dpriv.h6 #include <subdev/bios.h>
/linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/subdev/i2c/
H A Dbase.c31 #include <subdev/bios.h>
32 #include <subdev/bios/dcb.h>
33 #include <subdev/bios/i2c.h>
51 struct nvkm_bios *bios = i2c->subdev.device->bios; nvkm_i2c_bus_find() local
56 u16 i2c = dcb_i2c_table(bios, &ver, &hdr, &cnt, &len); nvkm_i2c_bus_find()
58 u8 auxidx = nvbios_rd08(bios, i2c + 4); nvkm_i2c_bus_find()
232 u8 bios; member in struct:nvkm_i2c_drv
247 struct nvkm_bios *bios = device->bios; nvkm_i2c_new_() local
264 while (!dcb_i2c_parse(bios, ++i, &ccbE)) { nvkm_i2c_new_()
330 while (dcb_outp_parse(bios, ++i, &ver, &hdr, &dcbE)) { nvkm_i2c_new_()
348 if (drv->bios == dcbE.extdev) nvkm_i2c_new_()
/linux-4.4.14/arch/x86/platform/geode/
H A Dnet5501.c106 unsigned char *rombase, *bios; net5501_present() local
115 bios = rombase + 0x20; /* null terminated */ net5501_present()
117 if (memcmp(bios, "comBIOS", 7)) net5501_present()
H A Dalix.c40 /* FIXME: Award bios is not automatically detected as Alix platform */
/linux-4.4.14/include/linux/
H A Ddm-region-hash.h37 struct bio_list *bios),
75 void dm_rh_inc_pending(struct dm_region_hash *rh, struct bio_list *bios);
78 /* Delay bios on regions. */
H A Dpktcdvd.h89 PACKET_WAITING_STATE, /* Waiting for more bios to arrive, so */
112 struct bio_list orig_bios; /* Original bios passed to pkt_make_request */
114 int write_size; /* Total size of all bios in the orig_bios */
132 struct bio *r_bios[PACKET_MAX_SIZE]; /* bios to use during data gathering */
184 struct rb_root bio_queue; /* Work queue of bios we need to handle */
H A Dapm_bios.h36 struct apm_bios_info bios; member in struct:apm_info
H A Ddevice-mapper.h214 * A number of zero-length barrier bios that will be submitted
218 * It is a responsibility of the target driver to remap these bios
224 * The number of discard bios that will be submitted to the target.
230 * The number of WRITE SAME bios that will be submitted to the target.
243 * duplicate bios should be sent to the target when writing
267 * Set if the target required discard bios to be split
/linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/subdev/gpio/
H A Dgf119.c30 struct nvkm_bios *bios = device->bios; gf119_gpio_reset() local
35 while ((entry = dcb_gpio_entry(bios, 0, ++ent, &ver, &len))) { gf119_gpio_reset()
36 u32 data = nvbios_rd32(bios, entry); gf119_gpio_reset()
H A Dnv50.c30 struct nvkm_bios *bios = device->bios; nv50_gpio_reset() local
35 while ((entry = dcb_gpio_entry(bios, 0, ++ent, &ver, &len))) { nv50_gpio_reset()
37 u32 data = nvbios_rd32(bios, entry); nv50_gpio_reset()
H A Dbase.c52 struct nvkm_bios *bios = device->bios; nvkm_gpio_find() local
59 data = dcb_gpio_match(bios, idx, tag, line, &ver, &len, func); nvkm_gpio_find()
/linux-4.4.14/arch/arm/mach-footbridge/
H A Debsa285-pci.c4 * PCI bios-type initialisation for PCI machines
H A Dcats-pci.c4 * PCI bios-type initialisation for PCI machines
H A Dnetwinder-pci.c4 * PCI bios-type initialisation for PCI machines
H A Dpersonal-pci.c4 * PCI bios-type initialisation for PCI machines
/linux-4.4.14/drivers/input/misc/
H A Dapanel.c256 static __init const void __iomem *bios_signature(const void __iomem *bios) bios_signature() argument
262 if (check_signature(bios + offset, signature, bios_signature()
264 return bios + offset; bios_signature()
273 void __iomem *bios; apanel_init() local
279 bios = ioremap(0xF0000, 0x10000); /* Can't fail */ apanel_init()
281 p = bios_signature(bios); apanel_init()
283 iounmap(bios); apanel_init()
327 iounmap(bios); apanel_init()
/linux-4.4.14/drivers/gpu/drm/nouveau/include/nvif/
H A Ddevice.h39 #include <subdev/bios.h>
58 #define nvxx_bios(a) nvxx_device(a)->bios
/linux-4.4.14/arch/x86/realmode/rm/
H A DMakefile18 # probed, and video-bios.o should typically be last.
21 wakeup-objs += video-bios.o
H A Dreboot.S111 jz bios
123 bios: label
/linux-4.4.14/block/
H A Dblk-throttle.c30 * To implement hierarchical throttling, throtl_grps form a tree and bios
32 * issued. When dispatching bios from the children and local group at each
33 * level, if the bios are dispatched into a single bio_list, there's a risk
34 * of a local or child group which can queue many bios at once filling up
37 * To avoid such starvation, dispatched bios are queued separately
42 * throtl_qnode is used to keep the queued bios separated by their sources.
50 * tree pinned while bios are in flight.
54 struct bio_list bios; /* queued bios */ member in struct:throtl_qnode
66 unsigned int nr_queued[2]; /* number of queued bios */
100 * qnode_on_self is used when bios are directly queued to this
101 * throtl_grp so that local bios compete fairly with bios
102 * dispatched from children. qnode_on_parent is used when bios are
145 /* Total Number of queued bios on READ and WRITE lists */
153 /* Work for dispatching throttled bios */
236 bio_list_init(&qn->bios); throtl_qnode_init()
253 bio_list_add(&qn->bios, bio); throtl_qnode_add_bio()
272 bio = bio_list_peek(&qn->bios); throtl_peek_queued()
300 bio = bio_list_pop(&qn->bios); throtl_pop_queued()
303 if (bio_list_empty(&qn->bios)) { throtl_pop_queued()
773 * this function with a different bio if there are other bios tg_may_dispatch()
853 * If @tg doesn't currently have any bios queued in the same throtl_add_bio_tg()
925 * responsible for issuing these bios. tg_dispatch_one_bio()
1041 throtl_log(sq, "bios disp=%u", ret); throtl_pending_timer_fn()
1419 /* throtl is FIFO - if bios are already queued, should queue */ blk_throtl_bio()
1431 * We need to trim slice even when bios are not being queued blk_throtl_bio()
1483 * don't want bios to leave with the flag set. Clear the flag if blk_throtl_bio()
1492 * Dispatch all bios from all children tg's queued on @parent_sq. On
1494 * and all bios from previously active tg's are on @parent_sq->bio_lists[].
1514 * blk_throtl_drain - drain throttled bios
1515 * @q: request_queue to drain throttled bios for
1517 * Dispatch all currently throttled bios on @q through ->make_request_fn().
1533 * that all bios are propagated to td->service_queue. It'd be
1540 /* finally, transfer bios from top-level tg's into the td */
1546 /* all bios now should be in td->service_queue, issue them */
H A Dblk-lib.c123 /* Wait for bios in-flight */ blkdev_issue_discard()
194 /* Wait for bios in-flight */ blkdev_issue_write_same()
205 * blkdev_issue_zeroout - generate number of zero filed write bios
212 * Generate and issue number of bios with zerofiled pages.
255 /* Wait for bios in-flight */ __blkdev_issue_zeroout()
H A Dbio.c363 * In order to guarantee forward progress we must punt only bios that punt_bios_to_rescuer()
366 * could require allocating bios from this bio_set, and doing that from punt_bios_to_rescuer()
406 * driver), bios are not submitted until after you return - see the code in
410 * This would normally mean allocating multiple bios under
412 * deadlock avoidance code that resubmits any blocked bios from a rescuer
448 * means if we're running beneath it, any bios we allocate and bio_alloc_bioset()
453 * multiple bios from the same bio_set() while running bio_alloc_bioset()
455 * multiple bios (say a stacking block driver that was splitting bio_alloc_bioset()
456 * bios), we would deadlock if we exhausted the mempool's bio_alloc_bioset()
461 * bios on current->bio_list, we first try the allocation bio_alloc_bioset()
463 * bios we would be blocking to the rescuer workqueue before bio_alloc_bioset()
709 * This should only be used by REQ_PC bios.
932 * bio_copy_data - copy contents of data buffers from one chain of bios to
937 * If @src and @dst are single bios, bi_next must be NULL - otherwise, treats
938 * @src and @dst as linked lists of bios.
941 * min(src->bi_size, dst->bi_size) bytes (or the equivalent for lists of bios).
1750 * Need to have a real endio function for chained bios, bio_endio()
2044 panic("bio: can't allocate bios\n"); init_bio()
2051 panic("bio: can't allocate bios\n"); init_bio()
/linux-4.4.14/include/linux/mtd/
H A Dnftl.h32 #define BLOCK_RESERVED 0xfffc /* bios block or bad block */
51 unsigned int nb_boot_blocks; /* number of blocks used by the bios */
H A Dinftl.h45 unsigned int nb_boot_blocks; /* number of blocks used by the bios */
/linux-4.4.14/drivers/video/fbdev/sis/
H A Dsis_main.c4309 unsigned char *bios = ivideo->SiS_Pr.VirtualRomBase; sisfb_post_sis300() local
4315 bios = NULL; sisfb_post_sis300()
4319 if(bios) { sisfb_post_sis300()
4320 if(bios[0x52] & 0x80) { sisfb_post_sis300()
4321 memtype = bios[0x52]; sisfb_post_sis300()
4335 if(bios) { sisfb_post_sis300()
4338 v1 = bios[rindex++]; sisfb_post_sis300()
4339 v2 = bios[rindex++]; sisfb_post_sis300()
4340 v3 = bios[rindex++]; sisfb_post_sis300()
4342 v4 = bios[rindex++]; sisfb_post_sis300()
4343 v5 = bios[rindex++]; sisfb_post_sis300()
4344 v6 = bios[rindex++]; sisfb_post_sis300()
4355 if(bios) sisfb_post_sis300()
4356 v1 = bios[0xa4]; sisfb_post_sis300()
4363 if(bios) { sisfb_post_sis300()
4365 v1 = bios[memtype]; sisfb_post_sis300()
4366 v2 = bios[memtype + 8]; sisfb_post_sis300()
4367 v3 = bios[memtype + 16]; sisfb_post_sis300()
4368 v4 = bios[memtype + 24]; sisfb_post_sis300()
4369 v5 = bios[memtype + 32]; sisfb_post_sis300()
4370 v6 = bios[memtype + 40]; sisfb_post_sis300()
4371 v7 = bios[memtype + 48]; sisfb_post_sis300()
4372 v8 = bios[memtype + 56]; sisfb_post_sis300()
4386 if(bios) { sisfb_post_sis300()
4387 if(bios[0x53] & 0x02) { sisfb_post_sis300()
4397 if(bios) { sisfb_post_sis300()
4398 v1 = bios[0xe8]; sisfb_post_sis300()
4399 v2 = bios[0xe9]; sisfb_post_sis300()
4400 v3 = bios[0xea]; sisfb_post_sis300()
4411 if(bios) { sisfb_post_sis300()
4412 v1 = bios[0xec]; sisfb_post_sis300()
4413 v2 = bios[0xeb]; sisfb_post_sis300()
4426 v4 = bios[0xf5]; sisfb_post_sis300()
4427 v5 = bios[0xf6]; sisfb_post_sis300()
4428 v6 = bios[0xf7]; sisfb_post_sis300()
4475 if(bios) { sisfb_post_sis300()
4476 v1 = bios[0xe6]; sisfb_post_sis300()
4477 v2 = bios[0xe7]; sisfb_post_sis300()
4900 unsigned char *bios = ivideo->bios_abase; sisfb_post_xgi_ddr2_mrs_default() local
4929 v1 = bios[0xf0]; sisfb_post_xgi_ddr2_mrs_default()
4981 unsigned char *bios = ivideo->bios_abase; sisfb_post_xgi_ddr2() local
5004 v1 = bios[regb + 0x168]; sisfb_post_xgi_ddr2()
5005 v2 = bios[regb + 0x160]; sisfb_post_xgi_ddr2()
5006 v3 = bios[regb + 0x158]; sisfb_post_xgi_ddr2()
5026 unsigned char *bios = ivideo->bios_abase; sisfb_post_xgi_ramtype() local
5033 ramtype = bios[0x62]; sisfb_post_xgi_ramtype()
5034 v1 = bios[0x1d2]; sisfb_post_xgi_ramtype()
5066 unsigned char *bios = ivideo->bios_abase; sisfb_post_xgi() local
5156 ptr = (const u8 *)&bios[0x78]; sisfb_post_xgi()
5164 ptr = (const u8 *)&bios[0x76]; sisfb_post_xgi()
5172 v1 = bios[0x74]; sisfb_post_xgi()
5173 v2 = bios[0x75]; sisfb_post_xgi()
5184 ptr = (const u8 *)&bios[0x7b]; sisfb_post_xgi()
5221 SiS_SetReg(SISPART1, 0x02, bios[0x7e]); sisfb_post_xgi()
5229 SiS_SetReg(SISPART4, 0x0d, bios[0x7f]); sisfb_post_xgi()
5230 SiS_SetReg(SISPART4, 0x0e, bios[0x80]); sisfb_post_xgi()
5231 SiS_SetReg(SISPART4, 0x10, bios[0x81]); sisfb_post_xgi()
5244 v1 = bios[0x77]; sisfb_post_xgi()
5291 regd = bios[0x90 + 3] | (bios[0x90 + 4] << 8); sisfb_post_xgi()
5312 if(bios[0x64] & 0x01) { sisfb_post_xgi()
5313 SiS_SetRegANDOR(SISCR, 0x5f, 0xf0, bios[0x64]); sisfb_post_xgi()
5316 v1 = bios[0x4f7]; sisfb_post_xgi()
5325 SiS_SetRegANDOR(SISCR, 0x47, 0x04, bios[0x4f6] & 0xfb); sisfb_post_xgi()
5326 SiS_SetRegANDOR(SISCR, 0x49, 0xf0, bios[0x4f8] & 0x0f); sisfb_post_xgi()
5327 SiS_SetRegANDOR(SISCR, 0x4a, 0x60, bios[0x4f9] & 0x9f); sisfb_post_xgi()
5328 SiS_SetRegANDOR(SISCR, 0x4b, 0x08, bios[0x4fa] & 0xf7); sisfb_post_xgi()
5329 SiS_SetRegANDOR(SISCR, 0x4c, 0x80, bios[0x4fb] & 0x7f); sisfb_post_xgi()
5330 SiS_SetReg(SISCR, 0x70, bios[0x4fc]); sisfb_post_xgi()
5331 SiS_SetRegANDOR(SISCR, 0x71, 0xf0, bios[0x4fd] & 0x0f); sisfb_post_xgi()
5333 SiS_SetRegANDOR(SISCR, 0x74, 0xcf, bios[0x4fe] & 0x30); sisfb_post_xgi()
5334 SiS_SetRegANDOR(SISCR, 0x75, 0xe0, bios[0x4ff] & 0x1f); sisfb_post_xgi()
5335 SiS_SetRegANDOR(SISCR, 0x76, 0xe0, bios[0x500] & 0x1f); sisfb_post_xgi()
5336 v1 = bios[0x501]; sisfb_post_xgi()
5364 v1 = bios[0x140 + regb]; sisfb_post_xgi()
5370 ptr = (const u8 *)&bios[0x128]; sisfb_post_xgi()
5380 ptr = (const u8 *)&bios[index]; sisfb_post_xgi()
5381 ptr2 = (const u8 *)&bios[index + 0x20]; sisfb_post_xgi()
5409 ptr = (const u8 *)&bios[index]; sisfb_post_xgi()
5436 ptr = (const u8 *)&bios[0x148]; sisfb_post_xgi()
5447 ptr = (const u8 *)&bios[index]; sisfb_post_xgi()
5464 v1 = bios[0x118 + regb]; sisfb_post_xgi()
5465 v2 = bios[0xf8 + regb]; sisfb_post_xgi()
5466 v3 = bios[0x120 + regb]; sisfb_post_xgi()
5467 v4 = bios[0x1ca]; sisfb_post_xgi()
5476 ptr = (const u8 *)&bios[0x170]; sisfb_post_xgi()
5486 ptr = (const u8 *)&bios[0x1a8]; sisfb_post_xgi()
5494 ptr = (const u8 *)&bios[0x100]; sisfb_post_xgi()
5531 v1 = bios[regb + 0x158]; sisfb_post_xgi()
5532 v2 = bios[regb + 0x160]; sisfb_post_xgi()
5533 v3 = bios[regb + 0x168]; sisfb_post_xgi()
5544 SiS_SetReg(SISCR, 0x86, bios[regb + 0x168]); sisfb_post_xgi()
5550 SiS_SetReg(SISCR, 0x85, bios[regb + 0x160]); sisfb_post_xgi()
5551 SiS_SetReg(SISCR, 0x82, bios[regb + 0x158]); sisfb_post_xgi()
5568 if((ivideo->chip == XGI_20) || (bios[0x1cb] != 0x0c)) { sisfb_post_xgi()
5579 } else if((ivideo->chip == XGI_40) && (bios[0x1cb] == 0x0c)) { sisfb_post_xgi()
5587 v1 = bios[0xf0]; sisfb_post_xgi()
5589 v2 = bios[index]; sisfb_post_xgi()
5590 v3 = bios[index + 1]; sisfb_post_xgi()
5591 v4 = bios[index + 2]; sisfb_post_xgi()
5592 v5 = bios[index + 3]; sisfb_post_xgi()
5615 SiS_SetReg(SISCR, 0x82, bios[regb + 0x158]); sisfb_post_xgi()
5616 SiS_SetReg(SISCR, 0x85, bios[regb + 0x160]); sisfb_post_xgi()
5617 SiS_SetReg(SISCR, 0x86, bios[regb + 0x168]); sisfb_post_xgi()
5630 v1 = bios[regb + 0x160]; sisfb_post_xgi()
5631 v2 = bios[regb + 0x158]; sisfb_post_xgi()
5654 if((ivideo->chip == XGI_40) && (bios[0x1cb] != 0x0c)) { sisfb_post_xgi()
5666 v1 = bios[0xf0]; sisfb_post_xgi()
5671 SiS_SetReg(SISSR, 0x16, bios[0x53e]); sisfb_post_xgi()
5672 SiS_SetReg(SISSR, 0x16, bios[0x53f]); sisfb_post_xgi()
5687 SiS_SetReg(SISSR, 0x16, bios[0x540]); sisfb_post_xgi()
5688 SiS_SetReg(SISSR, 0x16, bios[0x541]); sisfb_post_xgi()
5699 v1 = bios[0x110 + regb]; sisfb_post_xgi()
5706 v1 = bios[0x62]; sisfb_post_xgi()
5707 v2 = bios[0x63]; sisfb_post_xgi()
5713 SiS_SetReg(SISSR, 0x13, bios[regb + 0xe0]); sisfb_post_xgi()
5714 SiS_SetReg(SISSR, 0x14, bios[regb + 0xe0 + 8]); sisfb_post_xgi()
/linux-4.4.14/drivers/gpu/drm/gma500/
H A Dintel_bios.c532 u8 __iomem *bios = NULL; psb_intel_init_bios() local
551 bios = pci_map_rom(pdev, &size); psb_intel_init_bios()
552 if (!bios) psb_intel_init_bios()
557 if (!memcmp(bios + i, "$VBT", 4)) { psb_intel_init_bios()
558 vbt = (struct vbt_header *)(bios + i); psb_intel_init_bios()
565 pci_unmap_rom(pdev, bios); psb_intel_init_bios()
568 bdb = (struct bdb_header *)(bios + i + vbt->bdb_offset); psb_intel_init_bios()
581 if (bios) psb_intel_init_bios()
582 pci_unmap_rom(pdev, bios); psb_intel_init_bios()
/linux-4.4.14/arch/x86/platform/ts5500/
H A Dts5500.c100 void __iomem *bios; ts5500_check_signature() local
103 bios = ioremap(0xf0000, 0x10000); ts5500_check_signature()
104 if (!bios) ts5500_check_signature()
108 if (check_signature(bios + ts5500_signatures[i].offset, ts5500_check_signature()
116 iounmap(bios); ts5500_check_signature()
/linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/engine/gr/
H A Dgm107.c27 #include <subdev/bios.h>
28 #include <subdev/bios/P0260.h>
295 struct nvkm_bios *bios = device->bios; gm107_gr_init_bios() local
301 while (nvbios_P0260Ep(bios, ++E, &ver, &hdr, &infoE)) { gm107_gr_init_bios()
304 while (nvbios_P0260Xp(bios, ++X, &ver, &hdr, &infoX)) gm107_gr_init_bios()
/linux-4.4.14/arch/sh/kernel/
H A Dsh_bios.c141 .name = "bios",
158 if (!strncmp(buf, "bios", 4)) setup_early_printk()
/linux-4.4.14/arch/x86/kernel/
H A Dapm_32.c49 * 0.9: only call bios if bios is present, Linux 1.3.72
361 * idle percentage above which bios idle calls are done
865 clock_slowed = (apm_info.bios.flags & APM_IDLE_SLOWS_CLOCK) != 0; apm_do_idle()
1008 if ((enable == 0) && (apm_info.bios.flags & APM_BIOS_DISENGAGED)) apm_enable_power_management()
1014 apm_info.bios.flags &= ~APM_BIOS_DISABLED; apm_enable_power_management()
1016 apm_info.bios.flags |= APM_BIOS_DISABLED; apm_enable_power_management()
1101 && (apm_info.bios.flags & APM_BIOS_DISABLED)) apm_engage_power_management()
1108 apm_info.bios.flags &= ~APM_BIOS_DISENGAGED; apm_engage_power_management()
1110 apm_info.bios.flags |= APM_BIOS_DISENGAGED; apm_engage_power_management()
1702 (apm_info.bios.version >> 8) & 0xff, proc_apm_show()
1703 apm_info.bios.version & 0xff, proc_apm_show()
1704 apm_info.bios.flags, proc_apm_show()
1746 apm_info.connection_version = apm_info.bios.version; apm()
1768 if (apm_info.bios.flags & APM_BIOS_DISABLED) { apm()
1782 if ((apm_info.bios.flags & APM_BIOS_DISENGAGED) apm()
1956 printk(KERN_INFO "%s bios detected. " set_realmode_power_off()
1990 printk(KERN_INFO "This bug is fixed in bios P15 which is available for\n"); apm_is_horked_d850md()
2031 * This bios swaps the APM minute reporting bytes over (Many sony laptops
2236 { /* broken PM poweroff bios */
2270 if (apm_info.bios.version == 0 || paravirt_enabled() || machine_is_olpc()) { apm_init()
2276 ((apm_info.bios.version >> 8) & 0xff), apm_init()
2277 (apm_info.bios.version & 0xff), apm_init()
2278 apm_info.bios.flags, apm_init()
2280 if ((apm_info.bios.flags & APM_32_BIT_SUPPORT) == 0) { apm_init()
2299 if (apm_info.bios.version == 0x001) apm_init()
2300 apm_info.bios.version = 0x100; apm_init()
2303 if (apm_info.bios.version < 0x102) apm_init()
2304 apm_info.bios.cseg_16_len = 0; /* 64k */ apm_init()
2308 apm_info.bios.cseg, apm_info.bios.offset, apm_init()
2309 apm_info.bios.cseg_16, apm_info.bios.dseg); apm_init()
2310 if (apm_info.bios.version > 0x100) apm_init()
2312 apm_info.bios.cseg_len, apm_init()
2313 apm_info.bios.dseg_len); apm_init()
2314 if (apm_info.bios.version > 0x101) apm_init()
2315 printk(" cseg16 len %x", apm_info.bios.cseg_16_len); apm_init()
2338 apm_bios_entry.offset = apm_info.bios.offset; apm_init()
2353 (unsigned long)__va((unsigned long)apm_info.bios.cseg << 4)); apm_init()
2355 (unsigned long)__va((unsigned long)apm_info.bios.cseg_16 << 4)); apm_init()
2357 (unsigned long)__va((unsigned long)apm_info.bios.dseg << 4)); apm_init()
2403 if (((apm_info.bios.flags & APM_BIOS_DISENGAGED) == 0) apm_exit()
H A De820.c238 struct e820entry *pbios; /* pointer to original bios entry */
281 /* bail out if we find any unreasonable addresses in bios map */ sanitize_e820_map()
307 /* create a new bios memory map, removing overlaps */ sanitize_e820_map()
309 new_bios_entry = 0; /* index for creating new bios map entries */ sanitize_e820_map()
313 /* loop through change-points, determining affect on the new bios map */ sanitize_e820_map()
315 /* keep track of all overlapping bios entries */ sanitize_e820_map()
347 * continue building up new bios map based on this sanitize_e820_map()
361 * bios entries ? sanitize_e820_map()
375 /* retain count for new bios entries */ sanitize_e820_map()
378 /* copy new bios mapping into original location */ sanitize_e820_map()
930 /* this is the legacy bios/dos rom-shadow + mmio region */ do_mark_busy()
/linux-4.4.14/drivers/platform/chrome/
H A Dchromeos_pstore.c20 * coreboot as bios vendor. No other systems with this
/linux-4.4.14/arch/x86/platform/uv/
H A Duv_sysfs.c23 #include <asm/uv/bios.h>
H A Dbios_uv.c26 #include <asm/uv/bios.h>
121 * bios returns watchlist number or negative error number. uv_bios_mq_watchlist_alloc()
/linux-4.4.14/drivers/char/tpm/
H A Dtpm_acpi.c47 /* read binary bios log */ read_log()
/linux-4.4.14/arch/sh/boards/mach-hp6xx/
H A Dhp6xx_apm.c2 * bios-less APM driver for hp680
/linux-4.4.14/arch/mips/ar7/
H A Dsetup.c85 * given by the bios and saves the command line.
/linux-4.4.14/drivers/video/fbdev/aty/
H A Daty128fb.c491 static void aty128_get_pllinfo(struct aty128fb_par *par, void __iomem *bios);
508 #define BIOS_IN8(v) (readb(bios + (v)))
509 #define BIOS_IN16(v) (readb(bios + (v)) | \
510 (readb(bios + (v) + 1) << 8))
511 #define BIOS_IN32(v) (readb(bios + (v)) | \
512 (readb(bios + (v) + 1) << 8) | \
513 (readb(bios + (v) + 2) << 16) | \
514 (readb(bios + (v) + 3) << 24))
827 void __iomem *bios; aty128_map_ROM() local
838 bios = pci_map_rom(dev, &rom_size); aty128_map_ROM()
840 if (!bios) { aty128_map_ROM()
902 return bios; aty128_map_ROM()
905 pci_unmap_rom(dev, bios); aty128_map_ROM()
910 unsigned char __iomem *bios) aty128_get_pllinfo()
2079 void __iomem *bios = NULL; aty128_probe() local
2142 bios = aty128_map_ROM(par, pdev); aty128_probe()
2144 if (bios == NULL) aty128_probe()
2145 bios = aty128_find_mem_vbios(par); aty128_probe()
2147 if (bios == NULL) aty128_probe()
2151 aty128_get_pllinfo(par, bios); aty128_probe()
2152 pci_unmap_rom(pdev, bios); aty128_probe()
909 aty128_get_pllinfo(struct aty128fb_par *par, unsigned char __iomem *bios) aty128_get_pllinfo() argument
/linux-4.4.14/drivers/gpu/drm/i915/
H A Dintel_bios.c1270 static const struct bdb_header *find_vbt(void __iomem *bios, size_t size) find_vbt() argument
1277 if (ioread32(bios + i) == *((const u32 *) "$VBT")) { find_vbt()
1284 void *_bios = (void __force *) bios; find_vbt()
1309 u8 __iomem *bios = NULL; intel_parse_bios() local
1324 bios = pci_map_rom(pdev, &size); intel_parse_bios()
1325 if (!bios) intel_parse_bios()
1328 bdb = find_vbt(bios, size); intel_parse_bios()
1330 pci_unmap_rom(pdev, bios); intel_parse_bios()
1349 if (bios) intel_parse_bios()
1350 pci_unmap_rom(pdev, bios); intel_parse_bios()
/linux-4.4.14/drivers/video/fbdev/matrox/
H A Dmatroxfb_misc.c770 memset(&minfo->bios, 0, sizeof(minfo->bios)); matroxfb_read_pins()
776 parse_bios(vaddr_va(minfo->video.vbase), &minfo->bios); matroxfb_read_pins()
780 if (!minfo->bios.bios_valid) { matroxfb_read_pins()
794 parse_bios(b, &minfo->bios); matroxfb_read_pins()
800 matroxfb_set_limits(minfo, &minfo->bios); matroxfb_read_pins()
/linux-4.4.14/fs/btrfs/
H A Dbtrfs_inode.h289 /* number of bios pending for this dio */
302 * The original bio may be splited to several sub-bios, this is
303 * done during endio of sub-bios
H A Draid56.c93 * to add more bios into the stripe
101 * to collect partial bios while plugged. The
144 * size of all the bios in the bio_list. This
198 * bios in hopes of making a full stripe
534 * new bios into the list
598 * We're not allowed to add any new bios to the rbio_can_merge()
863 * this frees the rbio and runs through all the bios in the
1051 * add a single page from a specific stripe into our list of bios for IO
1052 * this will try to merge into existing bios if possible, and returns
1206 * We're not allowed to add any new bios to the finish_rmw()
1268 * time to start writing. Make bios for everything from the finish_rmw()
1447 * end io for the read phase of the rmw cycle. All the bios here are physical
1448 * stripe bios we've read from the disk so we can recalculate the parity of the
1451 * This will usually kick off finish_rmw once all the bios are read in, but it
1526 * build a list of bios to read all the missing parts of this raid56_rmw_stripe()
1635 * recalculate parity, enough new bios come into create
2082 * we might have no bios to read just because the pages __raid56_parity_recover()
2083 * were up to date, or we might have no bios to read because __raid56_parity_recover()
2423 * time to start writing. Make bios for everything from the finish_parity_scrub()
2545 * end io for the read phase of the rmw cycle. All the bios here are physical
2546 * stripe bios we've read from the disk so we can recalculate the parity of the
2549 * This will usually kick off finish_rmw once all the bios are read in, but it
2591 * build a list of bios to read all the missing parts of this raid56_parity_scrub_stripe()
H A Dvolumes.h63 /* regular prio bios */
65 /* WRITE_SYNC bios */
271 * quite yet. We have our own btrfs bioset, and all of the bios
/linux-4.4.14/drivers/scsi/
H A Daha1542.h49 #define CMD_EXTBIOS 0x28 /* Return extend bios information only 1542C */
/linux-4.4.14/drivers/misc/sgi-xp/
H A Dxp_uv.c19 #include <asm/uv/bios.h>
/linux-4.4.14/drivers/mtd/maps/
H A Dts5500_flash.c23 * - If you have created your own jffs file system and the bios overwrites
H A Damd76xrom.c51 * This is intended to prevent flashing the bios, perhaps accidentally.
162 /* FIXME handle registers 0x80 - 0x8C the bios region locks */ amd76xrom_init_one()
H A Dck804xrom.c57 * This is intended to prevent flashing the bios, perhaps accidentally.
190 /* FIXME handle registers 0x80 - 0x8C the bios region locks */ ck804xrom_init_one()
/linux-4.4.14/drivers/ide/
H A Dtriflex.c120 * APM bios refuses to suspend if IDE is not accessible. triflex_ide_pci_suspend()
/linux-4.4.14/drivers/pci/pcie/aer/
H A Decrc.c38 [ECRC_POLICY_DEFAULT] = "bios",
/linux-4.4.14/arch/x86/include/asm/uv/
H A Dbios.h87 * bios calls have 6 parameters
/linux-4.4.14/arch/arm/mach-pxa/
H A Dcm-x2xx-pci.c4 * PCI bios-type initialisation for PCI machines
/linux-4.4.14/drivers/gpu/drm/nouveau/include/nvkm/core/
H A Ddevice.h103 struct nvkm_bios *bios; member in struct:nvkm_device
168 int (*bios )(struct nvkm_device *, int idx, struct nvkm_bios **); member in struct:nvkm_device_chip
/linux-4.4.14/arch/x86/boot/
H A DMakefile34 # probed, and video-bios.o should typically be last.
37 setup-y += video-bios.o
/linux-4.4.14/fs/logfs/
H A Ddev_bdev.c91 /* Block layer cannot split bios :( */ __bdev_writeseg()
181 /* Block layer cannot split bios :( */ do_erase()
/linux-4.4.14/drivers/scsi/aic94xx/
H A Daic94xx_init.c290 return snprintf(buf, PAGE_SIZE, "%d\n", asd_ha->hw_prof.bios.bld); asd_show_dev_bios_build()
325 {"Failed to open bios image file", FAIL_OPEN_BIOS_FILE},
387 asd_printk("Failed to load bios image file %s, error %d\n", asd_store_update_bios()
806 asd_ha->hw_prof.bios.present ? "build " : "not present", asd_pci_probe()
807 asd_ha->hw_prof.bios.bld); asd_pci_probe()
H A Daic94xx_sds.c254 asd_ha->hw_prof.bios.present = 1; asd_get_bios_chim()
255 asd_ha->hw_prof.bios.maj = bc_struct->bios_major; asd_get_bios_chim()
256 asd_ha->hw_prof.bios.min = bc_struct->bios_minor; asd_get_bios_chim()
257 asd_ha->hw_prof.bios.bld = le32_to_cpu(bc_struct->bios_build); asd_get_bios_chim()
259 asd_ha->hw_prof.bios.maj, asd_get_bios_chim()
260 asd_ha->hw_prof.bios.min, asd_get_bios_chim()
261 asd_ha->hw_prof.bios.bld); asd_get_bios_chim()
/linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/core/
H A Dsubdev.c33 [NVKM_SUBDEV_VBIOS ] = "bios",
/linux-4.4.14/arch/mips/loongson64/loongson-3/
H A Dhpet.c196 * hpet address assignation and irq setting should be done in bios.
/linux-4.4.14/drivers/scsi/megaraid/
H A Dmega_common.h131 * @bios_version : bios version
152 // amount of space required to store the bios and firmware version strings
/linux-4.4.14/drivers/pnp/pnpbios/
H A Dbioscalls.c34 * This is the only way to get the bios to return into the kernel code,
35 * because the bios code runs in 16 bit protected mode and therefore can only
/linux-4.4.14/fs/
H A Ddirect-io.c127 unsigned long refcount; /* direct_io_worker() and bios */
386 * bios hold a dio reference between submit_bio and ->end_io.
428 * all bios have been issued so that dio->refcount can only decrease. This
439 * Wait as long as the list is empty and there are bios in flight. bio dio_await_one()
494 * all bios have been issued so that the refcount can only decrease.
495 * This just waits for all bios to make it through dio_bio_complete. IO
1068 * in fact if all the bios race to complete before we get here. In drop_refcount()
1301 * The only time we want to leave bios in flight is when a successful do_blockdev_direct_IO()

Completed in 3313 milliseconds

123