Searched refs:tmu (Results 1 - 42 of 42) sorted by relevance

/linux-4.1.27/drivers/clocksource/
H A Dsh_tmu.c43 struct sh_tmu_device *tmu; member in struct:sh_tmu_channel
93 switch (ch->tmu->model) { sh_tmu_read()
95 return ioread8(ch->tmu->mapbase + 2); sh_tmu_read()
97 return ioread8(ch->tmu->mapbase + 4); sh_tmu_read()
115 switch (ch->tmu->model) { sh_tmu_write()
117 return iowrite8(value, ch->tmu->mapbase + 2); sh_tmu_write()
119 return iowrite8(value, ch->tmu->mapbase + 4); sh_tmu_write()
136 raw_spin_lock_irqsave(&ch->tmu->lock, flags); sh_tmu_start_stop_ch()
145 raw_spin_unlock_irqrestore(&ch->tmu->lock, flags); sh_tmu_start_stop_ch()
153 ret = clk_enable(ch->tmu->clk); __sh_tmu_enable()
155 dev_err(&ch->tmu->pdev->dev, "ch%u: cannot enable clock\n", __sh_tmu_enable()
168 ch->rate = clk_get_rate(ch->tmu->clk) / 4; __sh_tmu_enable()
182 pm_runtime_get_sync(&ch->tmu->pdev->dev); sh_tmu_enable()
183 dev_pm_syscore_device(&ch->tmu->pdev->dev, true); sh_tmu_enable()
197 clk_disable(ch->tmu->clk); __sh_tmu_disable()
210 dev_pm_syscore_device(&ch->tmu->pdev->dev, false); sh_tmu_disable()
211 pm_runtime_put(&ch->tmu->pdev->dev); sh_tmu_disable()
302 pm_genpd_syscore_poweroff(&ch->tmu->pdev->dev); sh_tmu_clocksource_suspend()
314 pm_genpd_syscore_poweron(&ch->tmu->pdev->dev); sh_tmu_clocksource_resume()
334 dev_info(&ch->tmu->pdev->dev, "ch%u: used as clock source\n", sh_tmu_register_clocksource()
380 dev_info(&ch->tmu->pdev->dev, sh_tmu_clock_event_mode()
385 dev_info(&ch->tmu->pdev->dev, sh_tmu_clock_event_mode()
413 pm_genpd_syscore_poweroff(&ced_to_sh_tmu(ced)->tmu->pdev->dev); sh_tmu_clock_event_suspend()
418 pm_genpd_syscore_poweron(&ced_to_sh_tmu(ced)->tmu->pdev->dev); sh_tmu_clock_event_resume()
437 dev_info(&ch->tmu->pdev->dev, "ch%u: used for clock events\n", sh_tmu_register_clockevent()
444 dev_name(&ch->tmu->pdev->dev), ch); sh_tmu_register_clockevent()
446 dev_err(&ch->tmu->pdev->dev, "ch%u: failed to request irq %d\n", sh_tmu_register_clockevent()
456 ch->tmu->has_clockevent = true; sh_tmu_register()
459 ch->tmu->has_clocksource = true; sh_tmu_register()
468 struct sh_tmu_device *tmu) sh_tmu_channel_setup()
474 ch->tmu = tmu; sh_tmu_channel_setup()
477 if (tmu->model == SH_TMU_SH3) sh_tmu_channel_setup()
478 ch->base = tmu->mapbase + 4 + ch->index * 12; sh_tmu_channel_setup()
480 ch->base = tmu->mapbase + 8 + ch->index * 12; sh_tmu_channel_setup()
482 ch->irq = platform_get_irq(tmu->pdev, index); sh_tmu_channel_setup()
484 dev_err(&tmu->pdev->dev, "ch%u: failed to get irq\n", sh_tmu_channel_setup()
492 return sh_tmu_register(ch, dev_name(&tmu->pdev->dev), sh_tmu_channel_setup()
496 static int sh_tmu_map_memory(struct sh_tmu_device *tmu) sh_tmu_map_memory() argument
500 res = platform_get_resource(tmu->pdev, IORESOURCE_MEM, 0); sh_tmu_map_memory()
502 dev_err(&tmu->pdev->dev, "failed to get I/O memory\n"); sh_tmu_map_memory()
506 tmu->mapbase = ioremap_nocache(res->start, resource_size(res)); sh_tmu_map_memory()
507 if (tmu->mapbase == NULL) sh_tmu_map_memory()
513 static int sh_tmu_parse_dt(struct sh_tmu_device *tmu) sh_tmu_parse_dt() argument
515 struct device_node *np = tmu->pdev->dev.of_node; sh_tmu_parse_dt()
517 tmu->model = SH_TMU; sh_tmu_parse_dt()
518 tmu->num_channels = 3; sh_tmu_parse_dt()
520 of_property_read_u32(np, "#renesas,channels", &tmu->num_channels); sh_tmu_parse_dt()
522 if (tmu->num_channels != 2 && tmu->num_channels != 3) { sh_tmu_parse_dt()
523 dev_err(&tmu->pdev->dev, "invalid number of channels %u\n", sh_tmu_parse_dt()
524 tmu->num_channels); sh_tmu_parse_dt()
531 static int sh_tmu_setup(struct sh_tmu_device *tmu, struct platform_device *pdev) sh_tmu_setup() argument
536 tmu->pdev = pdev; sh_tmu_setup()
538 raw_spin_lock_init(&tmu->lock); sh_tmu_setup()
541 ret = sh_tmu_parse_dt(tmu); sh_tmu_setup()
548 tmu->model = id->driver_data; sh_tmu_setup()
549 tmu->num_channels = hweight8(cfg->channels_mask); sh_tmu_setup()
551 dev_err(&tmu->pdev->dev, "missing platform data\n"); sh_tmu_setup()
556 tmu->clk = clk_get(&tmu->pdev->dev, "fck"); sh_tmu_setup()
557 if (IS_ERR(tmu->clk)) { sh_tmu_setup()
558 dev_err(&tmu->pdev->dev, "cannot get clock\n"); sh_tmu_setup()
559 return PTR_ERR(tmu->clk); sh_tmu_setup()
562 ret = clk_prepare(tmu->clk); sh_tmu_setup()
567 ret = sh_tmu_map_memory(tmu); sh_tmu_setup()
569 dev_err(&tmu->pdev->dev, "failed to remap I/O memory\n"); sh_tmu_setup()
574 tmu->channels = kzalloc(sizeof(*tmu->channels) * tmu->num_channels, sh_tmu_setup()
576 if (tmu->channels == NULL) { sh_tmu_setup()
585 for (i = 0; i < tmu->num_channels; ++i) { sh_tmu_setup()
586 ret = sh_tmu_channel_setup(&tmu->channels[i], i, sh_tmu_setup()
587 i == 0, i == 1, tmu); sh_tmu_setup()
592 platform_set_drvdata(pdev, tmu); sh_tmu_setup()
597 kfree(tmu->channels); sh_tmu_setup()
598 iounmap(tmu->mapbase); sh_tmu_setup()
600 clk_unprepare(tmu->clk); sh_tmu_setup()
602 clk_put(tmu->clk); sh_tmu_setup()
608 struct sh_tmu_device *tmu = platform_get_drvdata(pdev); sh_tmu_probe() local
616 if (tmu) { sh_tmu_probe()
621 tmu = kzalloc(sizeof(*tmu), GFP_KERNEL); sh_tmu_probe()
622 if (tmu == NULL) sh_tmu_probe()
625 ret = sh_tmu_setup(tmu, pdev); sh_tmu_probe()
627 kfree(tmu); sh_tmu_probe()
635 if (tmu->has_clockevent || tmu->has_clocksource) sh_tmu_probe()
649 { "sh-tmu", SH_TMU },
650 { "sh-tmu-sh3", SH_TMU_SH3 },
656 { .compatible = "renesas,tmu" },
466 sh_tmu_channel_setup(struct sh_tmu_channel *ch, unsigned int index, bool clockevent, bool clocksource, struct sh_tmu_device *tmu) sh_tmu_channel_setup() argument
/linux-4.1.27/arch/sh/kernel/cpu/
H A Dclock-cpg.c59 clk_add_alias("fck", "sh-tmu-sh3.0", "peripheral_clk", NULL); cpg_clk_init()
60 clk_add_alias("fck", "sh-tmu.0", "peripheral_clk", NULL); cpg_clk_init()
61 clk_add_alias("fck", "sh-tmu.1", "peripheral_clk", NULL); cpg_clk_init()
62 clk_add_alias("fck", "sh-tmu.2", "peripheral_clk", NULL); cpg_clk_init()
/linux-4.1.27/arch/sh/kernel/cpu/sh4a/
H A Dclock-sh7786.c158 CLKDEV_ICK_ID("fck", "sh-tmu.0", &mstp_clks[MSTP008]),
159 CLKDEV_ICK_ID("fck", "sh-tmu.1", &mstp_clks[MSTP009]),
160 CLKDEV_ICK_ID("fck", "sh-tmu.2", &mstp_clks[MSTP010]),
161 CLKDEV_ICK_ID("fck", "sh-tmu.3", &mstp_clks[MSTP011]),
H A Dclock-sh7757.c126 CLKDEV_ICK_ID("fck", "sh-tmu.0", &mstp_clks[MSTP113]),
127 CLKDEV_ICK_ID("fck", "sh-tmu.1", &mstp_clks[MSTP114]),
H A Dclock-shx3.c127 CLKDEV_ICK_ID("fck", "sh-tmu.0", &mstp_clks[MSTP008]),
128 CLKDEV_ICK_ID("fck", "sh-tmu.1", &mstp_clks[MSTP009]),
H A Dclock-sh7785.c149 CLKDEV_ICK_ID("fck", "sh-tmu.0", &mstp_clks[MSTP008]),
150 CLKDEV_ICK_ID("fck", "sh-tmu.1", &mstp_clks[MSTP009]),
H A Dclock-sh7734.c204 CLKDEV_ICK_ID("fck", "sh-tmu.0", &mstp_clks[MSTP016]),
205 CLKDEV_ICK_ID("fck", "sh-tmu.1", &mstp_clks[MSTP015]),
206 CLKDEV_ICK_ID("fck", "sh-tmu.2", &mstp_clks[MSTP014]),
H A Dclock-sh7723.c267 CLKDEV_ICK_ID("fck", "sh-tmu.0", &mstp_clks[HWBLK_TMU0]),
268 CLKDEV_ICK_ID("fck", "sh-tmu.1", &mstp_clks[HWBLK_TMU1]),
H A Dsetup-sh7734.c214 .name = "sh-tmu",
235 .name = "sh-tmu",
256 .name = "sh-tmu",
H A Dsetup-sh7770.c240 .name = "sh-tmu",
261 .name = "sh-tmu",
282 .name = "sh-tmu",
H A Dsetup-sh7786.c189 .name = "sh-tmu",
210 .name = "sh-tmu",
231 .name = "sh-tmu",
252 .name = "sh-tmu",
H A Dsetup-sh7780.c76 .name = "sh-tmu",
97 .name = "sh-tmu",
H A Dsetup-shx3.c114 .name = "sh-tmu",
135 .name = "sh-tmu",
H A Dclock-sh7724.c307 CLKDEV_ICK_ID("fck", "sh-tmu.0", &mstp_clks[HWBLK_TMU0]),
308 CLKDEV_ICK_ID("fck", "sh-tmu.1", &mstp_clks[HWBLK_TMU1]),
H A Dsetup-sh7763.c172 .name = "sh-tmu",
193 .name = "sh-tmu",
H A Dsetup-sh7785.c166 .name = "sh-tmu",
187 .name = "sh-tmu",
H A Dsetup-sh7723.c278 .name = "sh-tmu",
299 .name = "sh-tmu",
H A Dclock-sh7722.c206 CLKDEV_ICK_ID("fck", "sh-tmu.0", &mstp_clks[HWBLK_TMU]),
H A Dsetup-sh7366.c209 .name = "sh-tmu",
H A Dsetup-sh7343.c261 .name = "sh-tmu",
H A Dsetup-sh7722.c446 .name = "sh-tmu",
H A Dsetup-sh7724.c681 .name = "sh-tmu",
702 .name = "sh-tmu",
H A Dsetup-sh7757.c100 .name = "sh-tmu",
/linux-4.1.27/drivers/thermal/samsung/
H A Dexynos_tmu.c147 * @pdata: pointer to the tmu platform/configuration data
156 * @sclk: pointer to the clock structure for accessing the tmu special clk.
922 { .compatible = "samsung,exynos3250-tmu", },
923 { .compatible = "samsung,exynos4210-tmu", },
924 { .compatible = "samsung,exynos4412-tmu", },
925 { .compatible = "samsung,exynos5250-tmu", },
926 { .compatible = "samsung,exynos5260-tmu", },
927 { .compatible = "samsung,exynos5420-tmu", },
928 { .compatible = "samsung,exynos5420-tmu-ext-triminfo", },
929 { .compatible = "samsung,exynos5440-tmu", },
930 { .compatible = "samsung,exynos7-tmu", },
937 if (of_device_is_compatible(np, "samsung,exynos3250-tmu")) exynos_of_get_soc_type()
939 else if (of_device_is_compatible(np, "samsung,exynos4210-tmu")) exynos_of_get_soc_type()
941 else if (of_device_is_compatible(np, "samsung,exynos4412-tmu")) exynos_of_get_soc_type()
943 else if (of_device_is_compatible(np, "samsung,exynos5250-tmu")) exynos_of_get_soc_type()
945 else if (of_device_is_compatible(np, "samsung,exynos5260-tmu")) exynos_of_get_soc_type()
947 else if (of_device_is_compatible(np, "samsung,exynos5420-tmu")) exynos_of_get_soc_type()
950 "samsung,exynos5420-tmu-ext-triminfo")) exynos_of_get_soc_type()
952 else if (of_device_is_compatible(np, "samsung,exynos5440-tmu")) exynos_of_get_soc_type()
954 else if (of_device_is_compatible(np, "samsung,exynos7-tmu")) exynos_of_get_soc_type()
1265 .name = "exynos-tmu",
1278 MODULE_ALIAS("platform:exynos-tmu");
/linux-4.1.27/arch/sh/kernel/cpu/sh5/
H A Dsetup-sh5.c87 .name = "sh-tmu",
/linux-4.1.27/arch/sh/kernel/cpu/sh4/
H A Dsetup-sh4-202.c55 .name = "sh-tmu",
H A Dsetup-sh7750.c96 .name = "sh-tmu",
121 .name = "sh-tmu",
H A Dsetup-sh7760.c241 .name = "sh-tmu",
/linux-4.1.27/arch/sh/kernel/cpu/sh3/
H A Dsetup-sh7705.c157 .name = "sh-tmu-sh3",
H A Dsetup-sh770x.c199 .name = "sh-tmu-sh3",
H A Dsetup-sh7710.c156 .name = "sh-tmu-sh3",
H A Dsetup-sh7720.c186 .name = "sh-tmu-sh3",
/linux-4.1.27/arch/arm/mach-shmobile/
H A Dclock-r8a7778.c242 CLKDEV_ICK_ID("fck", "sh-tmu.0", &mstp_clks[MSTP016]),
244 CLKDEV_ICK_ID("fck", "sh-tmu.1", &mstp_clks[MSTP015]),
H A Dclock-r8a7779.c172 CLKDEV_ICK_ID("fck", "sh-tmu.0", &mstp_clks[MSTP016]), /* TMU0 */
H A Dclock-r8a7740.c602 CLKDEV_ICK_ID("fck", "sh-tmu.1", &mstp_clks[MSTP111]),
604 CLKDEV_ICK_ID("fck", "sh-tmu.0", &mstp_clks[MSTP125]),
H A Dsetup-r8a7740.c272 .name = "sh-tmu",
H A Dsetup-r8a7778.c101 NULL, "sh-tmu", idx, \
H A Dsetup-r8a7779.c233 .name = "sh-tmu",
H A Dsetup-sh73a0.c140 .name = "sh-tmu",
H A Dclock-sh73a0.c700 CLKDEV_ICK_ID("fck", "sh-tmu.0", &mstp_clks[MSTP125]), /* TMU0 */
/linux-4.1.27/drivers/clk/samsung/
H A Dclk-exynos5250.c662 GATE(CLK_TMU, "tmu", "div_aclk66", GATE_IP_PERIS, 21, 0, 0),
H A Dclk-exynos5420.c1103 GATE(CLK_TMU, "tmu", "aclk66_psgen", GATE_IP_PERIS, 21, 0, 0),

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