Searched refs:NVDEV_SUBDEV_MMU (Results 1 – 12 of 12) sorted by relevance
60 device->oclass[NVDEV_SUBDEV_MMU ] = &nv04_mmu_oclass; in nv10_identify()77 device->oclass[NVDEV_SUBDEV_MMU ] = &nv04_mmu_oclass; in nv10_identify()96 device->oclass[NVDEV_SUBDEV_MMU ] = &nv04_mmu_oclass; in nv10_identify()115 device->oclass[NVDEV_SUBDEV_MMU ] = &nv04_mmu_oclass; in nv10_identify()134 device->oclass[NVDEV_SUBDEV_MMU ] = &nv04_mmu_oclass; in nv10_identify()153 device->oclass[NVDEV_SUBDEV_MMU ] = &nv04_mmu_oclass; in nv10_identify()172 device->oclass[NVDEV_SUBDEV_MMU ] = &nv04_mmu_oclass; in nv10_identify()191 device->oclass[NVDEV_SUBDEV_MMU ] = &nv04_mmu_oclass; in nv10_identify()
66 device->oclass[NVDEV_SUBDEV_MMU ] = &nv04_mmu_oclass; in nv40_identify()89 device->oclass[NVDEV_SUBDEV_MMU ] = &nv41_mmu_oclass; in nv40_identify()112 device->oclass[NVDEV_SUBDEV_MMU ] = &nv41_mmu_oclass; in nv40_identify()135 device->oclass[NVDEV_SUBDEV_MMU ] = &nv41_mmu_oclass; in nv40_identify()158 device->oclass[NVDEV_SUBDEV_MMU ] = &nv04_mmu_oclass; in nv40_identify()181 device->oclass[NVDEV_SUBDEV_MMU ] = &nv41_mmu_oclass; in nv40_identify()204 device->oclass[NVDEV_SUBDEV_MMU ] = &nv41_mmu_oclass; in nv40_identify()227 device->oclass[NVDEV_SUBDEV_MMU ] = &nv41_mmu_oclass; in nv40_identify()250 device->oclass[NVDEV_SUBDEV_MMU ] = &nv44_mmu_oclass; in nv40_identify()273 device->oclass[NVDEV_SUBDEV_MMU ] = &nv44_mmu_oclass; in nv40_identify()[all …]
61 device->oclass[NVDEV_SUBDEV_MMU ] = &nv04_mmu_oclass; in nv30_identify()80 device->oclass[NVDEV_SUBDEV_MMU ] = &nv04_mmu_oclass; in nv30_identify()99 device->oclass[NVDEV_SUBDEV_MMU ] = &nv04_mmu_oclass; in nv30_identify()119 device->oclass[NVDEV_SUBDEV_MMU ] = &nv04_mmu_oclass; in nv30_identify()139 device->oclass[NVDEV_SUBDEV_MMU ] = &nv04_mmu_oclass; in nv30_identify()
61 device->oclass[NVDEV_SUBDEV_MMU ] = &nv04_mmu_oclass; in nv20_identify()80 device->oclass[NVDEV_SUBDEV_MMU ] = &nv04_mmu_oclass; in nv20_identify()99 device->oclass[NVDEV_SUBDEV_MMU ] = &nv04_mmu_oclass; in nv20_identify()118 device->oclass[NVDEV_SUBDEV_MMU ] = &nv04_mmu_oclass; in nv20_identify()
79 device->oclass[NVDEV_SUBDEV_MMU ] = &nv50_mmu_oclass; in nv50_identify()105 device->oclass[NVDEV_SUBDEV_MMU ] = &nv50_mmu_oclass; in nv50_identify()134 device->oclass[NVDEV_SUBDEV_MMU ] = &nv50_mmu_oclass; in nv50_identify()163 device->oclass[NVDEV_SUBDEV_MMU ] = &nv50_mmu_oclass; in nv50_identify()192 device->oclass[NVDEV_SUBDEV_MMU ] = &nv50_mmu_oclass; in nv50_identify()221 device->oclass[NVDEV_SUBDEV_MMU ] = &nv50_mmu_oclass; in nv50_identify()250 device->oclass[NVDEV_SUBDEV_MMU ] = &nv50_mmu_oclass; in nv50_identify()279 device->oclass[NVDEV_SUBDEV_MMU ] = &nv50_mmu_oclass; in nv50_identify()308 device->oclass[NVDEV_SUBDEV_MMU ] = &nv50_mmu_oclass; in nv50_identify()337 device->oclass[NVDEV_SUBDEV_MMU ] = &nv50_mmu_oclass; in nv50_identify()[all …]
79 device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; in gf100_identify()112 device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; in gf100_identify()145 device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; in gf100_identify()177 device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; in gf100_identify()210 device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; in gf100_identify()242 device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; in gf100_identify()274 device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; in gf100_identify()307 device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; in gf100_identify()339 device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; in gf100_identify()
79 device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; in gk104_identify()113 device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; in gk104_identify()147 device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; in gk104_identify()175 device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; in gk104_identify()203 device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; in gk104_identify()237 device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; in gk104_identify()271 device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; in gk104_identify()304 device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; in gk104_identify()
58 device->oclass[NVDEV_SUBDEV_MMU ] = &nv04_mmu_oclass; in nv04_identify()76 device->oclass[NVDEV_SUBDEV_MMU ] = &nv04_mmu_oclass; in nv04_identify()
79 device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; in gm100_identify()123 device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; in gm100_identify()164 device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; in gm100_identify()
223 [NVDEV_SUBDEV_MMU] = NV_DEVICE_V0_DISABLE_CORE,
30 NVDEV_SUBDEV_MMU, enumerator
66 return (void *)nvkm_subdev(obj, NVDEV_SUBDEV_MMU); in nvkm_mmu()