1 /*
2 * Copyright 2012 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs
23 */
24 #include "priv.h"
25
26 #include <subdev/bios.h>
27 #include <subdev/bus.h>
28 #include <subdev/gpio.h>
29 #include <subdev/i2c.h>
30 #include <subdev/fuse.h>
31 #include <subdev/clk.h>
32 #include <subdev/therm.h>
33 #include <subdev/mxm.h>
34 #include <subdev/devinit.h>
35 #include <subdev/mc.h>
36 #include <subdev/timer.h>
37 #include <subdev/fb.h>
38 #include <subdev/ltc.h>
39 #include <subdev/ibus.h>
40 #include <subdev/instmem.h>
41 #include <subdev/mmu.h>
42 #include <subdev/bar.h>
43 #include <subdev/pmu.h>
44 #include <subdev/volt.h>
45
46 #include <engine/dmaobj.h>
47 #include <engine/fifo.h>
48 #include <engine/sw.h>
49 #include <engine/gr.h>
50 #include <engine/disp.h>
51 #include <engine/ce.h>
52 #include <engine/bsp.h>
53 #include <engine/msvld.h>
54 #include <engine/mspdec.h>
55 #include <engine/msppp.h>
56 #include <engine/pm.h>
57
58 int
gm100_identify(struct nvkm_device * device)59 gm100_identify(struct nvkm_device *device)
60 {
61 switch (device->chipset) {
62 case 0x117:
63 device->cname = "GM107";
64 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
65 device->oclass[NVDEV_SUBDEV_GPIO ] = gk104_gpio_oclass;
66 device->oclass[NVDEV_SUBDEV_I2C ] = gf110_i2c_oclass;
67 device->oclass[NVDEV_SUBDEV_FUSE ] = &gm107_fuse_oclass;
68 device->oclass[NVDEV_SUBDEV_CLK ] = &gk104_clk_oclass;
69 device->oclass[NVDEV_SUBDEV_THERM ] = &gm107_therm_oclass;
70 device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
71 device->oclass[NVDEV_SUBDEV_DEVINIT] = gm107_devinit_oclass;
72 device->oclass[NVDEV_SUBDEV_MC ] = gk20a_mc_oclass;
73 device->oclass[NVDEV_SUBDEV_BUS ] = gf100_bus_oclass;
74 device->oclass[NVDEV_SUBDEV_TIMER ] = &gk20a_timer_oclass;
75 device->oclass[NVDEV_SUBDEV_FB ] = gm107_fb_oclass;
76 device->oclass[NVDEV_SUBDEV_LTC ] = gm107_ltc_oclass;
77 device->oclass[NVDEV_SUBDEV_IBUS ] = &gk104_ibus_oclass;
78 device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass;
79 device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass;
80 device->oclass[NVDEV_SUBDEV_BAR ] = &gf100_bar_oclass;
81 device->oclass[NVDEV_SUBDEV_PMU ] = gk208_pmu_oclass;
82
83 #if 0
84 device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
85 #endif
86 device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass;
87 device->oclass[NVDEV_ENGINE_FIFO ] = gk208_fifo_oclass;
88 device->oclass[NVDEV_ENGINE_SW ] = gf100_sw_oclass;
89 device->oclass[NVDEV_ENGINE_GR ] = gm107_gr_oclass;
90 device->oclass[NVDEV_ENGINE_DISP ] = gm107_disp_oclass;
91 device->oclass[NVDEV_ENGINE_CE0 ] = &gk104_ce0_oclass;
92 #if 0
93 device->oclass[NVDEV_ENGINE_CE1 ] = &gk104_ce1_oclass;
94 #endif
95 device->oclass[NVDEV_ENGINE_CE2 ] = &gk104_ce2_oclass;
96 #if 0
97 device->oclass[NVDEV_ENGINE_MSVLD ] = &gk104_msvld_oclass;
98 device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass;
99 device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass;
100 #endif
101 break;
102 case 0x124:
103 device->cname = "GM204";
104 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
105 device->oclass[NVDEV_SUBDEV_GPIO ] = gk104_gpio_oclass;
106 device->oclass[NVDEV_SUBDEV_I2C ] = gm204_i2c_oclass;
107 device->oclass[NVDEV_SUBDEV_FUSE ] = &gm107_fuse_oclass;
108 #if 0
109 /* looks to be some non-trivial changes */
110 device->oclass[NVDEV_SUBDEV_CLK ] = &gk104_clk_oclass;
111 /* priv ring says no to 0x10eb14 writes */
112 device->oclass[NVDEV_SUBDEV_THERM ] = &gm107_therm_oclass;
113 #endif
114 device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
115 device->oclass[NVDEV_SUBDEV_DEVINIT] = gm204_devinit_oclass;
116 device->oclass[NVDEV_SUBDEV_MC ] = gk20a_mc_oclass;
117 device->oclass[NVDEV_SUBDEV_BUS ] = gf100_bus_oclass;
118 device->oclass[NVDEV_SUBDEV_TIMER ] = &gk20a_timer_oclass;
119 device->oclass[NVDEV_SUBDEV_FB ] = gm107_fb_oclass;
120 device->oclass[NVDEV_SUBDEV_LTC ] = gm107_ltc_oclass;
121 device->oclass[NVDEV_SUBDEV_IBUS ] = &gk104_ibus_oclass;
122 device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass;
123 device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass;
124 device->oclass[NVDEV_SUBDEV_BAR ] = &gf100_bar_oclass;
125 device->oclass[NVDEV_SUBDEV_PMU ] = gk208_pmu_oclass;
126 #if 0
127 device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
128 #endif
129 device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass;
130 device->oclass[NVDEV_ENGINE_FIFO ] = gm204_fifo_oclass;
131 device->oclass[NVDEV_ENGINE_SW ] = gf100_sw_oclass;
132 device->oclass[NVDEV_ENGINE_GR ] = gm204_gr_oclass;
133 device->oclass[NVDEV_ENGINE_DISP ] = gm204_disp_oclass;
134 device->oclass[NVDEV_ENGINE_CE0 ] = &gm204_ce0_oclass;
135 device->oclass[NVDEV_ENGINE_CE1 ] = &gm204_ce1_oclass;
136 device->oclass[NVDEV_ENGINE_CE2 ] = &gm204_ce2_oclass;
137 #if 0
138 device->oclass[NVDEV_ENGINE_MSVLD ] = &gk104_msvld_oclass;
139 device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass;
140 device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass;
141 #endif
142 break;
143 case 0x126:
144 device->cname = "GM206";
145 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
146 device->oclass[NVDEV_SUBDEV_GPIO ] = gk104_gpio_oclass;
147 device->oclass[NVDEV_SUBDEV_I2C ] = gm204_i2c_oclass;
148 device->oclass[NVDEV_SUBDEV_FUSE ] = &gm107_fuse_oclass;
149 #if 0
150 /* looks to be some non-trivial changes */
151 device->oclass[NVDEV_SUBDEV_CLK ] = &gk104_clk_oclass;
152 /* priv ring says no to 0x10eb14 writes */
153 device->oclass[NVDEV_SUBDEV_THERM ] = &gm107_therm_oclass;
154 #endif
155 device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
156 device->oclass[NVDEV_SUBDEV_DEVINIT] = gm204_devinit_oclass;
157 device->oclass[NVDEV_SUBDEV_MC ] = gk20a_mc_oclass;
158 device->oclass[NVDEV_SUBDEV_BUS ] = gf100_bus_oclass;
159 device->oclass[NVDEV_SUBDEV_TIMER ] = &gk20a_timer_oclass;
160 device->oclass[NVDEV_SUBDEV_FB ] = gm107_fb_oclass;
161 device->oclass[NVDEV_SUBDEV_LTC ] = gm107_ltc_oclass;
162 device->oclass[NVDEV_SUBDEV_IBUS ] = &gk104_ibus_oclass;
163 device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass;
164 device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass;
165 device->oclass[NVDEV_SUBDEV_BAR ] = &gf100_bar_oclass;
166 device->oclass[NVDEV_SUBDEV_PMU ] = gk208_pmu_oclass;
167 #if 0
168 device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
169 #endif
170 device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass;
171 device->oclass[NVDEV_ENGINE_FIFO ] = gm204_fifo_oclass;
172 device->oclass[NVDEV_ENGINE_SW ] = gf100_sw_oclass;
173 device->oclass[NVDEV_ENGINE_GR ] = gm206_gr_oclass;
174 device->oclass[NVDEV_ENGINE_DISP ] = gm204_disp_oclass;
175 device->oclass[NVDEV_ENGINE_CE0 ] = &gm204_ce0_oclass;
176 device->oclass[NVDEV_ENGINE_CE1 ] = &gm204_ce1_oclass;
177 device->oclass[NVDEV_ENGINE_CE2 ] = &gm204_ce2_oclass;
178 #if 0
179 device->oclass[NVDEV_ENGINE_MSVLD ] = &gk104_msvld_oclass;
180 device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass;
181 device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass;
182 #endif
183 break;
184 default:
185 nv_fatal(device, "unknown Maxwell chipset\n");
186 return -EINVAL;
187 }
188
189 return 0;
190 }
191