| /linux-4.4.14/drivers/clk/ux500/ |
| H A D | clk.h | 19 const char *parent_name,
25 const char *parent_name,
31 const char *parent_name,
37 const char *parent_name,
42 const char *parent_name,
48 const char *parent_name,
53 const char *parent_name,
58 const char *parent_name,
65 const char *parent_name,
74 const char *parent_name,
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| H A D | clk-prcc.c | 95 const char *parent_name, clk_reg_prcc()
126 clk_prcc_init.parent_names = (parent_name ? &parent_name : NULL); clk_reg_prcc()
127 clk_prcc_init.num_parents = (parent_name ? 1 : 0); clk_reg_prcc()
145 const char *parent_name, clk_reg_prcc_pclk()
150 return clk_reg_prcc(name, parent_name, phy_base, cg_sel, flags, clk_reg_prcc_pclk()
155 const char *parent_name, clk_reg_prcc_kclk()
160 return clk_reg_prcc(name, parent_name, phy_base, cg_sel, flags, clk_reg_prcc_kclk()
94 clk_reg_prcc(const char *name, const char *parent_name, resource_size_t phy_base, u32 cg_sel, unsigned long flags, struct clk_ops *clk_prcc_ops) clk_reg_prcc() argument
144 clk_reg_prcc_pclk(const char *name, const char *parent_name, resource_size_t phy_base, u32 cg_sel, unsigned long flags) clk_reg_prcc_pclk() argument
154 clk_reg_prcc_kclk(const char *name, const char *parent_name, resource_size_t phy_base, u32 cg_sel, unsigned long flags) clk_reg_prcc_kclk() argument
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| H A D | clk-prcmu.c | 246 const char *parent_name, clk_reg_prcmu()
278 clk_prcmu_init.parent_names = (parent_name ? &parent_name : NULL); clk_reg_prcmu()
279 clk_prcmu_init.num_parents = (parent_name ? 1 : 0); clk_reg_prcmu()
295 const char *parent_name, clk_reg_prcmu_scalable()
300 return clk_reg_prcmu(name, parent_name, cg_sel, rate, flags, clk_reg_prcmu_scalable()
305 const char *parent_name, clk_reg_prcmu_gate()
309 return clk_reg_prcmu(name, parent_name, cg_sel, 0, flags, clk_reg_prcmu_gate()
314 const char *parent_name, clk_reg_prcmu_scalable_rate()
319 return clk_reg_prcmu(name, parent_name, cg_sel, rate, flags, clk_reg_prcmu_scalable_rate()
324 const char *parent_name, clk_reg_prcmu_rate()
328 return clk_reg_prcmu(name, parent_name, cg_sel, 0, flags, clk_reg_prcmu_rate()
333 const char *parent_name, clk_reg_prcmu_opp_gate()
337 return clk_reg_prcmu(name, parent_name, cg_sel, 0, flags, clk_reg_prcmu_opp_gate()
342 const char *parent_name, clk_reg_prcmu_opp_volt_scalable()
347 return clk_reg_prcmu(name, parent_name, cg_sel, rate, flags, clk_reg_prcmu_opp_volt_scalable()
245 clk_reg_prcmu(const char *name, const char *parent_name, u8 cg_sel, unsigned long rate, unsigned long flags, struct clk_ops *clk_prcmu_ops) clk_reg_prcmu() argument
294 clk_reg_prcmu_scalable(const char *name, const char *parent_name, u8 cg_sel, unsigned long rate, unsigned long flags) clk_reg_prcmu_scalable() argument
304 clk_reg_prcmu_gate(const char *name, const char *parent_name, u8 cg_sel, unsigned long flags) clk_reg_prcmu_gate() argument
313 clk_reg_prcmu_scalable_rate(const char *name, const char *parent_name, u8 cg_sel, unsigned long rate, unsigned long flags) clk_reg_prcmu_scalable_rate() argument
323 clk_reg_prcmu_rate(const char *name, const char *parent_name, u8 cg_sel, unsigned long flags) clk_reg_prcmu_rate() argument
332 clk_reg_prcmu_opp_gate(const char *name, const char *parent_name, u8 cg_sel, unsigned long flags) clk_reg_prcmu_opp_gate() argument
341 clk_reg_prcmu_opp_volt_scalable(const char *name, const char *parent_name, u8 cg_sel, unsigned long rate, unsigned long flags) clk_reg_prcmu_opp_volt_scalable() argument
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| H A D | clk-sysctrl.c | 181 const char *parent_name, clk_reg_sysctrl_gate()
188 const char **parent_names = (parent_name ? &parent_name : NULL); clk_reg_sysctrl_gate()
189 u8 num_parents = (parent_name ? 1 : 0); clk_reg_sysctrl_gate()
198 const char *parent_name, clk_reg_sysctrl_gate_fixed_rate()
206 const char **parent_names = (parent_name ? &parent_name : NULL); clk_reg_sysctrl_gate_fixed_rate()
207 u8 num_parents = (parent_name ? 1 : 0); clk_reg_sysctrl_gate_fixed_rate()
179 clk_reg_sysctrl_gate(struct device *dev, const char *name, const char *parent_name, u16 reg_sel, u8 reg_mask, u8 reg_bits, unsigned long enable_delay_us, unsigned long flags) clk_reg_sysctrl_gate() argument
196 clk_reg_sysctrl_gate_fixed_rate(struct device *dev, const char *name, const char *parent_name, u16 reg_sel, u8 reg_mask, u8 reg_bits, unsigned long rate, unsigned long enable_delay_us, unsigned long flags) clk_reg_sysctrl_gate_fixed_rate() argument
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| /linux-4.4.14/drivers/clk/mxs/ |
| H A D | clk.h | 27 struct clk *mxs_clk_pll(const char *name, const char *parent_name,
30 struct clk *mxs_clk_ref(const char *name, const char *parent_name,
33 struct clk *mxs_clk_div(const char *name, const char *parent_name,
36 struct clk *mxs_clk_frac(const char *name, const char *parent_name,
45 const char *parent_name, void __iomem *reg, u8 shift) mxs_clk_gate()
47 return clk_register_gate(NULL, name, parent_name, CLK_SET_RATE_PARENT, mxs_clk_gate()
61 const char *parent_name, unsigned int mult, unsigned int div) mxs_clk_fixed_factor()
63 return clk_register_fixed_factor(NULL, name, parent_name, mxs_clk_fixed_factor()
44 mxs_clk_gate(const char *name, const char *parent_name, void __iomem *reg, u8 shift) mxs_clk_gate() argument
60 mxs_clk_fixed_factor(const char *name, const char *parent_name, unsigned int mult, unsigned int div) mxs_clk_fixed_factor() argument
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| H A D | clk-div.c | 76 struct clk *mxs_clk_div(const char *name, const char *parent_name, mxs_clk_div() argument
90 init.parent_names = (parent_name ? &parent_name: NULL); mxs_clk_div()
91 init.num_parents = (parent_name ? 1 : 0); mxs_clk_div()
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| H A D | clk-pll.c | 88 struct clk *mxs_clk_pll(const char *name, const char *parent_name, mxs_clk_pll() argument
102 init.parent_names = (parent_name ? &parent_name: NULL); mxs_clk_pll()
103 init.num_parents = (parent_name ? 1 : 0); mxs_clk_pll()
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| H A D | clk-frac.c | 116 struct clk *mxs_clk_frac(const char *name, const char *parent_name, mxs_clk_frac() argument
130 init.parent_names = (parent_name ? &parent_name: NULL); mxs_clk_frac()
131 init.num_parents = (parent_name ? 1 : 0); mxs_clk_frac()
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| H A D | clk-ref.c | 127 struct clk *mxs_clk_ref(const char *name, const char *parent_name, mxs_clk_ref() argument
141 init.parent_names = (parent_name ? &parent_name: NULL); mxs_clk_ref()
142 init.num_parents = (parent_name ? 1 : 0); mxs_clk_ref()
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| /linux-4.4.14/drivers/clk/shmobile/ |
| H A D | clk-r8a73a4.c | 67 const char *parent_name; r8a73a4_cpg_register_clock() local
78 parent_name = of_clk_get_parent_name(np, 0); r8a73a4_cpg_register_clock()
81 parent_name = of_clk_get_parent_name(np, 0); r8a73a4_cpg_register_clock()
85 parent_name = of_clk_get_parent_name(np, 1); r8a73a4_cpg_register_clock()
88 parent_name = of_clk_get_parent_name(np, 1); r8a73a4_cpg_register_clock()
100 parent_name = "main"; r8a73a4_cpg_register_clock()
107 parent_name = "main"; r8a73a4_cpg_register_clock()
131 parent_name = "main"; r8a73a4_cpg_register_clock()
135 parent_name = "extal2"; r8a73a4_cpg_register_clock()
139 parent_name = "extal2"; r8a73a4_cpg_register_clock()
143 parent_name = "main"; r8a73a4_cpg_register_clock()
146 parent_name = "extal2"; r8a73a4_cpg_register_clock()
158 parent_name = "pll0"; r8a73a4_cpg_register_clock()
176 parent_name = "pll1"; r8a73a4_cpg_register_clock()
183 return clk_register_fixed_factor(NULL, name, parent_name, 0, r8a73a4_cpg_register_clock()
186 return clk_register_divider_table(NULL, name, parent_name, 0, r8a73a4_cpg_register_clock()
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| H A D | clk-r8a7740.c | 69 const char *parent_name; r8a7740_cpg_register_clock() local
78 parent_name = of_clk_get_parent_name(np, 0); r8a7740_cpg_register_clock()
83 parent_name = of_clk_get_parent_name(np, 0); r8a7740_cpg_register_clock()
88 parent_name = of_clk_get_parent_name(np, 2); r8a7740_cpg_register_clock()
92 parent_name = of_clk_get_parent_name(np, 0); r8a7740_cpg_register_clock()
102 parent_name = "system"; r8a7740_cpg_register_clock()
106 parent_name = "system"; r8a7740_cpg_register_clock()
111 parent_name = "system"; r8a7740_cpg_register_clock()
117 parent_name = of_clk_get_parent_name(np, 1); r8a7740_cpg_register_clock()
119 parent_name = "system"; r8a7740_cpg_register_clock()
126 parent_name = "pllc1"; r8a7740_cpg_register_clock()
138 return clk_register_fixed_factor(NULL, name, parent_name, 0, r8a7740_cpg_register_clock()
141 return clk_register_divider_table(NULL, name, parent_name, 0, r8a7740_cpg_register_clock()
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| H A D | clk-rcar-gen2.c | 140 static const char *parent_name = "pll0"; cpg_z_clk_register() local
152 init.parent_names = &parent_name; cpg_z_clk_register()
169 const char *parent_name = of_clk_get_parent_name(np, 1); cpg_rcan_clk_register() local
192 clk = clk_register_composite(NULL, "rcan", &parent_name, 1, NULL, NULL, cpg_rcan_clk_register()
212 const char *parent_name = "pll1"; cpg_adsp_clk_register() local
237 clk = clk_register_composite(NULL, "adsp", &parent_name, 1, NULL, NULL, cpg_adsp_clk_register()
306 const char *parent_name; rcar_gen2_cpg_register_clock() local
312 parent_name = of_clk_get_parent_name(np, 0); rcar_gen2_cpg_register_clock()
321 parent_name = "main"; rcar_gen2_cpg_register_clock()
324 parent_name = "main"; rcar_gen2_cpg_register_clock()
327 parent_name = "main"; rcar_gen2_cpg_register_clock()
330 parent_name = "pll1"; rcar_gen2_cpg_register_clock()
333 parent_name = "pll1_div2"; rcar_gen2_cpg_register_clock()
337 parent_name = "pll1"; rcar_gen2_cpg_register_clock()
341 parent_name = "pll1"; rcar_gen2_cpg_register_clock()
345 parent_name = "pll1"; rcar_gen2_cpg_register_clock()
359 return clk_register_fixed_factor(NULL, name, parent_name, 0, rcar_gen2_cpg_register_clock()
362 return clk_register_divider_table(NULL, name, parent_name, 0, rcar_gen2_cpg_register_clock()
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| H A D | clk-sh73a0.c | 82 const char *parent_name; sh73a0_cpg_register_clock() local
90 parent_name = of_clk_get_parent_name(np, parent_idx >> 1); sh73a0_cpg_register_clock()
96 parent_name = "main"; sh73a0_cpg_register_clock()
125 parent_name = phy_no ? "dsi1pck" : "dsi0pck"; sh73a0_cpg_register_clock()
132 parent_name = "pll0"; sh73a0_cpg_register_clock()
142 parent_name = c->parent; sh73a0_cpg_register_clock()
155 return clk_register_fixed_factor(NULL, name, parent_name, 0, sh73a0_cpg_register_clock()
158 return clk_register_divider_table(NULL, name, parent_name, 0, sh73a0_cpg_register_clock()
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| H A D | clk-emev2.c | 81 const char *parent_name = of_clk_get_parent_name(np, 0); emev2_smu_clkdiv_init() local
86 clk = clk_register_divider(NULL, np->name, parent_name, 0, emev2_smu_clkdiv_init()
99 const char *parent_name = of_clk_get_parent_name(np, 0); emev2_smu_gclk_init() local
104 clk = clk_register_gate(NULL, np->name, parent_name, 0, emev2_smu_gclk_init()
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| H A D | clk-r8a7779.c | 98 const char *parent_name = "plla"; r8a7779_cpg_register_clock() local
103 parent_name = of_clk_get_parent_name(np, 0); r8a7779_cpg_register_clock()
120 return clk_register_fixed_factor(NULL, name, parent_name, 0, mult, div); r8a7779_cpg_register_clock()
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| H A D | clk-mstp.c | 131 cpg_mstp_clock_register(const char *name, const char *parent_name, cpg_mstp_clock_register() argument
147 init.parent_names = &parent_name; cpg_mstp_clock_register()
200 const char *parent_name; cpg_mstp_clocks_init() local
211 parent_name = of_clk_get_parent_name(np, i); cpg_mstp_clocks_init()
213 if (parent_name == NULL || ret < 0) cpg_mstp_clocks_init()
222 clks[clkidx] = cpg_mstp_clock_register(name, parent_name, cpg_mstp_clocks_init()
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| H A D | clk-rz.c | 42 const char *parent_name = of_clk_get_parent_name(np, cpg_mode); rz_cpg_register_clock() local
46 return clk_register_fixed_factor(NULL, name, parent_name, 0, mult, 1); rz_cpg_register_clock()
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| /linux-4.4.14/drivers/clk/h8300/ |
| H A D | clk-div.c | 19 const char *parent_name; h8300_div_clk_setup() local
39 parent_name = of_clk_get_parent_name(node, 0); h8300_div_clk_setup()
41 clk = clk_register_divider(NULL, clk_name, parent_name, h8300_div_clk_setup()
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| H A D | clk-h8s2678.c | 89 const char *parent_name; h8s2678_pll_clk_setup() local
116 parent_name = of_clk_get_parent_name(node, 0); h8s2678_pll_clk_setup()
120 init.parent_names = &parent_name; h8s2678_pll_clk_setup()
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| /linux-4.4.14/drivers/clk/sunxi/ |
| H A D | clk-a10-codec.c | 26 const char *clk_name = node->name, *parent_name; sun4i_codec_clk_setup() local
34 parent_name = of_clk_get_parent_name(node, 0); sun4i_codec_clk_setup()
36 clk = clk_register_gate(NULL, clk_name, parent_name, sun4i_codec_clk_setup()
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| /linux-4.4.14/drivers/clk/ |
| H A D | clk-moxart.c | 25 const char *parent_name; moxart_of_pll_clk_init() local
28 parent_name = of_clk_get_parent_name(node, 0); moxart_of_pll_clk_init()
45 clk = clk_register_fixed_factor(NULL, name, parent_name, 0, mul, 1); moxart_of_pll_clk_init()
64 const char *parent_name; moxart_of_apb_clk_init() local
67 parent_name = of_clk_get_parent_name(node, 0); moxart_of_apb_clk_init()
88 clk = clk_register_fixed_factor(NULL, name, parent_name, 0, 1, div); moxart_of_apb_clk_init()
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| H A D | clk-fixed-rate.c | 54 * @parent_name: name of clock's parent
60 const char *name, const char *parent_name, unsigned long flags, clk_register_fixed_rate_with_accuracy()
75 init.parent_names = (parent_name ? &parent_name: NULL); clk_register_fixed_rate_with_accuracy()
76 init.num_parents = (parent_name ? 1 : 0); clk_register_fixed_rate_with_accuracy()
96 * @parent_name: name of clock's parent
101 const char *parent_name, unsigned long flags, clk_register_fixed_rate()
104 return clk_register_fixed_rate_with_accuracy(dev, name, parent_name, clk_register_fixed_rate()
59 clk_register_fixed_rate_with_accuracy(struct device *dev, const char *name, const char *parent_name, unsigned long flags, unsigned long fixed_rate, unsigned long fixed_accuracy) clk_register_fixed_rate_with_accuracy() argument
100 clk_register_fixed_rate(struct device *dev, const char *name, const char *parent_name, unsigned long flags, unsigned long fixed_rate) clk_register_fixed_rate() argument
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| H A D | clk-fixed-factor.c | 74 const char *parent_name, unsigned long flags, clk_register_fixed_factor()
93 init.parent_names = &parent_name; clk_register_fixed_factor()
113 const char *parent_name; of_fixed_factor_clk_setup() local
129 parent_name = of_clk_get_parent_name(node, 0); of_fixed_factor_clk_setup()
131 clk = clk_register_fixed_factor(NULL, clk_name, parent_name, 0, of_fixed_factor_clk_setup()
73 clk_register_fixed_factor(struct device *dev, const char *name, const char *parent_name, unsigned long flags, unsigned int mult, unsigned int div) clk_register_fixed_factor() argument
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| H A D | clk-nomadik.c | 258 const char *parent_name, u32 id) pll_clk_register()
277 init.parent_names = (parent_name ? &parent_name : NULL); pll_clk_register()
278 init.num_parents = (parent_name ? 1 : 0); pll_clk_register()
350 const char *parent_name, u8 id) src_clk_register()
369 init.parent_names = (parent_name ? &parent_name : NULL); src_clk_register()
370 init.num_parents = (parent_name ? 1 : 0); src_clk_register()
513 const char *parent_name; of_nomadik_pll_setup() local
524 parent_name = of_clk_get_parent_name(np, 0); of_nomadik_pll_setup()
525 clk = pll_clk_register(NULL, clk_name, parent_name, pll_id); of_nomadik_pll_setup()
536 const char *parent_name; of_nomadik_hclk_setup() local
541 parent_name = of_clk_get_parent_name(np, 0); of_nomadik_hclk_setup()
545 clk = clk_register_divider(NULL, clk_name, parent_name, of_nomadik_hclk_setup()
560 const char *parent_name; of_nomadik_src_clk_setup() local
571 parent_name = of_clk_get_parent_name(np, 0); of_nomadik_src_clk_setup()
572 clk = src_clk_register(NULL, clk_name, parent_name, clk_id); of_nomadik_src_clk_setup()
257 pll_clk_register(struct device *dev, const char *name, const char *parent_name, u32 id) pll_clk_register() argument
349 src_clk_register(struct device *dev, const char *name, const char *parent_name, u8 id) src_clk_register() argument
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| H A D | clk-fractional-divider.c | 122 const char *name, const char *parent_name, unsigned long flags, clk_register_fractional_divider()
137 init.parent_names = parent_name ? &parent_name : NULL; clk_register_fractional_divider()
138 init.num_parents = parent_name ? 1 : 0; clk_register_fractional_divider()
121 clk_register_fractional_divider(struct device *dev, const char *name, const char *parent_name, unsigned long flags, void __iomem *reg, u8 mshift, u8 mwidth, u8 nshift, u8 nwidth, u8 clk_divider_flags, spinlock_t *lock) clk_register_fractional_divider() argument
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| H A D | clk-ls1x.c | 53 const char *parent_name, clk_register_pll()
70 init.parent_names = (parent_name ? &parent_name : NULL); clk_register_pll()
71 init.num_parents = (parent_name ? 1 : 0); clk_register_pll()
51 clk_register_pll(struct device *dev, const char *name, const char *parent_name, unsigned long flags) clk_register_pll() argument
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| H A D | clk-gate.c | 118 * @parent_name: name of this clock's parent
126 const char *parent_name, unsigned long flags, clk_register_gate()
149 init.parent_names = (parent_name ? &parent_name: NULL); clk_register_gate()
150 init.num_parents = (parent_name ? 1 : 0); clk_register_gate()
125 clk_register_gate(struct device *dev, const char *name, const char *parent_name, unsigned long flags, void __iomem *reg, u8 bit_idx, u8 clk_gate_flags, spinlock_t *lock) clk_register_gate() argument
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| H A D | clk-nspire.c | 74 const char *parent_name; nspire_ahbdiv_setup() local
86 parent_name = of_clk_get_parent_name(node, 0); nspire_ahbdiv_setup()
88 clk = clk_register_fixed_factor(NULL, clk_name, parent_name, 0, nspire_ahbdiv_setup()
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| H A D | clk-divider.c | 432 const char *parent_name, unsigned long flags, _register_divider()
459 init.parent_names = (parent_name ? &parent_name: NULL); _register_divider()
460 init.num_parents = (parent_name ? 1 : 0); _register_divider()
484 * @parent_name: name of clock's parent
493 const char *parent_name, unsigned long flags, clk_register_divider()
497 return _register_divider(dev, name, parent_name, flags, reg, shift, clk_register_divider()
507 * @parent_name: name of clock's parent
517 const char *parent_name, unsigned long flags, clk_register_divider_table()
522 return _register_divider(dev, name, parent_name, flags, reg, shift, clk_register_divider_table()
431 _register_divider(struct device *dev, const char *name, const char *parent_name, unsigned long flags, void __iomem *reg, u8 shift, u8 width, u8 clk_divider_flags, const struct clk_div_table *table, spinlock_t *lock) _register_divider() argument
492 clk_register_divider(struct device *dev, const char *name, const char *parent_name, unsigned long flags, void __iomem *reg, u8 shift, u8 width, u8 clk_divider_flags, spinlock_t *lock) clk_register_divider() argument
516 clk_register_divider_table(struct device *dev, const char *name, const char *parent_name, unsigned long flags, void __iomem *reg, u8 shift, u8 width, u8 clk_divider_flags, const struct clk_div_table *table, spinlock_t *lock) clk_register_divider_table() argument
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| H A D | clk-asm9260.c | 78 const char *parent_name; member in struct:asm9260_div_clk
85 const char *parent_name; member in struct:asm9260_gate_data
306 gd->parent_name, gd->flags | CLK_SET_RATE_PARENT, asm9260_acc_init()
315 dc->parent_name, CLK_SET_RATE_PARENT, asm9260_acc_init()
325 gd->parent_name, gd->flags, base + gd->reg, asm9260_acc_init()
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| H A D | clk-gpio.c | 164 * @parent_name: name of this clock's parent
170 const char *parent_name, unsigned gpio, bool active_low, clk_register_gpio_gate()
174 (parent_name ? &parent_name : NULL), clk_register_gpio_gate()
175 (parent_name ? 1 : 0), gpio, active_low, flags, clk_register_gpio_gate()
169 clk_register_gpio_gate(struct device *dev, const char *name, const char *parent_name, unsigned gpio, bool active_low, unsigned long flags) clk_register_gpio_gate() argument
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| H A D | clk-xgene.c | 126 const char *name, const char *parent_name, xgene_register_clk_pll()
144 init.parent_names = parent_name ? &parent_name : NULL; xgene_register_clk_pll()
145 init.num_parents = parent_name ? 1 : 0; xgene_register_clk_pll()
399 const char *name, const char *parent_name, xgene_register_clk()
417 init.parent_names = parent_name ? &parent_name : NULL; xgene_register_clk()
418 init.num_parents = parent_name ? 1 : 0; xgene_register_clk()
125 xgene_register_clk_pll(struct device *dev, const char *name, const char *parent_name, unsigned long flags, void __iomem *reg, u32 pll_offset, u32 type, spinlock_t *lock) xgene_register_clk_pll() argument
398 xgene_register_clk(struct device *dev, const char *name, const char *parent_name, struct xgene_dev_parameters *parameters, spinlock_t *lock) xgene_register_clk() argument
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| H A D | clk-highbank.c | 52 char *parent_name; member in struct:hb_clk
281 const char *parent_name; hb_clk_init() local
305 parent_name = of_clk_get_parent_name(node, 0); hb_clk_init()
306 init.parent_names = &parent_name; hb_clk_init()
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| H A D | clk-u300.c | 694 const char *parent_name, unsigned long flags, syscon_clk_register()
713 init.parent_names = (parent_name ? &parent_name : NULL); syscon_clk_register()
714 init.num_parents = (parent_name ? 1 : 0); syscon_clk_register()
873 const char *parent_name; of_u300_syscon_clk_init() local
890 parent_name = of_clk_get_parent_name(np, 0); of_u300_syscon_clk_init()
915 clk_name, parent_name, of_u300_syscon_clk_init()
1116 const char *parent_name, bool is_mspro) mclk_clk_register()
1131 init.parent_names = (parent_name ? &parent_name : NULL); mclk_clk_register()
1132 init.num_parents = (parent_name ? 1 : 0); mclk_clk_register()
1147 const char *parent_name; of_u300_syscon_mclk_init() local
1149 parent_name = of_clk_get_parent_name(np, 0); of_u300_syscon_mclk_init()
1150 clk = mclk_clk_register(NULL, clk_name, parent_name, false); of_u300_syscon_mclk_init()
693 syscon_clk_register(struct device *dev, const char *name, const char *parent_name, unsigned long flags, bool hw_ctrld, void __iomem *res_reg, u8 res_bit, void __iomem *en_reg, u8 en_bit, u16 clk_val) syscon_clk_register() argument
1115 mclk_clk_register(struct device *dev, const char *name, const char *parent_name, bool is_mspro) mclk_clk_register() argument
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| H A D | clk-axi-clkgen.c | 488 const char *parent_name; axi_clkgen_probe() local
511 parent_name = of_clk_get_parent_name(pdev->dev.of_node, 0); axi_clkgen_probe()
512 if (!parent_name) axi_clkgen_probe()
522 init.parent_names = &parent_name; axi_clkgen_probe()
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| H A D | clk-stm32f4.c | 39 const char *parent_name; member in struct:stm32f4_gate_data
206 const char *parent_name, clk_register_apb_mul()
223 init.parent_names = &parent_name; clk_register_apb_mul()
364 NULL, gd->name, gd->parent_name, gd->flags, stm32f4_rcc_init()
205 clk_register_apb_mul(struct device *dev, const char *name, const char *parent_name, unsigned long flags, u8 bit_idx) clk_register_apb_mul() argument
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| H A D | clk-cdce925.c | 572 const char *parent_name; cdce925_probe() local
596 parent_name = of_clk_get_parent_name(node, 0); cdce925_probe()
597 if (!parent_name) { cdce925_probe()
601 dev_dbg(&client->dev, "parent is: %s\n", parent_name); cdce925_probe()
614 init.parent_names = &parent_name; cdce925_probe()
615 init.num_parents = parent_name ? 1 : 0; cdce925_probe()
660 init.parent_names = &parent_name; /* Mux Y1 to input */ cdce925_probe()
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| H A D | clk-vt8500.c | 238 const char *parent_name; vtwm_device_clk_init() local
298 parent_name = of_clk_get_parent_name(node, 0); vtwm_device_clk_init()
299 init.parent_names = &parent_name; vtwm_device_clk_init()
656 const char *parent_name; vtwm_pll_clk_init() local
680 parent_name = of_clk_get_parent_name(node, 0); vtwm_pll_clk_init()
681 init.parent_names = &parent_name; vtwm_pll_clk_init()
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| H A D | clk-qoriq.c | 885 const char *parent_name; sysclk_from_parent() local
892 parent_name = __clk_get_name(clk); sysclk_from_parent()
893 clk = clk_register_fixed_factor(NULL, name, parent_name, sysclk_from_parent()
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| /linux-4.4.14/drivers/clk/mmp/ |
| H A D | clk.h | 35 const char *parent_name, unsigned long flags,
121 const char *parent_name, unsigned long flags,
128 const char *parent_name, unsigned long flags);
130 const char *parent_name, void __iomem *base,
133 const char *parent_name, void __iomem *base, u32 enable_mask,
145 const char *parent_name; member in struct:mmp_param_fixed_rate_clk
156 const char *parent_name; member in struct:mmp_param_fixed_factor_clk
168 const char *parent_name; member in struct:mmp_param_general_gate_clk
182 const char *parent_name; member in struct:mmp_param_gate_clk
198 const char **parent_name; member in struct:mmp_param_mux_clk
214 const char *parent_name; member in struct:mmp_param_div_clk
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| H A D | clk-apmu.c | 68 struct clk *mmp_clk_register_apmu(const char *name, const char *parent_name, mmp_clk_register_apmu() argument
82 init.parent_names = (parent_name ? &parent_name : NULL); mmp_clk_register_apmu()
83 init.num_parents = (parent_name ? 1 : 0); mmp_clk_register_apmu()
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| H A D | clk.c | 34 clks[i].parent_name, mmp_register_fixed_rate_clks()
56 clks[i].parent_name, mmp_register_fixed_factor_clks()
78 clks[i].parent_name, mmp_register_general_gate_clks()
104 clks[i].parent_name, mmp_register_gate_clks()
132 clks[i].parent_name, mmp_register_mux_clks()
160 clks[i].parent_name, mmp_register_div_clks()
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| H A D | clk-apbc.c | 122 struct clk *mmp_clk_register_apbc(const char *name, const char *parent_name, mmp_clk_register_apbc() argument
137 init.parent_names = (parent_name ? &parent_name : NULL); mmp_clk_register_apbc()
138 init.num_parents = (parent_name ? 1 : 0); mmp_clk_register_apbc()
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| H A D | clk-gate.c | 96 const char *parent_name, unsigned long flags, mmp_clk_register_gate()
114 init.parent_names = (parent_name ? &parent_name : NULL); mmp_clk_register_gate()
115 init.num_parents = (parent_name ? 1 : 0); mmp_clk_register_gate()
95 mmp_clk_register_gate(struct device *dev, const char *name, const char *parent_name, unsigned long flags, void __iomem *reg, u32 mask, u32 val_enable, u32 val_disable, unsigned int gate_flags, spinlock_t *lock) mmp_clk_register_gate() argument
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| H A D | clk-frac.c | 159 struct clk *mmp_clk_register_factor(const char *name, const char *parent_name, mmp_clk_register_factor() argument
191 init.parent_names = &parent_name; mmp_clk_register_factor()
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| /linux-4.4.14/drivers/clk/at91/ |
| H A D | clk-plldiv.c | 84 const char *parent_name) at91_clk_register_plldiv()
96 init.parent_names = parent_name ? &parent_name : NULL; at91_clk_register_plldiv()
97 init.num_parents = parent_name ? 1 : 0; at91_clk_register_plldiv()
115 const char *parent_name; of_at91_clk_plldiv_setup() local
118 parent_name = of_clk_get_parent_name(np, 0); of_at91_clk_plldiv_setup()
122 clk = at91_clk_register_plldiv(pmc, name, parent_name); of_at91_clk_plldiv_setup()
83 at91_clk_register_plldiv(struct at91_pmc *pmc, const char *name, const char *parent_name) at91_clk_register_plldiv() argument
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| H A D | clk-utmi.c | 97 const char *name, const char *parent_name) at91_clk_register_utmi()
110 init.parent_names = parent_name ? &parent_name : NULL; at91_clk_register_utmi()
111 init.num_parents = parent_name ? 1 : 0; at91_clk_register_utmi()
140 const char *parent_name; of_at91_clk_utmi_setup() local
143 parent_name = of_clk_get_parent_name(np, 0); of_at91_clk_utmi_setup()
151 clk = at91_clk_register_utmi(pmc, irq, name, parent_name); of_at91_clk_utmi_setup()
96 at91_clk_register_utmi(struct at91_pmc *pmc, unsigned int irq, const char *name, const char *parent_name) at91_clk_register_utmi() argument
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| H A D | clk-h32mx.c | 100 const char *parent_name; of_sama5d4_clk_h32mx_setup() local
107 parent_name = of_clk_get_parent_name(np, 0); of_sama5d4_clk_h32mx_setup()
111 init.parent_names = parent_name ? &parent_name : NULL; of_sama5d4_clk_h32mx_setup()
112 init.num_parents = parent_name ? 1 : 0; of_sama5d4_clk_h32mx_setup()
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| H A D | clk-peripheral.c | 105 const char *parent_name, u32 id) at91_clk_register_peripheral()
111 if (!pmc || !name || !parent_name || id > PERIPHERAL_ID_MAX) at91_clk_register_peripheral()
120 init.parent_names = (parent_name ? &parent_name : NULL); at91_clk_register_peripheral()
121 init.num_parents = (parent_name ? 1 : 0); at91_clk_register_peripheral()
322 const char *parent_name, u32 id, at91_clk_register_sam9x5_peripheral()
329 if (!pmc || !name || !parent_name) at91_clk_register_sam9x5_peripheral()
338 init.parent_names = (parent_name ? &parent_name : NULL); at91_clk_register_sam9x5_peripheral()
339 init.num_parents = (parent_name ? 1 : 0); at91_clk_register_sam9x5_peripheral()
364 const char *parent_name; of_at91_clk_periph_setup() local
368 parent_name = of_clk_get_parent_name(np, 0); of_at91_clk_periph_setup()
369 if (!parent_name) of_at91_clk_periph_setup()
388 parent_name, id); for_each_child_of_node()
397 parent_name, for_each_child_of_node()
104 at91_clk_register_peripheral(struct at91_pmc *pmc, const char *name, const char *parent_name, u32 id) at91_clk_register_peripheral() argument
321 at91_clk_register_sam9x5_peripheral(struct at91_pmc *pmc, const char *name, const char *parent_name, u32 id, const struct clk_range *range) at91_clk_register_sam9x5_peripheral() argument
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| H A D | clk-usb.c | 230 const char *parent_name) at91sam9n12_clk_register_usb()
242 init.parent_names = &parent_name; at91sam9n12_clk_register_usb()
345 const char *parent_name, const u32 *divisors) at91rm9200_clk_register_usb()
357 init.parent_names = &parent_name; at91rm9200_clk_register_usb()
399 const char *parent_name; of_at91sam9n12_clk_usb_setup() local
402 parent_name = of_clk_get_parent_name(np, 0); of_at91sam9n12_clk_usb_setup()
403 if (!parent_name) of_at91sam9n12_clk_usb_setup()
408 clk = at91sam9n12_clk_register_usb(pmc, name, parent_name); of_at91sam9n12_clk_usb_setup()
419 const char *parent_name; of_at91rm9200_clk_usb_setup() local
423 parent_name = of_clk_get_parent_name(np, 0); of_at91rm9200_clk_usb_setup()
424 if (!parent_name) of_at91rm9200_clk_usb_setup()
433 clk = at91rm9200_clk_register_usb(pmc, name, parent_name, divisors); of_at91rm9200_clk_usb_setup()
229 at91sam9n12_clk_register_usb(struct at91_pmc *pmc, const char *name, const char *parent_name) at91sam9n12_clk_register_usb() argument
344 at91rm9200_clk_register_usb(struct at91_pmc *pmc, const char *name, const char *parent_name, const u32 *divisors) at91rm9200_clk_register_usb() argument
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| H A D | clk-system.c | 104 const char *parent_name, u8 id, int irq) at91_clk_register_system()
111 if (!parent_name || id > SYSTEM_MAX_ID) at91_clk_register_system()
120 init.parent_names = &parent_name; at91_clk_register_system()
158 const char *parent_name; of_at91_clk_sys_setup() local
174 parent_name = of_clk_get_parent_name(sysclknp, 0); for_each_child_of_node()
176 clk = at91_clk_register_system(pmc, name, parent_name, id, irq); for_each_child_of_node()
103 at91_clk_register_system(struct at91_pmc *pmc, const char *name, const char *parent_name, u8 id, int irq) at91_clk_register_system() argument
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| H A D | clk-main.c | 145 const char *parent_name, at91_clk_register_main_osc()
153 if (!pmc || !irq || !name || !parent_name) at91_clk_register_main_osc()
162 init.parent_names = &parent_name; at91_clk_register_main_osc()
200 const char *parent_name; of_at91rm9200_clk_main_osc_setup() local
205 parent_name = of_clk_get_parent_name(np, 0); of_at91rm9200_clk_main_osc_setup()
211 clk = at91_clk_register_main_osc(pmc, irq, name, parent_name, bypass); of_at91rm9200_clk_main_osc_setup()
432 const char *parent_name) at91_clk_register_rm9200_main()
441 if (!parent_name) at91_clk_register_rm9200_main()
450 init.parent_names = &parent_name; at91_clk_register_rm9200_main()
468 const char *parent_name; of_at91rm9200_clk_main_setup() local
471 parent_name = of_clk_get_parent_name(np, 0); of_at91rm9200_clk_main_setup()
474 clk = at91_clk_register_rm9200_main(pmc, name, parent_name); of_at91rm9200_clk_main_setup()
142 at91_clk_register_main_osc(struct at91_pmc *pmc, unsigned int irq, const char *name, const char *parent_name, bool bypass) at91_clk_register_main_osc() argument
430 at91_clk_register_rm9200_main(struct at91_pmc *pmc, const char *name, const char *parent_name) at91_clk_register_rm9200_main() argument
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| H A D | clk-slow.c | 126 const char *parent_name, at91_clk_register_slow_osc()
134 if (!sckcr || !name || !parent_name) at91_clk_register_slow_osc()
143 init.parent_names = &parent_name; at91_clk_register_slow_osc()
166 const char *parent_name; of_at91sam9x5_clk_slow_osc_setup() local
171 parent_name = of_clk_get_parent_name(np, 0); of_at91sam9x5_clk_slow_osc_setup()
176 clk = at91_clk_register_slow_osc(sckcr, name, parent_name, startup, of_at91sam9x5_clk_slow_osc_setup()
124 at91_clk_register_slow_osc(void __iomem *sckcr, const char *name, const char *parent_name, unsigned long startup, bool bypass) at91_clk_register_slow_osc() argument
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| H A D | clk-pll.c | 312 const char *parent_name, u8 id, at91_clk_register_pll()
332 init.parent_names = &parent_name; at91_clk_register_pll()
492 const char *parent_name; of_at91_clk_pll_setup() local
499 parent_name = of_clk_get_parent_name(np, 0); of_at91_clk_pll_setup()
511 clk = at91_clk_register_pll(pmc, irq, name, parent_name, id, layout, of_at91_clk_pll_setup()
311 at91_clk_register_pll(struct at91_pmc *pmc, unsigned int irq, const char *name, const char *parent_name, u8 id, const struct clk_pll_layout *layout, const struct clk_pll_characteristics *characteristics) at91_clk_register_pll() argument
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| /linux-4.4.14/drivers/clk/hisilicon/ |
| H A D | clk.h | 41 const char *parent_name; member in struct:hisi_fixed_rate_clock
49 const char *parent_name; member in struct:hisi_fixed_factor_clock
72 const char *parent_name; member in struct:hisi_divider_clock
85 const char *parent_name; member in struct:hi6220_divider_clock
97 const char *parent_name; member in struct:hisi_gate_clock
110 const char *parent_name, unsigned long flags, void __iomem *reg,
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| H A D | clkdivider-hi6220.c | 103 const char *parent_name, unsigned long flags, void __iomem *reg, hi6220_register_clkdiv()
136 init.parent_names = parent_name ? &parent_name : NULL; hi6220_register_clkdiv()
137 init.num_parents = parent_name ? 1 : 0; hi6220_register_clkdiv()
102 hi6220_register_clkdiv(struct device *dev, const char *name, const char *parent_name, unsigned long flags, void __iomem *reg, u8 shift, u8 width, u32 mask_bit, spinlock_t *lock) hi6220_register_clkdiv() argument
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| H A D | clkgate-separated.c | 98 const char *parent_name, hisi_register_clkgate_sep()
116 init.parent_names = (parent_name ? &parent_name : NULL); hisi_register_clkgate_sep()
117 init.num_parents = (parent_name ? 1 : 0); hisi_register_clkgate_sep()
97 hisi_register_clkgate_sep(struct device *dev, const char *name, const char *parent_name, unsigned long flags, void __iomem *reg, u8 bit_idx, u8 clk_gate_flags, spinlock_t *lock) hisi_register_clkgate_sep() argument
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| H A D | clk.c | 83 clks[i].parent_name, hisi_clk_register_fixed_rate()
104 clks[i].parent_name, hisi_clk_register_fixed_factor()
154 clks[i].parent_name, hisi_clk_register_divider()
183 clks[i].parent_name, hisi_clk_register_gate()
211 clks[i].parent_name, hisi_clk_register_gate_sep()
239 clks[i].parent_name, hi6220_clk_register_divider()
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| H A D | clk-hix5hd2.c | 137 const char *parent_name; member in struct:hix5hd2_complex_clock
279 (clks[i].parent_name ? &clks[i].parent_name : NULL); hix5hd2_clk_register_complex()
280 init.num_parents = (clks[i].parent_name ? 1 : 0); hix5hd2_clk_register_complex()
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| H A D | clk-hi3620.c | 236 const char *parent_name; member in struct:hisi_mmc_clock
441 init.parent_names = (mmc_clk->parent_name ? &mmc_clk->parent_name : NULL); hisi_register_clk_mmc()
442 init.num_parents = (mmc_clk->parent_name ? 1 : 0); hisi_register_clk_mmc()
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| /linux-4.4.14/drivers/clk/zte/ |
| H A D | clk.h | 29 struct clk *clk_register_zx_pll(const char *name, const char *parent_name,
39 const char * const parent_name,
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| H A D | clk.c | 145 struct clk *clk_register_zx_pll(const char *name, const char *parent_name, clk_register_zx_pll() argument
161 init.parent_names = parent_name ? &parent_name : NULL; clk_register_zx_pll()
162 init.num_parents = parent_name ? 1 : 0; clk_register_zx_pll()
283 const char * const parent_name, clk_register_zx_audio()
298 init.parent_names = parent_name ? &parent_name : NULL; clk_register_zx_audio()
299 init.num_parents = parent_name ? 1 : 0; clk_register_zx_audio()
282 clk_register_zx_audio(const char *name, const char * const parent_name, unsigned long flags, void __iomem *reg_base) clk_register_zx_audio() argument
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| /linux-4.4.14/drivers/clk/berlin/ |
| H A D | berlin2-avpll.h | 29 const char *parent_name, u8 vco_flags, unsigned long flags);
33 u8 index, const char *parent_name, u8 ch_flags,
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| H A D | berlin2-pll.h | 35 const char *parent_name, unsigned long flags);
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| H A D | common.h | 24 const char *parent_name; member in struct:berlin2_gate_data
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| H A D | berlin2-pll.c | 90 const char *parent_name, unsigned long flags) berlin2_pll_register()
105 init.parent_names = &parent_name; berlin2_pll_register()
88 berlin2_pll_register(const struct berlin2_pll_map *map, void __iomem *base, const char *name, const char *parent_name, unsigned long flags) berlin2_pll_register() argument
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| H A D | berlin2-avpll.c | 192 const char *name, const char *parent_name, berlin2_avpll_vco_register()
207 init.parent_names = &parent_name; berlin2_avpll_vco_register()
368 const char *name, u8 index, const char *parent_name, berlin2_avpll_channel_register()
388 init.parent_names = &parent_name; berlin2_avpll_channel_register()
191 berlin2_avpll_vco_register(void __iomem *base, const char *name, const char *parent_name, u8 vco_flags, unsigned long flags) berlin2_avpll_vco_register() argument
367 berlin2_avpll_channel_register(void __iomem *base, const char *name, u8 index, const char *parent_name, u8 ch_flags, unsigned long flags) berlin2_avpll_channel_register() argument
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| H A D | bg2q.c | 355 gd->parent_name, gd->flags, gbase + REG_CLKENABLE, berlin2q_clock_setup()
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| H A D | bg2.c | 661 gd->parent_name, gd->flags, gbase + REG_CLKENABLE, berlin2_clock_setup()
|
| /linux-4.4.14/drivers/clk/versatile/ |
| H A D | clk-icst.h | 19 const char *parent_name,
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| H A D | clk-versatile.c | 63 const char *parent_name; cm_osc_setup() local
81 parent_name = of_clk_get_parent_name(np, 0); cm_osc_setup()
82 clk = icst_clk_register(NULL, desc, clk_name, parent_name, cm_base); cm_osc_setup()
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| H A D | clk-icst.c | 128 const char *parent_name, icst_clk_register()
152 init.parent_names = (parent_name ? &parent_name : NULL); icst_clk_register()
153 init.num_parents = (parent_name ? 1 : 0); icst_clk_register()
125 icst_clk_register(struct device *dev, const struct clk_icst_desc *desc, const char *name, const char *parent_name, void __iomem *base) icst_clk_register() argument
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| /linux-4.4.14/drivers/clk/ti/ |
| H A D | fixed-factor.c | 40 const char *parent_name; of_ti_fixed_factor_clk_setup() local
57 parent_name = of_clk_get_parent_name(node, 0); of_ti_fixed_factor_clk_setup()
59 clk = clk_register_fixed_factor(NULL, clk_name, parent_name, flags, of_ti_fixed_factor_clk_setup()
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| H A D | interface.c | 36 const char *parent_name, _register_interface()
59 init.parent_names = &parent_name; _register_interface()
108 const char *parent_name; _of_ti_interface_clk_setup() local
120 parent_name = of_clk_get_parent_name(node, 0); _of_ti_interface_clk_setup()
121 if (!parent_name) { _of_ti_interface_clk_setup()
126 clk = _register_interface(NULL, node->name, parent_name, reg, _of_ti_interface_clk_setup()
35 _register_interface(struct device *dev, const char *name, const char *parent_name, void __iomem *reg, u8 bit_idx, const struct clk_hw_omap_ops *ops) _register_interface() argument
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| H A D | gate.c | 96 const char *parent_name, unsigned long flags, _register_gate()
120 init.parent_names = &parent_name; _register_gate()
219 const char *parent_name; _of_ti_gate_clk_setup() local
240 parent_name = of_clk_get_parent_name(node, 0); _of_ti_gate_clk_setup()
248 clk = _register_gate(NULL, node->name, parent_name, flags, reg, _of_ti_gate_clk_setup()
95 _register_gate(struct device *dev, const char *name, const char *parent_name, unsigned long flags, void __iomem *reg, u8 bit_idx, u8 clk_gate_flags, const struct clk_ops *ops, const struct clk_hw_omap_ops *hw_ops) _register_gate() argument
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| H A D | divider.c | 249 const char *parent_name, _register_divider()
275 init.parent_names = (parent_name ? &parent_name : NULL); _register_divider()
276 init.num_parents = (parent_name ? 1 : 0); _register_divider()
563 const char *parent_name; of_ti_divider_clk_setup() local
571 parent_name = of_clk_get_parent_name(node, 0); of_ti_divider_clk_setup()
577 clk = _register_divider(NULL, node->name, parent_name, flags, reg, of_ti_divider_clk_setup()
248 _register_divider(struct device *dev, const char *name, const char *parent_name, unsigned long flags, void __iomem *reg, u8 shift, u8 width, u8 clk_divider_flags, const struct clk_div_table *table) _register_divider() argument
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| H A D | apll.c | 337 const char *parent_name; of_omap2_apll_setup() local
359 parent_name = of_clk_get_parent_name(node, 0); of_omap2_apll_setup()
360 init->parent_names = &parent_name; of_omap2_apll_setup()
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| H A D | dpll.c | 297 const char *parent_name; _register_dpll_x2() local
299 parent_name = of_clk_get_parent_name(node, 0); _register_dpll_x2()
300 if (!parent_name) { _register_dpll_x2()
314 init.parent_names = &parent_name; _register_dpll_x2()
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| H A D | fapll.c | 535 const char *parent_name[2]; ti_fapll_setup() local
562 of_clk_parent_fill(node, parent_name, 2); ti_fapll_setup()
563 init->parent_names = parent_name; ti_fapll_setup()
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| /linux-4.4.14/drivers/clk/keystone/ |
| H A D | pll.c | 126 const char *parent_name, clk_register_pll()
140 init.parent_names = (parent_name ? &parent_name : NULL); clk_register_pll()
141 init.num_parents = (parent_name ? 1 : 0); clk_register_pll()
165 const char *parent_name; _of_pll_clk_init() local
175 parent_name = of_clk_get_parent_name(node, 0); _of_pll_clk_init()
215 clk = clk_register_pll(NULL, node->name, parent_name, pll_data); _of_pll_clk_init()
254 const char *parent_name; of_pll_div_clk_init() local
267 parent_name = of_clk_get_parent_name(node, 0); of_pll_div_clk_init()
268 if (!parent_name) { of_pll_div_clk_init()
283 clk = clk_register_divider(NULL, clk_name, parent_name, 0, reg, shift, of_pll_div_clk_init()
124 clk_register_pll(struct device *dev, const char *name, const char *parent_name, struct clk_pll_data *pll_data) clk_register_pll() argument
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| H A D | gate.c | 161 * @parent_name: name of clock's parent
167 const char *parent_name, clk_register_psc()
182 init.parent_names = (parent_name ? &parent_name : NULL); clk_register_psc()
183 init.num_parents = (parent_name ? 1 : 0); clk_register_psc()
204 const char *parent_name; of_psc_clk_init() local
236 parent_name = of_clk_get_parent_name(node, 0); of_psc_clk_init()
237 if (!parent_name) { of_psc_clk_init()
242 clk = clk_register_psc(NULL, clk_name, parent_name, data, lock); of_psc_clk_init()
165 clk_register_psc(struct device *dev, const char *name, const char *parent_name, struct clk_psc_data *psc_data, spinlock_t *lock) clk_register_psc() argument
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| /linux-4.4.14/drivers/clk/tegra/ |
| H A D | clk-divider.c | 150 const char *parent_name, void __iomem *reg, tegra_clk_register_divider()
168 init.parent_names = parent_name ? &parent_name : NULL; tegra_clk_register_divider()
169 init.num_parents = parent_name ? 1 : 0; tegra_clk_register_divider()
194 struct clk *tegra_clk_register_mc(const char *name, const char *parent_name, tegra_clk_register_mc() argument
197 return clk_register_divider_table(NULL, name, parent_name, 0, reg, tegra_clk_register_mc()
149 tegra_clk_register_divider(const char *name, const char *parent_name, void __iomem *reg, unsigned long flags, u8 clk_divider_flags, u8 shift, u8 width, u8 frac_width, spinlock_t *lock) tegra_clk_register_divider() argument
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| H A D | clk-pll-out.c | 90 const char *parent_name, void __iomem *reg, u8 enb_bit_idx, tegra_clk_register_pll_out()
104 init.parent_names = (parent_name ? &parent_name : NULL); tegra_clk_register_pll_out()
105 init.num_parents = (parent_name ? 1 : 0); tegra_clk_register_pll_out()
89 tegra_clk_register_pll_out(const char *name, const char *parent_name, void __iomem *reg, u8 enb_bit_idx, u8 rst_bit_idx, unsigned long flags, u8 pll_out_flags, spinlock_t *lock) tegra_clk_register_pll_out() argument
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| H A D | clk-periph-gate.c | 131 const char *parent_name, u8 gate_flags, void __iomem *clk_base, tegra_clk_register_periph_gate()
151 init.parent_names = parent_name ? &parent_name : NULL; tegra_clk_register_periph_gate()
152 init.num_parents = parent_name ? 1 : 0; tegra_clk_register_periph_gate()
130 tegra_clk_register_periph_gate(const char *name, const char *parent_name, u8 gate_flags, void __iomem *clk_base, unsigned long flags, int clk_num, int *enable_refcnt) tegra_clk_register_periph_gate() argument
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| H A D | clk-pll.c | 1437 const char *name, const char *parent_name, unsigned long flags, _tegra_clk_register_pll()
1445 init.parent_names = (parent_name ? &parent_name : NULL); _tegra_clk_register_pll()
1446 init.num_parents = (parent_name ? 1 : 0); _tegra_clk_register_pll()
1454 struct clk *tegra_clk_register_pll(const char *name, const char *parent_name, tegra_clk_register_pll() argument
1468 clk = _tegra_clk_register_pll(pll, name, parent_name, flags, tegra_clk_register_pll()
1485 struct clk *tegra_clk_register_plle(const char *name, const char *parent_name, tegra_clk_register_plle() argument
1503 clk = _tegra_clk_register_pll(pll, name, parent_name, flags, tegra_clk_register_plle()
1558 struct clk *tegra_clk_register_pllxc(const char *name, const char *parent_name, tegra_clk_register_pllxc() argument
1570 parent = __clk_lookup(parent_name); tegra_clk_register_pllxc()
1573 parent_name, name); tegra_clk_register_pllxc()
1603 clk = _tegra_clk_register_pll(pll, name, parent_name, flags, tegra_clk_register_pllxc()
1611 struct clk *tegra_clk_register_pllre(const char *name, const char *parent_name, tegra_clk_register_pllre() argument
1649 clk = _tegra_clk_register_pll(pll, name, parent_name, flags, tegra_clk_register_pllre()
1657 struct clk *tegra_clk_register_pllm(const char *name, const char *parent_name, tegra_clk_register_pllm() argument
1670 parent = __clk_lookup(parent_name); tegra_clk_register_pllm()
1673 parent_name, name); tegra_clk_register_pllm()
1688 clk = _tegra_clk_register_pll(pll, name, parent_name, flags, tegra_clk_register_pllm()
1696 struct clk *tegra_clk_register_pllc(const char *name, const char *parent_name, tegra_clk_register_pllc() argument
1711 parent = __clk_lookup(parent_name); tegra_clk_register_pllc()
1714 parent_name, name); tegra_clk_register_pllc()
1762 clk = _tegra_clk_register_pll(pll, name, parent_name, flags, tegra_clk_register_pllc()
1771 const char *parent_name, tegra_clk_register_plle_tegra114()
1801 clk = _tegra_clk_register_pll(pll, name, parent_name, flags, tegra_clk_register_plle_tegra114()
1820 struct clk *tegra_clk_register_pllss(const char *name, const char *parent_name, tegra_clk_register_pllss() argument
1835 parent = __clk_lookup(parent_name); tegra_clk_register_pllss()
1838 parent_name, name); tegra_clk_register_pllss()
1889 clk = _tegra_clk_register_pll(pll, name, parent_name, flags, tegra_clk_register_pllss()
1436 _tegra_clk_register_pll(struct tegra_clk_pll *pll, const char *name, const char *parent_name, unsigned long flags, const struct clk_ops *ops) _tegra_clk_register_pll() argument
1770 tegra_clk_register_plle_tegra114(const char *name, const char *parent_name, void __iomem *clk_base, unsigned long flags, struct tegra_clk_pll_params *pll_params, spinlock_t *lock) tegra_clk_register_plle_tegra114() argument
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| H A D | clk.h | 86 const char *parent_name, void __iomem *reg,
89 struct clk *tegra_clk_register_mc(const char *name, const char *parent_name,
290 struct clk *tegra_clk_register_pll(const char *name, const char *parent_name,
295 struct clk *tegra_clk_register_plle(const char *name, const char *parent_name,
300 struct clk *tegra_clk_register_pllxc(const char *name, const char *parent_name,
306 struct clk *tegra_clk_register_pllm(const char *name, const char *parent_name,
312 struct clk *tegra_clk_register_pllc(const char *name, const char *parent_name,
318 struct clk *tegra_clk_register_pllre(const char *name, const char *parent_name,
325 const char *parent_name,
330 struct clk *tegra_clk_register_pllss(const char *name, const char *parent_name,
358 const char *parent_name, void __iomem *reg, u8 enb_bit_idx,
427 const char *parent_name, u8 gate_flags, void __iomem *clk_base,
501 const char *parent_name; member in union:tegra_periph_init_data::__anon3791
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| H A D | clk-tegra-periph.c | 218 .p.parent_name = _parent_name, \
628 data->p.parent_name, data->periph.gate.flags, gate_clk_init()
|
| /linux-4.4.14/drivers/clk/socfpga/ |
| H A D | clk-periph.c | 67 const char *parent_name[SOCFPGA_MAX_PARENTS]; __socfpga_periph_init() local
102 init.num_parents = of_clk_parent_fill(node, parent_name, __socfpga_periph_init()
104 init.parent_names = parent_name; __socfpga_periph_init()
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| H A D | clk.h | 51 char *parent_name; member in struct:socfpga_gate_clk
62 char *parent_name; member in struct:socfpga_periph_clk
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| H A D | clk-periph-a10.c | 77 const char *parent_name; __socfpga_periph_init() local
112 parent_name = of_clk_get_parent_name(node, 0); __socfpga_periph_init()
114 init.parent_names = &parent_name; __socfpga_periph_init()
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| H A D | clk-pll-a10.c | 84 const char *parent_name[SOCFGPA_MAX_PARENTS]; __socfpga_pll_init() local
107 while (i < SOCFGPA_MAX_PARENTS && (parent_name[i] = __socfpga_pll_init()
111 init.parent_names = parent_name; __socfpga_pll_init()
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| H A D | clk-pll.c | 90 const char *parent_name[SOCFPGA_MAX_PARENTS]; __socfpga_pll_init() local
112 init.num_parents = of_clk_parent_fill(node, parent_name, SOCFPGA_MAX_PARENTS); __socfpga_pll_init()
113 init.parent_names = parent_name; __socfpga_pll_init()
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| H A D | clk-gate-a10.c | 115 const char *parent_name[SOCFPGA_MAX_PARENTS]; __socfpga_gate_init() local
170 while (i < SOCFPGA_MAX_PARENTS && (parent_name[i] = __socfpga_gate_init()
174 init.parent_names = parent_name; __socfpga_gate_init()
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| H A D | clk-gate.c | 189 const char *parent_name[SOCFPGA_MAX_PARENTS]; __socfpga_gate_init() local
236 init.num_parents = of_clk_parent_fill(node, parent_name, SOCFPGA_MAX_PARENTS); __socfpga_gate_init()
237 init.parent_names = parent_name; __socfpga_gate_init()
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| /linux-4.4.14/drivers/clk/imx/ |
| H A D | clk-gate2.c | 127 const char *parent_name, unsigned long flags, clk_register_gate2()
150 init.parent_names = parent_name ? &parent_name : NULL; clk_register_gate2()
151 init.num_parents = parent_name ? 1 : 0; clk_register_gate2()
126 clk_register_gate2(struct device *dev, const char *name, const char *parent_name, unsigned long flags, void __iomem *reg, u8 bit_idx, u8 clk_gate2_flags, spinlock_t *lock, unsigned int *share_count) clk_register_gate2() argument
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| H A D | clk.h | 40 const char *parent_name, void __iomem *base, u32 div_mask);
43 const char *parent_name, unsigned long flags,
69 struct clk *imx_clk_pfd(const char *name, const char *parent_name,
72 struct clk *imx_clk_busy_divider(const char *name, const char *parent_name,
146 struct clk *imx_clk_cpu(const char *name, const char *parent_name,
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| H A D | clk-cpu.c | 78 struct clk *imx_clk_cpu(const char *name, const char *parent_name, imx_clk_cpu() argument
98 init.parent_names = &parent_name; imx_clk_cpu()
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| H A D | clk-pfd.c | 130 struct clk *imx_clk_pfd(const char *name, const char *parent_name, imx_clk_pfd() argument
147 init.parent_names = &parent_name; imx_clk_pfd()
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| H A D | clk-busy.c | 81 struct clk *imx_clk_busy_divider(const char *name, const char *parent_name, imx_clk_busy_divider() argument
105 init.parent_names = &parent_name; imx_clk_busy_divider()
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| H A D | clk-imx6sl.c | 220 /* type name parent_name base div_mask */ imx6sl_clocks_init()
270 /* dev name parent_name flags reg shift width div: flags, div_table lock */ imx6sl_clocks_init()
277 /* name parent_name reg idx */ imx6sl_clocks_init()
286 /* name parent_name mult div */ imx6sl_clocks_init()
332 /* name parent_name reg shift width */ imx6sl_clocks_init()
367 /* name parent_name reg shift width busy: reg, shift */ imx6sl_clocks_init()
372 /* name parent_name reg shift */ imx6sl_clocks_init()
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| H A D | clk-pllv3.c | 286 const char *parent_name, void __iomem *base, imx_clk_pllv3()
327 init.parent_names = &parent_name; imx_clk_pllv3()
285 imx_clk_pllv3(enum imx_pllv3_type type, const char *name, const char *parent_name, void __iomem *base, u32 div_mask) imx_clk_pllv3() argument
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| H A D | clk-imx6q.c | 175 /* type name parent_name base div_mask */ imx6q_clocks_init()
250 /* name parent_name reg idx */ imx6q_clocks_init()
259 /* name parent_name mult div */ imx6q_clocks_init()
333 /* name parent_name reg shift width */ imx6q_clocks_init()
379 /* name parent_name reg shift width busy: reg, shift */ imx6q_clocks_init()
386 /* name parent_name reg shift */ imx6q_clocks_init()
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| H A D | clk-imx6sx.c | 174 /* type name parent_name base div_mask */ imx6sx_clocks_init()
242 /* name parent_name reg idx */ imx6sx_clocks_init()
252 /* name parent_name mult div */ imx6sx_clocks_init()
324 /* name parent_name reg shift width */ imx6sx_clocks_init()
374 /* name parent_name reg shift width busy: reg, shift */ imx6sx_clocks_init()
380 /* name parent_name reg shift */ imx6sx_clocks_init()
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| H A D | clk-imx6ul.c | 183 /* name parent_name reg idx */ imx6ul_clocks_init()
211 /* name parent_name mult div */ imx6ul_clocks_init()
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| /linux-4.4.14/drivers/clk/mediatek/ |
| H A D | clk-gate.c | 102 const char *parent_name, mtk_clk_register_gate()
120 init.parent_names = parent_name ? &parent_name : NULL; mtk_clk_register_gate()
121 init.num_parents = parent_name ? 1 : 0; mtk_clk_register_gate()
100 mtk_clk_register_gate( const char *name, const char *parent_name, struct regmap *regmap, int set_ofs, int clr_ofs, int sta_ofs, u8 bit, const struct clk_ops *ops) mtk_clk_register_gate() argument
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| H A D | clk-gate.h | 42 const char *parent_name,
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| H A D | clk-mtk.h | 49 const char *parent_name; member in struct:mtk_fixed_factor
57 .parent_name = _parent, \
142 const char *parent_name; member in struct:mtk_gate
184 const char *parent_name, void __iomem *reg);
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| H A D | clk-apmixed.c | 81 const char *parent_name, void __iomem *reg) mtk_clk_register_ref2usb_tx()
96 init.parent_names = &parent_name; mtk_clk_register_ref2usb_tx()
80 mtk_clk_register_ref2usb_tx(const char *name, const char *parent_name, void __iomem *reg) mtk_clk_register_ref2usb_tx() argument
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| H A D | clk-mtk.c | 84 clk = clk_register_fixed_factor(NULL, ff->name, ff->parent_name, mtk_clk_register_factors()
119 clk = mtk_clk_register_gate(gate->name, gate->parent_name, mtk_clk_register_gates()
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| H A D | clk-mt8173.c | 610 .parent_name = _parent, \
649 .parent_name = _parent, \
658 .parent_name = _parent, \
725 .parent_name = _parent, \
756 .parent_name = _parent, \
765 .parent_name = _parent, \
843 .parent_name = _parent, \
852 .parent_name = _parent, \
866 .parent_name = _parent, \
882 .parent_name = _parent, \
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| H A D | clk-pll.c | 288 const char *parent_name = "clk26m"; mtk_clk_register_pll() local
305 init.parent_names = &parent_name; mtk_clk_register_pll()
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| H A D | clk-mt8135.c | 414 .parent_name = _parent, \
451 .parent_name = _parent, \
460 .parent_name = _parent, \
|
| /linux-4.4.14/drivers/clk/spear/ |
| H A D | clk.h | 114 const char *parent_name, unsigned long flags, void __iomem *reg,
117 struct clk *clk_register_frac(const char *name, const char *parent_name,
120 struct clk *clk_register_gpt(const char *name, const char *parent_name, unsigned
124 const char *vco_gate_name, const char *parent_name,
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| H A D | clk-frac-synth.c | 125 struct clk *clk_register_frac(const char *name, const char *parent_name, clk_register_frac() argument
133 if (!name || !parent_name || !reg || !rtbl || !rtbl_cnt) { clk_register_frac()
154 init.parent_names = &parent_name; clk_register_frac()
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| H A D | clk-gpt-synth.c | 114 struct clk *clk_register_gpt(const char *name, const char *parent_name, unsigned clk_register_gpt() argument
122 if (!name || !parent_name || !reg || !rtbl || !rtbl_cnt) { clk_register_gpt()
143 init.parent_names = &parent_name; clk_register_gpt()
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| H A D | clk-aux-synth.c | 138 const char *parent_name, unsigned long flags, void __iomem *reg, clk_register_aux()
146 if (!aux_name || !parent_name || !reg || !rtbl || !rtbl_cnt) { clk_register_aux()
172 init.parent_names = &parent_name; clk_register_aux()
137 clk_register_aux(const char *aux_name, const char *gate_name, const char *parent_name, unsigned long flags, void __iomem *reg, struct aux_clk_masks *masks, struct aux_rate_tbl *rtbl, u8 rtbl_cnt, spinlock_t *lock, struct clk **gate_clk) clk_register_aux() argument
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| H A D | clk-vco-pll.c | 276 const char *vco_gate_name, const char *parent_name, clk_register_vco_pll()
288 if (!vco_name || !pll_name || !parent_name || !mode_reg || !cfg_reg || clk_register_vco_pll()
319 parent_name, 0, mode_reg, PLL_ENABLE, 0, lock); clk_register_vco_pll()
327 vco_parent_name = &parent_name; clk_register_vco_pll()
275 clk_register_vco_pll(const char *vco_name, const char *pll_name, const char *vco_gate_name, const char *parent_name, unsigned long flags, void __iomem *mode_reg, void __iomem *cfg_reg, struct pll_rate_tbl *rtbl, u8 rtbl_cnt, spinlock_t *lock, struct clk **pll_clk, struct clk **vco_gate_clk) clk_register_vco_pll() argument
|
| /linux-4.4.14/drivers/clk/samsung/ |
| H A D | clk.h | 58 * @parent_name: optional parent clock name.
65 const char *parent_name; member in struct:samsung_fixed_rate_clock
74 .parent_name = pname, \
83 * @parent_name: parent clock name.
91 const char *parent_name; member in struct:samsung_fixed_factor_clock
101 .parent_name = pname, \
167 * @parent_name: name of the parent clock.
178 const char *parent_name; member in struct:samsung_div_clock
193 .parent_name = pname, \
220 * @parent_name: name of the parent clock.
231 const char *parent_name; member in struct:samsung_gate_clock
244 .parent_name = pname, \
281 * @parent_name: name of the parent clock.
292 const char *parent_name; member in struct:samsung_pll_clock
308 .parent_name = _pname, \
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| H A D | clk.c | 147 list->parent_name, list->flags, list->fixed_rate); samsung_clk_register_fixed_rate()
176 list->parent_name, list->flags, list->mult, list->div); samsung_clk_register_fixed_factor()
230 list->parent_name, list->flags, samsung_clk_register_div()
236 list->parent_name, list->flags, samsung_clk_register_div()
267 clk = clk_register_gate(NULL, list->name, list->parent_name, samsung_clk_register_gate()
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| H A D | clk-exynos4.c | 1237 char *parent_name; exynos4_clk_register_finpll() local
1240 parent_name = xom & 1 ? "xusbxti" : "xxti"; exynos4_clk_register_finpll()
1241 clk = clk_get(NULL, parent_name); exynos4_clk_register_finpll()
1245 parent_name); exynos4_clk_register_finpll()
1252 fclk.parent_name = NULL; exynos4_clk_register_finpll()
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| H A D | clk-pll.c | 1178 init.parent_names = &pll_clk->parent_name; _samsung_clk_register_pll()
|
| /linux-4.4.14/drivers/clk/bcm/ |
| H A D | clk-iproc-armpll.c | 248 const char *parent_name; iproc_armpll_setup() local
261 parent_name = of_clk_get_parent_name(node, 0); iproc_armpll_setup()
262 init.parent_names = (parent_name ? &parent_name : NULL); iproc_armpll_setup()
263 init.num_parents = (parent_name ? 1 : 0); iproc_armpll_setup()
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| H A D | clk-iproc-asiu.c | 221 const char *parent_name; iproc_asiu_setup() local
238 parent_name = of_clk_get_parent_name(node, 0); iproc_asiu_setup()
239 init.parent_names = (parent_name ? &parent_name : NULL); iproc_asiu_setup()
240 init.num_parents = (parent_name ? 1 : 0); iproc_asiu_setup()
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| H A D | clk-iproc-pll.c | 601 const char *parent_name; iproc_pll_clk_setup() local
654 parent_name = of_clk_get_parent_name(node, 0); iproc_pll_clk_setup()
655 init.parent_names = (parent_name ? &parent_name : NULL); iproc_pll_clk_setup()
656 init.num_parents = (parent_name ? 1 : 0); iproc_pll_clk_setup()
677 parent_name = node->name; iproc_pll_clk_setup()
692 init.parent_names = (parent_name ? &parent_name : NULL); iproc_pll_clk_setup()
693 init.num_parents = (parent_name ? 1 : 0); iproc_pll_clk_setup()
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| /linux-4.4.14/drivers/clk/st/ |
| H A D | clkgen-pll.c | 841 static struct clk * __init clkgen_pll_register(const char *parent_name, clkgen_pll_register() argument
858 init.parent_names = &parent_name; clkgen_pll_register()
880 static struct clk * __init clkgen_c65_lsdiv_register(const char *parent_name, clkgen_c65_lsdiv_register() argument
885 clk = clk_register_fixed_factor(NULL, clk_name, parent_name, 0, 1, 2); clkgen_c65_lsdiv_register()
919 const char *parent_name; clkgena_c65_pll_setup() local
923 parent_name = of_clk_get_parent_name(np, 0); clkgena_c65_pll_setup()
924 if (!parent_name) clkgena_c65_pll_setup()
949 clk_data->clks[0] = clkgen_pll_register(parent_name, clkgena_c65_pll_setup()
978 clk_data->clks[2] = clkgen_pll_register(parent_name, clkgena_c65_pll_setup()
995 static struct clk * __init clkgen_odf_register(const char *parent_name, clkgen_odf_register() argument
1030 clk = clk_register_composite(NULL, odf_name, &parent_name, 1, clkgen_odf_register()
1097 const char *parent_name, *pll_name; clkgen_c32_pll_setup() local
1111 parent_name = of_clk_get_parent_name(np, 0); clkgen_c32_pll_setup()
1112 if (!parent_name) clkgen_c32_pll_setup()
1119 clk = clkgen_pll_register(parent_name, data, pll_base, np->name, clkgen_c32_pll_setup()
1181 const char *parent_name; clkgengpu_c32_pll_setup() local
1194 parent_name = of_clk_get_parent_name(np, 0); clkgengpu_c32_pll_setup()
1195 if (!parent_name) clkgengpu_c32_pll_setup()
1209 clk = clkgen_pll_register(parent_name, data, reg, clk_name, data->lock); clkgengpu_c32_pll_setup()
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| H A D | clkgen-mux.c | 492 const char *parent_name, *clk_name; st_of_clkgena_prediv_setup() local
508 parent_name = of_clk_get_parent_name(np, 0); st_of_clkgena_prediv_setup()
509 if (!parent_name) st_of_clkgena_prediv_setup()
516 clk = clk_register_divider_table(NULL, clk_name, parent_name, st_of_clkgena_prediv_setup()
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| H A D | clkgen-fsyn.c | 619 const char *name, const char *parent_name, st_clk_register_quadfs_pll()
630 if (WARN_ON(!name || !parent_name)) st_clk_register_quadfs_pll()
640 init.parent_names = &parent_name; st_clk_register_quadfs_pll()
1023 const char *name, const char *parent_name, st_clk_register_quadfs_fsynth()
1034 if (WARN_ON(!name || !parent_name)) st_clk_register_quadfs_fsynth()
1044 init.parent_names = &parent_name; st_clk_register_quadfs_fsynth()
618 st_clk_register_quadfs_pll( const char *name, const char *parent_name, struct clkgen_quadfs_data *quadfs, void __iomem *reg, spinlock_t *lock) st_clk_register_quadfs_pll() argument
1022 st_clk_register_quadfs_fsynth( const char *name, const char *parent_name, struct clkgen_quadfs_data *quadfs, void __iomem *reg, u32 chan, spinlock_t *lock) st_clk_register_quadfs_fsynth() argument
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| /linux-4.4.14/drivers/clk/mvebu/ |
| H A D | clk-cpu.c | 39 const char *parent_name; member in struct:cpu_clk
212 cpuclk[cpu].parent_name = of_clk_get_parent_name(node, 0); of_cpu_clk_setup()
223 init.parent_names = &cpuclk[cpu].parent_name; of_cpu_clk_setup()
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| H A D | clk-corediv.c | 243 const char *parent_name; mvebu_corediv_clk_init() local
251 parent_name = of_clk_get_parent_name(node, 0); mvebu_corediv_clk_init()
272 init.parent_names = &parent_name; mvebu_corediv_clk_init()
|
| /linux-4.4.14/fs/nilfs2/ |
| H A D | sysfs.c | 44 #define NILFS_DEV_INT_GROUP_OPS(name, parent_name) \
50 ns_##parent_name##_kobj); \
62 ns_##parent_name##_kobj); \
73 #define NILFS_DEV_INT_GROUP_TYPE(name, parent_name) \
76 struct nilfs_sysfs_##parent_name##_subgroups *subgroups; \
79 ns_##parent_name##_kobj); \
80 subgroups = nilfs->ns_##parent_name##_subgroups; \
89 #define NILFS_DEV_INT_GROUP_FNS(name, parent_name) \
95 struct nilfs_sysfs_##parent_name##_subgroups *subgroups; \
97 subgroups = nilfs->ns_##parent_name##_subgroups; \
100 parent = &nilfs->ns_##parent_name##_kobj; \
111 kobject_del(&nilfs->ns_##parent_name##_subgroups->sg_##name##_kobj); \
|
| /linux-4.4.14/arch/arm/plat-omap/ |
| H A D | dmtimer.c | 484 char *parent_name = NULL; omap_dm_timer_set_source() local
509 parent_name = "timer_sys_ck"; omap_dm_timer_set_source()
513 parent_name = "timer_32k_ck"; omap_dm_timer_set_source()
517 parent_name = "timer_ext_ck"; omap_dm_timer_set_source()
521 parent = clk_get(&timer->pdev->dev, parent_name); omap_dm_timer_set_source()
523 pr_err("%s: %s not found\n", __func__, parent_name); omap_dm_timer_set_source()
530 parent_name); omap_dm_timer_set_source()
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| /linux-4.4.14/sound/soc/sh/ |
| H A D | siu_dai.c | 643 char *siu_name, *parent_name; siu_dai_set_sysclk() local
654 parent_name = "pll_clk"; siu_dai_set_sysclk()
658 parent_name = "siumcka_clk"; siu_dai_set_sysclk()
662 parent_name = "pll_clk"; siu_dai_set_sysclk()
666 parent_name = "siumckb_clk"; siu_dai_set_sysclk()
679 parent_clk = clk_get(dai->dev, parent_name); siu_dai_set_sysclk()
|
| /linux-4.4.14/include/linux/ |
| H A D | clk-provider.h | 280 const char *parent_name, unsigned long flags,
283 const char *name, const char *parent_name, unsigned long flags,
321 const char *parent_name, unsigned long flags,
400 const char *parent_name, unsigned long flags,
404 const char *parent_name, unsigned long flags,
488 const char *parent_name, unsigned long flags,
519 const char *name, const char *parent_name, unsigned long flags,
606 const char *parent_name, unsigned gpio, bool active_low,
|
| /linux-4.4.14/arch/powerpc/platforms/512x/ |
| H A D | clock-commonclk.c | 228 const char *name, const char *parent_name, mpc512x_clk_factor()
234 return clk_register_fixed_factor(NULL, name, parent_name, clkflags, mpc512x_clk_factor()
239 const char *name, const char *parent_name, u8 clkflags, mpc512x_clk_divider()
242 return clk_register_divider(NULL, name, parent_name, clkflags, mpc512x_clk_divider()
247 const char *name, const char *parent_name, mpc512x_clk_divtable()
254 return clk_register_divider_table(NULL, name, parent_name, 0, mpc512x_clk_divtable()
260 const char *name, const char *parent_name, mpc512x_clk_gated()
266 return clk_register_gate(NULL, name, parent_name, clkflags, mpc512x_clk_gated()
227 mpc512x_clk_factor( const char *name, const char *parent_name, int mul, int div) mpc512x_clk_factor() argument
238 mpc512x_clk_divider( const char *name, const char *parent_name, u8 clkflags, u32 __iomem *reg, u8 pos, u8 len, int divflags) mpc512x_clk_divider() argument
246 mpc512x_clk_divtable( const char *name, const char *parent_name, u32 __iomem *reg, u8 pos, u8 len, const struct clk_div_table *divtab) mpc512x_clk_divtable() argument
259 mpc512x_clk_gated( const char *name, const char *parent_name, u32 __iomem *reg, u8 pos) mpc512x_clk_gated() argument
|
| /linux-4.4.14/arch/arm/mach-omap2/ |
| H A D | clkt2xxx_virt_prcm_set.c | 234 const char *parent_name = "mpu_ck"; omap2xxx_clkt_vps_init() local
244 init.parent_names = &parent_name; omap2xxx_clkt_vps_init()
|
| /linux-4.4.14/arch/mips/alchemy/common/ |
| H A D | clock.c | 149 static struct clk __init *alchemy_clk_setup_cpu(const char *parent_name, alchemy_clk_setup_cpu() argument
160 id.parent_names = &parent_name; alchemy_clk_setup_cpu()
232 static struct clk __init *alchemy_clk_setup_aux(const char *parent_name, alchemy_clk_setup_aux() argument
245 id.parent_names = &parent_name; alchemy_clk_setup_aux()
|
| /linux-4.4.14/drivers/clk/pistachio/ |
| H A D | clk-pll.c | 449 static struct clk *pll_register(const char *name, const char *parent_name, pll_register() argument
465 init.parent_names = &parent_name; pll_register()
|
| /linux-4.4.14/drivers/clk/sirf/ |
| H A D | clk-atlas7.c | 245 const char *parent_name; member in struct:atlas7_div_init_data
272 const char *parent_name; member in struct:atlas7_unit_init_data
657 /* div_name, parent_name, gate_name, clk_flag, divider_flag, gate_flag, div_offset, shift, wdith, gate_offset, bit_enable, lock */
1057 /* unit_name, parent_name, flags, regofs, bit, lock */
1273 const char * const parent_name, unsigned long flags, atlas7_unit_clk_register()
1285 init.parent_names = &parent_name; atlas7_unit_clk_register()
1646 div->parent_name, div->divider_flags, sirfsoc_clk_vbase + div->div_offset, atlas7_clk_init()
1668 atlas7_clks[i] = atlas7_unit_clk_register(NULL, unit->unit_name, unit->parent_name, atlas7_clk_init()
1272 atlas7_unit_clk_register(struct device *dev, const char *name, const char * const parent_name, unsigned long flags, u32 regofs, u8 bit, u32 type, u8 idle_bit, spinlock_t *lock) atlas7_unit_clk_register() argument
|
| /linux-4.4.14/drivers/clk/rockchip/ |
| H A D | clk.h | 110 * @parent_name: name of the parent clock.
|
| /linux-4.4.14/fs/proc/ |
| H A D | proc_sysctl.c | 145 const char *parent_name; insert_entry() local
152 parent_name = parent_entry->procname; insert_entry()
154 cmp = namecmp(name, namelen, parent_name, strlen(parent_name)); insert_entry()
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| /linux-4.4.14/sound/soc/davinci/ |
| H A D | davinci-mcasp.c | 1510 const char *parent_name; mcasp_reparent_fck() local
1516 parent_name = of_get_property(node, "fck_parent", NULL); mcasp_reparent_fck()
1517 if (!parent_name) mcasp_reparent_fck()
1526 parent_clk = clk_get(NULL, parent_name); mcasp_reparent_fck()
|