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Searched refs:PORT (Results 1 – 56 of 56) sorted by relevance

/linux-4.1.27/drivers/tty/serial/8250/
D8250_boca.c13 #define PORT(_base,_irq) \ macro
23 PORT(0x100, 12),
24 PORT(0x108, 12),
25 PORT(0x110, 12),
26 PORT(0x118, 12),
27 PORT(0x120, 12),
28 PORT(0x128, 12),
29 PORT(0x130, 12),
30 PORT(0x138, 12),
31 PORT(0x140, 12),
[all …]
D8250_fourport.c13 #define PORT(_base,_irq) \ macro
23 PORT(0x1a0, 9),
24 PORT(0x1a8, 9),
25 PORT(0x1b0, 9),
26 PORT(0x1b8, 9),
27 PORT(0x2a0, 5),
28 PORT(0x2a8, 5),
29 PORT(0x2b0, 5),
30 PORT(0x2b8, 5),
D8250_exar_st16c554.c16 #define PORT(_base,_irq) \ macro
26 PORT(0x100, 5),
27 PORT(0x108, 5),
28 PORT(0x110, 5),
29 PORT(0x118, 5),
D8250_accent.c13 #define PORT(_base,_irq) \ macro
23 PORT(0x330, 4),
24 PORT(0x338, 4),
/linux-4.1.27/arch/mips/boot/compressed/
Duart-16550.c12 #define PORT(offset) (CKSEG1ADDR(UART_BASE) + (offset)) macro
17 #define PORT(offset) (CKSEG1ADDR(AR7_REGS_UART0) + (4 * offset)) macro
22 #define PORT(offset) (CKSEG1ADDR(JZ4740_UART0_BASE_ADDR) + (4 * offset)) macro
27 #define PORT(offset) (CKSEG1ADDR(UART0_BASE) + (4 * offset)) macro
33 #define PORT(offset) (CKSEG1ADDR(UART0_BASE) + (4 * offset)) macro
41 #ifndef PORT
47 return *((volatile IOTYPE *)PORT(offset)) & 0xFF; in serial_in()
52 *((volatile IOTYPE *)PORT(offset)) = value & 0xFF; in serial_out()
/linux-4.1.27/drivers/scsi/
Daha152x.h288 #define SETPORT(PORT, VAL) outb( (VAL), (PORT) ) argument
289 #define GETPORT(PORT) inb( PORT ) argument
290 #define SETBITS(PORT, BITS) outb( (inb(PORT) | (BITS)), (PORT) ) argument
291 #define CLRBITS(PORT, BITS) outb( (inb(PORT) & ~(BITS)), (PORT) ) argument
292 #define TESTHI(PORT, BITS) ((inb(PORT) & (BITS)) == (BITS)) argument
293 #define TESTLO(PORT, BITS) ((inb(PORT) & (BITS)) == 0) argument
/linux-4.1.27/arch/blackfin/mach-bf527/
DKconfig17 Select PORT used for SPORT0. See Hardware Reference Manual
20 bool "PORT F"
22 PORT F
25 bool "PORT G"
27 PORT G
38 bool "PORT PG10"
40 PORT PG10
43 bool "PORT PG14"
45 PORT PG14
52 Select PORT used for UART1. See Hardware Reference Manual
[all …]
/linux-4.1.27/arch/mips/alchemy/common/
Dplatform.c51 #define PORT(_base, _irq) \ macro
65 PORT(AU1000_UART0_PHYS_ADDR, AU1000_UART0_INT),
66 PORT(AU1000_UART1_PHYS_ADDR, AU1000_UART1_INT),
67 PORT(AU1000_UART2_PHYS_ADDR, AU1000_UART2_INT),
68 PORT(AU1000_UART3_PHYS_ADDR, AU1000_UART3_INT),
71 PORT(AU1000_UART0_PHYS_ADDR, AU1500_UART0_INT),
72 PORT(AU1000_UART3_PHYS_ADDR, AU1500_UART3_INT),
75 PORT(AU1000_UART0_PHYS_ADDR, AU1100_UART0_INT),
76 PORT(AU1000_UART1_PHYS_ADDR, AU1100_UART1_INT),
77 PORT(AU1000_UART3_PHYS_ADDR, AU1100_UART3_INT),
[all …]
/linux-4.1.27/drivers/net/ethernet/sun/
Dniu.h1169 #define ENET_VLAN_TBL_SHIFT(PORT) ((PORT) * 4) argument
1947 #define ZCP_RAM_SEL_CFIFO(PORT) (0x10 + (PORT)) argument
1957 #define RESET_CFIFO_RST(PORT) (0x1 << (PORT)) argument
1959 #define CFIFO_ECC(PORT) (FZC_ZCP + 0x000a0UL + (PORT) * 8UL) argument
2276 #define TXC_PORT_CTL(PORT) (FZC_TXC + 0x20020UL + (PORT)*0x100UL) argument
2279 #define TXC_PKT_STUFFED(PORT) (FZC_TXC + 0x20030UL + (PORT)*0x100UL) argument
2283 #define TXC_PKT_XMIT(PORT) (FZC_TXC + 0x20038UL + (PORT)*0x100UL) argument
2287 #define TXC_ROECC_CTL(PORT) (FZC_TXC + 0x20040UL + (PORT)*0x100UL) argument
2298 #define TXC_ROECC_ST(PORT) (FZC_TXC + 0x20048UL + (PORT)*0x100UL) argument
2304 #define TXC_RO_DATA0(PORT) (FZC_TXC + 0x20050UL + (PORT)*0x100UL) argument
[all …]
/linux-4.1.27/arch/mips/kernel/
D8250-platform.c11 #define PORT(base, int) \ macro
22 PORT(0x3F8, 4),
23 PORT(0x2F8, 3),
24 PORT(0x3E8, 4),
25 PORT(0x2E8, 3),
/linux-4.1.27/drivers/pinctrl/sh-pfc/
Dsh_pfc.h260 #define PORT_ALL(str) CPU_ALL_PORT(_PORT_ALL, PORT, str)
274 .name = __stringify(PORT##_pin), \
275 .enum_id = PORT##_pin##_DATA, \
291 PINMUX_DATA(PORT##pfx##_DATA, PORT##pfx##_FN0, \
292 PORT##pfx##_OUT, PORT##pfx##_IN)
313 0, PORT##nr##_OUT, PORT##nr##_IN, 0, \
317 PORT##nr##_FN0, PORT##nr##_FN1, \
318 PORT##nr##_FN2, PORT##nr##_FN3, \
319 PORT##nr##_FN4, PORT##nr##_FN5, \
320 PORT##nr##_FN6, PORT##nr##_FN7 \
Dpfc-emev2.c253 #define __PORT_DATA(pn, pfx, sfx) PINMUX_DATA(PORT##pfx##_DATA, PORT##pfx##_FN)
/linux-4.1.27/drivers/net/ethernet/amd/
Dni65.c112 #define PORT p->cmdr_addr macro
159 #define writereg(val,reg) {outw(reg,PORT+L_ADDRREG);inw(PORT+L_ADDRREG); \
160 outw(val,PORT+L_DATAREG);inw(PORT+L_DATAREG);}
161 #define readreg(reg) (outw(reg,PORT+L_ADDRREG),inw(PORT+L_ADDRREG),\
162 inw(PORT+L_DATAREG))
164 #define writedatareg(val) {outw(val,PORT+L_DATAREG);inw(PORT+L_DATAREG);}
169 #define writereg(val,reg) {outw(reg,PORT+L_ADDRREG);outw(val,PORT+L_DATAREG);}
170 #define readreg(reg) (outw(reg,PORT+L_ADDRREG),inw(PORT+L_DATAREG))
278 outw(80,PORT+L_ADDRREG); in ni65_set_performance()
279 if(inw(PORT+L_ADDRREG) != 80) in ni65_set_performance()
[all …]
/linux-4.1.27/arch/mips/sni/
Dpcit.c22 #define PORT(_base,_irq) \ macro
32 PORT(0x3f8, 0),
33 PORT(0x2f8, 3),
46 PORT(0x3f8, 0),
47 PORT(0x2f8, 3),
48 PORT(0x3e8, 4),
49 PORT(0x2e8, 3),
Da20r.c20 #define PORT(_base,_irq) \ macro
30 PORT(0x3f8, 4),
31 PORT(0x2f8, 3),
Dpcimt.c70 #define PORT(_base,_irq) \ macro
80 PORT(0x3f8, 4),
81 PORT(0x2f8, 3),
/linux-4.1.27/arch/mips/loongson/common/
Dearly_printk.c16 #define PORT(base, offset) (u8 *)(base + offset) macro
20 return readb(PORT(base, offset)); in serial_in()
25 writeb(value, PORT(base, offset)); in serial_out()
Dserial.c22 #define PORT(int, clk) \ macro
43 [MACH_LEMOTE_FL2E] = {PORT(4, 1843200), {} },
44 [MACH_LEMOTE_FL2F] = {PORT(3, 1843200), {} },
49 [MACH_LEMOTE_LL2F] = {PORT(3, 1843200), {} },
/linux-4.1.27/arch/mips/mti-sead3/
Dsead3-console.c15 #define PORT(base_addr, offset) ((unsigned int __iomem *)(base_addr+(offset)*4)) macro
21 return __raw_readl(PORT(base_addr, offset)) & 0xff; in serial_in()
26 __raw_writel(value, PORT(base_addr, offset)); in serial_out()
/linux-4.1.27/Documentation/hwmon/
Dsmsc47b39792 to the CONFIG PORT (0x2E).
95 In configuration mode, the INDEX PORT is located at the CONFIG PORT address and
96 the DATA PORT is at INDEX PORT address + 1.
100 (i.e., 0x07) to the INDEX PORT and then write the number of the
101 desired logical device to the DATA PORT.
104 logical device to the INDEX PORT and then write or read the config-
105 uration register through the DATA PORT.
110 To exit the Configuration State the write 0xAA to the CONFIG PORT (0x2E).
/linux-4.1.27/Documentation/devicetree/bindings/
Dxilinx.txt67 PORT OPB_Clk = CLK_50MHz
68 PORT Interrupt = opb_uartlite_0_Interrupt
69 PORT RX = opb_uartlite_0_RX
70 PORT TX = opb_uartlite_0_TX
71 PORT OPB_Rst = sys_bus_reset_0
109 PORT Sys_Intr1 = ps2_1_intr
110 PORT Sys_Intr2 = ps2_2_intr
111 PORT Clkin1 = ps2_clk_rx_1
112 PORT Clkin2 = ps2_clk_rx_2
113 PORT Clkpd1 = ps2_clk_tx_1
[all …]
/linux-4.1.27/Documentation/devicetree/bindings/gpio/
Dgpio-vf610.txt1 * Freescale VF610 PORT/GPIO module
3 The Freescale PORT/GPIO modules are two adjacent modules providing GPIO
5 each, and each PORT module has its own interrupt.
9 - reg : The first reg tuple represents the PORT module, the second tuple
/linux-4.1.27/arch/mips/ar7/
Dprom.c253 #define PORT(offset) (KSEG1ADDR(AR7_REGS_UART0 + (offset * 4))) macro
256 return readl((void *)PORT(offset)); in serial_in()
261 writel(value, (void *)PORT(offset)); in serial_out()
/linux-4.1.27/arch/mips/netlogic/xlr/
Dplatform.c60 #define PORT(_irq) \ macro
74 PORT(PIC_UART_0_IRQ),
75 PORT(PIC_UART_1_IRQ),
/linux-4.1.27/drivers/pinctrl/
Dpinctrl-falcon.c51 #define PORT(x) (x / PINS) macro
253 void __iomem *mem = info->membase[PORT(pin)]; in falcon_pinconf_get()
290 void __iomem *mem = info->membase[PORT(pin)]; in falcon_pinconf_set()
335 int port = PORT(offset); in falcon_pinconf_dbg_show()
388 int port = PORT(info->mfp[mfp].pin); in falcon_mux_apply()
Dpinctrl-tb10x.c48 #define PCFG_PORT_MASK(PORT) \ argument
49 (((1 << PCFG_PORT_BITWIDTH) - 1) << (PCFG_PORT_BITWIDTH * (PORT)))
412 #define DEFPINFUNCGRP(NAME, PORT, MODE, ISGPIO) { \ argument
415 .port = (PORT), .mode = (MODE), \
Dpinctrl-xway.c30 #define PORT(x) (x / PINS) macro
44 #define GPIO_BASE(p) (REG_OFF * PORT(p))
455 int port = PORT(pin); in xway_pinconf_get()
508 int port = PORT(pin); in xway_pinconf_set()
616 int port = PORT(pin); in xway_mux_apply()
/linux-4.1.27/drivers/tty/serial/
Dip22zilog.c90 #define ZILOG_CHANNEL_FROM_PORT(PORT) ((struct zilog_channel *)((PORT)->membase)) argument
91 #define UART_ZILOG(PORT) ((struct uart_ip22zilog_port *)(PORT)) argument
92 #define IP22ZILOG_GET_CURR_REG(PORT, REGNUM) \ argument
93 (UART_ZILOG(PORT)->curregs[REGNUM])
94 #define IP22ZILOG_SET_CURR_REG(PORT, REGNUM, REGVAL) \ argument
95 ((UART_ZILOG(PORT)->curregs[REGNUM]) = (REGVAL))
Dsunzilog.c108 #define ZILOG_CHANNEL_FROM_PORT(PORT) ((struct zilog_channel __iomem *)((PORT)->membase)) argument
109 #define UART_ZILOG(PORT) ((struct uart_sunzilog_port *)(PORT)) argument
/linux-4.1.27/arch/blackfin/mach-bf518/
DKconfig95 menu "PORT F"
111 menu "PORT G"
131 menu "PORT H"
/linux-4.1.27/arch/avr32/mach-at32ap/include/mach/
Dat32ap700x.h143 #define ATMEL_LCDC(PORT, PIN) (ATMEL_LCDC_##PORT##_##PIN) argument
/linux-4.1.27/Documentation/fb/
Dcirrusfb.txt70 * Compile fixes related to new 2.3.x IORESOURCE_IO[PORT] symbol changes.
/linux-4.1.27/arch/arm/boot/dts/
Domap3-cm-t3x.dtsi41 /* HS USB Host PHY on PORT 1 */
47 /* HS USB Host PHY on PORT 2 */
Domap3-igep0020-common.dtsi56 /* HS USB Host PHY on PORT 1 */
Domap3-overo-base.dtsi43 /* HS USB Host PHY on PORT 2 */
Domap5-uevm.dts52 /* HS USB Host PHY on PORT 2 */
61 /* HS USB Host PHY on PORT 3 */
Domap4-duovero.dtsi38 /* HS USB Host PHY on PORT 1 */
Domap5-cm-t54.dts61 /* HS USB Host PHY on PORT 2 */
67 /* HS USB Host PHY on PORT 3 */
Domap4-var-som-om44.dtsi36 /* HS USB Host PHY on PORT 1 */
Domap3-beagle-xm.dts87 /* HS USB Host PHY on PORT 2 */
Domap3-tao3530.dtsi44 /* HS USB Host PHY on PORT 2 */
Domap3-beagle.dts62 /* HS USB Host PHY on PORT 2 */
Domap4-panda-common.dtsi83 /* HS USB Host PHY on PORT 1 */
/linux-4.1.27/Documentation/devicetree/bindings/pinctrl/
Dfsl,imx27-pinctrl.txt13 configurable pins each. PIN is PORT * 32 + PORT_PIN, PORT_PIN is the pin
/linux-4.1.27/arch/blackfin/kernel/
Ddebug-mmrs.c362 _buf = REGS_STR_PFX_C(buf, PORT, num); in bfin_debug_mmrs_port()
392 #define PORT(base, num) bfin_debug_mmrs_port(parent, base, num) macro
1780 PORT(PORTFIO, 'F'); in bfin_debug_mmrs_init()
1783 PORT(PORTGIO, 'G'); in bfin_debug_mmrs_init()
1786 PORT(PORTHIO, 'H'); in bfin_debug_mmrs_init()
1873 PORT(base, num); in bfin_debug_mmrs_init()
/linux-4.1.27/drivers/media/radio/
Dradio-gemtek.c133 #define BU2614_PORT_MASK MKMASK(PORT)
/linux-4.1.27/drivers/scsi/bfa/
Dbfa_port.c25 BFA_TRC_FILE(CNA, PORT);
Dbfa_fcs_lport.c24 BFA_TRC_FILE(FCS, PORT);
/linux-4.1.27/Documentation/metag/
Dkernel-ABI.txt29 PORT Special Ports
/linux-4.1.27/Documentation/isdn/
DREADME.HiSax522 # teles 16.0 on IRQ=5, MEM=0xd8000, PORT=0xd80
524 # teles 16.3 (non pnp) on IRQ=15, PORT=0xd80
/linux-4.1.27/drivers/net/ethernet/qlogic/qlcnic/
Dqlcnic_83xx_init.c1027 #define QLC_83XX_VXLAN_UDP_DPORT(PORT) ((PORT & 0xffff) << 16) argument
/linux-4.1.27/Documentation/netlabel/
Ddraft-ietf-cipso-ipsecurity-01.txt573 datagrams. This label will be compared against the PORT (if appropriate)
649 HOST_LABEL_MAX parameters MAY be substituted for the PORT parameters in
/linux-4.1.27/drivers/ata/
Dsata_nv.c295 #define NV_ADMA_CHECK_INTR(GCTL, PORT) ((GCTL) & (1 << (19 + (12 * (PORT))))) argument
/linux-4.1.27/
DMAINTAINERS558 ALPHA PORT
808 ARM PORT
1022 ARM/FARADAY FA526 PORT
1324 ARM/PT DIGITAL BOARD PORT
1644 ARM64 PORT (AARCH64 ARCHITECTURE)
2824 CRIS PORT
4250 FUJITSU FR-V (FRV) PORT
4768 I2C OVER PARALLEL PORT
7386 PANASONIC MN10300/AM33/AM34 PORT
7395 PARALLEL PORT SUPPORT
[all …]
/linux-4.1.27/Documentation/
Dparport-lowlevel.txt938 PORT FUNCTIONS
Dkernel-parameters.txt1761 PORT[.DEVICE]. PORT and DEVICE are decimal numbers
1764 the whole ID part is omitted, the last PORT and DEVICE
1781 Any ID with matching PORT is used.