112 #define PORT p->cmdr_addr  macro
159 #define writereg(val,reg) {outw(reg,PORT+L_ADDRREG);inw(PORT+L_ADDRREG); \
160                            outw(val,PORT+L_DATAREG);inw(PORT+L_DATAREG);}
161 #define readreg(reg) (outw(reg,PORT+L_ADDRREG),inw(PORT+L_ADDRREG),\
162                        inw(PORT+L_DATAREG))
164 #define writedatareg(val) {outw(val,PORT+L_DATAREG);inw(PORT+L_DATAREG);}
169 #define writereg(val,reg) {outw(reg,PORT+L_ADDRREG);outw(val,PORT+L_DATAREG);}
170 #define readreg(reg) (outw(reg,PORT+L_ADDRREG),inw(PORT+L_DATAREG))
278 	outw(80,PORT+L_ADDRREG);  in ni65_set_performance()
279 	if(inw(PORT+L_ADDRREG) != 80)  in ni65_set_performance()
283 	outw(0,PORT+L_ADDRREG);  in ni65_set_performance()
284 	outw((short)isa0,PORT+L_BUSIF); /* write ISA 0: DMA_R : isa0 * 50ns */  in ni65_set_performance()
285 	outw(1,PORT+L_ADDRREG);  in ni65_set_performance()
286 	outw((short)isa1,PORT+L_BUSIF); /* write ISA 1: DMA_W : isa1 * 50ns	*/  in ni65_set_performance()
288 	outw(CSR0,PORT+L_ADDRREG);	/* switch back to CSR0 */  in ni65_set_performance()
326 	outw(inw(PORT+L_RESET),PORT+L_RESET); /* that's the hard way */  in ni65_close()
463 	outw(inw(PORT+L_RESET),PORT+L_RESET); /* first: reset the card */  in ni65_probe1()
472 	outw(88,PORT+L_ADDRREG);  in ni65_probe1()
473 	if(inw(PORT+L_ADDRREG) == 88) {  in ni65_probe1()
475 		v = inw(PORT+L_DATAREG);  in ni65_probe1()
477 		outw(89,PORT+L_ADDRREG);  in ni65_probe1()
478 		v |= inw(PORT+L_DATAREG);  in ni65_probe1()
598 		if(inw(PORT+L_DATAREG) & (CSR0_IDON | CSR0_MERR) )  in ni65_init_lance()
809 	 outw(inw(PORT+L_RESET),PORT+L_RESET); /* first: reset the card */  in ni65_lance_reinit()
860 	 if(inw(PORT+L_DATAREG) & CSR0_IDON)	{  in ni65_lance_reinit()
866 	 printk(KERN_ERR "%s: can't init lance, status: %04x\n",dev->name,(int) inw(PORT+L_DATAREG));  in ni65_lance_reinit()
888 		csr0 = inw(PORT+L_DATAREG);  in ni65_interrupt()
1072 									dev->name,(int) rmdstat,csr0,(int) inw(PORT+L_DATAREG) );  in ni65_recv_intr()