1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License.  See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2007 Ralf Baechle (ralf@linux-mips.org)
7 *
8 * Copyright (C) 2009 Lemote, Inc.
9 * Author: Yan hua (yanhua@lemote.com)
10 * Author: Wu Zhangjin (wuzhangjin@gmail.com)
11 */
12
13#include <linux/io.h>
14#include <linux/init.h>
15#include <linux/serial_8250.h>
16
17#include <asm/bootinfo.h>
18
19#include <loongson.h>
20#include <machine.h>
21
22#define PORT(int, clk)			\
23{								\
24	.irq		= int,					\
25	.uartclk	= clk,					\
26	.iotype		= UPIO_PORT,				\
27	.flags		= UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,	\
28	.regshift	= 0,					\
29}
30
31#define PORT_M(int, clk)				\
32{								\
33	.irq		= MIPS_CPU_IRQ_BASE + (int),		\
34	.uartclk	= clk,					\
35	.iotype		= UPIO_MEM,				\
36	.membase	= (void __iomem *)NULL,			\
37	.flags		= UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,	\
38	.regshift	= 0,					\
39}
40
41static struct plat_serial8250_port uart8250_data[][MAX_UARTS + 1] = {
42	[MACH_LOONGSON_UNKNOWN]	= {},
43	[MACH_LEMOTE_FL2E]	= {PORT(4, 1843200), {} },
44	[MACH_LEMOTE_FL2F]	= {PORT(3, 1843200), {} },
45	[MACH_LEMOTE_ML2F7]	= {PORT_M(3, 3686400), {} },
46	[MACH_LEMOTE_YL2F89]	= {PORT_M(3, 3686400), {} },
47	[MACH_DEXXON_GDIUM2F10]	= {PORT_M(3, 3686400), {} },
48	[MACH_LEMOTE_NAS]	= {PORT_M(3, 3686400), {} },
49	[MACH_LEMOTE_LL2F]	= {PORT(3, 1843200), {} },
50	[MACH_LOONGSON_GENERIC]	= {PORT_M(2, 25000000), {} },
51	[MACH_LOONGSON_END]	= {},
52};
53
54static struct platform_device uart8250_device = {
55	.name = "serial8250",
56	.id = PLAT8250_DEV_PLATFORM,
57};
58
59static int __init serial_init(void)
60{
61	int i;
62	unsigned char iotype;
63
64	iotype = uart8250_data[mips_machtype][0].iotype;
65
66	if (UPIO_MEM == iotype) {
67		uart8250_data[mips_machtype][0].mapbase =
68			loongson_uart_base[0];
69		uart8250_data[mips_machtype][0].membase =
70			(void __iomem *)_loongson_uart_base[0];
71	}
72	else if (UPIO_PORT == iotype)
73		uart8250_data[mips_machtype][0].iobase =
74			loongson_uart_base[0] - LOONGSON_PCIIO_BASE;
75
76	if (loongson_sysconf.uarts[0].uartclk)
77		uart8250_data[mips_machtype][0].uartclk =
78			loongson_sysconf.uarts[0].uartclk;
79
80	for (i = 1; i < loongson_sysconf.nr_uarts; i++) {
81		iotype = loongson_sysconf.uarts[i].iotype;
82		uart8250_data[mips_machtype][i].iotype = iotype;
83		loongson_uart_base[i] = loongson_sysconf.uarts[i].uart_base;
84
85		if (UPIO_MEM == iotype) {
86			uart8250_data[mips_machtype][i].irq =
87				MIPS_CPU_IRQ_BASE + loongson_sysconf.uarts[i].int_offset;
88			uart8250_data[mips_machtype][i].mapbase =
89				loongson_uart_base[i];
90			uart8250_data[mips_machtype][i].membase =
91				ioremap_nocache(loongson_uart_base[i], 8);
92		} else if (UPIO_PORT == iotype) {
93			uart8250_data[mips_machtype][i].irq =
94				loongson_sysconf.uarts[i].int_offset;
95			uart8250_data[mips_machtype][i].iobase =
96				loongson_uart_base[i] - LOONGSON_PCIIO_BASE;
97		}
98
99		uart8250_data[mips_machtype][i].uartclk =
100			loongson_sysconf.uarts[i].uartclk;
101		uart8250_data[mips_machtype][i].flags =
102			UPF_BOOT_AUTOCONF | UPF_SKIP_TEST;
103	}
104
105	memset(&uart8250_data[mips_machtype][loongson_sysconf.nr_uarts],
106			0, sizeof(struct plat_serial8250_port));
107	uart8250_device.dev.platform_data = uart8250_data[mips_machtype];
108
109	return platform_device_register(&uart8250_device);
110}
111
112device_initcall(serial_init);
113